diff options
author | Olof Johansson <olof@lixom.net> | 2014-07-19 17:28:06 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2014-07-19 17:28:06 -0400 |
commit | 4338925434e4bf5ff714055713f3fb9b5fae9037 (patch) | |
tree | 2c764e61af011f71b97c1d4b5113b47265d3e03d | |
parent | 7b2a428a33411dd9d79ee836b6e72fad2dbbb365 (diff) | |
parent | ba364fc752daeded072a5ef31e43b84cb1f9e5fd (diff) |
Merge tag 'mvebu-soc-3.17-2' of git://git.infradead.org/linux-mvebu into next/soc
Merge "ARM: mvebu SoC changes for v3.17 (round 2)" from Jason Cooper:
"Yeah, it's just one patch, but it's a beautiful one! Thanks to the
efforts of many people over the last couple years, and in particular,
Andrew Lunn, Kirkwood has been completely converted to DT."
- kirkwood
* Remove mach-kirkwood/, It's fully supported in mach-mvebu/
* tag 'mvebu-soc-3.17-2' of git://git.infradead.org/linux-mvebu:
ARM: Kirkwood: Remove mach-kirkwood
Signed-off-by: Olof Johansson <olof@lixom.net>
35 files changed, 4 insertions, 4374 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 245058b3b0ef..ba536bcb91b3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -528,21 +528,6 @@ config ARCH_DOVE | |||
528 | help | 528 | help |
529 | Support for the Marvell Dove SoC 88AP510 | 529 | Support for the Marvell Dove SoC 88AP510 |
530 | 530 | ||
531 | config ARCH_KIRKWOOD | ||
532 | bool "Marvell Kirkwood" | ||
533 | select ARCH_REQUIRE_GPIOLIB | ||
534 | select CPU_FEROCEON | ||
535 | select GENERIC_CLOCKEVENTS | ||
536 | select MVEBU_MBUS | ||
537 | select PCI | ||
538 | select PCI_QUIRKS | ||
539 | select PINCTRL | ||
540 | select PINCTRL_KIRKWOOD | ||
541 | select PLAT_ORION_LEGACY | ||
542 | help | ||
543 | Support for the following Marvell Kirkwood series SoCs: | ||
544 | 88F6180, 88F6192 and 88F6281. | ||
545 | |||
546 | config ARCH_MV78XX0 | 531 | config ARCH_MV78XX0 |
547 | bool "Marvell MV78xx0" | 532 | bool "Marvell MV78xx0" |
548 | select ARCH_REQUIRE_GPIOLIB | 533 | select ARCH_REQUIRE_GPIOLIB |
@@ -951,8 +936,6 @@ source "arch/arm/mach-ixp4xx/Kconfig" | |||
951 | 936 | ||
952 | source "arch/arm/mach-keystone/Kconfig" | 937 | source "arch/arm/mach-keystone/Kconfig" |
953 | 938 | ||
954 | source "arch/arm/mach-kirkwood/Kconfig" | ||
955 | |||
956 | source "arch/arm/mach-ks8695/Kconfig" | 939 | source "arch/arm/mach-ks8695/Kconfig" |
957 | 940 | ||
958 | source "arch/arm/mach-msm/Kconfig" | 941 | source "arch/arm/mach-msm/Kconfig" |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 3548612b0bfe..35ba55bce827 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -1041,7 +1041,7 @@ config DEBUG_UART_8250 | |||
1041 | def_bool ARCH_DOVE || ARCH_EBSA110 || \ | 1041 | def_bool ARCH_DOVE || ARCH_EBSA110 || \ |
1042 | (FOOTBRIDGE && !DEBUG_DC21285_PORT) || \ | 1042 | (FOOTBRIDGE && !DEBUG_DC21285_PORT) || \ |
1043 | ARCH_GEMINI || ARCH_IOP13XX || ARCH_IOP32X || \ | 1043 | ARCH_GEMINI || ARCH_IOP13XX || ARCH_IOP32X || \ |
1044 | ARCH_IOP33X || ARCH_IXP4XX || ARCH_KIRKWOOD || \ | 1044 | ARCH_IOP33X || ARCH_IXP4XX || \ |
1045 | ARCH_LPC32XX || ARCH_MV78XX0 || ARCH_ORION5X || ARCH_RPC | 1045 | ARCH_LPC32XX || ARCH_MV78XX0 || ARCH_ORION5X || ARCH_RPC |
1046 | 1046 | ||
1047 | config DEBUG_UART_PHYS | 1047 | config DEBUG_UART_PHYS |
@@ -1098,7 +1098,7 @@ config DEBUG_UART_PHYS | |||
1098 | default 0xe0000000 if ARCH_SPEAR13XX | 1098 | default 0xe0000000 if ARCH_SPEAR13XX |
1099 | default 0xf0000be0 if ARCH_EBSA110 | 1099 | default 0xf0000be0 if ARCH_EBSA110 |
1100 | default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE | 1100 | default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE |
1101 | default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ | 1101 | default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \ |
1102 | ARCH_ORION5X | 1102 | ARCH_ORION5X |
1103 | default 0xf7fc9000 if DEBUG_BERLIN_UART | 1103 | default 0xf7fc9000 if DEBUG_BERLIN_UART |
1104 | default 0xf8b00000 if DEBUG_HI3716_UART | 1104 | default 0xf8b00000 if DEBUG_HI3716_UART |
@@ -1164,7 +1164,6 @@ config DEBUG_UART_VIRT | |||
1164 | default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 | 1164 | default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 |
1165 | default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 | 1165 | default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 |
1166 | default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 | 1166 | default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 |
1167 | default 0xfed12000 if ARCH_KIRKWOOD | ||
1168 | default 0xfed60000 if DEBUG_RK29_UART0 | 1167 | default 0xfed60000 if DEBUG_RK29_UART0 |
1169 | default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 | 1168 | default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 |
1170 | default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 | 1169 | default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6721fab13734..433a6f1b218f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -163,7 +163,6 @@ machine-$(CONFIG_ARCH_IOP32X) += iop32x | |||
163 | machine-$(CONFIG_ARCH_IOP33X) += iop33x | 163 | machine-$(CONFIG_ARCH_IOP33X) += iop33x |
164 | machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx | 164 | machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx |
165 | machine-$(CONFIG_ARCH_KEYSTONE) += keystone | 165 | machine-$(CONFIG_ARCH_KEYSTONE) += keystone |
166 | machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood | ||
167 | machine-$(CONFIG_ARCH_KS8695) += ks8695 | 166 | machine-$(CONFIG_ARCH_KS8695) += ks8695 |
168 | machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx | 167 | machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx |
169 | machine-$(CONFIG_ARCH_MMP) += mmp | 168 | machine-$(CONFIG_ARCH_MMP) += mmp |
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index eb280d3483eb..67c59dc2d23a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -90,8 +90,7 @@ dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ | |||
90 | dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \ | 90 | dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \ |
91 | k2l-evm.dtb \ | 91 | k2l-evm.dtb \ |
92 | k2e-evm.dtb | 92 | k2e-evm.dtb |
93 | kirkwood := \ | 93 | dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ |
94 | kirkwood-b3.dtb \ | ||
95 | kirkwood-cloudbox.dtb \ | 94 | kirkwood-cloudbox.dtb \ |
96 | kirkwood-db-88f6281.dtb \ | 95 | kirkwood-db-88f6281.dtb \ |
97 | kirkwood-db-88f6282.dtb \ | 96 | kirkwood-db-88f6282.dtb \ |
@@ -150,8 +149,6 @@ kirkwood := \ | |||
150 | kirkwood-ts219-6282.dtb \ | 149 | kirkwood-ts219-6282.dtb \ |
151 | kirkwood-ts419-6281.dtb \ | 150 | kirkwood-ts419-6281.dtb \ |
152 | kirkwood-ts419-6282.dtb | 151 | kirkwood-ts419-6282.dtb |
153 | dtb-$(CONFIG_ARCH_KIRKWOOD) += $(kirkwood) | ||
154 | dtb-$(CONFIG_MACH_KIRKWOOD) += $(kirkwood) | ||
155 | dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb | 152 | dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb |
156 | dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb | 153 | dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb |
157 | dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb | 154 | dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb |
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig deleted file mode 100644 index df4b26340ae4..000000000000 --- a/arch/arm/mach-kirkwood/Kconfig +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | if ARCH_KIRKWOOD | ||
2 | |||
3 | menu "Marvell Kirkwood Implementations" | ||
4 | |||
5 | config KIRKWOOD_LEGACY | ||
6 | bool | ||
7 | |||
8 | config MACH_D2NET_V2 | ||
9 | bool "LaCie d2 Network v2 NAS Board" | ||
10 | select KIRKWOOD_LEGACY | ||
11 | help | ||
12 | Say 'Y' here if you want your kernel to support the | ||
13 | LaCie d2 Network v2 NAS. | ||
14 | |||
15 | config MACH_NET2BIG_V2 | ||
16 | bool "LaCie 2Big Network v2 NAS Board" | ||
17 | select KIRKWOOD_LEGACY | ||
18 | help | ||
19 | Say 'Y' here if you want your kernel to support the | ||
20 | LaCie 2Big Network v2 NAS. | ||
21 | |||
22 | config MACH_NET5BIG_V2 | ||
23 | bool "LaCie 5Big Network v2 NAS Board" | ||
24 | select KIRKWOOD_LEGACY | ||
25 | help | ||
26 | Say 'Y' here if you want your kernel to support the | ||
27 | LaCie 5Big Network v2 NAS. | ||
28 | |||
29 | config MACH_OPENRD | ||
30 | select KIRKWOOD_LEGACY | ||
31 | bool | ||
32 | |||
33 | config MACH_OPENRD_BASE | ||
34 | bool "Marvell OpenRD Base Board" | ||
35 | select MACH_OPENRD | ||
36 | help | ||
37 | Say 'Y' here if you want your kernel to support the | ||
38 | Marvell OpenRD Base Board. | ||
39 | |||
40 | config MACH_OPENRD_CLIENT | ||
41 | bool "Marvell OpenRD Client Board" | ||
42 | select MACH_OPENRD | ||
43 | help | ||
44 | Say 'Y' here if you want your kernel to support the | ||
45 | Marvell OpenRD Client Board. | ||
46 | |||
47 | config MACH_OPENRD_ULTIMATE | ||
48 | bool "Marvell OpenRD Ultimate Board" | ||
49 | select MACH_OPENRD | ||
50 | help | ||
51 | Say 'Y' here if you want your kernel to support the | ||
52 | Marvell OpenRD Ultimate Board. | ||
53 | |||
54 | config MACH_RD88F6192_NAS | ||
55 | bool "Marvell RD-88F6192-NAS Reference Board" | ||
56 | select KIRKWOOD_LEGACY | ||
57 | help | ||
58 | Say 'Y' here if you want your kernel to support the | ||
59 | Marvell RD-88F6192-NAS Reference Board. | ||
60 | |||
61 | config MACH_RD88F6281 | ||
62 | bool "Marvell RD-88F6281 Reference Board" | ||
63 | select KIRKWOOD_LEGACY | ||
64 | help | ||
65 | Say 'Y' here if you want your kernel to support the | ||
66 | Marvell RD-88F6281 Reference Board. | ||
67 | |||
68 | config MACH_T5325 | ||
69 | bool "HP t5325 Thin Client" | ||
70 | select KIRKWOOD_LEGACY | ||
71 | help | ||
72 | Say 'Y' here if you want your kernel to support the | ||
73 | HP t5325 Thin Client. | ||
74 | |||
75 | config MACH_TS219 | ||
76 | bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" | ||
77 | select KIRKWOOD_LEGACY | ||
78 | help | ||
79 | Say 'Y' here if you want your kernel to support the | ||
80 | QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and | ||
81 | TS-219P+ Turbo NAS devices. | ||
82 | |||
83 | config MACH_TS41X | ||
84 | bool "QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo NAS" | ||
85 | select KIRKWOOD_LEGACY | ||
86 | help | ||
87 | Say 'Y' here if you want your kernel to support the | ||
88 | QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo | ||
89 | NAS devices. | ||
90 | |||
91 | comment "Device tree entries" | ||
92 | |||
93 | config ARCH_KIRKWOOD_DT | ||
94 | bool "Marvell Kirkwood Flattened Device Tree" | ||
95 | select KIRKWOOD_CLK | ||
96 | select OF_IRQ | ||
97 | select ORION_IRQCHIP | ||
98 | select ORION_TIMER | ||
99 | select POWER_SUPPLY | ||
100 | select POWER_RESET | ||
101 | select POWER_RESET_GPIO | ||
102 | select REGULATOR | ||
103 | select REGULATOR_FIXED_VOLTAGE | ||
104 | select USE_OF | ||
105 | help | ||
106 | Say 'Y' here if you want your kernel to support the | ||
107 | Marvell Kirkwood using flattened device tree. | ||
108 | |||
109 | endmenu | ||
110 | |||
111 | endif | ||
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile deleted file mode 100644 index 3a72c5c6e747..000000000000 --- a/arch/arm/mach-kirkwood/Makefile +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | obj-$(CONFIG_KIRKWOOD_LEGACY) += irq.o mpp.o common.o pcie.o | ||
2 | obj-$(CONFIG_PM) += pm.o | ||
3 | |||
4 | obj-$(CONFIG_MACH_D2NET_V2) += d2net_v2-setup.o lacie_v2-common.o | ||
5 | obj-$(CONFIG_MACH_NET2BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o | ||
6 | obj-$(CONFIG_MACH_NET5BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o | ||
7 | obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o | ||
8 | obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o | ||
9 | obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o | ||
10 | obj-$(CONFIG_MACH_T5325) += t5325-setup.o | ||
11 | obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o | ||
12 | obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o | ||
13 | |||
14 | obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o | ||
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot deleted file mode 100644 index 760a0efe7580..000000000000 --- a/arch/arm/mach-kirkwood/Makefile.boot +++ /dev/null | |||
@@ -1,3 +0,0 @@ | |||
1 | zreladdr-y += 0x00008000 | ||
2 | params_phys-y := 0x00000100 | ||
3 | initrd_phys-y := 0x00800000 | ||
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c deleted file mode 100644 index ff18ff20f71f..000000000000 --- a/arch/arm/mach-kirkwood/board-dt.c +++ /dev/null | |||
@@ -1,223 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net> | ||
3 | * | ||
4 | * arch/arm/mach-kirkwood/board-dt.c | ||
5 | * | ||
6 | * Flattened Device Tree board initialization | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/clk.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/of.h> | ||
17 | #include <linux/of_address.h> | ||
18 | #include <linux/of_net.h> | ||
19 | #include <linux/of_platform.h> | ||
20 | #include <linux/dma-mapping.h> | ||
21 | #include <linux/irqchip.h> | ||
22 | #include <asm/hardware/cache-feroceon-l2.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | #include <asm/mach/map.h> | ||
25 | #include <mach/bridge-regs.h> | ||
26 | #include <plat/common.h> | ||
27 | #include <plat/pcie.h> | ||
28 | #include "pm.h" | ||
29 | |||
30 | static struct map_desc kirkwood_io_desc[] __initdata = { | ||
31 | { | ||
32 | .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE, | ||
33 | .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), | ||
34 | .length = KIRKWOOD_REGS_SIZE, | ||
35 | .type = MT_DEVICE, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | static void __init kirkwood_map_io(void) | ||
40 | { | ||
41 | iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); | ||
42 | } | ||
43 | |||
44 | static struct resource kirkwood_cpufreq_resources[] = { | ||
45 | [0] = { | ||
46 | .start = CPU_CONTROL_PHYS, | ||
47 | .end = CPU_CONTROL_PHYS + 3, | ||
48 | .flags = IORESOURCE_MEM, | ||
49 | }, | ||
50 | }; | ||
51 | |||
52 | static struct platform_device kirkwood_cpufreq_device = { | ||
53 | .name = "kirkwood-cpufreq", | ||
54 | .id = -1, | ||
55 | .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources), | ||
56 | .resource = kirkwood_cpufreq_resources, | ||
57 | }; | ||
58 | |||
59 | static void __init kirkwood_cpufreq_init(void) | ||
60 | { | ||
61 | platform_device_register(&kirkwood_cpufreq_device); | ||
62 | } | ||
63 | |||
64 | static struct resource kirkwood_cpuidle_resource[] = { | ||
65 | { | ||
66 | .flags = IORESOURCE_MEM, | ||
67 | .start = DDR_OPERATION_BASE, | ||
68 | .end = DDR_OPERATION_BASE + 3, | ||
69 | }, | ||
70 | }; | ||
71 | |||
72 | static struct platform_device kirkwood_cpuidle = { | ||
73 | .name = "kirkwood_cpuidle", | ||
74 | .id = -1, | ||
75 | .resource = kirkwood_cpuidle_resource, | ||
76 | .num_resources = 1, | ||
77 | }; | ||
78 | |||
79 | static void __init kirkwood_cpuidle_init(void) | ||
80 | { | ||
81 | platform_device_register(&kirkwood_cpuidle); | ||
82 | } | ||
83 | |||
84 | /* Temporary here since mach-mvebu has a function we can use */ | ||
85 | static void kirkwood_restart(enum reboot_mode mode, const char *cmd) | ||
86 | { | ||
87 | /* | ||
88 | * Enable soft reset to assert RSTOUTn. | ||
89 | */ | ||
90 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
91 | |||
92 | /* | ||
93 | * Assert soft reset. | ||
94 | */ | ||
95 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
96 | |||
97 | while (1) | ||
98 | ; | ||
99 | } | ||
100 | |||
101 | #define MV643XX_ETH_MAC_ADDR_LOW 0x0414 | ||
102 | #define MV643XX_ETH_MAC_ADDR_HIGH 0x0418 | ||
103 | |||
104 | static void __init kirkwood_dt_eth_fixup(void) | ||
105 | { | ||
106 | struct device_node *np; | ||
107 | |||
108 | /* | ||
109 | * The ethernet interfaces forget the MAC address assigned by u-boot | ||
110 | * if the clocks are turned off. Usually, u-boot on kirkwood boards | ||
111 | * has no DT support to properly set local-mac-address property. | ||
112 | * As a workaround, we get the MAC address from mv643xx_eth registers | ||
113 | * and update the port device node if no valid MAC address is set. | ||
114 | */ | ||
115 | for_each_compatible_node(np, NULL, "marvell,kirkwood-eth-port") { | ||
116 | struct device_node *pnp = of_get_parent(np); | ||
117 | struct clk *clk; | ||
118 | struct property *pmac; | ||
119 | void __iomem *io; | ||
120 | u8 *macaddr; | ||
121 | u32 reg; | ||
122 | |||
123 | if (!pnp) | ||
124 | continue; | ||
125 | |||
126 | /* skip disabled nodes or nodes with valid MAC address*/ | ||
127 | if (!of_device_is_available(pnp) || of_get_mac_address(np)) | ||
128 | goto eth_fixup_skip; | ||
129 | |||
130 | clk = of_clk_get(pnp, 0); | ||
131 | if (IS_ERR(clk)) | ||
132 | goto eth_fixup_skip; | ||
133 | |||
134 | io = of_iomap(pnp, 0); | ||
135 | if (!io) | ||
136 | goto eth_fixup_no_map; | ||
137 | |||
138 | /* ensure port clock is not gated to not hang CPU */ | ||
139 | clk_prepare_enable(clk); | ||
140 | |||
141 | /* store MAC address register contents in local-mac-address */ | ||
142 | pr_err(FW_INFO "%s: local-mac-address is not set\n", | ||
143 | np->full_name); | ||
144 | |||
145 | pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL); | ||
146 | if (!pmac) | ||
147 | goto eth_fixup_no_mem; | ||
148 | |||
149 | pmac->value = pmac + 1; | ||
150 | pmac->length = 6; | ||
151 | pmac->name = kstrdup("local-mac-address", GFP_KERNEL); | ||
152 | if (!pmac->name) { | ||
153 | kfree(pmac); | ||
154 | goto eth_fixup_no_mem; | ||
155 | } | ||
156 | |||
157 | macaddr = pmac->value; | ||
158 | reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH); | ||
159 | macaddr[0] = (reg >> 24) & 0xff; | ||
160 | macaddr[1] = (reg >> 16) & 0xff; | ||
161 | macaddr[2] = (reg >> 8) & 0xff; | ||
162 | macaddr[3] = reg & 0xff; | ||
163 | |||
164 | reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW); | ||
165 | macaddr[4] = (reg >> 8) & 0xff; | ||
166 | macaddr[5] = reg & 0xff; | ||
167 | |||
168 | of_update_property(np, pmac); | ||
169 | |||
170 | eth_fixup_no_mem: | ||
171 | iounmap(io); | ||
172 | clk_disable_unprepare(clk); | ||
173 | eth_fixup_no_map: | ||
174 | clk_put(clk); | ||
175 | eth_fixup_skip: | ||
176 | of_node_put(pnp); | ||
177 | } | ||
178 | } | ||
179 | |||
180 | /* | ||
181 | * Disable propagation of mbus errors to the CPU local bus, as this | ||
182 | * causes mbus errors (which can occur for example for PCI aborts) to | ||
183 | * throw CPU aborts, which we're not set up to deal with. | ||
184 | */ | ||
185 | static void __init kirkwood_disable_mbus_error_propagation(void) | ||
186 | { | ||
187 | void __iomem *cpu_config; | ||
188 | |||
189 | cpu_config = ioremap(CPU_CONFIG_PHYS, 4); | ||
190 | writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config); | ||
191 | iounmap(cpu_config); | ||
192 | } | ||
193 | |||
194 | static void __init kirkwood_dt_init(void) | ||
195 | { | ||
196 | kirkwood_disable_mbus_error_propagation(); | ||
197 | |||
198 | BUG_ON(mvebu_mbus_dt_init(false)); | ||
199 | |||
200 | #ifdef CONFIG_CACHE_FEROCEON_L2 | ||
201 | feroceon_of_init(); | ||
202 | #endif | ||
203 | kirkwood_cpufreq_init(); | ||
204 | kirkwood_cpuidle_init(); | ||
205 | |||
206 | kirkwood_pm_init(); | ||
207 | kirkwood_dt_eth_fixup(); | ||
208 | |||
209 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); | ||
210 | } | ||
211 | |||
212 | static const char * const kirkwood_dt_board_compat[] = { | ||
213 | "marvell,kirkwood", | ||
214 | NULL | ||
215 | }; | ||
216 | |||
217 | DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)") | ||
218 | /* Maintainer: Jason Cooper <jason@lakedaemon.net> */ | ||
219 | .map_io = kirkwood_map_io, | ||
220 | .init_machine = kirkwood_dt_init, | ||
221 | .restart = kirkwood_restart, | ||
222 | .dt_compat = kirkwood_dt_board_compat, | ||
223 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c deleted file mode 100644 index 255f33a3903c..000000000000 --- a/arch/arm/mach-kirkwood/common.c +++ /dev/null | |||
@@ -1,746 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/common.c | ||
3 | * | ||
4 | * Core functions for Marvell Kirkwood SoCs | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/serial_8250.h> | ||
15 | #include <linux/ata_platform.h> | ||
16 | #include <linux/mtd/nand.h> | ||
17 | #include <linux/dma-mapping.h> | ||
18 | #include <linux/clk-provider.h> | ||
19 | #include <linux/spinlock.h> | ||
20 | #include <linux/mv643xx_i2c.h> | ||
21 | #include <linux/timex.h> | ||
22 | #include <linux/kexec.h> | ||
23 | #include <linux/reboot.h> | ||
24 | #include <net/dsa.h> | ||
25 | #include <asm/page.h> | ||
26 | #include <asm/mach/map.h> | ||
27 | #include <asm/mach/time.h> | ||
28 | #include <asm/hardware/cache-feroceon-l2.h> | ||
29 | #include <mach/kirkwood.h> | ||
30 | #include <mach/bridge-regs.h> | ||
31 | #include <linux/platform_data/asoc-kirkwood.h> | ||
32 | #include <linux/platform_data/mmc-mvsdio.h> | ||
33 | #include <linux/platform_data/mtd-orion_nand.h> | ||
34 | #include <linux/platform_data/usb-ehci-orion.h> | ||
35 | #include <plat/common.h> | ||
36 | #include <plat/time.h> | ||
37 | #include <linux/platform_data/dma-mv_xor.h> | ||
38 | #include "common.h" | ||
39 | #include "pm.h" | ||
40 | |||
41 | /* These can go away once Kirkwood uses the mvebu-mbus DT binding */ | ||
42 | #define KIRKWOOD_MBUS_NAND_TARGET 0x01 | ||
43 | #define KIRKWOOD_MBUS_NAND_ATTR 0x2f | ||
44 | #define KIRKWOOD_MBUS_SRAM_TARGET 0x03 | ||
45 | #define KIRKWOOD_MBUS_SRAM_ATTR 0x01 | ||
46 | |||
47 | /***************************************************************************** | ||
48 | * I/O Address Mapping | ||
49 | ****************************************************************************/ | ||
50 | static struct map_desc kirkwood_io_desc[] __initdata = { | ||
51 | { | ||
52 | .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE, | ||
53 | .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), | ||
54 | .length = KIRKWOOD_REGS_SIZE, | ||
55 | .type = MT_DEVICE, | ||
56 | }, | ||
57 | }; | ||
58 | |||
59 | void __init kirkwood_map_io(void) | ||
60 | { | ||
61 | iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); | ||
62 | } | ||
63 | |||
64 | /***************************************************************************** | ||
65 | * CLK tree | ||
66 | ****************************************************************************/ | ||
67 | |||
68 | static void enable_sata0(void) | ||
69 | { | ||
70 | /* Enable PLL and IVREF */ | ||
71 | writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2); | ||
72 | /* Enable PHY */ | ||
73 | writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL); | ||
74 | } | ||
75 | |||
76 | static void disable_sata0(void) | ||
77 | { | ||
78 | /* Disable PLL and IVREF */ | ||
79 | writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2); | ||
80 | /* Disable PHY */ | ||
81 | writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); | ||
82 | } | ||
83 | |||
84 | static void enable_sata1(void) | ||
85 | { | ||
86 | /* Enable PLL and IVREF */ | ||
87 | writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2); | ||
88 | /* Enable PHY */ | ||
89 | writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL); | ||
90 | } | ||
91 | |||
92 | static void disable_sata1(void) | ||
93 | { | ||
94 | /* Disable PLL and IVREF */ | ||
95 | writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2); | ||
96 | /* Disable PHY */ | ||
97 | writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL); | ||
98 | } | ||
99 | |||
100 | static void disable_pcie0(void) | ||
101 | { | ||
102 | writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL); | ||
103 | while (1) | ||
104 | if (readl(PCIE_STATUS) & 0x1) | ||
105 | break; | ||
106 | writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL); | ||
107 | } | ||
108 | |||
109 | static void disable_pcie1(void) | ||
110 | { | ||
111 | u32 dev, rev; | ||
112 | |||
113 | kirkwood_pcie_id(&dev, &rev); | ||
114 | |||
115 | if (dev == MV88F6282_DEV_ID) { | ||
116 | writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL); | ||
117 | while (1) | ||
118 | if (readl(PCIE1_STATUS) & 0x1) | ||
119 | break; | ||
120 | writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL); | ||
121 | } | ||
122 | } | ||
123 | |||
124 | /* An extended version of the gated clk. This calls fn_en()/fn_dis | ||
125 | * before enabling/disabling the clock. We use this to turn on/off | ||
126 | * PHYs etc. */ | ||
127 | struct clk_gate_fn { | ||
128 | struct clk_gate gate; | ||
129 | void (*fn_en)(void); | ||
130 | void (*fn_dis)(void); | ||
131 | }; | ||
132 | |||
133 | #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate) | ||
134 | #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) | ||
135 | |||
136 | static int clk_gate_fn_enable(struct clk_hw *hw) | ||
137 | { | ||
138 | struct clk_gate *gate = to_clk_gate(hw); | ||
139 | struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); | ||
140 | int ret; | ||
141 | |||
142 | ret = clk_gate_ops.enable(hw); | ||
143 | if (!ret && gate_fn->fn_en) | ||
144 | gate_fn->fn_en(); | ||
145 | |||
146 | return ret; | ||
147 | } | ||
148 | |||
149 | static void clk_gate_fn_disable(struct clk_hw *hw) | ||
150 | { | ||
151 | struct clk_gate *gate = to_clk_gate(hw); | ||
152 | struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); | ||
153 | |||
154 | if (gate_fn->fn_dis) | ||
155 | gate_fn->fn_dis(); | ||
156 | |||
157 | clk_gate_ops.disable(hw); | ||
158 | } | ||
159 | |||
160 | static struct clk_ops clk_gate_fn_ops; | ||
161 | |||
162 | static struct clk __init *clk_register_gate_fn(struct device *dev, | ||
163 | const char *name, | ||
164 | const char *parent_name, unsigned long flags, | ||
165 | void __iomem *reg, u8 bit_idx, | ||
166 | u8 clk_gate_flags, spinlock_t *lock, | ||
167 | void (*fn_en)(void), void (*fn_dis)(void)) | ||
168 | { | ||
169 | struct clk_gate_fn *gate_fn; | ||
170 | struct clk *clk; | ||
171 | struct clk_init_data init; | ||
172 | |||
173 | gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL); | ||
174 | if (!gate_fn) { | ||
175 | pr_err("%s: could not allocate gated clk\n", __func__); | ||
176 | return ERR_PTR(-ENOMEM); | ||
177 | } | ||
178 | |||
179 | init.name = name; | ||
180 | init.ops = &clk_gate_fn_ops; | ||
181 | init.flags = flags; | ||
182 | init.parent_names = (parent_name ? &parent_name : NULL); | ||
183 | init.num_parents = (parent_name ? 1 : 0); | ||
184 | |||
185 | /* struct clk_gate assignments */ | ||
186 | gate_fn->gate.reg = reg; | ||
187 | gate_fn->gate.bit_idx = bit_idx; | ||
188 | gate_fn->gate.flags = clk_gate_flags; | ||
189 | gate_fn->gate.lock = lock; | ||
190 | gate_fn->gate.hw.init = &init; | ||
191 | gate_fn->fn_en = fn_en; | ||
192 | gate_fn->fn_dis = fn_dis; | ||
193 | |||
194 | /* ops is the gate ops, but with our enable/disable functions */ | ||
195 | if (clk_gate_fn_ops.enable != clk_gate_fn_enable || | ||
196 | clk_gate_fn_ops.disable != clk_gate_fn_disable) { | ||
197 | clk_gate_fn_ops = clk_gate_ops; | ||
198 | clk_gate_fn_ops.enable = clk_gate_fn_enable; | ||
199 | clk_gate_fn_ops.disable = clk_gate_fn_disable; | ||
200 | } | ||
201 | |||
202 | clk = clk_register(dev, &gate_fn->gate.hw); | ||
203 | |||
204 | if (IS_ERR(clk)) | ||
205 | kfree(gate_fn); | ||
206 | |||
207 | return clk; | ||
208 | } | ||
209 | |||
210 | static DEFINE_SPINLOCK(gating_lock); | ||
211 | static struct clk *tclk; | ||
212 | |||
213 | static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) | ||
214 | { | ||
215 | return clk_register_gate(NULL, name, "tclk", 0, CLOCK_GATING_CTRL, | ||
216 | bit_idx, 0, &gating_lock); | ||
217 | } | ||
218 | |||
219 | static struct clk __init *kirkwood_register_gate_fn(const char *name, | ||
220 | u8 bit_idx, | ||
221 | void (*fn_en)(void), | ||
222 | void (*fn_dis)(void)) | ||
223 | { | ||
224 | return clk_register_gate_fn(NULL, name, "tclk", 0, CLOCK_GATING_CTRL, | ||
225 | bit_idx, 0, &gating_lock, fn_en, fn_dis); | ||
226 | } | ||
227 | |||
228 | static struct clk *ge0, *ge1; | ||
229 | |||
230 | void __init kirkwood_clk_init(void) | ||
231 | { | ||
232 | struct clk *runit, *sata0, *sata1, *usb0, *sdio; | ||
233 | struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio; | ||
234 | |||
235 | tclk = clk_register_fixed_rate(NULL, "tclk", NULL, | ||
236 | CLK_IS_ROOT, kirkwood_tclk); | ||
237 | |||
238 | runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT); | ||
239 | ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); | ||
240 | ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); | ||
241 | sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0, | ||
242 | enable_sata0, disable_sata0); | ||
243 | sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1, | ||
244 | enable_sata1, disable_sata1); | ||
245 | usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); | ||
246 | sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); | ||
247 | crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); | ||
248 | xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0); | ||
249 | xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1); | ||
250 | pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0, | ||
251 | NULL, disable_pcie0); | ||
252 | pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1, | ||
253 | NULL, disable_pcie1); | ||
254 | audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO); | ||
255 | kirkwood_register_gate("tdm", CGC_BIT_TDM); | ||
256 | kirkwood_register_gate("tsu", CGC_BIT_TSU); | ||
257 | |||
258 | /* clkdev entries, mapping clks to devices */ | ||
259 | orion_clkdev_add(NULL, "orion_spi.0", runit); | ||
260 | orion_clkdev_add(NULL, "orion_spi.1", runit); | ||
261 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0); | ||
262 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1); | ||
263 | orion_clkdev_add(NULL, "orion_wdt", tclk); | ||
264 | orion_clkdev_add("0", "sata_mv.0", sata0); | ||
265 | orion_clkdev_add("1", "sata_mv.0", sata1); | ||
266 | orion_clkdev_add(NULL, "orion-ehci.0", usb0); | ||
267 | orion_clkdev_add(NULL, "orion_nand", runit); | ||
268 | orion_clkdev_add(NULL, "mvsdio", sdio); | ||
269 | orion_clkdev_add(NULL, "mv_crypto", crypto); | ||
270 | orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0); | ||
271 | orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1); | ||
272 | orion_clkdev_add("0", "pcie", pex0); | ||
273 | orion_clkdev_add("1", "pcie", pex1); | ||
274 | orion_clkdev_add(NULL, "mvebu-audio", audio); | ||
275 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit); | ||
276 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".1", runit); | ||
277 | |||
278 | /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., | ||
279 | * so should never be gated. | ||
280 | */ | ||
281 | clk_prepare_enable(runit); | ||
282 | } | ||
283 | |||
284 | /***************************************************************************** | ||
285 | * EHCI0 | ||
286 | ****************************************************************************/ | ||
287 | void __init kirkwood_ehci_init(void) | ||
288 | { | ||
289 | orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA); | ||
290 | } | ||
291 | |||
292 | |||
293 | /***************************************************************************** | ||
294 | * GE00 | ||
295 | ****************************************************************************/ | ||
296 | void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) | ||
297 | { | ||
298 | orion_ge00_init(eth_data, | ||
299 | GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, | ||
300 | IRQ_KIRKWOOD_GE00_ERR, 1600); | ||
301 | /* The interface forgets the MAC address assigned by u-boot if | ||
302 | the clock is turned off, so claim the clk now. */ | ||
303 | clk_prepare_enable(ge0); | ||
304 | } | ||
305 | |||
306 | |||
307 | /***************************************************************************** | ||
308 | * GE01 | ||
309 | ****************************************************************************/ | ||
310 | void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) | ||
311 | { | ||
312 | orion_ge01_init(eth_data, | ||
313 | GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, | ||
314 | IRQ_KIRKWOOD_GE01_ERR, 1600); | ||
315 | clk_prepare_enable(ge1); | ||
316 | } | ||
317 | |||
318 | |||
319 | /***************************************************************************** | ||
320 | * Ethernet switch | ||
321 | ****************************************************************************/ | ||
322 | void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq) | ||
323 | { | ||
324 | orion_ge00_switch_init(d, irq); | ||
325 | } | ||
326 | |||
327 | |||
328 | /***************************************************************************** | ||
329 | * NAND flash | ||
330 | ****************************************************************************/ | ||
331 | static struct resource kirkwood_nand_resource = { | ||
332 | .flags = IORESOURCE_MEM, | ||
333 | .start = KIRKWOOD_NAND_MEM_PHYS_BASE, | ||
334 | .end = KIRKWOOD_NAND_MEM_PHYS_BASE + | ||
335 | KIRKWOOD_NAND_MEM_SIZE - 1, | ||
336 | }; | ||
337 | |||
338 | static struct orion_nand_data kirkwood_nand_data = { | ||
339 | .cle = 0, | ||
340 | .ale = 1, | ||
341 | .width = 8, | ||
342 | }; | ||
343 | |||
344 | static struct platform_device kirkwood_nand_flash = { | ||
345 | .name = "orion_nand", | ||
346 | .id = -1, | ||
347 | .dev = { | ||
348 | .platform_data = &kirkwood_nand_data, | ||
349 | }, | ||
350 | .resource = &kirkwood_nand_resource, | ||
351 | .num_resources = 1, | ||
352 | }; | ||
353 | |||
354 | void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, | ||
355 | int chip_delay) | ||
356 | { | ||
357 | kirkwood_nand_data.parts = parts; | ||
358 | kirkwood_nand_data.nr_parts = nr_parts; | ||
359 | kirkwood_nand_data.chip_delay = chip_delay; | ||
360 | platform_device_register(&kirkwood_nand_flash); | ||
361 | } | ||
362 | |||
363 | void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, | ||
364 | int (*dev_ready)(struct mtd_info *)) | ||
365 | { | ||
366 | kirkwood_nand_data.parts = parts; | ||
367 | kirkwood_nand_data.nr_parts = nr_parts; | ||
368 | kirkwood_nand_data.dev_ready = dev_ready; | ||
369 | platform_device_register(&kirkwood_nand_flash); | ||
370 | } | ||
371 | |||
372 | /***************************************************************************** | ||
373 | * SoC RTC | ||
374 | ****************************************************************************/ | ||
375 | static void __init kirkwood_rtc_init(void) | ||
376 | { | ||
377 | orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC); | ||
378 | } | ||
379 | |||
380 | |||
381 | /***************************************************************************** | ||
382 | * SATA | ||
383 | ****************************************************************************/ | ||
384 | void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) | ||
385 | { | ||
386 | orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); | ||
387 | } | ||
388 | |||
389 | |||
390 | /***************************************************************************** | ||
391 | * SD/SDIO/MMC | ||
392 | ****************************************************************************/ | ||
393 | static struct resource mvsdio_resources[] = { | ||
394 | [0] = { | ||
395 | .start = SDIO_PHYS_BASE, | ||
396 | .end = SDIO_PHYS_BASE + SZ_1K - 1, | ||
397 | .flags = IORESOURCE_MEM, | ||
398 | }, | ||
399 | [1] = { | ||
400 | .start = IRQ_KIRKWOOD_SDIO, | ||
401 | .end = IRQ_KIRKWOOD_SDIO, | ||
402 | .flags = IORESOURCE_IRQ, | ||
403 | }, | ||
404 | }; | ||
405 | |||
406 | static u64 mvsdio_dmamask = DMA_BIT_MASK(32); | ||
407 | |||
408 | static struct platform_device kirkwood_sdio = { | ||
409 | .name = "mvsdio", | ||
410 | .id = -1, | ||
411 | .dev = { | ||
412 | .dma_mask = &mvsdio_dmamask, | ||
413 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
414 | }, | ||
415 | .num_resources = ARRAY_SIZE(mvsdio_resources), | ||
416 | .resource = mvsdio_resources, | ||
417 | }; | ||
418 | |||
419 | void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) | ||
420 | { | ||
421 | u32 dev, rev; | ||
422 | |||
423 | kirkwood_pcie_id(&dev, &rev); | ||
424 | if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */ | ||
425 | mvsdio_data->clock = 100000000; | ||
426 | else | ||
427 | mvsdio_data->clock = 200000000; | ||
428 | kirkwood_sdio.dev.platform_data = mvsdio_data; | ||
429 | platform_device_register(&kirkwood_sdio); | ||
430 | } | ||
431 | |||
432 | |||
433 | /***************************************************************************** | ||
434 | * SPI | ||
435 | ****************************************************************************/ | ||
436 | void __init kirkwood_spi_init(void) | ||
437 | { | ||
438 | orion_spi_init(SPI_PHYS_BASE); | ||
439 | } | ||
440 | |||
441 | |||
442 | /***************************************************************************** | ||
443 | * I2C | ||
444 | ****************************************************************************/ | ||
445 | void __init kirkwood_i2c_init(void) | ||
446 | { | ||
447 | orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8); | ||
448 | } | ||
449 | |||
450 | |||
451 | /***************************************************************************** | ||
452 | * UART0 | ||
453 | ****************************************************************************/ | ||
454 | |||
455 | void __init kirkwood_uart0_init(void) | ||
456 | { | ||
457 | orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE, | ||
458 | IRQ_KIRKWOOD_UART_0, tclk); | ||
459 | } | ||
460 | |||
461 | |||
462 | /***************************************************************************** | ||
463 | * UART1 | ||
464 | ****************************************************************************/ | ||
465 | void __init kirkwood_uart1_init(void) | ||
466 | { | ||
467 | orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE, | ||
468 | IRQ_KIRKWOOD_UART_1, tclk); | ||
469 | } | ||
470 | |||
471 | /***************************************************************************** | ||
472 | * Cryptographic Engines and Security Accelerator (CESA) | ||
473 | ****************************************************************************/ | ||
474 | void __init kirkwood_crypto_init(void) | ||
475 | { | ||
476 | orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE, | ||
477 | KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO); | ||
478 | } | ||
479 | |||
480 | |||
481 | /***************************************************************************** | ||
482 | * XOR0 | ||
483 | ****************************************************************************/ | ||
484 | void __init kirkwood_xor0_init(void) | ||
485 | { | ||
486 | orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, | ||
487 | IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); | ||
488 | } | ||
489 | |||
490 | |||
491 | /***************************************************************************** | ||
492 | * XOR1 | ||
493 | ****************************************************************************/ | ||
494 | void __init kirkwood_xor1_init(void) | ||
495 | { | ||
496 | orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE, | ||
497 | IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11); | ||
498 | } | ||
499 | |||
500 | |||
501 | /***************************************************************************** | ||
502 | * Watchdog | ||
503 | ****************************************************************************/ | ||
504 | void __init kirkwood_wdt_init(void) | ||
505 | { | ||
506 | orion_wdt_init(); | ||
507 | } | ||
508 | |||
509 | /***************************************************************************** | ||
510 | * CPU idle | ||
511 | ****************************************************************************/ | ||
512 | static struct resource kirkwood_cpuidle_resource[] = { | ||
513 | { | ||
514 | .flags = IORESOURCE_MEM, | ||
515 | .start = DDR_OPERATION_BASE, | ||
516 | .end = DDR_OPERATION_BASE + 3, | ||
517 | }, | ||
518 | }; | ||
519 | |||
520 | static struct platform_device kirkwood_cpuidle = { | ||
521 | .name = "kirkwood_cpuidle", | ||
522 | .id = -1, | ||
523 | .resource = kirkwood_cpuidle_resource, | ||
524 | .num_resources = 1, | ||
525 | }; | ||
526 | |||
527 | void __init kirkwood_cpuidle_init(void) | ||
528 | { | ||
529 | platform_device_register(&kirkwood_cpuidle); | ||
530 | } | ||
531 | |||
532 | /***************************************************************************** | ||
533 | * Time handling | ||
534 | ****************************************************************************/ | ||
535 | void __init kirkwood_init_early(void) | ||
536 | { | ||
537 | orion_time_set_base(TIMER_VIRT_BASE); | ||
538 | } | ||
539 | |||
540 | int kirkwood_tclk; | ||
541 | |||
542 | static int __init kirkwood_find_tclk(void) | ||
543 | { | ||
544 | u32 dev, rev; | ||
545 | |||
546 | kirkwood_pcie_id(&dev, &rev); | ||
547 | |||
548 | if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID) | ||
549 | if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0) | ||
550 | return 200000000; | ||
551 | |||
552 | return 166666667; | ||
553 | } | ||
554 | |||
555 | void __init kirkwood_timer_init(void) | ||
556 | { | ||
557 | kirkwood_tclk = kirkwood_find_tclk(); | ||
558 | |||
559 | orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, | ||
560 | IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); | ||
561 | } | ||
562 | |||
563 | /***************************************************************************** | ||
564 | * Audio | ||
565 | ****************************************************************************/ | ||
566 | static struct resource kirkwood_audio_resources[] = { | ||
567 | [0] = { | ||
568 | .start = AUDIO_PHYS_BASE, | ||
569 | .end = AUDIO_PHYS_BASE + SZ_16K - 1, | ||
570 | .flags = IORESOURCE_MEM, | ||
571 | }, | ||
572 | [1] = { | ||
573 | .start = IRQ_KIRKWOOD_I2S, | ||
574 | .end = IRQ_KIRKWOOD_I2S, | ||
575 | .flags = IORESOURCE_IRQ, | ||
576 | }, | ||
577 | }; | ||
578 | |||
579 | static struct kirkwood_asoc_platform_data kirkwood_audio_data = { | ||
580 | .burst = 128, | ||
581 | }; | ||
582 | |||
583 | static struct platform_device kirkwood_audio_device = { | ||
584 | .name = "mvebu-audio", | ||
585 | .id = -1, | ||
586 | .num_resources = ARRAY_SIZE(kirkwood_audio_resources), | ||
587 | .resource = kirkwood_audio_resources, | ||
588 | .dev = { | ||
589 | .platform_data = &kirkwood_audio_data, | ||
590 | }, | ||
591 | }; | ||
592 | |||
593 | void __init kirkwood_audio_init(void) | ||
594 | { | ||
595 | platform_device_register(&kirkwood_audio_device); | ||
596 | } | ||
597 | |||
598 | /***************************************************************************** | ||
599 | * CPU Frequency | ||
600 | ****************************************************************************/ | ||
601 | static struct resource kirkwood_cpufreq_resources[] = { | ||
602 | [0] = { | ||
603 | .start = CPU_CONTROL_PHYS, | ||
604 | .end = CPU_CONTROL_PHYS + 3, | ||
605 | .flags = IORESOURCE_MEM, | ||
606 | }, | ||
607 | }; | ||
608 | |||
609 | static struct platform_device kirkwood_cpufreq_device = { | ||
610 | .name = "kirkwood-cpufreq", | ||
611 | .id = -1, | ||
612 | .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources), | ||
613 | .resource = kirkwood_cpufreq_resources, | ||
614 | }; | ||
615 | |||
616 | void __init kirkwood_cpufreq_init(void) | ||
617 | { | ||
618 | platform_device_register(&kirkwood_cpufreq_device); | ||
619 | } | ||
620 | |||
621 | /***************************************************************************** | ||
622 | * General | ||
623 | ****************************************************************************/ | ||
624 | /* | ||
625 | * Identify device ID and revision. | ||
626 | */ | ||
627 | char * __init kirkwood_id(void) | ||
628 | { | ||
629 | u32 dev, rev; | ||
630 | |||
631 | kirkwood_pcie_id(&dev, &rev); | ||
632 | |||
633 | if (dev == MV88F6281_DEV_ID) { | ||
634 | if (rev == MV88F6281_REV_Z0) | ||
635 | return "MV88F6281-Z0"; | ||
636 | else if (rev == MV88F6281_REV_A0) | ||
637 | return "MV88F6281-A0"; | ||
638 | else if (rev == MV88F6281_REV_A1) | ||
639 | return "MV88F6281-A1"; | ||
640 | else | ||
641 | return "MV88F6281-Rev-Unsupported"; | ||
642 | } else if (dev == MV88F6192_DEV_ID) { | ||
643 | if (rev == MV88F6192_REV_Z0) | ||
644 | return "MV88F6192-Z0"; | ||
645 | else if (rev == MV88F6192_REV_A0) | ||
646 | return "MV88F6192-A0"; | ||
647 | else if (rev == MV88F6192_REV_A1) | ||
648 | return "MV88F6192-A1"; | ||
649 | else | ||
650 | return "MV88F6192-Rev-Unsupported"; | ||
651 | } else if (dev == MV88F6180_DEV_ID) { | ||
652 | if (rev == MV88F6180_REV_A0) | ||
653 | return "MV88F6180-Rev-A0"; | ||
654 | else if (rev == MV88F6180_REV_A1) | ||
655 | return "MV88F6180-Rev-A1"; | ||
656 | else | ||
657 | return "MV88F6180-Rev-Unsupported"; | ||
658 | } else if (dev == MV88F6282_DEV_ID) { | ||
659 | if (rev == MV88F6282_REV_A0) | ||
660 | return "MV88F6282-Rev-A0"; | ||
661 | else if (rev == MV88F6282_REV_A1) | ||
662 | return "MV88F6282-Rev-A1"; | ||
663 | else | ||
664 | return "MV88F6282-Rev-Unsupported"; | ||
665 | } else { | ||
666 | return "Device-Unknown"; | ||
667 | } | ||
668 | } | ||
669 | |||
670 | void __init kirkwood_setup_wins(void) | ||
671 | { | ||
672 | mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_NAND_TARGET, | ||
673 | KIRKWOOD_MBUS_NAND_ATTR, | ||
674 | KIRKWOOD_NAND_MEM_PHYS_BASE, | ||
675 | KIRKWOOD_NAND_MEM_SIZE); | ||
676 | mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_SRAM_TARGET, | ||
677 | KIRKWOOD_MBUS_SRAM_ATTR, | ||
678 | KIRKWOOD_SRAM_PHYS_BASE, | ||
679 | KIRKWOOD_SRAM_SIZE); | ||
680 | } | ||
681 | |||
682 | void __init kirkwood_l2_init(void) | ||
683 | { | ||
684 | #ifdef CONFIG_CACHE_FEROCEON_L2 | ||
685 | #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH | ||
686 | writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); | ||
687 | feroceon_l2_init(1); | ||
688 | #else | ||
689 | writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); | ||
690 | feroceon_l2_init(0); | ||
691 | #endif | ||
692 | #endif | ||
693 | } | ||
694 | |||
695 | void __init kirkwood_init(void) | ||
696 | { | ||
697 | pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk); | ||
698 | |||
699 | /* | ||
700 | * Disable propagation of mbus errors to the CPU local bus, | ||
701 | * as this causes mbus errors (which can occur for example | ||
702 | * for PCI aborts) to throw CPU aborts, which we're not set | ||
703 | * up to deal with. | ||
704 | */ | ||
705 | writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG); | ||
706 | |||
707 | BUG_ON(mvebu_mbus_init("marvell,kirkwood-mbus", | ||
708 | BRIDGE_WINS_BASE, BRIDGE_WINS_SZ, | ||
709 | DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ)); | ||
710 | |||
711 | kirkwood_setup_wins(); | ||
712 | |||
713 | kirkwood_l2_init(); | ||
714 | |||
715 | /* Setup root of clk tree */ | ||
716 | kirkwood_clk_init(); | ||
717 | |||
718 | /* internal devices that every board has */ | ||
719 | kirkwood_rtc_init(); | ||
720 | kirkwood_wdt_init(); | ||
721 | kirkwood_xor0_init(); | ||
722 | kirkwood_xor1_init(); | ||
723 | kirkwood_crypto_init(); | ||
724 | |||
725 | kirkwood_pm_init(); | ||
726 | kirkwood_cpuidle_init(); | ||
727 | #ifdef CONFIG_KEXEC | ||
728 | kexec_reinit = kirkwood_enable_pcie; | ||
729 | #endif | ||
730 | } | ||
731 | |||
732 | void kirkwood_restart(enum reboot_mode mode, const char *cmd) | ||
733 | { | ||
734 | /* | ||
735 | * Enable soft reset to assert RSTOUTn. | ||
736 | */ | ||
737 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | ||
738 | |||
739 | /* | ||
740 | * Assert soft reset. | ||
741 | */ | ||
742 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | ||
743 | |||
744 | while (1) | ||
745 | ; | ||
746 | } | ||
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h deleted file mode 100644 index 832a4e2ab8d7..000000000000 --- a/arch/arm/mach-kirkwood/common.h +++ /dev/null | |||
@@ -1,74 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/common.h | ||
3 | * | ||
4 | * Core functions for Marvell Kirkwood SoCs | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ARCH_KIRKWOOD_COMMON_H | ||
12 | #define __ARCH_KIRKWOOD_COMMON_H | ||
13 | |||
14 | #include <linux/reboot.h> | ||
15 | |||
16 | struct dsa_platform_data; | ||
17 | struct mv643xx_eth_platform_data; | ||
18 | struct mv_sata_platform_data; | ||
19 | struct mvsdio_platform_data; | ||
20 | struct mtd_partition; | ||
21 | struct mtd_info; | ||
22 | struct kirkwood_asoc_platform_data; | ||
23 | |||
24 | #define KW_PCIE0 (1 << 0) | ||
25 | #define KW_PCIE1 (1 << 1) | ||
26 | |||
27 | /* | ||
28 | * Basic Kirkwood init functions used early by machine-setup. | ||
29 | */ | ||
30 | void kirkwood_map_io(void); | ||
31 | void kirkwood_init(void); | ||
32 | void kirkwood_init_early(void); | ||
33 | void kirkwood_init_irq(void); | ||
34 | |||
35 | void kirkwood_setup_wins(void); | ||
36 | |||
37 | void kirkwood_enable_pcie(void); | ||
38 | void kirkwood_pcie_id(u32 *dev, u32 *rev); | ||
39 | |||
40 | void kirkwood_ehci_init(void); | ||
41 | void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data); | ||
42 | void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data); | ||
43 | void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq); | ||
44 | void kirkwood_pcie_init(unsigned int portmask); | ||
45 | void kirkwood_sata_init(struct mv_sata_platform_data *sata_data); | ||
46 | void kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data); | ||
47 | void kirkwood_spi_init(void); | ||
48 | void kirkwood_i2c_init(void); | ||
49 | void kirkwood_uart0_init(void); | ||
50 | void kirkwood_uart1_init(void); | ||
51 | void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); | ||
52 | void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, | ||
53 | int (*dev_ready)(struct mtd_info *)); | ||
54 | void kirkwood_audio_init(void); | ||
55 | void kirkwood_cpuidle_init(void); | ||
56 | void kirkwood_cpufreq_init(void); | ||
57 | |||
58 | void kirkwood_restart(enum reboot_mode, const char *); | ||
59 | void kirkwood_clk_init(void); | ||
60 | |||
61 | /* early init functions not converted to fdt yet */ | ||
62 | char *kirkwood_id(void); | ||
63 | void kirkwood_l2_init(void); | ||
64 | void kirkwood_wdt_init(void); | ||
65 | void kirkwood_xor0_init(void); | ||
66 | void kirkwood_xor1_init(void); | ||
67 | void kirkwood_crypto_init(void); | ||
68 | |||
69 | extern int kirkwood_tclk; | ||
70 | extern void kirkwood_timer_init(void); | ||
71 | |||
72 | #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) | ||
73 | |||
74 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c deleted file mode 100644 index 453418063c1e..000000000000 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ /dev/null | |||
@@ -1,231 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/d2net_v2-setup.c | ||
3 | * | ||
4 | * LaCie d2 Network Space v2 Board Setup | ||
5 | * | ||
6 | * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/ata_platform.h> | ||
27 | #include <linux/mv643xx_eth.h> | ||
28 | #include <linux/input.h> | ||
29 | #include <linux/gpio.h> | ||
30 | #include <linux/gpio_keys.h> | ||
31 | #include <linux/leds.h> | ||
32 | #include <asm/mach-types.h> | ||
33 | #include <asm/mach/arch.h> | ||
34 | #include <mach/kirkwood.h> | ||
35 | #include <linux/platform_data/leds-kirkwood-ns2.h> | ||
36 | #include "common.h" | ||
37 | #include "mpp.h" | ||
38 | #include "lacie_v2-common.h" | ||
39 | |||
40 | /***************************************************************************** | ||
41 | * Ethernet | ||
42 | ****************************************************************************/ | ||
43 | |||
44 | static struct mv643xx_eth_platform_data d2net_v2_ge00_data = { | ||
45 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
46 | }; | ||
47 | |||
48 | /***************************************************************************** | ||
49 | * SATA | ||
50 | ****************************************************************************/ | ||
51 | |||
52 | static struct mv_sata_platform_data d2net_v2_sata_data = { | ||
53 | .n_ports = 2, | ||
54 | }; | ||
55 | |||
56 | /***************************************************************************** | ||
57 | * GPIO keys | ||
58 | ****************************************************************************/ | ||
59 | |||
60 | #define D2NET_V2_GPIO_PUSH_BUTTON 34 | ||
61 | #define D2NET_V2_GPIO_POWER_SWITCH_ON 13 | ||
62 | #define D2NET_V2_GPIO_POWER_SWITCH_OFF 15 | ||
63 | |||
64 | #define D2NET_V2_SWITCH_POWER_ON 0x1 | ||
65 | #define D2NET_V2_SWITCH_POWER_OFF 0x2 | ||
66 | |||
67 | static struct gpio_keys_button d2net_v2_buttons[] = { | ||
68 | [0] = { | ||
69 | .type = EV_SW, | ||
70 | .code = D2NET_V2_SWITCH_POWER_ON, | ||
71 | .gpio = D2NET_V2_GPIO_POWER_SWITCH_ON, | ||
72 | .desc = "Back power switch (on|auto)", | ||
73 | .active_low = 0, | ||
74 | }, | ||
75 | [1] = { | ||
76 | .type = EV_SW, | ||
77 | .code = D2NET_V2_SWITCH_POWER_OFF, | ||
78 | .gpio = D2NET_V2_GPIO_POWER_SWITCH_OFF, | ||
79 | .desc = "Back power switch (auto|off)", | ||
80 | .active_low = 0, | ||
81 | }, | ||
82 | [2] = { | ||
83 | .code = KEY_POWER, | ||
84 | .gpio = D2NET_V2_GPIO_PUSH_BUTTON, | ||
85 | .desc = "Front Push Button", | ||
86 | .active_low = 1, | ||
87 | }, | ||
88 | }; | ||
89 | |||
90 | static struct gpio_keys_platform_data d2net_v2_button_data = { | ||
91 | .buttons = d2net_v2_buttons, | ||
92 | .nbuttons = ARRAY_SIZE(d2net_v2_buttons), | ||
93 | }; | ||
94 | |||
95 | static struct platform_device d2net_v2_gpio_buttons = { | ||
96 | .name = "gpio-keys", | ||
97 | .id = -1, | ||
98 | .dev = { | ||
99 | .platform_data = &d2net_v2_button_data, | ||
100 | }, | ||
101 | }; | ||
102 | |||
103 | /***************************************************************************** | ||
104 | * GPIO LEDs | ||
105 | ****************************************************************************/ | ||
106 | |||
107 | #define D2NET_V2_GPIO_RED_LED 12 | ||
108 | |||
109 | static struct gpio_led d2net_v2_gpio_led_pins[] = { | ||
110 | { | ||
111 | .name = "d2net_v2:red:fail", | ||
112 | .gpio = D2NET_V2_GPIO_RED_LED, | ||
113 | }, | ||
114 | }; | ||
115 | |||
116 | static struct gpio_led_platform_data d2net_v2_gpio_leds_data = { | ||
117 | .num_leds = ARRAY_SIZE(d2net_v2_gpio_led_pins), | ||
118 | .leds = d2net_v2_gpio_led_pins, | ||
119 | }; | ||
120 | |||
121 | static struct platform_device d2net_v2_gpio_leds = { | ||
122 | .name = "leds-gpio", | ||
123 | .id = -1, | ||
124 | .dev = { | ||
125 | .platform_data = &d2net_v2_gpio_leds_data, | ||
126 | }, | ||
127 | }; | ||
128 | |||
129 | /***************************************************************************** | ||
130 | * Dual-GPIO CPLD LEDs | ||
131 | ****************************************************************************/ | ||
132 | |||
133 | #define D2NET_V2_GPIO_BLUE_LED_SLOW 29 | ||
134 | #define D2NET_V2_GPIO_BLUE_LED_CMD 30 | ||
135 | |||
136 | static struct ns2_led d2net_v2_led_pins[] = { | ||
137 | { | ||
138 | .name = "d2net_v2:blue:sata", | ||
139 | .cmd = D2NET_V2_GPIO_BLUE_LED_CMD, | ||
140 | .slow = D2NET_V2_GPIO_BLUE_LED_SLOW, | ||
141 | }, | ||
142 | }; | ||
143 | |||
144 | static struct ns2_led_platform_data d2net_v2_leds_data = { | ||
145 | .num_leds = ARRAY_SIZE(d2net_v2_led_pins), | ||
146 | .leds = d2net_v2_led_pins, | ||
147 | }; | ||
148 | |||
149 | static struct platform_device d2net_v2_leds = { | ||
150 | .name = "leds-ns2", | ||
151 | .id = -1, | ||
152 | .dev = { | ||
153 | .platform_data = &d2net_v2_leds_data, | ||
154 | }, | ||
155 | }; | ||
156 | |||
157 | /***************************************************************************** | ||
158 | * General Setup | ||
159 | ****************************************************************************/ | ||
160 | |||
161 | static unsigned int d2net_v2_mpp_config[] __initdata = { | ||
162 | MPP0_SPI_SCn, | ||
163 | MPP1_SPI_MOSI, | ||
164 | MPP2_SPI_SCK, | ||
165 | MPP3_SPI_MISO, | ||
166 | MPP6_SYSRST_OUTn, | ||
167 | MPP7_GPO, /* Request power-off */ | ||
168 | MPP8_TW0_SDA, | ||
169 | MPP9_TW0_SCK, | ||
170 | MPP10_UART0_TXD, | ||
171 | MPP11_UART0_RXD, | ||
172 | MPP12_GPO, /* Red led */ | ||
173 | MPP13_GPIO, /* Rear power switch (on|auto) */ | ||
174 | MPP14_GPIO, /* USB fuse */ | ||
175 | MPP15_GPIO, /* Rear power switch (auto|off) */ | ||
176 | MPP16_GPIO, /* SATA 0 power */ | ||
177 | MPP21_SATA0_ACTn, | ||
178 | MPP24_GPIO, /* USB mode select */ | ||
179 | MPP26_GPIO, /* USB device vbus */ | ||
180 | MPP28_GPIO, /* USB enable host vbus */ | ||
181 | MPP29_GPIO, /* Blue led (slow register) */ | ||
182 | MPP30_GPIO, /* Blue led (command register) */ | ||
183 | MPP34_GPIO, /* Power button (1 = Released, 0 = Pushed) */ | ||
184 | MPP35_GPIO, /* Inhibit power-off */ | ||
185 | 0 | ||
186 | }; | ||
187 | |||
188 | #define D2NET_V2_GPIO_POWER_OFF 7 | ||
189 | |||
190 | static void d2net_v2_power_off(void) | ||
191 | { | ||
192 | gpio_set_value(D2NET_V2_GPIO_POWER_OFF, 1); | ||
193 | } | ||
194 | |||
195 | static void __init d2net_v2_init(void) | ||
196 | { | ||
197 | /* | ||
198 | * Basic setup. Needs to be called early. | ||
199 | */ | ||
200 | kirkwood_init(); | ||
201 | kirkwood_mpp_conf(d2net_v2_mpp_config); | ||
202 | |||
203 | lacie_v2_hdd_power_init(1); | ||
204 | |||
205 | kirkwood_ehci_init(); | ||
206 | kirkwood_ge00_init(&d2net_v2_ge00_data); | ||
207 | kirkwood_sata_init(&d2net_v2_sata_data); | ||
208 | kirkwood_uart0_init(); | ||
209 | lacie_v2_register_flash(); | ||
210 | lacie_v2_register_i2c_devices(); | ||
211 | |||
212 | platform_device_register(&d2net_v2_leds); | ||
213 | platform_device_register(&d2net_v2_gpio_leds); | ||
214 | platform_device_register(&d2net_v2_gpio_buttons); | ||
215 | |||
216 | if (gpio_request(D2NET_V2_GPIO_POWER_OFF, "power-off") == 0 && | ||
217 | gpio_direction_output(D2NET_V2_GPIO_POWER_OFF, 0) == 0) | ||
218 | pm_power_off = d2net_v2_power_off; | ||
219 | else | ||
220 | pr_err("d2net_v2: failed to configure power-off GPIO\n"); | ||
221 | } | ||
222 | |||
223 | MACHINE_START(D2NET_V2, "LaCie d2 Network v2") | ||
224 | .atag_offset = 0x100, | ||
225 | .init_machine = d2net_v2_init, | ||
226 | .map_io = kirkwood_map_io, | ||
227 | .init_early = kirkwood_init_early, | ||
228 | .init_irq = kirkwood_init_irq, | ||
229 | .init_time = kirkwood_timer_init, | ||
230 | .restart = kirkwood_restart, | ||
231 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h deleted file mode 100644 index 1c37082c8b39..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/bridge-regs.h | ||
3 | * | ||
4 | * Mbus-L to Mbus Bridge Registers | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_BRIDGE_REGS_H | ||
12 | #define __ASM_ARCH_BRIDGE_REGS_H | ||
13 | |||
14 | #include <mach/kirkwood.h> | ||
15 | |||
16 | #define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100) | ||
17 | #define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100) | ||
18 | #define CPU_CONFIG_ERROR_PROP 0x00000004 | ||
19 | |||
20 | #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) | ||
21 | #define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104) | ||
22 | #define CPU_RESET 0x00000002 | ||
23 | |||
24 | #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) | ||
25 | #define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) | ||
26 | #define SOFT_RESET_OUT_EN 0x00000004 | ||
27 | |||
28 | #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) | ||
29 | #define SOFT_RESET 0x00000001 | ||
30 | |||
31 | #define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) | ||
32 | |||
33 | #define BRIDGE_INT_TIMER1_CLR (~0x0004) | ||
34 | |||
35 | #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) | ||
36 | #define IRQ_CAUSE_LOW_OFF 0x0000 | ||
37 | #define IRQ_MASK_LOW_OFF 0x0004 | ||
38 | #define IRQ_CAUSE_HIGH_OFF 0x0010 | ||
39 | #define IRQ_MASK_HIGH_OFF 0x0014 | ||
40 | |||
41 | #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) | ||
42 | #define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) | ||
43 | |||
44 | #define L2_CONFIG_REG (BRIDGE_VIRT_BASE + 0x0128) | ||
45 | #define L2_WRITETHROUGH 0x00000010 | ||
46 | |||
47 | #define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE + 0x11c) | ||
48 | #define CGC_BIT_GE0 (0) | ||
49 | #define CGC_BIT_PEX0 (2) | ||
50 | #define CGC_BIT_USB0 (3) | ||
51 | #define CGC_BIT_SDIO (4) | ||
52 | #define CGC_BIT_TSU (5) | ||
53 | #define CGC_BIT_DUNIT (6) | ||
54 | #define CGC_BIT_RUNIT (7) | ||
55 | #define CGC_BIT_XOR0 (8) | ||
56 | #define CGC_BIT_AUDIO (9) | ||
57 | #define CGC_BIT_SATA0 (14) | ||
58 | #define CGC_BIT_SATA1 (15) | ||
59 | #define CGC_BIT_XOR1 (16) | ||
60 | #define CGC_BIT_CRYPTO (17) | ||
61 | #define CGC_BIT_PEX1 (18) | ||
62 | #define CGC_BIT_GE1 (19) | ||
63 | #define CGC_BIT_TDM (20) | ||
64 | #define CGC_GE0 (1 << 0) | ||
65 | #define CGC_PEX0 (1 << 2) | ||
66 | #define CGC_USB0 (1 << 3) | ||
67 | #define CGC_SDIO (1 << 4) | ||
68 | #define CGC_TSU (1 << 5) | ||
69 | #define CGC_DUNIT (1 << 6) | ||
70 | #define CGC_RUNIT (1 << 7) | ||
71 | #define CGC_XOR0 (1 << 8) | ||
72 | #define CGC_AUDIO (1 << 9) | ||
73 | #define CGC_POWERSAVE (1 << 11) | ||
74 | #define CGC_SATA0 (1 << 14) | ||
75 | #define CGC_SATA1 (1 << 15) | ||
76 | #define CGC_XOR1 (1 << 16) | ||
77 | #define CGC_CRYPTO (1 << 17) | ||
78 | #define CGC_PEX1 (1 << 18) | ||
79 | #define CGC_GE1 (1 << 19) | ||
80 | #define CGC_TDM (1 << 20) | ||
81 | #define CGC_RESERVED (0x6 << 21) | ||
82 | |||
83 | #define MEMORY_PM_CTRL (BRIDGE_VIRT_BASE + 0x118) | ||
84 | #define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x118) | ||
85 | |||
86 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S deleted file mode 100644 index 82db29f7af8f..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for Marvell Kirkwood platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <mach/bridge-regs.h> | ||
12 | |||
13 | .macro get_irqnr_preamble, base, tmp | ||
14 | ldr \base, =IRQ_VIRT_BASE | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
18 | @ check low interrupts | ||
19 | ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] | ||
20 | ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] | ||
21 | mov \irqnr, #31 | ||
22 | ands \irqstat, \irqstat, \tmp | ||
23 | bne 1001f | ||
24 | |||
25 | @ if no low interrupts set, check high interrupts | ||
26 | ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] | ||
27 | ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] | ||
28 | mov \irqnr, #63 | ||
29 | ands \irqstat, \irqstat, \tmp | ||
30 | |||
31 | @ find first active interrupt source | ||
32 | 1001: clzne \irqstat, \irqstat | ||
33 | subne \irqnr, \irqnr, \irqstat | ||
34 | .endm | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/hardware.h b/arch/arm/mach-kirkwood/include/mach/hardware.h deleted file mode 100644 index 742b74f43e41..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/hardware.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/hardware.h | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_HARDWARE_H | ||
10 | #define __ASM_ARCH_HARDWARE_H | ||
11 | |||
12 | #include "kirkwood.h" | ||
13 | |||
14 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h deleted file mode 100644 index 2bf8161e3b51..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/irqs.h +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/irqs.h | ||
3 | * | ||
4 | * IRQ definitions for Marvell Kirkwood SoCs | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_IRQS_H | ||
12 | #define __ASM_ARCH_IRQS_H | ||
13 | |||
14 | /* | ||
15 | * Low Interrupt Controller | ||
16 | */ | ||
17 | #define IRQ_KIRKWOOD_HIGH_SUM 0 | ||
18 | #define IRQ_KIRKWOOD_BRIDGE 1 | ||
19 | #define IRQ_KIRKWOOD_HOST2CPU 2 | ||
20 | #define IRQ_KIRKWOOD_CPU2HOST 3 | ||
21 | #define IRQ_KIRKWOOD_XOR_00 5 | ||
22 | #define IRQ_KIRKWOOD_XOR_01 6 | ||
23 | #define IRQ_KIRKWOOD_XOR_10 7 | ||
24 | #define IRQ_KIRKWOOD_XOR_11 8 | ||
25 | #define IRQ_KIRKWOOD_PCIE 9 | ||
26 | #define IRQ_KIRKWOOD_PCIE1 10 | ||
27 | #define IRQ_KIRKWOOD_GE00_SUM 11 | ||
28 | #define IRQ_KIRKWOOD_GE01_SUM 15 | ||
29 | #define IRQ_KIRKWOOD_USB 19 | ||
30 | #define IRQ_KIRKWOOD_SATA 21 | ||
31 | #define IRQ_KIRKWOOD_CRYPTO 22 | ||
32 | #define IRQ_KIRKWOOD_SPI 23 | ||
33 | #define IRQ_KIRKWOOD_I2S 24 | ||
34 | #define IRQ_KIRKWOOD_TS_0 26 | ||
35 | #define IRQ_KIRKWOOD_SDIO 28 | ||
36 | #define IRQ_KIRKWOOD_TWSI 29 | ||
37 | #define IRQ_KIRKWOOD_AVB 30 | ||
38 | #define IRQ_KIRKWOOD_TDMI 31 | ||
39 | |||
40 | /* | ||
41 | * High Interrupt Controller | ||
42 | */ | ||
43 | #define IRQ_KIRKWOOD_UART_0 33 | ||
44 | #define IRQ_KIRKWOOD_UART_1 34 | ||
45 | #define IRQ_KIRKWOOD_GPIO_LOW_0_7 35 | ||
46 | #define IRQ_KIRKWOOD_GPIO_LOW_8_15 36 | ||
47 | #define IRQ_KIRKWOOD_GPIO_LOW_16_23 37 | ||
48 | #define IRQ_KIRKWOOD_GPIO_LOW_24_31 38 | ||
49 | #define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39 | ||
50 | #define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40 | ||
51 | #define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41 | ||
52 | #define IRQ_KIRKWOOD_GE00_ERR 46 | ||
53 | #define IRQ_KIRKWOOD_GE01_ERR 47 | ||
54 | #define IRQ_KIRKWOOD_RTC 53 | ||
55 | |||
56 | /* | ||
57 | * KIRKWOOD General Purpose Pins | ||
58 | */ | ||
59 | #define IRQ_KIRKWOOD_GPIO_START 64 | ||
60 | #define NR_GPIO_IRQS 50 | ||
61 | |||
62 | #define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS) | ||
63 | |||
64 | |||
65 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h deleted file mode 100644 index 92976cef3910..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/kirkwood.h | ||
3 | * | ||
4 | * Generic definitions for Marvell Kirkwood SoC flavors: | ||
5 | * 88F6180, 88F6192 and 88F6281. | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_KIRKWOOD_H | ||
13 | #define __ASM_ARCH_KIRKWOOD_H | ||
14 | |||
15 | /* | ||
16 | * Marvell Kirkwood address maps. | ||
17 | * | ||
18 | * phys | ||
19 | * e0000000 PCIe #0 Memory space | ||
20 | * e8000000 PCIe #1 Memory space | ||
21 | * f1000000 on-chip peripheral registers | ||
22 | * f2000000 PCIe #0 I/O space | ||
23 | * f3000000 PCIe #1 I/O space | ||
24 | * f4000000 NAND controller address window | ||
25 | * f5000000 Security Accelerator SRAM | ||
26 | * | ||
27 | * virt phys size | ||
28 | * fed00000 f1000000 1M on-chip peripheral registers | ||
29 | * fee00000 f2000000 1M PCIe #0 I/O space | ||
30 | * fef00000 f3000000 1M PCIe #1 I/O space | ||
31 | */ | ||
32 | |||
33 | #define KIRKWOOD_SRAM_PHYS_BASE 0xf5000000 | ||
34 | #define KIRKWOOD_SRAM_SIZE SZ_2K | ||
35 | |||
36 | #define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf4000000 | ||
37 | #define KIRKWOOD_NAND_MEM_SIZE SZ_1K | ||
38 | |||
39 | #define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000 | ||
40 | #define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00010000 | ||
41 | #define KIRKWOOD_PCIE1_IO_SIZE SZ_64K | ||
42 | |||
43 | #define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 | ||
44 | #define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000 | ||
45 | #define KIRKWOOD_PCIE_IO_SIZE SZ_64K | ||
46 | |||
47 | #define KIRKWOOD_REGS_PHYS_BASE 0xf1000000 | ||
48 | #define KIRKWOOD_REGS_VIRT_BASE IOMEM(0xfed00000) | ||
49 | #define KIRKWOOD_REGS_SIZE SZ_1M | ||
50 | |||
51 | #define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 | ||
52 | #define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000 | ||
53 | #define KIRKWOOD_PCIE_MEM_SIZE SZ_128M | ||
54 | |||
55 | #define KIRKWOOD_PCIE1_MEM_PHYS_BASE 0xe8000000 | ||
56 | #define KIRKWOOD_PCIE1_MEM_BUS_BASE 0xe8000000 | ||
57 | #define KIRKWOOD_PCIE1_MEM_SIZE SZ_128M | ||
58 | |||
59 | /* | ||
60 | * Register Map | ||
61 | */ | ||
62 | #define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x00000) | ||
63 | #define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000) | ||
64 | #define DDR_WINDOW_CPU_BASE (DDR_PHYS_BASE + 0x1500) | ||
65 | #define DDR_WINDOW_CPU_SZ (0x20) | ||
66 | #define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418) | ||
67 | |||
68 | #define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x10000) | ||
69 | #define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x10000) | ||
70 | #define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030) | ||
71 | #define DEVICE_ID (DEV_BUS_VIRT_BASE + 0x0034) | ||
72 | #define GPIO_LOW_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0100) | ||
73 | #define GPIO_HIGH_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x0140) | ||
74 | #define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0300) | ||
75 | #define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x0600) | ||
76 | #define I2C_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x1000) | ||
77 | #define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2000) | ||
78 | #define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2000) | ||
79 | #define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE + 0x2100) | ||
80 | #define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE + 0x2100) | ||
81 | |||
82 | #define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x20000) | ||
83 | #define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000) | ||
84 | #define BRIDGE_WINS_BASE (BRIDGE_PHYS_BASE) | ||
85 | #define BRIDGE_WINS_SZ (0x80) | ||
86 | |||
87 | #define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x30000) | ||
88 | |||
89 | #define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x40000) | ||
90 | #define PCIE_LINK_CTRL (PCIE_VIRT_BASE + 0x70) | ||
91 | #define PCIE_STATUS (PCIE_VIRT_BASE + 0x1a04) | ||
92 | #define PCIE1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x44000) | ||
93 | #define PCIE1_LINK_CTRL (PCIE1_VIRT_BASE + 0x70) | ||
94 | #define PCIE1_STATUS (PCIE1_VIRT_BASE + 0x1a04) | ||
95 | |||
96 | #define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x50000) | ||
97 | |||
98 | #define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60800) | ||
99 | #define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60800) | ||
100 | #define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60900) | ||
101 | #define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60900) | ||
102 | #define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60A00) | ||
103 | #define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60A00) | ||
104 | #define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x60B00) | ||
105 | #define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x60B00) | ||
106 | |||
107 | #define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x70000) | ||
108 | #define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x74000) | ||
109 | |||
110 | #define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x80000) | ||
111 | #define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0x80000) | ||
112 | #define SATA0_IF_CTRL (SATA_VIRT_BASE + 0x2050) | ||
113 | #define SATA0_PHY_MODE_2 (SATA_VIRT_BASE + 0x2330) | ||
114 | #define SATA1_IF_CTRL (SATA_VIRT_BASE + 0x4050) | ||
115 | #define SATA1_PHY_MODE_2 (SATA_VIRT_BASE + 0x4330) | ||
116 | |||
117 | #define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x90000) | ||
118 | |||
119 | #define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0xA0000) | ||
120 | #define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE + 0xA0000) | ||
121 | |||
122 | /* | ||
123 | * Supported devices and revisions. | ||
124 | */ | ||
125 | #define MV88F6281_DEV_ID 0x6281 | ||
126 | #define MV88F6281_REV_Z0 0 | ||
127 | #define MV88F6281_REV_A0 2 | ||
128 | #define MV88F6281_REV_A1 3 | ||
129 | |||
130 | #define MV88F6192_DEV_ID 0x6192 | ||
131 | #define MV88F6192_REV_Z0 0 | ||
132 | #define MV88F6192_REV_A0 2 | ||
133 | #define MV88F6192_REV_A1 3 | ||
134 | |||
135 | #define MV88F6180_DEV_ID 0x6180 | ||
136 | #define MV88F6180_REV_A0 2 | ||
137 | #define MV88F6180_REV_A1 3 | ||
138 | |||
139 | #define MV88F6282_DEV_ID 0x6282 | ||
140 | #define MV88F6282_REV_A0 0 | ||
141 | #define MV88F6282_REV_A1 1 | ||
142 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/uncompress.h b/arch/arm/mach-kirkwood/include/mach/uncompress.h deleted file mode 100644 index 5bca5534021f..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/uncompress.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #include <linux/serial_reg.h> | ||
10 | #include <mach/kirkwood.h> | ||
11 | |||
12 | #define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) | ||
13 | |||
14 | static void putc(const char c) | ||
15 | { | ||
16 | unsigned char *base = SERIAL_BASE; | ||
17 | int i; | ||
18 | |||
19 | for (i = 0; i < 0x1000; i++) { | ||
20 | if (base[UART_LSR << 2] & UART_LSR_THRE) | ||
21 | break; | ||
22 | barrier(); | ||
23 | } | ||
24 | |||
25 | base[UART_TX << 2] = c; | ||
26 | } | ||
27 | |||
28 | static void flush(void) | ||
29 | { | ||
30 | unsigned char *base = SERIAL_BASE; | ||
31 | unsigned char mask; | ||
32 | int i; | ||
33 | |||
34 | mask = UART_LSR_TEMT | UART_LSR_THRE; | ||
35 | |||
36 | for (i = 0; i < 0x1000; i++) { | ||
37 | if ((base[UART_LSR << 2] & mask) == mask) | ||
38 | break; | ||
39 | barrier(); | ||
40 | } | ||
41 | } | ||
42 | |||
43 | /* | ||
44 | * nothing to do | ||
45 | */ | ||
46 | #define arch_decomp_setup() | ||
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c deleted file mode 100644 index 2c47a8ad0e27..000000000000 --- a/arch/arm/mach-kirkwood/irq.c +++ /dev/null | |||
@@ -1,82 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/irq.c | ||
3 | * | ||
4 | * Kirkwood IRQ handling. | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | #include <asm/exception.h> | ||
11 | #include <linux/gpio.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/irq.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <mach/bridge-regs.h> | ||
16 | #include <plat/orion-gpio.h> | ||
17 | #include <plat/irq.h> | ||
18 | #include "common.h" | ||
19 | |||
20 | static int __initdata gpio0_irqs[4] = { | ||
21 | IRQ_KIRKWOOD_GPIO_LOW_0_7, | ||
22 | IRQ_KIRKWOOD_GPIO_LOW_8_15, | ||
23 | IRQ_KIRKWOOD_GPIO_LOW_16_23, | ||
24 | IRQ_KIRKWOOD_GPIO_LOW_24_31, | ||
25 | }; | ||
26 | |||
27 | static int __initdata gpio1_irqs[4] = { | ||
28 | IRQ_KIRKWOOD_GPIO_HIGH_0_7, | ||
29 | IRQ_KIRKWOOD_GPIO_HIGH_8_15, | ||
30 | IRQ_KIRKWOOD_GPIO_HIGH_16_23, | ||
31 | 0, | ||
32 | }; | ||
33 | |||
34 | #ifdef CONFIG_MULTI_IRQ_HANDLER | ||
35 | /* | ||
36 | * Compiling with both non-DT and DT support enabled, will | ||
37 | * break asm irq handler used by non-DT boards. Therefore, | ||
38 | * we provide a C-style irq handler even for non-DT boards, | ||
39 | * if MULTI_IRQ_HANDLER is set. | ||
40 | */ | ||
41 | |||
42 | static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE; | ||
43 | |||
44 | asmlinkage void | ||
45 | __exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs) | ||
46 | { | ||
47 | u32 stat; | ||
48 | |||
49 | stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF); | ||
50 | stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF); | ||
51 | if (stat) { | ||
52 | unsigned int hwirq = __fls(stat); | ||
53 | handle_IRQ(hwirq, regs); | ||
54 | return; | ||
55 | } | ||
56 | stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF); | ||
57 | stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF); | ||
58 | if (stat) { | ||
59 | unsigned int hwirq = 32 + __fls(stat); | ||
60 | handle_IRQ(hwirq, regs); | ||
61 | return; | ||
62 | } | ||
63 | } | ||
64 | #endif | ||
65 | |||
66 | void __init kirkwood_init_irq(void) | ||
67 | { | ||
68 | orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); | ||
69 | orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); | ||
70 | |||
71 | #ifdef CONFIG_MULTI_IRQ_HANDLER | ||
72 | set_handle_irq(kirkwood_legacy_handle_irq); | ||
73 | #endif | ||
74 | |||
75 | /* | ||
76 | * Initialize gpiolib for GPIOs 0-49. | ||
77 | */ | ||
78 | orion_gpio_init(NULL, 0, 32, GPIO_LOW_VIRT_BASE, 0, | ||
79 | IRQ_KIRKWOOD_GPIO_START, gpio0_irqs); | ||
80 | orion_gpio_init(NULL, 32, 18, GPIO_HIGH_VIRT_BASE, 0, | ||
81 | IRQ_KIRKWOOD_GPIO_START + 32, gpio1_irqs); | ||
82 | } | ||
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c deleted file mode 100644 index 8e3e4331c380..000000000000 --- a/arch/arm/mach-kirkwood/lacie_v2-common.c +++ /dev/null | |||
@@ -1,114 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/lacie_v2-common.c | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/mtd/physmap.h> | ||
12 | #include <linux/spi/flash.h> | ||
13 | #include <linux/spi/spi.h> | ||
14 | #include <linux/i2c.h> | ||
15 | #include <linux/platform_data/at24.h> | ||
16 | #include <linux/gpio.h> | ||
17 | #include <asm/mach/time.h> | ||
18 | #include <mach/kirkwood.h> | ||
19 | #include <mach/irqs.h> | ||
20 | #include <plat/time.h> | ||
21 | #include "common.h" | ||
22 | #include "lacie_v2-common.h" | ||
23 | |||
24 | /***************************************************************************** | ||
25 | * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005) | ||
26 | ****************************************************************************/ | ||
27 | |||
28 | static struct mtd_partition lacie_v2_flash_parts[] = { | ||
29 | { | ||
30 | .name = "u-boot", | ||
31 | .size = MTDPART_SIZ_FULL, | ||
32 | .offset = 0, | ||
33 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
34 | }, | ||
35 | }; | ||
36 | |||
37 | static const struct flash_platform_data lacie_v2_flash = { | ||
38 | .type = "mx25l4005a", | ||
39 | .name = "spi_flash", | ||
40 | .parts = lacie_v2_flash_parts, | ||
41 | .nr_parts = ARRAY_SIZE(lacie_v2_flash_parts), | ||
42 | }; | ||
43 | |||
44 | static struct spi_board_info __initdata lacie_v2_spi_slave_info[] = { | ||
45 | { | ||
46 | .modalias = "m25p80", | ||
47 | .platform_data = &lacie_v2_flash, | ||
48 | .irq = -1, | ||
49 | .max_speed_hz = 20000000, | ||
50 | .bus_num = 0, | ||
51 | .chip_select = 0, | ||
52 | }, | ||
53 | }; | ||
54 | |||
55 | void __init lacie_v2_register_flash(void) | ||
56 | { | ||
57 | spi_register_board_info(lacie_v2_spi_slave_info, | ||
58 | ARRAY_SIZE(lacie_v2_spi_slave_info)); | ||
59 | kirkwood_spi_init(); | ||
60 | } | ||
61 | |||
62 | /***************************************************************************** | ||
63 | * I2C devices | ||
64 | ****************************************************************************/ | ||
65 | |||
66 | static struct at24_platform_data at24c04 = { | ||
67 | .byte_len = SZ_4K / 8, | ||
68 | .page_size = 16, | ||
69 | }; | ||
70 | |||
71 | /* | ||
72 | * i2c addr | chip | description | ||
73 | * 0x50 | HT24LC04 | eeprom (512B) | ||
74 | */ | ||
75 | |||
76 | static struct i2c_board_info __initdata lacie_v2_i2c_info[] = { | ||
77 | { | ||
78 | I2C_BOARD_INFO("24c04", 0x50), | ||
79 | .platform_data = &at24c04, | ||
80 | } | ||
81 | }; | ||
82 | |||
83 | void __init lacie_v2_register_i2c_devices(void) | ||
84 | { | ||
85 | kirkwood_i2c_init(); | ||
86 | i2c_register_board_info(0, lacie_v2_i2c_info, | ||
87 | ARRAY_SIZE(lacie_v2_i2c_info)); | ||
88 | } | ||
89 | |||
90 | /***************************************************************************** | ||
91 | * Hard Disk power | ||
92 | ****************************************************************************/ | ||
93 | |||
94 | static int __initdata lacie_v2_gpio_hdd_power[] = { 16, 17, 41, 42, 43 }; | ||
95 | |||
96 | void __init lacie_v2_hdd_power_init(int hdd_num) | ||
97 | { | ||
98 | int i; | ||
99 | int err; | ||
100 | |||
101 | /* Power up all hard disks. */ | ||
102 | for (i = 0; i < hdd_num; i++) { | ||
103 | err = gpio_request(lacie_v2_gpio_hdd_power[i], NULL); | ||
104 | if (err == 0) { | ||
105 | err = gpio_direction_output( | ||
106 | lacie_v2_gpio_hdd_power[i], 1); | ||
107 | /* Free the HDD power GPIOs. This allow user-space to | ||
108 | * configure them via the gpiolib sysfs interface. */ | ||
109 | gpio_free(lacie_v2_gpio_hdd_power[i]); | ||
110 | } | ||
111 | if (err) | ||
112 | pr_err("Failed to power up HDD%d\n", i + 1); | ||
113 | } | ||
114 | } | ||
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.h b/arch/arm/mach-kirkwood/lacie_v2-common.h deleted file mode 100644 index fc64f578536e..000000000000 --- a/arch/arm/mach-kirkwood/lacie_v2-common.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/lacie_v2-common.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ARCH_KIRKWOOD_LACIE_V2_COMMON_H | ||
10 | #define __ARCH_KIRKWOOD_LACIE_V2_COMMON_H | ||
11 | |||
12 | void lacie_v2_register_flash(void); | ||
13 | void lacie_v2_register_i2c_devices(void); | ||
14 | void lacie_v2_hdd_power_init(int hdd_num); | ||
15 | |||
16 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c deleted file mode 100644 index e96fd71abd76..000000000000 --- a/arch/arm/mach-kirkwood/mpp.c +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/mpp.c | ||
3 | * | ||
4 | * MPP functions for Marvell Kirkwood SoCs | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | #include <linux/gpio.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/io.h> | ||
14 | #include <mach/hardware.h> | ||
15 | #include <plat/mpp.h> | ||
16 | #include "common.h" | ||
17 | #include "mpp.h" | ||
18 | |||
19 | static unsigned int __init kirkwood_variant(void) | ||
20 | { | ||
21 | u32 dev, rev; | ||
22 | |||
23 | kirkwood_pcie_id(&dev, &rev); | ||
24 | |||
25 | if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) | ||
26 | return MPP_F6281_MASK; | ||
27 | if (dev == MV88F6282_DEV_ID) | ||
28 | return MPP_F6282_MASK; | ||
29 | if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0) | ||
30 | return MPP_F6192_MASK; | ||
31 | if (dev == MV88F6180_DEV_ID) | ||
32 | return MPP_F6180_MASK; | ||
33 | |||
34 | pr_err("MPP setup: unknown kirkwood variant (dev %#x rev %#x)\n", | ||
35 | dev, rev); | ||
36 | return 0; | ||
37 | } | ||
38 | |||
39 | void __init kirkwood_mpp_conf(unsigned int *mpp_list) | ||
40 | { | ||
41 | orion_mpp_conf(mpp_list, kirkwood_variant(), | ||
42 | MPP_MAX, DEV_BUS_VIRT_BASE); | ||
43 | } | ||
diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h deleted file mode 100644 index d5a0d1da2e0e..000000000000 --- a/arch/arm/mach-kirkwood/mpp.h +++ /dev/null | |||
@@ -1,348 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-kirkwood/mpp.h -- Multi Purpose Pins | ||
3 | * | ||
4 | * Copyright 2009: Marvell Technology Group Ltd. | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __KIRKWOOD_MPP_H | ||
12 | #define __KIRKWOOD_MPP_H | ||
13 | |||
14 | #define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281, _F6282) ( \ | ||
15 | /* MPP number */ ((_num) & 0xff) | \ | ||
16 | /* MPP select value */ (((_sel) & 0xf) << 8) | \ | ||
17 | /* may be input signal */ ((!!(_in)) << 12) | \ | ||
18 | /* may be output signal */ ((!!(_out)) << 13) | \ | ||
19 | /* available on F6180 */ ((!!(_F6180)) << 14) | \ | ||
20 | /* available on F6190 */ ((!!(_F6190)) << 15) | \ | ||
21 | /* available on F6192 */ ((!!(_F6192)) << 16) | \ | ||
22 | /* available on F6281 */ ((!!(_F6281)) << 17) | \ | ||
23 | /* available on F6282 */ ((!!(_F6282)) << 18)) | ||
24 | |||
25 | /* num sel i o 6180 6190 6192 6281 6282 */ | ||
26 | |||
27 | #define MPP_F6180_MASK MPP( 0, 0x0, 0, 0, 1, 0, 0, 0, 0 ) | ||
28 | #define MPP_F6190_MASK MPP( 0, 0x0, 0, 0, 0, 1, 0, 0, 0 ) | ||
29 | #define MPP_F6192_MASK MPP( 0, 0x0, 0, 0, 0, 0, 1, 0, 0 ) | ||
30 | #define MPP_F6281_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 1, 0 ) | ||
31 | #define MPP_F6282_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 0, 1 ) | ||
32 | |||
33 | #define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
34 | #define MPP0_NF_IO2 MPP( 0, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
35 | #define MPP0_SPI_SCn MPP( 0, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
36 | |||
37 | #define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
38 | #define MPP1_NF_IO3 MPP( 1, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
39 | #define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
40 | |||
41 | #define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
42 | #define MPP2_NF_IO4 MPP( 2, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
43 | #define MPP2_SPI_SCK MPP( 2, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
44 | |||
45 | #define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
46 | #define MPP3_NF_IO5 MPP( 3, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
47 | #define MPP3_SPI_MISO MPP( 3, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
48 | |||
49 | #define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
50 | #define MPP4_NF_IO6 MPP( 4, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
51 | #define MPP4_UART0_RXD MPP( 4, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
52 | #define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 0, 0, 0, 1, 1, 1 ) | ||
53 | #define MPP4_LCD_VGA_HSYNC MPP( 4, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
54 | #define MPP4_PTP_CLK MPP( 4, 0xd, 0, 0, 1, 1, 1, 1, 0 ) | ||
55 | |||
56 | #define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
57 | #define MPP5_NF_IO7 MPP( 5, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
58 | #define MPP5_UART0_TXD MPP( 5, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
59 | #define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 0, 1, 1, 1, 1, 0 ) | ||
60 | #define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 0, 0, 1, 1, 1, 1 ) | ||
61 | #define MPP5_LCD_VGA_VSYNC MPP( 5, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
62 | |||
63 | #define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
64 | #define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
65 | #define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 0, 1, 1, 1, 1, 0 ) | ||
66 | |||
67 | #define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
68 | #define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 0, 1, 1, 1, 1, 0 ) | ||
69 | #define MPP7_SPI_SCn MPP( 7, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
70 | #define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 0, 1, 1, 1, 1, 0 ) | ||
71 | #define MPP7_LCD_PWM MPP( 7, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
72 | |||
73 | #define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
74 | #define MPP8_TW0_SDA MPP( 8, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
75 | #define MPP8_UART0_RTS MPP( 8, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
76 | #define MPP8_UART1_RTS MPP( 8, 0x3, 0, 0, 1, 1, 1, 1, 1 ) | ||
77 | #define MPP8_MII0_RXERR MPP( 8, 0x4, 0, 0, 0, 1, 1, 1, 1 ) | ||
78 | #define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 0, 0, 0, 1, 1, 1 ) | ||
79 | #define MPP8_PTP_CLK MPP( 8, 0xc, 0, 0, 1, 1, 1, 1, 0 ) | ||
80 | #define MPP8_MII0_COL MPP( 8, 0xd, 0, 0, 1, 1, 1, 1, 1 ) | ||
81 | |||
82 | #define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
83 | #define MPP9_TW0_SCK MPP( 9, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
84 | #define MPP9_UART0_CTS MPP( 9, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
85 | #define MPP9_UART1_CTS MPP( 9, 0x3, 0, 0, 1, 1, 1, 1, 1 ) | ||
86 | #define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 0, 0, 1, 1, 1, 1 ) | ||
87 | #define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 0, 0, 1, 1, 1, 1, 0 ) | ||
88 | #define MPP9_MII0_CRS MPP( 9, 0xd, 0, 0, 1, 1, 1, 1, 1 ) | ||
89 | |||
90 | #define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
91 | #define MPP10_SPI_SCK MPP( 10, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
92 | #define MPP10_UART0_TXD MPP( 10, 0X3, 0, 0, 1, 1, 1, 1, 1 ) | ||
93 | #define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 0, 0, 0, 1, 1, 1 ) | ||
94 | #define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 0, 1, 1, 1, 1, 0 ) | ||
95 | |||
96 | #define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
97 | #define MPP11_SPI_MISO MPP( 11, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
98 | #define MPP11_UART0_RXD MPP( 11, 0x3, 0, 0, 1, 1, 1, 1, 1 ) | ||
99 | #define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 0, 0, 1, 1, 1, 1, 0 ) | ||
100 | #define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 0, 1, 1, 1, 1, 0 ) | ||
101 | #define MPP11_PTP_CLK MPP( 11, 0xd, 0, 0, 1, 1, 1, 1, 0 ) | ||
102 | #define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 0, 0, 1, 1, 1, 1 ) | ||
103 | |||
104 | #define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
105 | #define MPP12_GPIO MPP( 12, 0x0, 1, 1, 0, 0, 0, 1, 0 ) | ||
106 | #define MPP12_SD_CLK MPP( 12, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
107 | #define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 0, 0, 0, 0, 0, 1 ) | ||
108 | #define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
109 | #define MPP12_TW1_SDA MPP( 12, 0xd, 0, 0, 0, 0, 0, 0, 1 ) | ||
110 | |||
111 | #define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
112 | #define MPP13_SD_CMD MPP( 13, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
113 | #define MPP13_UART1_TXD MPP( 13, 0x3, 0, 0, 1, 1, 1, 1, 1 ) | ||
114 | #define MPP13_AU_SPDIFRMCLK MPP( 13, 0xa, 0, 0, 0, 0, 0, 0, 1 ) | ||
115 | #define MPP13_LCDPWM MPP( 13, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
116 | |||
117 | #define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
118 | #define MPP14_SD_D0 MPP( 14, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
119 | #define MPP14_UART1_RXD MPP( 14, 0x3, 0, 0, 1, 1, 1, 1, 1 ) | ||
120 | #define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
121 | #define MPP14_AU_SPDIFI MPP( 14, 0xa, 0, 0, 0, 0, 0, 0, 1 ) | ||
122 | #define MPP14_AU_I2SDI MPP( 14, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
123 | #define MPP14_MII0_COL MPP( 14, 0xd, 0, 0, 1, 1, 1, 1, 1 ) | ||
124 | |||
125 | #define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
126 | #define MPP15_SD_D1 MPP( 15, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
127 | #define MPP15_UART0_RTS MPP( 15, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
128 | #define MPP15_UART1_TXD MPP( 15, 0x3, 0, 0, 1, 1, 1, 1, 1 ) | ||
129 | #define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 0, 0, 1, 1, 1, 1 ) | ||
130 | #define MPP15_SPI_CSn MPP( 15, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
131 | |||
132 | #define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
133 | #define MPP16_SD_D2 MPP( 16, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
134 | #define MPP16_UART0_CTS MPP( 16, 0x2, 0, 0, 1, 1, 1, 1, 1 ) | ||
135 | #define MPP16_UART1_RXD MPP( 16, 0x3, 0, 0, 1, 1, 1, 1, 1 ) | ||
136 | #define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
137 | #define MPP16_LCD_EXT_REF_CLK MPP( 16, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
138 | #define MPP16_MII0_CRS MPP( 16, 0xd, 0, 0, 1, 1, 1, 1, 1 ) | ||
139 | |||
140 | #define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
141 | #define MPP17_SD_D3 MPP( 17, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
142 | #define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 0, 0, 1, 1, 1, 1 ) | ||
143 | #define MPP17_SATA1_ACTn MPP( 17, 0xa, 0, 0, 0, 0, 0, 0, 1 ) | ||
144 | #define MPP17_TW1_SCK MPP( 17, 0xd, 0, 0, 0, 0, 0, 0, 1 ) | ||
145 | |||
146 | #define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
147 | #define MPP18_NF_IO0 MPP( 18, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
148 | #define MPP18_PEX0_CLKREQ MPP( 18, 0x2, 0, 0, 0, 0, 0, 0, 1 ) | ||
149 | |||
150 | #define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1, 1 ) | ||
151 | #define MPP19_NF_IO1 MPP( 19, 0x1, 0, 0, 1, 1, 1, 1, 1 ) | ||
152 | |||
153 | #define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
154 | #define MPP20_TSMP0 MPP( 20, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
155 | #define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
156 | #define MPP20_GE1_TXD0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
157 | #define MPP20_AU_SPDIFI MPP( 20, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
158 | #define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 0, 0, 0, 1, 1, 1 ) | ||
159 | #define MPP20_LCD_D0 MPP( 20, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
160 | |||
161 | #define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
162 | #define MPP21_TSMP1 MPP( 21, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
163 | #define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
164 | #define MPP21_GE1_TXD1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
165 | #define MPP21_AU_SPDIFO MPP( 21, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
166 | #define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 0, 0, 1, 1, 1, 1 ) | ||
167 | #define MPP21_LCD_D1 MPP( 21, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
168 | |||
169 | #define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
170 | #define MPP22_TSMP2 MPP( 22, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
171 | #define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
172 | #define MPP22_GE1_TXD2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
173 | #define MPP22_AU_SPDIFRMKCLK MPP( 22, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
174 | #define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 0, 0, 0, 1, 1, 1 ) | ||
175 | #define MPP22_LCD_D2 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
176 | |||
177 | #define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
178 | #define MPP23_TSMP3 MPP( 23, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
179 | #define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
180 | #define MPP23_GE1_TXD3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
181 | #define MPP23_AU_I2SBCLK MPP( 23, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
182 | #define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 0, 0, 1, 1, 1, 1 ) | ||
183 | #define MPP23_LCD_D3 MPP( 23, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
184 | |||
185 | #define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
186 | #define MPP24_TSMP4 MPP( 24, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
187 | #define MPP24_TDM_SPI_CS0 MPP( 24, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
188 | #define MPP24_GE1_RXD0 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
189 | #define MPP24_AU_I2SDO MPP( 24, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
190 | #define MPP24_LCD_D4 MPP( 24, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
191 | |||
192 | #define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
193 | #define MPP25_TSMP5 MPP( 25, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
194 | #define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
195 | #define MPP25_GE1_RXD1 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
196 | #define MPP25_AU_I2SLRCLK MPP( 25, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
197 | #define MPP25_LCD_D5 MPP( 25, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
198 | |||
199 | #define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
200 | #define MPP26_TSMP6 MPP( 26, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
201 | #define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
202 | #define MPP26_GE1_RXD2 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
203 | #define MPP26_AU_I2SMCLK MPP( 26, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
204 | #define MPP26_LCD_D6 MPP( 26, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
205 | |||
206 | #define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
207 | #define MPP27_TSMP7 MPP( 27, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
208 | #define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
209 | #define MPP27_GE1_RXD3 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
210 | #define MPP27_AU_I2SDI MPP( 27, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
211 | #define MPP27_LCD_D7 MPP( 27, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
212 | |||
213 | #define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
214 | #define MPP28_TSMP8 MPP( 28, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
215 | #define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
216 | #define MPP28_GE1_COL MPP( 28, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
217 | #define MPP28_AU_EXTCLK MPP( 28, 0x4, 0, 0, 0, 0, 1, 1, 1 ) | ||
218 | #define MPP28_LCD_D8 MPP( 28, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
219 | |||
220 | #define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
221 | #define MPP29_TSMP9 MPP( 29, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
222 | #define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
223 | #define MPP29_GE1_TCLK MPP( 29, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
224 | #define MPP29_LCD_D9 MPP( 29, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
225 | |||
226 | #define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
227 | #define MPP30_TSMP10 MPP( 30, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
228 | #define MPP30_TDM_PCLK MPP( 30, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
229 | #define MPP30_GE1_RXCTL MPP( 30, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
230 | #define MPP30_LCD_D10 MPP( 30, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
231 | |||
232 | #define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
233 | #define MPP31_TSMP11 MPP( 31, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
234 | #define MPP31_TDM_FS MPP( 31, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
235 | #define MPP31_GE1_RXCLK MPP( 31, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
236 | #define MPP31_LCD_D11 MPP( 31, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
237 | |||
238 | #define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
239 | #define MPP32_TSMP12 MPP( 32, 0x1, 0, 0, 0, 0, 1, 1, 1 ) | ||
240 | #define MPP32_TDM_DRX MPP( 32, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
241 | #define MPP32_GE1_TCLKOUT MPP( 32, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
242 | #define MPP32_LCD_D12 MPP( 32, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
243 | |||
244 | #define MPP33_GPO MPP( 33, 0x0, 0, 1, 0, 1, 1, 1, 1 ) | ||
245 | #define MPP33_TDM_DTX MPP( 33, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
246 | #define MPP33_GE1_TXCTL MPP( 33, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
247 | #define MPP33_LCD_D13 MPP( 33, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
248 | |||
249 | #define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1, 1 ) | ||
250 | #define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
251 | #define MPP34_GE1_TXEN MPP( 34, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
252 | #define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 0, 0, 0, 0, 1, 1 ) | ||
253 | #define MPP34_LCD_D14 MPP( 34, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
254 | |||
255 | #define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1, 1 ) | ||
256 | #define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 0, 0, 0, 1, 1, 1 ) | ||
257 | #define MPP35_GE1_RXERR MPP( 35, 0x3, 0, 0, 0, 1, 1, 1, 1 ) | ||
258 | #define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 0, 0, 1, 1, 1, 1 ) | ||
259 | #define MPP35_LCD_D15 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
260 | #define MPP35_MII0_RXERR MPP( 35, 0xc, 0, 0, 1, 1, 1, 1, 1 ) | ||
261 | |||
262 | #define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
263 | #define MPP36_TSMP0 MPP( 36, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
264 | #define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
265 | #define MPP36_AU_SPDIFI MPP( 36, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
266 | #define MPP36_TW1_SDA MPP( 36, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
267 | |||
268 | #define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
269 | #define MPP37_TSMP1 MPP( 37, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
270 | #define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
271 | #define MPP37_AU_SPDIFO MPP( 37, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
272 | #define MPP37_TW1_SCK MPP( 37, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
273 | |||
274 | #define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
275 | #define MPP38_TSMP2 MPP( 38, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
276 | #define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
277 | #define MPP38_AU_SPDIFRMLCLK MPP( 38, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
278 | #define MPP38_LCD_D18 MPP( 38, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
279 | |||
280 | #define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
281 | #define MPP39_TSMP3 MPP( 39, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
282 | #define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
283 | #define MPP39_AU_I2SBCLK MPP( 39, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
284 | #define MPP39_LCD_D19 MPP( 39, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
285 | |||
286 | #define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
287 | #define MPP40_TSMP4 MPP( 40, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
288 | #define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
289 | #define MPP40_AU_I2SDO MPP( 40, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
290 | #define MPP40_LCD_D20 MPP( 40, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
291 | |||
292 | #define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
293 | #define MPP41_TSMP5 MPP( 41, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
294 | #define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
295 | #define MPP41_AU_I2SLRCLK MPP( 41, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
296 | #define MPP41_LCD_D21 MPP( 41, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
297 | |||
298 | #define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
299 | #define MPP42_TSMP6 MPP( 42, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
300 | #define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
301 | #define MPP42_AU_I2SMCLK MPP( 42, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
302 | #define MPP42_LCD_D22 MPP( 42, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
303 | |||
304 | #define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
305 | #define MPP43_TSMP7 MPP( 43, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
306 | #define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
307 | #define MPP43_AU_I2SDI MPP( 43, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
308 | #define MPP43_LCD_D23 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
309 | |||
310 | #define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1, 1 ) | ||
311 | #define MPP44_TSMP8 MPP( 44, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
312 | #define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
313 | #define MPP44_AU_EXTCLK MPP( 44, 0x4, 0, 0, 1, 0, 0, 1, 1 ) | ||
314 | #define MPP44_LCD_CLK MPP( 44, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
315 | |||
316 | #define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1, 1 ) | ||
317 | #define MPP45_TSMP9 MPP( 45, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
318 | #define MPP45_TDM_PCLK MPP( 45, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
319 | #define MPP245_LCD_E MPP( 45, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
320 | |||
321 | #define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1, 1 ) | ||
322 | #define MPP46_TSMP10 MPP( 46, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
323 | #define MPP46_TDM_FS MPP( 46, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
324 | #define MPP46_LCD_HSYNC MPP( 46, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
325 | |||
326 | #define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1, 1 ) | ||
327 | #define MPP47_TSMP11 MPP( 47, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
328 | #define MPP47_TDM_DRX MPP( 47, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
329 | #define MPP47_LCD_VSYNC MPP( 47, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
330 | |||
331 | #define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1, 1 ) | ||
332 | #define MPP48_TSMP12 MPP( 48, 0x1, 0, 0, 0, 0, 0, 1, 1 ) | ||
333 | #define MPP48_TDM_DTX MPP( 48, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
334 | #define MPP48_LCD_D16 MPP( 22, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
335 | |||
336 | #define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1, 0 ) | ||
337 | #define MPP49_GPO MPP( 49, 0x0, 0, 1, 0, 0, 0, 0, 1 ) | ||
338 | #define MPP49_TSMP9 MPP( 49, 0x1, 0, 0, 0, 0, 0, 1, 0 ) | ||
339 | #define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 0, 0, 0, 0, 1, 1 ) | ||
340 | #define MPP49_PTP_CLK MPP( 49, 0x5, 0, 0, 0, 0, 0, 1, 0 ) | ||
341 | #define MPP49_PEX0_CLKREQ MPP( 49, 0xa, 0, 0, 0, 0, 0, 0, 1 ) | ||
342 | #define MPP49_LCD_D17 MPP( 49, 0xb, 0, 0, 0, 0, 0, 0, 1 ) | ||
343 | |||
344 | #define MPP_MAX 49 | ||
345 | |||
346 | void kirkwood_mpp_conf(unsigned int *mpp_list); | ||
347 | |||
348 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c deleted file mode 100644 index 913d032cdb19..000000000000 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ /dev/null | |||
@@ -1,422 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/netxbig_v2-setup.c | ||
3 | * | ||
4 | * LaCie 2Big and 5Big Network v2 board setup | ||
5 | * | ||
6 | * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/ata_platform.h> | ||
27 | #include <linux/mv643xx_eth.h> | ||
28 | #include <linux/input.h> | ||
29 | #include <linux/gpio.h> | ||
30 | #include <linux/gpio_keys.h> | ||
31 | #include <linux/leds.h> | ||
32 | #include <asm/mach-types.h> | ||
33 | #include <asm/mach/arch.h> | ||
34 | #include <mach/kirkwood.h> | ||
35 | #include <linux/platform_data/leds-kirkwood-netxbig.h> | ||
36 | #include "common.h" | ||
37 | #include "mpp.h" | ||
38 | #include "lacie_v2-common.h" | ||
39 | |||
40 | /***************************************************************************** | ||
41 | * Ethernet | ||
42 | ****************************************************************************/ | ||
43 | |||
44 | static struct mv643xx_eth_platform_data netxbig_v2_ge00_data = { | ||
45 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
46 | }; | ||
47 | |||
48 | static struct mv643xx_eth_platform_data netxbig_v2_ge01_data = { | ||
49 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | ||
50 | }; | ||
51 | |||
52 | /***************************************************************************** | ||
53 | * SATA | ||
54 | ****************************************************************************/ | ||
55 | |||
56 | static struct mv_sata_platform_data netxbig_v2_sata_data = { | ||
57 | .n_ports = 2, | ||
58 | }; | ||
59 | |||
60 | /***************************************************************************** | ||
61 | * GPIO keys | ||
62 | ****************************************************************************/ | ||
63 | |||
64 | #define NETXBIG_V2_GPIO_SWITCH_POWER_ON 13 | ||
65 | #define NETXBIG_V2_GPIO_SWITCH_POWER_OFF 15 | ||
66 | #define NETXBIG_V2_GPIO_FUNC_BUTTON 34 | ||
67 | |||
68 | #define NETXBIG_V2_SWITCH_POWER_ON 0x1 | ||
69 | #define NETXBIG_V2_SWITCH_POWER_OFF 0x2 | ||
70 | |||
71 | static struct gpio_keys_button netxbig_v2_buttons[] = { | ||
72 | [0] = { | ||
73 | .type = EV_SW, | ||
74 | .code = NETXBIG_V2_SWITCH_POWER_ON, | ||
75 | .gpio = NETXBIG_V2_GPIO_SWITCH_POWER_ON, | ||
76 | .desc = "Back power switch (on|auto)", | ||
77 | .active_low = 1, | ||
78 | }, | ||
79 | [1] = { | ||
80 | .type = EV_SW, | ||
81 | .code = NETXBIG_V2_SWITCH_POWER_OFF, | ||
82 | .gpio = NETXBIG_V2_GPIO_SWITCH_POWER_OFF, | ||
83 | .desc = "Back power switch (auto|off)", | ||
84 | .active_low = 1, | ||
85 | }, | ||
86 | [2] = { | ||
87 | .code = KEY_OPTION, | ||
88 | .gpio = NETXBIG_V2_GPIO_FUNC_BUTTON, | ||
89 | .desc = "Function button", | ||
90 | .active_low = 1, | ||
91 | }, | ||
92 | }; | ||
93 | |||
94 | static struct gpio_keys_platform_data netxbig_v2_button_data = { | ||
95 | .buttons = netxbig_v2_buttons, | ||
96 | .nbuttons = ARRAY_SIZE(netxbig_v2_buttons), | ||
97 | }; | ||
98 | |||
99 | static struct platform_device netxbig_v2_gpio_buttons = { | ||
100 | .name = "gpio-keys", | ||
101 | .id = -1, | ||
102 | .dev = { | ||
103 | .platform_data = &netxbig_v2_button_data, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | /***************************************************************************** | ||
108 | * GPIO extension LEDs | ||
109 | ****************************************************************************/ | ||
110 | |||
111 | /* | ||
112 | * The LEDs are controlled by a CPLD and can be configured through a GPIO | ||
113 | * extension bus: | ||
114 | * | ||
115 | * - address register : bit [0-2] -> GPIO [47-49] | ||
116 | * - data register : bit [0-2] -> GPIO [44-46] | ||
117 | * - enable register : GPIO 29 | ||
118 | */ | ||
119 | |||
120 | static int netxbig_v2_gpio_ext_addr[] = { 47, 48, 49 }; | ||
121 | static int netxbig_v2_gpio_ext_data[] = { 44, 45, 46 }; | ||
122 | |||
123 | static struct netxbig_gpio_ext netxbig_v2_gpio_ext = { | ||
124 | .addr = netxbig_v2_gpio_ext_addr, | ||
125 | .num_addr = ARRAY_SIZE(netxbig_v2_gpio_ext_addr), | ||
126 | .data = netxbig_v2_gpio_ext_data, | ||
127 | .num_data = ARRAY_SIZE(netxbig_v2_gpio_ext_data), | ||
128 | .enable = 29, | ||
129 | }; | ||
130 | |||
131 | /* | ||
132 | * Address register selection: | ||
133 | * | ||
134 | * addr | register | ||
135 | * ---------------------------- | ||
136 | * 0 | front LED | ||
137 | * 1 | front LED brightness | ||
138 | * 2 | SATA LED brightness | ||
139 | * 3 | SATA0 LED | ||
140 | * 4 | SATA1 LED | ||
141 | * 5 | SATA2 LED | ||
142 | * 6 | SATA3 LED | ||
143 | * 7 | SATA4 LED | ||
144 | * | ||
145 | * Data register configuration: | ||
146 | * | ||
147 | * data | LED brightness | ||
148 | * ------------------------------------------------- | ||
149 | * 0 | min (off) | ||
150 | * - | - | ||
151 | * 7 | max | ||
152 | * | ||
153 | * data | front LED mode | ||
154 | * ------------------------------------------------- | ||
155 | * 0 | fix off | ||
156 | * 1 | fix blue on | ||
157 | * 2 | fix red on | ||
158 | * 3 | blink blue on=1 sec and blue off=1 sec | ||
159 | * 4 | blink red on=1 sec and red off=1 sec | ||
160 | * 5 | blink blue on=2.5 sec and red on=0.5 sec | ||
161 | * 6 | blink blue on=1 sec and red on=1 sec | ||
162 | * 7 | blink blue on=0.5 sec and blue off=2.5 sec | ||
163 | * | ||
164 | * data | SATA LED mode | ||
165 | * ------------------------------------------------- | ||
166 | * 0 | fix off | ||
167 | * 1 | SATA activity blink | ||
168 | * 2 | fix red on | ||
169 | * 3 | blink blue on=1 sec and blue off=1 sec | ||
170 | * 4 | blink red on=1 sec and red off=1 sec | ||
171 | * 5 | blink blue on=2.5 sec and red on=0.5 sec | ||
172 | * 6 | blink blue on=1 sec and red on=1 sec | ||
173 | * 7 | fix blue on | ||
174 | */ | ||
175 | |||
176 | static int netxbig_v2_red_mled[NETXBIG_LED_MODE_NUM] = { | ||
177 | [NETXBIG_LED_OFF] = 0, | ||
178 | [NETXBIG_LED_ON] = 2, | ||
179 | [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, | ||
180 | [NETXBIG_LED_TIMER1] = 4, | ||
181 | [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, | ||
182 | }; | ||
183 | |||
184 | static int netxbig_v2_blue_pwr_mled[NETXBIG_LED_MODE_NUM] = { | ||
185 | [NETXBIG_LED_OFF] = 0, | ||
186 | [NETXBIG_LED_ON] = 1, | ||
187 | [NETXBIG_LED_SATA] = NETXBIG_LED_INVALID_MODE, | ||
188 | [NETXBIG_LED_TIMER1] = 3, | ||
189 | [NETXBIG_LED_TIMER2] = 7, | ||
190 | }; | ||
191 | |||
192 | static int netxbig_v2_blue_sata_mled[NETXBIG_LED_MODE_NUM] = { | ||
193 | [NETXBIG_LED_OFF] = 0, | ||
194 | [NETXBIG_LED_ON] = 7, | ||
195 | [NETXBIG_LED_SATA] = 1, | ||
196 | [NETXBIG_LED_TIMER1] = 3, | ||
197 | [NETXBIG_LED_TIMER2] = NETXBIG_LED_INVALID_MODE, | ||
198 | }; | ||
199 | |||
200 | static struct netxbig_led_timer netxbig_v2_led_timer[] = { | ||
201 | [0] = { | ||
202 | .delay_on = 500, | ||
203 | .delay_off = 500, | ||
204 | .mode = NETXBIG_LED_TIMER1, | ||
205 | }, | ||
206 | [1] = { | ||
207 | .delay_on = 500, | ||
208 | .delay_off = 1000, | ||
209 | .mode = NETXBIG_LED_TIMER2, | ||
210 | }, | ||
211 | }; | ||
212 | |||
213 | #define NETXBIG_LED(_name, maddr, mval, baddr) \ | ||
214 | { .name = _name, \ | ||
215 | .mode_addr = maddr, \ | ||
216 | .mode_val = mval, \ | ||
217 | .bright_addr = baddr } | ||
218 | |||
219 | static struct netxbig_led net2big_v2_leds_ctrl[] = { | ||
220 | NETXBIG_LED("net2big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), | ||
221 | NETXBIG_LED("net2big-v2:red:power", 0, netxbig_v2_red_mled, 1), | ||
222 | NETXBIG_LED("net2big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), | ||
223 | NETXBIG_LED("net2big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), | ||
224 | NETXBIG_LED("net2big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), | ||
225 | NETXBIG_LED("net2big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), | ||
226 | }; | ||
227 | |||
228 | static struct netxbig_led_platform_data net2big_v2_leds_data = { | ||
229 | .gpio_ext = &netxbig_v2_gpio_ext, | ||
230 | .timer = netxbig_v2_led_timer, | ||
231 | .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), | ||
232 | .leds = net2big_v2_leds_ctrl, | ||
233 | .num_leds = ARRAY_SIZE(net2big_v2_leds_ctrl), | ||
234 | }; | ||
235 | |||
236 | static struct netxbig_led net5big_v2_leds_ctrl[] = { | ||
237 | NETXBIG_LED("net5big-v2:blue:power", 0, netxbig_v2_blue_pwr_mled, 1), | ||
238 | NETXBIG_LED("net5big-v2:red:power", 0, netxbig_v2_red_mled, 1), | ||
239 | NETXBIG_LED("net5big-v2:blue:sata0", 3, netxbig_v2_blue_sata_mled, 2), | ||
240 | NETXBIG_LED("net5big-v2:red:sata0", 3, netxbig_v2_red_mled, 2), | ||
241 | NETXBIG_LED("net5big-v2:blue:sata1", 4, netxbig_v2_blue_sata_mled, 2), | ||
242 | NETXBIG_LED("net5big-v2:red:sata1", 4, netxbig_v2_red_mled, 2), | ||
243 | NETXBIG_LED("net5big-v2:blue:sata2", 5, netxbig_v2_blue_sata_mled, 2), | ||
244 | NETXBIG_LED("net5big-v2:red:sata2", 5, netxbig_v2_red_mled, 2), | ||
245 | NETXBIG_LED("net5big-v2:blue:sata3", 6, netxbig_v2_blue_sata_mled, 2), | ||
246 | NETXBIG_LED("net5big-v2:red:sata3", 6, netxbig_v2_red_mled, 2), | ||
247 | NETXBIG_LED("net5big-v2:blue:sata4", 7, netxbig_v2_blue_sata_mled, 2), | ||
248 | NETXBIG_LED("net5big-v2:red:sata5", 7, netxbig_v2_red_mled, 2), | ||
249 | }; | ||
250 | |||
251 | static struct netxbig_led_platform_data net5big_v2_leds_data = { | ||
252 | .gpio_ext = &netxbig_v2_gpio_ext, | ||
253 | .timer = netxbig_v2_led_timer, | ||
254 | .num_timer = ARRAY_SIZE(netxbig_v2_led_timer), | ||
255 | .leds = net5big_v2_leds_ctrl, | ||
256 | .num_leds = ARRAY_SIZE(net5big_v2_leds_ctrl), | ||
257 | }; | ||
258 | |||
259 | static struct platform_device netxbig_v2_leds = { | ||
260 | .name = "leds-netxbig", | ||
261 | .id = -1, | ||
262 | .dev = { | ||
263 | .platform_data = &net2big_v2_leds_data, | ||
264 | }, | ||
265 | }; | ||
266 | |||
267 | /***************************************************************************** | ||
268 | * General Setup | ||
269 | ****************************************************************************/ | ||
270 | |||
271 | static unsigned int net2big_v2_mpp_config[] __initdata = { | ||
272 | MPP0_SPI_SCn, | ||
273 | MPP1_SPI_MOSI, | ||
274 | MPP2_SPI_SCK, | ||
275 | MPP3_SPI_MISO, | ||
276 | MPP6_SYSRST_OUTn, | ||
277 | MPP7_GPO, /* Request power-off */ | ||
278 | MPP8_TW0_SDA, | ||
279 | MPP9_TW0_SCK, | ||
280 | MPP10_UART0_TXD, | ||
281 | MPP11_UART0_RXD, | ||
282 | MPP13_GPIO, /* Rear power switch (on|auto) */ | ||
283 | MPP14_GPIO, /* USB fuse alarm */ | ||
284 | MPP15_GPIO, /* Rear power switch (auto|off) */ | ||
285 | MPP16_GPIO, /* SATA HDD1 power */ | ||
286 | MPP17_GPIO, /* SATA HDD2 power */ | ||
287 | MPP20_SATA1_ACTn, | ||
288 | MPP21_SATA0_ACTn, | ||
289 | MPP24_GPIO, /* USB mode select */ | ||
290 | MPP26_GPIO, /* USB device vbus */ | ||
291 | MPP28_GPIO, /* USB enable host vbus */ | ||
292 | MPP29_GPIO, /* GPIO extension ALE */ | ||
293 | MPP34_GPIO, /* Rear Push button */ | ||
294 | MPP35_GPIO, /* Inhibit switch power-off */ | ||
295 | MPP36_GPIO, /* SATA HDD1 presence */ | ||
296 | MPP37_GPIO, /* SATA HDD2 presence */ | ||
297 | MPP40_GPIO, /* eSATA presence */ | ||
298 | MPP44_GPIO, /* GPIO extension (data 0) */ | ||
299 | MPP45_GPIO, /* GPIO extension (data 1) */ | ||
300 | MPP46_GPIO, /* GPIO extension (data 2) */ | ||
301 | MPP47_GPIO, /* GPIO extension (addr 0) */ | ||
302 | MPP48_GPIO, /* GPIO extension (addr 1) */ | ||
303 | MPP49_GPIO, /* GPIO extension (addr 2) */ | ||
304 | 0 | ||
305 | }; | ||
306 | |||
307 | static unsigned int net5big_v2_mpp_config[] __initdata = { | ||
308 | MPP0_SPI_SCn, | ||
309 | MPP1_SPI_MOSI, | ||
310 | MPP2_SPI_SCK, | ||
311 | MPP3_SPI_MISO, | ||
312 | MPP6_SYSRST_OUTn, | ||
313 | MPP7_GPO, /* Request power-off */ | ||
314 | MPP8_TW0_SDA, | ||
315 | MPP9_TW0_SCK, | ||
316 | MPP10_UART0_TXD, | ||
317 | MPP11_UART0_RXD, | ||
318 | MPP13_GPIO, /* Rear power switch (on|auto) */ | ||
319 | MPP14_GPIO, /* USB fuse alarm */ | ||
320 | MPP15_GPIO, /* Rear power switch (auto|off) */ | ||
321 | MPP16_GPIO, /* SATA HDD1 power */ | ||
322 | MPP17_GPIO, /* SATA HDD2 power */ | ||
323 | MPP20_GE1_TXD0, | ||
324 | MPP21_GE1_TXD1, | ||
325 | MPP22_GE1_TXD2, | ||
326 | MPP23_GE1_TXD3, | ||
327 | MPP24_GE1_RXD0, | ||
328 | MPP25_GE1_RXD1, | ||
329 | MPP26_GE1_RXD2, | ||
330 | MPP27_GE1_RXD3, | ||
331 | MPP28_GPIO, /* USB enable host vbus */ | ||
332 | MPP29_GPIO, /* GPIO extension ALE */ | ||
333 | MPP30_GE1_RXCTL, | ||
334 | MPP31_GE1_RXCLK, | ||
335 | MPP32_GE1_TCLKOUT, | ||
336 | MPP33_GE1_TXCTL, | ||
337 | MPP34_GPIO, /* Rear Push button */ | ||
338 | MPP35_GPIO, /* Inhibit switch power-off */ | ||
339 | MPP36_GPIO, /* SATA HDD1 presence */ | ||
340 | MPP37_GPIO, /* SATA HDD2 presence */ | ||
341 | MPP38_GPIO, /* SATA HDD3 presence */ | ||
342 | MPP39_GPIO, /* SATA HDD4 presence */ | ||
343 | MPP40_GPIO, /* SATA HDD5 presence */ | ||
344 | MPP41_GPIO, /* SATA HDD3 power */ | ||
345 | MPP42_GPIO, /* SATA HDD4 power */ | ||
346 | MPP43_GPIO, /* SATA HDD5 power */ | ||
347 | MPP44_GPIO, /* GPIO extension (data 0) */ | ||
348 | MPP45_GPIO, /* GPIO extension (data 1) */ | ||
349 | MPP46_GPIO, /* GPIO extension (data 2) */ | ||
350 | MPP47_GPIO, /* GPIO extension (addr 0) */ | ||
351 | MPP48_GPIO, /* GPIO extension (addr 1) */ | ||
352 | MPP49_GPIO, /* GPIO extension (addr 2) */ | ||
353 | 0 | ||
354 | }; | ||
355 | |||
356 | #define NETXBIG_V2_GPIO_POWER_OFF 7 | ||
357 | |||
358 | static void netxbig_v2_power_off(void) | ||
359 | { | ||
360 | gpio_set_value(NETXBIG_V2_GPIO_POWER_OFF, 1); | ||
361 | } | ||
362 | |||
363 | static void __init netxbig_v2_init(void) | ||
364 | { | ||
365 | /* | ||
366 | * Basic setup. Needs to be called early. | ||
367 | */ | ||
368 | kirkwood_init(); | ||
369 | if (machine_is_net2big_v2()) | ||
370 | kirkwood_mpp_conf(net2big_v2_mpp_config); | ||
371 | else | ||
372 | kirkwood_mpp_conf(net5big_v2_mpp_config); | ||
373 | |||
374 | if (machine_is_net2big_v2()) | ||
375 | lacie_v2_hdd_power_init(2); | ||
376 | else | ||
377 | lacie_v2_hdd_power_init(5); | ||
378 | |||
379 | kirkwood_ehci_init(); | ||
380 | kirkwood_ge00_init(&netxbig_v2_ge00_data); | ||
381 | if (machine_is_net5big_v2()) | ||
382 | kirkwood_ge01_init(&netxbig_v2_ge01_data); | ||
383 | kirkwood_sata_init(&netxbig_v2_sata_data); | ||
384 | kirkwood_uart0_init(); | ||
385 | lacie_v2_register_flash(); | ||
386 | lacie_v2_register_i2c_devices(); | ||
387 | |||
388 | if (machine_is_net5big_v2()) | ||
389 | netxbig_v2_leds.dev.platform_data = &net5big_v2_leds_data; | ||
390 | platform_device_register(&netxbig_v2_leds); | ||
391 | platform_device_register(&netxbig_v2_gpio_buttons); | ||
392 | |||
393 | if (gpio_request(NETXBIG_V2_GPIO_POWER_OFF, "power-off") == 0 && | ||
394 | gpio_direction_output(NETXBIG_V2_GPIO_POWER_OFF, 0) == 0) | ||
395 | pm_power_off = netxbig_v2_power_off; | ||
396 | else | ||
397 | pr_err("netxbig_v2: failed to configure power-off GPIO\n"); | ||
398 | } | ||
399 | |||
400 | #ifdef CONFIG_MACH_NET2BIG_V2 | ||
401 | MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") | ||
402 | .atag_offset = 0x100, | ||
403 | .init_machine = netxbig_v2_init, | ||
404 | .map_io = kirkwood_map_io, | ||
405 | .init_early = kirkwood_init_early, | ||
406 | .init_irq = kirkwood_init_irq, | ||
407 | .init_time = kirkwood_timer_init, | ||
408 | .restart = kirkwood_restart, | ||
409 | MACHINE_END | ||
410 | #endif | ||
411 | |||
412 | #ifdef CONFIG_MACH_NET5BIG_V2 | ||
413 | MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") | ||
414 | .atag_offset = 0x100, | ||
415 | .init_machine = netxbig_v2_init, | ||
416 | .map_io = kirkwood_map_io, | ||
417 | .init_early = kirkwood_init_early, | ||
418 | .init_irq = kirkwood_init_irq, | ||
419 | .init_time = kirkwood_timer_init, | ||
420 | .restart = kirkwood_restart, | ||
421 | MACHINE_END | ||
422 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c deleted file mode 100644 index e5cf84103583..000000000000 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ /dev/null | |||
@@ -1,255 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/openrd-setup.c | ||
3 | * | ||
4 | * Marvell OpenRD (Base|Client|Ultimate) Board Setup | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/mtd/nand.h> | ||
15 | #include <linux/mtd/partitions.h> | ||
16 | #include <linux/ata_platform.h> | ||
17 | #include <linux/mv643xx_eth.h> | ||
18 | #include <linux/i2c.h> | ||
19 | #include <linux/gpio.h> | ||
20 | #include <asm/mach-types.h> | ||
21 | #include <asm/mach/arch.h> | ||
22 | #include <mach/kirkwood.h> | ||
23 | #include <linux/platform_data/mmc-mvsdio.h> | ||
24 | #include "common.h" | ||
25 | #include "mpp.h" | ||
26 | |||
27 | static struct mtd_partition openrd_nand_parts[] = { | ||
28 | { | ||
29 | .name = "u-boot", | ||
30 | .offset = 0, | ||
31 | .size = SZ_1M, | ||
32 | .mask_flags = MTD_WRITEABLE | ||
33 | }, { | ||
34 | .name = "uImage", | ||
35 | .offset = MTDPART_OFS_NXTBLK, | ||
36 | .size = SZ_4M | ||
37 | }, { | ||
38 | .name = "root", | ||
39 | .offset = MTDPART_OFS_NXTBLK, | ||
40 | .size = MTDPART_SIZ_FULL | ||
41 | }, | ||
42 | }; | ||
43 | |||
44 | static struct mv643xx_eth_platform_data openrd_ge00_data = { | ||
45 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
46 | }; | ||
47 | |||
48 | static struct mv643xx_eth_platform_data openrd_ge01_data = { | ||
49 | .phy_addr = MV643XX_ETH_PHY_ADDR(24), | ||
50 | }; | ||
51 | |||
52 | static struct mv_sata_platform_data openrd_sata_data = { | ||
53 | .n_ports = 2, | ||
54 | }; | ||
55 | |||
56 | static struct mvsdio_platform_data openrd_mvsdio_data = { | ||
57 | .gpio_card_detect = 29, /* MPP29 used as SD card detect */ | ||
58 | .gpio_write_protect = -1, | ||
59 | }; | ||
60 | |||
61 | static unsigned int openrd_mpp_config[] __initdata = { | ||
62 | MPP12_SD_CLK, | ||
63 | MPP13_SD_CMD, | ||
64 | MPP14_SD_D0, | ||
65 | MPP15_SD_D1, | ||
66 | MPP16_SD_D2, | ||
67 | MPP17_SD_D3, | ||
68 | MPP28_GPIO, | ||
69 | MPP29_GPIO, | ||
70 | MPP34_GPIO, | ||
71 | 0 | ||
72 | }; | ||
73 | |||
74 | /* Configure MPP for UART1 */ | ||
75 | static unsigned int openrd_uart1_mpp_config[] __initdata = { | ||
76 | MPP13_UART1_TXD, | ||
77 | MPP14_UART1_RXD, | ||
78 | 0 | ||
79 | }; | ||
80 | |||
81 | static struct i2c_board_info i2c_board_info[] __initdata = { | ||
82 | { | ||
83 | I2C_BOARD_INFO("cs42l51", 0x4a), | ||
84 | }, | ||
85 | }; | ||
86 | |||
87 | static struct platform_device openrd_client_audio_device = { | ||
88 | .name = "openrd-client-audio", | ||
89 | .id = -1, | ||
90 | }; | ||
91 | |||
92 | static int __initdata uart1; | ||
93 | |||
94 | static int __init sd_uart_selection(char *str) | ||
95 | { | ||
96 | uart1 = -EINVAL; | ||
97 | |||
98 | /* Default is SD. Change if required, for UART */ | ||
99 | if (!str) | ||
100 | return 0; | ||
101 | |||
102 | if (!strncmp(str, "232", 3)) { | ||
103 | uart1 = 232; | ||
104 | } else if (!strncmp(str, "485", 3)) { | ||
105 | /* OpenRD-Base doesn't have RS485. Treat is as an | ||
106 | * unknown argument & just have default setting - | ||
107 | * which is SD */ | ||
108 | if (machine_is_openrd_base()) { | ||
109 | uart1 = -ENODEV; | ||
110 | return 1; | ||
111 | } | ||
112 | |||
113 | uart1 = 485; | ||
114 | } | ||
115 | return 1; | ||
116 | } | ||
117 | /* Parse boot_command_line string kw_openrd_init_uart1=232/485 */ | ||
118 | __setup("kw_openrd_init_uart1=", sd_uart_selection); | ||
119 | |||
120 | static int __init uart1_mpp_config(void) | ||
121 | { | ||
122 | kirkwood_mpp_conf(openrd_uart1_mpp_config); | ||
123 | |||
124 | if (gpio_request(34, "SD_UART1_SEL")) { | ||
125 | pr_err("GPIO request 34 failed for SD/UART1 selection\n"); | ||
126 | return -EIO; | ||
127 | } | ||
128 | |||
129 | if (gpio_request(28, "RS232_RS485_SEL")) { | ||
130 | pr_err("GPIO request 28 failed for RS232/RS485 selection\n"); | ||
131 | gpio_free(34); | ||
132 | return -EIO; | ||
133 | } | ||
134 | |||
135 | /* Select UART1 | ||
136 | * Pin # 34: 0 => UART1, 1 => SD */ | ||
137 | gpio_direction_output(34, 0); | ||
138 | |||
139 | /* Select RS232 OR RS485 | ||
140 | * Pin # 28: 0 => RS232, 1 => RS485 */ | ||
141 | if (uart1 == 232) | ||
142 | gpio_direction_output(28, 0); | ||
143 | else | ||
144 | gpio_direction_output(28, 1); | ||
145 | |||
146 | gpio_free(34); | ||
147 | gpio_free(28); | ||
148 | |||
149 | return 0; | ||
150 | } | ||
151 | |||
152 | static void __init openrd_init(void) | ||
153 | { | ||
154 | /* | ||
155 | * Basic setup. Needs to be called early. | ||
156 | */ | ||
157 | kirkwood_init(); | ||
158 | kirkwood_mpp_conf(openrd_mpp_config); | ||
159 | |||
160 | kirkwood_uart0_init(); | ||
161 | kirkwood_nand_init(openrd_nand_parts, ARRAY_SIZE(openrd_nand_parts), | ||
162 | 25); | ||
163 | |||
164 | kirkwood_ehci_init(); | ||
165 | |||
166 | if (machine_is_openrd_ultimate()) { | ||
167 | openrd_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); | ||
168 | openrd_ge01_data.phy_addr = MV643XX_ETH_PHY_ADDR(1); | ||
169 | } | ||
170 | |||
171 | kirkwood_ge00_init(&openrd_ge00_data); | ||
172 | if (!machine_is_openrd_base()) | ||
173 | kirkwood_ge01_init(&openrd_ge01_data); | ||
174 | |||
175 | kirkwood_sata_init(&openrd_sata_data); | ||
176 | |||
177 | kirkwood_i2c_init(); | ||
178 | |||
179 | if (machine_is_openrd_client() || machine_is_openrd_ultimate()) { | ||
180 | platform_device_register(&openrd_client_audio_device); | ||
181 | i2c_register_board_info(0, i2c_board_info, | ||
182 | ARRAY_SIZE(i2c_board_info)); | ||
183 | kirkwood_audio_init(); | ||
184 | } | ||
185 | |||
186 | if (uart1 <= 0) { | ||
187 | if (uart1 < 0) | ||
188 | pr_err("Invalid kernel parameter to select UART1. Defaulting to SD. ERROR CODE: %d\n", | ||
189 | uart1); | ||
190 | |||
191 | /* Select SD | ||
192 | * Pin # 34: 0 => UART1, 1 => SD */ | ||
193 | if (gpio_request(34, "SD_UART1_SEL")) { | ||
194 | pr_err("GPIO request 34 failed for SD/UART1 selection\n"); | ||
195 | } else { | ||
196 | |||
197 | gpio_direction_output(34, 1); | ||
198 | gpio_free(34); | ||
199 | kirkwood_sdio_init(&openrd_mvsdio_data); | ||
200 | } | ||
201 | } else { | ||
202 | if (!uart1_mpp_config()) | ||
203 | kirkwood_uart1_init(); | ||
204 | } | ||
205 | } | ||
206 | |||
207 | static int __init openrd_pci_init(void) | ||
208 | { | ||
209 | if (machine_is_openrd_base() || | ||
210 | machine_is_openrd_client() || | ||
211 | machine_is_openrd_ultimate()) | ||
212 | kirkwood_pcie_init(KW_PCIE0); | ||
213 | |||
214 | return 0; | ||
215 | } | ||
216 | subsys_initcall(openrd_pci_init); | ||
217 | |||
218 | #ifdef CONFIG_MACH_OPENRD_BASE | ||
219 | MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") | ||
220 | /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ | ||
221 | .atag_offset = 0x100, | ||
222 | .init_machine = openrd_init, | ||
223 | .map_io = kirkwood_map_io, | ||
224 | .init_early = kirkwood_init_early, | ||
225 | .init_irq = kirkwood_init_irq, | ||
226 | .init_time = kirkwood_timer_init, | ||
227 | .restart = kirkwood_restart, | ||
228 | MACHINE_END | ||
229 | #endif | ||
230 | |||
231 | #ifdef CONFIG_MACH_OPENRD_CLIENT | ||
232 | MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") | ||
233 | /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ | ||
234 | .atag_offset = 0x100, | ||
235 | .init_machine = openrd_init, | ||
236 | .map_io = kirkwood_map_io, | ||
237 | .init_early = kirkwood_init_early, | ||
238 | .init_irq = kirkwood_init_irq, | ||
239 | .init_time = kirkwood_timer_init, | ||
240 | .restart = kirkwood_restart, | ||
241 | MACHINE_END | ||
242 | #endif | ||
243 | |||
244 | #ifdef CONFIG_MACH_OPENRD_ULTIMATE | ||
245 | MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") | ||
246 | /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ | ||
247 | .atag_offset = 0x100, | ||
248 | .init_machine = openrd_init, | ||
249 | .map_io = kirkwood_map_io, | ||
250 | .init_early = kirkwood_init_early, | ||
251 | .init_irq = kirkwood_init_irq, | ||
252 | .init_time = kirkwood_timer_init, | ||
253 | .restart = kirkwood_restart, | ||
254 | MACHINE_END | ||
255 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c deleted file mode 100644 index 12d86f39f380..000000000000 --- a/arch/arm/mach-kirkwood/pcie.c +++ /dev/null | |||
@@ -1,296 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/pcie.c | ||
3 | * | ||
4 | * PCIe functions for Marvell Kirkwood SoCs | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/pci.h> | ||
13 | #include <linux/slab.h> | ||
14 | #include <linux/clk.h> | ||
15 | #include <linux/mbus.h> | ||
16 | #include <video/vga.h> | ||
17 | #include <asm/irq.h> | ||
18 | #include <asm/mach/pci.h> | ||
19 | #include <plat/pcie.h> | ||
20 | #include <mach/bridge-regs.h> | ||
21 | #include "common.h" | ||
22 | |||
23 | /* These can go away once Kirkwood uses the mvebu-mbus DT binding */ | ||
24 | #define KIRKWOOD_MBUS_PCIE0_MEM_TARGET 0x4 | ||
25 | #define KIRKWOOD_MBUS_PCIE0_MEM_ATTR 0xe8 | ||
26 | #define KIRKWOOD_MBUS_PCIE0_IO_TARGET 0x4 | ||
27 | #define KIRKWOOD_MBUS_PCIE0_IO_ATTR 0xe0 | ||
28 | #define KIRKWOOD_MBUS_PCIE1_MEM_TARGET 0x4 | ||
29 | #define KIRKWOOD_MBUS_PCIE1_MEM_ATTR 0xd8 | ||
30 | #define KIRKWOOD_MBUS_PCIE1_IO_TARGET 0x4 | ||
31 | #define KIRKWOOD_MBUS_PCIE1_IO_ATTR 0xd0 | ||
32 | |||
33 | static void kirkwood_enable_pcie_clk(const char *port) | ||
34 | { | ||
35 | struct clk *clk; | ||
36 | |||
37 | clk = clk_get_sys("pcie", port); | ||
38 | if (IS_ERR(clk)) { | ||
39 | pr_err("PCIE clock %s missing\n", port); | ||
40 | return; | ||
41 | } | ||
42 | clk_prepare_enable(clk); | ||
43 | clk_put(clk); | ||
44 | } | ||
45 | |||
46 | /* This function is called very early in the boot when probing the | ||
47 | hardware to determine what we actually are, and what rate tclk is | ||
48 | ticking at. Hence calling kirkwood_enable_pcie_clk() is not | ||
49 | possible since the clk tree has not been created yet. */ | ||
50 | void kirkwood_enable_pcie(void) | ||
51 | { | ||
52 | u32 curr = readl(CLOCK_GATING_CTRL); | ||
53 | if (!(curr & CGC_PEX0)) | ||
54 | writel(curr | CGC_PEX0, CLOCK_GATING_CTRL); | ||
55 | } | ||
56 | |||
57 | void kirkwood_pcie_id(u32 *dev, u32 *rev) | ||
58 | { | ||
59 | kirkwood_enable_pcie(); | ||
60 | *dev = orion_pcie_dev_id(PCIE_VIRT_BASE); | ||
61 | *rev = orion_pcie_rev(PCIE_VIRT_BASE); | ||
62 | } | ||
63 | |||
64 | struct pcie_port { | ||
65 | u8 root_bus_nr; | ||
66 | void __iomem *base; | ||
67 | spinlock_t conf_lock; | ||
68 | int irq; | ||
69 | struct resource res; | ||
70 | }; | ||
71 | |||
72 | static int pcie_port_map[2]; | ||
73 | static int num_pcie_ports; | ||
74 | |||
75 | static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) | ||
76 | { | ||
77 | /* | ||
78 | * Don't go out when trying to access -- | ||
79 | * 1. nonexisting device on local bus | ||
80 | * 2. where there's no device connected (no link) | ||
81 | */ | ||
82 | if (bus == pp->root_bus_nr && dev == 0) | ||
83 | return 1; | ||
84 | |||
85 | if (!orion_pcie_link_up(pp->base)) | ||
86 | return 0; | ||
87 | |||
88 | if (bus == pp->root_bus_nr && dev != 1) | ||
89 | return 0; | ||
90 | |||
91 | return 1; | ||
92 | } | ||
93 | |||
94 | |||
95 | /* | ||
96 | * PCIe config cycles are done by programming the PCIE_CONF_ADDR register | ||
97 | * and then reading the PCIE_CONF_DATA register. Need to make sure these | ||
98 | * transactions are atomic. | ||
99 | */ | ||
100 | |||
101 | static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, | ||
102 | int size, u32 *val) | ||
103 | { | ||
104 | struct pci_sys_data *sys = bus->sysdata; | ||
105 | struct pcie_port *pp = sys->private_data; | ||
106 | unsigned long flags; | ||
107 | int ret; | ||
108 | |||
109 | if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) { | ||
110 | *val = 0xffffffff; | ||
111 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
112 | } | ||
113 | |||
114 | spin_lock_irqsave(&pp->conf_lock, flags); | ||
115 | ret = orion_pcie_rd_conf(pp->base, bus, devfn, where, size, val); | ||
116 | spin_unlock_irqrestore(&pp->conf_lock, flags); | ||
117 | |||
118 | return ret; | ||
119 | } | ||
120 | |||
121 | static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, | ||
122 | int where, int size, u32 val) | ||
123 | { | ||
124 | struct pci_sys_data *sys = bus->sysdata; | ||
125 | struct pcie_port *pp = sys->private_data; | ||
126 | unsigned long flags; | ||
127 | int ret; | ||
128 | |||
129 | if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) | ||
130 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
131 | |||
132 | spin_lock_irqsave(&pp->conf_lock, flags); | ||
133 | ret = orion_pcie_wr_conf(pp->base, bus, devfn, where, size, val); | ||
134 | spin_unlock_irqrestore(&pp->conf_lock, flags); | ||
135 | |||
136 | return ret; | ||
137 | } | ||
138 | |||
139 | static struct pci_ops pcie_ops = { | ||
140 | .read = pcie_rd_conf, | ||
141 | .write = pcie_wr_conf, | ||
142 | }; | ||
143 | |||
144 | static void __init pcie0_ioresources_init(struct pcie_port *pp) | ||
145 | { | ||
146 | pp->base = PCIE_VIRT_BASE; | ||
147 | pp->irq = IRQ_KIRKWOOD_PCIE; | ||
148 | |||
149 | /* | ||
150 | * IORESOURCE_MEM | ||
151 | */ | ||
152 | pp->res.name = "PCIe 0 MEM"; | ||
153 | pp->res.start = KIRKWOOD_PCIE_MEM_PHYS_BASE; | ||
154 | pp->res.end = pp->res.start + KIRKWOOD_PCIE_MEM_SIZE - 1; | ||
155 | pp->res.flags = IORESOURCE_MEM; | ||
156 | } | ||
157 | |||
158 | static void __init pcie1_ioresources_init(struct pcie_port *pp) | ||
159 | { | ||
160 | pp->base = PCIE1_VIRT_BASE; | ||
161 | pp->irq = IRQ_KIRKWOOD_PCIE1; | ||
162 | |||
163 | /* | ||
164 | * IORESOURCE_MEM | ||
165 | */ | ||
166 | pp->res.name = "PCIe 1 MEM"; | ||
167 | pp->res.start = KIRKWOOD_PCIE1_MEM_PHYS_BASE; | ||
168 | pp->res.end = pp->res.start + KIRKWOOD_PCIE1_MEM_SIZE - 1; | ||
169 | pp->res.flags = IORESOURCE_MEM; | ||
170 | } | ||
171 | |||
172 | static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) | ||
173 | { | ||
174 | struct pcie_port *pp; | ||
175 | int index; | ||
176 | |||
177 | if (nr >= num_pcie_ports) | ||
178 | return 0; | ||
179 | |||
180 | index = pcie_port_map[nr]; | ||
181 | pr_info("PCI: bus%d uses PCIe port %d\n", sys->busnr, index); | ||
182 | |||
183 | pp = kzalloc(sizeof(*pp), GFP_KERNEL); | ||
184 | if (!pp) | ||
185 | panic("PCIe: failed to allocate pcie_port data"); | ||
186 | sys->private_data = pp; | ||
187 | pp->root_bus_nr = sys->busnr; | ||
188 | spin_lock_init(&pp->conf_lock); | ||
189 | |||
190 | switch (index) { | ||
191 | case 0: | ||
192 | kirkwood_enable_pcie_clk("0"); | ||
193 | pcie0_ioresources_init(pp); | ||
194 | pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE_IO_PHYS_BASE); | ||
195 | break; | ||
196 | case 1: | ||
197 | kirkwood_enable_pcie_clk("1"); | ||
198 | pcie1_ioresources_init(pp); | ||
199 | pci_ioremap_io(SZ_64K * sys->busnr, | ||
200 | KIRKWOOD_PCIE1_IO_PHYS_BASE); | ||
201 | break; | ||
202 | default: | ||
203 | panic("PCIe setup: invalid controller %d", index); | ||
204 | } | ||
205 | |||
206 | if (request_resource(&iomem_resource, &pp->res)) | ||
207 | panic("Request PCIe%d Memory resource failed\n", index); | ||
208 | |||
209 | pci_add_resource_offset(&sys->resources, &pp->res, sys->mem_offset); | ||
210 | |||
211 | /* | ||
212 | * Generic PCIe unit setup. | ||
213 | */ | ||
214 | orion_pcie_set_local_bus_nr(pp->base, sys->busnr); | ||
215 | |||
216 | orion_pcie_setup(pp->base); | ||
217 | |||
218 | return 1; | ||
219 | } | ||
220 | |||
221 | /* | ||
222 | * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it | ||
223 | * is operating as a root complex this needs to be switched to | ||
224 | * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on | ||
225 | * the device. Decoding setup is handled by the orion code. | ||
226 | */ | ||
227 | static void rc_pci_fixup(struct pci_dev *dev) | ||
228 | { | ||
229 | if (dev->bus->parent == NULL && dev->devfn == 0) { | ||
230 | int i; | ||
231 | |||
232 | dev->class &= 0xff; | ||
233 | dev->class |= PCI_CLASS_BRIDGE_HOST << 8; | ||
234 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | ||
235 | dev->resource[i].start = 0; | ||
236 | dev->resource[i].end = 0; | ||
237 | dev->resource[i].flags = 0; | ||
238 | } | ||
239 | } | ||
240 | } | ||
241 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup); | ||
242 | |||
243 | static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, | ||
244 | u8 pin) | ||
245 | { | ||
246 | struct pci_sys_data *sys = dev->sysdata; | ||
247 | struct pcie_port *pp = sys->private_data; | ||
248 | |||
249 | return pp->irq; | ||
250 | } | ||
251 | |||
252 | static struct hw_pci kirkwood_pci __initdata = { | ||
253 | .setup = kirkwood_pcie_setup, | ||
254 | .map_irq = kirkwood_pcie_map_irq, | ||
255 | .ops = &pcie_ops, | ||
256 | }; | ||
257 | |||
258 | static void __init add_pcie_port(int index, void __iomem *base) | ||
259 | { | ||
260 | pcie_port_map[num_pcie_ports++] = index; | ||
261 | pr_info("Kirkwood PCIe port %d: link %s\n", index, | ||
262 | orion_pcie_link_up(base) ? "up" : "down"); | ||
263 | } | ||
264 | |||
265 | void __init kirkwood_pcie_init(unsigned int portmask) | ||
266 | { | ||
267 | mvebu_mbus_add_window_remap_by_id(KIRKWOOD_MBUS_PCIE0_IO_TARGET, | ||
268 | KIRKWOOD_MBUS_PCIE0_IO_ATTR, | ||
269 | KIRKWOOD_PCIE_IO_PHYS_BASE, | ||
270 | KIRKWOOD_PCIE_IO_SIZE, | ||
271 | KIRKWOOD_PCIE_IO_BUS_BASE); | ||
272 | mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_PCIE0_MEM_TARGET, | ||
273 | KIRKWOOD_MBUS_PCIE0_MEM_ATTR, | ||
274 | KIRKWOOD_PCIE_MEM_PHYS_BASE, | ||
275 | KIRKWOOD_PCIE_MEM_SIZE); | ||
276 | mvebu_mbus_add_window_remap_by_id(KIRKWOOD_MBUS_PCIE1_IO_TARGET, | ||
277 | KIRKWOOD_MBUS_PCIE1_IO_ATTR, | ||
278 | KIRKWOOD_PCIE1_IO_PHYS_BASE, | ||
279 | KIRKWOOD_PCIE1_IO_SIZE, | ||
280 | KIRKWOOD_PCIE1_IO_BUS_BASE); | ||
281 | mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_PCIE1_MEM_TARGET, | ||
282 | KIRKWOOD_MBUS_PCIE1_MEM_ATTR, | ||
283 | KIRKWOOD_PCIE1_MEM_PHYS_BASE, | ||
284 | KIRKWOOD_PCIE1_MEM_SIZE); | ||
285 | |||
286 | vga_base = KIRKWOOD_PCIE_MEM_PHYS_BASE; | ||
287 | |||
288 | if (portmask & KW_PCIE0) | ||
289 | add_pcie_port(0, PCIE_VIRT_BASE); | ||
290 | |||
291 | if (portmask & KW_PCIE1) | ||
292 | add_pcie_port(1, PCIE1_VIRT_BASE); | ||
293 | |||
294 | kirkwood_pci.nr_controllers = num_pcie_ports; | ||
295 | pci_common_init(&kirkwood_pci); | ||
296 | } | ||
diff --git a/arch/arm/mach-kirkwood/pm.c b/arch/arm/mach-kirkwood/pm.c deleted file mode 100644 index 8e5e0329d04c..000000000000 --- a/arch/arm/mach-kirkwood/pm.c +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* | ||
2 | * Power Management driver for Marvell Kirkwood SoCs | ||
3 | * | ||
4 | * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com> | ||
5 | * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License, | ||
9 | * version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/suspend.h> | ||
19 | #include <linux/io.h> | ||
20 | #include <mach/bridge-regs.h> | ||
21 | #include "common.h" | ||
22 | |||
23 | static void __iomem *ddr_operation_base; | ||
24 | static void __iomem *memory_pm_ctrl; | ||
25 | |||
26 | static void kirkwood_low_power(void) | ||
27 | { | ||
28 | u32 mem_pm_ctrl; | ||
29 | |||
30 | mem_pm_ctrl = readl(memory_pm_ctrl); | ||
31 | |||
32 | /* Set peripherals to low-power mode */ | ||
33 | writel_relaxed(~0, memory_pm_ctrl); | ||
34 | |||
35 | /* Set DDR in self-refresh */ | ||
36 | writel_relaxed(0x7, ddr_operation_base); | ||
37 | |||
38 | /* | ||
39 | * Set CPU in wait-for-interrupt state. | ||
40 | * This disables the CPU core clocks, | ||
41 | * the array clocks, and also the L2 controller. | ||
42 | */ | ||
43 | cpu_do_idle(); | ||
44 | |||
45 | writel_relaxed(mem_pm_ctrl, memory_pm_ctrl); | ||
46 | } | ||
47 | |||
48 | static int kirkwood_suspend_enter(suspend_state_t state) | ||
49 | { | ||
50 | switch (state) { | ||
51 | case PM_SUSPEND_STANDBY: | ||
52 | kirkwood_low_power(); | ||
53 | break; | ||
54 | default: | ||
55 | return -EINVAL; | ||
56 | } | ||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | static int kirkwood_pm_valid_standby(suspend_state_t state) | ||
61 | { | ||
62 | return state == PM_SUSPEND_STANDBY; | ||
63 | } | ||
64 | |||
65 | static const struct platform_suspend_ops kirkwood_suspend_ops = { | ||
66 | .enter = kirkwood_suspend_enter, | ||
67 | .valid = kirkwood_pm_valid_standby, | ||
68 | }; | ||
69 | |||
70 | void __init kirkwood_pm_init(void) | ||
71 | { | ||
72 | ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4); | ||
73 | memory_pm_ctrl = ioremap(MEMORY_PM_CTRL_PHYS, 4); | ||
74 | |||
75 | suspend_set_ops(&kirkwood_suspend_ops); | ||
76 | } | ||
diff --git a/arch/arm/mach-kirkwood/pm.h b/arch/arm/mach-kirkwood/pm.h deleted file mode 100644 index 21e7530f368b..000000000000 --- a/arch/arm/mach-kirkwood/pm.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Power Management driver for Marvell Kirkwood SoCs | ||
3 | * | ||
4 | * Copyright (C) 2013 Ezequiel Garcia <ezequiel@free-electrons.com> | ||
5 | * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License, | ||
9 | * version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __ARCH_KIRKWOOD_PM_H | ||
18 | #define __ARCH_KIRKWOOD_PM_H | ||
19 | |||
20 | #ifdef CONFIG_PM | ||
21 | void kirkwood_pm_init(void); | ||
22 | #else | ||
23 | static inline void kirkwood_pm_init(void) {}; | ||
24 | #endif | ||
25 | |||
26 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c deleted file mode 100644 index e4fd3129d36f..000000000000 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/rd88f6192-nas-setup.c | ||
3 | * | ||
4 | * Marvell RD-88F6192-NAS Reference Board Setup | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/ata_platform.h> | ||
15 | #include <linux/mv643xx_eth.h> | ||
16 | #include <linux/gpio.h> | ||
17 | #include <linux/spi/flash.h> | ||
18 | #include <linux/spi/spi.h> | ||
19 | #include <asm/mach-types.h> | ||
20 | #include <asm/mach/arch.h> | ||
21 | #include <mach/kirkwood.h> | ||
22 | #include <plat/orion-gpio.h> | ||
23 | #include "common.h" | ||
24 | |||
25 | #define RD88F6192_GPIO_USB_VBUS 10 | ||
26 | |||
27 | static struct mv643xx_eth_platform_data rd88f6192_ge00_data = { | ||
28 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
29 | }; | ||
30 | |||
31 | static struct mv_sata_platform_data rd88f6192_sata_data = { | ||
32 | .n_ports = 2, | ||
33 | }; | ||
34 | |||
35 | static const struct flash_platform_data rd88F6192_spi_slave_data = { | ||
36 | .type = "m25p128", | ||
37 | }; | ||
38 | |||
39 | static struct spi_board_info __initdata rd88F6192_spi_slave_info[] = { | ||
40 | { | ||
41 | .modalias = "m25p80", | ||
42 | .platform_data = &rd88F6192_spi_slave_data, | ||
43 | .irq = -1, | ||
44 | .max_speed_hz = 20000000, | ||
45 | .bus_num = 0, | ||
46 | .chip_select = 0, | ||
47 | }, | ||
48 | }; | ||
49 | |||
50 | static void __init rd88f6192_init(void) | ||
51 | { | ||
52 | /* | ||
53 | * Basic setup. Needs to be called early. | ||
54 | */ | ||
55 | kirkwood_init(); | ||
56 | |||
57 | orion_gpio_set_valid(RD88F6192_GPIO_USB_VBUS, 1); | ||
58 | if (gpio_request(RD88F6192_GPIO_USB_VBUS, "USB VBUS") != 0 || | ||
59 | gpio_direction_output(RD88F6192_GPIO_USB_VBUS, 1) != 0) | ||
60 | pr_err("RD-88F6192-NAS: failed to setup USB VBUS GPIO\n"); | ||
61 | |||
62 | kirkwood_ehci_init(); | ||
63 | kirkwood_ge00_init(&rd88f6192_ge00_data); | ||
64 | kirkwood_sata_init(&rd88f6192_sata_data); | ||
65 | spi_register_board_info(rd88F6192_spi_slave_info, | ||
66 | ARRAY_SIZE(rd88F6192_spi_slave_info)); | ||
67 | kirkwood_spi_init(); | ||
68 | kirkwood_uart0_init(); | ||
69 | } | ||
70 | |||
71 | static int __init rd88f6192_pci_init(void) | ||
72 | { | ||
73 | if (machine_is_rd88f6192_nas()) | ||
74 | kirkwood_pcie_init(KW_PCIE0); | ||
75 | |||
76 | return 0; | ||
77 | } | ||
78 | subsys_initcall(rd88f6192_pci_init); | ||
79 | |||
80 | MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board") | ||
81 | /* Maintainer: Saeed Bishara <saeed@marvell.com> */ | ||
82 | .atag_offset = 0x100, | ||
83 | .init_machine = rd88f6192_init, | ||
84 | .map_io = kirkwood_map_io, | ||
85 | .init_early = kirkwood_init_early, | ||
86 | .init_irq = kirkwood_init_irq, | ||
87 | .init_time = kirkwood_timer_init, | ||
88 | .restart = kirkwood_restart, | ||
89 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c deleted file mode 100644 index 5154bd2a3ad3..000000000000 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ /dev/null | |||
@@ -1,128 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/rd88f6281-setup.c | ||
3 | * | ||
4 | * Marvell RD-88F6281 Reference Board Setup | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/irq.h> | ||
15 | #include <linux/mtd/partitions.h> | ||
16 | #include <linux/ata_platform.h> | ||
17 | #include <linux/mv643xx_eth.h> | ||
18 | #include <linux/ethtool.h> | ||
19 | #include <net/dsa.h> | ||
20 | #include <asm/mach-types.h> | ||
21 | #include <asm/mach/arch.h> | ||
22 | #include <mach/kirkwood.h> | ||
23 | #include <linux/platform_data/mmc-mvsdio.h> | ||
24 | #include "common.h" | ||
25 | #include "mpp.h" | ||
26 | |||
27 | static struct mtd_partition rd88f6281_nand_parts[] = { | ||
28 | { | ||
29 | .name = "u-boot", | ||
30 | .offset = 0, | ||
31 | .size = SZ_1M | ||
32 | }, { | ||
33 | .name = "uImage", | ||
34 | .offset = MTDPART_OFS_NXTBLK, | ||
35 | .size = SZ_2M | ||
36 | }, { | ||
37 | .name = "root", | ||
38 | .offset = MTDPART_OFS_NXTBLK, | ||
39 | .size = MTDPART_SIZ_FULL | ||
40 | }, | ||
41 | }; | ||
42 | |||
43 | static struct mv643xx_eth_platform_data rd88f6281_ge00_data = { | ||
44 | .phy_addr = MV643XX_ETH_PHY_NONE, | ||
45 | .speed = SPEED_1000, | ||
46 | .duplex = DUPLEX_FULL, | ||
47 | }; | ||
48 | |||
49 | static struct dsa_chip_data rd88f6281_switch_chip_data = { | ||
50 | .port_names[0] = "lan1", | ||
51 | .port_names[1] = "lan2", | ||
52 | .port_names[2] = "lan3", | ||
53 | .port_names[3] = "lan4", | ||
54 | .port_names[5] = "cpu", | ||
55 | }; | ||
56 | |||
57 | static struct dsa_platform_data rd88f6281_switch_plat_data = { | ||
58 | .nr_chips = 1, | ||
59 | .chip = &rd88f6281_switch_chip_data, | ||
60 | }; | ||
61 | |||
62 | static struct mv643xx_eth_platform_data rd88f6281_ge01_data = { | ||
63 | .phy_addr = MV643XX_ETH_PHY_ADDR(11), | ||
64 | }; | ||
65 | |||
66 | static struct mv_sata_platform_data rd88f6281_sata_data = { | ||
67 | .n_ports = 2, | ||
68 | }; | ||
69 | |||
70 | static struct mvsdio_platform_data rd88f6281_mvsdio_data = { | ||
71 | .gpio_card_detect = 28, | ||
72 | .gpio_write_protect = -1, | ||
73 | }; | ||
74 | |||
75 | static unsigned int rd88f6281_mpp_config[] __initdata = { | ||
76 | MPP28_GPIO, | ||
77 | 0 | ||
78 | }; | ||
79 | |||
80 | static void __init rd88f6281_init(void) | ||
81 | { | ||
82 | u32 dev, rev; | ||
83 | |||
84 | /* | ||
85 | * Basic setup. Needs to be called early. | ||
86 | */ | ||
87 | kirkwood_init(); | ||
88 | kirkwood_mpp_conf(rd88f6281_mpp_config); | ||
89 | |||
90 | kirkwood_nand_init(rd88f6281_nand_parts, | ||
91 | ARRAY_SIZE(rd88f6281_nand_parts), | ||
92 | 25); | ||
93 | kirkwood_ehci_init(); | ||
94 | |||
95 | kirkwood_ge00_init(&rd88f6281_ge00_data); | ||
96 | kirkwood_pcie_id(&dev, &rev); | ||
97 | if (rev == MV88F6281_REV_A0) { | ||
98 | rd88f6281_switch_chip_data.sw_addr = 10; | ||
99 | kirkwood_ge01_init(&rd88f6281_ge01_data); | ||
100 | } else { | ||
101 | rd88f6281_switch_chip_data.port_names[4] = "wan"; | ||
102 | } | ||
103 | kirkwood_ge00_switch_init(&rd88f6281_switch_plat_data, NO_IRQ); | ||
104 | |||
105 | kirkwood_sata_init(&rd88f6281_sata_data); | ||
106 | kirkwood_sdio_init(&rd88f6281_mvsdio_data); | ||
107 | kirkwood_uart0_init(); | ||
108 | } | ||
109 | |||
110 | static int __init rd88f6281_pci_init(void) | ||
111 | { | ||
112 | if (machine_is_rd88f6281()) | ||
113 | kirkwood_pcie_init(KW_PCIE0); | ||
114 | |||
115 | return 0; | ||
116 | } | ||
117 | subsys_initcall(rd88f6281_pci_init); | ||
118 | |||
119 | MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board") | ||
120 | /* Maintainer: Saeed Bishara <saeed@marvell.com> */ | ||
121 | .atag_offset = 0x100, | ||
122 | .init_machine = rd88f6281_init, | ||
123 | .map_io = kirkwood_map_io, | ||
124 | .init_early = kirkwood_init_early, | ||
125 | .init_irq = kirkwood_init_irq, | ||
126 | .init_time = kirkwood_timer_init, | ||
127 | .restart = kirkwood_restart, | ||
128 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c deleted file mode 100644 index 8736f8c97518..000000000000 --- a/arch/arm/mach-kirkwood/t5325-setup.c +++ /dev/null | |||
@@ -1,216 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * HP t5325 Thin Client setup | ||
4 | * | ||
5 | * Copyright (C) 2010 Martin Michlmayr <tbm@cyrius.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/mtd/physmap.h> | ||
17 | #include <linux/spi/flash.h> | ||
18 | #include <linux/spi/spi.h> | ||
19 | #include <linux/i2c.h> | ||
20 | #include <linux/mv643xx_eth.h> | ||
21 | #include <linux/ata_platform.h> | ||
22 | #include <linux/gpio.h> | ||
23 | #include <linux/gpio_keys.h> | ||
24 | #include <linux/input.h> | ||
25 | #include <sound/alc5623.h> | ||
26 | #include <asm/mach-types.h> | ||
27 | #include <asm/mach/arch.h> | ||
28 | #include <mach/kirkwood.h> | ||
29 | #include "common.h" | ||
30 | #include "mpp.h" | ||
31 | |||
32 | static struct mtd_partition hp_t5325_partitions[] = { | ||
33 | { | ||
34 | .name = "u-boot env", | ||
35 | .size = SZ_64K, | ||
36 | .offset = SZ_512K + SZ_256K, | ||
37 | }, | ||
38 | { | ||
39 | .name = "permanent u-boot env", | ||
40 | .size = SZ_64K, | ||
41 | .offset = MTDPART_OFS_APPEND, | ||
42 | .mask_flags = MTD_WRITEABLE, | ||
43 | }, | ||
44 | { | ||
45 | .name = "HP env", | ||
46 | .size = SZ_64K, | ||
47 | .offset = MTDPART_OFS_APPEND, | ||
48 | }, | ||
49 | { | ||
50 | .name = "u-boot", | ||
51 | .size = SZ_512K, | ||
52 | .offset = 0, | ||
53 | .mask_flags = MTD_WRITEABLE, | ||
54 | }, | ||
55 | { | ||
56 | .name = "SSD firmware", | ||
57 | .size = SZ_256K, | ||
58 | .offset = SZ_512K, | ||
59 | }, | ||
60 | }; | ||
61 | |||
62 | static const struct flash_platform_data hp_t5325_flash = { | ||
63 | .type = "mx25l8005", | ||
64 | .name = "spi_flash", | ||
65 | .parts = hp_t5325_partitions, | ||
66 | .nr_parts = ARRAY_SIZE(hp_t5325_partitions), | ||
67 | }; | ||
68 | |||
69 | static struct spi_board_info __initdata hp_t5325_spi_slave_info[] = { | ||
70 | { | ||
71 | .modalias = "m25p80", | ||
72 | .platform_data = &hp_t5325_flash, | ||
73 | .irq = -1, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | static struct mv643xx_eth_platform_data hp_t5325_ge00_data = { | ||
78 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
79 | }; | ||
80 | |||
81 | static struct mv_sata_platform_data hp_t5325_sata_data = { | ||
82 | .n_ports = 2, | ||
83 | }; | ||
84 | |||
85 | static struct gpio_keys_button hp_t5325_buttons[] = { | ||
86 | { | ||
87 | .code = KEY_POWER, | ||
88 | .gpio = 45, | ||
89 | .desc = "Power", | ||
90 | .active_low = 1, | ||
91 | }, | ||
92 | }; | ||
93 | |||
94 | static struct gpio_keys_platform_data hp_t5325_button_data = { | ||
95 | .buttons = hp_t5325_buttons, | ||
96 | .nbuttons = ARRAY_SIZE(hp_t5325_buttons), | ||
97 | }; | ||
98 | |||
99 | static struct platform_device hp_t5325_button_device = { | ||
100 | .name = "gpio-keys", | ||
101 | .id = -1, | ||
102 | .num_resources = 0, | ||
103 | .dev = { | ||
104 | .platform_data = &hp_t5325_button_data, | ||
105 | } | ||
106 | }; | ||
107 | |||
108 | static struct platform_device hp_t5325_audio_device = { | ||
109 | .name = "t5325-audio", | ||
110 | .id = -1, | ||
111 | }; | ||
112 | |||
113 | static unsigned int hp_t5325_mpp_config[] __initdata = { | ||
114 | MPP0_NF_IO2, | ||
115 | MPP1_SPI_MOSI, | ||
116 | MPP2_SPI_SCK, | ||
117 | MPP3_SPI_MISO, | ||
118 | MPP4_NF_IO6, | ||
119 | MPP5_NF_IO7, | ||
120 | MPP6_SYSRST_OUTn, | ||
121 | MPP7_SPI_SCn, | ||
122 | MPP8_TW0_SDA, | ||
123 | MPP9_TW0_SCK, | ||
124 | MPP10_UART0_TXD, | ||
125 | MPP11_UART0_RXD, | ||
126 | MPP12_SD_CLK, | ||
127 | MPP13_GPIO, | ||
128 | MPP14_GPIO, | ||
129 | MPP15_GPIO, | ||
130 | MPP16_GPIO, | ||
131 | MPP17_GPIO, | ||
132 | MPP18_NF_IO0, | ||
133 | MPP19_NF_IO1, | ||
134 | MPP20_GPIO, | ||
135 | MPP21_GPIO, | ||
136 | MPP22_GPIO, | ||
137 | MPP23_GPIO, | ||
138 | MPP32_GPIO, | ||
139 | MPP33_GE1_TXCTL, | ||
140 | MPP39_AU_I2SBCLK, | ||
141 | MPP40_AU_I2SDO, | ||
142 | MPP43_AU_I2SDI, | ||
143 | MPP41_AU_I2SLRCLK, | ||
144 | MPP42_AU_I2SMCLK, | ||
145 | MPP45_GPIO, /* Power button */ | ||
146 | MPP48_GPIO, /* Board power off */ | ||
147 | 0 | ||
148 | }; | ||
149 | |||
150 | static struct alc5623_platform_data alc5621_data = { | ||
151 | .add_ctrl = 0x3700, | ||
152 | .jack_det_ctrl = 0x4810, | ||
153 | }; | ||
154 | |||
155 | static struct i2c_board_info i2c_board_info[] __initdata = { | ||
156 | { | ||
157 | I2C_BOARD_INFO("alc5621", 0x1a), | ||
158 | .platform_data = &alc5621_data, | ||
159 | }, | ||
160 | }; | ||
161 | |||
162 | #define HP_T5325_GPIO_POWER_OFF 48 | ||
163 | |||
164 | static void hp_t5325_power_off(void) | ||
165 | { | ||
166 | gpio_set_value(HP_T5325_GPIO_POWER_OFF, 1); | ||
167 | } | ||
168 | |||
169 | static void __init hp_t5325_init(void) | ||
170 | { | ||
171 | /* | ||
172 | * Basic setup. Needs to be called early. | ||
173 | */ | ||
174 | kirkwood_init(); | ||
175 | kirkwood_mpp_conf(hp_t5325_mpp_config); | ||
176 | |||
177 | kirkwood_uart0_init(); | ||
178 | spi_register_board_info(hp_t5325_spi_slave_info, | ||
179 | ARRAY_SIZE(hp_t5325_spi_slave_info)); | ||
180 | kirkwood_spi_init(); | ||
181 | kirkwood_i2c_init(); | ||
182 | kirkwood_ge00_init(&hp_t5325_ge00_data); | ||
183 | kirkwood_sata_init(&hp_t5325_sata_data); | ||
184 | kirkwood_ehci_init(); | ||
185 | platform_device_register(&hp_t5325_button_device); | ||
186 | platform_device_register(&hp_t5325_audio_device); | ||
187 | |||
188 | i2c_register_board_info(0, i2c_board_info, ARRAY_SIZE(i2c_board_info)); | ||
189 | kirkwood_audio_init(); | ||
190 | |||
191 | if (gpio_request(HP_T5325_GPIO_POWER_OFF, "power-off") == 0 && | ||
192 | gpio_direction_output(HP_T5325_GPIO_POWER_OFF, 0) == 0) | ||
193 | pm_power_off = hp_t5325_power_off; | ||
194 | else | ||
195 | pr_err("t5325: failed to configure power-off GPIO\n"); | ||
196 | } | ||
197 | |||
198 | static int __init hp_t5325_pci_init(void) | ||
199 | { | ||
200 | if (machine_is_t5325()) | ||
201 | kirkwood_pcie_init(KW_PCIE0); | ||
202 | |||
203 | return 0; | ||
204 | } | ||
205 | subsys_initcall(hp_t5325_pci_init); | ||
206 | |||
207 | MACHINE_START(T5325, "HP t5325 Thin Client") | ||
208 | /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ | ||
209 | .atag_offset = 0x100, | ||
210 | .init_machine = hp_t5325_init, | ||
211 | .map_io = kirkwood_map_io, | ||
212 | .init_early = kirkwood_init_early, | ||
213 | .init_irq = kirkwood_init_irq, | ||
214 | .init_time = kirkwood_timer_init, | ||
215 | .restart = kirkwood_restart, | ||
216 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c deleted file mode 100644 index e1267d6b468f..000000000000 --- a/arch/arm/mach-kirkwood/ts219-setup.c +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * QNAP TS-11x/TS-21x Turbo NAS Board Setup | ||
4 | * | ||
5 | * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com> | ||
6 | * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the License, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/i2c.h> | ||
18 | #include <linux/mv643xx_eth.h> | ||
19 | #include <linux/ata_platform.h> | ||
20 | #include <linux/gpio_keys.h> | ||
21 | #include <linux/input.h> | ||
22 | #include <asm/mach-types.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | #include <mach/kirkwood.h> | ||
25 | #include "common.h" | ||
26 | #include "mpp.h" | ||
27 | #include "tsx1x-common.h" | ||
28 | |||
29 | static struct i2c_board_info __initdata qnap_ts219_i2c_rtc = { | ||
30 | I2C_BOARD_INFO("s35390a", 0x30), | ||
31 | }; | ||
32 | |||
33 | static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = { | ||
34 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
35 | }; | ||
36 | |||
37 | static struct mv_sata_platform_data qnap_ts219_sata_data = { | ||
38 | .n_ports = 2, | ||
39 | }; | ||
40 | |||
41 | static struct gpio_keys_button qnap_ts219_buttons[] = { | ||
42 | { | ||
43 | .code = KEY_COPY, | ||
44 | .gpio = 15, | ||
45 | .desc = "USB Copy", | ||
46 | .active_low = 1, | ||
47 | }, | ||
48 | { | ||
49 | .code = KEY_RESTART, | ||
50 | .gpio = 16, | ||
51 | .desc = "Reset", | ||
52 | .active_low = 1, | ||
53 | }, | ||
54 | }; | ||
55 | |||
56 | static struct gpio_keys_platform_data qnap_ts219_button_data = { | ||
57 | .buttons = qnap_ts219_buttons, | ||
58 | .nbuttons = ARRAY_SIZE(qnap_ts219_buttons), | ||
59 | }; | ||
60 | |||
61 | static struct platform_device qnap_ts219_button_device = { | ||
62 | .name = "gpio-keys", | ||
63 | .id = -1, | ||
64 | .num_resources = 0, | ||
65 | .dev = { | ||
66 | .platform_data = &qnap_ts219_button_data, | ||
67 | } | ||
68 | }; | ||
69 | |||
70 | static unsigned int qnap_ts219_mpp_config[] __initdata = { | ||
71 | MPP0_SPI_SCn, | ||
72 | MPP1_SPI_MOSI, | ||
73 | MPP2_SPI_SCK, | ||
74 | MPP3_SPI_MISO, | ||
75 | MPP4_SATA1_ACTn, | ||
76 | MPP5_SATA0_ACTn, | ||
77 | MPP8_TW0_SDA, | ||
78 | MPP9_TW0_SCK, | ||
79 | MPP10_UART0_TXD, | ||
80 | MPP11_UART0_RXD, | ||
81 | MPP13_UART1_TXD, /* PIC controller */ | ||
82 | MPP14_UART1_RXD, /* PIC controller */ | ||
83 | MPP15_GPIO, /* USB Copy button (on devices with 88F6281) */ | ||
84 | MPP16_GPIO, /* Reset button (on devices with 88F6281) */ | ||
85 | MPP36_GPIO, /* RAM: 0: 256 MB, 1: 512 MB */ | ||
86 | MPP37_GPIO, /* Reset button (on devices with 88F6282) */ | ||
87 | MPP43_GPIO, /* USB Copy button (on devices with 88F6282) */ | ||
88 | MPP44_GPIO, /* Board ID: 0: TS-11x, 1: TS-21x */ | ||
89 | 0 | ||
90 | }; | ||
91 | |||
92 | static void __init qnap_ts219_init(void) | ||
93 | { | ||
94 | u32 dev, rev; | ||
95 | |||
96 | /* | ||
97 | * Basic setup. Needs to be called early. | ||
98 | */ | ||
99 | kirkwood_init(); | ||
100 | kirkwood_mpp_conf(qnap_ts219_mpp_config); | ||
101 | |||
102 | kirkwood_uart0_init(); | ||
103 | kirkwood_uart1_init(); /* A PIC controller is connected here. */ | ||
104 | qnap_tsx1x_register_flash(); | ||
105 | kirkwood_i2c_init(); | ||
106 | i2c_register_board_info(0, &qnap_ts219_i2c_rtc, 1); | ||
107 | |||
108 | kirkwood_pcie_id(&dev, &rev); | ||
109 | if (dev == MV88F6282_DEV_ID) { | ||
110 | qnap_ts219_buttons[0].gpio = 43; /* USB Copy button */ | ||
111 | qnap_ts219_buttons[1].gpio = 37; /* Reset button */ | ||
112 | qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); | ||
113 | } | ||
114 | |||
115 | kirkwood_ge00_init(&qnap_ts219_ge00_data); | ||
116 | kirkwood_sata_init(&qnap_ts219_sata_data); | ||
117 | kirkwood_ehci_init(); | ||
118 | platform_device_register(&qnap_ts219_button_device); | ||
119 | |||
120 | pm_power_off = qnap_tsx1x_power_off; | ||
121 | |||
122 | } | ||
123 | |||
124 | static int __init ts219_pci_init(void) | ||
125 | { | ||
126 | if (machine_is_ts219()) | ||
127 | kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0); | ||
128 | |||
129 | return 0; | ||
130 | } | ||
131 | subsys_initcall(ts219_pci_init); | ||
132 | |||
133 | MACHINE_START(TS219, "QNAP TS-119/TS-219") | ||
134 | /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ | ||
135 | .atag_offset = 0x100, | ||
136 | .init_machine = qnap_ts219_init, | ||
137 | .map_io = kirkwood_map_io, | ||
138 | .init_early = kirkwood_init_early, | ||
139 | .init_irq = kirkwood_init_irq, | ||
140 | .init_time = kirkwood_timer_init, | ||
141 | .restart = kirkwood_restart, | ||
142 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c deleted file mode 100644 index 81d585806b2f..000000000000 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ /dev/null | |||
@@ -1,186 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS Board Setup | ||
4 | * | ||
5 | * Copyright (C) 2009-2010 Martin Michlmayr <tbm@cyrius.com> | ||
6 | * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the License, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/i2c.h> | ||
18 | #include <linux/mv643xx_eth.h> | ||
19 | #include <linux/ata_platform.h> | ||
20 | #include <linux/gpio.h> | ||
21 | #include <linux/gpio_keys.h> | ||
22 | #include <linux/input.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | #include <asm/mach/arch.h> | ||
26 | #include <mach/kirkwood.h> | ||
27 | #include "common.h" | ||
28 | #include "mpp.h" | ||
29 | #include "tsx1x-common.h" | ||
30 | |||
31 | /* for the PCIe reset workaround */ | ||
32 | #include <plat/pcie.h> | ||
33 | |||
34 | |||
35 | #define QNAP_TS41X_JUMPER_JP1 45 | ||
36 | |||
37 | static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { | ||
38 | I2C_BOARD_INFO("s35390a", 0x30), | ||
39 | }; | ||
40 | |||
41 | static struct mv643xx_eth_platform_data qnap_ts41x_ge00_data = { | ||
42 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
43 | }; | ||
44 | |||
45 | static struct mv643xx_eth_platform_data qnap_ts41x_ge01_data = { | ||
46 | .phy_addr = MV643XX_ETH_PHY_ADDR(0), | ||
47 | }; | ||
48 | |||
49 | static struct mv_sata_platform_data qnap_ts41x_sata_data = { | ||
50 | .n_ports = 2, | ||
51 | }; | ||
52 | |||
53 | static struct gpio_keys_button qnap_ts41x_buttons[] = { | ||
54 | { | ||
55 | .code = KEY_COPY, | ||
56 | .gpio = 43, | ||
57 | .desc = "USB Copy", | ||
58 | .active_low = 1, | ||
59 | }, | ||
60 | { | ||
61 | .code = KEY_RESTART, | ||
62 | .gpio = 37, | ||
63 | .desc = "Reset", | ||
64 | .active_low = 1, | ||
65 | }, | ||
66 | }; | ||
67 | |||
68 | static struct gpio_keys_platform_data qnap_ts41x_button_data = { | ||
69 | .buttons = qnap_ts41x_buttons, | ||
70 | .nbuttons = ARRAY_SIZE(qnap_ts41x_buttons), | ||
71 | }; | ||
72 | |||
73 | static struct platform_device qnap_ts41x_button_device = { | ||
74 | .name = "gpio-keys", | ||
75 | .id = -1, | ||
76 | .num_resources = 0, | ||
77 | .dev = { | ||
78 | .platform_data = &qnap_ts41x_button_data, | ||
79 | } | ||
80 | }; | ||
81 | |||
82 | static unsigned int qnap_ts41x_mpp_config[] __initdata = { | ||
83 | MPP0_SPI_SCn, | ||
84 | MPP1_SPI_MOSI, | ||
85 | MPP2_SPI_SCK, | ||
86 | MPP3_SPI_MISO, | ||
87 | MPP6_SYSRST_OUTn, | ||
88 | MPP7_PEX_RST_OUTn, | ||
89 | MPP8_TW0_SDA, | ||
90 | MPP9_TW0_SCK, | ||
91 | MPP10_UART0_TXD, | ||
92 | MPP11_UART0_RXD, | ||
93 | MPP13_UART1_TXD, /* PIC controller */ | ||
94 | MPP14_UART1_RXD, /* PIC controller */ | ||
95 | MPP15_SATA0_ACTn, | ||
96 | MPP16_SATA1_ACTn, | ||
97 | MPP20_GE1_TXD0, | ||
98 | MPP21_GE1_TXD1, | ||
99 | MPP22_GE1_TXD2, | ||
100 | MPP23_GE1_TXD3, | ||
101 | MPP24_GE1_RXD0, | ||
102 | MPP25_GE1_RXD1, | ||
103 | MPP26_GE1_RXD2, | ||
104 | MPP27_GE1_RXD3, | ||
105 | MPP30_GE1_RXCTL, | ||
106 | MPP31_GE1_RXCLK, | ||
107 | MPP32_GE1_TCLKOUT, | ||
108 | MPP33_GE1_TXCTL, | ||
109 | MPP36_GPIO, /* RAM: 0: 256 MB, 1: 512 MB */ | ||
110 | MPP37_GPIO, /* Reset button */ | ||
111 | MPP43_GPIO, /* USB Copy button */ | ||
112 | MPP44_GPIO, /* Board ID: 0: TS-419U, 1: TS-419 */ | ||
113 | MPP45_GPIO, /* JP1: 0: LCD, 1: serial console */ | ||
114 | MPP46_GPIO, /* External SATA HDD1 error indicator */ | ||
115 | MPP47_GPIO, /* External SATA HDD2 error indicator */ | ||
116 | MPP48_GPIO, /* External SATA HDD3 error indicator */ | ||
117 | MPP49_GPIO, /* External SATA HDD4 error indicator */ | ||
118 | 0 | ||
119 | }; | ||
120 | |||
121 | static void __init qnap_ts41x_init(void) | ||
122 | { | ||
123 | u32 dev, rev; | ||
124 | |||
125 | /* | ||
126 | * Basic setup. Needs to be called early. | ||
127 | */ | ||
128 | kirkwood_init(); | ||
129 | kirkwood_mpp_conf(qnap_ts41x_mpp_config); | ||
130 | |||
131 | kirkwood_uart0_init(); | ||
132 | kirkwood_uart1_init(); /* A PIC controller is connected here. */ | ||
133 | qnap_tsx1x_register_flash(); | ||
134 | kirkwood_i2c_init(); | ||
135 | i2c_register_board_info(0, &qnap_ts41x_i2c_rtc, 1); | ||
136 | |||
137 | kirkwood_pcie_id(&dev, &rev); | ||
138 | if (dev == MV88F6282_DEV_ID) { | ||
139 | qnap_ts41x_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); | ||
140 | qnap_ts41x_ge01_data.phy_addr = MV643XX_ETH_PHY_ADDR(1); | ||
141 | } | ||
142 | kirkwood_ge00_init(&qnap_ts41x_ge00_data); | ||
143 | kirkwood_ge01_init(&qnap_ts41x_ge01_data); | ||
144 | |||
145 | kirkwood_sata_init(&qnap_ts41x_sata_data); | ||
146 | kirkwood_ehci_init(); | ||
147 | platform_device_register(&qnap_ts41x_button_device); | ||
148 | |||
149 | pm_power_off = qnap_tsx1x_power_off; | ||
150 | |||
151 | if (gpio_request(QNAP_TS41X_JUMPER_JP1, "JP1") == 0) | ||
152 | gpio_export(QNAP_TS41X_JUMPER_JP1, 0); | ||
153 | } | ||
154 | |||
155 | static int __init ts41x_pci_init(void) | ||
156 | { | ||
157 | if (machine_is_ts41x()) { | ||
158 | u32 dev, rev; | ||
159 | |||
160 | /* | ||
161 | * Without this explicit reset, the PCIe SATA controller | ||
162 | * (Marvell 88sx7042/sata_mv) is known to stop working | ||
163 | * after a few minutes. | ||
164 | */ | ||
165 | orion_pcie_reset(PCIE_VIRT_BASE); | ||
166 | |||
167 | kirkwood_pcie_id(&dev, &rev); | ||
168 | if (dev == MV88F6282_DEV_ID) | ||
169 | kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0); | ||
170 | else | ||
171 | kirkwood_pcie_init(KW_PCIE0); | ||
172 | } | ||
173 | return 0; | ||
174 | } | ||
175 | subsys_initcall(ts41x_pci_init); | ||
176 | |||
177 | MACHINE_START(TS41X, "QNAP TS-41x") | ||
178 | /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ | ||
179 | .atag_offset = 0x100, | ||
180 | .init_machine = qnap_ts41x_init, | ||
181 | .map_io = kirkwood_map_io, | ||
182 | .init_early = kirkwood_init_early, | ||
183 | .init_irq = kirkwood_init_irq, | ||
184 | .init_time = kirkwood_timer_init, | ||
185 | .restart = kirkwood_restart, | ||
186 | MACHINE_END | ||
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c deleted file mode 100644 index cec87cef76ca..000000000000 --- a/arch/arm/mach-kirkwood/tsx1x-common.c +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | #include <linux/kernel.h> | ||
2 | #include <linux/pci.h> | ||
3 | #include <linux/platform_device.h> | ||
4 | #include <linux/mtd/physmap.h> | ||
5 | #include <linux/spi/flash.h> | ||
6 | #include <linux/spi/spi.h> | ||
7 | #include <linux/serial_reg.h> | ||
8 | #include <mach/kirkwood.h> | ||
9 | #include "common.h" | ||
10 | #include "tsx1x-common.h" | ||
11 | |||
12 | /* | ||
13 | * QNAP TS-x1x Boards flash | ||
14 | */ | ||
15 | |||
16 | /**************************************************************************** | ||
17 | * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the | ||
18 | * partitions on the device because we want to keep compatibility with | ||
19 | * the QNAP firmware. | ||
20 | * Layout as used by QNAP: | ||
21 | * 0x00000000-0x00080000 : "U-Boot" | ||
22 | * 0x00200000-0x00400000 : "Kernel" | ||
23 | * 0x00400000-0x00d00000 : "RootFS" | ||
24 | * 0x00d00000-0x01000000 : "RootFS2" | ||
25 | * 0x00080000-0x000c0000 : "U-Boot Config" | ||
26 | * 0x000c0000-0x00200000 : "NAS Config" | ||
27 | * | ||
28 | * We'll use "RootFS1" instead of "RootFS" to stay compatible with the layout | ||
29 | * used by the QNAP TS-109/TS-209. | ||
30 | * | ||
31 | ***************************************************************************/ | ||
32 | |||
33 | static struct mtd_partition qnap_tsx1x_partitions[] = { | ||
34 | { | ||
35 | .name = "U-Boot", | ||
36 | .size = 0x00080000, | ||
37 | .offset = 0, | ||
38 | .mask_flags = MTD_WRITEABLE, | ||
39 | }, { | ||
40 | .name = "Kernel", | ||
41 | .size = 0x00200000, | ||
42 | .offset = 0x00200000, | ||
43 | }, { | ||
44 | .name = "RootFS1", | ||
45 | .size = 0x00900000, | ||
46 | .offset = 0x00400000, | ||
47 | }, { | ||
48 | .name = "RootFS2", | ||
49 | .size = 0x00300000, | ||
50 | .offset = 0x00d00000, | ||
51 | }, { | ||
52 | .name = "U-Boot Config", | ||
53 | .size = 0x00040000, | ||
54 | .offset = 0x00080000, | ||
55 | }, { | ||
56 | .name = "NAS Config", | ||
57 | .size = 0x00140000, | ||
58 | .offset = 0x000c0000, | ||
59 | }, | ||
60 | }; | ||
61 | |||
62 | static const struct flash_platform_data qnap_tsx1x_flash = { | ||
63 | .type = "m25p128", | ||
64 | .name = "spi_flash", | ||
65 | .parts = qnap_tsx1x_partitions, | ||
66 | .nr_parts = ARRAY_SIZE(qnap_tsx1x_partitions), | ||
67 | }; | ||
68 | |||
69 | static struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = { | ||
70 | { | ||
71 | .modalias = "m25p80", | ||
72 | .platform_data = &qnap_tsx1x_flash, | ||
73 | .irq = -1, | ||
74 | .max_speed_hz = 20000000, | ||
75 | .bus_num = 0, | ||
76 | .chip_select = 0, | ||
77 | }, | ||
78 | }; | ||
79 | |||
80 | void __init qnap_tsx1x_register_flash(void) | ||
81 | { | ||
82 | spi_register_board_info(qnap_tsx1x_spi_slave_info, | ||
83 | ARRAY_SIZE(qnap_tsx1x_spi_slave_info)); | ||
84 | kirkwood_spi_init(); | ||
85 | } | ||
86 | |||
87 | |||
88 | /***************************************************************************** | ||
89 | * QNAP TS-x1x specific power off method via UART1-attached PIC | ||
90 | ****************************************************************************/ | ||
91 | |||
92 | #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) | ||
93 | |||
94 | void qnap_tsx1x_power_off(void) | ||
95 | { | ||
96 | /* 19200 baud divisor */ | ||
97 | const unsigned divisor = ((kirkwood_tclk + (8 * 19200)) / (16 * 19200)); | ||
98 | |||
99 | pr_info("%s: triggering power-off...\n", __func__); | ||
100 | |||
101 | /* hijack UART1 and reset into sane state (19200,8n1) */ | ||
102 | writel(0x83, UART1_REG(LCR)); | ||
103 | writel(divisor & 0xff, UART1_REG(DLL)); | ||
104 | writel((divisor >> 8) & 0xff, UART1_REG(DLM)); | ||
105 | writel(0x03, UART1_REG(LCR)); | ||
106 | writel(0x00, UART1_REG(IER)); | ||
107 | writel(0x00, UART1_REG(FCR)); | ||
108 | writel(0x00, UART1_REG(MCR)); | ||
109 | |||
110 | /* send the power-off command 'A' to PIC */ | ||
111 | writel('A', UART1_REG(TX)); | ||
112 | } | ||
113 | |||
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.h b/arch/arm/mach-kirkwood/tsx1x-common.h deleted file mode 100644 index 7fa037361b55..000000000000 --- a/arch/arm/mach-kirkwood/tsx1x-common.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H | ||
2 | #define __ARCH_KIRKWOOD_TSX1X_COMMON_H | ||
3 | |||
4 | extern void __init qnap_tsx1x_register_flash(void); | ||
5 | extern void qnap_tsx1x_power_off(void); | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c348eaee7ee2..c35f0ec9c929 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -854,7 +854,7 @@ config OUTER_CACHE_SYNC | |||
854 | 854 | ||
855 | config CACHE_FEROCEON_L2 | 855 | config CACHE_FEROCEON_L2 |
856 | bool "Enable the Feroceon L2 cache controller" | 856 | bool "Enable the Feroceon L2 cache controller" |
857 | depends on ARCH_KIRKWOOD || ARCH_MV78XX0 || ARCH_MVEBU | 857 | depends on ARCH_MV78XX0 || ARCH_MVEBU |
858 | default y | 858 | default y |
859 | select OUTER_CACHE | 859 | select OUTER_CACHE |
860 | help | 860 | help |