diff options
author | Mark Brown <broonie@linaro.org> | 2013-10-24 06:24:07 -0400 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-10-24 06:24:07 -0400 |
commit | 4131770d540820c9514ccd3cf363daba9c902882 (patch) | |
tree | 21327f0ce55997965151d6619e04e232bdc55ee3 | |
parent | 1a4ca437e4b93dbc19b2e2a5a9e4ee2df01acd67 (diff) | |
parent | 14acbbbbc649c4c6057f601396b8000cd616d9ad (diff) |
Merge remote-tracking branch 'asoc/topic/max98095' into asoc-next
-rw-r--r-- | sound/soc/codecs/max98095.c | 466 |
1 files changed, 170 insertions, 296 deletions
diff --git a/sound/soc/codecs/max98095.c b/sound/soc/codecs/max98095.c index 8dbcacd44e6a..8fb072455802 100644 --- a/sound/soc/codecs/max98095.c +++ b/sound/soc/codecs/max98095.c | |||
@@ -39,6 +39,7 @@ struct max98095_cdata { | |||
39 | }; | 39 | }; |
40 | 40 | ||
41 | struct max98095_priv { | 41 | struct max98095_priv { |
42 | struct regmap *regmap; | ||
42 | enum max98095_type devtype; | 43 | enum max98095_type devtype; |
43 | struct max98095_pdata *pdata; | 44 | struct max98095_pdata *pdata; |
44 | unsigned int sysclk; | 45 | unsigned int sysclk; |
@@ -56,263 +57,145 @@ struct max98095_priv { | |||
56 | struct snd_soc_jack *mic_jack; | 57 | struct snd_soc_jack *mic_jack; |
57 | }; | 58 | }; |
58 | 59 | ||
59 | static const u8 max98095_reg_def[M98095_REG_CNT] = { | 60 | static const struct reg_default max98095_reg_def[] = { |
60 | 0x00, /* 00 */ | 61 | { 0xf, 0x00 }, /* 0F */ |
61 | 0x00, /* 01 */ | 62 | { 0x10, 0x00 }, /* 10 */ |
62 | 0x00, /* 02 */ | 63 | { 0x11, 0x00 }, /* 11 */ |
63 | 0x00, /* 03 */ | 64 | { 0x12, 0x00 }, /* 12 */ |
64 | 0x00, /* 04 */ | 65 | { 0x13, 0x00 }, /* 13 */ |
65 | 0x00, /* 05 */ | 66 | { 0x14, 0x00 }, /* 14 */ |
66 | 0x00, /* 06 */ | 67 | { 0x15, 0x00 }, /* 15 */ |
67 | 0x00, /* 07 */ | 68 | { 0x16, 0x00 }, /* 16 */ |
68 | 0x00, /* 08 */ | 69 | { 0x17, 0x00 }, /* 17 */ |
69 | 0x00, /* 09 */ | 70 | { 0x18, 0x00 }, /* 18 */ |
70 | 0x00, /* 0A */ | 71 | { 0x19, 0x00 }, /* 19 */ |
71 | 0x00, /* 0B */ | 72 | { 0x1a, 0x00 }, /* 1A */ |
72 | 0x00, /* 0C */ | 73 | { 0x1b, 0x00 }, /* 1B */ |
73 | 0x00, /* 0D */ | 74 | { 0x1c, 0x00 }, /* 1C */ |
74 | 0x00, /* 0E */ | 75 | { 0x1d, 0x00 }, /* 1D */ |
75 | 0x00, /* 0F */ | 76 | { 0x1e, 0x00 }, /* 1E */ |
76 | 0x00, /* 10 */ | 77 | { 0x1f, 0x00 }, /* 1F */ |
77 | 0x00, /* 11 */ | 78 | { 0x20, 0x00 }, /* 20 */ |
78 | 0x00, /* 12 */ | 79 | { 0x21, 0x00 }, /* 21 */ |
79 | 0x00, /* 13 */ | 80 | { 0x22, 0x00 }, /* 22 */ |
80 | 0x00, /* 14 */ | 81 | { 0x23, 0x00 }, /* 23 */ |
81 | 0x00, /* 15 */ | 82 | { 0x24, 0x00 }, /* 24 */ |
82 | 0x00, /* 16 */ | 83 | { 0x25, 0x00 }, /* 25 */ |
83 | 0x00, /* 17 */ | 84 | { 0x26, 0x00 }, /* 26 */ |
84 | 0x00, /* 18 */ | 85 | { 0x27, 0x00 }, /* 27 */ |
85 | 0x00, /* 19 */ | 86 | { 0x28, 0x00 }, /* 28 */ |
86 | 0x00, /* 1A */ | 87 | { 0x29, 0x00 }, /* 29 */ |
87 | 0x00, /* 1B */ | 88 | { 0x2a, 0x00 }, /* 2A */ |
88 | 0x00, /* 1C */ | 89 | { 0x2b, 0x00 }, /* 2B */ |
89 | 0x00, /* 1D */ | 90 | { 0x2c, 0x00 }, /* 2C */ |
90 | 0x00, /* 1E */ | 91 | { 0x2d, 0x00 }, /* 2D */ |
91 | 0x00, /* 1F */ | 92 | { 0x2e, 0x00 }, /* 2E */ |
92 | 0x00, /* 20 */ | 93 | { 0x2f, 0x00 }, /* 2F */ |
93 | 0x00, /* 21 */ | 94 | { 0x30, 0x00 }, /* 30 */ |
94 | 0x00, /* 22 */ | 95 | { 0x31, 0x00 }, /* 31 */ |
95 | 0x00, /* 23 */ | 96 | { 0x32, 0x00 }, /* 32 */ |
96 | 0x00, /* 24 */ | 97 | { 0x33, 0x00 }, /* 33 */ |
97 | 0x00, /* 25 */ | 98 | { 0x34, 0x00 }, /* 34 */ |
98 | 0x00, /* 26 */ | 99 | { 0x35, 0x00 }, /* 35 */ |
99 | 0x00, /* 27 */ | 100 | { 0x36, 0x00 }, /* 36 */ |
100 | 0x00, /* 28 */ | 101 | { 0x37, 0x00 }, /* 37 */ |
101 | 0x00, /* 29 */ | 102 | { 0x38, 0x00 }, /* 38 */ |
102 | 0x00, /* 2A */ | 103 | { 0x39, 0x00 }, /* 39 */ |
103 | 0x00, /* 2B */ | 104 | { 0x3a, 0x00 }, /* 3A */ |
104 | 0x00, /* 2C */ | 105 | { 0x3b, 0x00 }, /* 3B */ |
105 | 0x00, /* 2D */ | 106 | { 0x3c, 0x00 }, /* 3C */ |
106 | 0x00, /* 2E */ | 107 | { 0x3d, 0x00 }, /* 3D */ |
107 | 0x00, /* 2F */ | 108 | { 0x3e, 0x00 }, /* 3E */ |
108 | 0x00, /* 30 */ | 109 | { 0x3f, 0x00 }, /* 3F */ |
109 | 0x00, /* 31 */ | 110 | { 0x40, 0x00 }, /* 40 */ |
110 | 0x00, /* 32 */ | 111 | { 0x41, 0x00 }, /* 41 */ |
111 | 0x00, /* 33 */ | 112 | { 0x42, 0x00 }, /* 42 */ |
112 | 0x00, /* 34 */ | 113 | { 0x43, 0x00 }, /* 43 */ |
113 | 0x00, /* 35 */ | 114 | { 0x44, 0x00 }, /* 44 */ |
114 | 0x00, /* 36 */ | 115 | { 0x45, 0x00 }, /* 45 */ |
115 | 0x00, /* 37 */ | 116 | { 0x46, 0x00 }, /* 46 */ |
116 | 0x00, /* 38 */ | 117 | { 0x47, 0x00 }, /* 47 */ |
117 | 0x00, /* 39 */ | 118 | { 0x48, 0x00 }, /* 48 */ |
118 | 0x00, /* 3A */ | 119 | { 0x49, 0x00 }, /* 49 */ |
119 | 0x00, /* 3B */ | 120 | { 0x4a, 0x00 }, /* 4A */ |
120 | 0x00, /* 3C */ | 121 | { 0x4b, 0x00 }, /* 4B */ |
121 | 0x00, /* 3D */ | 122 | { 0x4c, 0x00 }, /* 4C */ |
122 | 0x00, /* 3E */ | 123 | { 0x4d, 0x00 }, /* 4D */ |
123 | 0x00, /* 3F */ | 124 | { 0x4e, 0x00 }, /* 4E */ |
124 | 0x00, /* 40 */ | 125 | { 0x4f, 0x00 }, /* 4F */ |
125 | 0x00, /* 41 */ | 126 | { 0x50, 0x00 }, /* 50 */ |
126 | 0x00, /* 42 */ | 127 | { 0x51, 0x00 }, /* 51 */ |
127 | 0x00, /* 43 */ | 128 | { 0x52, 0x00 }, /* 52 */ |
128 | 0x00, /* 44 */ | 129 | { 0x53, 0x00 }, /* 53 */ |
129 | 0x00, /* 45 */ | 130 | { 0x54, 0x00 }, /* 54 */ |
130 | 0x00, /* 46 */ | 131 | { 0x55, 0x00 }, /* 55 */ |
131 | 0x00, /* 47 */ | 132 | { 0x56, 0x00 }, /* 56 */ |
132 | 0x00, /* 48 */ | 133 | { 0x57, 0x00 }, /* 57 */ |
133 | 0x00, /* 49 */ | 134 | { 0x58, 0x00 }, /* 58 */ |
134 | 0x00, /* 4A */ | 135 | { 0x59, 0x00 }, /* 59 */ |
135 | 0x00, /* 4B */ | 136 | { 0x5a, 0x00 }, /* 5A */ |
136 | 0x00, /* 4C */ | 137 | { 0x5b, 0x00 }, /* 5B */ |
137 | 0x00, /* 4D */ | 138 | { 0x5c, 0x00 }, /* 5C */ |
138 | 0x00, /* 4E */ | 139 | { 0x5d, 0x00 }, /* 5D */ |
139 | 0x00, /* 4F */ | 140 | { 0x5e, 0x00 }, /* 5E */ |
140 | 0x00, /* 50 */ | 141 | { 0x5f, 0x00 }, /* 5F */ |
141 | 0x00, /* 51 */ | 142 | { 0x60, 0x00 }, /* 60 */ |
142 | 0x00, /* 52 */ | 143 | { 0x61, 0x00 }, /* 61 */ |
143 | 0x00, /* 53 */ | 144 | { 0x62, 0x00 }, /* 62 */ |
144 | 0x00, /* 54 */ | 145 | { 0x63, 0x00 }, /* 63 */ |
145 | 0x00, /* 55 */ | 146 | { 0x64, 0x00 }, /* 64 */ |
146 | 0x00, /* 56 */ | 147 | { 0x65, 0x00 }, /* 65 */ |
147 | 0x00, /* 57 */ | 148 | { 0x66, 0x00 }, /* 66 */ |
148 | 0x00, /* 58 */ | 149 | { 0x67, 0x00 }, /* 67 */ |
149 | 0x00, /* 59 */ | 150 | { 0x68, 0x00 }, /* 68 */ |
150 | 0x00, /* 5A */ | 151 | { 0x69, 0x00 }, /* 69 */ |
151 | 0x00, /* 5B */ | 152 | { 0x6a, 0x00 }, /* 6A */ |
152 | 0x00, /* 5C */ | 153 | { 0x6b, 0x00 }, /* 6B */ |
153 | 0x00, /* 5D */ | 154 | { 0x6c, 0x00 }, /* 6C */ |
154 | 0x00, /* 5E */ | 155 | { 0x6d, 0x00 }, /* 6D */ |
155 | 0x00, /* 5F */ | 156 | { 0x6e, 0x00 }, /* 6E */ |
156 | 0x00, /* 60 */ | 157 | { 0x6f, 0x00 }, /* 6F */ |
157 | 0x00, /* 61 */ | 158 | { 0x70, 0x00 }, /* 70 */ |
158 | 0x00, /* 62 */ | 159 | { 0x71, 0x00 }, /* 71 */ |
159 | 0x00, /* 63 */ | 160 | { 0x72, 0x00 }, /* 72 */ |
160 | 0x00, /* 64 */ | 161 | { 0x73, 0x00 }, /* 73 */ |
161 | 0x00, /* 65 */ | 162 | { 0x74, 0x00 }, /* 74 */ |
162 | 0x00, /* 66 */ | 163 | { 0x75, 0x00 }, /* 75 */ |
163 | 0x00, /* 67 */ | 164 | { 0x76, 0x00 }, /* 76 */ |
164 | 0x00, /* 68 */ | 165 | { 0x77, 0x00 }, /* 77 */ |
165 | 0x00, /* 69 */ | 166 | { 0x78, 0x00 }, /* 78 */ |
166 | 0x00, /* 6A */ | 167 | { 0x79, 0x00 }, /* 79 */ |
167 | 0x00, /* 6B */ | 168 | { 0x7a, 0x00 }, /* 7A */ |
168 | 0x00, /* 6C */ | 169 | { 0x7b, 0x00 }, /* 7B */ |
169 | 0x00, /* 6D */ | 170 | { 0x7c, 0x00 }, /* 7C */ |
170 | 0x00, /* 6E */ | 171 | { 0x7d, 0x00 }, /* 7D */ |
171 | 0x00, /* 6F */ | 172 | { 0x7e, 0x00 }, /* 7E */ |
172 | 0x00, /* 70 */ | 173 | { 0x7f, 0x00 }, /* 7F */ |
173 | 0x00, /* 71 */ | 174 | { 0x80, 0x00 }, /* 80 */ |
174 | 0x00, /* 72 */ | 175 | { 0x81, 0x00 }, /* 81 */ |
175 | 0x00, /* 73 */ | 176 | { 0x82, 0x00 }, /* 82 */ |
176 | 0x00, /* 74 */ | 177 | { 0x83, 0x00 }, /* 83 */ |
177 | 0x00, /* 75 */ | 178 | { 0x84, 0x00 }, /* 84 */ |
178 | 0x00, /* 76 */ | 179 | { 0x85, 0x00 }, /* 85 */ |
179 | 0x00, /* 77 */ | 180 | { 0x86, 0x00 }, /* 86 */ |
180 | 0x00, /* 78 */ | 181 | { 0x87, 0x00 }, /* 87 */ |
181 | 0x00, /* 79 */ | 182 | { 0x88, 0x00 }, /* 88 */ |
182 | 0x00, /* 7A */ | 183 | { 0x89, 0x00 }, /* 89 */ |
183 | 0x00, /* 7B */ | 184 | { 0x8a, 0x00 }, /* 8A */ |
184 | 0x00, /* 7C */ | 185 | { 0x8b, 0x00 }, /* 8B */ |
185 | 0x00, /* 7D */ | 186 | { 0x8c, 0x00 }, /* 8C */ |
186 | 0x00, /* 7E */ | 187 | { 0x8d, 0x00 }, /* 8D */ |
187 | 0x00, /* 7F */ | 188 | { 0x8e, 0x00 }, /* 8E */ |
188 | 0x00, /* 80 */ | 189 | { 0x8f, 0x00 }, /* 8F */ |
189 | 0x00, /* 81 */ | 190 | { 0x90, 0x00 }, /* 90 */ |
190 | 0x00, /* 82 */ | 191 | { 0x91, 0x00 }, /* 91 */ |
191 | 0x00, /* 83 */ | 192 | { 0x92, 0x30 }, /* 92 */ |
192 | 0x00, /* 84 */ | 193 | { 0x93, 0xF0 }, /* 93 */ |
193 | 0x00, /* 85 */ | 194 | { 0x94, 0x00 }, /* 94 */ |
194 | 0x00, /* 86 */ | 195 | { 0x95, 0x00 }, /* 95 */ |
195 | 0x00, /* 87 */ | 196 | { 0x96, 0x3F }, /* 96 */ |
196 | 0x00, /* 88 */ | 197 | { 0x97, 0x00 }, /* 97 */ |
197 | 0x00, /* 89 */ | 198 | { 0xff, 0x00 }, /* FF */ |
198 | 0x00, /* 8A */ | ||
199 | 0x00, /* 8B */ | ||
200 | 0x00, /* 8C */ | ||
201 | 0x00, /* 8D */ | ||
202 | 0x00, /* 8E */ | ||
203 | 0x00, /* 8F */ | ||
204 | 0x00, /* 90 */ | ||
205 | 0x00, /* 91 */ | ||
206 | 0x30, /* 92 */ | ||
207 | 0xF0, /* 93 */ | ||
208 | 0x00, /* 94 */ | ||
209 | 0x00, /* 95 */ | ||
210 | 0x3F, /* 96 */ | ||
211 | 0x00, /* 97 */ | ||
212 | 0x00, /* 98 */ | ||
213 | 0x00, /* 99 */ | ||
214 | 0x00, /* 9A */ | ||
215 | 0x00, /* 9B */ | ||
216 | 0x00, /* 9C */ | ||
217 | 0x00, /* 9D */ | ||
218 | 0x00, /* 9E */ | ||
219 | 0x00, /* 9F */ | ||
220 | 0x00, /* A0 */ | ||
221 | 0x00, /* A1 */ | ||
222 | 0x00, /* A2 */ | ||
223 | 0x00, /* A3 */ | ||
224 | 0x00, /* A4 */ | ||
225 | 0x00, /* A5 */ | ||
226 | 0x00, /* A6 */ | ||
227 | 0x00, /* A7 */ | ||
228 | 0x00, /* A8 */ | ||
229 | 0x00, /* A9 */ | ||
230 | 0x00, /* AA */ | ||
231 | 0x00, /* AB */ | ||
232 | 0x00, /* AC */ | ||
233 | 0x00, /* AD */ | ||
234 | 0x00, /* AE */ | ||
235 | 0x00, /* AF */ | ||
236 | 0x00, /* B0 */ | ||
237 | 0x00, /* B1 */ | ||
238 | 0x00, /* B2 */ | ||
239 | 0x00, /* B3 */ | ||
240 | 0x00, /* B4 */ | ||
241 | 0x00, /* B5 */ | ||
242 | 0x00, /* B6 */ | ||
243 | 0x00, /* B7 */ | ||
244 | 0x00, /* B8 */ | ||
245 | 0x00, /* B9 */ | ||
246 | 0x00, /* BA */ | ||
247 | 0x00, /* BB */ | ||
248 | 0x00, /* BC */ | ||
249 | 0x00, /* BD */ | ||
250 | 0x00, /* BE */ | ||
251 | 0x00, /* BF */ | ||
252 | 0x00, /* C0 */ | ||
253 | 0x00, /* C1 */ | ||
254 | 0x00, /* C2 */ | ||
255 | 0x00, /* C3 */ | ||
256 | 0x00, /* C4 */ | ||
257 | 0x00, /* C5 */ | ||
258 | 0x00, /* C6 */ | ||
259 | 0x00, /* C7 */ | ||
260 | 0x00, /* C8 */ | ||
261 | 0x00, /* C9 */ | ||
262 | 0x00, /* CA */ | ||
263 | 0x00, /* CB */ | ||
264 | 0x00, /* CC */ | ||
265 | 0x00, /* CD */ | ||
266 | 0x00, /* CE */ | ||
267 | 0x00, /* CF */ | ||
268 | 0x00, /* D0 */ | ||
269 | 0x00, /* D1 */ | ||
270 | 0x00, /* D2 */ | ||
271 | 0x00, /* D3 */ | ||
272 | 0x00, /* D4 */ | ||
273 | 0x00, /* D5 */ | ||
274 | 0x00, /* D6 */ | ||
275 | 0x00, /* D7 */ | ||
276 | 0x00, /* D8 */ | ||
277 | 0x00, /* D9 */ | ||
278 | 0x00, /* DA */ | ||
279 | 0x00, /* DB */ | ||
280 | 0x00, /* DC */ | ||
281 | 0x00, /* DD */ | ||
282 | 0x00, /* DE */ | ||
283 | 0x00, /* DF */ | ||
284 | 0x00, /* E0 */ | ||
285 | 0x00, /* E1 */ | ||
286 | 0x00, /* E2 */ | ||
287 | 0x00, /* E3 */ | ||
288 | 0x00, /* E4 */ | ||
289 | 0x00, /* E5 */ | ||
290 | 0x00, /* E6 */ | ||
291 | 0x00, /* E7 */ | ||
292 | 0x00, /* E8 */ | ||
293 | 0x00, /* E9 */ | ||
294 | 0x00, /* EA */ | ||
295 | 0x00, /* EB */ | ||
296 | 0x00, /* EC */ | ||
297 | 0x00, /* ED */ | ||
298 | 0x00, /* EE */ | ||
299 | 0x00, /* EF */ | ||
300 | 0x00, /* F0 */ | ||
301 | 0x00, /* F1 */ | ||
302 | 0x00, /* F2 */ | ||
303 | 0x00, /* F3 */ | ||
304 | 0x00, /* F4 */ | ||
305 | 0x00, /* F5 */ | ||
306 | 0x00, /* F6 */ | ||
307 | 0x00, /* F7 */ | ||
308 | 0x00, /* F8 */ | ||
309 | 0x00, /* F9 */ | ||
310 | 0x00, /* FA */ | ||
311 | 0x00, /* FB */ | ||
312 | 0x00, /* FC */ | ||
313 | 0x00, /* FD */ | ||
314 | 0x00, /* FE */ | ||
315 | 0x00, /* FF */ | ||
316 | }; | 199 | }; |
317 | 200 | ||
318 | static struct { | 201 | static struct { |
@@ -577,14 +460,14 @@ static struct { | |||
577 | { 0xFF, 0x00 }, /* FF */ | 460 | { 0xFF, 0x00 }, /* FF */ |
578 | }; | 461 | }; |
579 | 462 | ||
580 | static int max98095_readable(struct snd_soc_codec *codec, unsigned int reg) | 463 | static bool max98095_readable(struct device *dev, unsigned int reg) |
581 | { | 464 | { |
582 | if (reg >= M98095_REG_CNT) | 465 | if (reg >= M98095_REG_CNT) |
583 | return 0; | 466 | return 0; |
584 | return max98095_access[reg].readable != 0; | 467 | return max98095_access[reg].readable != 0; |
585 | } | 468 | } |
586 | 469 | ||
587 | static int max98095_volatile(struct snd_soc_codec *codec, unsigned int reg) | 470 | static bool max98095_volatile(struct device *dev, unsigned int reg) |
588 | { | 471 | { |
589 | if (reg > M98095_REG_MAX_CACHED) | 472 | if (reg > M98095_REG_MAX_CACHED) |
590 | return 1; | 473 | return 1; |
@@ -611,22 +494,18 @@ static int max98095_volatile(struct snd_soc_codec *codec, unsigned int reg) | |||
611 | return 0; | 494 | return 0; |
612 | } | 495 | } |
613 | 496 | ||
614 | /* | 497 | static const struct regmap_config max98095_regmap = { |
615 | * Filter coefficients are in a separate register segment | 498 | .reg_bits = 8, |
616 | * and they share the address space of the normal registers. | 499 | .val_bits = 8, |
617 | * The coefficient registers do not need or share the cache. | ||
618 | */ | ||
619 | static int max98095_hw_write(struct snd_soc_codec *codec, unsigned int reg, | ||
620 | unsigned int value) | ||
621 | { | ||
622 | int ret; | ||
623 | 500 | ||
624 | codec->cache_bypass = 1; | 501 | .reg_defaults = max98095_reg_def, |
625 | ret = snd_soc_write(codec, reg, value); | 502 | .num_reg_defaults = ARRAY_SIZE(max98095_reg_def), |
626 | codec->cache_bypass = 0; | 503 | .max_register = M98095_0FF_REV_ID, |
504 | .cache_type = REGCACHE_RBTREE, | ||
627 | 505 | ||
628 | return ret ? -EIO : 0; | 506 | .readable_reg = max98095_readable, |
629 | } | 507 | .volatile_reg = max98095_volatile, |
508 | }; | ||
630 | 509 | ||
631 | /* | 510 | /* |
632 | * Load equalizer DSP coefficient configurations registers | 511 | * Load equalizer DSP coefficient configurations registers |
@@ -648,8 +527,8 @@ static void m98095_eq_band(struct snd_soc_codec *codec, unsigned int dai, | |||
648 | 527 | ||
649 | /* Step through the registers and coefs */ | 528 | /* Step through the registers and coefs */ |
650 | for (i = 0; i < M98095_COEFS_PER_BAND; i++) { | 529 | for (i = 0; i < M98095_COEFS_PER_BAND; i++) { |
651 | max98095_hw_write(codec, eq_reg++, M98095_BYTE1(coefs[i])); | 530 | snd_soc_write(codec, eq_reg++, M98095_BYTE1(coefs[i])); |
652 | max98095_hw_write(codec, eq_reg++, M98095_BYTE0(coefs[i])); | 531 | snd_soc_write(codec, eq_reg++, M98095_BYTE0(coefs[i])); |
653 | } | 532 | } |
654 | } | 533 | } |
655 | 534 | ||
@@ -673,8 +552,8 @@ static void m98095_biquad_band(struct snd_soc_codec *codec, unsigned int dai, | |||
673 | 552 | ||
674 | /* Step through the registers and coefs */ | 553 | /* Step through the registers and coefs */ |
675 | for (i = 0; i < M98095_COEFS_PER_BAND; i++) { | 554 | for (i = 0; i < M98095_COEFS_PER_BAND; i++) { |
676 | max98095_hw_write(codec, bq_reg++, M98095_BYTE1(coefs[i])); | 555 | snd_soc_write(codec, bq_reg++, M98095_BYTE1(coefs[i])); |
677 | max98095_hw_write(codec, bq_reg++, M98095_BYTE0(coefs[i])); | 556 | snd_soc_write(codec, bq_reg++, M98095_BYTE0(coefs[i])); |
678 | } | 557 | } |
679 | } | 558 | } |
680 | 559 | ||
@@ -1285,14 +1164,6 @@ static const struct snd_soc_dapm_route max98095_audio_map[] = { | |||
1285 | {"MIC2 Input", NULL, "MIC2"}, | 1164 | {"MIC2 Input", NULL, "MIC2"}, |
1286 | }; | 1165 | }; |
1287 | 1166 | ||
1288 | static int max98095_add_widgets(struct snd_soc_codec *codec) | ||
1289 | { | ||
1290 | snd_soc_add_codec_controls(codec, max98095_snd_controls, | ||
1291 | ARRAY_SIZE(max98095_snd_controls)); | ||
1292 | |||
1293 | return 0; | ||
1294 | } | ||
1295 | |||
1296 | /* codec mclk clock divider coefficients */ | 1167 | /* codec mclk clock divider coefficients */ |
1297 | static const struct { | 1168 | static const struct { |
1298 | u32 rate; | 1169 | u32 rate; |
@@ -1748,6 +1619,7 @@ static int max98095_dai3_set_fmt(struct snd_soc_dai *codec_dai, | |||
1748 | static int max98095_set_bias_level(struct snd_soc_codec *codec, | 1619 | static int max98095_set_bias_level(struct snd_soc_codec *codec, |
1749 | enum snd_soc_bias_level level) | 1620 | enum snd_soc_bias_level level) |
1750 | { | 1621 | { |
1622 | struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); | ||
1751 | int ret; | 1623 | int ret; |
1752 | 1624 | ||
1753 | switch (level) { | 1625 | switch (level) { |
@@ -1759,7 +1631,7 @@ static int max98095_set_bias_level(struct snd_soc_codec *codec, | |||
1759 | 1631 | ||
1760 | case SND_SOC_BIAS_STANDBY: | 1632 | case SND_SOC_BIAS_STANDBY: |
1761 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { | 1633 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
1762 | ret = snd_soc_cache_sync(codec); | 1634 | ret = regcache_sync(max98095->regmap); |
1763 | 1635 | ||
1764 | if (ret != 0) { | 1636 | if (ret != 0) { |
1765 | dev_err(codec->dev, "Failed to sync cache: %d\n", ret); | 1637 | dev_err(codec->dev, "Failed to sync cache: %d\n", ret); |
@@ -1774,7 +1646,7 @@ static int max98095_set_bias_level(struct snd_soc_codec *codec, | |||
1774 | case SND_SOC_BIAS_OFF: | 1646 | case SND_SOC_BIAS_OFF: |
1775 | snd_soc_update_bits(codec, M98095_090_PWR_EN_IN, | 1647 | snd_soc_update_bits(codec, M98095_090_PWR_EN_IN, |
1776 | M98095_MBEN, 0); | 1648 | M98095_MBEN, 0); |
1777 | codec->cache_sync = 1; | 1649 | regcache_mark_dirty(max98095->regmap); |
1778 | break; | 1650 | break; |
1779 | } | 1651 | } |
1780 | codec->dapm.bias_level = level; | 1652 | codec->dapm.bias_level = level; |
@@ -2341,7 +2213,7 @@ static int max98095_reset(struct snd_soc_codec *codec) | |||
2341 | /* Reset to hardware default for registers, as there is not | 2213 | /* Reset to hardware default for registers, as there is not |
2342 | * a soft reset hardware control register */ | 2214 | * a soft reset hardware control register */ |
2343 | for (i = M98095_010_HOST_INT_CFG; i < M98095_REG_MAX_CACHED; i++) { | 2215 | for (i = M98095_010_HOST_INT_CFG; i < M98095_REG_MAX_CACHED; i++) { |
2344 | ret = snd_soc_write(codec, i, max98095_reg_def[i]); | 2216 | ret = snd_soc_write(codec, i, snd_soc_read(codec, i)); |
2345 | if (ret < 0) { | 2217 | if (ret < 0) { |
2346 | dev_err(codec->dev, "Failed to reset: %d\n", ret); | 2218 | dev_err(codec->dev, "Failed to reset: %d\n", ret); |
2347 | return ret; | 2219 | return ret; |
@@ -2358,7 +2230,7 @@ static int max98095_probe(struct snd_soc_codec *codec) | |||
2358 | struct i2c_client *client; | 2230 | struct i2c_client *client; |
2359 | int ret = 0; | 2231 | int ret = 0; |
2360 | 2232 | ||
2361 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); | 2233 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); |
2362 | if (ret != 0) { | 2234 | if (ret != 0) { |
2363 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | 2235 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
2364 | return ret; | 2236 | return ret; |
@@ -2447,8 +2319,6 @@ static int max98095_probe(struct snd_soc_codec *codec) | |||
2447 | snd_soc_update_bits(codec, M98095_097_PWR_SYS, M98095_SHDNRUN, | 2319 | snd_soc_update_bits(codec, M98095_097_PWR_SYS, M98095_SHDNRUN, |
2448 | M98095_SHDNRUN); | 2320 | M98095_SHDNRUN); |
2449 | 2321 | ||
2450 | max98095_add_widgets(codec); | ||
2451 | |||
2452 | return 0; | 2322 | return 0; |
2453 | 2323 | ||
2454 | err_irq: | 2324 | err_irq: |
@@ -2480,11 +2350,8 @@ static struct snd_soc_codec_driver soc_codec_dev_max98095 = { | |||
2480 | .suspend = max98095_suspend, | 2350 | .suspend = max98095_suspend, |
2481 | .resume = max98095_resume, | 2351 | .resume = max98095_resume, |
2482 | .set_bias_level = max98095_set_bias_level, | 2352 | .set_bias_level = max98095_set_bias_level, |
2483 | .reg_cache_size = ARRAY_SIZE(max98095_reg_def), | 2353 | .controls = max98095_snd_controls, |
2484 | .reg_word_size = sizeof(u8), | 2354 | .num_controls = ARRAY_SIZE(max98095_snd_controls), |
2485 | .reg_cache_default = max98095_reg_def, | ||
2486 | .readable_register = max98095_readable, | ||
2487 | .volatile_register = max98095_volatile, | ||
2488 | .dapm_widgets = max98095_dapm_widgets, | 2355 | .dapm_widgets = max98095_dapm_widgets, |
2489 | .num_dapm_widgets = ARRAY_SIZE(max98095_dapm_widgets), | 2356 | .num_dapm_widgets = ARRAY_SIZE(max98095_dapm_widgets), |
2490 | .dapm_routes = max98095_audio_map, | 2357 | .dapm_routes = max98095_audio_map, |
@@ -2502,6 +2369,13 @@ static int max98095_i2c_probe(struct i2c_client *i2c, | |||
2502 | if (max98095 == NULL) | 2369 | if (max98095 == NULL) |
2503 | return -ENOMEM; | 2370 | return -ENOMEM; |
2504 | 2371 | ||
2372 | max98095->regmap = devm_regmap_init_i2c(i2c, &max98095_regmap); | ||
2373 | if (IS_ERR(max98095->regmap)) { | ||
2374 | ret = PTR_ERR(max98095->regmap); | ||
2375 | dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret); | ||
2376 | return ret; | ||
2377 | } | ||
2378 | |||
2505 | max98095->devtype = id->driver_data; | 2379 | max98095->devtype = id->driver_data; |
2506 | i2c_set_clientdata(i2c, max98095); | 2380 | i2c_set_clientdata(i2c, max98095); |
2507 | max98095->pdata = i2c->dev.platform_data; | 2381 | max98095->pdata = i2c->dev.platform_data; |