diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-04 15:59:44 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-04 15:59:44 -0500 |
commit | 3f4e5aacf754bad84dd54826ea3a77983e201c80 (patch) | |
tree | cb2ac76d57cdcbf61e636503e36cbef992896482 | |
parent | 2a6f79e8c1c7d04686fc7298fd625a7bdc9453d3 (diff) | |
parent | f76e39c531304b114e27c3dd3e0036f56cd33df1 (diff) |
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar:
"Three small fixlets"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/intel/cacheinfo: Shut up annoying warning
x86, doc: Boot protocol 2.12 is in 3.8
x86-64: Replace left over sti/cli in ia32 audit exit code
-rw-r--r-- | Documentation/x86/boot.txt | 2 | ||||
-rw-r--r-- | arch/x86/ia32/ia32entry.S | 4 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/intel_cacheinfo.c | 7 |
3 files changed, 6 insertions, 7 deletions
diff --git a/Documentation/x86/boot.txt b/Documentation/x86/boot.txt index 3edb4c2887a1..e540fd67f767 100644 --- a/Documentation/x86/boot.txt +++ b/Documentation/x86/boot.txt | |||
@@ -57,7 +57,7 @@ Protocol 2.10: (Kernel 2.6.31) Added a protocol for relaxed alignment | |||
57 | Protocol 2.11: (Kernel 3.6) Added a field for offset of EFI handover | 57 | Protocol 2.11: (Kernel 3.6) Added a field for offset of EFI handover |
58 | protocol entry point. | 58 | protocol entry point. |
59 | 59 | ||
60 | Protocol 2.12: (Kernel 3.9) Added the xloadflags field and extension fields | 60 | Protocol 2.12: (Kernel 3.8) Added the xloadflags field and extension fields |
61 | to struct boot_params for for loading bzImage and ramdisk | 61 | to struct boot_params for for loading bzImage and ramdisk |
62 | above 4G in 64bit. | 62 | above 4G in 64bit. |
63 | 63 | ||
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index 102ff7cb3e41..142c4ceff112 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S | |||
@@ -207,7 +207,7 @@ sysexit_from_sys_call: | |||
207 | testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) | 207 | testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
208 | jnz ia32_ret_from_sys_call | 208 | jnz ia32_ret_from_sys_call |
209 | TRACE_IRQS_ON | 209 | TRACE_IRQS_ON |
210 | sti | 210 | ENABLE_INTERRUPTS(CLBR_NONE) |
211 | movl %eax,%esi /* second arg, syscall return value */ | 211 | movl %eax,%esi /* second arg, syscall return value */ |
212 | cmpl $-MAX_ERRNO,%eax /* is it an error ? */ | 212 | cmpl $-MAX_ERRNO,%eax /* is it an error ? */ |
213 | jbe 1f | 213 | jbe 1f |
@@ -217,7 +217,7 @@ sysexit_from_sys_call: | |||
217 | call __audit_syscall_exit | 217 | call __audit_syscall_exit |
218 | movq RAX-ARGOFFSET(%rsp),%rax /* reload syscall return value */ | 218 | movq RAX-ARGOFFSET(%rsp),%rax /* reload syscall return value */ |
219 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi | 219 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi |
220 | cli | 220 | DISABLE_INTERRUPTS(CLBR_NONE) |
221 | TRACE_IRQS_OFF | 221 | TRACE_IRQS_OFF |
222 | testl %edi,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) | 222 | testl %edi,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
223 | jz \exit | 223 | jz \exit |
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index fe9edec6698a..84c1309c4c0c 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c | |||
@@ -298,8 +298,7 @@ struct _cache_attr { | |||
298 | unsigned int); | 298 | unsigned int); |
299 | }; | 299 | }; |
300 | 300 | ||
301 | #ifdef CONFIG_AMD_NB | 301 | #if defined(CONFIG_AMD_NB) && defined(CONFIG_SYSFS) |
302 | |||
303 | /* | 302 | /* |
304 | * L3 cache descriptors | 303 | * L3 cache descriptors |
305 | */ | 304 | */ |
@@ -524,9 +523,9 @@ store_subcaches(struct _cpuid4_info *this_leaf, const char *buf, size_t count, | |||
524 | static struct _cache_attr subcaches = | 523 | static struct _cache_attr subcaches = |
525 | __ATTR(subcaches, 0644, show_subcaches, store_subcaches); | 524 | __ATTR(subcaches, 0644, show_subcaches, store_subcaches); |
526 | 525 | ||
527 | #else /* CONFIG_AMD_NB */ | 526 | #else |
528 | #define amd_init_l3_cache(x, y) | 527 | #define amd_init_l3_cache(x, y) |
529 | #endif /* CONFIG_AMD_NB */ | 528 | #endif /* CONFIG_AMD_NB && CONFIG_SYSFS */ |
530 | 529 | ||
531 | static int | 530 | static int |
532 | __cpuinit cpuid4_cache_lookup_regs(int index, | 531 | __cpuinit cpuid4_cache_lookup_regs(int index, |