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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-03-13 10:30:38 -0400
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-04-27 07:44:13 -0400
commit3b328c98093702c584692bffabd440800b383d73 (patch)
tree2590a7013631f5915d2c80d0b749e54e26ff8520
parent535c806c26ef602d578792083df52b31803b961e (diff)
[AVR32] Clean up cpu identification and add features bitmap
Clean up the cpu identification code, using definitions from <asm/sysreg.h> instead of hardcoded constants. Also, add a features bitmap to struct avr32_cpuinfo to allow other code to make decisions based upon what the running cpu is actually capable of. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
-rw-r--r--arch/avr32/kernel/cpu.c64
-rw-r--r--include/asm-avr32/processor.h9
2 files changed, 53 insertions, 20 deletions
diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c
index 2e72fd2699df..2714cf6452b5 100644
--- a/arch/avr32/kernel/cpu.c
+++ b/arch/avr32/kernel/cpu.c
@@ -209,16 +209,17 @@ static const char *mmu_types[] = {
209void __init setup_processor(void) 209void __init setup_processor(void)
210{ 210{
211 unsigned long config0, config1; 211 unsigned long config0, config1;
212 unsigned long features;
212 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type; 213 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
213 unsigned tmp; 214 unsigned tmp;
214 215
215 config0 = sysreg_read(CONFIG0); /* 0x0000013e; */ 216 config0 = sysreg_read(CONFIG0);
216 config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */ 217 config1 = sysreg_read(CONFIG1);
217 cpu_id = config0 >> 24; 218 cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
218 cpu_rev = (config0 >> 16) & 0xff; 219 cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
219 arch_id = (config0 >> 13) & 0x07; 220 arch_id = SYSREG_BFEXT(AT, config0);
220 arch_rev = (config0 >> 10) & 0x07; 221 arch_rev = SYSREG_BFEXT(AR, config0);
221 mmu_type = (config0 >> 7) & 0x03; 222 mmu_type = SYSREG_BFEXT(MMUT, config0);
222 223
223 boot_cpu_data.arch_type = arch_id; 224 boot_cpu_data.arch_type = arch_id;
224 boot_cpu_data.cpu_type = cpu_id; 225 boot_cpu_data.cpu_type = cpu_id;
@@ -226,16 +227,16 @@ void __init setup_processor(void)
226 boot_cpu_data.cpu_revision = cpu_rev; 227 boot_cpu_data.cpu_revision = cpu_rev;
227 boot_cpu_data.tlb_config = mmu_type; 228 boot_cpu_data.tlb_config = mmu_type;
228 229
229 tmp = (config1 >> 13) & 0x07; 230 tmp = SYSREG_BFEXT(ILSZ, config1);
230 if (tmp) { 231 if (tmp) {
231 boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07); 232 boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
232 boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f); 233 boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
233 boot_cpu_data.icache.linesz = 1 << (tmp + 1); 234 boot_cpu_data.icache.linesz = 1 << (tmp + 1);
234 } 235 }
235 tmp = (config1 >> 3) & 0x07; 236 tmp = SYSREG_BFEXT(DLSZ, config1);
236 if (tmp) { 237 if (tmp) {
237 boot_cpu_data.dcache.ways = 1 << (config1 & 0x07); 238 boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
238 boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f); 239 boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
239 boot_cpu_data.dcache.linesz = 1 << (tmp + 1); 240 boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
240 } 241 }
241 242
@@ -250,16 +251,39 @@ void __init setup_processor(void)
250 cpu_names[cpu_id], cpu_id, cpu_rev, 251 cpu_names[cpu_id], cpu_id, cpu_rev,
251 arch_names[arch_id], arch_rev); 252 arch_names[arch_id], arch_rev);
252 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]); 253 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
254
253 printk ("CPU: features:"); 255 printk ("CPU: features:");
254 if (config0 & (1 << 6)) 256 features = 0;
255 printk(" fpu"); 257 if (config0 & SYSREG_BIT(CONFIG0_R)) {
256 if (config0 & (1 << 5)) 258 features |= AVR32_FEATURE_RMW;
257 printk(" java"); 259 printk(" rmw");
258 if (config0 & (1 << 4)) 260 }
259 printk(" perfctr"); 261 if (config0 & SYSREG_BIT(CONFIG0_D)) {
260 if (config0 & (1 << 3)) 262 features |= AVR32_FEATURE_DSP;
263 printk(" dsp");
264 }
265 if (config0 & SYSREG_BIT(CONFIG0_S)) {
266 features |= AVR32_FEATURE_SIMD;
267 printk(" simd");
268 }
269 if (config0 & SYSREG_BIT(CONFIG0_O)) {
270 features |= AVR32_FEATURE_OCD;
261 printk(" ocd"); 271 printk(" ocd");
272 }
273 if (config0 & SYSREG_BIT(CONFIG0_P)) {
274 features |= AVR32_FEATURE_PCTR;
275 printk(" perfctr");
276 }
277 if (config0 & SYSREG_BIT(CONFIG0_J)) {
278 features |= AVR32_FEATURE_JAVA;
279 printk(" java");
280 }
281 if (config0 & SYSREG_BIT(CONFIG0_F)) {
282 features |= AVR32_FEATURE_FPU;
283 printk(" fpu");
284 }
262 printk("\n"); 285 printk("\n");
286 boot_cpu_data.features = features;
263} 287}
264 288
265#ifdef CONFIG_PROC_FS 289#ifdef CONFIG_PROC_FS
diff --git a/include/asm-avr32/processor.h b/include/asm-avr32/processor.h
index f6913778a45f..cbb89ccd3f05 100644
--- a/include/asm-avr32/processor.h
+++ b/include/asm-avr32/processor.h
@@ -40,6 +40,14 @@ enum tlb_config {
40 TLB_INVALID 40 TLB_INVALID
41}; 41};
42 42
43#define AVR32_FEATURE_RMW (1 << 0)
44#define AVR32_FEATURE_DSP (1 << 1)
45#define AVR32_FEATURE_SIMD (1 << 2)
46#define AVR32_FEATURE_OCD (1 << 3)
47#define AVR32_FEATURE_PCTR (1 << 4)
48#define AVR32_FEATURE_JAVA (1 << 5)
49#define AVR32_FEATURE_FPU (1 << 6)
50
43struct avr32_cpuinfo { 51struct avr32_cpuinfo {
44 struct clk *clk; 52 struct clk *clk;
45 unsigned long loops_per_jiffy; 53 unsigned long loops_per_jiffy;
@@ -48,6 +56,7 @@ struct avr32_cpuinfo {
48 unsigned short arch_revision; 56 unsigned short arch_revision;
49 unsigned short cpu_revision; 57 unsigned short cpu_revision;
50 enum tlb_config tlb_config; 58 enum tlb_config tlb_config;
59 unsigned long features;
51 60
52 struct cache_info icache; 61 struct cache_info icache;
53 struct cache_info dcache; 62 struct cache_info dcache;