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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2012-07-05 04:29:37 -0400
committerRafael J. Wysocki <rjw@sisk.pl>2012-07-06 14:53:39 -0400
commit3aa99a3498403d23fe4a0cfa4fcbbedaf7c8134a (patch)
tree6eb04338464b72197b6b6c957366f73b66eb74c1
parentc99cc71efdaecf2e32608fba474bb0fd096b49ea (diff)
ARM: shmobile: sh7372: completely switch over to using pm-rmobile API
Now, all sh7372 platforms are switched over to use pm-rmobile base PM domain, and no one is using original sh7372_pm_domain APIs. We can remove these, switching has been fully completed. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h36
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c221
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c41
3 files changed, 0 insertions, 298 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index a7620c1afceb..b59048e6d8fd 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -478,22 +478,6 @@ extern struct clk sh7372_fsibck_clk;
478extern struct clk sh7372_fsidiva_clk; 478extern struct clk sh7372_fsidiva_clk;
479extern struct clk sh7372_fsidivb_clk; 479extern struct clk sh7372_fsidivb_clk;
480 480
481struct platform_device;
482
483struct sh7372_pm_domain {
484 struct generic_pm_domain genpd;
485 struct dev_power_governor *gov;
486 int (*suspend)(void);
487 void (*resume)(void);
488 unsigned int bit_shift;
489 bool no_debug;
490};
491
492static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d)
493{
494 return container_of(d, struct sh7372_pm_domain, genpd);
495}
496
497#ifdef CONFIG_PM 481#ifdef CONFIG_PM
498extern struct rmobile_pm_domain sh7372_pd_a4lc; 482extern struct rmobile_pm_domain sh7372_pd_a4lc;
499extern struct rmobile_pm_domain sh7372_pd_a4mp; 483extern struct rmobile_pm_domain sh7372_pd_a4mp;
@@ -504,26 +488,6 @@ extern struct rmobile_pm_domain sh7372_pd_a3ri;
504extern struct rmobile_pm_domain sh7372_pd_a4s; 488extern struct rmobile_pm_domain sh7372_pd_a4s;
505extern struct rmobile_pm_domain sh7372_pd_a3sp; 489extern struct rmobile_pm_domain sh7372_pd_a3sp;
506extern struct rmobile_pm_domain sh7372_pd_a3sg; 490extern struct rmobile_pm_domain sh7372_pd_a3sg;
507
508extern struct sh7372_pm_domain sh7372_a4lc;
509extern struct sh7372_pm_domain sh7372_a4mp;
510extern struct sh7372_pm_domain sh7372_d4;
511extern struct sh7372_pm_domain sh7372_a4r;
512extern struct sh7372_pm_domain sh7372_a3rv;
513extern struct sh7372_pm_domain sh7372_a3ri;
514extern struct sh7372_pm_domain sh7372_a4s;
515extern struct sh7372_pm_domain sh7372_a3sp;
516extern struct sh7372_pm_domain sh7372_a3sg;
517
518extern void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd);
519extern void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
520 struct platform_device *pdev);
521extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
522 struct sh7372_pm_domain *sh7372_sd);
523#else
524#define sh7372_init_pm_domain(pd) do { } while(0)
525#define sh7372_add_device_to_domain(pd, pdev) do { } while(0)
526#define sh7372_pm_add_subdomain(pd, sd) do { } while(0)
527#endif /* CONFIG_PM */ 491#endif /* CONFIG_PM */
528 492
529extern void sh7372_intcs_suspend(void); 493extern void sh7372_intcs_suspend(void);
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 3b131c7a79d0..6a23e7c449ea 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -42,13 +42,10 @@
42#define PLLC01STPCR 0xe61500c8 42#define PLLC01STPCR 0xe61500c8
43 43
44/* SYSC */ 44/* SYSC */
45#define SPDCR 0xe6180008
46#define SWUCR 0xe6180014
47#define SBAR 0xe6180020 45#define SBAR 0xe6180020
48#define WUPRMSK 0xe6180028 46#define WUPRMSK 0xe6180028
49#define WUPSMSK 0xe618002c 47#define WUPSMSK 0xe618002c
50#define WUPSMSK2 0xe6180048 48#define WUPSMSK2 0xe6180048
51#define PSTR 0xe6180080
52#define WUPSFAC 0xe6180098 49#define WUPSFAC 0xe6180098
53#define IRQCR 0xe618022c 50#define IRQCR 0xe618022c
54#define IRQCR2 0xe6180238 51#define IRQCR2 0xe6180238
@@ -72,226 +69,8 @@
72/* AP-System Core */ 69/* AP-System Core */
73#define APARMBAREA 0xe6f10020 70#define APARMBAREA 0xe6f10020
74 71
75#define PSTR_RETRIES 100
76#define PSTR_DELAY_US 10
77
78#ifdef CONFIG_PM 72#ifdef CONFIG_PM
79 73
80static int pd_power_down(struct generic_pm_domain *genpd)
81{
82 struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
83 unsigned int mask = 1 << sh7372_pd->bit_shift;
84
85 if (sh7372_pd->suspend) {
86 int ret = sh7372_pd->suspend();
87
88 if (ret)
89 return ret;
90 }
91
92 if (__raw_readl(PSTR) & mask) {
93 unsigned int retry_count;
94
95 __raw_writel(mask, SPDCR);
96
97 for (retry_count = PSTR_RETRIES; retry_count; retry_count--) {
98 if (!(__raw_readl(SPDCR) & mask))
99 break;
100 cpu_relax();
101 }
102 }
103
104 if (!sh7372_pd->no_debug)
105 pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n",
106 genpd->name, mask, __raw_readl(PSTR));
107
108 return 0;
109}
110
111static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume)
112{
113 unsigned int mask = 1 << sh7372_pd->bit_shift;
114 unsigned int retry_count;
115 int ret = 0;
116
117 if (__raw_readl(PSTR) & mask)
118 goto out;
119
120 __raw_writel(mask, SWUCR);
121
122 for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
123 if (!(__raw_readl(SWUCR) & mask))
124 break;
125 if (retry_count > PSTR_RETRIES)
126 udelay(PSTR_DELAY_US);
127 else
128 cpu_relax();
129 }
130 if (!retry_count)
131 ret = -EIO;
132
133 if (!sh7372_pd->no_debug)
134 pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n",
135 sh7372_pd->genpd.name, mask, __raw_readl(PSTR));
136
137 out:
138 if (ret == 0 && sh7372_pd->resume && do_resume)
139 sh7372_pd->resume();
140
141 return ret;
142}
143
144static int pd_power_up(struct generic_pm_domain *genpd)
145{
146 return __pd_power_up(to_sh7372_pd(genpd), true);
147}
148
149static int sh7372_a4r_suspend(void)
150{
151 sh7372_intcs_suspend();
152 __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
153 return 0;
154}
155
156static bool pd_active_wakeup(struct device *dev)
157{
158 bool (*active_wakeup)(struct device *dev);
159
160 active_wakeup = dev_gpd_data(dev)->ops.active_wakeup;
161 return active_wakeup ? active_wakeup(dev) : true;
162}
163
164static int sh7372_stop_dev(struct device *dev)
165{
166 int (*stop)(struct device *dev);
167
168 stop = dev_gpd_data(dev)->ops.stop;
169 if (stop) {
170 int ret = stop(dev);
171 if (ret)
172 return ret;
173 }
174 return pm_clk_suspend(dev);
175}
176
177static int sh7372_start_dev(struct device *dev)
178{
179 int (*start)(struct device *dev);
180 int ret;
181
182 ret = pm_clk_resume(dev);
183 if (ret)
184 return ret;
185
186 start = dev_gpd_data(dev)->ops.start;
187 if (start)
188 ret = start(dev);
189
190 return ret;
191}
192
193void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
194{
195 struct generic_pm_domain *genpd = &sh7372_pd->genpd;
196 struct dev_power_governor *gov = sh7372_pd->gov;
197
198 pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
199 genpd->dev_ops.stop = sh7372_stop_dev;
200 genpd->dev_ops.start = sh7372_start_dev;
201 genpd->dev_ops.active_wakeup = pd_active_wakeup;
202 genpd->dev_irq_safe = true;
203 genpd->power_off = pd_power_down;
204 genpd->power_on = pd_power_up;
205 __pd_power_up(sh7372_pd, false);
206}
207
208void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
209 struct platform_device *pdev)
210{
211 struct device *dev = &pdev->dev;
212
213 pm_genpd_add_device(&sh7372_pd->genpd, dev);
214 if (pm_clk_no_clocks(dev))
215 pm_clk_add(dev, NULL);
216}
217
218void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
219 struct sh7372_pm_domain *sh7372_sd)
220{
221 pm_genpd_add_subdomain(&sh7372_pd->genpd, &sh7372_sd->genpd);
222}
223
224struct sh7372_pm_domain sh7372_a4lc = {
225 .genpd.name = "A4LC",
226 .bit_shift = 1,
227};
228
229struct sh7372_pm_domain sh7372_a4mp = {
230 .genpd.name = "A4MP",
231 .bit_shift = 2,
232};
233
234struct sh7372_pm_domain sh7372_d4 = {
235 .genpd.name = "D4",
236 .bit_shift = 3,
237};
238
239struct sh7372_pm_domain sh7372_a4r = {
240 .genpd.name = "A4R",
241 .bit_shift = 5,
242 .suspend = sh7372_a4r_suspend,
243 .resume = sh7372_intcs_resume,
244};
245
246struct sh7372_pm_domain sh7372_a3rv = {
247 .genpd.name = "A3RV",
248 .bit_shift = 6,
249};
250
251struct sh7372_pm_domain sh7372_a3ri = {
252 .genpd.name = "A3RI",
253 .bit_shift = 8,
254};
255
256static int sh7372_a4s_suspend(void)
257{
258 /*
259 * The A4S domain contains the CPU core and therefore it should
260 * only be turned off if the CPU is in use.
261 */
262 return -EBUSY;
263}
264
265struct sh7372_pm_domain sh7372_a4s = {
266 .genpd.name = "A4S",
267 .bit_shift = 10,
268 .gov = &pm_domain_always_on_gov,
269 .no_debug = true,
270 .suspend = sh7372_a4s_suspend,
271};
272
273static int sh7372_a3sp_suspend(void)
274{
275 /*
276 * Serial consoles make use of SCIF hardware located in A3SP,
277 * keep such power domain on if "no_console_suspend" is set.
278 */
279 return console_suspend_enabled ? 0 : -EBUSY;
280}
281
282struct sh7372_pm_domain sh7372_a3sp = {
283 .genpd.name = "A3SP",
284 .bit_shift = 11,
285 .gov = &pm_domain_always_on_gov,
286 .no_debug = true,
287 .suspend = sh7372_a3sp_suspend,
288};
289
290struct sh7372_pm_domain sh7372_a3sg = {
291 .genpd.name = "A3SG",
292 .bit_shift = 13,
293};
294
295struct rmobile_pm_domain sh7372_pd_a4lc = { 74struct rmobile_pm_domain sh7372_pd_a4lc = {
296 .genpd.name = "A4LC", 75 .genpd.name = "A4LC",
297 .bit_shift = 1, 76 .bit_shift = 1,
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 3648b35c238b..04eef92b891c 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -1001,22 +1001,6 @@ static struct platform_device *sh7372_late_devices[] __initdata = {
1001 1001
1002void __init sh7372_add_standard_devices(void) 1002void __init sh7372_add_standard_devices(void)
1003{ 1003{
1004 sh7372_init_pm_domain(&sh7372_a4lc);
1005 sh7372_init_pm_domain(&sh7372_a4mp);
1006 sh7372_init_pm_domain(&sh7372_d4);
1007 sh7372_init_pm_domain(&sh7372_a4r);
1008 sh7372_init_pm_domain(&sh7372_a3rv);
1009 sh7372_init_pm_domain(&sh7372_a3ri);
1010 sh7372_init_pm_domain(&sh7372_a4s);
1011 sh7372_init_pm_domain(&sh7372_a3sp);
1012 sh7372_init_pm_domain(&sh7372_a3sg);
1013
1014 sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv);
1015 sh7372_pm_add_subdomain(&sh7372_a4r, &sh7372_a4lc);
1016
1017 sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sg);
1018 sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sp);
1019
1020 rmobile_init_pm_domain(&sh7372_pd_a4lc); 1004 rmobile_init_pm_domain(&sh7372_pd_a4lc);
1021 rmobile_init_pm_domain(&sh7372_pd_a4mp); 1005 rmobile_init_pm_domain(&sh7372_pd_a4mp);
1022 rmobile_init_pm_domain(&sh7372_pd_d4); 1006 rmobile_init_pm_domain(&sh7372_pd_d4);
@@ -1039,31 +1023,6 @@ void __init sh7372_add_standard_devices(void)
1039 platform_add_devices(sh7372_late_devices, 1023 platform_add_devices(sh7372_late_devices,
1040 ARRAY_SIZE(sh7372_late_devices)); 1024 ARRAY_SIZE(sh7372_late_devices));
1041 1025
1042 sh7372_add_device_to_domain(&sh7372_a3rv, &vpu_device);
1043 sh7372_add_device_to_domain(&sh7372_a4mp, &spu0_device);
1044 sh7372_add_device_to_domain(&sh7372_a4mp, &spu1_device);
1045 sh7372_add_device_to_domain(&sh7372_a3sp, &scif0_device);
1046 sh7372_add_device_to_domain(&sh7372_a3sp, &scif1_device);
1047 sh7372_add_device_to_domain(&sh7372_a3sp, &scif2_device);
1048 sh7372_add_device_to_domain(&sh7372_a3sp, &scif3_device);
1049 sh7372_add_device_to_domain(&sh7372_a3sp, &scif4_device);
1050 sh7372_add_device_to_domain(&sh7372_a3sp, &scif5_device);
1051 sh7372_add_device_to_domain(&sh7372_a3sp, &scif6_device);
1052 sh7372_add_device_to_domain(&sh7372_a3sp, &iic1_device);
1053 sh7372_add_device_to_domain(&sh7372_a3sp, &dma0_device);
1054 sh7372_add_device_to_domain(&sh7372_a3sp, &dma1_device);
1055 sh7372_add_device_to_domain(&sh7372_a3sp, &dma2_device);
1056 sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma0_device);
1057 sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma1_device);
1058 sh7372_add_device_to_domain(&sh7372_a4r, &iic0_device);
1059 sh7372_add_device_to_domain(&sh7372_a4r, &veu0_device);
1060 sh7372_add_device_to_domain(&sh7372_a4r, &veu1_device);
1061 sh7372_add_device_to_domain(&sh7372_a4r, &veu2_device);
1062 sh7372_add_device_to_domain(&sh7372_a4r, &veu3_device);
1063 sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device);
1064 sh7372_add_device_to_domain(&sh7372_a4r, &tmu00_device);
1065 sh7372_add_device_to_domain(&sh7372_a4r, &tmu01_device);
1066
1067 rmobile_add_device_to_domain(&sh7372_pd_a3rv, &vpu_device); 1026 rmobile_add_device_to_domain(&sh7372_pd_a3rv, &vpu_device);
1068 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu0_device); 1027 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu0_device);
1069 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu1_device); 1028 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu1_device);