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authorFlorian Fainelli <florian@openwrt.org>2012-07-19 03:13:52 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-07-19 05:23:44 -0400
commit38be3c7e77ee9bc8ca34a83506e34809ec36c2a4 (patch)
tree340deb50989614b18cf9d9372be054e98d704fc1
parent6c37c9580409af7dc664bb6af0a85d540d63aeea (diff)
MIPS: BCM63XX: Fix BCM6368 IPSec clock bit
The IPsec clock bit is 18 and not 17. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 94d4faad29a1..fdcd78ca1b03 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -99,7 +99,7 @@
99#define CKCTL_6368_USBH_CLK_EN (1 << 15) 99#define CKCTL_6368_USBH_CLK_EN (1 << 15)
100#define CKCTL_6368_DISABLE_GLESS_EN (1 << 16) 100#define CKCTL_6368_DISABLE_GLESS_EN (1 << 16)
101#define CKCTL_6368_NAND_CLK_EN (1 << 17) 101#define CKCTL_6368_NAND_CLK_EN (1 << 17)
102#define CKCTL_6368_IPSEC_CLK_EN (1 << 17) 102#define CKCTL_6368_IPSEC_CLK_EN (1 << 18)
103 103
104#define CKCTL_6368_ALL_SAFE_EN (CKCTL_6368_SWPKT_USB_EN | \ 104#define CKCTL_6368_ALL_SAFE_EN (CKCTL_6368_SWPKT_USB_EN | \
105 CKCTL_6368_SWPKT_SAR_EN | \ 105 CKCTL_6368_SWPKT_SAR_EN | \