diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-08-25 10:07:58 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-09-30 09:16:45 -0400 |
commit | 2ea51fef8626debc6c3b73573cf99fae0593aa6a (patch) | |
tree | 6c52e1de3b44322345225d59523cec89d30d1dbc | |
parent | 470245652d98274568ac81a875c8312e73a433ef (diff) |
OMAP: DSS2: HDMI: remove edid parsing
OMAPFB handles EDID parsing now, using the common helper functions in
fbdev. We can remove the EDID parsing from HDMI driver.
Cc: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r-- | drivers/video/omap2/dss/hdmi.c | 154 | ||||
-rw-r--r-- | drivers/video/omap2/dss/hdmi_panel.c | 8 |
2 files changed, 1 insertions, 161 deletions
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index 8a04ee18d58f..bf85cbadc804 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c | |||
@@ -70,9 +70,6 @@ static struct { | |||
70 | struct hdmi_ip_data ip_data; | 70 | struct hdmi_ip_data ip_data; |
71 | int code; | 71 | int code; |
72 | int mode; | 72 | int mode; |
73 | u8 edid[HDMI_EDID_MAX_LENGTH]; | ||
74 | u8 edid_set; | ||
75 | bool custom_set; | ||
76 | 73 | ||
77 | struct clk *sys_clk; | 74 | struct clk *sys_clk; |
78 | } hdmi; | 75 | } hdmi; |
@@ -162,8 +159,6 @@ static const int code_vesa[85] = { | |||
162 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, | 159 | -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, |
163 | -1, 27, 28, -1, 33}; | 160 | -1, 27, 28, -1, 33}; |
164 | 161 | ||
165 | static const u8 edid_header[8] = {0x0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0}; | ||
166 | |||
167 | static int hdmi_runtime_get(void) | 162 | static int hdmi_runtime_get(void) |
168 | { | 163 | { |
169 | int r; | 164 | int r; |
@@ -193,21 +188,6 @@ int hdmi_init_display(struct omap_dss_device *dssdev) | |||
193 | return 0; | 188 | return 0; |
194 | } | 189 | } |
195 | 190 | ||
196 | static void copy_hdmi_to_dss_timings( | ||
197 | const struct hdmi_video_timings *hdmi_timings, | ||
198 | struct omap_video_timings *timings) | ||
199 | { | ||
200 | timings->x_res = hdmi_timings->x_res; | ||
201 | timings->y_res = hdmi_timings->y_res; | ||
202 | timings->pixel_clock = hdmi_timings->pixel_clock; | ||
203 | timings->hbp = hdmi_timings->hbp; | ||
204 | timings->hfp = hdmi_timings->hfp; | ||
205 | timings->hsw = hdmi_timings->hsw; | ||
206 | timings->vbp = hdmi_timings->vbp; | ||
207 | timings->vfp = hdmi_timings->vfp; | ||
208 | timings->vsw = hdmi_timings->vsw; | ||
209 | } | ||
210 | |||
211 | static int get_timings_index(void) | 191 | static int get_timings_index(void) |
212 | { | 192 | { |
213 | int code; | 193 | int code; |
@@ -270,130 +250,6 @@ static struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing) | |||
270 | return cm; | 250 | return cm; |
271 | } | 251 | } |
272 | 252 | ||
273 | static void get_horz_vert_timing_info(int current_descriptor_addrs, u8 *edid , | ||
274 | struct omap_video_timings *timings) | ||
275 | { | ||
276 | /* X and Y resolution */ | ||
277 | timings->x_res = (((edid[current_descriptor_addrs + 4] & 0xF0) << 4) | | ||
278 | edid[current_descriptor_addrs + 2]); | ||
279 | timings->y_res = (((edid[current_descriptor_addrs + 7] & 0xF0) << 4) | | ||
280 | edid[current_descriptor_addrs + 5]); | ||
281 | |||
282 | timings->pixel_clock = ((edid[current_descriptor_addrs + 1] << 8) | | ||
283 | edid[current_descriptor_addrs]); | ||
284 | |||
285 | timings->pixel_clock = 10 * timings->pixel_clock; | ||
286 | |||
287 | /* HORIZONTAL FRONT PORCH */ | ||
288 | timings->hfp = edid[current_descriptor_addrs + 8] | | ||
289 | ((edid[current_descriptor_addrs + 11] & 0xc0) << 2); | ||
290 | /* HORIZONTAL SYNC WIDTH */ | ||
291 | timings->hsw = edid[current_descriptor_addrs + 9] | | ||
292 | ((edid[current_descriptor_addrs + 11] & 0x30) << 4); | ||
293 | /* HORIZONTAL BACK PORCH */ | ||
294 | timings->hbp = (((edid[current_descriptor_addrs + 4] & 0x0F) << 8) | | ||
295 | edid[current_descriptor_addrs + 3]) - | ||
296 | (timings->hfp + timings->hsw); | ||
297 | /* VERTICAL FRONT PORCH */ | ||
298 | timings->vfp = ((edid[current_descriptor_addrs + 10] & 0xF0) >> 4) | | ||
299 | ((edid[current_descriptor_addrs + 11] & 0x0f) << 2); | ||
300 | /* VERTICAL SYNC WIDTH */ | ||
301 | timings->vsw = (edid[current_descriptor_addrs + 10] & 0x0F) | | ||
302 | ((edid[current_descriptor_addrs + 11] & 0x03) << 4); | ||
303 | /* VERTICAL BACK PORCH */ | ||
304 | timings->vbp = (((edid[current_descriptor_addrs + 7] & 0x0F) << 8) | | ||
305 | edid[current_descriptor_addrs + 6]) - | ||
306 | (timings->vfp + timings->vsw); | ||
307 | |||
308 | } | ||
309 | |||
310 | /* Description : This function gets the resolution information from EDID */ | ||
311 | static void get_edid_timing_data(u8 *edid) | ||
312 | { | ||
313 | u8 count; | ||
314 | u16 current_descriptor_addrs; | ||
315 | struct hdmi_cm cm; | ||
316 | struct omap_video_timings edid_timings; | ||
317 | |||
318 | /* search block 0, there are 4 DTDs arranged in priority order */ | ||
319 | for (count = 0; count < EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR; count++) { | ||
320 | current_descriptor_addrs = | ||
321 | EDID_DESCRIPTOR_BLOCK0_ADDRESS + | ||
322 | count * EDID_TIMING_DESCRIPTOR_SIZE; | ||
323 | get_horz_vert_timing_info(current_descriptor_addrs, | ||
324 | edid, &edid_timings); | ||
325 | cm = hdmi_get_code(&edid_timings); | ||
326 | DSSDBG("Block0[%d] value matches code = %d , mode = %d\n", | ||
327 | count, cm.code, cm.mode); | ||
328 | if (cm.code == -1) { | ||
329 | continue; | ||
330 | } else { | ||
331 | hdmi.code = cm.code; | ||
332 | hdmi.mode = cm.mode; | ||
333 | DSSDBG("code = %d , mode = %d\n", | ||
334 | hdmi.code, hdmi.mode); | ||
335 | return; | ||
336 | } | ||
337 | } | ||
338 | if (edid[0x7e] != 0x00) { | ||
339 | for (count = 0; count < EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR; | ||
340 | count++) { | ||
341 | current_descriptor_addrs = | ||
342 | EDID_DESCRIPTOR_BLOCK1_ADDRESS + | ||
343 | count * EDID_TIMING_DESCRIPTOR_SIZE; | ||
344 | get_horz_vert_timing_info(current_descriptor_addrs, | ||
345 | edid, &edid_timings); | ||
346 | cm = hdmi_get_code(&edid_timings); | ||
347 | DSSDBG("Block1[%d] value matches code = %d, mode = %d", | ||
348 | count, cm.code, cm.mode); | ||
349 | if (cm.code == -1) { | ||
350 | continue; | ||
351 | } else { | ||
352 | hdmi.code = cm.code; | ||
353 | hdmi.mode = cm.mode; | ||
354 | DSSDBG("code = %d , mode = %d\n", | ||
355 | hdmi.code, hdmi.mode); | ||
356 | return; | ||
357 | } | ||
358 | } | ||
359 | } | ||
360 | |||
361 | DSSINFO("no valid timing found , falling back to VGA\n"); | ||
362 | hdmi.code = 4; /* setting default value of 640 480 VGA */ | ||
363 | hdmi.mode = HDMI_DVI; | ||
364 | } | ||
365 | |||
366 | static void hdmi_read_edid(struct omap_video_timings *dp) | ||
367 | { | ||
368 | int ret = 0, code; | ||
369 | |||
370 | memset(hdmi.edid, 0, HDMI_EDID_MAX_LENGTH); | ||
371 | |||
372 | if (!hdmi.edid_set) | ||
373 | ret = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, hdmi.edid, | ||
374 | HDMI_EDID_MAX_LENGTH); | ||
375 | if (ret > 0) { | ||
376 | if (!memcmp(hdmi.edid, edid_header, sizeof(edid_header))) { | ||
377 | /* search for timings of default resolution */ | ||
378 | get_edid_timing_data(hdmi.edid); | ||
379 | hdmi.edid_set = true; | ||
380 | } | ||
381 | } else { | ||
382 | DSSWARN("failed to read E-EDID\n"); | ||
383 | } | ||
384 | |||
385 | if (!hdmi.edid_set) { | ||
386 | DSSINFO("fallback to VGA\n"); | ||
387 | hdmi.code = 4; /* setting default value of 640 480 VGA */ | ||
388 | hdmi.mode = HDMI_DVI; | ||
389 | } | ||
390 | |||
391 | code = get_timings_index(); | ||
392 | |||
393 | copy_hdmi_to_dss_timings(&cea_vesa_timings[code].timings, dp); | ||
394 | |||
395 | } | ||
396 | |||
397 | static void update_hdmi_timings(struct hdmi_config *cfg, | 253 | static void update_hdmi_timings(struct hdmi_config *cfg, |
398 | struct omap_video_timings *timings, int code) | 254 | struct omap_video_timings *timings, int code) |
399 | { | 255 | { |
@@ -479,13 +335,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev) | |||
479 | dssdev->panel.timings.x_res, | 335 | dssdev->panel.timings.x_res, |
480 | dssdev->panel.timings.y_res); | 336 | dssdev->panel.timings.y_res); |
481 | 337 | ||
482 | if (!hdmi.custom_set) { | ||
483 | DSSDBG("Read EDID as no EDID is not set on poweron\n"); | ||
484 | hdmi_read_edid(p); | ||
485 | } | ||
486 | code = get_timings_index(); | 338 | code = get_timings_index(); |
487 | copy_hdmi_to_dss_timings(&cea_vesa_timings[code].timings, | ||
488 | &dssdev->panel.timings); | ||
489 | update_hdmi_timings(&hdmi.ip_data.cfg, p, code); | 339 | update_hdmi_timings(&hdmi.ip_data.cfg, p, code); |
490 | 340 | ||
491 | phy = p->pixel_clock; | 341 | phy = p->pixel_clock; |
@@ -547,8 +397,6 @@ static void hdmi_power_off(struct omap_dss_device *dssdev) | |||
547 | hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); | 397 | hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); |
548 | hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); | 398 | hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); |
549 | hdmi_runtime_put(); | 399 | hdmi_runtime_put(); |
550 | |||
551 | hdmi.edid_set = 0; | ||
552 | } | 400 | } |
553 | 401 | ||
554 | int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev, | 402 | int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev, |
@@ -570,8 +418,6 @@ void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev) | |||
570 | { | 418 | { |
571 | struct hdmi_cm cm; | 419 | struct hdmi_cm cm; |
572 | 420 | ||
573 | hdmi.custom_set = 1; | ||
574 | |||
575 | cm = hdmi_get_code(&dssdev->panel.timings); | 421 | cm = hdmi_get_code(&dssdev->panel.timings); |
576 | hdmi.code = cm.code; | 422 | hdmi.code = cm.code; |
577 | hdmi.mode = cm.mode; | 423 | hdmi.mode = cm.mode; |
diff --git a/drivers/video/omap2/dss/hdmi_panel.c b/drivers/video/omap2/dss/hdmi_panel.c index 624f170a5e92..79a3a5ac8f1c 100644 --- a/drivers/video/omap2/dss/hdmi_panel.c +++ b/drivers/video/omap2/dss/hdmi_panel.c | |||
@@ -40,13 +40,7 @@ static int hdmi_panel_probe(struct omap_dss_device *dssdev) | |||
40 | dssdev->panel.config = OMAP_DSS_LCD_TFT | | 40 | dssdev->panel.config = OMAP_DSS_LCD_TFT | |
41 | OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IHS; | 41 | OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IHS; |
42 | 42 | ||
43 | /* | 43 | dssdev->panel.timings = (struct omap_video_timings){640, 480, 25175, 96, 16, 48, 2 , 11, 31}; |
44 | * Initialize the timings to 640 * 480 | ||
45 | * This is only for framebuffer update not for TV timing setting | ||
46 | * Setting TV timing will be done only on enable | ||
47 | */ | ||
48 | dssdev->panel.timings.x_res = 640; | ||
49 | dssdev->panel.timings.y_res = 480; | ||
50 | 44 | ||
51 | DSSDBG("hdmi_panel_probe x_res= %d y_res = %d\n", | 45 | DSSDBG("hdmi_panel_probe x_res= %d y_res = %d\n", |
52 | dssdev->panel.timings.x_res, | 46 | dssdev->panel.timings.x_res, |