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authorJames Smart <james.smart@emulex.com>2010-02-12 14:42:03 -0500
committerJames Bottomley <James.Bottomley@suse.de>2010-02-17 18:40:48 -0500
commit28baac7492fa084dbff6a1b9c4b42ed0d014b558 (patch)
treedcf6dc190d0b85153eb8606b64f83089fae8084f
parentecfd03c6a99ad98fea5cb75ec83cd9945adff8d9 (diff)
[SCSI] lpfc 8.3.9: SLI enhancments to support new hardware.
- Add support for the INTF (Interface) PCI register. - Add support for greater than 2 page SGLs. - Add support for up to 32 bit BDE lengths. - Implement the Port Capabilities Mailbox command. - Stop checking the Minor Code in the EQE structure. Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
-rw-r--r--drivers/scsi/lpfc/lpfc_crtn.h3
-rw-r--r--drivers/scsi/lpfc/lpfc_hw4.h242
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c187
-rw-r--r--drivers/scsi/lpfc/lpfc_mbox.c38
-rw-r--r--drivers/scsi/lpfc/lpfc_scsi.c9
-rw-r--r--drivers/scsi/lpfc/lpfc_sli.c27
-rw-r--r--drivers/scsi/lpfc/lpfc_sli4.h45
7 files changed, 451 insertions, 100 deletions
diff --git a/drivers/scsi/lpfc/lpfc_crtn.h b/drivers/scsi/lpfc/lpfc_crtn.h
index a717f0be7120..6f0fb51eb461 100644
--- a/drivers/scsi/lpfc/lpfc_crtn.h
+++ b/drivers/scsi/lpfc/lpfc_crtn.h
@@ -49,6 +49,9 @@ void lpfc_register_new_vport(struct lpfc_hba *, struct lpfc_vport *,
49void lpfc_unreg_vpi(struct lpfc_hba *, uint16_t, LPFC_MBOXQ_t *); 49void lpfc_unreg_vpi(struct lpfc_hba *, uint16_t, LPFC_MBOXQ_t *);
50void lpfc_init_link(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t); 50void lpfc_init_link(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t);
51void lpfc_request_features(struct lpfc_hba *, struct lpfcMboxq *); 51void lpfc_request_features(struct lpfc_hba *, struct lpfcMboxq *);
52void lpfc_supported_pages(struct lpfcMboxq *);
53void lpfc_sli4_params(struct lpfcMboxq *);
54int lpfc_pc_sli4_params_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
52 55
53struct lpfc_vport *lpfc_find_vport_by_did(struct lpfc_hba *, uint32_t); 56struct lpfc_vport *lpfc_find_vport_by_did(struct lpfc_hba *, uint32_t);
54void lpfc_cleanup_rcv_buffers(struct lpfc_vport *); 57void lpfc_cleanup_rcv_buffers(struct lpfc_vport *);
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index 999e49f6071e..820015fbc4d6 100644
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -52,29 +52,35 @@ struct dma_address {
52 uint32_t addr_hi; 52 uint32_t addr_hi;
53}; 53};
54 54
55#define LPFC_SLIREV_CONF_WORD 0x58
56struct lpfc_sli_intf { 55struct lpfc_sli_intf {
57 uint32_t word0; 56 uint32_t word0;
58#define lpfc_sli_intf_iftype_MASK 0x00000007 57#define lpfc_sli_intf_valid_SHIFT 29
59#define lpfc_sli_intf_iftype_SHIFT 0 58#define lpfc_sli_intf_valid_MASK 0x00000007
60#define lpfc_sli_intf_iftype_WORD word0 59#define lpfc_sli_intf_valid_WORD word0
61#define lpfc_sli_intf_rev_MASK 0x0000000f
62#define lpfc_sli_intf_rev_SHIFT 4
63#define lpfc_sli_intf_rev_WORD word0
64#define LPFC_SLIREV_CONF_SLI4 4
65#define lpfc_sli_intf_family_MASK 0x000000ff
66#define lpfc_sli_intf_family_SHIFT 8
67#define lpfc_sli_intf_family_WORD word0
68#define lpfc_sli_intf_feat1_MASK 0x000000ff
69#define lpfc_sli_intf_feat1_SHIFT 16
70#define lpfc_sli_intf_feat1_WORD word0
71#define lpfc_sli_intf_feat2_MASK 0x0000001f
72#define lpfc_sli_intf_feat2_SHIFT 24
73#define lpfc_sli_intf_feat2_WORD word0
74#define lpfc_sli_intf_valid_MASK 0x00000007
75#define lpfc_sli_intf_valid_SHIFT 29
76#define lpfc_sli_intf_valid_WORD word0
77#define LPFC_SLI_INTF_VALID 6 60#define LPFC_SLI_INTF_VALID 6
61#define lpfc_sli_intf_featurelevel2_SHIFT 24
62#define lpfc_sli_intf_featurelevel2_MASK 0x0000001F
63#define lpfc_sli_intf_featurelevel2_WORD word0
64#define lpfc_sli_intf_featurelevel1_SHIFT 16
65#define lpfc_sli_intf_featurelevel1_MASK 0x000000FF
66#define lpfc_sli_intf_featurelevel1_WORD word0
67#define LPFC_SLI_INTF_FEATURELEVEL1_1 1
68#define LPFC_SLI_INTF_FEATURELEVEL1_2 2
69#define lpfc_sli_intf_sli_family_SHIFT 8
70#define lpfc_sli_intf_sli_family_MASK 0x000000FF
71#define lpfc_sli_intf_sli_family_WORD word0
72#define LPFC_SLI_INTF_FAMILY_BE2 0
73#define LPFC_SLI_INTF_FAMILY_BE3 1
74#define lpfc_sli_intf_slirev_SHIFT 4
75#define lpfc_sli_intf_slirev_MASK 0x0000000F
76#define lpfc_sli_intf_slirev_WORD word0
77#define LPFC_SLI_INTF_REV_SLI3 3
78#define LPFC_SLI_INTF_REV_SLI4 4
79#define lpfc_sli_intf_if_type_SHIFT 0
80#define lpfc_sli_intf_if_type_MASK 0x00000007
81#define lpfc_sli_intf_if_type_WORD word0
82#define LPFC_SLI_INTF_IF_TYPE_0 0
83#define LPFC_SLI_INTF_IF_TYPE_1 1
78}; 84};
79 85
80#define LPFC_SLI4_MBX_EMBED true 86#define LPFC_SLI4_MBX_EMBED true
@@ -157,6 +163,9 @@ struct lpfc_sli_intf {
157#define LPFC_FP_DEF_IMAX 10000 163#define LPFC_FP_DEF_IMAX 10000
158#define LPFC_SP_DEF_IMAX 10000 164#define LPFC_SP_DEF_IMAX 10000
159 165
166/* PORT_CAPABILITIES constants. */
167#define LPFC_MAX_SUPPORTED_PAGES 8
168
160struct ulp_bde64 { 169struct ulp_bde64 {
161 union ULP_BDE_TUS { 170 union ULP_BDE_TUS {
162 uint32_t w; 171 uint32_t w;
@@ -512,7 +521,7 @@ struct lpfc_register {
512#define LPFC_UERR_STATUS_LO 0x00A0 521#define LPFC_UERR_STATUS_LO 0x00A0
513#define LPFC_UE_MASK_HI 0x00AC 522#define LPFC_UE_MASK_HI 0x00AC
514#define LPFC_UE_MASK_LO 0x00A8 523#define LPFC_UE_MASK_LO 0x00A8
515#define LPFC_SCRATCHPAD 0x0058 524#define LPFC_SLI_INTF 0x0058
516 525
517/* BAR0 Registers */ 526/* BAR0 Registers */
518#define LPFC_HST_STATE 0x00AC 527#define LPFC_HST_STATE 0x00AC
@@ -572,19 +581,6 @@ struct lpfc_register {
572#define LPFC_POST_STAGE_ARMFW_READY 0xC000 581#define LPFC_POST_STAGE_ARMFW_READY 0xC000
573#define LPFC_POST_STAGE_ARMFW_UE 0xF000 582#define LPFC_POST_STAGE_ARMFW_UE 0xF000
574 583
575#define lpfc_scratchpad_slirev_SHIFT 4
576#define lpfc_scratchpad_slirev_MASK 0xF
577#define lpfc_scratchpad_slirev_WORD word0
578#define lpfc_scratchpad_chiptype_SHIFT 8
579#define lpfc_scratchpad_chiptype_MASK 0xFF
580#define lpfc_scratchpad_chiptype_WORD word0
581#define lpfc_scratchpad_featurelevel1_SHIFT 16
582#define lpfc_scratchpad_featurelevel1_MASK 0xFF
583#define lpfc_scratchpad_featurelevel1_WORD word0
584#define lpfc_scratchpad_featurelevel2_SHIFT 24
585#define lpfc_scratchpad_featurelevel2_MASK 0xFF
586#define lpfc_scratchpad_featurelevel2_WORD word0
587
588/* BAR1 Registers */ 584/* BAR1 Registers */
589#define LPFC_IMR_MASK_ALL 0xFFFFFFFF 585#define LPFC_IMR_MASK_ALL 0xFFFFFFFF
590#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF 586#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF
@@ -1146,10 +1142,7 @@ struct sli4_sge { /* SLI-4 */
1146 this flag !! */ 1142 this flag !! */
1147#define lpfc_sli4_sge_last_MASK 0x00000001 1143#define lpfc_sli4_sge_last_MASK 0x00000001
1148#define lpfc_sli4_sge_last_WORD word2 1144#define lpfc_sli4_sge_last_WORD word2
1149 uint32_t word3; 1145 uint32_t sge_len;
1150#define lpfc_sli4_sge_len_SHIFT 0
1151#define lpfc_sli4_sge_len_MASK 0x0001FFFF
1152#define lpfc_sli4_sge_len_WORD word3
1153}; 1146};
1154 1147
1155struct fcf_record { 1148struct fcf_record {
@@ -1844,6 +1837,177 @@ struct lpfc_mbx_request_features {
1844#define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3 1837#define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3
1845}; 1838};
1846 1839
1840struct lpfc_mbx_supp_pages {
1841 uint32_t word1;
1842#define qs_SHIFT 0
1843#define qs_MASK 0x00000001
1844#define qs_WORD word1
1845#define wr_SHIFT 1
1846#define wr_MASK 0x00000001
1847#define wr_WORD word1
1848#define pf_SHIFT 8
1849#define pf_MASK 0x000000ff
1850#define pf_WORD word1
1851#define cpn_SHIFT 16
1852#define cpn_MASK 0x000000ff
1853#define cpn_WORD word1
1854 uint32_t word2;
1855#define list_offset_SHIFT 0
1856#define list_offset_MASK 0x000000ff
1857#define list_offset_WORD word2
1858#define next_offset_SHIFT 8
1859#define next_offset_MASK 0x000000ff
1860#define next_offset_WORD word2
1861#define elem_cnt_SHIFT 16
1862#define elem_cnt_MASK 0x000000ff
1863#define elem_cnt_WORD word2
1864 uint32_t word3;
1865#define pn_0_SHIFT 24
1866#define pn_0_MASK 0x000000ff
1867#define pn_0_WORD word3
1868#define pn_1_SHIFT 16
1869#define pn_1_MASK 0x000000ff
1870#define pn_1_WORD word3
1871#define pn_2_SHIFT 8
1872#define pn_2_MASK 0x000000ff
1873#define pn_2_WORD word3
1874#define pn_3_SHIFT 0
1875#define pn_3_MASK 0x000000ff
1876#define pn_3_WORD word3
1877 uint32_t word4;
1878#define pn_4_SHIFT 24
1879#define pn_4_MASK 0x000000ff
1880#define pn_4_WORD word4
1881#define pn_5_SHIFT 16
1882#define pn_5_MASK 0x000000ff
1883#define pn_5_WORD word4
1884#define pn_6_SHIFT 8
1885#define pn_6_MASK 0x000000ff
1886#define pn_6_WORD word4
1887#define pn_7_SHIFT 0
1888#define pn_7_MASK 0x000000ff
1889#define pn_7_WORD word4
1890 uint32_t rsvd[27];
1891#define LPFC_SUPP_PAGES 0
1892#define LPFC_BLOCK_GUARD_PROFILES 1
1893#define LPFC_SLI4_PARAMETERS 2
1894};
1895
1896struct lpfc_mbx_sli4_params {
1897 uint32_t word1;
1898#define qs_SHIFT 0
1899#define qs_MASK 0x00000001
1900#define qs_WORD word1
1901#define wr_SHIFT 1
1902#define wr_MASK 0x00000001
1903#define wr_WORD word1
1904#define pf_SHIFT 8
1905#define pf_MASK 0x000000ff
1906#define pf_WORD word1
1907#define cpn_SHIFT 16
1908#define cpn_MASK 0x000000ff
1909#define cpn_WORD word1
1910 uint32_t word2;
1911#define if_type_SHIFT 0
1912#define if_type_MASK 0x00000007
1913#define if_type_WORD word2
1914#define sli_rev_SHIFT 4
1915#define sli_rev_MASK 0x0000000f
1916#define sli_rev_WORD word2
1917#define sli_family_SHIFT 8
1918#define sli_family_MASK 0x000000ff
1919#define sli_family_WORD word2
1920#define featurelevel_1_SHIFT 16
1921#define featurelevel_1_MASK 0x000000ff
1922#define featurelevel_1_WORD word2
1923#define featurelevel_2_SHIFT 24
1924#define featurelevel_2_MASK 0x0000001f
1925#define featurelevel_2_WORD word2
1926 uint32_t word3;
1927#define fcoe_SHIFT 0
1928#define fcoe_MASK 0x00000001
1929#define fcoe_WORD word3
1930#define fc_SHIFT 1
1931#define fc_MASK 0x00000001
1932#define fc_WORD word3
1933#define nic_SHIFT 2
1934#define nic_MASK 0x00000001
1935#define nic_WORD word3
1936#define iscsi_SHIFT 3
1937#define iscsi_MASK 0x00000001
1938#define iscsi_WORD word3
1939#define rdma_SHIFT 4
1940#define rdma_MASK 0x00000001
1941#define rdma_WORD word3
1942 uint32_t sge_supp_len;
1943 uint32_t word5;
1944#define if_page_sz_SHIFT 0
1945#define if_page_sz_MASK 0x0000ffff
1946#define if_page_sz_WORD word5
1947#define loopbk_scope_SHIFT 24
1948#define loopbk_scope_MASK 0x0000000f
1949#define loopbk_scope_WORD word5
1950#define rq_db_window_SHIFT 28
1951#define rq_db_window_MASK 0x0000000f
1952#define rq_db_window_WORD word5
1953 uint32_t word6;
1954#define eq_pages_SHIFT 0
1955#define eq_pages_MASK 0x0000000f
1956#define eq_pages_WORD word6
1957#define eqe_size_SHIFT 8
1958#define eqe_size_MASK 0x000000ff
1959#define eqe_size_WORD word6
1960 uint32_t word7;
1961#define cq_pages_SHIFT 0
1962#define cq_pages_MASK 0x0000000f
1963#define cq_pages_WORD word7
1964#define cqe_size_SHIFT 8
1965#define cqe_size_MASK 0x000000ff
1966#define cqe_size_WORD word7
1967 uint32_t word8;
1968#define mq_pages_SHIFT 0
1969#define mq_pages_MASK 0x0000000f
1970#define mq_pages_WORD word8
1971#define mqe_size_SHIFT 8
1972#define mqe_size_MASK 0x000000ff
1973#define mqe_size_WORD word8
1974#define mq_elem_cnt_SHIFT 16
1975#define mq_elem_cnt_MASK 0x000000ff
1976#define mq_elem_cnt_WORD word8
1977 uint32_t word9;
1978#define wq_pages_SHIFT 0
1979#define wq_pages_MASK 0x0000ffff
1980#define wq_pages_WORD word9
1981#define wqe_size_SHIFT 8
1982#define wqe_size_MASK 0x000000ff
1983#define wqe_size_WORD word9
1984 uint32_t word10;
1985#define rq_pages_SHIFT 0
1986#define rq_pages_MASK 0x0000ffff
1987#define rq_pages_WORD word10
1988#define rqe_size_SHIFT 8
1989#define rqe_size_MASK 0x000000ff
1990#define rqe_size_WORD word10
1991 uint32_t word11;
1992#define hdr_pages_SHIFT 0
1993#define hdr_pages_MASK 0x0000000f
1994#define hdr_pages_WORD word11
1995#define hdr_size_SHIFT 8
1996#define hdr_size_MASK 0x0000000f
1997#define hdr_size_WORD word11
1998#define hdr_pp_align_SHIFT 16
1999#define hdr_pp_align_MASK 0x0000ffff
2000#define hdr_pp_align_WORD word11
2001 uint32_t word12;
2002#define sgl_pages_SHIFT 0
2003#define sgl_pages_MASK 0x0000000f
2004#define sgl_pages_WORD word12
2005#define sgl_pp_align_SHIFT 16
2006#define sgl_pp_align_MASK 0x0000ffff
2007#define sgl_pp_align_WORD word12
2008 uint32_t rsvd_13_63[51];
2009};
2010
1847/* Mailbox Completion Queue Error Messages */ 2011/* Mailbox Completion Queue Error Messages */
1848#define MB_CQE_STATUS_SUCCESS 0x0 2012#define MB_CQE_STATUS_SUCCESS 0x0
1849#define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1 2013#define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1
@@ -1894,6 +2058,8 @@ struct lpfc_mqe {
1894 struct lpfc_mbx_request_features req_ftrs; 2058 struct lpfc_mbx_request_features req_ftrs;
1895 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl; 2059 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl;
1896 struct lpfc_mbx_query_fw_cfg query_fw_cfg; 2060 struct lpfc_mbx_query_fw_cfg query_fw_cfg;
2061 struct lpfc_mbx_supp_pages supp_pages;
2062 struct lpfc_mbx_sli4_params sli4_params;
1897 struct lpfc_mbx_nop nop; 2063 struct lpfc_mbx_nop nop;
1898 } un; 2064 } un;
1899}; 2065};
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 6e04679167e3..b0b7bb39f054 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -2443,7 +2443,8 @@ lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
2443 shost->this_id = -1; 2443 shost->this_id = -1;
2444 shost->max_cmd_len = 16; 2444 shost->max_cmd_len = 16;
2445 if (phba->sli_rev == LPFC_SLI_REV4) { 2445 if (phba->sli_rev == LPFC_SLI_REV4) {
2446 shost->dma_boundary = LPFC_SLI4_MAX_SEGMENT_SIZE; 2446 shost->dma_boundary =
2447 phba->sli4_hba.pc_sli4_params.sge_supp_len;
2447 shost->sg_tablesize = phba->cfg_sg_seg_cnt; 2448 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
2448 } 2449 }
2449 2450
@@ -3621,8 +3622,10 @@ static int
3621lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) 3622lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3622{ 3623{
3623 struct lpfc_sli *psli; 3624 struct lpfc_sli *psli;
3624 int rc; 3625 LPFC_MBOXQ_t *mboxq;
3625 int i, hbq_count; 3626 int rc, i, hbq_count, buf_size, dma_buf_size, max_buf_size;
3627 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
3628 struct lpfc_mqe *mqe;
3626 3629
3627 /* Before proceed, wait for POST done and device ready */ 3630 /* Before proceed, wait for POST done and device ready */
3628 rc = lpfc_sli4_post_status_check(phba); 3631 rc = lpfc_sli4_post_status_check(phba);
@@ -3680,31 +3683,26 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3680 * used to create the sg_dma_buf_pool must be dynamically calculated. 3683 * used to create the sg_dma_buf_pool must be dynamically calculated.
3681 * 2 segments are added since the IOCB needs a command and response bde. 3684 * 2 segments are added since the IOCB needs a command and response bde.
3682 * To insure that the scsi sgl does not cross a 4k page boundary only 3685 * To insure that the scsi sgl does not cross a 4k page boundary only
3683 * sgl sizes of 1k, 2k, 4k, and 8k are supported. 3686 * sgl sizes of must be a power of 2.
3684 * Table of sgl sizes and seg_cnt:
3685 * sgl size, sg_seg_cnt total seg
3686 * 1k 50 52
3687 * 2k 114 116
3688 * 4k 242 244
3689 * 8k 498 500
3690 * cmd(32) + rsp(160) + (52 * sizeof(sli4_sge)) = 1024
3691 * cmd(32) + rsp(160) + (116 * sizeof(sli4_sge)) = 2048
3692 * cmd(32) + rsp(160) + (244 * sizeof(sli4_sge)) = 4096
3693 * cmd(32) + rsp(160) + (500 * sizeof(sli4_sge)) = 8192
3694 */ 3687 */
3695 if (phba->cfg_sg_seg_cnt <= LPFC_DEFAULT_SG_SEG_CNT) 3688 buf_size = (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) +
3696 phba->cfg_sg_seg_cnt = 50; 3689 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge)));
3697 else if (phba->cfg_sg_seg_cnt <= 114) 3690 /* Feature Level 1 hardware is limited to 2 pages */
3698 phba->cfg_sg_seg_cnt = 114; 3691 if ((bf_get(lpfc_sli_intf_featurelevel1, &phba->sli4_hba.sli_intf) ==
3699 else if (phba->cfg_sg_seg_cnt <= 242) 3692 LPFC_SLI_INTF_FEATURELEVEL1_1))
3700 phba->cfg_sg_seg_cnt = 242; 3693 max_buf_size = LPFC_SLI4_FL1_MAX_BUF_SIZE;
3701 else 3694 else
3702 phba->cfg_sg_seg_cnt = 498; 3695 max_buf_size = LPFC_SLI4_MAX_BUF_SIZE;
3703 3696 for (dma_buf_size = LPFC_SLI4_MIN_BUF_SIZE;
3704 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) 3697 dma_buf_size < max_buf_size && buf_size > dma_buf_size;
3705 + sizeof(struct fcp_rsp); 3698 dma_buf_size = dma_buf_size << 1)
3706 phba->cfg_sg_dma_buf_size += 3699 ;
3707 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge)); 3700 if (dma_buf_size == max_buf_size)
3701 phba->cfg_sg_seg_cnt = (dma_buf_size -
3702 sizeof(struct fcp_cmnd) - sizeof(struct fcp_rsp) -
3703 (2 * sizeof(struct sli4_sge))) /
3704 sizeof(struct sli4_sge);
3705 phba->cfg_sg_dma_buf_size = dma_buf_size;
3708 3706
3709 /* Initialize buffer queue management fields */ 3707 /* Initialize buffer queue management fields */
3710 hbq_count = lpfc_sli_hbq_count(); 3708 hbq_count = lpfc_sli_hbq_count();
@@ -3822,6 +3820,43 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3822 goto out_free_fcp_eq_hdl; 3820 goto out_free_fcp_eq_hdl;
3823 } 3821 }
3824 3822
3823 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3824 GFP_KERNEL);
3825 if (!mboxq) {
3826 rc = -ENOMEM;
3827 goto out_free_fcp_eq_hdl;
3828 }
3829
3830 /* Get the Supported Pages. It is always available. */
3831 lpfc_supported_pages(mboxq);
3832 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3833 if (unlikely(rc)) {
3834 rc = -EIO;
3835 mempool_free(mboxq, phba->mbox_mem_pool);
3836 goto out_free_fcp_eq_hdl;
3837 }
3838
3839 mqe = &mboxq->u.mqe;
3840 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
3841 LPFC_MAX_SUPPORTED_PAGES);
3842 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
3843 switch (pn_page[i]) {
3844 case LPFC_SLI4_PARAMETERS:
3845 phba->sli4_hba.pc_sli4_params.supported = 1;
3846 break;
3847 default:
3848 break;
3849 }
3850 }
3851
3852 /* Read the port's SLI4 Parameters capabilities if supported. */
3853 if (phba->sli4_hba.pc_sli4_params.supported)
3854 rc = lpfc_pc_sli4_params_get(phba, mboxq);
3855 mempool_free(mboxq, phba->mbox_mem_pool);
3856 if (rc) {
3857 rc = -EIO;
3858 goto out_free_fcp_eq_hdl;
3859 }
3825 return rc; 3860 return rc;
3826 3861
3827out_free_fcp_eq_hdl: 3862out_free_fcp_eq_hdl:
@@ -4825,7 +4860,7 @@ lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
4825int 4860int
4826lpfc_sli4_post_status_check(struct lpfc_hba *phba) 4861lpfc_sli4_post_status_check(struct lpfc_hba *phba)
4827{ 4862{
4828 struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg, scratchpad; 4863 struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg;
4829 int i, port_error = -ENODEV; 4864 int i, port_error = -ENODEV;
4830 4865
4831 if (!phba->sli4_hba.STAregaddr) 4866 if (!phba->sli4_hba.STAregaddr)
@@ -4861,14 +4896,21 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba)
4861 bf_get(lpfc_hst_state_port_status, &sta_reg)); 4896 bf_get(lpfc_hst_state_port_status, &sta_reg));
4862 4897
4863 /* Log device information */ 4898 /* Log device information */
4864 scratchpad.word0 = readl(phba->sli4_hba.SCRATCHPADregaddr); 4899 phba->sli4_hba.sli_intf.word0 = readl(phba->sli4_hba.SLIINTFregaddr);
4865 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4900 if (bf_get(lpfc_sli_intf_valid,
4866 "2534 Device Info: ChipType=0x%x, SliRev=0x%x, " 4901 &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_VALID) {
4867 "FeatureL1=0x%x, FeatureL2=0x%x\n", 4902 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4868 bf_get(lpfc_scratchpad_chiptype, &scratchpad), 4903 "2534 Device Info: ChipType=0x%x, SliRev=0x%x, "
4869 bf_get(lpfc_scratchpad_slirev, &scratchpad), 4904 "FeatureL1=0x%x, FeatureL2=0x%x\n",
4870 bf_get(lpfc_scratchpad_featurelevel1, &scratchpad), 4905 bf_get(lpfc_sli_intf_sli_family,
4871 bf_get(lpfc_scratchpad_featurelevel2, &scratchpad)); 4906 &phba->sli4_hba.sli_intf),
4907 bf_get(lpfc_sli_intf_slirev,
4908 &phba->sli4_hba.sli_intf),
4909 bf_get(lpfc_sli_intf_featurelevel1,
4910 &phba->sli4_hba.sli_intf),
4911 bf_get(lpfc_sli_intf_featurelevel2,
4912 &phba->sli4_hba.sli_intf));
4913 }
4872 phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr); 4914 phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr);
4873 phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr); 4915 phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr);
4874 /* With uncoverable error, log the error message and return error */ 4916 /* With uncoverable error, log the error message and return error */
@@ -4907,8 +4949,8 @@ lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba)
4907 LPFC_UE_MASK_LO; 4949 LPFC_UE_MASK_LO;
4908 phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p + 4950 phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p +
4909 LPFC_UE_MASK_HI; 4951 LPFC_UE_MASK_HI;
4910 phba->sli4_hba.SCRATCHPADregaddr = phba->sli4_hba.conf_regs_memmap_p + 4952 phba->sli4_hba.SLIINTFregaddr = phba->sli4_hba.conf_regs_memmap_p +
4911 LPFC_SCRATCHPAD; 4953 LPFC_SLI_INTF;
4912} 4954}
4913 4955
4914/** 4956/**
@@ -6981,6 +7023,73 @@ lpfc_sli4_hba_unset(struct lpfc_hba *phba)
6981 phba->pport->work_port_events = 0; 7023 phba->pport->work_port_events = 0;
6982} 7024}
6983 7025
7026 /**
7027 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
7028 * @phba: Pointer to HBA context object.
7029 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
7030 *
7031 * This function is called in the SLI4 code path to read the port's
7032 * sli4 capabilities.
7033 *
7034 * This function may be be called from any context that can block-wait
7035 * for the completion. The expectation is that this routine is called
7036 * typically from probe_one or from the online routine.
7037 **/
7038int
7039lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
7040{
7041 int rc;
7042 struct lpfc_mqe *mqe;
7043 struct lpfc_pc_sli4_params *sli4_params;
7044 uint32_t mbox_tmo;
7045
7046 rc = 0;
7047 mqe = &mboxq->u.mqe;
7048
7049 /* Read the port's SLI4 Parameters port capabilities */
7050 lpfc_sli4_params(mboxq);
7051 if (!phba->sli4_hba.intr_enable)
7052 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7053 else {
7054 mbox_tmo = lpfc_mbox_tmo_val(phba, MBX_PORT_CAPABILITIES);
7055 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
7056 }
7057
7058 if (unlikely(rc))
7059 return 1;
7060
7061 sli4_params = &phba->sli4_hba.pc_sli4_params;
7062 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
7063 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
7064 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
7065 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
7066 &mqe->un.sli4_params);
7067 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
7068 &mqe->un.sli4_params);
7069 sli4_params->proto_types = mqe->un.sli4_params.word3;
7070 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
7071 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
7072 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
7073 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
7074 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
7075 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
7076 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
7077 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
7078 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
7079 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
7080 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
7081 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
7082 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
7083 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
7084 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
7085 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
7086 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
7087 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
7088 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
7089 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
7090 return rc;
7091}
7092
6984/** 7093/**
6985 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. 7094 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
6986 * @pdev: pointer to PCI device 7095 * @pdev: pointer to PCI device
@@ -8053,11 +8162,11 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
8053 int rc; 8162 int rc;
8054 struct lpfc_sli_intf intf; 8163 struct lpfc_sli_intf intf;
8055 8164
8056 if (pci_read_config_dword(pdev, LPFC_SLIREV_CONF_WORD, &intf.word0)) 8165 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
8057 return -ENODEV; 8166 return -ENODEV;
8058 8167
8059 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && 8168 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
8060 (bf_get(lpfc_sli_intf_rev, &intf) == LPFC_SLIREV_CONF_SLI4)) 8169 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
8061 rc = lpfc_pci_probe_one_s4(pdev, pid); 8170 rc = lpfc_pci_probe_one_s4(pdev, pid);
8062 else 8171 else
8063 rc = lpfc_pci_probe_one_s3(pdev, pid); 8172 rc = lpfc_pci_probe_one_s3(pdev, pid);
diff --git a/drivers/scsi/lpfc/lpfc_mbox.c b/drivers/scsi/lpfc/lpfc_mbox.c
index c2cc29f70a4b..6c1d8b3fe8cc 100644
--- a/drivers/scsi/lpfc/lpfc_mbox.c
+++ b/drivers/scsi/lpfc/lpfc_mbox.c
@@ -2052,3 +2052,41 @@ lpfc_resume_rpi(struct lpfcMboxq *mbox, struct lpfc_nodelist *ndlp)
2052 bf_set(lpfc_resume_rpi_ii, resume_rpi, RESUME_INDEX_RPI); 2052 bf_set(lpfc_resume_rpi_ii, resume_rpi, RESUME_INDEX_RPI);
2053 resume_rpi->event_tag = ndlp->phba->fc_eventTag; 2053 resume_rpi->event_tag = ndlp->phba->fc_eventTag;
2054} 2054}
2055
2056/**
2057 * lpfc_supported_pages - Initialize the PORT_CAPABILITIES supported pages
2058 * mailbox command.
2059 * @mbox: pointer to lpfc mbox command to initialize.
2060 *
2061 * The PORT_CAPABILITIES supported pages mailbox command is issued to
2062 * retrieve the particular feature pages supported by the port.
2063 **/
2064void
2065lpfc_supported_pages(struct lpfcMboxq *mbox)
2066{
2067 struct lpfc_mbx_supp_pages *supp_pages;
2068
2069 memset(mbox, 0, sizeof(*mbox));
2070 supp_pages = &mbox->u.mqe.un.supp_pages;
2071 bf_set(lpfc_mqe_command, &mbox->u.mqe, MBX_PORT_CAPABILITIES);
2072 bf_set(cpn, supp_pages, LPFC_SUPP_PAGES);
2073}
2074
2075/**
2076 * lpfc_sli4_params - Initialize the PORT_CAPABILITIES SLI4 Params
2077 * mailbox command.
2078 * @mbox: pointer to lpfc mbox command to initialize.
2079 *
2080 * The PORT_CAPABILITIES SLI4 parameters mailbox command is issued to
2081 * retrieve the particular SLI4 features supported by the port.
2082 **/
2083void
2084lpfc_sli4_params(struct lpfcMboxq *mbox)
2085{
2086 struct lpfc_mbx_sli4_params *sli4_params;
2087
2088 memset(mbox, 0, sizeof(*mbox));
2089 sli4_params = &mbox->u.mqe.un.sli4_params;
2090 bf_set(lpfc_mqe_command, &mbox->u.mqe, MBX_PORT_CAPABILITIES);
2091 bf_set(cpn, sli4_params, LPFC_SLI4_PARAMETERS);
2092}
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index 8f4b90a9d151..8e98c6335e00 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -798,19 +798,17 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)
798 */ 798 */
799 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd)); 799 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd));
800 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd)); 800 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd));
801 bf_set(lpfc_sli4_sge_len, sgl, sizeof(struct fcp_cmnd));
802 bf_set(lpfc_sli4_sge_last, sgl, 0); 801 bf_set(lpfc_sli4_sge_last, sgl, 0);
803 sgl->word2 = cpu_to_le32(sgl->word2); 802 sgl->word2 = cpu_to_le32(sgl->word2);
804 sgl->word3 = cpu_to_le32(sgl->word3); 803 sgl->sge_len = cpu_to_le32(sizeof(struct fcp_cmnd));
805 sgl++; 804 sgl++;
806 805
807 /* Setup the physical region for the FCP RSP */ 806 /* Setup the physical region for the FCP RSP */
808 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_rsp)); 807 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_rsp));
809 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_rsp)); 808 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_rsp));
810 bf_set(lpfc_sli4_sge_len, sgl, sizeof(struct fcp_rsp));
811 bf_set(lpfc_sli4_sge_last, sgl, 1); 809 bf_set(lpfc_sli4_sge_last, sgl, 1);
812 sgl->word2 = cpu_to_le32(sgl->word2); 810 sgl->word2 = cpu_to_le32(sgl->word2);
813 sgl->word3 = cpu_to_le32(sgl->word3); 811 sgl->sge_len = cpu_to_le32(sizeof(struct fcp_rsp));
814 812
815 /* 813 /*
816 * Since the IOCB for the FCP I/O is built into this 814 * Since the IOCB for the FCP I/O is built into this
@@ -1872,7 +1870,6 @@ lpfc_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd)
1872 scsi_for_each_sg(scsi_cmnd, sgel, nseg, num_bde) { 1870 scsi_for_each_sg(scsi_cmnd, sgel, nseg, num_bde) {
1873 physaddr = sg_dma_address(sgel); 1871 physaddr = sg_dma_address(sgel);
1874 dma_len = sg_dma_len(sgel); 1872 dma_len = sg_dma_len(sgel);
1875 bf_set(lpfc_sli4_sge_len, sgl, sg_dma_len(sgel));
1876 sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr)); 1873 sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr));
1877 sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr)); 1874 sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr));
1878 if ((num_bde + 1) == nseg) 1875 if ((num_bde + 1) == nseg)
@@ -1881,7 +1878,7 @@ lpfc_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd)
1881 bf_set(lpfc_sli4_sge_last, sgl, 0); 1878 bf_set(lpfc_sli4_sge_last, sgl, 0);
1882 bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 1879 bf_set(lpfc_sli4_sge_offset, sgl, dma_offset);
1883 sgl->word2 = cpu_to_le32(sgl->word2); 1880 sgl->word2 = cpu_to_le32(sgl->word2);
1884 sgl->word3 = cpu_to_le32(sgl->word3); 1881 sgl->sge_len = cpu_to_le32(dma_len);
1885 dma_offset += dma_len; 1882 dma_offset += dma_len;
1886 sgl++; 1883 sgl++;
1887 } 1884 }
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index d2ddf7d9e1bb..35e3b96d4e07 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -5739,19 +5739,19 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
5739 5739
5740 for (i = 0; i < numBdes; i++) { 5740 for (i = 0; i < numBdes; i++) {
5741 /* Should already be byte swapped. */ 5741 /* Should already be byte swapped. */
5742 sgl->addr_hi = bpl->addrHigh; 5742 sgl->addr_hi = bpl->addrHigh;
5743 sgl->addr_lo = bpl->addrLow; 5743 sgl->addr_lo = bpl->addrLow;
5744 /* swap the size field back to the cpu so we 5744
5745 * can assign it to the sgl.
5746 */
5747 bde.tus.w = le32_to_cpu(bpl->tus.w);
5748 bf_set(lpfc_sli4_sge_len, sgl, bde.tus.f.bdeSize);
5749 if ((i+1) == numBdes) 5745 if ((i+1) == numBdes)
5750 bf_set(lpfc_sli4_sge_last, sgl, 1); 5746 bf_set(lpfc_sli4_sge_last, sgl, 1);
5751 else 5747 else
5752 bf_set(lpfc_sli4_sge_last, sgl, 0); 5748 bf_set(lpfc_sli4_sge_last, sgl, 0);
5753 sgl->word2 = cpu_to_le32(sgl->word2); 5749 sgl->word2 = cpu_to_le32(sgl->word2);
5754 sgl->word3 = cpu_to_le32(sgl->word3); 5750 /* swap the size field back to the cpu so we
5751 * can assign it to the sgl.
5752 */
5753 bde.tus.w = le32_to_cpu(bpl->tus.w);
5754 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
5755 bpl++; 5755 bpl++;
5756 sgl++; 5756 sgl++;
5757 } 5757 }
@@ -5764,11 +5764,10 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
5764 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh); 5764 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
5765 sgl->addr_lo = 5765 sgl->addr_lo =
5766 cpu_to_le32(icmd->un.genreq64.bdl.addrLow); 5766 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
5767 bf_set(lpfc_sli4_sge_len, sgl,
5768 icmd->un.genreq64.bdl.bdeSize);
5769 bf_set(lpfc_sli4_sge_last, sgl, 1); 5767 bf_set(lpfc_sli4_sge_last, sgl, 1);
5770 sgl->word2 = cpu_to_le32(sgl->word2); 5768 sgl->word2 = cpu_to_le32(sgl->word2);
5771 sgl->word3 = cpu_to_le32(sgl->word3); 5769 sgl->sge_len =
5770 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
5772 } 5771 }
5773 return sglq->sli4_xritag; 5772 return sglq->sli4_xritag;
5774} 5773}
@@ -8934,8 +8933,7 @@ lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe)
8934 int ecount = 0; 8933 int ecount = 0;
8935 uint16_t cqid; 8934 uint16_t cqid;
8936 8935
8937 if (bf_get(lpfc_eqe_major_code, eqe) != 0 || 8936 if (bf_get(lpfc_eqe_major_code, eqe) != 0) {
8938 bf_get(lpfc_eqe_minor_code, eqe) != 0) {
8939 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 8937 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8940 "0359 Not a valid slow-path completion " 8938 "0359 Not a valid slow-path completion "
8941 "event: majorcode=x%x, minorcode=x%x\n", 8939 "event: majorcode=x%x, minorcode=x%x\n",
@@ -9167,8 +9165,7 @@ lpfc_sli4_fp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
9167 uint16_t cqid; 9165 uint16_t cqid;
9168 int ecount = 0; 9166 int ecount = 0;
9169 9167
9170 if (unlikely(bf_get(lpfc_eqe_major_code, eqe) != 0) || 9168 if (unlikely(bf_get(lpfc_eqe_major_code, eqe) != 0)) {
9171 unlikely(bf_get(lpfc_eqe_minor_code, eqe) != 0)) {
9172 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 9169 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9173 "0366 Not a valid fast-path completion " 9170 "0366 Not a valid fast-path completion "
9174 "event: majorcode=x%x, minorcode=x%x\n", 9171 "event: majorcode=x%x, minorcode=x%x\n",
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index 0a4f59ea21d0..86308836600f 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -264,7 +264,10 @@ struct lpfc_bmbx {
264#define SLI4_CT_VFI 2 264#define SLI4_CT_VFI 2
265#define SLI4_CT_FCFI 3 265#define SLI4_CT_FCFI 3
266 266
267#define LPFC_SLI4_MAX_SEGMENT_SIZE 0x10000 267#define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE 0x10000
268#define LPFC_SLI4_FL1_MAX_BUF_SIZE 0X2000
269#define LPFC_SLI4_MIN_BUF_SIZE 0x400
270#define LPFC_SLI4_MAX_BUF_SIZE 0x20000
268 271
269/* 272/*
270 * SLI4 specific data structures 273 * SLI4 specific data structures
@@ -298,6 +301,42 @@ struct lpfc_fcp_eq_hdl {
298 struct lpfc_hba *phba; 301 struct lpfc_hba *phba;
299}; 302};
300 303
304/* Port Capabilities for SLI4 Parameters */
305struct lpfc_pc_sli4_params {
306 uint32_t supported;
307 uint32_t if_type;
308 uint32_t sli_rev;
309 uint32_t sli_family;
310 uint32_t featurelevel_1;
311 uint32_t featurelevel_2;
312 uint32_t proto_types;
313#define LPFC_SLI4_PROTO_FCOE 0x0000001
314#define LPFC_SLI4_PROTO_FC 0x0000002
315#define LPFC_SLI4_PROTO_NIC 0x0000004
316#define LPFC_SLI4_PROTO_ISCSI 0x0000008
317#define LPFC_SLI4_PROTO_RDMA 0x0000010
318 uint32_t sge_supp_len;
319 uint32_t if_page_sz;
320 uint32_t rq_db_window;
321 uint32_t loopbk_scope;
322 uint32_t eq_pages_max;
323 uint32_t eqe_size;
324 uint32_t cq_pages_max;
325 uint32_t cqe_size;
326 uint32_t mq_pages_max;
327 uint32_t mqe_size;
328 uint32_t mq_elem_cnt;
329 uint32_t wq_pages_max;
330 uint32_t wqe_size;
331 uint32_t rq_pages_max;
332 uint32_t rqe_size;
333 uint32_t hdr_pages_max;
334 uint32_t hdr_size;
335 uint32_t hdr_pp_align;
336 uint32_t sgl_pages_max;
337 uint32_t sgl_pp_align;
338};
339
301/* SLI4 HBA data structure entries */ 340/* SLI4 HBA data structure entries */
302struct lpfc_sli4_hba { 341struct lpfc_sli4_hba {
303 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 342 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
@@ -311,7 +350,7 @@ struct lpfc_sli4_hba {
311 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */ 350 void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
312 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */ 351 void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
313 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */ 352 void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
314 void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */ 353 void __iomem *SLIINTFregaddr; /* Address to SLI_INTF register */
315 /* BAR1 FCoE function CSR register memory map */ 354 /* BAR1 FCoE function CSR register memory map */
316 void __iomem *STAregaddr; /* Address to HST_STATE register */ 355 void __iomem *STAregaddr; /* Address to HST_STATE register */
317 void __iomem *ISRregaddr; /* Address to HST_ISR register */ 356 void __iomem *ISRregaddr; /* Address to HST_ISR register */
@@ -326,6 +365,8 @@ struct lpfc_sli4_hba {
326 365
327 uint32_t ue_mask_lo; 366 uint32_t ue_mask_lo;
328 uint32_t ue_mask_hi; 367 uint32_t ue_mask_hi;
368 struct lpfc_register sli_intf;
369 struct lpfc_pc_sli4_params pc_sli4_params;
329 struct msix_entry *msix_entries; 370 struct msix_entry *msix_entries;
330 uint32_t cfg_eqn; 371 uint32_t cfg_eqn;
331 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */ 372 struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */