diff options
author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2012-03-17 05:30:16 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@ti.com> | 2012-07-25 19:05:22 -0400 |
commit | 11d6ec2e488f5613ab380bee9dc9a67c54813b60 (patch) | |
tree | c7fa2da4c5a2ab18d55be067a46d29bfb4f8ed02 | |
parent | 28a33cbc24e4256c143dce96c7d93bf423229f92 (diff) |
ARM: OMAP: timer: allow gp timer clock-event to be used on both cpus
For coupled cpuidle to work when both cpus are active, it needs a global timer
that can handle events for both cpus. This timer is used as the broadcast
clock-event when the per-cpu timer hardware stop in low power states.
Set the cpumask of clockevent_gpt to all cpus, set the rating correctly, and
set the irq to allow the clockevent core to determine the affinity of the
timer.
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
-rw-r--r-- | arch/arm/mach-omap2/timer.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 840929bd9dae..9b7a07360610 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -135,6 +135,7 @@ static struct clock_event_device clockevent_gpt = { | |||
135 | .name = "gp_timer", | 135 | .name = "gp_timer", |
136 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 136 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
137 | .shift = 32, | 137 | .shift = 32, |
138 | .rating = 300, | ||
138 | .set_next_event = omap2_gp_timer_set_next_event, | 139 | .set_next_event = omap2_gp_timer_set_next_event, |
139 | .set_mode = omap2_gp_timer_set_mode, | 140 | .set_mode = omap2_gp_timer_set_mode, |
140 | }; | 141 | }; |
@@ -228,7 +229,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | |||
228 | clockevent_delta2ns(3, &clockevent_gpt); | 229 | clockevent_delta2ns(3, &clockevent_gpt); |
229 | /* Timer internal resynch latency. */ | 230 | /* Timer internal resynch latency. */ |
230 | 231 | ||
231 | clockevent_gpt.cpumask = cpumask_of(0); | 232 | clockevent_gpt.cpumask = cpu_possible_mask; |
233 | clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); | ||
232 | clockevents_register_device(&clockevent_gpt); | 234 | clockevents_register_device(&clockevent_gpt); |
233 | 235 | ||
234 | pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", | 236 | pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", |