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authorRafał Miłecki <zajec5@gmail.com>2011-04-23 13:30:29 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-04-26 15:50:29 -0400
commit04ad1fb2640a4f23e99ccb705c179d64abac03f2 (patch)
tree7a2cf668c2f010dc61e072c68e82ee68b685c61a
parenta6ef8143839a8640532ba473906beb1a38b03e29 (diff)
ssb: update reject bit for Target State Low
My 14e4:4315 is SSB_IDLOW_SSBREV_26: read32 0xfaafcff8 -> 0x600422d5 My 14e4:4328 is SSB_IDLOW_SSBREV_24: read32 0xfaafcff8 -> 0x400422c5 My 14e4:432b is SSB_IDLOW_SSBREV_26 again: read32 0xfaafcff8 -> 0x600422d5 For all of them wl driver is using 0x2 reject bit: write32(0xf98) <- 0x00010002 So it seems SSB 2.3 is the exception using another bit. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/ssb/main.c15
-rw-r--r--include/linux/ssb/ssb_regs.h2
2 files changed, 8 insertions, 9 deletions
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 74aa2cca7d8c..ad3da93a428c 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1117,23 +1117,22 @@ static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1117{ 1117{
1118 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; 1118 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1119 1119
1120 /* The REJECT bit changed position in TMSLOW between 1120 /* The REJECT bit seems to be different for Backplane rev 2.3 */
1121 * Backplane revisions. */
1122 switch (rev) { 1121 switch (rev) {
1123 case SSB_IDLOW_SSBREV_22: 1122 case SSB_IDLOW_SSBREV_22:
1124 return SSB_TMSLOW_REJECT_22; 1123 case SSB_IDLOW_SSBREV_24:
1124 case SSB_IDLOW_SSBREV_26:
1125 return SSB_TMSLOW_REJECT;
1125 case SSB_IDLOW_SSBREV_23: 1126 case SSB_IDLOW_SSBREV_23:
1126 return SSB_TMSLOW_REJECT_23; 1127 return SSB_TMSLOW_REJECT_23;
1127 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */ 1128 case SSB_IDLOW_SSBREV_25: /* TODO - find the proper REJECT bit */
1128 case SSB_IDLOW_SSBREV_25: /* same here */
1129 case SSB_IDLOW_SSBREV_26: /* same here */
1130 case SSB_IDLOW_SSBREV_27: /* same here */ 1129 case SSB_IDLOW_SSBREV_27: /* same here */
1131 return SSB_TMSLOW_REJECT_23; /* this is a guess */ 1130 return SSB_TMSLOW_REJECT; /* this is a guess */
1132 default: 1131 default:
1133 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev); 1132 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1134 WARN_ON(1); 1133 WARN_ON(1);
1135 } 1134 }
1136 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23); 1135 return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
1137} 1136}
1138 1137
1139int ssb_device_is_enabled(struct ssb_device *dev) 1138int ssb_device_is_enabled(struct ssb_device *dev)
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 402955ae48ce..efbf459d571c 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -97,7 +97,7 @@
97#define SSB_INTVEC_ENET1 0x00000040 /* Enable interrupts for enet 1 */ 97#define SSB_INTVEC_ENET1 0x00000040 /* Enable interrupts for enet 1 */
98#define SSB_TMSLOW 0x0F98 /* SB Target State Low */ 98#define SSB_TMSLOW 0x0F98 /* SB Target State Low */
99#define SSB_TMSLOW_RESET 0x00000001 /* Reset */ 99#define SSB_TMSLOW_RESET 0x00000001 /* Reset */
100#define SSB_TMSLOW_REJECT_22 0x00000002 /* Reject (Backplane rev 2.2) */ 100#define SSB_TMSLOW_REJECT 0x00000002 /* Reject (Standard Backplane) */
101#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */ 101#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
102#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ 102#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
103#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */ 103#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */