intel-iommu: Tidy up iommu->gcmd handling

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

3 files changed, 15 insertions, 20 deletions

diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index df6af0d4ec03..faf77a00cafe 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -784,7 +784,6 @@ void dmar_disable_qi(struct intel_iommu *iommu)
                 cpu_relax();
 
         iommu->gcmd &= ~DMA_GCMD_QIE;
-
         writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl,
@@ -798,7 +797,7 @@ end:
  */
 static void __dmar_enable_qi(struct intel_iommu *iommu)
 {
-        u32 cmd, sts;
+        u32 sts;
         unsigned long flags;
         struct q_inval *qi = iommu->qi;
 
@@ -812,9 +811,8 @@ static void __dmar_enable_qi(struct intel_iommu *iommu)
 
         dmar_writeq(iommu->reg + DMAR_IQA_REG, virt_to_phys(qi->desc));
 
-        cmd = iommu->gcmd | DMA_GCMD_QIE;
         iommu->gcmd |= DMA_GCMD_QIE;
-        writel(cmd, iommu->reg + DMAR_GCMD_REG);
+        writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         /* Make sure hardware complete it */
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, (sts & DMA_GSTS_QIES), sts);
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 2e2c7406131d..bc99b1e47fbc 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -819,7 +819,7 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu)
 static void iommu_set_root_entry(struct intel_iommu *iommu)
 {
         void *addr;
-        u32 cmd, sts;
+        u32 sts;
         unsigned long flag;
 
         addr = iommu->root_entry;
@@ -827,12 +827,11 @@ static void iommu_set_root_entry(struct intel_iommu *iommu)
         spin_lock_irqsave(&iommu->register_lock, flag);
         dmar_writeq(iommu->reg + DMAR_RTADDR_REG, virt_to_phys(addr));
 
-        cmd = iommu->gcmd | DMA_GCMD_SRTP;
-        writel(cmd, iommu->reg + DMAR_GCMD_REG);
+        writel(iommu->gcmd | DMA_GCMD_SRTP, iommu->reg + DMAR_GCMD_REG);
 
         /* Make sure hardware complete it */
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
-                readl, (sts & DMA_GSTS_RTPS), sts);
+                      readl, (sts & DMA_GSTS_RTPS), sts);
 
         spin_unlock_irqrestore(&iommu->register_lock, flag);
 }
@@ -844,12 +843,13 @@ static void iommu_flush_write_buffer(struct intel_iommu *iommu)
 
         if (!rwbf_quirk && !cap_rwbf(iommu->cap))
                 return;
+
         spin_lock_irqsave(&iommu->register_lock, flag);
         writel(iommu->gcmd | DMA_GCMD_WBF, iommu->reg + DMAR_GCMD_REG);
 
         /* Make sure hardware complete it */
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
-                        readl, (!(val & DMA_GSTS_WBFS)), val);
+                      readl, (!(val & DMA_GSTS_WBFS)), val);
 
         spin_unlock_irqrestore(&iommu->register_lock, flag);
 }
@@ -995,13 +995,13 @@ static int iommu_enable_translation(struct intel_iommu *iommu)
         unsigned long flags;
 
         spin_lock_irqsave(&iommu->register_lock, flags);
-        writel(iommu->gcmd|DMA_GCMD_TE, iommu->reg + DMAR_GCMD_REG);
+        iommu->gcmd |= DMA_GCMD_TE;
+        writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         /* Make sure hardware complete it */
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
-                readl, (sts & DMA_GSTS_TES), sts);
+                      readl, (sts & DMA_GSTS_TES), sts);
 
-        iommu->gcmd |= DMA_GCMD_TE;
         spin_unlock_irqrestore(&iommu->register_lock, flags);
         return 0;
 }
@@ -1017,7 +1017,7 @@ static int iommu_disable_translation(struct intel_iommu *iommu)
 
         /* Make sure hardware complete it */
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
-                readl, (!(sts & DMA_GSTS_TES)), sts);
+                      readl, (!(sts & DMA_GSTS_TES)), sts);
 
         spin_unlock_irqrestore(&iommu->register_lock, flag);
         return 0;
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index f5e0ea724a6f..166959614087 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -404,7 +404,7 @@ int free_irte(int irq)
 static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
 {
         u64 addr;
-        u32 cmd, sts;
+        u32 sts;
         unsigned long flags;
 
         addr = virt_to_phys((void *)iommu->ir_table->base);
@@ -415,9 +415,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
                     (addr) | IR_X2APIC_MODE(mode) | INTR_REMAP_TABLE_REG_SIZE);
 
         /* Set interrupt-remapping table pointer */
-        cmd = iommu->gcmd | DMA_GCMD_SIRTP;
         iommu->gcmd |= DMA_GCMD_SIRTP;
-        writel(cmd, iommu->reg + DMAR_GCMD_REG);
+        writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
                       readl, (sts & DMA_GSTS_IRTPS), sts);
@@ -427,9 +426,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
                 spin_lock_irqsave(&iommu->register_lock, flags);
 
                 /* enable comaptiblity format interrupt pass through */
-                cmd = iommu->gcmd | DMA_GCMD_CFI;
                 iommu->gcmd |= DMA_GCMD_CFI;
-                writel(cmd, iommu->reg + DMAR_GCMD_REG);
+                writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
                 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
                               readl, (sts & DMA_GSTS_CFIS), sts);
@@ -446,9 +444,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
         spin_lock_irqsave(&iommu->register_lock, flags);
 
         /* Enable interrupt-remapping */
-        cmd = iommu->gcmd | DMA_GCMD_IRE;
         iommu->gcmd |= DMA_GCMD_IRE;
-        writel(cmd, iommu->reg + DMAR_GCMD_REG);
+        writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
                       readl, (sts & DMA_GSTS_IRES), sts);