diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2009-11-12 15:47:57 -0500 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-11-18 04:41:21 -0500 |
commit | ae55326a00a6e3cf35e0469b5353aa171aee5407 (patch) | |
tree | a4877aa2007afb4e9b6b648420a7663e2d02c386 | |
parent | 4f683a046cb45f74610fb790e6affa7604636a9f (diff) |
imx: add namespace prefixes for symbols in mx35.h
The old names are still defined using the new names.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx35.h | 49 |
1 files changed, 32 insertions, 17 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index ab4cfec6c8ab..42b2a99732f6 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h | |||
@@ -2,29 +2,44 @@ | |||
2 | * IRAM | 2 | * IRAM |
3 | */ | 3 | */ |
4 | #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ | 4 | #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ |
5 | #define MX35_IRAM_SIZE SZ_128K | 5 | #define MX35_IRAM_SIZE SZ_128K |
6 | 6 | ||
7 | #define MXC_FEC_BASE_ADDR 0x50038000 | 7 | #define MX35_FEC_BASE_ADDR 0x50038000 |
8 | #define MX35_OTG_BASE_ADDR 0x53ff4000 | 8 | #define MX35_OTG_BASE_ADDR 0x53ff4000 |
9 | #define MX35_NFC_BASE_ADDR 0xBB000000 | 9 | #define MX35_NFC_BASE_ADDR 0xbb000000 |
10 | 10 | ||
11 | /* | 11 | /* |
12 | * Interrupt numbers | 12 | * Interrupt numbers |
13 | */ | 13 | */ |
14 | #define MXC_INT_OWIRE 2 | 14 | #define MX35_INT_OWIRE 2 |
15 | #define MX35_INT_MMC_SDHC1 7 | 15 | #define MX35_INT_MMC_SDHC1 7 |
16 | #define MXC_INT_MMC_SDHC2 8 | 16 | #define MX35_INT_MMC_SDHC2 8 |
17 | #define MXC_INT_MMC_SDHC3 9 | 17 | #define MX35_INT_MMC_SDHC3 9 |
18 | #define MX35_INT_SSI1 11 | 18 | #define MX35_INT_SSI1 11 |
19 | #define MX35_INT_SSI2 12 | 19 | #define MX35_INT_SSI2 12 |
20 | #define MXC_INT_GPU2D 16 | 20 | #define MX35_INT_GPU2D 16 |
21 | #define MXC_INT_ASRC 17 | 21 | #define MX35_INT_ASRC 17 |
22 | #define MXC_INT_USBHS 35 | 22 | #define MX35_INT_USBHS 35 |
23 | #define MXC_INT_USBOTG 37 | 23 | #define MX35_INT_USBOTG 37 |
24 | #define MXC_INT_ESAI 40 | 24 | #define MX35_INT_ESAI 40 |
25 | #define MXC_INT_CAN1 43 | 25 | #define MX35_INT_CAN1 43 |
26 | #define MXC_INT_CAN2 44 | 26 | #define MX35_INT_CAN2 44 |
27 | #define MXC_INT_MLB 46 | 27 | #define MX35_INT_MLB 46 |
28 | #define MXC_INT_SPDIF 47 | 28 | #define MX35_INT_SPDIF 47 |
29 | #define MXC_INT_FEC 57 | 29 | #define MX35_INT_FEC 57 |
30 | 30 | ||
31 | /* these should go away */ | ||
32 | #define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR | ||
33 | #define MXC_INT_OWIRE MX35_INT_OWIRE | ||
34 | #define MXC_INT_MMC_SDHC2 MX35_INT_MMC_SDHC2 | ||
35 | #define MXC_INT_MMC_SDHC3 MX35_INT_MMC_SDHC3 | ||
36 | #define MXC_INT_GPU2D MX35_INT_GPU2D | ||
37 | #define MXC_INT_ASRC MX35_INT_ASRC | ||
38 | #define MXC_INT_USBHS MX35_INT_USBHS | ||
39 | #define MXC_INT_USBOTG MX35_INT_USBOTG | ||
40 | #define MXC_INT_ESAI MX35_INT_ESAI | ||
41 | #define MXC_INT_CAN1 MX35_INT_CAN1 | ||
42 | #define MXC_INT_CAN2 MX35_INT_CAN2 | ||
43 | #define MXC_INT_MLB MX35_INT_MLB | ||
44 | #define MXC_INT_SPDIF MX35_INT_SPDIF | ||
45 | #define MXC_INT_FEC MX35_INT_FEC | ||