diff options
author | Wu Zhangjin <wuzhangjin@gmail.com> | 2009-11-06 05:45:05 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-12-16 20:57:10 -0500 |
commit | 6f7a251a259e5bf58a9ff334bdcfa3e42b6cb7a3 (patch) | |
tree | f5b65babda54c52073819629cc0f1047b5d1b413 | |
parent | 937893cf5be53203eabc6f4db29f86b1fdeea203 (diff) |
MIPS: Loongson: Add basic Loongson 2F support
Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
has a programming interface similiar to the the FPGA northbridge used on
Loongson 2E.
The main differences between Loongson 2E and Loongson 2F include:
1. Loongson 2F has an extra address window configuration module, which
is used to map CPU address space to DDR or PCI address space, or map
the PCI-DMA address space to DDR or LIO address space.
2. Loongson 2F supports 8 levels of software configurable CPu frequency
which can be configured in the LOONGSON_CHIPCFG0 register. The coming
cpufreq and standby support are based on this feature.
Loongson.h abstracts the modules and corresponding methods are abstracted.
Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
memory space, PCI IO space, DMA address.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/Kconfig | 18 | ||||
-rw-r--r-- | arch/mips/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/dma-coherence.h | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/loongson.h | 84 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/mem.h | 27 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/pci.h | 28 | ||||
-rw-r--r-- | arch/mips/loongson/common/bonito-irq.c | 5 | ||||
-rw-r--r-- | arch/mips/loongson/common/init.c | 8 | ||||
-rw-r--r-- | arch/mips/loongson/common/mem.c | 33 | ||||
-rw-r--r-- | arch/mips/loongson/common/pci.c | 8 |
10 files changed, 197 insertions, 20 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a16b6dfe3bc3..9618451011e1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -1073,6 +1073,21 @@ config CPU_LOONGSON2E | |||
1073 | The Loongson 2E processor implements the MIPS III instruction set | 1073 | The Loongson 2E processor implements the MIPS III instruction set |
1074 | with many extensions. | 1074 | with many extensions. |
1075 | 1075 | ||
1076 | It has an internal FPGA northbridge, which is compatiable to | ||
1077 | bonito64. | ||
1078 | |||
1079 | config CPU_LOONGSON2F | ||
1080 | bool "Loongson 2F" | ||
1081 | depends on SYS_HAS_CPU_LOONGSON2F | ||
1082 | select CPU_LOONGSON2 | ||
1083 | help | ||
1084 | The Loongson 2F processor implements the MIPS III instruction set | ||
1085 | with many extensions. | ||
1086 | |||
1087 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | ||
1088 | have a similar programming interface with FPGA northbridge used in | ||
1089 | Loongson2E. | ||
1090 | |||
1076 | config CPU_MIPS32_R1 | 1091 | config CPU_MIPS32_R1 |
1077 | bool "MIPS32 Release 1" | 1092 | bool "MIPS32 Release 1" |
1078 | depends on SYS_HAS_CPU_MIPS32_R1 | 1093 | depends on SYS_HAS_CPU_MIPS32_R1 |
@@ -1317,6 +1332,9 @@ config CPU_LOONGSON2 | |||
1317 | config SYS_HAS_CPU_LOONGSON2E | 1332 | config SYS_HAS_CPU_LOONGSON2E |
1318 | bool | 1333 | bool |
1319 | 1334 | ||
1335 | config SYS_HAS_CPU_LOONGSON2F | ||
1336 | bool | ||
1337 | |||
1320 | config SYS_HAS_CPU_MIPS32_R1 | 1338 | config SYS_HAS_CPU_MIPS32_R1 |
1321 | bool | 1339 | bool |
1322 | 1340 | ||
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index ba04782c4b91..47ecded20902 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -125,6 +125,8 @@ cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap | |||
125 | cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap | 125 | cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap |
126 | cflags-$(CONFIG_CPU_LOONGSON2E) += \ | 126 | cflags-$(CONFIG_CPU_LOONGSON2E) += \ |
127 | $(call cc-option,-march=loongson2e,-march=r4600) | 127 | $(call cc-option,-march=loongson2e,-march=r4600) |
128 | cflags-$(CONFIG_CPU_LOONGSON2F) += \ | ||
129 | $(call cc-option,-march=loongson2f,-march=r4600) | ||
128 | 130 | ||
129 | cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ | 131 | cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ |
130 | -Wa,-mips32 -Wa,--trap | 132 | -Wa,-mips32 -Wa,--trap |
diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h index 71a6851ba833..981c75f91a7d 100644 --- a/arch/mips/include/asm/mach-loongson/dma-coherence.h +++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h | |||
@@ -28,7 +28,11 @@ static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, | |||
28 | static inline unsigned long plat_dma_addr_to_phys(struct device *dev, | 28 | static inline unsigned long plat_dma_addr_to_phys(struct device *dev, |
29 | dma_addr_t dma_addr) | 29 | dma_addr_t dma_addr) |
30 | { | 30 | { |
31 | #if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) | ||
32 | return (dma_addr > 0x8fffffff) ? dma_addr : (dma_addr & 0x0fffffff); | ||
33 | #else | ||
31 | return dma_addr & 0x7fffffff; | 34 | return dma_addr & 0x7fffffff; |
35 | #endif | ||
32 | } | 36 | } |
33 | 37 | ||
34 | static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, | 38 | static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, |
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h index 722db9e811e5..62171f240c7b 100644 --- a/arch/mips/include/asm/mach-loongson/loongson.h +++ b/arch/mips/include/asm/mach-loongson/loongson.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology | 2 | * Copyright (C) 2009 Lemote, Inc. |
3 | * Author: Wu Zhangjin <wuzj@lemote.com> | 3 | * Author: Wu Zhangjin <wuzj@lemote.com> |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
@@ -219,4 +219,86 @@ extern void mach_irq_dispatch(unsigned int pending); | |||
219 | #define LOONGSON_PCIMAP_WIN(WIN, ADDR) \ | 219 | #define LOONGSON_PCIMAP_WIN(WIN, ADDR) \ |
220 | ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) | 220 | ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) |
221 | 221 | ||
222 | /* Chip Config */ | ||
223 | #ifdef CONFIG_CPU_LOONGSON2F | ||
224 | #define LOONGSON_CHIPCFG0 LOONGSON_REG(LOONGSON_REGBASE + 0x80) | ||
225 | #endif | ||
226 | |||
227 | /* | ||
228 | * address windows configuration module | ||
229 | * | ||
230 | * loongson2e do not have this module | ||
231 | */ | ||
232 | #if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) | ||
233 | |||
234 | /* address window config module base address */ | ||
235 | #define LOONGSON_ADDRWINCFG_BASE 0x3ff00000ul | ||
236 | #define LOONGSON_ADDRWINCFG_SIZE 0x180 | ||
237 | |||
238 | extern unsigned long _loongson_addrwincfg_base; | ||
239 | #define LOONGSON_ADDRWINCFG(offset) \ | ||
240 | (*(volatile u64 *)(_loongson_addrwincfg_base + (offset))) | ||
241 | |||
242 | #define CPU_WIN0_BASE LOONGSON_ADDRWINCFG(0x00) | ||
243 | #define CPU_WIN1_BASE LOONGSON_ADDRWINCFG(0x08) | ||
244 | #define CPU_WIN2_BASE LOONGSON_ADDRWINCFG(0x10) | ||
245 | #define CPU_WIN3_BASE LOONGSON_ADDRWINCFG(0x18) | ||
246 | |||
247 | #define CPU_WIN0_MASK LOONGSON_ADDRWINCFG(0x20) | ||
248 | #define CPU_WIN1_MASK LOONGSON_ADDRWINCFG(0x28) | ||
249 | #define CPU_WIN2_MASK LOONGSON_ADDRWINCFG(0x30) | ||
250 | #define CPU_WIN3_MASK LOONGSON_ADDRWINCFG(0x38) | ||
251 | |||
252 | #define CPU_WIN0_MMAP LOONGSON_ADDRWINCFG(0x40) | ||
253 | #define CPU_WIN1_MMAP LOONGSON_ADDRWINCFG(0x48) | ||
254 | #define CPU_WIN2_MMAP LOONGSON_ADDRWINCFG(0x50) | ||
255 | #define CPU_WIN3_MMAP LOONGSON_ADDRWINCFG(0x58) | ||
256 | |||
257 | #define PCIDMA_WIN0_BASE LOONGSON_ADDRWINCFG(0x60) | ||
258 | #define PCIDMA_WIN1_BASE LOONGSON_ADDRWINCFG(0x68) | ||
259 | #define PCIDMA_WIN2_BASE LOONGSON_ADDRWINCFG(0x70) | ||
260 | #define PCIDMA_WIN3_BASE LOONGSON_ADDRWINCFG(0x78) | ||
261 | |||
262 | #define PCIDMA_WIN0_MASK LOONGSON_ADDRWINCFG(0x80) | ||
263 | #define PCIDMA_WIN1_MASK LOONGSON_ADDRWINCFG(0x88) | ||
264 | #define PCIDMA_WIN2_MASK LOONGSON_ADDRWINCFG(0x90) | ||
265 | #define PCIDMA_WIN3_MASK LOONGSON_ADDRWINCFG(0x98) | ||
266 | |||
267 | #define PCIDMA_WIN0_MMAP LOONGSON_ADDRWINCFG(0xa0) | ||
268 | #define PCIDMA_WIN1_MMAP LOONGSON_ADDRWINCFG(0xa8) | ||
269 | #define PCIDMA_WIN2_MMAP LOONGSON_ADDRWINCFG(0xb0) | ||
270 | #define PCIDMA_WIN3_MMAP LOONGSON_ADDRWINCFG(0xb8) | ||
271 | |||
272 | #define ADDRWIN_WIN0 0 | ||
273 | #define ADDRWIN_WIN1 1 | ||
274 | #define ADDRWIN_WIN2 2 | ||
275 | #define ADDRWIN_WIN3 3 | ||
276 | |||
277 | #define ADDRWIN_MAP_DST_DDR 0 | ||
278 | #define ADDRWIN_MAP_DST_PCI 1 | ||
279 | #define ADDRWIN_MAP_DST_LIO 1 | ||
280 | |||
281 | /* | ||
282 | * s: CPU, PCIDMA | ||
283 | * d: DDR, PCI, LIO | ||
284 | * win: 0, 1, 2, 3 | ||
285 | * src: map source | ||
286 | * dst: map destination | ||
287 | * size: ~mask + 1 | ||
288 | */ | ||
289 | #define LOONGSON_ADDRWIN_CFG(s, d, w, src, dst, size) do {\ | ||
290 | s##_WIN##w##_BASE = (src); \ | ||
291 | s##_WIN##w##_MMAP = (src) | ADDRWIN_MAP_DST_##d; \ | ||
292 | s##_WIN##w##_MASK = ~(size-1); \ | ||
293 | } while (0) | ||
294 | |||
295 | #define LOONGSON_ADDRWIN_CPUTOPCI(win, src, dst, size) \ | ||
296 | LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size) | ||
297 | #define LOONGSON_ADDRWIN_CPUTODDR(win, src, dst, size) \ | ||
298 | LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size) | ||
299 | #define LOONGSON_ADDRWIN_PCITODDR(win, src, dst, size) \ | ||
300 | LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size) | ||
301 | |||
302 | #endif /* ! CONFIG_CPU_LOONGSON2F && CONFIG_64BIT */ | ||
303 | |||
222 | #endif /* __ASM_MACH_LOONGSON_LOONGSON_H */ | 304 | #endif /* __ASM_MACH_LOONGSON_LOONGSON_H */ |
diff --git a/arch/mips/include/asm/mach-loongson/mem.h b/arch/mips/include/asm/mach-loongson/mem.h index bd7b3cba7e35..e9960f341b96 100644 --- a/arch/mips/include/asm/mach-loongson/mem.h +++ b/arch/mips/include/asm/mach-loongson/mem.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology | 2 | * Copyright (C) 2009 Lemote, Inc. |
3 | * Author: Wu Zhangjin <wuzj@lemote.com> | 3 | * Author: Wu Zhangjin <wuzj@lemote.com> |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
@@ -12,19 +12,30 @@ | |||
12 | #define __ASM_MACH_LOONGSON_MEM_H | 12 | #define __ASM_MACH_LOONGSON_MEM_H |
13 | 13 | ||
14 | /* | 14 | /* |
15 | * On Lemote Loongson 2e | 15 | * high memory space |
16 | * | 16 | * |
17 | * the high memory space starts from 512M. | 17 | * in loongson2e, starts from 512M |
18 | * the peripheral registers reside between 0x1000:0000 and 0x2000:0000. | 18 | * in loongson2f, starts from 2G 256M |
19 | */ | 19 | */ |
20 | #ifdef CONFIG_CPU_LOONGSON2E | ||
21 | #define LOONGSON_HIGHMEM_START 0x20000000 | ||
22 | #else | ||
23 | #define LOONGSON_HIGHMEM_START 0x90000000 | ||
24 | #endif | ||
20 | 25 | ||
21 | #ifdef CONFIG_LEMOTE_FULOONG2E | 26 | /* |
22 | 27 | * the peripheral registers(MMIO): | |
23 | #define LOONGSON_HIGHMEM_START 0x20000000 | 28 | * |
29 | * On the Lemote Loongson 2e system, reside between 0x1000:0000 and 0x2000:0000. | ||
30 | * On the Lemote Loongson 2f system, reside between 0x1000:0000 and 0x8000:0000. | ||
31 | */ | ||
24 | 32 | ||
25 | #define LOONGSON_MMIO_MEM_START 0x10000000 | 33 | #define LOONGSON_MMIO_MEM_START 0x10000000 |
26 | #define LOONGSON_MMIO_MEM_END 0x20000000 | ||
27 | 34 | ||
35 | #ifdef CONFIG_CPU_LOONGSON2E | ||
36 | #define LOONGSON_MMIO_MEM_END 0x20000000 | ||
37 | #else | ||
38 | #define LOONGSON_MMIO_MEM_END 0x80000000 | ||
28 | #endif | 39 | #endif |
29 | 40 | ||
30 | #endif /* __ASM_MACH_LOONGSON_MEM_H */ | 41 | #endif /* __ASM_MACH_LOONGSON_MEM_H */ |
diff --git a/arch/mips/include/asm/mach-loongson/pci.h b/arch/mips/include/asm/mach-loongson/pci.h index 576487c00470..31ba90891ec0 100644 --- a/arch/mips/include/asm/mach-loongson/pci.h +++ b/arch/mips/include/asm/mach-loongson/pci.h | |||
@@ -1,5 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> | 2 | * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> |
3 | * Copyright (c) 2009 Wu Zhangjin <wuzj@lemote.com> | ||
3 | * | 4 | * |
4 | * This program is free software; you can redistribute it | 5 | * This program is free software; you can redistribute it |
5 | * and/or modify it under the terms of the GNU General | 6 | * and/or modify it under the terms of the GNU General |
@@ -24,7 +25,30 @@ | |||
24 | 25 | ||
25 | extern struct pci_ops loongson_pci_ops; | 26 | extern struct pci_ops loongson_pci_ops; |
26 | 27 | ||
27 | #ifdef CONFIG_LEMOTE_FULOONG2E | 28 | /* this is an offset from mips_io_port_base */ |
29 | #define LOONGSON_PCI_IO_START 0x00004000UL | ||
30 | |||
31 | #if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) | ||
32 | |||
33 | /* | ||
34 | * we use address window2 to map cpu address space to pci space | ||
35 | * window2: cpu [1G, 2G] -> pci [1G, 2G] | ||
36 | * why not use window 0 & 1? because they are used by cpu when booting. | ||
37 | * window0: cpu [0, 256M] -> ddr [0, 256M] | ||
38 | * window1: cpu [256M, 512M] -> pci [256M, 512M] | ||
39 | */ | ||
40 | |||
41 | /* the smallest LOONGSON_CPU_MEM_SRC can be 512M */ | ||
42 | #define LOONGSON_CPU_MEM_SRC 0x40000000ul /* 1G */ | ||
43 | #define LOONGSON_PCI_MEM_DST LOONGSON_CPU_MEM_SRC | ||
44 | |||
45 | #define LOONGSON_PCI_MEM_START LOONGSON_PCI_MEM_DST | ||
46 | #define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */ | ||
47 | |||
48 | #define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \ | ||
49 | LOONGSON_PCI_MEM_START + 1) | ||
50 | |||
51 | #else /* loongson2f/32bit & loongson2e */ | ||
28 | 52 | ||
29 | /* this pci memory space is mapped by pcimap in pci.c */ | 53 | /* this pci memory space is mapped by pcimap in pci.c */ |
30 | #define LOONGSON_PCI_MEM_START LOONGSON_PCILO1_BASE | 54 | #define LOONGSON_PCI_MEM_START LOONGSON_PCILO1_BASE |
@@ -32,6 +56,6 @@ extern struct pci_ops loongson_pci_ops; | |||
32 | /* this is an offset from mips_io_port_base */ | 56 | /* this is an offset from mips_io_port_base */ |
33 | #define LOONGSON_PCI_IO_START 0x00004000UL | 57 | #define LOONGSON_PCI_IO_START 0x00004000UL |
34 | 58 | ||
35 | #endif | 59 | #endif /* !(defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT))*/ |
36 | 60 | ||
37 | #endif /* !__ASM_MACH_LOONGSON_PCI_H_ */ | 61 | #endif /* !__ASM_MACH_LOONGSON_PCI_H_ */ |
diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c index a1cbd110a6e4..2dc2a4cc632a 100644 --- a/arch/mips/loongson/common/bonito-irq.c +++ b/arch/mips/loongson/common/bonito-irq.c | |||
@@ -12,6 +12,7 @@ | |||
12 | * option) any later version. | 12 | * option) any later version. |
13 | */ | 13 | */ |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/compiler.h> | ||
15 | 16 | ||
16 | #include <loongson.h> | 17 | #include <loongson.h> |
17 | 18 | ||
@@ -35,7 +36,7 @@ static struct irq_chip bonito_irq_type = { | |||
35 | .unmask = bonito_irq_enable, | 36 | .unmask = bonito_irq_enable, |
36 | }; | 37 | }; |
37 | 38 | ||
38 | static struct irqaction dma_timeout_irqaction = { | 39 | static struct irqaction __maybe_unused dma_timeout_irqaction = { |
39 | .handler = no_action, | 40 | .handler = no_action, |
40 | .name = "dma_timeout", | 41 | .name = "dma_timeout", |
41 | }; | 42 | }; |
@@ -47,5 +48,7 @@ void bonito_irq_init(void) | |||
47 | for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++) | 48 | for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++) |
48 | set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); | 49 | set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); |
49 | 50 | ||
51 | #ifdef CONFIG_CPU_LOONGSON2E | ||
50 | setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction); | 52 | setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction); |
53 | #endif | ||
51 | } | 54 | } |
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c index 3b1dbc1ca242..743d3571f010 100644 --- a/arch/mips/loongson/common/init.c +++ b/arch/mips/loongson/common/init.c | |||
@@ -12,12 +12,20 @@ | |||
12 | 12 | ||
13 | #include <loongson.h> | 13 | #include <loongson.h> |
14 | 14 | ||
15 | /* Loongson CPU address windows config space base address */ | ||
16 | unsigned long __maybe_unused _loongson_addrwincfg_base; | ||
17 | |||
15 | void __init prom_init(void) | 18 | void __init prom_init(void) |
16 | { | 19 | { |
17 | /* init base address of io space */ | 20 | /* init base address of io space */ |
18 | set_io_port_base((unsigned long) | 21 | set_io_port_base((unsigned long) |
19 | ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE)); | 22 | ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE)); |
20 | 23 | ||
24 | #if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) | ||
25 | _loongson_addrwincfg_base = (unsigned long) | ||
26 | ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE); | ||
27 | #endif | ||
28 | |||
21 | prom_init_cmdline(); | 29 | prom_init_cmdline(); |
22 | prom_init_env(); | 30 | prom_init_env(); |
23 | prom_init_memory(); | 31 | prom_init_memory(); |
diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c index 3f7f153b1974..e93551dbc9ea 100644 --- a/arch/mips/loongson/common/mem.c +++ b/arch/mips/loongson/common/mem.c | |||
@@ -21,14 +21,31 @@ void __init prom_init_memory(void) | |||
21 | add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize << | 21 | add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize << |
22 | 20), BOOT_MEM_RESERVED); | 22 | 20), BOOT_MEM_RESERVED); |
23 | #ifdef CONFIG_64BIT | 23 | #ifdef CONFIG_64BIT |
24 | if (highmemsize > 0) | 24 | #ifdef CONFIG_CPU_LOONGSON2F |
25 | add_memory_region(LOONGSON_HIGHMEM_START, | 25 | { |
26 | highmemsize << 20, BOOT_MEM_RAM); | 26 | int bit; |
27 | 27 | ||
28 | add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START - | 28 | bit = fls(memsize + highmemsize); |
29 | LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED); | 29 | if (bit != ffs(memsize + highmemsize)) |
30 | 30 | bit += 20; | |
31 | #endif /* CONFIG_64BIT */ | 31 | else |
32 | bit = bit + 20 - 1; | ||
33 | |||
34 | /* set cpu window3 to map CPU to DDR: 2G -> 2G */ | ||
35 | LOONGSON_ADDRWIN_CPUTODDR(ADDRWIN_WIN3, 0x80000000ul, | ||
36 | 0x80000000ul, (1 << bit)); | ||
37 | mmiowb(); | ||
38 | } | ||
39 | #endif /* CONFIG_CPU_LOONGSON2F */ | ||
40 | |||
41 | if (highmemsize > 0) | ||
42 | add_memory_region(LOONGSON_HIGHMEM_START, | ||
43 | highmemsize << 20, BOOT_MEM_RAM); | ||
44 | |||
45 | add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START - | ||
46 | LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED); | ||
47 | |||
48 | #endif /* CONFIG_64BIT */ | ||
32 | } | 49 | } |
33 | 50 | ||
34 | /* override of arch/mips/mm/cache.c: __uncached_access */ | 51 | /* override of arch/mips/mm/cache.c: __uncached_access */ |
diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c index a7eb8b9c44ee..eac43b8f695e 100644 --- a/arch/mips/loongson/common/pci.c +++ b/arch/mips/loongson/common/pci.c | |||
@@ -67,6 +67,14 @@ static void __init setup_pcimap(void) | |||
67 | /* can not change gnt to break pci transfer when device's gnt not | 67 | /* can not change gnt to break pci transfer when device's gnt not |
68 | deassert for some broken device */ | 68 | deassert for some broken device */ |
69 | LOONGSON_PXARB_CFG = 0x00fe0105ul; | 69 | LOONGSON_PXARB_CFG = 0x00fe0105ul; |
70 | |||
71 | #if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) | ||
72 | /* | ||
73 | * set cpu addr window2 to map CPU address space to PCI address space | ||
74 | */ | ||
75 | LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC, | ||
76 | LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE); | ||
77 | #endif | ||
70 | } | 78 | } |
71 | 79 | ||
72 | static int __init pcibios_init(void) | 80 | static int __init pcibios_init(void) |