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authorFlorian Fainelli <florian@openwrt.org>2009-06-11 08:21:24 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-11 11:51:03 -0400
commit08e0992f60ad44025a8a8b8a821838ca4a562686 (patch)
tree7afa60d668a0559282a2492fb36c88238a035b60
parent257a6e8cc7f9274f0af090494a3f1ee06548b5bd (diff)
serial: add support for the TI AR7 internal UART
This patch adds support for the TI AR7 internal UART. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/serial/8250.c7
-rw-r--r--include/linux/serial_core.h3
2 files changed, 9 insertions, 1 deletions
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index a0127e93ade0..fb867a9f55e9 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -287,6 +287,13 @@ static const struct serial8250_config uart_config[] = {
287 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 287 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
288 .flags = UART_CAP_FIFO, 288 .flags = UART_CAP_FIFO,
289 }, 289 },
290 [PORT_AR7] = {
291 .name = "AR7",
292 .fifo_size = 16,
293 .tx_loadsz = 16,
294 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
295 .flags = UART_CAP_FIFO | UART_CAP_AFE,
296 },
290}; 297};
291 298
292#if defined (CONFIG_SERIAL_8250_AU1X00) 299#if defined (CONFIG_SERIAL_8250_AU1X00)
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 57a97e52e58d..48766ea845cf 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -41,7 +41,8 @@
41#define PORT_XSCALE 15 41#define PORT_XSCALE 15
42#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 42#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
43#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 43#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
44#define PORT_MAX_8250 17 /* max port ID */ 44#define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
45#define PORT_MAX_8250 18 /* max port ID */
45 46
46/* 47/*
47 * ARM specific type numbers. These are not currently guaranteed 48 * ARM specific type numbers. These are not currently guaranteed