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authorDave Jones <davej@redhat.com>2006-02-28 00:43:23 -0500
committerDave Jones <davej@redhat.com>2006-02-28 00:43:23 -0500
commit32ee8c3e470d86588b51dc42ed01e85c5fa0f180 (patch)
treed544cc24c37c02f44f9cf89cb5647d74a61d7ce6
parent8ad5496d2359a19127ad9f2eda69485025c9917f (diff)
[CPUFREQ] Lots of whitespace & CodingStyle cleanup.
Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat
-rw-r--r--arch/i386/kernel/cpu/cpufreq/Kconfig1
-rw-r--r--arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c64
-rw-r--r--arch/i386/kernel/cpu/cpufreq/elanfreq.c109
-rw-r--r--arch/i386/kernel/cpu/cpufreq/gx-suspmod.c180
-rw-r--r--arch/i386/kernel/cpu/cpufreq/longhaul.h4
-rw-r--r--arch/i386/kernel/cpu/cpufreq/p4-clockmod.c24
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k6.c16
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k7.c10
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k8.c15
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k8.h6
-rw-r--r--arch/i386/kernel/cpu/cpufreq/speedstep-lib.c42
-rw-r--r--arch/i386/kernel/cpu/cpufreq/speedstep-lib.h20
-rw-r--r--arch/i386/kernel/cpu/cpufreq/speedstep-smi.c49
-rw-r--r--drivers/cpufreq/cpufreq.c54
-rw-r--r--drivers/cpufreq/cpufreq_ondemand.c86
-rw-r--r--drivers/cpufreq/cpufreq_performance.c2
-rw-r--r--drivers/cpufreq/cpufreq_powersave.c2
-rw-r--r--drivers/cpufreq/cpufreq_stats.c6
-rw-r--r--drivers/cpufreq/cpufreq_userspace.c12
-rw-r--r--drivers/cpufreq/freq_table.c12
20 files changed, 343 insertions, 371 deletions
diff --git a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/i386/kernel/cpu/cpufreq/Kconfig
index 26892d2099b0..0f1eb507233b 100644
--- a/arch/i386/kernel/cpu/cpufreq/Kconfig
+++ b/arch/i386/kernel/cpu/cpufreq/Kconfig
@@ -96,7 +96,6 @@ config X86_POWERNOW_K8_ACPI
96 96
97config X86_GX_SUSPMOD 97config X86_GX_SUSPMOD
98 tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation" 98 tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
99 depends on PCI
100 help 99 help
101 This add the CPUFreq driver for NatSemi Geode processors which 100 This add the CPUFreq driver for NatSemi Geode processors which
102 support suspend modulation. 101 support suspend modulation.
diff --git a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
index 2b62dee35c6c..f275e0d4aee5 100644
--- a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -39,7 +39,7 @@ static struct pci_dev *nforce2_chipset_dev;
39static int fid = 0; 39static int fid = 0;
40 40
41/* min_fsb, max_fsb: 41/* min_fsb, max_fsb:
42 * minimum and maximum FSB (= FSB at boot time) 42 * minimum and maximum FSB (= FSB at boot time)
43 */ 43 */
44static int min_fsb = 0; 44static int min_fsb = 0;
45static int max_fsb = 0; 45static int max_fsb = 0;
@@ -57,10 +57,10 @@ MODULE_PARM_DESC(min_fsb,
57 57
58#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg) 58#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg)
59 59
60/* 60/**
61 * nforce2_calc_fsb - calculate FSB 61 * nforce2_calc_fsb - calculate FSB
62 * @pll: PLL value 62 * @pll: PLL value
63 * 63 *
64 * Calculates FSB from PLL value 64 * Calculates FSB from PLL value
65 */ 65 */
66static int nforce2_calc_fsb(int pll) 66static int nforce2_calc_fsb(int pll)
@@ -76,10 +76,10 @@ static int nforce2_calc_fsb(int pll)
76 return 0; 76 return 0;
77} 77}
78 78
79/* 79/**
80 * nforce2_calc_pll - calculate PLL value 80 * nforce2_calc_pll - calculate PLL value
81 * @fsb: FSB 81 * @fsb: FSB
82 * 82 *
83 * Calculate PLL value for given FSB 83 * Calculate PLL value for given FSB
84 */ 84 */
85static int nforce2_calc_pll(unsigned int fsb) 85static int nforce2_calc_pll(unsigned int fsb)
@@ -106,10 +106,10 @@ static int nforce2_calc_pll(unsigned int fsb)
106 return NFORCE2_PLL(mul, div); 106 return NFORCE2_PLL(mul, div);
107} 107}
108 108
109/* 109/**
110 * nforce2_write_pll - write PLL value to chipset 110 * nforce2_write_pll - write PLL value to chipset
111 * @pll: PLL value 111 * @pll: PLL value
112 * 112 *
113 * Writes new FSB PLL value to chipset 113 * Writes new FSB PLL value to chipset
114 */ 114 */
115static void nforce2_write_pll(int pll) 115static void nforce2_write_pll(int pll)
@@ -121,15 +121,13 @@ static void nforce2_write_pll(int pll)
121 pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, temp); 121 pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, temp);
122 122
123 /* Now write the value in all 64 registers */ 123 /* Now write the value in all 64 registers */
124 for (temp = 0; temp <= 0x3f; temp++) { 124 for (temp = 0; temp <= 0x3f; temp++)
125 pci_write_config_dword(nforce2_chipset_dev, 125 pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, pll);
126 NFORCE2_PLLREG, pll);
127 }
128 126
129 return; 127 return;
130} 128}
131 129
132/* 130/**
133 * nforce2_fsb_read - Read FSB 131 * nforce2_fsb_read - Read FSB
134 * 132 *
135 * Read FSB from chipset 133 * Read FSB from chipset
@@ -140,39 +138,32 @@ static unsigned int nforce2_fsb_read(int bootfsb)
140 struct pci_dev *nforce2_sub5; 138 struct pci_dev *nforce2_sub5;
141 u32 fsb, temp = 0; 139 u32 fsb, temp = 0;
142 140
143
144 /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */ 141 /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */
145 nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 142 nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
146 0x01EF, 143 0x01EF,PCI_ANY_ID,PCI_ANY_ID,NULL);
147 PCI_ANY_ID,
148 PCI_ANY_ID,
149 NULL);
150
151 if (!nforce2_sub5) 144 if (!nforce2_sub5)
152 return 0; 145 return 0;
153 146
154 pci_read_config_dword(nforce2_sub5, NFORCE2_BOOTFSB, &fsb); 147 pci_read_config_dword(nforce2_sub5, NFORCE2_BOOTFSB, &fsb);
155 fsb /= 1000000; 148 fsb /= 1000000;
156 149
157 /* Check if PLL register is already set */ 150 /* Check if PLL register is already set */
158 pci_read_config_byte(nforce2_chipset_dev, 151 pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp);
159 NFORCE2_PLLENABLE, (u8 *)&temp); 152
160
161 if(bootfsb || !temp) 153 if(bootfsb || !temp)
162 return fsb; 154 return fsb;
163 155
164 /* Use PLL register FSB value */ 156 /* Use PLL register FSB value */
165 pci_read_config_dword(nforce2_chipset_dev, 157 pci_read_config_dword(nforce2_chipset_dev,NFORCE2_PLLREG, &temp);
166 NFORCE2_PLLREG, &temp);
167 fsb = nforce2_calc_fsb(temp); 158 fsb = nforce2_calc_fsb(temp);
168 159
169 return fsb; 160 return fsb;
170} 161}
171 162
172/* 163/**
173 * nforce2_set_fsb - set new FSB 164 * nforce2_set_fsb - set new FSB
174 * @fsb: New FSB 165 * @fsb: New FSB
175 * 166 *
176 * Sets new FSB 167 * Sets new FSB
177 */ 168 */
178static int nforce2_set_fsb(unsigned int fsb) 169static int nforce2_set_fsb(unsigned int fsb)
@@ -186,7 +177,7 @@ static int nforce2_set_fsb(unsigned int fsb)
186 printk(KERN_ERR "cpufreq: FSB %d is out of range!\n", fsb); 177 printk(KERN_ERR "cpufreq: FSB %d is out of range!\n", fsb);
187 return -EINVAL; 178 return -EINVAL;
188 } 179 }
189 180
190 tfsb = nforce2_fsb_read(0); 181 tfsb = nforce2_fsb_read(0);
191 if (!tfsb) { 182 if (!tfsb) {
192 printk(KERN_ERR "cpufreq: Error while reading the FSB\n"); 183 printk(KERN_ERR "cpufreq: Error while reading the FSB\n");
@@ -194,8 +185,7 @@ static int nforce2_set_fsb(unsigned int fsb)
194 } 185 }
195 186
196 /* First write? Then set actual value */ 187 /* First write? Then set actual value */
197 pci_read_config_byte(nforce2_chipset_dev, 188 pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp);
198 NFORCE2_PLLENABLE, (u8 *)&temp);
199 if (!temp) { 189 if (!temp) {
200 pll = nforce2_calc_pll(tfsb); 190 pll = nforce2_calc_pll(tfsb);
201 191
@@ -223,7 +213,7 @@ static int nforce2_set_fsb(unsigned int fsb)
223 /* Calculate the PLL reg. value */ 213 /* Calculate the PLL reg. value */
224 if ((pll = nforce2_calc_pll(tfsb)) == -1) 214 if ((pll = nforce2_calc_pll(tfsb)) == -1)
225 return -EINVAL; 215 return -EINVAL;
226 216
227 nforce2_write_pll(pll); 217 nforce2_write_pll(pll);
228#ifdef NFORCE2_DELAY 218#ifdef NFORCE2_DELAY
229 mdelay(NFORCE2_DELAY); 219 mdelay(NFORCE2_DELAY);
@@ -239,7 +229,7 @@ static int nforce2_set_fsb(unsigned int fsb)
239/** 229/**
240 * nforce2_get - get the CPU frequency 230 * nforce2_get - get the CPU frequency
241 * @cpu: CPU number 231 * @cpu: CPU number
242 * 232 *
243 * Returns the CPU frequency 233 * Returns the CPU frequency
244 */ 234 */
245static unsigned int nforce2_get(unsigned int cpu) 235static unsigned int nforce2_get(unsigned int cpu)
@@ -354,10 +344,10 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
354 344
355 printk(KERN_INFO "cpufreq: FSB currently at %i MHz, FID %d.%d\n", fsb, 345 printk(KERN_INFO "cpufreq: FSB currently at %i MHz, FID %d.%d\n", fsb,
356 fid / 10, fid % 10); 346 fid / 10, fid % 10);
357 347
358 /* Set maximum FSB to FSB at boot time */ 348 /* Set maximum FSB to FSB at boot time */
359 max_fsb = nforce2_fsb_read(1); 349 max_fsb = nforce2_fsb_read(1);
360 350
361 if(!max_fsb) 351 if(!max_fsb)
362 return -EIO; 352 return -EIO;
363 353
@@ -398,17 +388,15 @@ static struct cpufreq_driver nforce2_driver = {
398 * nforce2_detect_chipset - detect the Southbridge which contains FSB PLL logic 388 * nforce2_detect_chipset - detect the Southbridge which contains FSB PLL logic
399 * 389 *
400 * Detects nForce2 A2 and C1 stepping 390 * Detects nForce2 A2 and C1 stepping
401 * 391 *
402 */ 392 */
403static unsigned int nforce2_detect_chipset(void) 393static unsigned int nforce2_detect_chipset(void)
404{ 394{
405 u8 revision; 395 u8 revision;
406 396
407 nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 397 nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
408 PCI_DEVICE_ID_NVIDIA_NFORCE2, 398 PCI_DEVICE_ID_NVIDIA_NFORCE2,
409 PCI_ANY_ID, 399 PCI_ANY_ID, PCI_ANY_ID, NULL);
410 PCI_ANY_ID,
411 NULL);
412 400
413 if (nforce2_chipset_dev == NULL) 401 if (nforce2_chipset_dev == NULL)
414 return -ENODEV; 402 return -ENODEV;
diff --git a/arch/i386/kernel/cpu/cpufreq/elanfreq.c b/arch/i386/kernel/cpu/cpufreq/elanfreq.c
index 3f7caa4ae6d6..f317276afa7a 100644
--- a/arch/i386/kernel/cpu/cpufreq/elanfreq.c
+++ b/arch/i386/kernel/cpu/cpufreq/elanfreq.c
@@ -1,16 +1,16 @@
1/* 1/*
2 * elanfreq: cpufreq driver for the AMD ELAN family 2 * elanfreq: cpufreq driver for the AMD ELAN family
3 * 3 *
4 * (c) Copyright 2002 Robert Schwebel <r.schwebel@pengutronix.de> 4 * (c) Copyright 2002 Robert Schwebel <r.schwebel@pengutronix.de>
5 * 5 *
6 * Parts of this code are (c) Sven Geggus <sven@geggus.net> 6 * Parts of this code are (c) Sven Geggus <sven@geggus.net>
7 * 7 *
8 * All Rights Reserved. 8 * All Rights Reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License 11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version. 13 * 2 of the License, or (at your option) any later version.
14 * 14 *
15 * 2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel 15 * 2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel
16 * 16 *
@@ -28,7 +28,7 @@
28#include <asm/timex.h> 28#include <asm/timex.h>
29#include <asm/io.h> 29#include <asm/io.h>
30 30
31#define REG_CSCIR 0x22 /* Chip Setup and Control Index Register */ 31#define REG_CSCIR 0x22 /* Chip Setup and Control Index Register */
32#define REG_CSCDR 0x23 /* Chip Setup and Control Data Register */ 32#define REG_CSCDR 0x23 /* Chip Setup and Control Data Register */
33 33
34/* Module parameter */ 34/* Module parameter */
@@ -41,7 +41,7 @@ struct s_elan_multiplier {
41}; 41};
42 42
43/* 43/*
44 * It is important that the frequencies 44 * It is important that the frequencies
45 * are listed in ascending order here! 45 * are listed in ascending order here!
46 */ 46 */
47struct s_elan_multiplier elan_multiplier[] = { 47struct s_elan_multiplier elan_multiplier[] = {
@@ -72,78 +72,79 @@ static struct cpufreq_frequency_table elanfreq_table[] = {
72 * elanfreq_get_cpu_frequency: determine current cpu speed 72 * elanfreq_get_cpu_frequency: determine current cpu speed
73 * 73 *
74 * Finds out at which frequency the CPU of the Elan SOC runs 74 * Finds out at which frequency the CPU of the Elan SOC runs
75 * at the moment. Frequencies from 1 to 33 MHz are generated 75 * at the moment. Frequencies from 1 to 33 MHz are generated
76 * the normal way, 66 and 99 MHz are called "Hyperspeed Mode" 76 * the normal way, 66 and 99 MHz are called "Hyperspeed Mode"
77 * and have the rest of the chip running with 33 MHz. 77 * and have the rest of the chip running with 33 MHz.
78 */ 78 */
79 79
80static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu) 80static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu)
81{ 81{
82 u8 clockspeed_reg; /* Clock Speed Register */ 82 u8 clockspeed_reg; /* Clock Speed Register */
83 83
84 local_irq_disable(); 84 local_irq_disable();
85 outb_p(0x80,REG_CSCIR); 85 outb_p(0x80,REG_CSCIR);
86 clockspeed_reg = inb_p(REG_CSCDR); 86 clockspeed_reg = inb_p(REG_CSCDR);
87 local_irq_enable(); 87 local_irq_enable();
88 88
89 if ((clockspeed_reg & 0xE0) == 0xE0) { return 0; } 89 if ((clockspeed_reg & 0xE0) == 0xE0)
90 return 0;
90 91
91 /* Are we in CPU clock multiplied mode (66/99 MHz)? */ 92 /* Are we in CPU clock multiplied mode (66/99 MHz)? */
92 if ((clockspeed_reg & 0xE0) == 0xC0) { 93 if ((clockspeed_reg & 0xE0) == 0xC0) {
93 if ((clockspeed_reg & 0x01) == 0) { 94 if ((clockspeed_reg & 0x01) == 0)
94 return 66000; 95 return 66000;
95 } else { 96 else
96 return 99000; 97 return 99000;
97 } 98 }
98 }
99 99
100 /* 33 MHz is not 32 MHz... */ 100 /* 33 MHz is not 32 MHz... */
101 if ((clockspeed_reg & 0xE0)==0xA0) 101 if ((clockspeed_reg & 0xE0)==0xA0)
102 return 33000; 102 return 33000;
103 103
104 return ((1<<((clockspeed_reg & 0xE0) >> 5)) * 1000); 104 return ((1<<((clockspeed_reg & 0xE0) >> 5)) * 1000);
105} 105}
106 106
107 107
108/** 108/**
109 * elanfreq_set_cpu_frequency: Change the CPU core frequency 109 * elanfreq_set_cpu_frequency: Change the CPU core frequency
110 * @cpu: cpu number 110 * @cpu: cpu number
111 * @freq: frequency in kHz 111 * @freq: frequency in kHz
112 * 112 *
113 * This function takes a frequency value and changes the CPU frequency 113 * This function takes a frequency value and changes the CPU frequency
114 * according to this. Note that the frequency has to be checked by 114 * according to this. Note that the frequency has to be checked by
115 * elanfreq_validatespeed() for correctness! 115 * elanfreq_validatespeed() for correctness!
116 * 116 *
117 * There is no return value. 117 * There is no return value.
118 */ 118 */
119 119
120static void elanfreq_set_cpu_state (unsigned int state) { 120static void elanfreq_set_cpu_state (unsigned int state)
121 121{
122 struct cpufreq_freqs freqs; 122 struct cpufreq_freqs freqs;
123 123
124 freqs.old = elanfreq_get_cpu_frequency(0); 124 freqs.old = elanfreq_get_cpu_frequency(0);
125 freqs.new = elan_multiplier[state].clock; 125 freqs.new = elan_multiplier[state].clock;
126 freqs.cpu = 0; /* elanfreq.c is UP only driver */ 126 freqs.cpu = 0; /* elanfreq.c is UP only driver */
127 127
128 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 128 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
129 129
130 printk(KERN_INFO "elanfreq: attempting to set frequency to %i kHz\n",elan_multiplier[state].clock); 130 printk(KERN_INFO "elanfreq: attempting to set frequency to %i kHz\n",
131 elan_multiplier[state].clock);
131 132
132 133
133 /* 134 /*
134 * Access to the Elan's internal registers is indexed via 135 * Access to the Elan's internal registers is indexed via
135 * 0x22: Chip Setup & Control Register Index Register (CSCI) 136 * 0x22: Chip Setup & Control Register Index Register (CSCI)
136 * 0x23: Chip Setup & Control Register Data Register (CSCD) 137 * 0x23: Chip Setup & Control Register Data Register (CSCD)
137 * 138 *
138 */ 139 */
139 140
140 /* 141 /*
141 * 0x40 is the Power Management Unit's Force Mode Register. 142 * 0x40 is the Power Management Unit's Force Mode Register.
142 * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency) 143 * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency)
143 */ 144 */
144 145
145 local_irq_disable(); 146 local_irq_disable();
146 outb_p(0x40,REG_CSCIR); /* Disable hyperspeed mode */ 147 outb_p(0x40,REG_CSCIR); /* Disable hyperspeed mode */
147 outb_p(0x00,REG_CSCDR); 148 outb_p(0x00,REG_CSCDR);
148 local_irq_enable(); /* wait till internal pipelines and */ 149 local_irq_enable(); /* wait till internal pipelines and */
149 udelay(1000); /* buffers have cleaned up */ 150 udelay(1000); /* buffers have cleaned up */
@@ -166,10 +167,10 @@ static void elanfreq_set_cpu_state (unsigned int state) {
166 167
167/** 168/**
168 * elanfreq_validatespeed: test if frequency range is valid 169 * elanfreq_validatespeed: test if frequency range is valid
169 * @policy: the policy to validate 170 * @policy: the policy to validate
170 * 171 *
171 * This function checks if a given frequency range in kHz is valid 172 * This function checks if a given frequency range in kHz is valid
172 * for the hardware supported by the driver. 173 * for the hardware supported by the driver.
173 */ 174 */
174 175
175static int elanfreq_verify (struct cpufreq_policy *policy) 176static int elanfreq_verify (struct cpufreq_policy *policy)
@@ -177,11 +178,11 @@ static int elanfreq_verify (struct cpufreq_policy *policy)
177 return cpufreq_frequency_table_verify(policy, &elanfreq_table[0]); 178 return cpufreq_frequency_table_verify(policy, &elanfreq_table[0]);
178} 179}
179 180
180static int elanfreq_target (struct cpufreq_policy *policy, 181static int elanfreq_target (struct cpufreq_policy *policy,
181 unsigned int target_freq, 182 unsigned int target_freq,
182 unsigned int relation) 183 unsigned int relation)
183{ 184{
184 unsigned int newstate = 0; 185 unsigned int newstate = 0;
185 186
186 if (cpufreq_frequency_table_target(policy, &elanfreq_table[0], target_freq, relation, &newstate)) 187 if (cpufreq_frequency_table_target(policy, &elanfreq_table[0], target_freq, relation, &newstate))
187 return -EINVAL; 188 return -EINVAL;
@@ -212,7 +213,7 @@ static int elanfreq_cpu_init(struct cpufreq_policy *policy)
212 max_freq = elanfreq_get_cpu_frequency(0); 213 max_freq = elanfreq_get_cpu_frequency(0);
213 214
214 /* table init */ 215 /* table init */
215 for (i=0; (elanfreq_table[i].frequency != CPUFREQ_TABLE_END); i++) { 216 for (i=0; (elanfreq_table[i].frequency != CPUFREQ_TABLE_END); i++) {
216 if (elanfreq_table[i].frequency > max_freq) 217 if (elanfreq_table[i].frequency > max_freq)
217 elanfreq_table[i].frequency = CPUFREQ_ENTRY_INVALID; 218 elanfreq_table[i].frequency = CPUFREQ_ENTRY_INVALID;
218 } 219 }
@@ -226,8 +227,7 @@ static int elanfreq_cpu_init(struct cpufreq_policy *policy)
226 if (result) 227 if (result)
227 return (result); 228 return (result);
228 229
229 cpufreq_frequency_table_get_attr(elanfreq_table, policy->cpu); 230 cpufreq_frequency_table_get_attr(elanfreq_table, policy->cpu);
230
231 return 0; 231 return 0;
232} 232}
233 233
@@ -268,9 +268,9 @@ static struct freq_attr* elanfreq_attr[] = {
268 268
269 269
270static struct cpufreq_driver elanfreq_driver = { 270static struct cpufreq_driver elanfreq_driver = {
271 .get = elanfreq_get_cpu_frequency, 271 .get = elanfreq_get_cpu_frequency,
272 .verify = elanfreq_verify, 272 .verify = elanfreq_verify,
273 .target = elanfreq_target, 273 .target = elanfreq_target,
274 .init = elanfreq_cpu_init, 274 .init = elanfreq_cpu_init,
275 .exit = elanfreq_cpu_exit, 275 .exit = elanfreq_cpu_exit,
276 .name = "elanfreq", 276 .name = "elanfreq",
@@ -279,23 +279,21 @@ static struct cpufreq_driver elanfreq_driver = {
279}; 279};
280 280
281 281
282static int __init elanfreq_init(void) 282static int __init elanfreq_init(void)
283{ 283{
284 struct cpuinfo_x86 *c = cpu_data; 284 struct cpuinfo_x86 *c = cpu_data;
285 285
286 /* Test if we have the right hardware */ 286 /* Test if we have the right hardware */
287 if ((c->x86_vendor != X86_VENDOR_AMD) || 287 if ((c->x86_vendor != X86_VENDOR_AMD) ||
288 (c->x86 != 4) || (c->x86_model!=10)) 288 (c->x86 != 4) || (c->x86_model!=10)) {
289 {
290 printk(KERN_INFO "elanfreq: error: no Elan processor found!\n"); 289 printk(KERN_INFO "elanfreq: error: no Elan processor found!\n");
291 return -ENODEV; 290 return -ENODEV;
292 } 291 }
293
294 return cpufreq_register_driver(&elanfreq_driver); 292 return cpufreq_register_driver(&elanfreq_driver);
295} 293}
296 294
297 295
298static void __exit elanfreq_exit(void) 296static void __exit elanfreq_exit(void)
299{ 297{
300 cpufreq_unregister_driver(&elanfreq_driver); 298 cpufreq_unregister_driver(&elanfreq_driver);
301} 299}
@@ -309,4 +307,3 @@ MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs");
309 307
310module_init(elanfreq_init); 308module_init(elanfreq_init);
311module_exit(elanfreq_exit); 309module_exit(elanfreq_exit);
312
diff --git a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
index e86ea486c311..65b8fa2b0ee4 100644
--- a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
@@ -6,12 +6,12 @@
6 * 6 *
7 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation 9 * version 2 as published by the Free Software Foundation
10 * 10 *
11 * The author(s) of this software shall not be held liable for damages 11 * The author(s) of this software shall not be held liable for damages
12 * of any nature resulting due to the use of this software. This 12 * of any nature resulting due to the use of this software. This
13 * software is provided AS-IS with no warranties. 13 * software is provided AS-IS with no warranties.
14 * 14 *
15 * Theoritical note: 15 * Theoritical note:
16 * 16 *
17 * (see Geode(tm) CS5530 manual (rev.4.1) page.56) 17 * (see Geode(tm) CS5530 manual (rev.4.1) page.56)
@@ -21,18 +21,18 @@
21 * 21 *
22 * Suspend Modulation works by asserting and de-asserting the SUSP# pin 22 * Suspend Modulation works by asserting and de-asserting the SUSP# pin
23 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP# 23 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
24 * the CPU enters an idle state. GX1 stops its core clock when SUSP# is 24 * the CPU enters an idle state. GX1 stops its core clock when SUSP# is
25 * asserted then power consumption is reduced. 25 * asserted then power consumption is reduced.
26 * 26 *
27 * Suspend Modulation's OFF/ON duration are configurable 27 * Suspend Modulation's OFF/ON duration are configurable
28 * with 'Suspend Modulation OFF Count Register' 28 * with 'Suspend Modulation OFF Count Register'
29 * and 'Suspend Modulation ON Count Register'. 29 * and 'Suspend Modulation ON Count Register'.
30 * These registers are 8bit counters that represent the number of 30 * These registers are 8bit counters that represent the number of
31 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF) 31 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
32 * to the processor. 32 * to the processor.
33 * 33 *
34 * These counters define a ratio which is the effective frequency 34 * These counters define a ratio which is the effective frequency
35 * of operation of the system. 35 * of operation of the system.
36 * 36 *
37 * OFF Count 37 * OFF Count
38 * F_eff = Fgx * ---------------------- 38 * F_eff = Fgx * ----------------------
@@ -40,24 +40,24 @@
40 * 40 *
41 * 0 <= On Count, Off Count <= 255 41 * 0 <= On Count, Off Count <= 255
42 * 42 *
43 * From these limits, we can get register values 43 * From these limits, we can get register values
44 * 44 *
45 * off_duration + on_duration <= MAX_DURATION 45 * off_duration + on_duration <= MAX_DURATION
46 * on_duration = off_duration * (stock_freq - freq) / freq 46 * on_duration = off_duration * (stock_freq - freq) / freq
47 * 47 *
48 * off_duration = (freq * DURATION) / stock_freq 48 * off_duration = (freq * DURATION) / stock_freq
49 * on_duration = DURATION - off_duration 49 * on_duration = DURATION - off_duration
50 * 50 *
51 * 51 *
52 *--------------------------------------------------------------------------- 52 *---------------------------------------------------------------------------
53 * 53 *
54 * ChangeLog: 54 * ChangeLog:
55 * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org> 55 * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org>
56 * - fix on/off register mistake 56 * - fix on/off register mistake
57 * - fix cpu_khz calc when it stops cpu modulation. 57 * - fix cpu_khz calc when it stops cpu modulation.
58 * 58 *
59 * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org> 59 * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org>
60 * - rewrite for Cyrix MediaGX Cx5510/5520 and 60 * - rewrite for Cyrix MediaGX Cx5510/5520 and
61 * NatSemi Geode Cs5530(A). 61 * NatSemi Geode Cs5530(A).
62 * 62 *
63 * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com> 63 * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com>
@@ -74,40 +74,40 @@
74 ************************************************************************/ 74 ************************************************************************/
75 75
76#include <linux/kernel.h> 76#include <linux/kernel.h>
77#include <linux/module.h> 77#include <linux/module.h>
78#include <linux/init.h> 78#include <linux/init.h>
79#include <linux/smp.h> 79#include <linux/smp.h>
80#include <linux/cpufreq.h> 80#include <linux/cpufreq.h>
81#include <linux/pci.h> 81#include <linux/pci.h>
82#include <asm/processor.h> 82#include <asm/processor.h>
83#include <asm/errno.h> 83#include <asm/errno.h>
84 84
85/* PCI config registers, all at F0 */ 85/* PCI config registers, all at F0 */
86#define PCI_PMER1 0x80 /* power management enable register 1 */ 86#define PCI_PMER1 0x80 /* power management enable register 1 */
87#define PCI_PMER2 0x81 /* power management enable register 2 */ 87#define PCI_PMER2 0x81 /* power management enable register 2 */
88#define PCI_PMER3 0x82 /* power management enable register 3 */ 88#define PCI_PMER3 0x82 /* power management enable register 3 */
89#define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */ 89#define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */
90#define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */ 90#define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */
91#define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */ 91#define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */
92#define PCI_MODON 0x95 /* suspend modulation ON counter register */ 92#define PCI_MODON 0x95 /* suspend modulation ON counter register */
93#define PCI_SUSCFG 0x96 /* suspend configuration register */ 93#define PCI_SUSCFG 0x96 /* suspend configuration register */
94 94
95/* PMER1 bits */ 95/* PMER1 bits */
96#define GPM (1<<0) /* global power management */ 96#define GPM (1<<0) /* global power management */
97#define GIT (1<<1) /* globally enable PM device idle timers */ 97#define GIT (1<<1) /* globally enable PM device idle timers */
98#define GTR (1<<2) /* globally enable IO traps */ 98#define GTR (1<<2) /* globally enable IO traps */
99#define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */ 99#define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */
100#define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */ 100#define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */
101 101
102/* SUSCFG bits */ 102/* SUSCFG bits */
103#define SUSMOD (1<<0) /* enable/disable suspend modulation */ 103#define SUSMOD (1<<0) /* enable/disable suspend modulation */
104/* the belows support only with cs5530 (after rev.1.2)/cs5530A */ 104/* the belows support only with cs5530 (after rev.1.2)/cs5530A */
105#define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */ 105#define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */
106 /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */ 106 /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
107#define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */ 107#define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
108/* the belows support only with cs5530A */ 108/* the belows support only with cs5530A */
109#define PWRSVE_ISA (1<<3) /* stop ISA clock */ 109#define PWRSVE_ISA (1<<3) /* stop ISA clock */
110#define PWRSVE (1<<4) /* active idle */ 110#define PWRSVE (1<<4) /* active idle */
111 111
112struct gxfreq_params { 112struct gxfreq_params {
113 u8 on_duration; 113 u8 on_duration;
@@ -128,7 +128,7 @@ module_param (pci_busclk, int, 0444);
128 128
129/* maximum duration for which the cpu may be suspended 129/* maximum duration for which the cpu may be suspended
130 * (32us * MAX_DURATION). If no parameter is given, this defaults 130 * (32us * MAX_DURATION). If no parameter is given, this defaults
131 * to 255. 131 * to 255.
132 * Note that this leads to a maximum of 8 ms(!) where the CPU clock 132 * Note that this leads to a maximum of 8 ms(!) where the CPU clock
133 * is suspended -- processing power is just 0.39% of what it used to be, 133 * is suspended -- processing power is just 0.39% of what it used to be,
134 * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */ 134 * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
@@ -144,17 +144,17 @@ module_param (max_duration, int, 0444);
144#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "gx-suspmod", msg) 144#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "gx-suspmod", msg)
145 145
146/** 146/**
147 * we can detect a core multipiler from dir0_lsb 147 * we can detect a core multipiler from dir0_lsb
148 * from GX1 datasheet p.56, 148 * from GX1 datasheet p.56,
149 * MULT[3:0]: 149 * MULT[3:0]:
150 * 0000 = SYSCLK multiplied by 4 (test only) 150 * 0000 = SYSCLK multiplied by 4 (test only)
151 * 0001 = SYSCLK multiplied by 10 151 * 0001 = SYSCLK multiplied by 10
152 * 0010 = SYSCLK multiplied by 4 152 * 0010 = SYSCLK multiplied by 4
153 * 0011 = SYSCLK multiplied by 6 153 * 0011 = SYSCLK multiplied by 6
154 * 0100 = SYSCLK multiplied by 9 154 * 0100 = SYSCLK multiplied by 9
155 * 0101 = SYSCLK multiplied by 5 155 * 0101 = SYSCLK multiplied by 5
156 * 0110 = SYSCLK multiplied by 7 156 * 0110 = SYSCLK multiplied by 7
157 * 0111 = SYSCLK multiplied by 8 157 * 0111 = SYSCLK multiplied by 8
158 * of 33.3MHz 158 * of 33.3MHz
159 **/ 159 **/
160static int gx_freq_mult[16] = { 160static int gx_freq_mult[16] = {
@@ -164,17 +164,17 @@ static int gx_freq_mult[16] = {
164 164
165 165
166/**************************************************************** 166/****************************************************************
167 * Low Level chipset interface * 167 * Low Level chipset interface *
168 ****************************************************************/ 168 ****************************************************************/
169static struct pci_device_id gx_chipset_tbl[] __initdata = { 169static struct pci_device_id gx_chipset_tbl[] __initdata = {
170 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID }, 170 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID },
171 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID }, 171 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID },
172 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID }, 172 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID },
173 { 0, }, 173 { 0, },
174}; 174};
175 175
176/** 176/**
177 * gx_detect_chipset: 177 * gx_detect_chipset:
178 * 178 *
179 **/ 179 **/
180static __init struct pci_dev *gx_detect_chipset(void) 180static __init struct pci_dev *gx_detect_chipset(void)
@@ -182,17 +182,16 @@ static __init struct pci_dev *gx_detect_chipset(void)
182 struct pci_dev *gx_pci = NULL; 182 struct pci_dev *gx_pci = NULL;
183 183
184 /* check if CPU is a MediaGX or a Geode. */ 184 /* check if CPU is a MediaGX or a Geode. */
185 if ((current_cpu_data.x86_vendor != X86_VENDOR_NSC) && 185 if ((current_cpu_data.x86_vendor != X86_VENDOR_NSC) &&
186 (current_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) { 186 (current_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) {
187 dprintk("error: no MediaGX/Geode processor found!\n"); 187 dprintk("error: no MediaGX/Geode processor found!\n");
188 return NULL; 188 return NULL;
189 } 189 }
190 190
191 /* detect which companion chip is used */ 191 /* detect which companion chip is used */
192 while ((gx_pci = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) { 192 while ((gx_pci = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) {
193 if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL) { 193 if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
194 return gx_pci; 194 return gx_pci;
195 }
196 } 195 }
197 196
198 dprintk("error: no supported chipset found!\n"); 197 dprintk("error: no supported chipset found!\n");
@@ -200,24 +199,24 @@ static __init struct pci_dev *gx_detect_chipset(void)
200} 199}
201 200
202/** 201/**
203 * gx_get_cpuspeed: 202 * gx_get_cpuspeed:
204 * 203 *
205 * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs. 204 * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs.
206 */ 205 */
207static unsigned int gx_get_cpuspeed(unsigned int cpu) 206static unsigned int gx_get_cpuspeed(unsigned int cpu)
208{ 207{
209 if ((gx_params->pci_suscfg & SUSMOD) == 0) 208 if ((gx_params->pci_suscfg & SUSMOD) == 0)
210 return stock_freq; 209 return stock_freq;
211 210
212 return (stock_freq * gx_params->off_duration) 211 return (stock_freq * gx_params->off_duration)
213 / (gx_params->on_duration + gx_params->off_duration); 212 / (gx_params->on_duration + gx_params->off_duration);
214} 213}
215 214
216/** 215/**
217 * gx_validate_speed: 216 * gx_validate_speed:
218 * determine current cpu speed 217 * determine current cpu speed
219 * 218 *
220**/ 219 **/
221 220
222static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration) 221static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration)
223{ 222{
@@ -230,7 +229,7 @@ static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off
230 *on_duration=0; 229 *on_duration=0;
231 230
232 for (i=max_duration; i>0; i--) { 231 for (i=max_duration; i>0; i--) {
233 tmp_off = ((khz * i) / stock_freq) & 0xff; 232 tmp_off = ((khz * i) / stock_freq) & 0xff;
234 tmp_on = i - tmp_off; 233 tmp_on = i - tmp_off;
235 tmp_freq = (stock_freq * tmp_off) / i; 234 tmp_freq = (stock_freq * tmp_off) / i;
236 /* if this relation is closer to khz, use this. If it's equal, 235 /* if this relation is closer to khz, use this. If it's equal,
@@ -247,18 +246,17 @@ static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off
247 246
248 247
249/** 248/**
250 * gx_set_cpuspeed: 249 * gx_set_cpuspeed:
251 * set cpu speed in khz. 250 * set cpu speed in khz.
252 **/ 251 **/
253 252
254static void gx_set_cpuspeed(unsigned int khz) 253static void gx_set_cpuspeed(unsigned int khz)
255{ 254{
256 u8 suscfg, pmer1; 255 u8 suscfg, pmer1;
257 unsigned int new_khz; 256 unsigned int new_khz;
258 unsigned long flags; 257 unsigned long flags;
259 struct cpufreq_freqs freqs; 258 struct cpufreq_freqs freqs;
260 259
261
262 freqs.cpu = 0; 260 freqs.cpu = 0;
263 freqs.old = gx_get_cpuspeed(0); 261 freqs.old = gx_get_cpuspeed(0);
264 262
@@ -303,18 +301,18 @@ static void gx_set_cpuspeed(unsigned int khz)
303 pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration); 301 pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration);
304 pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration); 302 pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration);
305 303
306 pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg); 304 pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg);
307 pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg); 305 pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
308 306
309 local_irq_restore(flags); 307 local_irq_restore(flags);
310 308
311 gx_params->pci_suscfg = suscfg; 309 gx_params->pci_suscfg = suscfg;
312 310
313 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 311 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
314 312
315 dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n", 313 dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
316 gx_params->on_duration * 32, gx_params->off_duration * 32); 314 gx_params->on_duration * 32, gx_params->off_duration * 32);
317 dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new); 315 dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
318} 316}
319 317
320/**************************************************************** 318/****************************************************************
@@ -322,10 +320,10 @@ static void gx_set_cpuspeed(unsigned int khz)
322 ****************************************************************/ 320 ****************************************************************/
323 321
324/* 322/*
325 * cpufreq_gx_verify: test if frequency range is valid 323 * cpufreq_gx_verify: test if frequency range is valid
326 * 324 *
327 * This function checks if a given frequency range in kHz is valid 325 * This function checks if a given frequency range in kHz is valid
328 * for the hardware supported by the driver. 326 * for the hardware supported by the driver.
329 */ 327 */
330 328
331static int cpufreq_gx_verify(struct cpufreq_policy *policy) 329static int cpufreq_gx_verify(struct cpufreq_policy *policy)
@@ -333,8 +331,8 @@ static int cpufreq_gx_verify(struct cpufreq_policy *policy)
333 unsigned int tmp_freq = 0; 331 unsigned int tmp_freq = 0;
334 u8 tmp1, tmp2; 332 u8 tmp1, tmp2;
335 333
336 if (!stock_freq || !policy) 334 if (!stock_freq || !policy)
337 return -EINVAL; 335 return -EINVAL;
338 336
339 policy->cpu = 0; 337 policy->cpu = 0;
340 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq); 338 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
@@ -342,14 +340,14 @@ static int cpufreq_gx_verify(struct cpufreq_policy *policy)
342 /* it needs to be assured that at least one supported frequency is 340 /* it needs to be assured that at least one supported frequency is
343 * within policy->min and policy->max. If it is not, policy->max 341 * within policy->min and policy->max. If it is not, policy->max
344 * needs to be increased until one freuqency is supported. 342 * needs to be increased until one freuqency is supported.
345 * policy->min may not be decreased, though. This way we guarantee a 343 * policy->min may not be decreased, though. This way we guarantee a
346 * specific processing capacity. 344 * specific processing capacity.
347 */ 345 */
348 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); 346 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
349 if (tmp_freq < policy->min) 347 if (tmp_freq < policy->min)
350 tmp_freq += stock_freq / max_duration; 348 tmp_freq += stock_freq / max_duration;
351 policy->min = tmp_freq; 349 policy->min = tmp_freq;
352 if (policy->min > policy->max) 350 if (policy->min > policy->max)
353 policy->max = tmp_freq; 351 policy->max = tmp_freq;
354 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); 352 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
355 if (tmp_freq > policy->max) 353 if (tmp_freq > policy->max)
@@ -358,12 +356,12 @@ static int cpufreq_gx_verify(struct cpufreq_policy *policy)
358 if (policy->max < policy->min) 356 if (policy->max < policy->min)
359 policy->max = policy->min; 357 policy->max = policy->min;
360 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq); 358 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
361 359
362 return 0; 360 return 0;
363} 361}
364 362
365/* 363/*
366 * cpufreq_gx_target: 364 * cpufreq_gx_target:
367 * 365 *
368 */ 366 */
369static int cpufreq_gx_target(struct cpufreq_policy *policy, 367static int cpufreq_gx_target(struct cpufreq_policy *policy,
@@ -373,8 +371,8 @@ static int cpufreq_gx_target(struct cpufreq_policy *policy,
373 u8 tmp1, tmp2; 371 u8 tmp1, tmp2;
374 unsigned int tmp_freq; 372 unsigned int tmp_freq;
375 373
376 if (!stock_freq || !policy) 374 if (!stock_freq || !policy)
377 return -EINVAL; 375 return -EINVAL;
378 376
379 policy->cpu = 0; 377 policy->cpu = 0;
380 378
@@ -431,7 +429,7 @@ static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
431 return 0; 429 return 0;
432} 430}
433 431
434/* 432/*
435 * cpufreq_gx_init: 433 * cpufreq_gx_init:
436 * MediaGX/Geode GX initialize cpufreq driver 434 * MediaGX/Geode GX initialize cpufreq driver
437 */ 435 */
@@ -452,7 +450,7 @@ static int __init cpufreq_gx_init(void)
452 u32 class_rev; 450 u32 class_rev;
453 451
454 /* Test if we have the right hardware */ 452 /* Test if we have the right hardware */
455 if ((gx_pci = gx_detect_chipset()) == NULL) 453 if ((gx_pci = gx_detect_chipset()) == NULL)
456 return -ENODEV; 454 return -ENODEV;
457 455
458 /* check whether module parameters are sane */ 456 /* check whether module parameters are sane */
@@ -478,7 +476,7 @@ static int __init cpufreq_gx_init(void)
478 pci_read_config_dword(params->cs55x0, PCI_CLASS_REVISION, &class_rev); 476 pci_read_config_dword(params->cs55x0, PCI_CLASS_REVISION, &class_rev);
479 params->pci_rev = class_rev && 0xff; 477 params->pci_rev = class_rev && 0xff;
480 478
481 if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) { 479 if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) {
482 kfree(params); 480 kfree(params);
483 return ret; /* register error! */ 481 return ret; /* register error! */
484 } 482 }
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.h b/arch/i386/kernel/cpu/cpufreq/longhaul.h
index 2a495c162ec7..d3a95d77ee85 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.h
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.h
@@ -234,7 +234,7 @@ static int __initdata ezrat_eblcr[32] = {
234 234
235/* 235/*
236 * VIA C3 Nehemiah */ 236 * VIA C3 Nehemiah */
237 237
238static int __initdata nehemiah_a_clock_ratio[32] = { 238static int __initdata nehemiah_a_clock_ratio[32] = {
239 100, /* 0000 -> 10.0x */ 239 100, /* 0000 -> 10.0x */
240 160, /* 0001 -> 16.0x */ 240 160, /* 0001 -> 16.0x */
@@ -446,7 +446,7 @@ static int __initdata nehemiah_c_eblcr[32] = {
446 /* end of table */ 446 /* end of table */
447}; 447};
448 448
449/* 449/*
450 * Voltage scales. Div/Mod by 1000 to get actual voltage. 450 * Voltage scales. Div/Mod by 1000 to get actual voltage.
451 * Which scale to use depends on the VRM type in use. 451 * Which scale to use depends on the VRM type in use.
452 */ 452 */
diff --git a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
index cc73a7ae34bc..0e1fc5c45242 100644
--- a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
@@ -14,7 +14,7 @@
14 * The author(s) of this software shall not be held liable for damages 14 * The author(s) of this software shall not be held liable for damages
15 * of any nature resulting due to the use of this software. This 15 * of any nature resulting due to the use of this software. This
16 * software is provided AS-IS with no warranties. 16 * software is provided AS-IS with no warranties.
17 * 17 *
18 * Date Errata Description 18 * Date Errata Description
19 * 20020525 N44, O17 12.5% or 25% DC causes lockup 19 * 20020525 N44, O17 12.5% or 25% DC causes lockup
20 * 20 *
@@ -22,7 +22,7 @@
22 22
23#include <linux/config.h> 23#include <linux/config.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/smp.h> 27#include <linux/smp.h>
28#include <linux/cpufreq.h> 28#include <linux/cpufreq.h>
@@ -30,7 +30,7 @@
30#include <linux/cpumask.h> 30#include <linux/cpumask.h>
31#include <linux/sched.h> /* current / set_cpus_allowed() */ 31#include <linux/sched.h> /* current / set_cpus_allowed() */
32 32
33#include <asm/processor.h> 33#include <asm/processor.h>
34#include <asm/msr.h> 34#include <asm/msr.h>
35#include <asm/timex.h> 35#include <asm/timex.h>
36 36
@@ -79,7 +79,7 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
79 } else { 79 } else {
80 dprintk("CPU#%d setting duty cycle to %d%%\n", 80 dprintk("CPU#%d setting duty cycle to %d%%\n",
81 cpu, ((125 * newstate) / 10)); 81 cpu, ((125 * newstate) / 10));
82 /* bits 63 - 5 : reserved 82 /* bits 63 - 5 : reserved
83 * bit 4 : enable/disable 83 * bit 4 : enable/disable
84 * bits 3-1 : duty cycle 84 * bits 3-1 : duty cycle
85 * bit 0 : reserved 85 * bit 0 : reserved
@@ -132,7 +132,7 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
132 } 132 }
133 133
134 /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software 134 /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
135 * Developer's Manual, Volume 3 135 * Developer's Manual, Volume 3
136 */ 136 */
137 cpus_allowed = current->cpus_allowed; 137 cpus_allowed = current->cpus_allowed;
138 138
@@ -206,7 +206,7 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
206 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D); 206 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
207} 207}
208 208
209 209
210 210
211static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy) 211static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
212{ 212{
@@ -234,7 +234,7 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
234 dprintk("has errata -- disabling frequencies lower than 2ghz\n"); 234 dprintk("has errata -- disabling frequencies lower than 2ghz\n");
235 break; 235 break;
236 } 236 }
237 237
238 /* get max frequency */ 238 /* get max frequency */
239 stock_freq = cpufreq_p4_get_frequency(c); 239 stock_freq = cpufreq_p4_get_frequency(c);
240 if (!stock_freq) 240 if (!stock_freq)
@@ -250,7 +250,7 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
250 p4clockmod_table[i].frequency = (stock_freq * i)/8; 250 p4clockmod_table[i].frequency = (stock_freq * i)/8;
251 } 251 }
252 cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu); 252 cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
253 253
254 /* cpuinfo and default policy values */ 254 /* cpuinfo and default policy values */
255 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 255 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
256 policy->cpuinfo.transition_latency = 1000000; /* assumed */ 256 policy->cpuinfo.transition_latency = 1000000; /* assumed */
@@ -262,7 +262,7 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
262 262
263static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy) 263static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy)
264{ 264{
265 cpufreq_frequency_table_put_attr(policy->cpu); 265 cpufreq_frequency_table_put_attr(policy->cpu);
266 return 0; 266 return 0;
267} 267}
268 268
@@ -298,7 +298,7 @@ static struct freq_attr* p4clockmod_attr[] = {
298}; 298};
299 299
300static struct cpufreq_driver p4clockmod_driver = { 300static struct cpufreq_driver p4clockmod_driver = {
301 .verify = cpufreq_p4_verify, 301 .verify = cpufreq_p4_verify,
302 .target = cpufreq_p4_target, 302 .target = cpufreq_p4_target,
303 .init = cpufreq_p4_cpu_init, 303 .init = cpufreq_p4_cpu_init,
304 .exit = cpufreq_p4_cpu_exit, 304 .exit = cpufreq_p4_cpu_exit,
@@ -310,12 +310,12 @@ static struct cpufreq_driver p4clockmod_driver = {
310 310
311 311
312static int __init cpufreq_p4_init(void) 312static int __init cpufreq_p4_init(void)
313{ 313{
314 struct cpuinfo_x86 *c = cpu_data; 314 struct cpuinfo_x86 *c = cpu_data;
315 int ret; 315 int ret;
316 316
317 /* 317 /*
318 * THERM_CONTROL is architectural for IA32 now, so 318 * THERM_CONTROL is architectural for IA32 now, so
319 * we can rely on the capability checks 319 * we can rely on the capability checks
320 */ 320 */
321 if (c->x86_vendor != X86_VENDOR_INTEL) 321 if (c->x86_vendor != X86_VENDOR_INTEL)
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k6.c b/arch/i386/kernel/cpu/cpufreq/powernow-k6.c
index 222f8cfe3c57..f89524051e4a 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k6.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k6.c
@@ -8,7 +8,7 @@
8 */ 8 */
9 9
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/cpufreq.h> 13#include <linux/cpufreq.h>
14#include <linux/ioport.h> 14#include <linux/ioport.h>
@@ -50,7 +50,7 @@ static int powernow_k6_get_cpu_multiplier(void)
50{ 50{
51 u64 invalue = 0; 51 u64 invalue = 0;
52 u32 msrval; 52 u32 msrval;
53 53
54 msrval = POWERNOW_IOPORT + 0x1; 54 msrval = POWERNOW_IOPORT + 0x1;
55 wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */ 55 wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */
56 invalue=inl(POWERNOW_IOPORT + 0x8); 56 invalue=inl(POWERNOW_IOPORT + 0x8);
@@ -81,7 +81,7 @@ static void powernow_k6_set_state (unsigned int best_i)
81 freqs.old = busfreq * powernow_k6_get_cpu_multiplier(); 81 freqs.old = busfreq * powernow_k6_get_cpu_multiplier();
82 freqs.new = busfreq * clock_ratio[best_i].index; 82 freqs.new = busfreq * clock_ratio[best_i].index;
83 freqs.cpu = 0; /* powernow-k6.c is UP only driver */ 83 freqs.cpu = 0; /* powernow-k6.c is UP only driver */
84 84
85 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 85 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
86 86
87 /* we now need to transform best_i to the BVC format, see AMD#23446 */ 87 /* we now need to transform best_i to the BVC format, see AMD#23446 */
@@ -152,7 +152,7 @@ static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
152 busfreq = cpu_khz / max_multiplier; 152 busfreq = cpu_khz / max_multiplier;
153 153
154 /* table init */ 154 /* table init */
155 for (i=0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) { 155 for (i=0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
156 if (clock_ratio[i].index > max_multiplier) 156 if (clock_ratio[i].index > max_multiplier)
157 clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID; 157 clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID;
158 else 158 else
@@ -182,7 +182,7 @@ static int powernow_k6_cpu_exit(struct cpufreq_policy *policy)
182 powernow_k6_set_state(i); 182 powernow_k6_set_state(i);
183 } 183 }
184 cpufreq_frequency_table_put_attr(policy->cpu); 184 cpufreq_frequency_table_put_attr(policy->cpu);
185 return 0; 185 return 0;
186} 186}
187 187
188static unsigned int powernow_k6_get(unsigned int cpu) 188static unsigned int powernow_k6_get(unsigned int cpu)
@@ -196,8 +196,8 @@ static struct freq_attr* powernow_k6_attr[] = {
196}; 196};
197 197
198static struct cpufreq_driver powernow_k6_driver = { 198static struct cpufreq_driver powernow_k6_driver = {
199 .verify = powernow_k6_verify, 199 .verify = powernow_k6_verify,
200 .target = powernow_k6_target, 200 .target = powernow_k6_target,
201 .init = powernow_k6_cpu_init, 201 .init = powernow_k6_cpu_init,
202 .exit = powernow_k6_cpu_exit, 202 .exit = powernow_k6_cpu_exit,
203 .get = powernow_k6_get, 203 .get = powernow_k6_get,
@@ -215,7 +215,7 @@ static struct cpufreq_driver powernow_k6_driver = {
215 * on success. 215 * on success.
216 */ 216 */
217static int __init powernow_k6_init(void) 217static int __init powernow_k6_init(void)
218{ 218{
219 struct cpuinfo_x86 *c = cpu_data; 219 struct cpuinfo_x86 *c = cpu_data;
220 220
221 if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 != 5) || 221 if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 != 5) ||
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
index edcd626001da..2bf4237cb94e 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
@@ -199,8 +199,8 @@ static int get_ranges (unsigned char *pst)
199 powernow_table[j].index |= (vid << 8); /* upper 8 bits */ 199 powernow_table[j].index |= (vid << 8); /* upper 8 bits */
200 200
201 dprintk (" FID: 0x%x (%d.%dx [%dMHz]) " 201 dprintk (" FID: 0x%x (%d.%dx [%dMHz]) "
202 "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10, 202 "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
203 fid_codes[fid] % 10, speed/1000, vid, 203 fid_codes[fid] % 10, speed/1000, vid,
204 mobile_vid_table[vid]/1000, 204 mobile_vid_table[vid]/1000,
205 mobile_vid_table[vid]%1000); 205 mobile_vid_table[vid]%1000);
206 } 206 }
@@ -368,8 +368,8 @@ static int powernow_acpi_init(void)
368 } 368 }
369 369
370 dprintk (" FID: 0x%x (%d.%dx [%dMHz]) " 370 dprintk (" FID: 0x%x (%d.%dx [%dMHz]) "
371 "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10, 371 "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
372 fid_codes[fid] % 10, speed/1000, vid, 372 fid_codes[fid] % 10, speed/1000, vid,
373 mobile_vid_table[vid]/1000, 373 mobile_vid_table[vid]/1000,
374 mobile_vid_table[vid]%1000); 374 mobile_vid_table[vid]%1000);
375 375
@@ -460,7 +460,7 @@ static int powernow_decode_bios (int maxfid, int startvid)
460 (maxfid==pst->maxfid) && (startvid==pst->startvid)) 460 (maxfid==pst->maxfid) && (startvid==pst->startvid))
461 { 461 {
462 dprintk ("PST:%d (@%p)\n", i, pst); 462 dprintk ("PST:%d (@%p)\n", i, pst);
463 dprintk (" cpuid: 0x%x fsb: %d maxFID: 0x%x startvid: 0x%x\n", 463 dprintk (" cpuid: 0x%x fsb: %d maxFID: 0x%x startvid: 0x%x\n",
464 pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid); 464 pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid);
465 465
466 ret = get_ranges ((char *) pst + sizeof (struct pst_s)); 466 ret = get_ranges ((char *) pst + sizeof (struct pst_s));
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
index 3b3a94987d10..e85e90524df7 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
@@ -83,11 +83,10 @@ static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid)
83 */ 83 */
84static u32 convert_fid_to_vco_fid(u32 fid) 84static u32 convert_fid_to_vco_fid(u32 fid)
85{ 85{
86 if (fid < HI_FID_TABLE_BOTTOM) { 86 if (fid < HI_FID_TABLE_BOTTOM)
87 return 8 + (2 * fid); 87 return 8 + (2 * fid);
88 } else { 88 else
89 return fid; 89 return fid;
90 }
91} 90}
92 91
93/* 92/*
@@ -177,7 +176,7 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
177 if (i++ > 100) { 176 if (i++ > 100) {
178 printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); 177 printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
179 return 1; 178 return 1;
180 } 179 }
181 } while (query_current_values_with_pending_wait(data)); 180 } while (query_current_values_with_pending_wait(data));
182 181
183 count_off_irt(data); 182 count_off_irt(data);
@@ -782,9 +781,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
782 /* verify only 1 entry from the lo frequency table */ 781 /* verify only 1 entry from the lo frequency table */
783 if (fid < HI_FID_TABLE_BOTTOM) { 782 if (fid < HI_FID_TABLE_BOTTOM) {
784 if (cntlofreq) { 783 if (cntlofreq) {
785 /* if both entries are the same, ignore this 784 /* if both entries are the same, ignore this one ... */
786 * one...
787 */
788 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) || 785 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
789 (powernow_table[i].index != powernow_table[cntlofreq].index)) { 786 (powernow_table[i].index != powernow_table[cntlofreq].index)) {
790 printk(KERN_ERR PFX "Too many lo freq table entries\n"); 787 printk(KERN_ERR PFX "Too many lo freq table entries\n");
@@ -856,7 +853,7 @@ static int transition_frequency(struct powernow_k8_data *data, unsigned int inde
856 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); 853 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
857 854
858 /* fid are the lower 8 bits of the index we stored into 855 /* fid are the lower 8 bits of the index we stored into
859 * the cpufreq frequency table in find_psb_table, vid are 856 * the cpufreq frequency table in find_psb_table, vid are
860 * the upper 8 bits. 857 * the upper 8 bits.
861 */ 858 */
862 859
@@ -1050,7 +1047,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1050 pol->governor = CPUFREQ_DEFAULT_GOVERNOR; 1047 pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
1051 pol->cpus = cpu_core_map[pol->cpu]; 1048 pol->cpus = cpu_core_map[pol->cpu];
1052 1049
1053 /* Take a crude guess here. 1050 /* Take a crude guess here.
1054 * That guess was in microseconds, so multiply with 1000 */ 1051 * That guess was in microseconds, so multiply with 1000 */
1055 pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US) 1052 pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
1056 + (3 * (1 << data->irt) * 10)) * 1000; 1053 + (3 * (1 << data->irt) * 10)) * 1000;
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
index d0de37d58e9a..00ea899c17e1 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
@@ -63,7 +63,7 @@ struct powernow_k8_data {
63#define MSR_C_LO_VID_SHIFT 8 63#define MSR_C_LO_VID_SHIFT 8
64 64
65/* Field definitions within the FID VID High Control MSR : */ 65/* Field definitions within the FID VID High Control MSR : */
66#define MSR_C_HI_STP_GNT_TO 0x000fffff 66#define MSR_C_HI_STP_GNT_TO 0x000fffff
67 67
68/* Field definitions within the FID VID Low Status MSR : */ 68/* Field definitions within the FID VID Low Status MSR : */
69#define MSR_S_LO_CHANGE_PENDING 0x80000000 /* cleared when completed */ 69#define MSR_S_LO_CHANGE_PENDING 0x80000000 /* cleared when completed */
@@ -123,7 +123,7 @@ struct powernow_k8_data {
123 * Most values of interest are enocoded in a single field of the _PSS 123 * Most values of interest are enocoded in a single field of the _PSS
124 * entries: the "control" value. 124 * entries: the "control" value.
125 */ 125 */
126 126
127#define IRT_SHIFT 30 127#define IRT_SHIFT 30
128#define RVO_SHIFT 28 128#define RVO_SHIFT 28
129#define EXT_TYPE_SHIFT 27 129#define EXT_TYPE_SHIFT 27
@@ -185,7 +185,7 @@ static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned
185#ifndef for_each_cpu_mask 185#ifndef for_each_cpu_mask
186#define for_each_cpu_mask(i,mask) for (i=0;i<1;i++) 186#define for_each_cpu_mask(i,mask) for (i=0;i<1;i++)
187#endif 187#endif
188 188
189#ifdef CONFIG_SMP 189#ifdef CONFIG_SMP
190static inline void define_siblings(int cpu, cpumask_t cpu_sharedcore_mask[]) 190static inline void define_siblings(int cpu, cpumask_t cpu_sharedcore_mask[])
191{ 191{
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c b/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
index 7c47005a1805..4f46cac155c4 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
@@ -9,7 +9,7 @@
9 */ 9 */
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/moduleparam.h> 13#include <linux/moduleparam.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/cpufreq.h> 15#include <linux/cpufreq.h>
@@ -36,8 +36,8 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
36 /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */ 36 /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
37 struct { 37 struct {
38 unsigned int ratio; /* Frequency Multiplier (x10) */ 38 unsigned int ratio; /* Frequency Multiplier (x10) */
39 u8 bitmap; /* power on configuration bits 39 u8 bitmap; /* power on configuration bits
40 [27, 25:22] (in MSR 0x2a) */ 40 [27, 25:22] (in MSR 0x2a) */
41 } msr_decode_mult [] = { 41 } msr_decode_mult [] = {
42 { 30, 0x01 }, 42 { 30, 0x01 },
43 { 35, 0x05 }, 43 { 35, 0x05 },
@@ -58,9 +58,9 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
58 58
59 /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */ 59 /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
60 struct { 60 struct {
61 unsigned int value; /* Front Side Bus speed in MHz */ 61 unsigned int value; /* Front Side Bus speed in MHz */
62 u8 bitmap; /* power on configuration bits [18: 19] 62 u8 bitmap; /* power on configuration bits [18: 19]
63 (in MSR 0x2a) */ 63 (in MSR 0x2a) */
64 } msr_decode_fsb [] = { 64 } msr_decode_fsb [] = {
65 { 66, 0x0 }, 65 { 66, 0x0 },
66 { 100, 0x2 }, 66 { 100, 0x2 },
@@ -68,8 +68,8 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
68 { 0, 0xff} 68 { 0, 0xff}
69 }; 69 };
70 70
71 u32 msr_lo, msr_tmp; 71 u32 msr_lo, msr_tmp;
72 int i = 0, j = 0; 72 int i = 0, j = 0;
73 73
74 /* read MSR 0x2a - we only need the low 32 bits */ 74 /* read MSR 0x2a - we only need the low 32 bits */
75 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); 75 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
@@ -106,7 +106,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
106 106
107static unsigned int pentiumM_get_frequency(void) 107static unsigned int pentiumM_get_frequency(void)
108{ 108{
109 u32 msr_lo, msr_tmp; 109 u32 msr_lo, msr_tmp;
110 110
111 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp); 111 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
112 dprintk("PM - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp); 112 dprintk("PM - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
@@ -134,7 +134,7 @@ static unsigned int pentium4_get_frequency(void)
134 134
135 dprintk("P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi); 135 dprintk("P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi);
136 136
137 /* decode the FSB: see IA-32 Intel (C) Architecture Software 137 /* decode the FSB: see IA-32 Intel (C) Architecture Software
138 * Developer's Manual, Volume 3: System Prgramming Guide, 138 * Developer's Manual, Volume 3: System Prgramming Guide,
139 * revision #12 in Table B-1: MSRs in the Pentium 4 and 139 * revision #12 in Table B-1: MSRs in the Pentium 4 and
140 * Intel Xeon Processors, on page B-4 and B-5. 140 * Intel Xeon Processors, on page B-4 and B-5.
@@ -170,7 +170,7 @@ static unsigned int pentium4_get_frequency(void)
170 return (fsb * mult); 170 return (fsb * mult);
171} 171}
172 172
173 173
174unsigned int speedstep_get_processor_frequency(unsigned int processor) 174unsigned int speedstep_get_processor_frequency(unsigned int processor)
175{ 175{
176 switch (processor) { 176 switch (processor) {
@@ -198,11 +198,11 @@ EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency);
198unsigned int speedstep_detect_processor (void) 198unsigned int speedstep_detect_processor (void)
199{ 199{
200 struct cpuinfo_x86 *c = cpu_data; 200 struct cpuinfo_x86 *c = cpu_data;
201 u32 ebx, msr_lo, msr_hi; 201 u32 ebx, msr_lo, msr_hi;
202 202
203 dprintk("x86: %x, model: %x\n", c->x86, c->x86_model); 203 dprintk("x86: %x, model: %x\n", c->x86, c->x86_model);
204 204
205 if ((c->x86_vendor != X86_VENDOR_INTEL) || 205 if ((c->x86_vendor != X86_VENDOR_INTEL) ||
206 ((c->x86 != 6) && (c->x86 != 0xF))) 206 ((c->x86 != 6) && (c->x86 != 0xF)))
207 return 0; 207 return 0;
208 208
@@ -218,15 +218,15 @@ unsigned int speedstep_detect_processor (void)
218 dprintk("ebx value is %x, x86_mask is %x\n", ebx, c->x86_mask); 218 dprintk("ebx value is %x, x86_mask is %x\n", ebx, c->x86_mask);
219 219
220 switch (c->x86_mask) { 220 switch (c->x86_mask) {
221 case 4: 221 case 4:
222 /* 222 /*
223 * B-stepping [M-P4-M] 223 * B-stepping [M-P4-M]
224 * sample has ebx = 0x0f, production has 0x0e. 224 * sample has ebx = 0x0f, production has 0x0e.
225 */ 225 */
226 if ((ebx == 0x0e) || (ebx == 0x0f)) 226 if ((ebx == 0x0e) || (ebx == 0x0f))
227 return SPEEDSTEP_PROCESSOR_P4M; 227 return SPEEDSTEP_PROCESSOR_P4M;
228 break; 228 break;
229 case 7: 229 case 7:
230 /* 230 /*
231 * C-stepping [M-P4-M] 231 * C-stepping [M-P4-M]
232 * needs to have ebx=0x0e, else it's a celeron: 232 * needs to have ebx=0x0e, else it's a celeron:
@@ -253,7 +253,7 @@ unsigned int speedstep_detect_processor (void)
253 * also, M-P4M HTs have ebx=0x8, too 253 * also, M-P4M HTs have ebx=0x8, too
254 * For now, they are distinguished by the model_id string 254 * For now, they are distinguished by the model_id string
255 */ 255 */
256 if ((ebx == 0x0e) || (strstr(c->x86_model_id,"Mobile Intel(R) Pentium(R) 4") != NULL)) 256 if ((ebx == 0x0e) || (strstr(c->x86_model_id,"Mobile Intel(R) Pentium(R) 4") != NULL))
257 return SPEEDSTEP_PROCESSOR_P4M; 257 return SPEEDSTEP_PROCESSOR_P4M;
258 break; 258 break;
259 default: 259 default:
@@ -264,8 +264,7 @@ unsigned int speedstep_detect_processor (void)
264 264
265 switch (c->x86_model) { 265 switch (c->x86_model) {
266 case 0x0B: /* Intel PIII [Tualatin] */ 266 case 0x0B: /* Intel PIII [Tualatin] */
267 /* cpuid_ebx(1) is 0x04 for desktop PIII, 267 /* cpuid_ebx(1) is 0x04 for desktop PIII, 0x06 for mobile PIII-M */
268 0x06 for mobile PIII-M */
269 ebx = cpuid_ebx(0x00000001); 268 ebx = cpuid_ebx(0x00000001);
270 dprintk("ebx is %x\n", ebx); 269 dprintk("ebx is %x\n", ebx);
271 270
@@ -275,9 +274,8 @@ unsigned int speedstep_detect_processor (void)
275 return 0; 274 return 0;
276 275
277 /* So far all PIII-M processors support SpeedStep. See 276 /* So far all PIII-M processors support SpeedStep. See
278 * Intel's 24540640.pdf of June 2003 277 * Intel's 24540640.pdf of June 2003
279 */ 278 */
280
281 return SPEEDSTEP_PROCESSOR_PIII_T; 279 return SPEEDSTEP_PROCESSOR_PIII_T;
282 280
283 case 0x08: /* Intel PIII [Coppermine] */ 281 case 0x08: /* Intel PIII [Coppermine] */
@@ -399,7 +397,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
399 } 397 }
400 } 398 }
401 399
402 out: 400out:
403 local_irq_restore(flags); 401 local_irq_restore(flags);
404 return (ret); 402 return (ret);
405} 403}
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.h b/arch/i386/kernel/cpu/cpufreq/speedstep-lib.h
index 6a727fd3a77e..b735429c50b4 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.h
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-lib.h
@@ -14,7 +14,7 @@
14 14
15#define SPEEDSTEP_PROCESSOR_PIII_C_EARLY 0x00000001 /* Coppermine core */ 15#define SPEEDSTEP_PROCESSOR_PIII_C_EARLY 0x00000001 /* Coppermine core */
16#define SPEEDSTEP_PROCESSOR_PIII_C 0x00000002 /* Coppermine core */ 16#define SPEEDSTEP_PROCESSOR_PIII_C 0x00000002 /* Coppermine core */
17#define SPEEDSTEP_PROCESSOR_PIII_T 0x00000003 /* Tualatin core */ 17#define SPEEDSTEP_PROCESSOR_PIII_T 0x00000003 /* Tualatin core */
18#define SPEEDSTEP_PROCESSOR_P4M 0x00000004 /* P4-M */ 18#define SPEEDSTEP_PROCESSOR_P4M 0x00000004 /* P4-M */
19 19
20/* the following processors are not speedstep-capable and are not auto-detected 20/* the following processors are not speedstep-capable and are not auto-detected
@@ -25,8 +25,8 @@
25 25
26/* speedstep states -- only two of them */ 26/* speedstep states -- only two of them */
27 27
28#define SPEEDSTEP_HIGH 0x00000000 28#define SPEEDSTEP_HIGH 0x00000000
29#define SPEEDSTEP_LOW 0x00000001 29#define SPEEDSTEP_LOW 0x00000001
30 30
31 31
32/* detect a speedstep-capable processor */ 32/* detect a speedstep-capable processor */
@@ -36,13 +36,13 @@ extern unsigned int speedstep_detect_processor (void);
36extern unsigned int speedstep_get_processor_frequency(unsigned int processor); 36extern unsigned int speedstep_get_processor_frequency(unsigned int processor);
37 37
38 38
39/* detect the low and high speeds of the processor. The callback 39/* detect the low and high speeds of the processor. The callback
40 * set_state"'s first argument is either SPEEDSTEP_HIGH or 40 * set_state"'s first argument is either SPEEDSTEP_HIGH or
41 * SPEEDSTEP_LOW; the second argument is zero so that no 41 * SPEEDSTEP_LOW; the second argument is zero so that no
42 * cpufreq_notify_transition calls are initiated. 42 * cpufreq_notify_transition calls are initiated.
43 */ 43 */
44extern unsigned int speedstep_get_freqs(unsigned int processor, 44extern unsigned int speedstep_get_freqs(unsigned int processor,
45 unsigned int *low_speed, 45 unsigned int *low_speed,
46 unsigned int *high_speed, 46 unsigned int *high_speed,
47 unsigned int *transition_latency, 47 unsigned int *transition_latency,
48 void (*set_state) (unsigned int state)); 48 void (*set_state) (unsigned int state));
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c b/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c
index 28cc5d524afc..336ba49e526d 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c
@@ -13,8 +13,8 @@
13 *********************************************************************/ 13 *********************************************************************/
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/moduleparam.h> 17#include <linux/moduleparam.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/cpufreq.h> 19#include <linux/cpufreq.h>
20#include <linux/pci.h> 20#include <linux/pci.h>
@@ -28,21 +28,21 @@
28 * 28 *
29 * These parameters are got from IST-SMI BIOS call. 29 * These parameters are got from IST-SMI BIOS call.
30 * If user gives it, these are used. 30 * If user gives it, these are used.
31 * 31 *
32 */ 32 */
33static int smi_port = 0; 33static int smi_port = 0;
34static int smi_cmd = 0; 34static int smi_cmd = 0;
35static unsigned int smi_sig = 0; 35static unsigned int smi_sig = 0;
36 36
37/* info about the processor */ 37/* info about the processor */
38static unsigned int speedstep_processor = 0; 38static unsigned int speedstep_processor = 0;
39 39
40/* 40/*
41 * There are only two frequency states for each processor. Values 41 * There are only two frequency states for each processor. Values
42 * are in kHz for the time being. 42 * are in kHz for the time being.
43 */ 43 */
44static struct cpufreq_frequency_table speedstep_freqs[] = { 44static struct cpufreq_frequency_table speedstep_freqs[] = {
45 {SPEEDSTEP_HIGH, 0}, 45 {SPEEDSTEP_HIGH, 0},
46 {SPEEDSTEP_LOW, 0}, 46 {SPEEDSTEP_LOW, 0},
47 {0, CPUFREQ_TABLE_END}, 47 {0, CPUFREQ_TABLE_END},
48}; 48};
@@ -123,7 +123,7 @@ static int speedstep_smi_get_freqs (unsigned int *low, unsigned int *high)
123 *low = low_mhz * 1000; 123 *low = low_mhz * 1000;
124 124
125 return result; 125 return result;
126} 126}
127 127
128/** 128/**
129 * speedstep_get_state - set the SpeedStep state 129 * speedstep_get_state - set the SpeedStep state
@@ -204,7 +204,7 @@ static void speedstep_set_state (unsigned int state)
204 * speedstep_target - set a new CPUFreq policy 204 * speedstep_target - set a new CPUFreq policy
205 * @policy: new policy 205 * @policy: new policy
206 * @target_freq: new freq 206 * @target_freq: new freq
207 * @relation: 207 * @relation:
208 * 208 *
209 * Sets a new CPUFreq policy/freq. 209 * Sets a new CPUFreq policy/freq.
210 */ 210 */
@@ -283,7 +283,7 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
283 state = speedstep_get_state(); 283 state = speedstep_get_state();
284 speed = speedstep_freqs[state].frequency; 284 speed = speedstep_freqs[state].frequency;
285 285
286 dprintk("currently at %s speed setting - %i MHz\n", 286 dprintk("currently at %s speed setting - %i MHz\n",
287 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high", 287 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
288 (speed / 1000)); 288 (speed / 1000));
289 289
@@ -296,7 +296,7 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
296 if (result) 296 if (result)
297 return (result); 297 return (result);
298 298
299 cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu); 299 cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
300 300
301 return 0; 301 return 0;
302} 302}
@@ -332,8 +332,8 @@ static struct freq_attr* speedstep_attr[] = {
332 332
333static struct cpufreq_driver speedstep_driver = { 333static struct cpufreq_driver speedstep_driver = {
334 .name = "speedstep-smi", 334 .name = "speedstep-smi",
335 .verify = speedstep_verify, 335 .verify = speedstep_verify,
336 .target = speedstep_target, 336 .target = speedstep_target,
337 .init = speedstep_cpu_init, 337 .init = speedstep_cpu_init,
338 .exit = speedstep_cpu_exit, 338 .exit = speedstep_cpu_exit,
339 .get = speedstep_get, 339 .get = speedstep_get,
@@ -370,13 +370,12 @@ static int __init speedstep_init(void)
370 return -ENODEV; 370 return -ENODEV;
371 } 371 }
372 372
373 dprintk("signature:0x%.8lx, command:0x%.8lx, event:0x%.8lx, perf_level:0x%.8lx.\n", 373 dprintk("signature:0x%.8lx, command:0x%.8lx, event:0x%.8lx, perf_level:0x%.8lx.\n",
374 ist_info.signature, ist_info.command, ist_info.event, ist_info.perf_level); 374 ist_info.signature, ist_info.command, ist_info.event, ist_info.perf_level);
375 375
376 376 /* Error if no IST-SMI BIOS or no PARM
377 /* Error if no IST-SMI BIOS or no PARM
378 sig= 'ISGE' aka 'Intel Speedstep Gate E' */ 377 sig= 'ISGE' aka 'Intel Speedstep Gate E' */
379 if ((ist_info.signature != 0x47534943) && ( 378 if ((ist_info.signature != 0x47534943) && (
380 (smi_port == 0) || (smi_cmd == 0))) 379 (smi_port == 0) || (smi_cmd == 0)))
381 return -ENODEV; 380 return -ENODEV;
382 381
@@ -386,17 +385,15 @@ static int __init speedstep_init(void)
386 smi_sig = ist_info.signature; 385 smi_sig = ist_info.signature;
387 386
388 /* setup smi_port from MODLULE_PARM or BIOS */ 387 /* setup smi_port from MODLULE_PARM or BIOS */
389 if ((smi_port > 0xff) || (smi_port < 0)) { 388 if ((smi_port > 0xff) || (smi_port < 0))
390 return -EINVAL; 389 return -EINVAL;
391 } else if (smi_port == 0) { 390 else if (smi_port == 0)
392 smi_port = ist_info.command & 0xff; 391 smi_port = ist_info.command & 0xff;
393 }
394 392
395 if ((smi_cmd > 0xff) || (smi_cmd < 0)) { 393 if ((smi_cmd > 0xff) || (smi_cmd < 0))
396 return -EINVAL; 394 return -EINVAL;
397 } else if (smi_cmd == 0) { 395 else if (smi_cmd == 0)
398 smi_cmd = (ist_info.command >> 16) & 0xff; 396 smi_cmd = (ist_info.command >> 16) & 0xff;
399 }
400 397
401 return cpufreq_register_driver(&speedstep_driver); 398 return cpufreq_register_driver(&speedstep_driver);
402} 399}
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 9582de1c9cad..cb7d6e0db759 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -5,7 +5,7 @@
5 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> 5 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
6 * 6 *
7 * Oct 2005 - Ashok Raj <ashok.raj@intel.com> 7 * Oct 2005 - Ashok Raj <ashok.raj@intel.com>
8 * Added handling for CPU hotplug 8 * Added handling for CPU hotplug
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -44,8 +44,8 @@ static int __cpufreq_governor(struct cpufreq_policy *policy, unsigned int event)
44static void handle_update(void *data); 44static void handle_update(void *data);
45 45
46/** 46/**
47 * Two notifier lists: the "policy" list is involved in the 47 * Two notifier lists: the "policy" list is involved in the
48 * validation process for a new CPU frequency policy; the 48 * validation process for a new CPU frequency policy; the
49 * "transition" list for kernel code that needs to handle 49 * "transition" list for kernel code that needs to handle
50 * changes to devices when the CPU clock speed changes. 50 * changes to devices when the CPU clock speed changes.
51 * The mutex locks both lists. 51 * The mutex locks both lists.
@@ -151,7 +151,7 @@ void cpufreq_debug_printk(unsigned int type, const char *prefix, const char *fmt
151 va_list args; 151 va_list args;
152 unsigned int len; 152 unsigned int len;
153 unsigned long flags; 153 unsigned long flags;
154 154
155 WARN_ON(!prefix); 155 WARN_ON(!prefix);
156 if (type & debug) { 156 if (type & debug) {
157 spin_lock_irqsave(&disable_ratelimit_lock, flags); 157 spin_lock_irqsave(&disable_ratelimit_lock, flags);
@@ -198,7 +198,7 @@ static inline void cpufreq_debug_disable_ratelimit(void) { return; }
198 * 198 *
199 * This function alters the system "loops_per_jiffy" for the clock 199 * This function alters the system "loops_per_jiffy" for the clock
200 * speed change. Note that loops_per_jiffy cannot be updated on SMP 200 * speed change. Note that loops_per_jiffy cannot be updated on SMP
201 * systems as each CPU might be scaled differently. So, use the arch 201 * systems as each CPU might be scaled differently. So, use the arch
202 * per-CPU loops_per_jiffy value wherever possible. 202 * per-CPU loops_per_jiffy value wherever possible.
203 */ 203 */
204#ifndef CONFIG_SMP 204#ifndef CONFIG_SMP
@@ -233,7 +233,7 @@ static inline void adjust_jiffies(unsigned long val, struct cpufreq_freqs *ci) {
233 * 233 *
234 * This function calls the transition notifiers and the "adjust_jiffies" 234 * This function calls the transition notifiers and the "adjust_jiffies"
235 * function. It is called twice on all CPU frequency changes that have 235 * function. It is called twice on all CPU frequency changes that have
236 * external effects. 236 * external effects.
237 */ 237 */
238void cpufreq_notify_transition(struct cpufreq_freqs *freqs, unsigned int state) 238void cpufreq_notify_transition(struct cpufreq_freqs *freqs, unsigned int state)
239{ 239{
@@ -251,7 +251,7 @@ void cpufreq_notify_transition(struct cpufreq_freqs *freqs, unsigned int state)
251 switch (state) { 251 switch (state) {
252 252
253 case CPUFREQ_PRECHANGE: 253 case CPUFREQ_PRECHANGE:
254 /* detect if the driver reported a value as "old frequency" 254 /* detect if the driver reported a value as "old frequency"
255 * which is not equal to what the cpufreq core thinks is 255 * which is not equal to what the cpufreq core thinks is
256 * "old frequency". 256 * "old frequency".
257 */ 257 */
@@ -335,11 +335,11 @@ extern struct sysdev_class cpu_sysdev_class;
335 * "unsigned int". 335 * "unsigned int".
336 */ 336 */
337 337
338#define show_one(file_name, object) \ 338#define show_one(file_name, object) \
339static ssize_t show_##file_name \ 339static ssize_t show_##file_name \
340(struct cpufreq_policy * policy, char *buf) \ 340(struct cpufreq_policy * policy, char *buf) \
341{ \ 341{ \
342 return sprintf (buf, "%u\n", policy->object); \ 342 return sprintf (buf, "%u\n", policy->object); \
343} 343}
344 344
345show_one(cpuinfo_min_freq, cpuinfo.min_freq); 345show_one(cpuinfo_min_freq, cpuinfo.min_freq);
@@ -404,8 +404,8 @@ static ssize_t show_scaling_governor (struct cpufreq_policy * policy, char *buf)
404/** 404/**
405 * store_scaling_governor - store policy for the specified CPU 405 * store_scaling_governor - store policy for the specified CPU
406 */ 406 */
407static ssize_t store_scaling_governor (struct cpufreq_policy * policy, 407static ssize_t store_scaling_governor (struct cpufreq_policy * policy,
408 const char *buf, size_t count) 408 const char *buf, size_t count)
409{ 409{
410 unsigned int ret = -EINVAL; 410 unsigned int ret = -EINVAL;
411 char str_governor[16]; 411 char str_governor[16];
@@ -528,7 +528,7 @@ static ssize_t show(struct kobject * kobj, struct attribute * attr ,char * buf)
528 return ret; 528 return ret;
529} 529}
530 530
531static ssize_t store(struct kobject * kobj, struct attribute * attr, 531static ssize_t store(struct kobject * kobj, struct attribute * attr,
532 const char * buf, size_t count) 532 const char * buf, size_t count)
533{ 533{
534 struct cpufreq_policy * policy = to_policy(kobj); 534 struct cpufreq_policy * policy = to_policy(kobj);
@@ -564,7 +564,7 @@ static struct kobj_type ktype_cpufreq = {
564/** 564/**
565 * cpufreq_add_dev - add a CPU device 565 * cpufreq_add_dev - add a CPU device
566 * 566 *
567 * Adds the cpufreq interface for a CPU device. 567 * Adds the cpufreq interface for a CPU device.
568 */ 568 */
569static int cpufreq_add_dev (struct sys_device * sys_dev) 569static int cpufreq_add_dev (struct sys_device * sys_dev)
570{ 570{
@@ -724,7 +724,7 @@ static int cpufreq_remove_dev (struct sys_device * sys_dev)
724 724
725#ifdef CONFIG_SMP 725#ifdef CONFIG_SMP
726 /* if this isn't the CPU which is the parent of the kobj, we 726 /* if this isn't the CPU which is the parent of the kobj, we
727 * only need to unlink, put and exit 727 * only need to unlink, put and exit
728 */ 728 */
729 if (unlikely(cpu != data->cpu)) { 729 if (unlikely(cpu != data->cpu)) {
730 dprintk("removing link\n"); 730 dprintk("removing link\n");
@@ -740,7 +740,7 @@ static int cpufreq_remove_dev (struct sys_device * sys_dev)
740 if (!kobject_get(&data->kobj)) { 740 if (!kobject_get(&data->kobj)) {
741 spin_unlock_irqrestore(&cpufreq_driver_lock, flags); 741 spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
742 cpufreq_debug_enable_ratelimit(); 742 cpufreq_debug_enable_ratelimit();
743 return -EFAULT; 743 return -EFAULT;
744 } 744 }
745 745
746#ifdef CONFIG_SMP 746#ifdef CONFIG_SMP
@@ -783,7 +783,7 @@ static int cpufreq_remove_dev (struct sys_device * sys_dev)
783 kobject_put(&data->kobj); 783 kobject_put(&data->kobj);
784 784
785 /* we need to make sure that the underlying kobj is actually 785 /* we need to make sure that the underlying kobj is actually
786 * not referenced anymore by anybody before we proceed with 786 * not referenced anymore by anybody before we proceed with
787 * unloading. 787 * unloading.
788 */ 788 */
789 dprintk("waiting for dropping of refcount\n"); 789 dprintk("waiting for dropping of refcount\n");
@@ -831,7 +831,7 @@ static void cpufreq_out_of_sync(unsigned int cpu, unsigned int old_freq, unsigne
831} 831}
832 832
833 833
834/** 834/**
835 * cpufreq_quick_get - get the CPU frequency (in kHz) frpm policy->cur 835 * cpufreq_quick_get - get the CPU frequency (in kHz) frpm policy->cur
836 * @cpu: CPU number 836 * @cpu: CPU number
837 * 837 *
@@ -855,7 +855,7 @@ unsigned int cpufreq_quick_get(unsigned int cpu)
855EXPORT_SYMBOL(cpufreq_quick_get); 855EXPORT_SYMBOL(cpufreq_quick_get);
856 856
857 857
858/** 858/**
859 * cpufreq_get - get the current CPU frequency (in kHz) 859 * cpufreq_get - get the current CPU frequency (in kHz)
860 * @cpu: CPU number 860 * @cpu: CPU number
861 * 861 *
@@ -1072,7 +1072,7 @@ static struct sysdev_driver cpufreq_sysdev_driver = {
1072 * @nb: notifier function to register 1072 * @nb: notifier function to register
1073 * @list: CPUFREQ_TRANSITION_NOTIFIER or CPUFREQ_POLICY_NOTIFIER 1073 * @list: CPUFREQ_TRANSITION_NOTIFIER or CPUFREQ_POLICY_NOTIFIER
1074 * 1074 *
1075 * Add a driver to one of two lists: either a list of drivers that 1075 * Add a driver to one of two lists: either a list of drivers that
1076 * are notified about clock rate changes (once before and once after 1076 * are notified about clock rate changes (once before and once after
1077 * the transition), or a list of drivers that are notified about 1077 * the transition), or a list of drivers that are notified about
1078 * changes in cpufreq policy. 1078 * changes in cpufreq policy.
@@ -1225,7 +1225,7 @@ int cpufreq_register_governor(struct cpufreq_governor *governor)
1225 return -EINVAL; 1225 return -EINVAL;
1226 1226
1227 mutex_lock(&cpufreq_governor_mutex); 1227 mutex_lock(&cpufreq_governor_mutex);
1228 1228
1229 list_for_each_entry(t, &cpufreq_governor_list, governor_list) { 1229 list_for_each_entry(t, &cpufreq_governor_list, governor_list) {
1230 if (!strnicmp(governor->name,t->name,CPUFREQ_NAME_LEN)) { 1230 if (!strnicmp(governor->name,t->name,CPUFREQ_NAME_LEN)) {
1231 mutex_unlock(&cpufreq_governor_mutex); 1231 mutex_unlock(&cpufreq_governor_mutex);
@@ -1234,7 +1234,7 @@ int cpufreq_register_governor(struct cpufreq_governor *governor)
1234 } 1234 }
1235 list_add(&governor->governor_list, &cpufreq_governor_list); 1235 list_add(&governor->governor_list, &cpufreq_governor_list);
1236 1236
1237 mutex_unlock(&cpufreq_governor_mutex); 1237 mutex_unlock(&cpufreq_governor_mutex);
1238 return 0; 1238 return 0;
1239} 1239}
1240EXPORT_SYMBOL_GPL(cpufreq_register_governor); 1240EXPORT_SYMBOL_GPL(cpufreq_register_governor);
@@ -1497,9 +1497,9 @@ static struct notifier_block cpufreq_cpu_notifier =
1497 * @driver_data: A struct cpufreq_driver containing the values# 1497 * @driver_data: A struct cpufreq_driver containing the values#
1498 * submitted by the CPU Frequency driver. 1498 * submitted by the CPU Frequency driver.
1499 * 1499 *
1500 * Registers a CPU Frequency driver to this core code. This code 1500 * Registers a CPU Frequency driver to this core code. This code
1501 * returns zero on success, -EBUSY when another driver got here first 1501 * returns zero on success, -EBUSY when another driver got here first
1502 * (and isn't unregistered in the meantime). 1502 * (and isn't unregistered in the meantime).
1503 * 1503 *
1504 */ 1504 */
1505int cpufreq_register_driver(struct cpufreq_driver *driver_data) 1505int cpufreq_register_driver(struct cpufreq_driver *driver_data)
@@ -1560,7 +1560,7 @@ EXPORT_SYMBOL_GPL(cpufreq_register_driver);
1560/** 1560/**
1561 * cpufreq_unregister_driver - unregister the current CPUFreq driver 1561 * cpufreq_unregister_driver - unregister the current CPUFreq driver
1562 * 1562 *
1563 * Unregister the current CPUFreq driver. Only call this if you have 1563 * Unregister the current CPUFreq driver. Only call this if you have
1564 * the right to do so, i.e. if you have succeeded in initialising before! 1564 * the right to do so, i.e. if you have succeeded in initialising before!
1565 * Returns zero if successful, and -EINVAL if the cpufreq_driver is 1565 * Returns zero if successful, and -EINVAL if the cpufreq_driver is
1566 * currently not initialised. 1566 * currently not initialised.
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index 9ee9411f186f..69aa1db8336c 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -38,17 +38,17 @@
38#define MIN_FREQUENCY_UP_THRESHOLD (11) 38#define MIN_FREQUENCY_UP_THRESHOLD (11)
39#define MAX_FREQUENCY_UP_THRESHOLD (100) 39#define MAX_FREQUENCY_UP_THRESHOLD (100)
40 40
41/* 41/*
42 * The polling frequency of this governor depends on the capability of 42 * The polling frequency of this governor depends on the capability of
43 * the processor. Default polling frequency is 1000 times the transition 43 * the processor. Default polling frequency is 1000 times the transition
44 * latency of the processor. The governor will work on any processor with 44 * latency of the processor. The governor will work on any processor with
45 * transition latency <= 10mS, using appropriate sampling 45 * transition latency <= 10mS, using appropriate sampling
46 * rate. 46 * rate.
47 * For CPUs with transition latency > 10mS (mostly drivers with CPUFREQ_ETERNAL) 47 * For CPUs with transition latency > 10mS (mostly drivers with CPUFREQ_ETERNAL)
48 * this governor will not work. 48 * this governor will not work.
49 * All times here are in uS. 49 * All times here are in uS.
50 */ 50 */
51static unsigned int def_sampling_rate; 51static unsigned int def_sampling_rate;
52#define MIN_SAMPLING_RATE_RATIO (2) 52#define MIN_SAMPLING_RATE_RATIO (2)
53/* for correct statistics, we need at least 10 ticks between each measure */ 53/* for correct statistics, we need at least 10 ticks between each measure */
54#define MIN_STAT_SAMPLING_RATE (MIN_SAMPLING_RATE_RATIO * jiffies_to_usecs(10)) 54#define MIN_STAT_SAMPLING_RATE (MIN_SAMPLING_RATE_RATIO * jiffies_to_usecs(10))
@@ -62,28 +62,28 @@ static unsigned int def_sampling_rate;
62static void do_dbs_timer(void *data); 62static void do_dbs_timer(void *data);
63 63
64struct cpu_dbs_info_s { 64struct cpu_dbs_info_s {
65 struct cpufreq_policy *cur_policy; 65 struct cpufreq_policy *cur_policy;
66 unsigned int prev_cpu_idle_up; 66 unsigned int prev_cpu_idle_up;
67 unsigned int prev_cpu_idle_down; 67 unsigned int prev_cpu_idle_down;
68 unsigned int enable; 68 unsigned int enable;
69}; 69};
70static DEFINE_PER_CPU(struct cpu_dbs_info_s, cpu_dbs_info); 70static DEFINE_PER_CPU(struct cpu_dbs_info_s, cpu_dbs_info);
71 71
72static unsigned int dbs_enable; /* number of CPUs using this policy */ 72static unsigned int dbs_enable; /* number of CPUs using this policy */
73 73
74static DEFINE_MUTEX (dbs_mutex); 74static DEFINE_MUTEX (dbs_mutex);
75static DECLARE_WORK (dbs_work, do_dbs_timer, NULL); 75static DECLARE_WORK (dbs_work, do_dbs_timer, NULL);
76 76
77struct dbs_tuners { 77struct dbs_tuners {
78 unsigned int sampling_rate; 78 unsigned int sampling_rate;
79 unsigned int sampling_down_factor; 79 unsigned int sampling_down_factor;
80 unsigned int up_threshold; 80 unsigned int up_threshold;
81 unsigned int ignore_nice; 81 unsigned int ignore_nice;
82}; 82};
83 83
84static struct dbs_tuners dbs_tuners_ins = { 84static struct dbs_tuners dbs_tuners_ins = {
85 .up_threshold = DEF_FREQUENCY_UP_THRESHOLD, 85 .up_threshold = DEF_FREQUENCY_UP_THRESHOLD,
86 .sampling_down_factor = DEF_SAMPLING_DOWN_FACTOR, 86 .sampling_down_factor = DEF_SAMPLING_DOWN_FACTOR,
87}; 87};
88 88
89static inline unsigned int get_cpu_idle_time(unsigned int cpu) 89static inline unsigned int get_cpu_idle_time(unsigned int cpu)
@@ -106,8 +106,8 @@ static ssize_t show_sampling_rate_min(struct cpufreq_policy *policy, char *buf)
106 return sprintf (buf, "%u\n", MIN_SAMPLING_RATE); 106 return sprintf (buf, "%u\n", MIN_SAMPLING_RATE);
107} 107}
108 108
109#define define_one_ro(_name) \ 109#define define_one_ro(_name) \
110static struct freq_attr _name = \ 110static struct freq_attr _name = \
111__ATTR(_name, 0444, show_##_name, NULL) 111__ATTR(_name, 0444, show_##_name, NULL)
112 112
113define_one_ro(sampling_rate_max); 113define_one_ro(sampling_rate_max);
@@ -125,7 +125,7 @@ show_one(sampling_down_factor, sampling_down_factor);
125show_one(up_threshold, up_threshold); 125show_one(up_threshold, up_threshold);
126show_one(ignore_nice_load, ignore_nice); 126show_one(ignore_nice_load, ignore_nice);
127 127
128static ssize_t store_sampling_down_factor(struct cpufreq_policy *unused, 128static ssize_t store_sampling_down_factor(struct cpufreq_policy *unused,
129 const char *buf, size_t count) 129 const char *buf, size_t count)
130{ 130{
131 unsigned int input; 131 unsigned int input;
@@ -144,7 +144,7 @@ static ssize_t store_sampling_down_factor(struct cpufreq_policy *unused,
144 return count; 144 return count;
145} 145}
146 146
147static ssize_t store_sampling_rate(struct cpufreq_policy *unused, 147static ssize_t store_sampling_rate(struct cpufreq_policy *unused,
148 const char *buf, size_t count) 148 const char *buf, size_t count)
149{ 149{
150 unsigned int input; 150 unsigned int input;
@@ -163,7 +163,7 @@ static ssize_t store_sampling_rate(struct cpufreq_policy *unused,
163 return count; 163 return count;
164} 164}
165 165
166static ssize_t store_up_threshold(struct cpufreq_policy *unused, 166static ssize_t store_up_threshold(struct cpufreq_policy *unused,
167 const char *buf, size_t count) 167 const char *buf, size_t count)
168{ 168{
169 unsigned int input; 169 unsigned int input;
@@ -171,7 +171,7 @@ static ssize_t store_up_threshold(struct cpufreq_policy *unused,
171 ret = sscanf (buf, "%u", &input); 171 ret = sscanf (buf, "%u", &input);
172 172
173 mutex_lock(&dbs_mutex); 173 mutex_lock(&dbs_mutex);
174 if (ret != 1 || input > MAX_FREQUENCY_UP_THRESHOLD || 174 if (ret != 1 || input > MAX_FREQUENCY_UP_THRESHOLD ||
175 input < MIN_FREQUENCY_UP_THRESHOLD) { 175 input < MIN_FREQUENCY_UP_THRESHOLD) {
176 mutex_unlock(&dbs_mutex); 176 mutex_unlock(&dbs_mutex);
177 return -EINVAL; 177 return -EINVAL;
@@ -190,14 +190,14 @@ static ssize_t store_ignore_nice_load(struct cpufreq_policy *policy,
190 int ret; 190 int ret;
191 191
192 unsigned int j; 192 unsigned int j;
193 193
194 ret = sscanf (buf, "%u", &input); 194 ret = sscanf (buf, "%u", &input);
195 if ( ret != 1 ) 195 if ( ret != 1 )
196 return -EINVAL; 196 return -EINVAL;
197 197
198 if ( input > 1 ) 198 if ( input > 1 )
199 input = 1; 199 input = 1;
200 200
201 mutex_lock(&dbs_mutex); 201 mutex_lock(&dbs_mutex);
202 if ( input == dbs_tuners_ins.ignore_nice ) { /* nothing to do */ 202 if ( input == dbs_tuners_ins.ignore_nice ) { /* nothing to do */
203 mutex_unlock(&dbs_mutex); 203 mutex_unlock(&dbs_mutex);
@@ -259,16 +259,16 @@ static void dbs_check_cpu(int cpu)
259 return; 259 return;
260 260
261 policy = this_dbs_info->cur_policy; 261 policy = this_dbs_info->cur_policy;
262 /* 262 /*
263 * Every sampling_rate, we check, if current idle time is less 263 * Every sampling_rate, we check, if current idle time is less
264 * than 20% (default), then we try to increase frequency 264 * than 20% (default), then we try to increase frequency
265 * Every sampling_rate*sampling_down_factor, we look for a the lowest 265 * Every sampling_rate*sampling_down_factor, we look for a the lowest
266 * frequency which can sustain the load while keeping idle time over 266 * frequency which can sustain the load while keeping idle time over
267 * 30%. If such a frequency exist, we try to decrease to this frequency. 267 * 30%. If such a frequency exist, we try to decrease to this frequency.
268 * 268 *
269 * Any frequency increase takes it to the maximum frequency. 269 * Any frequency increase takes it to the maximum frequency.
270 * Frequency reduction happens at minimum steps of 270 * Frequency reduction happens at minimum steps of
271 * 5% (default) of current frequency 271 * 5% (default) of current frequency
272 */ 272 */
273 273
274 /* Check for frequency increase */ 274 /* Check for frequency increase */
@@ -298,14 +298,14 @@ static void dbs_check_cpu(int cpu)
298 struct cpu_dbs_info_s *j_dbs_info; 298 struct cpu_dbs_info_s *j_dbs_info;
299 299
300 j_dbs_info = &per_cpu(cpu_dbs_info, j); 300 j_dbs_info = &per_cpu(cpu_dbs_info, j);
301 j_dbs_info->prev_cpu_idle_down = 301 j_dbs_info->prev_cpu_idle_down =
302 j_dbs_info->prev_cpu_idle_up; 302 j_dbs_info->prev_cpu_idle_up;
303 } 303 }
304 /* if we are already at full speed then break out early */ 304 /* if we are already at full speed then break out early */
305 if (policy->cur == policy->max) 305 if (policy->cur == policy->max)
306 return; 306 return;
307 307
308 __cpufreq_driver_target(policy, policy->max, 308 __cpufreq_driver_target(policy, policy->max,
309 CPUFREQ_RELATION_H); 309 CPUFREQ_RELATION_H);
310 return; 310 return;
311 } 311 }
@@ -347,7 +347,7 @@ static void dbs_check_cpu(int cpu)
347 * policy. To be safe, we focus 10 points under the threshold. 347 * policy. To be safe, we focus 10 points under the threshold.
348 */ 348 */
349 freq_next = ((total_ticks - idle_ticks) * 100) / total_ticks; 349 freq_next = ((total_ticks - idle_ticks) * 100) / total_ticks;
350 freq_next = (freq_next * policy->cur) / 350 freq_next = (freq_next * policy->cur) /
351 (dbs_tuners_ins.up_threshold - 10); 351 (dbs_tuners_ins.up_threshold - 10);
352 352
353 if (freq_next <= ((policy->cur * 95) / 100)) 353 if (freq_next <= ((policy->cur * 95) / 100))
@@ -355,15 +355,15 @@ static void dbs_check_cpu(int cpu)
355} 355}
356 356
357static void do_dbs_timer(void *data) 357static void do_dbs_timer(void *data)
358{ 358{
359 int i; 359 int i;
360 mutex_lock(&dbs_mutex); 360 mutex_lock(&dbs_mutex);
361 for_each_online_cpu(i) 361 for_each_online_cpu(i)
362 dbs_check_cpu(i); 362 dbs_check_cpu(i);
363 schedule_delayed_work(&dbs_work, 363 schedule_delayed_work(&dbs_work,
364 usecs_to_jiffies(dbs_tuners_ins.sampling_rate)); 364 usecs_to_jiffies(dbs_tuners_ins.sampling_rate));
365 mutex_unlock(&dbs_mutex); 365 mutex_unlock(&dbs_mutex);
366} 366}
367 367
368static inline void dbs_timer_init(void) 368static inline void dbs_timer_init(void)
369{ 369{
@@ -390,7 +390,7 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
390 390
391 switch (event) { 391 switch (event) {
392 case CPUFREQ_GOV_START: 392 case CPUFREQ_GOV_START:
393 if ((!cpu_online(cpu)) || 393 if ((!cpu_online(cpu)) ||
394 (!policy->cur)) 394 (!policy->cur))
395 return -EINVAL; 395 return -EINVAL;
396 396
@@ -399,13 +399,13 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
399 return -EINVAL; 399 return -EINVAL;
400 if (this_dbs_info->enable) /* Already enabled */ 400 if (this_dbs_info->enable) /* Already enabled */
401 break; 401 break;
402 402
403 mutex_lock(&dbs_mutex); 403 mutex_lock(&dbs_mutex);
404 for_each_cpu_mask(j, policy->cpus) { 404 for_each_cpu_mask(j, policy->cpus) {
405 struct cpu_dbs_info_s *j_dbs_info; 405 struct cpu_dbs_info_s *j_dbs_info;
406 j_dbs_info = &per_cpu(cpu_dbs_info, j); 406 j_dbs_info = &per_cpu(cpu_dbs_info, j);
407 j_dbs_info->cur_policy = policy; 407 j_dbs_info->cur_policy = policy;
408 408
409 j_dbs_info->prev_cpu_idle_up = get_cpu_idle_time(j); 409 j_dbs_info->prev_cpu_idle_up = get_cpu_idle_time(j);
410 j_dbs_info->prev_cpu_idle_down 410 j_dbs_info->prev_cpu_idle_down
411 = j_dbs_info->prev_cpu_idle_up; 411 = j_dbs_info->prev_cpu_idle_up;
@@ -435,7 +435,7 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
435 435
436 dbs_timer_init(); 436 dbs_timer_init();
437 } 437 }
438 438
439 mutex_unlock(&dbs_mutex); 439 mutex_unlock(&dbs_mutex);
440 break; 440 break;
441 441
@@ -448,9 +448,9 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
448 * Stop the timerschedule work, when this governor 448 * Stop the timerschedule work, when this governor
449 * is used for first time 449 * is used for first time
450 */ 450 */
451 if (dbs_enable == 0) 451 if (dbs_enable == 0)
452 dbs_timer_exit(); 452 dbs_timer_exit();
453 453
454 mutex_unlock(&dbs_mutex); 454 mutex_unlock(&dbs_mutex);
455 455
456 break; 456 break;
@@ -460,11 +460,11 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
460 if (policy->max < this_dbs_info->cur_policy->cur) 460 if (policy->max < this_dbs_info->cur_policy->cur)
461 __cpufreq_driver_target( 461 __cpufreq_driver_target(
462 this_dbs_info->cur_policy, 462 this_dbs_info->cur_policy,
463 policy->max, CPUFREQ_RELATION_H); 463 policy->max, CPUFREQ_RELATION_H);
464 else if (policy->min > this_dbs_info->cur_policy->cur) 464 else if (policy->min > this_dbs_info->cur_policy->cur)
465 __cpufreq_driver_target( 465 __cpufreq_driver_target(
466 this_dbs_info->cur_policy, 466 this_dbs_info->cur_policy,
467 policy->min, CPUFREQ_RELATION_L); 467 policy->min, CPUFREQ_RELATION_L);
468 mutex_unlock(&dbs_mutex); 468 mutex_unlock(&dbs_mutex);
469 break; 469 break;
470 } 470 }
diff --git a/drivers/cpufreq/cpufreq_performance.c b/drivers/cpufreq/cpufreq_performance.c
index 8d536b40deb8..de91e3371ef8 100644
--- a/drivers/cpufreq/cpufreq_performance.c
+++ b/drivers/cpufreq/cpufreq_performance.c
@@ -32,7 +32,7 @@ static int cpufreq_governor_performance(struct cpufreq_policy *policy,
32 } 32 }
33 return 0; 33 return 0;
34} 34}
35 35
36struct cpufreq_governor cpufreq_gov_performance = { 36struct cpufreq_governor cpufreq_gov_performance = {
37 .name = "performance", 37 .name = "performance",
38 .governor = cpufreq_governor_performance, 38 .governor = cpufreq_governor_performance,
diff --git a/drivers/cpufreq/cpufreq_powersave.c b/drivers/cpufreq/cpufreq_powersave.c
index c85edda7feb0..0a2596044e65 100644
--- a/drivers/cpufreq/cpufreq_powersave.c
+++ b/drivers/cpufreq/cpufreq_powersave.c
@@ -31,7 +31,7 @@ static int cpufreq_governor_powersave(struct cpufreq_policy *policy,
31 } 31 }
32 return 0; 32 return 0;
33} 33}
34 34
35static struct cpufreq_governor cpufreq_gov_powersave = { 35static struct cpufreq_governor cpufreq_gov_powersave = {
36 .name = "powersave", 36 .name = "powersave",
37 .governor = cpufreq_governor_powersave, 37 .governor = cpufreq_governor_powersave,
diff --git a/drivers/cpufreq/cpufreq_stats.c b/drivers/cpufreq/cpufreq_stats.c
index 0bddb8e694d9..c25bdb7aec51 100644
--- a/drivers/cpufreq/cpufreq_stats.c
+++ b/drivers/cpufreq/cpufreq_stats.c
@@ -2,7 +2,7 @@
2 * drivers/cpufreq/cpufreq_stats.c 2 * drivers/cpufreq/cpufreq_stats.c
3 * 3 *
4 * Copyright (C) 2003-2004 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>. 4 * Copyright (C) 2003-2004 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>.
5 * (C) 2004 Zou Nan hai <nanhai.zou@intel.com>. 5 * (C) 2004 Zou Nan hai <nanhai.zou@intel.com>.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -90,7 +90,7 @@ show_time_in_state(struct cpufreq_policy *policy, char *buf)
90 return 0; 90 return 0;
91 cpufreq_stats_update(stat->cpu); 91 cpufreq_stats_update(stat->cpu);
92 for (i = 0; i < stat->state_num; i++) { 92 for (i = 0; i < stat->state_num; i++) {
93 len += sprintf(buf + len, "%u %llu\n", stat->freq_table[i], 93 len += sprintf(buf + len, "%u %llu\n", stat->freq_table[i],
94 (unsigned long long)cputime64_to_clock_t(stat->time_in_state[i])); 94 (unsigned long long)cputime64_to_clock_t(stat->time_in_state[i]));
95 } 95 }
96 return len; 96 return len;
@@ -171,7 +171,7 @@ cpufreq_stats_free_table (unsigned int cpu)
171{ 171{
172 struct cpufreq_stats *stat = cpufreq_stats_table[cpu]; 172 struct cpufreq_stats *stat = cpufreq_stats_table[cpu];
173 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); 173 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
174 if (policy && policy->cpu == cpu) 174 if (policy && policy->cpu == cpu)
175 sysfs_remove_group(&policy->kobj, &stats_attr_group); 175 sysfs_remove_group(&policy->kobj, &stats_attr_group);
176 if (stat) { 176 if (stat) {
177 kfree(stat->time_in_state); 177 kfree(stat->time_in_state);
diff --git a/drivers/cpufreq/cpufreq_userspace.c b/drivers/cpufreq/cpufreq_userspace.c
index 92a0be22a2a9..071ee4f1bbf2 100644
--- a/drivers/cpufreq/cpufreq_userspace.c
+++ b/drivers/cpufreq/cpufreq_userspace.c
@@ -41,7 +41,7 @@ static DEFINE_MUTEX (userspace_mutex);
41#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_GOVERNOR, "userspace", msg) 41#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_GOVERNOR, "userspace", msg)
42 42
43/* keep track of frequency transitions */ 43/* keep track of frequency transitions */
44static int 44static int
45userspace_cpufreq_notifier(struct notifier_block *nb, unsigned long val, 45userspace_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
46 void *data) 46 void *data)
47{ 47{
@@ -58,7 +58,7 @@ static struct notifier_block userspace_cpufreq_notifier_block = {
58}; 58};
59 59
60 60
61/** 61/**
62 * cpufreq_set - set the CPU frequency 62 * cpufreq_set - set the CPU frequency
63 * @freq: target frequency in kHz 63 * @freq: target frequency in kHz
64 * @cpu: CPU for which the frequency is to be set 64 * @cpu: CPU for which the frequency is to be set
@@ -103,8 +103,8 @@ static ssize_t show_speed (struct cpufreq_policy *policy, char *buf)
103 return sprintf (buf, "%u\n", cpu_cur_freq[policy->cpu]); 103 return sprintf (buf, "%u\n", cpu_cur_freq[policy->cpu]);
104} 104}
105 105
106static ssize_t 106static ssize_t
107store_speed (struct cpufreq_policy *policy, const char *buf, size_t count) 107store_speed (struct cpufreq_policy *policy, const char *buf, size_t count)
108{ 108{
109 unsigned int freq = 0; 109 unsigned int freq = 0;
110 unsigned int ret; 110 unsigned int ret;
@@ -118,7 +118,7 @@ store_speed (struct cpufreq_policy *policy, const char *buf, size_t count)
118 return count; 118 return count;
119} 119}
120 120
121static struct freq_attr freq_attr_scaling_setspeed = 121static struct freq_attr freq_attr_scaling_setspeed =
122{ 122{
123 .attr = { .name = "scaling_setspeed", .mode = 0644, .owner = THIS_MODULE }, 123 .attr = { .name = "scaling_setspeed", .mode = 0644, .owner = THIS_MODULE },
124 .show = show_speed, 124 .show = show_speed,
@@ -135,7 +135,7 @@ static int cpufreq_governor_userspace(struct cpufreq_policy *policy,
135 return -EINVAL; 135 return -EINVAL;
136 BUG_ON(!policy->cur); 136 BUG_ON(!policy->cur);
137 mutex_lock(&userspace_mutex); 137 mutex_lock(&userspace_mutex);
138 cpu_is_managed[cpu] = 1; 138 cpu_is_managed[cpu] = 1;
139 cpu_min_freq[cpu] = policy->min; 139 cpu_min_freq[cpu] = policy->min;
140 cpu_max_freq[cpu] = policy->max; 140 cpu_max_freq[cpu] = policy->max;
141 cpu_cur_freq[cpu] = policy->cur; 141 cpu_cur_freq[cpu] = policy->cur;
diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c
index ba460bdea60f..a4818ce88919 100644
--- a/drivers/cpufreq/freq_table.c
+++ b/drivers/cpufreq/freq_table.c
@@ -59,9 +59,8 @@ int cpufreq_frequency_table_verify(struct cpufreq_policy *policy,
59 if (!cpu_online(policy->cpu)) 59 if (!cpu_online(policy->cpu))
60 return -EINVAL; 60 return -EINVAL;
61 61
62 cpufreq_verify_within_limits(policy, 62 cpufreq_verify_within_limits(policy,
63 policy->cpuinfo.min_freq, 63 policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
64 policy->cpuinfo.max_freq);
65 64
66 for (i=0; (table[i].frequency != CPUFREQ_TABLE_END); i++) { 65 for (i=0; (table[i].frequency != CPUFREQ_TABLE_END); i++) {
67 unsigned int freq = table[i].frequency; 66 unsigned int freq = table[i].frequency;
@@ -76,9 +75,8 @@ int cpufreq_frequency_table_verify(struct cpufreq_policy *policy,
76 if (!count) 75 if (!count)
77 policy->max = next_larger; 76 policy->max = next_larger;
78 77
79 cpufreq_verify_within_limits(policy, 78 cpufreq_verify_within_limits(policy,
80 policy->cpuinfo.min_freq, 79 policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
81 policy->cpuinfo.max_freq);
82 80
83 dprintk("verification lead to (%u - %u kHz) for cpu %u\n", policy->min, policy->max, policy->cpu); 81 dprintk("verification lead to (%u - %u kHz) for cpu %u\n", policy->min, policy->max, policy->cpu);
84 82
@@ -199,7 +197,7 @@ EXPORT_SYMBOL_GPL(cpufreq_freq_attr_scaling_available_freqs);
199 * if you use these, you must assure that the frequency table is valid 197 * if you use these, you must assure that the frequency table is valid
200 * all the time between get_attr and put_attr! 198 * all the time between get_attr and put_attr!
201 */ 199 */
202void cpufreq_frequency_table_get_attr(struct cpufreq_frequency_table *table, 200void cpufreq_frequency_table_get_attr(struct cpufreq_frequency_table *table,
203 unsigned int cpu) 201 unsigned int cpu)
204{ 202{
205 dprintk("setting show_table for cpu %u to %p\n", cpu, table); 203 dprintk("setting show_table for cpu %u to %p\n", cpu, table);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-12 22:11:06 -0500