Merge branch 'next' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into merge

19 files changed, 139 insertions, 97 deletions

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 9e08d8a69fdf..e0f0a4dbe9ae 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -775,6 +775,7 @@ config LOWMEM_CAM_NUM_BOOL
           Say N here unless you know what you are doing.
 
 config LOWMEM_CAM_NUM
+        depends on FSL_BOOKE
         int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
         default 3
 
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 308fe7c29dea..c9cfd374bffb 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -57,14 +57,14 @@
                 bus-frequency = <0>;                            /* Fixed by bootwrapper */
 
                 memory-controller@2000 {
-                        compatible = "fsl,8540-memory-controller";
+                        compatible = "fsl,mpc8540-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <0x12 0x2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8540-l2-cache-controller";
+                        compatible = "fsl,mpc8540-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <0x20>;               /* 32 bytes */
                         cache-size = <0x40000>;                 /* L2, 256K */
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
index b2d61091b36d..0bb669376743 100644
--- a/arch/powerpc/boot/dts/pq2fads.dts
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -17,6 +17,14 @@
         #address-cells = <1>;
         #size-cells = <1>;
 
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
         cpus {
                 #address-cells = <1>;
                 #size-cells = <0>;
@@ -45,7 +53,7 @@
                 #size-cells = <1>;
                 reg = <0xf0010100 0x60>;
 
-                ranges = <0x0 0x0 0xfe000000 0x800000
+                ranges = <0x0 0x0 0xff800000 0x800000
                           0x1 0x0 0xf4500000 0x8000
                           0x8 0x0 0xf8200000 0x8000>;
 
@@ -71,7 +79,7 @@
                 };
         };
 
-        pci@f0010800 {
+        pci0: pci@f0010800 {
                 device_type = "pci";
                 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
                 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
@@ -142,7 +150,7 @@
                                 reg = <0x119f0 0x10 0x115f0 0x10>;
                         };
 
-                        serial@11a00 {
+                        serial0: serial@11a00 {
                                 device_type = "serial";
                                 compatible = "fsl,mpc8280-scc-uart",
                                              "fsl,cpm2-scc-uart";
@@ -153,7 +161,7 @@
                                 fsl,cpm-command = <0x800000>;
                         };
 
-                        serial@11a20 {
+                        serial1: serial@11a20 {
                                 device_type = "serial";
                                 compatible = "fsl,mpc8280-scc-uart",
                                              "fsl,cpm2-scc-uart";
@@ -164,7 +172,7 @@
                                 fsl,cpm-command = <0x4a00000>;
                         };
 
-                        ethernet@11320 {
+                        enet0: ethernet@11320 {
                                 device_type = "network";
                                 compatible = "fsl,mpc8280-fcc-enet",
                                              "fsl,cpm2-fcc-enet";
@@ -176,7 +184,7 @@
                                 fsl,cpm-command = <0x16200300>;
                         };
 
-                        ethernet@11340 {
+                        enet1: ethernet@11340 {
                                 device_type = "network";
                                 compatible = "fsl,mpc8280-fcc-enet",
                                              "fsl,cpm2-fcc-enet";
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 9c5079fec4f2..b1f1416ac998 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -156,14 +156,14 @@
                 compatible = "simple-bus";
 
                 memory-controller@2000 {
-                        compatible = "fsl,8548-memory-controller";
+                        compatible = "fsl,mpc8548-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <0x12 0x2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8548-l2-cache-controller";
+                        compatible = "fsl,mpc8548-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <0x20>;       // 32 bytes
                         cache-size = <0x80000>; // L2, 512K
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index b772405a9a0a..c4564b81e473 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -61,14 +61,14 @@
                 clock-frequency = <0>;
 
                 memory-controller@2000 {
-                        compatible = "fsl,8560-memory-controller";
+                        compatible = "fsl,mpc8560-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <0x12 0x2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8560-l2-cache-controller";
+                        compatible = "fsl,mpc8560-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <0x20>;       // 32 bytes
                         cache-size = <0x40000>;         // L2, 256K
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts
index b8d0fc6f0042..04c398862e03 100644
--- a/arch/powerpc/boot/dts/socrates.dts
+++ b/arch/powerpc/boot/dts/socrates.dts
@@ -52,6 +52,7 @@
         soc8544@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
+                device_type = "soc";
 
                 ranges = <0x00000000 0xe0000000 0x00100000>;
                 reg = <0xe0000000 0x00001000>;  // CCSRBAR 1M
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index 8b173957fb5f..ea6b15152de3 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -57,14 +57,14 @@
                 compatible = "fsl,mpc8560-immr", "simple-bus";
 
                 memory-controller@2000 {
-                        compatible = "fsl,8540-memory-controller";
+                        compatible = "fsl,mpc8540-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <18 2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8540-l2-cache-controller";
+                        compatible = "fsl,mpc8540-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <32>;
                         cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index ac9413a29f9f..231bae756637 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -59,14 +59,14 @@
                 compatible = "fsl,mpc8540-immr", "simple-bus";
 
                 memory-controller@2000 {
-                        compatible = "fsl,8540-memory-controller";
+                        compatible = "fsl,mpc8540-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <18 2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8540-l2-cache-controller";
+                        compatible = "fsl,mpc8540-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <32>;
                         cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index c71bb5dd5e5e..4356a1f08295 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -58,14 +58,14 @@
                 compatible = "fsl,mpc8541-immr", "simple-bus";
 
                 memory-controller@2000 {
-                        compatible = "fsl,8540-memory-controller";
+                        compatible = "fsl,mpc8540-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <18 2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8540-l2-cache-controller";
+                        compatible = "fsl,mpc8540-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <32>;
                         cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index a133ded6dddb..06d366ebbda3 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -58,14 +58,14 @@
                 compatible = "fsl,mpc8555-immr", "simple-bus";
 
                 memory-controller@2000 {
-                        compatible = "fsl,8540-memory-controller";
+                        compatible = "fsl,mpc8540-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <18 2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8540-l2-cache-controller";
+                        compatible = "fsl,mpc8540-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <32>;
                         cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 649e2e576267..feff915e0492 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -60,14 +60,14 @@
                 compatible = "fsl,mpc8560-immr", "simple-bus";
 
                 memory-controller@2000 {
-                        compatible = "fsl,8540-memory-controller";
+                        compatible = "fsl,mpc8540-memory-controller";
                         reg = <0x2000 0x1000>;
                         interrupt-parent = <&mpic>;
                         interrupts = <18 2>;
                 };
 
                 L2: l2-cache-controller@20000 {
-                        compatible = "fsl,8540-l2-cache-controller";
+                        compatible = "fsl,mpc8540-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <32>;
                         cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c2ccca53b991..a002682f3a6d 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -22,6 +22,14 @@
 #define MPIC_GREG_FEATURE_1             0x00010
 #define MPIC_GREG_GLOBAL_CONF_0         0x00020
 #define         MPIC_GREG_GCONF_RESET                   0x80000000
+/* On the FSL mpic implementations the Mode field is expand to be
+ * 2 bits wide:
+ *      0b00 = pass through (interrupts routed to IRQ0)
+ *      0b01 = Mixed mode
+ *      0b10 = reserved
+ *      0b11 = External proxy / coreint
+ */
+#define         MPIC_GREG_GCONF_COREINT                 0x60000000
 #define         MPIC_GREG_GCONF_8259_PTHROU_DIS         0x20000000
 #define         MPIC_GREG_GCONF_NO_BIAS                 0x10000000
 #define         MPIC_GREG_GCONF_BASE_MASK               0x000fffff
@@ -357,6 +365,8 @@ struct mpic
 #define MPIC_BROKEN_FRR_NIRQS           0x00000800
 /* Destination only supports a single CPU at a time */
 #define MPIC_SINGLE_DEST_CPU            0x00001000
+/* Enable CoreInt delivery of interrupts */
+#define MPIC_ENABLE_COREINT             0x00002000
 
 /* MPIC HW modification ID */
 #define MPIC_REGSET_MASK                0xf0000000
@@ -470,6 +480,8 @@ extern void mpic_end_irq(unsigned int irq);
 extern unsigned int mpic_get_one_irq(struct mpic *mpic);
 /* This one gets from the primary mpic */
 extern unsigned int mpic_get_irq(void);
+/* This one gets from the primary mpic via CoreInt*/
+extern unsigned int mpic_get_coreint_irq(void);
 /* Fetch Machine Check interrupt from primary mpic */
 extern unsigned int mpic_get_mcirq(void);
 
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c9ff1ec97479..e8018d540e87 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -143,6 +143,36 @@
 #define FPSCR_NI        0x00000004      /* FPU non IEEE-Mode */
 #define FPSCR_RN        0x00000003      /* FPU rounding control */
 
+/* Bit definitions for SPEFSCR. */
+#define SPEFSCR_SOVH    0x80000000      /* Summary integer overflow high */
+#define SPEFSCR_OVH     0x40000000      /* Integer overflow high */
+#define SPEFSCR_FGH     0x20000000      /* Embedded FP guard bit high */
+#define SPEFSCR_FXH     0x10000000      /* Embedded FP sticky bit high */
+#define SPEFSCR_FINVH   0x08000000      /* Embedded FP invalid operation high */
+#define SPEFSCR_FDBZH   0x04000000      /* Embedded FP div by zero high */
+#define SPEFSCR_FUNFH   0x02000000      /* Embedded FP underflow high */
+#define SPEFSCR_FOVFH   0x01000000      /* Embedded FP overflow high */
+#define SPEFSCR_FINXS   0x00200000      /* Embedded FP inexact sticky */
+#define SPEFSCR_FINVS   0x00100000      /* Embedded FP invalid op. sticky */
+#define SPEFSCR_FDBZS   0x00080000      /* Embedded FP div by zero sticky */
+#define SPEFSCR_FUNFS   0x00040000      /* Embedded FP underflow sticky */
+#define SPEFSCR_FOVFS   0x00020000      /* Embedded FP overflow sticky */
+#define SPEFSCR_MODE    0x00010000      /* Embedded FP mode */
+#define SPEFSCR_SOV     0x00008000      /* Integer summary overflow */
+#define SPEFSCR_OV      0x00004000      /* Integer overflow */
+#define SPEFSCR_FG      0x00002000      /* Embedded FP guard bit */
+#define SPEFSCR_FX      0x00001000      /* Embedded FP sticky bit */
+#define SPEFSCR_FINV    0x00000800      /* Embedded FP invalid operation */
+#define SPEFSCR_FDBZ    0x00000400      /* Embedded FP div by zero */
+#define SPEFSCR_FUNF    0x00000200      /* Embedded FP underflow */
+#define SPEFSCR_FOVF    0x00000100      /* Embedded FP overflow */
+#define SPEFSCR_FINXE   0x00000040      /* Embedded FP inexact enable */
+#define SPEFSCR_FINVE   0x00000020      /* Embedded FP invalid op. enable */
+#define SPEFSCR_FDBZE   0x00000010      /* Embedded FP div by zero enable */
+#define SPEFSCR_FUNFE   0x00000008      /* Embedded FP underflow enable */
+#define SPEFSCR_FOVFE   0x00000004      /* Embedded FP overflow enable */
+#define SPEFSCR_FRMC    0x00000003      /* Embedded FP rounding mode control */
+
 /* Special Purpose Registers (SPRNs)*/
 #define SPRN_CTR        0x009   /* Count Register */
 #define SPRN_DSCR       0x11
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index a56f4d61aa72..601ddbc46002 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -423,36 +423,6 @@
 #define SGR_NORMAL      0               /* Speculative fetching allowed. */
 #define SGR_GUARDED     1               /* Speculative fetching disallowed. */
 
-/* Bit definitions for SPEFSCR. */
-#define SPEFSCR_SOVH    0x80000000      /* Summary integer overflow high */
-#define SPEFSCR_OVH     0x40000000      /* Integer overflow high */
-#define SPEFSCR_FGH     0x20000000      /* Embedded FP guard bit high */
-#define SPEFSCR_FXH     0x10000000      /* Embedded FP sticky bit high */
-#define SPEFSCR_FINVH   0x08000000      /* Embedded FP invalid operation high */
-#define SPEFSCR_FDBZH   0x04000000      /* Embedded FP div by zero high */
-#define SPEFSCR_FUNFH   0x02000000      /* Embedded FP underflow high */
-#define SPEFSCR_FOVFH   0x01000000      /* Embedded FP overflow high */
-#define SPEFSCR_FINXS   0x00200000      /* Embedded FP inexact sticky */
-#define SPEFSCR_FINVS   0x00100000      /* Embedded FP invalid op. sticky */
-#define SPEFSCR_FDBZS   0x00080000      /* Embedded FP div by zero sticky */
-#define SPEFSCR_FUNFS   0x00040000      /* Embedded FP underflow sticky */
-#define SPEFSCR_FOVFS   0x00020000      /* Embedded FP overflow sticky */
-#define SPEFSCR_MODE    0x00010000      /* Embedded FP mode */
-#define SPEFSCR_SOV     0x00008000      /* Integer summary overflow */
-#define SPEFSCR_OV      0x00004000      /* Integer overflow */
-#define SPEFSCR_FG      0x00002000      /* Embedded FP guard bit */
-#define SPEFSCR_FX      0x00001000      /* Embedded FP sticky bit */
-#define SPEFSCR_FINV    0x00000800      /* Embedded FP invalid operation */
-#define SPEFSCR_FDBZ    0x00000400      /* Embedded FP div by zero */
-#define SPEFSCR_FUNF    0x00000200      /* Embedded FP underflow */
-#define SPEFSCR_FOVF    0x00000100      /* Embedded FP overflow */
-#define SPEFSCR_FINXE   0x00000040      /* Embedded FP inexact enable */
-#define SPEFSCR_FINVE   0x00000020      /* Embedded FP invalid op. enable */
-#define SPEFSCR_FDBZE   0x00000010      /* Embedded FP div by zero enable */
-#define SPEFSCR_FUNFE   0x00000008      /* Embedded FP underflow enable */
-#define SPEFSCR_FOVFE   0x00000004      /* Embedded FP overflow enable */
-#define SPEFSCR_FRMC    0x00000003      /* Embedded FP rounding mode control */
-
 /*
  * The IBM-403 is an even more odd special case, as it is much
  * older than the IBM-405 series.  We put these down here incase someone
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index 3d9f831c3c55..3a7a67a0d006 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -29,9 +29,9 @@
 
 /* basic word size definitions */
 #define _FP_W_TYPE_SIZE         32
-#define _FP_W_TYPE              unsigned long
-#define _FP_WS_TYPE             signed long
-#define _FP_I_TYPE              long
+#define _FP_W_TYPE              unsigned int
+#define _FP_WS_TYPE             signed int
+#define _FP_I_TYPE              int
 
 #define __ll_B                  ((UWtype) 1 << (W_TYPE_SIZE / 2))
 #define __ll_lowpart(t)         ((UWtype) (t) & (__ll_B - 1))
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 532e205303a2..21b956701596 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1170,6 +1170,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
                         mb();
         }
 
+        /* CoreInt */
+        if (flags & MPIC_ENABLE_COREINT)
+                mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
+                           mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
+                           | MPIC_GREG_GCONF_COREINT);
+
         if (flags & MPIC_ENABLE_MCK)
                 mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
                            mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
@@ -1525,6 +1531,34 @@ unsigned int mpic_get_irq(void)
         return mpic_get_one_irq(mpic);
 }
 
+unsigned int mpic_get_coreint_irq(void)
+{
+#ifdef CONFIG_BOOKE
+        struct mpic *mpic = mpic_primary;
+        u32 src;
+
+        BUG_ON(mpic == NULL);
+
+        src = mfspr(SPRN_EPR);
+
+        if (unlikely(src == mpic->spurious_vec)) {
+                if (mpic->flags & MPIC_SPV_EOI)
+                        mpic_eoi(mpic);
+                return NO_IRQ;
+        }
+        if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
+                if (printk_ratelimit())
+                        printk(KERN_WARNING "%s: Got protected source %d !\n",
+                               mpic->name, (int)src);
+                return NO_IRQ;
+        }
+
+        return irq_linear_revmap(mpic->irqhost, src);
+#else
+        return NO_IRQ;
+#endif
+}
+
 unsigned int mpic_get_mcirq(void)
 {
         struct mpic *mpic = mpic_primary;
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index 5c6ef51da274..f8df0681e160 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -1106,6 +1106,10 @@ static int cpm_uart_init_port(struct device_node *np,
         for (i = 0; i < NUM_GPIOS; i++)
                 pinfo->gpios[i] = of_get_gpio(np, i);
 
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+        udbg_putc = NULL;
+#endif
+
         return cpm_uart_request_port(&pinfo->port);
 
 out_pram:
@@ -1255,10 +1259,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
                         baud = 9600;
         }
 
-#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
-        udbg_putc = NULL;
-#endif
-
         if (IS_SMC(pinfo)) {
                 out_be16(&pinfo->smcup->smc_brkcr, 0);
                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
@@ -1339,13 +1339,13 @@ static int __devinit cpm_uart_probe(struct of_device *ofdev,
 
         dev_set_drvdata(&ofdev->dev, pinfo);
 
+        /* initialize the device pointer for the port */
+        pinfo->port.dev = &ofdev->dev;
+
         ret = cpm_uart_init_port(ofdev->node, pinfo);
         if (ret)
                 return ret;
 
-        /* initialize the device pointer for the port */
-        pinfo->port.dev = &ofdev->dev;
-
         return uart_add_one_port(&cpm_reg, &pinfo->port);
 }
 
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index fb51197d1c98..f153c581cbd7 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -1352,14 +1352,15 @@ static int fsl_diu_resume(struct of_device *ofdev)
 #endif                          /* CONFIG_PM */
 
 /* Align to 64-bit(8-byte), 32-byte, etc. */
-static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
+static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
+                        u32 bytes_align)
 {
         u32 offset, ssize;
         u32 mask;
         dma_addr_t paddr = 0;
 
         ssize = size + bytes_align;
-        buf->vaddr = dma_alloc_coherent(NULL, ssize, &paddr, GFP_DMA |
+        buf->vaddr = dma_alloc_coherent(dev, ssize, &paddr, GFP_DMA |
                                                              __GFP_ZERO);
         if (!buf->vaddr)
                 return -ENOMEM;
@@ -1376,9 +1377,10 @@ static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
         return 0;
 }
 
-static void free_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
+static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
+                     u32 bytes_align)
 {
-        dma_free_coherent(NULL, size + bytes_align,
+        dma_free_coherent(dev, size + bytes_align,
                                 buf->vaddr, (buf->paddr - buf->offset));
         return;
 }
@@ -1476,17 +1478,19 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev,
         machine_data->monitor_port = monitor_port;
 
         /* Area descriptor memory pool aligns to 64-bit boundary */
-        if (allocate_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
+        if (allocate_buf(&ofdev->dev, &pool.ad,
+                         sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
                 return -ENOMEM;
 
         /* Get memory for Gamma Table  - 32-byte aligned memory */
-        if (allocate_buf(&pool.gamma, 768, 32)) {
+        if (allocate_buf(&ofdev->dev, &pool.gamma, 768, 32)) {
                 ret = -ENOMEM;
                 goto error;
         }
 
         /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
-        if (allocate_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32)) {
+        if (allocate_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
+                         32)) {
                 ret = -ENOMEM;
                 goto error;
         }
@@ -1554,11 +1558,13 @@ error:
                 i > 0; i--)
                 uninstall_fb(machine_data->fsl_diu_info[i - 1]);
         if (pool.ad.vaddr)
-                free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
+                free_buf(&ofdev->dev, &pool.ad,
+                         sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
         if (pool.gamma.vaddr)
-                free_buf(&pool.gamma, 768, 32);
+                free_buf(&ofdev->dev, &pool.gamma, 768, 32);
         if (pool.cursor.vaddr)
-                free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
+                free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
+                         32);
         if (machine_data->dummy_aoi_virt)
                 fsl_diu_free(machine_data->dummy_aoi_virt, 64);
         iounmap(dr.diu_reg);
@@ -1584,11 +1590,13 @@ static int fsl_diu_remove(struct of_device *ofdev)
         for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
                 uninstall_fb(machine_data->fsl_diu_info[i - 1]);
         if (pool.ad.vaddr)
-                free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
+                free_buf(&ofdev->dev, &pool.ad,
+                         sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
         if (pool.gamma.vaddr)
-                free_buf(&pool.gamma, 768, 32);
+                free_buf(&ofdev->dev, &pool.gamma, 768, 32);
         if (pool.cursor.vaddr)
-                free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
+                free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
+                         32);
         if (machine_data->dummy_aoi_virt)
                 fsl_diu_free(machine_data->dummy_aoi_virt, 64);
         iounmap(dr.diu_reg);
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 7ef1caf50269..f2a78b5e8b55 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -18,7 +18,6 @@
 #define _FSL_DEVICE_H_
 
 #include <linux/types.h>
-#include <linux/phy.h>
 
 /*
  * Some conventions on how we handle peripherals on Freescale chips
@@ -44,27 +43,6 @@
  *
  */
 
-struct gianfar_platform_data {
-        /* device specific information */
-        u32     device_flags;
-        char    bus_id[BUS_ID_SIZE];
-        phy_interface_t interface;
-};
-
-struct gianfar_mdio_data {
-        /* board specific information */
-        int     irq[32];
-};
-
-/* Flags in gianfar_platform_data */
-#define FSL_GIANFAR_BRD_HAS_PHY_INTR    0x00000001 /* set or use a timer */
-#define FSL_GIANFAR_BRD_IS_REDUCED      0x00000002 /* Set if RGMII, RMII */
-
-struct fsl_i2c_platform_data {
-        /* device specific information */
-        u32     device_flags;
-};
-
 /* Flags related to I2C device features */
 #define FSL_I2C_DEV_SEPARATE_DFSRR      0x00000001
 #define FSL_I2C_DEV_CLOCK_5200          0x00000002