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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-08-11 13:04:43 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2010-08-18 15:57:21 -0400
commit37c6c9b0e941fbb7f37a93d36abaf5fcafea87a8 (patch)
treee79d565e39575a526cb6714ce1287e8a1fb203f7
parentce17178094f368d9e3f39b2cb4303da5ed633dd4 (diff)
drm/i915: add panel reset workaround
Ironlake requires that we clear the reset panel bit during power sequences and restore it afterwards. Uncondtionally add code to do that since it should be harmless on SNB+. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c6629bd9430f..d1b4ece4df00 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -765,6 +765,12 @@ static void ironlake_edp_panel_on (struct drm_device *dev)
765 return; 765 return;
766 766
767 pp = I915_READ(PCH_PP_CONTROL); 767 pp = I915_READ(PCH_PP_CONTROL);
768
769 /* ILK workaround: disable reset around power sequence */
770 pp &= ~PANEL_POWER_RESET;
771 I915_WRITE(PCH_PP_CONTROL, pp);
772 POSTING_READ(PCH_PP_CONTROL);
773
768 pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON; 774 pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON;
769 I915_WRITE(PCH_PP_CONTROL, pp); 775 I915_WRITE(PCH_PP_CONTROL, pp);
770 776
@@ -773,7 +779,9 @@ static void ironlake_edp_panel_on (struct drm_device *dev)
773 I915_READ(PCH_PP_STATUS)); 779 I915_READ(PCH_PP_STATUS));
774 780
775 pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD); 781 pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
782 pp |= PANEL_POWER_RESET; /* restore panel reset bit */
776 I915_WRITE(PCH_PP_CONTROL, pp); 783 I915_WRITE(PCH_PP_CONTROL, pp);
784 POSTING_READ(PCH_PP_CONTROL);
777} 785}
778 786
779static void ironlake_edp_panel_off (struct drm_device *dev) 787static void ironlake_edp_panel_off (struct drm_device *dev)
@@ -782,6 +790,12 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
782 u32 pp; 790 u32 pp;
783 791
784 pp = I915_READ(PCH_PP_CONTROL); 792 pp = I915_READ(PCH_PP_CONTROL);
793
794 /* ILK workaround: disable reset around power sequence */
795 pp &= ~PANEL_POWER_RESET;
796 I915_WRITE(PCH_PP_CONTROL, pp);
797 POSTING_READ(PCH_PP_CONTROL);
798
785 pp &= ~POWER_TARGET_ON; 799 pp &= ~POWER_TARGET_ON;
786 I915_WRITE(PCH_PP_CONTROL, pp); 800 I915_WRITE(PCH_PP_CONTROL, pp);
787 801
@@ -790,8 +804,9 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
790 I915_READ(PCH_PP_STATUS)); 804 I915_READ(PCH_PP_STATUS));
791 805
792 /* Make sure VDD is enabled so DP AUX will work */ 806 /* Make sure VDD is enabled so DP AUX will work */
793 pp |= EDP_FORCE_VDD; 807 pp |= EDP_FORCE_VDD | PANEL_POWER_RESET; /* restore panel reset bit */
794 I915_WRITE(PCH_PP_CONTROL, pp); 808 I915_WRITE(PCH_PP_CONTROL, pp);
809 POSTING_READ(PCH_PP_CONTROL);
795} 810}
796 811
797static void ironlake_edp_backlight_on (struct drm_device *dev) 812static void ironlake_edp_backlight_on (struct drm_device *dev)