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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2010-04-15 00:23:17 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2010-05-11 15:01:40 -0400
commitcaa5afbd4831c649b951ae1227a7985f47547e31 (patch)
tree5000986023ae83933a94795ab1bc22519f9d4e80
parentf6d3780061283039de33b402c35c3bf9322afe14 (diff)
PCI: aerdrv: trivial cleanup for aerdrv_core.c
Style cleanup for pci_{en,dis}able_pcie_error_reporting(). Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index ce42cac99dd3..df2d686fe3dd 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -47,13 +47,12 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev)
47 if (!pos) 47 if (!pos)
48 return -EIO; 48 return -EIO;
49 49
50 pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16); 50 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
51 reg16 = reg16 | 51 reg16 |= (PCI_EXP_DEVCTL_CERE |
52 PCI_EXP_DEVCTL_CERE |
53 PCI_EXP_DEVCTL_NFERE | 52 PCI_EXP_DEVCTL_NFERE |
54 PCI_EXP_DEVCTL_FERE | 53 PCI_EXP_DEVCTL_FERE |
55 PCI_EXP_DEVCTL_URRE; 54 PCI_EXP_DEVCTL_URRE);
56 pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, reg16); 55 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
57 56
58 return 0; 57 return 0;
59} 58}
@@ -71,12 +70,12 @@ int pci_disable_pcie_error_reporting(struct pci_dev *dev)
71 if (!pos) 70 if (!pos)
72 return -EIO; 71 return -EIO;
73 72
74 pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16); 73 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
75 reg16 = reg16 & ~(PCI_EXP_DEVCTL_CERE | 74 reg16 &= ~(PCI_EXP_DEVCTL_CERE |
76 PCI_EXP_DEVCTL_NFERE | 75 PCI_EXP_DEVCTL_NFERE |
77 PCI_EXP_DEVCTL_FERE | 76 PCI_EXP_DEVCTL_FERE |
78 PCI_EXP_DEVCTL_URRE); 77 PCI_EXP_DEVCTL_URRE);
79 pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, reg16); 78 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
80 79
81 return 0; 80 return 0;
82} 81}