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authorChris Wilson <chris@chris-wilson.co.uk>2011-03-06 04:03:16 -0500
committerChris Wilson <chris@chris-wilson.co.uk>2011-03-06 04:07:45 -0500
commit0ee537abbd10a9abf11e1c22ee32a68e8c12ed4a (patch)
tree73fb0ea5902c08947ed2f7eb5e6a7adb4d54f516
parent6927faf30920b8c03dfa007e732642a1f1f20089 (diff)
Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"
This reverts commit c2e0eb167070a6e9dcb49c84c13c79a30d672431. As it turns out, userspace already depends upon being able to enable tiling on existing bo which it promises to be large enough for its purposes i.e. it will not access beyond the end of the last full-tile row. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35016 Reported-and-tested-by: Kamal Mostafa <kamal@canonical.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c16
1 files changed, 1 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 79a04fde69b5..22a32b9932c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -184,7 +184,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
184static bool 184static bool
185i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) 185i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
186{ 186{
187 int tile_width, tile_height; 187 int tile_width;
188 188
189 /* Linear is always fine */ 189 /* Linear is always fine */
190 if (tiling_mode == I915_TILING_NONE) 190 if (tiling_mode == I915_TILING_NONE)
@@ -215,20 +215,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
215 } 215 }
216 } 216 }
217 217
218 if (IS_GEN2(dev) ||
219 (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
220 tile_height = 32;
221 else
222 tile_height = 8;
223 /* i8xx is strange: It has 2 interleaved rows of tiles, so needs an even
224 * number of tile rows. */
225 if (IS_GEN2(dev))
226 tile_height *= 2;
227
228 /* Size needs to be aligned to a full tile row */
229 if (size & (tile_height * stride - 1))
230 return false;
231
232 /* 965+ just needs multiples of tile width */ 218 /* 965+ just needs multiples of tile width */
233 if (INTEL_INFO(dev)->gen >= 4) { 219 if (INTEL_INFO(dev)->gen >= 4) {
234 if (stride & (tile_width - 1)) 220 if (stride & (tile_width - 1))