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authorPaulius Zaleckas <paulius.zaleckas@teltonika.lt>2008-09-09 04:19:43 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2008-09-09 06:13:55 -0400
commitb72f92ff551d9151c146c8d0f1c5c743611df982 (patch)
tree26182bb9f13e2d621690a5d22d0300896faed613
parent8b69ac577e644e5084a9d7a93e4ccd5184c77626 (diff)
i.MX: Add FIQ support
Drivers which are going to use it will have to select it and use imx_set_irq_fiq() to set FIQ mode for this interrupt. Changes since V1: - removed '#ifdef CONFIG_FIQ' from irqs.h - renamed imx_set_irq_type() to imx_set_irq_fiq() - made irqt unsigned - fixed irq number check Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/mach-imx/include/mach/irqs.h5
-rw-r--r--arch/arm/mach-imx/irq.c32
2 files changed, 33 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/include/mach/irqs.h b/arch/arm/mach-imx/include/mach/irqs.h
index eb8d5bd05d56..67812c5ac1f9 100644
--- a/arch/arm/mach-imx/include/mach/irqs.h
+++ b/arch/arm/mach-imx/include/mach/irqs.h
@@ -111,6 +111,11 @@
111/* decode irq number to use with IMR(x), ISR(x) and friends */ 111/* decode irq number to use with IMR(x), ISR(x) and friends */
112#define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5) 112#define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5)
113 113
114/* all normal IRQs can be FIQs */
115#define FIQ_START 0
116/* switch betwean IRQ and FIQ */
117extern int imx_set_irq_fiq(unsigned int irq, unsigned int type);
118
114#define NR_IRQS (IRQ_GPIOD(32) + 1) 119#define NR_IRQS (IRQ_GPIOD(32) + 1)
115#define IRQ_GPIO(x) 120#define IRQ_GPIO(x)
116#endif 121#endif
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c
index 798f221eb3b7..2bb829e721cd 100644
--- a/arch/arm/mach-imx/irq.c
+++ b/arch/arm/mach-imx/irq.c
@@ -36,10 +36,7 @@
36/* 36/*
37 * 37 *
38 * We simply use the ENABLE DISABLE registers inside of the IMX 38 * We simply use the ENABLE DISABLE registers inside of the IMX
39 * to turn on/off specific interrupts. FIXME- We should 39 * to turn on/off specific interrupts.
40 * also add support for the accelerated interrupt controller
41 * by putting offets to irq jump code in the appropriate
42 * places.
43 * 40 *
44 */ 41 */
45 42
@@ -102,6 +99,28 @@ imx_unmask_irq(unsigned int irq)
102 __raw_writel(irq, IMX_AITC_INTENNUM); 99 __raw_writel(irq, IMX_AITC_INTENNUM);
103} 100}
104 101
102#ifdef CONFIG_FIQ
103int imx_set_irq_fiq(unsigned int irq, unsigned int type)
104{
105 unsigned int irqt;
106
107 if (irq >= IMX_IRQS)
108 return -EINVAL;
109
110 if (irq < IMX_IRQS / 2) {
111 irqt = __raw_readl(IMX_AITC_INTTYPEL) & ~(1 << irq);
112 __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEL);
113 } else {
114 irq -= IMX_IRQS / 2;
115 irqt = __raw_readl(IMX_AITC_INTTYPEH) & ~(1 << irq);
116 __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEH);
117 }
118
119 return 0;
120}
121EXPORT_SYMBOL(imx_set_irq_fiq);
122#endif /* CONFIG_FIQ */
123
105static int 124static int
106imx_gpio_irq_type(unsigned int _irq, unsigned int type) 125imx_gpio_irq_type(unsigned int _irq, unsigned int type)
107{ 126{
@@ -286,4 +305,9 @@ imx_init_irq(void)
286 305
287 /* Release masking of interrupts according to priority */ 306 /* Release masking of interrupts according to priority */
288 __raw_writel(-1, IMX_AITC_NIMASK); 307 __raw_writel(-1, IMX_AITC_NIMASK);
308
309#ifdef CONFIG_FIQ
310 /* Initialize FIQ */
311 init_FIQ();
312#endif
289} 313}