openrisc: fix up vmalloc page table loading

vmalloc'ed pages are faulted into a process' page tables on demand.  In
order to facilitate this, do_page_fault needs to know whether it was
called via a page fault exception or a TLB-miss exception.

This patch adds a wrapper around the _x_page_fault_handler entry points
that the TLB-miss exceptions can call into in order to have the relevant
parameter set to satisfy do_page_fault.

This fixes a bug and is "good enough" for now.  That said, this whole
handling of vmalloc needs to be audited for correctness at some point.

Signed-off-by: Jonas Bonn <jonas@southpole.se>

2 files changed, 14 insertions, 6 deletions

diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index 5e5b30601bbf..3de971224cfc 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -201,12 +201,17 @@ EXCEPTION_ENTRY(_bus_fault_handler)
          l.nop
 
 /* ---[ 0x300: Data Page Fault exception ]------------------------------- */
+EXCEPTION_ENTRY(_dtlb_miss_page_fault_handler)
+        l.and   r5,r5,r0
+        l.j     1f
+         l.nop
 
 EXCEPTION_ENTRY(_data_page_fault_handler)
         /* set up parameters for do_page_fault */
+        l.ori   r5,r0,0x300                // exception vector
+1:
         l.addi  r3,r1,0                    // pt_regs
         /* r4 set be EXCEPTION_HANDLE */   // effective address of fault
-        l.ori   r5,r0,0x300                // exception vector
 
         /*
          * __PHX__: TODO
@@ -276,12 +281,17 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
         l.nop
 
 /* ---[ 0x400: Insn Page Fault exception ]------------------------------- */
+EXCEPTION_ENTRY(_itlb_miss_page_fault_handler)
+        l.and   r5,r5,r0
+        l.j     1f
+         l.nop
 
 EXCEPTION_ENTRY(_insn_page_fault_handler)
         /* set up parameters for do_page_fault */
+        l.ori   r5,r0,0x400                // exception vector
+1:
         l.addi  r3,r1,0                    // pt_regs
         /* r4 set be EXCEPTION_HANDLE */   // effective address of fault
-        l.ori   r5,r0,0x400                // exception vector
         l.ori   r6,r0,0x0                  // !write access
 
         /* call fault.c handler in or32/mm/fault.c */
diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S
index 46aa940ebd20..b357e7f79aca 100644
--- a/arch/openrisc/kernel/head.S
+++ b/arch/openrisc/kernel/head.S
@@ -1069,8 +1069,7 @@ d_pte_not_present:
         EXCEPTION_LOAD_GPR4
         EXCEPTION_LOAD_GPR5
         EXCEPTION_LOAD_GPR6
-        l.j     _dispatch_do_dpage_fault
-        l.nop
+        EXCEPTION_HANDLE(_dtlb_miss_page_fault_handler)
 
 /* ==============================================[ ITLB miss handler ]=== */
 ENTRY(itlb_miss_handler)
@@ -1192,8 +1191,7 @@ i_pte_not_present:
         EXCEPTION_LOAD_GPR4
         EXCEPTION_LOAD_GPR5
         EXCEPTION_LOAD_GPR6
-        l.j     _dispatch_do_ipage_fault
-        l.nop
+        EXCEPTION_HANDLE(_itlb_miss_page_fault_handler)
 
 /* ==============================================[ boot tlb handlers ]=== */