diff options
author | Tony Lindgren <tony@atomide.com> | 2012-06-25 10:32:51 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-06-25 10:32:51 -0400 |
commit | 5f7b9004297257e69212de89881979919d8e1adc (patch) | |
tree | 6ea69323448d359740501e6e09c2f2c0ea1e4d2b | |
parent | 6b16351acbd415e66ba16bf7d473ece1574cf0bc (diff) | |
parent | c354a86484b61e32100eb94c1f3f0aa512958cee (diff) |
Merge tag 'omap-devel-b-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-driver
Convert the OMAP HDQ1W driver to use runtime PM. Make it available on
all OMAP2+ chips that appear to have it integrated. Fix a problem
preventing it from being used on OMAP4.
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 38 | ||||
-rw-r--r-- | arch/arm/mach-omap2/hdq1w.c | 26 | ||||
-rw-r--r-- | drivers/w1/masters/Kconfig | 2 | ||||
-rw-r--r-- | drivers/w1/masters/omap_hdq.c | 86 |
4 files changed, 44 insertions, 108 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 7b4b9327e543..8cab358603ac 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -672,43 +672,6 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) | |||
672 | 672 | ||
673 | #endif | 673 | #endif |
674 | 674 | ||
675 | /*-------------------------------------------------------------------------*/ | ||
676 | |||
677 | #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) | ||
678 | #define OMAP_HDQ_BASE 0x480B2000 | ||
679 | static struct resource omap_hdq_resources[] = { | ||
680 | { | ||
681 | .start = OMAP_HDQ_BASE, | ||
682 | .end = OMAP_HDQ_BASE + 0x1C, | ||
683 | .flags = IORESOURCE_MEM, | ||
684 | }, | ||
685 | { | ||
686 | .start = INT_24XX_HDQ_IRQ, | ||
687 | .flags = IORESOURCE_IRQ, | ||
688 | }, | ||
689 | }; | ||
690 | static struct platform_device omap_hdq_dev = { | ||
691 | .name = "omap_hdq", | ||
692 | .id = 0, | ||
693 | .dev = { | ||
694 | .platform_data = NULL, | ||
695 | }, | ||
696 | .num_resources = ARRAY_SIZE(omap_hdq_resources), | ||
697 | .resource = omap_hdq_resources, | ||
698 | }; | ||
699 | static inline void omap_hdq_init(void) | ||
700 | { | ||
701 | if (cpu_is_omap2420()) | ||
702 | return; | ||
703 | |||
704 | platform_device_register(&omap_hdq_dev); | ||
705 | } | ||
706 | #else | ||
707 | static inline void omap_hdq_init(void) {} | ||
708 | #endif | ||
709 | |||
710 | /*---------------------------------------------------------------------------*/ | ||
711 | |||
712 | #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \ | 675 | #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \ |
713 | defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE) | 676 | defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE) |
714 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) | 677 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) |
@@ -753,7 +716,6 @@ static int __init omap2_init_devices(void) | |||
753 | omap_init_mcspi(); | 716 | omap_init_mcspi(); |
754 | } | 717 | } |
755 | omap_init_pmu(); | 718 | omap_init_pmu(); |
756 | omap_hdq_init(); | ||
757 | omap_init_sti(); | 719 | omap_init_sti(); |
758 | omap_init_sham(); | 720 | omap_init_sham(); |
759 | omap_init_aes(); | 721 | omap_init_aes(); |
diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c index 297ebe03f09c..cdd6dda03828 100644 --- a/arch/arm/mach-omap2/hdq1w.c +++ b/arch/arm/mach-omap2/hdq1w.c | |||
@@ -22,7 +22,13 @@ | |||
22 | * 02110-1301 USA | 22 | * 02110-1301 USA |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/err.h> | ||
28 | #include <linux/platform_device.h> | ||
29 | |||
25 | #include <plat/omap_hwmod.h> | 30 | #include <plat/omap_hwmod.h> |
31 | #include <plat/omap_device.h> | ||
26 | #include <plat/hdq1w.h> | 32 | #include <plat/hdq1w.h> |
27 | 33 | ||
28 | #include "common.h" | 34 | #include "common.h" |
@@ -70,3 +76,23 @@ int omap_hdq1w_reset(struct omap_hwmod *oh) | |||
70 | 76 | ||
71 | return 0; | 77 | return 0; |
72 | } | 78 | } |
79 | |||
80 | static int __init omap_init_hdq(void) | ||
81 | { | ||
82 | int id = -1; | ||
83 | struct platform_device *pdev; | ||
84 | struct omap_hwmod *oh; | ||
85 | char *oh_name = "hdq1w"; | ||
86 | char *devname = "omap_hdq"; | ||
87 | |||
88 | oh = omap_hwmod_lookup(oh_name); | ||
89 | if (!oh) | ||
90 | return 0; | ||
91 | |||
92 | pdev = omap_device_build(devname, id, oh, NULL, 0, NULL, 0, 0); | ||
93 | WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", | ||
94 | devname, oh->name); | ||
95 | |||
96 | return 0; | ||
97 | } | ||
98 | arch_initcall(omap_init_hdq); | ||
diff --git a/drivers/w1/masters/Kconfig b/drivers/w1/masters/Kconfig index 979d6eed9a0f..5ceb1cd50195 100644 --- a/drivers/w1/masters/Kconfig +++ b/drivers/w1/masters/Kconfig | |||
@@ -60,7 +60,7 @@ config W1_MASTER_GPIO | |||
60 | 60 | ||
61 | config HDQ_MASTER_OMAP | 61 | config HDQ_MASTER_OMAP |
62 | tristate "OMAP HDQ driver" | 62 | tristate "OMAP HDQ driver" |
63 | depends on SOC_OMAP2430 || ARCH_OMAP3 | 63 | depends on ARCH_OMAP2PLUS |
64 | help | 64 | help |
65 | Say Y here if you want support for the 1-wire or HDQ Interface | 65 | Say Y here if you want support for the 1-wire or HDQ Interface |
66 | on an OMAP processor. | 66 | on an OMAP processor. |
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c index 5ef385bfed18..291897c881be 100644 --- a/drivers/w1/masters/omap_hdq.c +++ b/drivers/w1/masters/omap_hdq.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/w1/masters/omap_hdq.c | 2 | * drivers/w1/masters/omap_hdq.c |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Texas Instruments, Inc. | 4 | * Copyright (C) 2007,2012 Texas Instruments, Inc. |
5 | * | 5 | * |
6 | * This file is licensed under the terms of the GNU General Public License | 6 | * This file is licensed under the terms of the GNU General Public License |
7 | * version 2. This program is licensed "as is" without any warranty of any | 7 | * version 2. This program is licensed "as is" without any warranty of any |
@@ -14,9 +14,9 @@ | |||
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/slab.h> | 15 | #include <linux/slab.h> |
16 | #include <linux/err.h> | 16 | #include <linux/err.h> |
17 | #include <linux/clk.h> | ||
18 | #include <linux/io.h> | 17 | #include <linux/io.h> |
19 | #include <linux/sched.h> | 18 | #include <linux/sched.h> |
19 | #include <linux/pm_runtime.h> | ||
20 | 20 | ||
21 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
22 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
@@ -61,8 +61,6 @@ struct hdq_data { | |||
61 | /* lock status update */ | 61 | /* lock status update */ |
62 | struct mutex hdq_mutex; | 62 | struct mutex hdq_mutex; |
63 | int hdq_usecount; | 63 | int hdq_usecount; |
64 | struct clk *hdq_ick; | ||
65 | struct clk *hdq_fck; | ||
66 | u8 hdq_irqstatus; | 64 | u8 hdq_irqstatus; |
67 | /* device lock */ | 65 | /* device lock */ |
68 | spinlock_t hdq_spinlock; | 66 | spinlock_t hdq_spinlock; |
@@ -102,20 +100,20 @@ static struct w1_bus_master omap_w1_master = { | |||
102 | /* HDQ register I/O routines */ | 100 | /* HDQ register I/O routines */ |
103 | static inline u8 hdq_reg_in(struct hdq_data *hdq_data, u32 offset) | 101 | static inline u8 hdq_reg_in(struct hdq_data *hdq_data, u32 offset) |
104 | { | 102 | { |
105 | return __raw_readb(hdq_data->hdq_base + offset); | 103 | return __raw_readl(hdq_data->hdq_base + offset); |
106 | } | 104 | } |
107 | 105 | ||
108 | static inline void hdq_reg_out(struct hdq_data *hdq_data, u32 offset, u8 val) | 106 | static inline void hdq_reg_out(struct hdq_data *hdq_data, u32 offset, u8 val) |
109 | { | 107 | { |
110 | __raw_writeb(val, hdq_data->hdq_base + offset); | 108 | __raw_writel(val, hdq_data->hdq_base + offset); |
111 | } | 109 | } |
112 | 110 | ||
113 | static inline u8 hdq_reg_merge(struct hdq_data *hdq_data, u32 offset, | 111 | static inline u8 hdq_reg_merge(struct hdq_data *hdq_data, u32 offset, |
114 | u8 val, u8 mask) | 112 | u8 val, u8 mask) |
115 | { | 113 | { |
116 | u8 new_val = (__raw_readb(hdq_data->hdq_base + offset) & ~mask) | 114 | u8 new_val = (__raw_readl(hdq_data->hdq_base + offset) & ~mask) |
117 | | (val & mask); | 115 | | (val & mask); |
118 | __raw_writeb(new_val, hdq_data->hdq_base + offset); | 116 | __raw_writel(new_val, hdq_data->hdq_base + offset); |
119 | 117 | ||
120 | return new_val; | 118 | return new_val; |
121 | } | 119 | } |
@@ -419,17 +417,8 @@ static int omap_hdq_get(struct hdq_data *hdq_data) | |||
419 | hdq_data->hdq_usecount++; | 417 | hdq_data->hdq_usecount++; |
420 | try_module_get(THIS_MODULE); | 418 | try_module_get(THIS_MODULE); |
421 | if (1 == hdq_data->hdq_usecount) { | 419 | if (1 == hdq_data->hdq_usecount) { |
422 | if (clk_enable(hdq_data->hdq_ick)) { | 420 | |
423 | dev_dbg(hdq_data->dev, "Can not enable ick\n"); | 421 | pm_runtime_get_sync(hdq_data->dev); |
424 | ret = -ENODEV; | ||
425 | goto clk_err; | ||
426 | } | ||
427 | if (clk_enable(hdq_data->hdq_fck)) { | ||
428 | dev_dbg(hdq_data->dev, "Can not enable fck\n"); | ||
429 | clk_disable(hdq_data->hdq_ick); | ||
430 | ret = -ENODEV; | ||
431 | goto clk_err; | ||
432 | } | ||
433 | 422 | ||
434 | /* make sure HDQ is out of reset */ | 423 | /* make sure HDQ is out of reset */ |
435 | if (!(hdq_reg_in(hdq_data, OMAP_HDQ_SYSSTATUS) & | 424 | if (!(hdq_reg_in(hdq_data, OMAP_HDQ_SYSSTATUS) & |
@@ -450,9 +439,6 @@ static int omap_hdq_get(struct hdq_data *hdq_data) | |||
450 | } | 439 | } |
451 | } | 440 | } |
452 | 441 | ||
453 | clk_err: | ||
454 | clk_put(hdq_data->hdq_ick); | ||
455 | clk_put(hdq_data->hdq_fck); | ||
456 | out: | 442 | out: |
457 | mutex_unlock(&hdq_data->hdq_mutex); | 443 | mutex_unlock(&hdq_data->hdq_mutex); |
458 | rtn: | 444 | rtn: |
@@ -475,10 +461,8 @@ static int omap_hdq_put(struct hdq_data *hdq_data) | |||
475 | } else { | 461 | } else { |
476 | hdq_data->hdq_usecount--; | 462 | hdq_data->hdq_usecount--; |
477 | module_put(THIS_MODULE); | 463 | module_put(THIS_MODULE); |
478 | if (0 == hdq_data->hdq_usecount) { | 464 | if (0 == hdq_data->hdq_usecount) |
479 | clk_disable(hdq_data->hdq_ick); | 465 | pm_runtime_put_sync(hdq_data->dev); |
480 | clk_disable(hdq_data->hdq_fck); | ||
481 | } | ||
482 | } | 466 | } |
483 | mutex_unlock(&hdq_data->hdq_mutex); | 467 | mutex_unlock(&hdq_data->hdq_mutex); |
484 | 468 | ||
@@ -591,35 +575,11 @@ static int __devinit omap_hdq_probe(struct platform_device *pdev) | |||
591 | goto err_ioremap; | 575 | goto err_ioremap; |
592 | } | 576 | } |
593 | 577 | ||
594 | /* get interface & functional clock objects */ | ||
595 | hdq_data->hdq_ick = clk_get(&pdev->dev, "ick"); | ||
596 | if (IS_ERR(hdq_data->hdq_ick)) { | ||
597 | dev_dbg(&pdev->dev, "Can't get HDQ ick clock object\n"); | ||
598 | ret = PTR_ERR(hdq_data->hdq_ick); | ||
599 | goto err_ick; | ||
600 | } | ||
601 | |||
602 | hdq_data->hdq_fck = clk_get(&pdev->dev, "fck"); | ||
603 | if (IS_ERR(hdq_data->hdq_fck)) { | ||
604 | dev_dbg(&pdev->dev, "Can't get HDQ fck clock object\n"); | ||
605 | ret = PTR_ERR(hdq_data->hdq_fck); | ||
606 | goto err_fck; | ||
607 | } | ||
608 | |||
609 | hdq_data->hdq_usecount = 0; | 578 | hdq_data->hdq_usecount = 0; |
610 | mutex_init(&hdq_data->hdq_mutex); | 579 | mutex_init(&hdq_data->hdq_mutex); |
611 | 580 | ||
612 | if (clk_enable(hdq_data->hdq_ick)) { | 581 | pm_runtime_enable(&pdev->dev); |
613 | dev_dbg(&pdev->dev, "Can not enable ick\n"); | 582 | pm_runtime_get_sync(&pdev->dev); |
614 | ret = -ENODEV; | ||
615 | goto err_intfclk; | ||
616 | } | ||
617 | |||
618 | if (clk_enable(hdq_data->hdq_fck)) { | ||
619 | dev_dbg(&pdev->dev, "Can not enable fck\n"); | ||
620 | ret = -ENODEV; | ||
621 | goto err_fnclk; | ||
622 | } | ||
623 | 583 | ||
624 | rev = hdq_reg_in(hdq_data, OMAP_HDQ_REVISION); | 584 | rev = hdq_reg_in(hdq_data, OMAP_HDQ_REVISION); |
625 | dev_info(&pdev->dev, "OMAP HDQ Hardware Rev %c.%c. Driver in %s mode\n", | 585 | dev_info(&pdev->dev, "OMAP HDQ Hardware Rev %c.%c. Driver in %s mode\n", |
@@ -641,9 +601,7 @@ static int __devinit omap_hdq_probe(struct platform_device *pdev) | |||
641 | 601 | ||
642 | omap_hdq_break(hdq_data); | 602 | omap_hdq_break(hdq_data); |
643 | 603 | ||
644 | /* don't clock the HDQ until it is needed */ | 604 | pm_runtime_put_sync(&pdev->dev); |
645 | clk_disable(hdq_data->hdq_ick); | ||
646 | clk_disable(hdq_data->hdq_fck); | ||
647 | 605 | ||
648 | omap_w1_master.data = hdq_data; | 606 | omap_w1_master.data = hdq_data; |
649 | 607 | ||
@@ -655,20 +613,11 @@ static int __devinit omap_hdq_probe(struct platform_device *pdev) | |||
655 | 613 | ||
656 | return 0; | 614 | return 0; |
657 | 615 | ||
658 | err_w1: | ||
659 | err_irq: | 616 | err_irq: |
660 | clk_disable(hdq_data->hdq_fck); | 617 | pm_runtime_put_sync(&pdev->dev); |
661 | 618 | err_w1: | |
662 | err_fnclk: | 619 | pm_runtime_disable(&pdev->dev); |
663 | clk_disable(hdq_data->hdq_ick); | ||
664 | |||
665 | err_intfclk: | ||
666 | clk_put(hdq_data->hdq_fck); | ||
667 | |||
668 | err_fck: | ||
669 | clk_put(hdq_data->hdq_ick); | ||
670 | 620 | ||
671 | err_ick: | ||
672 | iounmap(hdq_data->hdq_base); | 621 | iounmap(hdq_data->hdq_base); |
673 | 622 | ||
674 | err_ioremap: | 623 | err_ioremap: |
@@ -696,8 +645,7 @@ static int omap_hdq_remove(struct platform_device *pdev) | |||
696 | mutex_unlock(&hdq_data->hdq_mutex); | 645 | mutex_unlock(&hdq_data->hdq_mutex); |
697 | 646 | ||
698 | /* remove module dependency */ | 647 | /* remove module dependency */ |
699 | clk_put(hdq_data->hdq_ick); | 648 | pm_runtime_disable(&pdev->dev); |
700 | clk_put(hdq_data->hdq_fck); | ||
701 | free_irq(INT_24XX_HDQ_IRQ, hdq_data); | 649 | free_irq(INT_24XX_HDQ_IRQ, hdq_data); |
702 | platform_set_drvdata(pdev, NULL); | 650 | platform_set_drvdata(pdev, NULL); |
703 | iounmap(hdq_data->hdq_base); | 651 | iounmap(hdq_data->hdq_base); |