diff options
author | Mircea Gherzan <mgherzan@gmail.com> | 2012-06-11 18:52:25 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-06-14 10:12:13 -0400 |
commit | 2bea29b774ccb4bf32c7b299c677fccc5a1d8443 (patch) | |
tree | e4a5d721352ba8c34bb93497df98ece573125317 | |
parent | 2307574a50dcb0f9c13e541ca3a196f7554af977 (diff) |
ARM: 7421/1: bpf_jit: BPF_S_ANC_ALU_XOR_X support
JIT support for the XOR operation introduced by the commit
ffe06c17afbb.
Signed-off-by: Mircea Gherzan <mgherzan@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/net/bpf_jit_32.c | 5 | ||||
-rw-r--r-- | arch/arm/net/bpf_jit_32.h | 4 |
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c index 62135849f48b..c641fb685017 100644 --- a/arch/arm/net/bpf_jit_32.c +++ b/arch/arm/net/bpf_jit_32.c | |||
@@ -762,6 +762,11 @@ b_epilogue: | |||
762 | update_on_xread(ctx); | 762 | update_on_xread(ctx); |
763 | emit(ARM_MOV_R(r_A, r_X), ctx); | 763 | emit(ARM_MOV_R(r_A, r_X), ctx); |
764 | break; | 764 | break; |
765 | case BPF_S_ANC_ALU_XOR_X: | ||
766 | /* A ^= X */ | ||
767 | update_on_xread(ctx); | ||
768 | emit(ARM_EOR_R(r_A, r_A, r_X), ctx); | ||
769 | break; | ||
765 | case BPF_S_ANC_PROTOCOL: | 770 | case BPF_S_ANC_PROTOCOL: |
766 | /* A = ntohs(skb->protocol) */ | 771 | /* A = ntohs(skb->protocol) */ |
767 | ctx->seen |= SEEN_SKB; | 772 | ctx->seen |= SEEN_SKB; |
diff --git a/arch/arm/net/bpf_jit_32.h b/arch/arm/net/bpf_jit_32.h index 99ae5e3f46d2..7fa2f7d3cb90 100644 --- a/arch/arm/net/bpf_jit_32.h +++ b/arch/arm/net/bpf_jit_32.h | |||
@@ -68,6 +68,8 @@ | |||
68 | #define ARM_INST_CMP_R 0x01500000 | 68 | #define ARM_INST_CMP_R 0x01500000 |
69 | #define ARM_INST_CMP_I 0x03500000 | 69 | #define ARM_INST_CMP_I 0x03500000 |
70 | 70 | ||
71 | #define ARM_INST_EOR_R 0x00200000 | ||
72 | |||
71 | #define ARM_INST_LDRB_I 0x05d00000 | 73 | #define ARM_INST_LDRB_I 0x05d00000 |
72 | #define ARM_INST_LDRB_R 0x07d00000 | 74 | #define ARM_INST_LDRB_R 0x07d00000 |
73 | #define ARM_INST_LDRH_I 0x01d000b0 | 75 | #define ARM_INST_LDRH_I 0x01d000b0 |
@@ -132,6 +134,8 @@ | |||
132 | #define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm) | 134 | #define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm) |
133 | #define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) | 135 | #define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) |
134 | 136 | ||
137 | #define ARM_EOR_R(rd, rn, rm) _AL3_R(ARM_INST_EOR, rd, rn, rm) | ||
138 | |||
135 | #define ARM_LDR_I(rt, rn, off) (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \ | 139 | #define ARM_LDR_I(rt, rn, off) (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \ |
136 | | (off)) | 140 | | (off)) |
137 | #define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \ | 141 | #define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \ |