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authorBen Dooks <ben-linux@fluff.org>2009-02-20 12:33:08 -0500
committerPierre Ossman <drzeus@drzeus.cx>2009-03-02 15:46:35 -0500
commitf945405cdecd9e0ae3e58ff84cabd19b4522965e (patch)
tree69e9720d91a048ee82627a3cb5f921ebdaf8440c
parent778ef1e6cbb049c9bcbf405936ee6f2b6e451892 (diff)
sdhci: Add quirk for controllers with no end-of-busy IRQ
The Samsung SDHCI (and FSL eSDHC) controller block seems to fail to generate an INT_DATA_END after the transfer has completed and the bus busy state finished. Changes in e809517f6fa5803a5a1cd56026f0e2190fc13d5c to use the new busy method are the cause of the behaviour change. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
-rw-r--r--drivers/mmc/host/sdhci.c5
-rw-r--r--drivers/mmc/host/sdhci.h2
2 files changed, 6 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index f52f3053ed92..accb592764ed 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1291,8 +1291,11 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
1291 if (host->cmd->data) 1291 if (host->cmd->data)
1292 DBG("Cannot wait for busy signal when also " 1292 DBG("Cannot wait for busy signal when also "
1293 "doing a data transfer"); 1293 "doing a data transfer");
1294 else 1294 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1295 return; 1295 return;
1296
1297 /* The controller does not support the end-of-busy IRQ,
1298 * fall through and take the SDHCI_INT_RESPONSE */
1296 } 1299 }
1297 1300
1298 if (intmask & SDHCI_INT_RESPONSE) 1301 if (intmask & SDHCI_INT_RESPONSE)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index ebb83657e27a..43c37c68d07a 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -208,6 +208,8 @@ struct sdhci_host {
208#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) 208#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12)
209/* Controller has an issue with buffer bits for small transfers */ 209/* Controller has an issue with buffer bits for small transfers */
210#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) 210#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13)
211/* Controller does not provide transfer-complete interrupt when not busy */
212#define SDHCI_QUIRK_NO_BUSY_IRQ (1<<14)
211 213
212 int irq; /* Device IRQ */ 214 int irq; /* Device IRQ */
213 void __iomem * ioaddr; /* Mapped address */ 215 void __iomem * ioaddr; /* Mapped address */