diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-24 15:54:02 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-24 15:54:02 -0500 |
commit | ef2c55e5c60aaa89a5c1c86605ea4c1771880b66 (patch) | |
tree | f270b1b90a570319a51bb2e0a1e25da71fd309ad | |
parent | 431047166883101a93e9c713d54bd62466dd6ab9 (diff) | |
parent | f34548cb735b7a80bbbb0bdd09ad4c2173ba92d5 (diff) |
Merge branch 'sh/for-2.6.33' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh/for-2.6.33' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: Ensure all PG_dcache_dirty pages are written back.
sh: mach-ecovec24: setup.c detailed correction
serial: sh-sci: Convert tremaining ctrl_xxx I/O routines to __raw_xxx.
serial: sh-sci: earlyprintk zero uartclk fix
sh: Only use bl bit toggling for sleeping idle.
sh: Restore bl bit toggling in idle loop.
sh: Fix up MAX_DMA_CHANNELS definition when DMA is disabled.
sh: dmaengine support for SH7785
sh: dmaengine support for sh7724.
-rw-r--r-- | arch/sh/boards/mach-ecovec24/setup.c | 4 | ||||
-rw-r--r-- | arch/sh/include/asm/dma.h | 6 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/dma-sh4a.h | 8 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 15 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 14 | ||||
-rw-r--r-- | arch/sh/kernel/idle.c | 2 | ||||
-rw-r--r-- | arch/sh/mm/cache.c | 8 | ||||
-rw-r--r-- | drivers/serial/sh-sci.c | 20 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 118 |
9 files changed, 117 insertions, 78 deletions
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 194aaca22d47..6a8861b39f05 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c | |||
@@ -128,8 +128,6 @@ static struct platform_device nor_flash_device = { | |||
128 | 128 | ||
129 | /* SH Eth */ | 129 | /* SH Eth */ |
130 | #define SH_ETH_ADDR (0xA4600000) | 130 | #define SH_ETH_ADDR (0xA4600000) |
131 | #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0) | ||
132 | #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8) | ||
133 | static struct resource sh_eth_resources[] = { | 131 | static struct resource sh_eth_resources[] = { |
134 | [0] = { | 132 | [0] = { |
135 | .start = SH_ETH_ADDR, | 133 | .start = SH_ETH_ADDR, |
@@ -509,6 +507,7 @@ static struct platform_device sdhi1_device = { | |||
509 | 507 | ||
510 | #else | 508 | #else |
511 | 509 | ||
510 | /* MMC SPI */ | ||
512 | static int mmc_spi_get_ro(struct device *dev) | 511 | static int mmc_spi_get_ro(struct device *dev) |
513 | { | 512 | { |
514 | return gpio_get_value(GPIO_PTY6); | 513 | return gpio_get_value(GPIO_PTY6); |
@@ -542,6 +541,7 @@ static struct spi_board_info spi_bus[] = { | |||
542 | }, | 541 | }, |
543 | }; | 542 | }; |
544 | 543 | ||
544 | /* MSIOF0 */ | ||
545 | static struct sh_msiof_spi_info msiof0_data = { | 545 | static struct sh_msiof_spi_info msiof0_data = { |
546 | .num_chipselect = 1, | 546 | .num_chipselect = 1, |
547 | }; | 547 | }; |
diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h index 04ad0e1e637e..07373a074090 100644 --- a/arch/sh/include/asm/dma.h +++ b/arch/sh/include/asm/dma.h | |||
@@ -19,9 +19,11 @@ | |||
19 | #include <asm-generic/dma.h> | 19 | #include <asm-generic/dma.h> |
20 | 20 | ||
21 | #ifdef CONFIG_NR_DMA_CHANNELS | 21 | #ifdef CONFIG_NR_DMA_CHANNELS |
22 | # define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) | 22 | # define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) |
23 | #elif defined(CONFIG_NR_ONCHIP_DMA_CHANNELS) | ||
24 | # define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) | ||
23 | #else | 25 | #else |
24 | # define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) | 26 | # define MAX_DMA_CHANNELS 0 |
25 | #endif | 27 | #endif |
26 | 28 | ||
27 | /* | 29 | /* |
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h index f0886bc880e0..c4ed660c14cf 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h +++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h | |||
@@ -19,10 +19,10 @@ | |||
19 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \ | 19 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \ |
20 | defined(CONFIG_CPU_SUBTYPE_SH7724) | 20 | defined(CONFIG_CPU_SUBTYPE_SH7724) |
21 | #define DMTE0_IRQ 48 /* DMAC0A*/ | 21 | #define DMTE0_IRQ 48 /* DMAC0A*/ |
22 | #define DMTE4_IRQ 40 /* DMAC0B */ | 22 | #define DMTE4_IRQ 76 /* DMAC0B */ |
23 | #define DMTE6_IRQ 42 | 23 | #define DMTE6_IRQ 40 |
24 | #define DMTE8_IRQ 76 /* DMAC1A */ | 24 | #define DMTE8_IRQ 42 /* DMAC1A */ |
25 | #define DMTE9_IRQ 77 | 25 | #define DMTE9_IRQ 43 |
26 | #define DMTE10_IRQ 72 /* DMAC1B */ | 26 | #define DMTE10_IRQ 72 /* DMAC1B */ |
27 | #define DMTE11_IRQ 73 | 27 | #define DMTE11_IRQ 73 |
28 | #define DMAE0_IRQ 78 /* DMA Error IRQ*/ | 28 | #define DMAE0_IRQ 78 /* DMA Error IRQ*/ |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index a52f35117e82..d32f96c1cc15 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | |||
@@ -23,9 +23,23 @@ | |||
23 | #include <linux/notifier.h> | 23 | #include <linux/notifier.h> |
24 | #include <asm/suspend.h> | 24 | #include <asm/suspend.h> |
25 | #include <asm/clock.h> | 25 | #include <asm/clock.h> |
26 | #include <asm/dma-sh.h> | ||
26 | #include <asm/mmzone.h> | 27 | #include <asm/mmzone.h> |
27 | #include <cpu/sh7724.h> | 28 | #include <cpu/sh7724.h> |
28 | 29 | ||
30 | /* DMA */ | ||
31 | static struct sh_dmae_pdata dma_platform_data = { | ||
32 | .mode = SHDMA_DMAOR1, | ||
33 | }; | ||
34 | |||
35 | static struct platform_device dma_device = { | ||
36 | .name = "sh-dma-engine", | ||
37 | .id = -1, | ||
38 | .dev = { | ||
39 | .platform_data = &dma_platform_data, | ||
40 | }, | ||
41 | }; | ||
42 | |||
29 | /* Serial */ | 43 | /* Serial */ |
30 | static struct plat_sci_port scif0_platform_data = { | 44 | static struct plat_sci_port scif0_platform_data = { |
31 | .mapbase = 0xffe00000, | 45 | .mapbase = 0xffe00000, |
@@ -649,6 +663,7 @@ static struct platform_device *sh7724_devices[] __initdata = { | |||
649 | &tmu3_device, | 663 | &tmu3_device, |
650 | &tmu4_device, | 664 | &tmu4_device, |
651 | &tmu5_device, | 665 | &tmu5_device, |
666 | &dma_device, | ||
652 | &rtc_device, | 667 | &rtc_device, |
653 | &iic0_device, | 668 | &iic0_device, |
654 | &iic1_device, | 669 | &iic1_device, |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index ef26ebda6e8b..f685b9b21999 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/mm.h> | 15 | #include <linux/mm.h> |
16 | #include <linux/sh_timer.h> | 16 | #include <linux/sh_timer.h> |
17 | #include <asm/dma-sh.h> | ||
17 | #include <asm/mmzone.h> | 18 | #include <asm/mmzone.h> |
18 | 19 | ||
19 | static struct plat_sci_port scif0_platform_data = { | 20 | static struct plat_sci_port scif0_platform_data = { |
@@ -294,6 +295,18 @@ static struct platform_device tmu5_device = { | |||
294 | .num_resources = ARRAY_SIZE(tmu5_resources), | 295 | .num_resources = ARRAY_SIZE(tmu5_resources), |
295 | }; | 296 | }; |
296 | 297 | ||
298 | static struct sh_dmae_pdata dma_platform_data = { | ||
299 | .mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1), | ||
300 | }; | ||
301 | |||
302 | static struct platform_device dma_device = { | ||
303 | .name = "sh-dma-engine", | ||
304 | .id = -1, | ||
305 | .dev = { | ||
306 | .platform_data = &dma_platform_data, | ||
307 | }, | ||
308 | }; | ||
309 | |||
297 | static struct platform_device *sh7785_devices[] __initdata = { | 310 | static struct platform_device *sh7785_devices[] __initdata = { |
298 | &scif0_device, | 311 | &scif0_device, |
299 | &scif1_device, | 312 | &scif1_device, |
@@ -307,6 +320,7 @@ static struct platform_device *sh7785_devices[] __initdata = { | |||
307 | &tmu3_device, | 320 | &tmu3_device, |
308 | &tmu4_device, | 321 | &tmu4_device, |
309 | &tmu5_device, | 322 | &tmu5_device, |
323 | &dma_device, | ||
310 | }; | 324 | }; |
311 | 325 | ||
312 | static int __init sh7785_devices_setup(void) | 326 | static int __init sh7785_devices_setup(void) |
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c index aaff0037fcd7..6b3d706deac1 100644 --- a/arch/sh/kernel/idle.c +++ b/arch/sh/kernel/idle.c | |||
@@ -62,6 +62,7 @@ void default_idle(void) | |||
62 | clear_thread_flag(TIF_POLLING_NRFLAG); | 62 | clear_thread_flag(TIF_POLLING_NRFLAG); |
63 | smp_mb__after_clear_bit(); | 63 | smp_mb__after_clear_bit(); |
64 | 64 | ||
65 | set_bl_bit(); | ||
65 | if (!need_resched()) { | 66 | if (!need_resched()) { |
66 | local_irq_enable(); | 67 | local_irq_enable(); |
67 | cpu_sleep(); | 68 | cpu_sleep(); |
@@ -69,6 +70,7 @@ void default_idle(void) | |||
69 | local_irq_enable(); | 70 | local_irq_enable(); |
70 | 71 | ||
71 | set_thread_flag(TIF_POLLING_NRFLAG); | 72 | set_thread_flag(TIF_POLLING_NRFLAG); |
73 | clear_bl_bit(); | ||
72 | } else | 74 | } else |
73 | poll_idle(); | 75 | poll_idle(); |
74 | } | 76 | } |
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c index e9415d3ea94a..b8607fa7ae12 100644 --- a/arch/sh/mm/cache.c +++ b/arch/sh/mm/cache.c | |||
@@ -133,12 +133,8 @@ void __update_cache(struct vm_area_struct *vma, | |||
133 | page = pfn_to_page(pfn); | 133 | page = pfn_to_page(pfn); |
134 | if (pfn_valid(pfn)) { | 134 | if (pfn_valid(pfn)) { |
135 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); | 135 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); |
136 | if (dirty) { | 136 | if (dirty) |
137 | unsigned long addr = (unsigned long)page_address(page); | 137 | __flush_purge_region(page_address(page), PAGE_SIZE); |
138 | |||
139 | if (pages_do_alias(addr, address & PAGE_MASK)) | ||
140 | __flush_purge_region((void *)addr, PAGE_SIZE); | ||
141 | } | ||
142 | } | 138 | } |
143 | } | 139 | } |
144 | 140 | ||
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 68c7f6cfd728..37f0de9dd9ce 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -222,9 +222,9 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |||
222 | Set SCP6MD1,0 = {01} (output) */ | 222 | Set SCP6MD1,0 = {01} (output) */ |
223 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); | 223 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); |
224 | 224 | ||
225 | data = ctrl_inb(SCPDR); | 225 | data = __raw_readb(SCPDR); |
226 | /* Set /RTS2 (bit6) = 0 */ | 226 | /* Set /RTS2 (bit6) = 0 */ |
227 | ctrl_outb(data & 0xbf, SCPDR); | 227 | __raw_writeb(data & 0xbf, SCPDR); |
228 | } | 228 | } |
229 | } | 229 | } |
230 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 230 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
@@ -897,11 +897,21 @@ static void sci_shutdown(struct uart_port *port) | |||
897 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | 897 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
898 | struct ktermios *old) | 898 | struct ktermios *old) |
899 | { | 899 | { |
900 | unsigned int status, baud, smr_val; | 900 | unsigned int status, baud, smr_val, max_baud; |
901 | int t = -1; | 901 | int t = -1; |
902 | 902 | ||
903 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 903 | /* |
904 | if (likely(baud)) | 904 | * earlyprintk comes here early on with port->uartclk set to zero. |
905 | * the clock framework is not up and running at this point so here | ||
906 | * we assume that 115200 is the maximum baud rate. please note that | ||
907 | * the baud rate is not programmed during earlyprintk - it is assumed | ||
908 | * that the previous boot loader has enabled required clocks and | ||
909 | * setup the baud rate generator hardware for us already. | ||
910 | */ | ||
911 | max_baud = port->uartclk ? port->uartclk / 16 : 115200; | ||
912 | |||
913 | baud = uart_get_baud_rate(port, termios, old, 0, max_baud); | ||
914 | if (likely(baud && port->uartclk)) | ||
905 | t = SCBRR_VALUE(baud, port->uartclk); | 915 | t = SCBRR_VALUE(baud, port->uartclk); |
906 | 916 | ||
907 | do { | 917 | do { |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index a32094eeb42b..0efcded59ae6 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -517,20 +517,20 @@ static const struct __attribute__((packed)) { | |||
517 | static inline int sci_rxd_in(struct uart_port *port) | 517 | static inline int sci_rxd_in(struct uart_port *port) |
518 | { | 518 | { |
519 | if (port->mapbase == 0xfffffe80) | 519 | if (port->mapbase == 0xfffffe80) |
520 | return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCI */ | 520 | return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */ |
521 | if (port->mapbase == 0xa4000150) | 521 | if (port->mapbase == 0xa4000150) |
522 | return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ | 522 | return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ |
523 | if (port->mapbase == 0xa4000140) | 523 | if (port->mapbase == 0xa4000140) |
524 | return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ | 524 | return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ |
525 | return 1; | 525 | return 1; |
526 | } | 526 | } |
527 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) | 527 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) |
528 | static inline int sci_rxd_in(struct uart_port *port) | 528 | static inline int sci_rxd_in(struct uart_port *port) |
529 | { | 529 | { |
530 | if (port->mapbase == SCIF0) | 530 | if (port->mapbase == SCIF0) |
531 | return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ | 531 | return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ |
532 | if (port->mapbase == SCIF2) | 532 | if (port->mapbase == SCIF2) |
533 | return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ | 533 | return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ |
534 | return 1; | 534 | return 1; |
535 | } | 535 | } |
536 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 536 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
@@ -557,68 +557,68 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
557 | static inline int sci_rxd_in(struct uart_port *port) | 557 | static inline int sci_rxd_in(struct uart_port *port) |
558 | { | 558 | { |
559 | if (port->mapbase == 0xffe00000) | 559 | if (port->mapbase == 0xffe00000) |
560 | return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ | 560 | return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ |
561 | if (port->mapbase == 0xffe80000) | 561 | if (port->mapbase == 0xffe80000) |
562 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | 562 | return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ |
563 | return 1; | 563 | return 1; |
564 | } | 564 | } |
565 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | 565 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) |
566 | static inline int sci_rxd_in(struct uart_port *port) | 566 | static inline int sci_rxd_in(struct uart_port *port) |
567 | { | 567 | { |
568 | if (port->mapbase == 0xffe80000) | 568 | if (port->mapbase == 0xffe80000) |
569 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | 569 | return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ |
570 | return 1; | 570 | return 1; |
571 | } | 571 | } |
572 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) | 572 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) |
573 | static inline int sci_rxd_in(struct uart_port *port) | 573 | static inline int sci_rxd_in(struct uart_port *port) |
574 | { | 574 | { |
575 | if (port->mapbase == 0xfe4b0000) | 575 | if (port->mapbase == 0xfe4b0000) |
576 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; | 576 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; |
577 | if (port->mapbase == 0xfe4c0000) | 577 | if (port->mapbase == 0xfe4c0000) |
578 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; | 578 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; |
579 | if (port->mapbase == 0xfe4d0000) | 579 | if (port->mapbase == 0xfe4d0000) |
580 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; | 580 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; |
581 | } | 581 | } |
582 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | 582 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) |
583 | static inline int sci_rxd_in(struct uart_port *port) | 583 | static inline int sci_rxd_in(struct uart_port *port) |
584 | { | 584 | { |
585 | if (port->mapbase == 0xfe600000) | 585 | if (port->mapbase == 0xfe600000) |
586 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 586 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
587 | if (port->mapbase == 0xfe610000) | 587 | if (port->mapbase == 0xfe610000) |
588 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 588 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
589 | if (port->mapbase == 0xfe620000) | 589 | if (port->mapbase == 0xfe620000) |
590 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 590 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
591 | return 1; | 591 | return 1; |
592 | } | 592 | } |
593 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) | 593 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) |
594 | static inline int sci_rxd_in(struct uart_port *port) | 594 | static inline int sci_rxd_in(struct uart_port *port) |
595 | { | 595 | { |
596 | if (port->mapbase == 0xffe00000) | 596 | if (port->mapbase == 0xffe00000) |
597 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 597 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
598 | if (port->mapbase == 0xffe10000) | 598 | if (port->mapbase == 0xffe10000) |
599 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 599 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
600 | if (port->mapbase == 0xffe20000) | 600 | if (port->mapbase == 0xffe20000) |
601 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 601 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
602 | if (port->mapbase == 0xffe30000) | 602 | if (port->mapbase == 0xffe30000) |
603 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 603 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
604 | return 1; | 604 | return 1; |
605 | } | 605 | } |
606 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) | 606 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) |
607 | static inline int sci_rxd_in(struct uart_port *port) | 607 | static inline int sci_rxd_in(struct uart_port *port) |
608 | { | 608 | { |
609 | if (port->mapbase == 0xffe00000) | 609 | if (port->mapbase == 0xffe00000) |
610 | return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ | 610 | return __raw_readb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ |
611 | return 1; | 611 | return 1; |
612 | } | 612 | } |
613 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 613 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
614 | static inline int sci_rxd_in(struct uart_port *port) | 614 | static inline int sci_rxd_in(struct uart_port *port) |
615 | { | 615 | { |
616 | if (port->mapbase == 0xffe00000) | 616 | if (port->mapbase == 0xffe00000) |
617 | return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ | 617 | return __raw_readb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ |
618 | if (port->mapbase == 0xffe10000) | 618 | if (port->mapbase == 0xffe10000) |
619 | return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ | 619 | return __raw_readb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ |
620 | if (port->mapbase == 0xffe20000) | 620 | if (port->mapbase == 0xffe20000) |
621 | return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ | 621 | return __raw_readb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ |
622 | 622 | ||
623 | return 1; | 623 | return 1; |
624 | } | 624 | } |
@@ -626,17 +626,17 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
626 | static inline int sci_rxd_in(struct uart_port *port) | 626 | static inline int sci_rxd_in(struct uart_port *port) |
627 | { | 627 | { |
628 | if (port->mapbase == 0xffe00000) | 628 | if (port->mapbase == 0xffe00000) |
629 | return ctrl_inb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */ | 629 | return __raw_readb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */ |
630 | if (port->mapbase == 0xffe10000) | 630 | if (port->mapbase == 0xffe10000) |
631 | return ctrl_inb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */ | 631 | return __raw_readb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */ |
632 | if (port->mapbase == 0xffe20000) | 632 | if (port->mapbase == 0xffe20000) |
633 | return ctrl_inb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */ | 633 | return __raw_readb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */ |
634 | if (port->mapbase == 0xa4e30000) | 634 | if (port->mapbase == 0xa4e30000) |
635 | return ctrl_inb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */ | 635 | return __raw_readb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */ |
636 | if (port->mapbase == 0xa4e40000) | 636 | if (port->mapbase == 0xa4e40000) |
637 | return ctrl_inb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */ | 637 | return __raw_readb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */ |
638 | if (port->mapbase == 0xa4e50000) | 638 | if (port->mapbase == 0xa4e50000) |
639 | return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */ | 639 | return __raw_readb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */ |
640 | return 1; | 640 | return 1; |
641 | } | 641 | } |
642 | #elif defined(CONFIG_CPU_SUBTYPE_SH7724) | 642 | #elif defined(CONFIG_CPU_SUBTYPE_SH7724) |
@@ -645,9 +645,9 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
645 | static inline int sci_rxd_in(struct uart_port *port) | 645 | static inline int sci_rxd_in(struct uart_port *port) |
646 | { | 646 | { |
647 | if (port->type == PORT_SCIF) | 647 | if (port->type == PORT_SCIF) |
648 | return ctrl_inw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0; | 648 | return __raw_readw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0; |
649 | if (port->type == PORT_SCIFA) | 649 | if (port->type == PORT_SCIFA) |
650 | return ctrl_inw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0; | 650 | return __raw_readw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0; |
651 | return 1; | 651 | return 1; |
652 | } | 652 | } |
653 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 653 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
@@ -665,11 +665,11 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
665 | static inline int sci_rxd_in(struct uart_port *port) | 665 | static inline int sci_rxd_in(struct uart_port *port) |
666 | { | 666 | { |
667 | if (port->mapbase == 0xffe00000) | 667 | if (port->mapbase == 0xffe00000) |
668 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 668 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
669 | if (port->mapbase == 0xffe08000) | 669 | if (port->mapbase == 0xffe08000) |
670 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 670 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
671 | if (port->mapbase == 0xffe10000) | 671 | if (port->mapbase == 0xffe10000) |
672 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */ | 672 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */ |
673 | 673 | ||
674 | return 1; | 674 | return 1; |
675 | } | 675 | } |
@@ -677,20 +677,20 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
677 | static inline int sci_rxd_in(struct uart_port *port) | 677 | static inline int sci_rxd_in(struct uart_port *port) |
678 | { | 678 | { |
679 | if (port->mapbase == 0xff923000) | 679 | if (port->mapbase == 0xff923000) |
680 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 680 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
681 | if (port->mapbase == 0xff924000) | 681 | if (port->mapbase == 0xff924000) |
682 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 682 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
683 | if (port->mapbase == 0xff925000) | 683 | if (port->mapbase == 0xff925000) |
684 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 684 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
685 | return 1; | 685 | return 1; |
686 | } | 686 | } |
687 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | 687 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) |
688 | static inline int sci_rxd_in(struct uart_port *port) | 688 | static inline int sci_rxd_in(struct uart_port *port) |
689 | { | 689 | { |
690 | if (port->mapbase == 0xffe00000) | 690 | if (port->mapbase == 0xffe00000) |
691 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 691 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
692 | if (port->mapbase == 0xffe10000) | 692 | if (port->mapbase == 0xffe10000) |
693 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 693 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
694 | return 1; | 694 | return 1; |
695 | } | 695 | } |
696 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 696 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
@@ -698,17 +698,17 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
698 | static inline int sci_rxd_in(struct uart_port *port) | 698 | static inline int sci_rxd_in(struct uart_port *port) |
699 | { | 699 | { |
700 | if (port->mapbase == 0xffea0000) | 700 | if (port->mapbase == 0xffea0000) |
701 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 701 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
702 | if (port->mapbase == 0xffeb0000) | 702 | if (port->mapbase == 0xffeb0000) |
703 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 703 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
704 | if (port->mapbase == 0xffec0000) | 704 | if (port->mapbase == 0xffec0000) |
705 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 705 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
706 | if (port->mapbase == 0xffed0000) | 706 | if (port->mapbase == 0xffed0000) |
707 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 707 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
708 | if (port->mapbase == 0xffee0000) | 708 | if (port->mapbase == 0xffee0000) |
709 | return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */ | 709 | return __raw_readw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */ |
710 | if (port->mapbase == 0xffef0000) | 710 | if (port->mapbase == 0xffef0000) |
711 | return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ | 711 | return __raw_readw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ |
712 | return 1; | 712 | return 1; |
713 | } | 713 | } |
714 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ | 714 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ |
@@ -718,22 +718,22 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
718 | static inline int sci_rxd_in(struct uart_port *port) | 718 | static inline int sci_rxd_in(struct uart_port *port) |
719 | { | 719 | { |
720 | if (port->mapbase == 0xfffe8000) | 720 | if (port->mapbase == 0xfffe8000) |
721 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 721 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
722 | if (port->mapbase == 0xfffe8800) | 722 | if (port->mapbase == 0xfffe8800) |
723 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 723 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
724 | if (port->mapbase == 0xfffe9000) | 724 | if (port->mapbase == 0xfffe9000) |
725 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 725 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
726 | if (port->mapbase == 0xfffe9800) | 726 | if (port->mapbase == 0xfffe9800) |
727 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 727 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
728 | #if defined(CONFIG_CPU_SUBTYPE_SH7201) | 728 | #if defined(CONFIG_CPU_SUBTYPE_SH7201) |
729 | if (port->mapbase == 0xfffeA000) | 729 | if (port->mapbase == 0xfffeA000) |
730 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 730 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
731 | if (port->mapbase == 0xfffeA800) | 731 | if (port->mapbase == 0xfffeA800) |
732 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 732 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
733 | if (port->mapbase == 0xfffeB000) | 733 | if (port->mapbase == 0xfffeB000) |
734 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 734 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
735 | if (port->mapbase == 0xfffeB800) | 735 | if (port->mapbase == 0xfffeB800) |
736 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 736 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
737 | #endif | 737 | #endif |
738 | return 1; | 738 | return 1; |
739 | } | 739 | } |
@@ -741,24 +741,24 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
741 | static inline int sci_rxd_in(struct uart_port *port) | 741 | static inline int sci_rxd_in(struct uart_port *port) |
742 | { | 742 | { |
743 | if (port->mapbase == 0xf8400000) | 743 | if (port->mapbase == 0xf8400000) |
744 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 744 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
745 | if (port->mapbase == 0xf8410000) | 745 | if (port->mapbase == 0xf8410000) |
746 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 746 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
747 | if (port->mapbase == 0xf8420000) | 747 | if (port->mapbase == 0xf8420000) |
748 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 748 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
749 | return 1; | 749 | return 1; |
750 | } | 750 | } |
751 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) | 751 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) |
752 | static inline int sci_rxd_in(struct uart_port *port) | 752 | static inline int sci_rxd_in(struct uart_port *port) |
753 | { | 753 | { |
754 | if (port->mapbase == 0xffc30000) | 754 | if (port->mapbase == 0xffc30000) |
755 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 755 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
756 | if (port->mapbase == 0xffc40000) | 756 | if (port->mapbase == 0xffc40000) |
757 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 757 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
758 | if (port->mapbase == 0xffc50000) | 758 | if (port->mapbase == 0xffc50000) |
759 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 759 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
760 | if (port->mapbase == 0xffc60000) | 760 | if (port->mapbase == 0xffc60000) |
761 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 761 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
762 | return 1; | 762 | return 1; |
763 | } | 763 | } |
764 | #endif | 764 | #endif |