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authorJarkko Nikula <jhnikula@gmail.com>2010-04-26 08:49:12 -0400
committerLiam Girdwood <lrg@slimlogic.co.uk>2010-04-27 06:08:06 -0400
commitd3235c4ac17b7f2a9c64cc3ebc71e23d1d1fa466 (patch)
tree72cb304a62e75f98a109f2548cdc5b04f0757e79
parentc6de6e03009efaa56baeb98da8bbcce0c6c889a6 (diff)
ASoC: tlv320aic3x: Remove needless power off from aic3x_set_bias_level
These ADC, DAC and output pin power off commands are needless in aic3x_set_bias_level since they are not enabled in aic3x_init and they are defined in aic3x_dapm_widgets so the ASoC DAPM will take care of them anyway. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
-rw-r--r--sound/soc/codecs/tlv320aic3x.c34
1 files changed, 0 insertions, 34 deletions
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index 260a2bef72c0..19602eca4924 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -1012,41 +1012,7 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec,
1012 * all power is driven by DAPM system, 1012 * all power is driven by DAPM system,
1013 * so output power is safe if bypass was set 1013 * so output power is safe if bypass was set
1014 */ 1014 */
1015 if (aic3x->master) {
1016 /* disable pll */
1017 reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG);
1018 aic3x_write(codec, AIC3X_PLL_PROGA_REG,
1019 reg & ~PLL_ENABLE);
1020 }
1021 break;
1022 case SND_SOC_BIAS_OFF: 1015 case SND_SOC_BIAS_OFF:
1023 /* force all power off */
1024 reg = aic3x_read_reg_cache(codec, LINE1L_2_LADC_CTRL);
1025 aic3x_write(codec, LINE1L_2_LADC_CTRL, reg & ~LADC_PWR_ON);
1026 reg = aic3x_read_reg_cache(codec, LINE1R_2_RADC_CTRL);
1027 aic3x_write(codec, LINE1R_2_RADC_CTRL, reg & ~RADC_PWR_ON);
1028
1029 reg = aic3x_read_reg_cache(codec, DAC_PWR);
1030 aic3x_write(codec, DAC_PWR, reg & ~(LDAC_PWR_ON | RDAC_PWR_ON));
1031
1032 reg = aic3x_read_reg_cache(codec, HPLOUT_CTRL);
1033 aic3x_write(codec, HPLOUT_CTRL, reg & ~HPLOUT_PWR_ON);
1034 reg = aic3x_read_reg_cache(codec, HPROUT_CTRL);
1035 aic3x_write(codec, HPROUT_CTRL, reg & ~HPROUT_PWR_ON);
1036
1037 reg = aic3x_read_reg_cache(codec, HPLCOM_CTRL);
1038 aic3x_write(codec, HPLCOM_CTRL, reg & ~HPLCOM_PWR_ON);
1039 reg = aic3x_read_reg_cache(codec, HPRCOM_CTRL);
1040 aic3x_write(codec, HPRCOM_CTRL, reg & ~HPRCOM_PWR_ON);
1041
1042 reg = aic3x_read_reg_cache(codec, MONOLOPM_CTRL);
1043 aic3x_write(codec, MONOLOPM_CTRL, reg & ~MONOLOPM_PWR_ON);
1044
1045 reg = aic3x_read_reg_cache(codec, LLOPM_CTRL);
1046 aic3x_write(codec, LLOPM_CTRL, reg & ~LLOPM_PWR_ON);
1047 reg = aic3x_read_reg_cache(codec, RLOPM_CTRL);
1048 aic3x_write(codec, RLOPM_CTRL, reg & ~RLOPM_PWR_ON);
1049
1050 if (aic3x->master) { 1016 if (aic3x->master) {
1051 /* disable pll */ 1017 /* disable pll */
1052 reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); 1018 reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG);