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authorLinus Torvalds <torvalds@g5.osdl.org>2005-11-02 21:38:22 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-02 21:38:22 -0500
commitcfa024f4e45562c50b9eccb23649ab103578037b (patch)
treed49992521230a4e302c6d4bef9191e885220b82e
parent3a7142371efdc95f4c5b5ffc188b18efdc4e64dd (diff)
parenta054a811597a17ffbe92bc4db04a4dc2f1b1ea55 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
-rw-r--r--arch/arm/Kconfig7
-rw-r--r--arch/arm/kernel/irq.c31
-rw-r--r--arch/arm/kernel/process.c9
-rw-r--r--arch/arm/kernel/smp.c109
-rw-r--r--arch/arm/mach-realview/realview_eb.c44
-rw-r--r--arch/arm/mm/init.c9
-rw-r--r--drivers/video/amba-clcd.c4
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h74
-rw-r--r--include/asm-arm/arch-realview/memory.h2
-rw-r--r--include/asm-arm/cpu.h1
-rw-r--r--include/asm-arm/irq.h1
-rw-r--r--include/asm-arm/smp.h10
-rw-r--r--include/asm-arm/spinlock.h6
13 files changed, 250 insertions, 57 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index dc6d8342e5e6..6b12d71978de 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -349,6 +349,13 @@ config NR_CPUS
349 depends on SMP 349 depends on SMP
350 default "4" 350 default "4"
351 351
352config HOTPLUG_CPU
353 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
354 depends on SMP && HOTPLUG && EXPERIMENTAL
355 help
356 Say Y here to experiment with turning CPUs off and on. CPUs
357 can be controlled through /sys/devices/system/cpu.
358
352config PREEMPT 359config PREEMPT
353 bool "Preemptible Kernel (EXPERIMENTAL)" 360 bool "Preemptible Kernel (EXPERIMENTAL)"
354 depends on EXPERIMENTAL 361 depends on EXPERIMENTAL
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 3284118f356b..9def4404e1f2 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -1050,3 +1050,34 @@ static int __init noirqdebug_setup(char *str)
1050} 1050}
1051 1051
1052__setup("noirqdebug", noirqdebug_setup); 1052__setup("noirqdebug", noirqdebug_setup);
1053
1054#ifdef CONFIG_HOTPLUG_CPU
1055/*
1056 * The CPU has been marked offline. Migrate IRQs off this CPU. If
1057 * the affinity settings do not allow other CPUs, force them onto any
1058 * available CPU.
1059 */
1060void migrate_irqs(void)
1061{
1062 unsigned int i, cpu = smp_processor_id();
1063
1064 for (i = 0; i < NR_IRQS; i++) {
1065 struct irqdesc *desc = irq_desc + i;
1066
1067 if (desc->cpu == cpu) {
1068 unsigned int newcpu = any_online_cpu(desc->affinity);
1069
1070 if (newcpu == NR_CPUS) {
1071 if (printk_ratelimit())
1072 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
1073 i, cpu);
1074
1075 cpus_setall(desc->affinity);
1076 newcpu = any_online_cpu(desc->affinity);
1077 }
1078
1079 route_irq(desc, i, newcpu);
1080 }
1081 }
1082}
1083#endif /* CONFIG_HOTPLUG_CPU */
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 409db6d5ec99..ba298277becd 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -26,6 +26,7 @@
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/kallsyms.h> 27#include <linux/kallsyms.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/cpu.h>
29 30
30#include <asm/system.h> 31#include <asm/system.h>
31#include <asm/io.h> 32#include <asm/io.h>
@@ -105,6 +106,14 @@ void cpu_idle(void)
105 /* endless idle loop with no priority at all */ 106 /* endless idle loop with no priority at all */
106 while (1) { 107 while (1) {
107 void (*idle)(void) = pm_idle; 108 void (*idle)(void) = pm_idle;
109
110#ifdef CONFIG_HOTPLUG_CPU
111 if (cpu_is_offline(smp_processor_id())) {
112 leds_event(led_idle_start);
113 cpu_die();
114 }
115#endif
116
108 if (!idle) 117 if (!idle)
109 idle = default_idle; 118 idle = default_idle;
110 preempt_disable(); 119 preempt_disable();
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 826164945747..edb5a406922f 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -80,19 +80,23 @@ static DEFINE_SPINLOCK(smp_call_function_lock);
80 80
81int __cpuinit __cpu_up(unsigned int cpu) 81int __cpuinit __cpu_up(unsigned int cpu)
82{ 82{
83 struct task_struct *idle; 83 struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu);
84 struct task_struct *idle = ci->idle;
84 pgd_t *pgd; 85 pgd_t *pgd;
85 pmd_t *pmd; 86 pmd_t *pmd;
86 int ret; 87 int ret;
87 88
88 /* 89 /*
89 * Spawn a new process manually. Grab a pointer to 90 * Spawn a new process manually, if not already done.
90 * its task struct so we can mess with it 91 * Grab a pointer to its task struct so we can mess with it
91 */ 92 */
92 idle = fork_idle(cpu); 93 if (!idle) {
93 if (IS_ERR(idle)) { 94 idle = fork_idle(cpu);
94 printk(KERN_ERR "CPU%u: fork() failed\n", cpu); 95 if (IS_ERR(idle)) {
95 return PTR_ERR(idle); 96 printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
97 return PTR_ERR(idle);
98 }
99 ci->idle = idle;
96 } 100 }
97 101
98 /* 102 /*
@@ -155,6 +159,91 @@ int __cpuinit __cpu_up(unsigned int cpu)
155 return ret; 159 return ret;
156} 160}
157 161
162#ifdef CONFIG_HOTPLUG_CPU
163/*
164 * __cpu_disable runs on the processor to be shutdown.
165 */
166int __cpuexit __cpu_disable(void)
167{
168 unsigned int cpu = smp_processor_id();
169 struct task_struct *p;
170 int ret;
171
172 ret = mach_cpu_disable(cpu);
173 if (ret)
174 return ret;
175
176 /*
177 * Take this CPU offline. Once we clear this, we can't return,
178 * and we must not schedule until we're ready to give up the cpu.
179 */
180 cpu_clear(cpu, cpu_online_map);
181
182 /*
183 * OK - migrate IRQs away from this CPU
184 */
185 migrate_irqs();
186
187 /*
188 * Flush user cache and TLB mappings, and then remove this CPU
189 * from the vm mask set of all processes.
190 */
191 flush_cache_all();
192 local_flush_tlb_all();
193
194 read_lock(&tasklist_lock);
195 for_each_process(p) {
196 if (p->mm)
197 cpu_clear(cpu, p->mm->cpu_vm_mask);
198 }
199 read_unlock(&tasklist_lock);
200
201 return 0;
202}
203
204/*
205 * called on the thread which is asking for a CPU to be shutdown -
206 * waits until shutdown has completed, or it is timed out.
207 */
208void __cpuexit __cpu_die(unsigned int cpu)
209{
210 if (!platform_cpu_kill(cpu))
211 printk("CPU%u: unable to kill\n", cpu);
212}
213
214/*
215 * Called from the idle thread for the CPU which has been shutdown.
216 *
217 * Note that we disable IRQs here, but do not re-enable them
218 * before returning to the caller. This is also the behaviour
219 * of the other hotplug-cpu capable cores, so presumably coming
220 * out of idle fixes this.
221 */
222void __cpuexit cpu_die(void)
223{
224 unsigned int cpu = smp_processor_id();
225
226 local_irq_disable();
227 idle_task_exit();
228
229 /*
230 * actual CPU shutdown procedure is at least platform (if not
231 * CPU) specific
232 */
233 platform_cpu_die(cpu);
234
235 /*
236 * Do not return to the idle loop - jump back to the secondary
237 * cpu initialisation. There's some initialisation which needs
238 * to be repeated to undo the effects of taking the CPU offline.
239 */
240 __asm__("mov sp, %0\n"
241 " b secondary_start_kernel"
242 :
243 : "r" ((void *)current->thread_info + THREAD_SIZE - 8));
244}
245#endif /* CONFIG_HOTPLUG_CPU */
246
158/* 247/*
159 * This is the secondary CPU boot entry. We're using this CPUs 248 * This is the secondary CPU boot entry. We're using this CPUs
160 * idle thread stack, but a set of temporary page tables. 249 * idle thread stack, but a set of temporary page tables.
@@ -236,6 +325,8 @@ void __init smp_prepare_boot_cpu(void)
236{ 325{
237 unsigned int cpu = smp_processor_id(); 326 unsigned int cpu = smp_processor_id();
238 327
328 per_cpu(cpu_data, cpu).idle = current;
329
239 cpu_set(cpu, cpu_possible_map); 330 cpu_set(cpu, cpu_possible_map);
240 cpu_set(cpu, cpu_present_map); 331 cpu_set(cpu, cpu_present_map);
241 cpu_set(cpu, cpu_online_map); 332 cpu_set(cpu, cpu_online_map);
@@ -309,8 +400,8 @@ int smp_call_function_on_cpu(void (*func)(void *info), void *info, int retry,
309 printk(KERN_CRIT 400 printk(KERN_CRIT
310 "CPU%u: smp_call_function timeout for %p(%p)\n" 401 "CPU%u: smp_call_function timeout for %p(%p)\n"
311 " callmap %lx pending %lx, %swait\n", 402 " callmap %lx pending %lx, %swait\n",
312 smp_processor_id(), func, info, callmap, data.pending, 403 smp_processor_id(), func, info, *cpus_addr(callmap),
313 wait ? "" : "no "); 404 *cpus_addr(data.pending), wait ? "" : "no ");
314 405
315 /* 406 /*
316 * TRACE 407 * TRACE
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 01b264be5029..267bb07e39b7 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -43,14 +43,44 @@
43#include "clock.h" 43#include "clock.h"
44 44
45static struct map_desc realview_eb_io_desc[] __initdata = { 45static struct map_desc realview_eb_io_desc[] __initdata = {
46 { IO_ADDRESS(REALVIEW_SYS_BASE), REALVIEW_SYS_BASE, SZ_4K, MT_DEVICE }, 46 {
47 { IO_ADDRESS(REALVIEW_GIC_CPU_BASE), REALVIEW_GIC_CPU_BASE, SZ_4K, MT_DEVICE }, 47 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
48 { IO_ADDRESS(REALVIEW_GIC_DIST_BASE), REALVIEW_GIC_DIST_BASE, SZ_4K, MT_DEVICE }, 48 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
49 { IO_ADDRESS(REALVIEW_SCTL_BASE), REALVIEW_SCTL_BASE, SZ_4K, MT_DEVICE }, 49 .length = SZ_4K,
50 { IO_ADDRESS(REALVIEW_TIMER0_1_BASE), REALVIEW_TIMER0_1_BASE, SZ_4K, MT_DEVICE }, 50 .type = MT_DEVICE,
51 { IO_ADDRESS(REALVIEW_TIMER2_3_BASE), REALVIEW_TIMER2_3_BASE, SZ_4K, MT_DEVICE }, 51 }, {
52 .virtual = IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
53 .pfn = __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
54 .length = SZ_4K,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
58 .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
59 .length = SZ_4K,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
63 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
64 .length = SZ_4K,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
68 .pfn = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
69 .length = SZ_4K,
70 .type = MT_DEVICE,
71 }, {
72 .virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
73 .pfn = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 },
52#ifdef CONFIG_DEBUG_LL 77#ifdef CONFIG_DEBUG_LL
53 { IO_ADDRESS(REALVIEW_UART0_BASE), REALVIEW_UART0_BASE, SZ_4K, MT_DEVICE }, 78 {
79 .virtual = IO_ADDRESS(REALVIEW_UART0_BASE),
80 .pfn = __phys_to_pfn(REALVIEW_UART0_BASE),
81 .length = SZ_4K,
82 .type = MT_DEVICE,
83 }
54#endif 84#endif
55}; 85};
56 86
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index fd079ff1fc53..c168f322ef8c 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -486,10 +486,17 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
486 486
487 /* 487 /*
488 * Ask the machine support to map in the statically mapped devices. 488 * Ask the machine support to map in the statically mapped devices.
489 * After this point, we can start to touch devices again.
490 */ 489 */
491 if (mdesc->map_io) 490 if (mdesc->map_io)
492 mdesc->map_io(); 491 mdesc->map_io();
492
493 /*
494 * Finally flush the tlb again - this ensures that we're in a
495 * consistent state wrt the writebuffer if the writebuffer needs
496 * draining. After this point, we can start to touch devices
497 * again.
498 */
499 local_flush_tlb_all();
493} 500}
494 501
495/* 502/*
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c
index cde6fd8eb390..4fc93dc2b4d3 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/amba-clcd.c
@@ -505,14 +505,14 @@ static int clcdfb_remove(struct amba_device *dev)
505static struct amba_id clcdfb_id_table[] = { 505static struct amba_id clcdfb_id_table[] = {
506 { 506 {
507 .id = 0x00041110, 507 .id = 0x00041110,
508 .mask = 0x000fffff, 508 .mask = 0x000ffffe,
509 }, 509 },
510 { 0, 0 }, 510 { 0, 0 },
511}; 511};
512 512
513static struct amba_driver clcd_driver = { 513static struct amba_driver clcd_driver = {
514 .drv = { 514 .drv = {
515 .name = "clcd-pl110", 515 .name = "clcd-pl11x",
516 }, 516 },
517 .probe = clcdfb_probe, 517 .probe = clcdfb_probe,
518 .remove = clcdfb_remove, 518 .remove = clcdfb_remove,
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 80d05ecad2f0..688f7f90d93e 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -80,9 +80,9 @@ __ixp4xx_iounmap(void __iomem *addr)
80#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) 80#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x)
81#define __arch_iounmap(a) __ixp4xx_iounmap(a) 81#define __arch_iounmap(a) __ixp4xx_iounmap(a)
82 82
83#define writeb(p, v) __ixp4xx_writeb(p, v) 83#define writeb(v, p) __ixp4xx_writeb(v, p)
84#define writew(p, v) __ixp4xx_writew(p, v) 84#define writew(v, p) __ixp4xx_writew(v, p)
85#define writel(p, v) __ixp4xx_writel(p, v) 85#define writel(v, p) __ixp4xx_writel(v, p)
86 86
87#define writesb(p, v, l) __ixp4xx_writesb(p, v, l) 87#define writesb(p, v, l) __ixp4xx_writesb(p, v, l)
88#define writesw(p, v, l) __ixp4xx_writesw(p, v, l) 88#define writesw(p, v, l) __ixp4xx_writesw(p, v, l)
@@ -97,8 +97,9 @@ __ixp4xx_iounmap(void __iomem *addr)
97#define readsl(p, v, l) __ixp4xx_readsl(p, v, l) 97#define readsl(p, v, l) __ixp4xx_readsl(p, v, l)
98 98
99static inline void 99static inline void
100__ixp4xx_writeb(u8 value, u32 addr) 100__ixp4xx_writeb(u8 value, volatile void __iomem *p)
101{ 101{
102 u32 addr = (u32)p;
102 u32 n, byte_enables, data; 103 u32 n, byte_enables, data;
103 104
104 if (addr >= VMALLOC_START) { 105 if (addr >= VMALLOC_START) {
@@ -113,15 +114,16 @@ __ixp4xx_writeb(u8 value, u32 addr)
113} 114}
114 115
115static inline void 116static inline void
116__ixp4xx_writesb(u32 bus_addr, const u8 *vaddr, int count) 117__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count)
117{ 118{
118 while (count--) 119 while (count--)
119 writeb(*vaddr++, bus_addr); 120 writeb(*vaddr++, bus_addr);
120} 121}
121 122
122static inline void 123static inline void
123__ixp4xx_writew(u16 value, u32 addr) 124__ixp4xx_writew(u16 value, volatile void __iomem *p)
124{ 125{
126 u32 addr = (u32)p;
125 u32 n, byte_enables, data; 127 u32 n, byte_enables, data;
126 128
127 if (addr >= VMALLOC_START) { 129 if (addr >= VMALLOC_START) {
@@ -136,15 +138,16 @@ __ixp4xx_writew(u16 value, u32 addr)
136} 138}
137 139
138static inline void 140static inline void
139__ixp4xx_writesw(u32 bus_addr, const u16 *vaddr, int count) 141__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count)
140{ 142{
141 while (count--) 143 while (count--)
142 writew(*vaddr++, bus_addr); 144 writew(*vaddr++, bus_addr);
143} 145}
144 146
145static inline void 147static inline void
146__ixp4xx_writel(u32 value, u32 addr) 148__ixp4xx_writel(u32 value, volatile void __iomem *p)
147{ 149{
150 u32 addr = (u32)p;
148 if (addr >= VMALLOC_START) { 151 if (addr >= VMALLOC_START) {
149 __raw_writel(value, addr); 152 __raw_writel(value, addr);
150 return; 153 return;
@@ -154,15 +157,16 @@ __ixp4xx_writel(u32 value, u32 addr)
154} 157}
155 158
156static inline void 159static inline void
157__ixp4xx_writesl(u32 bus_addr, const u32 *vaddr, int count) 160__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count)
158{ 161{
159 while (count--) 162 while (count--)
160 writel(*vaddr++, bus_addr); 163 writel(*vaddr++, bus_addr);
161} 164}
162 165
163static inline unsigned char 166static inline unsigned char
164__ixp4xx_readb(u32 addr) 167__ixp4xx_readb(const volatile void __iomem *p)
165{ 168{
169 u32 addr = (u32)p;
166 u32 n, byte_enables, data; 170 u32 n, byte_enables, data;
167 171
168 if (addr >= VMALLOC_START) 172 if (addr >= VMALLOC_START)
@@ -177,15 +181,16 @@ __ixp4xx_readb(u32 addr)
177} 181}
178 182
179static inline void 183static inline void
180__ixp4xx_readsb(u32 bus_addr, u8 *vaddr, u32 count) 184__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count)
181{ 185{
182 while (count--) 186 while (count--)
183 *vaddr++ = readb(bus_addr); 187 *vaddr++ = readb(bus_addr);
184} 188}
185 189
186static inline unsigned short 190static inline unsigned short
187__ixp4xx_readw(u32 addr) 191__ixp4xx_readw(const volatile void __iomem *p)
188{ 192{
193 u32 addr = (u32)p;
189 u32 n, byte_enables, data; 194 u32 n, byte_enables, data;
190 195
191 if (addr >= VMALLOC_START) 196 if (addr >= VMALLOC_START)
@@ -200,15 +205,16 @@ __ixp4xx_readw(u32 addr)
200} 205}
201 206
202static inline void 207static inline void
203__ixp4xx_readsw(u32 bus_addr, u16 *vaddr, u32 count) 208__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count)
204{ 209{
205 while (count--) 210 while (count--)
206 *vaddr++ = readw(bus_addr); 211 *vaddr++ = readw(bus_addr);
207} 212}
208 213
209static inline unsigned long 214static inline unsigned long
210__ixp4xx_readl(u32 addr) 215__ixp4xx_readl(const volatile void __iomem *p)
211{ 216{
217 u32 addr = (u32)p;
212 u32 data; 218 u32 data;
213 219
214 if (addr >= VMALLOC_START) 220 if (addr >= VMALLOC_START)
@@ -221,7 +227,7 @@ __ixp4xx_readl(u32 addr)
221} 227}
222 228
223static inline void 229static inline void
224__ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count) 230__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
225{ 231{
226 while (count--) 232 while (count--)
227 *vaddr++ = readl(bus_addr); 233 *vaddr++ = readl(bus_addr);
@@ -239,7 +245,7 @@ __ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count)
239 eth_copy_and_sum((s),__mem_pci(c),(l),(b)) 245 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
240 246
241static inline int 247static inline int
242check_signature(unsigned long bus_addr, const unsigned char *signature, 248check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
243 int length) 249 int length)
244{ 250{
245 int retval = 0; 251 int retval = 0;
@@ -389,7 +395,7 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
389#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ 395#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \
390 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) 396 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
391static inline unsigned int 397static inline unsigned int
392__ixp4xx_ioread8(void __iomem *addr) 398__ixp4xx_ioread8(const void __iomem *addr)
393{ 399{
394 unsigned long port = (unsigned long __force)addr; 400 unsigned long port = (unsigned long __force)addr;
395 if (__is_io_address(port)) 401 if (__is_io_address(port))
@@ -398,12 +404,12 @@ __ixp4xx_ioread8(void __iomem *addr)
398#ifndef CONFIG_IXP4XX_INDIRECT_PCI 404#ifndef CONFIG_IXP4XX_INDIRECT_PCI
399 return (unsigned int)__raw_readb(port); 405 return (unsigned int)__raw_readb(port);
400#else 406#else
401 return (unsigned int)__ixp4xx_readb(port); 407 return (unsigned int)__ixp4xx_readb(addr);
402#endif 408#endif
403} 409}
404 410
405static inline void 411static inline void
406__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) 412__ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
407{ 413{
408 unsigned long port = (unsigned long __force)addr; 414 unsigned long port = (unsigned long __force)addr;
409 if (__is_io_address(port)) 415 if (__is_io_address(port))
@@ -412,12 +418,12 @@ __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
412#ifndef CONFIG_IXP4XX_INDIRECT_PCI 418#ifndef CONFIG_IXP4XX_INDIRECT_PCI
413 __raw_readsb(addr, vaddr, count); 419 __raw_readsb(addr, vaddr, count);
414#else 420#else
415 __ixp4xx_readsb(port, vaddr, count); 421 __ixp4xx_readsb(addr, vaddr, count);
416#endif 422#endif
417} 423}
418 424
419static inline unsigned int 425static inline unsigned int
420__ixp4xx_ioread16(void __iomem *addr) 426__ixp4xx_ioread16(const void __iomem *addr)
421{ 427{
422 unsigned long port = (unsigned long __force)addr; 428 unsigned long port = (unsigned long __force)addr;
423 if (__is_io_address(port)) 429 if (__is_io_address(port))
@@ -426,12 +432,12 @@ __ixp4xx_ioread16(void __iomem *addr)
426#ifndef CONFIG_IXP4XX_INDIRECT_PCI 432#ifndef CONFIG_IXP4XX_INDIRECT_PCI
427 return le16_to_cpu(__raw_readw((u32)port)); 433 return le16_to_cpu(__raw_readw((u32)port));
428#else 434#else
429 return (unsigned int)__ixp4xx_readw((u32)port); 435 return (unsigned int)__ixp4xx_readw(addr);
430#endif 436#endif
431} 437}
432 438
433static inline void 439static inline void
434__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) 440__ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count)
435{ 441{
436 unsigned long port = (unsigned long __force)addr; 442 unsigned long port = (unsigned long __force)addr;
437 if (__is_io_address(port)) 443 if (__is_io_address(port))
@@ -440,12 +446,12 @@ __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
440#ifndef CONFIG_IXP4XX_INDIRECT_PCI 446#ifndef CONFIG_IXP4XX_INDIRECT_PCI
441 __raw_readsw(addr, vaddr, count); 447 __raw_readsw(addr, vaddr, count);
442#else 448#else
443 __ixp4xx_readsw(port, vaddr, count); 449 __ixp4xx_readsw(addr, vaddr, count);
444#endif 450#endif
445} 451}
446 452
447static inline unsigned int 453static inline unsigned int
448__ixp4xx_ioread32(void __iomem *addr) 454__ixp4xx_ioread32(const void __iomem *addr)
449{ 455{
450 unsigned long port = (unsigned long __force)addr; 456 unsigned long port = (unsigned long __force)addr;
451 if (__is_io_address(port)) 457 if (__is_io_address(port))
@@ -454,13 +460,13 @@ __ixp4xx_ioread32(void __iomem *addr)
454#ifndef CONFIG_IXP4XX_INDIRECT_PCI 460#ifndef CONFIG_IXP4XX_INDIRECT_PCI
455 return le32_to_cpu(__raw_readl((u32)port)); 461 return le32_to_cpu(__raw_readl((u32)port));
456#else 462#else
457 return (unsigned int)__ixp4xx_readl((u32)port); 463 return (unsigned int)__ixp4xx_readl(addr);
458#endif 464#endif
459 } 465 }
460} 466}
461 467
462static inline void 468static inline void
463__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) 469__ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count)
464{ 470{
465 unsigned long port = (unsigned long __force)addr; 471 unsigned long port = (unsigned long __force)addr;
466 if (__is_io_address(port)) 472 if (__is_io_address(port))
@@ -469,7 +475,7 @@ __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
469#ifndef CONFIG_IXP4XX_INDIRECT_PCI 475#ifndef CONFIG_IXP4XX_INDIRECT_PCI
470 __raw_readsl(addr, vaddr, count); 476 __raw_readsl(addr, vaddr, count);
471#else 477#else
472 __ixp4xx_readsl(port, vaddr, count); 478 __ixp4xx_readsl(addr, vaddr, count);
473#endif 479#endif
474} 480}
475 481
@@ -483,7 +489,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem *addr)
483#ifndef CONFIG_IXP4XX_INDIRECT_PCI 489#ifndef CONFIG_IXP4XX_INDIRECT_PCI
484 __raw_writeb(value, port); 490 __raw_writeb(value, port);
485#else 491#else
486 __ixp4xx_writeb(value, port); 492 __ixp4xx_writeb(value, addr);
487#endif 493#endif
488} 494}
489 495
@@ -497,7 +503,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count)
497#ifndef CONFIG_IXP4XX_INDIRECT_PCI 503#ifndef CONFIG_IXP4XX_INDIRECT_PCI
498 __raw_writesb(addr, vaddr, count); 504 __raw_writesb(addr, vaddr, count);
499#else 505#else
500 __ixp4xx_writesb(port, vaddr, count); 506 __ixp4xx_writesb(addr, vaddr, count);
501#endif 507#endif
502} 508}
503 509
@@ -511,7 +517,7 @@ __ixp4xx_iowrite16(u16 value, void __iomem *addr)
511#ifndef CONFIG_IXP4XX_INDIRECT_PCI 517#ifndef CONFIG_IXP4XX_INDIRECT_PCI
512 __raw_writew(cpu_to_le16(value), addr); 518 __raw_writew(cpu_to_le16(value), addr);
513#else 519#else
514 __ixp4xx_writew(value, port); 520 __ixp4xx_writew(value, addr);
515#endif 521#endif
516} 522}
517 523
@@ -525,7 +531,7 @@ __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count)
525#ifndef CONFIG_IXP4XX_INDIRECT_PCI 531#ifndef CONFIG_IXP4XX_INDIRECT_PCI
526 __raw_writesw(addr, vaddr, count); 532 __raw_writesw(addr, vaddr, count);
527#else 533#else
528 __ixp4xx_writesw(port, vaddr, count); 534 __ixp4xx_writesw(addr, vaddr, count);
529#endif 535#endif
530} 536}
531 537
@@ -539,7 +545,7 @@ __ixp4xx_iowrite32(u32 value, void __iomem *addr)
539#ifndef CONFIG_IXP4XX_INDIRECT_PCI 545#ifndef CONFIG_IXP4XX_INDIRECT_PCI
540 __raw_writel(cpu_to_le32(value), port); 546 __raw_writel(cpu_to_le32(value), port);
541#else 547#else
542 __ixp4xx_writel(value, port); 548 __ixp4xx_writel(value, addr);
543#endif 549#endif
544} 550}
545 551
@@ -553,7 +559,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
553#ifndef CONFIG_IXP4XX_INDIRECT_PCI 559#ifndef CONFIG_IXP4XX_INDIRECT_PCI
554 __raw_writesl(addr, vaddr, count); 560 __raw_writesl(addr, vaddr, count);
555#else 561#else
556 __ixp4xx_writesl(port, vaddr, count); 562 __ixp4xx_writesl(addr, vaddr, count);
557#endif 563#endif
558} 564}
559 565
diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h
index 99667d5cc617..ed370abb638f 100644
--- a/include/asm-arm/arch-realview/memory.h
+++ b/include/asm-arm/arch-realview/memory.h
@@ -23,7 +23,7 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#define PHYS_OFFSET (0x00000000UL) 26#define PHYS_OFFSET UL(0x00000000)
27 27
28/* 28/*
29 * Virtual view <-> DMA view memory address translations 29 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/cpu.h b/include/asm-arm/cpu.h
index fcbdd40cb667..751bc7462074 100644
--- a/include/asm-arm/cpu.h
+++ b/include/asm-arm/cpu.h
@@ -16,6 +16,7 @@
16struct cpuinfo_arm { 16struct cpuinfo_arm {
17 struct cpu cpu; 17 struct cpu cpu;
18#ifdef CONFIG_SMP 18#ifdef CONFIG_SMP
19 struct task_struct *idle;
19 unsigned int loops_per_jiffy; 20 unsigned int loops_per_jiffy;
20#endif 21#endif
21}; 22};
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index f97912fbb10f..59975ee43cf1 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -47,5 +47,6 @@ struct irqaction;
47struct pt_regs; 47struct pt_regs;
48int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); 48int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
49 49
50extern void migrate_irqs(void);
50#endif 51#endif
51 52
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index dbb4d859c586..551cd3c3093c 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -66,4 +66,14 @@ struct secondary_data {
66}; 66};
67extern struct secondary_data secondary_data; 67extern struct secondary_data secondary_data;
68 68
69extern int __cpu_disable(void);
70extern int mach_cpu_disable(unsigned int cpu);
71
72extern void __cpu_die(unsigned int cpu);
73extern void cpu_die(void);
74
75extern void platform_cpu_die(unsigned int cpu);
76extern int platform_cpu_kill(unsigned int cpu);
77extern void platform_cpu_enable(unsigned int cpu);
78
69#endif /* ifndef __ASM_ARM_SMP_H */ 79#endif /* ifndef __ASM_ARM_SMP_H */
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index cb4906b45555..6ed4f916b166 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -80,7 +80,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
80 */ 80 */
81#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0) 81#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0)
82 82
83static inline void __raw_write_lock(rwlock_t *rw) 83static inline void __raw_write_lock(raw_rwlock_t *rw)
84{ 84{
85 unsigned long tmp; 85 unsigned long tmp;
86 86
@@ -97,7 +97,7 @@ static inline void __raw_write_lock(rwlock_t *rw)
97 smp_mb(); 97 smp_mb();
98} 98}
99 99
100static inline int __raw_write_trylock(rwlock_t *rw) 100static inline int __raw_write_trylock(raw_rwlock_t *rw)
101{ 101{
102 unsigned long tmp; 102 unsigned long tmp;
103 103
@@ -157,7 +157,7 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
157 smp_mb(); 157 smp_mb();
158} 158}
159 159
160static inline void __raw_read_unlock(rwlock_t *rw) 160static inline void __raw_read_unlock(raw_rwlock_t *rw)
161{ 161{
162 unsigned long tmp, tmp2; 162 unsigned long tmp, tmp2;
163 163