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authorGlauber de Oliveira Costa <gcosta@redhat.com>2008-01-30 07:31:31 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:31:31 -0500
commitca241c75037b32e0216a68e39ad2801d04fa1f87 (patch)
treebe6b42124c9ead67999ee7ec810f9b1f1e25675d
parent0ccb8acc51693a2aef0f38024943808046d81251 (diff)
x86: unify tss_struct
Although slighly different, the tss_struct is very similar in x86_64 and i386. The really different part, which matchs the hardware vision of it, is now called x86_hw_tss, and each of the architectures provides yours. It's then used as a field in the outter tss_struct. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/x86/kernel/asm-offsets_64.c2
-rw-r--r--arch/x86/kernel/doublefault_32.c2
-rw-r--r--arch/x86/kernel/process_64.c2
-rw-r--r--arch/x86/kernel/setup64.c4
-rw-r--r--arch/x86/kernel/smpboot_64.c2
-rw-r--r--include/asm-x86/lguest.h2
-rw-r--r--include/asm-x86/processor.h77
-rw-r--r--include/asm-x86/processor_32.h62
-rw-r--r--include/asm-x86/processor_64.h35
9 files changed, 85 insertions, 103 deletions
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index a05428764314..2b32719a3fea 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -110,7 +110,7 @@ int main(void)
110 ENTRY(cr8); 110 ENTRY(cr8);
111 BLANK(); 111 BLANK();
112#undef ENTRY 112#undef ENTRY
113 DEFINE(TSS_ist, offsetof(struct tss_struct, ist)); 113 DEFINE(TSS_ist, offsetof(struct tss_struct, x86_tss.ist));
114 BLANK(); 114 BLANK();
115 DEFINE(crypto_tfm_ctx_offset, offsetof(struct crypto_tfm, __crt_ctx)); 115 DEFINE(crypto_tfm_ctx_offset, offsetof(struct crypto_tfm, __crt_ctx));
116 BLANK(); 116 BLANK();
diff --git a/arch/x86/kernel/doublefault_32.c b/arch/x86/kernel/doublefault_32.c
index d16122a8e4eb..a47798b59f07 100644
--- a/arch/x86/kernel/doublefault_32.c
+++ b/arch/x86/kernel/doublefault_32.c
@@ -33,7 +33,7 @@ static void doublefault_fn(void)
33 printk(KERN_EMERG "double fault, tss at %08lx\n", tss); 33 printk(KERN_EMERG "double fault, tss at %08lx\n", tss);
34 34
35 if (ptr_ok(tss)) { 35 if (ptr_ok(tss)) {
36 struct i386_hw_tss *t = (struct i386_hw_tss *)tss; 36 struct x86_hw_tss *t = (struct x86_hw_tss *)tss;
37 37
38 printk(KERN_EMERG "eip = %08lx, esp = %08lx\n", 38 printk(KERN_EMERG "eip = %08lx, esp = %08lx\n",
39 t->ip, t->sp); 39 t->ip, t->sp);
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 836a71adfa11..af56104b73ff 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -639,7 +639,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
639 /* 639 /*
640 * Reload esp0, LDT and the page table pointer: 640 * Reload esp0, LDT and the page table pointer:
641 */ 641 */
642 tss->sp0 = next->sp0; 642 tss->x86_tss.sp0 = next->sp0;
643 643
644 /* 644 /*
645 * Switch DS and ES. 645 * Switch DS and ES.
diff --git a/arch/x86/kernel/setup64.c b/arch/x86/kernel/setup64.c
index 05cafcb94109..3b0ffa31f3c0 100644
--- a/arch/x86/kernel/setup64.c
+++ b/arch/x86/kernel/setup64.c
@@ -258,10 +258,10 @@ void __cpuinit cpu_init (void)
258 v, cpu); 258 v, cpu);
259 } 259 }
260 estacks += PAGE_SIZE << order[v]; 260 estacks += PAGE_SIZE << order[v];
261 orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks; 261 orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
262 } 262 }
263 263
264 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap); 264 t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
265 /* 265 /*
266 * <= is required because the CPU will access up to 266 * <= is required because the CPU will access up to
267 * 8 bits beyond the end of the IO permission bitmap. 267 * 8 bits beyond the end of the IO permission bitmap.
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c
index 4c03ddccd681..2ea02a71b644 100644
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -614,7 +614,7 @@ do_rest:
614 start_rip = setup_trampoline(); 614 start_rip = setup_trampoline();
615 615
616 init_rsp = c_idle.idle->thread.sp; 616 init_rsp = c_idle.idle->thread.sp;
617 per_cpu(init_tss,cpu).sp0 = init_rsp; 617 per_cpu(init_tss, cpu).x86_tss.sp0 = init_rsp;
618 initial_code = start_secondary; 618 initial_code = start_secondary;
619 clear_tsk_thread_flag(c_idle.idle, TIF_FORK); 619 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
620 620
diff --git a/include/asm-x86/lguest.h b/include/asm-x86/lguest.h
index 3585a1628b59..1c8367a692f6 100644
--- a/include/asm-x86/lguest.h
+++ b/include/asm-x86/lguest.h
@@ -51,7 +51,7 @@ struct lguest_ro_state
51 /* Fields which are used when guest is running. */ 51 /* Fields which are used when guest is running. */
52 struct desc_ptr guest_idt_desc; 52 struct desc_ptr guest_idt_desc;
53 struct desc_ptr guest_gdt_desc; 53 struct desc_ptr guest_gdt_desc;
54 struct i386_hw_tss guest_tss; 54 struct x86_hw_tss guest_tss;
55 struct desc_struct guest_idt[IDT_ENTRIES]; 55 struct desc_struct guest_idt[IDT_ENTRIES];
56 struct desc_struct guest_gdt[GDT_ENTRIES]; 56 struct desc_struct guest_gdt[GDT_ENTRIES];
57}; 57};
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 3deb5ba55f55..cede9ad3dc6e 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -8,6 +8,7 @@ struct task_struct;
8struct mm_struct; 8struct mm_struct;
9 9
10#include <asm/page.h> 10#include <asm/page.h>
11#include <asm/percpu.h>
11#include <asm/system.h> 12#include <asm/system.h>
12 13
13/* 14/*
@@ -39,6 +40,82 @@ static inline void load_cr3(pgd_t *pgdir)
39} 40}
40 41
41#ifdef CONFIG_X86_32 42#ifdef CONFIG_X86_32
43/* This is the TSS defined by the hardware. */
44struct x86_hw_tss {
45 unsigned short back_link, __blh;
46 unsigned long sp0;
47 unsigned short ss0, __ss0h;
48 unsigned long sp1;
49 unsigned short ss1, __ss1h; /* ss1 caches MSR_IA32_SYSENTER_CS */
50 unsigned long sp2;
51 unsigned short ss2, __ss2h;
52 unsigned long __cr3;
53 unsigned long ip;
54 unsigned long flags;
55 unsigned long ax, cx, dx, bx;
56 unsigned long sp, bp, si, di;
57 unsigned short es, __esh;
58 unsigned short cs, __csh;
59 unsigned short ss, __ssh;
60 unsigned short ds, __dsh;
61 unsigned short fs, __fsh;
62 unsigned short gs, __gsh;
63 unsigned short ldt, __ldth;
64 unsigned short trace, io_bitmap_base;
65} __attribute__((packed));
66#else
67struct x86_hw_tss {
68 u32 reserved1;
69 u64 sp0;
70 u64 sp1;
71 u64 sp2;
72 u64 reserved2;
73 u64 ist[7];
74 u32 reserved3;
75 u32 reserved4;
76 u16 reserved5;
77 u16 io_bitmap_base;
78} __attribute__((packed)) ____cacheline_aligned;
79#endif
80
81/*
82 * Size of io_bitmap.
83 */
84#define IO_BITMAP_BITS 65536
85#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
86#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
87#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
88#define INVALID_IO_BITMAP_OFFSET 0x8000
89#define INVALID_IO_BITMAP_OFFSET_LAZY 0x9000
90
91struct tss_struct {
92 struct x86_hw_tss x86_tss;
93
94 /*
95 * The extra 1 is there because the CPU will access an
96 * additional byte beyond the end of the IO permission
97 * bitmap. The extra byte must be all 1 bits, and must
98 * be within the limit.
99 */
100 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
101 /*
102 * Cache the current maximum and the last task that used the bitmap:
103 */
104 unsigned long io_bitmap_max;
105 struct thread_struct *io_bitmap_owner;
106 /*
107 * pads the TSS to be cacheline-aligned (size is 0x100)
108 */
109 unsigned long __cacheline_filler[35];
110 /*
111 * .. and then another 0x100 bytes for emergency kernel stack
112 */
113 unsigned long stack[64];
114} __attribute__((packed));
115
116DECLARE_PER_CPU(struct tss_struct, init_tss);
117
118#ifdef CONFIG_X86_32
42# include "processor_32.h" 119# include "processor_32.h"
43#else 120#else
44# include "processor_64.h" 121# include "processor_64.h"
diff --git a/include/asm-x86/processor_32.h b/include/asm-x86/processor_32.h
index 6cd2149dcbad..57b345bc3c74 100644
--- a/include/asm-x86/processor_32.h
+++ b/include/asm-x86/processor_32.h
@@ -81,7 +81,6 @@ struct cpuinfo_x86 {
81extern struct cpuinfo_x86 boot_cpu_data; 81extern struct cpuinfo_x86 boot_cpu_data;
82extern struct cpuinfo_x86 new_cpu_data; 82extern struct cpuinfo_x86 new_cpu_data;
83extern struct tss_struct doublefault_tss; 83extern struct tss_struct doublefault_tss;
84DECLARE_PER_CPU(struct tss_struct, init_tss);
85 84
86#ifdef CONFIG_SMP 85#ifdef CONFIG_SMP
87DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info); 86DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info);
@@ -123,16 +122,6 @@ extern unsigned int mca_pentium_flag;
123#define TASK_SIZE (PAGE_OFFSET) 122#define TASK_SIZE (PAGE_OFFSET)
124 123
125 124
126/*
127 * Size of io_bitmap.
128 */
129#define IO_BITMAP_BITS 65536
130#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
131#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
132#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
133#define INVALID_IO_BITMAP_OFFSET 0x8000
134#define INVALID_IO_BITMAP_OFFSET_LAZY 0x9000
135
136struct i387_fsave_struct { 125struct i387_fsave_struct {
137 long cwd; 126 long cwd;
138 long swd; 127 long swd;
@@ -185,57 +174,6 @@ typedef struct {
185 unsigned long seg; 174 unsigned long seg;
186} mm_segment_t; 175} mm_segment_t;
187 176
188struct thread_struct;
189
190/* This is the TSS defined by the hardware. */
191struct i386_hw_tss {
192 unsigned short back_link,__blh;
193 unsigned long sp0;
194 unsigned short ss0,__ss0h;
195 unsigned long sp1;
196 unsigned short ss1,__ss1h; /* ss1 is used to cache MSR_IA32_SYSENTER_CS */
197 unsigned long sp2;
198 unsigned short ss2,__ss2h;
199 unsigned long __cr3;
200 unsigned long ip;
201 unsigned long flags;
202 unsigned long ax, cx, dx, bx;
203 unsigned long sp, bp, si, di;
204 unsigned short es, __esh;
205 unsigned short cs, __csh;
206 unsigned short ss, __ssh;
207 unsigned short ds, __dsh;
208 unsigned short fs, __fsh;
209 unsigned short gs, __gsh;
210 unsigned short ldt, __ldth;
211 unsigned short trace, io_bitmap_base;
212} __attribute__((packed));
213
214struct tss_struct {
215 struct i386_hw_tss x86_tss;
216
217 /*
218 * The extra 1 is there because the CPU will access an
219 * additional byte beyond the end of the IO permission
220 * bitmap. The extra byte must be all 1 bits, and must
221 * be within the limit.
222 */
223 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
224 /*
225 * Cache the current maximum and the last task that used the bitmap:
226 */
227 unsigned long io_bitmap_max;
228 struct thread_struct *io_bitmap_owner;
229 /*
230 * pads the TSS to be cacheline-aligned (size is 0x100)
231 */
232 unsigned long __cacheline_filler[35];
233 /*
234 * .. and then another 0x100 bytes for emergency kernel stack
235 */
236 unsigned long stack[64];
237} __attribute__((packed));
238
239#define ARCH_MIN_TASKALIGN 16 177#define ARCH_MIN_TASKALIGN 16
240 178
241struct thread_struct { 179struct thread_struct {
diff --git a/include/asm-x86/processor_64.h b/include/asm-x86/processor_64.h
index 1984a4a38b74..8d342c23ad14 100644
--- a/include/asm-x86/processor_64.h
+++ b/include/asm-x86/processor_64.h
@@ -91,14 +91,6 @@ extern void identify_cpu(struct cpuinfo_x86 *);
91#define TASK_SIZE (test_thread_flag(TIF_IA32) ? IA32_PAGE_OFFSET : TASK_SIZE64) 91#define TASK_SIZE (test_thread_flag(TIF_IA32) ? IA32_PAGE_OFFSET : TASK_SIZE64)
92#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? IA32_PAGE_OFFSET : TASK_SIZE64) 92#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? IA32_PAGE_OFFSET : TASK_SIZE64)
93 93
94/*
95 * Size of io_bitmap.
96 */
97#define IO_BITMAP_BITS 65536
98#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
99#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
100#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
101#define INVALID_IO_BITMAP_OFFSET 0x8000
102 94
103struct i387_fxsave_struct { 95struct i387_fxsave_struct {
104 u16 cwd; 96 u16 cwd;
@@ -118,32 +110,7 @@ union i387_union {
118 struct i387_fxsave_struct fxsave; 110 struct i387_fxsave_struct fxsave;
119}; 111};
120 112
121struct tss_struct {
122 u32 reserved1;
123 u64 sp0;
124 u64 sp1;
125 u64 sp2;
126 u64 reserved2;
127 u64 ist[7];
128 u32 reserved3;
129 u32 reserved4;
130 u16 reserved5;
131 u16 io_bitmap_base;
132 /*
133 * The extra 1 is there because the CPU will access an
134 * additional byte beyond the end of the IO permission
135 * bitmap. The extra byte must be all 1 bits, and must
136 * be within the limit. Thus we have:
137 *
138 * 128 bytes, the bitmap itself, for ports 0..0x3ff
139 * 8 bytes, for an extra "long" of ~0UL
140 */
141 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
142} __attribute__((packed)) ____cacheline_aligned;
143
144
145extern struct cpuinfo_x86 boot_cpu_data; 113extern struct cpuinfo_x86 boot_cpu_data;
146DECLARE_PER_CPU(struct tss_struct,init_tss);
147/* Save the original ist values for checking stack pointers during debugging */ 114/* Save the original ist values for checking stack pointers during debugging */
148struct orig_ist { 115struct orig_ist {
149 unsigned long ist[7]; 116 unsigned long ist[7];
@@ -195,7 +162,7 @@ struct thread_struct {
195} 162}
196 163
197#define INIT_TSS { \ 164#define INIT_TSS { \
198 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \ 165 .x86_tss.sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
199} 166}
200 167
201#define INIT_MMAP \ 168#define INIT_MMAP \