diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2009-10-23 04:29:33 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-10-24 07:26:55 -0400 |
commit | c9597d4f89565b6562bd3026adbe6eac6c317f47 (patch) | |
tree | d24481cb340c87ea21cbb174676fdfb13f8e2ae6 | |
parent | 3473a5b11827fa0f84f18b79373a26290798f54a (diff) |
sfc: Merge sfe4001.c into falcon_boards.c
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/sfc/Makefile | 2 | ||||
-rw-r--r-- | drivers/net/sfc/boards.h | 7 | ||||
-rw-r--r-- | drivers/net/sfc/falcon_boards.c | 419 | ||||
-rw-r--r-- | drivers/net/sfc/sfe4001.c | 435 |
4 files changed, 420 insertions, 443 deletions
diff --git a/drivers/net/sfc/Makefile b/drivers/net/sfc/Makefile index eb217d34e24c..9c98d06ada7d 100644 --- a/drivers/net/sfc/Makefile +++ b/drivers/net/sfc/Makefile | |||
@@ -1,6 +1,6 @@ | |||
1 | sfc-y += efx.o falcon.o tx.o rx.o falcon_gmac.o \ | 1 | sfc-y += efx.o falcon.o tx.o rx.o falcon_gmac.o \ |
2 | falcon_xmac.o selftest.o ethtool.o xfp_phy.o \ | 2 | falcon_xmac.o selftest.o ethtool.o xfp_phy.o \ |
3 | mdio_10g.o tenxpress.o falcon_boards.o sfe4001.o | 3 | mdio_10g.o tenxpress.o falcon_boards.o |
4 | sfc-$(CONFIG_SFC_MTD) += mtd.o | 4 | sfc-$(CONFIG_SFC_MTD) += mtd.o |
5 | 5 | ||
6 | obj-$(CONFIG_SFC) += sfc.o | 6 | obj-$(CONFIG_SFC) += sfc.o |
diff --git a/drivers/net/sfc/boards.h b/drivers/net/sfc/boards.h index c1a57106bd13..aaa72b0fea97 100644 --- a/drivers/net/sfc/boards.h +++ b/drivers/net/sfc/boards.h | |||
@@ -10,13 +10,6 @@ | |||
10 | #ifndef EFX_BOARDS_H | 10 | #ifndef EFX_BOARDS_H |
11 | #define EFX_BOARDS_H | 11 | #define EFX_BOARDS_H |
12 | 12 | ||
13 | #define FALCON_BOARD_SFE4001 0x01 | ||
14 | |||
15 | extern void falcon_probe_board(struct efx_nic *efx, u16 revision_info); | 13 | extern void falcon_probe_board(struct efx_nic *efx, u16 revision_info); |
16 | 14 | ||
17 | /* SFE4001 (10GBASE-T) */ | ||
18 | extern int sfe4001_init(struct efx_nic *efx); | ||
19 | /* SFN4111T (100/1000/10GBASE-T) */ | ||
20 | extern int sfn4111t_init(struct efx_nic *efx); | ||
21 | |||
22 | #endif | 15 | #endif |
diff --git a/drivers/net/sfc/falcon_boards.c b/drivers/net/sfc/falcon_boards.c index 431b74c4a96e..cae165665110 100644 --- a/drivers/net/sfc/falcon_boards.c +++ b/drivers/net/sfc/falcon_boards.c | |||
@@ -7,10 +7,15 @@ | |||
7 | * by the Free Software Foundation, incorporated herein by reference. | 7 | * by the Free Software Foundation, incorporated herein by reference. |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <linux/rtnetlink.h> | ||
11 | |||
10 | #include "net_driver.h" | 12 | #include "net_driver.h" |
11 | #include "phy.h" | 13 | #include "phy.h" |
12 | #include "boards.h" | 14 | #include "boards.h" |
13 | #include "efx.h" | 15 | #include "efx.h" |
16 | #include "falcon.h" | ||
17 | #include "falcon_hwdefs.h" | ||
18 | #include "falcon_io.h" | ||
14 | #include "workarounds.h" | 19 | #include "workarounds.h" |
15 | 20 | ||
16 | /* Macros for unpacking the board revision */ | 21 | /* Macros for unpacking the board revision */ |
@@ -20,6 +25,7 @@ | |||
20 | #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf) | 25 | #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf) |
21 | 26 | ||
22 | /* Board types */ | 27 | /* Board types */ |
28 | #define FALCON_BOARD_SFE4001 0x01 | ||
23 | #define FALCON_BOARD_SFE4002 0x02 | 29 | #define FALCON_BOARD_SFE4002 0x02 |
24 | #define FALCON_BOARD_SFN4111T 0x51 | 30 | #define FALCON_BOARD_SFN4111T 0x51 |
25 | #define FALCON_BOARD_SFN4112F 0x52 | 31 | #define FALCON_BOARD_SFN4112F 0x52 |
@@ -155,6 +161,419 @@ static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask) | |||
155 | #endif /* CONFIG_SENSORS_LM87 */ | 161 | #endif /* CONFIG_SENSORS_LM87 */ |
156 | 162 | ||
157 | /***************************************************************************** | 163 | /***************************************************************************** |
164 | * Support for the SFE4001 and SFN4111T NICs. | ||
165 | * | ||
166 | * The SFE4001 does not power-up fully at reset due to its high power | ||
167 | * consumption. We control its power via a PCA9539 I/O expander. | ||
168 | * Both boards have a MAX6647 temperature monitor which we expose to | ||
169 | * the lm90 driver. | ||
170 | * | ||
171 | * This also provides minimal support for reflashing the PHY, which is | ||
172 | * initiated by resetting it with the FLASH_CFG_1 pin pulled down. | ||
173 | * On SFE4001 rev A2 and later this is connected to the 3V3X output of | ||
174 | * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3. | ||
175 | * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually | ||
176 | * exclusive with the network device being open. | ||
177 | */ | ||
178 | |||
179 | /************************************************************************** | ||
180 | * Support for I2C IO Expander device on SFE40001 | ||
181 | */ | ||
182 | #define PCA9539 0x74 | ||
183 | |||
184 | #define P0_IN 0x00 | ||
185 | #define P0_OUT 0x02 | ||
186 | #define P0_INVERT 0x04 | ||
187 | #define P0_CONFIG 0x06 | ||
188 | |||
189 | #define P0_EN_1V0X_LBN 0 | ||
190 | #define P0_EN_1V0X_WIDTH 1 | ||
191 | #define P0_EN_1V2_LBN 1 | ||
192 | #define P0_EN_1V2_WIDTH 1 | ||
193 | #define P0_EN_2V5_LBN 2 | ||
194 | #define P0_EN_2V5_WIDTH 1 | ||
195 | #define P0_EN_3V3X_LBN 3 | ||
196 | #define P0_EN_3V3X_WIDTH 1 | ||
197 | #define P0_EN_5V_LBN 4 | ||
198 | #define P0_EN_5V_WIDTH 1 | ||
199 | #define P0_SHORTEN_JTAG_LBN 5 | ||
200 | #define P0_SHORTEN_JTAG_WIDTH 1 | ||
201 | #define P0_X_TRST_LBN 6 | ||
202 | #define P0_X_TRST_WIDTH 1 | ||
203 | #define P0_DSP_RESET_LBN 7 | ||
204 | #define P0_DSP_RESET_WIDTH 1 | ||
205 | |||
206 | #define P1_IN 0x01 | ||
207 | #define P1_OUT 0x03 | ||
208 | #define P1_INVERT 0x05 | ||
209 | #define P1_CONFIG 0x07 | ||
210 | |||
211 | #define P1_AFE_PWD_LBN 0 | ||
212 | #define P1_AFE_PWD_WIDTH 1 | ||
213 | #define P1_DSP_PWD25_LBN 1 | ||
214 | #define P1_DSP_PWD25_WIDTH 1 | ||
215 | #define P1_RESERVED_LBN 2 | ||
216 | #define P1_RESERVED_WIDTH 2 | ||
217 | #define P1_SPARE_LBN 4 | ||
218 | #define P1_SPARE_WIDTH 4 | ||
219 | |||
220 | /* Temperature Sensor */ | ||
221 | #define MAX664X_REG_RSL 0x02 | ||
222 | #define MAX664X_REG_WLHO 0x0B | ||
223 | |||
224 | static void sfe4001_poweroff(struct efx_nic *efx) | ||
225 | { | ||
226 | struct i2c_client *ioexp_client = efx->board_info.ioexp_client; | ||
227 | struct i2c_client *hwmon_client = efx->board_info.hwmon_client; | ||
228 | |||
229 | /* Turn off all power rails and disable outputs */ | ||
230 | i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff); | ||
231 | i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff); | ||
232 | i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff); | ||
233 | |||
234 | /* Clear any over-temperature alert */ | ||
235 | i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL); | ||
236 | } | ||
237 | |||
238 | static int sfe4001_poweron(struct efx_nic *efx) | ||
239 | { | ||
240 | struct i2c_client *hwmon_client = efx->board_info.hwmon_client; | ||
241 | struct i2c_client *ioexp_client = efx->board_info.ioexp_client; | ||
242 | unsigned int i, j; | ||
243 | int rc; | ||
244 | u8 out; | ||
245 | |||
246 | /* Clear any previous over-temperature alert */ | ||
247 | rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL); | ||
248 | if (rc < 0) | ||
249 | return rc; | ||
250 | |||
251 | /* Enable port 0 and port 1 outputs on IO expander */ | ||
252 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00); | ||
253 | if (rc) | ||
254 | return rc; | ||
255 | rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, | ||
256 | 0xff & ~(1 << P1_SPARE_LBN)); | ||
257 | if (rc) | ||
258 | goto fail_on; | ||
259 | |||
260 | /* If PHY power is on, turn it all off and wait 1 second to | ||
261 | * ensure a full reset. | ||
262 | */ | ||
263 | rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT); | ||
264 | if (rc < 0) | ||
265 | goto fail_on; | ||
266 | out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) | | ||
267 | (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) | | ||
268 | (0 << P0_EN_1V0X_LBN)); | ||
269 | if (rc != out) { | ||
270 | EFX_INFO(efx, "power-cycling PHY\n"); | ||
271 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); | ||
272 | if (rc) | ||
273 | goto fail_on; | ||
274 | schedule_timeout_uninterruptible(HZ); | ||
275 | } | ||
276 | |||
277 | for (i = 0; i < 20; ++i) { | ||
278 | /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */ | ||
279 | out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) | | ||
280 | (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) | | ||
281 | (1 << P0_X_TRST_LBN)); | ||
282 | if (efx->phy_mode & PHY_MODE_SPECIAL) | ||
283 | out |= 1 << P0_EN_3V3X_LBN; | ||
284 | |||
285 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); | ||
286 | if (rc) | ||
287 | goto fail_on; | ||
288 | msleep(10); | ||
289 | |||
290 | /* Turn on 1V power rail */ | ||
291 | out &= ~(1 << P0_EN_1V0X_LBN); | ||
292 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); | ||
293 | if (rc) | ||
294 | goto fail_on; | ||
295 | |||
296 | EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i); | ||
297 | |||
298 | /* In flash config mode, DSP does not turn on AFE, so | ||
299 | * just wait 1 second. | ||
300 | */ | ||
301 | if (efx->phy_mode & PHY_MODE_SPECIAL) { | ||
302 | schedule_timeout_uninterruptible(HZ); | ||
303 | return 0; | ||
304 | } | ||
305 | |||
306 | for (j = 0; j < 10; ++j) { | ||
307 | msleep(100); | ||
308 | |||
309 | /* Check DSP has asserted AFE power line */ | ||
310 | rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN); | ||
311 | if (rc < 0) | ||
312 | goto fail_on; | ||
313 | if (rc & (1 << P1_AFE_PWD_LBN)) | ||
314 | return 0; | ||
315 | } | ||
316 | } | ||
317 | |||
318 | EFX_INFO(efx, "timed out waiting for DSP boot\n"); | ||
319 | rc = -ETIMEDOUT; | ||
320 | fail_on: | ||
321 | sfe4001_poweroff(efx); | ||
322 | return rc; | ||
323 | } | ||
324 | |||
325 | static int sfn4111t_reset(struct efx_nic *efx) | ||
326 | { | ||
327 | efx_oword_t reg; | ||
328 | |||
329 | /* GPIO 3 and the GPIO register are shared with I2C, so block that */ | ||
330 | mutex_lock(&efx->i2c_adap.bus_lock); | ||
331 | |||
332 | /* Pull RST_N (GPIO 2) low then let it up again, setting the | ||
333 | * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the | ||
334 | * output enables; the output levels should always be 0 (low) | ||
335 | * and we rely on external pull-ups. */ | ||
336 | falcon_read(efx, ®, GPIO_CTL_REG_KER); | ||
337 | EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true); | ||
338 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | ||
339 | msleep(1000); | ||
340 | EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false); | ||
341 | EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, | ||
342 | !!(efx->phy_mode & PHY_MODE_SPECIAL)); | ||
343 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | ||
344 | msleep(1); | ||
345 | |||
346 | mutex_unlock(&efx->i2c_adap.bus_lock); | ||
347 | |||
348 | ssleep(1); | ||
349 | return 0; | ||
350 | } | ||
351 | |||
352 | static ssize_t show_phy_flash_cfg(struct device *dev, | ||
353 | struct device_attribute *attr, char *buf) | ||
354 | { | ||
355 | struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); | ||
356 | return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL)); | ||
357 | } | ||
358 | |||
359 | static ssize_t set_phy_flash_cfg(struct device *dev, | ||
360 | struct device_attribute *attr, | ||
361 | const char *buf, size_t count) | ||
362 | { | ||
363 | struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); | ||
364 | enum efx_phy_mode old_mode, new_mode; | ||
365 | int err; | ||
366 | |||
367 | rtnl_lock(); | ||
368 | old_mode = efx->phy_mode; | ||
369 | if (count == 0 || *buf == '0') | ||
370 | new_mode = old_mode & ~PHY_MODE_SPECIAL; | ||
371 | else | ||
372 | new_mode = PHY_MODE_SPECIAL; | ||
373 | if (old_mode == new_mode) { | ||
374 | err = 0; | ||
375 | } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) { | ||
376 | err = -EBUSY; | ||
377 | } else { | ||
378 | /* Reset the PHY, reconfigure the MAC and enable/disable | ||
379 | * MAC stats accordingly. */ | ||
380 | efx->phy_mode = new_mode; | ||
381 | if (new_mode & PHY_MODE_SPECIAL) | ||
382 | efx_stats_disable(efx); | ||
383 | if (efx->board_info.type == FALCON_BOARD_SFE4001) | ||
384 | err = sfe4001_poweron(efx); | ||
385 | else | ||
386 | err = sfn4111t_reset(efx); | ||
387 | efx_reconfigure_port(efx); | ||
388 | if (!(new_mode & PHY_MODE_SPECIAL)) | ||
389 | efx_stats_enable(efx); | ||
390 | } | ||
391 | rtnl_unlock(); | ||
392 | |||
393 | return err ? err : count; | ||
394 | } | ||
395 | |||
396 | static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg); | ||
397 | |||
398 | static void sfe4001_fini(struct efx_nic *efx) | ||
399 | { | ||
400 | EFX_INFO(efx, "%s\n", __func__); | ||
401 | |||
402 | device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
403 | sfe4001_poweroff(efx); | ||
404 | i2c_unregister_device(efx->board_info.ioexp_client); | ||
405 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
406 | } | ||
407 | |||
408 | static int sfe4001_check_hw(struct efx_nic *efx) | ||
409 | { | ||
410 | s32 status; | ||
411 | |||
412 | /* If XAUI link is up then do not monitor */ | ||
413 | if (EFX_WORKAROUND_7884(efx) && efx->mac_up) | ||
414 | return 0; | ||
415 | |||
416 | /* Check the powered status of the PHY. Lack of power implies that | ||
417 | * the MAX6647 has shut down power to it, probably due to a temp. | ||
418 | * alarm. Reading the power status rather than the MAX6647 status | ||
419 | * directly because the later is read-to-clear and would thus | ||
420 | * start to power up the PHY again when polled, causing us to blip | ||
421 | * the power undesirably. | ||
422 | * We know we can read from the IO expander because we did | ||
423 | * it during power-on. Assume failure now is bad news. */ | ||
424 | status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN); | ||
425 | if (status >= 0 && | ||
426 | (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0) | ||
427 | return 0; | ||
428 | |||
429 | /* Use board power control, not PHY power control */ | ||
430 | sfe4001_poweroff(efx); | ||
431 | efx->phy_mode = PHY_MODE_OFF; | ||
432 | |||
433 | return (status < 0) ? -EIO : -ERANGE; | ||
434 | } | ||
435 | |||
436 | static struct i2c_board_info sfe4001_hwmon_info = { | ||
437 | I2C_BOARD_INFO("max6647", 0x4e), | ||
438 | }; | ||
439 | |||
440 | /* This board uses an I2C expander to provider power to the PHY, which needs to | ||
441 | * be turned on before the PHY can be used. | ||
442 | * Context: Process context, rtnl lock held | ||
443 | */ | ||
444 | static int sfe4001_init(struct efx_nic *efx) | ||
445 | { | ||
446 | int rc; | ||
447 | |||
448 | #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE) | ||
449 | efx->board_info.hwmon_client = | ||
450 | i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info); | ||
451 | #else | ||
452 | efx->board_info.hwmon_client = | ||
453 | i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr); | ||
454 | #endif | ||
455 | if (!efx->board_info.hwmon_client) | ||
456 | return -EIO; | ||
457 | |||
458 | /* Raise board/PHY high limit from 85 to 90 degrees Celsius */ | ||
459 | rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client, | ||
460 | MAX664X_REG_WLHO, 90); | ||
461 | if (rc) | ||
462 | goto fail_hwmon; | ||
463 | |||
464 | efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539); | ||
465 | if (!efx->board_info.ioexp_client) { | ||
466 | rc = -EIO; | ||
467 | goto fail_hwmon; | ||
468 | } | ||
469 | |||
470 | /* 10Xpress has fixed-function LED pins, so there is no board-specific | ||
471 | * blink code. */ | ||
472 | efx->board_info.blink = tenxpress_phy_blink; | ||
473 | |||
474 | efx->board_info.monitor = sfe4001_check_hw; | ||
475 | efx->board_info.fini = sfe4001_fini; | ||
476 | |||
477 | if (efx->phy_mode & PHY_MODE_SPECIAL) { | ||
478 | /* PHY won't generate a 156.25 MHz clock and MAC stats fetch | ||
479 | * will fail. */ | ||
480 | efx_stats_disable(efx); | ||
481 | } | ||
482 | rc = sfe4001_poweron(efx); | ||
483 | if (rc) | ||
484 | goto fail_ioexp; | ||
485 | |||
486 | rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
487 | if (rc) | ||
488 | goto fail_on; | ||
489 | |||
490 | EFX_INFO(efx, "PHY is powered on\n"); | ||
491 | return 0; | ||
492 | |||
493 | fail_on: | ||
494 | sfe4001_poweroff(efx); | ||
495 | fail_ioexp: | ||
496 | i2c_unregister_device(efx->board_info.ioexp_client); | ||
497 | fail_hwmon: | ||
498 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
499 | return rc; | ||
500 | } | ||
501 | |||
502 | static int sfn4111t_check_hw(struct efx_nic *efx) | ||
503 | { | ||
504 | s32 status; | ||
505 | |||
506 | /* If XAUI link is up then do not monitor */ | ||
507 | if (EFX_WORKAROUND_7884(efx) && efx->mac_up) | ||
508 | return 0; | ||
509 | |||
510 | /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */ | ||
511 | status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client, | ||
512 | MAX664X_REG_RSL); | ||
513 | if (status < 0) | ||
514 | return -EIO; | ||
515 | if (status & 0x57) | ||
516 | return -ERANGE; | ||
517 | return 0; | ||
518 | } | ||
519 | |||
520 | static void sfn4111t_fini(struct efx_nic *efx) | ||
521 | { | ||
522 | EFX_INFO(efx, "%s\n", __func__); | ||
523 | |||
524 | device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
525 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
526 | } | ||
527 | |||
528 | static struct i2c_board_info sfn4111t_a0_hwmon_info = { | ||
529 | I2C_BOARD_INFO("max6647", 0x4e), | ||
530 | }; | ||
531 | |||
532 | static struct i2c_board_info sfn4111t_r5_hwmon_info = { | ||
533 | I2C_BOARD_INFO("max6646", 0x4d), | ||
534 | }; | ||
535 | |||
536 | static int sfn4111t_init(struct efx_nic *efx) | ||
537 | { | ||
538 | int i = 0; | ||
539 | int rc; | ||
540 | |||
541 | efx->board_info.hwmon_client = | ||
542 | i2c_new_device(&efx->i2c_adap, | ||
543 | (efx->board_info.minor < 5) ? | ||
544 | &sfn4111t_a0_hwmon_info : | ||
545 | &sfn4111t_r5_hwmon_info); | ||
546 | if (!efx->board_info.hwmon_client) | ||
547 | return -EIO; | ||
548 | |||
549 | efx->board_info.blink = tenxpress_phy_blink; | ||
550 | efx->board_info.monitor = sfn4111t_check_hw; | ||
551 | efx->board_info.fini = sfn4111t_fini; | ||
552 | |||
553 | rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
554 | if (rc) | ||
555 | goto fail_hwmon; | ||
556 | |||
557 | do { | ||
558 | if (efx->phy_mode & PHY_MODE_SPECIAL) { | ||
559 | /* PHY may not generate a 156.25 MHz clock and MAC | ||
560 | * stats fetch will fail. */ | ||
561 | efx_stats_disable(efx); | ||
562 | sfn4111t_reset(efx); | ||
563 | } | ||
564 | rc = sft9001_wait_boot(efx); | ||
565 | if (rc == 0) | ||
566 | return 0; | ||
567 | efx->phy_mode = PHY_MODE_SPECIAL; | ||
568 | } while (rc == -EINVAL && ++i < 2); | ||
569 | |||
570 | device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
571 | fail_hwmon: | ||
572 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
573 | return rc; | ||
574 | } | ||
575 | |||
576 | /***************************************************************************** | ||
158 | * Support for the SFE4002 | 577 | * Support for the SFE4002 |
159 | * | 578 | * |
160 | */ | 579 | */ |
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c deleted file mode 100644 index 28a55047cc92..000000000000 --- a/drivers/net/sfc/sfe4001.c +++ /dev/null | |||
@@ -1,435 +0,0 @@ | |||
1 | /**************************************************************************** | ||
2 | * Driver for Solarflare Solarstorm network controllers and boards | ||
3 | * Copyright 2007-2008 Solarflare Communications Inc. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License version 2 as published | ||
7 | * by the Free Software Foundation, incorporated herein by reference. | ||
8 | */ | ||
9 | |||
10 | /***************************************************************************** | ||
11 | * Support for the SFE4001 and SFN4111T NICs. | ||
12 | * | ||
13 | * The SFE4001 does not power-up fully at reset due to its high power | ||
14 | * consumption. We control its power via a PCA9539 I/O expander. | ||
15 | * Both boards have a MAX6647 temperature monitor which we expose to | ||
16 | * the lm90 driver. | ||
17 | * | ||
18 | * This also provides minimal support for reflashing the PHY, which is | ||
19 | * initiated by resetting it with the FLASH_CFG_1 pin pulled down. | ||
20 | * On SFE4001 rev A2 and later this is connected to the 3V3X output of | ||
21 | * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3. | ||
22 | * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually | ||
23 | * exclusive with the network device being open. | ||
24 | */ | ||
25 | |||
26 | #include <linux/delay.h> | ||
27 | #include <linux/rtnetlink.h> | ||
28 | #include "net_driver.h" | ||
29 | #include "efx.h" | ||
30 | #include "phy.h" | ||
31 | #include "boards.h" | ||
32 | #include "falcon.h" | ||
33 | #include "falcon_hwdefs.h" | ||
34 | #include "falcon_io.h" | ||
35 | #include "mac.h" | ||
36 | #include "workarounds.h" | ||
37 | |||
38 | /************************************************************************** | ||
39 | * | ||
40 | * I2C IO Expander device | ||
41 | * | ||
42 | **************************************************************************/ | ||
43 | #define PCA9539 0x74 | ||
44 | |||
45 | #define P0_IN 0x00 | ||
46 | #define P0_OUT 0x02 | ||
47 | #define P0_INVERT 0x04 | ||
48 | #define P0_CONFIG 0x06 | ||
49 | |||
50 | #define P0_EN_1V0X_LBN 0 | ||
51 | #define P0_EN_1V0X_WIDTH 1 | ||
52 | #define P0_EN_1V2_LBN 1 | ||
53 | #define P0_EN_1V2_WIDTH 1 | ||
54 | #define P0_EN_2V5_LBN 2 | ||
55 | #define P0_EN_2V5_WIDTH 1 | ||
56 | #define P0_EN_3V3X_LBN 3 | ||
57 | #define P0_EN_3V3X_WIDTH 1 | ||
58 | #define P0_EN_5V_LBN 4 | ||
59 | #define P0_EN_5V_WIDTH 1 | ||
60 | #define P0_SHORTEN_JTAG_LBN 5 | ||
61 | #define P0_SHORTEN_JTAG_WIDTH 1 | ||
62 | #define P0_X_TRST_LBN 6 | ||
63 | #define P0_X_TRST_WIDTH 1 | ||
64 | #define P0_DSP_RESET_LBN 7 | ||
65 | #define P0_DSP_RESET_WIDTH 1 | ||
66 | |||
67 | #define P1_IN 0x01 | ||
68 | #define P1_OUT 0x03 | ||
69 | #define P1_INVERT 0x05 | ||
70 | #define P1_CONFIG 0x07 | ||
71 | |||
72 | #define P1_AFE_PWD_LBN 0 | ||
73 | #define P1_AFE_PWD_WIDTH 1 | ||
74 | #define P1_DSP_PWD25_LBN 1 | ||
75 | #define P1_DSP_PWD25_WIDTH 1 | ||
76 | #define P1_RESERVED_LBN 2 | ||
77 | #define P1_RESERVED_WIDTH 2 | ||
78 | #define P1_SPARE_LBN 4 | ||
79 | #define P1_SPARE_WIDTH 4 | ||
80 | |||
81 | /* Temperature Sensor */ | ||
82 | #define MAX664X_REG_RSL 0x02 | ||
83 | #define MAX664X_REG_WLHO 0x0B | ||
84 | |||
85 | static void sfe4001_poweroff(struct efx_nic *efx) | ||
86 | { | ||
87 | struct i2c_client *ioexp_client = efx->board_info.ioexp_client; | ||
88 | struct i2c_client *hwmon_client = efx->board_info.hwmon_client; | ||
89 | |||
90 | /* Turn off all power rails and disable outputs */ | ||
91 | i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff); | ||
92 | i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff); | ||
93 | i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff); | ||
94 | |||
95 | /* Clear any over-temperature alert */ | ||
96 | i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL); | ||
97 | } | ||
98 | |||
99 | static int sfe4001_poweron(struct efx_nic *efx) | ||
100 | { | ||
101 | struct i2c_client *hwmon_client = efx->board_info.hwmon_client; | ||
102 | struct i2c_client *ioexp_client = efx->board_info.ioexp_client; | ||
103 | unsigned int i, j; | ||
104 | int rc; | ||
105 | u8 out; | ||
106 | |||
107 | /* Clear any previous over-temperature alert */ | ||
108 | rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL); | ||
109 | if (rc < 0) | ||
110 | return rc; | ||
111 | |||
112 | /* Enable port 0 and port 1 outputs on IO expander */ | ||
113 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00); | ||
114 | if (rc) | ||
115 | return rc; | ||
116 | rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, | ||
117 | 0xff & ~(1 << P1_SPARE_LBN)); | ||
118 | if (rc) | ||
119 | goto fail_on; | ||
120 | |||
121 | /* If PHY power is on, turn it all off and wait 1 second to | ||
122 | * ensure a full reset. | ||
123 | */ | ||
124 | rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT); | ||
125 | if (rc < 0) | ||
126 | goto fail_on; | ||
127 | out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) | | ||
128 | (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) | | ||
129 | (0 << P0_EN_1V0X_LBN)); | ||
130 | if (rc != out) { | ||
131 | EFX_INFO(efx, "power-cycling PHY\n"); | ||
132 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); | ||
133 | if (rc) | ||
134 | goto fail_on; | ||
135 | schedule_timeout_uninterruptible(HZ); | ||
136 | } | ||
137 | |||
138 | for (i = 0; i < 20; ++i) { | ||
139 | /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */ | ||
140 | out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) | | ||
141 | (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) | | ||
142 | (1 << P0_X_TRST_LBN)); | ||
143 | if (efx->phy_mode & PHY_MODE_SPECIAL) | ||
144 | out |= 1 << P0_EN_3V3X_LBN; | ||
145 | |||
146 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); | ||
147 | if (rc) | ||
148 | goto fail_on; | ||
149 | msleep(10); | ||
150 | |||
151 | /* Turn on 1V power rail */ | ||
152 | out &= ~(1 << P0_EN_1V0X_LBN); | ||
153 | rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); | ||
154 | if (rc) | ||
155 | goto fail_on; | ||
156 | |||
157 | EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i); | ||
158 | |||
159 | /* In flash config mode, DSP does not turn on AFE, so | ||
160 | * just wait 1 second. | ||
161 | */ | ||
162 | if (efx->phy_mode & PHY_MODE_SPECIAL) { | ||
163 | schedule_timeout_uninterruptible(HZ); | ||
164 | return 0; | ||
165 | } | ||
166 | |||
167 | for (j = 0; j < 10; ++j) { | ||
168 | msleep(100); | ||
169 | |||
170 | /* Check DSP has asserted AFE power line */ | ||
171 | rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN); | ||
172 | if (rc < 0) | ||
173 | goto fail_on; | ||
174 | if (rc & (1 << P1_AFE_PWD_LBN)) | ||
175 | return 0; | ||
176 | } | ||
177 | } | ||
178 | |||
179 | EFX_INFO(efx, "timed out waiting for DSP boot\n"); | ||
180 | rc = -ETIMEDOUT; | ||
181 | fail_on: | ||
182 | sfe4001_poweroff(efx); | ||
183 | return rc; | ||
184 | } | ||
185 | |||
186 | static int sfn4111t_reset(struct efx_nic *efx) | ||
187 | { | ||
188 | efx_oword_t reg; | ||
189 | |||
190 | /* GPIO 3 and the GPIO register are shared with I2C, so block that */ | ||
191 | mutex_lock(&efx->i2c_adap.bus_lock); | ||
192 | |||
193 | /* Pull RST_N (GPIO 2) low then let it up again, setting the | ||
194 | * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the | ||
195 | * output enables; the output levels should always be 0 (low) | ||
196 | * and we rely on external pull-ups. */ | ||
197 | falcon_read(efx, ®, GPIO_CTL_REG_KER); | ||
198 | EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true); | ||
199 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | ||
200 | msleep(1000); | ||
201 | EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false); | ||
202 | EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, | ||
203 | !!(efx->phy_mode & PHY_MODE_SPECIAL)); | ||
204 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | ||
205 | msleep(1); | ||
206 | |||
207 | mutex_unlock(&efx->i2c_adap.bus_lock); | ||
208 | |||
209 | ssleep(1); | ||
210 | return 0; | ||
211 | } | ||
212 | |||
213 | static ssize_t show_phy_flash_cfg(struct device *dev, | ||
214 | struct device_attribute *attr, char *buf) | ||
215 | { | ||
216 | struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); | ||
217 | return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL)); | ||
218 | } | ||
219 | |||
220 | static ssize_t set_phy_flash_cfg(struct device *dev, | ||
221 | struct device_attribute *attr, | ||
222 | const char *buf, size_t count) | ||
223 | { | ||
224 | struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); | ||
225 | enum efx_phy_mode old_mode, new_mode; | ||
226 | int err; | ||
227 | |||
228 | rtnl_lock(); | ||
229 | old_mode = efx->phy_mode; | ||
230 | if (count == 0 || *buf == '0') | ||
231 | new_mode = old_mode & ~PHY_MODE_SPECIAL; | ||
232 | else | ||
233 | new_mode = PHY_MODE_SPECIAL; | ||
234 | if (old_mode == new_mode) { | ||
235 | err = 0; | ||
236 | } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) { | ||
237 | err = -EBUSY; | ||
238 | } else { | ||
239 | /* Reset the PHY, reconfigure the MAC and enable/disable | ||
240 | * MAC stats accordingly. */ | ||
241 | efx->phy_mode = new_mode; | ||
242 | if (new_mode & PHY_MODE_SPECIAL) | ||
243 | efx_stats_disable(efx); | ||
244 | if (efx->board_info.type == FALCON_BOARD_SFE4001) | ||
245 | err = sfe4001_poweron(efx); | ||
246 | else | ||
247 | err = sfn4111t_reset(efx); | ||
248 | efx_reconfigure_port(efx); | ||
249 | if (!(new_mode & PHY_MODE_SPECIAL)) | ||
250 | efx_stats_enable(efx); | ||
251 | } | ||
252 | rtnl_unlock(); | ||
253 | |||
254 | return err ? err : count; | ||
255 | } | ||
256 | |||
257 | static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg); | ||
258 | |||
259 | static void sfe4001_fini(struct efx_nic *efx) | ||
260 | { | ||
261 | EFX_INFO(efx, "%s\n", __func__); | ||
262 | |||
263 | device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
264 | sfe4001_poweroff(efx); | ||
265 | i2c_unregister_device(efx->board_info.ioexp_client); | ||
266 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
267 | } | ||
268 | |||
269 | static int sfe4001_check_hw(struct efx_nic *efx) | ||
270 | { | ||
271 | s32 status; | ||
272 | |||
273 | /* If XAUI link is up then do not monitor */ | ||
274 | if (EFX_WORKAROUND_7884(efx) && efx->mac_up) | ||
275 | return 0; | ||
276 | |||
277 | /* Check the powered status of the PHY. Lack of power implies that | ||
278 | * the MAX6647 has shut down power to it, probably due to a temp. | ||
279 | * alarm. Reading the power status rather than the MAX6647 status | ||
280 | * directly because the later is read-to-clear and would thus | ||
281 | * start to power up the PHY again when polled, causing us to blip | ||
282 | * the power undesirably. | ||
283 | * We know we can read from the IO expander because we did | ||
284 | * it during power-on. Assume failure now is bad news. */ | ||
285 | status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN); | ||
286 | if (status >= 0 && | ||
287 | (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0) | ||
288 | return 0; | ||
289 | |||
290 | /* Use board power control, not PHY power control */ | ||
291 | sfe4001_poweroff(efx); | ||
292 | efx->phy_mode = PHY_MODE_OFF; | ||
293 | |||
294 | return (status < 0) ? -EIO : -ERANGE; | ||
295 | } | ||
296 | |||
297 | static struct i2c_board_info sfe4001_hwmon_info = { | ||
298 | I2C_BOARD_INFO("max6647", 0x4e), | ||
299 | }; | ||
300 | |||
301 | /* This board uses an I2C expander to provider power to the PHY, which needs to | ||
302 | * be turned on before the PHY can be used. | ||
303 | * Context: Process context, rtnl lock held | ||
304 | */ | ||
305 | int sfe4001_init(struct efx_nic *efx) | ||
306 | { | ||
307 | int rc; | ||
308 | |||
309 | #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE) | ||
310 | efx->board_info.hwmon_client = | ||
311 | i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info); | ||
312 | #else | ||
313 | efx->board_info.hwmon_client = | ||
314 | i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr); | ||
315 | #endif | ||
316 | if (!efx->board_info.hwmon_client) | ||
317 | return -EIO; | ||
318 | |||
319 | /* Raise board/PHY high limit from 85 to 90 degrees Celsius */ | ||
320 | rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client, | ||
321 | MAX664X_REG_WLHO, 90); | ||
322 | if (rc) | ||
323 | goto fail_hwmon; | ||
324 | |||
325 | efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539); | ||
326 | if (!efx->board_info.ioexp_client) { | ||
327 | rc = -EIO; | ||
328 | goto fail_hwmon; | ||
329 | } | ||
330 | |||
331 | /* 10Xpress has fixed-function LED pins, so there is no board-specific | ||
332 | * blink code. */ | ||
333 | efx->board_info.blink = tenxpress_phy_blink; | ||
334 | |||
335 | efx->board_info.monitor = sfe4001_check_hw; | ||
336 | efx->board_info.fini = sfe4001_fini; | ||
337 | |||
338 | if (efx->phy_mode & PHY_MODE_SPECIAL) { | ||
339 | /* PHY won't generate a 156.25 MHz clock and MAC stats fetch | ||
340 | * will fail. */ | ||
341 | efx_stats_disable(efx); | ||
342 | } | ||
343 | rc = sfe4001_poweron(efx); | ||
344 | if (rc) | ||
345 | goto fail_ioexp; | ||
346 | |||
347 | rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
348 | if (rc) | ||
349 | goto fail_on; | ||
350 | |||
351 | EFX_INFO(efx, "PHY is powered on\n"); | ||
352 | return 0; | ||
353 | |||
354 | fail_on: | ||
355 | sfe4001_poweroff(efx); | ||
356 | fail_ioexp: | ||
357 | i2c_unregister_device(efx->board_info.ioexp_client); | ||
358 | fail_hwmon: | ||
359 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
360 | return rc; | ||
361 | } | ||
362 | |||
363 | static int sfn4111t_check_hw(struct efx_nic *efx) | ||
364 | { | ||
365 | s32 status; | ||
366 | |||
367 | /* If XAUI link is up then do not monitor */ | ||
368 | if (EFX_WORKAROUND_7884(efx) && efx->mac_up) | ||
369 | return 0; | ||
370 | |||
371 | /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */ | ||
372 | status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client, | ||
373 | MAX664X_REG_RSL); | ||
374 | if (status < 0) | ||
375 | return -EIO; | ||
376 | if (status & 0x57) | ||
377 | return -ERANGE; | ||
378 | return 0; | ||
379 | } | ||
380 | |||
381 | static void sfn4111t_fini(struct efx_nic *efx) | ||
382 | { | ||
383 | EFX_INFO(efx, "%s\n", __func__); | ||
384 | |||
385 | device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
386 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
387 | } | ||
388 | |||
389 | static struct i2c_board_info sfn4111t_a0_hwmon_info = { | ||
390 | I2C_BOARD_INFO("max6647", 0x4e), | ||
391 | }; | ||
392 | |||
393 | static struct i2c_board_info sfn4111t_r5_hwmon_info = { | ||
394 | I2C_BOARD_INFO("max6646", 0x4d), | ||
395 | }; | ||
396 | |||
397 | int sfn4111t_init(struct efx_nic *efx) | ||
398 | { | ||
399 | int i = 0; | ||
400 | int rc; | ||
401 | |||
402 | efx->board_info.hwmon_client = | ||
403 | i2c_new_device(&efx->i2c_adap, | ||
404 | (efx->board_info.minor < 5) ? | ||
405 | &sfn4111t_a0_hwmon_info : | ||
406 | &sfn4111t_r5_hwmon_info); | ||
407 | if (!efx->board_info.hwmon_client) | ||
408 | return -EIO; | ||
409 | |||
410 | efx->board_info.blink = tenxpress_phy_blink; | ||
411 | efx->board_info.monitor = sfn4111t_check_hw; | ||
412 | efx->board_info.fini = sfn4111t_fini; | ||
413 | |||
414 | rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
415 | if (rc) | ||
416 | goto fail_hwmon; | ||
417 | |||
418 | do { | ||
419 | if (efx->phy_mode & PHY_MODE_SPECIAL) { | ||
420 | /* PHY may not generate a 156.25 MHz clock and MAC | ||
421 | * stats fetch will fail. */ | ||
422 | efx_stats_disable(efx); | ||
423 | sfn4111t_reset(efx); | ||
424 | } | ||
425 | rc = sft9001_wait_boot(efx); | ||
426 | if (rc == 0) | ||
427 | return 0; | ||
428 | efx->phy_mode = PHY_MODE_SPECIAL; | ||
429 | } while (rc == -EINVAL && ++i < 2); | ||
430 | |||
431 | device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); | ||
432 | fail_hwmon: | ||
433 | i2c_unregister_device(efx->board_info.hwmon_client); | ||
434 | return rc; | ||
435 | } | ||