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authorAlan Cox <alan@linux.intel.com>2009-05-06 12:08:44 -0400
committerJeff Garzik <jgarzik@redhat.com>2009-05-11 14:31:34 -0400
commitc611bed780a51222ece8eaf303c779ef82d9d253 (patch)
tree9c750724e7f3a61bbb4bb960ddf029ab34dc06a8
parentea7a5ed58fa40c76ff87c0dd960f1d785009dd6d (diff)
ata_piix: ICH7 does not support correct MWDMA timings
See Errata documentation. The recommended workaround is to use PIO4 instead which will we automatically do by flagging this mode not available. Signed-off-by: Alan Cox <alan.cox@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
-rw-r--r--drivers/ata/ata_piix.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 942d14ac8792..2b5700a832a2 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -72,6 +72,7 @@
72 * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary 72 * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary
73 * and must be dword aligned 73 * and must be dword aligned
74 * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3 74 * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3
75 * ICH7 errata #16 - MWDMA1 timings are incorrect
75 * 76 *
76 * Should have been BIOS fixed: 77 * Should have been BIOS fixed:
77 * 450NX: errata #19 - DMA hangs on old 450NX 78 * 450NX: errata #19 - DMA hangs on old 450NX
@@ -94,7 +95,7 @@
94#include <linux/dmi.h> 95#include <linux/dmi.h>
95 96
96#define DRV_NAME "ata_piix" 97#define DRV_NAME "ata_piix"
97#define DRV_VERSION "2.12" 98#define DRV_VERSION "2.13"
98 99
99enum { 100enum {
100 PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ 101 PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
@@ -136,6 +137,7 @@ enum piix_controller_ids {
136 ich_pata_33, /* ICH up to UDMA 33 only */ 137 ich_pata_33, /* ICH up to UDMA 33 only */
137 ich_pata_66, /* ICH up to 66 Mhz */ 138 ich_pata_66, /* ICH up to 66 Mhz */
138 ich_pata_100, /* ICH up to UDMA 100 */ 139 ich_pata_100, /* ICH up to UDMA 100 */
140 ich_pata_100_nomwdma1, /* ICH up to UDMA 100 but with no MWDMA1*/
139 ich5_sata, 141 ich5_sata,
140 ich6_sata, 142 ich6_sata,
141 ich6m_sata, 143 ich6m_sata,
@@ -216,8 +218,8 @@ static const struct pci_device_id piix_pci_tbl[] = {
216 /* ICH6 (and 6) (i915) UDMA 100 */ 218 /* ICH6 (and 6) (i915) UDMA 100 */
217 { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 219 { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
218 /* ICH7/7-R (i945, i975) UDMA 100*/ 220 /* ICH7/7-R (i945, i975) UDMA 100*/
219 { 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 221 { 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
220 { 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 222 { 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
221 /* ICH8 Mobile PATA Controller */ 223 /* ICH8 Mobile PATA Controller */
222 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 224 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
223 225
@@ -487,6 +489,15 @@ static struct ata_port_info piix_port_info[] = {
487 .port_ops = &ich_pata_ops, 489 .port_ops = &ich_pata_ops,
488 }, 490 },
489 491
492 [ich_pata_100_nomwdma1] =
493 {
494 .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
495 .pio_mask = ATA_PIO4,
496 .mwdma_mask = ATA_MWDMA2_ONLY,
497 .udma_mask = ATA_UDMA5,
498 .port_ops = &ich_pata_ops,
499 },
500
490 [ich5_sata] = 501 [ich5_sata] =
491 { 502 {
492 .flags = PIIX_SATA_FLAGS, 503 .flags = PIIX_SATA_FLAGS,