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authorHirokazu Takata <takata@linux-m32r.org>2005-10-11 11:29:09 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-10-11 12:46:54 -0400
commit9de11aab1c8fd87da7e1fb435ce0ff26bacd7909 (patch)
tree3ab41df3d9ba382278e819ab8d84be163b6dab9c
parent6de505173e24e76bb33a2595312e0c2b44d49e58 (diff)
[PATCH] m32r: trap handler code for illegal traps
This patch prevents illegal traps from causing m32r kernel's infinite loop execution. Signed-off-by: Naoto Sugai <sugai@isl.melco.co.jp> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/m32r/kernel/entry.S9
-rw-r--r--arch/m32r/kernel/traps.c33
2 files changed, 25 insertions, 17 deletions
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index dddbf6b5ed2c..85920fb8d08c 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -681,6 +681,15 @@ ENTRY(debug_trap)
681 bl do_debug_trap 681 bl do_debug_trap
682 bra error_code 682 bra error_code
683 683
684ENTRY(ill_trap)
685 /* void ill_trap(void) */
686 SWITCH_TO_KERNEL_STACK
687 SAVE_ALL
688 ldi r1, #0 ; error_code ; FIXME
689 mv r0, sp ; pt_regs
690 bl do_ill_trap
691 bra error_code
692
684 693
685/* Cache flushing handler */ 694/* Cache flushing handler */
686ENTRY(cache_flushing_handler) 695ENTRY(cache_flushing_handler)
diff --git a/arch/m32r/kernel/traps.c b/arch/m32r/kernel/traps.c
index 01922271d17e..5fe8ed6d62dc 100644
--- a/arch/m32r/kernel/traps.c
+++ b/arch/m32r/kernel/traps.c
@@ -5,8 +5,6 @@
5 * Hitoshi Yamamoto 5 * Hitoshi Yamamoto
6 */ 6 */
7 7
8/* $Id$ */
9
10/* 8/*
11 * 'traps.c' handles hardware traps and faults after we have saved some 9 * 'traps.c' handles hardware traps and faults after we have saved some
12 * state in 'entry.S'. 10 * state in 'entry.S'.
@@ -35,6 +33,7 @@ asmlinkage void ei_handler(void);
35asmlinkage void rie_handler(void); 33asmlinkage void rie_handler(void);
36asmlinkage void debug_trap(void); 34asmlinkage void debug_trap(void);
37asmlinkage void cache_flushing_handler(void); 35asmlinkage void cache_flushing_handler(void);
36asmlinkage void ill_trap(void);
38 37
39#ifdef CONFIG_SMP 38#ifdef CONFIG_SMP
40extern void smp_reschedule_interrupt(void); 39extern void smp_reschedule_interrupt(void);
@@ -77,22 +76,22 @@ void set_eit_vector_entries(void)
77 eit_vector[5] = BRA_INSN(default_eit_handler, 5); 76 eit_vector[5] = BRA_INSN(default_eit_handler, 5);
78 eit_vector[8] = BRA_INSN(rie_handler, 8); 77 eit_vector[8] = BRA_INSN(rie_handler, 8);
79 eit_vector[12] = BRA_INSN(alignment_check, 12); 78 eit_vector[12] = BRA_INSN(alignment_check, 12);
80 eit_vector[16] = 0xff000000UL; 79 eit_vector[16] = BRA_INSN(ill_trap, 16);
81 eit_vector[17] = BRA_INSN(debug_trap, 17); 80 eit_vector[17] = BRA_INSN(debug_trap, 17);
82 eit_vector[18] = BRA_INSN(system_call, 18); 81 eit_vector[18] = BRA_INSN(system_call, 18);
83 eit_vector[19] = 0xff000000UL; 82 eit_vector[19] = BRA_INSN(ill_trap, 19);
84 eit_vector[20] = 0xff000000UL; 83 eit_vector[20] = BRA_INSN(ill_trap, 20);
85 eit_vector[21] = 0xff000000UL; 84 eit_vector[21] = BRA_INSN(ill_trap, 21);
86 eit_vector[22] = 0xff000000UL; 85 eit_vector[22] = BRA_INSN(ill_trap, 22);
87 eit_vector[23] = 0xff000000UL; 86 eit_vector[23] = BRA_INSN(ill_trap, 23);
88 eit_vector[24] = 0xff000000UL; 87 eit_vector[24] = BRA_INSN(ill_trap, 24);
89 eit_vector[25] = 0xff000000UL; 88 eit_vector[25] = BRA_INSN(ill_trap, 25);
90 eit_vector[26] = 0xff000000UL; 89 eit_vector[26] = BRA_INSN(ill_trap, 26);
91 eit_vector[27] = 0xff000000UL; 90 eit_vector[27] = BRA_INSN(ill_trap, 27);
92 eit_vector[28] = BRA_INSN(cache_flushing_handler, 28); 91 eit_vector[28] = BRA_INSN(cache_flushing_handler, 28);
93 eit_vector[29] = 0xff000000UL; 92 eit_vector[29] = BRA_INSN(ill_trap, 29);
94 eit_vector[30] = 0xff000000UL; 93 eit_vector[30] = BRA_INSN(ill_trap, 30);
95 eit_vector[31] = 0xff000000UL; 94 eit_vector[31] = BRA_INSN(ill_trap, 31);
96 eit_vector[32] = BRA_INSN(ei_handler, 32); 95 eit_vector[32] = BRA_INSN(ei_handler, 32);
97 eit_vector[64] = BRA_INSN(pie_handler, 64); 96 eit_vector[64] = BRA_INSN(pie_handler, 64);
98#ifdef CONFIG_MMU 97#ifdef CONFIG_MMU
@@ -286,7 +285,8 @@ asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
286 285
287DO_ERROR( 1, SIGTRAP, "debug trap", debug_trap) 286DO_ERROR( 1, SIGTRAP, "debug trap", debug_trap)
288DO_ERROR_INFO(0x20, SIGILL, "reserved instruction ", rie_handler, ILL_ILLOPC, regs->bpc) 287DO_ERROR_INFO(0x20, SIGILL, "reserved instruction ", rie_handler, ILL_ILLOPC, regs->bpc)
289DO_ERROR_INFO(0x100, SIGILL, "privilege instruction", pie_handler, ILL_PRVOPC, regs->bpc) 288DO_ERROR_INFO(0x100, SIGILL, "privileged instruction", pie_handler, ILL_PRVOPC, regs->bpc)
289DO_ERROR_INFO(-1, SIGILL, "illegal trap", ill_trap, ILL_ILLTRP, regs->bpc)
290 290
291extern int handle_unaligned_access(unsigned long, struct pt_regs *); 291extern int handle_unaligned_access(unsigned long, struct pt_regs *);
292 292
@@ -329,4 +329,3 @@ asmlinkage void do_alignment_check(struct pt_regs *regs, long error_code)
329 set_fs(oldfs); 329 set_fs(oldfs);
330 } 330 }
331} 331}
332