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authorGreg Ungerer <gerg@uclinux.org>2009-04-28 00:24:25 -0400
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 19:43:41 -0400
commit980f9235eba5091d9fbbeb7fb72348c19d1ba710 (patch)
treeadd81981cf5d6914587258db80cff03c447127b0
parent1b718c71b7830c77a9b70826be83b899e314b585 (diff)
m68knommu: clean up ColdFire 528x interrupt setup
With the common intc-2 interrupt controller code in place the ColdFire 528x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r--arch/m68knommu/platform/528x/config.c51
1 files changed, 2 insertions, 49 deletions
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index a1d1a61c4fe6..6e608d1836f1 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -3,8 +3,8 @@
3/* 3/*
4 * linux/arch/m68knommu/platform/528x/config.c 4 * linux/arch/m68knommu/platform/528x/config.c
5 * 5 *
6 * Sub-architcture dependant initialization code for the Motorola 6 * Sub-architcture dependant initialization code for the Freescale
7 * 5280 and 5282 CPUs. 7 * 5280, 5281 and 5282 CPUs.
8 * 8 *
9 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) 9 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) 10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
@@ -15,20 +15,13 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/param.h> 16#include <linux/param.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/platform_device.h> 18#include <linux/platform_device.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/flash.h>
22#include <linux/io.h> 19#include <linux/io.h>
23#include <asm/machdep.h> 20#include <asm/machdep.h>
24#include <asm/coldfire.h> 21#include <asm/coldfire.h>
25#include <asm/mcfsim.h> 22#include <asm/mcfsim.h>
26#include <asm/mcfuart.h> 23#include <asm/mcfuart.h>
27 24
28#ifdef CONFIG_MTD_PARTITIONS
29#include <linux/mtd/partitions.h>
30#endif
31
32/***************************************************************************/ 25/***************************************************************************/
33 26
34static struct mcf_platform_uart m528x_uart_platform[] = { 27static struct mcf_platform_uart m528x_uart_platform[] = {
@@ -91,23 +84,13 @@ static struct platform_device *m528x_devices[] __initdata = {
91 84
92/***************************************************************************/ 85/***************************************************************************/
93 86
94#define INTC0 (MCF_MBAR + MCFICM_INTC0)
95
96static void __init m528x_uart_init_line(int line, int irq) 87static void __init m528x_uart_init_line(int line, int irq)
97{ 88{
98 u8 port; 89 u8 port;
99 u32 imr;
100 90
101 if ((line < 0) || (line > 2)) 91 if ((line < 0) || (line > 2))
102 return; 92 return;
103 93
104 /* level 6, line based priority */
105 writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
106
107 imr = readl(INTC0 + MCFINTC_IMRL);
108 imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
109 writel(imr, INTC0 + MCFINTC_IMRL);
110
111 /* make sure PUAPAR is set for UART0 and UART1 */ 94 /* make sure PUAPAR is set for UART0 and UART1 */
112 if (line < 2) { 95 if (line < 2) {
113 port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR); 96 port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
@@ -129,21 +112,8 @@ static void __init m528x_uarts_init(void)
129 112
130static void __init m528x_fec_init(void) 113static void __init m528x_fec_init(void)
131{ 114{
132 u32 imr;
133 u16 v16; 115 u16 v16;
134 116
135 /* Unmask FEC interrupts at ColdFire interrupt controller */
136 writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
137 writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
138 writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
139
140 imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
141 imr &= ~0xf;
142 writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
143 imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
144 imr &= ~0xff800001;
145 writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
146
147 /* Set multi-function pins to ethernet mode for fec0 */ 117 /* Set multi-function pins to ethernet mode for fec0 */
148 v16 = readw(MCF_IPSBAR + 0x100056); 118 v16 = readw(MCF_IPSBAR + 0x100056);
149 writew(v16 | 0xf00, MCF_IPSBAR + 0x100056); 119 writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
@@ -152,21 +122,6 @@ static void __init m528x_fec_init(void)
152 122
153/***************************************************************************/ 123/***************************************************************************/
154 124
155void mcf_disableall(void)
156{
157 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
158 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
159}
160
161/***************************************************************************/
162
163void mcf_autovector(unsigned int vec)
164{
165 /* Everything is auto-vectored on the 5272 */
166}
167
168/***************************************************************************/
169
170static void m528x_cpu_reset(void) 125static void m528x_cpu_reset(void)
171{ 126{
172 local_irq_disable(); 127 local_irq_disable();
@@ -204,8 +159,6 @@ void wildfiremod_halt(void)
204 159
205void __init config_BSP(char *commandp, int size) 160void __init config_BSP(char *commandp, int size)
206{ 161{
207 mcf_disableall();
208
209#ifdef CONFIG_WILDFIRE 162#ifdef CONFIG_WILDFIRE
210 mach_halt = wildfire_halt; 163 mach_halt = wildfire_halt;
211#endif 164#endif