aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorCatalin Marinas <catalin.marinas@arm.com>2005-10-31 09:25:02 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-31 09:25:02 -0500
commit8ad68bbf7a06cdd77c170be792418488dbb65da4 (patch)
tree7caed40139d8e0a490cd7a9de0cf4c78f4285c05
parente2f2e58e7968f8446b1078a20a18bf8ea12b4fbc (diff)
[ARM] Add support for ARM RealView board
Support for RealView EB. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat
-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-realview/Kconfig11
-rw-r--r--arch/arm/mach-realview/Makefile6
-rw-r--r--arch/arm/mach-realview/Makefile.boot4
-rw-r--r--arch/arm/mach-realview/clock.c145
-rw-r--r--arch/arm/mach-realview/clock.h25
-rw-r--r--arch/arm/mach-realview/core.c605
-rw-r--r--arch/arm/mach-realview/core.h118
-rw-r--r--arch/arm/mach-realview/realview_eb.c142
-rw-r--r--arch/arm/mm/Kconfig6
-rw-r--r--include/asm-arm/arch-realview/debug-macro.S38
-rw-r--r--include/asm-arm/arch-realview/dma.h27
-rw-r--r--include/asm-arm/arch-realview/entry-macro.S49
-rw-r--r--include/asm-arm/arch-realview/hardware.h31
-rw-r--r--include/asm-arm/arch-realview/io.h34
-rw-r--r--include/asm-arm/arch-realview/irqs.h103
-rw-r--r--include/asm-arm/arch-realview/memory.h38
-rw-r--r--include/asm-arm/arch-realview/param.h19
-rw-r--r--include/asm-arm/arch-realview/platform.h395
-rw-r--r--include/asm-arm/arch-realview/system.h51
-rw-r--r--include/asm-arm/arch-realview/timex.h23
-rw-r--r--include/asm-arm/arch-realview/uncompress.h54
-rw-r--r--include/asm-arm/arch-realview/vmalloc.h21
-rw-r--r--include/asm-arm/hardware/amba_clcd.h2
25 files changed, 1953 insertions, 4 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 682367bd0f65..dc6d8342e5e6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -194,6 +194,13 @@ config ARCH_VERSATILE
194 help 194 help
195 This enables support for ARM Ltd Versatile board. 195 This enables support for ARM Ltd Versatile board.
196 196
197config ARCH_REALVIEW
198 bool "RealView"
199 select ARM_AMBA
200 select ICST307
201 help
202 This enables support for ARM Ltd RealView boards.
203
197config ARCH_IMX 204config ARCH_IMX
198 bool "IMX" 205 bool "IMX"
199 206
@@ -244,6 +251,8 @@ source "arch/arm/mach-versatile/Kconfig"
244 251
245source "arch/arm/mach-aaec2000/Kconfig" 252source "arch/arm/mach-aaec2000/Kconfig"
246 253
254source "arch/arm/mach-realview/Kconfig"
255
247# Definitions to make life easier 256# Definitions to make life easier
248config ARCH_ACORN 257config ARCH_ACORN
249 bool 258 bool
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 64cf480b0b02..d80749ae2a7e 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -99,6 +99,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000
99 machine-$(CONFIG_ARCH_IMX) := imx 99 machine-$(CONFIG_ARCH_IMX) := imx
100 machine-$(CONFIG_ARCH_H720X) := h720x 100 machine-$(CONFIG_ARCH_H720X) := h720x
101 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000 101 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
102 machine-$(CONFIG_ARCH_REALVIEW) := realview
102 103
103ifeq ($(CONFIG_ARCH_EBSA110),y) 104ifeq ($(CONFIG_ARCH_EBSA110),y)
104# This is what happens if you forget the IOCS16 line. 105# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
new file mode 100644
index 000000000000..4b63dc9eabfe
--- /dev/null
+++ b/arch/arm/mach-realview/Kconfig
@@ -0,0 +1,11 @@
1menu "RealView platform type"
2 depends on ARCH_REALVIEW
3
4config MACH_REALVIEW_EB
5 bool "Support RealView/EB platform"
6 default n
7 select ARM_GIC
8 help
9 Include support for the ARM(R) RealView Emulation Baseboard platform.
10
11endmenu
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
new file mode 100644
index 000000000000..8d37ea1605fd
--- /dev/null
+++ b/arch/arm/mach-realview/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for the linux kernel.
3#
4
5obj-y := core.o clock.o
6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot
new file mode 100644
index 000000000000..c7e75acfe6c9
--- /dev/null
+++ b/arch/arm/mach-realview/Makefile.boot
@@ -0,0 +1,4 @@
1 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
4
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
new file mode 100644
index 000000000000..002635c97bb6
--- /dev/null
+++ b/arch/arm/mach-realview/clock.c
@@ -0,0 +1,145 @@
1/*
2 * linux/arch/arm/mach-realview/clock.c
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/list.h>
14#include <linux/errno.h>
15#include <linux/err.h>
16
17#include <asm/semaphore.h>
18#include <asm/hardware/clock.h>
19#include <asm/hardware/icst307.h>
20
21#include "clock.h"
22
23static LIST_HEAD(clocks);
24static DECLARE_MUTEX(clocks_sem);
25
26struct clk *clk_get(struct device *dev, const char *id)
27{
28 struct clk *p, *clk = ERR_PTR(-ENOENT);
29
30 down(&clocks_sem);
31 list_for_each_entry(p, &clocks, node) {
32 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
33 clk = p;
34 break;
35 }
36 }
37 up(&clocks_sem);
38
39 return clk;
40}
41EXPORT_SYMBOL(clk_get);
42
43void clk_put(struct clk *clk)
44{
45 module_put(clk->owner);
46}
47EXPORT_SYMBOL(clk_put);
48
49int clk_enable(struct clk *clk)
50{
51 return 0;
52}
53EXPORT_SYMBOL(clk_enable);
54
55void clk_disable(struct clk *clk)
56{
57}
58EXPORT_SYMBOL(clk_disable);
59
60int clk_use(struct clk *clk)
61{
62 return 0;
63}
64EXPORT_SYMBOL(clk_use);
65
66void clk_unuse(struct clk *clk)
67{
68}
69EXPORT_SYMBOL(clk_unuse);
70
71unsigned long clk_get_rate(struct clk *clk)
72{
73 return clk->rate;
74}
75EXPORT_SYMBOL(clk_get_rate);
76
77long clk_round_rate(struct clk *clk, unsigned long rate)
78{
79 return rate;
80}
81EXPORT_SYMBOL(clk_round_rate);
82
83int clk_set_rate(struct clk *clk, unsigned long rate)
84{
85 int ret = -EIO;
86
87 if (clk->setvco) {
88 struct icst307_vco vco;
89
90 vco = icst307_khz_to_vco(clk->params, rate / 1000);
91 clk->rate = icst307_khz(clk->params, vco) * 1000;
92
93 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
94 clk->name, vco.s, vco.r, vco.v);
95
96 clk->setvco(clk, vco);
97 ret = 0;
98 }
99 return ret;
100}
101EXPORT_SYMBOL(clk_set_rate);
102
103/*
104 * These are fixed clocks.
105 */
106static struct clk kmi_clk = {
107 .name = "KMIREFCLK",
108 .rate = 24000000,
109};
110
111static struct clk uart_clk = {
112 .name = "UARTCLK",
113 .rate = 24000000,
114};
115
116static struct clk mmci_clk = {
117 .name = "MCLK",
118 .rate = 33000000,
119};
120
121int clk_register(struct clk *clk)
122{
123 down(&clocks_sem);
124 list_add(&clk->node, &clocks);
125 up(&clocks_sem);
126 return 0;
127}
128EXPORT_SYMBOL(clk_register);
129
130void clk_unregister(struct clk *clk)
131{
132 down(&clocks_sem);
133 list_del(&clk->node);
134 up(&clocks_sem);
135}
136EXPORT_SYMBOL(clk_unregister);
137
138static int __init clk_init(void)
139{
140 clk_register(&kmi_clk);
141 clk_register(&uart_clk);
142 clk_register(&mmci_clk);
143 return 0;
144}
145arch_initcall(clk_init);
diff --git a/arch/arm/mach-realview/clock.h b/arch/arm/mach-realview/clock.h
new file mode 100644
index 000000000000..dadba695e181
--- /dev/null
+++ b/arch/arm/mach-realview/clock.h
@@ -0,0 +1,25 @@
1/*
2 * linux/arch/arm/mach-realview/clock.h
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11struct module;
12struct icst307_params;
13
14struct clk {
15 struct list_head node;
16 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst307_params *params;
20 void *data;
21 void (*setvco)(struct clk *, struct icst307_vco vco);
22};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
new file mode 100644
index 000000000000..4f98f13ad3ab
--- /dev/null
+++ b/arch/arm/mach-realview/core.c
@@ -0,0 +1,605 @@
1/*
2 * linux/arch/arm/mach-realview/core.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/config.h>
22#include <linux/init.h>
23#include <linux/device.h>
24#include <linux/dma-mapping.h>
25#include <linux/sysdev.h>
26#include <linux/interrupt.h>
27
28#include <asm/system.h>
29#include <asm/hardware.h>
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/leds.h>
33#include <asm/mach-types.h>
34#include <asm/hardware/amba.h>
35#include <asm/hardware/amba_clcd.h>
36#include <asm/hardware/arm_timer.h>
37#include <asm/hardware/icst307.h>
38
39#include <asm/mach/arch.h>
40#include <asm/mach/flash.h>
41#include <asm/mach/irq.h>
42#include <asm/mach/time.h>
43#include <asm/mach/map.h>
44#include <asm/mach/mmc.h>
45
46#include <asm/hardware/gic.h>
47
48#include "core.h"
49#include "clock.h"
50
51#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
52
53/*
54 * This is the RealView sched_clock implementation. This has
55 * a resolution of 41.7ns, and a maximum value of about 179s.
56 */
57unsigned long long sched_clock(void)
58{
59 unsigned long long v;
60
61 v = (unsigned long long)readl(REALVIEW_REFCOUNTER) * 125;
62 do_div(v, 3);
63
64 return v;
65}
66
67
68#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
69
70static int realview_flash_init(void)
71{
72 u32 val;
73
74 val = __raw_readl(REALVIEW_FLASHCTRL);
75 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
76 __raw_writel(val, REALVIEW_FLASHCTRL);
77
78 return 0;
79}
80
81static void realview_flash_exit(void)
82{
83 u32 val;
84
85 val = __raw_readl(REALVIEW_FLASHCTRL);
86 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
87 __raw_writel(val, REALVIEW_FLASHCTRL);
88}
89
90static void realview_flash_set_vpp(int on)
91{
92 u32 val;
93
94 val = __raw_readl(REALVIEW_FLASHCTRL);
95 if (on)
96 val |= REALVIEW_FLASHPROG_FLVPPEN;
97 else
98 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
99 __raw_writel(val, REALVIEW_FLASHCTRL);
100}
101
102static struct flash_platform_data realview_flash_data = {
103 .map_name = "cfi_probe",
104 .width = 4,
105 .init = realview_flash_init,
106 .exit = realview_flash_exit,
107 .set_vpp = realview_flash_set_vpp,
108};
109
110static struct resource realview_flash_resource = {
111 .start = REALVIEW_FLASH_BASE,
112 .end = REALVIEW_FLASH_BASE + REALVIEW_FLASH_SIZE,
113 .flags = IORESOURCE_MEM,
114};
115
116struct platform_device realview_flash_device = {
117 .name = "armflash",
118 .id = 0,
119 .dev = {
120 .platform_data = &realview_flash_data,
121 },
122 .num_resources = 1,
123 .resource = &realview_flash_resource,
124};
125
126static struct resource realview_smc91x_resources[] = {
127 [0] = {
128 .start = REALVIEW_ETH_BASE,
129 .end = REALVIEW_ETH_BASE + SZ_64K - 1,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 .start = IRQ_ETH,
134 .end = IRQ_ETH,
135 .flags = IORESOURCE_IRQ,
136 },
137};
138
139struct platform_device realview_smc91x_device = {
140 .name = "smc91x",
141 .id = 0,
142 .num_resources = ARRAY_SIZE(realview_smc91x_resources),
143 .resource = realview_smc91x_resources,
144};
145
146#define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
147
148static unsigned int realview_mmc_status(struct device *dev)
149{
150 struct amba_device *adev = container_of(dev, struct amba_device, dev);
151 u32 mask;
152
153 if (adev->res.start == REALVIEW_MMCI0_BASE)
154 mask = 1;
155 else
156 mask = 2;
157
158 return readl(REALVIEW_SYSMCI) & mask;
159}
160
161struct mmc_platform_data realview_mmc0_plat_data = {
162 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
163 .status = realview_mmc_status,
164};
165
166struct mmc_platform_data realview_mmc1_plat_data = {
167 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
168 .status = realview_mmc_status,
169};
170
171/*
172 * Clock handling
173 */
174static const struct icst307_params realview_oscvco_params = {
175 .ref = 24000,
176 .vco_max = 200000,
177 .vd_min = 4 + 8,
178 .vd_max = 511 + 8,
179 .rd_min = 1 + 2,
180 .rd_max = 127 + 2,
181};
182
183static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
184{
185 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
186 void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC1_OFFSET;
187 u32 val;
188
189 val = readl(sys_osc) & ~0x7ffff;
190 val |= vco.v | (vco.r << 9) | (vco.s << 16);
191
192 writel(0xa05f, sys_lock);
193 writel(val, sys_osc);
194 writel(0, sys_lock);
195}
196
197struct clk realview_clcd_clk = {
198 .name = "CLCDCLK",
199 .params = &realview_oscvco_params,
200 .setvco = realview_oscvco_set,
201};
202
203/*
204 * CLCD support.
205 */
206#define SYS_CLCD_MODE_MASK (3 << 0)
207#define SYS_CLCD_MODE_888 (0 << 0)
208#define SYS_CLCD_MODE_5551 (1 << 0)
209#define SYS_CLCD_MODE_565_RLSB (2 << 0)
210#define SYS_CLCD_MODE_565_BLSB (3 << 0)
211#define SYS_CLCD_NLCDIOON (1 << 2)
212#define SYS_CLCD_VDDPOSSWITCH (1 << 3)
213#define SYS_CLCD_PWR3V5SWITCH (1 << 4)
214#define SYS_CLCD_ID_MASK (0x1f << 8)
215#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
216#define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
217#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
218#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
219#define SYS_CLCD_ID_VGA (0x1f << 8)
220
221static struct clcd_panel vga = {
222 .mode = {
223 .name = "VGA",
224 .refresh = 60,
225 .xres = 640,
226 .yres = 480,
227 .pixclock = 39721,
228 .left_margin = 40,
229 .right_margin = 24,
230 .upper_margin = 32,
231 .lower_margin = 11,
232 .hsync_len = 96,
233 .vsync_len = 2,
234 .sync = 0,
235 .vmode = FB_VMODE_NONINTERLACED,
236 },
237 .width = -1,
238 .height = -1,
239 .tim2 = TIM2_BCD | TIM2_IPC,
240 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
241 .bpp = 16,
242};
243
244static struct clcd_panel sanyo_3_8_in = {
245 .mode = {
246 .name = "Sanyo QVGA",
247 .refresh = 116,
248 .xres = 320,
249 .yres = 240,
250 .pixclock = 100000,
251 .left_margin = 6,
252 .right_margin = 6,
253 .upper_margin = 5,
254 .lower_margin = 5,
255 .hsync_len = 6,
256 .vsync_len = 6,
257 .sync = 0,
258 .vmode = FB_VMODE_NONINTERLACED,
259 },
260 .width = -1,
261 .height = -1,
262 .tim2 = TIM2_BCD,
263 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
264 .bpp = 16,
265};
266
267static struct clcd_panel sanyo_2_5_in = {
268 .mode = {
269 .name = "Sanyo QVGA Portrait",
270 .refresh = 116,
271 .xres = 240,
272 .yres = 320,
273 .pixclock = 100000,
274 .left_margin = 20,
275 .right_margin = 10,
276 .upper_margin = 2,
277 .lower_margin = 2,
278 .hsync_len = 10,
279 .vsync_len = 2,
280 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
281 .vmode = FB_VMODE_NONINTERLACED,
282 },
283 .width = -1,
284 .height = -1,
285 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
286 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
287 .bpp = 16,
288};
289
290static struct clcd_panel epson_2_2_in = {
291 .mode = {
292 .name = "Epson QCIF",
293 .refresh = 390,
294 .xres = 176,
295 .yres = 220,
296 .pixclock = 62500,
297 .left_margin = 3,
298 .right_margin = 2,
299 .upper_margin = 1,
300 .lower_margin = 0,
301 .hsync_len = 3,
302 .vsync_len = 2,
303 .sync = 0,
304 .vmode = FB_VMODE_NONINTERLACED,
305 },
306 .width = -1,
307 .height = -1,
308 .tim2 = TIM2_BCD | TIM2_IPC,
309 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
310 .bpp = 16,
311};
312
313/*
314 * Detect which LCD panel is connected, and return the appropriate
315 * clcd_panel structure. Note: we do not have any information on
316 * the required timings for the 8.4in panel, so we presently assume
317 * VGA timings.
318 */
319static struct clcd_panel *realview_clcd_panel(void)
320{
321 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
322 struct clcd_panel *panel = &vga;
323 u32 val;
324
325 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
326 if (val == SYS_CLCD_ID_SANYO_3_8)
327 panel = &sanyo_3_8_in;
328 else if (val == SYS_CLCD_ID_SANYO_2_5)
329 panel = &sanyo_2_5_in;
330 else if (val == SYS_CLCD_ID_EPSON_2_2)
331 panel = &epson_2_2_in;
332 else if (val == SYS_CLCD_ID_VGA)
333 panel = &vga;
334 else {
335 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
336 val);
337 panel = &vga;
338 }
339
340 return panel;
341}
342
343/*
344 * Disable all display connectors on the interface module.
345 */
346static void realview_clcd_disable(struct clcd_fb *fb)
347{
348 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
349 u32 val;
350
351 val = readl(sys_clcd);
352 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
353 writel(val, sys_clcd);
354}
355
356/*
357 * Enable the relevant connector on the interface module.
358 */
359static void realview_clcd_enable(struct clcd_fb *fb)
360{
361 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
362 u32 val;
363
364 val = readl(sys_clcd);
365 val &= ~SYS_CLCD_MODE_MASK;
366
367 switch (fb->fb.var.green.length) {
368 case 5:
369 val |= SYS_CLCD_MODE_5551;
370 break;
371 case 6:
372 val |= SYS_CLCD_MODE_565_RLSB;
373 break;
374 case 8:
375 val |= SYS_CLCD_MODE_888;
376 break;
377 }
378
379 /*
380 * Set the MUX
381 */
382 writel(val, sys_clcd);
383
384 /*
385 * And now enable the PSUs
386 */
387 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
388 writel(val, sys_clcd);
389}
390
391static unsigned long framesize = SZ_1M;
392
393static int realview_clcd_setup(struct clcd_fb *fb)
394{
395 dma_addr_t dma;
396
397 fb->panel = realview_clcd_panel();
398
399 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
400 &dma, GFP_KERNEL);
401 if (!fb->fb.screen_base) {
402 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
403 return -ENOMEM;
404 }
405
406 fb->fb.fix.smem_start = dma;
407 fb->fb.fix.smem_len = framesize;
408
409 return 0;
410}
411
412static int realview_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
413{
414 return dma_mmap_writecombine(&fb->dev->dev, vma,
415 fb->fb.screen_base,
416 fb->fb.fix.smem_start,
417 fb->fb.fix.smem_len);
418}
419
420static void realview_clcd_remove(struct clcd_fb *fb)
421{
422 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
423 fb->fb.screen_base, fb->fb.fix.smem_start);
424}
425
426struct clcd_board clcd_plat_data = {
427 .name = "RealView",
428 .check = clcdfb_check,
429 .decode = clcdfb_decode,
430 .disable = realview_clcd_disable,
431 .enable = realview_clcd_enable,
432 .setup = realview_clcd_setup,
433 .mmap = realview_clcd_mmap,
434 .remove = realview_clcd_remove,
435};
436
437#ifdef CONFIG_LEDS
438#define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
439
440void realview_leds_event(led_event_t ledevt)
441{
442 unsigned long flags;
443 u32 val;
444
445 local_irq_save(flags);
446 val = readl(VA_LEDS_BASE);
447
448 switch (ledevt) {
449 case led_idle_start:
450 val = val & ~REALVIEW_SYS_LED0;
451 break;
452
453 case led_idle_end:
454 val = val | REALVIEW_SYS_LED0;
455 break;
456
457 case led_timer:
458 val = val ^ REALVIEW_SYS_LED1;
459 break;
460
461 case led_halted:
462 val = 0;
463 break;
464
465 default:
466 break;
467 }
468
469 writel(val, VA_LEDS_BASE);
470 local_irq_restore(flags);
471}
472#endif /* CONFIG_LEDS */
473
474/*
475 * Where is the timer (VA)?
476 */
477#define TIMER0_VA_BASE __io_address(REALVIEW_TIMER0_1_BASE)
478#define TIMER1_VA_BASE (__io_address(REALVIEW_TIMER0_1_BASE) + 0x20)
479#define TIMER2_VA_BASE __io_address(REALVIEW_TIMER2_3_BASE)
480#define TIMER3_VA_BASE (__io_address(REALVIEW_TIMER2_3_BASE) + 0x20)
481
482/*
483 * How long is the timer interval?
484 */
485#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
486#if TIMER_INTERVAL >= 0x100000
487#define TIMER_RELOAD (TIMER_INTERVAL >> 8)
488#define TIMER_DIVISOR (TIMER_CTRL_DIV256)
489#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
490#elif TIMER_INTERVAL >= 0x10000
491#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */
492#define TIMER_DIVISOR (TIMER_CTRL_DIV16)
493#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
494#else
495#define TIMER_RELOAD (TIMER_INTERVAL)
496#define TIMER_DIVISOR (TIMER_CTRL_DIV1)
497#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
498#endif
499
500/*
501 * Returns number of ms since last clock interrupt. Note that interrupts
502 * will have been disabled by do_gettimeoffset()
503 */
504static unsigned long realview_gettimeoffset(void)
505{
506 unsigned long ticks1, ticks2, status;
507
508 /*
509 * Get the current number of ticks. Note that there is a race
510 * condition between us reading the timer and checking for
511 * an interrupt. We get around this by ensuring that the
512 * counter has not reloaded between our two reads.
513 */
514 ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
515 do {
516 ticks1 = ticks2;
517 status = __raw_readl(__io_address(REALVIEW_GIC_DIST_BASE + GIC_DIST_PENDING_SET)
518 + ((IRQ_TIMERINT0_1 >> 5) << 2));
519 ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
520 } while (ticks2 > ticks1);
521
522 /*
523 * Number of ticks since last interrupt.
524 */
525 ticks1 = TIMER_RELOAD - ticks2;
526
527 /*
528 * Interrupt pending? If so, we've reloaded once already.
529 *
530 * FIXME: Need to check this is effectively timer 0 that expires
531 */
532 if (status & IRQMASK_TIMERINT0_1)
533 ticks1 += TIMER_RELOAD;
534
535 /*
536 * Convert the ticks to usecs
537 */
538 return TICKS2USECS(ticks1);
539}
540
541/*
542 * IRQ handler for the timer
543 */
544static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
545{
546 write_seqlock(&xtime_lock);
547
548 // ...clear the interrupt
549 writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
550
551 timer_tick(regs);
552
553 write_sequnlock(&xtime_lock);
554
555 return IRQ_HANDLED;
556}
557
558static struct irqaction realview_timer_irq = {
559 .name = "RealView Timer Tick",
560 .flags = SA_INTERRUPT | SA_TIMER,
561 .handler = realview_timer_interrupt,
562};
563
564/*
565 * Set up timer interrupt, and return the current time in seconds.
566 */
567static void __init realview_timer_init(void)
568{
569 u32 val;
570
571 /*
572 * set clock frequency:
573 * REALVIEW_REFCLK is 32KHz
574 * REALVIEW_TIMCLK is 1MHz
575 */
576 val = readl(__io_address(REALVIEW_SCTL_BASE));
577 writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
578 (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
579 (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
580 (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
581 __io_address(REALVIEW_SCTL_BASE));
582
583 /*
584 * Initialise to a known state (all timers off)
585 */
586 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
587 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
588 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
589 writel(0, TIMER3_VA_BASE + TIMER_CTRL);
590
591 writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
592 writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_VALUE);
593 writel(TIMER_DIVISOR | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC |
594 TIMER_CTRL_IE, TIMER0_VA_BASE + TIMER_CTRL);
595
596 /*
597 * Make irqs happen for the system timer
598 */
599 setup_irq(IRQ_TIMERINT0_1, &realview_timer_irq);
600}
601
602struct sys_timer realview_timer = {
603 .init = realview_timer_init,
604 .offset = realview_gettimeoffset,
605};
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
new file mode 100644
index 000000000000..575599db74db
--- /dev/null
+++ b/arch/arm/mach-realview/core.h
@@ -0,0 +1,118 @@
1/*
2 * linux/arch/arm/mach-realview/core.h
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_ARCH_REALVIEW_H
23#define __ASM_ARCH_REALVIEW_H
24
25#include <asm/hardware/amba.h>
26#include <asm/io.h>
27
28#define __io_address(n) __io(IO_ADDRESS(n))
29
30extern struct sys_timer realview_timer;
31
32#define AMBA_DEVICE(name,busid,base,plat) \
33static struct amba_device name##_device = { \
34 .dev = { \
35 .coherent_dma_mask = ~0, \
36 .bus_id = busid, \
37 .platform_data = plat, \
38 }, \
39 .res = { \
40 .start = REALVIEW_##base##_BASE, \
41 .end = (REALVIEW_##base##_BASE) + SZ_4K - 1,\
42 .flags = IORESOURCE_MEM, \
43 }, \
44 .dma_mask = ~0, \
45 .irq = base##_IRQ, \
46 /* .dma = base##_DMA,*/ \
47}
48
49/*
50 * These devices are connected via the core APB bridge
51 */
52#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
53#define GPIO2_DMA { 0, 0 }
54#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
55#define GPIO3_DMA { 0, 0 }
56
57#define AACI_IRQ { IRQ_AACI, NO_IRQ }
58#define AACI_DMA { 0x80, 0x81 }
59#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_MMCI0B }
60#define MMCI0_DMA { 0x84, 0 }
61#define KMI0_IRQ { IRQ_KMI0, NO_IRQ }
62#define KMI0_DMA { 0, 0 }
63#define KMI1_IRQ { IRQ_KMI1, NO_IRQ }
64#define KMI1_DMA { 0, 0 }
65
66/*
67 * These devices are connected directly to the multi-layer AHB switch
68 */
69#define SMC_IRQ { NO_IRQ, NO_IRQ }
70#define SMC_DMA { 0, 0 }
71#define MPMC_IRQ { NO_IRQ, NO_IRQ }
72#define MPMC_DMA { 0, 0 }
73#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ }
74#define CLCD_DMA { 0, 0 }
75#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ }
76#define DMAC_DMA { 0, 0 }
77
78/*
79 * These devices are connected via the core APB bridge
80 */
81#define SCTL_IRQ { NO_IRQ, NO_IRQ }
82#define SCTL_DMA { 0, 0 }
83#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ }
84#define WATCHDOG_DMA { 0, 0 }
85#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ }
86#define GPIO0_DMA { 0, 0 }
87#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ }
88#define GPIO1_DMA { 0, 0 }
89#define RTC_IRQ { IRQ_RTCINT, NO_IRQ }
90#define RTC_DMA { 0, 0 }
91
92/*
93 * These devices are connected via the DMA APB bridge
94 */
95#define SCI_IRQ { IRQ_SCIINT, NO_IRQ }
96#define SCI_DMA { 7, 6 }
97#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ }
98#define UART0_DMA { 15, 14 }
99#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ }
100#define UART1_DMA { 13, 12 }
101#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ }
102#define UART2_DMA { 11, 10 }
103#define UART3_IRQ { IRQ_UART3, NO_IRQ }
104#define UART3_DMA { 0x86, 0x87 }
105#define SSP_IRQ { IRQ_SSPINT, NO_IRQ }
106#define SSP_DMA { 9, 8 }
107
108
109extern struct platform_device realview_flash_device;
110extern struct platform_device realview_smc91x_device;
111extern struct mmc_platform_data realview_mmc0_plat_data;
112extern struct mmc_platform_data realview_mmc1_plat_data;
113extern struct clk realview_clcd_clk;
114extern struct clcd_board clcd_plat_data;
115
116extern void realview_leds_event(led_event_t ledevt);
117
118#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
new file mode 100644
index 000000000000..1279feeecf7a
--- /dev/null
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -0,0 +1,142 @@
1/*
2 * linux/arch/arm/mach-realview/realview_eb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/config.h>
23#include <linux/init.h>
24#include <linux/device.h>
25#include <linux/sysdev.h>
26
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/leds.h>
31#include <asm/mach-types.h>
32#include <asm/hardware/gic.h>
33#include <asm/hardware/amba.h>
34#include <asm/hardware/icst307.h>
35
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/mmc.h>
39
40#include <asm/arch/irqs.h>
41
42#include "core.h"
43#include "clock.h"
44
45static struct map_desc realview_eb_io_desc[] __initdata = {
46 { IO_ADDRESS(REALVIEW_SYS_BASE), REALVIEW_SYS_BASE, SZ_4K, MT_DEVICE },
47 { IO_ADDRESS(REALVIEW_GIC_CPU_BASE), REALVIEW_GIC_CPU_BASE, SZ_4K, MT_DEVICE },
48 { IO_ADDRESS(REALVIEW_GIC_DIST_BASE), REALVIEW_GIC_DIST_BASE, SZ_4K, MT_DEVICE },
49 { IO_ADDRESS(REALVIEW_SCTL_BASE), REALVIEW_SCTL_BASE, SZ_4K, MT_DEVICE },
50 { IO_ADDRESS(REALVIEW_TIMER0_1_BASE), REALVIEW_TIMER0_1_BASE, SZ_4K, MT_DEVICE },
51 { IO_ADDRESS(REALVIEW_TIMER2_3_BASE), REALVIEW_TIMER2_3_BASE, SZ_4K, MT_DEVICE },
52#ifdef CONFIG_DEBUG_LL
53 { IO_ADDRESS(REALVIEW_UART0_BASE), REALVIEW_UART0_BASE, SZ_4K, MT_DEVICE },
54#endif
55};
56
57static void __init realview_eb_map_io(void)
58{
59 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
60}
61
62/* FPGA Primecells */
63AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
64AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
65AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
66AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
67AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
68
69/* DevChip Primecells */
70AMBA_DEVICE(smc, "dev:00", SMC, NULL);
71AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
72AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
73AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
74AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
75AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL);
76AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
77AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
78AMBA_DEVICE(rtc, "dev:e8", RTC, NULL);
79AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
80AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
81AMBA_DEVICE(uart1, "dev:f2", UART1, NULL);
82AMBA_DEVICE(uart2, "dev:f3", UART2, NULL);
83AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL);
84
85static struct amba_device *amba_devs[] __initdata = {
86 &dmac_device,
87 &uart0_device,
88 &uart1_device,
89 &uart2_device,
90 &uart3_device,
91 &smc_device,
92 &clcd_device,
93 &sctl_device,
94 &wdog_device,
95 &gpio0_device,
96 &gpio1_device,
97 &gpio2_device,
98 &rtc_device,
99 &sci0_device,
100 &ssp0_device,
101 &aaci_device,
102 &mmc0_device,
103 &kmi0_device,
104 &kmi1_device,
105};
106
107static void __init gic_init_irq(void)
108{
109 gic_dist_init(__io_address(REALVIEW_GIC_DIST_BASE));
110 gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE));
111}
112
113static void __init realview_eb_init(void)
114{
115 int i;
116
117 clk_register(&realview_clcd_clk);
118
119 platform_device_register(&realview_flash_device);
120 platform_device_register(&realview_smc91x_device);
121
122 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
123 struct amba_device *d = amba_devs[i];
124 amba_device_register(d, &iomem_resource);
125 }
126
127#ifdef CONFIG_LEDS
128 leds_event = realview_leds_event;
129#endif
130}
131
132MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
133 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
134 .phys_ram = 0x00000000,
135 .phys_io = REALVIEW_UART0_BASE,
136 .io_pg_offst = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
137 .boot_params = 0x00000100,
138 .map_io = realview_eb_map_io,
139 .init_irq = gic_init_irq,
140 .timer = &realview_timer,
141 .init_machine = realview_eb_init,
142MACHINE_END
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c54e04c995ee..5568403e984d 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -120,8 +120,8 @@ config CPU_ARM925T
120 120
121# ARM926T 121# ARM926T
122config CPU_ARM926T 122config CPU_ARM926T
123 bool "Support ARM926T processor" if ARCH_INTEGRATOR 123 bool "Support ARM926T processor"
124 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX 124 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB
125 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX 125 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX
126 select CPU_32v5 126 select CPU_32v5
127 select CPU_ABRT_EV5TJ 127 select CPU_ABRT_EV5TJ
@@ -242,7 +242,7 @@ config CPU_XSCALE
242# ARMv6 242# ARMv6
243config CPU_V6 243config CPU_V6
244 bool "Support ARM V6 processor" 244 bool "Support ARM V6 processor"
245 depends on ARCH_INTEGRATOR 245 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB
246 select CPU_32v6 246 select CPU_32v6
247 select CPU_ABRT_EV6 247 select CPU_ABRT_EV6
248 select CPU_CACHE_V6 248 select CPU_CACHE_V6
diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S
new file mode 100644
index 000000000000..ed28bd012236
--- /dev/null
+++ b/include/asm-arm/arch-realview/debug-macro.S
@@ -0,0 +1,38 @@
1/* linux/include/asm-arm/arch-realview/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <asm/hardware/amba_serial.h>
15
16 .macro addruart,rx
17 mrc p15, 0, \rx, c1, c0
18 tst \rx, #1 @ MMU enabled?
19 moveq \rx, #0x10000000
20 movne \rx, #0xf1000000 @ virtual base
21 orr \rx, \rx, #0x00009000
22 .endm
23
24 .macro senduart,rd,rx
25 strb \rd, [\rx, #UART01x_DR]
26 .endm
27
28 .macro waituart,rd,rx
291001: ldr \rd, [\rx, #0x18] @ UARTFLG
30 tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
31 bne 1001b
32 .endm
33
34 .macro busyuart,rd,rx
351001: ldr \rd, [\rx, #0x18] @ UARTFLG
36 tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
37 bne 1001b
38 .endm
diff --git a/include/asm-arm/arch-realview/dma.h b/include/asm-arm/arch-realview/dma.h
new file mode 100644
index 000000000000..744491a74bd9
--- /dev/null
+++ b/include/asm-arm/arch-realview/dma.h
@@ -0,0 +1,27 @@
1/*
2 * linux/include/asm-arm/arch-realview/dma.h
3 *
4 * Copyright (C) 2003 ARM Limited.
5 * Copyright (C) 1997,1998 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_DMA_H
22#define __ASM_ARCH_DMA_H
23
24#define MAX_DMA_ADDRESS 0xffffffff
25#define MAX_DMA_CHANNELS 0
26
27#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
new file mode 100644
index 000000000000..2712ba77bb3a
--- /dev/null
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -0,0 +1,49 @@
1/*
2 * include/asm-arm/arch-realview/entry-macro.S
3 *
4 * Low-level IRQ helper macros for RealView platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/gic.h>
12
13 .macro disable_fiq
14 .endm
15
16 /*
17 * The interrupt numbering scheme is defined in the
18 * interrupt controller spec. To wit:
19 *
20 * Interrupts 0-15 are IPI
21 * 16-28 are reserved
22 * 29-31 are local. We allow 30 to be used for the watchdog.
23 * 32-1020 are global
24 * 1021-1022 are reserved
25 * 1023 is "spurious" (no interrupt)
26 *
27 * For now, we ignore all local interrupts so only return an interrupt if it's
28 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
29 *
30 * A simple read from the controller will tell us the number of the highest
31 * priority enabled interrupt. We then just need to check whether it is in the
32 * valid range for an IRQ (30-1020 inclusive).
33 */
34
35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
36
37 ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
38 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
39
40 ldr \tmp, =1021
41
42 bic \irqnr, \irqstat, #0x1c00
43
44 cmp \irqnr, #29
45 cmpcc \irqnr, \irqnr
46 cmpne \irqnr, \tmp
47 cmpcs \irqnr, \irqnr
48
49 .endm
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
new file mode 100644
index 000000000000..67879cdb6ef2
--- /dev/null
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -0,0 +1,31 @@
1/*
2 * linux/include/asm-arm/arch-realview/hardware.h
3 *
4 * This file contains the hardware definitions of the RealView boards.
5 *
6 * Copyright (C) 2003 ARM Limited.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#ifndef __ASM_ARCH_HARDWARE_H
23#define __ASM_ARCH_HARDWARE_H
24
25#include <asm/sizes.h>
26#include <asm/arch/platform.h>
27
28/* macro to get at IO space when running virtually */
29#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
30
31#endif
diff --git a/include/asm-arm/arch-realview/io.h b/include/asm-arm/arch-realview/io.h
new file mode 100644
index 000000000000..d444a68ac330
--- /dev/null
+++ b/include/asm-arm/arch-realview/io.h
@@ -0,0 +1,34 @@
1/*
2 * linux/include/asm-arm/arch-realview/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25static inline void __iomem *__io(unsigned long addr)
26{
27 return (void __iomem *)addr;
28}
29
30#define __io(a) __io(a)
31#define __mem_pci(a) (a)
32#define __mem_isa(a) (a)
33
34#endif
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
new file mode 100644
index 000000000000..ff376494e5b1
--- /dev/null
+++ b/include/asm-arm/arch-realview/irqs.h
@@ -0,0 +1,103 @@
1/*
2 * linux/include/asm-arm/arch-realview/irqs.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <asm/arch/platform.h>
23
24/*
25 * IRQ interrupts definitions are the same the INT definitions
26 * held within platform.h
27 */
28#define IRQ_GIC_START 32
29#define IRQ_WDOGINT (IRQ_GIC_START + INT_WDOGINT)
30#define IRQ_SOFTINT (IRQ_GIC_START + INT_SOFTINT)
31#define IRQ_COMMRx (IRQ_GIC_START + INT_COMMRx)
32#define IRQ_COMMTx (IRQ_GIC_START + INT_COMMTx)
33#define IRQ_TIMERINT0_1 (IRQ_GIC_START + INT_TIMERINT0_1)
34#define IRQ_TIMERINT2_3 (IRQ_GIC_START + INT_TIMERINT2_3)
35#define IRQ_GPIOINT0 (IRQ_GIC_START + INT_GPIOINT0)
36#define IRQ_GPIOINT1 (IRQ_GIC_START + INT_GPIOINT1)
37#define IRQ_GPIOINT2 (IRQ_GIC_START + INT_GPIOINT2)
38#define IRQ_GPIOINT3 (IRQ_GIC_START + INT_GPIOINT3)
39#define IRQ_RTCINT (IRQ_GIC_START + INT_RTCINT)
40#define IRQ_SSPINT (IRQ_GIC_START + INT_SSPINT)
41#define IRQ_UARTINT0 (IRQ_GIC_START + INT_UARTINT0)
42#define IRQ_UARTINT1 (IRQ_GIC_START + INT_UARTINT1)
43#define IRQ_UARTINT2 (IRQ_GIC_START + INT_UARTINT2)
44#define IRQ_UART3 (IRQ_GIC_START + INT_UARTINT3)
45#define IRQ_SCIINT (IRQ_GIC_START + INT_SCIINT)
46#define IRQ_CLCDINT (IRQ_GIC_START + INT_CLCDINT)
47#define IRQ_DMAINT (IRQ_GIC_START + INT_DMAINT)
48#define IRQ_PWRFAILINT (IRQ_GIC_START + INT_PWRFAILINT)
49#define IRQ_MBXINT (IRQ_GIC_START + INT_MBXINT)
50#define IRQ_GNDINT (IRQ_GIC_START + INT_GNDINT)
51#define IRQ_MMCI0B (IRQ_GIC_START + INT_MMCI0B)
52#define IRQ_MMCI1B (IRQ_GIC_START + INT_MMCI1B)
53#define IRQ_KMI0 (IRQ_GIC_START + INT_KMI0)
54#define IRQ_KMI1 (IRQ_GIC_START + INT_KMI1)
55#define IRQ_SCI3 (IRQ_GIC_START + INT_SCI3)
56#define IRQ_CLCD (IRQ_GIC_START + INT_CLCD)
57#define IRQ_TOUCH (IRQ_GIC_START + INT_TOUCH)
58#define IRQ_KEYPAD (IRQ_GIC_START + INT_KEYPAD)
59#define IRQ_DoC (IRQ_GIC_START + INT_DoC)
60#define IRQ_MMCI0A (IRQ_GIC_START + INT_MMCI0A)
61#define IRQ_MMCI1A (IRQ_GIC_START + INT_MMCI1A)
62#define IRQ_AACI (IRQ_GIC_START + INT_AACI)
63#define IRQ_ETH (IRQ_GIC_START + INT_ETH)
64#define IRQ_USB (IRQ_GIC_START + INT_USB)
65
66#define IRQMASK_WDOGINT INTMASK_WDOGINT
67#define IRQMASK_SOFTINT INTMASK_SOFTINT
68#define IRQMASK_COMMRx INTMASK_COMMRx
69#define IRQMASK_COMMTx INTMASK_COMMTx
70#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
71#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
72#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0
73#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1
74#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2
75#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3
76#define IRQMASK_RTCINT INTMASK_RTCINT
77#define IRQMASK_SSPINT INTMASK_SSPINT
78#define IRQMASK_UARTINT0 INTMASK_UARTINT0
79#define IRQMASK_UARTINT1 INTMASK_UARTINT1
80#define IRQMASK_UARTINT2 INTMASK_UARTINT2
81#define IRQMASK_SCIINT INTMASK_SCIINT
82#define IRQMASK_CLCDINT INTMASK_CLCDINT
83#define IRQMASK_DMAINT INTMASK_DMAINT
84#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT
85#define IRQMASK_MBXINT INTMASK_MBXINT
86#define IRQMASK_GNDINT INTMASK_GNDINT
87#define IRQMASK_MMCI0B INTMASK_MMCI0B
88#define IRQMASK_MMCI1B INTMASK_MMCI1B
89#define IRQMASK_KMI0 INTMASK_KMI0
90#define IRQMASK_KMI1 INTMASK_KMI1
91#define IRQMASK_SCI3 INTMASK_SCI3
92#define IRQMASK_UART3 INTMASK_UART3
93#define IRQMASK_CLCD INTMASK_CLCD
94#define IRQMASK_TOUCH INTMASK_TOUCH
95#define IRQMASK_KEYPAD INTMASK_KEYPAD
96#define IRQMASK_DoC INTMASK_DoC
97#define IRQMASK_MMCI0A INTMASK_MMCI0A
98#define IRQMASK_MMCI1A INTMASK_MMCI1A
99#define IRQMASK_AACI INTMASK_AACI
100#define IRQMASK_ETH INTMASK_ETH
101#define IRQMASK_USB INTMASK_USB
102
103#define NR_IRQS (IRQ_GIC_START + 64)
diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h
new file mode 100644
index 000000000000..99667d5cc617
--- /dev/null
+++ b/include/asm-arm/arch-realview/memory.h
@@ -0,0 +1,38 @@
1/*
2 * linux/include/asm-arm/arch-realview/memory.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_MEMORY_H
21#define __ASM_ARCH_MEMORY_H
22
23/*
24 * Physical DRAM offset.
25 */
26#define PHYS_OFFSET (0x00000000UL)
27
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 */
35#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
36#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
37
38#endif
diff --git a/include/asm-arm/arch-realview/param.h b/include/asm-arm/arch-realview/param.h
new file mode 100644
index 000000000000..89b1235d32bd
--- /dev/null
+++ b/include/asm-arm/arch-realview/param.h
@@ -0,0 +1,19 @@
1/*
2 * linux/include/asm-arm/arch-realview/param.h
3 *
4 * Copyright (C) 2002 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
new file mode 100644
index 000000000000..4b6de13a6b9a
--- /dev/null
+++ b/include/asm-arm/arch-realview/platform.h
@@ -0,0 +1,395 @@
1/*
2 * linux/include/asm-arm/arch-realview/platform.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __address_h
22#define __address_h 1
23
24/*
25 * Memory definitions
26 */
27#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
28#define REALVIEW_BOOT_ROM_HI 0x30000000
29#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
30#define REALVIEW_BOOT_ROM_SIZE SZ_64M
31
32#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
33#define REALVIEW_SSRAM_SIZE SZ_2M
34
35#define REALVIEW_FLASH_BASE 0x40000000
36#define REALVIEW_FLASH_SIZE SZ_64M
37
38/*
39 * SDRAM
40 */
41#define REALVIEW_SDRAM_BASE 0x00000000
42
43/*
44 * Logic expansion modules
45 *
46 */
47
48
49/* ------------------------------------------------------------------------
50 * RealView Registers
51 * ------------------------------------------------------------------------
52 *
53 */
54#define REALVIEW_SYS_ID_OFFSET 0x00
55#define REALVIEW_SYS_SW_OFFSET 0x04
56#define REALVIEW_SYS_LED_OFFSET 0x08
57#define REALVIEW_SYS_OSC0_OFFSET 0x0C
58
59#define REALVIEW_SYS_OSC1_OFFSET 0x10
60#define REALVIEW_SYS_OSC2_OFFSET 0x14
61#define REALVIEW_SYS_OSC3_OFFSET 0x18
62#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
63
64#define REALVIEW_SYS_LOCK_OFFSET 0x20
65#define REALVIEW_SYS_100HZ_OFFSET 0x24
66#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
67#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
68#define REALVIEW_SYS_FLAGS_OFFSET 0x30
69#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
70#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
71#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
72#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
73#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
74#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
75#define REALVIEW_SYS_PCICTL_OFFSET 0x44
76#define REALVIEW_SYS_MCI_OFFSET 0x48
77#define REALVIEW_SYS_FLASH_OFFSET 0x4C
78#define REALVIEW_SYS_CLCD_OFFSET 0x50
79#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
80#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
81#define REALVIEW_SYS_24MHz_OFFSET 0x5C
82#define REALVIEW_SYS_MISC_OFFSET 0x60
83#define REALVIEW_SYS_IOSEL_OFFSET 0x70
84#define REALVIEW_SYS_TEST_OSC0_OFFSET 0x80
85#define REALVIEW_SYS_TEST_OSC1_OFFSET 0x84
86#define REALVIEW_SYS_TEST_OSC2_OFFSET 0x88
87#define REALVIEW_SYS_TEST_OSC3_OFFSET 0x8C
88#define REALVIEW_SYS_TEST_OSC4_OFFSET 0x90
89
90#define REALVIEW_SYS_BASE 0x10000000
91#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
92#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
93#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
94#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
95#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
96
97#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
98#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
99#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
100#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
101#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
102#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
103#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
104#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
105#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
106#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
107#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
108#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
109#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
110#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
111#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
112#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
113#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
114#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
115#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
116#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
117#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
118#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
119#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
120#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
121#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
122
123/*
124 * Values for REALVIEW_SYS_RESET_CTRL
125 */
126#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
127#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
128#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
129#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
130#define REALVIEW_SYS_CTRL_RESET_POR 0x05
131#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
132
133#define REALVIEW_SYS_CTRL_LED (1 << 0)
134
135
136/* ------------------------------------------------------------------------
137 * RealView control registers
138 * ------------------------------------------------------------------------
139 */
140
141/*
142 * REALVIEW_IDFIELD
143 *
144 * 31:24 = manufacturer (0x41 = ARM)
145 * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
146 * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
147 * 11:4 = build value
148 * 3:0 = revision number (0x1 = rev B (AHB))
149 */
150
151/*
152 * REALVIEW_SYS_LOCK
153 * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
154 * SYS_CLD, SYS_BOOTCS
155 */
156#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
157#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
158
159/*
160 * REALVIEW_SYS_FLASH
161 */
162#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
163
164/*
165 * REALVIEW_INTREG
166 * - used to acknowledge and control MMCI and UART interrupts
167 */
168#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
169#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
170#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
171 /* write 1 to acknowledge and clear */
172#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
173#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
174
175/*
176 * REALVIEW peripheral addresses
177 */
178#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
179#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
180 /* Reserved 0x10003000 */
181#define REALVIEW_AACI_BASE 0x10004000 /* Audio */
182#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
183#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
184#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
185#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
186#define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */
187#define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */
188#define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */
189#define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */
190#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
191#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
192 /* Reserved 0x1000F000 */
193#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
194#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
195#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
196#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
197#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
198#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
199 /* Reserved 0x10016000 */
200#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
201#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
202#define REALVIEW_PCI_CORE_BASE 0x10019000 /* PCI configuration */
203 /* Reserved 0x1001A000 - 0x1001FFFF */
204#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
205#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
206#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
207#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
208#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
209 /* Reserved 0x10090000 - 0x100EFFFF */
210
211#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
212
213/* PCI space */
214#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
215#define REALVIEW_PCI_CFG_BASE 0x42000000
216#define REALVIEW_PCI_MEM_BASE0 0x44000000
217#define REALVIEW_PCI_MEM_BASE1 0x50000000
218#define REALVIEW_PCI_MEM_BASE2 0x60000000
219/* Sizes of above maps */
220#define REALVIEW_PCI_BASE_SIZE 0x01000000
221#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000
222#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
223#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
224#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
225
226#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
227#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */
228
229/*
230 * Disk on Chip
231 */
232#define REALVIEW_DOC_BASE 0x2C000000
233#define REALVIEW_DOC_SIZE (16 << 20)
234#define REALVIEW_DOC_PAGE_SIZE 512
235#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE)
236
237#define ERASE_UNIT_PAGES 32
238#define START_PAGE 0x80
239
240/*
241 * LED settings, bits [7:0]
242 */
243#define REALVIEW_SYS_LED0 (1 << 0)
244#define REALVIEW_SYS_LED1 (1 << 1)
245#define REALVIEW_SYS_LED2 (1 << 2)
246#define REALVIEW_SYS_LED3 (1 << 3)
247#define REALVIEW_SYS_LED4 (1 << 4)
248#define REALVIEW_SYS_LED5 (1 << 5)
249#define REALVIEW_SYS_LED6 (1 << 6)
250#define REALVIEW_SYS_LED7 (1 << 7)
251
252#define ALL_LEDS 0xFF
253
254#define LED_BANK REALVIEW_SYS_LED
255
256/*
257 * Control registers
258 */
259#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
260#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
261#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
262#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
263
264/* ------------------------------------------------------------------------
265 * Interrupts - bit assignment (primary)
266 * ------------------------------------------------------------------------
267 */
268#define INT_WDOGINT 0 /* Watchdog timer */
269#define INT_SOFTINT 1 /* Software interrupt */
270#define INT_COMMRx 2 /* Debug Comm Rx interrupt */
271#define INT_COMMTx 3 /* Debug Comm Tx interrupt */
272#define INT_TIMERINT0_1 4 /* Timer 0 and 1 */
273#define INT_TIMERINT2_3 5 /* Timer 2 and 3 */
274#define INT_GPIOINT0 6 /* GPIO 0 */
275#define INT_GPIOINT1 7 /* GPIO 1 */
276#define INT_GPIOINT2 8 /* GPIO 2 */
277/* 9 reserved */
278#define INT_RTCINT 10 /* Real Time Clock */
279#define INT_SSPINT 11 /* Synchronous Serial Port */
280#define INT_UARTINT0 12 /* UART 0 on development chip */
281#define INT_UARTINT1 13 /* UART 1 on development chip */
282#define INT_UARTINT2 14 /* UART 2 on development chip */
283#define INT_UARTINT3 15 /* UART 3 on development chip */
284#define INT_SCIINT 16 /* Smart Card Interface */
285#define INT_MMCI0A 17 /* Multimedia Card 0A */
286#define INT_MMCI0B 18 /* Multimedia Card 0B */
287#define INT_AACI 19 /* Audio Codec */
288#define INT_KMI0 20 /* Keyboard/Mouse port 0 */
289#define INT_KMI1 21 /* Keyboard/Mouse port 1 */
290#define INT_CHARLCD 22 /* Character LCD */
291#define INT_CLCDINT 23 /* CLCD controller */
292#define INT_DMAINT 24 /* DMA controller */
293#define INT_PWRFAILINT 25 /* Power failure */
294#define INT_PISMO 26
295#define INT_DoC 27 /* Disk on Chip memory controller */
296#define INT_ETH 28 /* Ethernet controller */
297#define INT_USB 29 /* USB controller */
298#define INT_TSPENINT 30 /* Touchscreen pen */
299#define INT_TSKPADINT 31 /* Touchscreen keypad */
300
301/*
302 * Interrupt bit positions
303 *
304 */
305#define INTMASK_WDOGINT (1 << INT_WDOGINT)
306#define INTMASK_SOFTINT (1 << INT_SOFTINT)
307#define INTMASK_COMMRx (1 << INT_COMMRx)
308#define INTMASK_COMMTx (1 << INT_COMMTx)
309#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1)
310#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3)
311#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0)
312#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1)
313#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2)
314#define INTMASK_RTCINT (1 << INT_RTCINT)
315#define INTMASK_SSPINT (1 << INT_SSPINT)
316#define INTMASK_UARTINT0 (1 << INT_UARTINT0)
317#define INTMASK_UARTINT1 (1 << INT_UARTINT1)
318#define INTMASK_UARTINT2 (1 << INT_UARTINT2)
319#define INTMASK_UARTINT3 (1 << INT_UARTINT3)
320#define INTMASK_SCIINT (1 << INT_SCIINT)
321#define INTMASK_MMCI0A (1 << INT_MMCI0A)
322#define INTMASK_MMCI0B (1 << INT_MMCI0B)
323#define INTMASK_AACI (1 << INT_AACI)
324#define INTMASK_KMI0 (1 << INT_KMI0)
325#define INTMASK_KMI1 (1 << INT_KMI1)
326#define INTMASK_CHARLCD (1 << INT_CHARLCD)
327#define INTMASK_CLCDINT (1 << INT_CLCDINT)
328#define INTMASK_DMAINT (1 << INT_DMAINT)
329#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT)
330#define INTMASK_PISMO (1 << INT_PISMO)
331#define INTMASK_DoC (1 << INT_DoC)
332#define INTMASK_ETH (1 << INT_ETH)
333#define INTMASK_USB (1 << INT_USB)
334#define INTMASK_TSPENINT (1 << INT_TSPENINT)
335#define INTMASK_TSKPADINT (1 << INT_TSKPADINT)
336
337#define MAXIRQNUM 31
338#define MAXFIQNUM 31
339#define MAXSWINUM 31
340
341/*
342 * Application Flash
343 *
344 */
345#define FLASH_BASE REALVIEW_FLASH_BASE
346#define FLASH_SIZE REALVIEW_FLASH_SIZE
347#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
348#define FLASH_BLOCK_SIZE SZ_128K
349
350/*
351 * Boot Flash
352 *
353 */
354#define EPROM_BASE REALVIEW_BOOT_ROM_HI
355#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
356#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
357
358/*
359 * Clean base - dummy
360 *
361 */
362#define CLEAN_BASE EPROM_BASE
363
364/*
365 * System controller bit assignment
366 */
367#define REALVIEW_REFCLK 0
368#define REALVIEW_TIMCLK 1
369
370#define REALVIEW_TIMER1_EnSel 15
371#define REALVIEW_TIMER2_EnSel 17
372#define REALVIEW_TIMER3_EnSel 19
373#define REALVIEW_TIMER4_EnSel 21
374
375
376#define MAX_TIMER 2
377#define MAX_PERIOD 699050
378#define TICKS_PER_uSEC 1
379
380/*
381 * These are useconds NOT ticks.
382 *
383 */
384#define mSEC_1 1000
385#define mSEC_5 (mSEC_1 * 5)
386#define mSEC_10 (mSEC_1 * 10)
387#define mSEC_25 (mSEC_1 * 25)
388#define SEC_1 (mSEC_1 * 1000)
389
390#define REALVIEW_CSR_BASE 0x10000000
391#define REALVIEW_CSR_SIZE 0x10000000
392
393#endif
394
395/* END */
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
new file mode 100644
index 000000000000..9f8fcbca0869
--- /dev/null
+++ b/include/asm-arm/arch-realview/system.h
@@ -0,0 +1,51 @@
1/*
2 * linux/include/asm-arm/arch-realview/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24#include <asm/hardware.h>
25#include <asm/io.h>
26#include <asm/arch/platform.h>
27
28static inline void arch_idle(void)
29{
30 /*
31 * This should do all the clock switching
32 * and wait for interrupt tricks
33 */
34 cpu_do_idle();
35}
36
37static inline void arch_reset(char mode)
38{
39 unsigned int hdr_ctrl = (IO_ADDRESS(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET);
40 unsigned int val;
41
42 /*
43 * To reset, we hit the on-board reset register
44 * in the system FPGA
45 */
46 val = __raw_readl(hdr_ctrl);
47 val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
48 __raw_writel(val, hdr_ctrl);
49}
50
51#endif
diff --git a/include/asm-arm/arch-realview/timex.h b/include/asm-arm/arch-realview/timex.h
new file mode 100644
index 000000000000..5b9d82d0a5e0
--- /dev/null
+++ b/include/asm-arm/arch-realview/timex.h
@@ -0,0 +1,23 @@
1/*
2 * linux/include/asm-arm/arch-realview/timex.h
3 *
4 * RealView architecture timex specifications
5 *
6 * Copyright (C) 2003 ARM Limited
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h
new file mode 100644
index 000000000000..b5e4d360665b
--- /dev/null
+++ b/include/asm-arm/arch-realview/uncompress.h
@@ -0,0 +1,54 @@
1/*
2 * linux/include/asm-arm/arch-realview/uncompress.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <asm/hardware.h>
21
22#define AMBA_UART_DR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x00))
23#define AMBA_UART_LCRH (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x2c))
24#define AMBA_UART_CR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x30))
25#define AMBA_UART_FR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x18))
26
27/*
28 * This does not append a newline
29 */
30static void putstr(const char *s)
31{
32 while (*s) {
33 while (AMBA_UART_FR & (1 << 5))
34 barrier();
35
36 AMBA_UART_DR = *s;
37
38 if (*s == '\n') {
39 while (AMBA_UART_FR & (1 << 5))
40 barrier();
41
42 AMBA_UART_DR = '\r';
43 }
44 s++;
45 }
46 while (AMBA_UART_FR & (1 << 3))
47 barrier();
48}
49
50/*
51 * nothing to do
52 */
53#define arch_decomp_setup()
54#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-realview/vmalloc.h b/include/asm-arm/arch-realview/vmalloc.h
new file mode 100644
index 000000000000..0ad49af186af
--- /dev/null
+++ b/include/asm-arm/arch-realview/vmalloc.h
@@ -0,0 +1,21 @@
1/*
2 * linux/include/asm-arm/arch-realview/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
diff --git a/include/asm-arm/hardware/amba_clcd.h b/include/asm-arm/hardware/amba_clcd.h
index ce4cf5c1c05d..6b8d73dc1ab0 100644
--- a/include/asm-arm/hardware/amba_clcd.h
+++ b/include/asm-arm/hardware/amba_clcd.h
@@ -22,7 +22,7 @@
22#define CLCD_UBAS 0x00000010 22#define CLCD_UBAS 0x00000010
23#define CLCD_LBAS 0x00000014 23#define CLCD_LBAS 0x00000014
24 24
25#ifndef CONFIG_ARCH_VERSATILE 25#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
26#define CLCD_IENB 0x00000018 26#define CLCD_IENB 0x00000018
27#define CLCD_CNTL 0x0000001c 27#define CLCD_CNTL 0x0000001c
28#else 28#else
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 09:10:35 -0500