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authorAndrew Vasquez <andrew.vasquez@qlogic.com>2007-09-20 17:07:49 -0400
committerJames Bottomley <jejb@mulgrave.localdomain>2007-10-12 14:50:37 -0400
commit87f27015b8d9f19d6de295e2316cff7960c9950b (patch)
tree6a14bff511d27de116b988d50384af9de47ee9d6
parent8b3253d10f1c7910c96d4acad4ef490f30799b21 (diff)
[SCSI] qla2xxx: Rework MSI-X handlers.
Since MSI-X vectors do not require a clearing "handshake" from the system perspective, and the registered handler will not be called more than once for one occurrence of receipt of a vector, there is no requirement to flush the risc register write clearing the interrupt condition in the risc. Also, since the msi-x registered handlers are optimised for a particular vector, it is preferable to handle the one vector received per invocation of the handler. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
-rw-r--r--drivers/scsi/qla2xxx/qla_isr.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index f61c2fe8eb59..c4768c4f3990 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -1679,7 +1679,6 @@ qla24xx_msix_rsp_q(int irq, void *dev_id)
1679 qla24xx_process_response_queue(ha); 1679 qla24xx_process_response_queue(ha);
1680 1680
1681 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT); 1681 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
1682 RD_REG_DWORD_RELAXED(&reg->hccr);
1683 1682
1684 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1683 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1685 1684
@@ -1693,7 +1692,6 @@ qla24xx_msix_default(int irq, void *dev_id)
1693 struct device_reg_24xx __iomem *reg; 1692 struct device_reg_24xx __iomem *reg;
1694 int status; 1693 int status;
1695 unsigned long flags; 1694 unsigned long flags;
1696 unsigned long iter;
1697 uint32_t stat; 1695 uint32_t stat;
1698 uint32_t hccr; 1696 uint32_t hccr;
1699 uint16_t mb[4]; 1697 uint16_t mb[4];
@@ -1703,7 +1701,7 @@ qla24xx_msix_default(int irq, void *dev_id)
1703 status = 0; 1701 status = 0;
1704 1702
1705 spin_lock_irqsave(&ha->hardware_lock, flags); 1703 spin_lock_irqsave(&ha->hardware_lock, flags);
1706 for (iter = 50; iter--; ) { 1704 do {
1707 stat = RD_REG_DWORD(&reg->host_status); 1705 stat = RD_REG_DWORD(&reg->host_status);
1708 if (stat & HSRX_RISC_PAUSED) { 1706 if (stat & HSRX_RISC_PAUSED) {
1709 if (pci_channel_offline(ha->pdev)) 1707 if (pci_channel_offline(ha->pdev))
@@ -1748,8 +1746,7 @@ qla24xx_msix_default(int irq, void *dev_id)
1748 break; 1746 break;
1749 } 1747 }
1750 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT); 1748 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
1751 RD_REG_DWORD_RELAXED(&reg->hccr); 1749 } while (0);
1752 }
1753 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1750 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1754 1751
1755 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && 1752 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&