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authorRalf Baechle <ralf@linux-mips.org>2006-02-28 12:04:20 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-02-28 12:04:20 -0500
commit778e2ac5970e445f8c6b7d8aa597ac162afe270a (patch)
treedfaa3d0d2732ca14e256f5801a9d91359b70497d
parent4debe4f963f9135771a8c5bc66e84396201dcfd8 (diff)
[MIPS] Fix build error on processors that don's support copy-on-write.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/lib/iomap.c2
-rw-r--r--include/asm-mips/io.h18
2 files changed, 19 insertions, 1 deletions
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c
index 7e2ced715cfb..f4ac5bbcd81f 100644
--- a/arch/mips/lib/iomap.c
+++ b/arch/mips/lib/iomap.c
@@ -63,7 +63,7 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
63 return ioport_map(start, len); 63 return ioport_map(start, len);
64 if (flags & IORESOURCE_MEM) { 64 if (flags & IORESOURCE_MEM) {
65 if (flags & IORESOURCE_CACHEABLE) 65 if (flags & IORESOURCE_CACHEABLE)
66 return ioremap_cacheable_cow(start, len); 66 return ioremap_cachable(start, len);
67 return ioremap_nocache(start, len); 67 return ioremap_nocache(start, len);
68 } 68 }
69 69
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 5a4c8a54b8f4..8c011aa61afa 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -283,6 +283,24 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
283 __ioremap_mode((offset), (size), _CACHE_UNCACHED) 283 __ioremap_mode((offset), (size), _CACHE_UNCACHED)
284 284
285/* 285/*
286 * ioremap_cachable - map bus memory into CPU space
287 * @offset: bus address of the memory
288 * @size: size of the resource to map
289 *
290 * ioremap_nocache performs a platform specific sequence of operations to
291 * make bus memory CPU accessible via the readb/readw/readl/writeb/
292 * writew/writel functions and the other mmio helpers. The returned
293 * address is not guaranteed to be usable directly as a virtual
294 * address.
295 *
296 * This version of ioremap ensures that the memory is marked cachable by
297 * the CPU. Also enables full write-combining. Useful for some
298 * memory-like regions on I/O busses.
299 */
300#define ioremap_cachable(offset, size) \
301 __ioremap_mode((offset), (size), PAGE_CACHABLE_DEFAULT)
302
303/*
286 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow 304 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow
287 * requests a cachable mapping, ioremap_uncached_accelerated requests a 305 * requests a cachable mapping, ioremap_uncached_accelerated requests a
288 * mapping using the uncached accelerated mode which isn't supported on 306 * mapping using the uncached accelerated mode which isn't supported on