diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2010-01-15 10:24:57 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-01-15 17:05:43 -0500 |
commit | 6dcd9d911cace479ff5612dab3896c8fceb60773 (patch) | |
tree | f1f7cbb9c281e3c148983ab26e7e323684c8c3ce | |
parent | 15931e318b27e85ea06f44d53abc3d3e6a3fc9ff (diff) |
b43: N-PHY: implement TX power control coef setup
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/b43/phy_n.c | 69 |
1 files changed, 68 insertions, 1 deletions
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c index f982f56d5bf3..a0e8283519fd 100644 --- a/drivers/net/wireless/b43/phy_n.c +++ b/drivers/net/wireless/b43/phy_n.c | |||
@@ -659,6 +659,73 @@ static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable) | |||
659 | } | 659 | } |
660 | } | 660 | } |
661 | 661 | ||
662 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlCoefSetup */ | ||
663 | static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev) | ||
664 | { | ||
665 | struct b43_phy_n *nphy = dev->phy.n; | ||
666 | int i, j; | ||
667 | u32 tmp; | ||
668 | u32 cur_real, cur_imag, real_part, imag_part; | ||
669 | |||
670 | u16 buffer[7]; | ||
671 | |||
672 | if (nphy->hang_avoid) | ||
673 | b43_nphy_stay_in_carrier_search(dev, true); | ||
674 | |||
675 | /* TODO: Read an N PHY Table with ID 15, length 7, offset 80, | ||
676 | width 16, and data pointer buffer */ | ||
677 | |||
678 | for (i = 0; i < 2; i++) { | ||
679 | tmp = ((buffer[i * 2] & 0x3FF) << 10) | | ||
680 | (buffer[i * 2 + 1] & 0x3FF); | ||
681 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, | ||
682 | (((i + 26) << 10) | 320)); | ||
683 | for (j = 0; j < 128; j++) { | ||
684 | b43_phy_write(dev, B43_NPHY_TABLE_DATAHI, | ||
685 | ((tmp >> 16) & 0xFFFF)); | ||
686 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, | ||
687 | (tmp & 0xFFFF)); | ||
688 | } | ||
689 | } | ||
690 | |||
691 | for (i = 0; i < 2; i++) { | ||
692 | tmp = buffer[5 + i]; | ||
693 | real_part = (tmp >> 8) & 0xFF; | ||
694 | imag_part = (tmp & 0xFF); | ||
695 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, | ||
696 | (((i + 26) << 10) | 448)); | ||
697 | |||
698 | if (dev->phy.rev >= 3) { | ||
699 | cur_real = real_part; | ||
700 | cur_imag = imag_part; | ||
701 | tmp = ((cur_real & 0xFF) << 8) | (cur_imag & 0xFF); | ||
702 | } | ||
703 | |||
704 | for (j = 0; j < 128; j++) { | ||
705 | if (dev->phy.rev < 3) { | ||
706 | cur_real = (real_part * loscale[j] + 128) >> 8; | ||
707 | cur_imag = (imag_part * loscale[j] + 128) >> 8; | ||
708 | tmp = ((cur_real & 0xFF) << 8) | | ||
709 | (cur_imag & 0xFF); | ||
710 | } | ||
711 | b43_phy_write(dev, B43_NPHY_TABLE_DATAHI, | ||
712 | ((tmp >> 16) & 0xFFFF)); | ||
713 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, | ||
714 | (tmp & 0xFFFF)); | ||
715 | } | ||
716 | } | ||
717 | |||
718 | if (dev->phy.rev >= 3) { | ||
719 | b43_shm_write16(dev, B43_SHM_SHARED, | ||
720 | B43_SHM_SH_NPHY_TXPWR_INDX0, 0xFFFF); | ||
721 | b43_shm_write16(dev, B43_SHM_SHARED, | ||
722 | B43_SHM_SH_NPHY_TXPWR_INDX1, 0xFFFF); | ||
723 | } | ||
724 | |||
725 | if (nphy->hang_avoid) | ||
726 | b43_nphy_stay_in_carrier_search(dev, false); | ||
727 | } | ||
728 | |||
662 | enum b43_nphy_rf_sequence { | 729 | enum b43_nphy_rf_sequence { |
663 | B43_RFSEQ_RX2TX, | 730 | B43_RFSEQ_RX2TX, |
664 | B43_RFSEQ_TX2RX, | 731 | B43_RFSEQ_TX2RX, |
@@ -2040,7 +2107,7 @@ int b43_phy_initn(struct b43_wldev *dev) | |||
2040 | b43_nphy_restore_cal(dev); | 2107 | b43_nphy_restore_cal(dev); |
2041 | } | 2108 | } |
2042 | 2109 | ||
2043 | /* b43_nphy_tx_pwr_ctrl_coef_setup(dev); */ | 2110 | b43_nphy_tx_pwr_ctrl_coef_setup(dev); |
2044 | /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */ | 2111 | /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */ |
2045 | b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015); | 2112 | b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015); |
2046 | b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320); | 2113 | b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320); |