intel-iommu: Print out iommu seq_id

more info on system with more than one IOMMU

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

3 files changed, 11 insertions, 7 deletions

diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index a04bde9bd10f..d439917f37a9 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -806,7 +806,8 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
         }
 
         ver = readl(iommu->reg + DMAR_VER_REG);
-        pr_info("IOMMU %llx: ver %d:%d cap %llx ecap %llx\n",
+        pr_info("IOMMU %d: reg_base_addr %llx ver %d:%d cap %llx ecap %llx\n",
+                iommu->seq_id,
                 (unsigned long long)drhd->reg_base_addr,
                 DMAR_VER_MAJOR(ver), DMAR_VER_MINOR(ver),
                 (unsigned long long)iommu->cap,
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 9ce79b1bae83..da40f0789739 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -1150,7 +1150,8 @@ static int iommu_init_domains(struct intel_iommu *iommu)
         unsigned long nlongs;
 
         ndomains = cap_ndoms(iommu->cap);
-        pr_debug("Number of Domains supportd <%ld>\n", ndomains);
+        pr_debug("IOMMU %d: Number of Domains supportd <%ld>\n", iommu->seq_id,
+                        ndomains);
         nlongs = BITS_TO_LONGS(ndomains);
 
         spin_lock_init(&iommu->lock);
@@ -2319,14 +2320,16 @@ int __init init_dmars(void)
                          */
                         iommu->flush.flush_context = __iommu_flush_context;
                         iommu->flush.flush_iotlb = __iommu_flush_iotlb;
-                        printk(KERN_INFO "IOMMU 0x%Lx: using Register based "
+                        printk(KERN_INFO "IOMMU %d 0x%Lx: using Register based "
                                "invalidation\n",
+                                iommu->seq_id,
                                (unsigned long long)drhd->reg_base_addr);
                 } else {
                         iommu->flush.flush_context = qi_flush_context;
                         iommu->flush.flush_iotlb = qi_flush_iotlb;
-                        printk(KERN_INFO "IOMMU 0x%Lx: using Queued "
+                        printk(KERN_INFO "IOMMU %d 0x%Lx: using Queued "
                                "invalidation\n",
+                                iommu->seq_id,
                                (unsigned long long)drhd->reg_base_addr);
                 }
         }
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index 95b849130ad4..c13802a7e109 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -831,9 +831,9 @@ static int ir_parse_ioapic_hpet_scope(struct acpi_dmar_header *header,
                                 return -1;
                         }
 
-                        printk(KERN_INFO "IOAPIC id %d under DRHD base"
-                               " 0x%Lx\n", scope->enumeration_id,
-                               drhd->address);
+                        printk(KERN_INFO "IOAPIC id %d under DRHD base "
+                               " 0x%Lx IOMMU %d\n", scope->enumeration_id,
+                               drhd->address, iommu->seq_id);
 
                         ir_parse_one_ioapic_scope(scope, iommu);
                 } else if (scope->entry_type == ACPI_DMAR_SCOPE_TYPE_HPET) {