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authorJean Delvare <khali@linux-fr.org>2006-04-25 08:18:16 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-22 14:10:33 -0400
commit5c7ae65899a4c5b05b6277f856018d1eeeb98907 (patch)
treee59ee9f28b3e07bdb0a0716c058cfde0fd867ee1
parentf9ba6c04ef1dcf16f7179b7883e9751baaac218e (diff)
[PATCH] I2C: i2c-nforce2: Add support for the nForce4 MCP51 and MCP55
Add support for the new nForce4 MCP51 (also known as nForce 410 or 430) and nForce4 MCP55 to the i2c-nforce2 driver. Some code changes were required because the base I/O address registers have changed in these versions. Standard BARs are now being used, while the original nForce2 chips used non-standard ones. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--Documentation/i2c/busses/i2c-nforce22
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c38
-rw-r--r--include/linux/pci_ids.h2
3 files changed, 31 insertions, 11 deletions
diff --git a/Documentation/i2c/busses/i2c-nforce2 b/Documentation/i2c/busses/i2c-nforce2
index d751282d9b2a..cd49c428a3ab 100644
--- a/Documentation/i2c/busses/i2c-nforce2
+++ b/Documentation/i2c/busses/i2c-nforce2
@@ -7,6 +7,8 @@ Supported adapters:
7 * nForce3 250Gb MCP 10de:00E4 7 * nForce3 250Gb MCP 10de:00E4
8 * nForce4 MCP 10de:0052 8 * nForce4 MCP 10de:0052
9 * nForce4 MCP-04 10de:0034 9 * nForce4 MCP-04 10de:0034
10 * nForce4 MCP51 10de:0264
11 * nForce4 MCP55 10de:0368
10 12
11Datasheet: not publically available, but seems to be similar to the 13Datasheet: not publically available, but seems to be similar to the
12 AMD-8111 SMBus 2.0 adapter. 14 AMD-8111 SMBus 2.0 adapter.
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 2d80eb26f688..604b49e22df1 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -31,6 +31,8 @@
31 nForce3 250Gb MCP 00E4 31 nForce3 250Gb MCP 00E4
32 nForce4 MCP 0052 32 nForce4 MCP 0052
33 nForce4 MCP-04 0034 33 nForce4 MCP-04 0034
34 nForce4 MCP51 0264
35 nForce4 MCP55 0368
34 36
35 This driver supports the 2 SMBuses that are included in the MCP of the 37 This driver supports the 2 SMBuses that are included in the MCP of the
36 nForce2/3/4 chipsets. 38 nForce2/3/4 chipsets.
@@ -64,6 +66,7 @@ struct nforce2_smbus {
64 66
65/* 67/*
66 * nVidia nForce2 SMBus control register definitions 68 * nVidia nForce2 SMBus control register definitions
69 * (Newer incarnations use standard BARs 4 and 5 instead)
67 */ 70 */
68#define NFORCE_PCI_SMB1 0x50 71#define NFORCE_PCI_SMB1 0x50
69#define NFORCE_PCI_SMB2 0x54 72#define NFORCE_PCI_SMB2 0x54
@@ -259,6 +262,8 @@ static struct pci_device_id nforce2_ids[] = {
259 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, 262 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
260 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, 263 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
261 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) }, 264 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
265 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
266 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
262 { 0 } 267 { 0 }
263}; 268};
264 269
@@ -266,19 +271,29 @@ static struct pci_device_id nforce2_ids[] = {
266MODULE_DEVICE_TABLE (pci, nforce2_ids); 271MODULE_DEVICE_TABLE (pci, nforce2_ids);
267 272
268 273
269static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg, 274static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
270 struct nforce2_smbus *smbus, char *name) 275 int alt_reg, struct nforce2_smbus *smbus, const char *name)
271{ 276{
272 u16 iobase;
273 int error; 277 int error;
274 278
275 if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) { 279 smbus->base = pci_resource_start(dev, bar);
276 dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name); 280 if (smbus->base) {
277 return -1; 281 smbus->size = pci_resource_len(dev, bar);
282 } else {
283 /* Older incarnations of the device used non-standard BARs */
284 u16 iobase;
285
286 if (pci_read_config_word(dev, alt_reg, &iobase)
287 != PCIBIOS_SUCCESSFUL) {
288 dev_err(&dev->dev, "Error reading PCI config for %s\n",
289 name);
290 return -1;
291 }
292
293 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
294 smbus->size = 8;
278 } 295 }
279 smbus->dev = dev; 296 smbus->dev = dev;
280 smbus->base = iobase & 0xfffc;
281 smbus->size = 8;
282 297
283 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { 298 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
284 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", 299 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
@@ -313,12 +328,13 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
313 pci_set_drvdata(dev, smbuses); 328 pci_set_drvdata(dev, smbuses);
314 329
315 /* SMBus adapter 1 */ 330 /* SMBus adapter 1 */
316 res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); 331 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
317 if (res1 < 0) { 332 if (res1 < 0) {
318 dev_err(&dev->dev, "Error probing SMB1.\n"); 333 dev_err(&dev->dev, "Error probing SMB1.\n");
319 smbuses[0].base = 0; /* to have a check value */ 334 smbuses[0].base = 0; /* to have a check value */
320 } 335 }
321 res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2"); 336 /* SMBus adapter 2 */
337 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
322 if (res2 < 0) { 338 if (res2 < 0) {
323 dev_err(&dev->dev, "Error probing SMB2.\n"); 339 dev_err(&dev->dev, "Error probing SMB2.\n");
324 smbuses[1].base = 0; /* to have a check value */ 340 smbuses[1].base = 0; /* to have a check value */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 489af9d3ce1f..d33436097e1d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1130,9 +1130,11 @@
1130#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258 1130#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258
1131#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259 1131#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259
1132#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B 1132#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B
1133#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS 0x0264
1133#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265 1134#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265
1134#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 1135#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266
1135#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 1136#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267
1137#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS 0x0368
1136#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E 1138#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE 0x036E
1137#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x037E 1139#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA 0x037E
1138#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F 1140#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F