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author | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-02-21 11:58:52 -0500 |
---|---|---|
committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-02-24 14:36:55 -0500 |
commit | 4802f16d512d6e3b36177709d50c05df0ef52a6c (patch) | |
tree | 3d46d5088d41b8e38e7601a1a37c676d54270fe2 | |
parent | 3e9cc2f3b7ddabbbfc9abd043887030c669380aa (diff) |
firewire: ohci: fix IR/IT context mask mixup
This bug was present in firewire-ohci since day one: The number of
available isochronous receive DMA contexts was mixed up with that of
available isochronous transmit DMA contexts.
This is harmless on a few chips which offer the same number of contexts
in both directions, but most chips nowadays implement only the standard
minimum of 4 IR contexts, but 8 IT contexts. If a user attempted to run
a lot of IR contexts at once, results with more than four were therefore
unpredictable. I suppose the controller would simply refuse to start
DMA of any unimplemented context.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
-rw-r--r-- | drivers/firewire/ohci.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index 9815137b7c7d..a387bcd62466 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c | |||
@@ -2395,17 +2395,17 @@ static int __devinit pci_probe(struct pci_dev *dev, | |||
2395 | OHCI1394_AsRspTrContextControlSet, handle_at_packet); | 2395 | OHCI1394_AsRspTrContextControlSet, handle_at_packet); |
2396 | 2396 | ||
2397 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); | 2397 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); |
2398 | ohci->it_context_mask = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); | 2398 | ohci->ir_context_channels = ~0ULL; |
2399 | ohci->ir_context_mask = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); | ||
2399 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); | 2400 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); |
2400 | size = sizeof(struct iso_context) * hweight32(ohci->it_context_mask); | 2401 | size = sizeof(struct iso_context) * hweight32(ohci->ir_context_mask); |
2401 | ohci->it_context_list = kzalloc(size, GFP_KERNEL); | 2402 | ohci->ir_context_list = kzalloc(size, GFP_KERNEL); |
2402 | 2403 | ||
2403 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); | 2404 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); |
2404 | ohci->ir_context_channels = ~0ULL; | 2405 | ohci->it_context_mask = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); |
2405 | ohci->ir_context_mask = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); | ||
2406 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); | 2406 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); |
2407 | size = sizeof(struct iso_context) * hweight32(ohci->ir_context_mask); | 2407 | size = sizeof(struct iso_context) * hweight32(ohci->it_context_mask); |
2408 | ohci->ir_context_list = kzalloc(size, GFP_KERNEL); | 2408 | ohci->it_context_list = kzalloc(size, GFP_KERNEL); |
2409 | 2409 | ||
2410 | if (ohci->it_context_list == NULL || ohci->ir_context_list == NULL) { | 2410 | if (ohci->it_context_list == NULL || ohci->ir_context_list == NULL) { |
2411 | err = -ENOMEM; | 2411 | err = -ENOMEM; |