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authorNick Piggin <npiggin@suse.de>2007-10-12 21:06:55 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-12 21:41:21 -0400
commit4071c718555d955a35e9651f77086096ad87d498 (patch)
tree5189a9995143892a8ef7ecfc04c11c1d546bc21b
parentdf1bdc0667eb3132fe60b3562347ca9133694ee0 (diff)
x86: fix IO write barrier
wmb() on x86 must always include a barrier, because stores can go out of order in many cases when dealing with devices (eg. WC memory). Signed-off-by: Nick Piggin <npiggin@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--include/asm-x86/system_32.h15
-rw-r--r--include/asm-x86/system_64.h6
2 files changed, 7 insertions, 14 deletions
diff --git a/include/asm-x86/system_32.h b/include/asm-x86/system_32.h
index d69ba937e092..8b15bd3057c9 100644
--- a/include/asm-x86/system_32.h
+++ b/include/asm-x86/system_32.h
@@ -216,6 +216,7 @@ static inline unsigned long get_limit(unsigned long segment)
216 216
217#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) 217#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
218#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2) 218#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
219#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
219 220
220/** 221/**
221 * read_barrier_depends - Flush all pending reads that subsequents reads 222 * read_barrier_depends - Flush all pending reads that subsequents reads
@@ -271,18 +272,14 @@ static inline unsigned long get_limit(unsigned long segment)
271 272
272#define read_barrier_depends() do { } while(0) 273#define read_barrier_depends() do { } while(0)
273 274
274#ifdef CONFIG_X86_OOSTORE
275/* Actually there are no OOO store capable CPUs for now that do SSE,
276 but make it already an possibility. */
277#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
278#else
279#define wmb() __asm__ __volatile__ ("": : :"memory")
280#endif
281
282#ifdef CONFIG_SMP 275#ifdef CONFIG_SMP
283#define smp_mb() mb() 276#define smp_mb() mb()
284#define smp_rmb() rmb() 277#define smp_rmb() rmb()
285#define smp_wmb() wmb() 278#ifdef CONFIG_X86_OOSTORE
279# define smp_wmb() wmb()
280#else
281# define smp_wmb() barrier()
282#endif
286#define smp_read_barrier_depends() read_barrier_depends() 283#define smp_read_barrier_depends() read_barrier_depends()
287#define set_mb(var, value) do { (void) xchg(&var, value); } while (0) 284#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
288#else 285#else
diff --git a/include/asm-x86/system_64.h b/include/asm-x86/system_64.h
index 02175aa1d16a..eff730b11926 100644
--- a/include/asm-x86/system_64.h
+++ b/include/asm-x86/system_64.h
@@ -159,12 +159,8 @@ static inline void write_cr8(unsigned long val)
159 */ 159 */
160#define mb() asm volatile("mfence":::"memory") 160#define mb() asm volatile("mfence":::"memory")
161#define rmb() asm volatile("lfence":::"memory") 161#define rmb() asm volatile("lfence":::"memory")
162
163#ifdef CONFIG_UNORDERED_IO
164#define wmb() asm volatile("sfence" ::: "memory") 162#define wmb() asm volatile("sfence" ::: "memory")
165#else 163
166#define wmb() asm volatile("" ::: "memory")
167#endif
168#define read_barrier_depends() do {} while(0) 164#define read_barrier_depends() do {} while(0)
169#define set_mb(var, value) do { (void) xchg(&var, value); } while (0) 165#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
170 166