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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-10-10 16:39:32 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-10-10 16:39:32 -0400
commit1785192b5310ee25165768f5bb80f13146788e3e (patch)
tree526b0eb23c057b47fd5cdc6389808eba7f55faf0
parenta02227c9774b3bff08c7f557d06247e0a03ac435 (diff)
hpt366: add hpt3xx_disable_fast_irq() helper
* Factor out disabling of "fast interrupt" prediction from init_hwif_hpt366() to hpt3xx_disable_fast_irq() helper. * Use hpt3xx_disable_fast_irq() in ->init_chipset instead of ->init_hwif method. This is a preparation for adding proper PCI PM support. While at it: * Cache chip type in chip_type variable in hpt3xx_disable_fast_irq(). There should be no functional changes caused by this patch. Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
-rw-r--r--drivers/ide/pci/hpt366.c58
1 files changed, 33 insertions, 25 deletions
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 9056e3acc78b..ab6c217f104e 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -971,6 +971,36 @@ static int __devinit hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f
971 return 1; 971 return 1;
972} 972}
973 973
974static void __devinit hpt3xx_disable_fast_irq(struct pci_dev *dev, u8 mcr_addr)
975{
976 struct ide_host *host = pci_get_drvdata(dev);
977 struct hpt_info *info = host->host_priv + (&dev->dev == host->dev[1]);
978 u8 chip_type = info->chip_type;
979 u8 new_mcr, old_mcr = 0;
980
981 /*
982 * Disable the "fast interrupt" prediction. Don't hold off
983 * on interrupts. (== 0x01 despite what the docs say)
984 */
985 pci_read_config_byte(dev, mcr_addr + 1, &old_mcr);
986
987 if (chip_type >= HPT374)
988 new_mcr = old_mcr & ~0x07;
989 else if (chip_type >= HPT370) {
990 new_mcr = old_mcr;
991 new_mcr &= ~0x02;
992#ifdef HPT_DELAY_INTERRUPT
993 new_mcr &= ~0x01;
994#else
995 new_mcr |= 0x01;
996#endif
997 } else /* HPT366 and HPT368 */
998 new_mcr = old_mcr & ~0x80;
999
1000 if (new_mcr != old_mcr)
1001 pci_write_config_byte(dev, mcr_addr + 1, new_mcr);
1002}
1003
974static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev) 1004static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev)
975{ 1005{
976 unsigned long io_base = pci_resource_start(dev, 4); 1006 unsigned long io_base = pci_resource_start(dev, 4);
@@ -1208,9 +1238,11 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev)
1208 * NOTE: This register is only writeable via I/O space. 1238 * NOTE: This register is only writeable via I/O space.
1209 */ 1239 */
1210 if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ) 1240 if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ)
1211
1212 outb(inb(io_base + 0x9c) | 0x04, io_base + 0x9c); 1241 outb(inb(io_base + 0x9c) | 0x04, io_base + 0x9c);
1213 1242
1243 hpt3xx_disable_fast_irq(dev, 0x50);
1244 hpt3xx_disable_fast_irq(dev, 0x54);
1245
1214 return dev->irq; 1246 return dev->irq;
1215} 1247}
1216 1248
@@ -1264,7 +1296,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1264 struct hpt_info *info = hpt3xx_get_info(hwif->dev); 1296 struct hpt_info *info = hpt3xx_get_info(hwif->dev);
1265 int serialize = HPT_SERIALIZE_IO; 1297 int serialize = HPT_SERIALIZE_IO;
1266 u8 chip_type = info->chip_type; 1298 u8 chip_type = info->chip_type;
1267 u8 new_mcr, old_mcr = 0;
1268 1299
1269 /* Cache the channel's MISC. control registers' offset */ 1300 /* Cache the channel's MISC. control registers' offset */
1270 hwif->select_data = hwif->channel ? 0x54 : 0x50; 1301 hwif->select_data = hwif->channel ? 0x54 : 0x50;
@@ -1287,29 +1318,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1287 /* Serialize access to this device if needed */ 1318 /* Serialize access to this device if needed */
1288 if (serialize && hwif->mate) 1319 if (serialize && hwif->mate)
1289 hwif->serialized = hwif->mate->serialized = 1; 1320 hwif->serialized = hwif->mate->serialized = 1;
1290
1291 /*
1292 * Disable the "fast interrupt" prediction. Don't hold off
1293 * on interrupts. (== 0x01 despite what the docs say)
1294 */
1295 pci_read_config_byte(dev, hwif->select_data + 1, &old_mcr);
1296
1297 if (info->chip_type >= HPT374)
1298 new_mcr = old_mcr & ~0x07;
1299 else if (info->chip_type >= HPT370) {
1300 new_mcr = old_mcr;
1301 new_mcr &= ~0x02;
1302
1303#ifdef HPT_DELAY_INTERRUPT
1304 new_mcr &= ~0x01;
1305#else
1306 new_mcr |= 0x01;
1307#endif
1308 } else /* HPT366 and HPT368 */
1309 new_mcr = old_mcr & ~0x80;
1310
1311 if (new_mcr != old_mcr)
1312 pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);
1313} 1321}
1314 1322
1315static int __devinit init_dma_hpt366(ide_hwif_t *hwif, 1323static int __devinit init_dma_hpt366(ide_hwif_t *hwif,