diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2007-09-01 16:12:50 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-10-12 16:14:43 -0400 |
commit | 08197f6e3b262f4fb8b164c818d5e54b46c14711 (patch) | |
tree | a41fd3f3141def6021eb797b62c15ccf2a3a3e3d | |
parent | 6c3a158316598bfb165b8c83b168fa413d5ae2d8 (diff) |
[ARM] pxa: make pxa timer initialisation select clock rate at runtime
Rather than using the compile-time constant CLOCK_TICK_RATE, select
the clock tick rate at run time. We organise the selection so that
PXA3 automatically falls out with the right tick rate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mach-pxa/time.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 7916311547ca..ec4286c7931c 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <asm/mach/irq.h> | 23 | #include <asm/mach/irq.h> |
24 | #include <asm/mach/time.h> | 24 | #include <asm/mach/time.h> |
25 | #include <asm/arch/pxa-regs.h> | 25 | #include <asm/arch/pxa-regs.h> |
26 | #include <asm/mach-types.h> | ||
26 | 27 | ||
27 | /* | 28 | /* |
28 | * This is PXA's sched_clock implementation. This has a resolution | 29 | * This is PXA's sched_clock implementation. This has a resolution |
@@ -186,20 +187,29 @@ static struct irqaction pxa_ost0_irq = { | |||
186 | 187 | ||
187 | static void __init pxa_timer_init(void) | 188 | static void __init pxa_timer_init(void) |
188 | { | 189 | { |
190 | unsigned long clock_tick_rate; | ||
191 | |||
189 | OIER = 0; | 192 | OIER = 0; |
190 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 193 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
191 | 194 | ||
192 | set_oscr2ns_scale(CLOCK_TICK_RATE); | 195 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) |
196 | clock_tick_rate = 3686400; | ||
197 | else if (machine_is_mainstone()) | ||
198 | clock_tick_rate = 3249600; | ||
199 | else | ||
200 | clock_tick_rate = 3250000; | ||
201 | |||
202 | set_oscr2ns_scale(clock_tick_rate); | ||
193 | 203 | ||
194 | ckevt_pxa_osmr0.mult = | 204 | ckevt_pxa_osmr0.mult = |
195 | div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_pxa_osmr0.shift); | 205 | div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift); |
196 | ckevt_pxa_osmr0.max_delta_ns = | 206 | ckevt_pxa_osmr0.max_delta_ns = |
197 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); | 207 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); |
198 | ckevt_pxa_osmr0.min_delta_ns = | 208 | ckevt_pxa_osmr0.min_delta_ns = |
199 | clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1; | 209 | clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1; |
200 | 210 | ||
201 | cksrc_pxa_oscr0.mult = | 211 | cksrc_pxa_oscr0.mult = |
202 | clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_pxa_oscr0.shift); | 212 | clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift); |
203 | 213 | ||
204 | setup_irq(IRQ_OST0, &pxa_ost0_irq); | 214 | setup_irq(IRQ_OST0, &pxa_ost0_irq); |
205 | 215 | ||