diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-12-17 15:04:45 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-12-17 15:04:45 -0500 |
commit | c613bbba6f39c8804f1f26e96fb68a117cc9e282 (patch) | |
tree | 85fbc24f26b61ce4e7a908d18952e3abc1f5cd10 | |
parent | cd4348339c21f4a15c01f3f120e92b3224a0a7da (diff) | |
parent | 80eee6bca4069c48247005aa07cb5e8e86042aa3 (diff) |
Merge branch 'mxc-pu-imxfb' of git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6 into devel
49 files changed, 1355 insertions, 1226 deletions
diff --git a/Documentation/arm/mem_alignment b/Documentation/arm/mem_alignment index d145ccca169a..c7c7a114c78c 100644 --- a/Documentation/arm/mem_alignment +++ b/Documentation/arm/mem_alignment | |||
@@ -24,7 +24,7 @@ real bad - it changes the behaviour of all unaligned instructions in user | |||
24 | space, and might cause programs to fail unexpectedly. | 24 | space, and might cause programs to fail unexpectedly. |
25 | 25 | ||
26 | To change the alignment trap behavior, simply echo a number into | 26 | To change the alignment trap behavior, simply echo a number into |
27 | /proc/sys/debug/alignment. The number is made up from various bits: | 27 | /proc/cpu/alignment. The number is made up from various bits: |
28 | 28 | ||
29 | bit behavior when set | 29 | bit behavior when set |
30 | --- ----------------- | 30 | --- ----------------- |
diff --git a/MAINTAINERS b/MAINTAINERS index 24741de12a39..351cf7906c37 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -1527,10 +1527,10 @@ W: http://ebtables.sourceforge.net/ | |||
1527 | S: Maintained | 1527 | S: Maintained |
1528 | 1528 | ||
1529 | ECRYPT FILE SYSTEM | 1529 | ECRYPT FILE SYSTEM |
1530 | P: Mike Halcrow, Phillip Hellewell | 1530 | P: Tyler Hicks, Dustin Kirkland |
1531 | M: mhalcrow@us.ibm.com, phillip@hellewell.homeip.net | 1531 | M: tyhicks@linux.vnet.ibm.com, kirkland@canonical.com |
1532 | L: ecryptfs-devel@lists.sourceforge.net | 1532 | L: ecryptfs-devel@lists.launchpad.net |
1533 | W: http://ecryptfs.sourceforge.net/ | 1533 | W: https://launchpad.net/ecryptfs |
1534 | S: Supported | 1534 | S: Supported |
1535 | 1535 | ||
1536 | EDAC-CORE | 1536 | EDAC-CORE |
@@ -1760,6 +1760,13 @@ L: linuxppc-dev@ozlabs.org | |||
1760 | L: linux-i2c@vger.kernel.org | 1760 | L: linux-i2c@vger.kernel.org |
1761 | S: Maintained | 1761 | S: Maintained |
1762 | 1762 | ||
1763 | FREESCALE IMX / MXC FRAMEBUFFER DRIVER | ||
1764 | P: Sascha Hauer | ||
1765 | M: kernel@pengutronix.de | ||
1766 | L: linux-fbdev-devel@lists.sourceforge.net (moderated for non-subscribers) | ||
1767 | L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) | ||
1768 | S: Maintained | ||
1769 | |||
1763 | FREESCALE SOC FS_ENET DRIVER | 1770 | FREESCALE SOC FS_ENET DRIVER |
1764 | P: Pantelis Antoniou | 1771 | P: Pantelis Antoniou |
1765 | M: pantelis.antoniou@gmail.com | 1772 | M: pantelis.antoniou@gmail.com |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 47ccec95f3e8..ef12794c3c68 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -630,7 +630,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
630 | return -ENOMEM; | 630 | return -ENOMEM; |
631 | 631 | ||
632 | sachip->clk = clk_get(me, "SA1111_CLK"); | 632 | sachip->clk = clk_get(me, "SA1111_CLK"); |
633 | if (!sachip->clk) { | 633 | if (IS_ERR(sachip->clk)) { |
634 | ret = PTR_ERR(sachip->clk); | 634 | ret = PTR_ERR(sachip->clk); |
635 | goto err_free; | 635 | goto err_free; |
636 | } | 636 | } |
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 53d0037a1e9d..531e1860e546 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c | |||
@@ -116,6 +116,8 @@ EXPORT_SYMBOL(__strnlen_user); | |||
116 | EXPORT_SYMBOL(__strncpy_from_user); | 116 | EXPORT_SYMBOL(__strncpy_from_user); |
117 | 117 | ||
118 | #ifdef CONFIG_MMU | 118 | #ifdef CONFIG_MMU |
119 | EXPORT_SYMBOL(copy_page); | ||
120 | |||
119 | EXPORT_SYMBOL(__copy_from_user); | 121 | EXPORT_SYMBOL(__copy_from_user); |
120 | EXPORT_SYMBOL(__copy_to_user); | 122 | EXPORT_SYMBOL(__copy_to_user); |
121 | EXPORT_SYMBOL(__clear_user); | 123 | EXPORT_SYMBOL(__clear_user); |
@@ -182,8 +184,6 @@ EXPORT_SYMBOL(_find_first_bit_be); | |||
182 | EXPORT_SYMBOL(_find_next_bit_be); | 184 | EXPORT_SYMBOL(_find_next_bit_be); |
183 | #endif | 185 | #endif |
184 | 186 | ||
185 | EXPORT_SYMBOL(copy_page); | ||
186 | |||
187 | #ifdef CONFIG_FUNCTION_TRACER | 187 | #ifdef CONFIG_FUNCTION_TRACER |
188 | EXPORT_SYMBOL(mcount); | 188 | EXPORT_SYMBOL(mcount); |
189 | #endif | 189 | #endif |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 57e6874d0b80..79abc4ddc0cf 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/personality.h> | 18 | #include <linux/personality.h> |
19 | #include <linux/kallsyms.h> | 19 | #include <linux/kallsyms.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/hardirq.h> | ||
21 | #include <linux/init.h> | 22 | #include <linux/init.h> |
22 | #include <linux/uaccess.h> | 23 | #include <linux/uaccess.h> |
23 | 24 | ||
diff --git a/arch/arm/mach-imx/include/mach/imxfb.h b/arch/arm/mach-imx/include/mach/imxfb.h index 3ed9ec8b9f00..870d0d939616 100644 --- a/arch/arm/mach-imx/include/mach/imxfb.h +++ b/arch/arm/mach-imx/include/mach/imxfb.h | |||
@@ -1,7 +1,52 @@ | |||
1 | /* | 1 | /* |
2 | * This structure describes the machine which we are running on. | 2 | * This structure describes the machine which we are running on. |
3 | */ | 3 | */ |
4 | struct imxfb_mach_info { | 4 | |
5 | #define PCR_TFT (1 << 31) | ||
6 | #define PCR_COLOR (1 << 30) | ||
7 | #define PCR_PBSIZ_1 (0 << 28) | ||
8 | #define PCR_PBSIZ_2 (1 << 28) | ||
9 | #define PCR_PBSIZ_4 (2 << 28) | ||
10 | #define PCR_PBSIZ_8 (3 << 28) | ||
11 | #define PCR_BPIX_1 (0 << 25) | ||
12 | #define PCR_BPIX_2 (1 << 25) | ||
13 | #define PCR_BPIX_4 (2 << 25) | ||
14 | #define PCR_BPIX_8 (3 << 25) | ||
15 | #define PCR_BPIX_12 (4 << 25) | ||
16 | #define PCR_BPIX_16 (4 << 25) | ||
17 | #define PCR_PIXPOL (1 << 24) | ||
18 | #define PCR_FLMPOL (1 << 23) | ||
19 | #define PCR_LPPOL (1 << 22) | ||
20 | #define PCR_CLKPOL (1 << 21) | ||
21 | #define PCR_OEPOL (1 << 20) | ||
22 | #define PCR_SCLKIDLE (1 << 19) | ||
23 | #define PCR_END_SEL (1 << 18) | ||
24 | #define PCR_END_BYTE_SWAP (1 << 17) | ||
25 | #define PCR_REV_VS (1 << 16) | ||
26 | #define PCR_ACD_SEL (1 << 15) | ||
27 | #define PCR_ACD(x) (((x) & 0x7f) << 8) | ||
28 | #define PCR_SCLK_SEL (1 << 7) | ||
29 | #define PCR_SHARP (1 << 6) | ||
30 | #define PCR_PCD(x) ((x) & 0x3f) | ||
31 | |||
32 | #define PWMR_CLS(x) (((x) & 0x1ff) << 16) | ||
33 | #define PWMR_LDMSK (1 << 15) | ||
34 | #define PWMR_SCR1 (1 << 10) | ||
35 | #define PWMR_SCR0 (1 << 9) | ||
36 | #define PWMR_CC_EN (1 << 8) | ||
37 | #define PWMR_PW(x) ((x) & 0xff) | ||
38 | |||
39 | #define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) | ||
40 | #define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) | ||
41 | #define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) | ||
42 | #define LSCR1_GRAY2(x) (((x) & 0xf) << 4) | ||
43 | #define LSCR1_GRAY1(x) (((x) & 0xf)) | ||
44 | |||
45 | #define DMACR_BURST (1 << 31) | ||
46 | #define DMACR_HM(x) (((x) & 0xf) << 16) | ||
47 | #define DMACR_TM(x) ((x) & 0xf) | ||
48 | |||
49 | struct imx_fb_platform_data { | ||
5 | u_long pixclock; | 50 | u_long pixclock; |
6 | 51 | ||
7 | u_short xres; | 52 | u_short xres; |
@@ -34,4 +79,5 @@ struct imxfb_mach_info { | |||
34 | void (*lcd_power)(int); | 79 | void (*lcd_power)(int); |
35 | void (*backlight_power)(int); | 80 | void (*backlight_power)(int); |
36 | }; | 81 | }; |
37 | void set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info); | 82 | |
83 | void set_imx_fb_info(struct imx_fb_platform_data *); | ||
diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h index 7b8842cfa5fc..31e6a7b6ad80 100644 --- a/arch/arm/mach-pxa/include/mach/reset.h +++ b/arch/arm/mach-pxa/include/mach/reset.h | |||
@@ -12,9 +12,8 @@ extern void clear_reset_status(unsigned int mask); | |||
12 | 12 | ||
13 | /** | 13 | /** |
14 | * init_gpio_reset() - register GPIO as reset generator | 14 | * init_gpio_reset() - register GPIO as reset generator |
15 | * | 15 | * @gpio: gpio nr |
16 | * @gpio - gpio nr | 16 | * @output: set gpio as out/low instead of input during normal work |
17 | * @output - set gpio as out/low instead of input during normal work | ||
18 | */ | 17 | */ |
19 | extern int init_gpio_reset(int gpio, int output); | 18 | extern int init_gpio_reset(int gpio, int output); |
20 | 19 | ||
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index ffd8b228a139..0455557a2899 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
@@ -11,6 +11,7 @@ | |||
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/signal.h> | 12 | #include <linux/signal.h> |
13 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
14 | #include <linux/hardirq.h> | ||
14 | #include <linux/init.h> | 15 | #include <linux/init.h> |
15 | #include <linux/kprobes.h> | 16 | #include <linux/kprobes.h> |
16 | #include <linux/uaccess.h> | 17 | #include <linux/uaccess.h> |
diff --git a/arch/ia64/hp/sim/Kconfig b/arch/ia64/hp/sim/Kconfig index f92306bbedb8..8d513a8c5266 100644 --- a/arch/ia64/hp/sim/Kconfig +++ b/arch/ia64/hp/sim/Kconfig | |||
@@ -4,6 +4,7 @@ menu "HP Simulator drivers" | |||
4 | 4 | ||
5 | config HP_SIMETH | 5 | config HP_SIMETH |
6 | bool "Simulated Ethernet " | 6 | bool "Simulated Ethernet " |
7 | depends on NET | ||
7 | 8 | ||
8 | config HP_SIMSERIAL | 9 | config HP_SIMSERIAL |
9 | bool "Simulated serial driver support" | 10 | bool "Simulated serial driver support" |
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 765c8e287d2b..364ca8938807 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug | |||
@@ -48,7 +48,7 @@ config RUNTIME_DEBUG | |||
48 | help | 48 | help |
49 | If you say Y here, some debugging macros will do run-time checking. | 49 | If you say Y here, some debugging macros will do run-time checking. |
50 | If you say N here, those macros will mostly turn to no-ops. See | 50 | If you say N here, those macros will mostly turn to no-ops. See |
51 | include/asm-mips/debug.h for debuging macros. | 51 | arch/mips/include/asm/debug.h for debugging macros. |
52 | If unsure, say N. | 52 | If unsure, say N. |
53 | 53 | ||
54 | endmenu | 54 | endmenu |
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index fe4699df9626..de4c7a0a96dd 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig | |||
@@ -1,71 +1,71 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.20 | 3 | # Linux kernel version: 2.6.28-rc7 |
4 | # Tue Feb 20 21:47:33 2007 | 4 | # Wed Dec 10 14:39:08 2008 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | 7 | ||
8 | # | 8 | # |
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | CONFIG_ZONE_DMA=y | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_MIPS_MTX1 is not set | ||
13 | # CONFIG_MIPS_BOSPORUS is not set | ||
14 | # CONFIG_MIPS_PB1000 is not set | ||
15 | # CONFIG_MIPS_PB1100 is not set | ||
16 | # CONFIG_MIPS_PB1500 is not set | ||
17 | # CONFIG_MIPS_PB1550 is not set | ||
18 | # CONFIG_MIPS_PB1200 is not set | ||
19 | # CONFIG_MIPS_DB1000 is not set | ||
20 | # CONFIG_MIPS_DB1100 is not set | ||
21 | # CONFIG_MIPS_DB1500 is not set | ||
22 | # CONFIG_MIPS_DB1550 is not set | ||
23 | # CONFIG_MIPS_DB1200 is not set | ||
24 | # CONFIG_MIPS_MIRAGE is not set | ||
25 | # CONFIG_BASLER_EXCITE is not set | 12 | # CONFIG_BASLER_EXCITE is not set |
13 | # CONFIG_BCM47XX is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 14 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 15 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 16 | # CONFIG_MACH_JAZZ is not set |
17 | # CONFIG_LASAT is not set | ||
18 | # CONFIG_LEMOTE_FULONG is not set | ||
29 | # CONFIG_MIPS_MALTA is not set | 19 | # CONFIG_MIPS_MALTA is not set |
30 | # CONFIG_WR_PPMC is not set | ||
31 | # CONFIG_MIPS_SIM is not set | 20 | # CONFIG_MIPS_SIM is not set |
32 | # CONFIG_MOMENCO_JAGUAR_ATX is not set | 21 | # CONFIG_MACH_EMMA is not set |
33 | # CONFIG_MIPS_XXS1500 is not set | 22 | # CONFIG_MACH_VR41XX is not set |
23 | # CONFIG_NXP_STB220 is not set | ||
24 | # CONFIG_NXP_STB225 is not set | ||
34 | # CONFIG_PNX8550_JBS is not set | 25 | # CONFIG_PNX8550_JBS is not set |
35 | # CONFIG_PNX8550_STB810 is not set | 26 | # CONFIG_PNX8550_STB810 is not set |
36 | # CONFIG_MACH_VR41XX is not set | 27 | # CONFIG_PMC_MSP is not set |
37 | # CONFIG_PMC_YOSEMITE is not set | 28 | # CONFIG_PMC_YOSEMITE is not set |
38 | # CONFIG_MARKEINS is not set | ||
39 | # CONFIG_SGI_IP22 is not set | 29 | # CONFIG_SGI_IP22 is not set |
40 | # CONFIG_SGI_IP27 is not set | 30 | # CONFIG_SGI_IP27 is not set |
31 | # CONFIG_SGI_IP28 is not set | ||
41 | CONFIG_SGI_IP32=y | 32 | CONFIG_SGI_IP32=y |
42 | # CONFIG_SIBYTE_BIGSUR is not set | ||
43 | # CONFIG_SIBYTE_SWARM is not set | ||
44 | # CONFIG_SIBYTE_SENTOSA is not set | ||
45 | # CONFIG_SIBYTE_RHONE is not set | ||
46 | # CONFIG_SIBYTE_CARMEL is not set | ||
47 | # CONFIG_SIBYTE_LITTLESUR is not set | ||
48 | # CONFIG_SIBYTE_CRHINE is not set | 33 | # CONFIG_SIBYTE_CRHINE is not set |
34 | # CONFIG_SIBYTE_CARMEL is not set | ||
49 | # CONFIG_SIBYTE_CRHONE is not set | 35 | # CONFIG_SIBYTE_CRHONE is not set |
36 | # CONFIG_SIBYTE_RHONE is not set | ||
37 | # CONFIG_SIBYTE_SWARM is not set | ||
38 | # CONFIG_SIBYTE_LITTLESUR is not set | ||
39 | # CONFIG_SIBYTE_SENTOSA is not set | ||
40 | # CONFIG_SIBYTE_BIGSUR is not set | ||
50 | # CONFIG_SNI_RM is not set | 41 | # CONFIG_SNI_RM is not set |
51 | # CONFIG_TOSHIBA_JMR3927 is not set | 42 | # CONFIG_MACH_TX39XX is not set |
52 | # CONFIG_TOSHIBA_RBTX4927 is not set | 43 | # CONFIG_MACH_TX49XX is not set |
53 | # CONFIG_TOSHIBA_RBTX4938 is not set | 44 | # CONFIG_MIKROTIK_RB532 is not set |
45 | # CONFIG_WR_PPMC is not set | ||
54 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 46 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
55 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 47 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |
56 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 48 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
49 | CONFIG_ARCH_SUPPORTS_OPROFILE=y | ||
57 | CONFIG_GENERIC_FIND_NEXT_BIT=y | 50 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
58 | CONFIG_GENERIC_HWEIGHT=y | 51 | CONFIG_GENERIC_HWEIGHT=y |
59 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 52 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
53 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
60 | CONFIG_GENERIC_TIME=y | 54 | CONFIG_GENERIC_TIME=y |
55 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
61 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | 56 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y |
62 | # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set | 57 | # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set |
63 | CONFIG_ARC=y | 58 | CONFIG_ARC=y |
59 | CONFIG_CEVT_R4K=y | ||
60 | CONFIG_CSRC_R4K=y | ||
64 | CONFIG_DMA_NONCOHERENT=y | 61 | CONFIG_DMA_NONCOHERENT=y |
65 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | 62 | CONFIG_DMA_NEED_PCI_MAP_STATE=y |
63 | # CONFIG_HOTPLUG_CPU is not set | ||
64 | # CONFIG_NO_IOPORT is not set | ||
66 | CONFIG_CPU_BIG_ENDIAN=y | 65 | CONFIG_CPU_BIG_ENDIAN=y |
67 | # CONFIG_CPU_LITTLE_ENDIAN is not set | 66 | # CONFIG_CPU_LITTLE_ENDIAN is not set |
68 | CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y | 67 | CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y |
68 | CONFIG_IRQ_CPU=y | ||
69 | CONFIG_ARC32=y | 69 | CONFIG_ARC32=y |
70 | CONFIG_BOOT_ELF32=y | 70 | CONFIG_BOOT_ELF32=y |
71 | CONFIG_MIPS_L1_CACHE_SHIFT=5 | 71 | CONFIG_MIPS_L1_CACHE_SHIFT=5 |
@@ -75,6 +75,7 @@ CONFIG_ARC_PROMLIB=y | |||
75 | # | 75 | # |
76 | # CPU selection | 76 | # CPU selection |
77 | # | 77 | # |
78 | # CONFIG_CPU_LOONGSON2 is not set | ||
78 | # CONFIG_CPU_MIPS32_R1 is not set | 79 | # CONFIG_CPU_MIPS32_R1 is not set |
79 | # CONFIG_CPU_MIPS32_R2 is not set | 80 | # CONFIG_CPU_MIPS32_R2 is not set |
80 | # CONFIG_CPU_MIPS64_R1 is not set | 81 | # CONFIG_CPU_MIPS64_R1 is not set |
@@ -87,6 +88,7 @@ CONFIG_ARC_PROMLIB=y | |||
87 | # CONFIG_CPU_TX49XX is not set | 88 | # CONFIG_CPU_TX49XX is not set |
88 | CONFIG_CPU_R5000=y | 89 | CONFIG_CPU_R5000=y |
89 | # CONFIG_CPU_R5432 is not set | 90 | # CONFIG_CPU_R5432 is not set |
91 | # CONFIG_CPU_R5500 is not set | ||
90 | # CONFIG_CPU_R6000 is not set | 92 | # CONFIG_CPU_R6000 is not set |
91 | # CONFIG_CPU_NEVADA is not set | 93 | # CONFIG_CPU_NEVADA is not set |
92 | # CONFIG_CPU_R8000 is not set | 94 | # CONFIG_CPU_R8000 is not set |
@@ -116,65 +118,73 @@ CONFIG_RM7000_CPU_SCACHE=y | |||
116 | CONFIG_MIPS_MT_DISABLED=y | 118 | CONFIG_MIPS_MT_DISABLED=y |
117 | # CONFIG_MIPS_MT_SMP is not set | 119 | # CONFIG_MIPS_MT_SMP is not set |
118 | # CONFIG_MIPS_MT_SMTC is not set | 120 | # CONFIG_MIPS_MT_SMTC is not set |
119 | # CONFIG_MIPS_VPE_LOADER is not set | ||
120 | CONFIG_CPU_HAS_LLSC=y | 121 | CONFIG_CPU_HAS_LLSC=y |
121 | CONFIG_CPU_HAS_SYNC=y | 122 | CONFIG_CPU_HAS_SYNC=y |
122 | CONFIG_GENERIC_HARDIRQS=y | 123 | CONFIG_GENERIC_HARDIRQS=y |
123 | CONFIG_GENERIC_IRQ_PROBE=y | 124 | CONFIG_GENERIC_IRQ_PROBE=y |
124 | CONFIG_ARCH_FLATMEM_ENABLE=y | 125 | CONFIG_ARCH_FLATMEM_ENABLE=y |
126 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
125 | CONFIG_SELECT_MEMORY_MODEL=y | 127 | CONFIG_SELECT_MEMORY_MODEL=y |
126 | CONFIG_FLATMEM_MANUAL=y | 128 | CONFIG_FLATMEM_MANUAL=y |
127 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 129 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
128 | # CONFIG_SPARSEMEM_MANUAL is not set | 130 | # CONFIG_SPARSEMEM_MANUAL is not set |
129 | CONFIG_FLATMEM=y | 131 | CONFIG_FLATMEM=y |
130 | CONFIG_FLAT_NODE_MEM_MAP=y | 132 | CONFIG_FLAT_NODE_MEM_MAP=y |
131 | # CONFIG_SPARSEMEM_STATIC is not set | 133 | CONFIG_PAGEFLAGS_EXTENDED=y |
132 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 134 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
133 | CONFIG_RESOURCES_64BIT=y | 135 | CONFIG_RESOURCES_64BIT=y |
134 | CONFIG_ZONE_DMA_FLAG=1 | 136 | CONFIG_PHYS_ADDR_T_64BIT=y |
137 | CONFIG_ZONE_DMA_FLAG=0 | ||
138 | CONFIG_VIRT_TO_BUS=y | ||
139 | CONFIG_UNEVICTABLE_LRU=y | ||
140 | # CONFIG_NO_HZ is not set | ||
141 | # CONFIG_HIGH_RES_TIMERS is not set | ||
142 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
135 | # CONFIG_HZ_48 is not set | 143 | # CONFIG_HZ_48 is not set |
136 | # CONFIG_HZ_100 is not set | 144 | # CONFIG_HZ_100 is not set |
137 | # CONFIG_HZ_128 is not set | 145 | # CONFIG_HZ_128 is not set |
138 | # CONFIG_HZ_250 is not set | 146 | CONFIG_HZ_250=y |
139 | # CONFIG_HZ_256 is not set | 147 | # CONFIG_HZ_256 is not set |
140 | CONFIG_HZ_1000=y | 148 | # CONFIG_HZ_1000 is not set |
141 | # CONFIG_HZ_1024 is not set | 149 | # CONFIG_HZ_1024 is not set |
142 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y | 150 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y |
143 | CONFIG_HZ=1000 | 151 | CONFIG_HZ=250 |
144 | # CONFIG_PREEMPT_NONE is not set | 152 | CONFIG_PREEMPT_NONE=y |
145 | CONFIG_PREEMPT_VOLUNTARY=y | 153 | # CONFIG_PREEMPT_VOLUNTARY is not set |
146 | # CONFIG_PREEMPT is not set | 154 | # CONFIG_PREEMPT is not set |
147 | # CONFIG_KEXEC is not set | 155 | # CONFIG_KEXEC is not set |
156 | # CONFIG_SECCOMP is not set | ||
148 | CONFIG_LOCKDEP_SUPPORT=y | 157 | CONFIG_LOCKDEP_SUPPORT=y |
149 | CONFIG_STACKTRACE_SUPPORT=y | 158 | CONFIG_STACKTRACE_SUPPORT=y |
150 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 159 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
151 | 160 | ||
152 | # | 161 | # |
153 | # Code maturity level options | 162 | # General setup |
154 | # | 163 | # |
155 | CONFIG_EXPERIMENTAL=y | 164 | CONFIG_EXPERIMENTAL=y |
156 | CONFIG_BROKEN_ON_SMP=y | 165 | CONFIG_BROKEN_ON_SMP=y |
157 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 166 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
158 | |||
159 | # | ||
160 | # General setup | ||
161 | # | ||
162 | CONFIG_LOCALVERSION="" | 167 | CONFIG_LOCALVERSION="" |
163 | CONFIG_LOCALVERSION_AUTO=y | 168 | CONFIG_LOCALVERSION_AUTO=y |
164 | CONFIG_SWAP=y | 169 | CONFIG_SWAP=y |
165 | CONFIG_SYSVIPC=y | 170 | CONFIG_SYSVIPC=y |
166 | # CONFIG_IPC_NS is not set | ||
167 | CONFIG_SYSVIPC_SYSCTL=y | 171 | CONFIG_SYSVIPC_SYSCTL=y |
168 | # CONFIG_POSIX_MQUEUE is not set | 172 | CONFIG_POSIX_MQUEUE=y |
169 | CONFIG_BSD_PROCESS_ACCT=y | 173 | CONFIG_BSD_PROCESS_ACCT=y |
170 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 174 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
171 | # CONFIG_TASKSTATS is not set | 175 | # CONFIG_TASKSTATS is not set |
172 | # CONFIG_UTS_NS is not set | 176 | CONFIG_AUDIT=y |
173 | # CONFIG_AUDIT is not set | 177 | CONFIG_IKCONFIG=y |
174 | # CONFIG_IKCONFIG is not set | 178 | CONFIG_IKCONFIG_PROC=y |
179 | CONFIG_LOG_BUF_SHIFT=14 | ||
180 | # CONFIG_CGROUPS is not set | ||
181 | # CONFIG_GROUP_SCHED is not set | ||
175 | CONFIG_SYSFS_DEPRECATED=y | 182 | CONFIG_SYSFS_DEPRECATED=y |
183 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
176 | CONFIG_RELAY=y | 184 | CONFIG_RELAY=y |
177 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 185 | # CONFIG_NAMESPACES is not set |
186 | # CONFIG_BLK_DEV_INITRD is not set | ||
187 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
178 | CONFIG_SYSCTL=y | 188 | CONFIG_SYSCTL=y |
179 | CONFIG_EMBEDDED=y | 189 | CONFIG_EMBEDDED=y |
180 | CONFIG_SYSCTL_SYSCALL=y | 190 | CONFIG_SYSCTL_SYSCALL=y |
@@ -184,27 +194,43 @@ CONFIG_HOTPLUG=y | |||
184 | CONFIG_PRINTK=y | 194 | CONFIG_PRINTK=y |
185 | CONFIG_BUG=y | 195 | CONFIG_BUG=y |
186 | CONFIG_ELF_CORE=y | 196 | CONFIG_ELF_CORE=y |
197 | CONFIG_PCSPKR_PLATFORM=y | ||
198 | CONFIG_COMPAT_BRK=y | ||
187 | CONFIG_BASE_FULL=y | 199 | CONFIG_BASE_FULL=y |
188 | CONFIG_FUTEX=y | 200 | CONFIG_FUTEX=y |
201 | CONFIG_ANON_INODES=y | ||
189 | CONFIG_EPOLL=y | 202 | CONFIG_EPOLL=y |
203 | CONFIG_SIGNALFD=y | ||
204 | CONFIG_TIMERFD=y | ||
205 | CONFIG_EVENTFD=y | ||
190 | CONFIG_SHMEM=y | 206 | CONFIG_SHMEM=y |
191 | CONFIG_SLAB=y | 207 | CONFIG_AIO=y |
192 | CONFIG_VM_EVENT_COUNTERS=y | 208 | CONFIG_VM_EVENT_COUNTERS=y |
209 | CONFIG_PCI_QUIRKS=y | ||
210 | CONFIG_SLAB=y | ||
211 | # CONFIG_SLUB is not set | ||
212 | # CONFIG_SLOB is not set | ||
213 | CONFIG_PROFILING=y | ||
214 | # CONFIG_MARKERS is not set | ||
215 | CONFIG_OPROFILE=m | ||
216 | CONFIG_HAVE_OPROFILE=y | ||
217 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
218 | CONFIG_SLABINFO=y | ||
193 | CONFIG_RT_MUTEXES=y | 219 | CONFIG_RT_MUTEXES=y |
194 | # CONFIG_TINY_SHMEM is not set | 220 | # CONFIG_TINY_SHMEM is not set |
195 | CONFIG_BASE_SMALL=0 | 221 | CONFIG_BASE_SMALL=0 |
196 | # CONFIG_SLOB is not set | 222 | CONFIG_MODULES=y |
197 | 223 | # CONFIG_MODULE_FORCE_LOAD is not set | |
198 | # | 224 | CONFIG_MODULE_UNLOAD=y |
199 | # Loadable module support | 225 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
200 | # | 226 | # CONFIG_MODVERSIONS is not set |
201 | # CONFIG_MODULES is not set | 227 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
202 | 228 | CONFIG_KMOD=y | |
203 | # | ||
204 | # Block layer | ||
205 | # | ||
206 | CONFIG_BLOCK=y | 229 | CONFIG_BLOCK=y |
207 | # CONFIG_BLK_DEV_IO_TRACE is not set | 230 | # CONFIG_BLK_DEV_IO_TRACE is not set |
231 | # CONFIG_BLK_DEV_BSG is not set | ||
232 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
233 | CONFIG_BLOCK_COMPAT=y | ||
208 | 234 | ||
209 | # | 235 | # |
210 | # IO Schedulers | 236 | # IO Schedulers |
@@ -213,59 +239,50 @@ CONFIG_IOSCHED_NOOP=y | |||
213 | CONFIG_IOSCHED_AS=y | 239 | CONFIG_IOSCHED_AS=y |
214 | CONFIG_IOSCHED_DEADLINE=y | 240 | CONFIG_IOSCHED_DEADLINE=y |
215 | CONFIG_IOSCHED_CFQ=y | 241 | CONFIG_IOSCHED_CFQ=y |
216 | CONFIG_DEFAULT_AS=y | 242 | # CONFIG_DEFAULT_AS is not set |
217 | # CONFIG_DEFAULT_DEADLINE is not set | 243 | # CONFIG_DEFAULT_DEADLINE is not set |
218 | # CONFIG_DEFAULT_CFQ is not set | 244 | CONFIG_DEFAULT_CFQ=y |
219 | # CONFIG_DEFAULT_NOOP is not set | 245 | # CONFIG_DEFAULT_NOOP is not set |
220 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 246 | CONFIG_DEFAULT_IOSCHED="cfq" |
247 | CONFIG_CLASSIC_RCU=y | ||
248 | # CONFIG_FREEZER is not set | ||
221 | 249 | ||
222 | # | 250 | # |
223 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | 251 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) |
224 | # | 252 | # |
225 | CONFIG_HW_HAS_PCI=y | 253 | CONFIG_HW_HAS_PCI=y |
226 | CONFIG_PCI=y | 254 | CONFIG_PCI=y |
255 | CONFIG_PCI_DOMAINS=y | ||
256 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
257 | # CONFIG_PCI_LEGACY is not set | ||
227 | CONFIG_MMU=y | 258 | CONFIG_MMU=y |
228 | |||
229 | # | ||
230 | # PCCARD (PCMCIA/CardBus) support | ||
231 | # | ||
232 | # CONFIG_PCCARD is not set | 259 | # CONFIG_PCCARD is not set |
233 | |||
234 | # | ||
235 | # PCI Hotplug Support | ||
236 | # | ||
237 | # CONFIG_HOTPLUG_PCI is not set | 260 | # CONFIG_HOTPLUG_PCI is not set |
238 | 261 | ||
239 | # | 262 | # |
240 | # Executable file formats | 263 | # Executable file formats |
241 | # | 264 | # |
242 | CONFIG_BINFMT_ELF=y | 265 | CONFIG_BINFMT_ELF=y |
266 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
267 | # CONFIG_HAVE_AOUT is not set | ||
243 | CONFIG_BINFMT_MISC=y | 268 | CONFIG_BINFMT_MISC=y |
244 | # CONFIG_BUILD_ELF64 is not set | ||
245 | CONFIG_MIPS32_COMPAT=y | 269 | CONFIG_MIPS32_COMPAT=y |
246 | CONFIG_COMPAT=y | 270 | CONFIG_COMPAT=y |
247 | CONFIG_SYSVIPC_COMPAT=y | 271 | CONFIG_SYSVIPC_COMPAT=y |
248 | CONFIG_MIPS32_O32=y | 272 | CONFIG_MIPS32_O32=y |
249 | # CONFIG_MIPS32_N32 is not set | 273 | CONFIG_MIPS32_N32=y |
250 | CONFIG_BINFMT_ELF32=y | 274 | CONFIG_BINFMT_ELF32=y |
251 | 275 | ||
252 | # | 276 | # |
253 | # Power management options | 277 | # Power management options |
254 | # | 278 | # |
255 | CONFIG_PM=y | 279 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
256 | # CONFIG_PM_LEGACY is not set | 280 | # CONFIG_PM is not set |
257 | # CONFIG_PM_DEBUG is not set | ||
258 | # CONFIG_PM_SYSFS_DEPRECATED is not set | ||
259 | |||
260 | # | ||
261 | # Networking | ||
262 | # | ||
263 | CONFIG_NET=y | 281 | CONFIG_NET=y |
264 | 282 | ||
265 | # | 283 | # |
266 | # Networking options | 284 | # Networking options |
267 | # | 285 | # |
268 | # CONFIG_NETDEBUG is not set | ||
269 | CONFIG_PACKET=y | 286 | CONFIG_PACKET=y |
270 | CONFIG_PACKET_MMAP=y | 287 | CONFIG_PACKET_MMAP=y |
271 | CONFIG_UNIX=y | 288 | CONFIG_UNIX=y |
@@ -273,56 +290,83 @@ CONFIG_XFRM=y | |||
273 | CONFIG_XFRM_USER=y | 290 | CONFIG_XFRM_USER=y |
274 | # CONFIG_XFRM_SUB_POLICY is not set | 291 | # CONFIG_XFRM_SUB_POLICY is not set |
275 | CONFIG_XFRM_MIGRATE=y | 292 | CONFIG_XFRM_MIGRATE=y |
293 | # CONFIG_XFRM_STATISTICS is not set | ||
294 | CONFIG_XFRM_IPCOMP=m | ||
276 | CONFIG_NET_KEY=y | 295 | CONFIG_NET_KEY=y |
277 | CONFIG_NET_KEY_MIGRATE=y | 296 | CONFIG_NET_KEY_MIGRATE=y |
278 | CONFIG_INET=y | 297 | CONFIG_INET=y |
279 | # CONFIG_IP_MULTICAST is not set | 298 | CONFIG_IP_MULTICAST=y |
280 | # CONFIG_IP_ADVANCED_ROUTER is not set | 299 | # CONFIG_IP_ADVANCED_ROUTER is not set |
281 | CONFIG_IP_FIB_HASH=y | 300 | CONFIG_IP_FIB_HASH=y |
282 | CONFIG_IP_PNP=y | 301 | CONFIG_IP_PNP=y |
283 | # CONFIG_IP_PNP_DHCP is not set | 302 | CONFIG_IP_PNP_DHCP=y |
284 | CONFIG_IP_PNP_BOOTP=y | 303 | CONFIG_IP_PNP_BOOTP=y |
285 | # CONFIG_IP_PNP_RARP is not set | 304 | # CONFIG_IP_PNP_RARP is not set |
286 | # CONFIG_NET_IPIP is not set | 305 | CONFIG_NET_IPIP=m |
287 | # CONFIG_NET_IPGRE is not set | 306 | CONFIG_NET_IPGRE=m |
307 | # CONFIG_NET_IPGRE_BROADCAST is not set | ||
308 | # CONFIG_IP_MROUTE is not set | ||
288 | # CONFIG_ARPD is not set | 309 | # CONFIG_ARPD is not set |
289 | # CONFIG_SYN_COOKIES is not set | 310 | # CONFIG_SYN_COOKIES is not set |
290 | # CONFIG_INET_AH is not set | 311 | CONFIG_INET_AH=m |
291 | # CONFIG_INET_ESP is not set | 312 | CONFIG_INET_ESP=m |
292 | # CONFIG_INET_IPCOMP is not set | 313 | CONFIG_INET_IPCOMP=m |
293 | # CONFIG_INET_XFRM_TUNNEL is not set | 314 | CONFIG_INET_XFRM_TUNNEL=m |
294 | # CONFIG_INET_TUNNEL is not set | 315 | CONFIG_INET_TUNNEL=m |
295 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 316 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
296 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 317 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
297 | CONFIG_INET_XFRM_MODE_BEET=y | 318 | CONFIG_INET_XFRM_MODE_BEET=y |
319 | # CONFIG_INET_LRO is not set | ||
298 | CONFIG_INET_DIAG=y | 320 | CONFIG_INET_DIAG=y |
299 | CONFIG_INET_TCP_DIAG=y | 321 | CONFIG_INET_TCP_DIAG=y |
300 | # CONFIG_TCP_CONG_ADVANCED is not set | 322 | CONFIG_TCP_CONG_ADVANCED=y |
323 | CONFIG_TCP_CONG_BIC=m | ||
301 | CONFIG_TCP_CONG_CUBIC=y | 324 | CONFIG_TCP_CONG_CUBIC=y |
325 | CONFIG_TCP_CONG_WESTWOOD=m | ||
326 | CONFIG_TCP_CONG_HTCP=m | ||
327 | # CONFIG_TCP_CONG_HSTCP is not set | ||
328 | # CONFIG_TCP_CONG_HYBLA is not set | ||
329 | # CONFIG_TCP_CONG_VEGAS is not set | ||
330 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
331 | # CONFIG_TCP_CONG_LP is not set | ||
332 | # CONFIG_TCP_CONG_VENO is not set | ||
333 | # CONFIG_TCP_CONG_YEAH is not set | ||
334 | # CONFIG_TCP_CONG_ILLINOIS is not set | ||
335 | # CONFIG_DEFAULT_BIC is not set | ||
336 | CONFIG_DEFAULT_CUBIC=y | ||
337 | # CONFIG_DEFAULT_HTCP is not set | ||
338 | # CONFIG_DEFAULT_VEGAS is not set | ||
339 | # CONFIG_DEFAULT_WESTWOOD is not set | ||
340 | # CONFIG_DEFAULT_RENO is not set | ||
302 | CONFIG_DEFAULT_TCP_CONG="cubic" | 341 | CONFIG_DEFAULT_TCP_CONG="cubic" |
303 | CONFIG_TCP_MD5SIG=y | 342 | CONFIG_TCP_MD5SIG=y |
304 | # CONFIG_IPV6 is not set | 343 | CONFIG_IPV6=m |
305 | # CONFIG_INET6_XFRM_TUNNEL is not set | 344 | # CONFIG_IPV6_PRIVACY is not set |
306 | # CONFIG_INET6_TUNNEL is not set | 345 | # CONFIG_IPV6_ROUTER_PREF is not set |
346 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
347 | CONFIG_INET6_AH=m | ||
348 | CONFIG_INET6_ESP=m | ||
349 | CONFIG_INET6_IPCOMP=m | ||
350 | # CONFIG_IPV6_MIP6 is not set | ||
351 | CONFIG_INET6_XFRM_TUNNEL=m | ||
352 | CONFIG_INET6_TUNNEL=m | ||
353 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
354 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
355 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
356 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
357 | CONFIG_IPV6_SIT=m | ||
358 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
359 | CONFIG_IPV6_TUNNEL=m | ||
360 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
361 | # CONFIG_IPV6_MROUTE is not set | ||
307 | CONFIG_NETWORK_SECMARK=y | 362 | CONFIG_NETWORK_SECMARK=y |
308 | # CONFIG_NETFILTER is not set | 363 | # CONFIG_NETFILTER is not set |
309 | |||
310 | # | ||
311 | # DCCP Configuration (EXPERIMENTAL) | ||
312 | # | ||
313 | # CONFIG_IP_DCCP is not set | 364 | # CONFIG_IP_DCCP is not set |
314 | |||
315 | # | ||
316 | # SCTP Configuration (EXPERIMENTAL) | ||
317 | # | ||
318 | # CONFIG_IP_SCTP is not set | 365 | # CONFIG_IP_SCTP is not set |
319 | |||
320 | # | ||
321 | # TIPC Configuration (EXPERIMENTAL) | ||
322 | # | ||
323 | # CONFIG_TIPC is not set | 366 | # CONFIG_TIPC is not set |
324 | # CONFIG_ATM is not set | 367 | # CONFIG_ATM is not set |
325 | # CONFIG_BRIDGE is not set | 368 | # CONFIG_BRIDGE is not set |
369 | # CONFIG_NET_DSA is not set | ||
326 | # CONFIG_VLAN_8021Q is not set | 370 | # CONFIG_VLAN_8021Q is not set |
327 | # CONFIG_DECNET is not set | 371 | # CONFIG_DECNET is not set |
328 | # CONFIG_LLC2 is not set | 372 | # CONFIG_LLC2 is not set |
@@ -332,10 +376,6 @@ CONFIG_NETWORK_SECMARK=y | |||
332 | # CONFIG_LAPB is not set | 376 | # CONFIG_LAPB is not set |
333 | # CONFIG_ECONET is not set | 377 | # CONFIG_ECONET is not set |
334 | # CONFIG_WAN_ROUTER is not set | 378 | # CONFIG_WAN_ROUTER is not set |
335 | |||
336 | # | ||
337 | # QoS and/or fair queueing | ||
338 | # | ||
339 | # CONFIG_NET_SCHED is not set | 379 | # CONFIG_NET_SCHED is not set |
340 | 380 | ||
341 | # | 381 | # |
@@ -343,15 +383,14 @@ CONFIG_NETWORK_SECMARK=y | |||
343 | # | 383 | # |
344 | # CONFIG_NET_PKTGEN is not set | 384 | # CONFIG_NET_PKTGEN is not set |
345 | # CONFIG_HAMRADIO is not set | 385 | # CONFIG_HAMRADIO is not set |
386 | # CONFIG_CAN is not set | ||
346 | # CONFIG_IRDA is not set | 387 | # CONFIG_IRDA is not set |
347 | # CONFIG_BT is not set | 388 | # CONFIG_BT is not set |
348 | CONFIG_IEEE80211=y | 389 | # CONFIG_AF_RXRPC is not set |
349 | # CONFIG_IEEE80211_DEBUG is not set | 390 | # CONFIG_PHONET is not set |
350 | CONFIG_IEEE80211_CRYPT_WEP=y | 391 | # CONFIG_WIRELESS is not set |
351 | CONFIG_IEEE80211_CRYPT_CCMP=y | 392 | # CONFIG_RFKILL is not set |
352 | CONFIG_IEEE80211_SOFTMAC=y | 393 | # CONFIG_NET_9P is not set |
353 | # CONFIG_IEEE80211_SOFTMAC_DEBUG is not set | ||
354 | CONFIG_WIRELESS_EXT=y | ||
355 | 394 | ||
356 | # | 395 | # |
357 | # Device Drivers | 396 | # Device Drivers |
@@ -360,60 +399,40 @@ CONFIG_WIRELESS_EXT=y | |||
360 | # | 399 | # |
361 | # Generic Driver Options | 400 | # Generic Driver Options |
362 | # | 401 | # |
402 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
363 | CONFIG_STANDALONE=y | 403 | CONFIG_STANDALONE=y |
364 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 404 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
365 | CONFIG_FW_LOADER=y | 405 | CONFIG_FW_LOADER=y |
406 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
407 | CONFIG_EXTRA_FIRMWARE="" | ||
366 | # CONFIG_SYS_HYPERVISOR is not set | 408 | # CONFIG_SYS_HYPERVISOR is not set |
367 | |||
368 | # | ||
369 | # Connector - unified userspace <-> kernelspace linker | ||
370 | # | ||
371 | CONFIG_CONNECTOR=y | 409 | CONFIG_CONNECTOR=y |
372 | CONFIG_PROC_EVENTS=y | 410 | CONFIG_PROC_EVENTS=y |
373 | |||
374 | # | ||
375 | # Memory Technology Devices (MTD) | ||
376 | # | ||
377 | # CONFIG_MTD is not set | 411 | # CONFIG_MTD is not set |
378 | |||
379 | # | ||
380 | # Parallel port support | ||
381 | # | ||
382 | # CONFIG_PARPORT is not set | 412 | # CONFIG_PARPORT is not set |
383 | 413 | CONFIG_BLK_DEV=y | |
384 | # | ||
385 | # Plug and Play support | ||
386 | # | ||
387 | # CONFIG_PNPACPI is not set | ||
388 | |||
389 | # | ||
390 | # Block devices | ||
391 | # | ||
392 | # CONFIG_BLK_CPQ_DA is not set | 414 | # CONFIG_BLK_CPQ_DA is not set |
393 | # CONFIG_BLK_CPQ_CISS_DA is not set | 415 | # CONFIG_BLK_CPQ_CISS_DA is not set |
394 | # CONFIG_BLK_DEV_DAC960 is not set | 416 | # CONFIG_BLK_DEV_DAC960 is not set |
395 | # CONFIG_BLK_DEV_UMEM is not set | 417 | # CONFIG_BLK_DEV_UMEM is not set |
396 | # CONFIG_BLK_DEV_COW_COMMON is not set | 418 | # CONFIG_BLK_DEV_COW_COMMON is not set |
397 | CONFIG_BLK_DEV_LOOP=y | 419 | CONFIG_BLK_DEV_LOOP=m |
398 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 420 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
399 | # CONFIG_BLK_DEV_NBD is not set | 421 | CONFIG_BLK_DEV_NBD=m |
400 | # CONFIG_BLK_DEV_SX8 is not set | 422 | # CONFIG_BLK_DEV_SX8 is not set |
401 | # CONFIG_BLK_DEV_RAM is not set | 423 | # CONFIG_BLK_DEV_RAM is not set |
402 | # CONFIG_BLK_DEV_INITRD is not set | 424 | # CONFIG_CDROM_PKTCDVD is not set |
403 | CONFIG_CDROM_PKTCDVD=y | 425 | # CONFIG_ATA_OVER_ETH is not set |
404 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | 426 | # CONFIG_BLK_DEV_HD is not set |
405 | # CONFIG_CDROM_PKTCDVD_WCACHE is not set | 427 | CONFIG_MISC_DEVICES=y |
406 | CONFIG_ATA_OVER_ETH=y | 428 | # CONFIG_PHANTOM is not set |
407 | 429 | # CONFIG_EEPROM_93CX6 is not set | |
408 | # | ||
409 | # Misc devices | ||
410 | # | ||
411 | CONFIG_SGI_IOC4=y | 430 | CONFIG_SGI_IOC4=y |
412 | # CONFIG_TIFM_CORE is not set | 431 | # CONFIG_TIFM_CORE is not set |
413 | 432 | # CONFIG_ENCLOSURE_SERVICES is not set | |
414 | # | 433 | # CONFIG_HP_ILO is not set |
415 | # ATA/ATAPI/MFM/RLL support | 434 | # CONFIG_C2PORT is not set |
416 | # | 435 | CONFIG_HAVE_IDE=y |
417 | # CONFIG_IDE is not set | 436 | # CONFIG_IDE is not set |
418 | 437 | ||
419 | # | 438 | # |
@@ -421,19 +440,20 @@ CONFIG_SGI_IOC4=y | |||
421 | # | 440 | # |
422 | CONFIG_RAID_ATTRS=y | 441 | CONFIG_RAID_ATTRS=y |
423 | CONFIG_SCSI=y | 442 | CONFIG_SCSI=y |
443 | CONFIG_SCSI_DMA=y | ||
424 | CONFIG_SCSI_TGT=y | 444 | CONFIG_SCSI_TGT=y |
425 | CONFIG_SCSI_NETLINK=y | 445 | # CONFIG_SCSI_NETLINK is not set |
426 | CONFIG_SCSI_PROC_FS=y | 446 | CONFIG_SCSI_PROC_FS=y |
427 | 447 | ||
428 | # | 448 | # |
429 | # SCSI support type (disk, tape, CD-ROM) | 449 | # SCSI support type (disk, tape, CD-ROM) |
430 | # | 450 | # |
431 | CONFIG_BLK_DEV_SD=y | 451 | CONFIG_BLK_DEV_SD=y |
432 | CONFIG_CHR_DEV_ST=y | 452 | # CONFIG_CHR_DEV_ST is not set |
433 | CONFIG_CHR_DEV_OSST=y | 453 | # CONFIG_CHR_DEV_OSST is not set |
434 | CONFIG_BLK_DEV_SR=y | 454 | CONFIG_BLK_DEV_SR=y |
435 | CONFIG_BLK_DEV_SR_VENDOR=y | 455 | CONFIG_BLK_DEV_SR_VENDOR=y |
436 | CONFIG_CHR_DEV_SG=y | 456 | CONFIG_CHR_DEV_SG=m |
437 | # CONFIG_CHR_DEV_SCH is not set | 457 | # CONFIG_CHR_DEV_SCH is not set |
438 | 458 | ||
439 | # | 459 | # |
@@ -443,35 +463,36 @@ CONFIG_SCSI_MULTI_LUN=y | |||
443 | CONFIG_SCSI_CONSTANTS=y | 463 | CONFIG_SCSI_CONSTANTS=y |
444 | CONFIG_SCSI_LOGGING=y | 464 | CONFIG_SCSI_LOGGING=y |
445 | CONFIG_SCSI_SCAN_ASYNC=y | 465 | CONFIG_SCSI_SCAN_ASYNC=y |
466 | CONFIG_SCSI_WAIT_SCAN=m | ||
446 | 467 | ||
447 | # | 468 | # |
448 | # SCSI Transports | 469 | # SCSI Transports |
449 | # | 470 | # |
450 | CONFIG_SCSI_SPI_ATTRS=y | 471 | CONFIG_SCSI_SPI_ATTRS=y |
451 | CONFIG_SCSI_FC_ATTRS=y | 472 | # CONFIG_SCSI_FC_ATTRS is not set |
452 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 473 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
453 | CONFIG_SCSI_SAS_ATTRS=y | 474 | CONFIG_SCSI_SAS_ATTRS=y |
454 | CONFIG_SCSI_SAS_LIBSAS=y | 475 | CONFIG_SCSI_SAS_LIBSAS=y |
476 | CONFIG_SCSI_SAS_HOST_SMP=y | ||
455 | # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set | 477 | # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set |
456 | 478 | # CONFIG_SCSI_SRP_ATTRS is not set | |
457 | # | 479 | CONFIG_SCSI_LOWLEVEL=y |
458 | # SCSI low-level drivers | ||
459 | # | ||
460 | # CONFIG_ISCSI_TCP is not set | 480 | # CONFIG_ISCSI_TCP is not set |
461 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 481 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
462 | # CONFIG_SCSI_3W_9XXX is not set | 482 | # CONFIG_SCSI_3W_9XXX is not set |
463 | # CONFIG_SCSI_ACARD is not set | 483 | # CONFIG_SCSI_ACARD is not set |
464 | # CONFIG_SCSI_AACRAID is not set | 484 | # CONFIG_SCSI_AACRAID is not set |
465 | CONFIG_SCSI_AIC7XXX=y | 485 | CONFIG_SCSI_AIC7XXX=y |
466 | CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 | 486 | CONFIG_AIC7XXX_CMDS_PER_DEVICE=32 |
467 | CONFIG_AIC7XXX_RESET_DELAY_MS=15000 | 487 | CONFIG_AIC7XXX_RESET_DELAY_MS=15000 |
468 | CONFIG_AIC7XXX_DEBUG_ENABLE=y | 488 | CONFIG_AIC7XXX_DEBUG_ENABLE=y |
469 | CONFIG_AIC7XXX_DEBUG_MASK=0 | 489 | CONFIG_AIC7XXX_DEBUG_MASK=0 |
470 | CONFIG_AIC7XXX_REG_PRETTY_PRINT=y | 490 | CONFIG_AIC7XXX_REG_PRETTY_PRINT=y |
471 | # CONFIG_SCSI_AIC7XXX_OLD is not set | 491 | # CONFIG_SCSI_AIC7XXX_OLD is not set |
472 | # CONFIG_SCSI_AIC79XX is not set | 492 | # CONFIG_SCSI_AIC79XX is not set |
473 | CONFIG_SCSI_AIC94XX=y | 493 | # CONFIG_SCSI_AIC94XX is not set |
474 | # CONFIG_AIC94XX_DEBUG is not set | 494 | # CONFIG_SCSI_DPT_I2O is not set |
495 | # CONFIG_SCSI_ADVANSYS is not set | ||
475 | # CONFIG_SCSI_ARCMSR is not set | 496 | # CONFIG_SCSI_ARCMSR is not set |
476 | # CONFIG_MEGARAID_NEWGEN is not set | 497 | # CONFIG_MEGARAID_NEWGEN is not set |
477 | # CONFIG_MEGARAID_LEGACY is not set | 498 | # CONFIG_MEGARAID_LEGACY is not set |
@@ -482,6 +503,7 @@ CONFIG_SCSI_AIC94XX=y | |||
482 | # CONFIG_SCSI_IPS is not set | 503 | # CONFIG_SCSI_IPS is not set |
483 | # CONFIG_SCSI_INITIO is not set | 504 | # CONFIG_SCSI_INITIO is not set |
484 | # CONFIG_SCSI_INIA100 is not set | 505 | # CONFIG_SCSI_INIA100 is not set |
506 | # CONFIG_SCSI_MVSAS is not set | ||
485 | # CONFIG_SCSI_STEX is not set | 507 | # CONFIG_SCSI_STEX is not set |
486 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 508 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
487 | # CONFIG_SCSI_QLOGIC_1280 is not set | 509 | # CONFIG_SCSI_QLOGIC_1280 is not set |
@@ -492,147 +514,81 @@ CONFIG_SCSI_AIC94XX=y | |||
492 | # CONFIG_SCSI_DC390T is not set | 514 | # CONFIG_SCSI_DC390T is not set |
493 | # CONFIG_SCSI_DEBUG is not set | 515 | # CONFIG_SCSI_DEBUG is not set |
494 | # CONFIG_SCSI_SRP is not set | 516 | # CONFIG_SCSI_SRP is not set |
495 | 517 | # CONFIG_SCSI_DH is not set | |
496 | # | ||
497 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
498 | # | ||
499 | # CONFIG_ATA is not set | 518 | # CONFIG_ATA is not set |
500 | |||
501 | # | ||
502 | # Multi-device support (RAID and LVM) | ||
503 | # | ||
504 | # CONFIG_MD is not set | 519 | # CONFIG_MD is not set |
505 | |||
506 | # | ||
507 | # Fusion MPT device support | ||
508 | # | ||
509 | # CONFIG_FUSION is not set | 520 | # CONFIG_FUSION is not set |
510 | # CONFIG_FUSION_SPI is not set | ||
511 | # CONFIG_FUSION_FC is not set | ||
512 | # CONFIG_FUSION_SAS is not set | ||
513 | 521 | ||
514 | # | 522 | # |
515 | # IEEE 1394 (FireWire) support | 523 | # IEEE 1394 (FireWire) support |
516 | # | 524 | # |
517 | # CONFIG_IEEE1394 is not set | ||
518 | 525 | ||
519 | # | 526 | # |
520 | # I2O device support | 527 | # Enable only one of the two stacks, unless you know what you are doing |
521 | # | 528 | # |
529 | # CONFIG_FIREWIRE is not set | ||
530 | # CONFIG_IEEE1394 is not set | ||
522 | # CONFIG_I2O is not set | 531 | # CONFIG_I2O is not set |
523 | |||
524 | # | ||
525 | # Network device support | ||
526 | # | ||
527 | CONFIG_NETDEVICES=y | 532 | CONFIG_NETDEVICES=y |
528 | # CONFIG_DUMMY is not set | 533 | CONFIG_DUMMY=m |
529 | # CONFIG_BONDING is not set | 534 | CONFIG_BONDING=m |
535 | # CONFIG_MACVLAN is not set | ||
530 | # CONFIG_EQUALIZER is not set | 536 | # CONFIG_EQUALIZER is not set |
531 | # CONFIG_TUN is not set | 537 | # CONFIG_TUN is not set |
532 | 538 | # CONFIG_VETH is not set | |
533 | # | ||
534 | # ARCnet devices | ||
535 | # | ||
536 | # CONFIG_ARCNET is not set | 539 | # CONFIG_ARCNET is not set |
537 | 540 | # CONFIG_PHYLIB is not set | |
538 | # | ||
539 | # PHY device support | ||
540 | # | ||
541 | CONFIG_PHYLIB=y | ||
542 | |||
543 | # | ||
544 | # MII PHY device drivers | ||
545 | # | ||
546 | CONFIG_MARVELL_PHY=y | ||
547 | CONFIG_DAVICOM_PHY=y | ||
548 | CONFIG_QSEMI_PHY=y | ||
549 | CONFIG_LXT_PHY=y | ||
550 | CONFIG_CICADA_PHY=y | ||
551 | CONFIG_VITESSE_PHY=y | ||
552 | CONFIG_SMSC_PHY=y | ||
553 | # CONFIG_BROADCOM_PHY is not set | ||
554 | # CONFIG_FIXED_PHY is not set | ||
555 | |||
556 | # | ||
557 | # Ethernet (10 or 100Mbit) | ||
558 | # | ||
559 | CONFIG_NET_ETHERNET=y | 541 | CONFIG_NET_ETHERNET=y |
560 | # CONFIG_MII is not set | 542 | CONFIG_MII=y |
543 | # CONFIG_AX88796 is not set | ||
561 | CONFIG_SGI_O2MACE_ETH=y | 544 | CONFIG_SGI_O2MACE_ETH=y |
562 | # CONFIG_HAPPYMEAL is not set | 545 | # CONFIG_HAPPYMEAL is not set |
563 | # CONFIG_SUNGEM is not set | 546 | # CONFIG_SUNGEM is not set |
564 | # CONFIG_CASSINI is not set | 547 | # CONFIG_CASSINI is not set |
565 | # CONFIG_NET_VENDOR_3COM is not set | 548 | # CONFIG_NET_VENDOR_3COM is not set |
549 | # CONFIG_SMC91X is not set | ||
566 | # CONFIG_DM9000 is not set | 550 | # CONFIG_DM9000 is not set |
567 | 551 | CONFIG_NET_TULIP=y | |
568 | # | 552 | CONFIG_DE2104X=m |
569 | # Tulip family network device support | 553 | CONFIG_TULIP=m |
570 | # | 554 | # CONFIG_TULIP_MWI is not set |
571 | # CONFIG_NET_TULIP is not set | 555 | CONFIG_TULIP_MMIO=y |
556 | # CONFIG_TULIP_NAPI is not set | ||
557 | # CONFIG_DE4X5 is not set | ||
558 | # CONFIG_WINBOND_840 is not set | ||
559 | # CONFIG_DM9102 is not set | ||
560 | # CONFIG_ULI526X is not set | ||
572 | # CONFIG_HP100 is not set | 561 | # CONFIG_HP100 is not set |
562 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
563 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
564 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
565 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
566 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
567 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
568 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
573 | # CONFIG_NET_PCI is not set | 569 | # CONFIG_NET_PCI is not set |
574 | 570 | # CONFIG_B44 is not set | |
575 | # | 571 | # CONFIG_ATL2 is not set |
576 | # Ethernet (1000 Mbit) | 572 | # CONFIG_NETDEV_1000 is not set |
577 | # | 573 | # CONFIG_NETDEV_10000 is not set |
578 | # CONFIG_ACENIC is not set | ||
579 | # CONFIG_DL2K is not set | ||
580 | # CONFIG_E1000 is not set | ||
581 | # CONFIG_NS83820 is not set | ||
582 | # CONFIG_HAMACHI is not set | ||
583 | # CONFIG_YELLOWFIN is not set | ||
584 | # CONFIG_R8169 is not set | ||
585 | # CONFIG_SIS190 is not set | ||
586 | # CONFIG_SKGE is not set | ||
587 | # CONFIG_SKY2 is not set | ||
588 | # CONFIG_SK98LIN is not set | ||
589 | # CONFIG_TIGON3 is not set | ||
590 | # CONFIG_BNX2 is not set | ||
591 | CONFIG_QLA3XXX=y | ||
592 | # CONFIG_ATL1 is not set | ||
593 | |||
594 | # | ||
595 | # Ethernet (10000 Mbit) | ||
596 | # | ||
597 | # CONFIG_CHELSIO_T1 is not set | ||
598 | CONFIG_CHELSIO_T3=y | ||
599 | # CONFIG_IXGB is not set | ||
600 | # CONFIG_S2IO is not set | ||
601 | # CONFIG_MYRI10GE is not set | ||
602 | CONFIG_NETXEN_NIC=y | ||
603 | |||
604 | # | ||
605 | # Token Ring devices | ||
606 | # | ||
607 | # CONFIG_TR is not set | 574 | # CONFIG_TR is not set |
608 | 575 | ||
609 | # | 576 | # |
610 | # Wireless LAN (non-hamradio) | 577 | # Wireless LAN |
611 | # | ||
612 | # CONFIG_NET_RADIO is not set | ||
613 | |||
614 | # | ||
615 | # Wan interfaces | ||
616 | # | 578 | # |
579 | # CONFIG_WLAN_PRE80211 is not set | ||
580 | # CONFIG_WLAN_80211 is not set | ||
581 | # CONFIG_IWLWIFI_LEDS is not set | ||
617 | # CONFIG_WAN is not set | 582 | # CONFIG_WAN is not set |
618 | # CONFIG_FDDI is not set | 583 | # CONFIG_FDDI is not set |
619 | # CONFIG_HIPPI is not set | 584 | # CONFIG_HIPPI is not set |
620 | # CONFIG_PPP is not set | 585 | # CONFIG_PPP is not set |
621 | # CONFIG_SLIP is not set | 586 | # CONFIG_SLIP is not set |
622 | # CONFIG_NET_FC is not set | 587 | # CONFIG_NET_FC is not set |
623 | # CONFIG_SHAPER is not set | ||
624 | # CONFIG_NETCONSOLE is not set | 588 | # CONFIG_NETCONSOLE is not set |
625 | # CONFIG_NETPOLL is not set | 589 | # CONFIG_NETPOLL is not set |
626 | # CONFIG_NET_POLL_CONTROLLER is not set | 590 | # CONFIG_NET_POLL_CONTROLLER is not set |
627 | |||
628 | # | ||
629 | # ISDN subsystem | ||
630 | # | ||
631 | # CONFIG_ISDN is not set | 591 | # CONFIG_ISDN is not set |
632 | |||
633 | # | ||
634 | # Telephony Support | ||
635 | # | ||
636 | # CONFIG_PHONE is not set | 592 | # CONFIG_PHONE is not set |
637 | 593 | ||
638 | # | 594 | # |
@@ -640,6 +596,7 @@ CONFIG_NETXEN_NIC=y | |||
640 | # | 596 | # |
641 | CONFIG_INPUT=y | 597 | CONFIG_INPUT=y |
642 | # CONFIG_INPUT_FF_MEMLESS is not set | 598 | # CONFIG_INPUT_FF_MEMLESS is not set |
599 | # CONFIG_INPUT_POLLDEV is not set | ||
643 | 600 | ||
644 | # | 601 | # |
645 | # Userland interfaces | 602 | # Userland interfaces |
@@ -649,16 +606,32 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y | |||
649 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 606 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 |
650 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 607 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 |
651 | # CONFIG_INPUT_JOYDEV is not set | 608 | # CONFIG_INPUT_JOYDEV is not set |
652 | # CONFIG_INPUT_TSDEV is not set | 609 | CONFIG_INPUT_EVDEV=m |
653 | # CONFIG_INPUT_EVDEV is not set | ||
654 | # CONFIG_INPUT_EVBUG is not set | 610 | # CONFIG_INPUT_EVBUG is not set |
655 | 611 | ||
656 | # | 612 | # |
657 | # Input Device Drivers | 613 | # Input Device Drivers |
658 | # | 614 | # |
659 | # CONFIG_INPUT_KEYBOARD is not set | 615 | CONFIG_INPUT_KEYBOARD=y |
660 | # CONFIG_INPUT_MOUSE is not set | 616 | CONFIG_KEYBOARD_ATKBD=y |
617 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
618 | # CONFIG_KEYBOARD_LKKBD is not set | ||
619 | # CONFIG_KEYBOARD_XTKBD is not set | ||
620 | # CONFIG_KEYBOARD_NEWTON is not set | ||
621 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
622 | CONFIG_INPUT_MOUSE=y | ||
623 | CONFIG_MOUSE_PS2=y | ||
624 | CONFIG_MOUSE_PS2_ALPS=y | ||
625 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
626 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
627 | CONFIG_MOUSE_PS2_LIFEBOOK=y | ||
628 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
629 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
630 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
631 | # CONFIG_MOUSE_SERIAL is not set | ||
632 | # CONFIG_MOUSE_VSXXXAA is not set | ||
661 | # CONFIG_INPUT_JOYSTICK is not set | 633 | # CONFIG_INPUT_JOYSTICK is not set |
634 | # CONFIG_INPUT_TABLET is not set | ||
662 | # CONFIG_INPUT_TOUCHSCREEN is not set | 635 | # CONFIG_INPUT_TOUCHSCREEN is not set |
663 | # CONFIG_INPUT_MISC is not set | 636 | # CONFIG_INPUT_MISC is not set |
664 | 637 | ||
@@ -669,8 +642,8 @@ CONFIG_SERIO=y | |||
669 | # CONFIG_SERIO_I8042 is not set | 642 | # CONFIG_SERIO_I8042 is not set |
670 | CONFIG_SERIO_SERPORT=y | 643 | CONFIG_SERIO_SERPORT=y |
671 | # CONFIG_SERIO_PCIPS2 is not set | 644 | # CONFIG_SERIO_PCIPS2 is not set |
672 | # CONFIG_SERIO_MACEPS2 is not set | 645 | CONFIG_SERIO_MACEPS2=y |
673 | # CONFIG_SERIO_LIBPS2 is not set | 646 | CONFIG_SERIO_LIBPS2=y |
674 | CONFIG_SERIO_RAW=y | 647 | CONFIG_SERIO_RAW=y |
675 | # CONFIG_GAMEPORT is not set | 648 | # CONFIG_GAMEPORT is not set |
676 | 649 | ||
@@ -678,10 +651,13 @@ CONFIG_SERIO_RAW=y | |||
678 | # Character devices | 651 | # Character devices |
679 | # | 652 | # |
680 | CONFIG_VT=y | 653 | CONFIG_VT=y |
654 | # CONFIG_CONSOLE_TRANSLATIONS is not set | ||
681 | CONFIG_VT_CONSOLE=y | 655 | CONFIG_VT_CONSOLE=y |
682 | CONFIG_HW_CONSOLE=y | 656 | CONFIG_HW_CONSOLE=y |
683 | CONFIG_VT_HW_CONSOLE_BINDING=y | 657 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
658 | CONFIG_DEVKMEM=y | ||
684 | # CONFIG_SERIAL_NONSTANDARD is not set | 659 | # CONFIG_SERIAL_NONSTANDARD is not set |
660 | # CONFIG_NOZOMI is not set | ||
685 | 661 | ||
686 | # | 662 | # |
687 | # Serial drivers | 663 | # Serial drivers |
@@ -702,192 +678,304 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
702 | CONFIG_UNIX98_PTYS=y | 678 | CONFIG_UNIX98_PTYS=y |
703 | CONFIG_LEGACY_PTYS=y | 679 | CONFIG_LEGACY_PTYS=y |
704 | CONFIG_LEGACY_PTY_COUNT=256 | 680 | CONFIG_LEGACY_PTY_COUNT=256 |
705 | |||
706 | # | ||
707 | # IPMI | ||
708 | # | ||
709 | # CONFIG_IPMI_HANDLER is not set | 681 | # CONFIG_IPMI_HANDLER is not set |
710 | 682 | CONFIG_HW_RANDOM=y | |
711 | # | ||
712 | # Watchdog Cards | ||
713 | # | ||
714 | # CONFIG_WATCHDOG is not set | ||
715 | # CONFIG_HW_RANDOM is not set | ||
716 | # CONFIG_RTC is not set | ||
717 | # CONFIG_GEN_RTC is not set | ||
718 | # CONFIG_DTLK is not set | ||
719 | # CONFIG_R3964 is not set | 683 | # CONFIG_R3964 is not set |
720 | # CONFIG_APPLICOM is not set | 684 | # CONFIG_APPLICOM is not set |
721 | # CONFIG_DRM is not set | ||
722 | # CONFIG_RAW_DRIVER is not set | 685 | # CONFIG_RAW_DRIVER is not set |
723 | |||
724 | # | ||
725 | # TPM devices | ||
726 | # | ||
727 | # CONFIG_TCG_TPM is not set | 686 | # CONFIG_TCG_TPM is not set |
687 | CONFIG_DEVPORT=y | ||
688 | # CONFIG_I2C is not set | ||
689 | # CONFIG_SPI is not set | ||
690 | # CONFIG_W1 is not set | ||
691 | # CONFIG_POWER_SUPPLY is not set | ||
692 | CONFIG_HWMON=y | ||
693 | # CONFIG_HWMON_VID is not set | ||
694 | # CONFIG_SENSORS_I5K_AMB is not set | ||
695 | # CONFIG_SENSORS_F71805F is not set | ||
696 | # CONFIG_SENSORS_F71882FG is not set | ||
697 | # CONFIG_SENSORS_IT87 is not set | ||
698 | # CONFIG_SENSORS_PC87360 is not set | ||
699 | # CONFIG_SENSORS_PC87427 is not set | ||
700 | # CONFIG_SENSORS_SIS5595 is not set | ||
701 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
702 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
703 | # CONFIG_SENSORS_VIA686A is not set | ||
704 | # CONFIG_SENSORS_VT1211 is not set | ||
705 | # CONFIG_SENSORS_VT8231 is not set | ||
706 | # CONFIG_SENSORS_W83627HF is not set | ||
707 | # CONFIG_SENSORS_W83627EHF is not set | ||
708 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
709 | # CONFIG_THERMAL is not set | ||
710 | # CONFIG_THERMAL_HWMON is not set | ||
711 | CONFIG_WATCHDOG=y | ||
712 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
728 | 713 | ||
729 | # | 714 | # |
730 | # I2C support | 715 | # Watchdog Device Drivers |
731 | # | 716 | # |
732 | # CONFIG_I2C is not set | 717 | # CONFIG_SOFT_WATCHDOG is not set |
718 | # CONFIG_ALIM7101_WDT is not set | ||
733 | 719 | ||
734 | # | 720 | # |
735 | # SPI support | 721 | # PCI-based Watchdog Cards |
736 | # | 722 | # |
737 | # CONFIG_SPI is not set | 723 | # CONFIG_PCIPCWATCHDOG is not set |
738 | # CONFIG_SPI_MASTER is not set | 724 | # CONFIG_WDTPCI is not set |
725 | CONFIG_SSB_POSSIBLE=y | ||
739 | 726 | ||
740 | # | 727 | # |
741 | # Dallas's 1-wire bus | 728 | # Sonics Silicon Backplane |
742 | # | 729 | # |
743 | # CONFIG_W1 is not set | 730 | # CONFIG_SSB is not set |
744 | 731 | ||
745 | # | 732 | # |
746 | # Hardware Monitoring support | 733 | # Multifunction device drivers |
747 | # | 734 | # |
748 | # CONFIG_HWMON is not set | 735 | # CONFIG_MFD_CORE is not set |
749 | # CONFIG_HWMON_VID is not set | 736 | # CONFIG_MFD_SM501 is not set |
737 | # CONFIG_HTC_PASIC3 is not set | ||
738 | # CONFIG_MFD_TMIO is not set | ||
739 | # CONFIG_REGULATOR is not set | ||
750 | 740 | ||
751 | # | 741 | # |
752 | # Multimedia devices | 742 | # Multimedia devices |
753 | # | 743 | # |
754 | # CONFIG_VIDEO_DEV is not set | ||
755 | 744 | ||
756 | # | 745 | # |
757 | # Digital Video Broadcasting Devices | 746 | # Multimedia core support |
758 | # | 747 | # |
759 | # CONFIG_DVB is not set | 748 | CONFIG_VIDEO_DEV=m |
749 | CONFIG_VIDEO_V4L2_COMMON=m | ||
750 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
751 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
752 | # CONFIG_DVB_CORE is not set | ||
753 | CONFIG_VIDEO_MEDIA=m | ||
760 | 754 | ||
761 | # | 755 | # |
762 | # Graphics support | 756 | # Multimedia drivers |
763 | # | 757 | # |
764 | # CONFIG_FIRMWARE_EDID is not set | 758 | # CONFIG_MEDIA_ATTACH is not set |
765 | # CONFIG_FB is not set | 759 | CONFIG_VIDEO_V4L2=m |
760 | CONFIG_VIDEO_V4L1=m | ||
761 | CONFIG_VIDEOBUF_GEN=m | ||
762 | CONFIG_VIDEOBUF_VMALLOC=m | ||
763 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
764 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
765 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
766 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
767 | CONFIG_VIDEO_VIVI=m | ||
768 | # CONFIG_VIDEO_CPIA is not set | ||
769 | # CONFIG_VIDEO_STRADIS is not set | ||
770 | # CONFIG_SOC_CAMERA is not set | ||
771 | CONFIG_RADIO_ADAPTERS=y | ||
772 | # CONFIG_RADIO_GEMTEK_PCI is not set | ||
773 | # CONFIG_RADIO_MAXIRADIO is not set | ||
774 | # CONFIG_RADIO_MAESTRO is not set | ||
775 | CONFIG_DAB=y | ||
766 | 776 | ||
767 | # | 777 | # |
768 | # Console display driver support | 778 | # Graphics support |
769 | # | 779 | # |
770 | # CONFIG_VGA_CONSOLE is not set | 780 | # CONFIG_DRM is not set |
771 | CONFIG_DUMMY_CONSOLE=y | 781 | # CONFIG_VGASTATE is not set |
782 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
783 | CONFIG_FB=y | ||
784 | CONFIG_FIRMWARE_EDID=y | ||
785 | # CONFIG_FB_DDC is not set | ||
786 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
787 | CONFIG_FB_CFB_FILLRECT=y | ||
788 | CONFIG_FB_CFB_COPYAREA=y | ||
789 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
790 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
791 | # CONFIG_FB_SYS_FILLRECT is not set | ||
792 | # CONFIG_FB_SYS_COPYAREA is not set | ||
793 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
794 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
795 | # CONFIG_FB_SYS_FOPS is not set | ||
796 | # CONFIG_FB_SVGALIB is not set | ||
797 | # CONFIG_FB_MACMODES is not set | ||
798 | # CONFIG_FB_BACKLIGHT is not set | ||
799 | # CONFIG_FB_MODE_HELPERS is not set | ||
800 | # CONFIG_FB_TILEBLITTING is not set | ||
801 | |||
802 | # | ||
803 | # Frame buffer hardware drivers | ||
804 | # | ||
805 | # CONFIG_FB_CIRRUS is not set | ||
806 | # CONFIG_FB_PM2 is not set | ||
807 | # CONFIG_FB_CYBER2000 is not set | ||
808 | # CONFIG_FB_ASILIANT is not set | ||
809 | # CONFIG_FB_IMSTT is not set | ||
810 | # CONFIG_FB_UVESA is not set | ||
811 | CONFIG_FB_GBE=y | ||
812 | CONFIG_FB_GBE_MEM=4 | ||
813 | # CONFIG_FB_S1D13XXX is not set | ||
814 | # CONFIG_FB_NVIDIA is not set | ||
815 | # CONFIG_FB_RIVA is not set | ||
816 | # CONFIG_FB_MATROX is not set | ||
817 | # CONFIG_FB_RADEON is not set | ||
818 | # CONFIG_FB_ATY128 is not set | ||
819 | # CONFIG_FB_ATY is not set | ||
820 | # CONFIG_FB_S3 is not set | ||
821 | # CONFIG_FB_SAVAGE is not set | ||
822 | # CONFIG_FB_SIS is not set | ||
823 | # CONFIG_FB_VIA is not set | ||
824 | # CONFIG_FB_NEOMAGIC is not set | ||
825 | # CONFIG_FB_KYRO is not set | ||
826 | # CONFIG_FB_3DFX is not set | ||
827 | # CONFIG_FB_VOODOO1 is not set | ||
828 | # CONFIG_FB_VT8623 is not set | ||
829 | # CONFIG_FB_TRIDENT is not set | ||
830 | # CONFIG_FB_ARK is not set | ||
831 | # CONFIG_FB_PM3 is not set | ||
832 | # CONFIG_FB_CARMINE is not set | ||
833 | # CONFIG_FB_VIRTUAL is not set | ||
834 | # CONFIG_FB_METRONOME is not set | ||
835 | # CONFIG_FB_MB862XX is not set | ||
772 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 836 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
773 | 837 | ||
774 | # | 838 | # |
775 | # Sound | 839 | # Display device support |
776 | # | 840 | # |
777 | # CONFIG_SOUND is not set | 841 | # CONFIG_DISPLAY_SUPPORT is not set |
778 | 842 | ||
779 | # | 843 | # |
780 | # HID Devices | 844 | # Console display driver support |
781 | # | 845 | # |
846 | # CONFIG_VGA_CONSOLE is not set | ||
847 | CONFIG_DUMMY_CONSOLE=y | ||
848 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
849 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
850 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
851 | CONFIG_FONTS=y | ||
852 | CONFIG_FONT_8x8=y | ||
853 | CONFIG_FONT_8x16=y | ||
854 | # CONFIG_FONT_6x11 is not set | ||
855 | # CONFIG_FONT_7x14 is not set | ||
856 | # CONFIG_FONT_PEARL_8x8 is not set | ||
857 | # CONFIG_FONT_ACORN_8x8 is not set | ||
858 | # CONFIG_FONT_MINI_4x6 is not set | ||
859 | # CONFIG_FONT_SUN8x16 is not set | ||
860 | # CONFIG_FONT_SUN12x22 is not set | ||
861 | # CONFIG_FONT_10x18 is not set | ||
862 | CONFIG_LOGO=y | ||
863 | # CONFIG_LOGO_LINUX_MONO is not set | ||
864 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
865 | # CONFIG_LOGO_LINUX_CLUT224 is not set | ||
866 | CONFIG_LOGO_SGI_CLUT224=y | ||
867 | # CONFIG_SOUND is not set | ||
868 | CONFIG_HID_SUPPORT=y | ||
782 | CONFIG_HID=y | 869 | CONFIG_HID=y |
783 | # CONFIG_HID_DEBUG is not set | 870 | # CONFIG_HID_DEBUG is not set |
871 | # CONFIG_HIDRAW is not set | ||
872 | # CONFIG_HID_PID is not set | ||
784 | 873 | ||
785 | # | 874 | # |
786 | # USB support | 875 | # Special HID drivers |
787 | # | ||
788 | CONFIG_USB_ARCH_HAS_HCD=y | ||
789 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
790 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
791 | # CONFIG_USB is not set | ||
792 | |||
793 | # | ||
794 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
795 | # | ||
796 | |||
797 | # | ||
798 | # USB Gadget Support | ||
799 | # | ||
800 | # CONFIG_USB_GADGET is not set | ||
801 | |||
802 | # | ||
803 | # MMC/SD Card support | ||
804 | # | 876 | # |
877 | CONFIG_HID_COMPAT=y | ||
878 | # CONFIG_USB_SUPPORT is not set | ||
879 | # CONFIG_UWB is not set | ||
805 | # CONFIG_MMC is not set | 880 | # CONFIG_MMC is not set |
806 | 881 | # CONFIG_MEMSTICK is not set | |
807 | # | ||
808 | # LED devices | ||
809 | # | ||
810 | # CONFIG_NEW_LEDS is not set | 882 | # CONFIG_NEW_LEDS is not set |
811 | 883 | # CONFIG_ACCESSIBILITY is not set | |
812 | # | ||
813 | # LED drivers | ||
814 | # | ||
815 | |||
816 | # | ||
817 | # LED Triggers | ||
818 | # | ||
819 | |||
820 | # | ||
821 | # InfiniBand support | ||
822 | # | ||
823 | # CONFIG_INFINIBAND is not set | 884 | # CONFIG_INFINIBAND is not set |
885 | CONFIG_RTC_LIB=y | ||
886 | CONFIG_RTC_CLASS=y | ||
887 | # CONFIG_RTC_HCTOSYS is not set | ||
888 | # CONFIG_RTC_DEBUG is not set | ||
824 | 889 | ||
825 | # | 890 | # |
826 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | 891 | # RTC interfaces |
827 | # | 892 | # |
893 | # CONFIG_RTC_INTF_SYSFS is not set | ||
894 | # CONFIG_RTC_INTF_PROC is not set | ||
895 | CONFIG_RTC_INTF_DEV=y | ||
896 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
897 | # CONFIG_RTC_DRV_TEST is not set | ||
828 | 898 | ||
829 | # | 899 | # |
830 | # Real Time Clock | 900 | # SPI RTC drivers |
831 | # | 901 | # |
832 | # CONFIG_RTC_CLASS is not set | ||
833 | 902 | ||
834 | # | 903 | # |
835 | # DMA Engine support | 904 | # Platform RTC drivers |
836 | # | 905 | # |
837 | # CONFIG_DMA_ENGINE is not set | 906 | CONFIG_RTC_DRV_CMOS=y |
907 | # CONFIG_RTC_DRV_DS1286 is not set | ||
908 | # CONFIG_RTC_DRV_DS1511 is not set | ||
909 | # CONFIG_RTC_DRV_DS1553 is not set | ||
910 | # CONFIG_RTC_DRV_DS1742 is not set | ||
911 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
912 | # CONFIG_RTC_DRV_M48T86 is not set | ||
913 | # CONFIG_RTC_DRV_M48T35 is not set | ||
914 | # CONFIG_RTC_DRV_M48T59 is not set | ||
915 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
916 | # CONFIG_RTC_DRV_V3020 is not set | ||
838 | 917 | ||
839 | # | 918 | # |
840 | # DMA Clients | 919 | # on-CPU RTC drivers |
841 | # | ||
842 | |||
843 | # | ||
844 | # DMA Devices | ||
845 | # | ||
846 | |||
847 | # | ||
848 | # Auxiliary Display support | ||
849 | # | ||
850 | |||
851 | # | ||
852 | # Virtualization | ||
853 | # | 920 | # |
921 | # CONFIG_DMADEVICES is not set | ||
922 | # CONFIG_UIO is not set | ||
923 | # CONFIG_STAGING is not set | ||
924 | CONFIG_STAGING_EXCLUDE_BUILD=y | ||
854 | 925 | ||
855 | # | 926 | # |
856 | # File systems | 927 | # File systems |
857 | # | 928 | # |
858 | CONFIG_EXT2_FS=y | 929 | CONFIG_EXT2_FS=y |
859 | # CONFIG_EXT2_FS_XATTR is not set | 930 | CONFIG_EXT2_FS_XATTR=y |
931 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
932 | CONFIG_EXT2_FS_SECURITY=y | ||
860 | # CONFIG_EXT2_FS_XIP is not set | 933 | # CONFIG_EXT2_FS_XIP is not set |
861 | # CONFIG_EXT3_FS is not set | 934 | CONFIG_EXT3_FS=y |
862 | # CONFIG_EXT4DEV_FS is not set | 935 | CONFIG_EXT3_FS_XATTR=y |
936 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
937 | CONFIG_EXT3_FS_SECURITY=y | ||
938 | # CONFIG_EXT4_FS is not set | ||
939 | CONFIG_JBD=y | ||
940 | CONFIG_FS_MBCACHE=y | ||
863 | # CONFIG_REISERFS_FS is not set | 941 | # CONFIG_REISERFS_FS is not set |
864 | # CONFIG_JFS_FS is not set | 942 | # CONFIG_JFS_FS is not set |
865 | CONFIG_FS_POSIX_ACL=y | 943 | CONFIG_FS_POSIX_ACL=y |
944 | CONFIG_FILE_LOCKING=y | ||
866 | # CONFIG_XFS_FS is not set | 945 | # CONFIG_XFS_FS is not set |
867 | # CONFIG_GFS2_FS is not set | 946 | # CONFIG_GFS2_FS is not set |
868 | # CONFIG_OCFS2_FS is not set | 947 | # CONFIG_OCFS2_FS is not set |
869 | # CONFIG_MINIX_FS is not set | 948 | CONFIG_DNOTIFY=y |
870 | # CONFIG_ROMFS_FS is not set | ||
871 | CONFIG_INOTIFY=y | 949 | CONFIG_INOTIFY=y |
872 | CONFIG_INOTIFY_USER=y | 950 | CONFIG_INOTIFY_USER=y |
873 | # CONFIG_QUOTA is not set | 951 | CONFIG_QUOTA=y |
874 | CONFIG_DNOTIFY=y | 952 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set |
875 | # CONFIG_AUTOFS_FS is not set | 953 | CONFIG_PRINT_QUOTA_WARNING=y |
876 | # CONFIG_AUTOFS4_FS is not set | 954 | CONFIG_QFMT_V1=m |
877 | CONFIG_FUSE_FS=y | 955 | CONFIG_QFMT_V2=m |
956 | CONFIG_QUOTACTL=y | ||
957 | CONFIG_AUTOFS_FS=m | ||
958 | CONFIG_AUTOFS4_FS=m | ||
959 | CONFIG_FUSE_FS=m | ||
878 | CONFIG_GENERIC_ACL=y | 960 | CONFIG_GENERIC_ACL=y |
879 | 961 | ||
880 | # | 962 | # |
881 | # CD-ROM/DVD Filesystems | 963 | # CD-ROM/DVD Filesystems |
882 | # | 964 | # |
883 | # CONFIG_ISO9660_FS is not set | 965 | CONFIG_ISO9660_FS=m |
884 | # CONFIG_UDF_FS is not set | 966 | CONFIG_JOLIET=y |
967 | CONFIG_ZISOFS=y | ||
968 | CONFIG_UDF_FS=m | ||
969 | CONFIG_UDF_NLS=y | ||
885 | 970 | ||
886 | # | 971 | # |
887 | # DOS/FAT/NT Filesystems | 972 | # DOS/FAT/NT Filesystems |
888 | # | 973 | # |
889 | # CONFIG_MSDOS_FS is not set | 974 | CONFIG_FAT_FS=m |
890 | # CONFIG_VFAT_FS is not set | 975 | CONFIG_MSDOS_FS=m |
976 | CONFIG_VFAT_FS=m | ||
977 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
978 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
891 | # CONFIG_NTFS_FS is not set | 979 | # CONFIG_NTFS_FS is not set |
892 | 980 | ||
893 | # | 981 | # |
@@ -896,11 +984,11 @@ CONFIG_GENERIC_ACL=y | |||
896 | CONFIG_PROC_FS=y | 984 | CONFIG_PROC_FS=y |
897 | CONFIG_PROC_KCORE=y | 985 | CONFIG_PROC_KCORE=y |
898 | CONFIG_PROC_SYSCTL=y | 986 | CONFIG_PROC_SYSCTL=y |
987 | CONFIG_PROC_PAGE_MONITOR=y | ||
899 | CONFIG_SYSFS=y | 988 | CONFIG_SYSFS=y |
900 | CONFIG_TMPFS=y | 989 | CONFIG_TMPFS=y |
901 | CONFIG_TMPFS_POSIX_ACL=y | 990 | CONFIG_TMPFS_POSIX_ACL=y |
902 | # CONFIG_HUGETLB_PAGE is not set | 991 | # CONFIG_HUGETLB_PAGE is not set |
903 | CONFIG_RAMFS=y | ||
904 | CONFIG_CONFIGFS_FS=y | 992 | CONFIG_CONFIGFS_FS=y |
905 | 993 | ||
906 | # | 994 | # |
@@ -916,33 +1004,42 @@ CONFIG_CONFIGFS_FS=y | |||
916 | # CONFIG_EFS_FS is not set | 1004 | # CONFIG_EFS_FS is not set |
917 | # CONFIG_CRAMFS is not set | 1005 | # CONFIG_CRAMFS is not set |
918 | # CONFIG_VXFS_FS is not set | 1006 | # CONFIG_VXFS_FS is not set |
1007 | # CONFIG_MINIX_FS is not set | ||
1008 | # CONFIG_OMFS_FS is not set | ||
919 | # CONFIG_HPFS_FS is not set | 1009 | # CONFIG_HPFS_FS is not set |
920 | # CONFIG_QNX4FS_FS is not set | 1010 | # CONFIG_QNX4FS_FS is not set |
1011 | # CONFIG_ROMFS_FS is not set | ||
921 | # CONFIG_SYSV_FS is not set | 1012 | # CONFIG_SYSV_FS is not set |
922 | # CONFIG_UFS_FS is not set | 1013 | # CONFIG_UFS_FS is not set |
923 | 1014 | CONFIG_NETWORK_FILESYSTEMS=y | |
924 | # | ||
925 | # Network File Systems | ||
926 | # | ||
927 | CONFIG_NFS_FS=y | 1015 | CONFIG_NFS_FS=y |
928 | CONFIG_NFS_V3=y | 1016 | CONFIG_NFS_V3=y |
929 | # CONFIG_NFS_V3_ACL is not set | 1017 | # CONFIG_NFS_V3_ACL is not set |
930 | # CONFIG_NFS_V4 is not set | 1018 | # CONFIG_NFS_V4 is not set |
931 | # CONFIG_NFS_DIRECTIO is not set | ||
932 | # CONFIG_NFSD is not set | ||
933 | CONFIG_ROOT_NFS=y | 1019 | CONFIG_ROOT_NFS=y |
1020 | CONFIG_NFSD=m | ||
1021 | CONFIG_NFSD_V3=y | ||
1022 | # CONFIG_NFSD_V3_ACL is not set | ||
1023 | # CONFIG_NFSD_V4 is not set | ||
934 | CONFIG_LOCKD=y | 1024 | CONFIG_LOCKD=y |
935 | CONFIG_LOCKD_V4=y | 1025 | CONFIG_LOCKD_V4=y |
1026 | CONFIG_EXPORTFS=m | ||
936 | CONFIG_NFS_COMMON=y | 1027 | CONFIG_NFS_COMMON=y |
937 | CONFIG_SUNRPC=y | 1028 | CONFIG_SUNRPC=y |
1029 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
938 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1030 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
939 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1031 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
940 | # CONFIG_SMB_FS is not set | 1032 | # CONFIG_SMB_FS is not set |
941 | # CONFIG_CIFS is not set | 1033 | CONFIG_CIFS=m |
1034 | # CONFIG_CIFS_STATS is not set | ||
1035 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1036 | # CONFIG_CIFS_UPCALL is not set | ||
1037 | # CONFIG_CIFS_XATTR is not set | ||
1038 | # CONFIG_CIFS_DEBUG2 is not set | ||
1039 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
942 | # CONFIG_NCP_FS is not set | 1040 | # CONFIG_NCP_FS is not set |
943 | # CONFIG_CODA_FS is not set | 1041 | # CONFIG_CODA_FS is not set |
944 | # CONFIG_AFS_FS is not set | 1042 | # CONFIG_AFS_FS is not set |
945 | # CONFIG_9P_FS is not set | ||
946 | 1043 | ||
947 | # | 1044 | # |
948 | # Partition Types | 1045 | # Partition Types |
@@ -953,45 +1050,83 @@ CONFIG_PARTITION_ADVANCED=y | |||
953 | # CONFIG_AMIGA_PARTITION is not set | 1050 | # CONFIG_AMIGA_PARTITION is not set |
954 | # CONFIG_ATARI_PARTITION is not set | 1051 | # CONFIG_ATARI_PARTITION is not set |
955 | # CONFIG_MAC_PARTITION is not set | 1052 | # CONFIG_MAC_PARTITION is not set |
956 | # CONFIG_MSDOS_PARTITION is not set | 1053 | CONFIG_MSDOS_PARTITION=y |
1054 | # CONFIG_BSD_DISKLABEL is not set | ||
1055 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1056 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1057 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
957 | # CONFIG_LDM_PARTITION is not set | 1058 | # CONFIG_LDM_PARTITION is not set |
958 | CONFIG_SGI_PARTITION=y | 1059 | CONFIG_SGI_PARTITION=y |
959 | # CONFIG_ULTRIX_PARTITION is not set | 1060 | # CONFIG_ULTRIX_PARTITION is not set |
960 | # CONFIG_SUN_PARTITION is not set | 1061 | # CONFIG_SUN_PARTITION is not set |
961 | # CONFIG_KARMA_PARTITION is not set | 1062 | # CONFIG_KARMA_PARTITION is not set |
962 | # CONFIG_EFI_PARTITION is not set | 1063 | # CONFIG_EFI_PARTITION is not set |
963 | 1064 | # CONFIG_SYSV68_PARTITION is not set | |
964 | # | 1065 | CONFIG_NLS=y |
965 | # Native Language Support | 1066 | CONFIG_NLS_DEFAULT="iso8859-1" |
966 | # | 1067 | CONFIG_NLS_CODEPAGE_437=m |
967 | # CONFIG_NLS is not set | 1068 | CONFIG_NLS_CODEPAGE_737=m |
968 | 1069 | CONFIG_NLS_CODEPAGE_775=m | |
969 | # | 1070 | CONFIG_NLS_CODEPAGE_850=m |
970 | # Distributed Lock Manager | 1071 | CONFIG_NLS_CODEPAGE_852=m |
971 | # | 1072 | CONFIG_NLS_CODEPAGE_855=m |
972 | CONFIG_DLM=y | 1073 | CONFIG_NLS_CODEPAGE_857=m |
973 | CONFIG_DLM_TCP=y | 1074 | CONFIG_NLS_CODEPAGE_860=m |
974 | # CONFIG_DLM_SCTP is not set | 1075 | CONFIG_NLS_CODEPAGE_861=m |
975 | # CONFIG_DLM_DEBUG is not set | 1076 | CONFIG_NLS_CODEPAGE_862=m |
976 | 1077 | CONFIG_NLS_CODEPAGE_863=m | |
977 | # | 1078 | CONFIG_NLS_CODEPAGE_864=m |
978 | # Profiling support | 1079 | CONFIG_NLS_CODEPAGE_865=m |
979 | # | 1080 | CONFIG_NLS_CODEPAGE_866=m |
980 | # CONFIG_PROFILING is not set | 1081 | CONFIG_NLS_CODEPAGE_869=m |
1082 | CONFIG_NLS_CODEPAGE_936=m | ||
1083 | CONFIG_NLS_CODEPAGE_950=m | ||
1084 | CONFIG_NLS_CODEPAGE_932=m | ||
1085 | CONFIG_NLS_CODEPAGE_949=m | ||
1086 | CONFIG_NLS_CODEPAGE_874=m | ||
1087 | CONFIG_NLS_ISO8859_8=m | ||
1088 | CONFIG_NLS_CODEPAGE_1250=m | ||
1089 | CONFIG_NLS_CODEPAGE_1251=m | ||
1090 | CONFIG_NLS_ASCII=m | ||
1091 | CONFIG_NLS_ISO8859_1=m | ||
1092 | CONFIG_NLS_ISO8859_2=m | ||
1093 | CONFIG_NLS_ISO8859_3=m | ||
1094 | CONFIG_NLS_ISO8859_4=m | ||
1095 | CONFIG_NLS_ISO8859_5=m | ||
1096 | CONFIG_NLS_ISO8859_6=m | ||
1097 | CONFIG_NLS_ISO8859_7=m | ||
1098 | CONFIG_NLS_ISO8859_9=m | ||
1099 | CONFIG_NLS_ISO8859_13=m | ||
1100 | CONFIG_NLS_ISO8859_14=m | ||
1101 | CONFIG_NLS_ISO8859_15=m | ||
1102 | CONFIG_NLS_KOI8_R=m | ||
1103 | CONFIG_NLS_KOI8_U=m | ||
1104 | CONFIG_NLS_UTF8=m | ||
1105 | # CONFIG_DLM is not set | ||
981 | 1106 | ||
982 | # | 1107 | # |
983 | # Kernel hacking | 1108 | # Kernel hacking |
984 | # | 1109 | # |
985 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | 1110 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y |
986 | # CONFIG_PRINTK_TIME is not set | 1111 | # CONFIG_PRINTK_TIME is not set |
1112 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
987 | CONFIG_ENABLE_MUST_CHECK=y | 1113 | CONFIG_ENABLE_MUST_CHECK=y |
988 | # CONFIG_MAGIC_SYSRQ is not set | 1114 | CONFIG_FRAME_WARN=2048 |
1115 | CONFIG_MAGIC_SYSRQ=y | ||
989 | # CONFIG_UNUSED_SYMBOLS is not set | 1116 | # CONFIG_UNUSED_SYMBOLS is not set |
990 | # CONFIG_DEBUG_FS is not set | 1117 | # CONFIG_DEBUG_FS is not set |
991 | # CONFIG_HEADERS_CHECK is not set | 1118 | # CONFIG_HEADERS_CHECK is not set |
992 | # CONFIG_DEBUG_KERNEL is not set | 1119 | # CONFIG_DEBUG_KERNEL is not set |
993 | CONFIG_LOG_BUF_SHIFT=14 | 1120 | # CONFIG_DEBUG_MEMORY_INIT is not set |
994 | CONFIG_CROSSCOMPILE=y | 1121 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
1122 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
1123 | |||
1124 | # | ||
1125 | # Tracers | ||
1126 | # | ||
1127 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1128 | # CONFIG_SAMPLES is not set | ||
1129 | CONFIG_HAVE_ARCH_KGDB=y | ||
995 | CONFIG_CMDLINE="" | 1130 | CONFIG_CMDLINE="" |
996 | 1131 | ||
997 | # | 1132 | # |
@@ -1000,51 +1135,99 @@ CONFIG_CMDLINE="" | |||
1000 | CONFIG_KEYS=y | 1135 | CONFIG_KEYS=y |
1001 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | 1136 | CONFIG_KEYS_DEBUG_PROC_KEYS=y |
1002 | # CONFIG_SECURITY is not set | 1137 | # CONFIG_SECURITY is not set |
1138 | # CONFIG_SECURITYFS is not set | ||
1139 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1140 | CONFIG_CRYPTO=y | ||
1003 | 1141 | ||
1004 | # | 1142 | # |
1005 | # Cryptographic options | 1143 | # Crypto core or helper |
1006 | # | 1144 | # |
1007 | CONFIG_CRYPTO=y | 1145 | # CONFIG_CRYPTO_FIPS is not set |
1008 | CONFIG_CRYPTO_ALGAPI=y | 1146 | CONFIG_CRYPTO_ALGAPI=y |
1147 | CONFIG_CRYPTO_AEAD=y | ||
1009 | CONFIG_CRYPTO_BLKCIPHER=y | 1148 | CONFIG_CRYPTO_BLKCIPHER=y |
1010 | CONFIG_CRYPTO_HASH=y | 1149 | CONFIG_CRYPTO_HASH=y |
1150 | CONFIG_CRYPTO_RNG=y | ||
1011 | CONFIG_CRYPTO_MANAGER=y | 1151 | CONFIG_CRYPTO_MANAGER=y |
1152 | CONFIG_CRYPTO_GF128MUL=y | ||
1153 | CONFIG_CRYPTO_NULL=y | ||
1154 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1155 | CONFIG_CRYPTO_AUTHENC=m | ||
1156 | # CONFIG_CRYPTO_TEST is not set | ||
1157 | |||
1158 | # | ||
1159 | # Authenticated Encryption with Associated Data | ||
1160 | # | ||
1161 | # CONFIG_CRYPTO_CCM is not set | ||
1162 | # CONFIG_CRYPTO_GCM is not set | ||
1163 | # CONFIG_CRYPTO_SEQIV is not set | ||
1164 | |||
1165 | # | ||
1166 | # Block modes | ||
1167 | # | ||
1168 | CONFIG_CRYPTO_CBC=y | ||
1169 | # CONFIG_CRYPTO_CTR is not set | ||
1170 | # CONFIG_CRYPTO_CTS is not set | ||
1171 | CONFIG_CRYPTO_ECB=y | ||
1172 | CONFIG_CRYPTO_LRW=y | ||
1173 | CONFIG_CRYPTO_PCBC=y | ||
1174 | # CONFIG_CRYPTO_XTS is not set | ||
1175 | |||
1176 | # | ||
1177 | # Hash modes | ||
1178 | # | ||
1012 | CONFIG_CRYPTO_HMAC=y | 1179 | CONFIG_CRYPTO_HMAC=y |
1013 | CONFIG_CRYPTO_XCBC=y | 1180 | CONFIG_CRYPTO_XCBC=y |
1014 | CONFIG_CRYPTO_NULL=y | 1181 | |
1182 | # | ||
1183 | # Digest | ||
1184 | # | ||
1185 | CONFIG_CRYPTO_CRC32C=y | ||
1015 | CONFIG_CRYPTO_MD4=y | 1186 | CONFIG_CRYPTO_MD4=y |
1016 | CONFIG_CRYPTO_MD5=y | 1187 | CONFIG_CRYPTO_MD5=y |
1188 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
1189 | # CONFIG_CRYPTO_RMD128 is not set | ||
1190 | # CONFIG_CRYPTO_RMD160 is not set | ||
1191 | # CONFIG_CRYPTO_RMD256 is not set | ||
1192 | # CONFIG_CRYPTO_RMD320 is not set | ||
1017 | CONFIG_CRYPTO_SHA1=y | 1193 | CONFIG_CRYPTO_SHA1=y |
1018 | CONFIG_CRYPTO_SHA256=y | 1194 | CONFIG_CRYPTO_SHA256=y |
1019 | CONFIG_CRYPTO_SHA512=y | 1195 | CONFIG_CRYPTO_SHA512=y |
1020 | CONFIG_CRYPTO_WP512=y | ||
1021 | CONFIG_CRYPTO_TGR192=y | 1196 | CONFIG_CRYPTO_TGR192=y |
1022 | CONFIG_CRYPTO_GF128MUL=y | 1197 | CONFIG_CRYPTO_WP512=y |
1023 | CONFIG_CRYPTO_ECB=y | 1198 | |
1024 | CONFIG_CRYPTO_CBC=y | 1199 | # |
1025 | CONFIG_CRYPTO_PCBC=y | 1200 | # Ciphers |
1026 | CONFIG_CRYPTO_LRW=y | 1201 | # |
1027 | CONFIG_CRYPTO_DES=y | ||
1028 | CONFIG_CRYPTO_FCRYPT=y | ||
1029 | CONFIG_CRYPTO_BLOWFISH=y | ||
1030 | CONFIG_CRYPTO_TWOFISH=y | ||
1031 | CONFIG_CRYPTO_TWOFISH_COMMON=y | ||
1032 | CONFIG_CRYPTO_SERPENT=y | ||
1033 | CONFIG_CRYPTO_AES=y | 1202 | CONFIG_CRYPTO_AES=y |
1203 | CONFIG_CRYPTO_ANUBIS=y | ||
1204 | CONFIG_CRYPTO_ARC4=y | ||
1205 | CONFIG_CRYPTO_BLOWFISH=y | ||
1206 | CONFIG_CRYPTO_CAMELLIA=y | ||
1034 | CONFIG_CRYPTO_CAST5=y | 1207 | CONFIG_CRYPTO_CAST5=y |
1035 | CONFIG_CRYPTO_CAST6=y | 1208 | CONFIG_CRYPTO_CAST6=y |
1036 | CONFIG_CRYPTO_TEA=y | 1209 | CONFIG_CRYPTO_DES=y |
1037 | CONFIG_CRYPTO_ARC4=y | 1210 | CONFIG_CRYPTO_FCRYPT=y |
1038 | CONFIG_CRYPTO_KHAZAD=y | 1211 | CONFIG_CRYPTO_KHAZAD=y |
1039 | CONFIG_CRYPTO_ANUBIS=y | 1212 | # CONFIG_CRYPTO_SALSA20 is not set |
1213 | # CONFIG_CRYPTO_SEED is not set | ||
1214 | CONFIG_CRYPTO_SERPENT=y | ||
1215 | CONFIG_CRYPTO_TEA=y | ||
1216 | CONFIG_CRYPTO_TWOFISH=y | ||
1217 | CONFIG_CRYPTO_TWOFISH_COMMON=y | ||
1218 | |||
1219 | # | ||
1220 | # Compression | ||
1221 | # | ||
1040 | CONFIG_CRYPTO_DEFLATE=y | 1222 | CONFIG_CRYPTO_DEFLATE=y |
1041 | CONFIG_CRYPTO_MICHAEL_MIC=y | 1223 | # CONFIG_CRYPTO_LZO is not set |
1042 | CONFIG_CRYPTO_CRC32C=y | ||
1043 | CONFIG_CRYPTO_CAMELLIA=y | ||
1044 | 1224 | ||
1045 | # | 1225 | # |
1046 | # Hardware crypto devices | 1226 | # Random Number Generation |
1047 | # | 1227 | # |
1228 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1229 | CONFIG_CRYPTO_HW=y | ||
1230 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1048 | 1231 | ||
1049 | # | 1232 | # |
1050 | # Library routines | 1233 | # Library routines |
@@ -1052,10 +1235,15 @@ CONFIG_CRYPTO_CAMELLIA=y | |||
1052 | CONFIG_BITREVERSE=y | 1235 | CONFIG_BITREVERSE=y |
1053 | # CONFIG_CRC_CCITT is not set | 1236 | # CONFIG_CRC_CCITT is not set |
1054 | CONFIG_CRC16=y | 1237 | CONFIG_CRC16=y |
1238 | CONFIG_CRC_T10DIF=y | ||
1239 | CONFIG_CRC_ITU_T=m | ||
1055 | CONFIG_CRC32=y | 1240 | CONFIG_CRC32=y |
1241 | # CONFIG_CRC7 is not set | ||
1056 | CONFIG_LIBCRC32C=y | 1242 | CONFIG_LIBCRC32C=y |
1243 | CONFIG_AUDIT_GENERIC=y | ||
1057 | CONFIG_ZLIB_INFLATE=y | 1244 | CONFIG_ZLIB_INFLATE=y |
1058 | CONFIG_ZLIB_DEFLATE=y | 1245 | CONFIG_ZLIB_DEFLATE=y |
1059 | CONFIG_PLIST=y | 1246 | CONFIG_PLIST=y |
1060 | CONFIG_HAS_IOMEM=y | 1247 | CONFIG_HAS_IOMEM=y |
1061 | CONFIG_HAS_IOPORT=y | 1248 | CONFIG_HAS_IOPORT=y |
1249 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h index 7a881755800f..6c8342ae74db 100644 --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h | |||
@@ -35,6 +35,16 @@ | |||
35 | mtc0 \reg, CP0_TCSTATUS | 35 | mtc0 \reg, CP0_TCSTATUS |
36 | _ehb | 36 | _ehb |
37 | .endm | 37 | .endm |
38 | #elif defined(CONFIG_CPU_MIPSR2) | ||
39 | .macro local_irq_enable reg=t0 | ||
40 | ei | ||
41 | irq_enable_hazard | ||
42 | .endm | ||
43 | |||
44 | .macro local_irq_disable reg=t0 | ||
45 | di | ||
46 | irq_disable_hazard | ||
47 | .endm | ||
38 | #else | 48 | #else |
39 | .macro local_irq_enable reg=t0 | 49 | .macro local_irq_enable reg=t0 |
40 | mfc0 \reg, CP0_STATUS | 50 | mfc0 \reg, CP0_STATUS |
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 5b98d0e731c2..e6708b3ad343 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c | |||
@@ -111,6 +111,7 @@ EXPORT_SYMBOL(dma_alloc_coherent); | |||
111 | void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, | 111 | void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, |
112 | dma_addr_t dma_handle) | 112 | dma_addr_t dma_handle) |
113 | { | 113 | { |
114 | plat_unmap_dma_mem(dma_handle); | ||
114 | free_pages((unsigned long) vaddr, get_order(size)); | 115 | free_pages((unsigned long) vaddr, get_order(size)); |
115 | } | 116 | } |
116 | 117 | ||
@@ -121,6 +122,8 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | |||
121 | { | 122 | { |
122 | unsigned long addr = (unsigned long) vaddr; | 123 | unsigned long addr = (unsigned long) vaddr; |
123 | 124 | ||
125 | plat_unmap_dma_mem(dma_handle); | ||
126 | |||
124 | if (!plat_device_is_coherent(dev)) | 127 | if (!plat_device_is_coherent(dev)) |
125 | addr = CAC_ADDR(addr); | 128 | addr = CAC_ADDR(addr); |
126 | 129 | ||
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 8fc6d72849ae..3d3daa674299 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile | |||
@@ -41,6 +41,7 @@ $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 | |||
41 | $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 | 41 | $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 |
42 | $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 | 42 | $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 |
43 | $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405 | 43 | $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405 |
44 | $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405 | ||
44 | $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 | 45 | $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 |
45 | $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 | 46 | $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 |
46 | 47 | ||
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index bdc8b0e860e5..d108715129e2 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -479,6 +479,8 @@ _GLOBAL(_tlbil_pid) | |||
479 | * (no broadcast) | 479 | * (no broadcast) |
480 | */ | 480 | */ |
481 | _GLOBAL(_tlbil_va) | 481 | _GLOBAL(_tlbil_va) |
482 | mfmsr r10 | ||
483 | wrteei 0 | ||
482 | slwi r4,r4,16 | 484 | slwi r4,r4,16 |
483 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ | 485 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ |
484 | tlbsx 0,r3 | 486 | tlbsx 0,r3 |
@@ -490,6 +492,7 @@ _GLOBAL(_tlbil_va) | |||
490 | tlbwe | 492 | tlbwe |
491 | msync | 493 | msync |
492 | isync | 494 | isync |
495 | wrtee r10 | ||
493 | blr | 496 | blr |
494 | #endif /* CONFIG_FSL_BOOKE */ | 497 | #endif /* CONFIG_FSL_BOOKE */ |
495 | 498 | ||
diff --git a/arch/x86/include/asm/vmi.h b/arch/x86/include/asm/vmi.h index b7c0dea119fe..61e08c0a2907 100644 --- a/arch/x86/include/asm/vmi.h +++ b/arch/x86/include/asm/vmi.h | |||
@@ -223,9 +223,15 @@ struct pci_header { | |||
223 | } __attribute__((packed)); | 223 | } __attribute__((packed)); |
224 | 224 | ||
225 | /* Function prototypes for bootstrapping */ | 225 | /* Function prototypes for bootstrapping */ |
226 | #ifdef CONFIG_VMI | ||
226 | extern void vmi_init(void); | 227 | extern void vmi_init(void); |
228 | extern void vmi_activate(void); | ||
227 | extern void vmi_bringup(void); | 229 | extern void vmi_bringup(void); |
228 | extern void vmi_apply_boot_page_allocations(void); | 230 | #else |
231 | static inline void vmi_init(void) {} | ||
232 | static inline void vmi_activate(void) {} | ||
233 | static inline void vmi_bringup(void) {} | ||
234 | #endif | ||
229 | 235 | ||
230 | /* State needed to start an application processor in an SMP system. */ | 236 | /* State needed to start an application processor in an SMP system. */ |
231 | struct vmi_ap_state { | 237 | struct vmi_ap_state { |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 9d5674f7b6cc..bdec76e55594 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -794,6 +794,9 @@ void __init setup_arch(char **cmdline_p) | |||
794 | printk(KERN_INFO "Command line: %s\n", boot_command_line); | 794 | printk(KERN_INFO "Command line: %s\n", boot_command_line); |
795 | #endif | 795 | #endif |
796 | 796 | ||
797 | /* VMI may relocate the fixmap; do this before touching ioremap area */ | ||
798 | vmi_init(); | ||
799 | |||
797 | early_cpu_init(); | 800 | early_cpu_init(); |
798 | early_ioremap_init(); | 801 | early_ioremap_init(); |
799 | 802 | ||
@@ -880,13 +883,8 @@ void __init setup_arch(char **cmdline_p) | |||
880 | check_efer(); | 883 | check_efer(); |
881 | #endif | 884 | #endif |
882 | 885 | ||
883 | #if defined(CONFIG_VMI) && defined(CONFIG_X86_32) | 886 | /* Must be before kernel pagetables are setup */ |
884 | /* | 887 | vmi_activate(); |
885 | * Must be before kernel pagetables are setup | ||
886 | * or fixmap area is touched. | ||
887 | */ | ||
888 | vmi_init(); | ||
889 | #endif | ||
890 | 888 | ||
891 | /* after early param, so could get panic from serial */ | 889 | /* after early param, so could get panic from serial */ |
892 | reserve_early_setup_data(); | 890 | reserve_early_setup_data(); |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 7b1093397319..f71f96fc9e62 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -294,9 +294,7 @@ static void __cpuinit start_secondary(void *unused) | |||
294 | * fragile that we want to limit the things done here to the | 294 | * fragile that we want to limit the things done here to the |
295 | * most necessary things. | 295 | * most necessary things. |
296 | */ | 296 | */ |
297 | #ifdef CONFIG_VMI | ||
298 | vmi_bringup(); | 297 | vmi_bringup(); |
299 | #endif | ||
300 | cpu_init(); | 298 | cpu_init(); |
301 | preempt_disable(); | 299 | preempt_disable(); |
302 | smp_callin(); | 300 | smp_callin(); |
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c index 8b6c393ab9fd..22fd6577156a 100644 --- a/arch/x86/kernel/vmi_32.c +++ b/arch/x86/kernel/vmi_32.c | |||
@@ -960,8 +960,6 @@ static inline int __init activate_vmi(void) | |||
960 | 960 | ||
961 | void __init vmi_init(void) | 961 | void __init vmi_init(void) |
962 | { | 962 | { |
963 | unsigned long flags; | ||
964 | |||
965 | if (!vmi_rom) | 963 | if (!vmi_rom) |
966 | probe_vmi_rom(); | 964 | probe_vmi_rom(); |
967 | else | 965 | else |
@@ -973,13 +971,21 @@ void __init vmi_init(void) | |||
973 | 971 | ||
974 | reserve_top_address(-vmi_rom->virtual_top); | 972 | reserve_top_address(-vmi_rom->virtual_top); |
975 | 973 | ||
976 | local_irq_save(flags); | ||
977 | activate_vmi(); | ||
978 | |||
979 | #ifdef CONFIG_X86_IO_APIC | 974 | #ifdef CONFIG_X86_IO_APIC |
980 | /* This is virtual hardware; timer routing is wired correctly */ | 975 | /* This is virtual hardware; timer routing is wired correctly */ |
981 | no_timer_check = 1; | 976 | no_timer_check = 1; |
982 | #endif | 977 | #endif |
978 | } | ||
979 | |||
980 | void vmi_activate(void) | ||
981 | { | ||
982 | unsigned long flags; | ||
983 | |||
984 | if (!vmi_rom) | ||
985 | return; | ||
986 | |||
987 | local_irq_save(flags); | ||
988 | activate_vmi(); | ||
983 | local_irq_restore(flags & X86_EFLAGS_IF); | 989 | local_irq_restore(flags & X86_EFLAGS_IF); |
984 | } | 990 | } |
985 | 991 | ||
diff --git a/drivers/acpi/toshiba_acpi.c b/drivers/acpi/toshiba_acpi.c index 25f531d892de..40e60fc2e596 100644 --- a/drivers/acpi/toshiba_acpi.c +++ b/drivers/acpi/toshiba_acpi.c | |||
@@ -824,32 +824,36 @@ static int __init toshiba_acpi_init(void) | |||
824 | toshiba_acpi_exit(); | 824 | toshiba_acpi_exit(); |
825 | return -ENOMEM; | 825 | return -ENOMEM; |
826 | } | 826 | } |
827 | } | ||
828 | 827 | ||
829 | /* Register input device for kill switch */ | 828 | /* Register input device for kill switch */ |
830 | toshiba_acpi.poll_dev = input_allocate_polled_device(); | 829 | toshiba_acpi.poll_dev = input_allocate_polled_device(); |
831 | if (!toshiba_acpi.poll_dev) { | 830 | if (!toshiba_acpi.poll_dev) { |
832 | printk(MY_ERR "unable to allocate kill-switch input device\n"); | 831 | printk(MY_ERR |
833 | toshiba_acpi_exit(); | 832 | "unable to allocate kill-switch input device\n"); |
834 | return -ENOMEM; | 833 | toshiba_acpi_exit(); |
835 | } | 834 | return -ENOMEM; |
836 | toshiba_acpi.poll_dev->private = &toshiba_acpi; | 835 | } |
837 | toshiba_acpi.poll_dev->poll = bt_poll_rfkill; | 836 | toshiba_acpi.poll_dev->private = &toshiba_acpi; |
838 | toshiba_acpi.poll_dev->poll_interval = 1000; /* msecs */ | 837 | toshiba_acpi.poll_dev->poll = bt_poll_rfkill; |
839 | 838 | toshiba_acpi.poll_dev->poll_interval = 1000; /* msecs */ | |
840 | toshiba_acpi.poll_dev->input->name = toshiba_acpi.rfk_name; | 839 | |
841 | toshiba_acpi.poll_dev->input->id.bustype = BUS_HOST; | 840 | toshiba_acpi.poll_dev->input->name = toshiba_acpi.rfk_name; |
842 | toshiba_acpi.poll_dev->input->id.vendor = 0x0930; /* Toshiba USB ID */ | 841 | toshiba_acpi.poll_dev->input->id.bustype = BUS_HOST; |
843 | set_bit(EV_SW, toshiba_acpi.poll_dev->input->evbit); | 842 | /* Toshiba USB ID */ |
844 | set_bit(SW_RFKILL_ALL, toshiba_acpi.poll_dev->input->swbit); | 843 | toshiba_acpi.poll_dev->input->id.vendor = 0x0930; |
845 | input_report_switch(toshiba_acpi.poll_dev->input, SW_RFKILL_ALL, TRUE); | 844 | set_bit(EV_SW, toshiba_acpi.poll_dev->input->evbit); |
846 | input_sync(toshiba_acpi.poll_dev->input); | 845 | set_bit(SW_RFKILL_ALL, toshiba_acpi.poll_dev->input->swbit); |
847 | 846 | input_report_switch(toshiba_acpi.poll_dev->input, | |
848 | ret = input_register_polled_device(toshiba_acpi.poll_dev); | 847 | SW_RFKILL_ALL, TRUE); |
849 | if (ret) { | 848 | input_sync(toshiba_acpi.poll_dev->input); |
850 | printk(MY_ERR "unable to register kill-switch input device\n"); | 849 | |
851 | toshiba_acpi_exit(); | 850 | ret = input_register_polled_device(toshiba_acpi.poll_dev); |
852 | return ret; | 851 | if (ret) { |
852 | printk(MY_ERR | ||
853 | "unable to register kill-switch input device\n"); | ||
854 | toshiba_acpi_exit(); | ||
855 | return ret; | ||
856 | } | ||
853 | } | 857 | } |
854 | 858 | ||
855 | return 0; | 859 | return 0; |
diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c index d16b02423d61..7d2e91cccb13 100644 --- a/drivers/cdrom/cdrom.c +++ b/drivers/cdrom/cdrom.c | |||
@@ -2081,10 +2081,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, | |||
2081 | if (!q) | 2081 | if (!q) |
2082 | return -ENXIO; | 2082 | return -ENXIO; |
2083 | 2083 | ||
2084 | rq = blk_get_request(q, READ, GFP_KERNEL); | ||
2085 | if (!rq) | ||
2086 | return -ENOMEM; | ||
2087 | |||
2088 | cdi->last_sense = 0; | 2084 | cdi->last_sense = 0; |
2089 | 2085 | ||
2090 | while (nframes) { | 2086 | while (nframes) { |
@@ -2096,9 +2092,17 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, | |||
2096 | 2092 | ||
2097 | len = nr * CD_FRAMESIZE_RAW; | 2093 | len = nr * CD_FRAMESIZE_RAW; |
2098 | 2094 | ||
2095 | rq = blk_get_request(q, READ, GFP_KERNEL); | ||
2096 | if (!rq) { | ||
2097 | ret = -ENOMEM; | ||
2098 | break; | ||
2099 | } | ||
2100 | |||
2099 | ret = blk_rq_map_user(q, rq, NULL, ubuf, len, GFP_KERNEL); | 2101 | ret = blk_rq_map_user(q, rq, NULL, ubuf, len, GFP_KERNEL); |
2100 | if (ret) | 2102 | if (ret) { |
2103 | blk_put_request(rq); | ||
2101 | break; | 2104 | break; |
2105 | } | ||
2102 | 2106 | ||
2103 | rq->cmd[0] = GPCMD_READ_CD; | 2107 | rq->cmd[0] = GPCMD_READ_CD; |
2104 | rq->cmd[1] = 1 << 2; | 2108 | rq->cmd[1] = 1 << 2; |
@@ -2124,6 +2128,7 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, | |||
2124 | 2128 | ||
2125 | if (blk_rq_unmap_user(bio)) | 2129 | if (blk_rq_unmap_user(bio)) |
2126 | ret = -EFAULT; | 2130 | ret = -EFAULT; |
2131 | blk_put_request(rq); | ||
2127 | 2132 | ||
2128 | if (ret) | 2133 | if (ret) |
2129 | break; | 2134 | break; |
@@ -2133,7 +2138,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, | |||
2133 | ubuf += len; | 2138 | ubuf += len; |
2134 | } | 2139 | } |
2135 | 2140 | ||
2136 | blk_put_request(rq); | ||
2137 | return ret; | 2141 | return ret; |
2138 | } | 2142 | } |
2139 | 2143 | ||
diff --git a/drivers/char/cp437.uni b/drivers/char/cp437.uni index 1f06889a96b9..bc6163484f62 100644 --- a/drivers/char/cp437.uni +++ b/drivers/char/cp437.uni | |||
@@ -27,7 +27,7 @@ | |||
27 | 0x0c U+2640 | 27 | 0x0c U+2640 |
28 | 0x0d U+266a | 28 | 0x0d U+266a |
29 | 0x0e U+266b | 29 | 0x0e U+266b |
30 | 0x0f U+263c | 30 | 0x0f U+263c U+00a4 |
31 | 0x10 U+25b6 U+25ba | 31 | 0x10 U+25b6 U+25ba |
32 | 0x11 U+25c0 U+25c4 | 32 | 0x11 U+25c0 U+25c4 |
33 | 0x12 U+2195 | 33 | 0x12 U+2195 |
@@ -55,7 +55,7 @@ | |||
55 | 0x24 U+0024 | 55 | 0x24 U+0024 |
56 | 0x25 U+0025 | 56 | 0x25 U+0025 |
57 | 0x26 U+0026 | 57 | 0x26 U+0026 |
58 | 0x27 U+0027 | 58 | 0x27 U+0027 U+00b4 |
59 | 0x28 U+0028 | 59 | 0x28 U+0028 |
60 | 0x29 U+0029 | 60 | 0x29 U+0029 |
61 | 0x2a U+002a | 61 | 0x2a U+002a |
@@ -84,7 +84,7 @@ | |||
84 | 0x41 U+0041 U+00c0 U+00c1 U+00c2 U+00c3 | 84 | 0x41 U+0041 U+00c0 U+00c1 U+00c2 U+00c3 |
85 | 0x42 U+0042 | 85 | 0x42 U+0042 |
86 | 0x43 U+0043 U+00a9 | 86 | 0x43 U+0043 U+00a9 |
87 | 0x44 U+0044 | 87 | 0x44 U+0044 U+00d0 |
88 | 0x45 U+0045 U+00c8 U+00ca U+00cb | 88 | 0x45 U+0045 U+00c8 U+00ca U+00cb |
89 | 0x46 U+0046 | 89 | 0x46 U+0046 |
90 | 0x47 U+0047 | 90 | 0x47 U+0047 |
@@ -140,7 +140,7 @@ | |||
140 | 0x79 U+0079 U+00fd | 140 | 0x79 U+0079 U+00fd |
141 | 0x7a U+007a | 141 | 0x7a U+007a |
142 | 0x7b U+007b | 142 | 0x7b U+007b |
143 | 0x7c U+007c U+00a5 | 143 | 0x7c U+007c U+00a6 |
144 | 0x7d U+007d | 144 | 0x7d U+007d |
145 | 0x7e U+007e | 145 | 0x7e U+007e |
146 | # | 146 | # |
@@ -263,10 +263,10 @@ | |||
263 | 0xe8 U+03a6 U+00d8 | 263 | 0xe8 U+03a6 U+00d8 |
264 | 0xe9 U+0398 | 264 | 0xe9 U+0398 |
265 | 0xea U+03a9 U+2126 | 265 | 0xea U+03a9 U+2126 |
266 | 0xeb U+03b4 | 266 | 0xeb U+03b4 U+00f0 |
267 | 0xec U+221e | 267 | 0xec U+221e |
268 | 0xed U+03c6 U+00f8 | 268 | 0xed U+03c6 U+00f8 |
269 | 0xee U+03b5 | 269 | 0xee U+03b5 U+2208 |
270 | 0xef U+2229 | 270 | 0xef U+2229 |
271 | 0xf0 U+2261 | 271 | 0xf0 U+2261 |
272 | 0xf1 U+00b1 | 272 | 0xf1 U+00b1 |
diff --git a/drivers/char/vt.c b/drivers/char/vt.c index a5af6072e2b3..008176edbd64 100644 --- a/drivers/char/vt.c +++ b/drivers/char/vt.c | |||
@@ -2274,7 +2274,7 @@ rescan_last_byte: | |||
2274 | continue; /* nothing to display */ | 2274 | continue; /* nothing to display */ |
2275 | } | 2275 | } |
2276 | /* Glyph not found */ | 2276 | /* Glyph not found */ |
2277 | if ((!(vc->vc_utf && !vc->vc_disp_ctrl) || c < 128) && !(c & ~charmask)) { | 2277 | if ((!(vc->vc_utf && !vc->vc_disp_ctrl) && c < 128) && !(c & ~charmask)) { |
2278 | /* In legacy mode use the glyph we get by a 1:1 mapping. | 2278 | /* In legacy mode use the glyph we get by a 1:1 mapping. |
2279 | This would make absolutely no sense with Unicode in mind, | 2279 | This would make absolutely no sense with Unicode in mind, |
2280 | but do this for ASCII characters since a font may lack | 2280 | but do this for ASCII characters since a font may lack |
diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c index f4d22ae9d294..e5a8dae4a289 100644 --- a/drivers/i2c/busses/i2c-highlander.c +++ b/drivers/i2c/busses/i2c-highlander.c | |||
@@ -92,7 +92,7 @@ static void highlander_i2c_setup(struct highlander_i2c_dev *dev) | |||
92 | static void smbus_write_data(u8 *src, u16 *dst, int len) | 92 | static void smbus_write_data(u8 *src, u16 *dst, int len) |
93 | { | 93 | { |
94 | for (; len > 1; len -= 2) { | 94 | for (; len > 1; len -= 2) { |
95 | *dst++ = be16_to_cpup((u16 *)src); | 95 | *dst++ = be16_to_cpup((__be16 *)src); |
96 | src += 2; | 96 | src += 2; |
97 | } | 97 | } |
98 | 98 | ||
@@ -103,7 +103,7 @@ static void smbus_write_data(u8 *src, u16 *dst, int len) | |||
103 | static void smbus_read_data(u16 *src, u8 *dst, int len) | 103 | static void smbus_read_data(u16 *src, u8 *dst, int len) |
104 | { | 104 | { |
105 | for (; len > 1; len -= 2) { | 105 | for (; len > 1; len -= 2) { |
106 | *(u16 *)dst = cpu_to_be16p(src++); | 106 | *(__be16 *)dst = cpu_to_be16p(src++); |
107 | dst += 2; | 107 | dst += 2; |
108 | } | 108 | } |
109 | 109 | ||
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c index dcf2045b5222..0bdb2d7f0570 100644 --- a/drivers/i2c/busses/i2c-pmcmsp.c +++ b/drivers/i2c/busses/i2c-pmcmsp.c | |||
@@ -486,7 +486,7 @@ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd( | |||
486 | 486 | ||
487 | if (cmd->type == MSP_TWI_CMD_WRITE || | 487 | if (cmd->type == MSP_TWI_CMD_WRITE || |
488 | cmd->type == MSP_TWI_CMD_WRITE_READ) { | 488 | cmd->type == MSP_TWI_CMD_WRITE_READ) { |
489 | __be64 tmp = cpu_to_be64p((u64 *)cmd->write_data); | 489 | u64 tmp = be64_to_cpup((__be64 *)cmd->write_data); |
490 | tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8; | 490 | tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8; |
491 | dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp); | 491 | dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp); |
492 | pmcmsptwi_writel(tmp & 0x00000000ffffffffLL, | 492 | pmcmsptwi_writel(tmp & 0x00000000ffffffffLL, |
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index 523b9716a543..d115a6d30f29 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -1893,12 +1893,17 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
1893 | ctrl |= E1000_CTRL_PHY_RST; | 1893 | ctrl |= E1000_CTRL_PHY_RST; |
1894 | } | 1894 | } |
1895 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 1895 | ret_val = e1000_acquire_swflag_ich8lan(hw); |
1896 | /* Whether or not the swflag was acquired, we need to reset the part */ | ||
1896 | hw_dbg(hw, "Issuing a global reset to ich8lan"); | 1897 | hw_dbg(hw, "Issuing a global reset to ich8lan"); |
1897 | ew32(CTRL, (ctrl | E1000_CTRL_RST)); | 1898 | ew32(CTRL, (ctrl | E1000_CTRL_RST)); |
1898 | msleep(20); | 1899 | msleep(20); |
1899 | 1900 | ||
1900 | /* release the swflag because it is not reset by hardware reset */ | 1901 | if (!ret_val) { |
1901 | e1000_release_swflag_ich8lan(hw); | 1902 | /* release the swflag because it is not reset by |
1903 | * hardware reset | ||
1904 | */ | ||
1905 | e1000_release_swflag_ich8lan(hw); | ||
1906 | } | ||
1902 | 1907 | ||
1903 | ret_val = e1000e_get_auto_rd_done(hw); | 1908 | ret_val = e1000e_get_auto_rd_done(hw); |
1904 | if (ret_val) { | 1909 | if (ret_val) { |
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c index 1349e419673c..fed7eba65ead 100644 --- a/drivers/net/sungem.c +++ b/drivers/net/sungem.c | |||
@@ -1142,6 +1142,70 @@ static int gem_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1142 | return NETDEV_TX_OK; | 1142 | return NETDEV_TX_OK; |
1143 | } | 1143 | } |
1144 | 1144 | ||
1145 | static void gem_pcs_reset(struct gem *gp) | ||
1146 | { | ||
1147 | int limit; | ||
1148 | u32 val; | ||
1149 | |||
1150 | /* Reset PCS unit. */ | ||
1151 | val = readl(gp->regs + PCS_MIICTRL); | ||
1152 | val |= PCS_MIICTRL_RST; | ||
1153 | writel(val, gp->regs + PCS_MIICTRL); | ||
1154 | |||
1155 | limit = 32; | ||
1156 | while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) { | ||
1157 | udelay(100); | ||
1158 | if (limit-- <= 0) | ||
1159 | break; | ||
1160 | } | ||
1161 | if (limit <= 0) | ||
1162 | printk(KERN_WARNING "%s: PCS reset bit would not clear.\n", | ||
1163 | gp->dev->name); | ||
1164 | } | ||
1165 | |||
1166 | static void gem_pcs_reinit_adv(struct gem *gp) | ||
1167 | { | ||
1168 | u32 val; | ||
1169 | |||
1170 | /* Make sure PCS is disabled while changing advertisement | ||
1171 | * configuration. | ||
1172 | */ | ||
1173 | val = readl(gp->regs + PCS_CFG); | ||
1174 | val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO); | ||
1175 | writel(val, gp->regs + PCS_CFG); | ||
1176 | |||
1177 | /* Advertise all capabilities except assymetric | ||
1178 | * pause. | ||
1179 | */ | ||
1180 | val = readl(gp->regs + PCS_MIIADV); | ||
1181 | val |= (PCS_MIIADV_FD | PCS_MIIADV_HD | | ||
1182 | PCS_MIIADV_SP | PCS_MIIADV_AP); | ||
1183 | writel(val, gp->regs + PCS_MIIADV); | ||
1184 | |||
1185 | /* Enable and restart auto-negotiation, disable wrapback/loopback, | ||
1186 | * and re-enable PCS. | ||
1187 | */ | ||
1188 | val = readl(gp->regs + PCS_MIICTRL); | ||
1189 | val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE); | ||
1190 | val &= ~PCS_MIICTRL_WB; | ||
1191 | writel(val, gp->regs + PCS_MIICTRL); | ||
1192 | |||
1193 | val = readl(gp->regs + PCS_CFG); | ||
1194 | val |= PCS_CFG_ENABLE; | ||
1195 | writel(val, gp->regs + PCS_CFG); | ||
1196 | |||
1197 | /* Make sure serialink loopback is off. The meaning | ||
1198 | * of this bit is logically inverted based upon whether | ||
1199 | * you are in Serialink or SERDES mode. | ||
1200 | */ | ||
1201 | val = readl(gp->regs + PCS_SCTRL); | ||
1202 | if (gp->phy_type == phy_serialink) | ||
1203 | val &= ~PCS_SCTRL_LOOP; | ||
1204 | else | ||
1205 | val |= PCS_SCTRL_LOOP; | ||
1206 | writel(val, gp->regs + PCS_SCTRL); | ||
1207 | } | ||
1208 | |||
1145 | #define STOP_TRIES 32 | 1209 | #define STOP_TRIES 32 |
1146 | 1210 | ||
1147 | /* Must be invoked under gp->lock and gp->tx_lock. */ | 1211 | /* Must be invoked under gp->lock and gp->tx_lock. */ |
@@ -1168,6 +1232,9 @@ static void gem_reset(struct gem *gp) | |||
1168 | 1232 | ||
1169 | if (limit <= 0) | 1233 | if (limit <= 0) |
1170 | printk(KERN_ERR "%s: SW reset is ghetto.\n", gp->dev->name); | 1234 | printk(KERN_ERR "%s: SW reset is ghetto.\n", gp->dev->name); |
1235 | |||
1236 | if (gp->phy_type == phy_serialink || gp->phy_type == phy_serdes) | ||
1237 | gem_pcs_reinit_adv(gp); | ||
1171 | } | 1238 | } |
1172 | 1239 | ||
1173 | /* Must be invoked under gp->lock and gp->tx_lock. */ | 1240 | /* Must be invoked under gp->lock and gp->tx_lock. */ |
@@ -1324,7 +1391,7 @@ static int gem_set_link_modes(struct gem *gp) | |||
1324 | gp->phy_type == phy_serdes) { | 1391 | gp->phy_type == phy_serdes) { |
1325 | u32 pcs_lpa = readl(gp->regs + PCS_MIILP); | 1392 | u32 pcs_lpa = readl(gp->regs + PCS_MIILP); |
1326 | 1393 | ||
1327 | if (pcs_lpa & PCS_MIIADV_FD) | 1394 | if ((pcs_lpa & PCS_MIIADV_FD) || gp->phy_type == phy_serdes) |
1328 | full_duplex = 1; | 1395 | full_duplex = 1; |
1329 | speed = SPEED_1000; | 1396 | speed = SPEED_1000; |
1330 | } | 1397 | } |
@@ -1488,6 +1555,9 @@ static void gem_link_timer(unsigned long data) | |||
1488 | val = readl(gp->regs + PCS_MIISTAT); | 1555 | val = readl(gp->regs + PCS_MIISTAT); |
1489 | 1556 | ||
1490 | if ((val & PCS_MIISTAT_LS) != 0) { | 1557 | if ((val & PCS_MIISTAT_LS) != 0) { |
1558 | if (gp->lstate == link_up) | ||
1559 | goto restart; | ||
1560 | |||
1491 | gp->lstate = link_up; | 1561 | gp->lstate = link_up; |
1492 | netif_carrier_on(gp->dev); | 1562 | netif_carrier_on(gp->dev); |
1493 | (void)gem_set_link_modes(gp); | 1563 | (void)gem_set_link_modes(gp); |
@@ -1708,61 +1778,8 @@ static void gem_init_phy(struct gem *gp) | |||
1708 | if (gp->phy_mii.def && gp->phy_mii.def->ops->init) | 1778 | if (gp->phy_mii.def && gp->phy_mii.def->ops->init) |
1709 | gp->phy_mii.def->ops->init(&gp->phy_mii); | 1779 | gp->phy_mii.def->ops->init(&gp->phy_mii); |
1710 | } else { | 1780 | } else { |
1711 | u32 val; | 1781 | gem_pcs_reset(gp); |
1712 | int limit; | 1782 | gem_pcs_reinit_adv(gp); |
1713 | |||
1714 | /* Reset PCS unit. */ | ||
1715 | val = readl(gp->regs + PCS_MIICTRL); | ||
1716 | val |= PCS_MIICTRL_RST; | ||
1717 | writel(val, gp->regs + PCS_MIICTRL); | ||
1718 | |||
1719 | limit = 32; | ||
1720 | while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) { | ||
1721 | udelay(100); | ||
1722 | if (limit-- <= 0) | ||
1723 | break; | ||
1724 | } | ||
1725 | if (limit <= 0) | ||
1726 | printk(KERN_WARNING "%s: PCS reset bit would not clear.\n", | ||
1727 | gp->dev->name); | ||
1728 | |||
1729 | /* Make sure PCS is disabled while changing advertisement | ||
1730 | * configuration. | ||
1731 | */ | ||
1732 | val = readl(gp->regs + PCS_CFG); | ||
1733 | val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO); | ||
1734 | writel(val, gp->regs + PCS_CFG); | ||
1735 | |||
1736 | /* Advertise all capabilities except assymetric | ||
1737 | * pause. | ||
1738 | */ | ||
1739 | val = readl(gp->regs + PCS_MIIADV); | ||
1740 | val |= (PCS_MIIADV_FD | PCS_MIIADV_HD | | ||
1741 | PCS_MIIADV_SP | PCS_MIIADV_AP); | ||
1742 | writel(val, gp->regs + PCS_MIIADV); | ||
1743 | |||
1744 | /* Enable and restart auto-negotiation, disable wrapback/loopback, | ||
1745 | * and re-enable PCS. | ||
1746 | */ | ||
1747 | val = readl(gp->regs + PCS_MIICTRL); | ||
1748 | val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE); | ||
1749 | val &= ~PCS_MIICTRL_WB; | ||
1750 | writel(val, gp->regs + PCS_MIICTRL); | ||
1751 | |||
1752 | val = readl(gp->regs + PCS_CFG); | ||
1753 | val |= PCS_CFG_ENABLE; | ||
1754 | writel(val, gp->regs + PCS_CFG); | ||
1755 | |||
1756 | /* Make sure serialink loopback is off. The meaning | ||
1757 | * of this bit is logically inverted based upon whether | ||
1758 | * you are in Serialink or SERDES mode. | ||
1759 | */ | ||
1760 | val = readl(gp->regs + PCS_SCTRL); | ||
1761 | if (gp->phy_type == phy_serialink) | ||
1762 | val &= ~PCS_SCTRL_LOOP; | ||
1763 | else | ||
1764 | val |= PCS_SCTRL_LOOP; | ||
1765 | writel(val, gp->regs + PCS_SCTRL); | ||
1766 | } | 1783 | } |
1767 | 1784 | ||
1768 | /* Default aneg parameters */ | 1785 | /* Default aneg parameters */ |
@@ -2680,6 +2697,21 @@ static int gem_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
2680 | cmd->speed = 0; | 2697 | cmd->speed = 0; |
2681 | cmd->duplex = cmd->port = cmd->phy_address = | 2698 | cmd->duplex = cmd->port = cmd->phy_address = |
2682 | cmd->transceiver = cmd->autoneg = 0; | 2699 | cmd->transceiver = cmd->autoneg = 0; |
2700 | |||
2701 | /* serdes means usually a Fibre connector, with most fixed */ | ||
2702 | if (gp->phy_type == phy_serdes) { | ||
2703 | cmd->port = PORT_FIBRE; | ||
2704 | cmd->supported = (SUPPORTED_1000baseT_Half | | ||
2705 | SUPPORTED_1000baseT_Full | | ||
2706 | SUPPORTED_FIBRE | SUPPORTED_Autoneg | | ||
2707 | SUPPORTED_Pause | SUPPORTED_Asym_Pause); | ||
2708 | cmd->advertising = cmd->supported; | ||
2709 | cmd->transceiver = XCVR_INTERNAL; | ||
2710 | if (gp->lstate == link_up) | ||
2711 | cmd->speed = SPEED_1000; | ||
2712 | cmd->duplex = DUPLEX_FULL; | ||
2713 | cmd->autoneg = 1; | ||
2714 | } | ||
2683 | } | 2715 | } |
2684 | cmd->maxtxpkt = cmd->maxrxpkt = 0; | 2716 | cmd->maxtxpkt = cmd->maxrxpkt = 0; |
2685 | 2717 | ||
diff --git a/drivers/pcmcia/bfin_cf_pcmcia.c b/drivers/pcmcia/bfin_cf_pcmcia.c index bb7338863fb9..b59d4115d20f 100644 --- a/drivers/pcmcia/bfin_cf_pcmcia.c +++ b/drivers/pcmcia/bfin_cf_pcmcia.c | |||
@@ -334,6 +334,6 @@ static void __exit bfin_cf_exit(void) | |||
334 | module_init(bfin_cf_init); | 334 | module_init(bfin_cf_init); |
335 | module_exit(bfin_cf_exit); | 335 | module_exit(bfin_cf_exit); |
336 | 336 | ||
337 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>") | 337 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
338 | MODULE_DESCRIPTION("BFIN CF/PCMCIA Driver"); | 338 | MODULE_DESCRIPTION("BFIN CF/PCMCIA Driver"); |
339 | MODULE_LICENSE("GPL"); | 339 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/scsi/device_handler/scsi_dh_hp_sw.c b/drivers/scsi/device_handler/scsi_dh_hp_sw.c index 9aec4ca64e56..f7da7530875e 100644 --- a/drivers/scsi/device_handler/scsi_dh_hp_sw.c +++ b/drivers/scsi/device_handler/scsi_dh_hp_sw.c | |||
@@ -107,6 +107,7 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) | |||
107 | struct request *req; | 107 | struct request *req; |
108 | int ret; | 108 | int ret; |
109 | 109 | ||
110 | retry: | ||
110 | req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); | 111 | req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); |
111 | if (!req) | 112 | if (!req) |
112 | return SCSI_DH_RES_TEMP_UNAVAIL; | 113 | return SCSI_DH_RES_TEMP_UNAVAIL; |
@@ -121,7 +122,6 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) | |||
121 | memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE); | 122 | memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE); |
122 | req->sense_len = 0; | 123 | req->sense_len = 0; |
123 | 124 | ||
124 | retry: | ||
125 | ret = blk_execute_rq(req->q, NULL, req, 1); | 125 | ret = blk_execute_rq(req->q, NULL, req, 1); |
126 | if (ret == -EIO) { | 126 | if (ret == -EIO) { |
127 | if (req->sense_len > 0) { | 127 | if (req->sense_len > 0) { |
@@ -136,8 +136,10 @@ retry: | |||
136 | h->path_state = HP_SW_PATH_ACTIVE; | 136 | h->path_state = HP_SW_PATH_ACTIVE; |
137 | ret = SCSI_DH_OK; | 137 | ret = SCSI_DH_OK; |
138 | } | 138 | } |
139 | if (ret == SCSI_DH_IMM_RETRY) | 139 | if (ret == SCSI_DH_IMM_RETRY) { |
140 | blk_put_request(req); | ||
140 | goto retry; | 141 | goto retry; |
142 | } | ||
141 | if (ret == SCSI_DH_DEV_OFFLINED) { | 143 | if (ret == SCSI_DH_DEV_OFFLINED) { |
142 | h->path_state = HP_SW_PATH_PASSIVE; | 144 | h->path_state = HP_SW_PATH_PASSIVE; |
143 | ret = SCSI_DH_OK; | 145 | ret = SCSI_DH_OK; |
@@ -200,6 +202,7 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) | |||
200 | struct request *req; | 202 | struct request *req; |
201 | int ret, retry; | 203 | int ret, retry; |
202 | 204 | ||
205 | retry: | ||
203 | req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); | 206 | req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); |
204 | if (!req) | 207 | if (!req) |
205 | return SCSI_DH_RES_TEMP_UNAVAIL; | 208 | return SCSI_DH_RES_TEMP_UNAVAIL; |
@@ -216,7 +219,6 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) | |||
216 | req->sense_len = 0; | 219 | req->sense_len = 0; |
217 | retry = h->retries; | 220 | retry = h->retries; |
218 | 221 | ||
219 | retry: | ||
220 | ret = blk_execute_rq(req->q, NULL, req, 1); | 222 | ret = blk_execute_rq(req->q, NULL, req, 1); |
221 | if (ret == -EIO) { | 223 | if (ret == -EIO) { |
222 | if (req->sense_len > 0) { | 224 | if (req->sense_len > 0) { |
@@ -231,8 +233,10 @@ retry: | |||
231 | ret = SCSI_DH_OK; | 233 | ret = SCSI_DH_OK; |
232 | 234 | ||
233 | if (ret == SCSI_DH_RETRY) { | 235 | if (ret == SCSI_DH_RETRY) { |
234 | if (--retry) | 236 | if (--retry) { |
237 | blk_put_request(req); | ||
235 | goto retry; | 238 | goto retry; |
239 | } | ||
236 | ret = SCSI_DH_IO; | 240 | ret = SCSI_DH_IO; |
237 | } | 241 | } |
238 | 242 | ||
diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/aty/radeon_accel.c index 8da5e5ab8547..a469a3d6edcb 100644 --- a/drivers/video/aty/radeon_accel.c +++ b/drivers/video/aty/radeon_accel.c | |||
@@ -5,61 +5,61 @@ | |||
5 | * --dte | 5 | * --dte |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #define FLUSH_CACHE_WORKAROUND 1 | 8 | static void radeon_fixup_offset(struct radeonfb_info *rinfo) |
9 | |||
10 | void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries) | ||
11 | { | 9 | { |
12 | int i; | 10 | u32 local_base; |
11 | |||
12 | /* *** Ugly workaround *** */ | ||
13 | /* | ||
14 | * On some platforms, the video memory is mapped at 0 in radeon chip space | ||
15 | * (like PPCs) by the firmware. X will always move it up so that it's seen | ||
16 | * by the chip to be at the same address as the PCI BAR. | ||
17 | * That means that when switching back from X, there is a mismatch between | ||
18 | * the offsets programmed into the engine. This means that potentially, | ||
19 | * accel operations done before radeonfb has a chance to re-init the engine | ||
20 | * will have incorrect offsets, and potentially trash system memory ! | ||
21 | * | ||
22 | * The correct fix is for fbcon to never call any accel op before the engine | ||
23 | * has properly been re-initialized (by a call to set_var), but this is a | ||
24 | * complex fix. This workaround in the meantime, called before every accel | ||
25 | * operation, makes sure the offsets are in sync. | ||
26 | */ | ||
13 | 27 | ||
14 | for (i=0; i<2000000; i++) { | 28 | radeon_fifo_wait (1); |
15 | rinfo->fifo_free = INREG(RBBM_STATUS) & 0x7f; | 29 | local_base = INREG(MC_FB_LOCATION) << 16; |
16 | if (rinfo->fifo_free >= entries) | 30 | if (local_base == rinfo->fb_local_base) |
17 | return; | 31 | return; |
18 | udelay(10); | ||
19 | } | ||
20 | printk(KERN_ERR "radeonfb: FIFO Timeout !\n"); | ||
21 | /* XXX Todo: attempt to reset the engine */ | ||
22 | } | ||
23 | 32 | ||
24 | static inline void radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) | 33 | rinfo->fb_local_base = local_base; |
25 | { | ||
26 | if (entries <= rinfo->fifo_free) | ||
27 | rinfo->fifo_free -= entries; | ||
28 | else | ||
29 | radeon_fifo_update_and_wait(rinfo, entries); | ||
30 | } | ||
31 | 34 | ||
32 | static inline void radeonfb_set_creg(struct radeonfb_info *rinfo, u32 reg, | 35 | radeon_fifo_wait (3); |
33 | u32 *cache, u32 new_val) | 36 | OUTREG(DEFAULT_PITCH_OFFSET, (rinfo->pitch << 0x16) | |
34 | { | 37 | (rinfo->fb_local_base >> 10)); |
35 | if (new_val == *cache) | 38 | OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); |
36 | return; | 39 | OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); |
37 | *cache = new_val; | ||
38 | radeon_fifo_wait(rinfo, 1); | ||
39 | OUTREG(reg, new_val); | ||
40 | } | 40 | } |
41 | 41 | ||
42 | static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, | 42 | static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, |
43 | const struct fb_fillrect *region) | 43 | const struct fb_fillrect *region) |
44 | { | 44 | { |
45 | radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, | 45 | radeon_fifo_wait(4); |
46 | rinfo->dp_gui_mc_base | GMC_BRUSH_SOLID_COLOR | ROP3_P); | 46 | |
47 | radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, | 47 | OUTREG(DP_GUI_MASTER_CNTL, |
48 | DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); | 48 | rinfo->dp_gui_master_cntl /* contains, like GMC_DST_32BPP */ |
49 | radeonfb_set_creg(rinfo, DP_BRUSH_FRGD_CLR, &rinfo->dp_brush_fg_cache, | 49 | | GMC_BRUSH_SOLID_COLOR |
50 | region->color); | 50 | | ROP3_P); |
51 | 51 | if (radeon_get_dstbpp(rinfo->depth) != DST_8BPP) | |
52 | /* Ensure the dst cache is flushed and the engine idle before | 52 | OUTREG(DP_BRUSH_FRGD_CLR, rinfo->pseudo_palette[region->color]); |
53 | * issuing the operation. | 53 | else |
54 | * | 54 | OUTREG(DP_BRUSH_FRGD_CLR, region->color); |
55 | * This works around engine lockups on some cards | 55 | OUTREG(DP_WRITE_MSK, 0xffffffff); |
56 | */ | 56 | OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); |
57 | #if FLUSH_CACHE_WORKAROUND | 57 | |
58 | radeon_fifo_wait(rinfo, 2); | 58 | radeon_fifo_wait(2); |
59 | OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); | 59 | OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); |
60 | OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); | 60 | OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); |
61 | #endif | 61 | |
62 | radeon_fifo_wait(rinfo, 2); | 62 | radeon_fifo_wait(2); |
63 | OUTREG(DST_Y_X, (region->dy << 16) | region->dx); | 63 | OUTREG(DST_Y_X, (region->dy << 16) | region->dx); |
64 | OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height); | 64 | OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height); |
65 | } | 65 | } |
@@ -70,14 +70,15 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) | |||
70 | struct fb_fillrect modded; | 70 | struct fb_fillrect modded; |
71 | int vxres, vyres; | 71 | int vxres, vyres; |
72 | 72 | ||
73 | WARN_ON(rinfo->gfx_mode); | 73 | if (info->state != FBINFO_STATE_RUNNING) |
74 | if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) | ||
75 | return; | 74 | return; |
76 | if (info->flags & FBINFO_HWACCEL_DISABLED) { | 75 | if (info->flags & FBINFO_HWACCEL_DISABLED) { |
77 | cfb_fillrect(info, region); | 76 | cfb_fillrect(info, region); |
78 | return; | 77 | return; |
79 | } | 78 | } |
80 | 79 | ||
80 | radeon_fixup_offset(rinfo); | ||
81 | |||
81 | vxres = info->var.xres_virtual; | 82 | vxres = info->var.xres_virtual; |
82 | vyres = info->var.yres_virtual; | 83 | vyres = info->var.yres_virtual; |
83 | 84 | ||
@@ -90,10 +91,6 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) | |||
90 | if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx; | 91 | if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx; |
91 | if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy; | 92 | if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy; |
92 | 93 | ||
93 | if (info->fix.visual == FB_VISUAL_TRUECOLOR || | ||
94 | info->fix.visual == FB_VISUAL_DIRECTCOLOR ) | ||
95 | modded.color = ((u32 *) (info->pseudo_palette))[region->color]; | ||
96 | |||
97 | radeonfb_prim_fillrect(rinfo, &modded); | 94 | radeonfb_prim_fillrect(rinfo, &modded); |
98 | } | 95 | } |
99 | 96 | ||
@@ -112,22 +109,22 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo, | |||
112 | if ( xdir < 0 ) { sx += w-1; dx += w-1; } | 109 | if ( xdir < 0 ) { sx += w-1; dx += w-1; } |
113 | if ( ydir < 0 ) { sy += h-1; dy += h-1; } | 110 | if ( ydir < 0 ) { sy += h-1; dy += h-1; } |
114 | 111 | ||
115 | radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, | 112 | radeon_fifo_wait(3); |
116 | rinfo->dp_gui_mc_base | | 113 | OUTREG(DP_GUI_MASTER_CNTL, |
117 | GMC_BRUSH_NONE | | 114 | rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */ |
118 | GMC_SRC_DATATYPE_COLOR | | 115 | | GMC_BRUSH_NONE |
119 | ROP3_S | | 116 | | GMC_SRC_DSTCOLOR |
120 | DP_SRC_SOURCE_MEMORY); | 117 | | ROP3_S |
121 | radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, | 118 | | DP_SRC_SOURCE_MEMORY ); |
122 | (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) | | 119 | OUTREG(DP_WRITE_MSK, 0xffffffff); |
123 | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); | 120 | OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) |
124 | 121 | | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); | |
125 | #if FLUSH_CACHE_WORKAROUND | 122 | |
126 | radeon_fifo_wait(rinfo, 2); | 123 | radeon_fifo_wait(2); |
127 | OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); | 124 | OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); |
128 | OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); | 125 | OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); |
129 | #endif | 126 | |
130 | radeon_fifo_wait(rinfo, 3); | 127 | radeon_fifo_wait(3); |
131 | OUTREG(SRC_Y_X, (sy << 16) | sx); | 128 | OUTREG(SRC_Y_X, (sy << 16) | sx); |
132 | OUTREG(DST_Y_X, (dy << 16) | dx); | 129 | OUTREG(DST_Y_X, (dy << 16) | dx); |
133 | OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w); | 130 | OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w); |
@@ -146,14 +143,15 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | |||
146 | modded.width = area->width; | 143 | modded.width = area->width; |
147 | modded.height = area->height; | 144 | modded.height = area->height; |
148 | 145 | ||
149 | WARN_ON(rinfo->gfx_mode); | 146 | if (info->state != FBINFO_STATE_RUNNING) |
150 | if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) | ||
151 | return; | 147 | return; |
152 | if (info->flags & FBINFO_HWACCEL_DISABLED) { | 148 | if (info->flags & FBINFO_HWACCEL_DISABLED) { |
153 | cfb_copyarea(info, area); | 149 | cfb_copyarea(info, area); |
154 | return; | 150 | return; |
155 | } | 151 | } |
156 | 152 | ||
153 | radeon_fixup_offset(rinfo); | ||
154 | |||
157 | vxres = info->var.xres_virtual; | 155 | vxres = info->var.xres_virtual; |
158 | vyres = info->var.yres_virtual; | 156 | vyres = info->var.yres_virtual; |
159 | 157 | ||
@@ -170,116 +168,13 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | |||
170 | radeonfb_prim_copyarea(rinfo, &modded); | 168 | radeonfb_prim_copyarea(rinfo, &modded); |
171 | } | 169 | } |
172 | 170 | ||
173 | static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo, | ||
174 | const struct fb_image *image, | ||
175 | u32 fg, u32 bg) | ||
176 | { | ||
177 | unsigned int dwords; | ||
178 | u32 *bits; | ||
179 | |||
180 | radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, | ||
181 | rinfo->dp_gui_mc_base | | ||
182 | GMC_BRUSH_NONE | GMC_DST_CLIP_LEAVE | | ||
183 | GMC_SRC_DATATYPE_MONO_FG_BG | | ||
184 | ROP3_S | | ||
185 | GMC_BYTE_ORDER_MSB_TO_LSB | | ||
186 | DP_SRC_SOURCE_HOST_DATA); | ||
187 | radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, | ||
188 | DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); | ||
189 | radeonfb_set_creg(rinfo, DP_SRC_FRGD_CLR, &rinfo->dp_src_fg_cache, fg); | ||
190 | radeonfb_set_creg(rinfo, DP_SRC_BKGD_CLR, &rinfo->dp_src_bg_cache, bg); | ||
191 | |||
192 | /* Ensure the dst cache is flushed and the engine idle before | ||
193 | * issuing the operation. | ||
194 | * | ||
195 | * This works around engine lockups on some cards | ||
196 | */ | ||
197 | #if FLUSH_CACHE_WORKAROUND | ||
198 | radeon_fifo_wait(rinfo, 2); | ||
199 | OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); | ||
200 | OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); | ||
201 | #endif | ||
202 | |||
203 | /* X here pads width to a multiple of 32 and uses the clipper to | ||
204 | * adjust the result. Is that really necessary ? Things seem to | ||
205 | * work ok for me without that and the doco doesn't seem to imply] | ||
206 | * there is such a restriction. | ||
207 | */ | ||
208 | radeon_fifo_wait(rinfo, 4); | ||
209 | OUTREG(SC_TOP_LEFT, (image->dy << 16) | image->dx); | ||
210 | OUTREG(SC_BOTTOM_RIGHT, ((image->dy + image->height) << 16) | | ||
211 | (image->dx + image->width)); | ||
212 | OUTREG(DST_Y_X, (image->dy << 16) | image->dx); | ||
213 | |||
214 | OUTREG(DST_HEIGHT_WIDTH, (image->height << 16) | ((image->width + 31) & ~31)); | ||
215 | |||
216 | dwords = (image->width + 31) >> 5; | ||
217 | dwords *= image->height; | ||
218 | bits = (u32*)(image->data); | ||
219 | |||
220 | while(dwords >= 8) { | ||
221 | radeon_fifo_wait(rinfo, 8); | ||
222 | #if BITS_PER_LONG == 64 | ||
223 | __raw_writeq(*((u64 *)(bits)), rinfo->mmio_base + HOST_DATA0); | ||
224 | __raw_writeq(*((u64 *)(bits+2)), rinfo->mmio_base + HOST_DATA2); | ||
225 | __raw_writeq(*((u64 *)(bits+4)), rinfo->mmio_base + HOST_DATA4); | ||
226 | __raw_writeq(*((u64 *)(bits+6)), rinfo->mmio_base + HOST_DATA6); | ||
227 | bits += 8; | ||
228 | #else | ||
229 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0); | ||
230 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA1); | ||
231 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA2); | ||
232 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA3); | ||
233 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA4); | ||
234 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA5); | ||
235 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA6); | ||
236 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA7); | ||
237 | #endif | ||
238 | dwords -= 8; | ||
239 | } | ||
240 | while(dwords--) { | ||
241 | radeon_fifo_wait(rinfo, 1); | ||
242 | __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0); | ||
243 | } | ||
244 | } | ||
245 | |||
246 | void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image) | 171 | void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image) |
247 | { | 172 | { |
248 | struct radeonfb_info *rinfo = info->par; | 173 | struct radeonfb_info *rinfo = info->par; |
249 | u32 fg, bg; | ||
250 | 174 | ||
251 | WARN_ON(rinfo->gfx_mode); | 175 | if (info->state != FBINFO_STATE_RUNNING) |
252 | if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) | ||
253 | return; | ||
254 | |||
255 | if (!image->width || !image->height) | ||
256 | return; | 176 | return; |
257 | 177 | radeon_engine_idle(); | |
258 | /* We only do 1 bpp color expansion for now */ | ||
259 | if (!accel_cexp || | ||
260 | (info->flags & FBINFO_HWACCEL_DISABLED) || image->depth != 1) | ||
261 | goto fallback; | ||
262 | |||
263 | /* Fallback if running out of the screen. We may do clipping | ||
264 | * in the future */ | ||
265 | if ((image->dx + image->width) > info->var.xres_virtual || | ||
266 | (image->dy + image->height) > info->var.yres_virtual) | ||
267 | goto fallback; | ||
268 | |||
269 | if (info->fix.visual == FB_VISUAL_TRUECOLOR || | ||
270 | info->fix.visual == FB_VISUAL_DIRECTCOLOR) { | ||
271 | fg = ((u32*)(info->pseudo_palette))[image->fg_color]; | ||
272 | bg = ((u32*)(info->pseudo_palette))[image->bg_color]; | ||
273 | } else { | ||
274 | fg = image->fg_color; | ||
275 | bg = image->bg_color; | ||
276 | } | ||
277 | |||
278 | radeonfb_prim_imageblit(rinfo, image, fg, bg); | ||
279 | return; | ||
280 | |||
281 | fallback: | ||
282 | radeon_engine_idle(rinfo); | ||
283 | 178 | ||
284 | cfb_imageblit(info, image); | 179 | cfb_imageblit(info, image); |
285 | } | 180 | } |
@@ -290,8 +185,7 @@ int radeonfb_sync(struct fb_info *info) | |||
290 | 185 | ||
291 | if (info->state != FBINFO_STATE_RUNNING) | 186 | if (info->state != FBINFO_STATE_RUNNING) |
292 | return 0; | 187 | return 0; |
293 | 188 | radeon_engine_idle(); | |
294 | radeon_engine_idle(rinfo); | ||
295 | 189 | ||
296 | return 0; | 190 | return 0; |
297 | } | 191 | } |
@@ -367,10 +261,9 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) | |||
367 | /* disable 3D engine */ | 261 | /* disable 3D engine */ |
368 | OUTREG(RB3D_CNTL, 0); | 262 | OUTREG(RB3D_CNTL, 0); |
369 | 263 | ||
370 | rinfo->fifo_free = 0; | ||
371 | radeonfb_engine_reset(rinfo); | 264 | radeonfb_engine_reset(rinfo); |
372 | 265 | ||
373 | radeon_fifo_wait(rinfo, 1); | 266 | radeon_fifo_wait (1); |
374 | if (IS_R300_VARIANT(rinfo)) { | 267 | if (IS_R300_VARIANT(rinfo)) { |
375 | OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) | | 268 | OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) | |
376 | RB2D_DC_AUTOFLUSH_ENABLE | | 269 | RB2D_DC_AUTOFLUSH_ENABLE | |
@@ -384,7 +277,7 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) | |||
384 | OUTREG(RB2D_DSTCACHE_MODE, 0); | 277 | OUTREG(RB2D_DSTCACHE_MODE, 0); |
385 | } | 278 | } |
386 | 279 | ||
387 | radeon_fifo_wait(rinfo, 3); | 280 | radeon_fifo_wait (3); |
388 | /* We re-read MC_FB_LOCATION from card as it can have been | 281 | /* We re-read MC_FB_LOCATION from card as it can have been |
389 | * modified by XFree drivers (ouch !) | 282 | * modified by XFree drivers (ouch !) |
390 | */ | 283 | */ |
@@ -395,57 +288,41 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) | |||
395 | OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); | 288 | OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); |
396 | OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); | 289 | OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); |
397 | 290 | ||
398 | radeon_fifo_wait(rinfo, 1); | 291 | radeon_fifo_wait (1); |
399 | #ifdef __BIG_ENDIAN | 292 | #if defined(__BIG_ENDIAN) |
400 | OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); | 293 | OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); |
401 | #else | 294 | #else |
402 | OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); | 295 | OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); |
403 | #endif | 296 | #endif |
404 | radeon_fifo_wait(rinfo, 2); | 297 | radeon_fifo_wait (2); |
405 | OUTREG(DEFAULT_SC_TOP_LEFT, 0); | 298 | OUTREG(DEFAULT_SC_TOP_LEFT, 0); |
406 | OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX | | 299 | OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX | |
407 | DEFAULT_SC_BOTTOM_MAX)); | 300 | DEFAULT_SC_BOTTOM_MAX)); |
408 | 301 | ||
409 | /* set default DP_GUI_MASTER_CNTL */ | ||
410 | temp = radeon_get_dstbpp(rinfo->depth); | 302 | temp = radeon_get_dstbpp(rinfo->depth); |
411 | rinfo->dp_gui_mc_base = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS); | 303 | rinfo->dp_gui_master_cntl = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS); |
412 | 304 | ||
413 | rinfo->dp_gui_mc_cache = rinfo->dp_gui_mc_base | | 305 | radeon_fifo_wait (1); |
414 | GMC_BRUSH_SOLID_COLOR | | 306 | OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl | |
415 | GMC_SRC_DATATYPE_COLOR; | 307 | GMC_BRUSH_SOLID_COLOR | |
416 | radeon_fifo_wait(rinfo, 1); | 308 | GMC_SRC_DATATYPE_COLOR)); |
417 | OUTREG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_mc_cache); | ||
418 | 309 | ||
310 | radeon_fifo_wait (7); | ||
419 | 311 | ||
420 | /* clear line drawing regs */ | 312 | /* clear line drawing regs */ |
421 | radeon_fifo_wait(rinfo, 2); | ||
422 | OUTREG(DST_LINE_START, 0); | 313 | OUTREG(DST_LINE_START, 0); |
423 | OUTREG(DST_LINE_END, 0); | 314 | OUTREG(DST_LINE_END, 0); |
424 | 315 | ||
425 | /* set brush and source color regs */ | 316 | /* set brush color regs */ |
426 | rinfo->dp_brush_fg_cache = 0xffffffff; | 317 | OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff); |
427 | rinfo->dp_brush_bg_cache = 0x00000000; | 318 | OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000); |
428 | rinfo->dp_src_fg_cache = 0xffffffff; | 319 | |
429 | rinfo->dp_src_bg_cache = 0x00000000; | 320 | /* set source color regs */ |
430 | radeon_fifo_wait(rinfo, 4); | 321 | OUTREG(DP_SRC_FRGD_CLR, 0xffffffff); |
431 | OUTREG(DP_BRUSH_FRGD_CLR, rinfo->dp_brush_fg_cache); | 322 | OUTREG(DP_SRC_BKGD_CLR, 0x00000000); |
432 | OUTREG(DP_BRUSH_BKGD_CLR, rinfo->dp_brush_bg_cache); | ||
433 | OUTREG(DP_SRC_FRGD_CLR, rinfo->dp_src_fg_cache); | ||
434 | OUTREG(DP_SRC_BKGD_CLR, rinfo->dp_src_bg_cache); | ||
435 | |||
436 | /* Default direction */ | ||
437 | rinfo->dp_cntl_cache = DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM; | ||
438 | radeon_fifo_wait(rinfo, 1); | ||
439 | OUTREG(DP_CNTL, rinfo->dp_cntl_cache); | ||
440 | 323 | ||
441 | /* default write mask */ | 324 | /* default write mask */ |
442 | radeon_fifo_wait(rinfo, 1); | ||
443 | OUTREG(DP_WRITE_MSK, 0xffffffff); | 325 | OUTREG(DP_WRITE_MSK, 0xffffffff); |
444 | 326 | ||
445 | /* Default to no swapping of host data */ | 327 | radeon_engine_idle (); |
446 | radeon_fifo_wait(rinfo, 1); | ||
447 | OUTREG(RBBM_GUICNTL, RBBM_GUICNTL_HOST_DATA_SWAP_NONE); | ||
448 | |||
449 | /* Make sure it's settled */ | ||
450 | radeon_engine_idle(rinfo); | ||
451 | } | 328 | } |
diff --git a/drivers/video/aty/radeon_backlight.c b/drivers/video/aty/radeon_backlight.c index f343ba83f0ae..1a056adb61c8 100644 --- a/drivers/video/aty/radeon_backlight.c +++ b/drivers/video/aty/radeon_backlight.c | |||
@@ -66,7 +66,7 @@ static int radeon_bl_update_status(struct backlight_device *bd) | |||
66 | level = bd->props.brightness; | 66 | level = bd->props.brightness; |
67 | 67 | ||
68 | del_timer_sync(&rinfo->lvds_timer); | 68 | del_timer_sync(&rinfo->lvds_timer); |
69 | radeon_engine_idle(rinfo); | 69 | radeon_engine_idle(); |
70 | 70 | ||
71 | lvds_gen_cntl = INREG(LVDS_GEN_CNTL); | 71 | lvds_gen_cntl = INREG(LVDS_GEN_CNTL); |
72 | if (level > 0) { | 72 | if (level > 0) { |
diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c index d5b27f9d374d..d0f1a7fc2c9d 100644 --- a/drivers/video/aty/radeon_base.c +++ b/drivers/video/aty/radeon_base.c | |||
@@ -282,8 +282,6 @@ static int backlight = 1; | |||
282 | static int backlight = 0; | 282 | static int backlight = 0; |
283 | #endif | 283 | #endif |
284 | 284 | ||
285 | int accel_cexp = 0; | ||
286 | |||
287 | /* | 285 | /* |
288 | * prototypes | 286 | * prototypes |
289 | */ | 287 | */ |
@@ -854,6 +852,7 @@ static int radeonfb_pan_display (struct fb_var_screeninfo *var, | |||
854 | if (rinfo->asleep) | 852 | if (rinfo->asleep) |
855 | return 0; | 853 | return 0; |
856 | 854 | ||
855 | radeon_fifo_wait(2); | ||
857 | OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset) | 856 | OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset) |
858 | * var->bits_per_pixel / 8) & ~7); | 857 | * var->bits_per_pixel / 8) & ~7); |
859 | return 0; | 858 | return 0; |
@@ -883,6 +882,7 @@ static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd, | |||
883 | if (rc) | 882 | if (rc) |
884 | return rc; | 883 | return rc; |
885 | 884 | ||
885 | radeon_fifo_wait(2); | ||
886 | if (value & 0x01) { | 886 | if (value & 0x01) { |
887 | tmp = INREG(LVDS_GEN_CNTL); | 887 | tmp = INREG(LVDS_GEN_CNTL); |
888 | 888 | ||
@@ -940,7 +940,7 @@ int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch) | |||
940 | if (rinfo->lock_blank) | 940 | if (rinfo->lock_blank) |
941 | return 0; | 941 | return 0; |
942 | 942 | ||
943 | radeon_engine_idle(rinfo); | 943 | radeon_engine_idle(); |
944 | 944 | ||
945 | val = INREG(CRTC_EXT_CNTL); | 945 | val = INREG(CRTC_EXT_CNTL); |
946 | val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | | 946 | val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | |
@@ -1048,7 +1048,7 @@ static int radeonfb_blank (int blank, struct fb_info *info) | |||
1048 | 1048 | ||
1049 | if (rinfo->asleep) | 1049 | if (rinfo->asleep) |
1050 | return 0; | 1050 | return 0; |
1051 | 1051 | ||
1052 | return radeon_screen_blank(rinfo, blank, 0); | 1052 | return radeon_screen_blank(rinfo, blank, 0); |
1053 | } | 1053 | } |
1054 | 1054 | ||
@@ -1074,6 +1074,8 @@ static int radeon_setcolreg (unsigned regno, unsigned red, unsigned green, | |||
1074 | pindex = regno; | 1074 | pindex = regno; |
1075 | 1075 | ||
1076 | if (!rinfo->asleep) { | 1076 | if (!rinfo->asleep) { |
1077 | radeon_fifo_wait(9); | ||
1078 | |||
1077 | if (rinfo->bpp == 16) { | 1079 | if (rinfo->bpp == 16) { |
1078 | pindex = regno * 8; | 1080 | pindex = regno * 8; |
1079 | 1081 | ||
@@ -1242,6 +1244,8 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg | |||
1242 | { | 1244 | { |
1243 | int i; | 1245 | int i; |
1244 | 1246 | ||
1247 | radeon_fifo_wait(20); | ||
1248 | |||
1245 | /* Workaround from XFree */ | 1249 | /* Workaround from XFree */ |
1246 | if (rinfo->is_mobility) { | 1250 | if (rinfo->is_mobility) { |
1247 | /* A temporal workaround for the occational blanking on certain laptop | 1251 | /* A temporal workaround for the occational blanking on certain laptop |
@@ -1337,7 +1341,7 @@ static void radeon_lvds_timer_func(unsigned long data) | |||
1337 | { | 1341 | { |
1338 | struct radeonfb_info *rinfo = (struct radeonfb_info *)data; | 1342 | struct radeonfb_info *rinfo = (struct radeonfb_info *)data; |
1339 | 1343 | ||
1340 | radeon_engine_idle(rinfo); | 1344 | radeon_engine_idle(); |
1341 | 1345 | ||
1342 | OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl); | 1346 | OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl); |
1343 | } | 1347 | } |
@@ -1355,11 +1359,10 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, | |||
1355 | if (nomodeset) | 1359 | if (nomodeset) |
1356 | return; | 1360 | return; |
1357 | 1361 | ||
1358 | radeon_engine_idle(rinfo); | ||
1359 | |||
1360 | if (!regs_only) | 1362 | if (!regs_only) |
1361 | radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0); | 1363 | radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0); |
1362 | 1364 | ||
1365 | radeon_fifo_wait(31); | ||
1363 | for (i=0; i<10; i++) | 1366 | for (i=0; i<10; i++) |
1364 | OUTREG(common_regs[i].reg, common_regs[i].val); | 1367 | OUTREG(common_regs[i].reg, common_regs[i].val); |
1365 | 1368 | ||
@@ -1387,6 +1390,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, | |||
1387 | radeon_write_pll_regs(rinfo, mode); | 1390 | radeon_write_pll_regs(rinfo, mode); |
1388 | 1391 | ||
1389 | if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) { | 1392 | if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) { |
1393 | radeon_fifo_wait(10); | ||
1390 | OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp); | 1394 | OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp); |
1391 | OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp); | 1395 | OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp); |
1392 | OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid); | 1396 | OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid); |
@@ -1401,6 +1405,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, | |||
1401 | if (!regs_only) | 1405 | if (!regs_only) |
1402 | radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0); | 1406 | radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0); |
1403 | 1407 | ||
1408 | radeon_fifo_wait(2); | ||
1404 | OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl); | 1409 | OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl); |
1405 | 1410 | ||
1406 | return; | 1411 | return; |
@@ -1551,7 +1556,7 @@ static int radeonfb_set_par(struct fb_info *info) | |||
1551 | /* We always want engine to be idle on a mode switch, even | 1556 | /* We always want engine to be idle on a mode switch, even |
1552 | * if we won't actually change the mode | 1557 | * if we won't actually change the mode |
1553 | */ | 1558 | */ |
1554 | radeon_engine_idle(rinfo); | 1559 | radeon_engine_idle(); |
1555 | 1560 | ||
1556 | hSyncStart = mode->xres + mode->right_margin; | 1561 | hSyncStart = mode->xres + mode->right_margin; |
1557 | hSyncEnd = hSyncStart + mode->hsync_len; | 1562 | hSyncEnd = hSyncStart + mode->hsync_len; |
@@ -1846,6 +1851,7 @@ static int radeonfb_set_par(struct fb_info *info) | |||
1846 | return 0; | 1851 | return 0; |
1847 | } | 1852 | } |
1848 | 1853 | ||
1854 | |||
1849 | static struct fb_ops radeonfb_ops = { | 1855 | static struct fb_ops radeonfb_ops = { |
1850 | .owner = THIS_MODULE, | 1856 | .owner = THIS_MODULE, |
1851 | .fb_check_var = radeonfb_check_var, | 1857 | .fb_check_var = radeonfb_check_var, |
@@ -1869,7 +1875,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) | |||
1869 | info->par = rinfo; | 1875 | info->par = rinfo; |
1870 | info->pseudo_palette = rinfo->pseudo_palette; | 1876 | info->pseudo_palette = rinfo->pseudo_palette; |
1871 | info->flags = FBINFO_DEFAULT | 1877 | info->flags = FBINFO_DEFAULT |
1872 | | FBINFO_HWACCEL_IMAGEBLIT | ||
1873 | | FBINFO_HWACCEL_COPYAREA | 1878 | | FBINFO_HWACCEL_COPYAREA |
1874 | | FBINFO_HWACCEL_FILLRECT | 1879 | | FBINFO_HWACCEL_FILLRECT |
1875 | | FBINFO_HWACCEL_XPAN | 1880 | | FBINFO_HWACCEL_XPAN |
@@ -1877,7 +1882,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) | |||
1877 | info->fbops = &radeonfb_ops; | 1882 | info->fbops = &radeonfb_ops; |
1878 | info->screen_base = rinfo->fb_base; | 1883 | info->screen_base = rinfo->fb_base; |
1879 | info->screen_size = rinfo->mapped_vram; | 1884 | info->screen_size = rinfo->mapped_vram; |
1880 | |||
1881 | /* Fill fix common fields */ | 1885 | /* Fill fix common fields */ |
1882 | strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id)); | 1886 | strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id)); |
1883 | info->fix.smem_start = rinfo->fb_base_phys; | 1887 | info->fix.smem_start = rinfo->fb_base_phys; |
@@ -1892,25 +1896,8 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) | |||
1892 | info->fix.mmio_len = RADEON_REGSIZE; | 1896 | info->fix.mmio_len = RADEON_REGSIZE; |
1893 | info->fix.accel = FB_ACCEL_ATI_RADEON; | 1897 | info->fix.accel = FB_ACCEL_ATI_RADEON; |
1894 | 1898 | ||
1895 | /* Allocate colormap */ | ||
1896 | fb_alloc_cmap(&info->cmap, 256, 0); | 1899 | fb_alloc_cmap(&info->cmap, 256, 0); |
1897 | 1900 | ||
1898 | /* Setup pixmap used for acceleration */ | ||
1899 | #define PIXMAP_SIZE (2048 * 4) | ||
1900 | |||
1901 | info->pixmap.addr = kmalloc(PIXMAP_SIZE, GFP_KERNEL); | ||
1902 | if (!info->pixmap.addr) { | ||
1903 | printk(KERN_ERR "radeonfb: Failed to allocate pixmap !\n"); | ||
1904 | noaccel = 1; | ||
1905 | goto bail; | ||
1906 | } | ||
1907 | info->pixmap.size = PIXMAP_SIZE; | ||
1908 | info->pixmap.flags = FB_PIXMAP_SYSTEM; | ||
1909 | info->pixmap.scan_align = 4; | ||
1910 | info->pixmap.buf_align = 4; | ||
1911 | info->pixmap.access_align = 32; | ||
1912 | |||
1913 | bail: | ||
1914 | if (noaccel) | 1901 | if (noaccel) |
1915 | info->flags |= FBINFO_HWACCEL_DISABLED; | 1902 | info->flags |= FBINFO_HWACCEL_DISABLED; |
1916 | 1903 | ||
@@ -2019,6 +2006,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo) | |||
2019 | u32 tom = INREG(NB_TOM); | 2006 | u32 tom = INREG(NB_TOM); |
2020 | tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); | 2007 | tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); |
2021 | 2008 | ||
2009 | radeon_fifo_wait(6); | ||
2022 | OUTREG(MC_FB_LOCATION, tom); | 2010 | OUTREG(MC_FB_LOCATION, tom); |
2023 | OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); | 2011 | OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); |
2024 | OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); | 2012 | OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); |
@@ -2522,8 +2510,6 @@ static int __init radeonfb_setup (char *options) | |||
2522 | } else if (!strncmp(this_opt, "ignore_devlist", 14)) { | 2510 | } else if (!strncmp(this_opt, "ignore_devlist", 14)) { |
2523 | ignore_devlist = 1; | 2511 | ignore_devlist = 1; |
2524 | #endif | 2512 | #endif |
2525 | } else if (!strncmp(this_opt, "accel_cexp", 12)) { | ||
2526 | accel_cexp = 1; | ||
2527 | } else | 2513 | } else |
2528 | mode_option = this_opt; | 2514 | mode_option = this_opt; |
2529 | } | 2515 | } |
@@ -2571,8 +2557,6 @@ module_param(monitor_layout, charp, 0); | |||
2571 | MODULE_PARM_DESC(monitor_layout, "Specify monitor mapping (like XFree86)"); | 2557 | MODULE_PARM_DESC(monitor_layout, "Specify monitor mapping (like XFree86)"); |
2572 | module_param(force_measure_pll, bool, 0); | 2558 | module_param(force_measure_pll, bool, 0); |
2573 | MODULE_PARM_DESC(force_measure_pll, "Force measurement of PLL (debug)"); | 2559 | MODULE_PARM_DESC(force_measure_pll, "Force measurement of PLL (debug)"); |
2574 | module_param(accel_cexp, bool, 0); | ||
2575 | MODULE_PARM_DESC(accel_cexp, "Use acceleration engine for color expansion"); | ||
2576 | #ifdef CONFIG_MTRR | 2560 | #ifdef CONFIG_MTRR |
2577 | module_param(nomtrr, bool, 0); | 2561 | module_param(nomtrr, bool, 0); |
2578 | MODULE_PARM_DESC(nomtrr, "bool: disable use of MTRR registers"); | 2562 | MODULE_PARM_DESC(nomtrr, "bool: disable use of MTRR registers"); |
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c index 3df5015f1d13..675abdafc2d8 100644 --- a/drivers/video/aty/radeon_pm.c +++ b/drivers/video/aty/radeon_pm.c | |||
@@ -2653,9 +2653,9 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |||
2653 | 2653 | ||
2654 | if (!(info->flags & FBINFO_HWACCEL_DISABLED)) { | 2654 | if (!(info->flags & FBINFO_HWACCEL_DISABLED)) { |
2655 | /* Make sure engine is reset */ | 2655 | /* Make sure engine is reset */ |
2656 | radeon_engine_idle(rinfo); | 2656 | radeon_engine_idle(); |
2657 | radeonfb_engine_reset(rinfo); | 2657 | radeonfb_engine_reset(rinfo); |
2658 | radeon_engine_idle(rinfo); | 2658 | radeon_engine_idle(); |
2659 | } | 2659 | } |
2660 | 2660 | ||
2661 | /* Blank display and LCD */ | 2661 | /* Blank display and LCD */ |
@@ -2767,7 +2767,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev) | |||
2767 | 2767 | ||
2768 | rinfo->asleep = 0; | 2768 | rinfo->asleep = 0; |
2769 | } else | 2769 | } else |
2770 | radeon_engine_idle(rinfo); | 2770 | radeon_engine_idle(); |
2771 | 2771 | ||
2772 | /* Restore display & engine */ | 2772 | /* Restore display & engine */ |
2773 | radeon_write_mode (rinfo, &rinfo->state, 1); | 2773 | radeon_write_mode (rinfo, &rinfo->state, 1); |
diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h index 974ca6d86540..3ea1b00fdd22 100644 --- a/drivers/video/aty/radeonfb.h +++ b/drivers/video/aty/radeonfb.h | |||
@@ -336,15 +336,7 @@ struct radeonfb_info { | |||
336 | int mon2_type; | 336 | int mon2_type; |
337 | u8 *mon2_EDID; | 337 | u8 *mon2_EDID; |
338 | 338 | ||
339 | /* accel bits */ | 339 | u32 dp_gui_master_cntl; |
340 | u32 dp_gui_mc_base; | ||
341 | u32 dp_gui_mc_cache; | ||
342 | u32 dp_cntl_cache; | ||
343 | u32 dp_brush_fg_cache; | ||
344 | u32 dp_brush_bg_cache; | ||
345 | u32 dp_src_fg_cache; | ||
346 | u32 dp_src_bg_cache; | ||
347 | u32 fifo_free; | ||
348 | 340 | ||
349 | struct pll_info pll; | 341 | struct pll_info pll; |
350 | 342 | ||
@@ -356,7 +348,6 @@ struct radeonfb_info { | |||
356 | int lock_blank; | 348 | int lock_blank; |
357 | int dynclk; | 349 | int dynclk; |
358 | int no_schedule; | 350 | int no_schedule; |
359 | int gfx_mode; | ||
360 | enum radeon_pm_mode pm_mode; | 351 | enum radeon_pm_mode pm_mode; |
361 | reinit_function_ptr reinit_func; | 352 | reinit_function_ptr reinit_func; |
362 | 353 | ||
@@ -401,14 +392,8 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms) | |||
401 | #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) | 392 | #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) |
402 | #define INREG16(addr) readw((rinfo->mmio_base)+addr) | 393 | #define INREG16(addr) readw((rinfo->mmio_base)+addr) |
403 | #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) | 394 | #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) |
404 | |||
405 | #ifdef CONFIG_PPC | ||
406 | #define INREG(addr) ({ eieio(); ld_le32(rinfo->mmio_base+(addr)); }) | ||
407 | #define OUTREG(addr,val) do { eieio(); st_le32(rinfo->mmio_base+(addr),(val)); } while(0) | ||
408 | #else | ||
409 | #define INREG(addr) readl((rinfo->mmio_base)+addr) | 395 | #define INREG(addr) readl((rinfo->mmio_base)+addr) |
410 | #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) | 396 | #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) |
411 | #endif | ||
412 | 397 | ||
413 | static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr, | 398 | static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr, |
414 | u32 val, u32 mask) | 399 | u32 val, u32 mask) |
@@ -550,7 +535,17 @@ static inline u32 radeon_get_dstbpp(u16 depth) | |||
550 | * 2D Engine helper routines | 535 | * 2D Engine helper routines |
551 | */ | 536 | */ |
552 | 537 | ||
553 | extern void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries); | 538 | static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) |
539 | { | ||
540 | int i; | ||
541 | |||
542 | for (i=0; i<2000000; i++) { | ||
543 | if ((INREG(RBBM_STATUS) & 0x7f) >= entries) | ||
544 | return; | ||
545 | udelay(1); | ||
546 | } | ||
547 | printk(KERN_ERR "radeonfb: FIFO Timeout !\n"); | ||
548 | } | ||
554 | 549 | ||
555 | static inline void radeon_engine_flush (struct radeonfb_info *rinfo) | 550 | static inline void radeon_engine_flush (struct radeonfb_info *rinfo) |
556 | { | 551 | { |
@@ -563,7 +558,7 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) | |||
563 | /* Ensure FIFO is empty, ie, make sure the flush commands | 558 | /* Ensure FIFO is empty, ie, make sure the flush commands |
564 | * has reached the cache | 559 | * has reached the cache |
565 | */ | 560 | */ |
566 | radeon_fifo_update_and_wait(rinfo, 64); | 561 | _radeon_fifo_wait (rinfo, 64); |
567 | 562 | ||
568 | /* Wait for the flush to complete */ | 563 | /* Wait for the flush to complete */ |
569 | for (i=0; i < 2000000; i++) { | 564 | for (i=0; i < 2000000; i++) { |
@@ -575,12 +570,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) | |||
575 | } | 570 | } |
576 | 571 | ||
577 | 572 | ||
578 | static inline void radeon_engine_idle(struct radeonfb_info *rinfo) | 573 | static inline void _radeon_engine_idle(struct radeonfb_info *rinfo) |
579 | { | 574 | { |
580 | int i; | 575 | int i; |
581 | 576 | ||
582 | /* ensure FIFO is empty before waiting for idle */ | 577 | /* ensure FIFO is empty before waiting for idle */ |
583 | radeon_fifo_update_and_wait (rinfo, 64); | 578 | _radeon_fifo_wait (rinfo, 64); |
584 | 579 | ||
585 | for (i=0; i<2000000; i++) { | 580 | for (i=0; i<2000000; i++) { |
586 | if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { | 581 | if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { |
@@ -593,6 +588,8 @@ static inline void radeon_engine_idle(struct radeonfb_info *rinfo) | |||
593 | } | 588 | } |
594 | 589 | ||
595 | 590 | ||
591 | #define radeon_engine_idle() _radeon_engine_idle(rinfo) | ||
592 | #define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries) | ||
596 | #define radeon_msleep(ms) _radeon_msleep(rinfo,ms) | 593 | #define radeon_msleep(ms) _radeon_msleep(rinfo,ms) |
597 | 594 | ||
598 | 595 | ||
@@ -622,7 +619,6 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image); | |||
622 | extern int radeonfb_sync(struct fb_info *info); | 619 | extern int radeonfb_sync(struct fb_info *info); |
623 | extern void radeonfb_engine_init (struct radeonfb_info *rinfo); | 620 | extern void radeonfb_engine_init (struct radeonfb_info *rinfo); |
624 | extern void radeonfb_engine_reset(struct radeonfb_info *rinfo); | 621 | extern void radeonfb_engine_reset(struct radeonfb_info *rinfo); |
625 | extern void radeon_fixup_mem_offset(struct radeonfb_info *rinfo); | ||
626 | 622 | ||
627 | /* Other functions */ | 623 | /* Other functions */ |
628 | extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch); | 624 | extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch); |
@@ -638,6 +634,4 @@ static inline void radeonfb_bl_init(struct radeonfb_info *rinfo) {} | |||
638 | static inline void radeonfb_bl_exit(struct radeonfb_info *rinfo) {} | 634 | static inline void radeonfb_bl_exit(struct radeonfb_info *rinfo) {} |
639 | #endif | 635 | #endif |
640 | 636 | ||
641 | extern int accel_cexp; | ||
642 | |||
643 | #endif /* __RADEONFB_H__ */ | 637 | #endif /* __RADEONFB_H__ */ |
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index ccd986140c95..d58c68cd456e 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/video/imxfb.c | ||
3 | * | ||
4 | * Freescale i.MX Frame Buffer device driver | 2 | * Freescale i.MX Frame Buffer device driver |
5 | * | 3 | * |
6 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | 4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix |
@@ -16,7 +14,6 @@ | |||
16 | * linux-arm-kernel@lists.arm.linux.org.uk | 14 | * linux-arm-kernel@lists.arm.linux.org.uk |
17 | */ | 15 | */ |
18 | 16 | ||
19 | //#define DEBUG 1 | ||
20 | 17 | ||
21 | #include <linux/module.h> | 18 | #include <linux/module.h> |
22 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
@@ -32,9 +29,8 @@ | |||
32 | #include <linux/cpufreq.h> | 29 | #include <linux/cpufreq.h> |
33 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
34 | #include <linux/dma-mapping.h> | 31 | #include <linux/dma-mapping.h> |
32 | #include <linux/io.h> | ||
35 | 33 | ||
36 | #include <mach/hardware.h> | ||
37 | #include <asm/io.h> | ||
38 | #include <mach/imxfb.h> | 34 | #include <mach/imxfb.h> |
39 | 35 | ||
40 | /* | 36 | /* |
@@ -42,23 +38,150 @@ | |||
42 | */ | 38 | */ |
43 | #define DEBUG_VAR 1 | 39 | #define DEBUG_VAR 1 |
44 | 40 | ||
45 | #include "imxfb.h" | 41 | #define DRIVER_NAME "imx-fb" |
42 | |||
43 | #define LCDC_SSA 0x00 | ||
44 | |||
45 | #define LCDC_SIZE 0x04 | ||
46 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | ||
47 | #define SIZE_YMAX(y) ((y) & 0x1ff) | ||
48 | |||
49 | #define LCDC_VPW 0x08 | ||
50 | #define VPW_VPW(x) ((x) & 0x3ff) | ||
51 | |||
52 | #define LCDC_CPOS 0x0C | ||
53 | #define CPOS_CC1 (1<<31) | ||
54 | #define CPOS_CC0 (1<<30) | ||
55 | #define CPOS_OP (1<<28) | ||
56 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | ||
57 | #define CPOS_CYP(y) ((y) & 0x1ff) | ||
58 | |||
59 | #define LCDC_LCWHB 0x10 | ||
60 | #define LCWHB_BK_EN (1<<31) | ||
61 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | ||
62 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | ||
63 | #define LCWHB_BD(x) ((x) & 0xff) | ||
64 | |||
65 | #define LCDC_LCHCC 0x14 | ||
66 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) | ||
67 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | ||
68 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | ||
69 | |||
70 | #define LCDC_PCR 0x18 | ||
71 | |||
72 | #define LCDC_HCR 0x1C | ||
73 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | ||
74 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | ||
75 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | ||
76 | |||
77 | #define LCDC_VCR 0x20 | ||
78 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | ||
79 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | ||
80 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | ||
81 | |||
82 | #define LCDC_POS 0x24 | ||
83 | #define POS_POS(x) ((x) & 1f) | ||
84 | |||
85 | #define LCDC_LSCR1 0x28 | ||
86 | /* bit fields in imxfb.h */ | ||
87 | |||
88 | #define LCDC_PWMR 0x2C | ||
89 | /* bit fields in imxfb.h */ | ||
90 | |||
91 | #define LCDC_DMACR 0x30 | ||
92 | /* bit fields in imxfb.h */ | ||
93 | |||
94 | #define LCDC_RMCR 0x34 | ||
95 | #define RMCR_LCDC_EN (1<<1) | ||
96 | #define RMCR_SELF_REF (1<<0) | ||
97 | |||
98 | #define LCDC_LCDICR 0x38 | ||
99 | #define LCDICR_INT_SYN (1<<2) | ||
100 | #define LCDICR_INT_CON (1) | ||
101 | |||
102 | #define LCDC_LCDISR 0x40 | ||
103 | #define LCDISR_UDR_ERR (1<<3) | ||
104 | #define LCDISR_ERR_RES (1<<2) | ||
105 | #define LCDISR_EOF (1<<1) | ||
106 | #define LCDISR_BOF (1<<0) | ||
107 | |||
108 | /* | ||
109 | * These are the bitfields for each | ||
110 | * display depth that we support. | ||
111 | */ | ||
112 | struct imxfb_rgb { | ||
113 | struct fb_bitfield red; | ||
114 | struct fb_bitfield green; | ||
115 | struct fb_bitfield blue; | ||
116 | struct fb_bitfield transp; | ||
117 | }; | ||
118 | |||
119 | struct imxfb_info { | ||
120 | struct platform_device *pdev; | ||
121 | void __iomem *regs; | ||
46 | 122 | ||
47 | static struct imxfb_rgb def_rgb_16 = { | 123 | u_int max_bpp; |
48 | .red = { .offset = 8, .length = 4, }, | 124 | u_int max_xres; |
49 | .green = { .offset = 4, .length = 4, }, | 125 | u_int max_yres; |
50 | .blue = { .offset = 0, .length = 4, }, | 126 | |
51 | .transp = { .offset = 0, .length = 0, }, | 127 | /* |
128 | * These are the addresses we mapped | ||
129 | * the framebuffer memory region to. | ||
130 | */ | ||
131 | dma_addr_t map_dma; | ||
132 | u_char *map_cpu; | ||
133 | u_int map_size; | ||
134 | |||
135 | u_char *screen_cpu; | ||
136 | dma_addr_t screen_dma; | ||
137 | u_int palette_size; | ||
138 | |||
139 | dma_addr_t dbar1; | ||
140 | dma_addr_t dbar2; | ||
141 | |||
142 | u_int pcr; | ||
143 | u_int pwmr; | ||
144 | u_int lscr1; | ||
145 | u_int dmacr; | ||
146 | u_int cmap_inverse:1, | ||
147 | cmap_static:1, | ||
148 | unused:30; | ||
149 | |||
150 | void (*lcd_power)(int); | ||
151 | void (*backlight_power)(int); | ||
152 | }; | ||
153 | |||
154 | #define IMX_NAME "IMX" | ||
155 | |||
156 | /* | ||
157 | * Minimum X and Y resolutions | ||
158 | */ | ||
159 | #define MIN_XRES 64 | ||
160 | #define MIN_YRES 64 | ||
161 | |||
162 | static struct imxfb_rgb def_rgb_16_tft = { | ||
163 | .red = {.offset = 11, .length = 5,}, | ||
164 | .green = {.offset = 5, .length = 6,}, | ||
165 | .blue = {.offset = 0, .length = 5,}, | ||
166 | .transp = {.offset = 0, .length = 0,}, | ||
167 | }; | ||
168 | |||
169 | static struct imxfb_rgb def_rgb_16_stn = { | ||
170 | .red = {.offset = 8, .length = 4,}, | ||
171 | .green = {.offset = 4, .length = 4,}, | ||
172 | .blue = {.offset = 0, .length = 4,}, | ||
173 | .transp = {.offset = 0, .length = 0,}, | ||
52 | }; | 174 | }; |
53 | 175 | ||
54 | static struct imxfb_rgb def_rgb_8 = { | 176 | static struct imxfb_rgb def_rgb_8 = { |
55 | .red = { .offset = 0, .length = 8, }, | 177 | .red = {.offset = 0, .length = 8,}, |
56 | .green = { .offset = 0, .length = 8, }, | 178 | .green = {.offset = 0, .length = 8,}, |
57 | .blue = { .offset = 0, .length = 8, }, | 179 | .blue = {.offset = 0, .length = 8,}, |
58 | .transp = { .offset = 0, .length = 0, }, | 180 | .transp = {.offset = 0, .length = 0,}, |
59 | }; | 181 | }; |
60 | 182 | ||
61 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info); | 183 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
184 | struct fb_info *info); | ||
62 | 185 | ||
63 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | 186 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) |
64 | { | 187 | { |
@@ -67,10 +190,8 @@ static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |||
67 | return chan << bf->offset; | 190 | return chan << bf->offset; |
68 | } | 191 | } |
69 | 192 | ||
70 | #define LCDC_PALETTE(x) __REG2(IMX_LCDC_BASE+0x800, (x)<<2) | 193 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
71 | static int | 194 | u_int trans, struct fb_info *info) |
72 | imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, | ||
73 | u_int trans, struct fb_info *info) | ||
74 | { | 195 | { |
75 | struct imxfb_info *fbi = info->par; | 196 | struct imxfb_info *fbi = info->par; |
76 | u_int val, ret = 1; | 197 | u_int val, ret = 1; |
@@ -81,14 +202,13 @@ imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, | |||
81 | (CNVT_TOHW(green,4) << 4) | | 202 | (CNVT_TOHW(green,4) << 4) | |
82 | CNVT_TOHW(blue, 4); | 203 | CNVT_TOHW(blue, 4); |
83 | 204 | ||
84 | LCDC_PALETTE(regno) = val; | 205 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
85 | ret = 0; | 206 | ret = 0; |
86 | } | 207 | } |
87 | return ret; | 208 | return ret; |
88 | } | 209 | } |
89 | 210 | ||
90 | static int | 211 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
91 | imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
92 | u_int trans, struct fb_info *info) | 212 | u_int trans, struct fb_info *info) |
93 | { | 213 | { |
94 | struct imxfb_info *fbi = info->par; | 214 | struct imxfb_info *fbi = info->par; |
@@ -148,11 +268,10 @@ imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
148 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | 268 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, |
149 | * bitfields, horizontal timing, vertical timing. | 269 | * bitfields, horizontal timing, vertical timing. |
150 | */ | 270 | */ |
151 | static int | 271 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
152 | imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | ||
153 | { | 272 | { |
154 | struct imxfb_info *fbi = info->par; | 273 | struct imxfb_info *fbi = info->par; |
155 | int rgbidx; | 274 | struct imxfb_rgb *rgb; |
156 | 275 | ||
157 | if (var->xres < MIN_XRES) | 276 | if (var->xres < MIN_XRES) |
158 | var->xres = MIN_XRES; | 277 | var->xres = MIN_XRES; |
@@ -168,23 +287,25 @@ imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
168 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | 287 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); |
169 | switch (var->bits_per_pixel) { | 288 | switch (var->bits_per_pixel) { |
170 | case 16: | 289 | case 16: |
171 | rgbidx = RGB_16; | 290 | default: |
291 | if (readl(fbi->regs + LCDC_PCR) & PCR_TFT) | ||
292 | rgb = &def_rgb_16_tft; | ||
293 | else | ||
294 | rgb = &def_rgb_16_stn; | ||
172 | break; | 295 | break; |
173 | case 8: | 296 | case 8: |
174 | rgbidx = RGB_8; | 297 | rgb = &def_rgb_8; |
175 | break; | 298 | break; |
176 | default: | ||
177 | rgbidx = RGB_16; | ||
178 | } | 299 | } |
179 | 300 | ||
180 | /* | 301 | /* |
181 | * Copy the RGB parameters for this display | 302 | * Copy the RGB parameters for this display |
182 | * from the machine specific parameters. | 303 | * from the machine specific parameters. |
183 | */ | 304 | */ |
184 | var->red = fbi->rgb[rgbidx]->red; | 305 | var->red = rgb->red; |
185 | var->green = fbi->rgb[rgbidx]->green; | 306 | var->green = rgb->green; |
186 | var->blue = fbi->rgb[rgbidx]->blue; | 307 | var->blue = rgb->blue; |
187 | var->transp = fbi->rgb[rgbidx]->transp; | 308 | var->transp = rgb->transp; |
188 | 309 | ||
189 | pr_debug("RGBT length = %d:%d:%d:%d\n", | 310 | pr_debug("RGBT length = %d:%d:%d:%d\n", |
190 | var->red.length, var->green.length, var->blue.length, | 311 | var->red.length, var->green.length, var->blue.length, |
@@ -221,8 +342,7 @@ static int imxfb_set_par(struct fb_info *info) | |||
221 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | 342 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; |
222 | } | 343 | } |
223 | 344 | ||
224 | info->fix.line_length = var->xres_virtual * | 345 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
225 | var->bits_per_pixel / 8; | ||
226 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; | 346 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
227 | 347 | ||
228 | imxfb_activate_var(var, info); | 348 | imxfb_activate_var(var, info); |
@@ -235,22 +355,27 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) | |||
235 | pr_debug("Enabling LCD controller\n"); | 355 | pr_debug("Enabling LCD controller\n"); |
236 | 356 | ||
237 | /* initialize LCDC */ | 357 | /* initialize LCDC */ |
238 | LCDC_RMCR &= ~RMCR_LCDC_EN; /* just to be safe... */ | 358 | writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN, |
359 | fbi->regs + LCDC_RMCR); /* just to be safe... */ | ||
360 | |||
361 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); | ||
239 | 362 | ||
240 | LCDC_SSA = fbi->screen_dma; | ||
241 | /* physical screen start address */ | 363 | /* physical screen start address */ |
242 | LCDC_VPW = VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4); | 364 | writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4), |
365 | fbi->regs + LCDC_VPW); | ||
243 | 366 | ||
244 | LCDC_POS = 0x00000000; /* panning offset 0 (0 pixel offset) */ | 367 | /* panning offset 0 (0 pixel offset) */ |
368 | writel(0x00000000, fbi->regs + LCDC_POS); | ||
245 | 369 | ||
246 | /* disable hardware cursor */ | 370 | /* disable hardware cursor */ |
247 | LCDC_CPOS &= ~(CPOS_CC0 | CPOS_CC1); | 371 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
372 | fbi->regs + LCDC_CPOS); | ||
248 | 373 | ||
249 | LCDC_RMCR = RMCR_LCDC_EN; | 374 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
250 | 375 | ||
251 | if(fbi->backlight_power) | 376 | if (fbi->backlight_power) |
252 | fbi->backlight_power(1); | 377 | fbi->backlight_power(1); |
253 | if(fbi->lcd_power) | 378 | if (fbi->lcd_power) |
254 | fbi->lcd_power(1); | 379 | fbi->lcd_power(1); |
255 | } | 380 | } |
256 | 381 | ||
@@ -258,12 +383,12 @@ static void imxfb_disable_controller(struct imxfb_info *fbi) | |||
258 | { | 383 | { |
259 | pr_debug("Disabling LCD controller\n"); | 384 | pr_debug("Disabling LCD controller\n"); |
260 | 385 | ||
261 | if(fbi->backlight_power) | 386 | if (fbi->backlight_power) |
262 | fbi->backlight_power(0); | 387 | fbi->backlight_power(0); |
263 | if(fbi->lcd_power) | 388 | if (fbi->lcd_power) |
264 | fbi->lcd_power(0); | 389 | fbi->lcd_power(0); |
265 | 390 | ||
266 | LCDC_RMCR = 0; | 391 | writel(0, fbi->regs + LCDC_RMCR); |
267 | } | 392 | } |
268 | 393 | ||
269 | static int imxfb_blank(int blank, struct fb_info *info) | 394 | static int imxfb_blank(int blank, struct fb_info *info) |
@@ -340,74 +465,26 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf | |||
340 | info->fix.id, var->lower_margin); | 465 | info->fix.id, var->lower_margin); |
341 | #endif | 466 | #endif |
342 | 467 | ||
343 | LCDC_HCR = HCR_H_WIDTH(var->hsync_len) | | 468 | writel(HCR_H_WIDTH(var->hsync_len) | |
344 | HCR_H_WAIT_1(var->left_margin) | | 469 | HCR_H_WAIT_1(var->right_margin) | |
345 | HCR_H_WAIT_2(var->right_margin); | 470 | HCR_H_WAIT_2(var->left_margin), |
471 | fbi->regs + LCDC_HCR); | ||
346 | 472 | ||
347 | LCDC_VCR = VCR_V_WIDTH(var->vsync_len) | | 473 | writel(VCR_V_WIDTH(var->vsync_len) | |
348 | VCR_V_WAIT_1(var->upper_margin) | | 474 | VCR_V_WAIT_1(var->lower_margin) | |
349 | VCR_V_WAIT_2(var->lower_margin); | 475 | VCR_V_WAIT_2(var->upper_margin), |
476 | fbi->regs + LCDC_VCR); | ||
350 | 477 | ||
351 | LCDC_SIZE = SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres); | 478 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
352 | LCDC_PCR = fbi->pcr; | 479 | fbi->regs + LCDC_SIZE); |
353 | LCDC_PWMR = fbi->pwmr; | 480 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
354 | LCDC_LSCR1 = fbi->lscr1; | 481 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
355 | LCDC_DMACR = fbi->dmacr; | 482 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
483 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | ||
356 | 484 | ||
357 | return 0; | 485 | return 0; |
358 | } | 486 | } |
359 | 487 | ||
360 | static void imxfb_setup_gpio(struct imxfb_info *fbi) | ||
361 | { | ||
362 | int width; | ||
363 | |||
364 | LCDC_RMCR &= ~(RMCR_LCDC_EN | RMCR_SELF_REF); | ||
365 | |||
366 | if( fbi->pcr & PCR_TFT ) | ||
367 | width = 16; | ||
368 | else | ||
369 | width = 1 << ((fbi->pcr >> 28) & 0x3); | ||
370 | |||
371 | switch(width) { | ||
372 | case 16: | ||
373 | imx_gpio_mode(PD30_PF_LD15); | ||
374 | imx_gpio_mode(PD29_PF_LD14); | ||
375 | imx_gpio_mode(PD28_PF_LD13); | ||
376 | imx_gpio_mode(PD27_PF_LD12); | ||
377 | imx_gpio_mode(PD26_PF_LD11); | ||
378 | imx_gpio_mode(PD25_PF_LD10); | ||
379 | imx_gpio_mode(PD24_PF_LD9); | ||
380 | imx_gpio_mode(PD23_PF_LD8); | ||
381 | case 8: | ||
382 | imx_gpio_mode(PD22_PF_LD7); | ||
383 | imx_gpio_mode(PD21_PF_LD6); | ||
384 | imx_gpio_mode(PD20_PF_LD5); | ||
385 | imx_gpio_mode(PD19_PF_LD4); | ||
386 | case 4: | ||
387 | imx_gpio_mode(PD18_PF_LD3); | ||
388 | imx_gpio_mode(PD17_PF_LD2); | ||
389 | case 2: | ||
390 | imx_gpio_mode(PD16_PF_LD1); | ||
391 | case 1: | ||
392 | imx_gpio_mode(PD15_PF_LD0); | ||
393 | } | ||
394 | |||
395 | /* initialize GPIOs */ | ||
396 | imx_gpio_mode(PD6_PF_LSCLK); | ||
397 | imx_gpio_mode(PD11_PF_CONTRAST); | ||
398 | imx_gpio_mode(PD14_PF_FLM_VSYNC); | ||
399 | imx_gpio_mode(PD13_PF_LP_HSYNC); | ||
400 | imx_gpio_mode(PD12_PF_ACD_OE); | ||
401 | |||
402 | /* These are only needed for Sharp HR TFT displays */ | ||
403 | if (fbi->pcr & PCR_SHARP) { | ||
404 | imx_gpio_mode(PD7_PF_REV); | ||
405 | imx_gpio_mode(PD8_PF_CLS); | ||
406 | imx_gpio_mode(PD9_PF_PS); | ||
407 | imx_gpio_mode(PD10_PF_SPL_SPR); | ||
408 | } | ||
409 | } | ||
410 | |||
411 | #ifdef CONFIG_PM | 488 | #ifdef CONFIG_PM |
412 | /* | 489 | /* |
413 | * Power management hooks. Note that we won't be called from IRQ context, | 490 | * Power management hooks. Note that we won't be called from IRQ context, |
@@ -416,7 +493,8 @@ static void imxfb_setup_gpio(struct imxfb_info *fbi) | |||
416 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) | 493 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
417 | { | 494 | { |
418 | struct imxfb_info *fbi = platform_get_drvdata(dev); | 495 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
419 | pr_debug("%s\n",__func__); | 496 | |
497 | pr_debug("%s\n", __func__); | ||
420 | 498 | ||
421 | imxfb_disable_controller(fbi); | 499 | imxfb_disable_controller(fbi); |
422 | return 0; | 500 | return 0; |
@@ -425,7 +503,8 @@ static int imxfb_suspend(struct platform_device *dev, pm_message_t state) | |||
425 | static int imxfb_resume(struct platform_device *dev) | 503 | static int imxfb_resume(struct platform_device *dev) |
426 | { | 504 | { |
427 | struct imxfb_info *fbi = platform_get_drvdata(dev); | 505 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
428 | pr_debug("%s\n",__func__); | 506 | |
507 | pr_debug("%s\n", __func__); | ||
429 | 508 | ||
430 | imxfb_enable_controller(fbi); | 509 | imxfb_enable_controller(fbi); |
431 | return 0; | 510 | return 0; |
@@ -435,149 +514,136 @@ static int imxfb_resume(struct platform_device *dev) | |||
435 | #define imxfb_resume NULL | 514 | #define imxfb_resume NULL |
436 | #endif | 515 | #endif |
437 | 516 | ||
438 | static int __init imxfb_init_fbinfo(struct device *dev) | 517 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
439 | { | 518 | { |
440 | struct imxfb_mach_info *inf = dev->platform_data; | 519 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
441 | struct fb_info *info = dev_get_drvdata(dev); | 520 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
442 | struct imxfb_info *fbi = info->par; | 521 | struct imxfb_info *fbi = info->par; |
443 | 522 | ||
444 | pr_debug("%s\n",__func__); | 523 | pr_debug("%s\n",__func__); |
445 | 524 | ||
446 | info->pseudo_palette = kmalloc( sizeof(u32) * 16, GFP_KERNEL); | 525 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
447 | if (!info->pseudo_palette) | 526 | if (!info->pseudo_palette) |
448 | return -ENOMEM; | 527 | return -ENOMEM; |
449 | 528 | ||
450 | memset(fbi, 0, sizeof(struct imxfb_info)); | 529 | memset(fbi, 0, sizeof(struct imxfb_info)); |
451 | fbi->dev = dev; | ||
452 | 530 | ||
453 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | 531 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); |
454 | 532 | ||
455 | info->fix.type = FB_TYPE_PACKED_PIXELS; | 533 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
456 | info->fix.type_aux = 0; | 534 | info->fix.type_aux = 0; |
457 | info->fix.xpanstep = 0; | 535 | info->fix.xpanstep = 0; |
458 | info->fix.ypanstep = 0; | 536 | info->fix.ypanstep = 0; |
459 | info->fix.ywrapstep = 0; | 537 | info->fix.ywrapstep = 0; |
460 | info->fix.accel = FB_ACCEL_NONE; | 538 | info->fix.accel = FB_ACCEL_NONE; |
461 | 539 | ||
462 | info->var.nonstd = 0; | 540 | info->var.nonstd = 0; |
463 | info->var.activate = FB_ACTIVATE_NOW; | 541 | info->var.activate = FB_ACTIVATE_NOW; |
464 | info->var.height = -1; | 542 | info->var.height = -1; |
465 | info->var.width = -1; | 543 | info->var.width = -1; |
466 | info->var.accel_flags = 0; | 544 | info->var.accel_flags = 0; |
467 | info->var.vmode = FB_VMODE_NONINTERLACED; | 545 | info->var.vmode = FB_VMODE_NONINTERLACED; |
468 | 546 | ||
469 | info->fbops = &imxfb_ops; | 547 | info->fbops = &imxfb_ops; |
470 | info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST; | 548 | info->flags = FBINFO_FLAG_DEFAULT | |
471 | 549 | FBINFO_READS_FAST; | |
472 | fbi->rgb[RGB_16] = &def_rgb_16; | 550 | |
473 | fbi->rgb[RGB_8] = &def_rgb_8; | 551 | fbi->max_xres = pdata->xres; |
474 | 552 | info->var.xres = pdata->xres; | |
475 | fbi->max_xres = inf->xres; | 553 | info->var.xres_virtual = pdata->xres; |
476 | info->var.xres = inf->xres; | 554 | fbi->max_yres = pdata->yres; |
477 | info->var.xres_virtual = inf->xres; | 555 | info->var.yres = pdata->yres; |
478 | fbi->max_yres = inf->yres; | 556 | info->var.yres_virtual = pdata->yres; |
479 | info->var.yres = inf->yres; | 557 | fbi->max_bpp = pdata->bpp; |
480 | info->var.yres_virtual = inf->yres; | 558 | info->var.bits_per_pixel = pdata->bpp; |
481 | fbi->max_bpp = inf->bpp; | 559 | info->var.nonstd = pdata->nonstd; |
482 | info->var.bits_per_pixel = inf->bpp; | 560 | info->var.pixclock = pdata->pixclock; |
483 | info->var.nonstd = inf->nonstd; | 561 | info->var.hsync_len = pdata->hsync_len; |
484 | info->var.pixclock = inf->pixclock; | 562 | info->var.left_margin = pdata->left_margin; |
485 | info->var.hsync_len = inf->hsync_len; | 563 | info->var.right_margin = pdata->right_margin; |
486 | info->var.left_margin = inf->left_margin; | 564 | info->var.vsync_len = pdata->vsync_len; |
487 | info->var.right_margin = inf->right_margin; | 565 | info->var.upper_margin = pdata->upper_margin; |
488 | info->var.vsync_len = inf->vsync_len; | 566 | info->var.lower_margin = pdata->lower_margin; |
489 | info->var.upper_margin = inf->upper_margin; | 567 | info->var.sync = pdata->sync; |
490 | info->var.lower_margin = inf->lower_margin; | 568 | info->var.grayscale = pdata->cmap_greyscale; |
491 | info->var.sync = inf->sync; | 569 | fbi->cmap_inverse = pdata->cmap_inverse; |
492 | info->var.grayscale = inf->cmap_greyscale; | 570 | fbi->cmap_static = pdata->cmap_static; |
493 | fbi->cmap_inverse = inf->cmap_inverse; | 571 | fbi->pcr = pdata->pcr; |
494 | fbi->cmap_static = inf->cmap_static; | 572 | fbi->lscr1 = pdata->lscr1; |
495 | fbi->pcr = inf->pcr; | 573 | fbi->dmacr = pdata->dmacr; |
496 | fbi->lscr1 = inf->lscr1; | 574 | fbi->pwmr = pdata->pwmr; |
497 | fbi->dmacr = inf->dmacr; | 575 | fbi->lcd_power = pdata->lcd_power; |
498 | fbi->pwmr = inf->pwmr; | 576 | fbi->backlight_power = pdata->backlight_power; |
499 | fbi->lcd_power = inf->lcd_power; | ||
500 | fbi->backlight_power = inf->backlight_power; | ||
501 | info->fix.smem_len = fbi->max_xres * fbi->max_yres * | 577 | info->fix.smem_len = fbi->max_xres * fbi->max_yres * |
502 | fbi->max_bpp / 8; | 578 | fbi->max_bpp / 8; |
503 | 579 | ||
504 | return 0; | 580 | return 0; |
505 | } | 581 | } |
506 | 582 | ||
507 | /* | ||
508 | * Allocates the DRAM memory for the frame buffer. This buffer is | ||
509 | * remapped into a non-cached, non-buffered, memory region to | ||
510 | * allow pixel writes to occur without flushing the cache. | ||
511 | * Once this area is remapped, all virtual memory access to the | ||
512 | * video memory should occur at the new region. | ||
513 | */ | ||
514 | static int __init imxfb_map_video_memory(struct fb_info *info) | ||
515 | { | ||
516 | struct imxfb_info *fbi = info->par; | ||
517 | |||
518 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); | ||
519 | fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, | ||
520 | &fbi->map_dma,GFP_KERNEL); | ||
521 | |||
522 | if (fbi->map_cpu) { | ||
523 | info->screen_base = fbi->map_cpu; | ||
524 | fbi->screen_cpu = fbi->map_cpu; | ||
525 | fbi->screen_dma = fbi->map_dma; | ||
526 | info->fix.smem_start = fbi->screen_dma; | ||
527 | } | ||
528 | |||
529 | return fbi->map_cpu ? 0 : -ENOMEM; | ||
530 | } | ||
531 | |||
532 | static int __init imxfb_probe(struct platform_device *pdev) | 583 | static int __init imxfb_probe(struct platform_device *pdev) |
533 | { | 584 | { |
534 | struct imxfb_info *fbi; | 585 | struct imxfb_info *fbi; |
535 | struct fb_info *info; | 586 | struct fb_info *info; |
536 | struct imxfb_mach_info *inf; | 587 | struct imx_fb_platform_data *pdata; |
537 | struct resource *res; | 588 | struct resource *res; |
538 | int ret; | 589 | int ret; |
539 | 590 | ||
540 | printk("i.MX Framebuffer driver\n"); | 591 | printk("i.MX Framebuffer driver\n"); |
541 | 592 | ||
542 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 593 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
543 | if(!res) | 594 | if (!res) |
544 | return -ENODEV; | 595 | return -ENODEV; |
545 | 596 | ||
546 | inf = pdev->dev.platform_data; | 597 | pdata = pdev->dev.platform_data; |
547 | if(!inf) { | 598 | if (!pdata) { |
548 | dev_err(&pdev->dev,"No platform_data available\n"); | 599 | dev_err(&pdev->dev,"No platform_data available\n"); |
549 | return -ENOMEM; | 600 | return -ENOMEM; |
550 | } | 601 | } |
551 | 602 | ||
552 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); | 603 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
553 | if(!info) | 604 | if (!info) |
554 | return -ENOMEM; | 605 | return -ENOMEM; |
555 | 606 | ||
556 | fbi = info->par; | 607 | fbi = info->par; |
557 | 608 | ||
558 | platform_set_drvdata(pdev, info); | 609 | platform_set_drvdata(pdev, info); |
559 | 610 | ||
560 | ret = imxfb_init_fbinfo(&pdev->dev); | 611 | ret = imxfb_init_fbinfo(pdev); |
561 | if( ret < 0 ) | 612 | if (ret < 0) |
562 | goto failed_init; | 613 | goto failed_init; |
563 | 614 | ||
564 | res = request_mem_region(res->start, res->end - res->start + 1, "IMXFB"); | 615 | res = request_mem_region(res->start, resource_size(res), |
616 | DRIVER_NAME); | ||
565 | if (!res) { | 617 | if (!res) { |
566 | ret = -EBUSY; | 618 | ret = -EBUSY; |
567 | goto failed_regs; | 619 | goto failed_req; |
620 | } | ||
621 | |||
622 | fbi->regs = ioremap(res->start, resource_size(res)); | ||
623 | if (fbi->regs == NULL) { | ||
624 | printk(KERN_ERR"Cannot map frame buffer registers\n"); | ||
625 | goto failed_ioremap; | ||
568 | } | 626 | } |
569 | 627 | ||
570 | if (!inf->fixed_screen_cpu) { | 628 | if (!pdata->fixed_screen_cpu) { |
571 | ret = imxfb_map_video_memory(info); | 629 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
572 | if (ret) { | 630 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, |
631 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | ||
632 | |||
633 | if (!fbi->map_cpu) { | ||
573 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); | 634 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
574 | ret = -ENOMEM; | 635 | ret = -ENOMEM; |
575 | goto failed_map; | 636 | goto failed_map; |
576 | } | 637 | } |
638 | |||
639 | info->screen_base = fbi->map_cpu; | ||
640 | fbi->screen_cpu = fbi->map_cpu; | ||
641 | fbi->screen_dma = fbi->map_dma; | ||
642 | info->fix.smem_start = fbi->screen_dma; | ||
577 | } else { | 643 | } else { |
578 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | 644 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ |
579 | fbi->map_cpu = inf->fixed_screen_cpu; | 645 | fbi->map_cpu = pdata->fixed_screen_cpu; |
580 | fbi->map_dma = inf->fixed_screen_dma; | 646 | fbi->map_dma = pdata->fixed_screen_dma; |
581 | info->screen_base = fbi->map_cpu; | 647 | info->screen_base = fbi->map_cpu; |
582 | fbi->screen_cpu = fbi->map_cpu; | 648 | fbi->screen_cpu = fbi->map_cpu; |
583 | fbi->screen_dma = fbi->map_dma; | 649 | fbi->screen_dma = fbi->map_dma; |
@@ -590,12 +656,10 @@ static int __init imxfb_probe(struct platform_device *pdev) | |||
590 | */ | 656 | */ |
591 | imxfb_check_var(&info->var, info); | 657 | imxfb_check_var(&info->var, info); |
592 | 658 | ||
593 | ret = fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0); | 659 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
594 | if (ret < 0) | 660 | if (ret < 0) |
595 | goto failed_cmap; | 661 | goto failed_cmap; |
596 | 662 | ||
597 | imxfb_setup_gpio(fbi); | ||
598 | |||
599 | imxfb_set_par(info); | 663 | imxfb_set_par(info); |
600 | ret = register_framebuffer(info); | 664 | ret = register_framebuffer(info); |
601 | if (ret < 0) { | 665 | if (ret < 0) { |
@@ -610,20 +674,22 @@ static int __init imxfb_probe(struct platform_device *pdev) | |||
610 | failed_register: | 674 | failed_register: |
611 | fb_dealloc_cmap(&info->cmap); | 675 | fb_dealloc_cmap(&info->cmap); |
612 | failed_cmap: | 676 | failed_cmap: |
613 | if (!inf->fixed_screen_cpu) | 677 | if (!pdata->fixed_screen_cpu) |
614 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, | 678 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
615 | fbi->map_dma); | 679 | fbi->map_dma); |
616 | failed_map: | 680 | failed_map: |
617 | kfree(info->pseudo_palette); | 681 | iounmap(fbi->regs); |
618 | failed_regs: | 682 | failed_ioremap: |
619 | release_mem_region(res->start, res->end - res->start); | 683 | release_mem_region(res->start, res->end - res->start); |
684 | failed_req: | ||
685 | kfree(info->pseudo_palette); | ||
620 | failed_init: | 686 | failed_init: |
621 | platform_set_drvdata(pdev, NULL); | 687 | platform_set_drvdata(pdev, NULL); |
622 | framebuffer_release(info); | 688 | framebuffer_release(info); |
623 | return ret; | 689 | return ret; |
624 | } | 690 | } |
625 | 691 | ||
626 | static int imxfb_remove(struct platform_device *pdev) | 692 | static int __devexit imxfb_remove(struct platform_device *pdev) |
627 | { | 693 | { |
628 | struct fb_info *info = platform_get_drvdata(pdev); | 694 | struct fb_info *info = platform_get_drvdata(pdev); |
629 | struct imxfb_info *fbi = info->par; | 695 | struct imxfb_info *fbi = info->par; |
@@ -639,6 +705,7 @@ static int imxfb_remove(struct platform_device *pdev) | |||
639 | kfree(info->pseudo_palette); | 705 | kfree(info->pseudo_palette); |
640 | framebuffer_release(info); | 706 | framebuffer_release(info); |
641 | 707 | ||
708 | iounmap(fbi->regs); | ||
642 | release_mem_region(res->start, res->end - res->start + 1); | 709 | release_mem_region(res->start, res->end - res->start + 1); |
643 | platform_set_drvdata(pdev, NULL); | 710 | platform_set_drvdata(pdev, NULL); |
644 | 711 | ||
@@ -653,19 +720,18 @@ void imxfb_shutdown(struct platform_device * dev) | |||
653 | } | 720 | } |
654 | 721 | ||
655 | static struct platform_driver imxfb_driver = { | 722 | static struct platform_driver imxfb_driver = { |
656 | .probe = imxfb_probe, | ||
657 | .suspend = imxfb_suspend, | 723 | .suspend = imxfb_suspend, |
658 | .resume = imxfb_resume, | 724 | .resume = imxfb_resume, |
659 | .remove = imxfb_remove, | 725 | .remove = __devexit_p(imxfb_remove), |
660 | .shutdown = imxfb_shutdown, | 726 | .shutdown = imxfb_shutdown, |
661 | .driver = { | 727 | .driver = { |
662 | .name = "imx-fb", | 728 | .name = DRIVER_NAME, |
663 | }, | 729 | }, |
664 | }; | 730 | }; |
665 | 731 | ||
666 | int __init imxfb_init(void) | 732 | int __init imxfb_init(void) |
667 | { | 733 | { |
668 | return platform_driver_register(&imxfb_driver); | 734 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
669 | } | 735 | } |
670 | 736 | ||
671 | static void __exit imxfb_cleanup(void) | 737 | static void __exit imxfb_cleanup(void) |
diff --git a/drivers/video/imxfb.h b/drivers/video/imxfb.h deleted file mode 100644 index e837a8b48eb8..000000000000 --- a/drivers/video/imxfb.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/imxfb.h | ||
3 | * | ||
4 | * Freescale i.MX Frame Buffer device driver | ||
5 | * | ||
6 | * Copyright (C) 2004 S.Hauer, Pengutronix | ||
7 | * | ||
8 | * Copyright (C) 1999 Eric A. Thomas | ||
9 | * Based on acornfb.c Copyright (C) Russell King. | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file COPYING in the main directory of this archive | ||
13 | * for more details. | ||
14 | */ | ||
15 | |||
16 | /* | ||
17 | * These are the bitfields for each | ||
18 | * display depth that we support. | ||
19 | */ | ||
20 | struct imxfb_rgb { | ||
21 | struct fb_bitfield red; | ||
22 | struct fb_bitfield green; | ||
23 | struct fb_bitfield blue; | ||
24 | struct fb_bitfield transp; | ||
25 | }; | ||
26 | |||
27 | #define RGB_16 (0) | ||
28 | #define RGB_8 (1) | ||
29 | #define NR_RGB 2 | ||
30 | |||
31 | struct imxfb_info { | ||
32 | struct device *dev; | ||
33 | struct imxfb_rgb *rgb[NR_RGB]; | ||
34 | |||
35 | u_int max_bpp; | ||
36 | u_int max_xres; | ||
37 | u_int max_yres; | ||
38 | |||
39 | /* | ||
40 | * These are the addresses we mapped | ||
41 | * the framebuffer memory region to. | ||
42 | */ | ||
43 | dma_addr_t map_dma; | ||
44 | u_char * map_cpu; | ||
45 | u_int map_size; | ||
46 | |||
47 | u_char * screen_cpu; | ||
48 | dma_addr_t screen_dma; | ||
49 | u_int palette_size; | ||
50 | |||
51 | dma_addr_t dbar1; | ||
52 | dma_addr_t dbar2; | ||
53 | |||
54 | u_int pcr; | ||
55 | u_int pwmr; | ||
56 | u_int lscr1; | ||
57 | u_int dmacr; | ||
58 | u_int cmap_inverse:1, | ||
59 | cmap_static:1, | ||
60 | unused:30; | ||
61 | |||
62 | void (*lcd_power)(int); | ||
63 | void (*backlight_power)(int); | ||
64 | }; | ||
65 | |||
66 | #define IMX_NAME "IMX" | ||
67 | |||
68 | /* | ||
69 | * Minimum X and Y resolutions | ||
70 | */ | ||
71 | #define MIN_XRES 64 | ||
72 | #define MIN_YRES 64 | ||
73 | |||
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 9d77b1d7dca8..e26f54952892 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h | |||
@@ -319,6 +319,7 @@ enum | |||
319 | { | 319 | { |
320 | NAPI_STATE_SCHED, /* Poll is scheduled */ | 320 | NAPI_STATE_SCHED, /* Poll is scheduled */ |
321 | NAPI_STATE_DISABLE, /* Disable pending */ | 321 | NAPI_STATE_DISABLE, /* Disable pending */ |
322 | NAPI_STATE_NPSVC, /* Netpoll - don't dequeue from poll_list */ | ||
322 | }; | 323 | }; |
323 | 324 | ||
324 | extern void __napi_schedule(struct napi_struct *n); | 325 | extern void __napi_schedule(struct napi_struct *n); |
@@ -1497,6 +1498,12 @@ static inline void netif_rx_complete(struct net_device *dev, | |||
1497 | { | 1498 | { |
1498 | unsigned long flags; | 1499 | unsigned long flags; |
1499 | 1500 | ||
1501 | /* | ||
1502 | * don't let napi dequeue from the cpu poll list | ||
1503 | * just in case its running on a different cpu | ||
1504 | */ | ||
1505 | if (unlikely(test_bit(NAPI_STATE_NPSVC, &napi->state))) | ||
1506 | return; | ||
1500 | local_irq_save(flags); | 1507 | local_irq_save(flags); |
1501 | __netif_rx_complete(dev, napi); | 1508 | __netif_rx_complete(dev, napi); |
1502 | local_irq_restore(flags); | 1509 | local_irq_restore(flags); |
diff --git a/include/linux/smp.h b/include/linux/smp.h index 3f9a60043a97..6e7ba16ff454 100644 --- a/include/linux/smp.h +++ b/include/linux/smp.h | |||
@@ -146,6 +146,8 @@ static inline void smp_send_reschedule(int cpu) { } | |||
146 | }) | 146 | }) |
147 | #define smp_call_function_mask(mask, func, info, wait) \ | 147 | #define smp_call_function_mask(mask, func, info, wait) \ |
148 | (up_smp_call_function(func, info)) | 148 | (up_smp_call_function(func, info)) |
149 | #define smp_call_function_many(mask, func, info, wait) \ | ||
150 | (up_smp_call_function(func, info)) | ||
149 | static inline void init_call_single_data(void) | 151 | static inline void init_call_single_data(void) |
150 | { | 152 | { |
151 | } | 153 | } |
diff --git a/include/video/radeon.h b/include/video/radeon.h index d5dcaf154ba4..1cd09cc5b169 100644 --- a/include/video/radeon.h +++ b/include/video/radeon.h | |||
@@ -525,9 +525,6 @@ | |||
525 | #define CRTC_DISPLAY_DIS (1 << 10) | 525 | #define CRTC_DISPLAY_DIS (1 << 10) |
526 | #define CRTC_CRT_ON (1 << 15) | 526 | #define CRTC_CRT_ON (1 << 15) |
527 | 527 | ||
528 | /* DSTCACHE_MODE bits constants */ | ||
529 | #define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8) | ||
530 | #define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17) | ||
531 | 528 | ||
532 | /* DSTCACHE_CTLSTAT bit constants */ | 529 | /* DSTCACHE_CTLSTAT bit constants */ |
533 | #define RB2D_DC_FLUSH_2D (1 << 0) | 530 | #define RB2D_DC_FLUSH_2D (1 << 0) |
@@ -869,10 +866,15 @@ | |||
869 | #define GMC_DST_16BPP_YVYU422 0x00000c00 | 866 | #define GMC_DST_16BPP_YVYU422 0x00000c00 |
870 | #define GMC_DST_32BPP_AYUV444 0x00000e00 | 867 | #define GMC_DST_32BPP_AYUV444 0x00000e00 |
871 | #define GMC_DST_16BPP_ARGB4444 0x00000f00 | 868 | #define GMC_DST_16BPP_ARGB4444 0x00000f00 |
869 | #define GMC_SRC_MONO 0x00000000 | ||
870 | #define GMC_SRC_MONO_LBKGD 0x00001000 | ||
871 | #define GMC_SRC_DSTCOLOR 0x00003000 | ||
872 | #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 | 872 | #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 |
873 | #define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 | 873 | #define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 |
874 | #define GMC_DP_CONVERSION_TEMP_9300 0x00008000 | 874 | #define GMC_DP_CONVERSION_TEMP_9300 0x00008000 |
875 | #define GMC_DP_CONVERSION_TEMP_6500 0x00000000 | 875 | #define GMC_DP_CONVERSION_TEMP_6500 0x00000000 |
876 | #define GMC_DP_SRC_RECT 0x02000000 | ||
877 | #define GMC_DP_SRC_HOST 0x03000000 | ||
876 | #define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 | 878 | #define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 |
877 | #define GMC_3D_FCN_EN_CLR 0x00000000 | 879 | #define GMC_3D_FCN_EN_CLR 0x00000000 |
878 | #define GMC_3D_FCN_EN_SET 0x08000000 | 880 | #define GMC_3D_FCN_EN_SET 0x08000000 |
@@ -883,9 +885,6 @@ | |||
883 | #define GMC_WRITE_MASK_LEAVE 0x00000000 | 885 | #define GMC_WRITE_MASK_LEAVE 0x00000000 |
884 | #define GMC_WRITE_MASK_SET 0x40000000 | 886 | #define GMC_WRITE_MASK_SET 0x40000000 |
885 | #define GMC_CLR_CMP_CNTL_DIS (1 << 28) | 887 | #define GMC_CLR_CMP_CNTL_DIS (1 << 28) |
886 | #define GMC_SRC_DATATYPE_MASK (3 << 12) | ||
887 | #define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12) | ||
888 | #define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) | ||
889 | #define GMC_SRC_DATATYPE_COLOR (3 << 12) | 888 | #define GMC_SRC_DATATYPE_COLOR (3 << 12) |
890 | #define ROP3_S 0x00cc0000 | 889 | #define ROP3_S 0x00cc0000 |
891 | #define ROP3_SRCCOPY 0x00cc0000 | 890 | #define ROP3_SRCCOPY 0x00cc0000 |
@@ -894,7 +893,6 @@ | |||
894 | #define DP_SRC_SOURCE_MASK (7 << 24) | 893 | #define DP_SRC_SOURCE_MASK (7 << 24) |
895 | #define GMC_BRUSH_NONE (15 << 4) | 894 | #define GMC_BRUSH_NONE (15 << 4) |
896 | #define DP_SRC_SOURCE_MEMORY (2 << 24) | 895 | #define DP_SRC_SOURCE_MEMORY (2 << 24) |
897 | #define DP_SRC_SOURCE_HOST_DATA (3 << 24) | ||
898 | #define GMC_BRUSH_SOLIDCOLOR 0x000000d0 | 896 | #define GMC_BRUSH_SOLIDCOLOR 0x000000d0 |
899 | 897 | ||
900 | /* DP_MIX bit constants */ | 898 | /* DP_MIX bit constants */ |
@@ -980,12 +978,6 @@ | |||
980 | #define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) | 978 | #define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) |
981 | #define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) | 979 | #define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) |
982 | 980 | ||
983 | /* RBBM_GUICNTL constants */ | ||
984 | #define RBBM_GUICNTL_HOST_DATA_SWAP_NONE (0 << 0) | ||
985 | #define RBBM_GUICNTL_HOST_DATA_SWAP_16BIT (1 << 0) | ||
986 | #define RBBM_GUICNTL_HOST_DATA_SWAP_32BIT (2 << 0) | ||
987 | #define RBBM_GUICNTL_HOST_DATA_SWAP_HDW (3 << 0) | ||
988 | |||
989 | /* masks */ | 981 | /* masks */ |
990 | 982 | ||
991 | #define CONFIG_MEMSIZE_MASK 0x1f000000 | 983 | #define CONFIG_MEMSIZE_MASK 0x1f000000 |
diff --git a/kernel/cgroup.c b/kernel/cgroup.c index fe00b3b983a8..8185a0f09594 100644 --- a/kernel/cgroup.c +++ b/kernel/cgroup.c | |||
@@ -702,7 +702,7 @@ static int rebind_subsystems(struct cgroupfs_root *root, | |||
702 | * any child cgroups exist. This is theoretically supportable | 702 | * any child cgroups exist. This is theoretically supportable |
703 | * but involves complex error handling, so it's being left until | 703 | * but involves complex error handling, so it's being left until |
704 | * later */ | 704 | * later */ |
705 | if (!list_empty(&cgrp->children)) | 705 | if (root->number_of_cgroups > 1) |
706 | return -EBUSY; | 706 | return -EBUSY; |
707 | 707 | ||
708 | /* Process each subsystem */ | 708 | /* Process each subsystem */ |
diff --git a/kernel/sched_clock.c b/kernel/sched_clock.c index 81787248b60f..e8ab096ddfe3 100644 --- a/kernel/sched_clock.c +++ b/kernel/sched_clock.c | |||
@@ -118,13 +118,13 @@ static u64 __update_sched_clock(struct sched_clock_data *scd, u64 now) | |||
118 | 118 | ||
119 | /* | 119 | /* |
120 | * scd->clock = clamp(scd->tick_gtod + delta, | 120 | * scd->clock = clamp(scd->tick_gtod + delta, |
121 | * max(scd->tick_gtod, scd->clock), | 121 | * max(scd->tick_gtod, scd->clock), |
122 | * max(scd->clock, scd->tick_gtod + TICK_NSEC)); | 122 | * scd->tick_gtod + TICK_NSEC); |
123 | */ | 123 | */ |
124 | 124 | ||
125 | clock = scd->tick_gtod + delta; | 125 | clock = scd->tick_gtod + delta; |
126 | min_clock = wrap_max(scd->tick_gtod, scd->clock); | 126 | min_clock = wrap_max(scd->tick_gtod, scd->clock); |
127 | max_clock = wrap_max(scd->clock, scd->tick_gtod + TICK_NSEC); | 127 | max_clock = scd->tick_gtod + TICK_NSEC; |
128 | 128 | ||
129 | clock = wrap_max(clock, min_clock); | 129 | clock = wrap_max(clock, min_clock); |
130 | clock = wrap_min(clock, max_clock); | 130 | clock = wrap_min(clock, max_clock); |
@@ -535,7 +535,7 @@ struct kmem_cache *kmem_cache_create(const char *name, size_t size, | |||
535 | struct kmem_cache *c; | 535 | struct kmem_cache *c; |
536 | 536 | ||
537 | c = slob_alloc(sizeof(struct kmem_cache), | 537 | c = slob_alloc(sizeof(struct kmem_cache), |
538 | flags, ARCH_KMALLOC_MINALIGN, -1); | 538 | GFP_KERNEL, ARCH_KMALLOC_MINALIGN, -1); |
539 | 539 | ||
540 | if (c) { | 540 | if (c) { |
541 | c->name = name; | 541 | c->name = name; |
diff --git a/net/core/netpoll.c b/net/core/netpoll.c index 6c7af390be0a..dadac6281f20 100644 --- a/net/core/netpoll.c +++ b/net/core/netpoll.c | |||
@@ -133,9 +133,11 @@ static int poll_one_napi(struct netpoll_info *npinfo, | |||
133 | 133 | ||
134 | npinfo->rx_flags |= NETPOLL_RX_DROP; | 134 | npinfo->rx_flags |= NETPOLL_RX_DROP; |
135 | atomic_inc(&trapped); | 135 | atomic_inc(&trapped); |
136 | set_bit(NAPI_STATE_NPSVC, &napi->state); | ||
136 | 137 | ||
137 | work = napi->poll(napi, budget); | 138 | work = napi->poll(napi, budget); |
138 | 139 | ||
140 | clear_bit(NAPI_STATE_NPSVC, &napi->state); | ||
139 | atomic_dec(&trapped); | 141 | atomic_dec(&trapped); |
140 | npinfo->rx_flags &= ~NETPOLL_RX_DROP; | 142 | npinfo->rx_flags &= ~NETPOLL_RX_DROP; |
141 | 143 | ||
diff --git a/net/ipv4/netfilter/nf_nat_rule.c b/net/ipv4/netfilter/nf_nat_rule.c index bea54a685109..8d489e746b21 100644 --- a/net/ipv4/netfilter/nf_nat_rule.c +++ b/net/ipv4/netfilter/nf_nat_rule.c | |||
@@ -61,7 +61,7 @@ static struct | |||
61 | static struct xt_table nat_table = { | 61 | static struct xt_table nat_table = { |
62 | .name = "nat", | 62 | .name = "nat", |
63 | .valid_hooks = NAT_VALID_HOOKS, | 63 | .valid_hooks = NAT_VALID_HOOKS, |
64 | .lock = __RW_LOCK_UNLOCKED(__nat_table.lock), | 64 | .lock = __RW_LOCK_UNLOCKED(nat_table.lock), |
65 | .me = THIS_MODULE, | 65 | .me = THIS_MODULE, |
66 | .af = AF_INET, | 66 | .af = AF_INET, |
67 | }; | 67 | }; |
diff --git a/net/ipv4/tcp_vegas.c b/net/ipv4/tcp_vegas.c index 7cd22262de3a..a453aac91bd3 100644 --- a/net/ipv4/tcp_vegas.c +++ b/net/ipv4/tcp_vegas.c | |||
@@ -40,18 +40,14 @@ | |||
40 | 40 | ||
41 | #include "tcp_vegas.h" | 41 | #include "tcp_vegas.h" |
42 | 42 | ||
43 | /* Default values of the Vegas variables, in fixed-point representation | 43 | static int alpha = 2; |
44 | * with V_PARAM_SHIFT bits to the right of the binary point. | 44 | static int beta = 4; |
45 | */ | 45 | static int gamma = 1; |
46 | #define V_PARAM_SHIFT 1 | ||
47 | static int alpha = 2<<V_PARAM_SHIFT; | ||
48 | static int beta = 4<<V_PARAM_SHIFT; | ||
49 | static int gamma = 1<<V_PARAM_SHIFT; | ||
50 | 46 | ||
51 | module_param(alpha, int, 0644); | 47 | module_param(alpha, int, 0644); |
52 | MODULE_PARM_DESC(alpha, "lower bound of packets in network (scale by 2)"); | 48 | MODULE_PARM_DESC(alpha, "lower bound of packets in network"); |
53 | module_param(beta, int, 0644); | 49 | module_param(beta, int, 0644); |
54 | MODULE_PARM_DESC(beta, "upper bound of packets in network (scale by 2)"); | 50 | MODULE_PARM_DESC(beta, "upper bound of packets in network"); |
55 | module_param(gamma, int, 0644); | 51 | module_param(gamma, int, 0644); |
56 | MODULE_PARM_DESC(gamma, "limit on increase (scale by 2)"); | 52 | MODULE_PARM_DESC(gamma, "limit on increase (scale by 2)"); |
57 | 53 | ||
@@ -172,49 +168,13 @@ static void tcp_vegas_cong_avoid(struct sock *sk, u32 ack, u32 in_flight) | |||
172 | return; | 168 | return; |
173 | } | 169 | } |
174 | 170 | ||
175 | /* The key players are v_beg_snd_una and v_beg_snd_nxt. | ||
176 | * | ||
177 | * These are so named because they represent the approximate values | ||
178 | * of snd_una and snd_nxt at the beginning of the current RTT. More | ||
179 | * precisely, they represent the amount of data sent during the RTT. | ||
180 | * At the end of the RTT, when we receive an ACK for v_beg_snd_nxt, | ||
181 | * we will calculate that (v_beg_snd_nxt - v_beg_snd_una) outstanding | ||
182 | * bytes of data have been ACKed during the course of the RTT, giving | ||
183 | * an "actual" rate of: | ||
184 | * | ||
185 | * (v_beg_snd_nxt - v_beg_snd_una) / (rtt duration) | ||
186 | * | ||
187 | * Unfortunately, v_beg_snd_una is not exactly equal to snd_una, | ||
188 | * because delayed ACKs can cover more than one segment, so they | ||
189 | * don't line up nicely with the boundaries of RTTs. | ||
190 | * | ||
191 | * Another unfortunate fact of life is that delayed ACKs delay the | ||
192 | * advance of the left edge of our send window, so that the number | ||
193 | * of bytes we send in an RTT is often less than our cwnd will allow. | ||
194 | * So we keep track of our cwnd separately, in v_beg_snd_cwnd. | ||
195 | */ | ||
196 | |||
197 | if (after(ack, vegas->beg_snd_nxt)) { | 171 | if (after(ack, vegas->beg_snd_nxt)) { |
198 | /* Do the Vegas once-per-RTT cwnd adjustment. */ | 172 | /* Do the Vegas once-per-RTT cwnd adjustment. */ |
199 | u32 old_wnd, old_snd_cwnd; | ||
200 | |||
201 | |||
202 | /* Here old_wnd is essentially the window of data that was | ||
203 | * sent during the previous RTT, and has all | ||
204 | * been acknowledged in the course of the RTT that ended | ||
205 | * with the ACK we just received. Likewise, old_snd_cwnd | ||
206 | * is the cwnd during the previous RTT. | ||
207 | */ | ||
208 | old_wnd = (vegas->beg_snd_nxt - vegas->beg_snd_una) / | ||
209 | tp->mss_cache; | ||
210 | old_snd_cwnd = vegas->beg_snd_cwnd; | ||
211 | 173 | ||
212 | /* Save the extent of the current window so we can use this | 174 | /* Save the extent of the current window so we can use this |
213 | * at the end of the next RTT. | 175 | * at the end of the next RTT. |
214 | */ | 176 | */ |
215 | vegas->beg_snd_una = vegas->beg_snd_nxt; | ||
216 | vegas->beg_snd_nxt = tp->snd_nxt; | 177 | vegas->beg_snd_nxt = tp->snd_nxt; |
217 | vegas->beg_snd_cwnd = tp->snd_cwnd; | ||
218 | 178 | ||
219 | /* We do the Vegas calculations only if we got enough RTT | 179 | /* We do the Vegas calculations only if we got enough RTT |
220 | * samples that we can be reasonably sure that we got | 180 | * samples that we can be reasonably sure that we got |
@@ -252,22 +212,14 @@ static void tcp_vegas_cong_avoid(struct sock *sk, u32 ack, u32 in_flight) | |||
252 | * | 212 | * |
253 | * This is: | 213 | * This is: |
254 | * (actual rate in segments) * baseRTT | 214 | * (actual rate in segments) * baseRTT |
255 | * We keep it as a fixed point number with | ||
256 | * V_PARAM_SHIFT bits to the right of the binary point. | ||
257 | */ | 215 | */ |
258 | target_cwnd = ((u64)old_wnd * vegas->baseRTT); | 216 | target_cwnd = tp->snd_cwnd * vegas->baseRTT / rtt; |
259 | target_cwnd <<= V_PARAM_SHIFT; | ||
260 | do_div(target_cwnd, rtt); | ||
261 | 217 | ||
262 | /* Calculate the difference between the window we had, | 218 | /* Calculate the difference between the window we had, |
263 | * and the window we would like to have. This quantity | 219 | * and the window we would like to have. This quantity |
264 | * is the "Diff" from the Arizona Vegas papers. | 220 | * is the "Diff" from the Arizona Vegas papers. |
265 | * | ||
266 | * Again, this is a fixed point number with | ||
267 | * V_PARAM_SHIFT bits to the right of the binary | ||
268 | * point. | ||
269 | */ | 221 | */ |
270 | diff = (old_wnd << V_PARAM_SHIFT) - target_cwnd; | 222 | diff = tp->snd_cwnd * (rtt-vegas->baseRTT) / vegas->baseRTT; |
271 | 223 | ||
272 | if (diff > gamma && tp->snd_ssthresh > 2 ) { | 224 | if (diff > gamma && tp->snd_ssthresh > 2 ) { |
273 | /* Going too fast. Time to slow down | 225 | /* Going too fast. Time to slow down |
@@ -282,16 +234,13 @@ static void tcp_vegas_cong_avoid(struct sock *sk, u32 ack, u32 in_flight) | |||
282 | * truncation robs us of full link | 234 | * truncation robs us of full link |
283 | * utilization. | 235 | * utilization. |
284 | */ | 236 | */ |
285 | tp->snd_cwnd = min(tp->snd_cwnd, | 237 | tp->snd_cwnd = min(tp->snd_cwnd, (u32)target_cwnd+1); |
286 | ((u32)target_cwnd >> | ||
287 | V_PARAM_SHIFT)+1); | ||
288 | 238 | ||
289 | } else if (tp->snd_cwnd <= tp->snd_ssthresh) { | 239 | } else if (tp->snd_cwnd <= tp->snd_ssthresh) { |
290 | /* Slow start. */ | 240 | /* Slow start. */ |
291 | tcp_slow_start(tp); | 241 | tcp_slow_start(tp); |
292 | } else { | 242 | } else { |
293 | /* Congestion avoidance. */ | 243 | /* Congestion avoidance. */ |
294 | u32 next_snd_cwnd; | ||
295 | 244 | ||
296 | /* Figure out where we would like cwnd | 245 | /* Figure out where we would like cwnd |
297 | * to be. | 246 | * to be. |
@@ -300,26 +249,17 @@ static void tcp_vegas_cong_avoid(struct sock *sk, u32 ack, u32 in_flight) | |||
300 | /* The old window was too fast, so | 249 | /* The old window was too fast, so |
301 | * we slow down. | 250 | * we slow down. |
302 | */ | 251 | */ |
303 | next_snd_cwnd = old_snd_cwnd - 1; | 252 | tp->snd_cwnd--; |
304 | } else if (diff < alpha) { | 253 | } else if (diff < alpha) { |
305 | /* We don't have enough extra packets | 254 | /* We don't have enough extra packets |
306 | * in the network, so speed up. | 255 | * in the network, so speed up. |
307 | */ | 256 | */ |
308 | next_snd_cwnd = old_snd_cwnd + 1; | 257 | tp->snd_cwnd++; |
309 | } else { | 258 | } else { |
310 | /* Sending just as fast as we | 259 | /* Sending just as fast as we |
311 | * should be. | 260 | * should be. |
312 | */ | 261 | */ |
313 | next_snd_cwnd = old_snd_cwnd; | ||
314 | } | 262 | } |
315 | |||
316 | /* Adjust cwnd upward or downward, toward the | ||
317 | * desired value. | ||
318 | */ | ||
319 | if (next_snd_cwnd > tp->snd_cwnd) | ||
320 | tp->snd_cwnd++; | ||
321 | else if (next_snd_cwnd < tp->snd_cwnd) | ||
322 | tp->snd_cwnd--; | ||
323 | } | 263 | } |
324 | 264 | ||
325 | if (tp->snd_cwnd < 2) | 265 | if (tp->snd_cwnd < 2) |
diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c index 172438320eec..d0f54d18e19b 100644 --- a/net/ipv6/ndisc.c +++ b/net/ipv6/ndisc.c | |||
@@ -912,8 +912,13 @@ static void ndisc_recv_na(struct sk_buff *skb) | |||
912 | is invalid, but ndisc specs say nothing | 912 | is invalid, but ndisc specs say nothing |
913 | about it. It could be misconfiguration, or | 913 | about it. It could be misconfiguration, or |
914 | an smart proxy agent tries to help us :-) | 914 | an smart proxy agent tries to help us :-) |
915 | |||
916 | We should not print the error if NA has been | ||
917 | received from loopback - it is just our own | ||
918 | unsolicited advertisement. | ||
915 | */ | 919 | */ |
916 | ND_PRINTK1(KERN_WARNING | 920 | if (skb->pkt_type != PACKET_LOOPBACK) |
921 | ND_PRINTK1(KERN_WARNING | ||
917 | "ICMPv6 NA: someone advertises our address on %s!\n", | 922 | "ICMPv6 NA: someone advertises our address on %s!\n", |
918 | ifp->idev->dev->name); | 923 | ifp->idev->dev->name); |
919 | in6_ifa_put(ifp); | 924 | in6_ifa_put(ifp); |
diff --git a/net/netlabel/netlabel_unlabeled.c b/net/netlabel/netlabel_unlabeled.c index 90c8506a0aac..8c0308032178 100644 --- a/net/netlabel/netlabel_unlabeled.c +++ b/net/netlabel/netlabel_unlabeled.c | |||
@@ -562,7 +562,6 @@ static int netlbl_unlhsh_remove_addr4(struct net *net, | |||
562 | const struct in_addr *mask, | 562 | const struct in_addr *mask, |
563 | struct netlbl_audit *audit_info) | 563 | struct netlbl_audit *audit_info) |
564 | { | 564 | { |
565 | int ret_val = 0; | ||
566 | struct netlbl_af4list *list_entry; | 565 | struct netlbl_af4list *list_entry; |
567 | struct netlbl_unlhsh_addr4 *entry; | 566 | struct netlbl_unlhsh_addr4 *entry; |
568 | struct audit_buffer *audit_buf; | 567 | struct audit_buffer *audit_buf; |
@@ -577,7 +576,7 @@ static int netlbl_unlhsh_remove_addr4(struct net *net, | |||
577 | if (list_entry != NULL) | 576 | if (list_entry != NULL) |
578 | entry = netlbl_unlhsh_addr4_entry(list_entry); | 577 | entry = netlbl_unlhsh_addr4_entry(list_entry); |
579 | else | 578 | else |
580 | ret_val = -ENOENT; | 579 | entry = NULL; |
581 | 580 | ||
582 | audit_buf = netlbl_audit_start_common(AUDIT_MAC_UNLBL_STCDEL, | 581 | audit_buf = netlbl_audit_start_common(AUDIT_MAC_UNLBL_STCDEL, |
583 | audit_info); | 582 | audit_info); |
@@ -588,19 +587,21 @@ static int netlbl_unlhsh_remove_addr4(struct net *net, | |||
588 | addr->s_addr, mask->s_addr); | 587 | addr->s_addr, mask->s_addr); |
589 | if (dev != NULL) | 588 | if (dev != NULL) |
590 | dev_put(dev); | 589 | dev_put(dev); |
591 | if (entry && security_secid_to_secctx(entry->secid, | 590 | if (entry != NULL && |
592 | &secctx, | 591 | security_secid_to_secctx(entry->secid, |
593 | &secctx_len) == 0) { | 592 | &secctx, &secctx_len) == 0) { |
594 | audit_log_format(audit_buf, " sec_obj=%s", secctx); | 593 | audit_log_format(audit_buf, " sec_obj=%s", secctx); |
595 | security_release_secctx(secctx, secctx_len); | 594 | security_release_secctx(secctx, secctx_len); |
596 | } | 595 | } |
597 | audit_log_format(audit_buf, " res=%u", ret_val == 0 ? 1 : 0); | 596 | audit_log_format(audit_buf, " res=%u", entry != NULL ? 1 : 0); |
598 | audit_log_end(audit_buf); | 597 | audit_log_end(audit_buf); |
599 | } | 598 | } |
600 | 599 | ||
601 | if (ret_val == 0) | 600 | if (entry == NULL) |
602 | call_rcu(&entry->rcu, netlbl_unlhsh_free_addr4); | 601 | return -ENOENT; |
603 | return ret_val; | 602 | |
603 | call_rcu(&entry->rcu, netlbl_unlhsh_free_addr4); | ||
604 | return 0; | ||
604 | } | 605 | } |
605 | 606 | ||
606 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | 607 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) |
@@ -624,7 +625,6 @@ static int netlbl_unlhsh_remove_addr6(struct net *net, | |||
624 | const struct in6_addr *mask, | 625 | const struct in6_addr *mask, |
625 | struct netlbl_audit *audit_info) | 626 | struct netlbl_audit *audit_info) |
626 | { | 627 | { |
627 | int ret_val = 0; | ||
628 | struct netlbl_af6list *list_entry; | 628 | struct netlbl_af6list *list_entry; |
629 | struct netlbl_unlhsh_addr6 *entry; | 629 | struct netlbl_unlhsh_addr6 *entry; |
630 | struct audit_buffer *audit_buf; | 630 | struct audit_buffer *audit_buf; |
@@ -638,7 +638,7 @@ static int netlbl_unlhsh_remove_addr6(struct net *net, | |||
638 | if (list_entry != NULL) | 638 | if (list_entry != NULL) |
639 | entry = netlbl_unlhsh_addr6_entry(list_entry); | 639 | entry = netlbl_unlhsh_addr6_entry(list_entry); |
640 | else | 640 | else |
641 | ret_val = -ENOENT; | 641 | entry = NULL; |
642 | 642 | ||
643 | audit_buf = netlbl_audit_start_common(AUDIT_MAC_UNLBL_STCDEL, | 643 | audit_buf = netlbl_audit_start_common(AUDIT_MAC_UNLBL_STCDEL, |
644 | audit_info); | 644 | audit_info); |
@@ -649,19 +649,21 @@ static int netlbl_unlhsh_remove_addr6(struct net *net, | |||
649 | addr, mask); | 649 | addr, mask); |
650 | if (dev != NULL) | 650 | if (dev != NULL) |
651 | dev_put(dev); | 651 | dev_put(dev); |
652 | if (entry && security_secid_to_secctx(entry->secid, | 652 | if (entry != NULL && |
653 | &secctx, | 653 | security_secid_to_secctx(entry->secid, |
654 | &secctx_len) == 0) { | 654 | &secctx, &secctx_len) == 0) { |
655 | audit_log_format(audit_buf, " sec_obj=%s", secctx); | 655 | audit_log_format(audit_buf, " sec_obj=%s", secctx); |
656 | security_release_secctx(secctx, secctx_len); | 656 | security_release_secctx(secctx, secctx_len); |
657 | } | 657 | } |
658 | audit_log_format(audit_buf, " res=%u", ret_val == 0 ? 1 : 0); | 658 | audit_log_format(audit_buf, " res=%u", entry != NULL ? 1 : 0); |
659 | audit_log_end(audit_buf); | 659 | audit_log_end(audit_buf); |
660 | } | 660 | } |
661 | 661 | ||
662 | if (ret_val == 0) | 662 | if (entry == NULL) |
663 | call_rcu(&entry->rcu, netlbl_unlhsh_free_addr6); | 663 | return -ENOENT; |
664 | return ret_val; | 664 | |
665 | call_rcu(&entry->rcu, netlbl_unlhsh_free_addr6); | ||
666 | return 0; | ||
665 | } | 667 | } |
666 | #endif /* IPv6 */ | 668 | #endif /* IPv6 */ |
667 | 669 | ||
diff --git a/net/phonet/pep-gprs.c b/net/phonet/pep-gprs.c index 9978afbd9f2a..803eeef0aa85 100644 --- a/net/phonet/pep-gprs.c +++ b/net/phonet/pep-gprs.c | |||
@@ -155,12 +155,13 @@ static void gprs_data_ready(struct sock *sk, int len) | |||
155 | static void gprs_write_space(struct sock *sk) | 155 | static void gprs_write_space(struct sock *sk) |
156 | { | 156 | { |
157 | struct gprs_dev *dev = sk->sk_user_data; | 157 | struct gprs_dev *dev = sk->sk_user_data; |
158 | struct net_device *net = dev->net; | ||
158 | unsigned credits = pep_writeable(sk); | 159 | unsigned credits = pep_writeable(sk); |
159 | 160 | ||
160 | spin_lock_bh(&dev->tx_lock); | 161 | spin_lock_bh(&dev->tx_lock); |
161 | dev->tx_max = credits; | 162 | dev->tx_max = credits; |
162 | if (credits > skb_queue_len(&dev->tx_queue)) | 163 | if (credits > skb_queue_len(&dev->tx_queue) && netif_running(net)) |
163 | netif_wake_queue(dev->net); | 164 | netif_wake_queue(net); |
164 | spin_unlock_bh(&dev->tx_lock); | 165 | spin_unlock_bh(&dev->tx_lock); |
165 | } | 166 | } |
166 | 167 | ||
@@ -168,6 +169,23 @@ static void gprs_write_space(struct sock *sk) | |||
168 | * Network device callbacks | 169 | * Network device callbacks |
169 | */ | 170 | */ |
170 | 171 | ||
172 | static int gprs_open(struct net_device *dev) | ||
173 | { | ||
174 | struct gprs_dev *gp = netdev_priv(dev); | ||
175 | |||
176 | gprs_write_space(gp->sk); | ||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static int gprs_close(struct net_device *dev) | ||
181 | { | ||
182 | struct gprs_dev *gp = netdev_priv(dev); | ||
183 | |||
184 | netif_stop_queue(dev); | ||
185 | flush_work(&gp->tx_work); | ||
186 | return 0; | ||
187 | } | ||
188 | |||
171 | static int gprs_xmit(struct sk_buff *skb, struct net_device *net) | 189 | static int gprs_xmit(struct sk_buff *skb, struct net_device *net) |
172 | { | 190 | { |
173 | struct gprs_dev *dev = netdev_priv(net); | 191 | struct gprs_dev *dev = netdev_priv(net); |
@@ -254,6 +272,8 @@ static void gprs_setup(struct net_device *net) | |||
254 | net->tx_queue_len = 10; | 272 | net->tx_queue_len = 10; |
255 | 273 | ||
256 | net->destructor = free_netdev; | 274 | net->destructor = free_netdev; |
275 | net->open = gprs_open; | ||
276 | net->stop = gprs_close; | ||
257 | net->hard_start_xmit = gprs_xmit; /* mandatory */ | 277 | net->hard_start_xmit = gprs_xmit; /* mandatory */ |
258 | net->change_mtu = gprs_set_mtu; | 278 | net->change_mtu = gprs_set_mtu; |
259 | net->get_stats = gprs_get_stats; | 279 | net->get_stats = gprs_get_stats; |
@@ -318,7 +338,6 @@ int gprs_attach(struct sock *sk) | |||
318 | dev->sk = sk; | 338 | dev->sk = sk; |
319 | 339 | ||
320 | printk(KERN_DEBUG"%s: attached\n", net->name); | 340 | printk(KERN_DEBUG"%s: attached\n", net->name); |
321 | gprs_write_space(sk); /* kick off TX */ | ||
322 | return net->ifindex; | 341 | return net->ifindex; |
323 | 342 | ||
324 | out_rel: | 343 | out_rel: |
@@ -341,7 +360,5 @@ void gprs_detach(struct sock *sk) | |||
341 | 360 | ||
342 | printk(KERN_DEBUG"%s: detached\n", net->name); | 361 | printk(KERN_DEBUG"%s: detached\n", net->name); |
343 | unregister_netdev(net); | 362 | unregister_netdev(net); |
344 | flush_scheduled_work(); | ||
345 | sock_put(sk); | 363 | sock_put(sk); |
346 | skb_queue_purge(&dev->tx_queue); | ||
347 | } | 364 | } |
diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c index a11959908d9a..98402f0efa47 100644 --- a/net/sched/sch_netem.c +++ b/net/sched/sch_netem.c | |||
@@ -46,9 +46,6 @@ | |||
46 | layering other disciplines. It does not need to do bandwidth | 46 | layering other disciplines. It does not need to do bandwidth |
47 | control either since that can be handled by using token | 47 | control either since that can be handled by using token |
48 | bucket or other rate control. | 48 | bucket or other rate control. |
49 | |||
50 | The simulator is limited by the Linux timer resolution | ||
51 | and will create packet bursts on the HZ boundary (1ms). | ||
52 | */ | 49 | */ |
53 | 50 | ||
54 | struct netem_sched_data { | 51 | struct netem_sched_data { |