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authorThomas Gleixner <tglx@linutronix.de>2008-01-30 07:30:36 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:30:36 -0500
commitae9d983be1eefac4b5efad69a188e7ac89a75797 (patch)
treeecdf7ad736e1fe98dff2277649b573135d1381fd
parentc2805aa1d8ae51c7582d2ccbd736afa545cf5cc4 (diff)
x86: cleanup smp.h variants
Bring the smp.h variants into sync to prepare merging and paravirt support. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--include/asm-x86/apic.h1
-rw-r--r--include/asm-x86/mpspec.h3
-rw-r--r--include/asm-x86/smp_32.h117
-rw-r--r--include/asm-x86/smp_64.h133
-rw-r--r--include/asm-x86/topology_64.h2
5 files changed, 104 insertions, 152 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index d0a221fa1fc3..18d932dff476 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -42,6 +42,7 @@ extern int local_apic_timer_disabled;
42 42
43extern int apic_runs_main_timer; 43extern int apic_runs_main_timer;
44extern int ioapic_force; 44extern int ioapic_force;
45extern int disable_apic;
45extern int disable_apic_timer; 46extern int disable_apic_timer;
46extern unsigned boot_cpu_id; 47extern unsigned boot_cpu_id;
47 48
diff --git a/include/asm-x86/mpspec.h b/include/asm-x86/mpspec.h
index a2a6b2ea4259..781ad74ab9e9 100644
--- a/include/asm-x86/mpspec.h
+++ b/include/asm-x86/mpspec.h
@@ -13,8 +13,11 @@ extern int quad_local_to_mp_bus_id[NR_CPUS/4][4];
13 13
14extern unsigned int def_to_bigsmp; 14extern unsigned int def_to_bigsmp;
15extern int apic_version[MAX_APICS]; 15extern int apic_version[MAX_APICS];
16extern u8 apicid_2_node[];
16extern int pic_mode; 17extern int pic_mode;
17 18
19#define MAX_APICID 256
20
18#else 21#else
19 22
20#define MAX_MP_BUSSES 256 23#define MAX_MP_BUSSES 256
diff --git a/include/asm-x86/smp_32.h b/include/asm-x86/smp_32.h
index e10b7affdfe5..c69e960429cc 100644
--- a/include/asm-x86/smp_32.h
+++ b/include/asm-x86/smp_32.h
@@ -1,51 +1,41 @@
1#ifndef __ASM_SMP_H 1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H 2#define __ASM_SMP_H
3 3
4#ifndef __ASSEMBLY__
5#include <linux/cpumask.h>
6#include <linux/init.h>
7
4/* 8/*
5 * We need the APIC definitions automatically as part of 'smp.h' 9 * We need the APIC definitions automatically as part of 'smp.h'
6 */ 10 */
7#ifndef __ASSEMBLY__ 11#ifdef CONFIG_X86_LOCAL_APIC
8#include <linux/kernel.h> 12# include <asm/mpspec.h>
9#include <linux/threads.h> 13# include <asm/apic.h>
10#include <linux/cpumask.h> 14# ifdef CONFIG_X86_IO_APIC
15# include <asm/io_apic.h>
16# endif
11#endif 17#endif
12 18
13#if defined(CONFIG_X86_LOCAL_APIC) && !defined(__ASSEMBLY__) 19extern cpumask_t cpu_callout_map;
14#include <linux/bitops.h> 20extern cpumask_t cpu_callin_map;
15#include <asm/mpspec.h>
16#include <asm/apic.h>
17#ifdef CONFIG_X86_IO_APIC
18#include <asm/io_apic.h>
19#endif
20#endif
21 21
22#define BAD_APICID 0xFFu 22extern int smp_num_siblings;
23#ifdef CONFIG_SMP 23extern unsigned int num_processors;
24#ifndef __ASSEMBLY__
25 24
26/*
27 * Private routines/data
28 */
29
30extern void smp_alloc_memory(void); 25extern void smp_alloc_memory(void);
31extern int pic_mode; 26extern void lock_ipi_call_lock(void);
32extern int smp_num_siblings; 27extern void unlock_ipi_call_lock(void);
33DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
34DECLARE_PER_CPU(cpumask_t, cpu_core_map);
35 28
36extern void (*mtrr_hook) (void); 29extern void (*mtrr_hook) (void);
37extern void zap_low_mappings (void); 30extern void zap_low_mappings (void);
38extern void lock_ipi_call_lock(void);
39extern void unlock_ipi_call_lock(void);
40 31
41#define MAX_APICID 256
42extern u8 __initdata x86_cpu_to_apicid_init[]; 32extern u8 __initdata x86_cpu_to_apicid_init[];
43extern void *x86_cpu_to_apicid_ptr; 33extern void *x86_cpu_to_apicid_ptr;
44DECLARE_PER_CPU(u8, x86_cpu_to_apicid);
45
46#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
47 34
48extern void set_cpu_sibling_map(int cpu); 35DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
36DECLARE_PER_CPU(cpumask_t, cpu_core_map);
37DECLARE_PER_CPU(u8, cpu_llc_id);
38DECLARE_PER_CPU(u8, x86_cpu_to_apicid);
49 39
50#ifdef CONFIG_HOTPLUG_CPU 40#ifdef CONFIG_HOTPLUG_CPU
51extern void cpu_exit_clear(void); 41extern void cpu_exit_clear(void);
@@ -53,6 +43,9 @@ extern void cpu_uninit(void);
53extern void remove_siblinginfo(int cpu); 43extern void remove_siblinginfo(int cpu);
54#endif 44#endif
55 45
46/* Globals due to paravirt */
47extern void set_cpu_sibling_map(int cpu);
48
56struct smp_ops 49struct smp_ops
57{ 50{
58 void (*smp_prepare_boot_cpu)(void); 51 void (*smp_prepare_boot_cpu)(void);
@@ -67,6 +60,7 @@ struct smp_ops
67 int wait); 60 int wait);
68}; 61};
69 62
63#ifdef CONFIG_SMP
70extern struct smp_ops smp_ops; 64extern struct smp_ops smp_ops;
71 65
72static inline void smp_prepare_boot_cpu(void) 66static inline void smp_prepare_boot_cpu(void)
@@ -107,10 +101,12 @@ int native_cpu_up(unsigned int cpunum);
107void native_smp_cpus_done(unsigned int max_cpus); 101void native_smp_cpus_done(unsigned int max_cpus);
108 102
109#ifndef CONFIG_PARAVIRT 103#ifndef CONFIG_PARAVIRT
110#define startup_ipi_hook(phys_apicid, start_eip, start_esp) \ 104#define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
111do { } while (0)
112#endif 105#endif
113 106
107extern int __cpu_disable(void);
108extern void __cpu_die(unsigned int cpu);
109
114/* 110/*
115 * This function is needed by all SMP systems. It must _always_ be valid 111 * This function is needed by all SMP systems. It must _always_ be valid
116 * from the initial startup. We map APIC_BASE very early in page_setup(), 112 * from the initial startup. We map APIC_BASE very early in page_setup(),
@@ -119,9 +115,11 @@ do { } while (0)
119DECLARE_PER_CPU(int, cpu_number); 115DECLARE_PER_CPU(int, cpu_number);
120#define raw_smp_processor_id() (x86_read_percpu(cpu_number)) 116#define raw_smp_processor_id() (x86_read_percpu(cpu_number))
121 117
122extern cpumask_t cpu_callout_map; 118#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
123extern cpumask_t cpu_callin_map; 119
124extern cpumask_t cpu_possible_map; 120extern int safe_smp_processor_id(void);
121
122void __cpuinit smp_store_cpu_info(int id);
125 123
126/* We don't mark CPUs online until __cpu_up(), so we need another measure */ 124/* We don't mark CPUs online until __cpu_up(), so we need another measure */
127static inline int num_booting_cpus(void) 125static inline int num_booting_cpus(void)
@@ -129,56 +127,39 @@ static inline int num_booting_cpus(void)
129 return cpus_weight(cpu_callout_map); 127 return cpus_weight(cpu_callout_map);
130} 128}
131 129
132extern int safe_smp_processor_id(void);
133extern int __cpu_disable(void);
134extern void __cpu_die(unsigned int cpu);
135extern unsigned int num_processors;
136
137void __cpuinit smp_store_cpu_info(int id);
138
139#endif /* !__ASSEMBLY__ */
140
141#else /* CONFIG_SMP */ 130#else /* CONFIG_SMP */
142 131
143#define safe_smp_processor_id() 0 132#define safe_smp_processor_id() 0
144#define cpu_physical_id(cpu) boot_cpu_physical_apicid 133#define cpu_physical_id(cpu) boot_cpu_physical_apicid
145 134
146#define NO_PROC_ID 0xFF /* No processor magic marker */ 135#endif /* !CONFIG_SMP */
147
148#endif /* CONFIG_SMP */
149
150#ifndef __ASSEMBLY__
151 136
152#ifdef CONFIG_X86_LOCAL_APIC 137#ifdef CONFIG_X86_LOCAL_APIC
153 138
154#ifdef APIC_DEFINITION 139static __inline int logical_smp_processor_id(void)
140{
141 /* we don't want to mark this access volatile - bad code generation */
142 return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
143}
144
145# ifdef APIC_DEFINITION
155extern int hard_smp_processor_id(void); 146extern int hard_smp_processor_id(void);
156#else 147# else
157#include <mach_apicdef.h> 148# include <mach_apicdef.h>
158static inline int hard_smp_processor_id(void) 149static inline int hard_smp_processor_id(void)
159{ 150{
160 /* we don't want to mark this access volatile - bad code generation */ 151 /* we don't want to mark this access volatile - bad code generation */
161 return GET_APIC_ID(*(unsigned long *)(APIC_BASE+APIC_ID)); 152 return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID));
162} 153}
163#endif /* APIC_DEFINITION */ 154# endif /* APIC_DEFINITION */
164 155
165#else /* CONFIG_X86_LOCAL_APIC */ 156#else /* CONFIG_X86_LOCAL_APIC */
166 157
167#ifndef CONFIG_SMP 158# ifndef CONFIG_SMP
168#define hard_smp_processor_id() 0 159# define hard_smp_processor_id() 0
169#endif 160# endif
170 161
171#endif /* CONFIG_X86_LOCAL_APIC */ 162#endif /* CONFIG_X86_LOCAL_APIC */
172 163
173extern u8 apicid_2_node[]; 164#endif /* !ASSEMBLY */
174
175#ifdef CONFIG_X86_LOCAL_APIC
176static __inline int logical_smp_processor_id(void)
177{
178 /* we don't want to mark this access volatile - bad code generation */
179 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
180}
181#endif
182#endif
183
184#endif 165#endif
diff --git a/include/asm-x86/smp_64.h b/include/asm-x86/smp_64.h
index ab612b0ff270..2feddda91e12 100644
--- a/include/asm-x86/smp_64.h
+++ b/include/asm-x86/smp_64.h
@@ -1,130 +1,99 @@
1#ifndef __ASM_SMP_H 1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H 2#define __ASM_SMP_H
3 3
4/*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7#include <linux/threads.h>
8#include <linux/cpumask.h> 4#include <linux/cpumask.h>
9#include <linux/bitops.h>
10#include <linux/init.h> 5#include <linux/init.h>
11extern int disable_apic;
12 6
13#include <asm/mpspec.h> 7/*
8 * We need the APIC definitions automatically as part of 'smp.h'
9 */
14#include <asm/apic.h> 10#include <asm/apic.h>
15#include <asm/io_apic.h> 11#include <asm/io_apic.h>
16#include <asm/thread_info.h> 12#include <asm/mpspec.h>
17
18#ifdef CONFIG_SMP
19
20#include <asm/pda.h> 13#include <asm/pda.h>
14#include <asm/thread_info.h>
21 15
22struct pt_regs;
23
24extern cpumask_t cpu_present_mask;
25extern cpumask_t cpu_possible_map;
26extern cpumask_t cpu_online_map;
27extern cpumask_t cpu_callout_map; 16extern cpumask_t cpu_callout_map;
28extern cpumask_t cpu_initialized; 17extern cpumask_t cpu_initialized;
29 18
30/* 19extern int smp_num_siblings;
31 * Private routines/data 20extern unsigned int num_processors;
32 */ 21
33
34extern void smp_alloc_memory(void); 22extern void smp_alloc_memory(void);
35extern volatile unsigned long smp_invalidate_needed;
36extern void lock_ipi_call_lock(void); 23extern void lock_ipi_call_lock(void);
37extern void unlock_ipi_call_lock(void); 24extern void unlock_ipi_call_lock(void);
38extern int smp_num_siblings; 25
39extern void smp_send_reschedule(int cpu);
40extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *), 26extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
41 void *info, int wait); 27 void *info, int wait);
42 28
43/* 29extern u8 __initdata x86_cpu_to_apicid_init[];
44 * cpu_sibling_map and cpu_core_map now live 30extern void *x86_cpu_to_apicid_ptr;
45 * in the per cpu area 31extern u8 bios_cpu_apicid[];
46 * 32
47 * extern cpumask_t cpu_sibling_map[NR_CPUS];
48 * extern cpumask_t cpu_core_map[NR_CPUS];
49 */
50DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 33DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
51DECLARE_PER_CPU(cpumask_t, cpu_core_map); 34DECLARE_PER_CPU(cpumask_t, cpu_core_map);
52DECLARE_PER_CPU(u8, cpu_llc_id); 35DECLARE_PER_CPU(u8, cpu_llc_id);
36DECLARE_PER_CPU(u8, x86_cpu_to_apicid);
53 37
54#define SMP_TRAMPOLINE_BASE 0x6000 38static inline int cpu_present_to_apicid(int mps_cpu)
55
56/*
57 * On x86 all CPUs are mapped 1:1 to the APIC space.
58 * This simplifies scheduling and IPI sending and
59 * compresses data structures.
60 */
61
62static inline int num_booting_cpus(void)
63{ 39{
64 return cpus_weight(cpu_callout_map); 40 if (mps_cpu < NR_CPUS)
41 return (int)bios_cpu_apicid[mps_cpu];
42 else
43 return BAD_APICID;
65} 44}
66 45
67#define raw_smp_processor_id() read_pda(cpunumber) 46#ifdef CONFIG_SMP
47
48#define SMP_TRAMPOLINE_BASE 0x6000
68 49
69extern int __cpu_disable(void); 50extern int __cpu_disable(void);
70extern void __cpu_die(unsigned int cpu); 51extern void __cpu_die(unsigned int cpu);
71extern void prefill_possible_map(void); 52extern void prefill_possible_map(void);
72extern unsigned num_processors;
73extern unsigned __cpuinitdata disabled_cpus; 53extern unsigned __cpuinitdata disabled_cpus;
74 54
75#define NO_PROC_ID 0xFF /* No processor magic marker */ 55#define raw_smp_processor_id() read_pda(cpunumber)
76 56#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
77#endif /* CONFIG_SMP */
78
79#define safe_smp_processor_id() smp_processor_id()
80 57
81static inline int hard_smp_processor_id(void) 58#define stack_smp_processor_id() \
82{ 59 ({ \
83 /* we don't want to mark this access volatile - bad code generation */ 60 struct thread_info *ti; \
84 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID)); 61 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
85} 62 ti->cpu; \
63})
86 64
87/* 65/*
88 * Some lowlevel functions might want to know about 66 * On x86 all CPUs are mapped 1:1 to the APIC space. This simplifies
89 * the real APIC ID <-> CPU # mapping. 67 * scheduling and IPI sending and compresses data structures.
90 */ 68 */
91extern u8 __initdata x86_cpu_to_apicid_init[]; 69static inline int num_booting_cpus(void)
92extern void *x86_cpu_to_apicid_ptr;
93DECLARE_PER_CPU(u8, x86_cpu_to_apicid); /* physical ID */
94extern u8 bios_cpu_apicid[];
95
96static inline int cpu_present_to_apicid(int mps_cpu)
97{ 70{
98 if (mps_cpu < NR_CPUS) 71 return cpus_weight(cpu_callout_map);
99 return (int)bios_cpu_apicid[mps_cpu];
100 else
101 return BAD_APICID;
102} 72}
103 73
104#ifndef CONFIG_SMP 74extern void smp_send_reschedule(int cpu);
75
76#else /* CONFIG_SMP */
77
78extern unsigned int boot_cpu_id;
79#define cpu_physical_id(cpu) boot_cpu_id
105#define stack_smp_processor_id() 0 80#define stack_smp_processor_id() 0
106#define cpu_logical_map(x) (x) 81
107#else 82#endif /* !CONFIG_SMP */
108#include <asm/thread_info.h> 83
109#define stack_smp_processor_id() \ 84#define safe_smp_processor_id() smp_processor_id()
110({ \
111 struct thread_info *ti; \
112 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
113 ti->cpu; \
114})
115#endif
116 85
117static __inline int logical_smp_processor_id(void) 86static __inline int logical_smp_processor_id(void)
118{ 87{
119 /* we don't want to mark this access volatile - bad code generation */ 88 /* we don't want to mark this access volatile - bad code generation */
120 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR)); 89 return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
90}
91
92static inline int hard_smp_processor_id(void)
93{
94 /* we don't want to mark this access volatile - bad code generation */
95 return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID));
121} 96}
122 97
123#ifdef CONFIG_SMP
124#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
125#else
126extern unsigned int boot_cpu_id;
127#define cpu_physical_id(cpu) boot_cpu_id
128#endif /* !CONFIG_SMP */
129#endif 98#endif
130 99
diff --git a/include/asm-x86/topology_64.h b/include/asm-x86/topology_64.h
index a718dda037e0..407b22d4e3b0 100644
--- a/include/asm-x86/topology_64.h
+++ b/include/asm-x86/topology_64.h
@@ -7,8 +7,6 @@
7#include <asm/mpspec.h> 7#include <asm/mpspec.h>
8#include <linux/bitops.h> 8#include <linux/bitops.h>
9 9
10extern cpumask_t cpu_online_map;
11
12extern unsigned char cpu_to_node[]; 10extern unsigned char cpu_to_node[];
13extern cpumask_t node_to_cpumask[]; 11extern cpumask_t node_to_cpumask[];
14 12