diff options
author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2010-02-17 02:37:45 -0500 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2010-03-07 16:17:25 -0500 |
commit | a8c39d8deb8341d15fc0eabaa9750f7a1db9d0df (patch) | |
tree | 53d90217dde532e37ee0b55c44891bfab26a3dcd | |
parent | fa0d976298b25d090fafc3460c63fee1c8eea854 (diff) |
tmio_mmc: Keep card-detect interrupts enabled
On SuperH platforms the SDHI controller does not produce any command IRQs after
a completed IO. This leads to card-detect interrupts staying disabled. Do not
disable card-detect interrupts on DATA IRQs.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r-- | drivers/mmc/host/tmio_mmc.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index 692dc23363b9..dafecfbcd91a 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h | |||
@@ -55,10 +55,8 @@ | |||
55 | /* Define some IRQ masks */ | 55 | /* Define some IRQ masks */ |
56 | /* This is the mask used at reset by the chip */ | 56 | /* This is the mask used at reset by the chip */ |
57 | #define TMIO_MASK_ALL 0x837f031d | 57 | #define TMIO_MASK_ALL 0x837f031d |
58 | #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND | \ | 58 | #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) |
59 | TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) | 59 | #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) |
60 | #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND | \ | ||
61 | TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) | ||
62 | #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ | 60 | #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ |
63 | TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) | 61 | TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) |
64 | #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) | 62 | #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) |