diff options
author | Greg Ungerer <gerg@uclinux.org> | 2009-05-19 01:00:01 -0400 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2009-09-15 19:43:52 -0400 |
commit | f6a66276f5fdc018d2a9378c71de3bae13c588d7 (patch) | |
tree | 5a6148447a9d7b379e31fc4d0b6ddedcc189f80a | |
parent | 04b75b10dceadf937e3707ecc3dfccf6a076fd29 (diff) |
m68knommu: clean up ColdFire 532x CPU timer setup
The newer ColdFire 532x family of CPU's uses the old timer, but has a
newer interrupt controller. It doesn't need the special timer setup
that was required when using the older interrupt controller. Remove the
dead timer irq and level setting code, and define the hard coded vector.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r-- | arch/m68k/include/asm/m532xsim.h | 5 | ||||
-rw-r--r-- | arch/m68knommu/platform/532x/config.c | 17 |
2 files changed, 6 insertions, 16 deletions
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 021a0e155270..36bf15aec9ae 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h | |||
@@ -66,6 +66,11 @@ | |||
66 | #define MCFSIM_ICR_TIMER1 (0xFC048040+32) | 66 | #define MCFSIM_ICR_TIMER1 (0xFC048040+32) |
67 | #define MCFSIM_ICR_TIMER2 (0xFC048040+33) | 67 | #define MCFSIM_ICR_TIMER2 (0xFC048040+33) |
68 | 68 | ||
69 | /* | ||
70 | * Define system peripheral IRQ usage. | ||
71 | */ | ||
72 | #define MCF_IRQ_TIMER (64 + 32) /* Timer0 */ | ||
73 | #define MCF_IRQ_PROFILER (64 + 33) /* Timer1 */ | ||
69 | 74 | ||
70 | /* | 75 | /* |
71 | * Define the Cache register flags. | 76 | * Define the Cache register flags. |
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c index 66e212b58b85..d632948e64e5 100644 --- a/arch/m68knommu/platform/532x/config.c +++ b/arch/m68knommu/platform/532x/config.c | |||
@@ -30,12 +30,6 @@ | |||
30 | 30 | ||
31 | /***************************************************************************/ | 31 | /***************************************************************************/ |
32 | 32 | ||
33 | extern unsigned int mcf_timervector; | ||
34 | extern unsigned int mcf_profilevector; | ||
35 | extern unsigned int mcf_timerlevel; | ||
36 | |||
37 | /***************************************************************************/ | ||
38 | |||
39 | static struct mcf_platform_uart m532x_uart_platform[] = { | 33 | static struct mcf_platform_uart m532x_uart_platform[] = { |
40 | { | 34 | { |
41 | .mapbase = MCFUART_BASE1, | 35 | .mapbase = MCFUART_BASE1, |
@@ -87,6 +81,7 @@ static struct platform_device m532x_fec = { | |||
87 | .num_resources = ARRAY_SIZE(m532x_fec_resources), | 81 | .num_resources = ARRAY_SIZE(m532x_fec_resources), |
88 | .resource = m532x_fec_resources, | 82 | .resource = m532x_fec_resources, |
89 | }; | 83 | }; |
84 | |||
90 | static struct platform_device *m532x_devices[] __initdata = { | 85 | static struct platform_device *m532x_devices[] __initdata = { |
91 | &m532x_uart, | 86 | &m532x_uart, |
92 | &m532x_fec, | 87 | &m532x_fec, |
@@ -126,12 +121,6 @@ static void __init m532x_fec_init(void) | |||
126 | 121 | ||
127 | /***************************************************************************/ | 122 | /***************************************************************************/ |
128 | 123 | ||
129 | void mcf_settimericr(unsigned int timer, unsigned int level) | ||
130 | { | ||
131 | } | ||
132 | |||
133 | /***************************************************************************/ | ||
134 | |||
135 | static void m532x_cpu_reset(void) | 124 | static void m532x_cpu_reset(void) |
136 | { | 125 | { |
137 | local_irq_disable(); | 126 | local_irq_disable(); |
@@ -153,10 +142,6 @@ void __init config_BSP(char *commandp, int size) | |||
153 | } | 142 | } |
154 | #endif | 143 | #endif |
155 | 144 | ||
156 | mcf_timervector = 64+32; | ||
157 | mcf_profilevector = 64+33; | ||
158 | mach_reset = m532x_cpu_reset; | ||
159 | |||
160 | #ifdef CONFIG_BDM_DISABLE | 145 | #ifdef CONFIG_BDM_DISABLE |
161 | /* | 146 | /* |
162 | * Disable the BDM clocking. This also turns off most of the rest of | 147 | * Disable the BDM clocking. This also turns off most of the rest of |