diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-03-18 11:19:10 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-03-18 14:31:53 -0400 |
commit | e3598f6e4218d1aad3369c97217266b2375e6aca (patch) | |
tree | c2a34a3c806ffb7001aac6a9ce52525a7da6ed15 | |
parent | da88b48b84e1a504b6a19aff9d5b8236a59e228a (diff) |
ASoC: Further optimise WM8400 bias configuration sequence
The active discharge does not bring sufficient benefit to justify the
lengthy times involved so don't do that.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r-- | sound/soc/codecs/wm8400.c | 27 |
1 files changed, 2 insertions, 25 deletions
diff --git a/sound/soc/codecs/wm8400.c b/sound/soc/codecs/wm8400.c index 744e0dc73be4..462f8b0d9ac7 100644 --- a/sound/soc/codecs/wm8400.c +++ b/sound/soc/codecs/wm8400.c | |||
@@ -1096,45 +1096,22 @@ static int wm8400_set_bias_level(struct snd_soc_codec *codec, | |||
1096 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, | 1096 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, |
1097 | WM8400_CODEC_ENA | WM8400_SYSCLK_ENA); | 1097 | WM8400_CODEC_ENA | WM8400_SYSCLK_ENA); |
1098 | 1098 | ||
1099 | /* Enable all output discharge bits */ | ||
1100 | wm8400_write(codec, WM8400_ANTIPOP1, WM8400_DIS_LLINE | | ||
1101 | WM8400_DIS_RLINE | WM8400_DIS_OUT3 | | ||
1102 | WM8400_DIS_OUT4 | WM8400_DIS_LOUT | | ||
1103 | WM8400_DIS_ROUT); | ||
1104 | |||
1105 | /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ | 1099 | /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ |
1106 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | | 1100 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | |
1107 | WM8400_BUFDCOPEN | WM8400_POBCTRL); | 1101 | WM8400_BUFDCOPEN | WM8400_POBCTRL); |
1108 | 1102 | ||
1109 | msleep(500); | 1103 | msleep(50); |
1110 | |||
1111 | /* Enable outputs */ | ||
1112 | val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1); | ||
1113 | val |= WM8400_SPK_ENA | WM8400_OUT3_ENA | | ||
1114 | WM8400_OUT4_ENA | WM8400_LOUT_ENA | | ||
1115 | WM8400_ROUT_ENA; | ||
1116 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); | ||
1117 | |||
1118 | /* disable all output discharge bits */ | ||
1119 | wm8400_write(codec, WM8400_ANTIPOP1, 0); | ||
1120 | 1104 | ||
1121 | /* Enable VREF & VMID at 2x50k */ | 1105 | /* Enable VREF & VMID at 2x50k */ |
1106 | val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1); | ||
1122 | val |= 0x2 | WM8400_VREF_ENA; | 1107 | val |= 0x2 | WM8400_VREF_ENA; |
1123 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); | 1108 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); |
1124 | 1109 | ||
1125 | msleep(600); | ||
1126 | |||
1127 | /* Enable BUFIOEN */ | 1110 | /* Enable BUFIOEN */ |
1128 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | | 1111 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | |
1129 | WM8400_BUFDCOPEN | WM8400_POBCTRL | | 1112 | WM8400_BUFDCOPEN | WM8400_POBCTRL | |
1130 | WM8400_BUFIOEN); | 1113 | WM8400_BUFIOEN); |
1131 | 1114 | ||
1132 | /* Disable outputs */ | ||
1133 | val &= ~(WM8400_SPK_ENA | WM8400_OUT3_ENA | | ||
1134 | WM8400_OUT4_ENA | WM8400_LOUT_ENA | | ||
1135 | WM8400_ROUT_ENA); | ||
1136 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); | ||
1137 | |||
1138 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | 1115 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
1139 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_BUFIOEN); | 1116 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_BUFIOEN); |
1140 | } | 1117 | } |