ARM: S5PC1XX: GPIO registers rename

S5PC100 and S5PC110 GPIO registers differs in many places, rename all previously defined registers to be S5PC100 specific. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
author: Kyungmin Park <kyungmin.park@samsung.com> 2009-11-17 02:41:15 -0500
committer: Ben Dooks <ben-linux@fluff.org> 2009-11-30 20:33:13 -0500
commit: d7b9ace51d949e1bfec7f32d21d094cf2c683ca0 (patch)
tree: 59ebc5e5bf16f931d0c5d402a4d2cda4625d805e
parent: 91e7d96e1f1781165a7df97e0dee1d007d3918f8 (diff)
1 files changed, 122 insertions, 122 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
index 5d22961a481e..2c4cbe8ee6b7 100644
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -18,45 +18,45 @@
 #define gpio_to_irq     __gpio_to_irq
 /* GPIO bank sizes */
-#define S5PC1XX_GPIO_A0_NR      (8)
+#define S5PC100_GPIO_A0_NR      (8)
-#define S5PC1XX_GPIO_A1_NR      (5)
+#define S5PC100_GPIO_A1_NR      (5)
-#define S5PC1XX_GPIO_B_NR       (8)
+#define S5PC100_GPIO_B_NR       (8)
-#define S5PC1XX_GPIO_C_NR       (5)
+#define S5PC100_GPIO_C_NR       (5)
-#define S5PC1XX_GPIO_D_NR       (7)
+#define S5PC100_GPIO_D_NR       (7)
-#define S5PC1XX_GPIO_E0_NR      (8)
+#define S5PC100_GPIO_E0_NR      (8)
-#define S5PC1XX_GPIO_E1_NR      (6)
+#define S5PC100_GPIO_E1_NR      (6)
-#define S5PC1XX_GPIO_F0_NR      (8)
+#define S5PC100_GPIO_F0_NR      (8)
-#define S5PC1XX_GPIO_F1_NR      (8)
+#define S5PC100_GPIO_F1_NR      (8)
-#define S5PC1XX_GPIO_F2_NR      (8)
+#define S5PC100_GPIO_F2_NR      (8)
-#define S5PC1XX_GPIO_F3_NR      (4)
+#define S5PC100_GPIO_F3_NR      (4)
-#define S5PC1XX_GPIO_G0_NR      (8)
+#define S5PC100_GPIO_G0_NR      (8)
-#define S5PC1XX_GPIO_G1_NR      (3)
+#define S5PC100_GPIO_G1_NR      (3)
-#define S5PC1XX_GPIO_G2_NR      (7)
+#define S5PC100_GPIO_G2_NR      (7)
-#define S5PC1XX_GPIO_G3_NR      (7)
+#define S5PC100_GPIO_G3_NR      (7)
-#define S5PC1XX_GPIO_H0_NR      (8)
+#define S5PC100_GPIO_H0_NR      (8)
-#define S5PC1XX_GPIO_H1_NR      (8)
+#define S5PC100_GPIO_H1_NR      (8)
-#define S5PC1XX_GPIO_H2_NR      (8)
+#define S5PC100_GPIO_H2_NR      (8)
-#define S5PC1XX_GPIO_H3_NR      (8)
+#define S5PC100_GPIO_H3_NR      (8)
-#define S5PC1XX_GPIO_I_NR       (8)
+#define S5PC100_GPIO_I_NR       (8)
-#define S5PC1XX_GPIO_J0_NR      (8)
+#define S5PC100_GPIO_J0_NR      (8)
-#define S5PC1XX_GPIO_J1_NR      (5)
+#define S5PC100_GPIO_J1_NR      (5)
-#define S5PC1XX_GPIO_J2_NR      (8)
+#define S5PC100_GPIO_J2_NR      (8)
-#define S5PC1XX_GPIO_J3_NR      (8)
+#define S5PC100_GPIO_J3_NR      (8)
-#define S5PC1XX_GPIO_J4_NR      (4)
+#define S5PC100_GPIO_J4_NR      (4)
-#define S5PC1XX_GPIO_K0_NR      (8)
+#define S5PC100_GPIO_K0_NR      (8)
-#define S5PC1XX_GPIO_K1_NR      (6)
+#define S5PC100_GPIO_K1_NR      (6)
-#define S5PC1XX_GPIO_K2_NR      (8)
+#define S5PC100_GPIO_K2_NR      (8)
-#define S5PC1XX_GPIO_K3_NR      (8)
+#define S5PC100_GPIO_K3_NR      (8)
-#define S5PC1XX_GPIO_L0_NR      (8)
+#define S5PC100_GPIO_L0_NR      (8)
-#define S5PC1XX_GPIO_L1_NR      (8)
+#define S5PC100_GPIO_L1_NR      (8)
-#define S5PC1XX_GPIO_L2_NR      (8)
+#define S5PC100_GPIO_L2_NR      (8)
-#define S5PC1XX_GPIO_L3_NR      (8)
+#define S5PC100_GPIO_L3_NR      (8)
-#define S5PC1XX_GPIO_L4_NR      (8)
+#define S5PC100_GPIO_L4_NR      (8)
-#define S5PC1XX_GPIO_MP00_NR    (8)
+#define S5PC100_GPIO_MP00_NR    (8)
-#define S5PC1XX_GPIO_MP01_NR    (8)
+#define S5PC100_GPIO_MP01_NR    (8)
-#define S5PC1XX_GPIO_MP02_NR    (8)
+#define S5PC100_GPIO_MP02_NR    (8)
-#define S5PC1XX_GPIO_MP03_NR    (8)
+#define S5PC100_GPIO_MP03_NR    (8)
-#define S5PC1XX_GPIO_MP04_NR    (5)
+#define S5PC100_GPIO_MP04_NR    (5)
 /* GPIO bank numbes */
@@ -69,94 +69,94 @@
        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
 enum s3c_gpio_number {
-        S5PC1XX_GPIO_A0_START   = 0,
+        S5PC100_GPIO_A0_START   = 0,
-        S5PC1XX_GPIO_A1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0),
+        S5PC100_GPIO_A1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0),
-        S5PC1XX_GPIO_B_START    = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1),
+        S5PC100_GPIO_B_START    = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1),
-        S5PC1XX_GPIO_C_START    = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B),
+        S5PC100_GPIO_C_START    = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B),
-        S5PC1XX_GPIO_D_START    = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C),
+        S5PC100_GPIO_D_START    = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C),
-        S5PC1XX_GPIO_E0_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D),
+        S5PC100_GPIO_E0_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D),
-        S5PC1XX_GPIO_E1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E0),
+        S5PC100_GPIO_E1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0),
-        S5PC1XX_GPIO_F0_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E1),
+        S5PC100_GPIO_F0_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1),
-        S5PC1XX_GPIO_F1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F0),
+        S5PC100_GPIO_F1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0),
-        S5PC1XX_GPIO_F2_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F1),
+        S5PC100_GPIO_F2_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1),
-        S5PC1XX_GPIO_F3_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F2),
+        S5PC100_GPIO_F3_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2),
-        S5PC1XX_GPIO_G0_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F3),
+        S5PC100_GPIO_G0_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3),
-        S5PC1XX_GPIO_G1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G0),
+        S5PC100_GPIO_G1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0),
-        S5PC1XX_GPIO_G2_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G1),
+        S5PC100_GPIO_G2_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1),
-        S5PC1XX_GPIO_G3_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G2),
+        S5PC100_GPIO_G3_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2),
-        S5PC1XX_GPIO_H0_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G3),
+        S5PC100_GPIO_H0_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3),
-        S5PC1XX_GPIO_H1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H0),
+        S5PC100_GPIO_H1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0),
-        S5PC1XX_GPIO_H2_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H1),
+        S5PC100_GPIO_H2_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1),
-        S5PC1XX_GPIO_H3_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H2),
+        S5PC100_GPIO_H3_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2),
-        S5PC1XX_GPIO_I_START    = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H3),
+        S5PC100_GPIO_I_START    = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3),
-        S5PC1XX_GPIO_J0_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_I),
+        S5PC100_GPIO_J0_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I),
-        S5PC1XX_GPIO_J1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J0),
+        S5PC100_GPIO_J1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0),
-        S5PC1XX_GPIO_J2_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J1),
+        S5PC100_GPIO_J2_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1),
-        S5PC1XX_GPIO_J3_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J2),
+        S5PC100_GPIO_J3_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2),
-        S5PC1XX_GPIO_J4_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J3),
+        S5PC100_GPIO_J4_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3),
-        S5PC1XX_GPIO_K0_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J4),
+        S5PC100_GPIO_K0_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4),
-        S5PC1XX_GPIO_K1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0),
+        S5PC100_GPIO_K1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0),
-        S5PC1XX_GPIO_K2_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1),
+        S5PC100_GPIO_K2_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1),
-        S5PC1XX_GPIO_K3_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2),
+        S5PC100_GPIO_K3_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2),
-        S5PC1XX_GPIO_L0_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3),
+        S5PC100_GPIO_L0_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3),
-        S5PC1XX_GPIO_L1_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L0),
+        S5PC100_GPIO_L1_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0),
-        S5PC1XX_GPIO_L2_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L1),
+        S5PC100_GPIO_L2_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1),
-        S5PC1XX_GPIO_L3_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L2),
+        S5PC100_GPIO_L3_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2),
-        S5PC1XX_GPIO_L4_START   = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L3),
+        S5PC100_GPIO_L4_START   = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3),
-        S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L4),
+        S5PC100_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4),
-        S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00),
+        S5PC100_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00),
-        S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01),
+        S5PC100_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01),
-        S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02),
+        S5PC100_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02),
-        S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03),
+        S5PC100_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03),
-        S5PC1XX_GPIO_END        = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP04),
+        S5PC100_GPIO_END        = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04),
 };
-/* S5PC1XX GPIO number definitions. */
+/* S5PC100 GPIO number definitions. */
-#define S5PC1XX_GPA0(_nr)       (S5PC1XX_GPIO_A0_START + (_nr))
+#define S5PC100_GPA0(_nr)       (S5PC100_GPIO_A0_START + (_nr))
-#define S5PC1XX_GPA1(_nr)       (S5PC1XX_GPIO_A1_START + (_nr))
+#define S5PC100_GPA1(_nr)       (S5PC100_GPIO_A1_START + (_nr))
-#define S5PC1XX_GPB(_nr)        (S5PC1XX_GPIO_B_START + (_nr))
+#define S5PC100_GPB(_nr)        (S5PC100_GPIO_B_START + (_nr))
-#define S5PC1XX_GPC(_nr)        (S5PC1XX_GPIO_C_START + (_nr))
+#define S5PC100_GPC(_nr)        (S5PC100_GPIO_C_START + (_nr))
-#define S5PC1XX_GPD(_nr)        (S5PC1XX_GPIO_D_START + (_nr))
+#define S5PC100_GPD(_nr)        (S5PC100_GPIO_D_START + (_nr))
-#define S5PC1XX_GPE0(_nr)       (S5PC1XX_GPIO_E0_START + (_nr))
+#define S5PC100_GPE0(_nr)       (S5PC100_GPIO_E0_START + (_nr))
-#define S5PC1XX_GPE1(_nr)       (S5PC1XX_GPIO_E1_START + (_nr))
+#define S5PC100_GPE1(_nr)       (S5PC100_GPIO_E1_START + (_nr))
-#define S5PC1XX_GPF0(_nr)       (S5PC1XX_GPIO_F0_START + (_nr))
+#define S5PC100_GPF0(_nr)       (S5PC100_GPIO_F0_START + (_nr))
-#define S5PC1XX_GPF1(_nr)       (S5PC1XX_GPIO_F1_START + (_nr))
+#define S5PC100_GPF1(_nr)       (S5PC100_GPIO_F1_START + (_nr))
-#define S5PC1XX_GPF2(_nr)       (S5PC1XX_GPIO_F2_START + (_nr))
+#define S5PC100_GPF2(_nr)       (S5PC100_GPIO_F2_START + (_nr))
-#define S5PC1XX_GPF3(_nr)       (S5PC1XX_GPIO_F3_START + (_nr))
+#define S5PC100_GPF3(_nr)       (S5PC100_GPIO_F3_START + (_nr))
-#define S5PC1XX_GPG0(_nr)       (S5PC1XX_GPIO_G0_START + (_nr))
+#define S5PC100_GPG0(_nr)       (S5PC100_GPIO_G0_START + (_nr))
-#define S5PC1XX_GPG1(_nr)       (S5PC1XX_GPIO_G1_START + (_nr))
+#define S5PC100_GPG1(_nr)       (S5PC100_GPIO_G1_START + (_nr))
-#define S5PC1XX_GPG2(_nr)       (S5PC1XX_GPIO_G2_START + (_nr))
+#define S5PC100_GPG2(_nr)       (S5PC100_GPIO_G2_START + (_nr))
-#define S5PC1XX_GPG3(_nr)       (S5PC1XX_GPIO_G3_START + (_nr))
+#define S5PC100_GPG3(_nr)       (S5PC100_GPIO_G3_START + (_nr))
-#define S5PC1XX_GPH0(_nr)       (S5PC1XX_GPIO_H0_START + (_nr))
+#define S5PC100_GPH0(_nr)       (S5PC100_GPIO_H0_START + (_nr))
-#define S5PC1XX_GPH1(_nr)       (S5PC1XX_GPIO_H1_START + (_nr))
+#define S5PC100_GPH1(_nr)       (S5PC100_GPIO_H1_START + (_nr))
-#define S5PC1XX_GPH2(_nr)       (S5PC1XX_GPIO_H2_START + (_nr))
+#define S5PC100_GPH2(_nr)       (S5PC100_GPIO_H2_START + (_nr))
-#define S5PC1XX_GPH3(_nr)       (S5PC1XX_GPIO_H3_START + (_nr))
+#define S5PC100_GPH3(_nr)       (S5PC100_GPIO_H3_START + (_nr))
-#define S5PC1XX_GPI(_nr)        (S5PC1XX_GPIO_I_START + (_nr))
+#define S5PC100_GPI(_nr)        (S5PC100_GPIO_I_START + (_nr))
-#define S5PC1XX_GPJ0(_nr)       (S5PC1XX_GPIO_J0_START + (_nr))
+#define S5PC100_GPJ0(_nr)       (S5PC100_GPIO_J0_START + (_nr))
-#define S5PC1XX_GPJ1(_nr)       (S5PC1XX_GPIO_J1_START + (_nr))
+#define S5PC100_GPJ1(_nr)       (S5PC100_GPIO_J1_START + (_nr))
-#define S5PC1XX_GPJ2(_nr)       (S5PC1XX_GPIO_J2_START + (_nr))
+#define S5PC100_GPJ2(_nr)       (S5PC100_GPIO_J2_START + (_nr))
-#define S5PC1XX_GPJ3(_nr)       (S5PC1XX_GPIO_J3_START + (_nr))
+#define S5PC100_GPJ3(_nr)       (S5PC100_GPIO_J3_START + (_nr))
-#define S5PC1XX_GPJ4(_nr)       (S5PC1XX_GPIO_J4_START + (_nr))
+#define S5PC100_GPJ4(_nr)       (S5PC100_GPIO_J4_START + (_nr))
-#define S5PC1XX_GPK0(_nr)       (S5PC1XX_GPIO_K0_START + (_nr))
+#define S5PC100_GPK0(_nr)       (S5PC100_GPIO_K0_START + (_nr))
-#define S5PC1XX_GPK1(_nr)       (S5PC1XX_GPIO_K1_START + (_nr))
+#define S5PC100_GPK1(_nr)       (S5PC100_GPIO_K1_START + (_nr))
-#define S5PC1XX_GPK2(_nr)       (S5PC1XX_GPIO_K2_START + (_nr))
+#define S5PC100_GPK2(_nr)       (S5PC100_GPIO_K2_START + (_nr))
-#define S5PC1XX_GPK3(_nr)       (S5PC1XX_GPIO_K3_START + (_nr))
+#define S5PC100_GPK3(_nr)       (S5PC100_GPIO_K3_START + (_nr))
-#define S5PC1XX_GPL0(_nr)       (S5PC1XX_GPIO_L0_START + (_nr))
+#define S5PC100_GPL0(_nr)       (S5PC100_GPIO_L0_START + (_nr))
-#define S5PC1XX_GPL1(_nr)       (S5PC1XX_GPIO_L1_START + (_nr))
+#define S5PC100_GPL1(_nr)       (S5PC100_GPIO_L1_START + (_nr))
-#define S5PC1XX_GPL2(_nr)       (S5PC1XX_GPIO_L2_START + (_nr))
+#define S5PC100_GPL2(_nr)       (S5PC100_GPIO_L2_START + (_nr))
-#define S5PC1XX_GPL3(_nr)       (S5PC1XX_GPIO_L3_START + (_nr))
+#define S5PC100_GPL3(_nr)       (S5PC100_GPIO_L3_START + (_nr))
-#define S5PC1XX_GPL4(_nr)       (S5PC1XX_GPIO_L4_START + (_nr))
+#define S5PC100_GPL4(_nr)       (S5PC100_GPIO_L4_START + (_nr))
-#define S5PC1XX_MP00(_nr)       (S5PC1XX_GPIO_MP00_START + (_nr))
+#define S5PC100_MP00(_nr)       (S5PC100_GPIO_MP00_START + (_nr))
-#define S5PC1XX_MP01(_nr)       (S5PC1XX_GPIO_MP01_START + (_nr))
+#define S5PC100_MP01(_nr)       (S5PC100_GPIO_MP01_START + (_nr))
-#define S5PC1XX_MP02(_nr)       (S5PC1XX_GPIO_MP02_START + (_nr))
+#define S5PC100_MP02(_nr)       (S5PC100_GPIO_MP02_START + (_nr))
-#define S5PC1XX_MP03(_nr)       (S5PC1XX_GPIO_MP03_START + (_nr))
+#define S5PC100_MP03(_nr)       (S5PC100_GPIO_MP03_START + (_nr))
-#define S5PC1XX_MP04(_nr)       (S5PC1XX_GPIO_MP04_START + (_nr))
+#define S5PC100_MP04(_nr)       (S5PC100_GPIO_MP04_START + (_nr))
-#define S5PC1XX_MP05(_nr)       (S5PC1XX_GPIO_MP05_START + (_nr))
+#define S5PC100_MP05(_nr)       (S5PC100_GPIO_MP05_START + (_nr))
 /* It used the end of the S5PC1XX gpios */
-#define S3C_GPIO_END            S5PC1XX_GPIO_END
+#define S3C_GPIO_END            S5PC100_GPIO_END
 /* define the number of gpios we need to the one after the MP04() range */
-#define ARCH_NR_GPIOS           (S5PC1XX_GPIO_END + 1)
+#define ARCH_NR_GPIOS           (S5PC100_GPIO_END + 1)
 #include <asm-generic/gpio.h>
author	Kyungmin Park <kyungmin.park@samsung.com>	2009-11-17 02:41:15 -0500
committer	Ben Dooks <ben-linux@fluff.org>	2009-11-30 20:33:13 -0500
commit	d7b9ace51d949e1bfec7f32d21d094cf2c683ca0 (patch)
tree	59ebc5e5bf16f931d0c5d402a4d2cda4625d805e
parent	91e7d96e1f1781165a7df97e0dee1d007d3918f8 (diff)

diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h index 5d22961a481e..2c4cbe8ee6b7 100644 --- a/arch/arm/mach-s5pc100/include/mach/gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -18,45 +18,45 @@
18	#define gpio_to_irq __gpio_to_irq	18	#define gpio_to_irq __gpio_to_irq
19		19
20	/* GPIO bank sizes */	20	/* GPIO bank sizes */
21	#define S5PC1XX_GPIO_A0_NR (8)	21	#define S5PC100_GPIO_A0_NR (8)
22	#define S5PC1XX_GPIO_A1_NR (5)	22	#define S5PC100_GPIO_A1_NR (5)
23	#define S5PC1XX_GPIO_B_NR (8)	23	#define S5PC100_GPIO_B_NR (8)
24	#define S5PC1XX_GPIO_C_NR (5)	24	#define S5PC100_GPIO_C_NR (5)
25	#define S5PC1XX_GPIO_D_NR (7)	25	#define S5PC100_GPIO_D_NR (7)
26	#define S5PC1XX_GPIO_E0_NR (8)	26	#define S5PC100_GPIO_E0_NR (8)
27	#define S5PC1XX_GPIO_E1_NR (6)	27	#define S5PC100_GPIO_E1_NR (6)
28	#define S5PC1XX_GPIO_F0_NR (8)	28	#define S5PC100_GPIO_F0_NR (8)
29	#define S5PC1XX_GPIO_F1_NR (8)	29	#define S5PC100_GPIO_F1_NR (8)
30	#define S5PC1XX_GPIO_F2_NR (8)	30	#define S5PC100_GPIO_F2_NR (8)
31	#define S5PC1XX_GPIO_F3_NR (4)	31	#define S5PC100_GPIO_F3_NR (4)
32	#define S5PC1XX_GPIO_G0_NR (8)	32	#define S5PC100_GPIO_G0_NR (8)
33	#define S5PC1XX_GPIO_G1_NR (3)	33	#define S5PC100_GPIO_G1_NR (3)
34	#define S5PC1XX_GPIO_G2_NR (7)	34	#define S5PC100_GPIO_G2_NR (7)
35	#define S5PC1XX_GPIO_G3_NR (7)	35	#define S5PC100_GPIO_G3_NR (7)
36	#define S5PC1XX_GPIO_H0_NR (8)	36	#define S5PC100_GPIO_H0_NR (8)
37	#define S5PC1XX_GPIO_H1_NR (8)	37	#define S5PC100_GPIO_H1_NR (8)
38	#define S5PC1XX_GPIO_H2_NR (8)	38	#define S5PC100_GPIO_H2_NR (8)
39	#define S5PC1XX_GPIO_H3_NR (8)	39	#define S5PC100_GPIO_H3_NR (8)
40	#define S5PC1XX_GPIO_I_NR (8)	40	#define S5PC100_GPIO_I_NR (8)
41	#define S5PC1XX_GPIO_J0_NR (8)	41	#define S5PC100_GPIO_J0_NR (8)
42	#define S5PC1XX_GPIO_J1_NR (5)	42	#define S5PC100_GPIO_J1_NR (5)
43	#define S5PC1XX_GPIO_J2_NR (8)	43	#define S5PC100_GPIO_J2_NR (8)
44	#define S5PC1XX_GPIO_J3_NR (8)	44	#define S5PC100_GPIO_J3_NR (8)
45	#define S5PC1XX_GPIO_J4_NR (4)	45	#define S5PC100_GPIO_J4_NR (4)
46	#define S5PC1XX_GPIO_K0_NR (8)	46	#define S5PC100_GPIO_K0_NR (8)
47	#define S5PC1XX_GPIO_K1_NR (6)	47	#define S5PC100_GPIO_K1_NR (6)
48	#define S5PC1XX_GPIO_K2_NR (8)	48	#define S5PC100_GPIO_K2_NR (8)
49	#define S5PC1XX_GPIO_K3_NR (8)	49	#define S5PC100_GPIO_K3_NR (8)
50	#define S5PC1XX_GPIO_L0_NR (8)	50	#define S5PC100_GPIO_L0_NR (8)
51	#define S5PC1XX_GPIO_L1_NR (8)	51	#define S5PC100_GPIO_L1_NR (8)
52	#define S5PC1XX_GPIO_L2_NR (8)	52	#define S5PC100_GPIO_L2_NR (8)
53	#define S5PC1XX_GPIO_L3_NR (8)	53	#define S5PC100_GPIO_L3_NR (8)
54	#define S5PC1XX_GPIO_L4_NR (8)	54	#define S5PC100_GPIO_L4_NR (8)
55	#define S5PC1XX_GPIO_MP00_NR (8)	55	#define S5PC100_GPIO_MP00_NR (8)
56	#define S5PC1XX_GPIO_MP01_NR (8)	56	#define S5PC100_GPIO_MP01_NR (8)
57	#define S5PC1XX_GPIO_MP02_NR (8)	57	#define S5PC100_GPIO_MP02_NR (8)
58	#define S5PC1XX_GPIO_MP03_NR (8)	58	#define S5PC100_GPIO_MP03_NR (8)
59	#define S5PC1XX_GPIO_MP04_NR (5)	59	#define S5PC100_GPIO_MP04_NR (5)
60		60
61	/* GPIO bank numbes */	61	/* GPIO bank numbes */
62		62
@@ -69,94 +69,94 @@
69	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)	69	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
70		70
71	enum s3c_gpio_number {	71	enum s3c_gpio_number {
72	S5PC1XX_GPIO_A0_START = 0,	72	S5PC100_GPIO_A0_START = 0,
73	S5PC1XX_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0),	73	S5PC100_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A0),
74	S5PC1XX_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1),	74	S5PC100_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_A1),
75	S5PC1XX_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B),	75	S5PC100_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_B),
76	S5PC1XX_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C),	76	S5PC100_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_C),
77	S5PC1XX_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D),	77	S5PC100_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_D),
78	S5PC1XX_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E0),	78	S5PC100_GPIO_E1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E0),
79	S5PC1XX_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_E1),	79	S5PC100_GPIO_F0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_E1),
80	S5PC1XX_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F0),	80	S5PC100_GPIO_F1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F0),
81	S5PC1XX_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F1),	81	S5PC100_GPIO_F2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F1),
82	S5PC1XX_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F2),	82	S5PC100_GPIO_F3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F2),
83	S5PC1XX_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_F3),	83	S5PC100_GPIO_G0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_F3),
84	S5PC1XX_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G0),	84	S5PC100_GPIO_G1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G0),
85	S5PC1XX_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G1),	85	S5PC100_GPIO_G2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G1),
86	S5PC1XX_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G2),	86	S5PC100_GPIO_G3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G2),
87	S5PC1XX_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_G3),	87	S5PC100_GPIO_H0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_G3),
88	S5PC1XX_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H0),	88	S5PC100_GPIO_H1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H0),
89	S5PC1XX_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H1),	89	S5PC100_GPIO_H2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H1),
90	S5PC1XX_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H2),	90	S5PC100_GPIO_H3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H2),
91	S5PC1XX_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_H3),	91	S5PC100_GPIO_I_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_H3),
92	S5PC1XX_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_I),	92	S5PC100_GPIO_J0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_I),
93	S5PC1XX_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J0),	93	S5PC100_GPIO_J1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J0),
94	S5PC1XX_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J1),	94	S5PC100_GPIO_J2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J1),
95	S5PC1XX_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J2),	95	S5PC100_GPIO_J3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J2),
96	S5PC1XX_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J3),	96	S5PC100_GPIO_J4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J3),
97	S5PC1XX_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_J4),	97	S5PC100_GPIO_K0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_J4),
98	S5PC1XX_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0),	98	S5PC100_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K0),
99	S5PC1XX_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1),	99	S5PC100_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K1),
100	S5PC1XX_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2),	100	S5PC100_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K2),
101	S5PC1XX_GPIO_L0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3),	101	S5PC100_GPIO_L0_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_K3),
102	S5PC1XX_GPIO_L1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L0),	102	S5PC100_GPIO_L1_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L0),
103	S5PC1XX_GPIO_L2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L1),	103	S5PC100_GPIO_L2_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L1),
104	S5PC1XX_GPIO_L3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L2),	104	S5PC100_GPIO_L3_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L2),
105	S5PC1XX_GPIO_L4_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L3),	105	S5PC100_GPIO_L4_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L3),
106	S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L4),	106	S5PC100_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_L4),
107	S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00),	107	S5PC100_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP00),
108	S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01),	108	S5PC100_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP01),
109	S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02),	109	S5PC100_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP02),
110	S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03),	110	S5PC100_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP03),
111	S5PC1XX_GPIO_END = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP04),	111	S5PC100_GPIO_END = S5PC1XX_GPIO_NEXT(S5PC100_GPIO_MP04),
112	};	112	};
113		113
114	/* S5PC1XX GPIO number definitions. */	114	/* S5PC100 GPIO number definitions. */
115	#define S5PC1XX_GPA0(_nr) (S5PC1XX_GPIO_A0_START + (_nr))	115	#define S5PC100_GPA0(_nr) (S5PC100_GPIO_A0_START + (_nr))
116	#define S5PC1XX_GPA1(_nr) (S5PC1XX_GPIO_A1_START + (_nr))	116	#define S5PC100_GPA1(_nr) (S5PC100_GPIO_A1_START + (_nr))
117	#define S5PC1XX_GPB(_nr) (S5PC1XX_GPIO_B_START + (_nr))	117	#define S5PC100_GPB(_nr) (S5PC100_GPIO_B_START + (_nr))
118	#define S5PC1XX_GPC(_nr) (S5PC1XX_GPIO_C_START + (_nr))	118	#define S5PC100_GPC(_nr) (S5PC100_GPIO_C_START + (_nr))
119	#define S5PC1XX_GPD(_nr) (S5PC1XX_GPIO_D_START + (_nr))	119	#define S5PC100_GPD(_nr) (S5PC100_GPIO_D_START + (_nr))
120	#define S5PC1XX_GPE0(_nr) (S5PC1XX_GPIO_E0_START + (_nr))	120	#define S5PC100_GPE0(_nr) (S5PC100_GPIO_E0_START + (_nr))
121	#define S5PC1XX_GPE1(_nr) (S5PC1XX_GPIO_E1_START + (_nr))	121	#define S5PC100_GPE1(_nr) (S5PC100_GPIO_E1_START + (_nr))
122	#define S5PC1XX_GPF0(_nr) (S5PC1XX_GPIO_F0_START + (_nr))	122	#define S5PC100_GPF0(_nr) (S5PC100_GPIO_F0_START + (_nr))
123	#define S5PC1XX_GPF1(_nr) (S5PC1XX_GPIO_F1_START + (_nr))	123	#define S5PC100_GPF1(_nr) (S5PC100_GPIO_F1_START + (_nr))
124	#define S5PC1XX_GPF2(_nr) (S5PC1XX_GPIO_F2_START + (_nr))	124	#define S5PC100_GPF2(_nr) (S5PC100_GPIO_F2_START + (_nr))
125	#define S5PC1XX_GPF3(_nr) (S5PC1XX_GPIO_F3_START + (_nr))	125	#define S5PC100_GPF3(_nr) (S5PC100_GPIO_F3_START + (_nr))
126	#define S5PC1XX_GPG0(_nr) (S5PC1XX_GPIO_G0_START + (_nr))	126	#define S5PC100_GPG0(_nr) (S5PC100_GPIO_G0_START + (_nr))
127	#define S5PC1XX_GPG1(_nr) (S5PC1XX_GPIO_G1_START + (_nr))	127	#define S5PC100_GPG1(_nr) (S5PC100_GPIO_G1_START + (_nr))
128	#define S5PC1XX_GPG2(_nr) (S5PC1XX_GPIO_G2_START + (_nr))	128	#define S5PC100_GPG2(_nr) (S5PC100_GPIO_G2_START + (_nr))
129	#define S5PC1XX_GPG3(_nr) (S5PC1XX_GPIO_G3_START + (_nr))	129	#define S5PC100_GPG3(_nr) (S5PC100_GPIO_G3_START + (_nr))
130	#define S5PC1XX_GPH0(_nr) (S5PC1XX_GPIO_H0_START + (_nr))	130	#define S5PC100_GPH0(_nr) (S5PC100_GPIO_H0_START + (_nr))
131	#define S5PC1XX_GPH1(_nr) (S5PC1XX_GPIO_H1_START + (_nr))	131	#define S5PC100_GPH1(_nr) (S5PC100_GPIO_H1_START + (_nr))
132	#define S5PC1XX_GPH2(_nr) (S5PC1XX_GPIO_H2_START + (_nr))	132	#define S5PC100_GPH2(_nr) (S5PC100_GPIO_H2_START + (_nr))
133	#define S5PC1XX_GPH3(_nr) (S5PC1XX_GPIO_H3_START + (_nr))	133	#define S5PC100_GPH3(_nr) (S5PC100_GPIO_H3_START + (_nr))
134	#define S5PC1XX_GPI(_nr) (S5PC1XX_GPIO_I_START + (_nr))	134	#define S5PC100_GPI(_nr) (S5PC100_GPIO_I_START + (_nr))
135	#define S5PC1XX_GPJ0(_nr) (S5PC1XX_GPIO_J0_START + (_nr))	135	#define S5PC100_GPJ0(_nr) (S5PC100_GPIO_J0_START + (_nr))
136	#define S5PC1XX_GPJ1(_nr) (S5PC1XX_GPIO_J1_START + (_nr))	136	#define S5PC100_GPJ1(_nr) (S5PC100_GPIO_J1_START + (_nr))
137	#define S5PC1XX_GPJ2(_nr) (S5PC1XX_GPIO_J2_START + (_nr))	137	#define S5PC100_GPJ2(_nr) (S5PC100_GPIO_J2_START + (_nr))
138	#define S5PC1XX_GPJ3(_nr) (S5PC1XX_GPIO_J3_START + (_nr))	138	#define S5PC100_GPJ3(_nr) (S5PC100_GPIO_J3_START + (_nr))
139	#define S5PC1XX_GPJ4(_nr) (S5PC1XX_GPIO_J4_START + (_nr))	139	#define S5PC100_GPJ4(_nr) (S5PC100_GPIO_J4_START + (_nr))
140	#define S5PC1XX_GPK0(_nr) (S5PC1XX_GPIO_K0_START + (_nr))	140	#define S5PC100_GPK0(_nr) (S5PC100_GPIO_K0_START + (_nr))
141	#define S5PC1XX_GPK1(_nr) (S5PC1XX_GPIO_K1_START + (_nr))	141	#define S5PC100_GPK1(_nr) (S5PC100_GPIO_K1_START + (_nr))
142	#define S5PC1XX_GPK2(_nr) (S5PC1XX_GPIO_K2_START + (_nr))	142	#define S5PC100_GPK2(_nr) (S5PC100_GPIO_K2_START + (_nr))
143	#define S5PC1XX_GPK3(_nr) (S5PC1XX_GPIO_K3_START + (_nr))	143	#define S5PC100_GPK3(_nr) (S5PC100_GPIO_K3_START + (_nr))
144	#define S5PC1XX_GPL0(_nr) (S5PC1XX_GPIO_L0_START + (_nr))	144	#define S5PC100_GPL0(_nr) (S5PC100_GPIO_L0_START + (_nr))
145	#define S5PC1XX_GPL1(_nr) (S5PC1XX_GPIO_L1_START + (_nr))	145	#define S5PC100_GPL1(_nr) (S5PC100_GPIO_L1_START + (_nr))
146	#define S5PC1XX_GPL2(_nr) (S5PC1XX_GPIO_L2_START + (_nr))	146	#define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr))
147	#define S5PC1XX_GPL3(_nr) (S5PC1XX_GPIO_L3_START + (_nr))	147	#define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr))
148	#define S5PC1XX_GPL4(_nr) (S5PC1XX_GPIO_L4_START + (_nr))	148	#define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr))
149	#define S5PC1XX_MP00(_nr) (S5PC1XX_GPIO_MP00_START + (_nr))	149	#define S5PC100_MP00(_nr) (S5PC100_GPIO_MP00_START + (_nr))
150	#define S5PC1XX_MP01(_nr) (S5PC1XX_GPIO_MP01_START + (_nr))	150	#define S5PC100_MP01(_nr) (S5PC100_GPIO_MP01_START + (_nr))
151	#define S5PC1XX_MP02(_nr) (S5PC1XX_GPIO_MP02_START + (_nr))	151	#define S5PC100_MP02(_nr) (S5PC100_GPIO_MP02_START + (_nr))
152	#define S5PC1XX_MP03(_nr) (S5PC1XX_GPIO_MP03_START + (_nr))	152	#define S5PC100_MP03(_nr) (S5PC100_GPIO_MP03_START + (_nr))
153	#define S5PC1XX_MP04(_nr) (S5PC1XX_GPIO_MP04_START + (_nr))	153	#define S5PC100_MP04(_nr) (S5PC100_GPIO_MP04_START + (_nr))
154	#define S5PC1XX_MP05(_nr) (S5PC1XX_GPIO_MP05_START + (_nr))	154	#define S5PC100_MP05(_nr) (S5PC100_GPIO_MP05_START + (_nr))
155		155
156	/* It used the end of the S5PC1XX gpios */	156	/* It used the end of the S5PC1XX gpios */
157	#define S3C_GPIO_END S5PC1XX_GPIO_END	157	#define S3C_GPIO_END S5PC100_GPIO_END
158		158
159	/* define the number of gpios we need to the one after the MP04() range */	159	/* define the number of gpios we need to the one after the MP04() range */
160	#define ARCH_NR_GPIOS (S5PC1XX_GPIO_END + 1)	160	#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1)
161		161
162	#include <asm-generic/gpio.h>	162	#include <asm-generic/gpio.h>