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authorLinus Torvalds <torvalds@linux-foundation.org>2010-05-21 18:26:46 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-21 18:26:46 -0400
commitd79df0b1eda0099a22cbcece01ce5e7d222450de (patch)
treeeb9c938fa5faf285fb091d7446508a32229ceea4
parent6e80e8ed5eb92d0112674aabe82951266a6a1051 (diff)
parentc8d1a126924fcbc1d61ceb830226e0c7afdcc841 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6: (577 commits) Staging: ramzswap: Handler for swap slot free callback swap: Add swap slot free callback to block_device_operations swap: Add flag to identify block swap devices Staging: vt6655: use ETH_FRAME_LEN macro instead of custom one Staging: vt6655: use ETH_DATA_LEN macro instead of custom one Staging: vt6655: use ETH_FCS_LEN macro instead of custom one Staging: vt6656: use ETH_HLEN macro instead of custom one Staging: comedi: quatech_daqp_cs.c Replace eos semaphore with a completion. Staging: dt3155v4l: remove private memory allocator Staging: crystalhd: Remove typedefs from driver Staging: winbond: Fix for pointer name format issue in mds.c Staging: vt6656: removed custom UCHAR/USHORT/UINT/ULONG/ULONGLONG typedefs Staging: vt6656: removed custom CHAR/SHORT/INT/LONG typedefs Staging: comedi: Altered the way printk is used in 8255.c staging: iio: adis16350 and similar IMU driver Staging: iio: max1363 Fix two bugs in single_channel_from_ring Staging: iio: adis16220 extract bin_attribute structures from state Staging: iio: adis16220 vibration sensor driver Staging: comedi: Kconfig dependancy fixes Staging: comedi: fix up build error from last Kconfig changes ...
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-rw-r--r--drivers/staging/vt6655/michael.c24
-rw-r--r--drivers/staging/vt6655/michael.h8
-rw-r--r--drivers/staging/vt6655/power.c26
-rw-r--r--drivers/staging/vt6655/power.h28
-rw-r--r--drivers/staging/vt6655/rc4.c4
-rw-r--r--drivers/staging/vt6655/rc4.h2
-rw-r--r--drivers/staging/vt6655/rf.c22
-rw-r--r--drivers/staging/vt6655/rf.h14
-rw-r--r--drivers/staging/vt6655/rxtx.c510
-rw-r--r--drivers/staging/vt6655/rxtx.h84
-rw-r--r--drivers/staging/vt6655/srom.c54
-rw-r--r--drivers/staging/vt6655/srom.h2
-rw-r--r--drivers/staging/vt6655/tether.c2
-rw-r--r--drivers/staging/vt6655/tether.h31
-rw-r--r--drivers/staging/vt6655/tkip.c2
-rw-r--r--drivers/staging/vt6655/tkip.h2
-rw-r--r--drivers/staging/vt6655/ttype.h22
-rw-r--r--drivers/staging/vt6655/vntwifi.c142
-rw-r--r--drivers/staging/vt6655/vntwifi.h142
-rw-r--r--drivers/staging/vt6655/wcmd.c104
-rw-r--r--drivers/staging/vt6655/wcmd.h26
-rw-r--r--drivers/staging/vt6655/wctl.c4
-rw-r--r--drivers/staging/vt6655/wmgr.c672
-rw-r--r--drivers/staging/vt6655/wmgr.h96
-rw-r--r--drivers/staging/vt6655/wpa.c14
-rw-r--r--drivers/staging/vt6655/wpa.h14
-rw-r--r--drivers/staging/vt6655/wpa2.c16
-rw-r--r--drivers/staging/vt6655/wpa2.h14
-rw-r--r--drivers/staging/vt6655/wpactl.c19
-rw-r--r--drivers/staging/vt6655/wroute.c6
-rw-r--r--drivers/staging/vt6656/80211hdr.h83
-rw-r--r--drivers/staging/vt6656/80211mgr.c88
-rw-r--r--drivers/staging/vt6656/80211mgr.h136
-rw-r--r--drivers/staging/vt6656/aes_ccmp.c564
-rw-r--r--drivers/staging/vt6656/aes_ccmp.h2
-rw-r--r--drivers/staging/vt6656/baseband.c114
-rw-r--r--drivers/staging/vt6656/baseband.h59
-rw-r--r--drivers/staging/vt6656/bssdb.c402
-rw-r--r--drivers/staging/vt6656/bssdb.h252
-rw-r--r--drivers/staging/vt6656/card.c68
-rw-r--r--drivers/staging/vt6656/card.h62
-rw-r--r--drivers/staging/vt6656/channel.c12
-rw-r--r--drivers/staging/vt6656/channel.h10
-rw-r--r--drivers/staging/vt6656/control.c87
-rw-r--r--drivers/staging/vt6656/control.h31
-rw-r--r--drivers/staging/vt6656/datarate.c71
-rw-r--r--drivers/staging/vt6656/datarate.h39
-rw-r--r--drivers/staging/vt6656/desc.h12
-rw-r--r--drivers/staging/vt6656/device.h218
-rw-r--r--drivers/staging/vt6656/dpc.c305
-rw-r--r--drivers/staging/vt6656/dpc.h27
-rw-r--r--drivers/staging/vt6656/firmware.c6
-rw-r--r--drivers/staging/vt6656/firmware.h9
-rw-r--r--drivers/staging/vt6656/hostap.c27
-rw-r--r--drivers/staging/vt6656/hostap.h9
-rw-r--r--drivers/staging/vt6656/int.c251
-rw-r--r--drivers/staging/vt6656/int.h12
-rw-r--r--drivers/staging/vt6656/iocmd.h353
-rw-r--r--drivers/staging/vt6656/ioctl.c47
-rw-r--r--drivers/staging/vt6656/ioctl.h15
-rw-r--r--drivers/staging/vt6656/iowpa.h4
-rw-r--r--drivers/staging/vt6656/iwctl.c52
-rw-r--r--drivers/staging/vt6656/iwctl.h5
-rw-r--r--drivers/staging/vt6656/key.c87
-rw-r--r--drivers/staging/vt6656/key.h62
-rw-r--r--drivers/staging/vt6656/mac.c14
-rw-r--r--drivers/staging/vt6656/mac.h9
-rw-r--r--drivers/staging/vt6656/main_usb.c223
-rw-r--r--drivers/staging/vt6656/mib.c115
-rw-r--r--drivers/staging/vt6656/mib.h192
-rw-r--r--drivers/staging/vt6656/michael.c181
-rw-r--r--drivers/staging/vt6656/michael.h12
-rw-r--r--drivers/staging/vt6656/power.c58
-rw-r--r--drivers/staging/vt6656/power.h45
-rw-r--r--drivers/staging/vt6656/rc4.c84
-rw-r--r--drivers/staging/vt6656/rc4.h13
-rw-r--r--drivers/staging/vt6656/rf.c32
-rw-r--r--drivers/staging/vt6656/rf.h33
-rw-r--r--drivers/staging/vt6656/rndis.h3
-rw-r--r--drivers/staging/vt6656/rxtx.c868
-rw-r--r--drivers/staging/vt6656/rxtx.h46
-rw-r--r--drivers/staging/vt6656/srom.h2
-rw-r--r--drivers/staging/vt6656/tcrc.c23
-rw-r--r--drivers/staging/vt6656/tcrc.h11
-rw-r--r--drivers/staging/vt6656/tether.c45
-rw-r--r--drivers/staging/vt6656/tether.h33
-rw-r--r--drivers/staging/vt6656/tkip.c2
-rw-r--r--drivers/staging/vt6656/tkip.h7
-rw-r--r--drivers/staging/vt6656/tmacro.h4
-rw-r--r--drivers/staging/vt6656/ttype.h57
-rw-r--r--drivers/staging/vt6656/upc.h8
-rw-r--r--drivers/staging/vt6656/usbpipe.c138
-rw-r--r--drivers/staging/vt6656/usbpipe.h51
-rw-r--r--drivers/staging/vt6656/wcmd.c172
-rw-r--r--drivers/staging/vt6656/wcmd.h36
-rw-r--r--drivers/staging/vt6656/wctl.c23
-rw-r--r--drivers/staging/vt6656/wctl.h13
-rw-r--r--drivers/staging/vt6656/wmgr.c960
-rw-r--r--drivers/staging/vt6656/wmgr.h180
-rw-r--r--drivers/staging/vt6656/wpa.c14
-rw-r--r--drivers/staging/vt6656/wpa.h16
-rw-r--r--drivers/staging/vt6656/wpa2.c50
-rw-r--r--drivers/staging/vt6656/wpa2.h20
-rw-r--r--drivers/staging/vt6656/wpactl.c25
-rw-r--r--drivers/staging/vt6656/wpactl.h9
-rw-r--r--drivers/staging/wavelan/Kconfig38
-rw-r--r--drivers/staging/wavelan/Makefile2
-rw-r--r--drivers/staging/wavelan/TODO7
-rw-r--r--drivers/staging/wavelan/i82586.h413
-rw-r--r--drivers/staging/wavelan/wavelan.c4383
-rw-r--r--drivers/staging/wavelan/wavelan.h370
-rw-r--r--drivers/staging/wavelan/wavelan.p.h696
-rw-r--r--drivers/staging/wavelan/wavelan_cs.c4601
-rw-r--r--drivers/staging/wavelan/wavelan_cs.h386
-rw-r--r--drivers/staging/wavelan/wavelan_cs.p.h766
-rw-r--r--drivers/staging/winbond/TODO (renamed from drivers/staging/winbond/README)3
-rw-r--r--drivers/staging/winbond/core.h14
-rw-r--r--drivers/staging/winbond/localpara.h452
-rw-r--r--drivers/staging/winbond/mac_structures.h342
-rw-r--r--drivers/staging/winbond/mds.c324
-rw-r--r--drivers/staging/winbond/mds_f.h20
-rw-r--r--drivers/staging/winbond/mds_s.h173
-rw-r--r--drivers/staging/winbond/mlme_s.h288
-rw-r--r--drivers/staging/winbond/mlmetxrx.c62
-rw-r--r--drivers/staging/winbond/mlmetxrx_f.h6
-rw-r--r--drivers/staging/winbond/mto.c299
-rw-r--r--drivers/staging/winbond/mto.h179
-rw-r--r--drivers/staging/winbond/phy_calibration.c9
-rw-r--r--drivers/staging/winbond/phy_calibration.h177
-rw-r--r--drivers/staging/winbond/reg.c3985
-rw-r--r--drivers/staging/winbond/scan_s.h152
-rw-r--r--drivers/staging/winbond/sme_api.h211
-rw-r--r--drivers/staging/winbond/sysdef.h18
-rw-r--r--drivers/staging/winbond/wb35reg.c618
-rw-r--r--drivers/staging/winbond/wb35reg_f.h104
-rw-r--r--drivers/staging/winbond/wb35reg_s.h221
-rw-r--r--drivers/staging/winbond/wb35rx.c258
-rw-r--r--drivers/staging/winbond/wb35tx_f.h18
-rw-r--r--drivers/staging/winbond/wbhal_f.h137
-rw-r--r--drivers/staging/winbond/wbhal_s.h502
-rw-r--r--drivers/staging/winbond/wblinux_f.h19
-rw-r--r--drivers/staging/winbond/wbusb.c187
-rw-r--r--drivers/staging/winbond/wbusb_s.h23
-rw-r--r--drivers/staging/wlags49_h2/Kconfig2
-rw-r--r--drivers/staging/wlags49_h2/README.wlags492
-rw-r--r--drivers/staging/wlags49_h2/ap_h2.c80
-rw-r--r--drivers/staging/wlags49_h2/debug.h104
-rw-r--r--drivers/staging/wlags49_h2/dhf.c143
-rw-r--r--drivers/staging/wlags49_h2/dhf.h56
-rw-r--r--drivers/staging/wlags49_h2/dhfcfg.h118
-rw-r--r--drivers/staging/wlags49_h2/hcf.c15
-rw-r--r--drivers/staging/wlags49_h2/wl_cs.c32
-rw-r--r--drivers/staging/wlags49_h2/wl_cs.h4
-rw-r--r--drivers/staging/wlags49_h2/wl_internal.h8
-rw-r--r--drivers/staging/wlags49_h2/wl_main.c3
-rw-r--r--drivers/staging/wlags49_h2/wl_netdev.c39
-rw-r--r--drivers/staging/wlags49_h2/wl_priv.c11
-rw-r--r--drivers/staging/wlags49_h2/wl_profile.c957
-rw-r--r--drivers/staging/wlags49_h2/wl_sysfs.c3
-rw-r--r--drivers/staging/wlags49_h2/wl_wext.c9
-rw-r--r--drivers/staging/wlags49_h25/Kconfig2
-rw-r--r--drivers/staging/wlan-ng/hfa384x_usb.c154
-rw-r--r--drivers/staging/wlan-ng/p80211conv.c5
-rw-r--r--drivers/staging/wlan-ng/p80211req.c5
-rw-r--r--drivers/staging/wlan-ng/p80211wext.c399
-rw-r--r--drivers/staging/wlan-ng/prism2fw.c36
-rw-r--r--drivers/staging/wlan-ng/prism2sta.c71
-rw-r--r--drivers/staging/wlan-ng/prism2usb.c65
-rw-r--r--include/linux/blkdev.h2
-rw-r--r--include/linux/swap.h1
-rw-r--r--mm/swapfile.c5
735 files changed, 56077 insertions, 51732 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 5589616082e7..b5c3b3013037 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -59,8 +59,6 @@ source "drivers/staging/wlan-ng/Kconfig"
59 59
60source "drivers/staging/echo/Kconfig" 60source "drivers/staging/echo/Kconfig"
61 61
62source "drivers/staging/poch/Kconfig"
63
64source "drivers/staging/otus/Kconfig" 62source "drivers/staging/otus/Kconfig"
65 63
66source "drivers/staging/rt2860/Kconfig" 64source "drivers/staging/rt2860/Kconfig"
@@ -113,6 +111,8 @@ source "drivers/staging/vme/Kconfig"
113 111
114source "drivers/staging/rar_register/Kconfig" 112source "drivers/staging/rar_register/Kconfig"
115 113
114source "drivers/staging/memrar/Kconfig"
115
116source "drivers/staging/sep/Kconfig" 116source "drivers/staging/sep/Kconfig"
117 117
118source "drivers/staging/iio/Kconfig" 118source "drivers/staging/iio/Kconfig"
@@ -127,19 +127,19 @@ source "drivers/staging/batman-adv/Kconfig"
127 127
128source "drivers/staging/samsung-laptop/Kconfig" 128source "drivers/staging/samsung-laptop/Kconfig"
129 129
130source "drivers/staging/strip/Kconfig" 130source "drivers/staging/sm7xx/Kconfig"
131 131
132source "drivers/staging/arlan/Kconfig" 132source "drivers/staging/dt3155/Kconfig"
133 133
134source "drivers/staging/wavelan/Kconfig" 134source "drivers/staging/dt3155v4l/Kconfig"
135 135
136source "drivers/staging/netwave/Kconfig" 136source "drivers/staging/crystalhd/Kconfig"
137 137
138source "drivers/staging/sm7xx/Kconfig" 138source "drivers/staging/cxt1e1/Kconfig"
139 139
140source "drivers/staging/dt3155/Kconfig" 140source "drivers/staging/ti-st/Kconfig"
141 141
142source "drivers/staging/crystalhd/Kconfig" 142source "drivers/staging/adis16255/Kconfig"
143 143
144endif # !STAGING_EXCLUDE_BUILD 144endif # !STAGING_EXCLUDE_BUILD
145endif # STAGING 145endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index ec45d4bb8c11..e330dd5e843d 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_USB_IP_COMMON) += usbip/
12obj-$(CONFIG_W35UND) += winbond/ 12obj-$(CONFIG_W35UND) += winbond/
13obj-$(CONFIG_PRISM2_USB) += wlan-ng/ 13obj-$(CONFIG_PRISM2_USB) += wlan-ng/
14obj-$(CONFIG_ECHO) += echo/ 14obj-$(CONFIG_ECHO) += echo/
15obj-$(CONFIG_POCH) += poch/
16obj-$(CONFIG_OTUS) += otus/ 15obj-$(CONFIG_OTUS) += otus/
17obj-$(CONFIG_RT2860) += rt2860/ 16obj-$(CONFIG_RT2860) += rt2860/
18obj-$(CONFIG_RT2870) += rt2870/ 17obj-$(CONFIG_RT2870) += rt2870/
@@ -37,6 +36,7 @@ obj-$(CONFIG_FB_UDL) += udlfb/
37obj-$(CONFIG_HYPERV) += hv/ 36obj-$(CONFIG_HYPERV) += hv/
38obj-$(CONFIG_VME_BUS) += vme/ 37obj-$(CONFIG_VME_BUS) += vme/
39obj-$(CONFIG_RAR_REGISTER) += rar_register/ 38obj-$(CONFIG_RAR_REGISTER) += rar_register/
39obj-$(CONFIG_MRST_RAR_HANDLER) += memrar/
40obj-$(CONFIG_DX_SEP) += sep/ 40obj-$(CONFIG_DX_SEP) += sep/
41obj-$(CONFIG_IIO) += iio/ 41obj-$(CONFIG_IIO) += iio/
42obj-$(CONFIG_RAMZSWAP) += ramzswap/ 42obj-$(CONFIG_RAMZSWAP) += ramzswap/
@@ -44,11 +44,10 @@ obj-$(CONFIG_WLAGS49_H2) += wlags49_h2/
44obj-$(CONFIG_WLAGS49_H25) += wlags49_h25/ 44obj-$(CONFIG_WLAGS49_H25) += wlags49_h25/
45obj-$(CONFIG_BATMAN_ADV) += batman-adv/ 45obj-$(CONFIG_BATMAN_ADV) += batman-adv/
46obj-$(CONFIG_SAMSUNG_LAPTOP) += samsung-laptop/ 46obj-$(CONFIG_SAMSUNG_LAPTOP) += samsung-laptop/
47obj-$(CONFIG_STRIP) += strip/
48obj-$(CONFIG_ARLAN) += arlan/
49obj-$(CONFIG_WAVELAN) += wavelan/
50obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/
51obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/
52obj-$(CONFIG_FB_SM7XX) += sm7xx/ 47obj-$(CONFIG_FB_SM7XX) += sm7xx/
53obj-$(CONFIG_DT3155) += dt3155/ 48obj-$(CONFIG_DT3155) += dt3155/
49obj-$(CONFIG_VIDEO_DT3155) += dt3155v4l/
54obj-$(CONFIG_CRYSTALHD) += crystalhd/ 50obj-$(CONFIG_CRYSTALHD) += crystalhd/
51obj-$(CONFIG_CXT1E1) += cxt1e1/
52obj-$(CONFIG_TI_ST) += ti-st/
53obj-$(CONFIG_ADIS16255) += adis16255/
diff --git a/drivers/staging/adis16255/Kconfig b/drivers/staging/adis16255/Kconfig
new file mode 100644
index 000000000000..a642be66adea
--- /dev/null
+++ b/drivers/staging/adis16255/Kconfig
@@ -0,0 +1,11 @@
1config ADIS16255
2 tristate "Ananlog Devices ADIS16250/16255"
3 depends on SPI && SYSFS
4 ---help---
5 If you say yes here you get support for the Analog Devices
6 ADIS16250/16255 Low Power Gyroscope. The driver exposes
7 orientation and gyroscope value, as well as sample rate
8 to the sysfs.
9
10 This driver can also be built as a module. If so, the module
11 will be called adis16255.
diff --git a/drivers/staging/adis16255/Makefile b/drivers/staging/adis16255/Makefile
new file mode 100644
index 000000000000..8c3908106bfa
--- /dev/null
+++ b/drivers/staging/adis16255/Makefile
@@ -0,0 +1 @@
obj-$(CONFIG_ADIS16255) += adis16255.o
diff --git a/drivers/staging/adis16255/adis16255.c b/drivers/staging/adis16255/adis16255.c
new file mode 100644
index 000000000000..1ba11f00b2e7
--- /dev/null
+++ b/drivers/staging/adis16255/adis16255.c
@@ -0,0 +1,466 @@
1/*
2 * Analog Devices ADIS16250/ADIS16255 Low Power Gyroscope
3 *
4 * Written by: Matthias Brugger <m_brugger@web.de>
5 *
6 * Copyright (C) 2010 Fraunhofer Institute for Integrated Circuits
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the
20 * Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 */
23
24/*
25 * The driver just has a bare interface to the sysfs (sample rate in Hz,
26 * orientation (x, y, z) and gyroscope data in °/sec.
27 *
28 * It should be added to iio subsystem when this has left staging.
29 *
30 */
31
32#include <linux/init.h>
33#include <linux/module.h>
34#include <linux/device.h>
35#include <linux/list.h>
36#include <linux/errno.h>
37#include <linux/mutex.h>
38#include <linux/slab.h>
39
40#include <linux/interrupt.h>
41#include <linux/sysfs.h>
42#include <linux/stat.h>
43#include <linux/delay.h>
44
45#include <linux/gpio.h>
46
47#include <linux/spi/spi.h>
48#include <linux/workqueue.h>
49
50#include "adis16255.h"
51
52#define ADIS_STATUS 0x3d
53#define ADIS_SMPL_PRD_MSB 0x37
54#define ADIS_SMPL_PRD_LSB 0x36
55#define ADIS_MSC_CTRL_MSB 0x35
56#define ADIS_MSC_CTRL_LSB 0x34
57#define ADIS_GPIO_CTRL 0x33
58#define ADIS_ALM_SMPL1 0x25
59#define ADIS_ALM_MAG1 0x21
60#define ADIS_GYRO_SCALE 0x17
61#define ADIS_GYRO_OUT 0x05
62#define ADIS_SUPPLY_OUT 0x03
63#define ADIS_ENDURANCE 0x01
64
65/*
66 * data structure for every sensor
67 *
68 * @dev: Driver model representation of the device.
69 * @spi: Pointer to the spi device which will manage i/o to spi bus.
70 * @data: Last read data from device.
71 * @irq_adis: GPIO Number of IRQ signal
72 * @irq: irq line manage by kernel
73 * @negative: indicates if sensor is upside down (negative == 1)
74 * @direction: indicates axis (x, y, z) the sensor is meassuring
75 */
76struct spi_adis16255_data {
77 struct device dev;
78 struct spi_device *spi;
79 s16 data;
80 int irq;
81 u8 negative;
82 char direction;
83};
84
85/*-------------------------------------------------------------------------*/
86
87static int spi_adis16255_read_data(struct spi_adis16255_data *spiadis,
88 u8 adr,
89 u8 *rbuf)
90{
91 struct spi_device *spi = spiadis->spi;
92 struct spi_message msg;
93 struct spi_transfer xfer1, xfer2;
94 u8 *buf, *rx;
95 int ret;
96
97 buf = kzalloc(4, GFP_KERNEL);
98 if (buf == NULL)
99 return -ENOMEM;
100
101 rx = kzalloc(4, GFP_KERNEL);
102 if (rx == NULL) {
103 ret = -ENOMEM;
104 goto err_buf;
105 }
106
107 buf[0] = adr;
108
109 spi_message_init(&msg);
110 memset(&xfer1, 0, sizeof(xfer1));
111 memset(&xfer2, 0, sizeof(xfer2));
112
113 xfer1.tx_buf = buf;
114 xfer1.rx_buf = buf + 2;
115 xfer1.len = 2;
116 xfer1.delay_usecs = 9;
117
118 xfer2.tx_buf = rx + 2;
119 xfer2.rx_buf = rx;
120 xfer2.len = 2;
121
122 spi_message_add_tail(&xfer1, &msg);
123 spi_message_add_tail(&xfer2, &msg);
124
125 ret = spi_sync(spi, &msg);
126 if (ret == 0) {
127 rbuf[0] = rx[0];
128 rbuf[1] = rx[1];
129 }
130
131 kfree(rx);
132err_buf:
133 kfree(buf);
134
135 return ret;
136}
137
138static int spi_adis16255_write_data(struct spi_adis16255_data *spiadis,
139 u8 adr1,
140 u8 adr2,
141 u8 *wbuf)
142{
143 struct spi_device *spi = spiadis->spi;
144 struct spi_message msg;
145 struct spi_transfer xfer1, xfer2;
146 u8 *buf, *rx;
147 int ret;
148
149 buf = kmalloc(4, GFP_KERNEL);
150 if (buf == NULL)
151 return -ENOMEM;
152
153 rx = kzalloc(4, GFP_KERNEL);
154 if (rx == NULL) {
155 ret = -ENOMEM;
156 goto err_buf;
157 }
158
159 spi_message_init(&msg);
160 memset(&xfer1, 0, sizeof(xfer1));
161 memset(&xfer2, 0, sizeof(xfer2));
162
163 buf[0] = adr1 | 0x80;
164 buf[1] = *wbuf;
165
166 buf[2] = adr2 | 0x80;
167 buf[3] = *(wbuf + 1);
168
169 xfer1.tx_buf = buf;
170 xfer1.rx_buf = rx;
171 xfer1.len = 2;
172 xfer1.delay_usecs = 9;
173
174 xfer2.tx_buf = buf+2;
175 xfer2.rx_buf = rx+2;
176 xfer2.len = 2;
177
178 spi_message_add_tail(&xfer1, &msg);
179 spi_message_add_tail(&xfer2, &msg);
180
181 ret = spi_sync(spi, &msg);
182 if (ret != 0)
183 dev_warn(&spi->dev, "write data to %#x %#x failed\n",
184 buf[0], buf[2]);
185
186 kfree(rx);
187err_buf:
188 kfree(buf);
189 return ret;
190}
191
192/*-------------------------------------------------------------------------*/
193
194static irqreturn_t adis_irq_thread(int irq, void *dev_id)
195{
196 struct spi_adis16255_data *spiadis = dev_id;
197 int status;
198 u16 value = 0;
199
200 status = spi_adis16255_read_data(spiadis, ADIS_GYRO_OUT, (u8 *)&value);
201 if (status != 0) {
202 dev_warn(&spiadis->spi->dev, "SPI FAILED\n");
203 goto exit;
204 }
205
206 /* perform on new data only... */
207 if (value & 0x8000) {
208 /* delete error and new data bit */
209 value = value & 0x3fff;
210 /* set negative value */
211 if (value & 0x2000)
212 value = value | 0xe000;
213
214 if (likely(spiadis->negative))
215 value = -value;
216
217 spiadis->data = (s16) value;
218 }
219
220exit:
221 return IRQ_HANDLED;
222}
223
224/*-------------------------------------------------------------------------*/
225
226ssize_t adis16255_show_data(struct device *device,
227 struct device_attribute *da,
228 char *buf)
229{
230 struct spi_adis16255_data *spiadis = dev_get_drvdata(device);
231 return snprintf(buf, PAGE_SIZE, "%d\n", spiadis->data);
232}
233DEVICE_ATTR(data, S_IRUGO , adis16255_show_data, NULL);
234
235ssize_t adis16255_show_direction(struct device *device,
236 struct device_attribute *da,
237 char *buf)
238{
239 struct spi_adis16255_data *spiadis = dev_get_drvdata(device);
240 return snprintf(buf, PAGE_SIZE, "%c\n", spiadis->direction);
241}
242DEVICE_ATTR(direction, S_IRUGO , adis16255_show_direction, NULL);
243
244ssize_t adis16255_show_sample_rate(struct device *device,
245 struct device_attribute *da,
246 char *buf)
247{
248 struct spi_adis16255_data *spiadis = dev_get_drvdata(device);
249 int status = 0;
250 u16 value = 0;
251 int ts = 0;
252
253 status = spi_adis16255_read_data(spiadis, ADIS_SMPL_PRD_MSB,
254 (u8 *)&value);
255 if (status != 0)
256 return -EINVAL;
257
258 if (value & 0x80) {
259 /* timebase = 60.54 ms */
260 ts = 60540 * ((0x7f & value) + 1);
261 } else {
262 /* timebase = 1.953 ms */
263 ts = 1953 * ((0x7f & value) + 1);
264 }
265
266 return snprintf(buf, PAGE_SIZE, "%d\n", (1000*1000)/ts);
267}
268DEVICE_ATTR(sample_rate, S_IRUGO , adis16255_show_sample_rate, NULL);
269
270static struct attribute *adis16255_attributes[] = {
271 &dev_attr_data.attr,
272 &dev_attr_direction.attr,
273 &dev_attr_sample_rate.attr,
274 NULL
275};
276
277static const struct attribute_group adis16255_attr_group = {
278 .attrs = adis16255_attributes,
279};
280
281/*-------------------------------------------------------------------------*/
282
283static int spi_adis16255_shutdown(struct spi_adis16255_data *spiadis)
284{
285 u16 value = 0;
286 /* turn sensor off */
287 spi_adis16255_write_data(spiadis,
288 ADIS_SMPL_PRD_MSB, ADIS_SMPL_PRD_LSB,
289 (u8 *)&value);
290 spi_adis16255_write_data(spiadis,
291 ADIS_MSC_CTRL_MSB, ADIS_MSC_CTRL_LSB,
292 (u8 *)&value);
293 return 0;
294}
295
296static int spi_adis16255_bringup(struct spi_adis16255_data *spiadis)
297{
298 int status = 0;
299 u16 value = 0;
300
301 status = spi_adis16255_read_data(spiadis, ADIS_GYRO_SCALE,
302 (u8 *)&value);
303 if (status != 0)
304 goto err;
305 if (value != 0x0800) {
306 dev_warn(&spiadis->spi->dev, "Scale factor is none default"
307 "value (%.4x)\n", value);
308 }
309
310 /* timebase = 1.953 ms, Ns = 0 -> 512 Hz sample rate */
311 value = 0x0001;
312 status = spi_adis16255_write_data(spiadis,
313 ADIS_SMPL_PRD_MSB, ADIS_SMPL_PRD_LSB,
314 (u8 *)&value);
315 if (status != 0)
316 goto err;
317
318 /* start internal self-test */
319 value = 0x0400;
320 status = spi_adis16255_write_data(spiadis,
321 ADIS_MSC_CTRL_MSB, ADIS_MSC_CTRL_LSB,
322 (u8 *)&value);
323 if (status != 0)
324 goto err;
325
326 /* wait 35 ms to finish self-test */
327 msleep(35);
328
329 value = 0x0000;
330 status = spi_adis16255_read_data(spiadis, ADIS_STATUS,
331 (u8 *)&value);
332 if (status != 0)
333 goto err;
334
335 if (value & 0x23) {
336 if (value & 0x20) {
337 dev_warn(&spiadis->spi->dev, "self-test error\n");
338 status = -ENODEV;
339 goto err;
340 } else if (value & 0x3) {
341 dev_warn(&spiadis->spi->dev, "Sensor voltage"
342 "out of range.\n");
343 status = -ENODEV;
344 goto err;
345 }
346 }
347
348 /* set interrupt to active high on DIO0 when data ready */
349 value = 0x0006;
350 status = spi_adis16255_write_data(spiadis,
351 ADIS_MSC_CTRL_MSB, ADIS_MSC_CTRL_LSB,
352 (u8 *)&value);
353 if (status != 0)
354 goto err;
355 return status;
356
357err:
358 spi_adis16255_shutdown(spiadis);
359 return status;
360}
361
362/*-------------------------------------------------------------------------*/
363
364static int spi_adis16255_probe(struct spi_device *spi)
365{
366
367 struct adis16255_init_data *init_data = spi->dev.platform_data;
368 struct spi_adis16255_data *spiadis;
369 int status = 0;
370
371 spiadis = kzalloc(sizeof(*spiadis), GFP_KERNEL);
372 if (!spiadis)
373 return -ENOMEM;
374
375 spiadis->spi = spi;
376 spiadis->direction = init_data->direction;
377
378 if (init_data->negative)
379 spiadis->negative = 1;
380
381 status = gpio_request(init_data->irq, "adis16255");
382 if (status != 0)
383 goto err;
384
385 status = gpio_direction_input(init_data->irq);
386 if (status != 0)
387 goto gpio_err;
388
389 spiadis->irq = gpio_to_irq(init_data->irq);
390
391 status = request_threaded_irq(spiadis->irq,
392 NULL, adis_irq_thread,
393 IRQF_DISABLED, "adis-driver", spiadis);
394
395 if (status != 0) {
396 dev_err(&spi->dev, "IRQ request failed\n");
397 goto gpio_err;
398 }
399
400 dev_dbg(&spi->dev, "GPIO %d IRQ %d\n", init_data->irq, spiadis->irq);
401
402 dev_set_drvdata(&spi->dev, spiadis);
403 status = sysfs_create_group(&spi->dev.kobj, &adis16255_attr_group);
404 if (status != 0)
405 goto irq_err;
406
407 status = spi_adis16255_bringup(spiadis);
408 if (status != 0)
409 goto irq_err;
410
411 dev_info(&spi->dev, "spi_adis16255 driver added!\n");
412
413 return status;
414
415irq_err:
416 free_irq(spiadis->irq, spiadis);
417gpio_err:
418 gpio_free(init_data->irq);
419err:
420 kfree(spiadis);
421 return status;
422}
423
424static int spi_adis16255_remove(struct spi_device *spi)
425{
426 struct spi_adis16255_data *spiadis = dev_get_drvdata(&spi->dev);
427
428 spi_adis16255_shutdown(spiadis);
429
430 free_irq(spiadis->irq, spiadis);
431 gpio_free(irq_to_gpio(spiadis->irq));
432
433 sysfs_remove_group(&spiadis->spi->dev.kobj, &adis16255_attr_group);
434
435 kfree(spiadis);
436
437 dev_info(&spi->dev, "spi_adis16255 driver removed!\n");
438 return 0;
439}
440
441static struct spi_driver spi_adis16255_drv = {
442 .driver = {
443 .name = "spi_adis16255",
444 .owner = THIS_MODULE,
445 },
446 .probe = spi_adis16255_probe,
447 .remove = __devexit_p(spi_adis16255_remove),
448};
449
450/*-------------------------------------------------------------------------*/
451
452static int __init spi_adis16255_init(void)
453{
454 return spi_register_driver(&spi_adis16255_drv);
455}
456module_init(spi_adis16255_init);
457
458static void __exit spi_adis16255_exit(void)
459{
460 spi_unregister_driver(&spi_adis16255_drv);
461}
462module_exit(spi_adis16255_exit);
463
464MODULE_AUTHOR("Matthias Brugger");
465MODULE_DESCRIPTION("SPI device driver for ADIS16255 sensor");
466MODULE_LICENSE("GPL");
diff --git a/drivers/staging/adis16255/adis16255.h b/drivers/staging/adis16255/adis16255.h
new file mode 100644
index 000000000000..03e07001bab2
--- /dev/null
+++ b/drivers/staging/adis16255/adis16255.h
@@ -0,0 +1,12 @@
1#ifndef ADIS16255_H
2#define ADIS16255_H
3
4#include <linux/types.h>
5
6struct adis16255_init_data {
7 char direction;
8 u8 negative;
9 int irq;
10};
11
12#endif
diff --git a/drivers/staging/arlan/Kconfig b/drivers/staging/arlan/Kconfig
deleted file mode 100644
index 5e42b81f97b0..000000000000
--- a/drivers/staging/arlan/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
1config ARLAN
2 tristate "Aironet Arlan 655 & IC2200 DS support"
3 depends on ISA && !64BIT && WLAN
4 select WIRELESS_EXT
5 ---help---
6 Aironet makes Arlan, a class of wireless LAN adapters. These use the
7 www.Telxon.com chip, which is also used on several similar cards.
8 This driver is tested on the 655 and IC2200 series cards. Look at
9 <http://www.ylenurme.ee/~elmer/655/> for the latest information.
10
11 The driver is built as two modules, arlan and arlan-proc. The latter
12 is the /proc interface and is not needed most of time.
13
14 On some computers the card ends up in non-valid state after some
15 time. Use a ping-reset script to clear it.
diff --git a/drivers/staging/arlan/Makefile b/drivers/staging/arlan/Makefile
deleted file mode 100644
index 5a84d4402f21..000000000000
--- a/drivers/staging/arlan/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1obj-$(CONFIG_ARLAN) += arlan.o
2
3arlan-objs := arlan-main.o arlan-proc.o
diff --git a/drivers/staging/arlan/TODO b/drivers/staging/arlan/TODO
deleted file mode 100644
index 9bd15a2f6d9e..000000000000
--- a/drivers/staging/arlan/TODO
+++ /dev/null
@@ -1,7 +0,0 @@
1TODO:
2 - step up and maintain this driver to ensure that it continues
3 to work. Having the hardware for this is pretty much a
4 requirement. If this does not happen, the will be removed in
5 the 2.6.35 kernel release.
6
7Please send patches to Greg Kroah-Hartman <greg@kroah.com>.
diff --git a/drivers/staging/arlan/arlan-main.c b/drivers/staging/arlan/arlan-main.c
deleted file mode 100644
index 80284522c42b..000000000000
--- a/drivers/staging/arlan/arlan-main.c
+++ /dev/null
@@ -1,1883 +0,0 @@
1/*
2 * Copyright (C) 1997 Cullen Jennings
3 * Copyright (C) 1998 Elmer Joandiu, elmer@ylenurme.ee
4 * GNU General Public License applies
5 * This module provides support for the Arlan 655 card made by Aironet
6 */
7
8#include "arlan.h"
9
10#if BITS_PER_LONG != 32
11# error FIXME: this driver requires a 32-bit platform
12#endif
13
14static const char *arlan_version = "C.Jennigs 97 & Elmer.Joandi@ut.ee Oct'98, http://www.ylenurme.ee/~elmer/655/";
15
16struct net_device *arlan_device[MAX_ARLANS];
17
18static int SID = SIDUNKNOWN;
19static int radioNodeId = radioNodeIdUNKNOWN;
20static char encryptionKey[12] = {'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h'};
21int arlan_debug = debugUNKNOWN;
22static int spreadingCode = spreadingCodeUNKNOWN;
23static int channelNumber = channelNumberUNKNOWN;
24static int channelSet = channelSetUNKNOWN;
25static int systemId = systemIdUNKNOWN;
26static int registrationMode = registrationModeUNKNOWN;
27static int keyStart;
28static int tx_delay_ms;
29static int retries = 5;
30static int tx_queue_len = 1;
31static int arlan_EEPROM_bad;
32
33#ifdef ARLAN_DEBUGGING
34
35static int testMemory = testMemoryUNKNOWN;
36static int irq = irqUNKNOWN;
37static int txScrambled = 1;
38static int mdebug;
39
40module_param(irq, int, 0);
41module_param(mdebug, int, 0);
42module_param(testMemory, int, 0);
43module_param(txScrambled, int, 0);
44MODULE_PARM_DESC(irq, "(unused)");
45MODULE_PARM_DESC(testMemory, "(unused)");
46MODULE_PARM_DESC(mdebug, "Arlan multicast debugging (0-1)");
47#endif
48
49module_param_named(debug, arlan_debug, int, 0);
50module_param(spreadingCode, int, 0);
51module_param(channelNumber, int, 0);
52module_param(channelSet, int, 0);
53module_param(systemId, int, 0);
54module_param(registrationMode, int, 0);
55module_param(radioNodeId, int, 0);
56module_param(SID, int, 0);
57module_param(keyStart, int, 0);
58module_param(tx_delay_ms, int, 0);
59module_param(retries, int, 0);
60module_param(tx_queue_len, int, 0);
61module_param_named(EEPROM_bad, arlan_EEPROM_bad, int, 0);
62MODULE_PARM_DESC(debug, "Arlan debug enable (0-1)");
63MODULE_PARM_DESC(retries, "Arlan maximum packet retransmisions");
64#ifdef ARLAN_ENTRY_EXIT_DEBUGGING
65static int arlan_entry_debug;
66static int arlan_exit_debug;
67static int arlan_entry_and_exit_debug;
68module_param_named(entry_debug, arlan_entry_debug, int, 0);
69module_param_named(exit_debug, arlan_exit_debug, int, 0);
70module_param_named(entry_and_exit_debug, arlan_entry_and_exit_debug, int, 0);
71MODULE_PARM_DESC(entry_debug, "Arlan driver function entry debugging");
72MODULE_PARM_DESC(exit_debug, "Arlan driver function exit debugging");
73MODULE_PARM_DESC(entry_and_exit_debug, "Arlan driver function entry and exit debugging");
74#endif
75
76struct arlan_conf_stru arlan_conf[MAX_ARLANS];
77static int arlans_found;
78
79static int arlan_open(struct net_device *dev);
80static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev);
81static irqreturn_t arlan_interrupt(int irq, void *dev_id);
82static int arlan_close(struct net_device *dev);
83static struct net_device_stats *
84 arlan_statistics (struct net_device *dev);
85static void arlan_set_multicast (struct net_device *dev);
86static int arlan_hw_tx (struct net_device* dev, char *buf, int length );
87static int arlan_hw_config (struct net_device * dev);
88static void arlan_tx_done_interrupt (struct net_device * dev, int status);
89static void arlan_rx_interrupt (struct net_device * dev, u_char rxStatus, u_short, u_short);
90static void arlan_process_interrupt (struct net_device * dev);
91static void arlan_tx_timeout (struct net_device *dev);
92
93static inline long us2ticks(int us)
94{
95 return us * (1000000 / HZ);
96}
97
98
99#ifdef ARLAN_ENTRY_EXIT_DEBUGGING
100#define ARLAN_DEBUG_ENTRY(name) \
101 {\
102 struct timeval timev;\
103 do_gettimeofday(&timev);\
104 if (arlan_entry_debug || arlan_entry_and_exit_debug)\
105 printk("--->>>" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec));\
106 }
107#define ARLAN_DEBUG_EXIT(name) \
108 {\
109 struct timeval timev;\
110 do_gettimeofday(&timev);\
111 if (arlan_exit_debug || arlan_entry_and_exit_debug)\
112 printk("<<<---" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec) );\
113 }
114#else
115#define ARLAN_DEBUG_ENTRY(name)
116#define ARLAN_DEBUG_EXIT(name)
117#endif
118
119
120#define arlan_interrupt_ack(dev)\
121 clearClearInterrupt(dev);\
122 setClearInterrupt(dev);
123
124static inline int arlan_drop_tx(struct net_device *dev)
125{
126 struct arlan_private *priv = netdev_priv(dev);
127
128 dev->stats.tx_errors++;
129 if (priv->Conf->tx_delay_ms)
130 {
131 priv->tx_done_delayed = jiffies + priv->Conf->tx_delay_ms * HZ / 1000 + 1;
132 }
133 else
134 {
135 priv->waiting_command_mask &= ~ARLAN_COMMAND_TX;
136 TXHEAD(dev).offset = 0;
137 TXTAIL(dev).offset = 0;
138 priv->txLast = 0;
139 priv->bad = 0;
140 if (!priv->under_reset && !priv->under_config)
141 netif_wake_queue (dev);
142 }
143 return 1;
144}
145
146
147int arlan_command(struct net_device *dev, int command_p)
148{
149 struct arlan_private *priv = netdev_priv(dev);
150 volatile struct arlan_shmem __iomem *arlan = priv->card;
151 struct arlan_conf_stru *conf = priv->Conf;
152 int udelayed = 0;
153 int i = 0;
154 unsigned long flags;
155
156 ARLAN_DEBUG_ENTRY("arlan_command");
157
158 if (priv->card_polling_interval)
159 priv->card_polling_interval = 1;
160
161 if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
162 printk(KERN_DEBUG "arlan_command, %lx commandByte %x waiting %lx incoming %x \n",
163 jiffies, READSHMB(arlan->commandByte),
164 priv->waiting_command_mask, command_p);
165
166 priv->waiting_command_mask |= command_p;
167
168 if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
169 if (time_after(jiffies, priv->lastReset + 5 * HZ))
170 priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET;
171
172 if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ACK)
173 {
174 arlan_interrupt_ack(dev);
175 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ACK;
176 }
177 if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ENABLE)
178 {
179 setInterruptEnable(dev);
180 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ENABLE;
181 }
182
183 /* Card access serializing lock */
184 spin_lock_irqsave(&priv->lock, flags);
185
186 /* Check cards status and waiting */
187
188 if (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW))
189 {
190 while (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW))
191 {
192 if (READSHMB(arlan->resetFlag) ||
193 READSHMB(arlan->commandByte)) /* ||
194 (readControlRegister(dev) & ARLAN_ACCESS))
195 */
196 udelay(40);
197 else
198 priv->waiting_command_mask &= ~(ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW);
199
200 udelayed++;
201
202 if (priv->waiting_command_mask & ARLAN_COMMAND_LONG_WAIT_NOW)
203 {
204 if (udelayed * 40 > 1000000)
205 {
206 printk(KERN_ERR "%s long wait too long \n", dev->name);
207 priv->waiting_command_mask |= ARLAN_COMMAND_RESET;
208 break;
209 }
210 }
211 else if (priv->waiting_command_mask & ARLAN_COMMAND_WAIT_NOW)
212 {
213 if (udelayed * 40 > 1000)
214 {
215 printk(KERN_ERR "%s short wait too long \n", dev->name);
216 goto bad_end;
217 }
218 }
219 }
220 }
221 else
222 {
223 i = 0;
224 while ((READSHMB(arlan->resetFlag) ||
225 READSHMB(arlan->commandByte)) &&
226 conf->pre_Command_Wait > (i++) * 10)
227 udelay(10);
228
229
230 if ((READSHMB(arlan->resetFlag) ||
231 READSHMB(arlan->commandByte)) &&
232 !(priv->waiting_command_mask & ARLAN_COMMAND_RESET))
233 {
234 goto card_busy_end;
235 }
236 }
237 if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
238 priv->under_reset = 1;
239 if (priv->waiting_command_mask & ARLAN_COMMAND_CONF)
240 priv->under_config = 1;
241
242 /* Issuing command */
243 arlan_lock_card_access(dev);
244 if (priv->waiting_command_mask & ARLAN_COMMAND_POWERUP)
245 {
246 // if (readControlRegister(dev) & (ARLAN_ACCESS && ARLAN_POWER))
247 setPowerOn(dev);
248 arlan_interrupt_lancpu(dev);
249 priv->waiting_command_mask &= ~ARLAN_COMMAND_POWERUP;
250 priv->waiting_command_mask |= ARLAN_COMMAND_RESET;
251 priv->card_polling_interval = HZ / 10;
252 }
253 else if (priv->waiting_command_mask & ARLAN_COMMAND_ACTIVATE)
254 {
255 WRITESHMB(arlan->commandByte, ARLAN_COM_ACTIVATE);
256 arlan_interrupt_lancpu(dev);
257 priv->waiting_command_mask &= ~ARLAN_COMMAND_ACTIVATE;
258 priv->card_polling_interval = HZ / 10;
259 }
260 else if (priv->waiting_command_mask & ARLAN_COMMAND_RX_ABORT)
261 {
262 if (priv->rx_command_given)
263 {
264 WRITESHMB(arlan->commandByte, ARLAN_COM_RX_ABORT);
265 arlan_interrupt_lancpu(dev);
266 priv->rx_command_given = 0;
267 }
268 priv->waiting_command_mask &= ~ARLAN_COMMAND_RX_ABORT;
269 priv->card_polling_interval = 1;
270 }
271 else if (priv->waiting_command_mask & ARLAN_COMMAND_TX_ABORT)
272 {
273 if (priv->tx_command_given)
274 {
275 WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ABORT);
276 arlan_interrupt_lancpu(dev);
277 priv->tx_command_given = 0;
278 }
279 priv->waiting_command_mask &= ~ARLAN_COMMAND_TX_ABORT;
280 priv->card_polling_interval = 1;
281 }
282 else if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
283 {
284 priv->under_reset=1;
285 netif_stop_queue (dev);
286
287 arlan_drop_tx(dev);
288 if (priv->tx_command_given || priv->rx_command_given)
289 {
290 printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name);
291 }
292 netif_stop_queue (dev);
293 if (arlan_debug & ARLAN_DEBUG_RESET)
294 printk(KERN_ERR "%s: Doing chip reset\n", dev->name);
295 priv->lastReset = jiffies;
296 WRITESHM(arlan->commandByte, 0, u_char);
297 /* hold card in reset state */
298 setHardwareReset(dev);
299 /* set reset flag and then release reset */
300 WRITESHM(arlan->resetFlag, 0xff, u_char);
301 clearChannelAttention(dev);
302 clearHardwareReset(dev);
303 priv->card_polling_interval = HZ / 4;
304 priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET;
305 priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK;
306// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RENABLE;
307// priv->waiting_command_mask |= ARLAN_COMMAND_RX;
308 }
309 else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RACK)
310 {
311 clearHardwareReset(dev);
312 clearClearInterrupt(dev);
313 setClearInterrupt(dev);
314 setInterruptEnable(dev);
315 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_RACK;
316 priv->waiting_command_mask |= ARLAN_COMMAND_CONF;
317 priv->under_config = 1;
318 priv->under_reset = 0;
319 }
320 else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RENABLE)
321 {
322 setInterruptEnable(dev);
323 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_RENABLE;
324 }
325 else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF)
326 {
327 if (priv->tx_command_given || priv->rx_command_given)
328 {
329 printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name);
330 }
331 arlan_drop_tx(dev);
332 setInterruptEnable(dev);
333 arlan_hw_config(dev);
334 arlan_interrupt_lancpu(dev);
335 priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF;
336 priv->card_polling_interval = HZ / 10;
337// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK;
338// priv->waiting_command_mask |= ARLAN_COMMAND_INT_ENABLE;
339 priv->waiting_command_mask |= ARLAN_COMMAND_CONF_WAIT;
340 }
341 else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF_WAIT)
342 {
343 if (READSHMB(arlan->configuredStatusFlag) != 0 &&
344 READSHMB(arlan->diagnosticInfo) == 0xff)
345 {
346 priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF_WAIT;
347 priv->waiting_command_mask |= ARLAN_COMMAND_RX;
348 priv->waiting_command_mask |= ARLAN_COMMAND_TBUSY_CLEAR;
349 priv->card_polling_interval = HZ / 10;
350 priv->tx_command_given = 0;
351 priv->under_config = 0;
352 }
353 else
354 {
355 priv->card_polling_interval = 1;
356 if (arlan_debug & ARLAN_DEBUG_TIMING)
357 printk(KERN_ERR "configure delayed \n");
358 }
359 }
360 else if (priv->waiting_command_mask & ARLAN_COMMAND_RX)
361 {
362 if (!registrationBad(dev))
363 {
364 setInterruptEnable(dev);
365 memset_io(arlan->commandParameter, 0, 0xf);
366 WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_RX_ENABLE);
367 WRITESHMB(arlan->commandParameter[0], conf->rxParameter);
368 arlan_interrupt_lancpu(dev);
369 priv->rx_command_given = 0; // mnjah, bad
370 priv->waiting_command_mask &= ~ARLAN_COMMAND_RX;
371 priv->card_polling_interval = 1;
372 }
373 else
374 priv->card_polling_interval = 2;
375 }
376 else if (priv->waiting_command_mask & ARLAN_COMMAND_TBUSY_CLEAR)
377 {
378 if ( !registrationBad(dev) &&
379 (netif_queue_stopped(dev) || !netif_running(dev)) )
380 {
381 priv->waiting_command_mask &= ~ARLAN_COMMAND_TBUSY_CLEAR;
382 netif_wake_queue (dev);
383 }
384 }
385 else if (priv->waiting_command_mask & ARLAN_COMMAND_TX)
386 {
387 if (!test_and_set_bit(0, (void *) &priv->tx_command_given))
388 {
389 if (time_after(jiffies,
390 priv->tx_last_sent + us2ticks(conf->rx_tweak1))
391 || time_before(jiffies,
392 priv->last_rx_int_ack_time + us2ticks(conf->rx_tweak2)))
393 {
394 setInterruptEnable(dev);
395 memset_io(arlan->commandParameter, 0, 0xf);
396 WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ENABLE | ARLAN_COM_INT);
397 memcpy_toio(arlan->commandParameter, &TXLAST(dev), 14);
398// for ( i=1 ; i < 15 ; i++) printk("%02x:",READSHMB(arlan->commandParameter[i]));
399 priv->tx_last_sent = jiffies;
400 arlan_interrupt_lancpu(dev);
401 priv->tx_command_given = 1;
402 priv->waiting_command_mask &= ~ARLAN_COMMAND_TX;
403 priv->card_polling_interval = 1;
404 }
405 else
406 {
407 priv->tx_command_given = 0;
408 priv->card_polling_interval = 1;
409 }
410 }
411 else if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
412 printk(KERN_ERR "tx command when tx chain locked \n");
413 }
414 else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOPINT)
415 {
416 {
417 WRITESHMB(arlan->commandByte, ARLAN_COM_NOP | ARLAN_COM_INT);
418 }
419 arlan_interrupt_lancpu(dev);
420 priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOPINT;
421 priv->card_polling_interval = HZ / 3;
422 }
423 else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOP)
424 {
425 WRITESHMB(arlan->commandByte, ARLAN_COM_NOP);
426 arlan_interrupt_lancpu(dev);
427 priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOP;
428 priv->card_polling_interval = HZ / 3;
429 }
430 else if (priv->waiting_command_mask & ARLAN_COMMAND_SLOW_POLL)
431 {
432 WRITESHMB(arlan->commandByte, ARLAN_COM_GOTO_SLOW_POLL);
433 arlan_interrupt_lancpu(dev);
434 priv->waiting_command_mask &= ~ARLAN_COMMAND_SLOW_POLL;
435 priv->card_polling_interval = HZ / 3;
436 }
437 else if (priv->waiting_command_mask & ARLAN_COMMAND_POWERDOWN)
438 {
439 setPowerOff(dev);
440 if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
441 printk(KERN_WARNING "%s: Arlan Going Standby\n", dev->name);
442 priv->waiting_command_mask &= ~ARLAN_COMMAND_POWERDOWN;
443 priv->card_polling_interval = 3 * HZ;
444 }
445 arlan_unlock_card_access(dev);
446 for (i = 0; READSHMB(arlan->commandByte) && i < 20; i++)
447 udelay(10);
448 if (READSHMB(arlan->commandByte))
449 if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
450 printk(KERN_ERR "card busy leaving command %lx\n", priv->waiting_command_mask);
451
452 spin_unlock_irqrestore(&priv->lock, flags);
453 ARLAN_DEBUG_EXIT("arlan_command");
454 priv->last_command_buff_free_time = jiffies;
455 return 0;
456
457card_busy_end:
458 if (time_after(jiffies, priv->last_command_buff_free_time + HZ))
459 priv->waiting_command_mask |= ARLAN_COMMAND_CLEAN_AND_RESET;
460
461 if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
462 printk(KERN_ERR "%s arlan_command card busy end \n", dev->name);
463 spin_unlock_irqrestore(&priv->lock, flags);
464 ARLAN_DEBUG_EXIT("arlan_command");
465 return 1;
466
467bad_end:
468 printk(KERN_ERR "%s arlan_command bad end \n", dev->name);
469
470 spin_unlock_irqrestore(&priv->lock, flags);
471 ARLAN_DEBUG_EXIT("arlan_command");
472
473 return -1;
474}
475
476static inline void arlan_command_process(struct net_device *dev)
477{
478 struct arlan_private *priv = netdev_priv(dev);
479
480 int times = 0;
481 while (priv->waiting_command_mask && times < 8)
482 {
483 if (priv->waiting_command_mask)
484 {
485 if (arlan_command(dev, 0))
486 break;
487 times++;
488 }
489 /* if long command, we won't repeat trying */ ;
490 if (priv->card_polling_interval > 1)
491 break;
492 times++;
493 }
494}
495
496
497static inline void arlan_retransmit_now(struct net_device *dev)
498{
499 struct arlan_private *priv = netdev_priv(dev);
500
501
502 ARLAN_DEBUG_ENTRY("arlan_retransmit_now");
503 if (TXLAST(dev).offset == 0)
504 {
505 if (TXHEAD(dev).offset)
506 {
507 priv->txLast = 0;
508 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to head \n");
509
510 }
511 else if (TXTAIL(dev).offset)
512 {
513 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to tail \n");
514 priv->txLast = 1;
515 }
516 else
517 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "ReTransmit buff empty");
518 netif_wake_queue (dev);
519 return;
520
521 }
522 arlan_command(dev, ARLAN_COMMAND_TX);
523
524 priv->Conf->driverRetransmissions++;
525 priv->retransmissions++;
526
527 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk("Retransmit %d bytes \n", TXLAST(dev).length);
528
529 ARLAN_DEBUG_EXIT("arlan_retransmit_now");
530}
531
532
533
534static void arlan_registration_timer(unsigned long data)
535{
536 struct net_device *dev = (struct net_device *) data;
537 struct arlan_private *priv = netdev_priv(dev);
538 int bh_mark_needed = 0;
539 int next_tick = 1;
540 long lostTime = ((long)jiffies - (long)priv->registrationLastSeen)
541 * (1000/HZ);
542
543 if (registrationBad(dev))
544 {
545 priv->registrationLostCount++;
546 if (lostTime > 7000 && lostTime < 7200)
547 {
548 printk(KERN_NOTICE "%s registration Lost \n", dev->name);
549 }
550 if (lostTime / priv->reRegisterExp > 2000)
551 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_CONF);
552 if (lostTime / (priv->reRegisterExp) > 3500)
553 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
554 if (priv->reRegisterExp < 400)
555 priv->reRegisterExp += 2;
556 if (lostTime > 7200)
557 {
558 next_tick = HZ;
559 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
560 }
561 }
562 else
563 {
564 if (priv->Conf->registrationMode && lostTime > 10000 &&
565 priv->registrationLostCount)
566 {
567 printk(KERN_NOTICE "%s registration is back after %ld milliseconds\n",
568 dev->name, lostTime);
569 }
570 priv->registrationLastSeen = jiffies;
571 priv->registrationLostCount = 0;
572 priv->reRegisterExp = 1;
573 if (!netif_running(dev) )
574 netif_wake_queue(dev);
575 if (time_after(priv->tx_last_sent,priv->tx_last_cleared) &&
576 time_after(jiffies, priv->tx_last_sent * 5*HZ) ){
577 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
578 priv->tx_last_cleared = jiffies;
579 }
580 }
581
582
583 if (!registrationBad(dev) && priv->ReTransmitRequested)
584 {
585 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
586 printk(KERN_ERR "Retransmit from timer \n");
587 priv->ReTransmitRequested = 0;
588 arlan_retransmit_now(dev);
589 }
590 if (!registrationBad(dev) &&
591 time_after(jiffies, priv->tx_done_delayed) &&
592 priv->tx_done_delayed != 0)
593 {
594 TXLAST(dev).offset = 0;
595 if (priv->txLast)
596 priv->txLast = 0;
597 else if (TXTAIL(dev).offset)
598 priv->txLast = 1;
599 if (TXLAST(dev).offset)
600 {
601 arlan_retransmit_now(dev);
602 dev->trans_start = jiffies;
603 }
604 if (!(TXHEAD(dev).offset && TXTAIL(dev).offset))
605 {
606 netif_wake_queue (dev);
607 }
608 priv->tx_done_delayed = 0;
609 bh_mark_needed = 1;
610 }
611 if (bh_mark_needed)
612 {
613 netif_wake_queue (dev);
614 }
615 arlan_process_interrupt(dev);
616
617 if (next_tick < priv->card_polling_interval)
618 next_tick = priv->card_polling_interval;
619
620 priv->timer.expires = jiffies + next_tick;
621
622 add_timer(&priv->timer);
623}
624
625
626#ifdef ARLAN_DEBUGGING
627
628static void arlan_print_registers(struct net_device *dev, int line)
629{
630 struct arlan_private *priv = netdev_priv(dev);
631 volatile struct arlan_shmem *arlan = priv->card;
632
633 u_char hostcpuLock, lancpuLock, controlRegister, cntrlRegImage,
634 txStatus, rxStatus, interruptInProgress, commandByte;
635
636
637 ARLAN_DEBUG_ENTRY("arlan_print_registers");
638 READSHM(interruptInProgress, arlan->interruptInProgress, u_char);
639 READSHM(hostcpuLock, arlan->hostcpuLock, u_char);
640 READSHM(lancpuLock, arlan->lancpuLock, u_char);
641 READSHM(controlRegister, arlan->controlRegister, u_char);
642 READSHM(cntrlRegImage, arlan->cntrlRegImage, u_char);
643 READSHM(txStatus, arlan->txStatus, u_char);
644 READSHM(rxStatus, arlan->rxStatus, u_char);
645 READSHM(commandByte, arlan->commandByte, u_char);
646
647 printk(KERN_WARNING "line %04d IP %02x HL %02x LL %02x CB %02x CR %02x CRI %02x TX %02x RX %02x\n",
648 line, interruptInProgress, hostcpuLock, lancpuLock, commandByte,
649 controlRegister, cntrlRegImage, txStatus, rxStatus);
650
651 ARLAN_DEBUG_EXIT("arlan_print_registers");
652}
653#endif
654
655
656static int arlan_hw_tx(struct net_device *dev, char *buf, int length)
657{
658 int i;
659
660 struct arlan_private *priv = netdev_priv(dev);
661 volatile struct arlan_shmem __iomem *arlan = priv->card;
662 struct arlan_conf_stru *conf = priv->Conf;
663
664 int tailStarts = 0x800;
665 int headEnds = 0x0;
666
667
668 ARLAN_DEBUG_ENTRY("arlan_hw_tx");
669 if (TXHEAD(dev).offset)
670 headEnds = (((TXHEAD(dev).offset + TXHEAD(dev).length - offsetof(struct arlan_shmem, txBuffer)) / 64) + 1) * 64;
671 if (TXTAIL(dev).offset)
672 tailStarts = 0x800 - (((TXTAIL(dev).offset - offsetof(struct arlan_shmem, txBuffer)) / 64) + 2) * 64;
673
674
675 if (!TXHEAD(dev).offset && length < tailStarts)
676 {
677 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
678 printk(KERN_ERR "TXHEAD insert, tailStart %d\n", tailStarts);
679
680 TXHEAD(dev).offset =
681 offsetof(struct arlan_shmem, txBuffer);
682 TXHEAD(dev).length = length - ARLAN_FAKE_HDR_LEN;
683 for (i = 0; i < 6; i++)
684 TXHEAD(dev).dest[i] = buf[i];
685 TXHEAD(dev).clear = conf->txClear;
686 TXHEAD(dev).retries = conf->txRetries; /* 0 is use default */
687 TXHEAD(dev).routing = conf->txRouting;
688 TXHEAD(dev).scrambled = conf->txScrambled;
689 memcpy_toio((char __iomem *)arlan + TXHEAD(dev).offset, buf + ARLAN_FAKE_HDR_LEN, TXHEAD(dev).length);
690 }
691 else if (!TXTAIL(dev).offset && length < (0x800 - headEnds))
692 {
693 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
694 printk(KERN_ERR "TXTAIL insert, headEnd %d\n", headEnds);
695
696 TXTAIL(dev).offset =
697 offsetof(struct arlan_shmem, txBuffer) + 0x800 - (length / 64 + 2) * 64;
698 TXTAIL(dev).length = length - ARLAN_FAKE_HDR_LEN;
699 for (i = 0; i < 6; i++)
700 TXTAIL(dev).dest[i] = buf[i];
701 TXTAIL(dev).clear = conf->txClear;
702 TXTAIL(dev).retries = conf->txRetries;
703 TXTAIL(dev).routing = conf->txRouting;
704 TXTAIL(dev).scrambled = conf->txScrambled;
705 memcpy_toio(((char __iomem *)arlan + TXTAIL(dev).offset), buf + ARLAN_FAKE_HDR_LEN, TXTAIL(dev).length);
706 }
707 else
708 {
709 netif_stop_queue (dev);
710 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
711 printk(KERN_ERR "TX TAIL & HEAD full, return, tailStart %d headEnd %d\n", tailStarts, headEnds);
712 return -1;
713 }
714 priv->out_bytes += length;
715 priv->out_bytes10 += length;
716 if (conf->measure_rate < 1)
717 conf->measure_rate = 1;
718 if (time_after(jiffies, priv->out_time + conf->measure_rate * HZ))
719 {
720 conf->out_speed = priv->out_bytes / conf->measure_rate;
721 priv->out_bytes = 0;
722 priv->out_time = jiffies;
723 }
724 if (time_after(jiffies, priv->out_time10 + conf->measure_rate * 10*HZ))
725 {
726 conf->out_speed10 = priv->out_bytes10 / (10 * conf->measure_rate);
727 priv->out_bytes10 = 0;
728 priv->out_time10 = jiffies;
729 }
730 if (TXHEAD(dev).offset && TXTAIL(dev).offset)
731 {
732 netif_stop_queue (dev);
733 return 0;
734 }
735 else
736 netif_start_queue (dev);
737
738
739 IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
740 printk(KERN_WARNING "%s Transmit t %2x:%2x:%2x:%2x:%2x:%2x f %2x:%2x:%2x:%2x:%2x:%2x \n", dev->name,
741 (unsigned char) buf[0], (unsigned char) buf[1], (unsigned char) buf[2], (unsigned char) buf[3],
742 (unsigned char) buf[4], (unsigned char) buf[5], (unsigned char) buf[6], (unsigned char) buf[7],
743 (unsigned char) buf[8], (unsigned char) buf[9], (unsigned char) buf[10], (unsigned char) buf[11]);
744
745 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "TX command prepare for buffer %d\n", priv->txLast);
746
747 arlan_command(dev, ARLAN_COMMAND_TX);
748
749 priv->tx_last_sent = jiffies;
750
751 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk("%s TX Qued %d bytes \n", dev->name, length);
752
753 ARLAN_DEBUG_EXIT("arlan_hw_tx");
754
755 return 0;
756}
757
758
759static int arlan_hw_config(struct net_device *dev)
760{
761 struct arlan_private *priv = netdev_priv(dev);
762 volatile struct arlan_shmem __iomem *arlan = priv->card;
763 struct arlan_conf_stru *conf = priv->Conf;
764
765 ARLAN_DEBUG_ENTRY("arlan_hw_config");
766
767 printk(KERN_NOTICE "%s arlan configure called \n", dev->name);
768 if (arlan_EEPROM_bad)
769 printk(KERN_NOTICE "arlan configure with eeprom bad option \n");
770
771
772 WRITESHM(arlan->spreadingCode, conf->spreadingCode, u_char);
773 WRITESHM(arlan->channelSet, conf->channelSet, u_char);
774
775 if (arlan_EEPROM_bad)
776 WRITESHM(arlan->defaultChannelSet, conf->channelSet, u_char);
777
778 WRITESHM(arlan->channelNumber, conf->channelNumber, u_char);
779
780 WRITESHM(arlan->scramblingDisable, conf->scramblingDisable, u_char);
781 WRITESHM(arlan->txAttenuation, conf->txAttenuation, u_char);
782
783 WRITESHM(arlan->systemId, conf->systemId, u_int);
784
785 WRITESHM(arlan->maxRetries, conf->maxRetries, u_char);
786 WRITESHM(arlan->receiveMode, conf->receiveMode, u_char);
787 WRITESHM(arlan->priority, conf->priority, u_char);
788 WRITESHM(arlan->rootOrRepeater, conf->rootOrRepeater, u_char);
789 WRITESHM(arlan->SID, conf->SID, u_int);
790
791 WRITESHM(arlan->registrationMode, conf->registrationMode, u_char);
792
793 WRITESHM(arlan->registrationFill, conf->registrationFill, u_char);
794 WRITESHM(arlan->localTalkAddress, conf->localTalkAddress, u_char);
795 WRITESHM(arlan->codeFormat, conf->codeFormat, u_char);
796 WRITESHM(arlan->numChannels, conf->numChannels, u_char);
797 WRITESHM(arlan->channel1, conf->channel1, u_char);
798 WRITESHM(arlan->channel2, conf->channel2, u_char);
799 WRITESHM(arlan->channel3, conf->channel3, u_char);
800 WRITESHM(arlan->channel4, conf->channel4, u_char);
801 WRITESHM(arlan->radioNodeId, conf->radioNodeId, u_short);
802 WRITESHM(arlan->SID, conf->SID, u_int);
803 WRITESHM(arlan->waitTime, conf->waitTime, u_short);
804 WRITESHM(arlan->lParameter, conf->lParameter, u_short);
805 memcpy_toio(&(arlan->_15), &(conf->_15), 3);
806 WRITESHM(arlan->_15, conf->_15, u_short);
807 WRITESHM(arlan->headerSize, conf->headerSize, u_short);
808 if (arlan_EEPROM_bad)
809 WRITESHM(arlan->hardwareType, conf->hardwareType, u_char);
810 WRITESHM(arlan->radioType, conf->radioType, u_char);
811 if (arlan_EEPROM_bad)
812 WRITESHM(arlan->radioModule, conf->radioType, u_char);
813
814 memcpy_toio(arlan->encryptionKey + keyStart, encryptionKey, 8);
815 memcpy_toio(arlan->name, conf->siteName, 16);
816
817 WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_CONF); /* do configure */
818 memset_io(arlan->commandParameter, 0, 0xf); /* 0xf */
819 memset_io(arlan->commandParameter + 1, 0, 2);
820 if (conf->writeEEPROM)
821 {
822 memset_io(arlan->commandParameter, conf->writeEEPROM, 1);
823// conf->writeEEPROM=0;
824 }
825 if (conf->registrationMode && conf->registrationInterrupts)
826 memset_io(arlan->commandParameter + 3, 1, 1);
827 else
828 memset_io(arlan->commandParameter + 3, 0, 1);
829
830 priv->irq_test_done = 0;
831
832 if (conf->tx_queue_len)
833 dev->tx_queue_len = conf->tx_queue_len;
834 udelay(100);
835
836 ARLAN_DEBUG_EXIT("arlan_hw_config");
837 return 0;
838}
839
840
841static int arlan_read_card_configuration(struct net_device *dev)
842{
843 u_char tlx415;
844 struct arlan_private *priv = netdev_priv(dev);
845 volatile struct arlan_shmem __iomem *arlan = priv->card;
846 struct arlan_conf_stru *conf = priv->Conf;
847
848 ARLAN_DEBUG_ENTRY("arlan_read_card_configuration");
849
850 if (radioNodeId == radioNodeIdUNKNOWN)
851 {
852 READSHM(conf->radioNodeId, arlan->radioNodeId, u_short);
853 }
854 else
855 conf->radioNodeId = radioNodeId;
856
857 if (SID == SIDUNKNOWN)
858 {
859 READSHM(conf->SID, arlan->SID, u_int);
860 }
861 else conf->SID = SID;
862
863 if (spreadingCode == spreadingCodeUNKNOWN)
864 {
865 READSHM(conf->spreadingCode, arlan->spreadingCode, u_char);
866 }
867 else
868 conf->spreadingCode = spreadingCode;
869
870 if (channelSet == channelSetUNKNOWN)
871 {
872 READSHM(conf->channelSet, arlan->channelSet, u_char);
873 }
874 else conf->channelSet = channelSet;
875
876 if (channelNumber == channelNumberUNKNOWN)
877 {
878 READSHM(conf->channelNumber, arlan->channelNumber, u_char);
879 }
880 else conf->channelNumber = channelNumber;
881
882 READSHM(conf->scramblingDisable, arlan->scramblingDisable, u_char);
883 READSHM(conf->txAttenuation, arlan->txAttenuation, u_char);
884
885 if (systemId == systemIdUNKNOWN)
886 {
887 READSHM(conf->systemId, arlan->systemId, u_int);
888 }
889 else conf->systemId = systemId;
890
891 READSHM(conf->maxDatagramSize, arlan->maxDatagramSize, u_short);
892 READSHM(conf->maxFrameSize, arlan->maxFrameSize, u_short);
893 READSHM(conf->maxRetries, arlan->maxRetries, u_char);
894 READSHM(conf->receiveMode, arlan->receiveMode, u_char);
895 READSHM(conf->priority, arlan->priority, u_char);
896 READSHM(conf->rootOrRepeater, arlan->rootOrRepeater, u_char);
897
898 if (SID == SIDUNKNOWN)
899 {
900 READSHM(conf->SID, arlan->SID, u_int);
901 }
902 else conf->SID = SID;
903
904 if (registrationMode == registrationModeUNKNOWN)
905 {
906 READSHM(conf->registrationMode, arlan->registrationMode, u_char);
907 }
908 else conf->registrationMode = registrationMode;
909
910 READSHM(conf->registrationFill, arlan->registrationFill, u_char);
911 READSHM(conf->localTalkAddress, arlan->localTalkAddress, u_char);
912 READSHM(conf->codeFormat, arlan->codeFormat, u_char);
913 READSHM(conf->numChannels, arlan->numChannels, u_char);
914 READSHM(conf->channel1, arlan->channel1, u_char);
915 READSHM(conf->channel2, arlan->channel2, u_char);
916 READSHM(conf->channel3, arlan->channel3, u_char);
917 READSHM(conf->channel4, arlan->channel4, u_char);
918 READSHM(conf->waitTime, arlan->waitTime, u_short);
919 READSHM(conf->lParameter, arlan->lParameter, u_short);
920 READSHM(conf->_15, arlan->_15, u_short);
921 READSHM(conf->headerSize, arlan->headerSize, u_short);
922 READSHM(conf->hardwareType, arlan->hardwareType, u_char);
923 READSHM(conf->radioType, arlan->radioModule, u_char);
924
925 if (conf->radioType == 0)
926 conf->radioType = 0xc;
927
928 WRITESHM(arlan->configStatus, 0xA5, u_char);
929 READSHM(tlx415, arlan->configStatus, u_char);
930
931 if (tlx415 != 0xA5)
932 printk(KERN_INFO "%s tlx415 chip \n", dev->name);
933
934 conf->txClear = 0;
935 conf->txRetries = 1;
936 conf->txRouting = 1;
937 conf->txScrambled = 0;
938 conf->rxParameter = 1;
939 conf->txTimeoutMs = 4000;
940 conf->waitCardTimeout = 100000;
941 conf->receiveMode = ARLAN_RCV_CLEAN;
942 memcpy_fromio(conf->siteName, arlan->name, 16);
943 conf->siteName[16] = '\0';
944 conf->retries = retries;
945 conf->tx_delay_ms = tx_delay_ms;
946 conf->ReTransmitPacketMaxSize = 200;
947 conf->waitReTransmitPacketMaxSize = 200;
948 conf->txAckTimeoutMs = 900;
949 conf->fastReTransCount = 3;
950
951 ARLAN_DEBUG_EXIT("arlan_read_card_configuration");
952
953 return 0;
954}
955
956
957static int lastFoundAt = 0xbe000;
958
959
960/*
961 * This is the real probe routine. Linux has a history of friendly device
962 * probes on the ISA bus. A good device probes avoids doing writes, and
963 * verifies that the correct device exists and functions.
964 */
965#define ARLAN_SHMEM_SIZE 0x2000
966static int __init arlan_check_fingerprint(unsigned long memaddr)
967{
968 static const char probeText[] = "TELESYSTEM SLW INC. ARLAN \0";
969 volatile struct arlan_shmem __iomem *arlan = (struct arlan_shmem *) memaddr;
970 unsigned long paddr = virt_to_phys((void *) memaddr);
971 char tempBuf[49];
972
973 ARLAN_DEBUG_ENTRY("arlan_check_fingerprint");
974
975 if (!request_mem_region(paddr, ARLAN_SHMEM_SIZE, "arlan")) {
976 // printk(KERN_WARNING "arlan: memory region %lx excluded from probing \n",paddr);
977 return -ENODEV;
978 }
979
980 memcpy_fromio(tempBuf, arlan->textRegion, 29);
981 tempBuf[30] = 0;
982
983 /* check for card at this address */
984 if (0 != strncmp(tempBuf, probeText, 29)){
985 release_mem_region(paddr, ARLAN_SHMEM_SIZE);
986 return -ENODEV;
987 }
988
989// printk(KERN_INFO "arlan found at 0x%x \n",memaddr);
990 ARLAN_DEBUG_EXIT("arlan_check_fingerprint");
991
992 return 0;
993}
994
995static int arlan_change_mtu(struct net_device *dev, int new_mtu)
996{
997 struct arlan_private *priv = netdev_priv(dev);
998 struct arlan_conf_stru *conf = priv->Conf;
999
1000 ARLAN_DEBUG_ENTRY("arlan_change_mtu");
1001 if (new_mtu > 2032)
1002 return -EINVAL;
1003 dev->mtu = new_mtu;
1004 if (new_mtu < 256)
1005 new_mtu = 256; /* cards book suggests 1600 */
1006 conf->maxDatagramSize = new_mtu;
1007 conf->maxFrameSize = new_mtu + 48;
1008
1009 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_CONF);
1010 printk(KERN_NOTICE "%s mtu changed to %d \n", dev->name, new_mtu);
1011
1012 ARLAN_DEBUG_EXIT("arlan_change_mtu");
1013
1014 return 0;
1015}
1016
1017static int arlan_mac_addr(struct net_device *dev, void *p)
1018{
1019 struct sockaddr *addr = p;
1020
1021
1022 ARLAN_DEBUG_ENTRY("arlan_mac_addr");
1023 return -EINVAL;
1024
1025 if (netif_running(dev))
1026 return -EBUSY;
1027 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1028
1029 ARLAN_DEBUG_EXIT("arlan_mac_addr");
1030 return 0;
1031}
1032
1033static const struct net_device_ops arlan_netdev_ops = {
1034 .ndo_open = arlan_open,
1035 .ndo_stop = arlan_close,
1036 .ndo_start_xmit = arlan_tx,
1037 .ndo_get_stats = arlan_statistics,
1038 .ndo_set_multicast_list = arlan_set_multicast,
1039 .ndo_change_mtu = arlan_change_mtu,
1040 .ndo_set_mac_address = arlan_mac_addr,
1041 .ndo_tx_timeout = arlan_tx_timeout,
1042 .ndo_validate_addr = eth_validate_addr,
1043};
1044
1045static int __init arlan_setup_device(struct net_device *dev, int num)
1046{
1047 struct arlan_private *ap = netdev_priv(dev);
1048 int err;
1049
1050 ARLAN_DEBUG_ENTRY("arlan_setup_device");
1051
1052 ap->conf = (struct arlan_shmem *)(ap+1);
1053
1054 dev->tx_queue_len = tx_queue_len;
1055 dev->netdev_ops = &arlan_netdev_ops;
1056 dev->watchdog_timeo = 3*HZ;
1057
1058 ap->irq_test_done = 0;
1059 ap->Conf = &arlan_conf[num];
1060
1061 ap->Conf->pre_Command_Wait = 40;
1062 ap->Conf->rx_tweak1 = 30;
1063 ap->Conf->rx_tweak2 = 0;
1064
1065
1066 err = register_netdev(dev);
1067 if (err) {
1068 release_mem_region(virt_to_phys((void *) dev->mem_start),
1069 ARLAN_SHMEM_SIZE);
1070 free_netdev(dev);
1071 return err;
1072 }
1073 arlan_device[num] = dev;
1074 ARLAN_DEBUG_EXIT("arlan_setup_device");
1075 return 0;
1076}
1077
1078static int __init arlan_probe_here(struct net_device *dev,
1079 unsigned long memaddr)
1080{
1081 struct arlan_private *ap = netdev_priv(dev);
1082
1083 ARLAN_DEBUG_ENTRY("arlan_probe_here");
1084
1085 if (arlan_check_fingerprint(memaddr))
1086 return -ENODEV;
1087
1088 printk(KERN_NOTICE "%s: Arlan found at %llx, \n ", dev->name,
1089 (u64) virt_to_phys((void*)memaddr));
1090
1091 ap->card = (void *) memaddr;
1092 dev->mem_start = memaddr;
1093 dev->mem_end = memaddr + ARLAN_SHMEM_SIZE-1;
1094
1095 if (dev->irq < 2)
1096 {
1097 READSHM(dev->irq, ap->card->irqLevel, u_char);
1098 } else if (dev->irq == 2)
1099 dev->irq = 9;
1100
1101 arlan_read_card_configuration(dev);
1102
1103 ARLAN_DEBUG_EXIT("arlan_probe_here");
1104 return 0;
1105}
1106
1107
1108static int arlan_open(struct net_device *dev)
1109{
1110 struct arlan_private *priv = netdev_priv(dev);
1111 volatile struct arlan_shmem __iomem *arlan = priv->card;
1112 int ret = 0;
1113
1114 ARLAN_DEBUG_ENTRY("arlan_open");
1115
1116 ret = request_irq(dev->irq, &arlan_interrupt, 0, dev->name, dev);
1117 if (ret)
1118 {
1119 printk(KERN_ERR "%s: unable to get IRQ %d .\n",
1120 dev->name, dev->irq);
1121 return ret;
1122 }
1123
1124
1125 priv->bad = 0;
1126 priv->lastReset = 0;
1127 priv->reset = 0;
1128 memcpy_fromio(dev->dev_addr, arlan->lanCardNodeId, 6);
1129 memset(dev->broadcast, 0xff, 6);
1130 dev->tx_queue_len = tx_queue_len;
1131 priv->interrupt_processing_active = 0;
1132 spin_lock_init(&priv->lock);
1133
1134 netif_start_queue (dev);
1135
1136 priv->registrationLostCount = 0;
1137 priv->registrationLastSeen = jiffies;
1138 priv->txLast = 0;
1139 priv->tx_command_given = 0;
1140 priv->rx_command_given = 0;
1141
1142 priv->reRegisterExp = 1;
1143 priv->tx_last_sent = jiffies - 1;
1144 priv->tx_last_cleared = jiffies;
1145 priv->Conf->writeEEPROM = 0;
1146 priv->Conf->registrationInterrupts = 1;
1147
1148 init_timer(&priv->timer);
1149 priv->timer.expires = jiffies + HZ / 10;
1150 priv->timer.data = (unsigned long) dev;
1151 priv->timer.function = &arlan_registration_timer; /* timer handler */
1152
1153 arlan_command(dev, ARLAN_COMMAND_POWERUP | ARLAN_COMMAND_LONG_WAIT_NOW);
1154 mdelay(200);
1155 add_timer(&priv->timer);
1156
1157 ARLAN_DEBUG_EXIT("arlan_open");
1158 return 0;
1159}
1160
1161
1162static void arlan_tx_timeout (struct net_device *dev)
1163{
1164 printk(KERN_ERR "%s: arlan transmit timed out, kernel decided\n", dev->name);
1165 /* Try to restart the adaptor. */
1166 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
1167 // dev->trans_start = jiffies;
1168 // netif_start_queue (dev);
1169}
1170
1171
1172static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev)
1173{
1174 short length;
1175 unsigned char *buf;
1176
1177 ARLAN_DEBUG_ENTRY("arlan_tx");
1178
1179 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1180 buf = skb->data;
1181
1182 if (length + 0x12 > 0x800) {
1183 printk(KERN_ERR "TX RING overflow \n");
1184 netif_stop_queue (dev);
1185 }
1186
1187 if (arlan_hw_tx(dev, buf, length) == -1)
1188 goto bad_end;
1189
1190 dev->trans_start = jiffies;
1191
1192 dev_kfree_skb(skb);
1193
1194 arlan_process_interrupt(dev);
1195 ARLAN_DEBUG_EXIT("arlan_tx");
1196 return NETDEV_TX_OK;
1197
1198bad_end:
1199 arlan_process_interrupt(dev);
1200 netif_stop_queue (dev);
1201 ARLAN_DEBUG_EXIT("arlan_tx");
1202 return NETDEV_TX_BUSY;
1203}
1204
1205
1206static inline int DoNotReTransmitCrap(struct net_device *dev)
1207{
1208 struct arlan_private *priv = netdev_priv(dev);
1209
1210 if (TXLAST(dev).length < priv->Conf->ReTransmitPacketMaxSize)
1211 return 1;
1212 return 0;
1213
1214}
1215
1216static inline int DoNotWaitReTransmitCrap(struct net_device *dev)
1217{
1218 struct arlan_private *priv = netdev_priv(dev);
1219
1220 if (TXLAST(dev).length < priv->Conf->waitReTransmitPacketMaxSize)
1221 return 1;
1222 return 0;
1223}
1224
1225static inline void arlan_queue_retransmit(struct net_device *dev)
1226{
1227 struct arlan_private *priv = netdev_priv(dev);
1228
1229 ARLAN_DEBUG_ENTRY("arlan_queue_retransmit");
1230
1231 if (DoNotWaitReTransmitCrap(dev))
1232 {
1233 arlan_drop_tx(dev);
1234 } else
1235 priv->ReTransmitRequested++;
1236
1237 ARLAN_DEBUG_EXIT("arlan_queue_retransmit");
1238}
1239
1240static inline void RetryOrFail(struct net_device *dev)
1241{
1242 struct arlan_private *priv = netdev_priv(dev);
1243
1244 ARLAN_DEBUG_ENTRY("RetryOrFail");
1245
1246 if (priv->retransmissions > priv->Conf->retries ||
1247 DoNotReTransmitCrap(dev))
1248 {
1249 arlan_drop_tx(dev);
1250 }
1251 else if (priv->bad <= priv->Conf->fastReTransCount)
1252 {
1253 arlan_retransmit_now(dev);
1254 }
1255 else arlan_queue_retransmit(dev);
1256
1257 ARLAN_DEBUG_EXIT("RetryOrFail");
1258}
1259
1260
1261static void arlan_tx_done_interrupt(struct net_device *dev, int status)
1262{
1263 struct arlan_private *priv = netdev_priv(dev);
1264
1265 ARLAN_DEBUG_ENTRY("arlan_tx_done_interrupt");
1266
1267 priv->tx_last_cleared = jiffies;
1268 priv->tx_command_given = 0;
1269 switch (status)
1270 {
1271 case 1:
1272 {
1273 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1274 printk("arlan intr: transmit OK\n");
1275 dev->stats.tx_packets++;
1276 priv->bad = 0;
1277 priv->reset = 0;
1278 priv->retransmissions = 0;
1279 if (priv->Conf->tx_delay_ms)
1280 {
1281 priv->tx_done_delayed = jiffies + (priv->Conf->tx_delay_ms * HZ) / 1000 + 1;
1282 }
1283 else
1284 {
1285 TXLAST(dev).offset = 0;
1286 if (priv->txLast)
1287 priv->txLast = 0;
1288 else if (TXTAIL(dev).offset)
1289 priv->txLast = 1;
1290 if (TXLAST(dev).offset)
1291 {
1292 arlan_retransmit_now(dev);
1293 dev->trans_start = jiffies;
1294 }
1295 if (!TXHEAD(dev).offset || !TXTAIL(dev).offset)
1296 {
1297 netif_wake_queue (dev);
1298 }
1299 }
1300 }
1301 break;
1302
1303 case 2:
1304 {
1305 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1306 printk("arlan intr: transmit timed out\n");
1307 priv->bad += 1;
1308 //arlan_queue_retransmit(dev);
1309 RetryOrFail(dev);
1310 }
1311 break;
1312
1313 case 3:
1314 {
1315 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1316 printk("arlan intr: transmit max retries\n");
1317 priv->bad += 1;
1318 priv->reset = 0;
1319 //arlan_queue_retransmit(dev);
1320 RetryOrFail(dev);
1321 }
1322 break;
1323
1324 case 4:
1325 {
1326 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1327 printk("arlan intr: transmit aborted\n");
1328 priv->bad += 1;
1329 arlan_queue_retransmit(dev);
1330 //RetryOrFail(dev);
1331 }
1332 break;
1333
1334 case 5:
1335 {
1336 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1337 printk("arlan intr: transmit not registered\n");
1338 priv->bad += 1;
1339 //debug=101;
1340 arlan_queue_retransmit(dev);
1341 }
1342 break;
1343
1344 case 6:
1345 {
1346 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1347 printk("arlan intr: transmit destination full\n");
1348 priv->bad += 1;
1349 priv->reset = 0;
1350 //arlan_drop_tx(dev);
1351 arlan_queue_retransmit(dev);
1352 }
1353 break;
1354
1355 case 7:
1356 {
1357 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1358 printk("arlan intr: transmit unknown ack\n");
1359 priv->bad += 1;
1360 priv->reset = 0;
1361 arlan_queue_retransmit(dev);
1362 }
1363 break;
1364
1365 case 8:
1366 {
1367 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1368 printk("arlan intr: transmit dest mail box full\n");
1369 priv->bad += 1;
1370 priv->reset = 0;
1371 //arlan_drop_tx(dev);
1372 arlan_queue_retransmit(dev);
1373 }
1374 break;
1375
1376 case 9:
1377 {
1378 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1379 printk("arlan intr: transmit root dest not reg.\n");
1380 priv->bad += 1;
1381 priv->reset = 1;
1382 //arlan_drop_tx(dev);
1383 arlan_queue_retransmit(dev);
1384 }
1385 break;
1386
1387 default:
1388 {
1389 printk(KERN_ERR "arlan intr: transmit status unknown\n");
1390 priv->bad += 1;
1391 priv->reset = 1;
1392 arlan_drop_tx(dev);
1393 }
1394 }
1395
1396 ARLAN_DEBUG_EXIT("arlan_tx_done_interrupt");
1397}
1398
1399
1400static void arlan_rx_interrupt(struct net_device *dev, u_char rxStatus, u_short rxOffset, u_short pkt_len)
1401{
1402 char *skbtmp;
1403 int i = 0;
1404
1405 struct arlan_private *priv = netdev_priv(dev);
1406 volatile struct arlan_shmem __iomem *arlan = priv->card;
1407 struct arlan_conf_stru *conf = priv->Conf;
1408
1409
1410 ARLAN_DEBUG_ENTRY("arlan_rx_interrupt");
1411 // by spec, not WRITESHMB(arlan->rxStatus,0x00);
1412 // prohibited here arlan_command(dev, ARLAN_COMMAND_RX);
1413
1414 if (pkt_len < 10 || pkt_len > 2048)
1415 {
1416 printk(KERN_WARNING "%s: got too short or long packet, len %d \n", dev->name, pkt_len);
1417 return;
1418 }
1419 if (rxOffset + pkt_len > 0x2000)
1420 {
1421 printk("%s: got too long packet, len %d offset %x\n", dev->name, pkt_len, rxOffset);
1422 return;
1423 }
1424 priv->in_bytes += pkt_len;
1425 priv->in_bytes10 += pkt_len;
1426 if (conf->measure_rate < 1)
1427 conf->measure_rate = 1;
1428 if (time_after(jiffies, priv->in_time + conf->measure_rate * HZ))
1429 {
1430 conf->in_speed = priv->in_bytes / conf->measure_rate;
1431 priv->in_bytes = 0;
1432 priv->in_time = jiffies;
1433 }
1434 if (time_after(jiffies, priv->in_time10 + conf->measure_rate * 10*HZ))
1435 {
1436 conf->in_speed10 = priv->in_bytes10 / (10 * conf->measure_rate);
1437 priv->in_bytes10 = 0;
1438 priv->in_time10 = jiffies;
1439 }
1440 DEBUGSHM(1, "arlan rcv pkt rxStatus= %d ", arlan->rxStatus, u_char);
1441 switch (rxStatus)
1442 {
1443 case 1:
1444 case 2:
1445 case 3:
1446 {
1447 /* Malloc up new buffer. */
1448 struct sk_buff *skb;
1449
1450 DEBUGSHM(50, "arlan recv pkt offs=%d\n", arlan->rxOffset, u_short);
1451 DEBUGSHM(1, "arlan rxFrmType = %d \n", arlan->rxFrmType, u_char);
1452 DEBUGSHM(1, KERN_INFO "arlan rx scrambled = %d \n", arlan->scrambled, u_char);
1453
1454 /* here we do multicast filtering to avoid slow 8-bit memcopy */
1455#ifdef ARLAN_MULTICAST
1456 if (!(dev->flags & IFF_ALLMULTI) &&
1457 !(dev->flags & IFF_PROMISC) &&
1458 !netdev_mc_empty(dev))
1459 {
1460 char hw_dst_addr[6];
1461 struct netdev_hw_addr *ha;
1462 int i;
1463
1464 memcpy_fromio(hw_dst_addr, arlan->ultimateDestAddress, 6);
1465 if (hw_dst_addr[0] == 0x01)
1466 {
1467 if (mdebug)
1468 if (hw_dst_addr[1] == 0x00)
1469 printk(KERN_ERR "%s mcast 0x0100 \n", dev->name);
1470 else if (hw_dst_addr[1] == 0x40)
1471 printk(KERN_ERR "%s m/bcast 0x0140 \n", dev->name);
1472 netdev_for_each_mc_entry(ha, dev) {
1473 if (arlan_debug & ARLAN_DEBUG_HEADER_DUMP)
1474 printk(KERN_ERR "%s mcl %pM\n",
1475 dev->name,
1476 ha->addr);
1477 for (i = 0; i < 6; i++)
1478 if (ha->addr[i] != hw_dst_addr[i])
1479 break;
1480 if (i == 6)
1481 break;
1482 }
1483 /* we reach here if multicast filtering is on and packet
1484 * is multicast and not for receive */
1485 goto end_of_interrupt;
1486 }
1487 }
1488#endif // ARLAN_MULTICAST
1489 /* multicast filtering ends here */
1490 pkt_len += ARLAN_FAKE_HDR_LEN;
1491
1492 skb = dev_alloc_skb(pkt_len + 4);
1493 if (skb == NULL)
1494 {
1495 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name);
1496 dev->stats.rx_dropped++;
1497 break;
1498 }
1499 skb_reserve(skb, 2);
1500 skbtmp = skb_put(skb, pkt_len);
1501
1502 memcpy_fromio(skbtmp + ARLAN_FAKE_HDR_LEN, ((char __iomem *) arlan) + rxOffset, pkt_len - ARLAN_FAKE_HDR_LEN);
1503 memcpy_fromio(skbtmp, arlan->ultimateDestAddress, 6);
1504 memcpy_fromio(skbtmp + 6, arlan->rxSrc, 6);
1505 WRITESHMB(arlan->rxStatus, 0x00);
1506 arlan_command(dev, ARLAN_COMMAND_RX);
1507
1508 IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
1509 {
1510 char immedDestAddress[6];
1511 char immedSrcAddress[6];
1512 memcpy_fromio(immedDestAddress, arlan->immedDestAddress, 6);
1513 memcpy_fromio(immedSrcAddress, arlan->immedSrcAddress, 6);
1514
1515 printk(KERN_WARNING "%s t %pM f %pM imd %pM ims %pM\n",
1516 dev->name, skbtmp,
1517 &skbtmp[6],
1518 immedDestAddress,
1519 immedSrcAddress);
1520 }
1521 skb->protocol = eth_type_trans(skb, dev);
1522 IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
1523 if (skb->protocol != 0x608 && skb->protocol != 0x8)
1524 {
1525 for (i = 0; i <= 22; i++)
1526 printk("%02x:", (u_char) skbtmp[i + 12]);
1527 printk(KERN_ERR "\n");
1528 printk(KERN_WARNING "arlan kernel pkt type trans %x \n", skb->protocol);
1529 }
1530 netif_rx(skb);
1531 dev->stats.rx_packets++;
1532 dev->stats.rx_bytes += pkt_len;
1533 }
1534 break;
1535
1536 default:
1537 printk(KERN_ERR "arlan intr: received unknown status\n");
1538 dev->stats.rx_crc_errors++;
1539 break;
1540 }
1541 ARLAN_DEBUG_EXIT("arlan_rx_interrupt");
1542}
1543
1544static void arlan_process_interrupt(struct net_device *dev)
1545{
1546 struct arlan_private *priv = netdev_priv(dev);
1547 volatile struct arlan_shmem __iomem *arlan = priv->card;
1548 u_char rxStatus = READSHMB(arlan->rxStatus);
1549 u_char txStatus = READSHMB(arlan->txStatus);
1550 u_short rxOffset = READSHMS(arlan->rxOffset);
1551 u_short pkt_len = READSHMS(arlan->rxLength);
1552 int interrupt_count = 0;
1553
1554 ARLAN_DEBUG_ENTRY("arlan_process_interrupt");
1555
1556 if (test_and_set_bit(0, (void *) &priv->interrupt_processing_active))
1557 {
1558 if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
1559 printk(KERN_ERR "interrupt chain reentering \n");
1560 goto end_int_process;
1561 }
1562 while ((rxStatus || txStatus || priv->interrupt_ack_requested)
1563 && (interrupt_count < 5))
1564 {
1565 if (rxStatus)
1566 priv->last_rx_int_ack_time = jiffies;
1567
1568 arlan_command(dev, ARLAN_COMMAND_INT_ACK);
1569 arlan_command(dev, ARLAN_COMMAND_INT_ENABLE);
1570
1571 IFDEBUG(ARLAN_DEBUG_INTERRUPT)
1572 printk(KERN_ERR "%s: got IRQ rx %x tx %x comm %x rxOff %x rxLen %x \n",
1573 dev->name, rxStatus, txStatus, READSHMB(arlan->commandByte),
1574 rxOffset, pkt_len);
1575
1576 if (rxStatus == 0 && txStatus == 0)
1577 {
1578 if (priv->irq_test_done)
1579 {
1580 if (!registrationBad(dev))
1581 IFDEBUG(ARLAN_DEBUG_INTERRUPT) printk(KERN_ERR "%s unknown interrupt(nop? regLost ?) reason tx %d rx %d ",
1582 dev->name, txStatus, rxStatus);
1583 } else {
1584 IFDEBUG(ARLAN_DEBUG_INTERRUPT)
1585 printk(KERN_INFO "%s irq $%d test OK \n", dev->name, dev->irq);
1586
1587 }
1588 priv->interrupt_ack_requested = 0;
1589 goto ends;
1590 }
1591 if (txStatus != 0)
1592 {
1593 WRITESHMB(arlan->txStatus, 0x00);
1594 arlan_tx_done_interrupt(dev, txStatus);
1595 goto ends;
1596 }
1597 if (rxStatus == 1 || rxStatus == 2)
1598 { /* a packet waiting */
1599 arlan_rx_interrupt(dev, rxStatus, rxOffset, pkt_len);
1600 goto ends;
1601 }
1602 if (rxStatus > 2 && rxStatus < 0xff)
1603 {
1604 WRITESHMB(arlan->rxStatus, 0x00);
1605 printk(KERN_ERR "%s unknown rxStatus reason tx %d rx %d ",
1606 dev->name, txStatus, rxStatus);
1607 goto ends;
1608 }
1609 if (rxStatus == 0xff)
1610 {
1611 WRITESHMB(arlan->rxStatus, 0x00);
1612 arlan_command(dev, ARLAN_COMMAND_RX);
1613 if (registrationBad(dev))
1614 netif_device_detach(dev);
1615 if (!registrationBad(dev))
1616 {
1617 priv->registrationLastSeen = jiffies;
1618 if (!netif_queue_stopped(dev) && !priv->under_reset && !priv->under_config)
1619 netif_wake_queue (dev);
1620 }
1621 goto ends;
1622 }
1623ends:
1624
1625 arlan_command_process(dev);
1626
1627 rxStatus = READSHMB(arlan->rxStatus);
1628 txStatus = READSHMB(arlan->txStatus);
1629 rxOffset = READSHMS(arlan->rxOffset);
1630 pkt_len = READSHMS(arlan->rxLength);
1631
1632
1633 priv->irq_test_done = 1;
1634
1635 interrupt_count++;
1636 }
1637 priv->interrupt_processing_active = 0;
1638
1639end_int_process:
1640 arlan_command_process(dev);
1641
1642 ARLAN_DEBUG_EXIT("arlan_process_interrupt");
1643 return;
1644}
1645
1646static irqreturn_t arlan_interrupt(int irq, void *dev_id)
1647{
1648 struct net_device *dev = dev_id;
1649 struct arlan_private *priv = netdev_priv(dev);
1650 volatile struct arlan_shmem __iomem *arlan = priv->card;
1651 u_char rxStatus = READSHMB(arlan->rxStatus);
1652 u_char txStatus = READSHMB(arlan->txStatus);
1653
1654 ARLAN_DEBUG_ENTRY("arlan_interrupt");
1655
1656
1657 if (!rxStatus && !txStatus)
1658 priv->interrupt_ack_requested++;
1659
1660 arlan_process_interrupt(dev);
1661
1662 priv->irq_test_done = 1;
1663
1664 ARLAN_DEBUG_EXIT("arlan_interrupt");
1665 return IRQ_HANDLED;
1666
1667}
1668
1669
1670static int arlan_close(struct net_device *dev)
1671{
1672 struct arlan_private *priv = netdev_priv(dev);
1673
1674 ARLAN_DEBUG_ENTRY("arlan_close");
1675
1676 del_timer_sync(&priv->timer);
1677
1678 arlan_command(dev, ARLAN_COMMAND_POWERDOWN);
1679
1680 IFDEBUG(ARLAN_DEBUG_STARTUP)
1681 printk(KERN_NOTICE "%s: Closing device\n", dev->name);
1682
1683 netif_stop_queue(dev);
1684 free_irq(dev->irq, dev);
1685
1686 ARLAN_DEBUG_EXIT("arlan_close");
1687 return 0;
1688}
1689
1690#ifdef ARLAN_DEBUGGING
1691static long alignLong(volatile u_char * ptr)
1692{
1693 long ret;
1694 memcpy_fromio(&ret, (void *) ptr, 4);
1695 return ret;
1696}
1697#endif
1698
1699/*
1700 * Get the current statistics.
1701 * This may be called with the card open or closed.
1702 */
1703
1704static struct net_device_stats *arlan_statistics(struct net_device *dev)
1705{
1706 struct arlan_private *priv = netdev_priv(dev);
1707 volatile struct arlan_shmem __iomem *arlan = priv->card;
1708
1709
1710 ARLAN_DEBUG_ENTRY("arlan_statistics");
1711
1712 /* Update the statistics from the device registers. */
1713
1714 READSHM(dev->stats.collisions, arlan->numReTransmissions, u_int);
1715 READSHM(dev->stats.rx_crc_errors, arlan->numCRCErrors, u_int);
1716 READSHM(dev->stats.rx_dropped, arlan->numFramesDiscarded, u_int);
1717 READSHM(dev->stats.rx_fifo_errors, arlan->numRXBufferOverflows, u_int);
1718 READSHM(dev->stats.rx_frame_errors, arlan->numReceiveFramesLost, u_int);
1719 READSHM(dev->stats.rx_over_errors, arlan->numRXOverruns, u_int);
1720 READSHM(dev->stats.rx_packets, arlan->numDatagramsReceived, u_int);
1721 READSHM(dev->stats.tx_aborted_errors, arlan->numAbortErrors, u_int);
1722 READSHM(dev->stats.tx_carrier_errors, arlan->numStatusTimeouts, u_int);
1723 READSHM(dev->stats.tx_dropped, arlan->numDatagramsDiscarded, u_int);
1724 READSHM(dev->stats.tx_fifo_errors, arlan->numTXUnderruns, u_int);
1725 READSHM(dev->stats.tx_packets, arlan->numDatagramsTransmitted, u_int);
1726 READSHM(dev->stats.tx_window_errors, arlan->numHoldOffs, u_int);
1727
1728 ARLAN_DEBUG_EXIT("arlan_statistics");
1729
1730 return &dev->stats;
1731}
1732
1733
1734static void arlan_set_multicast(struct net_device *dev)
1735{
1736 struct arlan_private *priv = netdev_priv(dev);
1737 volatile struct arlan_shmem __iomem *arlan = priv->card;
1738 struct arlan_conf_stru *conf = priv->Conf;
1739 int board_conf_needed = 0;
1740
1741
1742 ARLAN_DEBUG_ENTRY("arlan_set_multicast");
1743
1744 if (dev->flags & IFF_PROMISC)
1745 {
1746 unsigned char recMode;
1747 READSHM(recMode, arlan->receiveMode, u_char);
1748 conf->receiveMode = (ARLAN_RCV_PROMISC | ARLAN_RCV_CONTROL);
1749 if (conf->receiveMode != recMode)
1750 board_conf_needed = 1;
1751 }
1752 else
1753 {
1754 /* turn off promiscuous mode */
1755 unsigned char recMode;
1756 READSHM(recMode, arlan->receiveMode, u_char);
1757 conf->receiveMode = ARLAN_RCV_CLEAN | ARLAN_RCV_CONTROL;
1758 if (conf->receiveMode != recMode)
1759 board_conf_needed = 1;
1760 }
1761 if (board_conf_needed)
1762 arlan_command(dev, ARLAN_COMMAND_CONF);
1763
1764 ARLAN_DEBUG_EXIT("arlan_set_multicast");
1765}
1766
1767
1768struct net_device * __init arlan_probe(int unit)
1769{
1770 struct net_device *dev;
1771 int err;
1772 int m;
1773
1774 ARLAN_DEBUG_ENTRY("arlan_probe");
1775
1776 if (arlans_found == MAX_ARLANS)
1777 return ERR_PTR(-ENODEV);
1778
1779 /*
1780 * Reserve space for local data and a copy of the shared memory
1781 * that is used by the /proc interface.
1782 */
1783 dev = alloc_etherdev(sizeof(struct arlan_private)
1784 + sizeof(struct arlan_shmem));
1785 if (!dev)
1786 return ERR_PTR(-ENOMEM);
1787
1788 if (unit >= 0) {
1789 sprintf(dev->name, "eth%d", unit);
1790 netdev_boot_setup_check(dev);
1791
1792 if (dev->mem_start) {
1793 if (arlan_probe_here(dev, dev->mem_start) == 0)
1794 goto found;
1795 goto not_found;
1796 }
1797
1798 }
1799
1800
1801 for (m = (int)phys_to_virt(lastFoundAt) + ARLAN_SHMEM_SIZE;
1802 m <= (int)phys_to_virt(0xDE000);
1803 m += ARLAN_SHMEM_SIZE)
1804 {
1805 if (arlan_probe_here(dev, m) == 0)
1806 {
1807 lastFoundAt = (int)virt_to_phys((void*)m);
1808 goto found;
1809 }
1810 }
1811
1812 if (lastFoundAt == 0xbe000)
1813 printk(KERN_ERR "arlan: No Arlan devices found \n");
1814
1815 not_found:
1816 free_netdev(dev);
1817 return ERR_PTR(-ENODEV);
1818
1819 found:
1820 err = arlan_setup_device(dev, arlans_found);
1821 if (err)
1822 dev = ERR_PTR(err);
1823 else if (!arlans_found++)
1824 printk(KERN_INFO "Arlan driver %s\n", arlan_version);
1825
1826 return dev;
1827}
1828
1829#ifdef MODULE
1830int __init init_module(void)
1831{
1832 int i = 0;
1833
1834 ARLAN_DEBUG_ENTRY("init_module");
1835
1836 if (channelSet != channelSetUNKNOWN || channelNumber != channelNumberUNKNOWN || systemId != systemIdUNKNOWN)
1837 return -EINVAL;
1838
1839 for (i = 0; i < MAX_ARLANS; i++) {
1840 struct net_device *dev = arlan_probe(i);
1841
1842 if (IS_ERR(dev))
1843 return PTR_ERR(dev);
1844 }
1845 init_arlan_proc();
1846 printk(KERN_INFO "Arlan driver %s\n", arlan_version);
1847 ARLAN_DEBUG_EXIT("init_module");
1848 return 0;
1849}
1850
1851
1852void __exit cleanup_module(void)
1853{
1854 int i = 0;
1855 struct net_device *dev;
1856
1857 ARLAN_DEBUG_ENTRY("cleanup_module");
1858
1859 IFDEBUG(ARLAN_DEBUG_SHUTDOWN)
1860 printk(KERN_INFO "arlan: unloading module\n");
1861
1862 cleanup_arlan_proc();
1863
1864 for (i = 0; i < MAX_ARLANS; i++)
1865 {
1866 dev = arlan_device[i];
1867 if (dev) {
1868 arlan_command(dev, ARLAN_COMMAND_POWERDOWN );
1869
1870 unregister_netdev(dev);
1871 release_mem_region(virt_to_phys((void *) dev->mem_start),
1872 ARLAN_SHMEM_SIZE);
1873 free_netdev(dev);
1874 arlan_device[i] = NULL;
1875 }
1876 }
1877
1878 ARLAN_DEBUG_EXIT("cleanup_module");
1879}
1880
1881
1882#endif
1883MODULE_LICENSE("GPL");
diff --git a/drivers/staging/arlan/arlan-proc.c b/drivers/staging/arlan/arlan-proc.c
deleted file mode 100644
index b22983e6c0cf..000000000000
--- a/drivers/staging/arlan/arlan-proc.c
+++ /dev/null
@@ -1,1210 +0,0 @@
1#include "arlan.h"
2
3#include <linux/sysctl.h>
4
5#ifdef CONFIG_PROC_FS
6
7/* void enableReceive(struct net_device* dev);
8*/
9
10
11
12#define ARLAN_STR_SIZE 0x2ff0
13#define DEV_ARLAN_INFO 1
14#define DEV_ARLAN 1
15#define SARLG(type,var) {\
16 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n", #var, READSHMB(priva->card->var)); \
17 }
18
19#define SARLBN(type,var,nn) {\
20 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x",#var);\
21 for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\
22 pos += sprintf(arlan_drive_info+pos, "\n"); \
23 }
24
25#define SARLBNpln(type,var,nn) {\
26 for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\
27 }
28
29#define SARLSTR(var,nn) {\
30 char tmpStr[400];\
31 int tmpLn = nn;\
32 if (nn > 399 ) tmpLn = 399; \
33 memcpy(tmpStr,(char *) priva->conf->var,tmpLn);\
34 tmpStr[tmpLn] = 0; \
35 pos += sprintf(arlan_drive_info+pos, "%s\t=\t%s \n",#var,priva->conf->var);\
36 }
37
38#define SARLUC(var) SARLG(u_char, var)
39#define SARLUCN(var,nn) SARLBN(u_char,var, nn)
40#define SARLUS(var) SARLG(u_short, var)
41#define SARLUSN(var,nn) SARLBN(u_short,var, nn)
42#define SARLUI(var) SARLG(u_int, var)
43
44#define SARLUSA(var) {\
45 u_short tmpVar;\
46 memcpy(&tmpVar, (short *) priva->conf->var,2); \
47 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\
48}
49
50#define SARLUIA(var) {\
51 u_int tmpVar;\
52 memcpy(&tmpVar, (int* )priva->conf->var,4); \
53 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\
54}
55
56
57static const char *arlan_diagnostic_info_string(struct net_device *dev)
58{
59
60 struct arlan_private *priv = netdev_priv(dev);
61 volatile struct arlan_shmem __iomem *arlan = priv->card;
62 u_char diagnosticInfo;
63
64 READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char);
65
66 switch (diagnosticInfo)
67 {
68 case 0xFF:
69 return "Diagnostic info is OK";
70 case 0xFE:
71 return "ERROR EPROM Checksum error ";
72 case 0xFD:
73 return "ERROR Local Ram Test Failed ";
74 case 0xFC:
75 return "ERROR SCC failure ";
76 case 0xFB:
77 return "ERROR BackBone failure ";
78 case 0xFA:
79 return "ERROR transceiver not found ";
80 case 0xF9:
81 return "ERROR no more address space ";
82 case 0xF8:
83 return "ERROR Checksum error ";
84 case 0xF7:
85 return "ERROR Missing SS Code";
86 case 0xF6:
87 return "ERROR Invalid config format";
88 case 0xF5:
89 return "ERROR Reserved errorcode F5";
90 case 0xF4:
91 return "ERROR Invalid spreading code/channel number";
92 case 0xF3:
93 return "ERROR Load Code Error";
94 case 0xF2:
95 return "ERROR Reserver errorcode F2 ";
96 case 0xF1:
97 return "ERROR Invalid command receivec by LAN card ";
98 case 0xF0:
99 return "ERROR Invalid parameter found in command ";
100 case 0xEF:
101 return "ERROR On-chip timer failure ";
102 case 0xEE:
103 return "ERROR T410 timer failure ";
104 case 0xED:
105 return "ERROR Too Many TxEnable commands ";
106 case 0xEC:
107 return "ERROR EEPROM error on radio module ";
108 default:
109 return "ERROR unknown Diagnostic info reply code ";
110 }
111}
112
113static const char *arlan_hardware_type_string(struct net_device *dev)
114{
115 u_char hardwareType;
116 struct arlan_private *priv = netdev_priv(dev);
117 volatile struct arlan_shmem __iomem *arlan = priv->card;
118
119 READSHM(hardwareType, arlan->hardwareType, u_char);
120 switch (hardwareType)
121 {
122 case 0x00:
123 return "type A450";
124 case 0x01:
125 return "type A650 ";
126 case 0x04:
127 return "type TMA coproc";
128 case 0x0D:
129 return "type A650E ";
130 case 0x18:
131 return "type TMA coproc Australian";
132 case 0x19:
133 return "type A650A ";
134 case 0x26:
135 return "type TMA coproc European";
136 case 0x2E:
137 return "type A655 ";
138 case 0x2F:
139 return "type A655A ";
140 case 0x30:
141 return "type A655E ";
142 case 0x0B:
143 return "type A670 ";
144 case 0x0C:
145 return "type A670E ";
146 case 0x2D:
147 return "type A670A ";
148 case 0x0F:
149 return "type A411T";
150 case 0x16:
151 return "type A411TA";
152 case 0x1B:
153 return "type A440T";
154 case 0x1C:
155 return "type A412T";
156 case 0x1E:
157 return "type A412TA";
158 case 0x22:
159 return "type A411TE";
160 case 0x24:
161 return "type A412TE";
162 case 0x27:
163 return "type A671T ";
164 case 0x29:
165 return "type A671TA ";
166 case 0x2B:
167 return "type A671TE ";
168 case 0x31:
169 return "type A415T ";
170 case 0x33:
171 return "type A415TA ";
172 case 0x35:
173 return "type A415TE ";
174 case 0x37:
175 return "type A672";
176 case 0x39:
177 return "type A672A ";
178 case 0x3B:
179 return "type A672T";
180 case 0x6B:
181 return "type IC2200";
182 default:
183 return "type A672T";
184 }
185}
186#ifdef ARLAN_DEBUGGING
187static void arlan_print_diagnostic_info(struct net_device *dev)
188{
189 int i;
190 u_char diagnosticInfo;
191 u_short diagnosticOffset;
192 u_char hardwareType;
193 struct arlan_private *priv = netdev_priv(dev);
194 volatile struct arlan_shmem __iomem *arlan = priv->card;
195
196 // ARLAN_DEBUG_ENTRY("arlan_print_diagnostic_info");
197
198 if (READSHMB(arlan->configuredStatusFlag) == 0)
199 printk("Arlan: Card NOT configured\n");
200 else
201 printk("Arlan: Card is configured\n");
202
203 READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char);
204 READSHM(diagnosticOffset, arlan->diagnosticOffset, u_short);
205
206 printk(KERN_INFO "%s\n", arlan_diagnostic_info_string(dev));
207
208 if (diagnosticInfo != 0xff)
209 printk("%s arlan: Diagnostic Offset %d \n", dev->name, diagnosticOffset);
210
211 printk("arlan: LAN CODE ID = ");
212 for (i = 0; i < 6; i++)
213 DEBUGSHM(1, "%03d:", arlan->lanCardNodeId[i], u_char);
214 printk("\n");
215
216 printk("arlan: Arlan BroadCast address = ");
217 for (i = 0; i < 6; i++)
218 DEBUGSHM(1, "%03d:", arlan->broadcastAddress[i], u_char);
219 printk("\n");
220
221 READSHM(hardwareType, arlan->hardwareType, u_char);
222 printk(KERN_INFO "%s\n", arlan_hardware_type_string(dev));
223
224
225 DEBUGSHM(1, "arlan: channelNumber=%d\n", arlan->channelNumber, u_char);
226 DEBUGSHM(1, "arlan: channelSet=%d\n", arlan->channelSet, u_char);
227 DEBUGSHM(1, "arlan: spreadingCode=%d\n", arlan->spreadingCode, u_char);
228 DEBUGSHM(1, "arlan: radioNodeId=%d\n", arlan->radioNodeId, u_short);
229 DEBUGSHM(1, "arlan: SID =%d\n", arlan->SID, u_short);
230 DEBUGSHM(1, "arlan: rxOffset=%d\n", arlan->rxOffset, u_short);
231
232 DEBUGSHM(1, "arlan: registration mode is %d\n", arlan->registrationMode, u_char);
233
234 printk("arlan: name= ");
235 IFDEBUG(1)
236
237 for (i = 0; i < 16; i++)
238 {
239 char c;
240 READSHM(c, arlan->name[i], char);
241 if (c)
242 printk("%c", c);
243 }
244 printk("\n");
245
246// ARLAN_DEBUG_EXIT("arlan_print_diagnostic_info");
247
248}
249
250
251/****************************** TEST MEMORY **************/
252
253static int arlan_hw_test_memory(struct net_device *dev)
254{
255 u_char *ptr;
256 int i;
257 int memlen = sizeof(struct arlan_shmem) - 0xF; /* avoid control register */
258 volatile char *arlan_mem = (char *) (dev->mem_start);
259 struct arlan_private *priv = netdev_priv(dev);
260 volatile struct arlan_shmem __iomem *arlan = priv->card;
261 char pattern;
262
263 ptr = NULL;
264
265 /* hold card in reset state */
266 setHardwareReset(dev);
267
268 /* test memory */
269 pattern = 0;
270 for (i = 0; i < memlen; i++)
271 WRITESHM(arlan_mem[i], ((u_char) pattern++), u_char);
272
273 pattern = 0;
274 for (i = 0; i < memlen; i++)
275 {
276 char res;
277 READSHM(res, arlan_mem[i], char);
278 if (res != pattern++)
279 {
280 printk(KERN_ERR "Arlan driver memory test 1 failed \n");
281 return -1;
282 }
283 }
284
285 pattern = 0;
286 for (i = 0; i < memlen; i++)
287 WRITESHM(arlan_mem[i], ~(pattern++), char);
288
289 pattern = 0;
290 for (i = 0; i < memlen; i++)
291 {
292 char res;
293 READSHM(res, arlan_mem[i], char);
294 if (res != ~(pattern++))
295 {
296 printk(KERN_ERR "Arlan driver memory test 2 failed \n");
297 return -1;
298 }
299 }
300
301 /* zero memory */
302 for (i = 0; i < memlen; i++)
303 WRITESHM(arlan_mem[i], 0x00, char);
304
305 IFDEBUG(1) printk(KERN_INFO "Arlan: memory tests ok\n");
306
307 /* set reset flag and then release reset */
308 WRITESHM(arlan->resetFlag, 0xff, u_char);
309
310 clearChannelAttention(dev);
311 clearHardwareReset(dev);
312
313 /* wait for reset flag to become zero, we'll wait for two seconds */
314 if (arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW))
315 {
316 printk(KERN_ERR "%s arlan: failed to come back from memory test\n", dev->name);
317 return -1;
318 }
319 return 0;
320}
321
322static int arlan_setup_card_by_book(struct net_device *dev)
323{
324 u_char irqLevel, configuredStatusFlag;
325 struct arlan_private *priv = netdev_priv(dev);
326 volatile struct arlan_shmem __iomem *arlan = priv->card;
327
328// ARLAN_DEBUG_ENTRY("arlan_setup_card");
329
330 READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char);
331
332 IFDEBUG(10)
333 if (configuredStatusFlag != 0)
334 IFDEBUG(10) printk("arlan: CARD IS CONFIGURED\n");
335 else
336 IFDEBUG(10) printk("arlan: card is NOT configured\n");
337
338 if (testMemory || (READSHMB(arlan->diagnosticInfo) != 0xff))
339 if (arlan_hw_test_memory(dev))
340 return -1;
341
342 DEBUGSHM(4, "arlan configuredStatus = %d \n", arlan->configuredStatusFlag, u_char);
343 DEBUGSHM(4, "arlan driver diagnostic: 0x%2x\n", arlan->diagnosticInfo, u_char);
344
345 /* issue nop command - no interrupt */
346 arlan_command(dev, ARLAN_COMMAND_NOOP);
347 if (arlan_command(dev, ARLAN_COMMAND_WAIT_NOW) != 0)
348 return -1;
349
350 IFDEBUG(50) printk("1st Noop successfully executed !!\n");
351
352 /* try to turn on the arlan interrupts */
353 clearClearInterrupt(dev);
354 setClearInterrupt(dev);
355 setInterruptEnable(dev);
356
357 /* issue nop command - with interrupt */
358
359 arlan_command(dev, ARLAN_COMMAND_NOOPINT);
360 if (arlan_command(dev, ARLAN_COMMAND_WAIT_NOW) != 0)
361 return -1;
362
363
364 IFDEBUG(50) printk("2nd Noop successfully executed !!\n");
365
366 READSHM(irqLevel, arlan->irqLevel, u_char)
367
368 if (irqLevel != dev->irq)
369 {
370 IFDEBUG(1) printk(KERN_WARNING "arlan dip switches set irq to %d\n", irqLevel);
371 printk(KERN_WARNING "device driver irq set to %d - does not match\n", dev->irq);
372 dev->irq = irqLevel;
373 }
374 else
375 IFDEBUG(2) printk("irq level is OK\n");
376
377
378 IFDEBUG(3) arlan_print_diagnostic_info(dev);
379
380 arlan_command(dev, ARLAN_COMMAND_CONF);
381
382 READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char);
383 if (configuredStatusFlag == 0)
384 {
385 printk(KERN_WARNING "arlan configure failed\n");
386 return -1;
387 }
388 arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW);
389 arlan_command(dev, ARLAN_COMMAND_RX);
390 arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW);
391 printk(KERN_NOTICE "%s: arlan driver version %s loaded\n",
392 dev->name, arlan_version);
393
394// ARLAN_DEBUG_EXIT("arlan_setup_card");
395
396 return 0; /* no errors */
397}
398#endif
399
400#ifdef ARLAN_PROC_INTERFACE
401#ifdef ARLAN_PROC_SHM_DUMP
402
403static char arlan_drive_info[ARLAN_STR_SIZE] = "A655\n\0";
404
405static int arlan_sysctl_info(ctl_table * ctl, int write,
406 void __user *buffer, size_t * lenp, loff_t *ppos)
407{
408 int i;
409 int retv, pos, devnum;
410 struct arlan_private *priva = NULL;
411 struct net_device *dev;
412 pos = 0;
413 if (write)
414 {
415 printk("wrirte: ");
416 for (i = 0; i < 100; i++)
417 printk("adi %x \n", arlan_drive_info[i]);
418 }
419 if (ctl->procname == NULL || arlan_drive_info == NULL)
420 {
421 printk(KERN_WARNING " procname is NULL in sysctl_table or arlan_drive_info is NULL \n at arlan module\n ");
422 return -1;
423 }
424 devnum = ctl->procname[5] - '0';
425 if (devnum < 0 || devnum > MAX_ARLANS - 1)
426 {
427 printk(KERN_WARNING "too strange devnum in procfs parse\n ");
428 return -1;
429 }
430 else if (arlan_device[devnum] == NULL)
431 {
432 if (ctl->procname)
433 pos += sprintf(arlan_drive_info + pos, "\t%s\n\n", ctl->procname);
434 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
435 goto final;
436 }
437 else
438 priva = netdev_priv(arlan_device[devnum]);
439
440 if (priva == NULL)
441 {
442 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
443 return -1;
444 }
445 dev = arlan_device[devnum];
446
447 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
448
449 pos = sprintf(arlan_drive_info, "Arlan info \n");
450 /* Header Signature */
451 SARLSTR(textRegion, 48);
452 SARLUC(resetFlag);
453 pos += sprintf(arlan_drive_info + pos, "diagnosticInfo\t=\t%s \n", arlan_diagnostic_info_string(dev));
454 SARLUC(diagnosticInfo);
455 SARLUS(diagnosticOffset);
456 SARLUCN(_1, 12);
457 SARLUCN(lanCardNodeId, 6);
458 SARLUCN(broadcastAddress, 6);
459 pos += sprintf(arlan_drive_info + pos, "hardwareType =\t %s \n", arlan_hardware_type_string(dev));
460 SARLUC(hardwareType);
461 SARLUC(majorHardwareVersion);
462 SARLUC(minorHardwareVersion);
463 SARLUC(radioModule);
464 SARLUC(defaultChannelSet);
465 SARLUCN(_2, 47);
466
467 /* Control/Status Block - 0x0080 */
468 SARLUC(interruptInProgress);
469 SARLUC(cntrlRegImage);
470
471 SARLUCN(_3, 14);
472 SARLUC(commandByte);
473 SARLUCN(commandParameter, 15);
474
475 /* Receive Status - 0x00a0 */
476 SARLUC(rxStatus);
477 SARLUC(rxFrmType);
478 SARLUS(rxOffset);
479 SARLUS(rxLength);
480 SARLUCN(rxSrc, 6);
481 SARLUC(rxBroadcastFlag);
482 SARLUC(rxQuality);
483 SARLUC(scrambled);
484 SARLUCN(_4, 1);
485
486 /* Transmit Status - 0x00b0 */
487 SARLUC(txStatus);
488 SARLUC(txAckQuality);
489 SARLUC(numRetries);
490 SARLUCN(_5, 14);
491 SARLUCN(registeredRouter, 6);
492 SARLUCN(backboneRouter, 6);
493 SARLUC(registrationStatus);
494 SARLUC(configuredStatusFlag);
495 SARLUCN(_6, 1);
496 SARLUCN(ultimateDestAddress, 6);
497 SARLUCN(immedDestAddress, 6);
498 SARLUCN(immedSrcAddress, 6);
499 SARLUS(rxSequenceNumber);
500 SARLUC(assignedLocaltalkAddress);
501 SARLUCN(_7, 27);
502
503 /* System Parameter Block */
504
505 /* - Driver Parameters (Novell Specific) */
506
507 SARLUS(txTimeout);
508 SARLUS(transportTime);
509 SARLUCN(_8, 4);
510
511 /* - Configuration Parameters */
512 SARLUC(irqLevel);
513 SARLUC(spreadingCode);
514 SARLUC(channelSet);
515 SARLUC(channelNumber);
516 SARLUS(radioNodeId);
517 SARLUCN(_9, 2);
518 SARLUC(scramblingDisable);
519 SARLUC(radioType);
520 SARLUS(routerId);
521 SARLUCN(_10, 9);
522 SARLUC(txAttenuation);
523 SARLUIA(systemId);
524 SARLUS(globalChecksum);
525 SARLUCN(_11, 4);
526 SARLUS(maxDatagramSize);
527 SARLUS(maxFrameSize);
528 SARLUC(maxRetries);
529 SARLUC(receiveMode);
530 SARLUC(priority);
531 SARLUC(rootOrRepeater);
532 SARLUCN(specifiedRouter, 6);
533 SARLUS(fastPollPeriod);
534 SARLUC(pollDecay);
535 SARLUSA(fastPollDelay);
536 SARLUC(arlThreshold);
537 SARLUC(arlDecay);
538 SARLUCN(_12, 1);
539 SARLUS(specRouterTimeout);
540 SARLUCN(_13, 5);
541
542 /* Scrambled Area */
543 SARLUIA(SID);
544 SARLUCN(encryptionKey, 12);
545 SARLUIA(_14);
546 SARLUSA(waitTime);
547 SARLUSA(lParameter);
548 SARLUCN(_15, 3);
549 SARLUS(headerSize);
550 SARLUS(sectionChecksum);
551
552 SARLUC(registrationMode);
553 SARLUC(registrationFill);
554 SARLUS(pollPeriod);
555 SARLUS(refreshPeriod);
556 SARLSTR(name, 16);
557 SARLUCN(NID, 6);
558 SARLUC(localTalkAddress);
559 SARLUC(codeFormat);
560 SARLUC(numChannels);
561 SARLUC(channel1);
562 SARLUC(channel2);
563 SARLUC(channel3);
564 SARLUC(channel4);
565 SARLUCN(SSCode, 59);
566
567/* SARLUCN( _16, 0x140);
568 */
569 /* Statistics Block - 0x0300 */
570 SARLUC(hostcpuLock);
571 SARLUC(lancpuLock);
572 SARLUCN(resetTime, 18);
573 SARLUIA(numDatagramsTransmitted);
574 SARLUIA(numReTransmissions);
575 SARLUIA(numFramesDiscarded);
576 SARLUIA(numDatagramsReceived);
577 SARLUIA(numDuplicateReceivedFrames);
578 SARLUIA(numDatagramsDiscarded);
579 SARLUS(maxNumReTransmitDatagram);
580 SARLUS(maxNumReTransmitFrames);
581 SARLUS(maxNumConsecutiveDuplicateFrames);
582 /* misaligned here so we have to go to characters */
583 SARLUIA(numBytesTransmitted);
584 SARLUIA(numBytesReceived);
585 SARLUIA(numCRCErrors);
586 SARLUIA(numLengthErrors);
587 SARLUIA(numAbortErrors);
588 SARLUIA(numTXUnderruns);
589 SARLUIA(numRXOverruns);
590 SARLUIA(numHoldOffs);
591 SARLUIA(numFramesTransmitted);
592 SARLUIA(numFramesReceived);
593 SARLUIA(numReceiveFramesLost);
594 SARLUIA(numRXBufferOverflows);
595 SARLUIA(numFramesDiscardedAddrMismatch);
596 SARLUIA(numFramesDiscardedSIDMismatch);
597 SARLUIA(numPollsTransmistted);
598 SARLUIA(numPollAcknowledges);
599 SARLUIA(numStatusTimeouts);
600 SARLUIA(numNACKReceived);
601 SARLUS(auxCmd);
602 SARLUCN(dumpPtr, 4);
603 SARLUC(dumpVal);
604 SARLUC(wireTest);
605
606 /* next 4 seems too long for procfs, over single page ?
607 SARLUCN( _17, 0x86);
608 SARLUCN( txBuffer, 0x800);
609 SARLUCN( rxBuffer, 0x800);
610 SARLUCN( _18, 0x0bff);
611 */
612
613 pos += sprintf(arlan_drive_info + pos, "rxRing\t=\t0x");
614 for (i = 0; i < 0x50; i++)
615 pos += sprintf(arlan_drive_info + pos, "%02x", ((char *) priva->conf)[priva->conf->rxOffset + i]);
616 pos += sprintf(arlan_drive_info + pos, "\n");
617
618 SARLUC(configStatus);
619 SARLUC(_22);
620 SARLUC(progIOCtrl);
621 SARLUC(shareMBase);
622 SARLUC(controlRegister);
623
624 pos += sprintf(arlan_drive_info + pos, " total %d chars\n", pos);
625 if (ctl)
626 if (ctl->procname)
627 pos += sprintf(arlan_drive_info + pos, " driver name : %s\n", ctl->procname);
628final:
629 *lenp = pos;
630
631 if (!write)
632 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
633 else
634 {
635 *lenp = 0;
636 return -1;
637 }
638 return retv;
639}
640
641
642static int arlan_sysctl_info161719(ctl_table * ctl, int write,
643 void __user *buffer, size_t * lenp, loff_t *ppos)
644{
645 int i;
646 int retv, pos, devnum;
647 struct arlan_private *priva = NULL;
648
649 pos = 0;
650 devnum = ctl->procname[5] - '0';
651 if (arlan_device[devnum] == NULL)
652 {
653 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
654 goto final;
655 }
656 else
657 priva = netdev_priv(arlan_device[devnum]);
658 if (priva == NULL)
659 {
660 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
661 return -1;
662 }
663 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
664 SARLUCN(_16, 0xC0);
665 SARLUCN(_17, 0x6A);
666 SARLUCN(_18, 14);
667 SARLUCN(_19, 0x86);
668 SARLUCN(_21, 0x3fd);
669
670final:
671 *lenp = pos;
672 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
673 return retv;
674}
675
676static int arlan_sysctl_infotxRing(ctl_table * ctl, int write,
677 void __user *buffer, size_t * lenp, loff_t *ppos)
678{
679 int i;
680 int retv, pos, devnum;
681 struct arlan_private *priva = NULL;
682
683 pos = 0;
684 devnum = ctl->procname[5] - '0';
685 if (arlan_device[devnum] == NULL)
686 {
687 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
688 goto final;
689 }
690 else
691 priva = netdev_priv(arlan_device[devnum]);
692 if (priva == NULL)
693 {
694 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
695 return -1;
696 }
697 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
698 SARLBNpln(u_char, txBuffer, 0x800);
699final:
700 *lenp = pos;
701 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
702 return retv;
703}
704
705static int arlan_sysctl_inforxRing(ctl_table * ctl, int write,
706 void __user *buffer, size_t * lenp, loff_t *ppos)
707{
708 int i;
709 int retv, pos, devnum;
710 struct arlan_private *priva = NULL;
711
712 pos = 0;
713 devnum = ctl->procname[5] - '0';
714 if (arlan_device[devnum] == NULL)
715 {
716 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
717 goto final;
718 } else
719 priva = netdev_priv(arlan_device[devnum]);
720 if (priva == NULL)
721 {
722 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
723 return -1;
724 }
725 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
726 SARLBNpln(u_char, rxBuffer, 0x800);
727final:
728 *lenp = pos;
729 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
730 return retv;
731}
732
733static int arlan_sysctl_info18(ctl_table * ctl, int write,
734 void __user *buffer, size_t * lenp, loff_t *ppos)
735{
736 int i;
737 int retv, pos, devnum;
738 struct arlan_private *priva = NULL;
739
740 pos = 0;
741 devnum = ctl->procname[5] - '0';
742 if (arlan_device[devnum] == NULL)
743 {
744 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
745 goto final;
746 }
747 else
748 priva = netdev_priv(arlan_device[devnum]);
749 if (priva == NULL)
750 {
751 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
752 return -1;
753 }
754 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
755 SARLBNpln(u_char, _18, 0x800);
756
757final:
758 *lenp = pos;
759 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
760 return retv;
761}
762
763
764#endif /* #ifdef ARLAN_PROC_SHM_DUMP */
765
766
767static char conf_reset_result[200];
768
769static int arlan_configure(ctl_table * ctl, int write,
770 void __user *buffer, size_t * lenp, loff_t *ppos)
771{
772 int pos = 0;
773 int devnum = ctl->procname[6] - '0';
774 struct arlan_private *priv;
775
776 if (devnum < 0 || devnum > MAX_ARLANS - 1)
777 {
778 printk(KERN_WARNING "too strange devnum in procfs parse\n ");
779 return -1;
780 }
781 else if (arlan_device[devnum] != NULL)
782 {
783 priv = netdev_priv(arlan_device[devnum]);
784
785 arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_CONF);
786 }
787 else
788 return -1;
789
790 *lenp = pos;
791 return proc_dostring(ctl, write, buffer, lenp, ppos);
792}
793
794static int arlan_sysctl_reset(ctl_table * ctl, int write,
795 void __user *buffer, size_t * lenp, loff_t *ppos)
796{
797 int pos = 0;
798 int devnum = ctl->procname[5] - '0';
799 struct arlan_private *priv;
800
801 if (devnum < 0 || devnum > MAX_ARLANS - 1)
802 {
803 printk(KERN_WARNING "too strange devnum in procfs parse\n ");
804 return -1;
805 }
806 else if (arlan_device[devnum] != NULL)
807 {
808 priv = netdev_priv(arlan_device[devnum]);
809 arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_RESET);
810
811 } else
812 return -1;
813 *lenp = pos + 3;
814 return proc_dostring(ctl, write, buffer, lenp, ppos);
815}
816
817
818/* Place files in /proc/sys/dev/arlan */
819#define CTBLN(card,nam) \
820 { .procname = #nam,\
821 .data = &(arlan_conf[card].nam),\
822 .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec}
823#ifdef ARLAN_DEBUGGING
824
825#define ARLAN_PROC_DEBUG_ENTRIES \
826 { .procname = "entry_exit_debug",\
827 .data = &arlan_entry_and_exit_debug,\
828 .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec},\
829 { .procname = "debug", .data = &arlan_debug,\
830 .maxlen = sizeof(int), .mode = 0600, .proc_handler = proc_dointvec},
831#else
832#define ARLAN_PROC_DEBUG_ENTRIES
833#endif
834
835#define ARLAN_SYSCTL_TABLE_TOTAL(cardNo)\
836 CTBLN(cardNo,spreadingCode),\
837 CTBLN(cardNo, channelNumber),\
838 CTBLN(cardNo, scramblingDisable),\
839 CTBLN(cardNo, txAttenuation),\
840 CTBLN(cardNo, systemId), \
841 CTBLN(cardNo, maxDatagramSize),\
842 CTBLN(cardNo, maxFrameSize),\
843 CTBLN(cardNo, maxRetries),\
844 CTBLN(cardNo, receiveMode),\
845 CTBLN(cardNo, priority),\
846 CTBLN(cardNo, rootOrRepeater),\
847 CTBLN(cardNo, SID),\
848 CTBLN(cardNo, registrationMode),\
849 CTBLN(cardNo, registrationFill),\
850 CTBLN(cardNo, localTalkAddress),\
851 CTBLN(cardNo, codeFormat),\
852 CTBLN(cardNo, numChannels),\
853 CTBLN(cardNo, channel1),\
854 CTBLN(cardNo, channel2),\
855 CTBLN(cardNo, channel3),\
856 CTBLN(cardNo, channel4),\
857 CTBLN(cardNo, txClear),\
858 CTBLN(cardNo, txRetries),\
859 CTBLN(cardNo, txRouting),\
860 CTBLN(cardNo, txScrambled),\
861 CTBLN(cardNo, rxParameter),\
862 CTBLN(cardNo, txTimeoutMs),\
863 CTBLN(cardNo, waitCardTimeout),\
864 CTBLN(cardNo, channelSet), \
865 { .procname = "name",\
866 .data = arlan_conf[cardNo].siteName,\
867 .maxlen = 16, .mode = 0600, .proc_handler = proc_dostring},\
868 CTBLN(cardNo,waitTime),\
869 CTBLN(cardNo,lParameter),\
870 CTBLN(cardNo,_15),\
871 CTBLN(cardNo,headerSize),\
872 CTBLN(cardNo,tx_delay_ms),\
873 CTBLN(cardNo,retries),\
874 CTBLN(cardNo,ReTransmitPacketMaxSize),\
875 CTBLN(cardNo,waitReTransmitPacketMaxSize),\
876 CTBLN(cardNo,fastReTransCount),\
877 CTBLN(cardNo,driverRetransmissions),\
878 CTBLN(cardNo,txAckTimeoutMs),\
879 CTBLN(cardNo,registrationInterrupts),\
880 CTBLN(cardNo,hardwareType),\
881 CTBLN(cardNo,radioType),\
882 CTBLN(cardNo,writeEEPROM),\
883 CTBLN(cardNo,writeRadioType),\
884 ARLAN_PROC_DEBUG_ENTRIES\
885 CTBLN(cardNo,in_speed),\
886 CTBLN(cardNo,out_speed),\
887 CTBLN(cardNo,in_speed10),\
888 CTBLN(cardNo,out_speed10),\
889 CTBLN(cardNo,in_speed_max),\
890 CTBLN(cardNo,out_speed_max),\
891 CTBLN(cardNo,measure_rate),\
892 CTBLN(cardNo,pre_Command_Wait),\
893 CTBLN(cardNo,rx_tweak1),\
894 CTBLN(cardNo,rx_tweak2),\
895 CTBLN(cardNo,tx_queue_len),\
896
897
898
899static ctl_table arlan_conf_table0[] =
900{
901 ARLAN_SYSCTL_TABLE_TOTAL(0)
902
903#ifdef ARLAN_PROC_SHM_DUMP
904 {
905 .procname = "arlan0-txRing",
906 .data = &arlan_drive_info,
907 .maxlen = ARLAN_STR_SIZE,
908 .mode = 0400,
909 .proc_handler = arlan_sysctl_infotxRing,
910 },
911 {
912 .procname = "arlan0-rxRing",
913 .data = &arlan_drive_info,
914 .maxlen = ARLAN_STR_SIZE,
915 .mode = 0400,
916 .proc_handler = arlan_sysctl_inforxRing,
917 },
918 {
919 .procname = "arlan0-18",
920 .data = &arlan_drive_info,
921 .maxlen = ARLAN_STR_SIZE,
922 .mode = 0400,
923 .proc_handler = arlan_sysctl_info18,
924 },
925 {
926 .procname = "arlan0-ring",
927 .data = &arlan_drive_info,
928 .maxlen = ARLAN_STR_SIZE,
929 .mode = 0400,
930 .proc_handler = arlan_sysctl_info161719,
931 },
932 {
933 .procname = "arlan0-shm-cpy",
934 .data = &arlan_drive_info,
935 .maxlen = ARLAN_STR_SIZE,
936 .mode = 0400,
937 .proc_handler = arlan_sysctl_info,
938 },
939#endif
940 {
941 .procname = "config0",
942 .data = &conf_reset_result,
943 .maxlen = 100,
944 .mode = 0400,
945 .proc_handler = arlan_configure
946 },
947 {
948 .procname = "reset0",
949 .data = &conf_reset_result,
950 .maxlen = 100,
951 .mode = 0400,
952 .proc_handler = arlan_sysctl_reset,
953 },
954 { }
955};
956
957static ctl_table arlan_conf_table1[] =
958{
959
960 ARLAN_SYSCTL_TABLE_TOTAL(1)
961
962#ifdef ARLAN_PROC_SHM_DUMP
963 {
964 .procname = "arlan1-txRing",
965 .data = &arlan_drive_info,
966 .maxlen = ARLAN_STR_SIZE,
967 .mode = 0400,
968 .proc_handler = arlan_sysctl_infotxRing,
969 },
970 {
971 .procname = "arlan1-rxRing",
972 .data = &arlan_drive_info,
973 .maxlen = ARLAN_STR_SIZE,
974 .mode = 0400,
975 .proc_handler = arlan_sysctl_inforxRing,
976 },
977 {
978 .procname = "arlan1-18",
979 .data = &arlan_drive_info,
980 .maxlen = ARLAN_STR_SIZE,
981 .mode = 0400,
982 .proc_handler = arlan_sysctl_info18,
983 },
984 {
985 .procname = "arlan1-ring",
986 .data = &arlan_drive_info,
987 .maxlen = ARLAN_STR_SIZE,
988 .mode = 0400,
989 .proc_handler = arlan_sysctl_info161719,
990 },
991 {
992 .procname = "arlan1-shm-cpy",
993 .data = &arlan_drive_info,
994 .maxlen = ARLAN_STR_SIZE,
995 .mode = 0400,
996 .proc_handler = arlan_sysctl_info,
997 },
998#endif
999 {
1000 .procname = "config1",
1001 .data = &conf_reset_result,
1002 .maxlen = 100,
1003 .mode = 0400,
1004 .proc_handler = arlan_configure,
1005 },
1006 {
1007 .procname = "reset1",
1008 .data = &conf_reset_result,
1009 .maxlen = 100,
1010 .mode = 0400,
1011 .proc_handler = arlan_sysctl_reset,
1012 },
1013 { }
1014};
1015
1016static ctl_table arlan_conf_table2[] =
1017{
1018
1019 ARLAN_SYSCTL_TABLE_TOTAL(2)
1020
1021#ifdef ARLAN_PROC_SHM_DUMP
1022 {
1023 .procname = "arlan2-txRing",
1024 .data = &arlan_drive_info,
1025 .maxlen = ARLAN_STR_SIZE,
1026 .mode = 0400,
1027 .proc_handler = arlan_sysctl_infotxRing,
1028 },
1029 {
1030 .procname = "arlan2-rxRing",
1031 .data = &arlan_drive_info,
1032 .maxlen = ARLAN_STR_SIZE,
1033 .mode = 0400,
1034 .proc_handler = arlan_sysctl_inforxRing,
1035 },
1036 {
1037 .procname = "arlan2-18",
1038 .data = &arlan_drive_info,
1039 .maxlen = ARLAN_STR_SIZE,
1040 .mode = 0400,
1041 .proc_handler = arlan_sysctl_info18,
1042 },
1043 {
1044 .procname = "arlan2-ring",
1045 .data = &arlan_drive_info,
1046 .maxlen = ARLAN_STR_SIZE,
1047 .mode = 0400,
1048 .proc_handler = arlan_sysctl_info161719,
1049 },
1050 {
1051 .procname = "arlan2-shm-cpy",
1052 .data = &arlan_drive_info,
1053 .maxlen = ARLAN_STR_SIZE,
1054 .mode = 0400,
1055 .proc_handler = arlan_sysctl_info,
1056 },
1057#endif
1058 {
1059 .procname = "config2",
1060 .data = &conf_reset_result,
1061 .maxlen = 100,
1062 .mode = 0400,
1063 .proc_handler = arlan_configure,
1064 },
1065 {
1066 .procname = "reset2",
1067 .data = &conf_reset_result,
1068 .maxlen = 100,
1069 .mode = 0400,
1070 .proc_handler = arlan_sysctl_reset,
1071 },
1072 { }
1073};
1074
1075static ctl_table arlan_conf_table3[] =
1076{
1077
1078 ARLAN_SYSCTL_TABLE_TOTAL(3)
1079
1080#ifdef ARLAN_PROC_SHM_DUMP
1081 {
1082 .procname = "arlan3-txRing",
1083 .data = &arlan_drive_info,
1084 .maxlen = ARLAN_STR_SIZE,
1085 .mode = 0400,
1086 .proc_handler = arlan_sysctl_infotxRing,
1087 },
1088 {
1089 .procname = "arlan3-rxRing",
1090 .data = &arlan_drive_info,
1091 .maxlen = ARLAN_STR_SIZE,
1092 .mode = 0400,
1093 .proc_handler = arlan_sysctl_inforxRing,
1094 },
1095 {
1096 .procname = "arlan3-18",
1097 .data = &arlan_drive_info,
1098 .maxlen = ARLAN_STR_SIZE,
1099 .mode = 0400,
1100 .proc_handler = arlan_sysctl_info18,
1101 },
1102 {
1103 .procname = "arlan3-ring",
1104 .data = &arlan_drive_info,
1105 .maxlen = ARLAN_STR_SIZE,
1106 .mode = 0400,
1107 .proc_handler = arlan_sysctl_info161719,
1108 },
1109 {
1110 .procname = "arlan3-shm-cpy",
1111 .data = &arlan_drive_info,
1112 .maxlen = ARLAN_STR_SIZE,
1113 .mode = 0400,
1114 .proc_handler = arlan_sysctl_info,
1115 },
1116#endif
1117 {
1118 .procname = "config3",
1119 .data = &conf_reset_result,
1120 .maxlen = 100,
1121 .mode = 0400,
1122 .proc_handler = arlan_configure,
1123 },
1124 {
1125 .procname = "reset3",
1126 .data = &conf_reset_result,
1127 .maxlen = 100,
1128 .mode = 0400,
1129 .proc_handler = arlan_sysctl_reset,
1130 },
1131 { }
1132};
1133
1134
1135
1136static ctl_table arlan_table[] =
1137{
1138 {
1139 .procname = "arlan0",
1140 .maxlen = 0,
1141 .mode = 0600,
1142 .child = arlan_conf_table0,
1143 },
1144 {
1145 .procname = "arlan1",
1146 .maxlen = 0,
1147 .mode = 0600,
1148 .child = arlan_conf_table1,
1149 },
1150 {
1151 .procname = "arlan2",
1152 .maxlen = 0,
1153 .mode = 0600,
1154 .child = arlan_conf_table2,
1155 },
1156 {
1157 .procname = "arlan3",
1158 .maxlen = 0,
1159 .mode = 0600,
1160 .child = arlan_conf_table3,
1161 },
1162 { }
1163};
1164
1165#else
1166
1167static ctl_table arlan_table[] =
1168{
1169 { }
1170};
1171#endif
1172
1173
1174// static int mmtu = 1234;
1175
1176static ctl_table arlan_root_table[] =
1177{
1178 {
1179 .procname = "arlan",
1180 .maxlen = 0,
1181 .mode = 0555,
1182 .child = arlan_table,
1183 },
1184 { }
1185};
1186
1187
1188static struct ctl_table_header *arlan_device_sysctl_header;
1189
1190int __init init_arlan_proc(void)
1191{
1192
1193 int i = 0;
1194 if (arlan_device_sysctl_header)
1195 return 0;
1196 arlan_device_sysctl_header = register_sysctl_table(arlan_root_table);
1197 if (!arlan_device_sysctl_header)
1198 return -1;
1199
1200 return 0;
1201
1202}
1203
1204void __exit cleanup_arlan_proc(void)
1205{
1206 unregister_sysctl_table(arlan_device_sysctl_header);
1207 arlan_device_sysctl_header = NULL;
1208
1209}
1210#endif
diff --git a/drivers/staging/arlan/arlan.h b/drivers/staging/arlan/arlan.h
deleted file mode 100644
index ffcd3ea048aa..000000000000
--- a/drivers/staging/arlan/arlan.h
+++ /dev/null
@@ -1,535 +0,0 @@
1/*
2 * Copyright (C) 1997 Cullen Jennings
3 * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
4 * GNU General Public License applies
5 */
6
7#include <linux/module.h>
8#include <linux/kernel.h>
9#include <linux/types.h>
10#include <linux/skbuff.h>
11#include <linux/if_ether.h> /* For the statistics structure. */
12#include <linux/if_arp.h> /* For ARPHRD_ETHER */
13#include <linux/ptrace.h>
14#include <linux/ioport.h>
15#include <linux/in.h>
16#include <linux/slab.h>
17#include <linux/string.h>
18#include <linux/timer.h>
19
20#include <linux/init.h>
21#include <linux/bitops.h>
22#include <asm/system.h>
23#include <linux/io.h>
24#include <linux/errno.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
28
29
30/* #define ARLAN_DEBUGGING 1 */
31
32#define ARLAN_PROC_INTERFACE
33#define MAX_ARLANS 4 /* not more than 4 ! */
34#define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
35
36#define ARLAN_MAX_MULTICAST_ADDRS 16
37#define ARLAN_RCV_CLEAN 0
38#define ARLAN_RCV_PROMISC 1
39#define ARLAN_RCV_CONTROL 2
40
41#ifdef CONFIG_PROC_FS
42extern int init_arlan_proc(void);
43extern void cleanup_arlan_proc(void);
44#else
45#define init_arlan_proc() ({ 0; })
46#define cleanup_arlan_proc() do { } while (0)
47#endif
48
49extern struct net_device *arlan_device[MAX_ARLANS];
50extern int arlan_debug;
51extern int arlan_entry_debug;
52extern int arlan_exit_debug;
53extern int testMemory;
54extern int arlan_command(struct net_device *dev, int command);
55
56#define SIDUNKNOWN -1
57#define radioNodeIdUNKNOWN -1
58#define irqUNKNOWN 0
59#define debugUNKNOWN 0
60#define testMemoryUNKNOWN 1
61#define spreadingCodeUNKNOWN 0
62#define channelNumberUNKNOWN 0
63#define channelSetUNKNOWN 0
64#define systemIdUNKNOWN -1
65#define registrationModeUNKNOWN -1
66
67
68#define IFDEBUG(L) if ((L) & arlan_debug)
69#define ARLAN_FAKE_HDR_LEN 12
70
71#ifdef ARLAN_DEBUGGING
72 #define DEBUG 1
73 #define ARLAN_ENTRY_EXIT_DEBUGGING 1
74 #define ARLAN_DEBUG(a, b) printk(KERN_DEBUG a, b)
75#else
76 #define ARLAN_DEBUG(a, b)
77#endif
78
79#define ARLAN_SHMEM_SIZE 0x2000
80
81struct arlan_shmem {
82 /* Header Signature */
83 volatile char textRegion[48];
84 volatile u_char resetFlag;
85 volatile u_char diagnosticInfo;
86 volatile u_short diagnosticOffset;
87 volatile u_char _1[12];
88 volatile u_char lanCardNodeId[6];
89 volatile u_char broadcastAddress[6];
90 volatile u_char hardwareType;
91 volatile u_char majorHardwareVersion;
92 volatile u_char minorHardwareVersion;
93 volatile u_char radioModule;/* shows EEPROM, can be overridden at 0x111 */
94 volatile u_char defaultChannelSet; /* shows EEProm, can be overriiden at 0x10A */
95 volatile u_char _2[47];
96
97 /* Control/Status Block - 0x0080 */
98 volatile u_char interruptInProgress; /* not used by lancpu */
99 volatile u_char cntrlRegImage; /* not used by lancpu */
100 volatile u_char _3[13];
101 volatile u_char dumpByte;
102 volatile u_char commandByte; /* non-zero = active */
103 volatile u_char commandParameter[15];
104
105 /* Receive Status - 0x00a0 */
106 volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
107 volatile u_char rxFrmType;
108 volatile u_short rxOffset;
109 volatile u_short rxLength;
110 volatile u_char rxSrc[6];
111 volatile u_char rxBroadcastFlag;
112 volatile u_char rxQuality;
113 volatile u_char scrambled;
114 volatile u_char _4[1];
115
116 /* Transmit Status - 0x00b0 */
117 volatile u_char txStatus;
118 volatile u_char txAckQuality;
119 volatile u_char numRetries;
120 volatile u_char _5[14];
121 volatile u_char registeredRouter[6];
122 volatile u_char backboneRouter[6];
123 volatile u_char registrationStatus;
124 volatile u_char configuredStatusFlag;
125 volatile u_char _6[1];
126 volatile u_char ultimateDestAddress[6];
127 volatile u_char immedDestAddress[6];
128 volatile u_char immedSrcAddress[6];
129 volatile u_short rxSequenceNumber;
130 volatile u_char assignedLocaltalkAddress;
131 volatile u_char _7[27];
132
133 /* System Parameter Block */
134
135 /* - Driver Parameters (Novell Specific) */
136
137 volatile u_short txTimeout;
138 volatile u_short transportTime;
139 volatile u_char _8[4];
140
141 /* - Configuration Parameters */
142 volatile u_char irqLevel;
143 volatile u_char spreadingCode;
144 volatile u_char channelSet;
145 volatile u_char channelNumber;
146 volatile u_short radioNodeId;
147 volatile u_char _9[2];
148 volatile u_char scramblingDisable;
149 volatile u_char radioType;
150 volatile u_short routerId;
151 volatile u_char _10[9];
152 volatile u_char txAttenuation;
153 volatile u_char systemId[4];
154 volatile u_short globalChecksum;
155 volatile u_char _11[4];
156 volatile u_short maxDatagramSize;
157 volatile u_short maxFrameSize;
158 volatile u_char maxRetries;
159 volatile u_char receiveMode;
160 volatile u_char priority;
161 volatile u_char rootOrRepeater;
162 volatile u_char specifiedRouter[6];
163 volatile u_short fastPollPeriod;
164 volatile u_char pollDecay;
165 volatile u_char fastPollDelay[2];
166 volatile u_char arlThreshold;
167 volatile u_char arlDecay;
168 volatile u_char _12[1];
169 volatile u_short specRouterTimeout;
170 volatile u_char _13[5];
171
172 /* Scrambled Area */
173 volatile u_char SID[4];
174 volatile u_char encryptionKey[12];
175 volatile u_char _14[2];
176 volatile u_char waitTime[2];
177 volatile u_char lParameter[2];
178 volatile u_char _15[3];
179 volatile u_short headerSize;
180 volatile u_short sectionChecksum;
181
182 volatile u_char registrationMode;
183 volatile u_char registrationFill;
184 volatile u_short pollPeriod;
185 volatile u_short refreshPeriod;
186 volatile u_char name[16];
187 volatile u_char NID[6];
188 volatile u_char localTalkAddress;
189 volatile u_char codeFormat;
190 volatile u_char numChannels;
191 volatile u_char channel1;
192 volatile u_char channel2;
193 volatile u_char channel3;
194 volatile u_char channel4;
195 volatile u_char SSCode[59];
196
197 volatile u_char _16[0xC0];
198 volatile u_short auxCmd;
199 volatile u_char dumpPtr[4];
200 volatile u_char dumpVal;
201 volatile u_char _17[0x6A];
202 volatile u_char wireTest;
203 volatile u_char _18[14];
204
205 /* Statistics Block - 0x0300 */
206 volatile u_char hostcpuLock;
207 volatile u_char lancpuLock;
208 volatile u_char resetTime[18];
209
210 volatile u_char numDatagramsTransmitted[4];
211 volatile u_char numReTransmissions[4];
212 volatile u_char numFramesDiscarded[4];
213 volatile u_char numDatagramsReceived[4];
214 volatile u_char numDuplicateReceivedFrames[4];
215 volatile u_char numDatagramsDiscarded[4];
216
217 volatile u_short maxNumReTransmitDatagram;
218 volatile u_short maxNumReTransmitFrames;
219 volatile u_short maxNumConsecutiveDuplicateFrames;
220 /* misaligned here so we have to go to characters */
221
222 volatile u_char numBytesTransmitted[4];
223 volatile u_char numBytesReceived[4];
224 volatile u_char numCRCErrors[4];
225 volatile u_char numLengthErrors[4];
226 volatile u_char numAbortErrors[4];
227 volatile u_char numTXUnderruns[4];
228 volatile u_char numRXOverruns[4];
229 volatile u_char numHoldOffs[4];
230 volatile u_char numFramesTransmitted[4];
231 volatile u_char numFramesReceived[4];
232 volatile u_char numReceiveFramesLost[4];
233 volatile u_char numRXBufferOverflows[4];
234 volatile u_char numFramesDiscardedAddrMismatch[4];
235 volatile u_char numFramesDiscardedSIDMismatch[4];
236 volatile u_char numPollsTransmistted[4];
237 volatile u_char numPollAcknowledges[4];
238 volatile u_char numStatusTimeouts[4];
239 volatile u_char numNACKReceived[4];
240
241 volatile u_char _19[0x86];
242
243 volatile u_char txBuffer[0x800];
244 volatile u_char rxBuffer[0x800];
245
246 volatile u_char _20[0x800];
247 volatile u_char _21[0x3fb];
248 volatile u_char configStatus;
249 volatile u_char _22;
250 volatile u_char progIOCtrl;
251 volatile u_char shareMBase;
252 volatile u_char controlRegister;
253};
254
255struct arlan_conf_stru {
256 int spreadingCode;
257 int channelSet;
258 int channelNumber;
259 int scramblingDisable;
260 int txAttenuation;
261 int systemId;
262 int maxDatagramSize;
263 int maxFrameSize;
264 int maxRetries;
265 int receiveMode;
266 int priority;
267 int rootOrRepeater;
268 int SID;
269 int radioNodeId;
270 int registrationMode;
271 int registrationFill;
272 int localTalkAddress;
273 int codeFormat;
274 int numChannels;
275 int channel1;
276 int channel2;
277 int channel3;
278 int channel4;
279 int txClear;
280 int txRetries;
281 int txRouting;
282 int txScrambled;
283 int rxParameter;
284 int txTimeoutMs;
285 int txAckTimeoutMs;
286 int waitCardTimeout;
287 int waitTime;
288 int lParameter;
289 int _15;
290 int headerSize;
291 int retries;
292 int tx_delay_ms;
293 int waitReTransmitPacketMaxSize;
294 int ReTransmitPacketMaxSize;
295 int fastReTransCount;
296 int driverRetransmissions;
297 int registrationInterrupts;
298 int hardwareType;
299 int radioType;
300 int writeRadioType;
301 int writeEEPROM;
302 char siteName[17];
303 int measure_rate;
304 int in_speed;
305 int out_speed;
306 int in_speed10;
307 int out_speed10;
308 int in_speed_max;
309 int out_speed_max;
310 int pre_Command_Wait;
311 int rx_tweak1;
312 int rx_tweak2;
313 int tx_queue_len;
314};
315
316extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
317
318struct TxParam {
319 volatile short offset;
320 volatile short length;
321 volatile u_char dest[6];
322 volatile unsigned char clear;
323 volatile unsigned char retries;
324 volatile unsigned char routing;
325 volatile unsigned char scrambled;
326};
327
328#define TX_RING_SIZE 2
329/* Information that need to be kept for each board. */
330struct arlan_private {
331 struct arlan_shmem __iomem *card;
332 struct arlan_shmem *conf;
333
334 struct arlan_conf_stru *Conf;
335 int bad;
336 int reset;
337 unsigned long lastReset;
338 struct timer_list timer;
339 struct timer_list tx_delay_timer;
340 struct timer_list tx_retry_timer;
341 struct timer_list rx_check_timer;
342
343 int registrationLostCount;
344 int reRegisterExp;
345 int irq_test_done;
346
347 struct TxParam txRing[TX_RING_SIZE];
348 char reTransmitBuff[0x800];
349 int txLast;
350 unsigned ReTransmitRequested;
351 unsigned long tx_done_delayed;
352 unsigned long registrationLastSeen;
353
354 unsigned long tx_last_sent;
355 unsigned long tx_last_cleared;
356 unsigned long retransmissions;
357 unsigned long interrupt_ack_requested;
358 spinlock_t lock;
359 unsigned long waiting_command_mask;
360 unsigned long card_polling_interval;
361 unsigned long last_command_buff_free_time;
362
363 int under_reset;
364 int under_config;
365 int rx_command_given;
366 int tx_command_given;
367 unsigned long interrupt_processing_active;
368 unsigned long last_rx_int_ack_time;
369 unsigned long in_bytes;
370 unsigned long out_bytes;
371 unsigned long in_time;
372 unsigned long out_time;
373 unsigned long in_time10;
374 unsigned long out_time10;
375 unsigned long in_bytes10;
376 unsigned long out_bytes10;
377 int init_etherdev_alloc;
378};
379
380
381
382#define ARLAN_CLEAR 0x00
383#define ARLAN_RESET 0x01
384#define ARLAN_CHANNEL_ATTENTION 0x02
385#define ARLAN_INTERRUPT_ENABLE 0x04
386#define ARLAN_CLEAR_INTERRUPT 0x08
387#define ARLAN_POWER 0x40
388#define ARLAN_ACCESS 0x80
389
390#define ARLAN_COM_CONF 0x01
391#define ARLAN_COM_RX_ENABLE 0x03
392#define ARLAN_COM_RX_ABORT 0x04
393#define ARLAN_COM_TX_ENABLE 0x05
394#define ARLAN_COM_TX_ABORT 0x06
395#define ARLAN_COM_NOP 0x07
396#define ARLAN_COM_STANDBY 0x08
397#define ARLAN_COM_ACTIVATE 0x09
398#define ARLAN_COM_GOTO_SLOW_POLL 0x0a
399#define ARLAN_COM_INT 0x80
400
401
402#define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
403#define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
404#define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
405
406#define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
407#define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
408
409#define READSHM(to, from, atype) {\
410 atype tmp;\
411 memcpy_fromio(&(tmp), &(from), sizeof(atype));\
412 to = tmp;\
413 }
414
415#define READSHMEM(from, atype)\
416 atype from; \
417 READSHM(from, arlan->from, atype);
418
419#define WRITESHM(to, from, atype) \
420 { atype tmpSHM = from;\
421 memcpy_toio(&(to), &tmpSHM, sizeof(atype));\
422 }
423
424#define DEBUGSHM(levelSHM, stringSHM, stuff, atype) \
425 { atype tmpSHM; \
426 memcpy_fromio(&tmpSHM, &(stuff), sizeof(atype));\
427 IFDEBUG(levelSHM) printk(stringSHM, tmpSHM);\
428 }
429
430#define WRITESHMB(to, val) \
431 writeb(val, &(to))
432#define READSHMB(to) \
433 readb(&(to))
434#define WRITESHMS(to, val) \
435 writew(val, &(to))
436#define READSHMS(to) \
437 readw(&(to))
438#define WRITESHMI(to, val) \
439 writel(val, &(to))
440#define READSHMI(to) \
441 readl(&(to))
442
443
444
445
446
447#define registrationBad(dev)\
448 (( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
449 ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0))
450
451
452#define readControlRegister(dev)\
453 READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
454
455#define writeControlRegister(dev, v) {\
456 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage, ((v) & 0xF));\
457 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister, (v)); }
458
459
460#define arlan_interrupt_lancpu(dev) {\
461 int cr; \
462 \
463 cr = readControlRegister(dev);\
464 if (cr & ARLAN_CHANNEL_ATTENTION) { \
465 writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
466 } else \
467 writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
468}
469
470#define clearChannelAttention(dev) { \
471 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION); }
472#define setHardwareReset(dev) {\
473 writeControlRegister(dev, readControlRegister(dev) | ARLAN_RESET); }
474#define clearHardwareReset(dev) {\
475 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_RESET); }
476#define setInterruptEnable(dev) {\
477 writeControlRegister(dev, readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ; }
478#define clearInterruptEnable(dev) {\
479 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ; }
480#define setClearInterrupt(dev) {\
481 writeControlRegister(dev, readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ; }
482#define clearClearInterrupt(dev) {\
483 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT); }
484#define setPowerOff(dev) {\
485 writeControlRegister(dev, readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
486 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
487#define setPowerOn(dev) {\
488 writeControlRegister(dev, readControlRegister(dev) & ~(ARLAN_POWER)); }
489#define arlan_lock_card_access(dev) {\
490 writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
491#define arlan_unlock_card_access(dev) {\
492 writeControlRegister(dev, readControlRegister(dev) | ARLAN_ACCESS); }
493
494
495
496
497#define ARLAN_COMMAND_RX 0x000001
498#define ARLAN_COMMAND_NOOP 0x000002
499#define ARLAN_COMMAND_NOOPINT 0x000004
500#define ARLAN_COMMAND_TX 0x000008
501#define ARLAN_COMMAND_CONF 0x000010
502#define ARLAN_COMMAND_RESET 0x000020
503#define ARLAN_COMMAND_TX_ABORT 0x000040
504#define ARLAN_COMMAND_RX_ABORT 0x000080
505#define ARLAN_COMMAND_POWERDOWN 0x000100
506#define ARLAN_COMMAND_POWERUP 0x000200
507#define ARLAN_COMMAND_SLOW_POLL 0x000400
508#define ARLAN_COMMAND_ACTIVATE 0x000800
509#define ARLAN_COMMAND_INT_ACK 0x001000
510#define ARLAN_COMMAND_INT_ENABLE 0x002000
511#define ARLAN_COMMAND_WAIT_NOW 0x004000
512#define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
513#define ARLAN_COMMAND_STANDBY 0x010000
514#define ARLAN_COMMAND_INT_RACK 0x020000
515#define ARLAN_COMMAND_INT_RENABLE 0x040000
516#define ARLAN_COMMAND_CONF_WAIT 0x080000
517#define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
518#define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
519 | ARLAN_COMMAND_RX_ABORT\
520 | ARLAN_COMMAND_CONF)
521#define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
522 | ARLAN_COMMAND_RX_ABORT\
523 | ARLAN_COMMAND_RESET)
524
525
526#define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
527#define ARLAN_DEBUG_RESET 0x00002
528#define ARLAN_DEBUG_TIMING 0x00004
529#define ARLAN_DEBUG_CARD_STATE 0x00008
530#define ARLAN_DEBUG_TX_CHAIN 0x00010
531#define ARLAN_DEBUG_MULTICAST 0x00020
532#define ARLAN_DEBUG_HEADER_DUMP 0x00040
533#define ARLAN_DEBUG_INTERRUPT 0x00080
534#define ARLAN_DEBUG_STARTUP 0x00100
535#define ARLAN_DEBUG_SHUTDOWN 0x00200
diff --git a/drivers/staging/asus_oled/asus_oled.c b/drivers/staging/asus_oled/asus_oled.c
index 7ebecc92c61b..5b279fb30f3f 100644
--- a/drivers/staging/asus_oled/asus_oled.c
+++ b/drivers/staging/asus_oled/asus_oled.c
@@ -771,7 +771,7 @@ static struct usb_driver oled_driver = {
771}; 771};
772 772
773static CLASS_ATTR_STRING(version, S_IRUGO, 773static CLASS_ATTR_STRING(version, S_IRUGO,
774 ASUS_OLED_UNDERSCORE_NAME " " ASUS_OLED_VERSION); 774 ASUS_OLED_UNDERSCORE_NAME " " ASUS_OLED_VERSION);
775 775
776static int __init asus_oled_init(void) 776static int __init asus_oled_init(void)
777{ 777{
diff --git a/drivers/staging/batman-adv/CHANGELOG b/drivers/staging/batman-adv/CHANGELOG
index 8a181639ceaa..c8f9d9e06bb4 100644
--- a/drivers/staging/batman-adv/CHANGELOG
+++ b/drivers/staging/batman-adv/CHANGELOG
@@ -1,3 +1,17 @@
1batman-adv 0.2.1:
2
3* support latest kernels (2.6.20 - 2.6.33)
4* receive packets directly using skbs, remove old sockets and threads
5* fix various regressions in the vis server
6* don't disable interrupts while sending
7* replace internal logging mechanism with standard kernel logging
8* move vis formats into userland, one general format remains in the kernel
9* allow MAC address to be set, correctly initialize them
10* code refactoring and cleaning for coding style
11* many bugs (null pointers, locking, hash iterators) squashed
12
13 -- Sun, 21 Mar 2010 20:46:47 +0100
14
1batman-adv 0.2: 15batman-adv 0.2:
2 16
3* support latest kernels (2.6.20 - 2.6.31) 17* support latest kernels (2.6.20 - 2.6.31)
diff --git a/drivers/staging/batman-adv/Makefile b/drivers/staging/batman-adv/Makefile
index 42b4e6370263..f25068c0fae6 100644
--- a/drivers/staging/batman-adv/Makefile
+++ b/drivers/staging/batman-adv/Makefile
@@ -1,5 +1,5 @@
1# 1#
2# Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2# Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3# 3#
4# Marek Lindner, Simon Wunderlich 4# Marek Lindner, Simon Wunderlich
5# 5#
@@ -19,4 +19,4 @@
19# 19#
20 20
21obj-m += batman-adv.o 21obj-m += batman-adv.o
22batman-adv-objs := main.o proc.o send.o routing.o soft-interface.o device.o translation-table.o bitarray.o hash.o ring_buffer.o vis.o hard-interface.o aggregation.o originator.o 22batman-adv-objs := main.o send.o routing.o soft-interface.o device.o translation-table.o bitarray.o hash.o ring_buffer.o vis.o hard-interface.o aggregation.o originator.o bat_sysfs.o
diff --git a/drivers/staging/batman-adv/README b/drivers/staging/batman-adv/README
index 7d666ad04359..14244a2c4e4f 100644
--- a/drivers/staging/batman-adv/README
+++ b/drivers/staging/batman-adv/README
@@ -1,149 +1,240 @@
1[state: 06-01-2010] 1[state: 03-05-2010]
2 2
3BATMAN-ADV 3BATMAN-ADV
4---------- 4----------
5 5
6Batman-advanced is a new approach to wireless networking which does no longer 6Batman advanced is a new approach to wireless networking which
7operate on the IP basis. Unlike B.A.T.M.A.N, which exchanges information 7does no longer operate on the IP basis. Unlike the batman daemon,
8using UDP packets and sets routing tables, batman-advanced operates on ISO/OSI 8which exchanges information using UDP packets and sets routing
9Layer 2 only and uses and routes (or better: bridges) Ethernet Frames. It 9tables, batman-advanced operates on ISO/OSI Layer 2 only and uses
10emulates a virtual network switch of all nodes participating. Therefore all 10and routes (or better: bridges) Ethernet Frames. It emulates a
11nodes appear to be link local, thus all higher operating protocols won't be 11virtual network switch of all nodes participating. Therefore all
12affected by any changes within the network. You can run almost any protocol 12nodes appear to be link local, thus all higher operating proto-
13above B.A.T.M.A.N. Advanced, prominent examples are: IPv4, IPv6, DHCP, IPX. 13cols won't be affected by any changes within the network. You can
14run almost any protocol above batman advanced, prominent examples
15are: IPv4, IPv6, DHCP, IPX.
14 16
15This is batman-advanced implemented as Linux kernel driver. It does not depend 17Batman advanced was implemented as a Linux kernel driver to re-
16on any network (other) driver, and can be used on wifi as well as ethernet, 18duce the overhead to a minimum. It does not depend on any (other)
17vpn, etc ... (anything with ethernet-style layer 2). 19network driver, and can be used on wifi as well as ethernet lan,
20vpn, etc ... (anything with ethernet-style layer 2).
18 21
19USAGE 22CONFIGURATION
20----- 23-------------
21 24
22insmod the batman-adv.ko in your kernel: 25Load the batman-adv module into your kernel:
23 26
24# insmod batman-adv.ko 27# insmod batman-adv.ko
25 28
26the module is now waiting for activation. You must add some interfaces 29The module is now waiting for activation. You must add some in-
27on which batman can operate. Each interface must be added separately: 30terfaces on which batman can operate. After loading the module
31batman advanced will scan your systems interfaces to search for
32compatible interfaces. Once found, it will create subfolders in
33the /sys directories of each supported interface, e.g.
34
35# ls /sys/class/net/eth0/batman_adv/
36# iface_status mesh_iface
37
38If an interface does not have the "batman_adv" subfolder it prob-
39ably is not supported. Not supported interfaces are: loopback,
40non-ethernet and batman's own interfaces.
41
42Note: After the module was loaded it will continuously watch for
43new interfaces to verify the compatibility. There is no need to
44reload the module if you plug your USB wifi adapter into your ma-
45chine after batman advanced was initially loaded.
46
47To activate a given interface simply write "bat0" into its
48"mesh_iface" file inside the batman_adv subfolder:
49
50# echo bat0 > /sys/class/net/eth0/batman_adv/mesh_iface
51
52Repeat this step for all interfaces you wish to add. Now batman
53starts using/broadcasting on this/these interface(s).
28 54
29# echo wlan0 > /proc/net/batman-adv/interfaces 55By reading the "iface_status" file you can check its status:
30 56
31( # echo wlan1 > /proc/net/batman-adv/interfaces ) 57# cat /sys/class/net/eth0/batman_adv/iface_status
32( # echo eth0 > /proc/net/batman-adv/interfaces ) 58# active
33( ... )
34 59
35Now batman starts broadcasting on this interface. 60To deactivate an interface you have to write "none" into its
36You can now view the table of originators (mesh participants) with: 61"mesh_iface" file:
37 62
38# cat /proc/net/batman-adv/originators 63# echo none > /sys/class/net/eth0/batman_adv/mesh_iface
39 64
40The module will create a new interface "bat0", which can be used as a
41regular interface:
42 65
43# ifconfig bat0 inet 192.168.0.1 up 66All mesh wide settings can be found in batman's own interface
44# ping 192.168.0.2 67folder:
45...
46 68
47If you want topology visualization, your meshnode must be configured 69# ls /sys/class/net/bat0/mesh/
48as VIS-server: 70# aggregate_ogm originators transtable_global vis_mode
71# orig_interval transtable_local vis_data
49 72
50# echo "server" > /proc/net/batman-adv/vis
51 73
52Each node is either configured as "server" or as "client" (default: 74Some of the files contain all sort of status information regard-
53"client"). Clients send their topology data to the server next to them, 75ing the mesh network. For example, you can view the table of
54and server synchronize with other servers. If there is no server 76originators (mesh participants) with:
55configured (default) within the mesh, no topology information will be
56transmitted. With these "synchronizing servers", there can be 1 or
57more vis servers sharing the same (or at least very similar) data.
58 77
59When configured as server, you can get a topology snapshot of your mesh: 78# cat /sys/class/net/bat0/mesh/originators
60 79
61# cat /proc/net/batman-adv/vis 80Other files allow to change batman's behaviour to better fit your
81requirements. For instance, you can check the current originator
82interval (value in milliseconds which determines how often batman
83sends its broadcast packets):
62 84
63The output is in a generic raw format. Use the batctl tool (See below) 85# cat /sys/class/net/bat0/mesh/orig_interval
64to convert this to other formats more suitable for graphing, eg 86# status: 1000
65graphviz dot, or JSON data-interchange format. 87
88and also change its value:
89
90# echo 3000 > /sys/class/net/bat0/mesh/orig_interval
66 91
67In very mobile scenarios, you might want to adjust the originator 92In very mobile scenarios, you might want to adjust the originator
68interval to a lower value. This will make the mesh more responsive to 93interval to a lower value. This will make the mesh more respon-
69topology changes, but will also increase the overhead. Please make sure 94sive to topology changes, but will also increase the overhead.
70that all nodes in your mesh use the same interval. The default value 95
71is 1000 ms (1 second). 96
97USAGE
98-----
99
100To make use of your newly created mesh, batman advanced provides
101a new interface "bat0" which you should use from this point on.
102All interfaces added to batman advanced are not relevant any
103longer because batman handles them for you. Basically, one "hands
104over" the data by using the batman interface and batman will make
105sure it reaches its destination.
72 106
73# echo 1000 > /proc/net/batman-adv/orig_interval 107The "bat0" interface can be used like any other regular inter-
108face. It needs an IP address which can be either statically con-
109figured or dynamically (by using DHCP or similar services):
74 110
75To deactivate batman, do: 111# NodeA: ifconfig bat0 192.168.0.1
112# NodeB: ifconfig bat0 192.168.0.2
113# NodeB: ping 192.168.0.1
114
115Note: In order to avoid problems remove all IP addresses previ-
116ously assigned to interfaces now used by batman advanced, e.g.
117
118# ifconfig eth0 0.0.0.0
119
120
121VISUALIZATION
122-------------
123
124If you want topology visualization, at least one mesh node must
125be configured as VIS-server:
126
127# echo "server" > /sys/class/net/bat0/mesh/vis_mode
128
129Each node is either configured as "server" or as "client" (de-
130fault: "client"). Clients send their topology data to the server
131next to them, and server synchronize with other servers. If there
132is no server configured (default) within the mesh, no topology
133information will be transmitted. With these "synchronizing
134servers", there can be 1 or more vis servers sharing the same (or
135at least very similar) data.
136
137When configured as server, you can get a topology snapshot of
138your mesh:
139
140# cat /sys/class/net/bat0/mesh/vis_data
141
142This raw output is intended to be easily parsable and convertable
143with other tools. Have a look at the batctl README if you want a
144vis output in dot or json format for instance and how those out-
145puts could then be visualised in an image.
146
147The raw format consists of comma separated values per entry where
148each entry is giving information about a certain source inter-
149face. Each entry can/has to have the following values:
150-> "mac" - mac address of an originator's source interface
151 (each line begins with it)
152-> "TQ mac value" - src mac's link quality towards mac address
153 of a neighbor originator's interface which
154 is being used for routing
155-> "HNA mac" - HNA announced by source mac
156-> "PRIMARY" - this is a primary interface
157-> "SEC mac" - secondary mac address of source
158 (requires preceding PRIMARY)
159
160The TQ value has a range from 4 to 255 with 255 being the best.
161The HNA entries are showing which hosts are connected to the mesh
162via bat0 or being bridged into the mesh network. The PRIMARY/SEC
163values are only applied on primary interfaces
76 164
77# echo "" > /proc/net/batman-adv/interfaces
78 165
79LOGGING/DEBUGGING 166LOGGING/DEBUGGING
80----------------- 167-----------------
81 168
82All error messages, warnings and information messages are sent to the 169All error messages, warnings and information messages are sent to
83kernel log. Depending on your operating system distribution this can be 170the kernel log. Depending on your operating system distribution
84read in one of a number of ways. Try using the commands: dmesg, 171this can be read in one of a number of ways. Try using the com-
85logread, or looking in the files /var/log/kern.log or 172mands: dmesg, logread, or looking in the files /var/log/kern.log
86/var/log/syslog. All batman-adv messages are prefixed with 173or /var/log/syslog. All batman-adv messages are prefixed with
87"batman-adv:" So to see just these messages try 174"batman-adv:" So to see just these messages try
88 175
89dmesg | grep batman-adv 176# dmesg | grep batman-adv
90 177
91When investigating problems with your mesh network it is sometimes 178When investigating problems with your mesh network it is some-
92necessary to see more detail debug messages. This must be enabled when 179times necessary to see more detail debug messages. This must be
93compiling the batman-adv module. Use "make menuconfig" and enable the 180enabled when compiling the batman-adv module. When building bat-
181man-adv as part of kernel, use "make menuconfig" and enable the
94option "B.A.T.M.A.N. debugging". 182option "B.A.T.M.A.N. debugging".
95 183
96The additional debug output is by default disabled. It can be enabled 184The additional debug output is by default disabled. It can be en-
97either at kernel module load time or during run time. To enable debug 185abled either at kernel modules load time or during run time. To
98output at module load time, add the module parameter debug=<value>. 186enable debug output at module load time, add the module parameter
99<value> can take one of four values. 187debug=<value>. <value> can take one of four values.
100 188
1010 - All debug output disabled 1890 - All debug output disabled
1021 - Enable messages related to routing / flooding / broadcasting 1901 - Enable messages related to routing / flooding / broadcasting
1032 - Enable route or hna added / changed / deleted 1912 - Enable route or hna added / changed / deleted
1043 - Enable all messages 1923 - Enable all messages
105 193
106e.g. 194e.g.
107 195
108modprobe batman-adv debug=2 196# modprobe batman-adv debug=2
109 197
110will load the module and enable debug messages for when routes or HNAs 198will load the module and enable debug messages for when routes or
111change. 199HNAs change.
112 200
113The debug output can also be changed at runtime using the file 201The debug output can also be changed at runtime using the file
114/sys/module/batman-adv/parameters/debug. e.g. 202/sys/module/batman-adv/parameters/debug. e.g.
115 203
116echo 2 > /sys/module/batman-adv/parameters/debug 204# echo 2 > /sys/module/batman-adv/parameters/debug
117 205
118enables debug messages for when routes or HNAs 206enables debug messages for when routes or HNAs
119 207
120The debug output is sent to the kernel logs. So try dmesg, logread etc 208The debug output is sent to the kernel logs. So try dmesg, lo-
121to see the debug messages. 209gread, etc to see the debug messages.
210
122 211
123BATCTL 212BATCTL
124------ 213------
125 214
126B.A.T.M.A.N. advanced operates on layer 2 and thus all hosts 215As batman advanced operates on layer 2 all hosts participating in
127participating in the virtual switch are completely transparent for all 216the virtual switch are completely transparent for all protocols
128protocols above layer 2. Therefore the common diagnosis tools do not 217above layer 2. Therefore the common diagnosis tools do not work
129work as expected. To overcome these problems batctl was created. At 218as expected. To overcome these problems batctl was created. At
130the moment the batctl contains ping, traceroute, tcpdump and 219the moment the batctl contains ping, traceroute, tcpdump and
131interfaces to the kernel module settings. 220interfaces to the kernel module settings.
132 221
133For more information, please see the manpage (man batctl). 222For more information, please see the manpage (man batctl).
134 223
135batctl is available on http://www.open-mesh.net/ 224batctl is available on http://www.open-mesh.org/
225
136 226
137CONTACT 227CONTACT
138------- 228-------
139 229
140Please send us comments, experiences, questions, anything :) 230Please send us comments, experiences, questions, anything :)
141 231
142IRC: #batman on irc.freenode.org 232IRC: #batman on irc.freenode.org
143Mailing-list: b.a.t.m.a.n@open-mesh.net 233Mailing-list: b.a.t.m.a.n@open-mesh.net (optional subscription
144(subscription at https://list.open-mesh.net/mm/listinfo/b.a.t.m.a.n ) 234 at https://lists.open-mesh.org/mm/listinfo/b.a.t.m.a.n)
145 235
146You can also contact the Authors: 236You can also contact the Authors:
147 237
148Marek Lindner <lindner_marek@yahoo.de> 238Marek Lindner <lindner_marek@yahoo.de>
149Simon Wunderlich <siwu@hrz.tu-chemnitz.de> 239Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
240
diff --git a/drivers/staging/batman-adv/TODO b/drivers/staging/batman-adv/TODO
index 2f15136b18e7..518db7fd41b1 100644
--- a/drivers/staging/batman-adv/TODO
+++ b/drivers/staging/batman-adv/TODO
@@ -1,23 +1,6 @@
1=> proc interface 1Request a review.
2* implement new interface to add/delete interfaces and setting options 2Process the comments from the review.
3* /proc/sys/net/batman-adv/ as main folder 3Move into mainline proper.
4* in interfaces/ list every available interface of the host
5* each interfaces/$iface/ contains the following files:
6-> enable (def: 0) [add/remove this interface to batman-adv]
7-> ogm_interval (def: 1000) [ogm interval of that interface]
8-> context (def: bat0) [later we want to support multiple mesh instances via
9-> bat0/bat1/bat2/..]
10-> status (read-only) [outputs the interface status from batman's
11-> perspective]
12* in mesh/batX/ list every available mesh subnet
13-> vis_server (def: 0) [enable/disable vis server for that mesh]
14-> vis_data (read-only) [outputs the vis data in a raw format]
15-> aggregate_ogm (def: 1) [enable/disable ogm aggregation for that mesh]
16-> originators (read-only) [outputs the originator table]
17-> transtable_global (read-only) [outputs the global translation table]
18-> transtable_local (read-only) [outputs the local translation table]
19
20=> fix checkpatch.pl errors
21 4
22Please send all patches to: 5Please send all patches to:
23 Marek Lindner <lindner_marek@yahoo.de> 6 Marek Lindner <lindner_marek@yahoo.de>
diff --git a/drivers/staging/batman-adv/aggregation.c b/drivers/staging/batman-adv/aggregation.c
index 7917322a7e2a..ce8b8a6e5ae6 100644
--- a/drivers/staging/batman-adv/aggregation.c
+++ b/drivers/staging/batman-adv/aggregation.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -52,6 +52,8 @@ static bool can_aggregate_with(struct batman_packet *new_batman_packet,
52 */ 52 */
53 53
54 if (time_before(send_time, forw_packet->send_time) && 54 if (time_before(send_time, forw_packet->send_time) &&
55 time_after_eq(send_time + msecs_to_jiffies(MAX_AGGREGATION_MS),
56 forw_packet->send_time) &&
55 (aggregated_bytes <= MAX_AGGREGATION_BYTES)) { 57 (aggregated_bytes <= MAX_AGGREGATION_BYTES)) {
56 58
57 /** 59 /**
@@ -79,14 +81,21 @@ static bool can_aggregate_with(struct batman_packet *new_batman_packet,
79 * interface only - we still can aggregate */ 81 * interface only - we still can aggregate */
80 if ((directlink) && 82 if ((directlink) &&
81 (new_batman_packet->ttl == 1) && 83 (new_batman_packet->ttl == 1) &&
82 (forw_packet->if_incoming == if_incoming)) 84 (forw_packet->if_incoming == if_incoming) &&
83 return true;
84 85
86 /* packets from direct neighbors or
87 * own secondary interface packets
88 * (= secondary interface packets in general) */
89 (batman_packet->flags & DIRECTLINK ||
90 (forw_packet->own &&
91 forw_packet->if_incoming->if_num != 0)))
92 return true;
85 } 93 }
86 94
87 return false; 95 return false;
88} 96}
89 97
98#define atomic_dec_not_zero(v) atomic_add_unless((v), -1, 0)
90/* create a new aggregated packet and add this packet to it */ 99/* create a new aggregated packet and add this packet to it */
91static void new_aggregated_packet(unsigned char *packet_buff, 100static void new_aggregated_packet(unsigned char *packet_buff,
92 int packet_len, 101 int packet_len,
@@ -98,13 +107,26 @@ static void new_aggregated_packet(unsigned char *packet_buff,
98 struct forw_packet *forw_packet_aggr; 107 struct forw_packet *forw_packet_aggr;
99 unsigned long flags; 108 unsigned long flags;
100 109
110 /* own packet should always be scheduled */
111 if (!own_packet) {
112 if (!atomic_dec_not_zero(&batman_queue_left)) {
113 bat_dbg(DBG_BATMAN, "batman packet queue full\n");
114 return;
115 }
116 }
117
101 forw_packet_aggr = kmalloc(sizeof(struct forw_packet), GFP_ATOMIC); 118 forw_packet_aggr = kmalloc(sizeof(struct forw_packet), GFP_ATOMIC);
102 if (!forw_packet_aggr) 119 if (!forw_packet_aggr) {
120 if (!own_packet)
121 atomic_inc(&batman_queue_left);
103 return; 122 return;
123 }
104 124
105 forw_packet_aggr->packet_buff = kmalloc(MAX_AGGREGATION_BYTES, 125 forw_packet_aggr->packet_buff = kmalloc(MAX_AGGREGATION_BYTES,
106 GFP_ATOMIC); 126 GFP_ATOMIC);
107 if (!forw_packet_aggr->packet_buff) { 127 if (!forw_packet_aggr->packet_buff) {
128 if (!own_packet)
129 atomic_inc(&batman_queue_left);
108 kfree(forw_packet_aggr); 130 kfree(forw_packet_aggr);
109 return; 131 return;
110 } 132 }
@@ -157,7 +179,8 @@ static void aggregate(struct forw_packet *forw_packet_aggr,
157 (1 << forw_packet_aggr->num_packets); 179 (1 << forw_packet_aggr->num_packets);
158} 180}
159 181
160void add_bat_packet_to_list(unsigned char *packet_buff, int packet_len, 182void add_bat_packet_to_list(struct bat_priv *bat_priv,
183 unsigned char *packet_buff, int packet_len,
161 struct batman_if *if_incoming, char own_packet, 184 struct batman_if *if_incoming, char own_packet,
162 unsigned long send_time) 185 unsigned long send_time)
163{ 186{
@@ -175,7 +198,7 @@ void add_bat_packet_to_list(unsigned char *packet_buff, int packet_len,
175 /* find position for the packet in the forward queue */ 198 /* find position for the packet in the forward queue */
176 spin_lock_irqsave(&forw_bat_list_lock, flags); 199 spin_lock_irqsave(&forw_bat_list_lock, flags);
177 /* own packets are not to be aggregated */ 200 /* own packets are not to be aggregated */
178 if ((atomic_read(&aggregation_enabled)) && (!own_packet)) { 201 if ((atomic_read(&bat_priv->aggregation_enabled)) && (!own_packet)) {
179 hlist_for_each_entry(forw_packet_pos, tmp_node, &forw_bat_list, 202 hlist_for_each_entry(forw_packet_pos, tmp_node, &forw_bat_list,
180 list) { 203 list) {
181 if (can_aggregate_with(batman_packet, 204 if (can_aggregate_with(batman_packet,
@@ -195,6 +218,16 @@ void add_bat_packet_to_list(unsigned char *packet_buff, int packet_len,
195 if (forw_packet_aggr == NULL) { 218 if (forw_packet_aggr == NULL) {
196 /* the following section can run without the lock */ 219 /* the following section can run without the lock */
197 spin_unlock_irqrestore(&forw_bat_list_lock, flags); 220 spin_unlock_irqrestore(&forw_bat_list_lock, flags);
221
222 /**
223 * if we could not aggregate this packet with one of the others
224 * we hold it back for a while, so that it might be aggregated
225 * later on
226 */
227 if ((!own_packet) &&
228 (atomic_read(&bat_priv->aggregation_enabled)))
229 send_time += msecs_to_jiffies(MAX_AGGREGATION_MS);
230
198 new_aggregated_packet(packet_buff, packet_len, 231 new_aggregated_packet(packet_buff, packet_len,
199 send_time, direct_link, 232 send_time, direct_link,
200 if_incoming, own_packet); 233 if_incoming, own_packet);
diff --git a/drivers/staging/batman-adv/aggregation.h b/drivers/staging/batman-adv/aggregation.h
index 6da8df9f99b7..84401ca24c35 100644
--- a/drivers/staging/batman-adv/aggregation.h
+++ b/drivers/staging/batman-adv/aggregation.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -30,8 +30,9 @@ static inline int aggregated_packet(int buff_pos, int packet_len, int num_hna)
30 (next_buff_pos <= MAX_AGGREGATION_BYTES); 30 (next_buff_pos <= MAX_AGGREGATION_BYTES);
31} 31}
32 32
33void add_bat_packet_to_list(unsigned char *packet_buff, int packet_len, 33void add_bat_packet_to_list(struct bat_priv *bat_priv,
34 struct batman_if *if_outgoing, char own_packet, 34 unsigned char *packet_buff, int packet_len,
35 struct batman_if *if_incoming, char own_packet,
35 unsigned long send_time); 36 unsigned long send_time);
36void receive_aggr_bat_packet(struct ethhdr *ethhdr, unsigned char *packet_buff, 37void receive_aggr_bat_packet(struct ethhdr *ethhdr, unsigned char *packet_buff,
37 int packet_len, struct batman_if *if_incoming); 38 int packet_len, struct batman_if *if_incoming);
diff --git a/drivers/staging/batman-adv/bat_sysfs.c b/drivers/staging/batman-adv/bat_sysfs.c
new file mode 100644
index 000000000000..e2c000b80ca0
--- /dev/null
+++ b/drivers/staging/batman-adv/bat_sysfs.c
@@ -0,0 +1,484 @@
1/*
2 * Copyright (C) 2010 B.A.T.M.A.N. contributors:
3 *
4 * Marek Lindner
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of version 2 of the GNU General Public
8 * License as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA
19 *
20 */
21
22#include "main.h"
23#include "bat_sysfs.h"
24#include "translation-table.h"
25#include "originator.h"
26#include "hard-interface.h"
27#include "vis.h"
28
29#define to_dev(obj) container_of(obj, struct device, kobj)
30
31struct bat_attribute {
32 struct attribute attr;
33 ssize_t (*show)(struct kobject *kobj, struct attribute *attr,
34 char *buf);
35 ssize_t (*store)(struct kobject *kobj, struct attribute *attr,
36 char *buf, size_t count);
37};
38
39struct hardif_attribute {
40 struct attribute attr;
41 ssize_t (*show)(struct kobject *kobj, struct attribute *attr,
42 char *buf);
43 ssize_t (*store)(struct kobject *kobj, struct attribute *attr,
44 char *buf, size_t count);
45};
46
47#define BAT_ATTR(_name, _mode, _show, _store) \
48struct bat_attribute bat_attr_##_name = { \
49 .attr = {.name = __stringify(_name), \
50 .mode = _mode }, \
51 .show = _show, \
52 .store = _store, \
53};
54
55#define BAT_BIN_ATTR(_name, _mode, _read, _write) \
56struct bin_attribute bat_attr_##_name = { \
57 .attr = { .name = __stringify(_name), \
58 .mode = _mode, }, \
59 .read = _read, \
60 .write = _write, \
61};
62
63#define HARDIF_ATTR(_name, _mode, _show, _store) \
64struct hardif_attribute hardif_attr_##_name = { \
65 .attr = {.name = __stringify(_name), \
66 .mode = _mode }, \
67 .show = _show, \
68 .store = _store, \
69};
70
71static ssize_t show_aggr_ogm(struct kobject *kobj, struct attribute *attr,
72 char *buff)
73{
74 struct device *dev = to_dev(kobj->parent);
75 struct bat_priv *bat_priv = netdev_priv(to_net_dev(dev));
76 int aggr_status = atomic_read(&bat_priv->aggregation_enabled);
77
78 return sprintf(buff, "status: %s\ncommands: enable, disable, 0, 1\n",
79 aggr_status == 0 ? "disabled" : "enabled");
80}
81
82static ssize_t store_aggr_ogm(struct kobject *kobj, struct attribute *attr,
83 char *buff, size_t count)
84{
85 struct device *dev = to_dev(kobj->parent);
86 struct net_device *net_dev = to_net_dev(dev);
87 struct bat_priv *bat_priv = netdev_priv(net_dev);
88 int aggr_tmp = -1;
89
90 if (((count == 2) && (buff[0] == '1')) ||
91 (strncmp(buff, "enable", 6) == 0))
92 aggr_tmp = 1;
93
94 if (((count == 2) && (buff[0] == '0')) ||
95 (strncmp(buff, "disable", 7) == 0))
96 aggr_tmp = 0;
97
98 if (aggr_tmp < 0) {
99 if (buff[count - 1] == '\n')
100 buff[count - 1] = '\0';
101
102 printk(KERN_INFO "batman-adv:Invalid parameter for 'aggregate OGM' setting on mesh %s received: %s\n",
103 net_dev->name, buff);
104 return -EINVAL;
105 }
106
107 if (atomic_read(&bat_priv->aggregation_enabled) == aggr_tmp)
108 return count;
109
110 printk(KERN_INFO "batman-adv:Changing aggregation from: %s to: %s on mesh: %s\n",
111 atomic_read(&bat_priv->aggregation_enabled) == 1 ?
112 "enabled" : "disabled", aggr_tmp == 1 ? "enabled" : "disabled",
113 net_dev->name);
114
115 atomic_set(&bat_priv->aggregation_enabled, (unsigned)aggr_tmp);
116 return count;
117}
118
119static ssize_t show_vis_mode(struct kobject *kobj, struct attribute *attr,
120 char *buff)
121{
122 struct device *dev = to_dev(kobj->parent);
123 struct bat_priv *bat_priv = netdev_priv(to_net_dev(dev));
124 int vis_mode = atomic_read(&bat_priv->vis_mode);
125
126 return sprintf(buff, "status: %s\ncommands: client, server, %d, %d\n",
127 vis_mode == VIS_TYPE_CLIENT_UPDATE ?
128 "client" : "server",
129 VIS_TYPE_SERVER_SYNC, VIS_TYPE_CLIENT_UPDATE);
130}
131
132static ssize_t store_vis_mode(struct kobject *kobj, struct attribute *attr,
133 char *buff, size_t count)
134{
135 struct device *dev = to_dev(kobj->parent);
136 struct net_device *net_dev = to_net_dev(dev);
137 struct bat_priv *bat_priv = netdev_priv(net_dev);
138 unsigned long val;
139 int ret, vis_mode_tmp = -1;
140
141 ret = strict_strtoul(buff, 10, &val);
142
143 if (((count == 2) && (!ret) && (val == VIS_TYPE_CLIENT_UPDATE)) ||
144 (strncmp(buff, "client", 6) == 0))
145 vis_mode_tmp = VIS_TYPE_CLIENT_UPDATE;
146
147 if (((count == 2) && (!ret) && (val == VIS_TYPE_SERVER_SYNC)) ||
148 (strncmp(buff, "server", 6) == 0))
149 vis_mode_tmp = VIS_TYPE_SERVER_SYNC;
150
151 if (vis_mode_tmp < 0) {
152 if (buff[count - 1] == '\n')
153 buff[count - 1] = '\0';
154
155 printk(KERN_INFO "batman-adv:Invalid parameter for 'vis mode' setting on mesh %s received: %s\n",
156 net_dev->name, buff);
157 return -EINVAL;
158 }
159
160 if (atomic_read(&bat_priv->vis_mode) == vis_mode_tmp)
161 return count;
162
163 printk(KERN_INFO "batman-adv:Changing vis mode from: %s to: %s on mesh: %s\n",
164 atomic_read(&bat_priv->vis_mode) == VIS_TYPE_CLIENT_UPDATE ?
165 "client" : "server", vis_mode_tmp == VIS_TYPE_CLIENT_UPDATE ?
166 "client" : "server", net_dev->name);
167
168 atomic_set(&bat_priv->vis_mode, (unsigned)vis_mode_tmp);
169 return count;
170}
171
172static ssize_t show_orig_interval(struct kobject *kobj, struct attribute *attr,
173 char *buff)
174{
175 struct device *dev = to_dev(kobj->parent);
176 struct bat_priv *bat_priv = netdev_priv(to_net_dev(dev));
177
178 return sprintf(buff, "status: %i\n",
179 atomic_read(&bat_priv->orig_interval));
180}
181
182static ssize_t store_orig_interval(struct kobject *kobj, struct attribute *attr,
183 char *buff, size_t count)
184{
185 struct device *dev = to_dev(kobj->parent);
186 struct net_device *net_dev = to_net_dev(dev);
187 struct bat_priv *bat_priv = netdev_priv(net_dev);
188 unsigned long orig_interval_tmp;
189 int ret;
190
191 ret = strict_strtoul(buff, 10, &orig_interval_tmp);
192 if (ret) {
193 printk(KERN_INFO "batman-adv:Invalid parameter for 'orig_interval' setting on mesh %s received: %s\n",
194 net_dev->name, buff);
195 return -EINVAL;
196 }
197
198 if (orig_interval_tmp <= JITTER * 2) {
199 printk(KERN_INFO "batman-adv:New originator interval too small: %li (min: %i)\n",
200 orig_interval_tmp, JITTER * 2);
201 return -EINVAL;
202 }
203
204 if (atomic_read(&bat_priv->orig_interval) == orig_interval_tmp)
205 return count;
206
207 printk(KERN_INFO "batman-adv:Changing originator interval from: %i to: %li on mesh: %s\n",
208 atomic_read(&bat_priv->orig_interval),
209 orig_interval_tmp, net_dev->name);
210
211 atomic_set(&bat_priv->orig_interval, orig_interval_tmp);
212 return count;
213}
214
215static BAT_ATTR(aggregate_ogm, S_IRUGO | S_IWUSR,
216 show_aggr_ogm, store_aggr_ogm);
217static BAT_ATTR(vis_mode, S_IRUGO | S_IWUSR, show_vis_mode, store_vis_mode);
218static BAT_ATTR(orig_interval, S_IRUGO | S_IWUSR,
219 show_orig_interval, store_orig_interval);
220
221static struct bat_attribute *mesh_attrs[] = {
222 &bat_attr_aggregate_ogm,
223 &bat_attr_vis_mode,
224 &bat_attr_orig_interval,
225 NULL,
226};
227
228static ssize_t transtable_local_read(struct kobject *kobj,
229 struct bin_attribute *bin_attr,
230 char *buff, loff_t off, size_t count)
231{
232 struct device *dev = to_dev(kobj->parent);
233 struct net_device *net_dev = to_net_dev(dev);
234
235 return hna_local_fill_buffer_text(net_dev, buff, count, off);
236}
237
238static ssize_t transtable_global_read(struct kobject *kobj,
239 struct bin_attribute *bin_attr,
240 char *buff, loff_t off, size_t count)
241{
242 struct device *dev = to_dev(kobj->parent);
243 struct net_device *net_dev = to_net_dev(dev);
244
245 return hna_global_fill_buffer_text(net_dev, buff, count, off);
246}
247
248static ssize_t originators_read(struct kobject *kobj,
249 struct bin_attribute *bin_attr,
250 char *buff, loff_t off, size_t count)
251{
252 struct device *dev = to_dev(kobj->parent);
253 struct net_device *net_dev = to_net_dev(dev);
254
255 return orig_fill_buffer_text(net_dev, buff, count, off);
256}
257
258static ssize_t vis_data_read(struct kobject *kobj,
259 struct bin_attribute *bin_attr,
260 char *buff, loff_t off, size_t count)
261{
262 struct device *dev = to_dev(kobj->parent);
263 struct net_device *net_dev = to_net_dev(dev);
264
265 return vis_fill_buffer_text(net_dev, buff, count, off);
266}
267
268static BAT_BIN_ATTR(transtable_local, S_IRUGO, transtable_local_read, NULL);
269static BAT_BIN_ATTR(transtable_global, S_IRUGO, transtable_global_read, NULL);
270static BAT_BIN_ATTR(originators, S_IRUGO, originators_read, NULL);
271static BAT_BIN_ATTR(vis_data, S_IRUGO, vis_data_read, NULL);
272
273static struct bin_attribute *mesh_bin_attrs[] = {
274 &bat_attr_transtable_local,
275 &bat_attr_transtable_global,
276 &bat_attr_originators,
277 &bat_attr_vis_data,
278 NULL,
279};
280
281int sysfs_add_meshif(struct net_device *dev)
282{
283 struct kobject *batif_kobject = &dev->dev.kobj;
284 struct bat_priv *bat_priv = netdev_priv(dev);
285 struct bat_attribute **bat_attr;
286 struct bin_attribute **bin_attr;
287 int err;
288
289 /* FIXME: should be done in the general mesh setup
290 routine as soon as we have it */
291 atomic_set(&bat_priv->aggregation_enabled, 1);
292 atomic_set(&bat_priv->vis_mode, VIS_TYPE_CLIENT_UPDATE);
293 atomic_set(&bat_priv->orig_interval, 1000);
294 bat_priv->primary_if = NULL;
295 bat_priv->num_ifaces = 0;
296
297 bat_priv->mesh_obj = kobject_create_and_add(SYSFS_IF_MESH_SUBDIR,
298 batif_kobject);
299 if (!bat_priv->mesh_obj) {
300 printk(KERN_ERR "batman-adv:Can't add sysfs directory: %s/%s\n",
301 dev->name, SYSFS_IF_MESH_SUBDIR);
302 goto out;
303 }
304
305 for (bat_attr = mesh_attrs; *bat_attr; ++bat_attr) {
306 err = sysfs_create_file(bat_priv->mesh_obj,
307 &((*bat_attr)->attr));
308 if (err) {
309 printk(KERN_ERR "batman-adv:Can't add sysfs file: %s/%s/%s\n",
310 dev->name, SYSFS_IF_MESH_SUBDIR,
311 ((*bat_attr)->attr).name);
312 goto rem_attr;
313 }
314 }
315
316 for (bin_attr = mesh_bin_attrs; *bin_attr; ++bin_attr) {
317 err = sysfs_create_bin_file(bat_priv->mesh_obj, (*bin_attr));
318 if (err) {
319 printk(KERN_ERR "batman-adv:Can't add sysfs file: %s/%s/%s\n",
320 dev->name, SYSFS_IF_MESH_SUBDIR,
321 ((*bin_attr)->attr).name);
322 goto rem_bin_attr;
323 }
324 }
325
326 return 0;
327
328rem_bin_attr:
329 for (bin_attr = mesh_bin_attrs; *bin_attr; ++bin_attr)
330 sysfs_remove_bin_file(bat_priv->mesh_obj, (*bin_attr));
331rem_attr:
332 for (bat_attr = mesh_attrs; *bat_attr; ++bat_attr)
333 sysfs_remove_file(bat_priv->mesh_obj, &((*bat_attr)->attr));
334
335 kobject_put(bat_priv->mesh_obj);
336 bat_priv->mesh_obj = NULL;
337out:
338 return -ENOMEM;
339}
340
341void sysfs_del_meshif(struct net_device *dev)
342{
343 struct bat_priv *bat_priv = netdev_priv(dev);
344 struct bat_attribute **bat_attr;
345 struct bin_attribute **bin_attr;
346
347 for (bin_attr = mesh_bin_attrs; *bin_attr; ++bin_attr)
348 sysfs_remove_bin_file(bat_priv->mesh_obj, (*bin_attr));
349
350 for (bat_attr = mesh_attrs; *bat_attr; ++bat_attr)
351 sysfs_remove_file(bat_priv->mesh_obj, &((*bat_attr)->attr));
352
353 kobject_put(bat_priv->mesh_obj);
354 bat_priv->mesh_obj = NULL;
355}
356
357static ssize_t show_mesh_iface(struct kobject *kobj, struct attribute *attr,
358 char *buff)
359{
360 struct device *dev = to_dev(kobj->parent);
361 struct net_device *net_dev = to_net_dev(dev);
362 struct batman_if *batman_if = get_batman_if_by_netdev(net_dev);
363
364 if (!batman_if)
365 return 0;
366
367 return sprintf(buff, "status: %s\ncommands: none, bat0\n",
368 batman_if->if_status == IF_NOT_IN_USE ?
369 "none" : "bat0");
370}
371
372static ssize_t store_mesh_iface(struct kobject *kobj, struct attribute *attr,
373 char *buff, size_t count)
374{
375 struct device *dev = to_dev(kobj->parent);
376 struct net_device *net_dev = to_net_dev(dev);
377 struct batman_if *batman_if = get_batman_if_by_netdev(net_dev);
378 int status_tmp = -1;
379
380 if (!batman_if)
381 return count;
382
383 if (strncmp(buff, "none", 4) == 0)
384 status_tmp = IF_NOT_IN_USE;
385
386 if (strncmp(buff, "bat0", 4) == 0)
387 status_tmp = IF_I_WANT_YOU;
388
389 if (status_tmp < 0) {
390 if (buff[count - 1] == '\n')
391 buff[count - 1] = '\0';
392
393 printk(KERN_ERR "batman-adv:Invalid parameter for 'mesh_iface' setting received: %s\n",
394 buff);
395 return -EINVAL;
396 }
397
398 if ((batman_if->if_status == status_tmp) ||
399 ((status_tmp == IF_I_WANT_YOU) &&
400 (batman_if->if_status != IF_NOT_IN_USE)))
401 return count;
402
403 if (status_tmp == IF_I_WANT_YOU)
404 status_tmp = hardif_enable_interface(batman_if);
405 else
406 hardif_disable_interface(batman_if);
407
408 return (status_tmp < 0 ? status_tmp : count);
409}
410
411static ssize_t show_iface_status(struct kobject *kobj, struct attribute *attr,
412 char *buff)
413{
414 struct device *dev = to_dev(kobj->parent);
415 struct net_device *net_dev = to_net_dev(dev);
416 struct batman_if *batman_if = get_batman_if_by_netdev(net_dev);
417
418 if (!batman_if)
419 return 0;
420
421 switch (batman_if->if_status) {
422 case IF_TO_BE_REMOVED:
423 return sprintf(buff, "disabling\n");
424 case IF_INACTIVE:
425 return sprintf(buff, "inactive\n");
426 case IF_ACTIVE:
427 return sprintf(buff, "active\n");
428 case IF_TO_BE_ACTIVATED:
429 return sprintf(buff, "enabling\n");
430 case IF_NOT_IN_USE:
431 default:
432 return sprintf(buff, "not in use\n");
433 }
434}
435
436static HARDIF_ATTR(mesh_iface, S_IRUGO | S_IWUSR,
437 show_mesh_iface, store_mesh_iface);
438static HARDIF_ATTR(iface_status, S_IRUGO, show_iface_status, NULL);
439
440static struct hardif_attribute *batman_attrs[] = {
441 &hardif_attr_mesh_iface,
442 &hardif_attr_iface_status,
443 NULL,
444};
445
446int sysfs_add_hardif(struct kobject **hardif_obj, struct net_device *dev)
447{
448 struct kobject *hardif_kobject = &dev->dev.kobj;
449 struct hardif_attribute **hardif_attr;
450 int err;
451
452 *hardif_obj = kobject_create_and_add(SYSFS_IF_BAT_SUBDIR,
453 hardif_kobject);
454
455 if (!*hardif_obj) {
456 printk(KERN_ERR "batman-adv:Can't add sysfs directory: %s/%s\n",
457 dev->name, SYSFS_IF_BAT_SUBDIR);
458 goto out;
459 }
460
461 for (hardif_attr = batman_attrs; *hardif_attr; ++hardif_attr) {
462 err = sysfs_create_file(*hardif_obj, &((*hardif_attr)->attr));
463 if (err) {
464 printk(KERN_ERR "batman-adv:Can't add sysfs file: %s/%s/%s\n",
465 dev->name, SYSFS_IF_BAT_SUBDIR,
466 ((*hardif_attr)->attr).name);
467 goto rem_attr;
468 }
469 }
470
471 return 0;
472
473rem_attr:
474 for (hardif_attr = batman_attrs; *hardif_attr; ++hardif_attr)
475 sysfs_remove_file(*hardif_obj, &((*hardif_attr)->attr));
476out:
477 return -ENOMEM;
478}
479
480void sysfs_del_hardif(struct kobject **hardif_obj)
481{
482 kobject_put(*hardif_obj);
483 *hardif_obj = NULL;
484}
diff --git a/drivers/staging/batman-adv/bat_sysfs.h b/drivers/staging/batman-adv/bat_sysfs.h
new file mode 100644
index 000000000000..e1893411871e
--- /dev/null
+++ b/drivers/staging/batman-adv/bat_sysfs.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (C) 2010 B.A.T.M.A.N. contributors:
3 *
4 * Marek Lindner
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of version 2 of the GNU General Public
8 * License as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA
19 *
20 */
21
22
23#define SYSFS_IF_MESH_SUBDIR "mesh"
24#define SYSFS_IF_BAT_SUBDIR "batman_adv"
25
26int sysfs_add_meshif(struct net_device *dev);
27void sysfs_del_meshif(struct net_device *dev);
28int sysfs_add_hardif(struct kobject **hardif_obj, struct net_device *dev);
29void sysfs_del_hardif(struct kobject **hardif_obj);
diff --git a/drivers/staging/batman-adv/bitarray.c b/drivers/staging/batman-adv/bitarray.c
index 212eef93afe4..2fef6e35f8c3 100644
--- a/drivers/staging/batman-adv/bitarray.c
+++ b/drivers/staging/batman-adv/bitarray.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2006-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Simon Wunderlich, Marek Lindner 4 * Simon Wunderlich, Marek Lindner
5 * 5 *
@@ -68,7 +68,7 @@ void bit_shift(TYPE_OF_WORD *seq_bits, int32_t n)
68 int32_t word_offset, word_num; 68 int32_t word_offset, word_num;
69 int32_t i; 69 int32_t i;
70 70
71 if (n <= 0) 71 if (n <= 0 || n >= TQ_LOCAL_WINDOW_SIZE)
72 return; 72 return;
73 73
74 word_offset = n % WORD_BIT_SIZE;/* shift how much inside each word */ 74 word_offset = n % WORD_BIT_SIZE;/* shift how much inside each word */
@@ -111,48 +111,76 @@ void bit_shift(TYPE_OF_WORD *seq_bits, int32_t n)
111 seq_bits[i] = 0; 111 seq_bits[i] = 0;
112} 112}
113 113
114static void bit_reset_window(TYPE_OF_WORD *seq_bits)
115{
116 int i;
117 for (i = 0; i < NUM_WORDS; i++)
118 seq_bits[i] = 0;
119}
120
114 121
115/* receive and process one packet, returns 1 if received seq_num is considered 122/* receive and process one packet within the sequence number window.
116 * new, 0 if old */ 123 *
124 * returns:
125 * 1 if the window was moved (either new or very old)
126 * 0 if the window was not moved/shifted.
127 */
117char bit_get_packet(TYPE_OF_WORD *seq_bits, int16_t seq_num_diff, 128char bit_get_packet(TYPE_OF_WORD *seq_bits, int16_t seq_num_diff,
118 int8_t set_mark) 129 int8_t set_mark)
119{ 130{
120 int i; 131 /* sequence number is slightly older. We already got a sequence number
132 * higher than this one, so we just mark it. */
121 133
122 /* we already got a sequence number higher than this one, so we just 134 if ((seq_num_diff <= 0) && (seq_num_diff > -TQ_LOCAL_WINDOW_SIZE)) {
123 * mark it. this should wrap around the integer just fine */
124 if ((seq_num_diff < 0) && (seq_num_diff >= -TQ_LOCAL_WINDOW_SIZE)) {
125 if (set_mark) 135 if (set_mark)
126 bit_mark(seq_bits, -seq_num_diff); 136 bit_mark(seq_bits, -seq_num_diff);
127 return 0; 137 return 0;
128 } 138 }
129 139
130 /* it seems we missed a lot of packets or the other host restarted */ 140 /* sequence number is slightly newer, so we shift the window and
131 if ((seq_num_diff > TQ_LOCAL_WINDOW_SIZE) || 141 * set the mark if required */
132 (seq_num_diff < -TQ_LOCAL_WINDOW_SIZE)) {
133 142
134 if (seq_num_diff > TQ_LOCAL_WINDOW_SIZE) 143 if ((seq_num_diff > 0) && (seq_num_diff < TQ_LOCAL_WINDOW_SIZE)) {
135 bat_dbg(DBG_BATMAN, 144 bit_shift(seq_bits, seq_num_diff);
136 "We missed a lot of packets (%i) !\n",
137 seq_num_diff-1);
138 145
139 if (-seq_num_diff > TQ_LOCAL_WINDOW_SIZE) 146 if (set_mark)
140 bat_dbg(DBG_BATMAN, 147 bit_mark(seq_bits, 0);
141 "Other host probably restarted !\n"); 148 return 1;
149 }
142 150
143 for (i = 0; i < NUM_WORDS; i++) 151 /* sequence number is much newer, probably missed a lot of packets */
144 seq_bits[i] = 0;
145 152
153 if ((seq_num_diff >= TQ_LOCAL_WINDOW_SIZE)
154 || (seq_num_diff < EXPECTED_SEQNO_RANGE)) {
155 bat_dbg(DBG_BATMAN,
156 "We missed a lot of packets (%i) !\n",
157 seq_num_diff - 1);
158 bit_reset_window(seq_bits);
146 if (set_mark) 159 if (set_mark)
147 seq_bits[0] = 1; /* we only have the latest packet */ 160 bit_mark(seq_bits, 0);
148 } else { 161 return 1;
149 bit_shift(seq_bits, seq_num_diff); 162 }
163
164 /* received a much older packet. The other host either restarted
165 * or the old packet got delayed somewhere in the network. The
166 * packet should be dropped without calling this function if the
167 * seqno window is protected. */
168
169 if ((seq_num_diff <= -TQ_LOCAL_WINDOW_SIZE)
170 || (seq_num_diff >= EXPECTED_SEQNO_RANGE)) {
150 171
172 bat_dbg(DBG_BATMAN,
173 "Other host probably restarted!\n");
174
175 bit_reset_window(seq_bits);
151 if (set_mark) 176 if (set_mark)
152 bit_mark(seq_bits, 0); 177 bit_mark(seq_bits, 0);
178
179 return 1;
153 } 180 }
154 181
155 return 1; 182 /* never reached */
183 return 0;
156} 184}
157 185
158/* count the hamming weight, how many good packets did we receive? just count 186/* count the hamming weight, how many good packets did we receive? just count
diff --git a/drivers/staging/batman-adv/bitarray.h b/drivers/staging/batman-adv/bitarray.h
index ec72dd784362..76ad24c9f3de 100644
--- a/drivers/staging/batman-adv/bitarray.h
+++ b/drivers/staging/batman-adv/bitarray.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2006-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Simon Wunderlich, Marek Lindner 4 * Simon Wunderlich, Marek Lindner
5 * 5 *
diff --git a/drivers/staging/batman-adv/device.c b/drivers/staging/batman-adv/device.c
index 2f61500186f2..ad82ec4a4856 100644
--- a/drivers/staging/batman-adv/device.c
+++ b/drivers/staging/batman-adv/device.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner 4 * Marek Lindner
5 * 5 *
@@ -44,10 +44,7 @@ static struct device_client *device_client_hash[256];
44 44
45void bat_device_init(void) 45void bat_device_init(void)
46{ 46{
47 int i; 47 memset(device_client_hash, 0, sizeof(device_client_hash));
48
49 for (i = 0; i < 256; i++)
50 device_client_hash[i] = NULL;
51} 48}
52 49
53int bat_device_setup(void) 50int bat_device_setup(void)
@@ -60,7 +57,8 @@ int bat_device_setup(void)
60 /* register our device - kernel assigns a free major number */ 57 /* register our device - kernel assigns a free major number */
61 tmp_major = register_chrdev(0, DRIVER_DEVICE, &fops); 58 tmp_major = register_chrdev(0, DRIVER_DEVICE, &fops);
62 if (tmp_major < 0) { 59 if (tmp_major < 0) {
63 printk(KERN_ERR "batman-adv:Registering the character device failed with %d\n", 60 printk(KERN_ERR "batman-adv:"
61 "Registering the character device failed with %d\n",
64 tmp_major); 62 tmp_major);
65 return 0; 63 return 0;
66 } 64 }
@@ -68,7 +66,8 @@ int bat_device_setup(void)
68 batman_class = class_create(THIS_MODULE, "batman-adv"); 66 batman_class = class_create(THIS_MODULE, "batman-adv");
69 67
70 if (IS_ERR(batman_class)) { 68 if (IS_ERR(batman_class)) {
71 printk(KERN_ERR "batman-adv:Could not register class 'batman-adv' \n"); 69 printk(KERN_ERR "batman-adv:"
70 "Could not register class 'batman-adv'\n");
72 return 0; 71 return 0;
73 } 72 }
74 73
@@ -103,15 +102,17 @@ int bat_device_open(struct inode *inode, struct file *file)
103 if (!device_client) 102 if (!device_client)
104 return -ENOMEM; 103 return -ENOMEM;
105 104
106 for (i = 0; i < 256; i++) { 105 for (i = 0; i < ARRAY_SIZE(device_client_hash); i++) {
107 if (!device_client_hash[i]) { 106 if (!device_client_hash[i]) {
108 device_client_hash[i] = device_client; 107 device_client_hash[i] = device_client;
109 break; 108 break;
110 } 109 }
111 } 110 }
112 111
113 if (device_client_hash[i] != device_client) { 112 if (i == ARRAY_SIZE(device_client_hash)) {
114 printk(KERN_ERR "batman-adv:Error - can't add another packet client: maximum number of clients reached \n"); 113 printk(KERN_ERR "batman-adv:"
114 "Error - can't add another packet client: "
115 "maximum number of clients reached\n");
115 kfree(device_client); 116 kfree(device_client);
116 return -EXFULL; 117 return -EXFULL;
117 } 118 }
@@ -212,7 +213,9 @@ ssize_t bat_device_write(struct file *file, const char __user *buff,
212 unsigned long flags; 213 unsigned long flags;
213 214
214 if (len < sizeof(struct icmp_packet)) { 215 if (len < sizeof(struct icmp_packet)) {
215 bat_dbg(DBG_BATMAN, "batman-adv:Error - can't send packet from char device: invalid packet size\n"); 216 bat_dbg(DBG_BATMAN, "batman-adv:"
217 "Error - can't send packet from char device: "
218 "invalid packet size\n");
216 return -EINVAL; 219 return -EINVAL;
217 } 220 }
218 221
@@ -223,12 +226,16 @@ ssize_t bat_device_write(struct file *file, const char __user *buff,
223 return -EFAULT; 226 return -EFAULT;
224 227
225 if (icmp_packet.packet_type != BAT_ICMP) { 228 if (icmp_packet.packet_type != BAT_ICMP) {
226 bat_dbg(DBG_BATMAN, "batman-adv:Error - can't send packet from char device: got bogus packet type (expected: BAT_ICMP)\n"); 229 bat_dbg(DBG_BATMAN, "batman-adv:"
230 "Error - can't send packet from char device: "
231 "got bogus packet type (expected: BAT_ICMP)\n");
227 return -EINVAL; 232 return -EINVAL;
228 } 233 }
229 234
230 if (icmp_packet.msg_type != ECHO_REQUEST) { 235 if (icmp_packet.msg_type != ECHO_REQUEST) {
231 bat_dbg(DBG_BATMAN, "batman-adv:Error - can't send packet from char device: got bogus message type (expected: ECHO_REQUEST)\n"); 236 bat_dbg(DBG_BATMAN, "batman-adv:"
237 "Error - can't send packet from char device: "
238 "got bogus message type (expected: ECHO_REQUEST)\n");
232 return -EINVAL; 239 return -EINVAL;
233 } 240 }
234 241
@@ -253,7 +260,7 @@ ssize_t bat_device_write(struct file *file, const char __user *buff,
253 if (!orig_node->router) 260 if (!orig_node->router)
254 goto unlock; 261 goto unlock;
255 262
256 batman_if = orig_node->batman_if; 263 batman_if = orig_node->router->if_incoming;
257 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); 264 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN);
258 265
259 spin_unlock_irqrestore(&orig_hash_lock, flags); 266 spin_unlock_irqrestore(&orig_hash_lock, flags);
@@ -261,7 +268,7 @@ ssize_t bat_device_write(struct file *file, const char __user *buff,
261 if (!batman_if) 268 if (!batman_if)
262 goto dst_unreach; 269 goto dst_unreach;
263 270
264 if (batman_if->if_active != IF_ACTIVE) 271 if (batman_if->if_status != IF_ACTIVE)
265 goto dst_unreach; 272 goto dst_unreach;
266 273
267 memcpy(icmp_packet.orig, 274 memcpy(icmp_packet.orig,
diff --git a/drivers/staging/batman-adv/device.h b/drivers/staging/batman-adv/device.h
index 46c0f4496527..eb14b371cea9 100644
--- a/drivers/staging/batman-adv/device.h
+++ b/drivers/staging/batman-adv/device.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner 4 * Marek Lindner
5 * 5 *
diff --git a/drivers/staging/batman-adv/hard-interface.c b/drivers/staging/batman-adv/hard-interface.c
index befd48839519..7a582e80de18 100644
--- a/drivers/staging/batman-adv/hard-interface.c
+++ b/drivers/staging/batman-adv/hard-interface.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -25,22 +25,21 @@
25#include "send.h" 25#include "send.h"
26#include "translation-table.h" 26#include "translation-table.h"
27#include "routing.h" 27#include "routing.h"
28#include "bat_sysfs.h"
29#include "originator.h"
28#include "hash.h" 30#include "hash.h"
29 31
30#define MIN(x, y) ((x) < (y) ? (x) : (y)) 32#include <linux/if_arp.h>
31
32static char avail_ifs;
33static char active_ifs;
34 33
35static void hardif_free_interface(struct rcu_head *rcu); 34#define MIN(x, y) ((x) < (y) ? (x) : (y))
36 35
37static struct batman_if *get_batman_if_by_name(char *name) 36struct batman_if *get_batman_if_by_netdev(struct net_device *net_dev)
38{ 37{
39 struct batman_if *batman_if; 38 struct batman_if *batman_if;
40 39
41 rcu_read_lock(); 40 rcu_read_lock();
42 list_for_each_entry_rcu(batman_if, &if_list, list) { 41 list_for_each_entry_rcu(batman_if, &if_list, list) {
43 if (strncmp(batman_if->dev, name, IFNAMSIZ) == 0) 42 if (batman_if->net_dev == net_dev)
44 goto out; 43 goto out;
45 } 44 }
46 45
@@ -51,23 +50,90 @@ out:
51 return batman_if; 50 return batman_if;
52} 51}
53 52
54int hardif_min_mtu(void) 53static int is_valid_iface(struct net_device *net_dev)
54{
55 if (net_dev->flags & IFF_LOOPBACK)
56 return 0;
57
58 if (net_dev->type != ARPHRD_ETHER)
59 return 0;
60
61 if (net_dev->addr_len != ETH_ALEN)
62 return 0;
63
64 /* no batman over batman */
65#ifdef HAVE_NET_DEVICE_OPS
66 if (net_dev->netdev_ops->ndo_start_xmit == interface_tx)
67 return 0;
68#else
69 if (net_dev->hard_start_xmit == interface_tx)
70 return 0;
71#endif
72
73 /* Device is being bridged */
74 /* if (net_dev->br_port != NULL)
75 return 0; */
76
77 return 1;
78}
79
80static struct batman_if *get_active_batman_if(void)
55{ 81{
56 struct batman_if *batman_if; 82 struct batman_if *batman_if;
57 /* allow big frames if all devices are capable to do so
58 * (have MTU > 1500 + BAT_HEADER_LEN) */
59 int min_mtu = ETH_DATA_LEN;
60 83
84 /* TODO: should check interfaces belonging to bat_priv */
61 rcu_read_lock(); 85 rcu_read_lock();
62 list_for_each_entry_rcu(batman_if, &if_list, list) { 86 list_for_each_entry_rcu(batman_if, &if_list, list) {
63 if ((batman_if->if_active == IF_ACTIVE) || 87 if (batman_if->if_status == IF_ACTIVE)
64 (batman_if->if_active == IF_TO_BE_ACTIVATED)) 88 goto out;
65 min_mtu = MIN(batman_if->net_dev->mtu - BAT_HEADER_LEN,
66 min_mtu);
67 } 89 }
90
91 batman_if = NULL;
92
93out:
68 rcu_read_unlock(); 94 rcu_read_unlock();
95 return batman_if;
96}
69 97
70 return min_mtu; 98static void set_primary_if(struct bat_priv *bat_priv,
99 struct batman_if *batman_if)
100{
101 struct batman_packet *batman_packet;
102
103 bat_priv->primary_if = batman_if;
104
105 if (!bat_priv->primary_if)
106 return;
107
108 set_main_if_addr(batman_if->net_dev->dev_addr);
109
110 batman_packet = (struct batman_packet *)(batman_if->packet_buff);
111 batman_packet->flags = 0;
112 batman_packet->ttl = TTL;
113
114 /***
115 * hacky trick to make sure that we send the HNA information via
116 * our new primary interface
117 */
118 atomic_set(&hna_local_changed, 1);
119}
120
121static bool hardif_is_iface_up(struct batman_if *batman_if)
122{
123 if (batman_if->net_dev->flags & IFF_UP)
124 return true;
125
126 return false;
127}
128
129static void update_mac_addresses(struct batman_if *batman_if)
130{
131 addr_to_string(batman_if->addr_str, batman_if->net_dev->dev_addr);
132
133 memcpy(((struct batman_packet *)(batman_if->packet_buff))->orig,
134 batman_if->net_dev->dev_addr, ETH_ALEN);
135 memcpy(((struct batman_packet *)(batman_if->packet_buff))->prev_sender,
136 batman_if->net_dev->dev_addr, ETH_ALEN);
71} 137}
72 138
73static void check_known_mac_addr(uint8_t *addr) 139static void check_known_mac_addr(uint8_t *addr)
@@ -76,18 +142,40 @@ static void check_known_mac_addr(uint8_t *addr)
76 142
77 rcu_read_lock(); 143 rcu_read_lock();
78 list_for_each_entry_rcu(batman_if, &if_list, list) { 144 list_for_each_entry_rcu(batman_if, &if_list, list) {
79 if ((batman_if->if_active != IF_ACTIVE) && 145 if ((batman_if->if_status != IF_ACTIVE) &&
80 (batman_if->if_active != IF_TO_BE_ACTIVATED)) 146 (batman_if->if_status != IF_TO_BE_ACTIVATED))
81 continue; 147 continue;
82 148
83 if (!compare_orig(batman_if->net_dev->dev_addr, addr)) 149 if (!compare_orig(batman_if->net_dev->dev_addr, addr))
84 continue; 150 continue;
85 151
86 printk(KERN_WARNING "batman-adv:The newly added mac address (%pM) already exists on: %s\n", 152 printk(KERN_WARNING "batman-adv:"
87 addr, batman_if->dev); 153 "The newly added mac address (%pM) already exists on: %s\n",
88 printk(KERN_WARNING "batman-adv:It is strongly recommended to keep mac addresses unique to avoid problems!\n"); 154 addr, batman_if->dev);
155 printk(KERN_WARNING "batman-adv:"
156 "It is strongly recommended to keep mac addresses unique"
157 "to avoid problems!\n");
158 }
159 rcu_read_unlock();
160}
161
162int hardif_min_mtu(void)
163{
164 struct batman_if *batman_if;
165 /* allow big frames if all devices are capable to do so
166 * (have MTU > 1500 + BAT_HEADER_LEN) */
167 int min_mtu = ETH_DATA_LEN;
168
169 rcu_read_lock();
170 list_for_each_entry_rcu(batman_if, &if_list, list) {
171 if ((batman_if->if_status == IF_ACTIVE) ||
172 (batman_if->if_status == IF_TO_BE_ACTIVATED))
173 min_mtu = MIN(batman_if->net_dev->mtu - BAT_HEADER_LEN,
174 min_mtu);
89 } 175 }
90 rcu_read_unlock(); 176 rcu_read_unlock();
177
178 return min_mtu;
91} 179}
92 180
93/* adjusts the MTU if a new interface with a smaller MTU appeared. */ 181/* adjusts the MTU if a new interface with a smaller MTU appeared. */
@@ -100,322 +188,250 @@ void update_min_mtu(void)
100 soft_device->mtu = min_mtu; 188 soft_device->mtu = min_mtu;
101} 189}
102 190
103/* checks if the interface is up. (returns 1 if it is) */ 191static void hardif_activate_interface(struct bat_priv *bat_priv,
104static int hardif_is_interface_up(char *dev) 192 struct batman_if *batman_if)
105{ 193{
106 struct net_device *net_dev; 194 if (batman_if->if_status != IF_INACTIVE)
195 return;
196
197 dev_hold(batman_if->net_dev);
198
199 update_mac_addresses(batman_if);
200 batman_if->if_status = IF_TO_BE_ACTIVATED;
107 201
108 /** 202 /**
109 * if we already have an interface in our interface list and 203 * the first active interface becomes our primary interface or
110 * the current interface is not the primary interface and 204 * the next active interface after the old primay interface was removed
111 * the primary interface is not up and
112 * the primary interface has never been up - don't activate any
113 * secondary interface !
114 */ 205 */
206 if (!bat_priv->primary_if)
207 set_primary_if(bat_priv, batman_if);
115 208
116 rcu_read_lock(); 209 printk(KERN_INFO "batman-adv:Interface activated: %s\n",
117 if ((!list_empty(&if_list)) && 210 batman_if->dev);
118 strncmp(((struct batman_if *)if_list.next)->dev, dev, IFNAMSIZ) &&
119 !(((struct batman_if *)if_list.next)->if_active == IF_ACTIVE) &&
120 !(((struct batman_if *)if_list.next)->if_active == IF_TO_BE_ACTIVATED) &&
121 (!main_if_was_up())) {
122 rcu_read_unlock();
123 goto end;
124 }
125 rcu_read_unlock();
126
127#ifdef __NET_NET_NAMESPACE_H
128 net_dev = dev_get_by_name(&init_net, dev);
129#else
130 net_dev = dev_get_by_name(dev);
131#endif
132 if (!net_dev)
133 goto end;
134 211
135 if (!(net_dev->flags & IFF_UP)) 212 if (atomic_read(&module_state) == MODULE_INACTIVE)
136 goto failure; 213 activate_module();
137 214
138 dev_put(net_dev); 215 update_min_mtu();
139 return 1; 216 return;
140
141failure:
142 dev_put(net_dev);
143end:
144 return 0;
145} 217}
146 218
147/* deactivates the interface. */ 219static void hardif_deactivate_interface(struct batman_if *batman_if)
148void hardif_deactivate_interface(struct batman_if *batman_if)
149{ 220{
150 if (batman_if->if_active != IF_ACTIVE) 221 if ((batman_if->if_status != IF_ACTIVE) &&
222 (batman_if->if_status != IF_TO_BE_ACTIVATED))
151 return; 223 return;
152 224
153 /** 225 dev_put(batman_if->net_dev);
154 * batman_if->net_dev has been acquired by dev_get_by_name() in
155 * proc_interfaces_write() and has to be unreferenced.
156 */
157
158 if (batman_if->net_dev)
159 dev_put(batman_if->net_dev);
160 226
161 batman_if->if_active = IF_INACTIVE; 227 batman_if->if_status = IF_INACTIVE;
162 active_ifs--;
163 228
164 printk(KERN_INFO "batman-adv:Interface deactivated: %s\n", 229 printk(KERN_INFO "batman-adv:Interface deactivated: %s\n",
165 batman_if->dev); 230 batman_if->dev);
231
232 update_min_mtu();
166} 233}
167 234
168/* (re)activate given interface. */ 235int hardif_enable_interface(struct batman_if *batman_if)
169static void hardif_activate_interface(struct batman_if *batman_if)
170{ 236{
171 if (batman_if->if_active != IF_INACTIVE) 237 /* FIXME: each batman_if will be attached to a softif */
172 return; 238 struct bat_priv *bat_priv = netdev_priv(soft_device);
173 239 struct batman_packet *batman_packet;
174#ifdef __NET_NET_NAMESPACE_H
175 batman_if->net_dev = dev_get_by_name(&init_net, batman_if->dev);
176#else
177 batman_if->net_dev = dev_get_by_name(batman_if->dev);
178#endif
179 if (!batman_if->net_dev)
180 goto dev_err;
181 240
182 check_known_mac_addr(batman_if->net_dev->dev_addr); 241 if (batman_if->if_status != IF_NOT_IN_USE)
242 goto out;
183 243
184 addr_to_string(batman_if->addr_str, batman_if->net_dev->dev_addr); 244 batman_if->packet_len = BAT_PACKET_LEN;
245 batman_if->packet_buff = kmalloc(batman_if->packet_len, GFP_ATOMIC);
185 246
186 memcpy(((struct batman_packet *)(batman_if->packet_buff))->orig, 247 if (!batman_if->packet_buff) {
187 batman_if->net_dev->dev_addr, ETH_ALEN); 248 printk(KERN_ERR "batman-adv:"
188 memcpy(((struct batman_packet *)(batman_if->packet_buff))->prev_sender, 249 "Can't add interface packet (%s): out of memory\n",
189 batman_if->net_dev->dev_addr, ETH_ALEN); 250 batman_if->dev);
251 goto err;
252 }
190 253
191 batman_if->if_active = IF_TO_BE_ACTIVATED; 254 batman_packet = (struct batman_packet *)(batman_if->packet_buff);
192 active_ifs++; 255 batman_packet->packet_type = BAT_PACKET;
256 batman_packet->version = COMPAT_VERSION;
257 batman_packet->flags = 0;
258 batman_packet->ttl = 2;
259 batman_packet->tq = TQ_MAX_VALUE;
260 batman_packet->num_hna = 0;
193 261
194 /* save the mac address if it is our primary interface */ 262 batman_if->if_num = bat_priv->num_ifaces;
195 if (batman_if->if_num == 0) 263 bat_priv->num_ifaces++;
196 set_main_if_addr(batman_if->net_dev->dev_addr); 264 batman_if->if_status = IF_INACTIVE;
265 orig_hash_add_if(batman_if, bat_priv->num_ifaces);
197 266
198 printk(KERN_INFO "batman-adv:Interface activated: %s\n", 267 atomic_set(&batman_if->seqno, 1);
199 batman_if->dev); 268 printk(KERN_INFO "batman-adv:Adding interface: %s\n", batman_if->dev);
200 269
201 return; 270 if (hardif_is_iface_up(batman_if))
271 hardif_activate_interface(bat_priv, batman_if);
272 else
273 printk(KERN_ERR "batman-adv:"
274 "Not using interface %s "
275 "(retrying later): interface not active\n",
276 batman_if->dev);
202 277
203dev_err: 278 /* begin scheduling originator messages on that interface */
204 batman_if->net_dev = NULL; 279 schedule_own_packet(batman_if);
205}
206 280
207static void hardif_free_interface(struct rcu_head *rcu) 281out:
208{ 282 return 0;
209 struct batman_if *batman_if = container_of(rcu, struct batman_if, rcu);
210 283
211 kfree(batman_if->packet_buff); 284err:
212 kfree(batman_if->dev); 285 return -ENOMEM;
213 kfree(batman_if);
214} 286}
215 287
216/** 288void hardif_disable_interface(struct batman_if *batman_if)
217 * called by
218 * - echo '' > /proc/.../interfaces
219 * - modprobe -r batman-adv-core
220 */
221/* removes and frees all interfaces */
222void hardif_remove_interfaces(void)
223{ 289{
224 struct batman_if *batman_if = NULL; 290 /* FIXME: each batman_if will be attached to a softif */
225 291 struct bat_priv *bat_priv = netdev_priv(soft_device);
226 avail_ifs = 0;
227
228 /* no lock needed - we don't delete somewhere else */
229 list_for_each_entry(batman_if, &if_list, list) {
230 292
231 list_del_rcu(&batman_if->list); 293 if (batman_if->if_status == IF_ACTIVE)
232 294 hardif_deactivate_interface(batman_if);
233 /* first deactivate interface */
234 if (batman_if->if_active != IF_INACTIVE)
235 hardif_deactivate_interface(batman_if);
236
237 call_rcu(&batman_if->rcu, hardif_free_interface);
238 }
239}
240
241static int resize_orig(struct orig_node *orig_node, int if_num)
242{
243 void *data_ptr;
244 295
245 data_ptr = kmalloc((if_num + 1) * sizeof(TYPE_OF_WORD) * NUM_WORDS, 296 if (batman_if->if_status != IF_INACTIVE)
246 GFP_ATOMIC); 297 return;
247 if (!data_ptr) {
248 printk(KERN_ERR "batman-adv:Can't resize orig: out of memory\n");
249 return -1;
250 }
251 298
252 memcpy(data_ptr, orig_node->bcast_own, 299 printk(KERN_INFO "batman-adv:Removing interface: %s\n", batman_if->dev);
253 if_num * sizeof(TYPE_OF_WORD) * NUM_WORDS); 300 bat_priv->num_ifaces--;
254 kfree(orig_node->bcast_own); 301 orig_hash_del_if(batman_if, bat_priv->num_ifaces);
255 orig_node->bcast_own = data_ptr;
256 302
257 data_ptr = kmalloc((if_num + 1) * sizeof(uint8_t), GFP_ATOMIC); 303 if (batman_if == bat_priv->primary_if)
258 if (!data_ptr) { 304 set_primary_if(bat_priv, get_active_batman_if());
259 printk(KERN_ERR "batman-adv:Can't resize orig: out of memory\n");
260 return -1;
261 }
262 305
263 memcpy(data_ptr, orig_node->bcast_own_sum, if_num * sizeof(uint8_t)); 306 kfree(batman_if->packet_buff);
264 kfree(orig_node->bcast_own_sum); 307 batman_if->packet_buff = NULL;
265 orig_node->bcast_own_sum = data_ptr; 308 batman_if->if_status = IF_NOT_IN_USE;
266 309
267 return 0; 310 if ((atomic_read(&module_state) == MODULE_ACTIVE) &&
311 (bat_priv->num_ifaces == 0))
312 deactivate_module();
268} 313}
269 314
270 315static struct batman_if *hardif_add_interface(struct net_device *net_dev)
271/* adds an interface the interface list and activate it, if possible */
272int hardif_add_interface(char *dev, int if_num)
273{ 316{
274 struct batman_if *batman_if; 317 struct batman_if *batman_if;
275 struct batman_packet *batman_packet; 318 int ret;
276 struct orig_node *orig_node;
277 unsigned long flags;
278 HASHIT(hashit);
279 319
280 batman_if = kmalloc(sizeof(struct batman_if), GFP_KERNEL); 320 ret = is_valid_iface(net_dev);
321 if (ret != 1)
322 goto out;
281 323
324 batman_if = kmalloc(sizeof(struct batman_if), GFP_ATOMIC);
282 if (!batman_if) { 325 if (!batman_if) {
283 printk(KERN_ERR "batman-adv:Can't add interface (%s): out of memory\n", dev); 326 printk(KERN_ERR "batman-adv:"
284 return -1; 327 "Can't add interface (%s): out of memory\n",
285 } 328 net_dev->name);
286
287 batman_if->net_dev = NULL;
288
289 if ((if_num == 0) && (num_hna > 0))
290 batman_if->packet_len = BAT_PACKET_LEN + num_hna * ETH_ALEN;
291 else
292 batman_if->packet_len = BAT_PACKET_LEN;
293
294 batman_if->packet_buff = kmalloc(batman_if->packet_len, GFP_KERNEL);
295
296 if (!batman_if->packet_buff) {
297 printk(KERN_ERR "batman-adv:Can't add interface packet (%s): out of memory\n", dev);
298 goto out; 329 goto out;
299 } 330 }
300 331
301 batman_if->if_num = if_num; 332 batman_if->dev = kstrdup(net_dev->name, GFP_ATOMIC);
302 batman_if->dev = dev; 333 if (!batman_if->dev)
303 batman_if->if_active = IF_INACTIVE; 334 goto free_if;
304 INIT_RCU_HEAD(&batman_if->rcu);
305 335
306 printk(KERN_INFO "batman-adv:Adding interface: %s\n", dev); 336 ret = sysfs_add_hardif(&batman_if->hardif_obj, net_dev);
307 avail_ifs++; 337 if (ret)
338 goto free_dev;
308 339
340 batman_if->if_num = -1;
341 batman_if->net_dev = net_dev;
342 batman_if->if_status = IF_NOT_IN_USE;
309 INIT_LIST_HEAD(&batman_if->list); 343 INIT_LIST_HEAD(&batman_if->list);
310 344
311 batman_packet = (struct batman_packet *)(batman_if->packet_buff); 345 check_known_mac_addr(batman_if->net_dev->dev_addr);
312 batman_packet->packet_type = BAT_PACKET; 346 list_add_tail_rcu(&batman_if->list, &if_list);
313 batman_packet->version = COMPAT_VERSION; 347 return batman_if;
314 batman_packet->flags = 0x00;
315 batman_packet->ttl = (batman_if->if_num > 0 ? 2 : TTL);
316 batman_packet->flags = 0;
317 batman_packet->tq = TQ_MAX_VALUE;
318 batman_packet->num_hna = 0;
319
320 if (batman_if->packet_len != BAT_PACKET_LEN) {
321 unsigned char *hna_buff;
322 int hna_len;
323
324 hna_buff = batman_if->packet_buff + BAT_PACKET_LEN;
325 hna_len = batman_if->packet_len - BAT_PACKET_LEN;
326 batman_packet->num_hna = hna_local_fill_buffer(hna_buff,
327 hna_len);
328 }
329
330 atomic_set(&batman_if->seqno, 1);
331 348
332 /* resize all orig nodes because orig_node->bcast_own(_sum) depend on 349free_dev:
333 * if_num */ 350 kfree(batman_if->dev);
334 spin_lock_irqsave(&orig_hash_lock, flags); 351free_if:
352 kfree(batman_if);
353out:
354 return NULL;
355}
335 356
336 while (hash_iterate(orig_hash, &hashit)) { 357static void hardif_free_interface(struct rcu_head *rcu)
337 orig_node = hashit.bucket->data; 358{
338 if (resize_orig(orig_node, if_num) == -1) { 359 struct batman_if *batman_if = container_of(rcu, struct batman_if, rcu);
339 spin_unlock_irqrestore(&orig_hash_lock, flags);
340 goto out;
341 }
342 }
343 360
344 spin_unlock_irqrestore(&orig_hash_lock, flags); 361 /* delete all references to this batman_if */
362 purge_orig(NULL);
363 purge_outstanding_packets(batman_if);
345 364
346 if (!hardif_is_interface_up(batman_if->dev)) 365 kfree(batman_if->dev);
347 printk(KERN_ERR "batman-adv:Not using interface %s (retrying later): interface not active\n", batman_if->dev); 366 kfree(batman_if);
348 else 367}
349 hardif_activate_interface(batman_if);
350 368
351 list_add_tail_rcu(&batman_if->list, &if_list); 369static void hardif_remove_interface(struct batman_if *batman_if)
370{
371 /* first deactivate interface */
372 if (batman_if->if_status != IF_NOT_IN_USE)
373 hardif_disable_interface(batman_if);
352 374
353 /* begin sending originator messages on that interface */ 375 if (batman_if->if_status != IF_NOT_IN_USE)
354 schedule_own_packet(batman_if); 376 return;
355 return 1;
356 377
357out: 378 batman_if->if_status = IF_TO_BE_REMOVED;
358 kfree(batman_if->packet_buff); 379 list_del_rcu(&batman_if->list);
359 kfree(batman_if); 380 sysfs_del_hardif(&batman_if->hardif_obj);
360 kfree(dev); 381 call_rcu(&batman_if->rcu, hardif_free_interface);
361 return -1;
362} 382}
363 383
364char hardif_get_active_if_num(void) 384void hardif_remove_interfaces(void)
365{ 385{
366 return active_ifs; 386 struct batman_if *batman_if, *batman_if_tmp;
387
388 list_for_each_entry_safe(batman_if, batman_if_tmp, &if_list, list)
389 hardif_remove_interface(batman_if);
367} 390}
368 391
369static int hard_if_event(struct notifier_block *this, 392static int hard_if_event(struct notifier_block *this,
370 unsigned long event, void *ptr) 393 unsigned long event, void *ptr)
371{ 394{
372 struct net_device *dev = (struct net_device *)ptr; 395 struct net_device *net_dev = (struct net_device *)ptr;
373 struct batman_if *batman_if = get_batman_if_by_name(dev->name); 396 struct batman_if *batman_if = get_batman_if_by_netdev(net_dev);
397 /* FIXME: each batman_if will be attached to a softif */
398 struct bat_priv *bat_priv = netdev_priv(soft_device);
399
400 if (!batman_if)
401 batman_if = hardif_add_interface(net_dev);
374 402
375 if (!batman_if) 403 if (!batman_if)
376 goto out; 404 goto out;
377 405
378 switch (event) { 406 switch (event) {
407 case NETDEV_REGISTER:
408 break;
409 case NETDEV_UP:
410 hardif_activate_interface(bat_priv, batman_if);
411 break;
379 case NETDEV_GOING_DOWN: 412 case NETDEV_GOING_DOWN:
380 case NETDEV_DOWN: 413 case NETDEV_DOWN:
381 case NETDEV_UNREGISTER:
382 hardif_deactivate_interface(batman_if); 414 hardif_deactivate_interface(batman_if);
383 break; 415 break;
384 case NETDEV_UP: 416 case NETDEV_UNREGISTER:
385 hardif_activate_interface(batman_if); 417 hardif_remove_interface(batman_if);
386 if ((atomic_read(&module_state) == MODULE_INACTIVE) && 418 break;
387 (hardif_get_active_if_num() > 0)) { 419 case NETDEV_CHANGENAME:
388 activate_module(); 420 break;
389 } 421 case NETDEV_CHANGEADDR:
422 check_known_mac_addr(batman_if->net_dev->dev_addr);
423 update_mac_addresses(batman_if);
424 if (batman_if == bat_priv->primary_if)
425 set_primary_if(bat_priv, batman_if);
390 break; 426 break;
391 /* NETDEV_CHANGEADDR - mac address change - what are we doing here ? */
392 default: 427 default:
393 break; 428 break;
394 }; 429 };
395 430
396 update_min_mtu();
397
398out: 431out:
399 return NOTIFY_DONE; 432 return NOTIFY_DONE;
400} 433}
401 434
402/* find batman interface by netdev. assumes rcu_read_lock on */
403static struct batman_if *find_batman_if(struct net_device *dev)
404{
405 struct batman_if *batman_if;
406
407 rcu_read_lock();
408 list_for_each_entry_rcu(batman_if, &if_list, list) {
409 if (batman_if->net_dev == dev) {
410 rcu_read_unlock();
411 return batman_if;
412 }
413 }
414 rcu_read_unlock();
415 return NULL;
416}
417
418
419/* receive a packet with the batman ethertype coming on a hard 435/* receive a packet with the batman ethertype coming on a hard
420 * interface */ 436 * interface */
421int batman_skb_recv(struct sk_buff *skb, struct net_device *dev, 437int batman_skb_recv(struct sk_buff *skb, struct net_device *dev,
@@ -444,12 +460,12 @@ int batman_skb_recv(struct sk_buff *skb, struct net_device *dev,
444 || !skb_mac_header(skb))) 460 || !skb_mac_header(skb)))
445 goto err_free; 461 goto err_free;
446 462
447 batman_if = find_batman_if(skb->dev); 463 batman_if = get_batman_if_by_netdev(skb->dev);
448 if (!batman_if) 464 if (!batman_if)
449 goto err_free; 465 goto err_free;
450 466
451 /* discard frames on not active interfaces */ 467 /* discard frames on not active interfaces */
452 if (batman_if->if_active != IF_ACTIVE) 468 if (batman_if->if_status != IF_ACTIVE)
453 goto err_free; 469 goto err_free;
454 470
455 stats = (struct net_device_stats *)dev_get_stats(skb->dev); 471 stats = (struct net_device_stats *)dev_get_stats(skb->dev);
diff --git a/drivers/staging/batman-adv/hard-interface.h b/drivers/staging/batman-adv/hard-interface.h
index 97c6ecb9e087..1e5fc3e720f4 100644
--- a/drivers/staging/batman-adv/hard-interface.h
+++ b/drivers/staging/batman-adv/hard-interface.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -19,19 +19,19 @@
19 * 19 *
20 */ 20 */
21 21
22#define IF_INACTIVE 0 22#define IF_NOT_IN_USE 0
23#define IF_ACTIVE 1 23#define IF_TO_BE_REMOVED 1
24/* #define IF_TO_BE_DEACTIVATED 2 - not needed anymore */ 24#define IF_INACTIVE 2
25#define IF_TO_BE_ACTIVATED 3 25#define IF_ACTIVE 3
26#define IF_TO_BE_ACTIVATED 4
27#define IF_I_WANT_YOU 5
26 28
27extern struct notifier_block hard_if_notifier; 29extern struct notifier_block hard_if_notifier;
28 30
31struct batman_if *get_batman_if_by_netdev(struct net_device *net_dev);
32int hardif_enable_interface(struct batman_if *batman_if);
33void hardif_disable_interface(struct batman_if *batman_if);
29void hardif_remove_interfaces(void); 34void hardif_remove_interfaces(void);
30int hardif_add_interface(char *dev, int if_num);
31void hardif_deactivate_interface(struct batman_if *batman_if);
32char hardif_get_active_if_num(void);
33void hardif_check_interfaces_status(void);
34void hardif_check_interfaces_status_wq(struct work_struct *work);
35int batman_skb_recv(struct sk_buff *skb, 35int batman_skb_recv(struct sk_buff *skb,
36 struct net_device *dev, 36 struct net_device *dev,
37 struct packet_type *ptype, 37 struct packet_type *ptype,
diff --git a/drivers/staging/batman-adv/hash.c b/drivers/staging/batman-adv/hash.c
index 5a2018de3ff2..d4a4adc57042 100644
--- a/drivers/staging/batman-adv/hash.c
+++ b/drivers/staging/batman-adv/hash.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2006-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Simon Wunderlich, Marek Lindner 4 * Simon Wunderlich, Marek Lindner
5 * 5 *
diff --git a/drivers/staging/batman-adv/hash.h b/drivers/staging/batman-adv/hash.h
index a70d6d6e1c7a..ea6d21e01251 100644
--- a/drivers/staging/batman-adv/hash.h
+++ b/drivers/staging/batman-adv/hash.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2006-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2006-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Simon Wunderlich, Marek Lindner 4 * Simon Wunderlich, Marek Lindner
5 * 5 *
diff --git a/drivers/staging/batman-adv/main.c b/drivers/staging/batman-adv/main.c
index 2e0b482e710a..9d13979c2d8e 100644
--- a/drivers/staging/batman-adv/main.c
+++ b/drivers/staging/batman-adv/main.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -20,7 +20,7 @@
20 */ 20 */
21 21
22#include "main.h" 22#include "main.h"
23#include "proc.h" 23#include "bat_sysfs.h"
24#include "routing.h" 24#include "routing.h"
25#include "send.h" 25#include "send.h"
26#include "originator.h" 26#include "originator.h"
@@ -41,12 +41,11 @@ DEFINE_SPINLOCK(orig_hash_lock);
41DEFINE_SPINLOCK(forw_bat_list_lock); 41DEFINE_SPINLOCK(forw_bat_list_lock);
42DEFINE_SPINLOCK(forw_bcast_list_lock); 42DEFINE_SPINLOCK(forw_bcast_list_lock);
43 43
44atomic_t originator_interval;
45atomic_t vis_interval; 44atomic_t vis_interval;
46atomic_t vis_mode; 45atomic_t bcast_queue_left;
47atomic_t aggregation_enabled; 46atomic_t batman_queue_left;
47
48int16_t num_hna; 48int16_t num_hna;
49int16_t num_ifs;
50 49
51struct net_device *soft_device; 50struct net_device *soft_device;
52 51
@@ -81,11 +80,10 @@ int init_module(void)
81 80
82 atomic_set(&module_state, MODULE_INACTIVE); 81 atomic_set(&module_state, MODULE_INACTIVE);
83 82
84 atomic_set(&originator_interval, 1000);
85 atomic_set(&vis_interval, 1000);/* TODO: raise this later, this is only 83 atomic_set(&vis_interval, 1000);/* TODO: raise this later, this is only
86 * for debugging now. */ 84 * for debugging now. */
87 atomic_set(&vis_mode, VIS_TYPE_CLIENT_UPDATE); 85 atomic_set(&bcast_queue_left, BCAST_QUEUE_LEN);
88 atomic_set(&aggregation_enabled, 1); 86 atomic_set(&batman_queue_left, BATMAN_QUEUE_LEN);
89 87
90 /* the name should not be longer than 10 chars - see 88 /* the name should not be longer than 10 chars - see
91 * http://lwn.net/Articles/23634/ */ 89 * http://lwn.net/Articles/23634/ */
@@ -94,10 +92,6 @@ int init_module(void)
94 if (!bat_event_workqueue) 92 if (!bat_event_workqueue)
95 return -ENOMEM; 93 return -ENOMEM;
96 94
97 retval = setup_procfs();
98 if (retval < 0)
99 return retval;
100
101 bat_device_init(); 95 bat_device_init();
102 96
103 /* initialize layer 2 interface */ 97 /* initialize layer 2 interface */
@@ -105,25 +99,35 @@ int init_module(void)
105 interface_setup); 99 interface_setup);
106 100
107 if (!soft_device) { 101 if (!soft_device) {
108 printk(KERN_ERR "batman-adv:Unable to allocate the batman interface\n"); 102 printk(KERN_ERR "batman-adv:"
103 "Unable to allocate the batman interface\n");
109 goto end; 104 goto end;
110 } 105 }
111 106
112 retval = register_netdev(soft_device); 107 retval = register_netdev(soft_device);
113 108
114 if (retval < 0) { 109 if (retval < 0) {
115 printk(KERN_ERR "batman-adv:Unable to register the batman interface: %i\n", retval); 110 printk(KERN_ERR "batman-adv:"
111 "Unable to register the batman interface: %i\n", retval);
116 goto free_soft_device; 112 goto free_soft_device;
117 } 113 }
118 114
115 retval = sysfs_add_meshif(soft_device);
116
117 if (retval < 0)
118 goto unreg_soft_device;
119
119 register_netdevice_notifier(&hard_if_notifier); 120 register_netdevice_notifier(&hard_if_notifier);
120 dev_add_pack(&batman_adv_packet_type); 121 dev_add_pack(&batman_adv_packet_type);
121 122
122 printk(KERN_INFO "batman-adv:B.A.T.M.A.N. advanced %s%s (compatibility version %i) loaded \n", 123 printk(KERN_INFO "batman-adv:"
123 SOURCE_VERSION, REVISION_VERSION_STR, COMPAT_VERSION); 124 "B.A.T.M.A.N. advanced %s%s (compatibility version %i) loaded\n",
125 SOURCE_VERSION, REVISION_VERSION_STR, COMPAT_VERSION);
124 126
125 return 0; 127 return 0;
126 128
129unreg_soft_device:
130 unregister_netdevice(soft_device);
127free_soft_device: 131free_soft_device:
128 free_netdev(soft_device); 132 free_netdev(soft_device);
129 soft_device = NULL; 133 soft_device = NULL;
@@ -133,18 +137,19 @@ end:
133 137
134void cleanup_module(void) 138void cleanup_module(void)
135{ 139{
136 shutdown_module(); 140 deactivate_module();
141
142 unregister_netdevice_notifier(&hard_if_notifier);
143 hardif_remove_interfaces();
137 144
138 if (soft_device) { 145 if (soft_device) {
146 sysfs_del_meshif(soft_device);
139 unregister_netdev(soft_device); 147 unregister_netdev(soft_device);
140 soft_device = NULL; 148 soft_device = NULL;
141 } 149 }
142 150
143 dev_remove_pack(&batman_adv_packet_type); 151 dev_remove_pack(&batman_adv_packet_type);
144 152
145 unregister_netdevice_notifier(&hard_if_notifier);
146 cleanup_procfs();
147
148 destroy_workqueue(bat_event_workqueue); 153 destroy_workqueue(bat_event_workqueue);
149 bat_event_workqueue = NULL; 154 bat_event_workqueue = NULL;
150} 155}
@@ -174,18 +179,20 @@ void activate_module(void)
174 goto end; 179 goto end;
175 180
176err: 181err:
177 printk(KERN_ERR "batman-adv:Unable to allocate memory for mesh information structures: out of mem ?\n"); 182 printk(KERN_ERR "batman-adv:"
178 shutdown_module(); 183 "Unable to allocate memory for mesh information structures: "
184 "out of mem ?\n");
185 deactivate_module();
179end: 186end:
180 return; 187 return;
181} 188}
182 189
183/* shuts down the whole module.*/ 190/* shuts down the whole module.*/
184void shutdown_module(void) 191void deactivate_module(void)
185{ 192{
186 atomic_set(&module_state, MODULE_DEACTIVATING); 193 atomic_set(&module_state, MODULE_DEACTIVATING);
187 194
188 purge_outstanding_packets(); 195 purge_outstanding_packets(NULL);
189 flush_workqueue(bat_event_workqueue); 196 flush_workqueue(bat_event_workqueue);
190 197
191 vis_quit(); 198 vis_quit();
@@ -200,7 +207,6 @@ void shutdown_module(void)
200 synchronize_net(); 207 synchronize_net();
201 bat_device_destroy(); 208 bat_device_destroy();
202 209
203 hardif_remove_interfaces();
204 synchronize_rcu(); 210 synchronize_rcu();
205 atomic_set(&module_state, MODULE_INACTIVE); 211 atomic_set(&module_state, MODULE_INACTIVE);
206} 212}
@@ -217,7 +223,7 @@ void dec_module_count(void)
217 223
218int addr_to_string(char *buff, uint8_t *addr) 224int addr_to_string(char *buff, uint8_t *addr)
219{ 225{
220 return sprintf(buff, "%02x:%02x:%02x:%02x:%02x:%02x", 226 return sprintf(buff, MAC_FMT,
221 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 227 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
222} 228}
223 229
diff --git a/drivers/staging/batman-adv/main.h b/drivers/staging/batman-adv/main.h
index 2e9bb891a5de..5f8343d360f6 100644
--- a/drivers/staging/batman-adv/main.h
+++ b/drivers/staging/batman-adv/main.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -22,11 +22,12 @@
22/* Kernel Programming */ 22/* Kernel Programming */
23#define LINUX 23#define LINUX
24 24
25#define DRIVER_AUTHOR "Marek Lindner <lindner_marek@yahoo.de>, Simon Wunderlich <siwu@hrz.tu-chemnitz.de>" 25#define DRIVER_AUTHOR "Marek Lindner <lindner_marek@yahoo.de>, " \
26 "Simon Wunderlich <siwu@hrz.tu-chemnitz.de>"
26#define DRIVER_DESC "B.A.T.M.A.N. advanced" 27#define DRIVER_DESC "B.A.T.M.A.N. advanced"
27#define DRIVER_DEVICE "batman-adv" 28#define DRIVER_DEVICE "batman-adv"
28 29
29#define SOURCE_VERSION "0.2.1-beta" 30#define SOURCE_VERSION "0.2.2-beta"
30 31
31 32
32/* B.A.T.M.A.N. parameters */ 33/* B.A.T.M.A.N. parameters */
@@ -34,8 +35,6 @@
34#define TQ_MAX_VALUE 255 35#define TQ_MAX_VALUE 255
35#define JITTER 20 36#define JITTER 20
36#define TTL 50 /* Time To Live of broadcast messages */ 37#define TTL 50 /* Time To Live of broadcast messages */
37#define MAX_ADDR 16 /* number of interfaces which can be added to
38 * batman. */
39 38
40#define PURGE_TIMEOUT 200000 /* purge originators after time in ms if no 39#define PURGE_TIMEOUT 200000 /* purge originators after time in ms if no
41 * valid packet comes in -> TODO: check 40 * valid packet comes in -> TODO: check
@@ -63,10 +62,16 @@
63 * forw_packet->direct_link_flags */ 62 * forw_packet->direct_link_flags */
64#define MAX_AGGREGATION_MS 100 63#define MAX_AGGREGATION_MS 100
65 64
65#define RESET_PROTECTION_MS 30000
66#define EXPECTED_SEQNO_RANGE 4096
67/* don't reset again within 30 seconds */
68
66#define MODULE_INACTIVE 0 69#define MODULE_INACTIVE 0
67#define MODULE_ACTIVE 1 70#define MODULE_ACTIVE 1
68#define MODULE_DEACTIVATING 2 71#define MODULE_DEACTIVATING 2
69 72
73#define BCAST_QUEUE_LEN 256
74#define BATMAN_QUEUE_LEN 256
70 75
71/* 76/*
72 * Debug Messages 77 * Debug Messages
@@ -129,12 +134,10 @@ extern spinlock_t orig_hash_lock;
129extern spinlock_t forw_bat_list_lock; 134extern spinlock_t forw_bat_list_lock;
130extern spinlock_t forw_bcast_list_lock; 135extern spinlock_t forw_bcast_list_lock;
131 136
132extern atomic_t originator_interval;
133extern atomic_t vis_interval; 137extern atomic_t vis_interval;
134extern atomic_t vis_mode; 138extern atomic_t bcast_queue_left;
135extern atomic_t aggregation_enabled; 139extern atomic_t batman_queue_left;
136extern int16_t num_hna; 140extern int16_t num_hna;
137extern int16_t num_ifs;
138 141
139extern struct net_device *soft_device; 142extern struct net_device *soft_device;
140 143
@@ -143,7 +146,7 @@ extern atomic_t module_state;
143extern struct workqueue_struct *bat_event_workqueue; 146extern struct workqueue_struct *bat_event_workqueue;
144 147
145void activate_module(void); 148void activate_module(void);
146void shutdown_module(void); 149void deactivate_module(void);
147void inc_module_count(void); 150void inc_module_count(void);
148void dec_module_count(void); 151void dec_module_count(void);
149int addr_to_string(char *buff, uint8_t *addr); 152int addr_to_string(char *buff, uint8_t *addr);
diff --git a/drivers/staging/batman-adv/originator.c b/drivers/staging/batman-adv/originator.c
index 29c241119a3b..568aef8371be 100644
--- a/drivers/staging/batman-adv/originator.c
+++ b/drivers/staging/batman-adv/originator.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2009-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -26,6 +26,7 @@
26#include "hash.h" 26#include "hash.h"
27#include "translation-table.h" 27#include "translation-table.h"
28#include "routing.h" 28#include "routing.h"
29#include "hard-interface.h"
29 30
30static DECLARE_DELAYED_WORK(purge_orig_wq, purge_orig); 31static DECLARE_DELAYED_WORK(purge_orig_wq, purge_orig);
31 32
@@ -117,6 +118,8 @@ void free_orig_node(void *data)
117 * address if it does not exits */ 118 * address if it does not exits */
118struct orig_node *get_orig_node(uint8_t *addr) 119struct orig_node *get_orig_node(uint8_t *addr)
119{ 120{
121 /* FIXME: each batman_if will be attached to a softif */
122 struct bat_priv *bat_priv = netdev_priv(soft_device);
120 struct orig_node *orig_node; 123 struct orig_node *orig_node;
121 struct hashtable_t *swaphash; 124 struct hashtable_t *swaphash;
122 int size; 125 int size;
@@ -126,7 +129,7 @@ struct orig_node *get_orig_node(uint8_t *addr)
126 if (orig_node != NULL) 129 if (orig_node != NULL)
127 return orig_node; 130 return orig_node;
128 131
129 bat_dbg(DBG_BATMAN, "Creating new originator: %pM \n", addr); 132 bat_dbg(DBG_BATMAN, "Creating new originator: %pM\n", addr);
130 133
131 orig_node = kzalloc(sizeof(struct orig_node), GFP_ATOMIC); 134 orig_node = kzalloc(sizeof(struct orig_node), GFP_ATOMIC);
132 if (!orig_node) 135 if (!orig_node)
@@ -136,16 +139,19 @@ struct orig_node *get_orig_node(uint8_t *addr)
136 139
137 memcpy(orig_node->orig, addr, ETH_ALEN); 140 memcpy(orig_node->orig, addr, ETH_ALEN);
138 orig_node->router = NULL; 141 orig_node->router = NULL;
139 orig_node->batman_if = NULL;
140 orig_node->hna_buff = NULL; 142 orig_node->hna_buff = NULL;
143 orig_node->bcast_seqno_reset = jiffies - 1
144 - msecs_to_jiffies(RESET_PROTECTION_MS);
145 orig_node->batman_seqno_reset = jiffies - 1
146 - msecs_to_jiffies(RESET_PROTECTION_MS);
141 147
142 size = num_ifs * sizeof(TYPE_OF_WORD) * NUM_WORDS; 148 size = bat_priv->num_ifaces * sizeof(TYPE_OF_WORD) * NUM_WORDS;
143 149
144 orig_node->bcast_own = kzalloc(size, GFP_ATOMIC); 150 orig_node->bcast_own = kzalloc(size, GFP_ATOMIC);
145 if (!orig_node->bcast_own) 151 if (!orig_node->bcast_own)
146 goto free_orig_node; 152 goto free_orig_node;
147 153
148 size = num_ifs * sizeof(uint8_t); 154 size = bat_priv->num_ifaces * sizeof(uint8_t);
149 orig_node->bcast_own_sum = kzalloc(size, GFP_ATOMIC); 155 orig_node->bcast_own_sum = kzalloc(size, GFP_ATOMIC);
150 if (!orig_node->bcast_own_sum) 156 if (!orig_node->bcast_own_sum)
151 goto free_bcast_own; 157 goto free_bcast_own;
@@ -158,7 +164,7 @@ struct orig_node *get_orig_node(uint8_t *addr)
158 164
159 if (swaphash == NULL) 165 if (swaphash == NULL)
160 printk(KERN_ERR 166 printk(KERN_ERR
161 "batman-adv:Couldn't resize orig hash table \n"); 167 "batman-adv:Couldn't resize orig hash table\n");
162 else 168 else
163 orig_hash = swaphash; 169 orig_hash = swaphash;
164 } 170 }
@@ -182,16 +188,29 @@ static bool purge_orig_neighbors(struct orig_node *orig_node,
182 188
183 *best_neigh_node = NULL; 189 *best_neigh_node = NULL;
184 190
185
186 /* for all neighbors towards this originator ... */ 191 /* for all neighbors towards this originator ... */
187 list_for_each_safe(list_pos, list_pos_tmp, &orig_node->neigh_list) { 192 list_for_each_safe(list_pos, list_pos_tmp, &orig_node->neigh_list) {
188 neigh_node = list_entry(list_pos, struct neigh_node, list); 193 neigh_node = list_entry(list_pos, struct neigh_node, list);
189 194
190 if (time_after(jiffies, 195 if ((time_after(jiffies,
191 (neigh_node->last_valid + 196 (neigh_node->last_valid +
192 ((PURGE_TIMEOUT * HZ) / 1000)))) { 197 ((PURGE_TIMEOUT * HZ) / 1000)))) ||
193 198 (neigh_node->if_incoming->if_status ==
194 bat_dbg(DBG_BATMAN, "neighbor timeout: originator %pM, neighbor: %pM, last_valid %lu\n", orig_node->orig, neigh_node->addr, (neigh_node->last_valid / HZ)); 199 IF_TO_BE_REMOVED)) {
200
201 if (neigh_node->if_incoming->if_status ==
202 IF_TO_BE_REMOVED)
203 bat_dbg(DBG_BATMAN,
204 "neighbor purge: originator %pM, "
205 "neighbor: %pM, iface: %s\n",
206 orig_node->orig, neigh_node->addr,
207 neigh_node->if_incoming->dev);
208 else
209 bat_dbg(DBG_BATMAN,
210 "neighbor timeout: originator %pM, "
211 "neighbor: %pM, last_valid: %lu\n",
212 orig_node->orig, neigh_node->addr,
213 (neigh_node->last_valid / HZ));
195 214
196 neigh_purged = true; 215 neigh_purged = true;
197 list_del(list_pos); 216 list_del(list_pos);
@@ -205,7 +224,6 @@ static bool purge_orig_neighbors(struct orig_node *orig_node,
205 return neigh_purged; 224 return neigh_purged;
206} 225}
207 226
208
209static bool purge_orig_node(struct orig_node *orig_node) 227static bool purge_orig_node(struct orig_node *orig_node)
210{ 228{
211 struct neigh_node *best_neigh_node; 229 struct neigh_node *best_neigh_node;
@@ -224,6 +242,7 @@ static bool purge_orig_node(struct orig_node *orig_node)
224 orig_node->hna_buff, 242 orig_node->hna_buff,
225 orig_node->hna_buff_len); 243 orig_node->hna_buff_len);
226 } 244 }
245
227 return false; 246 return false;
228} 247}
229 248
@@ -246,7 +265,257 @@ void purge_orig(struct work_struct *work)
246 265
247 spin_unlock_irqrestore(&orig_hash_lock, flags); 266 spin_unlock_irqrestore(&orig_hash_lock, flags);
248 267
249 start_purge_timer(); 268 /* if work == NULL we were not called by the timer
269 * and thus do not need to re-arm the timer */
270 if (work)
271 start_purge_timer();
272}
273
274ssize_t orig_fill_buffer_text(struct net_device *net_dev, char *buff,
275 size_t count, loff_t off)
276{
277 HASHIT(hashit);
278 struct bat_priv *bat_priv = netdev_priv(net_dev);
279 struct orig_node *orig_node;
280 struct neigh_node *neigh_node;
281 size_t hdr_len, tmp_len;
282 int batman_count = 0, bytes_written = 0;
283 unsigned long flags;
284 char orig_str[ETH_STR_LEN], router_str[ETH_STR_LEN];
285
286 if (!bat_priv->primary_if) {
287 if (off == 0)
288 return sprintf(buff,
289 "BATMAN mesh %s disabled - "
290 "please specify interfaces to enable it\n",
291 net_dev->name);
292
293 return 0;
294 }
295
296 if (bat_priv->primary_if->if_status != IF_ACTIVE && off == 0)
297 return sprintf(buff,
298 "BATMAN mesh %s "
299 "disabled - primary interface not active\n",
300 net_dev->name);
301 else if (bat_priv->primary_if->if_status != IF_ACTIVE)
302 return 0;
303
304 rcu_read_lock();
305 hdr_len = sprintf(buff,
306 " %-14s (%s/%i) %17s [%10s]: %20s "
307 "... [B.A.T.M.A.N. adv %s%s, MainIF/MAC: %s/%s (%s)]\n",
308 "Originator", "#", TQ_MAX_VALUE, "Nexthop", "outgoingIF",
309 "Potential nexthops", SOURCE_VERSION, REVISION_VERSION_STR,
310 bat_priv->primary_if->dev, bat_priv->primary_if->addr_str,
311 net_dev->name);
312 rcu_read_unlock();
313
314 if (off < hdr_len)
315 bytes_written = hdr_len;
316
317 spin_lock_irqsave(&orig_hash_lock, flags);
318
319 while (hash_iterate(orig_hash, &hashit)) {
320
321 orig_node = hashit.bucket->data;
322
323 if (!orig_node->router)
324 continue;
325
326 if (orig_node->router->tq_avg == 0)
327 continue;
328
329 /* estimated line length */
330 if (count < bytes_written + 200)
331 break;
332
333 addr_to_string(orig_str, orig_node->orig);
334 addr_to_string(router_str, orig_node->router->addr);
335
336 tmp_len = sprintf(buff + bytes_written,
337 "%-17s (%3i) %17s [%10s]:",
338 orig_str, orig_node->router->tq_avg,
339 router_str,
340 orig_node->router->if_incoming->dev);
341
342 list_for_each_entry(neigh_node, &orig_node->neigh_list, list) {
343 addr_to_string(orig_str, neigh_node->addr);
344 tmp_len += sprintf(buff + bytes_written + tmp_len,
345 " %17s (%3i)", orig_str,
346 neigh_node->tq_avg);
347 }
348
349 tmp_len += sprintf(buff + bytes_written + tmp_len, "\n");
350
351 batman_count++;
352 hdr_len += tmp_len;
353
354 if (off >= hdr_len)
355 continue;
356
357 bytes_written += tmp_len;
358 }
359
360 spin_unlock_irqrestore(&orig_hash_lock, flags);
361
362 if ((batman_count == 0) && (off == 0))
363 bytes_written += sprintf(buff + bytes_written,
364 "No batman nodes in range ...\n");
365
366 return bytes_written;
367}
368
369static int orig_node_add_if(struct orig_node *orig_node, int max_if_num)
370{
371 void *data_ptr;
372
373 data_ptr = kmalloc(max_if_num * sizeof(TYPE_OF_WORD) * NUM_WORDS,
374 GFP_ATOMIC);
375 if (!data_ptr) {
376 printk(KERN_ERR
377 "batman-adv:Can't resize orig: out of memory\n");
378 return -1;
379 }
380
381 memcpy(data_ptr, orig_node->bcast_own,
382 (max_if_num - 1) * sizeof(TYPE_OF_WORD) * NUM_WORDS);
383 kfree(orig_node->bcast_own);
384 orig_node->bcast_own = data_ptr;
385
386 data_ptr = kmalloc(max_if_num * sizeof(uint8_t), GFP_ATOMIC);
387 if (!data_ptr) {
388 printk(KERN_ERR
389 "batman-adv:Can't resize orig: out of memory\n");
390 return -1;
391 }
392
393 memcpy(data_ptr, orig_node->bcast_own_sum,
394 (max_if_num - 1) * sizeof(uint8_t));
395 kfree(orig_node->bcast_own_sum);
396 orig_node->bcast_own_sum = data_ptr;
397
398 return 0;
399}
400
401int orig_hash_add_if(struct batman_if *batman_if, int max_if_num)
402{
403 struct orig_node *orig_node;
404 HASHIT(hashit);
405
406 /* resize all orig nodes because orig_node->bcast_own(_sum) depend on
407 * if_num */
408 spin_lock(&orig_hash_lock);
409
410 while (hash_iterate(orig_hash, &hashit)) {
411 orig_node = hashit.bucket->data;
412
413 if (orig_node_add_if(orig_node, max_if_num) == -1)
414 goto err;
415 }
416
417 spin_unlock(&orig_hash_lock);
418 return 0;
419
420err:
421 spin_unlock(&orig_hash_lock);
422 return -ENOMEM;
423}
424
425static int orig_node_del_if(struct orig_node *orig_node,
426 int max_if_num, int del_if_num)
427{
428 void *data_ptr = NULL;
429 int chunk_size;
430
431 /* last interface was removed */
432 if (max_if_num == 0)
433 goto free_bcast_own;
434
435 chunk_size = sizeof(TYPE_OF_WORD) * NUM_WORDS;
436 data_ptr = kmalloc(max_if_num * chunk_size, GFP_ATOMIC);
437 if (!data_ptr) {
438 printk(KERN_ERR
439 "batman-adv:Can't resize orig: out of memory\n");
440 return -1;
441 }
442
443 /* copy first part */
444 memcpy(data_ptr, orig_node->bcast_own, del_if_num * chunk_size);
445
446 /* copy second part */
447 memcpy(data_ptr,
448 orig_node->bcast_own + ((del_if_num + 1) * chunk_size),
449 (max_if_num - del_if_num) * chunk_size);
450
451free_bcast_own:
452 kfree(orig_node->bcast_own);
453 orig_node->bcast_own = data_ptr;
454
455 if (max_if_num == 0)
456 goto free_own_sum;
457
458 data_ptr = kmalloc(max_if_num * sizeof(uint8_t), GFP_ATOMIC);
459 if (!data_ptr) {
460 printk(KERN_ERR
461 "batman-adv:Can't resize orig: out of memory\n");
462 return -1;
463 }
464
465 memcpy(data_ptr, orig_node->bcast_own_sum,
466 del_if_num * sizeof(uint8_t));
467
468 memcpy(data_ptr,
469 orig_node->bcast_own_sum + ((del_if_num + 1) * sizeof(uint8_t)),
470 (max_if_num - del_if_num) * sizeof(uint8_t));
471
472free_own_sum:
473 kfree(orig_node->bcast_own_sum);
474 orig_node->bcast_own_sum = data_ptr;
475
476 return 0;
250} 477}
251 478
479int orig_hash_del_if(struct batman_if *batman_if, int max_if_num)
480{
481 struct batman_if *batman_if_tmp;
482 struct orig_node *orig_node;
483 HASHIT(hashit);
484 int ret;
485
486 /* resize all orig nodes because orig_node->bcast_own(_sum) depend on
487 * if_num */
488 spin_lock(&orig_hash_lock);
489
490 while (hash_iterate(orig_hash, &hashit)) {
491 orig_node = hashit.bucket->data;
492
493 ret = orig_node_del_if(orig_node, max_if_num,
494 batman_if->if_num);
495
496 if (ret == -1)
497 goto err;
498 }
499
500 /* renumber remaining batman interfaces _inside_ of orig_hash_lock */
501 rcu_read_lock();
502 list_for_each_entry_rcu(batman_if_tmp, &if_list, list) {
503 if (batman_if_tmp->if_status == IF_NOT_IN_USE)
504 continue;
505
506 if (batman_if == batman_if_tmp)
507 continue;
252 508
509 if (batman_if_tmp->if_num > batman_if->if_num)
510 batman_if_tmp->if_num--;
511 }
512 rcu_read_unlock();
513
514 batman_if->if_num = -1;
515 spin_unlock(&orig_hash_lock);
516 return 0;
517
518err:
519 spin_unlock(&orig_hash_lock);
520 return -ENOMEM;
521}
diff --git a/drivers/staging/batman-adv/originator.h b/drivers/staging/batman-adv/originator.h
index 6ef7a054a0a9..afbc7c0e8aa3 100644
--- a/drivers/staging/batman-adv/originator.h
+++ b/drivers/staging/batman-adv/originator.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -28,4 +28,7 @@ struct orig_node *get_orig_node(uint8_t *addr);
28struct neigh_node * 28struct neigh_node *
29create_neighbor(struct orig_node *orig_node, struct orig_node *orig_neigh_node, 29create_neighbor(struct orig_node *orig_node, struct orig_node *orig_neigh_node,
30 uint8_t *neigh, struct batman_if *if_incoming); 30 uint8_t *neigh, struct batman_if *if_incoming);
31 31ssize_t orig_fill_buffer_text(struct net_device *net_dev, char *buff,
32 size_t count, loff_t off);
33int orig_hash_add_if(struct batman_if *batman_if, int max_if_num);
34int orig_hash_del_if(struct batman_if *batman_if, int max_if_num);
diff --git a/drivers/staging/batman-adv/packet.h b/drivers/staging/batman-adv/packet.h
index ad006ce8b131..152f57b1c6c5 100644
--- a/drivers/staging/batman-adv/packet.h
+++ b/drivers/staging/batman-adv/packet.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
diff --git a/drivers/staging/batman-adv/proc.c b/drivers/staging/batman-adv/proc.c
deleted file mode 100644
index 7de60e84bc96..000000000000
--- a/drivers/staging/batman-adv/proc.c
+++ /dev/null
@@ -1,670 +0,0 @@
1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors:
3 *
4 * Marek Lindner, Simon Wunderlich
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of version 2 of the GNU General Public
8 * License as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA
19 *
20 */
21
22#include "main.h"
23#include "proc.h"
24#include "routing.h"
25#include "translation-table.h"
26#include "hard-interface.h"
27#include "types.h"
28#include "hash.h"
29#include "vis.h"
30
31static struct proc_dir_entry *proc_batman_dir, *proc_interface_file;
32static struct proc_dir_entry *proc_orig_interval_file, *proc_originators_file;
33static struct proc_dir_entry *proc_transt_local_file;
34static struct proc_dir_entry *proc_transt_global_file;
35static struct proc_dir_entry *proc_vis_srv_file, *proc_vis_data_file;
36static struct proc_dir_entry *proc_aggr_file;
37
38static int proc_interfaces_read(struct seq_file *seq, void *offset)
39{
40 struct batman_if *batman_if;
41
42 rcu_read_lock();
43 list_for_each_entry_rcu(batman_if, &if_list, list) {
44 seq_printf(seq, "[%8s] %s %s \n",
45 (batman_if->if_active == IF_ACTIVE ?
46 "active" : "inactive"),
47 batman_if->dev,
48 (batman_if->if_active == IF_ACTIVE ?
49 batman_if->addr_str : " "));
50 }
51 rcu_read_unlock();
52
53 return 0;
54}
55
56static int proc_interfaces_open(struct inode *inode, struct file *file)
57{
58 return single_open(file, proc_interfaces_read, NULL);
59}
60
61static ssize_t proc_interfaces_write(struct file *instance,
62 const char __user *userbuffer,
63 size_t count, loff_t *data)
64{
65 char *if_string, *colon_ptr = NULL, *cr_ptr = NULL;
66 int not_copied = 0, if_num = 0, add_success;
67 struct batman_if *batman_if = NULL;
68
69 if_string = kmalloc(count, GFP_KERNEL);
70
71 if (!if_string)
72 return -ENOMEM;
73
74 if (count > IFNAMSIZ - 1) {
75 printk(KERN_WARNING "batman-adv:Can't add interface: device name is too long\n");
76 goto end;
77 }
78
79 not_copied = copy_from_user(if_string, userbuffer, count);
80 if_string[count - not_copied - 1] = 0;
81
82 colon_ptr = strchr(if_string, ':');
83 if (colon_ptr)
84 *colon_ptr = 0;
85
86 if (!colon_ptr) {
87 cr_ptr = strchr(if_string, '\n');
88 if (cr_ptr)
89 *cr_ptr = 0;
90 }
91
92 if (strlen(if_string) == 0) {
93 shutdown_module();
94 num_ifs = 0;
95 goto end;
96 }
97
98 /* add interface */
99 rcu_read_lock();
100 list_for_each_entry_rcu(batman_if, &if_list, list) {
101 if (strncmp(batman_if->dev, if_string, count) == 0) {
102 printk(KERN_ERR "batman-adv:Given interface is already active: %s\n", if_string);
103 rcu_read_unlock();
104 goto end;
105
106 }
107
108 if_num++;
109 }
110 rcu_read_unlock();
111
112 add_success = hardif_add_interface(if_string, if_num);
113 if (add_success < 0)
114 goto end;
115
116 num_ifs = if_num + 1;
117
118 if ((atomic_read(&module_state) == MODULE_INACTIVE) &&
119 (hardif_get_active_if_num() > 0))
120 activate_module();
121
122 return count;
123end:
124 kfree(if_string);
125 return count;
126}
127
128static int proc_orig_interval_read(struct seq_file *seq, void *offset)
129{
130 seq_printf(seq, "%i\n", atomic_read(&originator_interval));
131
132 return 0;
133}
134
135static ssize_t proc_orig_interval_write(struct file *file,
136 const char __user *buffer,
137 size_t count, loff_t *ppos)
138{
139 char *interval_string;
140 int not_copied = 0;
141 unsigned long originator_interval_tmp;
142 int retval;
143
144 interval_string = kmalloc(count, GFP_KERNEL);
145
146 if (!interval_string)
147 return -ENOMEM;
148
149 not_copied = copy_from_user(interval_string, buffer, count);
150 interval_string[count - not_copied - 1] = 0;
151
152 retval = strict_strtoul(interval_string, 10, &originator_interval_tmp);
153 if (retval) {
154 printk(KERN_ERR "batman-adv:New originator interval invalid\n");
155 goto end;
156 }
157
158 if (originator_interval_tmp <= JITTER * 2) {
159 printk(KERN_WARNING "batman-adv:New originator interval too small: %li (min: %i)\n",
160 originator_interval_tmp, JITTER * 2);
161 goto end;
162 }
163
164 printk(KERN_INFO "batman-adv:Changing originator interval from: %i to: %li\n",
165 atomic_read(&originator_interval), originator_interval_tmp);
166
167 atomic_set(&originator_interval, originator_interval_tmp);
168
169end:
170 kfree(interval_string);
171 return count;
172}
173
174static int proc_orig_interval_open(struct inode *inode, struct file *file)
175{
176 return single_open(file, proc_orig_interval_read, NULL);
177}
178
179static int proc_originators_read(struct seq_file *seq, void *offset)
180{
181 HASHIT(hashit);
182 struct orig_node *orig_node;
183 struct neigh_node *neigh_node;
184 int batman_count = 0;
185 char orig_str[ETH_STR_LEN], router_str[ETH_STR_LEN];
186 unsigned long flags;
187
188 rcu_read_lock();
189 if (list_empty(&if_list)) {
190 rcu_read_unlock();
191 seq_printf(seq, "BATMAN disabled - please specify interfaces to enable it \n");
192 goto end;
193 }
194
195 if (((struct batman_if *)if_list.next)->if_active != IF_ACTIVE) {
196 rcu_read_unlock();
197 seq_printf(seq, "BATMAN disabled - primary interface not active \n");
198 goto end;
199 }
200
201 seq_printf(seq,
202 " %-14s (%s/%i) %17s [%10s]: %20s ... [B.A.T.M.A.N. adv %s%s, MainIF/MAC: %s/%s] \n",
203 "Originator", "#", TQ_MAX_VALUE, "Nexthop", "outgoingIF",
204 "Potential nexthops", SOURCE_VERSION, REVISION_VERSION_STR,
205 ((struct batman_if *)if_list.next)->dev,
206 ((struct batman_if *)if_list.next)->addr_str);
207
208 rcu_read_unlock();
209 spin_lock_irqsave(&orig_hash_lock, flags);
210
211 while (hash_iterate(orig_hash, &hashit)) {
212
213 orig_node = hashit.bucket->data;
214
215 if (!orig_node->router)
216 continue;
217
218 if (orig_node->router->tq_avg == 0)
219 continue;
220
221 batman_count++;
222
223 addr_to_string(orig_str, orig_node->orig);
224 addr_to_string(router_str, orig_node->router->addr);
225
226 seq_printf(seq, "%-17s (%3i) %17s [%10s]:",
227 orig_str, orig_node->router->tq_avg,
228 router_str, orig_node->router->if_incoming->dev);
229
230 list_for_each_entry(neigh_node, &orig_node->neigh_list, list) {
231 addr_to_string(orig_str, neigh_node->addr);
232 seq_printf(seq, " %17s (%3i)",
233 orig_str, neigh_node->tq_avg);
234 }
235
236 seq_printf(seq, "\n");
237
238 }
239
240 spin_unlock_irqrestore(&orig_hash_lock, flags);
241
242 if (batman_count == 0)
243 seq_printf(seq, "No batman nodes in range ... \n");
244
245end:
246 return 0;
247}
248
249static int proc_originators_open(struct inode *inode, struct file *file)
250{
251 return single_open(file, proc_originators_read, NULL);
252}
253
254static int proc_transt_local_read(struct seq_file *seq, void *offset)
255{
256 char *buf;
257
258 buf = kmalloc(4096, GFP_KERNEL);
259 if (!buf)
260 return 0;
261
262 rcu_read_lock();
263 if (list_empty(&if_list)) {
264 rcu_read_unlock();
265 seq_printf(seq, "BATMAN disabled - please specify interfaces to enable it \n");
266 goto end;
267 }
268
269 rcu_read_unlock();
270
271 seq_printf(seq, "Locally retrieved addresses (from %s) announced via HNA:\n", soft_device->name);
272
273 hna_local_fill_buffer_text(buf, 4096);
274 seq_printf(seq, "%s", buf);
275
276end:
277 kfree(buf);
278 return 0;
279}
280
281static int proc_transt_local_open(struct inode *inode, struct file *file)
282{
283 return single_open(file, proc_transt_local_read, NULL);
284}
285
286static int proc_transt_global_read(struct seq_file *seq, void *offset)
287{
288 char *buf;
289
290 buf = kmalloc(4096, GFP_KERNEL);
291 if (!buf)
292 return 0;
293
294 rcu_read_lock();
295 if (list_empty(&if_list)) {
296 rcu_read_unlock();
297 seq_printf(seq, "BATMAN disabled - please specify interfaces to enable it \n");
298 goto end;
299 }
300 rcu_read_unlock();
301
302
303 seq_printf(seq, "Globally announced HNAs received via the mesh (translation table):\n");
304
305 hna_global_fill_buffer_text(buf, 4096);
306 seq_printf(seq, "%s", buf);
307
308end:
309 kfree(buf);
310 return 0;
311}
312
313static int proc_transt_global_open(struct inode *inode, struct file *file)
314{
315 return single_open(file, proc_transt_global_read, NULL);
316}
317
318/* setting the mode of the vis server by the user */
319static ssize_t proc_vis_srv_write(struct file *file, const char __user * buffer,
320 size_t count, loff_t *ppos)
321{
322 char *vis_mode_string;
323 int not_copied = 0;
324
325 vis_mode_string = kmalloc(count, GFP_KERNEL);
326
327 if (!vis_mode_string)
328 return -ENOMEM;
329
330 not_copied = copy_from_user(vis_mode_string, buffer, count);
331 vis_mode_string[count - not_copied - 1] = 0;
332
333 if ((strcmp(vis_mode_string, "client") == 0) ||
334 (strcmp(vis_mode_string, "disabled") == 0)) {
335 printk(KERN_INFO "batman-adv:Setting VIS mode to client (disabling vis server)\n");
336 atomic_set(&vis_mode, VIS_TYPE_CLIENT_UPDATE);
337 } else if ((strcmp(vis_mode_string, "server") == 0) ||
338 (strcmp(vis_mode_string, "enabled") == 0)) {
339 printk(KERN_INFO "batman-adv:Setting VIS mode to server (enabling vis server)\n");
340 atomic_set(&vis_mode, VIS_TYPE_SERVER_SYNC);
341 } else
342 printk(KERN_ERR "batman-adv:Unknown VIS mode: %s\n",
343 vis_mode_string);
344
345 kfree(vis_mode_string);
346 return count;
347}
348
349static int proc_vis_srv_read(struct seq_file *seq, void *offset)
350{
351 int vis_server = atomic_read(&vis_mode);
352
353 seq_printf(seq, "[%c] client mode (server disabled) \n",
354 (vis_server == VIS_TYPE_CLIENT_UPDATE) ? 'x' : ' ');
355 seq_printf(seq, "[%c] server mode (server enabled) \n",
356 (vis_server == VIS_TYPE_SERVER_SYNC) ? 'x' : ' ');
357
358 return 0;
359}
360
361static int proc_vis_srv_open(struct inode *inode, struct file *file)
362{
363 return single_open(file, proc_vis_srv_read, NULL);
364}
365
366static int proc_vis_data_read(struct seq_file *seq, void *offset)
367{
368 HASHIT(hashit);
369 struct vis_info *info;
370 struct vis_info_entry *entries;
371 HLIST_HEAD(vis_if_list);
372 int i;
373 char tmp_addr_str[ETH_STR_LEN];
374 unsigned long flags;
375 int vis_server = atomic_read(&vis_mode);
376
377 rcu_read_lock();
378 if (list_empty(&if_list) || (vis_server == VIS_TYPE_CLIENT_UPDATE)) {
379 rcu_read_unlock();
380 goto end;
381 }
382
383 rcu_read_unlock();
384
385 spin_lock_irqsave(&vis_hash_lock, flags);
386 while (hash_iterate(vis_hash, &hashit)) {
387 info = hashit.bucket->data;
388 entries = (struct vis_info_entry *)
389 ((char *)info + sizeof(struct vis_info));
390 addr_to_string(tmp_addr_str, info->packet.vis_orig);
391 seq_printf(seq, "%s,", tmp_addr_str);
392
393 for (i = 0; i < info->packet.entries; i++) {
394 proc_vis_read_entry(seq, &entries[i], &vis_if_list,
395 info->packet.vis_orig);
396 }
397
398 /* add primary/secondary records */
399 proc_vis_read_prim_sec(seq, &vis_if_list);
400 seq_printf(seq, "\n");
401 }
402 spin_unlock_irqrestore(&vis_hash_lock, flags);
403
404end:
405 return 0;
406}
407
408static int proc_vis_data_open(struct inode *inode, struct file *file)
409{
410 return single_open(file, proc_vis_data_read, NULL);
411}
412
413static int proc_aggr_read(struct seq_file *seq, void *offset)
414{
415 seq_printf(seq, "%i\n", atomic_read(&aggregation_enabled));
416
417 return 0;
418}
419
420static ssize_t proc_aggr_write(struct file *file, const char __user *buffer,
421 size_t count, loff_t *ppos)
422{
423 char *aggr_string;
424 int not_copied = 0;
425 unsigned long aggregation_enabled_tmp;
426 int retval;
427
428 aggr_string = kmalloc(count, GFP_KERNEL);
429
430 if (!aggr_string)
431 return -ENOMEM;
432
433 not_copied = copy_from_user(aggr_string, buffer, count);
434 aggr_string[count - not_copied - 1] = 0;
435
436 retval = strict_strtoul(aggr_string, 10, &aggregation_enabled_tmp);
437
438 if (retval || aggregation_enabled_tmp > 1) {
439 printk(KERN_ERR "batman-adv:Aggregation can only be enabled (1) or disabled (0), given value: %li\n", aggregation_enabled_tmp);
440 } else {
441 printk(KERN_INFO "batman-adv:Changing aggregation from: %s (%i) to: %s (%li)\n",
442 (atomic_read(&aggregation_enabled) == 1 ?
443 "enabled" : "disabled"),
444 atomic_read(&aggregation_enabled),
445 (aggregation_enabled_tmp == 1 ? "enabled" : "disabled"),
446 aggregation_enabled_tmp);
447 atomic_set(&aggregation_enabled,
448 (unsigned)aggregation_enabled_tmp);
449 }
450
451 kfree(aggr_string);
452 return count;
453}
454
455static int proc_aggr_open(struct inode *inode, struct file *file)
456{
457 return single_open(file, proc_aggr_read, NULL);
458}
459
460/* satisfying different prototypes ... */
461static ssize_t proc_dummy_write(struct file *file, const char __user *buffer,
462 size_t count, loff_t *ppos)
463{
464 return count;
465}
466
467static const struct file_operations proc_aggr_fops = {
468 .owner = THIS_MODULE,
469 .open = proc_aggr_open,
470 .read = seq_read,
471 .write = proc_aggr_write,
472 .llseek = seq_lseek,
473 .release = single_release,
474};
475
476static const struct file_operations proc_vis_srv_fops = {
477 .owner = THIS_MODULE,
478 .open = proc_vis_srv_open,
479 .read = seq_read,
480 .write = proc_vis_srv_write,
481 .llseek = seq_lseek,
482 .release = single_release,
483};
484
485static const struct file_operations proc_vis_data_fops = {
486 .owner = THIS_MODULE,
487 .open = proc_vis_data_open,
488 .read = seq_read,
489 .write = proc_dummy_write,
490 .llseek = seq_lseek,
491 .release = single_release,
492};
493
494static const struct file_operations proc_originators_fops = {
495 .owner = THIS_MODULE,
496 .open = proc_originators_open,
497 .read = seq_read,
498 .write = proc_dummy_write,
499 .llseek = seq_lseek,
500 .release = single_release,
501};
502
503static const struct file_operations proc_transt_local_fops = {
504 .owner = THIS_MODULE,
505 .open = proc_transt_local_open,
506 .read = seq_read,
507 .write = proc_dummy_write,
508 .llseek = seq_lseek,
509 .release = single_release,
510};
511
512static const struct file_operations proc_transt_global_fops = {
513 .owner = THIS_MODULE,
514 .open = proc_transt_global_open,
515 .read = seq_read,
516 .write = proc_dummy_write,
517 .llseek = seq_lseek,
518 .release = single_release,
519};
520
521static const struct file_operations proc_interfaces_fops = {
522 .owner = THIS_MODULE,
523 .open = proc_interfaces_open,
524 .read = seq_read,
525 .write = proc_interfaces_write,
526 .llseek = seq_lseek,
527 .release = single_release,
528};
529
530static const struct file_operations proc_orig_interval_fops = {
531 .owner = THIS_MODULE,
532 .open = proc_orig_interval_open,
533 .read = seq_read,
534 .write = proc_orig_interval_write,
535 .llseek = seq_lseek,
536 .release = single_release,
537};
538
539void cleanup_procfs(void)
540{
541 if (proc_transt_global_file)
542 remove_proc_entry(PROC_FILE_TRANST_GLOBAL, proc_batman_dir);
543
544 if (proc_transt_local_file)
545 remove_proc_entry(PROC_FILE_TRANST_LOCAL, proc_batman_dir);
546
547 if (proc_originators_file)
548 remove_proc_entry(PROC_FILE_ORIGINATORS, proc_batman_dir);
549
550 if (proc_orig_interval_file)
551 remove_proc_entry(PROC_FILE_ORIG_INTERVAL, proc_batman_dir);
552
553 if (proc_interface_file)
554 remove_proc_entry(PROC_FILE_INTERFACES, proc_batman_dir);
555
556 if (proc_vis_data_file)
557 remove_proc_entry(PROC_FILE_VIS_DATA, proc_batman_dir);
558
559 if (proc_vis_srv_file)
560 remove_proc_entry(PROC_FILE_VIS_SRV, proc_batman_dir);
561
562 if (proc_aggr_file)
563 remove_proc_entry(PROC_FILE_AGGR, proc_batman_dir);
564
565 if (proc_batman_dir)
566#ifdef __NET_NET_NAMESPACE_H
567 remove_proc_entry(PROC_ROOT_DIR, init_net.proc_net);
568#else
569 remove_proc_entry(PROC_ROOT_DIR, proc_net);
570#endif
571}
572
573int setup_procfs(void)
574{
575#ifdef __NET_NET_NAMESPACE_H
576 proc_batman_dir = proc_mkdir(PROC_ROOT_DIR, init_net.proc_net);
577#else
578 proc_batman_dir = proc_mkdir(PROC_ROOT_DIR, proc_net);
579#endif
580
581 if (!proc_batman_dir) {
582 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s' folder failed\n", PROC_ROOT_DIR);
583 return -EFAULT;
584 }
585
586 proc_interface_file = create_proc_entry(PROC_FILE_INTERFACES,
587 S_IWUSR | S_IRUGO,
588 proc_batman_dir);
589 if (proc_interface_file) {
590 proc_interface_file->proc_fops = &proc_interfaces_fops;
591 } else {
592 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_INTERFACES);
593 cleanup_procfs();
594 return -EFAULT;
595 }
596
597 proc_orig_interval_file = create_proc_entry(PROC_FILE_ORIG_INTERVAL,
598 S_IWUSR | S_IRUGO,
599 proc_batman_dir);
600 if (proc_orig_interval_file) {
601 proc_orig_interval_file->proc_fops = &proc_orig_interval_fops;
602 } else {
603 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_ORIG_INTERVAL);
604 cleanup_procfs();
605 return -EFAULT;
606 }
607
608 proc_originators_file = create_proc_entry(PROC_FILE_ORIGINATORS,
609 S_IRUGO, proc_batman_dir);
610 if (proc_originators_file) {
611 proc_originators_file->proc_fops = &proc_originators_fops;
612 } else {
613 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_ORIGINATORS);
614 cleanup_procfs();
615 return -EFAULT;
616 }
617
618 proc_transt_local_file = create_proc_entry(PROC_FILE_TRANST_LOCAL,
619 S_IRUGO, proc_batman_dir);
620 if (proc_transt_local_file) {
621 proc_transt_local_file->proc_fops = &proc_transt_local_fops;
622 } else {
623 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_TRANST_LOCAL);
624 cleanup_procfs();
625 return -EFAULT;
626 }
627
628 proc_transt_global_file = create_proc_entry(PROC_FILE_TRANST_GLOBAL,
629 S_IRUGO, proc_batman_dir);
630 if (proc_transt_global_file) {
631 proc_transt_global_file->proc_fops = &proc_transt_global_fops;
632 } else {
633 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_TRANST_GLOBAL);
634 cleanup_procfs();
635 return -EFAULT;
636 }
637
638 proc_vis_srv_file = create_proc_entry(PROC_FILE_VIS_SRV,
639 S_IWUSR | S_IRUGO,
640 proc_batman_dir);
641 if (proc_vis_srv_file) {
642 proc_vis_srv_file->proc_fops = &proc_vis_srv_fops;
643 } else {
644 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_VIS_SRV);
645 cleanup_procfs();
646 return -EFAULT;
647 }
648
649 proc_vis_data_file = create_proc_entry(PROC_FILE_VIS_DATA, S_IRUGO,
650 proc_batman_dir);
651 if (proc_vis_data_file) {
652 proc_vis_data_file->proc_fops = &proc_vis_data_fops;
653 } else {
654 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_VIS_DATA);
655 cleanup_procfs();
656 return -EFAULT;
657 }
658
659 proc_aggr_file = create_proc_entry(PROC_FILE_AGGR, S_IWUSR | S_IRUGO,
660 proc_batman_dir);
661 if (proc_aggr_file) {
662 proc_aggr_file->proc_fops = &proc_aggr_fops;
663 } else {
664 printk(KERN_ERR "batman-adv: Registering the '/proc/net/%s/%s' file failed\n", PROC_ROOT_DIR, PROC_FILE_AGGR);
665 cleanup_procfs();
666 return -EFAULT;
667 }
668
669 return 0;
670}
diff --git a/drivers/staging/batman-adv/proc.h b/drivers/staging/batman-adv/proc.h
deleted file mode 100644
index cd690e0f3e44..000000000000
--- a/drivers/staging/batman-adv/proc.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors:
3 *
4 * Marek Lindner, Simon Wunderlich
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of version 2 of the GNU General Public
8 * License as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA
19 *
20 */
21
22#include <linux/proc_fs.h>
23#include <linux/seq_file.h>
24
25#define PROC_ROOT_DIR "batman-adv"
26#define PROC_FILE_INTERFACES "interfaces"
27#define PROC_FILE_ORIG_INTERVAL "orig_interval"
28#define PROC_FILE_ORIGINATORS "originators"
29#define PROC_FILE_GATEWAYS "gateways"
30#define PROC_FILE_LOG "log"
31#define PROC_FILE_LOG_LEVEL "log_level"
32#define PROC_FILE_TRANST_LOCAL "transtable_local"
33#define PROC_FILE_TRANST_GLOBAL "transtable_global"
34#define PROC_FILE_VIS_SRV "vis_server"
35#define PROC_FILE_VIS_DATA "vis_data"
36#define PROC_FILE_AGGR "aggregate_ogm"
37
38void cleanup_procfs(void);
39int setup_procfs(void);
40
diff --git a/drivers/staging/batman-adv/ring_buffer.c b/drivers/staging/batman-adv/ring_buffer.c
index 751c899f54c5..defd37c9be1f 100644
--- a/drivers/staging/batman-adv/ring_buffer.c
+++ b/drivers/staging/batman-adv/ring_buffer.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner 4 * Marek Lindner
5 * 5 *
diff --git a/drivers/staging/batman-adv/ring_buffer.h b/drivers/staging/batman-adv/ring_buffer.h
index 6839ba97eeb3..b8c9456558bc 100644
--- a/drivers/staging/batman-adv/ring_buffer.h
+++ b/drivers/staging/batman-adv/ring_buffer.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner 4 * Marek Lindner
5 * 5 *
diff --git a/drivers/staging/batman-adv/routing.c b/drivers/staging/batman-adv/routing.c
index d89048beebe1..066dc8b38817 100644
--- a/drivers/staging/batman-adv/routing.c
+++ b/drivers/staging/batman-adv/routing.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -94,14 +94,13 @@ static void update_route(struct orig_node *orig_node,
94 94
95 /* route changed */ 95 /* route changed */
96 } else { 96 } else {
97 bat_dbg(DBG_ROUTES, "Changing route towards: %pM (now via %pM - was via %pM)\n", orig_node->orig, neigh_node->addr, orig_node->router->addr); 97 bat_dbg(DBG_ROUTES,
98 "Changing route towards: %pM "
99 "(now via %pM - was via %pM)\n",
100 orig_node->orig, neigh_node->addr,
101 orig_node->router->addr);
98 } 102 }
99 103
100 if (neigh_node != NULL)
101 orig_node->batman_if = neigh_node->if_incoming;
102 else
103 orig_node->batman_if = NULL;
104
105 orig_node->router = neigh_node; 104 orig_node->router = neigh_node;
106} 105}
107 106
@@ -210,9 +209,13 @@ static int isBidirectionalNeigh(struct orig_node *orig_node,
210 batman_packet->tq = ((batman_packet->tq * 209 batman_packet->tq = ((batman_packet->tq *
211 orig_neigh_node->tq_own * 210 orig_neigh_node->tq_own *
212 orig_neigh_node->tq_asym_penalty) / 211 orig_neigh_node->tq_asym_penalty) /
213 (TQ_MAX_VALUE * TQ_MAX_VALUE)); 212 (TQ_MAX_VALUE * TQ_MAX_VALUE));
214 213
215 bat_dbg(DBG_BATMAN, "bidirectional: orig = %-15pM neigh = %-15pM => own_bcast = %2i, real recv = %2i, local tq: %3i, asym_penalty: %3i, total tq: %3i \n", 214 bat_dbg(DBG_BATMAN,
215 "bidirectional: "
216 "orig = %-15pM neigh = %-15pM => own_bcast = %2i, "
217 "real recv = %2i, local tq: %3i, asym_penalty: %3i, "
218 "total tq: %3i\n",
216 orig_node->orig, orig_neigh_node->orig, total_count, 219 orig_node->orig, orig_neigh_node->orig, total_count,
217 neigh_node->real_packet_count, orig_neigh_node->tq_own, 220 neigh_node->real_packet_count, orig_neigh_node->tq_own,
218 orig_neigh_node->tq_asym_penalty, batman_packet->tq); 221 orig_neigh_node->tq_asym_penalty, batman_packet->tq);
@@ -234,7 +237,8 @@ static void update_orig(struct orig_node *orig_node, struct ethhdr *ethhdr,
234 struct neigh_node *neigh_node = NULL, *tmp_neigh_node = NULL; 237 struct neigh_node *neigh_node = NULL, *tmp_neigh_node = NULL;
235 int tmp_hna_buff_len; 238 int tmp_hna_buff_len;
236 239
237 bat_dbg(DBG_BATMAN, "update_originator(): Searching and updating originator entry of received packet \n"); 240 bat_dbg(DBG_BATMAN, "update_originator(): "
241 "Searching and updating originator entry of received packet\n");
238 242
239 list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) { 243 list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) {
240 if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) && 244 if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) &&
@@ -309,6 +313,38 @@ update_hna:
309 update_routes(orig_node, orig_node->router, hna_buff, tmp_hna_buff_len); 313 update_routes(orig_node, orig_node->router, hna_buff, tmp_hna_buff_len);
310} 314}
311 315
316/* checks whether the host restarted and is in the protection time.
317 * returns:
318 * 0 if the packet is to be accepted
319 * 1 if the packet is to be ignored.
320 */
321static int window_protected(int16_t seq_num_diff,
322 unsigned long *last_reset)
323{
324 if ((seq_num_diff <= -TQ_LOCAL_WINDOW_SIZE)
325 || (seq_num_diff >= EXPECTED_SEQNO_RANGE)) {
326 if (time_after(jiffies, *last_reset +
327 msecs_to_jiffies(RESET_PROTECTION_MS))) {
328
329 *last_reset = jiffies;
330 bat_dbg(DBG_BATMAN,
331 "old packet received, start protection\n");
332
333 return 0;
334 } else
335 return 1;
336 }
337 return 0;
338}
339
340/* processes a batman packet for all interfaces, adjusts the sequence number and
341 * finds out whether it is a duplicate.
342 * returns:
343 * 1 the packet is a duplicate
344 * 0 the packet has not yet been received
345 * -1 the packet is old and has been received while the seqno window
346 * was protected. Caller should drop it.
347 */
312static char count_real_packets(struct ethhdr *ethhdr, 348static char count_real_packets(struct ethhdr *ethhdr,
313 struct batman_packet *batman_packet, 349 struct batman_packet *batman_packet,
314 struct batman_if *if_incoming) 350 struct batman_if *if_incoming)
@@ -316,32 +352,42 @@ static char count_real_packets(struct ethhdr *ethhdr,
316 struct orig_node *orig_node; 352 struct orig_node *orig_node;
317 struct neigh_node *tmp_neigh_node; 353 struct neigh_node *tmp_neigh_node;
318 char is_duplicate = 0; 354 char is_duplicate = 0;
319 uint16_t seq_diff; 355 int16_t seq_diff;
356 int need_update = 0;
357 int set_mark;
320 358
321 orig_node = get_orig_node(batman_packet->orig); 359 orig_node = get_orig_node(batman_packet->orig);
322 if (orig_node == NULL) 360 if (orig_node == NULL)
323 return 0; 361 return 0;
324 362
363 seq_diff = batman_packet->seqno - orig_node->last_real_seqno;
364
365 /* signalize caller that the packet is to be dropped. */
366 if (window_protected(seq_diff, &orig_node->batman_seqno_reset))
367 return -1;
368
325 list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) { 369 list_for_each_entry(tmp_neigh_node, &orig_node->neigh_list, list) {
326 370
327 if (!is_duplicate) 371 is_duplicate |= get_bit_status(tmp_neigh_node->real_bits,
328 is_duplicate =
329 get_bit_status(tmp_neigh_node->real_bits,
330 orig_node->last_real_seqno, 372 orig_node->last_real_seqno,
331 batman_packet->seqno); 373 batman_packet->seqno);
332 seq_diff = batman_packet->seqno - orig_node->last_real_seqno; 374
333 if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) && 375 if (compare_orig(tmp_neigh_node->addr, ethhdr->h_source) &&
334 (tmp_neigh_node->if_incoming == if_incoming)) 376 (tmp_neigh_node->if_incoming == if_incoming))
335 bit_get_packet(tmp_neigh_node->real_bits, seq_diff, 1); 377 set_mark = 1;
336 else 378 else
337 bit_get_packet(tmp_neigh_node->real_bits, seq_diff, 0); 379 set_mark = 0;
380
381 /* if the window moved, set the update flag. */
382 need_update |= bit_get_packet(tmp_neigh_node->real_bits,
383 seq_diff, set_mark);
338 384
339 tmp_neigh_node->real_packet_count = 385 tmp_neigh_node->real_packet_count =
340 bit_packet_count(tmp_neigh_node->real_bits); 386 bit_packet_count(tmp_neigh_node->real_bits);
341 } 387 }
342 388
343 if (!is_duplicate) { 389 if (need_update) {
344 bat_dbg(DBG_BATMAN, "updating last_seqno: old %d, new %d \n", 390 bat_dbg(DBG_BATMAN, "updating last_seqno: old %d, new %d\n",
345 orig_node->last_real_seqno, batman_packet->seqno); 391 orig_node->last_real_seqno, batman_packet->seqno);
346 orig_node->last_real_seqno = batman_packet->seqno; 392 orig_node->last_real_seqno = batman_packet->seqno;
347 } 393 }
@@ -385,14 +431,16 @@ void receive_bat_packet(struct ethhdr *ethhdr,
385 is_single_hop_neigh = (compare_orig(ethhdr->h_source, 431 is_single_hop_neigh = (compare_orig(ethhdr->h_source,
386 batman_packet->orig) ? 1 : 0); 432 batman_packet->orig) ? 1 : 0);
387 433
388 bat_dbg(DBG_BATMAN, "Received BATMAN packet via NB: %pM, IF: %s [%s] (from OG: %pM, via prev OG: %pM, seqno %d, tq %d, TTL %d, V %d, IDF %d) \n", 434 bat_dbg(DBG_BATMAN, "Received BATMAN packet via NB: %pM, IF: %s [%s] "
435 "(from OG: %pM, via prev OG: %pM, seqno %d, tq %d, "
436 "TTL %d, V %d, IDF %d)\n",
389 ethhdr->h_source, if_incoming->dev, if_incoming->addr_str, 437 ethhdr->h_source, if_incoming->dev, if_incoming->addr_str,
390 batman_packet->orig, batman_packet->prev_sender, 438 batman_packet->orig, batman_packet->prev_sender,
391 batman_packet->seqno, batman_packet->tq, batman_packet->ttl, 439 batman_packet->seqno, batman_packet->tq, batman_packet->ttl,
392 batman_packet->version, has_directlink_flag); 440 batman_packet->version, has_directlink_flag);
393 441
394 list_for_each_entry_rcu(batman_if, &if_list, list) { 442 list_for_each_entry_rcu(batman_if, &if_list, list) {
395 if (batman_if->if_active != IF_ACTIVE) 443 if (batman_if->if_status != IF_ACTIVE)
396 continue; 444 continue;
397 445
398 if (compare_orig(ethhdr->h_source, 446 if (compare_orig(ethhdr->h_source,
@@ -420,13 +468,16 @@ void receive_bat_packet(struct ethhdr *ethhdr,
420 468
421 if (is_my_addr) { 469 if (is_my_addr) {
422 bat_dbg(DBG_BATMAN, 470 bat_dbg(DBG_BATMAN,
423 "Drop packet: received my own broadcast (sender: %pM)\n", 471 "Drop packet: received my own broadcast (sender: %pM"
472 ")\n",
424 ethhdr->h_source); 473 ethhdr->h_source);
425 return; 474 return;
426 } 475 }
427 476
428 if (is_broadcast) { 477 if (is_broadcast) {
429 bat_dbg(DBG_BATMAN, "Drop packet: ignoring all packets with broadcast source addr (sender: %pM) \n", ethhdr->h_source); 478 bat_dbg(DBG_BATMAN, "Drop packet: "
479 "ignoring all packets with broadcast source addr (sender: %pM"
480 ")\n", ethhdr->h_source);
430 return; 481 return;
431 } 482 }
432 483
@@ -454,27 +505,36 @@ void receive_bat_packet(struct ethhdr *ethhdr,
454 bit_packet_count(word); 505 bit_packet_count(word);
455 } 506 }
456 507
457 bat_dbg(DBG_BATMAN, "Drop packet: originator packet from myself (via neighbor) \n"); 508 bat_dbg(DBG_BATMAN, "Drop packet: "
509 "originator packet from myself (via neighbor)\n");
458 return; 510 return;
459 } 511 }
460 512
461 if (batman_packet->tq == 0) { 513 if (is_my_oldorig) {
462 count_real_packets(ethhdr, batman_packet, if_incoming); 514 bat_dbg(DBG_BATMAN,
463 515 "Drop packet: ignoring all rebroadcast echos (sender: "
464 bat_dbg(DBG_BATMAN, "Drop packet: originator packet with tq equal 0 \n"); 516 "%pM)\n", ethhdr->h_source);
465 return; 517 return;
466 } 518 }
467 519
468 if (is_my_oldorig) { 520 orig_node = get_orig_node(batman_packet->orig);
469 bat_dbg(DBG_BATMAN, "Drop packet: ignoring all rebroadcast echos (sender: %pM) \n", ethhdr->h_source); 521 if (orig_node == NULL)
470 return; 522 return;
471 }
472 523
473 is_duplicate = count_real_packets(ethhdr, batman_packet, if_incoming); 524 is_duplicate = count_real_packets(ethhdr, batman_packet, if_incoming);
474 525
475 orig_node = get_orig_node(batman_packet->orig); 526 if (is_duplicate == -1) {
476 if (orig_node == NULL) 527 bat_dbg(DBG_BATMAN,
528 "Drop packet: packet within seqno protection time "
529 "(sender: %pM)\n", ethhdr->h_source);
530 return;
531 }
532
533 if (batman_packet->tq == 0) {
534 bat_dbg(DBG_BATMAN,
535 "Drop packet: originator packet with tq equal 0\n");
477 return; 536 return;
537 }
478 538
479 /* avoid temporary routing loops */ 539 /* avoid temporary routing loops */
480 if ((orig_node->router) && 540 if ((orig_node->router) &&
@@ -484,7 +544,9 @@ void receive_bat_packet(struct ethhdr *ethhdr,
484 !(compare_orig(batman_packet->orig, batman_packet->prev_sender)) && 544 !(compare_orig(batman_packet->orig, batman_packet->prev_sender)) &&
485 (compare_orig(orig_node->router->addr, 545 (compare_orig(orig_node->router->addr,
486 orig_node->router->orig_node->router->addr))) { 546 orig_node->router->orig_node->router->addr))) {
487 bat_dbg(DBG_BATMAN, "Drop packet: ignoring all rebroadcast packets that may make me loop (sender: %pM) \n", ethhdr->h_source); 547 bat_dbg(DBG_BATMAN,
548 "Drop packet: ignoring all rebroadcast packets that "
549 "may make me loop (sender: %pM)\n", ethhdr->h_source);
488 return; 550 return;
489 } 551 }
490 552
@@ -522,7 +584,8 @@ void receive_bat_packet(struct ethhdr *ethhdr,
522 schedule_forward_packet(orig_node, ethhdr, batman_packet, 584 schedule_forward_packet(orig_node, ethhdr, batman_packet,
523 1, hna_buff_len, if_incoming); 585 1, hna_buff_len, if_incoming);
524 586
525 bat_dbg(DBG_BATMAN, "Forwarding packet: rebroadcast neighbor packet with direct link flag\n"); 587 bat_dbg(DBG_BATMAN, "Forwarding packet: "
588 "rebroadcast neighbor packet with direct link flag\n");
526 return; 589 return;
527 } 590 }
528 591
@@ -549,6 +612,7 @@ int recv_bat_packet(struct sk_buff *skb,
549{ 612{
550 struct ethhdr *ethhdr; 613 struct ethhdr *ethhdr;
551 unsigned long flags; 614 unsigned long flags;
615 struct sk_buff *skb_old;
552 616
553 /* drop packet if it has not necessary minimum size */ 617 /* drop packet if it has not necessary minimum size */
554 if (skb_headlen(skb) < sizeof(struct batman_packet)) 618 if (skb_headlen(skb) < sizeof(struct batman_packet))
@@ -564,12 +628,20 @@ int recv_bat_packet(struct sk_buff *skb,
564 if (is_bcast(ethhdr->h_source)) 628 if (is_bcast(ethhdr->h_source))
565 return NET_RX_DROP; 629 return NET_RX_DROP;
566 630
567 spin_lock_irqsave(&orig_hash_lock, flags);
568 /* TODO: we use headlen instead of "length", because 631 /* TODO: we use headlen instead of "length", because
569 * only this data is paged in. */ 632 * only this data is paged in. */
570 /* TODO: is another skb_copy needed here? there will be 633
571 * written on the data, but nobody (?) should further use 634 /* create a copy of the skb, if needed, to modify it. */
572 * this data */ 635 if (!skb_clone_writable(skb, skb_headlen(skb))) {
636 skb_old = skb;
637 skb = skb_copy(skb, GFP_ATOMIC);
638 if (!skb)
639 return NET_RX_DROP;
640 ethhdr = (struct ethhdr *)skb_mac_header(skb);
641 kfree_skb(skb_old);
642 }
643
644 spin_lock_irqsave(&orig_hash_lock, flags);
573 receive_aggr_bat_packet(ethhdr, 645 receive_aggr_bat_packet(ethhdr,
574 skb->data, 646 skb->data,
575 skb_headlen(skb), 647 skb_headlen(skb),
@@ -591,8 +663,8 @@ static int recv_my_icmp_packet(struct sk_buff *skb)
591 unsigned long flags; 663 unsigned long flags;
592 uint8_t dstaddr[ETH_ALEN]; 664 uint8_t dstaddr[ETH_ALEN];
593 665
594 icmp_packet = (struct icmp_packet *) skb->data; 666 icmp_packet = (struct icmp_packet *)skb->data;
595 ethhdr = (struct ethhdr *) skb_mac_header(skb); 667 ethhdr = (struct ethhdr *)skb_mac_header(skb);
596 668
597 /* add data to device queue */ 669 /* add data to device queue */
598 if (icmp_packet->msg_type != ECHO_REQUEST) { 670 if (icmp_packet->msg_type != ECHO_REQUEST) {
@@ -608,12 +680,11 @@ static int recv_my_icmp_packet(struct sk_buff *skb)
608 ret = NET_RX_DROP; 680 ret = NET_RX_DROP;
609 681
610 if ((orig_node != NULL) && 682 if ((orig_node != NULL) &&
611 (orig_node->batman_if != NULL) &&
612 (orig_node->router != NULL)) { 683 (orig_node->router != NULL)) {
613 684
614 /* don't lock while sending the packets ... we therefore 685 /* don't lock while sending the packets ... we therefore
615 * copy the required data before sending */ 686 * copy the required data before sending */
616 batman_if = orig_node->batman_if; 687 batman_if = orig_node->router->if_incoming;
617 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); 688 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN);
618 spin_unlock_irqrestore(&orig_hash_lock, flags); 689 spin_unlock_irqrestore(&orig_hash_lock, flags);
619 690
@@ -624,7 +695,9 @@ static int recv_my_icmp_packet(struct sk_buff *skb)
624 skb = skb_copy(skb, GFP_ATOMIC); 695 skb = skb_copy(skb, GFP_ATOMIC);
625 if (!skb) 696 if (!skb)
626 return NET_RX_DROP; 697 return NET_RX_DROP;
627 icmp_packet = (struct icmp_packet *) skb->data; 698
699 icmp_packet = (struct icmp_packet *)skb->data;
700 ethhdr = (struct ethhdr *)skb_mac_header(skb);
628 kfree_skb(skb_old); 701 kfree_skb(skb_old);
629 } 702 }
630 703
@@ -658,8 +731,10 @@ static int recv_icmp_ttl_exceeded(struct sk_buff *skb)
658 731
659 /* send TTL exceeded if packet is an echo request (traceroute) */ 732 /* send TTL exceeded if packet is an echo request (traceroute) */
660 if (icmp_packet->msg_type != ECHO_REQUEST) { 733 if (icmp_packet->msg_type != ECHO_REQUEST) {
661 printk(KERN_WARNING "batman-adv:Warning - can't forward icmp packet from %pM to %pM: ttl exceeded\n", 734 printk(KERN_WARNING "batman-adv:"
662 icmp_packet->orig, icmp_packet->dst); 735 "Warning - can't forward icmp packet from %pM to %pM: "
736 "ttl exceeded\n",
737 icmp_packet->orig, icmp_packet->dst);
663 return NET_RX_DROP; 738 return NET_RX_DROP;
664 } 739 }
665 740
@@ -670,12 +745,11 @@ static int recv_icmp_ttl_exceeded(struct sk_buff *skb)
670 ret = NET_RX_DROP; 745 ret = NET_RX_DROP;
671 746
672 if ((orig_node != NULL) && 747 if ((orig_node != NULL) &&
673 (orig_node->batman_if != NULL) &&
674 (orig_node->router != NULL)) { 748 (orig_node->router != NULL)) {
675 749
676 /* don't lock while sending the packets ... we therefore 750 /* don't lock while sending the packets ... we therefore
677 * copy the required data before sending */ 751 * copy the required data before sending */
678 batman_if = orig_node->batman_if; 752 batman_if = orig_node->router->if_incoming;
679 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); 753 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN);
680 spin_unlock_irqrestore(&orig_hash_lock, flags); 754 spin_unlock_irqrestore(&orig_hash_lock, flags);
681 755
@@ -686,6 +760,7 @@ static int recv_icmp_ttl_exceeded(struct sk_buff *skb)
686 if (!skb) 760 if (!skb)
687 return NET_RX_DROP; 761 return NET_RX_DROP;
688 icmp_packet = (struct icmp_packet *) skb->data; 762 icmp_packet = (struct icmp_packet *) skb->data;
763 ethhdr = (struct ethhdr *)skb_mac_header(skb);
689 kfree_skb(skb_old); 764 kfree_skb(skb_old);
690 } 765 }
691 766
@@ -734,7 +809,7 @@ int recv_icmp_packet(struct sk_buff *skb)
734 if (!is_my_mac(ethhdr->h_dest)) 809 if (!is_my_mac(ethhdr->h_dest))
735 return NET_RX_DROP; 810 return NET_RX_DROP;
736 811
737 icmp_packet = (struct icmp_packet *) skb->data; 812 icmp_packet = (struct icmp_packet *)skb->data;
738 813
739 /* packet for me */ 814 /* packet for me */
740 if (is_my_mac(icmp_packet->dst)) 815 if (is_my_mac(icmp_packet->dst))
@@ -752,12 +827,11 @@ int recv_icmp_packet(struct sk_buff *skb)
752 hash_find(orig_hash, icmp_packet->dst)); 827 hash_find(orig_hash, icmp_packet->dst));
753 828
754 if ((orig_node != NULL) && 829 if ((orig_node != NULL) &&
755 (orig_node->batman_if != NULL) &&
756 (orig_node->router != NULL)) { 830 (orig_node->router != NULL)) {
757 831
758 /* don't lock while sending the packets ... we therefore 832 /* don't lock while sending the packets ... we therefore
759 * copy the required data before sending */ 833 * copy the required data before sending */
760 batman_if = orig_node->batman_if; 834 batman_if = orig_node->router->if_incoming;
761 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); 835 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN);
762 spin_unlock_irqrestore(&orig_hash_lock, flags); 836 spin_unlock_irqrestore(&orig_hash_lock, flags);
763 837
@@ -767,7 +841,8 @@ int recv_icmp_packet(struct sk_buff *skb)
767 skb = skb_copy(skb, GFP_ATOMIC); 841 skb = skb_copy(skb, GFP_ATOMIC);
768 if (!skb) 842 if (!skb)
769 return NET_RX_DROP; 843 return NET_RX_DROP;
770 icmp_packet = (struct icmp_packet *) skb->data; 844 icmp_packet = (struct icmp_packet *)skb->data;
845 ethhdr = (struct ethhdr *)skb_mac_header(skb);
771 kfree_skb(skb_old); 846 kfree_skb(skb_old);
772 } 847 }
773 848
@@ -824,7 +899,9 @@ int recv_unicast_packet(struct sk_buff *skb)
824 899
825 /* TTL exceeded */ 900 /* TTL exceeded */
826 if (unicast_packet->ttl < 2) { 901 if (unicast_packet->ttl < 2) {
827 printk(KERN_WARNING "batman-adv:Warning - can't forward unicast packet from %pM to %pM: ttl exceeded\n", 902 printk(KERN_WARNING "batman-adv:Warning - "
903 "can't forward unicast packet from %pM to %pM: "
904 "ttl exceeded\n",
828 ethhdr->h_source, unicast_packet->dest); 905 ethhdr->h_source, unicast_packet->dest);
829 return NET_RX_DROP; 906 return NET_RX_DROP;
830 } 907 }
@@ -836,12 +913,11 @@ int recv_unicast_packet(struct sk_buff *skb)
836 hash_find(orig_hash, unicast_packet->dest)); 913 hash_find(orig_hash, unicast_packet->dest));
837 914
838 if ((orig_node != NULL) && 915 if ((orig_node != NULL) &&
839 (orig_node->batman_if != NULL) &&
840 (orig_node->router != NULL)) { 916 (orig_node->router != NULL)) {
841 917
842 /* don't lock while sending the packets ... we therefore 918 /* don't lock while sending the packets ... we therefore
843 * copy the required data before sending */ 919 * copy the required data before sending */
844 batman_if = orig_node->batman_if; 920 batman_if = orig_node->router->if_incoming;
845 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); 921 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN);
846 spin_unlock_irqrestore(&orig_hash_lock, flags); 922 spin_unlock_irqrestore(&orig_hash_lock, flags);
847 923
@@ -851,7 +927,8 @@ int recv_unicast_packet(struct sk_buff *skb)
851 skb = skb_copy(skb, GFP_ATOMIC); 927 skb = skb_copy(skb, GFP_ATOMIC);
852 if (!skb) 928 if (!skb)
853 return NET_RX_DROP; 929 return NET_RX_DROP;
854 unicast_packet = (struct unicast_packet *) skb->data; 930 unicast_packet = (struct unicast_packet *)skb->data;
931 ethhdr = (struct ethhdr *)skb_mac_header(skb);
855 kfree_skb(skb_old); 932 kfree_skb(skb_old);
856 } 933 }
857 /* decrement ttl */ 934 /* decrement ttl */
@@ -867,13 +944,13 @@ int recv_unicast_packet(struct sk_buff *skb)
867 return ret; 944 return ret;
868} 945}
869 946
870
871int recv_bcast_packet(struct sk_buff *skb) 947int recv_bcast_packet(struct sk_buff *skb)
872{ 948{
873 struct orig_node *orig_node; 949 struct orig_node *orig_node;
874 struct bcast_packet *bcast_packet; 950 struct bcast_packet *bcast_packet;
875 struct ethhdr *ethhdr; 951 struct ethhdr *ethhdr;
876 int hdr_size = sizeof(struct bcast_packet); 952 int hdr_size = sizeof(struct bcast_packet);
953 int16_t seq_diff;
877 unsigned long flags; 954 unsigned long flags;
878 955
879 /* drop packet if it has not necessary minimum size */ 956 /* drop packet if it has not necessary minimum size */
@@ -894,7 +971,7 @@ int recv_bcast_packet(struct sk_buff *skb)
894 if (is_my_mac(ethhdr->h_source)) 971 if (is_my_mac(ethhdr->h_source))
895 return NET_RX_DROP; 972 return NET_RX_DROP;
896 973
897 bcast_packet = (struct bcast_packet *) skb->data; 974 bcast_packet = (struct bcast_packet *)skb->data;
898 975
899 /* ignore broadcasts originated by myself */ 976 /* ignore broadcasts originated by myself */
900 if (is_my_mac(bcast_packet->orig)) 977 if (is_my_mac(bcast_packet->orig))
@@ -909,7 +986,7 @@ int recv_bcast_packet(struct sk_buff *skb)
909 return NET_RX_DROP; 986 return NET_RX_DROP;
910 } 987 }
911 988
912 /* check flood history */ 989 /* check whether the packet is a duplicate */
913 if (get_bit_status(orig_node->bcast_bits, 990 if (get_bit_status(orig_node->bcast_bits,
914 orig_node->last_bcast_seqno, 991 orig_node->last_bcast_seqno,
915 ntohs(bcast_packet->seqno))) { 992 ntohs(bcast_packet->seqno))) {
@@ -917,14 +994,20 @@ int recv_bcast_packet(struct sk_buff *skb)
917 return NET_RX_DROP; 994 return NET_RX_DROP;
918 } 995 }
919 996
920 /* mark broadcast in flood history */ 997 seq_diff = ntohs(bcast_packet->seqno) - orig_node->last_bcast_seqno;
921 if (bit_get_packet(orig_node->bcast_bits, 998
922 ntohs(bcast_packet->seqno) - 999 /* check whether the packet is old and the host just restarted. */
923 orig_node->last_bcast_seqno, 1)) 1000 if (window_protected(seq_diff, &orig_node->bcast_seqno_reset)) {
1001 spin_unlock_irqrestore(&orig_hash_lock, flags);
1002 return NET_RX_DROP;
1003 }
1004
1005 /* mark broadcast in flood history, update window position
1006 * if required. */
1007 if (bit_get_packet(orig_node->bcast_bits, seq_diff, 1))
924 orig_node->last_bcast_seqno = ntohs(bcast_packet->seqno); 1008 orig_node->last_bcast_seqno = ntohs(bcast_packet->seqno);
925 1009
926 spin_unlock_irqrestore(&orig_hash_lock, flags); 1010 spin_unlock_irqrestore(&orig_hash_lock, flags);
927
928 /* rebroadcast packet */ 1011 /* rebroadcast packet */
929 add_bcast_packet_to_list(skb); 1012 add_bcast_packet_to_list(skb);
930 1013
@@ -938,6 +1021,7 @@ int recv_vis_packet(struct sk_buff *skb)
938{ 1021{
939 struct vis_packet *vis_packet; 1022 struct vis_packet *vis_packet;
940 struct ethhdr *ethhdr; 1023 struct ethhdr *ethhdr;
1024 struct bat_priv *bat_priv;
941 int hdr_size = sizeof(struct vis_packet); 1025 int hdr_size = sizeof(struct vis_packet);
942 1026
943 if (skb_headlen(skb) < hdr_size) 1027 if (skb_headlen(skb) < hdr_size)
@@ -957,15 +1041,20 @@ int recv_vis_packet(struct sk_buff *skb)
957 if (is_my_mac(vis_packet->sender_orig)) 1041 if (is_my_mac(vis_packet->sender_orig))
958 return NET_RX_DROP; 1042 return NET_RX_DROP;
959 1043
1044 /* FIXME: each batman_if will be attached to a softif */
1045 bat_priv = netdev_priv(soft_device);
1046
960 switch (vis_packet->vis_type) { 1047 switch (vis_packet->vis_type) {
961 case VIS_TYPE_SERVER_SYNC: 1048 case VIS_TYPE_SERVER_SYNC:
962 /* TODO: handle fragmented skbs properly */ 1049 /* TODO: handle fragmented skbs properly */
963 receive_server_sync_packet(vis_packet, skb_headlen(skb)); 1050 receive_server_sync_packet(bat_priv, vis_packet,
1051 skb_headlen(skb));
964 break; 1052 break;
965 1053
966 case VIS_TYPE_CLIENT_UPDATE: 1054 case VIS_TYPE_CLIENT_UPDATE:
967 /* TODO: handle fragmented skbs properly */ 1055 /* TODO: handle fragmented skbs properly */
968 receive_client_update_packet(vis_packet, skb_headlen(skb)); 1056 receive_client_update_packet(bat_priv, vis_packet,
1057 skb_headlen(skb));
969 break; 1058 break;
970 1059
971 default: /* ignore unknown packet */ 1060 default: /* ignore unknown packet */
diff --git a/drivers/staging/batman-adv/routing.h b/drivers/staging/batman-adv/routing.h
index 939b8d4f733c..8288decea370 100644
--- a/drivers/staging/batman-adv/routing.h
+++ b/drivers/staging/batman-adv/routing.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
diff --git a/drivers/staging/batman-adv/send.c b/drivers/staging/batman-adv/send.c
index 2a9fac8c240e..d8536e277a26 100644
--- a/drivers/staging/batman-adv/send.c
+++ b/drivers/staging/batman-adv/send.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -36,25 +36,17 @@ static uint8_t hop_penalty(const uint8_t tq)
36} 36}
37 37
38/* when do we schedule our own packet to be sent */ 38/* when do we schedule our own packet to be sent */
39static unsigned long own_send_time(void) 39static unsigned long own_send_time(struct bat_priv *bat_priv)
40{ 40{
41 return jiffies + 41 return jiffies +
42 (((atomic_read(&originator_interval) - JITTER + 42 (((atomic_read(&bat_priv->orig_interval) - JITTER +
43 (random32() % 2*JITTER)) * HZ) / 1000); 43 (random32() % 2*JITTER)) * HZ) / 1000);
44} 44}
45 45
46/* when do we schedule a forwarded packet to be sent */ 46/* when do we schedule a forwarded packet to be sent */
47static unsigned long forward_send_time(void) 47static unsigned long forward_send_time(struct bat_priv *bat_priv)
48{ 48{
49 unsigned long send_time = jiffies; /* Starting now plus... */ 49 return jiffies + (((random32() % (JITTER/2)) * HZ) / 1000);
50
51 if (atomic_read(&aggregation_enabled))
52 send_time += (((MAX_AGGREGATION_MS - (JITTER/2) +
53 (random32() % JITTER)) * HZ) / 1000);
54 else
55 send_time += (((random32() % (JITTER/2)) * HZ) / 1000);
56
57 return send_time;
58} 50}
59 51
60/* send out an already prepared packet to the given address via the 52/* send out an already prepared packet to the given address via the
@@ -65,7 +57,7 @@ int send_skb_packet(struct sk_buff *skb,
65{ 57{
66 struct ethhdr *ethhdr; 58 struct ethhdr *ethhdr;
67 59
68 if (batman_if->if_active != IF_ACTIVE) 60 if (batman_if->if_status != IF_ACTIVE)
69 goto send_skb_err; 61 goto send_skb_err;
70 62
71 if (unlikely(!batman_if->net_dev)) 63 if (unlikely(!batman_if->net_dev))
@@ -73,7 +65,8 @@ int send_skb_packet(struct sk_buff *skb,
73 65
74 if (!(batman_if->net_dev->flags & IFF_UP)) { 66 if (!(batman_if->net_dev->flags & IFF_UP)) {
75 printk(KERN_WARNING 67 printk(KERN_WARNING
76 "batman-adv:Interface %s is not up - can't send packet via that interface!\n", 68 "batman-adv:Interface %s "
69 "is not up - can't send packet via that interface!\n",
77 batman_if->dev); 70 batman_if->dev);
78 goto send_skb_err; 71 goto send_skb_err;
79 } 72 }
@@ -131,10 +124,11 @@ static void send_packet_to_if(struct forw_packet *forw_packet,
131 int16_t buff_pos; 124 int16_t buff_pos;
132 struct batman_packet *batman_packet; 125 struct batman_packet *batman_packet;
133 126
134 if (batman_if->if_active != IF_ACTIVE) 127 if (batman_if->if_status != IF_ACTIVE)
135 return; 128 return;
136 129
137 packet_num = buff_pos = 0; 130 packet_num = 0;
131 buff_pos = 0;
138 batman_packet = (struct batman_packet *) 132 batman_packet = (struct batman_packet *)
139 (forw_packet->packet_buff); 133 (forw_packet->packet_buff);
140 134
@@ -155,9 +149,9 @@ static void send_packet_to_if(struct forw_packet *forw_packet,
155 "Sending own" : 149 "Sending own" :
156 "Forwarding")); 150 "Forwarding"));
157 bat_dbg(DBG_BATMAN, 151 bat_dbg(DBG_BATMAN,
158 "%s %spacket (originator %pM, seqno %d, TQ %d, TTL %d, IDF %s) on interface %s [%s]\n", 152 "%s %spacket (originator %pM, seqno %d, TQ %d, TTL %d,"
159 fwd_str, 153 " IDF %s) on interface %s [%s]\n",
160 (packet_num > 0 ? "aggregated " : ""), 154 fwd_str, (packet_num > 0 ? "aggregated " : ""),
161 batman_packet->orig, ntohs(batman_packet->seqno), 155 batman_packet->orig, ntohs(batman_packet->seqno),
162 batman_packet->tq, batman_packet->ttl, 156 batman_packet->tq, batman_packet->ttl,
163 (batman_packet->flags & DIRECTLINK ? 157 (batman_packet->flags & DIRECTLINK ?
@@ -185,11 +179,12 @@ static void send_packet(struct forw_packet *forw_packet)
185 unsigned char directlink = (batman_packet->flags & DIRECTLINK ? 1 : 0); 179 unsigned char directlink = (batman_packet->flags & DIRECTLINK ? 1 : 0);
186 180
187 if (!forw_packet->if_incoming) { 181 if (!forw_packet->if_incoming) {
188 printk(KERN_ERR "batman-adv: Error - can't forward packet: incoming iface not specified\n"); 182 printk(KERN_ERR "batman-adv: Error - can't forward packet: "
183 "incoming iface not specified\n");
189 return; 184 return;
190 } 185 }
191 186
192 if (forw_packet->if_incoming->if_active != IF_ACTIVE) 187 if (forw_packet->if_incoming->if_status != IF_ACTIVE)
193 return; 188 return;
194 189
195 /* multihomed peer assumed */ 190 /* multihomed peer assumed */
@@ -199,7 +194,8 @@ static void send_packet(struct forw_packet *forw_packet)
199 194
200 /* FIXME: what about aggregated packets ? */ 195 /* FIXME: what about aggregated packets ? */
201 bat_dbg(DBG_BATMAN, 196 bat_dbg(DBG_BATMAN,
202 "%s packet (originator %pM, seqno %d, TTL %d) on interface %s [%s]\n", 197 "%s packet (originator %pM, seqno %d, TTL %d) "
198 "on interface %s [%s]\n",
203 (forw_packet->own ? "Sending own" : "Forwarding"), 199 (forw_packet->own ? "Sending own" : "Forwarding"),
204 batman_packet->orig, ntohs(batman_packet->seqno), 200 batman_packet->orig, ntohs(batman_packet->seqno),
205 batman_packet->ttl, forw_packet->if_incoming->dev, 201 batman_packet->ttl, forw_packet->if_incoming->dev,
@@ -246,9 +242,17 @@ static void rebuild_batman_packet(struct batman_if *batman_if)
246 242
247void schedule_own_packet(struct batman_if *batman_if) 243void schedule_own_packet(struct batman_if *batman_if)
248{ 244{
245 /* FIXME: each batman_if will be attached to a softif */
246 struct bat_priv *bat_priv = netdev_priv(soft_device);
249 unsigned long send_time; 247 unsigned long send_time;
250 struct batman_packet *batman_packet; 248 struct batman_packet *batman_packet;
251 int vis_server = atomic_read(&vis_mode); 249 int vis_server;
250
251 if ((batman_if->if_status == IF_NOT_IN_USE) ||
252 (batman_if->if_status == IF_TO_BE_REMOVED))
253 return;
254
255 vis_server = atomic_read(&bat_priv->vis_mode);
252 256
253 /** 257 /**
254 * the interface gets activated here to avoid race conditions between 258 * the interface gets activated here to avoid race conditions between
@@ -257,11 +261,12 @@ void schedule_own_packet(struct batman_if *batman_if)
257 * outdated packets (especially uninitialized mac addresses) in the 261 * outdated packets (especially uninitialized mac addresses) in the
258 * packet queue 262 * packet queue
259 */ 263 */
260 if (batman_if->if_active == IF_TO_BE_ACTIVATED) 264 if (batman_if->if_status == IF_TO_BE_ACTIVATED)
261 batman_if->if_active = IF_ACTIVE; 265 batman_if->if_status = IF_ACTIVE;
262 266
263 /* if local hna has changed and interface is a primary interface */ 267 /* if local hna has changed and interface is a primary interface */
264 if ((atomic_read(&hna_local_changed)) && (batman_if->if_num == 0)) 268 if ((atomic_read(&hna_local_changed)) &&
269 (batman_if == bat_priv->primary_if))
265 rebuild_batman_packet(batman_if); 270 rebuild_batman_packet(batman_if);
266 271
267 /** 272 /**
@@ -276,15 +281,17 @@ void schedule_own_packet(struct batman_if *batman_if)
276 if (vis_server == VIS_TYPE_SERVER_SYNC) 281 if (vis_server == VIS_TYPE_SERVER_SYNC)
277 batman_packet->flags = VIS_SERVER; 282 batman_packet->flags = VIS_SERVER;
278 else 283 else
279 batman_packet->flags = 0; 284 batman_packet->flags &= ~VIS_SERVER;
280 285
281 /* could be read by receive_bat_packet() */ 286 /* could be read by receive_bat_packet() */
282 atomic_inc(&batman_if->seqno); 287 atomic_inc(&batman_if->seqno);
283 288
284 slide_own_bcast_window(batman_if); 289 slide_own_bcast_window(batman_if);
285 send_time = own_send_time(); 290 send_time = own_send_time(bat_priv);
286 add_bat_packet_to_list(batman_if->packet_buff, 291 add_bat_packet_to_list(bat_priv,
287 batman_if->packet_len, batman_if, 1, send_time); 292 batman_if->packet_buff,
293 batman_if->packet_len,
294 batman_if, 1, send_time);
288} 295}
289 296
290void schedule_forward_packet(struct orig_node *orig_node, 297void schedule_forward_packet(struct orig_node *orig_node,
@@ -293,11 +300,13 @@ void schedule_forward_packet(struct orig_node *orig_node,
293 uint8_t directlink, int hna_buff_len, 300 uint8_t directlink, int hna_buff_len,
294 struct batman_if *if_incoming) 301 struct batman_if *if_incoming)
295{ 302{
303 /* FIXME: each batman_if will be attached to a softif */
304 struct bat_priv *bat_priv = netdev_priv(soft_device);
296 unsigned char in_tq, in_ttl, tq_avg = 0; 305 unsigned char in_tq, in_ttl, tq_avg = 0;
297 unsigned long send_time; 306 unsigned long send_time;
298 307
299 if (batman_packet->ttl <= 1) { 308 if (batman_packet->ttl <= 1) {
300 bat_dbg(DBG_BATMAN, "ttl exceeded \n"); 309 bat_dbg(DBG_BATMAN, "ttl exceeded\n");
301 return; 310 return;
302 } 311 }
303 312
@@ -316,7 +325,8 @@ void schedule_forward_packet(struct orig_node *orig_node,
316 batman_packet->tq = orig_node->router->tq_avg; 325 batman_packet->tq = orig_node->router->tq_avg;
317 326
318 if (orig_node->router->last_ttl) 327 if (orig_node->router->last_ttl)
319 batman_packet->ttl = orig_node->router->last_ttl - 1; 328 batman_packet->ttl = orig_node->router->last_ttl
329 - 1;
320 } 330 }
321 331
322 tq_avg = orig_node->router->tq_avg; 332 tq_avg = orig_node->router->tq_avg;
@@ -325,7 +335,8 @@ void schedule_forward_packet(struct orig_node *orig_node,
325 /* apply hop penalty */ 335 /* apply hop penalty */
326 batman_packet->tq = hop_penalty(batman_packet->tq); 336 batman_packet->tq = hop_penalty(batman_packet->tq);
327 337
328 bat_dbg(DBG_BATMAN, "Forwarding packet: tq_orig: %i, tq_avg: %i, tq_forw: %i, ttl_orig: %i, ttl_forw: %i \n", 338 bat_dbg(DBG_BATMAN, "Forwarding packet: tq_orig: %i, tq_avg: %i, "
339 "tq_forw: %i, ttl_orig: %i, ttl_forw: %i\n",
329 in_tq, tq_avg, batman_packet->tq, in_ttl - 1, 340 in_tq, tq_avg, batman_packet->tq, in_ttl - 1,
330 batman_packet->ttl); 341 batman_packet->ttl);
331 342
@@ -336,8 +347,9 @@ void schedule_forward_packet(struct orig_node *orig_node,
336 else 347 else
337 batman_packet->flags &= ~DIRECTLINK; 348 batman_packet->flags &= ~DIRECTLINK;
338 349
339 send_time = forward_send_time(); 350 send_time = forward_send_time(bat_priv);
340 add_bat_packet_to_list((unsigned char *)batman_packet, 351 add_bat_packet_to_list(bat_priv,
352 (unsigned char *)batman_packet,
341 sizeof(struct batman_packet) + hna_buff_len, 353 sizeof(struct batman_packet) + hna_buff_len,
342 if_incoming, 0, send_time); 354 if_incoming, 0, send_time);
343} 355}
@@ -368,19 +380,32 @@ static void _add_bcast_packet_to_list(struct forw_packet *forw_packet,
368 send_time); 380 send_time);
369} 381}
370 382
371void add_bcast_packet_to_list(struct sk_buff *skb) 383#define atomic_dec_not_zero(v) atomic_add_unless((v), -1, 0)
384/* add a broadcast packet to the queue and setup timers. broadcast packets
385 * are sent multiple times to increase probability for beeing received.
386 *
387 * This function returns NETDEV_TX_OK on success and NETDEV_TX_BUSY on
388 * errors.
389 *
390 * The skb is not consumed, so the caller should make sure that the
391 * skb is freed. */
392int add_bcast_packet_to_list(struct sk_buff *skb)
372{ 393{
373 struct forw_packet *forw_packet; 394 struct forw_packet *forw_packet;
374 395
396 if (!atomic_dec_not_zero(&bcast_queue_left)) {
397 bat_dbg(DBG_BATMAN, "bcast packet queue full\n");
398 goto out;
399 }
400
375 forw_packet = kmalloc(sizeof(struct forw_packet), GFP_ATOMIC); 401 forw_packet = kmalloc(sizeof(struct forw_packet), GFP_ATOMIC);
402
376 if (!forw_packet) 403 if (!forw_packet)
377 return; 404 goto out_and_inc;
378 405
379 skb = skb_copy(skb, GFP_ATOMIC); 406 skb = skb_copy(skb, GFP_ATOMIC);
380 if (!skb) { 407 if (!skb)
381 kfree(forw_packet); 408 goto packet_free;
382 return;
383 }
384 409
385 skb_reset_mac_header(skb); 410 skb_reset_mac_header(skb);
386 411
@@ -391,6 +416,14 @@ void add_bcast_packet_to_list(struct sk_buff *skb)
391 forw_packet->num_packets = 0; 416 forw_packet->num_packets = 0;
392 417
393 _add_bcast_packet_to_list(forw_packet, 1); 418 _add_bcast_packet_to_list(forw_packet, 1);
419 return NETDEV_TX_OK;
420
421packet_free:
422 kfree(forw_packet);
423out_and_inc:
424 atomic_inc(&bcast_queue_left);
425out:
426 return NETDEV_TX_BUSY;
394} 427}
395 428
396void send_outstanding_bcast_packet(struct work_struct *work) 429void send_outstanding_bcast_packet(struct work_struct *work)
@@ -425,8 +458,10 @@ void send_outstanding_bcast_packet(struct work_struct *work)
425 if ((forw_packet->num_packets < 3) && 458 if ((forw_packet->num_packets < 3) &&
426 (atomic_read(&module_state) != MODULE_DEACTIVATING)) 459 (atomic_read(&module_state) != MODULE_DEACTIVATING))
427 _add_bcast_packet_to_list(forw_packet, ((5 * HZ) / 1000)); 460 _add_bcast_packet_to_list(forw_packet, ((5 * HZ) / 1000));
428 else 461 else {
429 forw_packet_free(forw_packet); 462 forw_packet_free(forw_packet);
463 atomic_inc(&bcast_queue_left);
464 }
430} 465}
431 466
432void send_outstanding_bat_packet(struct work_struct *work) 467void send_outstanding_bat_packet(struct work_struct *work)
@@ -452,22 +487,38 @@ void send_outstanding_bat_packet(struct work_struct *work)
452 (atomic_read(&module_state) != MODULE_DEACTIVATING)) 487 (atomic_read(&module_state) != MODULE_DEACTIVATING))
453 schedule_own_packet(forw_packet->if_incoming); 488 schedule_own_packet(forw_packet->if_incoming);
454 489
490 /* don't count own packet */
491 if (!forw_packet->own)
492 atomic_inc(&batman_queue_left);
493
455 forw_packet_free(forw_packet); 494 forw_packet_free(forw_packet);
456} 495}
457 496
458void purge_outstanding_packets(void) 497void purge_outstanding_packets(struct batman_if *batman_if)
459{ 498{
460 struct forw_packet *forw_packet; 499 struct forw_packet *forw_packet;
461 struct hlist_node *tmp_node, *safe_tmp_node; 500 struct hlist_node *tmp_node, *safe_tmp_node;
462 unsigned long flags; 501 unsigned long flags;
463 502
464 bat_dbg(DBG_BATMAN, "purge_outstanding_packets()\n"); 503 if (batman_if)
504 bat_dbg(DBG_BATMAN, "purge_outstanding_packets(): %s\n",
505 batman_if->dev);
506 else
507 bat_dbg(DBG_BATMAN, "purge_outstanding_packets()\n");
465 508
466 /* free bcast list */ 509 /* free bcast list */
467 spin_lock_irqsave(&forw_bcast_list_lock, flags); 510 spin_lock_irqsave(&forw_bcast_list_lock, flags);
468 hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node, 511 hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node,
469 &forw_bcast_list, list) { 512 &forw_bcast_list, list) {
470 513
514 /**
515 * if purge_outstanding_packets() was called with an argmument
516 * we delete only packets belonging to the given interface
517 */
518 if ((batman_if) &&
519 (forw_packet->if_incoming != batman_if))
520 continue;
521
471 spin_unlock_irqrestore(&forw_bcast_list_lock, flags); 522 spin_unlock_irqrestore(&forw_bcast_list_lock, flags);
472 523
473 /** 524 /**
@@ -484,6 +535,14 @@ void purge_outstanding_packets(void)
484 hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node, 535 hlist_for_each_entry_safe(forw_packet, tmp_node, safe_tmp_node,
485 &forw_bat_list, list) { 536 &forw_bat_list, list) {
486 537
538 /**
539 * if purge_outstanding_packets() was called with an argmument
540 * we delete only packets belonging to the given interface
541 */
542 if ((batman_if) &&
543 (forw_packet->if_incoming != batman_if))
544 continue;
545
487 spin_unlock_irqrestore(&forw_bat_list_lock, flags); 546 spin_unlock_irqrestore(&forw_bat_list_lock, flags);
488 547
489 /** 548 /**
diff --git a/drivers/staging/batman-adv/send.h b/drivers/staging/batman-adv/send.h
index 5fc6f3417cb6..feaa2fc7f9a1 100644
--- a/drivers/staging/batman-adv/send.h
+++ b/drivers/staging/batman-adv/send.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -33,7 +33,7 @@ void schedule_forward_packet(struct orig_node *orig_node,
33 struct batman_packet *batman_packet, 33 struct batman_packet *batman_packet,
34 uint8_t directlink, int hna_buff_len, 34 uint8_t directlink, int hna_buff_len,
35 struct batman_if *if_outgoing); 35 struct batman_if *if_outgoing);
36void add_bcast_packet_to_list(struct sk_buff *skb); 36int add_bcast_packet_to_list(struct sk_buff *skb);
37void send_outstanding_bcast_packet(struct work_struct *work); 37void send_outstanding_bcast_packet(struct work_struct *work);
38void send_outstanding_bat_packet(struct work_struct *work); 38void send_outstanding_bat_packet(struct work_struct *work);
39void purge_outstanding_packets(void); 39void purge_outstanding_packets(struct batman_if *batman_if);
diff --git a/drivers/staging/batman-adv/soft-interface.c b/drivers/staging/batman-adv/soft-interface.c
index 0e2307f3cb96..51c40b77c8d7 100644
--- a/drivers/staging/batman-adv/soft-interface.c
+++ b/drivers/staging/batman-adv/soft-interface.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -152,9 +152,13 @@ int interface_set_mac_addr(struct net_device *dev, void *p)
152 if (!is_valid_ether_addr(addr->sa_data)) 152 if (!is_valid_ether_addr(addr->sa_data))
153 return -EADDRNOTAVAIL; 153 return -EADDRNOTAVAIL;
154 154
155 hna_local_remove(dev->dev_addr, "mac address changed"); 155 /* only modify hna-table if it has been initialised before */
156 if (atomic_read(&module_state) == MODULE_ACTIVE) {
157 hna_local_remove(dev->dev_addr, "mac address changed");
158 hna_local_add(addr->sa_data);
159 }
160
156 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 161 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
157 hna_local_add(dev->dev_addr);
158 162
159 return 0; 163 return 0;
160} 164}
@@ -178,6 +182,7 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev)
178 struct ethhdr *ethhdr = (struct ethhdr *)skb->data; 182 struct ethhdr *ethhdr = (struct ethhdr *)skb->data;
179 struct bat_priv *priv = netdev_priv(dev); 183 struct bat_priv *priv = netdev_priv(dev);
180 struct batman_if *batman_if; 184 struct batman_if *batman_if;
185 struct bat_priv *bat_priv;
181 uint8_t dstaddr[6]; 186 uint8_t dstaddr[6];
182 int data_len = skb->len; 187 int data_len = skb->len;
183 unsigned long flags; 188 unsigned long flags;
@@ -185,6 +190,9 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev)
185 if (atomic_read(&module_state) != MODULE_ACTIVE) 190 if (atomic_read(&module_state) != MODULE_ACTIVE)
186 goto dropped; 191 goto dropped;
187 192
193 /* FIXME: each batman_if will be attached to a softif */
194 bat_priv = netdev_priv(soft_device);
195
188 dev->trans_start = jiffies; 196 dev->trans_start = jiffies;
189 /* TODO: check this for locks */ 197 /* TODO: check this for locks */
190 hna_local_add(ethhdr->h_source); 198 hna_local_add(ethhdr->h_source);
@@ -208,10 +216,10 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev)
208 /* set broadcast sequence number */ 216 /* set broadcast sequence number */
209 bcast_packet->seqno = htons(bcast_seqno); 217 bcast_packet->seqno = htons(bcast_seqno);
210 218
211 bcast_seqno++; 219 /* broadcast packet. on success, increase seqno. */
220 if (add_bcast_packet_to_list(skb) == NETDEV_TX_OK)
221 bcast_seqno++;
212 222
213 /* broadcast packet */
214 add_bcast_packet_to_list(skb);
215 /* a copy is stored in the bcast list, therefore removing 223 /* a copy is stored in the bcast list, therefore removing
216 * the original skb. */ 224 * the original skb. */
217 kfree_skb(skb); 225 kfree_skb(skb);
@@ -228,8 +236,9 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev)
228 orig_node = transtable_search(ethhdr->h_dest); 236 orig_node = transtable_search(ethhdr->h_dest);
229 237
230 if ((orig_node) && 238 if ((orig_node) &&
231 (orig_node->batman_if) &&
232 (orig_node->router)) { 239 (orig_node->router)) {
240 struct neigh_node *router = orig_node->router;
241
233 if (my_skb_push(skb, sizeof(struct unicast_packet)) < 0) 242 if (my_skb_push(skb, sizeof(struct unicast_packet)) < 0)
234 goto unlock; 243 goto unlock;
235 244
@@ -244,14 +253,14 @@ int interface_tx(struct sk_buff *skb, struct net_device *dev)
244 memcpy(unicast_packet->dest, orig_node->orig, ETH_ALEN); 253 memcpy(unicast_packet->dest, orig_node->orig, ETH_ALEN);
245 254
246 /* net_dev won't be available when not active */ 255 /* net_dev won't be available when not active */
247 if (orig_node->batman_if->if_active != IF_ACTIVE) 256 if (router->if_incoming->if_status != IF_ACTIVE)
248 goto unlock; 257 goto unlock;
249 258
250 /* don't lock while sending the packets ... we therefore 259 /* don't lock while sending the packets ... we therefore
251 * copy the required data before sending */ 260 * copy the required data before sending */
252 261
253 batman_if = orig_node->batman_if; 262 batman_if = router->if_incoming;
254 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN); 263 memcpy(dstaddr, router->addr, ETH_ALEN);
255 spin_unlock_irqrestore(&orig_hash_lock, flags); 264 spin_unlock_irqrestore(&orig_hash_lock, flags);
256 265
257 send_skb_packet(skb, batman_if, dstaddr); 266 send_skb_packet(skb, batman_if, dstaddr);
@@ -268,6 +277,7 @@ unlock:
268 spin_unlock_irqrestore(&orig_hash_lock, flags); 277 spin_unlock_irqrestore(&orig_hash_lock, flags);
269dropped: 278dropped:
270 priv->stats.tx_dropped++; 279 priv->stats.tx_dropped++;
280 kfree_skb(skb);
271end: 281end:
272 return NETDEV_TX_OK; 282 return NETDEV_TX_OK;
273} 283}
diff --git a/drivers/staging/batman-adv/soft-interface.h b/drivers/staging/batman-adv/soft-interface.h
index c0cad8134b2b..e7f59af7df33 100644
--- a/drivers/staging/batman-adv/soft-interface.h
+++ b/drivers/staging/batman-adv/soft-interface.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner 4 * Marek Lindner
5 * 5 *
diff --git a/drivers/staging/batman-adv/translation-table.c b/drivers/staging/batman-adv/translation-table.c
index d56f6654de0d..e01ff2151f76 100644
--- a/drivers/staging/batman-adv/translation-table.c
+++ b/drivers/staging/batman-adv/translation-table.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -77,11 +77,14 @@ void hna_local_add(uint8_t *addr)
77 MAC-flooding. */ 77 MAC-flooding. */
78 if ((num_hna + 1 > (ETH_DATA_LEN - BAT_PACKET_LEN) / ETH_ALEN) || 78 if ((num_hna + 1 > (ETH_DATA_LEN - BAT_PACKET_LEN) / ETH_ALEN) ||
79 (num_hna + 1 > 255)) { 79 (num_hna + 1 > 255)) {
80 bat_dbg(DBG_ROUTES, "Can't add new local hna entry (%pM): number of local hna entries exceeds packet size \n", addr); 80 bat_dbg(DBG_ROUTES,
81 "Can't add new local hna entry (%pM): "
82 "number of local hna entries exceeds packet size\n",
83 addr);
81 return; 84 return;
82 } 85 }
83 86
84 bat_dbg(DBG_ROUTES, "Creating new local hna entry: %pM \n", 87 bat_dbg(DBG_ROUTES, "Creating new local hna entry: %pM\n",
85 addr); 88 addr);
86 89
87 hna_local_entry = kmalloc(sizeof(struct hna_local_entry), GFP_ATOMIC); 90 hna_local_entry = kmalloc(sizeof(struct hna_local_entry), GFP_ATOMIC);
@@ -108,7 +111,8 @@ void hna_local_add(uint8_t *addr)
108 hna_local_hash->size * 2); 111 hna_local_hash->size * 2);
109 112
110 if (swaphash == NULL) 113 if (swaphash == NULL)
111 printk(KERN_ERR "batman-adv:Couldn't resize local hna hash table \n"); 114 printk(KERN_ERR "batman-adv:"
115 "Couldn't resize local hna hash table\n");
112 else 116 else
113 hna_local_hash = swaphash; 117 hna_local_hash = swaphash;
114 } 118 }
@@ -156,24 +160,49 @@ int hna_local_fill_buffer(unsigned char *buff, int buff_len)
156 return i; 160 return i;
157} 161}
158 162
159int hna_local_fill_buffer_text(unsigned char *buff, int buff_len) 163int hna_local_fill_buffer_text(struct net_device *net_dev, char *buff,
164 size_t count, loff_t off)
160{ 165{
166 struct bat_priv *bat_priv = netdev_priv(net_dev);
161 struct hna_local_entry *hna_local_entry; 167 struct hna_local_entry *hna_local_entry;
162 HASHIT(hashit); 168 HASHIT(hashit);
163 int bytes_written = 0; 169 int bytes_written = 0;
164 unsigned long flags; 170 unsigned long flags;
171 size_t hdr_len;
172
173 if (!bat_priv->primary_if) {
174 if (off == 0)
175 return sprintf(buff,
176 "BATMAN mesh %s disabled - "
177 "please specify interfaces to enable it\n",
178 net_dev->name);
179
180 return 0;
181 }
182
183 hdr_len = sprintf(buff,
184 "Locally retrieved addresses (from %s) "
185 "announced via HNA:\n",
186 net_dev->name);
187
188 if (off < hdr_len)
189 bytes_written = hdr_len;
165 190
166 spin_lock_irqsave(&hna_local_hash_lock, flags); 191 spin_lock_irqsave(&hna_local_hash_lock, flags);
167 192
168 while (hash_iterate(hna_local_hash, &hashit)) { 193 while (hash_iterate(hna_local_hash, &hashit)) {
194 hdr_len += 21;
169 195
170 if (buff_len < bytes_written + ETH_STR_LEN + 4) 196 if (count < bytes_written + 22)
171 break; 197 break;
172 198
199 if (off >= hdr_len)
200 continue;
201
173 hna_local_entry = hashit.bucket->data; 202 hna_local_entry = hashit.bucket->data;
174 203
175 bytes_written += snprintf(buff + bytes_written, ETH_STR_LEN + 4, 204 bytes_written += snprintf(buff + bytes_written, 22,
176 " * %02x:%02x:%02x:%02x:%02x:%02x\n", 205 " * " MAC_FMT "\n",
177 hna_local_entry->addr[0], 206 hna_local_entry->addr[0],
178 hna_local_entry->addr[1], 207 hna_local_entry->addr[1],
179 hna_local_entry->addr[2], 208 hna_local_entry->addr[2],
@@ -183,7 +212,6 @@ int hna_local_fill_buffer_text(unsigned char *buff, int buff_len)
183 } 212 }
184 213
185 spin_unlock_irqrestore(&hna_local_hash_lock, flags); 214 spin_unlock_irqrestore(&hna_local_hash_lock, flags);
186
187 return bytes_written; 215 return bytes_written;
188} 216}
189 217
@@ -197,7 +225,7 @@ static void _hna_local_del(void *data)
197static void hna_local_del(struct hna_local_entry *hna_local_entry, 225static void hna_local_del(struct hna_local_entry *hna_local_entry,
198 char *message) 226 char *message)
199{ 227{
200 bat_dbg(DBG_ROUTES, "Deleting local hna entry (%pM): %s \n", 228 bat_dbg(DBG_ROUTES, "Deleting local hna entry (%pM): %s\n",
201 hna_local_entry->addr, message); 229 hna_local_entry->addr, message);
202 230
203 hash_remove(hna_local_hash, hna_local_entry->addr); 231 hash_remove(hna_local_hash, hna_local_entry->addr);
@@ -295,7 +323,8 @@ void hna_global_add_orig(struct orig_node *orig_node,
295 memcpy(hna_global_entry->addr, hna_ptr, ETH_ALEN); 323 memcpy(hna_global_entry->addr, hna_ptr, ETH_ALEN);
296 324
297 bat_dbg(DBG_ROUTES, 325 bat_dbg(DBG_ROUTES,
298 "Creating new global hna entry: %pM (via %pM)\n", 326 "Creating new global hna entry: "
327 "%pM (via %pM)\n",
299 hna_global_entry->addr, orig_node->orig); 328 hna_global_entry->addr, orig_node->orig);
300 329
301 spin_lock_irqsave(&hna_global_hash_lock, flags); 330 spin_lock_irqsave(&hna_global_hash_lock, flags);
@@ -340,7 +369,8 @@ void hna_global_add_orig(struct orig_node *orig_node,
340 hna_global_hash->size * 2); 369 hna_global_hash->size * 2);
341 370
342 if (swaphash == NULL) 371 if (swaphash == NULL)
343 printk(KERN_ERR "batman-adv:Couldn't resize global hna hash table \n"); 372 printk(KERN_ERR "batman-adv:"
373 "Couldn't resize global hna hash table\n");
344 else 374 else
345 hna_global_hash = swaphash; 375 hna_global_hash = swaphash;
346 } 376 }
@@ -348,24 +378,49 @@ void hna_global_add_orig(struct orig_node *orig_node,
348 spin_unlock_irqrestore(&hna_global_hash_lock, flags); 378 spin_unlock_irqrestore(&hna_global_hash_lock, flags);
349} 379}
350 380
351int hna_global_fill_buffer_text(unsigned char *buff, int buff_len) 381int hna_global_fill_buffer_text(struct net_device *net_dev, char *buff,
382 size_t count, loff_t off)
352{ 383{
384 struct bat_priv *bat_priv = netdev_priv(net_dev);
353 struct hna_global_entry *hna_global_entry; 385 struct hna_global_entry *hna_global_entry;
354 HASHIT(hashit); 386 HASHIT(hashit);
355 int bytes_written = 0; 387 int bytes_written = 0;
356 unsigned long flags; 388 unsigned long flags;
389 size_t hdr_len;
390
391 if (!bat_priv->primary_if) {
392 if (off == 0)
393 return sprintf(buff,
394 "BATMAN mesh %s disabled - "
395 "please specify interfaces to enable it\n",
396 net_dev->name);
397
398 return 0;
399 }
400
401 hdr_len = sprintf(buff,
402 "Globally announced HNAs received via the mesh %s "
403 "(translation table):\n",
404 net_dev->name);
405
406 if (off < hdr_len)
407 bytes_written = hdr_len;
357 408
358 spin_lock_irqsave(&hna_global_hash_lock, flags); 409 spin_lock_irqsave(&hna_global_hash_lock, flags);
359 410
360 while (hash_iterate(hna_global_hash, &hashit)) { 411 while (hash_iterate(hna_global_hash, &hashit)) {
361 if (buff_len < bytes_written + (2 * ETH_STR_LEN) + 10) 412 hdr_len += 43;
413
414 if (count < bytes_written + 44)
362 break; 415 break;
363 416
417 if (off >= hdr_len)
418 continue;
419
364 hna_global_entry = hashit.bucket->data; 420 hna_global_entry = hashit.bucket->data;
365 421
366 bytes_written += snprintf(buff + bytes_written, 422 bytes_written += snprintf(buff + bytes_written, 44,
367 (2 * ETH_STR_LEN) + 10, 423 " * " MAC_FMT " via " MAC_FMT "\n",
368 " * %02x:%02x:%02x:%02x:%02x:%02x via %02x:%02x:%02x:%02x:%02x:%02x \n",
369 hna_global_entry->addr[0], 424 hna_global_entry->addr[0],
370 hna_global_entry->addr[1], 425 hna_global_entry->addr[1],
371 hna_global_entry->addr[2], 426 hna_global_entry->addr[2],
@@ -381,14 +436,13 @@ int hna_global_fill_buffer_text(unsigned char *buff, int buff_len)
381 } 436 }
382 437
383 spin_unlock_irqrestore(&hna_global_hash_lock, flags); 438 spin_unlock_irqrestore(&hna_global_hash_lock, flags);
384
385 return bytes_written; 439 return bytes_written;
386} 440}
387 441
388void _hna_global_del_orig(struct hna_global_entry *hna_global_entry, 442void _hna_global_del_orig(struct hna_global_entry *hna_global_entry,
389 char *message) 443 char *message)
390{ 444{
391 bat_dbg(DBG_ROUTES, "Deleting global hna entry %pM (via %pM): %s \n", 445 bat_dbg(DBG_ROUTES, "Deleting global hna entry %pM (via %pM): %s\n",
392 hna_global_entry->addr, hna_global_entry->orig_node->orig, 446 hna_global_entry->addr, hna_global_entry->orig_node->orig,
393 message); 447 message);
394 448
diff --git a/drivers/staging/batman-adv/translation-table.h b/drivers/staging/batman-adv/translation-table.h
index 281125b729fb..8f412fca87f1 100644
--- a/drivers/staging/batman-adv/translation-table.h
+++ b/drivers/staging/batman-adv/translation-table.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -25,13 +25,15 @@ int hna_local_init(void);
25void hna_local_add(uint8_t *addr); 25void hna_local_add(uint8_t *addr);
26void hna_local_remove(uint8_t *addr, char *message); 26void hna_local_remove(uint8_t *addr, char *message);
27int hna_local_fill_buffer(unsigned char *buff, int buff_len); 27int hna_local_fill_buffer(unsigned char *buff, int buff_len);
28int hna_local_fill_buffer_text(unsigned char *buff, int buff_len); 28int hna_local_fill_buffer_text(struct net_device *net_dev, char *buff,
29 size_t count, loff_t off);
29void hna_local_purge(struct work_struct *work); 30void hna_local_purge(struct work_struct *work);
30void hna_local_free(void); 31void hna_local_free(void);
31int hna_global_init(void); 32int hna_global_init(void);
32void hna_global_add_orig(struct orig_node *orig_node, unsigned char *hna_buff, 33void hna_global_add_orig(struct orig_node *orig_node, unsigned char *hna_buff,
33 int hna_buff_len); 34 int hna_buff_len);
34int hna_global_fill_buffer_text(unsigned char *buff, int buff_len); 35int hna_global_fill_buffer_text(struct net_device *net_dev, char *buff,
36 size_t count, loff_t off);
35void _hna_global_del_orig(struct hna_global_entry *hna_global_entry, 37void _hna_global_del_orig(struct hna_global_entry *hna_global_entry,
36 char *orig_str); 38 char *orig_str);
37void hna_global_del_orig(struct orig_node *orig_node, char *message); 39void hna_global_del_orig(struct orig_node *orig_node, char *message);
diff --git a/drivers/staging/batman-adv/types.h b/drivers/staging/batman-adv/types.h
index dec1b54031b6..86007c7eb443 100644
--- a/drivers/staging/batman-adv/types.h
+++ b/drivers/staging/batman-adv/types.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2007-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Marek Lindner, Simon Wunderlich 4 * Marek Lindner, Simon Wunderlich
5 * 5 *
@@ -29,43 +29,61 @@
29#include "packet.h" 29#include "packet.h"
30#include "bitarray.h" 30#include "bitarray.h"
31 31
32#define BAT_HEADER_LEN (sizeof(struct ethhdr) + ((sizeof(struct unicast_packet) > sizeof(struct bcast_packet) ? sizeof(struct unicast_packet) : sizeof(struct bcast_packet)))) 32#define BAT_HEADER_LEN (sizeof(struct ethhdr) + \
33 ((sizeof(struct unicast_packet) > sizeof(struct bcast_packet) ? \
34 sizeof(struct unicast_packet) : \
35 sizeof(struct bcast_packet))))
33 36
34 37
35struct batman_if { 38struct batman_if {
36 struct list_head list; 39 struct list_head list;
37 int16_t if_num; 40 int16_t if_num;
38 char *dev; 41 char *dev;
39 char if_active; 42 char if_status;
40 char addr_str[ETH_STR_LEN]; 43 char addr_str[ETH_STR_LEN];
41 struct net_device *net_dev; 44 struct net_device *net_dev;
42 atomic_t seqno; 45 atomic_t seqno;
43 unsigned char *packet_buff; 46 unsigned char *packet_buff;
44 int packet_len; 47 int packet_len;
48 struct kobject *hardif_obj;
45 struct rcu_head rcu; 49 struct rcu_head rcu;
46 50
47}; 51};
48 52
49struct orig_node { /* structure for orig_list maintaining nodes of mesh */ 53/**
54 * orig_node - structure for orig_list maintaining nodes of mesh
55 * @last_valid: when last packet from this node was received
56 * @bcast_seqno_reset: time when the broadcast seqno window was reset
57 * @batman_seqno_reset: time when the batman seqno window was reset
58 * @flags: for now only VIS_SERVER flag
59 * @last_real_seqno: last and best known squence number
60 * @last_ttl: ttl of last received packet
61 * @last_bcast_seqno: last broadcast sequence number received by this host
62 */
63struct orig_node {
50 uint8_t orig[ETH_ALEN]; 64 uint8_t orig[ETH_ALEN];
51 struct neigh_node *router; 65 struct neigh_node *router;
52 struct batman_if *batman_if;
53 TYPE_OF_WORD *bcast_own; 66 TYPE_OF_WORD *bcast_own;
54 uint8_t *bcast_own_sum; 67 uint8_t *bcast_own_sum;
55 uint8_t tq_own; 68 uint8_t tq_own;
56 int tq_asym_penalty; 69 int tq_asym_penalty;
57 unsigned long last_valid; /* when last packet from this node was received */ 70 unsigned long last_valid;
58/* uint8_t gwflags; * flags related to gateway functions: gateway class */ 71 unsigned long bcast_seqno_reset;
59 uint8_t flags; /* for now only VIS_SERVER flag. */ 72 unsigned long batman_seqno_reset;
73 uint8_t flags;
60 unsigned char *hna_buff; 74 unsigned char *hna_buff;
61 int16_t hna_buff_len; 75 int16_t hna_buff_len;
62 uint16_t last_real_seqno; /* last and best known squence number */ 76 uint16_t last_real_seqno;
63 uint8_t last_ttl; /* ttl of last received packet */ 77 uint8_t last_ttl;
64 TYPE_OF_WORD bcast_bits[NUM_WORDS]; 78 TYPE_OF_WORD bcast_bits[NUM_WORDS];
65 uint16_t last_bcast_seqno; /* last broadcast sequence number received by this host */ 79 uint16_t last_bcast_seqno;
66 struct list_head neigh_list; 80 struct list_head neigh_list;
67}; 81};
68 82
83/**
84 * neigh_node
85 * @last_valid: when last packet via this neighbor was received
86 */
69struct neigh_node { 87struct neigh_node {
70 struct list_head list; 88 struct list_head list;
71 uint8_t addr[ETH_ALEN]; 89 uint8_t addr[ETH_ALEN];
@@ -74,7 +92,7 @@ struct neigh_node {
74 uint8_t tq_index; 92 uint8_t tq_index;
75 uint8_t tq_avg; 93 uint8_t tq_avg;
76 uint8_t last_ttl; 94 uint8_t last_ttl;
77 unsigned long last_valid; /* when last packet via this neighbor was received */ 95 unsigned long last_valid;
78 TYPE_OF_WORD real_bits[NUM_WORDS]; 96 TYPE_OF_WORD real_bits[NUM_WORDS];
79 struct orig_node *orig_node; 97 struct orig_node *orig_node;
80 struct batman_if *if_incoming; 98 struct batman_if *if_incoming;
@@ -82,6 +100,12 @@ struct neigh_node {
82 100
83struct bat_priv { 101struct bat_priv {
84 struct net_device_stats stats; 102 struct net_device_stats stats;
103 atomic_t aggregation_enabled;
104 atomic_t vis_mode;
105 atomic_t orig_interval;
106 char num_ifaces;
107 struct batman_if *primary_if;
108 struct kobject *mesh_obj;
85}; 109};
86 110
87struct device_client { 111struct device_client {
@@ -108,7 +132,11 @@ struct hna_global_entry {
108 struct orig_node *orig_node; 132 struct orig_node *orig_node;
109}; 133};
110 134
111struct forw_packet { /* structure for forw_list maintaining packets to be send/forwarded */ 135/**
136 * forw_packet - structure for forw_list maintaining packets to be
137 * send/forwarded
138 */
139struct forw_packet {
112 struct hlist_node list; 140 struct hlist_node list;
113 unsigned long send_time; 141 unsigned long send_time;
114 uint8_t own; 142 uint8_t own;
diff --git a/drivers/staging/batman-adv/vis.c b/drivers/staging/batman-adv/vis.c
index fedec1bb3097..1d3d954847fd 100644
--- a/drivers/staging/batman-adv/vis.c
+++ b/drivers/staging/batman-adv/vis.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2008-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2008-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Simon Wunderlich 4 * Simon Wunderlich
5 * 5 *
@@ -27,24 +27,44 @@
27#include "hard-interface.h" 27#include "hard-interface.h"
28#include "hash.h" 28#include "hash.h"
29 29
30/* Returns the smallest signed integer in two's complement with the sizeof x */
31#define smallest_signed_int(x) (1u << (7u + 8u * (sizeof(x) - 1u)))
32
33/* Checks if a sequence number x is a predecessor/successor of y.
34 they handle overflows/underflows and can correctly check for a
35 predecessor/successor unless the variable sequence number has grown by
36 more then 2**(bitwidth(x)-1)-1.
37 This means that for a uint8_t with the maximum value 255, it would think:
38 * when adding nothing - it is neither a predecessor nor a successor
39 * before adding more than 127 to the starting value - it is a predecessor,
40 * when adding 128 - it is neither a predecessor nor a successor,
41 * after adding more than 127 to the starting value - it is a successor */
42#define seq_before(x, y) ({typeof(x) _dummy = (x - y); \
43 _dummy > smallest_signed_int(_dummy); })
44#define seq_after(x, y) seq_before(y, x)
45
30struct hashtable_t *vis_hash; 46struct hashtable_t *vis_hash;
31DEFINE_SPINLOCK(vis_hash_lock); 47DEFINE_SPINLOCK(vis_hash_lock);
48static DEFINE_SPINLOCK(recv_list_lock);
32static struct vis_info *my_vis_info; 49static struct vis_info *my_vis_info;
33static struct list_head send_list; /* always locked with vis_hash_lock */ 50static struct list_head send_list; /* always locked with vis_hash_lock */
34 51
35static void start_vis_timer(void); 52static void start_vis_timer(void);
36 53
37/* free the info */ 54/* free the info */
38static void free_info(void *data) 55static void free_info(struct kref *ref)
39{ 56{
40 struct vis_info *info = data; 57 struct vis_info *info = container_of(ref, struct vis_info, refcount);
41 struct recvlist_node *entry, *tmp; 58 struct recvlist_node *entry, *tmp;
59 unsigned long flags;
42 60
43 list_del_init(&info->send_list); 61 list_del_init(&info->send_list);
62 spin_lock_irqsave(&recv_list_lock, flags);
44 list_for_each_entry_safe(entry, tmp, &info->recv_list, list) { 63 list_for_each_entry_safe(entry, tmp, &info->recv_list, list) {
45 list_del(&entry->list); 64 list_del(&entry->list);
46 kfree(entry); 65 kfree(entry);
47 } 66 }
67 spin_unlock_irqrestore(&recv_list_lock, flags);
48 kfree(info); 68 kfree(info);
49} 69}
50 70
@@ -82,7 +102,7 @@ static int vis_info_choose(void *data, int size)
82 102
83/* insert interface to the list of interfaces of one originator, if it 103/* insert interface to the list of interfaces of one originator, if it
84 * does not already exist in the list */ 104 * does not already exist in the list */
85static void proc_vis_insert_interface(const uint8_t *interface, 105static void vis_data_insert_interface(const uint8_t *interface,
86 struct hlist_head *if_list, 106 struct hlist_head *if_list,
87 bool primary) 107 bool primary)
88{ 108{
@@ -103,42 +123,135 @@ static void proc_vis_insert_interface(const uint8_t *interface,
103 hlist_add_head(&entry->list, if_list); 123 hlist_add_head(&entry->list, if_list);
104} 124}
105 125
106void proc_vis_read_prim_sec(struct seq_file *seq, 126static ssize_t vis_data_read_prim_sec(char *buff, struct hlist_head *if_list)
107 struct hlist_head *if_list)
108{ 127{
109 struct if_list_entry *entry; 128 struct if_list_entry *entry;
110 struct hlist_node *pos, *n; 129 struct hlist_node *pos;
111 char tmp_addr_str[ETH_STR_LEN]; 130 char tmp_addr_str[ETH_STR_LEN];
131 size_t len = 0;
112 132
113 hlist_for_each_entry_safe(entry, pos, n, if_list, list) { 133 hlist_for_each_entry(entry, pos, if_list, list) {
114 if (entry->primary) { 134 if (entry->primary)
115 seq_printf(seq, "PRIMARY, "); 135 len += sprintf(buff + len, "PRIMARY, ");
116 } else { 136 else {
117 addr_to_string(tmp_addr_str, entry->addr); 137 addr_to_string(tmp_addr_str, entry->addr);
118 seq_printf(seq, "SEC %s, ", tmp_addr_str); 138 len += sprintf(buff + len, "SEC %s, ", tmp_addr_str);
119 } 139 }
120
121 hlist_del(&entry->list);
122 kfree(entry);
123 } 140 }
141
142 return len;
124} 143}
125 144
126/* read an entry */ 145/* read an entry */
127void proc_vis_read_entry(struct seq_file *seq, 146static ssize_t vis_data_read_entry(char *buff, struct vis_info_entry *entry,
128 struct vis_info_entry *entry, 147 uint8_t *src, bool primary)
129 struct hlist_head *if_list,
130 uint8_t *vis_orig)
131{ 148{
132 char to[40]; 149 char to[40];
133 150
134 addr_to_string(to, entry->dest); 151 addr_to_string(to, entry->dest);
135 if (entry->quality == 0) { 152 if (primary && entry->quality == 0)
136 proc_vis_insert_interface(vis_orig, if_list, true); 153 return sprintf(buff, "HNA %s, ", to);
137 seq_printf(seq, "HNA %s, ", to); 154 else if (compare_orig(entry->src, src))
138 } else { 155 return sprintf(buff, "TQ %s %d, ", to, entry->quality);
139 proc_vis_insert_interface(entry->src, if_list, 156
140 compare_orig(entry->src, vis_orig)); 157 return 0;
141 seq_printf(seq, "TQ %s %d, ", to, entry->quality); 158}
159
160ssize_t vis_fill_buffer_text(struct net_device *net_dev, char *buff,
161 size_t count, loff_t off)
162{
163 HASHIT(hashit);
164 struct vis_info *info;
165 struct vis_info_entry *entries;
166 struct bat_priv *bat_priv = netdev_priv(net_dev);
167 HLIST_HEAD(vis_if_list);
168 struct if_list_entry *entry;
169 struct hlist_node *pos, *n;
170 size_t hdr_len, tmp_len;
171 int i, bytes_written = 0;
172 char tmp_addr_str[ETH_STR_LEN];
173 unsigned long flags;
174 int vis_server = atomic_read(&bat_priv->vis_mode);
175
176 if ((!bat_priv->primary_if) ||
177 (vis_server == VIS_TYPE_CLIENT_UPDATE))
178 return 0;
179
180 hdr_len = 0;
181
182 spin_lock_irqsave(&vis_hash_lock, flags);
183 while (hash_iterate(vis_hash, &hashit)) {
184 info = hashit.bucket->data;
185 entries = (struct vis_info_entry *)
186 ((char *)info + sizeof(struct vis_info));
187
188 /* estimated line length */
189 if (count < bytes_written + 200)
190 break;
191
192 for (i = 0; i < info->packet.entries; i++) {
193 if (entries[i].quality == 0)
194 continue;
195 vis_data_insert_interface(entries[i].src, &vis_if_list,
196 compare_orig(entries[i].src,
197 info->packet.vis_orig));
198 }
199
200 hlist_for_each_entry(entry, pos, &vis_if_list, list) {
201 addr_to_string(tmp_addr_str, entry->addr);
202 tmp_len = sprintf(buff + bytes_written,
203 "%s,", tmp_addr_str);
204
205 for (i = 0; i < info->packet.entries; i++)
206 tmp_len += vis_data_read_entry(
207 buff + bytes_written + tmp_len,
208 &entries[i], entry->addr,
209 entry->primary);
210
211 /* add primary/secondary records */
212 if (compare_orig(entry->addr, info->packet.vis_orig))
213 tmp_len += vis_data_read_prim_sec(
214 buff + bytes_written + tmp_len,
215 &vis_if_list);
216
217 tmp_len += sprintf(buff + bytes_written + tmp_len,
218 "\n");
219
220 hdr_len += tmp_len;
221
222 if (off >= hdr_len)
223 continue;
224
225 bytes_written += tmp_len;
226 }
227
228 hlist_for_each_entry_safe(entry, pos, n, &vis_if_list, list) {
229 hlist_del(&entry->list);
230 kfree(entry);
231 }
232 }
233 spin_unlock_irqrestore(&vis_hash_lock, flags);
234
235 return bytes_written;
236}
237
238/* add the info packet to the send list, if it was not
239 * already linked in. */
240static void send_list_add(struct vis_info *info)
241{
242 if (list_empty(&info->send_list)) {
243 kref_get(&info->refcount);
244 list_add_tail(&info->send_list, &send_list);
245 }
246}
247
248/* delete the info packet from the send list, if it was
249 * linked in. */
250static void send_list_del(struct vis_info *info)
251{
252 if (!list_empty(&info->send_list)) {
253 list_del_init(&info->send_list);
254 kref_put(&info->refcount, free_info);
142 } 255 }
143} 256}
144 257
@@ -146,32 +259,41 @@ void proc_vis_read_entry(struct seq_file *seq,
146static void recv_list_add(struct list_head *recv_list, char *mac) 259static void recv_list_add(struct list_head *recv_list, char *mac)
147{ 260{
148 struct recvlist_node *entry; 261 struct recvlist_node *entry;
262 unsigned long flags;
263
149 entry = kmalloc(sizeof(struct recvlist_node), GFP_ATOMIC); 264 entry = kmalloc(sizeof(struct recvlist_node), GFP_ATOMIC);
150 if (!entry) 265 if (!entry)
151 return; 266 return;
152 267
153 memcpy(entry->mac, mac, ETH_ALEN); 268 memcpy(entry->mac, mac, ETH_ALEN);
269 spin_lock_irqsave(&recv_list_lock, flags);
154 list_add_tail(&entry->list, recv_list); 270 list_add_tail(&entry->list, recv_list);
271 spin_unlock_irqrestore(&recv_list_lock, flags);
155} 272}
156 273
157/* returns 1 if this mac is in the recv_list */ 274/* returns 1 if this mac is in the recv_list */
158static int recv_list_is_in(struct list_head *recv_list, char *mac) 275static int recv_list_is_in(struct list_head *recv_list, char *mac)
159{ 276{
160 struct recvlist_node *entry; 277 struct recvlist_node *entry;
278 unsigned long flags;
161 279
280 spin_lock_irqsave(&recv_list_lock, flags);
162 list_for_each_entry(entry, recv_list, list) { 281 list_for_each_entry(entry, recv_list, list) {
163 if (memcmp(entry->mac, mac, ETH_ALEN) == 0) 282 if (memcmp(entry->mac, mac, ETH_ALEN) == 0) {
283 spin_unlock_irqrestore(&recv_list_lock, flags);
164 return 1; 284 return 1;
285 }
165 } 286 }
166 287 spin_unlock_irqrestore(&recv_list_lock, flags);
167 return 0; 288 return 0;
168} 289}
169 290
170/* try to add the packet to the vis_hash. return NULL if invalid (e.g. too old, 291/* try to add the packet to the vis_hash. return NULL if invalid (e.g. too old,
171 * broken.. ). vis hash must be locked outside. is_new is set when the packet 292 * broken.. ). vis hash must be locked outside. is_new is set when the packet
172 * is newer than old entries in the hash. */ 293 * is newer than old entries in the hash. */
173static struct vis_info *add_packet(struct vis_packet *vis_packet, 294static struct vis_info *add_packet(struct vis_packet *vis_packet,
174 int vis_info_len, int *is_new) 295 int vis_info_len, int *is_new,
296 int make_broadcast)
175{ 297{
176 struct vis_info *info, *old_info; 298 struct vis_info *info, *old_info;
177 struct vis_info search_elem; 299 struct vis_info search_elem;
@@ -186,7 +308,7 @@ static struct vis_info *add_packet(struct vis_packet *vis_packet,
186 old_info = hash_find(vis_hash, &search_elem); 308 old_info = hash_find(vis_hash, &search_elem);
187 309
188 if (old_info != NULL) { 310 if (old_info != NULL) {
189 if (vis_packet->seqno - old_info->packet.seqno <= 0) { 311 if (!seq_after(vis_packet->seqno, old_info->packet.seqno)) {
190 if (old_info->packet.seqno == vis_packet->seqno) { 312 if (old_info->packet.seqno == vis_packet->seqno) {
191 recv_list_add(&old_info->recv_list, 313 recv_list_add(&old_info->recv_list,
192 vis_packet->sender_orig); 314 vis_packet->sender_orig);
@@ -198,13 +320,15 @@ static struct vis_info *add_packet(struct vis_packet *vis_packet,
198 } 320 }
199 /* remove old entry */ 321 /* remove old entry */
200 hash_remove(vis_hash, old_info); 322 hash_remove(vis_hash, old_info);
201 free_info(old_info); 323 send_list_del(old_info);
324 kref_put(&old_info->refcount, free_info);
202 } 325 }
203 326
204 info = kmalloc(sizeof(struct vis_info) + vis_info_len, GFP_ATOMIC); 327 info = kmalloc(sizeof(struct vis_info) + vis_info_len, GFP_ATOMIC);
205 if (info == NULL) 328 if (info == NULL)
206 return NULL; 329 return NULL;
207 330
331 kref_init(&info->refcount);
208 INIT_LIST_HEAD(&info->send_list); 332 INIT_LIST_HEAD(&info->send_list);
209 INIT_LIST_HEAD(&info->recv_list); 333 INIT_LIST_HEAD(&info->recv_list);
210 info->first_seen = jiffies; 334 info->first_seen = jiffies;
@@ -214,16 +338,21 @@ static struct vis_info *add_packet(struct vis_packet *vis_packet,
214 /* initialize and add new packet. */ 338 /* initialize and add new packet. */
215 *is_new = 1; 339 *is_new = 1;
216 340
341 /* Make it a broadcast packet, if required */
342 if (make_broadcast)
343 memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN);
344
217 /* repair if entries is longer than packet. */ 345 /* repair if entries is longer than packet. */
218 if (info->packet.entries * sizeof(struct vis_info_entry) > vis_info_len) 346 if (info->packet.entries * sizeof(struct vis_info_entry) > vis_info_len)
219 info->packet.entries = vis_info_len / sizeof(struct vis_info_entry); 347 info->packet.entries = vis_info_len /
348 sizeof(struct vis_info_entry);
220 349
221 recv_list_add(&info->recv_list, info->packet.sender_orig); 350 recv_list_add(&info->recv_list, info->packet.sender_orig);
222 351
223 /* try to add it */ 352 /* try to add it */
224 if (hash_add(vis_hash, info) < 0) { 353 if (hash_add(vis_hash, info) < 0) {
225 /* did not work (for some reason) */ 354 /* did not work (for some reason) */
226 free_info(info); 355 kref_put(&old_info->refcount, free_info);
227 info = NULL; 356 info = NULL;
228 } 357 }
229 358
@@ -231,62 +360,65 @@ static struct vis_info *add_packet(struct vis_packet *vis_packet,
231} 360}
232 361
233/* handle the server sync packet, forward if needed. */ 362/* handle the server sync packet, forward if needed. */
234void receive_server_sync_packet(struct vis_packet *vis_packet, int vis_info_len) 363void receive_server_sync_packet(struct bat_priv *bat_priv,
364 struct vis_packet *vis_packet,
365 int vis_info_len)
235{ 366{
236 struct vis_info *info; 367 struct vis_info *info;
237 int is_new; 368 int is_new, make_broadcast;
238 unsigned long flags; 369 unsigned long flags;
239 int vis_server = atomic_read(&vis_mode); 370 int vis_server = atomic_read(&bat_priv->vis_mode);
371
372 make_broadcast = (vis_server == VIS_TYPE_SERVER_SYNC);
240 373
241 spin_lock_irqsave(&vis_hash_lock, flags); 374 spin_lock_irqsave(&vis_hash_lock, flags);
242 info = add_packet(vis_packet, vis_info_len, &is_new); 375 info = add_packet(vis_packet, vis_info_len, &is_new, make_broadcast);
243 if (info == NULL) 376 if (info == NULL)
244 goto end; 377 goto end;
245 378
246 /* only if we are server ourselves and packet is newer than the one in 379 /* only if we are server ourselves and packet is newer than the one in
247 * hash.*/ 380 * hash.*/
248 if (vis_server == VIS_TYPE_SERVER_SYNC && is_new) { 381 if (vis_server == VIS_TYPE_SERVER_SYNC && is_new)
249 memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); 382 send_list_add(info);
250 if (list_empty(&info->send_list))
251 list_add_tail(&info->send_list, &send_list);
252 }
253end: 383end:
254 spin_unlock_irqrestore(&vis_hash_lock, flags); 384 spin_unlock_irqrestore(&vis_hash_lock, flags);
255} 385}
256 386
257/* handle an incoming client update packet and schedule forward if needed. */ 387/* handle an incoming client update packet and schedule forward if needed. */
258void receive_client_update_packet(struct vis_packet *vis_packet, 388void receive_client_update_packet(struct bat_priv *bat_priv,
389 struct vis_packet *vis_packet,
259 int vis_info_len) 390 int vis_info_len)
260{ 391{
261 struct vis_info *info; 392 struct vis_info *info;
262 int is_new; 393 int is_new;
263 unsigned long flags; 394 unsigned long flags;
264 int vis_server = atomic_read(&vis_mode); 395 int vis_server = atomic_read(&bat_priv->vis_mode);
396 int are_target = 0;
265 397
266 /* clients shall not broadcast. */ 398 /* clients shall not broadcast. */
267 if (is_bcast(vis_packet->target_orig)) 399 if (is_bcast(vis_packet->target_orig))
268 return; 400 return;
269 401
402 /* Are we the target for this VIS packet? */
403 if (vis_server == VIS_TYPE_SERVER_SYNC &&
404 is_my_mac(vis_packet->target_orig))
405 are_target = 1;
406
270 spin_lock_irqsave(&vis_hash_lock, flags); 407 spin_lock_irqsave(&vis_hash_lock, flags);
271 info = add_packet(vis_packet, vis_info_len, &is_new); 408 info = add_packet(vis_packet, vis_info_len, &is_new, are_target);
272 if (info == NULL) 409 if (info == NULL)
273 goto end; 410 goto end;
274 /* note that outdated packets will be dropped at this point. */ 411 /* note that outdated packets will be dropped at this point. */
275 412
276 413
277 /* send only if we're the target server or ... */ 414 /* send only if we're the target server or ... */
278 if (vis_server == VIS_TYPE_SERVER_SYNC && 415 if (are_target && is_new) {
279 is_my_mac(info->packet.target_orig) &&
280 is_new) {
281 info->packet.vis_type = VIS_TYPE_SERVER_SYNC; /* upgrade! */ 416 info->packet.vis_type = VIS_TYPE_SERVER_SYNC; /* upgrade! */
282 memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); 417 send_list_add(info);
283 if (list_empty(&info->send_list))
284 list_add_tail(&info->send_list, &send_list);
285 418
286 /* ... we're not the recipient (and thus need to forward). */ 419 /* ... we're not the recipient (and thus need to forward). */
287 } else if (!is_my_mac(info->packet.target_orig)) { 420 } else if (!is_my_mac(info->packet.target_orig)) {
288 if (list_empty(&info->send_list)) 421 send_list_add(info);
289 list_add_tail(&info->send_list, &send_list);
290 } 422 }
291end: 423end:
292 spin_unlock_irqrestore(&vis_hash_lock, flags); 424 spin_unlock_irqrestore(&vis_hash_lock, flags);
@@ -327,7 +459,7 @@ static bool vis_packet_full(struct vis_info *info)
327 459
328/* generates a packet of own vis data, 460/* generates a packet of own vis data,
329 * returns 0 on success, -1 if no packet could be generated */ 461 * returns 0 on success, -1 if no packet could be generated */
330static int generate_vis_packet(void) 462static int generate_vis_packet(struct bat_priv *bat_priv)
331{ 463{
332 HASHIT(hashit_local); 464 HASHIT(hashit_local);
333 HASHIT(hashit_global); 465 HASHIT(hashit_global);
@@ -339,7 +471,7 @@ static int generate_vis_packet(void)
339 unsigned long flags; 471 unsigned long flags;
340 472
341 info->first_seen = jiffies; 473 info->first_seen = jiffies;
342 info->packet.vis_type = atomic_read(&vis_mode); 474 info->packet.vis_type = atomic_read(&bat_priv->vis_mode);
343 475
344 spin_lock_irqsave(&orig_hash_lock, flags); 476 spin_lock_irqsave(&orig_hash_lock, flags);
345 memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN); 477 memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN);
@@ -361,14 +493,17 @@ static int generate_vis_packet(void)
361 while (hash_iterate(orig_hash, &hashit_global)) { 493 while (hash_iterate(orig_hash, &hashit_global)) {
362 orig_node = hashit_global.bucket->data; 494 orig_node = hashit_global.bucket->data;
363 if (orig_node->router != NULL 495 if (orig_node->router != NULL
364 && compare_orig(orig_node->router->addr, orig_node->orig) 496 && compare_orig(orig_node->router->addr,
365 && orig_node->batman_if 497 orig_node->orig)
366 && (orig_node->batman_if->if_active == IF_ACTIVE) 498 && (orig_node->router->if_incoming->if_status ==
499 IF_ACTIVE)
367 && orig_node->router->tq_avg > 0) { 500 && orig_node->router->tq_avg > 0) {
368 501
369 /* fill one entry into buffer. */ 502 /* fill one entry into buffer. */
370 entry = &entry_array[info->packet.entries]; 503 entry = &entry_array[info->packet.entries];
371 memcpy(entry->src, orig_node->batman_if->net_dev->dev_addr, ETH_ALEN); 504 memcpy(entry->src,
505 orig_node->router->if_incoming->net_dev->dev_addr,
506 ETH_ALEN);
372 memcpy(entry->dest, orig_node->orig, ETH_ALEN); 507 memcpy(entry->dest, orig_node->orig, ETH_ALEN);
373 entry->quality = orig_node->router->tq_avg; 508 entry->quality = orig_node->router->tq_avg;
374 info->packet.entries++; 509 info->packet.entries++;
@@ -400,6 +535,8 @@ static int generate_vis_packet(void)
400 return 0; 535 return 0;
401} 536}
402 537
538/* free old vis packets. Must be called with this vis_hash_lock
539 * held */
403static void purge_vis_packets(void) 540static void purge_vis_packets(void)
404{ 541{
405 HASHIT(hashit); 542 HASHIT(hashit);
@@ -412,7 +549,8 @@ static void purge_vis_packets(void)
412 if (time_after(jiffies, 549 if (time_after(jiffies,
413 info->first_seen + (VIS_TIMEOUT*HZ)/1000)) { 550 info->first_seen + (VIS_TIMEOUT*HZ)/1000)) {
414 hash_remove_bucket(vis_hash, &hashit); 551 hash_remove_bucket(vis_hash, &hashit);
415 free_info(info); 552 send_list_del(info);
553 kref_put(&info->refcount, free_info);
416 } 554 }
417 } 555 }
418} 556}
@@ -422,6 +560,8 @@ static void broadcast_vis_packet(struct vis_info *info, int packet_length)
422 HASHIT(hashit); 560 HASHIT(hashit);
423 struct orig_node *orig_node; 561 struct orig_node *orig_node;
424 unsigned long flags; 562 unsigned long flags;
563 struct batman_if *batman_if;
564 uint8_t dstaddr[ETH_ALEN];
425 565
426 spin_lock_irqsave(&orig_hash_lock, flags); 566 spin_lock_irqsave(&orig_hash_lock, flags);
427 567
@@ -430,45 +570,55 @@ static void broadcast_vis_packet(struct vis_info *info, int packet_length)
430 orig_node = hashit.bucket->data; 570 orig_node = hashit.bucket->data;
431 571
432 /* if it's a vis server and reachable, send it. */ 572 /* if it's a vis server and reachable, send it. */
433 if (orig_node && 573 if ((!orig_node) || (!orig_node->router))
434 (orig_node->flags & VIS_SERVER) && 574 continue;
435 orig_node->batman_if && 575 if (!(orig_node->flags & VIS_SERVER))
436 orig_node->router) { 576 continue;
577 /* don't send it if we already received the packet from
578 * this node. */
579 if (recv_list_is_in(&info->recv_list, orig_node->orig))
580 continue;
437 581
438 /* don't send it if we already received the packet from 582 memcpy(info->packet.target_orig, orig_node->orig, ETH_ALEN);
439 * this node. */ 583 batman_if = orig_node->router->if_incoming;
440 if (recv_list_is_in(&info->recv_list, orig_node->orig)) 584 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN);
441 continue; 585 spin_unlock_irqrestore(&orig_hash_lock, flags);
442 586
443 memcpy(info->packet.target_orig, 587 send_raw_packet((unsigned char *)&info->packet,
444 orig_node->orig, ETH_ALEN); 588 packet_length, batman_if, dstaddr);
589
590 spin_lock_irqsave(&orig_hash_lock, flags);
445 591
446 send_raw_packet((unsigned char *) &info->packet,
447 packet_length,
448 orig_node->batman_if,
449 orig_node->router->addr);
450 }
451 } 592 }
452 memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN);
453 spin_unlock_irqrestore(&orig_hash_lock, flags); 593 spin_unlock_irqrestore(&orig_hash_lock, flags);
594 memcpy(info->packet.target_orig, broadcastAddr, ETH_ALEN);
454} 595}
455 596
456static void unicast_vis_packet(struct vis_info *info, int packet_length) 597static void unicast_vis_packet(struct vis_info *info, int packet_length)
457{ 598{
458 struct orig_node *orig_node; 599 struct orig_node *orig_node;
459 unsigned long flags; 600 unsigned long flags;
601 struct batman_if *batman_if;
602 uint8_t dstaddr[ETH_ALEN];
460 603
461 spin_lock_irqsave(&orig_hash_lock, flags); 604 spin_lock_irqsave(&orig_hash_lock, flags);
462 orig_node = ((struct orig_node *) 605 orig_node = ((struct orig_node *)
463 hash_find(orig_hash, info->packet.target_orig)); 606 hash_find(orig_hash, info->packet.target_orig));
464 607
465 if ((orig_node != NULL) && 608 if ((!orig_node) || (!orig_node->router))
466 (orig_node->batman_if != NULL) && 609 goto out;
467 (orig_node->router != NULL)) { 610
468 send_raw_packet((unsigned char *) &info->packet, packet_length, 611 /* don't lock while sending the packets ... we therefore
469 orig_node->batman_if, 612 * copy the required data before sending */
470 orig_node->router->addr); 613 batman_if = orig_node->router->if_incoming;
471 } 614 memcpy(dstaddr, orig_node->router->addr, ETH_ALEN);
615 spin_unlock_irqrestore(&orig_hash_lock, flags);
616
617 send_raw_packet((unsigned char *)&info->packet,
618 packet_length, batman_if, dstaddr);
619 return;
620
621out:
472 spin_unlock_irqrestore(&orig_hash_lock, flags); 622 spin_unlock_irqrestore(&orig_hash_lock, flags);
473} 623}
474 624
@@ -500,17 +650,28 @@ static void send_vis_packets(struct work_struct *work)
500{ 650{
501 struct vis_info *info, *temp; 651 struct vis_info *info, *temp;
502 unsigned long flags; 652 unsigned long flags;
653 /* FIXME: each batman_if will be attached to a softif */
654 struct bat_priv *bat_priv = netdev_priv(soft_device);
503 655
504 spin_lock_irqsave(&vis_hash_lock, flags); 656 spin_lock_irqsave(&vis_hash_lock, flags);
657
505 purge_vis_packets(); 658 purge_vis_packets();
506 659
507 if (generate_vis_packet() == 0) 660 if (generate_vis_packet(bat_priv) == 0) {
508 /* schedule if generation was successful */ 661 /* schedule if generation was successful */
509 list_add_tail(&my_vis_info->send_list, &send_list); 662 send_list_add(my_vis_info);
663 }
510 664
511 list_for_each_entry_safe(info, temp, &send_list, send_list) { 665 list_for_each_entry_safe(info, temp, &send_list, send_list) {
512 list_del_init(&info->send_list); 666
667 kref_get(&info->refcount);
668 spin_unlock_irqrestore(&vis_hash_lock, flags);
669
513 send_vis_packet(info); 670 send_vis_packet(info);
671
672 spin_lock_irqsave(&vis_hash_lock, flags);
673 send_list_del(info);
674 kref_put(&info->refcount, free_info);
514 } 675 }
515 spin_unlock_irqrestore(&vis_hash_lock, flags); 676 spin_unlock_irqrestore(&vis_hash_lock, flags);
516 start_vis_timer(); 677 start_vis_timer();
@@ -543,6 +704,7 @@ int vis_init(void)
543 my_vis_info->first_seen = jiffies - atomic_read(&vis_interval); 704 my_vis_info->first_seen = jiffies - atomic_read(&vis_interval);
544 INIT_LIST_HEAD(&my_vis_info->recv_list); 705 INIT_LIST_HEAD(&my_vis_info->recv_list);
545 INIT_LIST_HEAD(&my_vis_info->send_list); 706 INIT_LIST_HEAD(&my_vis_info->send_list);
707 kref_init(&my_vis_info->refcount);
546 my_vis_info->packet.version = COMPAT_VERSION; 708 my_vis_info->packet.version = COMPAT_VERSION;
547 my_vis_info->packet.packet_type = BAT_VIS; 709 my_vis_info->packet.packet_type = BAT_VIS;
548 my_vis_info->packet.ttl = TTL; 710 my_vis_info->packet.ttl = TTL;
@@ -556,9 +718,9 @@ int vis_init(void)
556 718
557 if (hash_add(vis_hash, my_vis_info) < 0) { 719 if (hash_add(vis_hash, my_vis_info) < 0) {
558 printk(KERN_ERR 720 printk(KERN_ERR
559 "batman-adv:Can't add own vis packet into hash\n"); 721 "batman-adv:Can't add own vis packet into hash\n");
560 free_info(my_vis_info); /* not in hash, need to remove it 722 /* not in hash, need to remove it manually. */
561 * manually. */ 723 kref_put(&my_vis_info->refcount, free_info);
562 goto err; 724 goto err;
563 } 725 }
564 726
@@ -572,6 +734,15 @@ err:
572 return 0; 734 return 0;
573} 735}
574 736
737/* Decrease the reference count on a hash item info */
738static void free_info_ref(void *data)
739{
740 struct vis_info *info = data;
741
742 send_list_del(info);
743 kref_put(&info->refcount, free_info);
744}
745
575/* shutdown vis-server */ 746/* shutdown vis-server */
576void vis_quit(void) 747void vis_quit(void)
577{ 748{
@@ -583,7 +754,7 @@ void vis_quit(void)
583 754
584 spin_lock_irqsave(&vis_hash_lock, flags); 755 spin_lock_irqsave(&vis_hash_lock, flags);
585 /* properly remove, kill timers ... */ 756 /* properly remove, kill timers ... */
586 hash_delete(vis_hash, free_info); 757 hash_delete(vis_hash, free_info_ref);
587 vis_hash = NULL; 758 vis_hash = NULL;
588 my_vis_info = NULL; 759 my_vis_info = NULL;
589 spin_unlock_irqrestore(&vis_hash_lock, flags); 760 spin_unlock_irqrestore(&vis_hash_lock, flags);
diff --git a/drivers/staging/batman-adv/vis.h b/drivers/staging/batman-adv/vis.h
index 0cdafde0ec3a..9c1fd771cbae 100644
--- a/drivers/staging/batman-adv/vis.h
+++ b/drivers/staging/batman-adv/vis.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2008-2009 B.A.T.M.A.N. contributors: 2 * Copyright (C) 2008-2010 B.A.T.M.A.N. contributors:
3 * 3 *
4 * Simon Wunderlich, Marek Lindner 4 * Simon Wunderlich, Marek Lindner
5 * 5 *
@@ -20,8 +20,6 @@
20 */ 20 */
21 21
22#define VIS_TIMEOUT 200000 22#define VIS_TIMEOUT 200000
23#define VIS_FORMAT_DD_NAME "dot_draw"
24#define VIS_FORMAT_JSON_NAME "json"
25 23
26struct vis_info { 24struct vis_info {
27 unsigned long first_seen; 25 unsigned long first_seen;
@@ -29,6 +27,7 @@ struct vis_info {
29 /* list of server-neighbors we received a vis-packet 27 /* list of server-neighbors we received a vis-packet
30 * from. we should not reply to them. */ 28 * from. we should not reply to them. */
31 struct list_head send_list; 29 struct list_head send_list;
30 struct kref refcount;
32 /* this packet might be part of the vis send queue. */ 31 /* this packet might be part of the vis send queue. */
33 struct vis_packet packet; 32 struct vis_packet packet;
34 /* vis_info may follow here*/ 33 /* vis_info may follow here*/
@@ -48,15 +47,13 @@ struct recvlist_node {
48extern struct hashtable_t *vis_hash; 47extern struct hashtable_t *vis_hash;
49extern spinlock_t vis_hash_lock; 48extern spinlock_t vis_hash_lock;
50 49
51void proc_vis_read_entry(struct seq_file *seq, 50ssize_t vis_fill_buffer_text(struct net_device *net_dev, char *buff,
52 struct vis_info_entry *entry, 51 size_t count, loff_t off);
53 struct hlist_head *if_list, 52void receive_server_sync_packet(struct bat_priv *bat_priv,
54 uint8_t *vis_orig); 53 struct vis_packet *vis_packet,
55void proc_vis_read_prim_sec(struct seq_file *seq,
56 struct hlist_head *if_list);
57void receive_server_sync_packet(struct vis_packet *vis_packet,
58 int vis_info_len); 54 int vis_info_len);
59void receive_client_update_packet(struct vis_packet *vis_packet, 55void receive_client_update_packet(struct bat_priv *bat_priv,
56 struct vis_packet *vis_packet,
60 int vis_info_len); 57 int vis_info_len);
61int vis_init(void); 58int vis_init(void);
62void vis_quit(void); 59void vis_quit(void);
diff --git a/drivers/staging/comedi/Kconfig b/drivers/staging/comedi/Kconfig
index d63c889ce557..8ce307e64b58 100644
--- a/drivers/staging/comedi/Kconfig
+++ b/drivers/staging/comedi/Kconfig
@@ -1,7 +1,7 @@
1config COMEDI 1config COMEDI
2 tristate "Data acquisition support (comedi)" 2 tristate "Data acquisition support (comedi)"
3 default N 3 default N
4 depends on m && (PCI || PCMCIA || PCCARD || USB) 4 depends on m
5 ---help--- 5 ---help---
6 Enable support a wide range of data acquisition devices 6 Enable support a wide range of data acquisition devices
7 for Linux. 7 for Linux.
@@ -9,27 +9,1295 @@ config COMEDI
9config COMEDI_DEBUG 9config COMEDI_DEBUG
10 bool "Comedi debugging" 10 bool "Comedi debugging"
11 depends on COMEDI != n 11 depends on COMEDI != n
12 help 12 ---help---
13 This is an option for use by developers; most people should 13 This is an option for use by developers; most people should
14 say N here. This enables comedi core and driver debugging. 14 say N here. This enables comedi core and driver debugging.
15 15
16config COMEDI_PCI_DRIVERS 16menuconfig COMEDI_MISC_DRIVERS
17 tristate "Comedi misc drivers"
18 depends on COMEDI
19 default N
20 ---help---
21 Enable comedi misc drivers to be built
22
23 Note that the answer to this question won't directly affect the
24 kernel: saying N will just cause the configurator to skip all
25 the questions about misc non-hardware comedi drivers.
26
27if COMEDI_MISC_DRIVERS
28
29config COMEDI_KCOMEDILIB
30 tristate "Comedi kcomedilib"
31 ---help---
32 Build the kcomedilib
33
34config COMEDI_BOND
35 tristate "Device bonding support"
36 depends on COMEDI_KCOMEDILIB
37 default N
38 ---help---
39 Enable support for a driver to 'bond' (merge) multiple subdevices
40 from multiple devices together as one.
41
42 To compile this driver as a module, choose M here: the module will be
43 called comedi_bond.
44
45config COMEDI_TEST
46 tristate "Fake waveform generator support"
47 select COMEDI_FC
48 default N
49 ---help---
50 Enable support for the fake waveform generator.
51 This driver is mainly for testing purposes, but can also be used to
52 generate sample waveforms on systems that don't have data acquisition
53 hardware.
54
55 To compile this driver as a module, choose M here: the module will be
56 called comedi_test.
57
58config COMEDI_PARPORT
59 tristate "Parallel port support"
60 default N
61 ---help---
62 Enable support for the standard parallel port.
63 A cheap and easy way to get a few more digital I/O lines. Steal
64 additional parallel ports from old computers or your neighbors'
65 computers.
66
67 To compile this driver as a module, choose M here: the module will be
68 called comedi_parport.
69
70config COMEDI_SERIAL2002
71 tristate "Driver for serial connected hardware"
72 default N
73 ---help---
74 Enable support for serial connected hardware
75
76 To compile this driver as a module, choose M here: the module will be
77 called serial2002.
78
79config COMEDI_SKEL
80 tristate "Comedi skeleton driver"
81 default N
82 ---help---
83 Build the Skeleton driver, an example for driver writers
84
85 To compile this driver as a module, choose M here: the module will be
86 called skel.
87
88endif # COMEDI_MISC_DRIVERS
89
90menuconfig COMEDI_ISA_DRIVERS
91 tristate "Comedi ISA and PC/104 drivers"
92 depends on COMEDI && ISA
93 default N
94 ---help---
95 Enable comedi ISA and PC/104 drivers to be built
96
97 Note that the answer to this question won't directly affect the
98 kernel: saying N will just cause the configurator to skip all
99 the questions about ISA and PC/104 comedi drivers.
100
101if COMEDI_ISA_DRIVERS && ISA
102
103config COMEDI_8255
104 tristate "Generic 8255 support"
105 default N
106 ---help---
107 Enable generic 8255 support.
108
109 To compile this driver as a module, choose M here: the module will be
110 called 8255.
111
112config COMEDI_ACL7225B
113 tristate "ADlink NuDAQ ACL-7225b and compatibles support"
114 default N
115 ---help---
116 Enable support for ADlink NuDAQ ACL-7225b and compatibles,
117 ADlink ACL-7225b (acl7225b), ICP P16R16DIO (p16r16dio)
118
119 To compile this driver as a module, choose M here: the module will be
120 called acl7225b.
121
122config COMEDI_PCL711
123 tristate "Advantech PCL-711/711b and ADlink ACL-8112 ISA card support"
124 default N
125 ---help---
126 Enable support for Advantech PCL-711 and 711b, ADlink ACL-8112
127
128 To compile this driver as a module, choose M here: the module will be
129 called pcl711.
130
131config COMEDI_PCL724
132 tristate "Advantech PCL-722/724/731 and ADlink ACL-7122/7124/PET-48DIO"
133 default N
134 ---help---
135 Enable support for Advantech PCL-724, PCL-722, PCL-731 and
136 ADlink ACL-7122, ACL-7124, PET-48DIO ISA cards
137
138 To compile this driver as a module, choose M here: the module will be
139 called pcl724.
140
141config COMEDI_PCL725
142 tristate "Advantech PCL-725 and compatible ISA card support"
143 default N
144 ---help---
145 Enable support for Advantech PCL-725 and compatible ISA cards.
146
147 To compile this driver as a module, choose M here: the module will be
148 called pcl725.
149
150config COMEDI_PCL726
151 tristate "Advantech PCL-726 and compatible ISA card support"
152 default N
153 ---help---
154 Enable support for Advantech PCL-726 and compatible ISA cards.
155
156 To compile this driver as a module, choose M here: the module will be
157 called pcl726.
158
159config COMEDI_PCL730
160 tristate "Advantech PCL-730 and ADlink ACL-7130 ISA card support"
161 default N
162 ---help---
163 Enable support for Advantech PCL-730, ICP ISO-730 and ADlink
164 ACL-7130 ISA cards
165
166 To compile this driver as a module, choose M here: the module will be
167 called pcl730.
168
169config COMEDI_PCL812
170 tristate "Advantech PCL-812/813 and ADlink ACL-8112/8113/8113/8216"
171 default N
172 ---help---
173 Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
174 ACL-8112DG/HG/PG, ACL-8113, ACL-8216, ICP DAS A-821PGH/PGL/PGL-NDA,
175 A-822PGH/PGL, A-823PGH/PGL, A-826PG and ICP DAS ISO-813 ISA cards
176
177 To compile this driver as a module, choose M here: the module will be
178 called pcl812.
179
180config COMEDI_PCL816
181 tristate "Advantech PCL-814 and PCL-816 ISA card support"
182 default N
183 ---help---
184 Enable support for Advantech PCL-814 and PCL-816 ISA cards
185
186 To compile this driver as a module, choose M here: the module will be
187 called pcl816.
188
189config COMEDI_PCL818
190 tristate "Advantech PCL-718 and PCL-818 ISA card support"
191 default N
192 ---help---
193 Enable support for Advantech PCL-818 ISA cards
194 PCL-818L, PCL-818H, PCL-818HD, PCL-818HG, PCL-818 and PCL-718
195
196 To compile this driver as a module, choose M here: the module will be
197 called pcl818.
198
199config COMEDI_PCM3724
200 tristate "Advantech PCM-3724 PC/104 card support"
201 default N
202 ---help---
203 Enable support for Advantech PCM-3724 PC/104 cards.
204
205 To compile this driver as a module, choose M here: the module will be
206 called pcm3724.
207
208config COMEDI_PCM3730
209 tristate "Advantech PCM-3730 and clone PC/104 board support"
210 default N
211 ---help---
212 Enable support for Advantech PCM-3730 and clone PC/104 boards
213
214 To compile this driver as a module, choose M here: the module will be
215 called pcm3730.
216
217config COMEDI_RTI800
218 tristate "Analog Devices RTI-800/815 ISA card support"
219 default N
220 ---help---
221 Enable support for Analog Devices RTI-800/815 ISA cards
222
223 To compile this driver as a module, choose M here: the module will be
224 called rti800.
225
226config COMEDI_RTI802
227 tristate "Analog Devices RTI-802 ISA card support"
228 default N
229 ---help---
230 Enable support for Analog Devices RTI-802 ISA cards
231
232 To compile this driver as a module, choose M here: the module will be
233 called rti802.
234
235config COMEDI_DAS08
236 tristate "DAS-08 compatible ISA, PC/104 and PCMCIA card support"
237 default N
238 ---help---
239 Enable support for Keithley Metrabyte/ComputerBoards DAS08
240 and compatible ISA and PC/104 cards
241
242 To compile this driver as a module, choose M here: the module will be
243 called das08.
244
245config COMEDI_DAS16M1
246 tristate "MeasurementComputing CIO-DAS16/M1DAS-16 ISA card support"
247 select COMEDI_FC
248 default N
249 ---help---
250 Enable support for Measurement Computing CIO-DAS16/M1 ISA cards.
251
252 To compile this driver as a module, choose M here: the module will be
253 called das16m1.
254
255config COMEDI_DAS16
256 tristate "DAS-16 compatible ISA and PC/104 card support"
257 select COMEDI_FC
258 default N
259 ---help---
260 Enable support for Keithley Metrabyte/ComputerBoards DAS16
261 and compatible ISA and PC/104 cards:
262 Keithley Metrabyte DAS-16, DAS-16G, DAS-16F, DAS-1201, DAS-1202,
263 DAS-1401, DAS-1402, DAS-1601, DAS-1602 and
264 ComputerBoards/MeasurementComputing PC104-DAS16/JR/,
265 PC104-DAS16JR/16, CIO-DAS16JR/16, CIO-DAS16/JR, CIO-DAS1401/12,
266 CIO-DAS1402/12, CIO-DAS1402/16, CIO-DAS1601/12, CIO-DAS1602/12,
267 CIO-DAS1602/16, CIO-DAS16/330
268
269 To compile this driver as a module, choose M here: the module will be
270 called das16.
271
272config COMEDI_DAS800
273 tristate "DAS800 and compatible ISA card support"
274 select COMEDI_FC
275 default N
276 ---help---
277 Enable support for Keithley Metrabyte DAS800 and compatible ISA cards
278 Keithley Metrabyte DAS-800, DAS-801, DAS-802
279 Measurement Computing CIO-DAS800, CIO-DAS801, CIO-DAS802 and
280 CIO-DAS802/16
281
282 To compile this driver as a module, choose M here: the module will be
283 called das800.
284
285config COMEDI_DAS1800
286 tristate "DAS1800 and compatible ISA card support"
287 select COMEDI_FC
288 default N
289 ---help---
290 Enable support for DAS1800 and compatible ISA cards
291 Keithley Metrabyte DAS-1701ST, DAS-1701ST-DA, DAS-1701/AO,
292 DAS-1702ST, DAS-1702ST-DA, DAS-1702HR, DAS-1702HR-DA, DAS-1702/AO,
293 DAS-1801ST, DAS-1801ST-DA, DAS-1801HC, DAS-1801AO, DAS-1802ST,
294 DAS-1802ST-DA, DAS-1802HR, DAS-1802HR-DA, DAS-1802HC and
295 DAS-1802AO
296
297 To compile this driver as a module, choose M here: the module will be
298 called das1800.
299
300config COMEDI_DAS6402
301 tristate "DAS6402 and compatible ISA card support"
302 default N
303 ---help---
304 Enable support for DAS6402 and compatible ISA cards
305 Computerboards, Keithley Metrabyte DAS6402 and compatibles
306
307 To compile this driver as a module, choose M here: the module will be
308 called das6402.
309
310config COMEDI_DT2801
311 tristate "Data Translation DT2801 ISA card support"
312 default N
313 ---help---
314 Enable support for Data Translation DT2801 ISA cards
315
316 To compile this driver as a module, choose M here: the module will be
317 called dt2801.
318
319config COMEDI_DT2811
320 tristate "Data Translation DT2811 ISA card support"
321 default N
322 ---help---
323 Enable support for Data Translation DT2811 ISA cards
324
325 To compile this driver as a module, choose M here: the module will be
326 called dt2811.
327
328config COMEDI_DT2814
329 tristate "Data Translation DT2814 ISA card support"
330 default N
331 ---help---
332 Enable support for Data Translation DT2814 ISA cards
333
334 To compile this driver as a module, choose M here: the module will be
335 called dt2814.
336
337config COMEDI_DT2815
338 tristate "Data Translation DT2815 ISA card support"
339 default N
340 ---help---
341 Enable support for Data Translation DT2815 ISA cards
342
343 To compile this driver as a module, choose M here: the module will be
344 called dt2815.
345
346config COMEDI_DT2817
347 tristate "Data Translation DT2817 ISA card support"
348 default N
349 ---help---
350 Enable support for Data Translation DT2817 ISA cards
351
352 To compile this driver as a module, choose M here: the module will be
353 called dt2817.
354
355config COMEDI_DT282X
356 tristate "Data Translation DT2821 series and DT-EZ ISA card support"
357 select COMEDI_FC
358 default N
359 ---help---
360 Enable support for Data Translation DT2821 series including DT-EZ
361 DT2821, DT2821-F-16SE, DT2821-F-8DI, DT2821-G-16SE, DT2821-G-8DI,
362 DT2823 (dt2823), DT2824-PGH, DT2824-PGL, DT2825, DT2827, DT2828,
363 DT21-EZ, DT23-EZ, DT24-EZ and DT24-EZ-PGL
364
365 To compile this driver as a module, choose M here: the module will be
366 called dt282x.
367
368config COMEDI_DMM32AT
369 tristate "Diamond Systems MM-32-AT PC/104 board support"
370 default N
371 ---help---
372 Enable support for Diamond Systems MM-32-AT PC/104 boards
373
374 To compile this driver as a module, choose M here: the module will be
375 called dmm32at.
376
377config COMEDI_FL512
378 tristate "FL512 ISA card support"
379 default N
380 ---help---
381 Enable support for FL512 ISA card
382
383 To compile this driver as a module, choose M here: the module will be
384 called fl512.
385
386config COMEDI_AIO_AIO12_8
387 tristate "I/O Products PC/104 AIO12-8 Analog I/O Board support"
388 default N
389 ---help---
390 Enable support for I/O Products PC/104 AIO12-8 Analog I/O Board
391
392 To compile this driver as a module, choose M here: the module will be
393 called aio_aio12_8.
394
395config COMEDI_AIO_IIRO_16
396 tristate "I/O Products PC/104 IIRO16 Board support"
397 default N
398 ---help---
399 Enable support for I/O Products PC/104 IIRO16 Relay And Isolated
400 Input Board
401
402 To compile this driver as a module, choose M here: the module will be
403 called aio_iiro_16.
404
405config COMEDI_C6XDIGIO
406 tristate "Mechatronic Systems Inc. C6x_DIGIO DSP daughter card support"
407 default N
408 ---help---
409 Enable support for Mechatronic Systems Inc. C6x_DIGIO DSP daughter
410 card
411
412 To compile this driver as a module, choose M here: the module will be
413 called c6xdigio.
414
415config COMEDI_MPC624
416 tristate "Micro/sys MPC-624 PC/104 board support"
417 default N
418 ---help---
419 Enable support for Micro/sys MPC-624 PC/104 board
420
421 To compile this driver as a module, choose M here: the module will be
422 called mpc624.
423
424config COMEDI_ADQ12B
425 tristate "MicroAxial ADQ12-B data acquisition and control card support"
426 default N
427 ---help---
428 Enable MicroAxial ADQ12-B daq and control card support.
429
430 To compile this driver as a module, choose M here: the module will be
431 called adq12b.
432
433config COMEDI_NI_AT_A2150
434 tristate "NI AT-A2150 ISA card support"
435 depends on COMEDI_NI_COMMON
436 default N
437 ---help---
438 Enable support for National Instruments AT-A2150 cards
439
440 To compile this driver as a module, choose M here: the module will be
441 called ni_at_a2150.
442
443config COMEDI_NI_AT_AO
444 tristate "NI AT-AO-6/10 EISA card support"
445 depends on COMEDI_NI_COMMON
446 default N
447 ---help---
448 Enable support for National Instruments AT-AO-6/10 cards
449
450 To compile this driver as a module, choose M here: the module will be
451 called ni_at_ao.
452
453config COMEDI_NI_ATMIO
454 tristate "NI AT-MIO E series ISA-PNP card support"
455 depends on ISAPNP && COMEDI_NI_TIO && COMEDI_NI_COMMON
456 default N
457 ---help---
458 Enable support for National Instruments AT-MIO E series cards
459 National Instruments AT-MIO-16E-1 (ni_atmio),
460 AT-MIO-16E-2, AT-MIO-16E-10, AT-MIO-16DE-10, AT-MIO-64E-3,
461 AT-MIO-16XE-50, AT-MIO-16XE-10, AT-AI-16XE-10
462
463 To compile this driver as a module, choose M here: the module will be
464 called ni_atmio.
465
466config COMEDI_NI_ATMIO16D
467 tristate "NI AT-MIO16/AT-MIO16D series ISA-PNP card support"
468 depends on ISAPNP && COMEDI_NI_COMMON
469 default N
470 ---help---
471 Enable support for National Instruments AT-MIO16/AT-MIO16D cards.
472
473 To compile this driver as a module, choose M here: the module will be
474 called ni_atmio16d.
475
476config COMEDI_PCMAD
477 tristate "Winsystems PCM-A/D12 and PCM-A/D16 PC/104 board support"
478 default N
479 ---help---
480 Enable support for Winsystems PCM-A/D12 and PCM-A/D16 PC/104 boards.
481
482 To compile this driver as a module, choose M here: the module will be
483 called pcmad.
484
485config COMEDI_PCMDA12
486 tristate "Winsystems PCM-D/A-12 8-channel AO PC/104 board support"
487 default N
488 ---help---
489 Enable support for Winsystems PCM-D/A-12 8-channel AO PC/104 boards.
490 Note that the board is not ISA-PNP capable and thus needs the I/O
491 port comedi_config parameter.
492
493 To compile this driver as a module, choose M here: the module will be
494 called pcmda12.
495
496config COMEDI_PCMMIO
497 tristate "Winsystems PCM-MIO PC/104 board support"
498 default N
499 ---help---
500 Enable support for Winsystems PCM-MIO multifunction PC/104 boards.
501
502 To compile this driver as a module, choose M here: the module will be
503 called pcmmio.
504
505config COMEDI_PCMUIO
506 tristate "Winsystems PCM-UIO48A and PCM-UIO96A PC/104 board support"
507 default N
508 ---help---
509 Enable support for PCM-UIO48A and PCM-UIO96A PC/104 boards.
510
511 To compile this driver as a module, choose M here: the module will be
512 called pcmuio.
513
514config COMEDI_MULTIQ3
515 tristate "Quanser Consulting MultiQ-3 ISA card support"
516 default N
517 ---help---
518 Enable support for Quanser Consulting MultiQ-3 ISA cards
519
520 To compile this driver as a module, choose M here: the module will be
521 called multiq3.
522
523config COMEDI_POC
524 tristate "Generic driver for very simple devices"
525 default N
526 ---help---
527 Enable generic support for very simple / POC (Piece of Crap) boards,
528 Keithley Metrabyte DAC-02 (dac02), Advantech PCL-733 (pcl733) and
529 PCL-734 (pcl734)
530
531 To compile this driver as a module, choose M here: the module will be
532 called poc.
533
534endif # COMEDI_ISA_DRIVERS
535
536menuconfig COMEDI_PCI_DRIVERS
17 tristate "Comedi PCI drivers" 537 tristate "Comedi PCI drivers"
18 depends on COMEDI && PCI 538 depends on COMEDI && PCI
19 default N 539 default N
20 ---help--- 540 ---help---
21 Enable lots of comedi PCI drivers to be built 541 Enable comedi PCI drivers to be built
542
543 Note that the answer to this question won't directly affect the
544 kernel: saying N will just cause the configurator to skip all
545 the questions about PCI comedi drivers.
546
547if COMEDI_PCI_DRIVERS && PCI
548
549config COMEDI_ADDI_APCI_035
550 tristate "ADDI-DATA APCI_035 support"
551 default N
552 ---help---
553 Enable support for ADDI-DATA APCI_035 cards
554
555 To compile this driver as a module, choose M here: the module will be
556 called addi_apci_035.
557
558config COMEDI_ADDI_APCI_1032
559 tristate "ADDI-DATA APCI_1032 support"
560 default N
561 ---help---
562 Enable support for ADDI-DATA APCI_1032 cards
563
564 To compile this driver as a module, choose M here: the module will be
565 called addi_apci_1032.
566
567config COMEDI_ADDI_APCI_1500
568 tristate "ADDI-DATA APCI_1500 support"
569 default N
570 ---help---
571 Enable support for ADDI-DATA APCI_1500 cards
572
573 To compile this driver as a module, choose M here: the module will be
574 called addi_apci_1500.
575
576config COMEDI_ADDI_APCI_1516
577 tristate "ADDI-DATA APCI_1516 support"
578 default N
579 ---help---
580 Enable support for ADDI-DATA APCI_1516 cards
581
582 To compile this driver as a module, choose M here: the module will be
583 called addi_apci_1516.
584
585config COMEDI_ADDI_APCI_1564
586 tristate "ADDI-DATA APCI_1564 support"
587 default N
588 ---help---
589 Enable support for ADDI-DATA APCI_1564 cards
590
591 To compile this driver as a module, choose M here: the module will be
592 called addi_apci_1564.
593
594config COMEDI_ADDI_APCI_16XX
595 tristate "ADDI-DATA APCI_16xx support"
596 default N
597 ---help---
598 Enable support for ADDI-DATA APCI_16xx cards
599
600 To compile this driver as a module, choose M here: the module will be
601 called addi_apci_16xx.
602
603config COMEDI_ADDI_APCI_2016
604 tristate "ADDI-DATA APCI_2016 support"
605 default N
606 ---help---
607 Enable support for ADDI-DATA APCI_2016 cards
608
609 To compile this driver as a module, choose M here: the module will be
610 called addi_apci_2016.
611
612config COMEDI_ADDI_APCI_2032
613 tristate "ADDI-DATA APCI_2032 support"
614 default N
615 ---help---
616 Enable support for ADDI-DATA APCI_2032 cards
617
618 To compile this driver as a module, choose M here: the module will be
619 called addi_apci_2032.
620
621config COMEDI_ADDI_APCI_2200
622 tristate "ADDI-DATA APCI_2200 support"
623 default N
624 ---help---
625 Enable support for ADDI-DATA APCI_2200 cards
626
627 To compile this driver as a module, choose M here: the module will be
628 called addi_apci_2200.
629
630config COMEDI_ADDI_APCI_3001
631 tristate "ADDI-DATA APCI_3001 support"
632 select COMEDI_FC
633 default N
634 ---help---
635 Enable support for ADDI-DATA APCI_3001 cards
636
637 To compile this driver as a module, choose M here: the module will be
638 called addi_apci_3001.
639
640config COMEDI_ADDI_APCI_3120
641 tristate "ADDI-DATA APCI_3520 support"
642 select COMEDI_FC
643 default N
644 ---help---
645 Enable support for ADDI-DATA APCI_3520 cards
646
647 To compile this driver as a module, choose M here: the module will be
648 called addi_apci_3120.
649
650config COMEDI_ADDI_APCI_3501
651 tristate "ADDI-DATA APCI_3501 support"
652 default N
653 ---help---
654 Enable support for ADDI-DATA APCI_3501 cards
655
656 To compile this driver as a module, choose M here: the module will be
657 called addi_apci_3501.
658
659config COMEDI_ADDI_APCI_3XXX
660 tristate "ADDI-DATA APCI_3xxx support"
661 default N
662 ---help---
663 Enable support for ADDI-DATA APCI_3xxx cards
664
665 To compile this driver as a module, choose M here: the module will be
666 called addi_apci_3xxx.
667
668config COMEDI_ADL_PCI6208
669 tristate "ADLink PCI-6208A support"
670 default N
671 ---help---
672 Enable support for ADLink PCI-6208A cards
673
674 To compile this driver as a module, choose M here: the module will be
675 called adl_pci6208.
676
677config COMEDI_ADL_PCI7230
678 tristate "ADLink PCI-7230 digital io board support"
679 default N
680 ---help---
681 Enable support for ADlink PCI-7230 digital io board support
682
683 To compile this driver as a module, choose M here: the module will be
684 called adl_pci7230.
685
686config COMEDI_ADL_PCI7296
687 tristate "ADLink PCI-7296 96 ch. digital io board support"
688 default N
689 ---help---
690 Enable support for ADlink PCI-7296 96 ch. digital io board support
691
692 To compile this driver as a module, choose M here: the module will be
693 called adl_pci7296.
694
695config COMEDI_ADL_PCI7432
696 tristate "ADLink PCI-7432 64 ch. isolated digital io board support"
697 default N
698 ---help---
699 Enable support for ADlink PCI-7432 64 ch. isolated digital io board
700
701 To compile this driver as a module, choose M here: the module will be
702 called adl_pci7432.
703
704config COMEDI_ADL_PCI8164
705 tristate "ADLink PCI-8164 4 Axes Motion Control board support"
706 default N
707 ---help---
708 Enable support for ADlink PCI-8164 4 Axes Motion Control board
709
710 To compile this driver as a module, choose M here: the module will be
711 called adl_pci8164.
712
713config COMEDI_ADL_PCI9111
714 tristate "ADLink PCI-9111HR support"
715 select COMEDI_FC
716 default N
717 ---help---
718 Enable support for ADlink PCI9111 cards
719
720 To compile this driver as a module, choose M here: the module will be
721 called adl_pci9111.
722
723config COMEDI_ADL_PCI9118
724 tristate "ADLink PCI-9118DG, PCI-9118HG, PCI-9118HR support"
725 select COMEDI_FC
726 default N
727 ---help---
728 Enable support for ADlink PCI-9118DG, PCI-9118HG, PCI-9118HR cards
729
730 To compile this driver as a module, choose M here: the module will be
731 called adl_pci9118.
732
733config COMEDI_ADV_PCI1710
734 tristate "Advantech PCI-171x, PCI-1720 and PCI-1731 support"
735 default N
736 ---help---
737 Enable support for Advantech PCI-1710, PCI-1710HG, PCI-1711,
738 PCI-1713, PCI-1720 and PCI-1731
739
740 To compile this driver as a module, choose M here: the module will be
741 called adv_pci1710.
742
743config COMEDI_ADV_PCI1723
744 tristate "Advantech PCI-1723 support"
745 default N
746 ---help---
747 Enable support for Advantech PCI-1723 cards
748
749 To compile this driver as a module, choose M here: the module will be
750 called adv_pci1723.
751
752config COMEDI_ADV_PCI_DIO
753 tristate "Advantech PCI DIO card support"
754 default N
755 ---help---
756 Enable support for Advantech PCI DIO cards
757 PCI-1730, PCI-1733, PCI-1734, PCI-1736UP, PCI-1750, PCI-1751,
758 PCI-1752, PCI-1753/E, PCI-1754, PCI-1756 and PCI-1762
759
760 To compile this driver as a module, choose M here: the module will be
761 called adv_pci_dio.
762
763config COMEDI_AMPLC_DIO200
764 tristate "Amplicon PC272E and PCI272 DIO board support"
765 default N
766 ---help---
767 Enable support for Amplicon PC272E and PCI272 DIO boards
768
769 To compile this driver as a module, choose M here: the module will be
770 called amplc_dio200.
771
772config COMEDI_AMPLC_PC236
773 tristate "Amplicon PC36AT and PCI236 DIO board support"
774 default N
775 ---help---
776 Enable support for Amplicon PC36AT and PCI236 DIO boards
777
778 To compile this driver as a module, choose M here: the module will be
779 called amplc_pc236.
780
781config COMEDI_AMPLC_PC263
782 tristate "Amplicon PC263 and PCI263 relay board support"
783 default N
784 ---help---
785 Enable support for Amplicon PC263 and PCI263 relay boards
786
787 To compile this driver as a module, choose M here: the module will be
788 called amplc_pc263.
789
790config COMEDI_AMPLC_PCI224
791 tristate "Amplicon PCI224 and PCI234 support"
792 select COMEDI_FC
793 default N
794 ---help---
795 Enable support for Amplicon PCI224 and PCI234 AO boards
796
797 To compile this driver as a module, choose M here: the module will be
798 called amplc_pci224.
799
800config COMEDI_AMPLC_PCI230
801 tristate "Amplicon PCI230 and PCI260 support"
802 default N
803 ---help---
804 Enable support for Amplicon PCI230 and PCI260 Multifunction I/O
805 boards
806
807 To compile this driver as a module, choose M here: the module will be
808 called amplc_pci230.
809
810config COMEDI_CONTEC_PCI_DIO
811 tristate "Contec PIO1616L digital I/O board support"
812 default N
813 ---help---
814 Enable support for the Contec PIO1616L digital I/O board
815
816 To compile this driver as a module, choose M here: the module will be
817 called contec_pci_dio.
818
819config COMEDI_DT3000
820 tristate "Data Translation DT3000 series support"
821 default N
822 ---help---
823 Enable support for Data Translation DT3000 series
824 DT3001, DT3001-PGL, DT3002, DT3003, DT3003-PGL, DT3004, DT3005 and
825 DT3004-200
826
827 To compile this driver as a module, choose M here: the module will be
828 called dt3000.
829
830config COMEDI_UNIOXX5
831 tristate "Fastwel UNIOxx-5 analog and digital io board support"
832 default N
833 ---help---
834 Enable support for Fastwel UNIOxx-5 (analog and digital i/o) boards
835
836 To compile this driver as a module, choose M here: the module will be
837 called unioxx5.
838
839config COMEDI_GSC_HPDI
840 tristate "General Standards PCI-HPDI32 / PMC-HPDI32 support"
841 select COMEDI_FC
842 default N
843 ---help---
844 Enable support for General Standards Corporation high speed parallel
845 digital interface rs485 boards PCI-HPDI32 and PMC-HPDI32.
846 Only receive mode works, transmit not supported.
847
848 To compile this driver as a module, choose M here: the module will be
849 called gsc_hpdi.
850
851config COMEDI_ICP_MULTI
852 tristate "Inova ICP_MULTI support"
853 default N
854 ---help---
855 Enable support for Inova ICP_MULTI card
856
857 To compile this driver as a module, choose M here: the module will be
858 called icp_multi.
859
860config COMEDI_II_PCI20KC
861 tristate "Intelligent Instruments PCI-20001C carrier support"
862 default N
863 ---help---
864 Enable support for Intelligent Instruments PCI-20001C carrier
865 PCI-20001, PCI-20006 and PCI-20341
866
867 To compile this driver as a module, choose M here: the module will be
868 called ii_pci20kc.
869
870config COMEDI_DAQBOARD2000
871 tristate "IOtech DAQboard/2000 support"
872 default N
873 ---help---
874 Enable support for the IOtech DAQboard/2000
875
876 To compile this driver as a module, choose M here: the module will be
877 called daqboard2000.
878
879config COMEDI_JR3_PCI
880 tristate "JR3/PCI force sensor board support"
881 default N
882 ---help---
883 Enable support for JR3/PCI force sensor boards
884
885 To compile this driver as a module, choose M here: the module will be
886 called jr3_pci.
887
888config COMEDI_KE_COUNTER
889 tristate "Kolter-Electronic PCI Counter 1 card support"
890 default N
891 ---help---
892 Enable support for Kolter-Electronic PCI Counter 1 cards
893
894 To compile this driver as a module, choose M here: the module will be
895 called ke_counter.
896
897config COMEDI_CB_PCIDAS64
898 tristate "MeasurementComputing PCI-DAS 64xx, 60xx, and 4020 support"
899 select COMEDI_FC
900 default N
901 ---help---
902 Enable support for ComputerBoards/MeasurementComputing PCI-DAS 64xx,
903 60xx, and 4020 series with the PLX 9080 PCI controller
904
905 To compile this driver as a module, choose M here: the module will be
906 called cb_pcidas64.
907
908config COMEDI_CB_PCIDAS
909 tristate "MeasurementComputing PCI-DAS support"
910 select COMEDI_FC
911 default N
912 ---help---
913 Enable support for ComputerBoards/MeasurementComputing PCI-DAS with
914 AMCC S5933 PCIcontroller: PCI-DAS1602/16, PCI-DAS1602/16jr,
915 PCI-DAS1602/12, PCI-DAS1200, PCI-DAS1200jr, PCI-DAS1000, PCI-DAS1001
916 and PCI_DAS1002.
917
918 To compile this driver as a module, choose M here: the module will be
919 called cb_pcidas.
920
921config COMEDI_CB_PCIDDA
922 tristate "MeasurementComputing PCI-DDA series support"
923 default N
924 ---help---
925 Enable support for ComputerBoards/MeasurementComputing PCI-DDA
926 series: PCI-DDA08/12, PCI-DDA04/12, PCI-DDA02/12, PCI-DDA08/16,
927 PCI-DDA04/16 and PCI-DDA02/16
928
929 To compile this driver as a module, choose M here: the module will be
930 called cb_pcidda.
931
932config COMEDI_CB_PCIDIO
933 tristate "MeasurementComputing PCI-DIO series support"
934 default N
935 ---help---
936 Enable support for ComputerBoards/MeasurementComputing PCI-DIO series
937 PCI-DIO24, PCI-DIO24H and PCI-DIO48H
938
939 To compile this driver as a module, choose M here: the module will be
940 called cb_pcidio.
941
942config COMEDI_CB_PCIMDAS
943 tristate "MeasurementComputing PCIM-DAS1602/16 support"
944 default N
945 ---help---
946 Enable support for ComputerBoards/MeasurementComputing PCI Migration
947 series PCIM-DAS1602/16
948
949 To compile this driver as a module, choose M here: the module will be
950 called cb_pcimdas.
22 951
23config COMEDI_PCMCIA_DRIVERS 952config COMEDI_CB_PCIMDDA
953 tristate "MeasurementComputing PCIM-DDA06-16 support"
954 default N
955 ---help---
956 Enable support for ComputerBoards/MeasurementComputing PCIM-DDA06-16
957
958 To compile this driver as a module, choose M here: the module will be
959 called cb_pcimdda.
960
961config COMEDI_ME4000
962 tristate "Meilhaus ME-4000 support"
963 default N
964 ---help---
965 Enable support for Meilhaus PCI data acquisition cards
966 ME-4650, ME-4670i, ME-4680, ME-4680i and ME-4680is
967
968 To compile this driver as a module, choose M here: the module will be
969 called me4000.
970
971config COMEDI_ME_DAQ
972 tristate "Meilhaus ME-2000i, ME-2600i, ME-3000vm1 support"
973 default N
974 ---help---
975 Enable support for Meilhaus PCI data acquisition cards
976 ME-2000i, ME-2600i and ME-3000vm1
977
978 To compile this driver as a module, choose M here: the module will be
979 called me_daq.
980
981config COMEDI_NI_6527
982 tristate "NI 6527 support"
983 depends on COMEDI_MITE
984 default N
985 ---help---
986 Enable support for the National Instruments 6527 PCI card
987
988 To compile this driver as a module, choose M here: the module will be
989 called ni_6527.
990
991config COMEDI_NI_65XX
992 tristate "NI 65xx static dio PCI card support"
993 depends on COMEDI_MITE
994 default N
995 ---help---
996 Enable support for National Instruments 65xx static dio boards.
997 Supported devices: National Instruments PCI-6509 (ni_65xx),
998 PXI-6509, PCI-6510, PCI-6511, PXI-6511, PCI-6512, PXI-6512, PCI-6513,
999 PXI-6513, PCI-6514, PXI-6514, PCI-6515, PXI-6515, PCI-6516, PCI-6517,
1000 PCI-6518, PCI-6519, PCI-6520, PCI-6521, PXI-6521, PCI-6528, PXI-6528
1001
1002 To compile this driver as a module, choose M here: the module will be
1003 called ni_65xx.
1004
1005config COMEDI_NI_660X
1006 tristate "NI 660x counter/timer PCI card support"
1007 depends on COMEDI_NI_TIO && COMEDI_NI_COMMON
1008 default N
1009 ---help---
1010 Enable support for National Instruments PCI-6601 (ni_660x), PCI-6602,
1011 PXI-6602 and PXI-6608.
1012
1013 To compile this driver as a module, choose M here: the module will be
1014 called ni_660x.
1015
1016config COMEDI_NI_670X
1017 tristate "NI 670x PCI card support"
1018 depends on COMEDI_MITE
1019 default N
1020 ---help---
1021 Enable support for National Instruments PCI-6703 and PCI-6704
1022
1023 To compile this driver as a module, choose M here: the module will be
1024 called ni_670x.
1025
1026config COMEDI_NI_PCIDIO
1027 tristate "NI PCI-DIO32HS, PCI-DIO96, PCI-6533, PCI-6503 support"
1028 depends on COMEDI_MITE
1029 default N
1030 ---help---
1031 Enable support for National Instruments PCI-DIO-32HS, PXI-6533,
1032 PCI-DIO-96, PCI-DIO-96B, PXI-6508, PCI-6503, PCI-6503B, PCI-6503X,
1033 PXI-6503, PCI-6533 and PCI-6534
1034 The DIO-96 appears as four 8255 subdevices. See the 8255
1035 driver notes for details.
1036
1037 To compile this driver as a module, choose M here: the module will be
1038 called ni_pcidio.
1039
1040config COMEDI_NI_PCIMIO
1041 tristate "NI PCI-MIO-E series and M series support"
1042 depends on COMEDI_NI_TIO && COMEDI_NI_COMMON
1043 default N
1044 ---help---
1045 Enable support for National Instruments PCI-MIO-E series and M series
1046 (all boards): PCI-MIO-16XE-10, PXI-6030E, PCI-MIO-16E-1,
1047 PCI-MIO-16E-4, PCI-6014, PCI-6040E, PXI-6040E, PCI-6030E, PCI-6031E,
1048 PCI-6032E, PCI-6033E, PCI-6071E, PCI-6023E, PCI-6024E, PCI-6025E,
1049 PXI-6025E, PCI-6034E, PCI-6035E, PCI-6052E, PCI-6110, PCI-6111,
1050 PCI-6220, PCI-6221, PCI-6224, PXI-6224, PCI-6225, PXI-6225, PCI-6229,
1051 PCI-6250, PCI-6251, PCIe-6251, PCI-6254, PCI-6259, PCIe-6259,
1052 PCI-6280, PCI-6281, PXI-6281, PCI-6284, PCI-6289, PCI-6711, PXI-6711,
1053 PCI-6713, PXI-6713, PXI-6071E, PCI-6070E, PXI-6070E, PXI-6052E,
1054 PCI-6036E, PCI-6731, PCI-6733, PXI-6733, PCI-6143, PXI-6143
1055
1056 To compile this driver as a module, choose M here: the module will be
1057 called ni_pcimio.
1058
1059config COMEDI_RTD520
1060 tristate "Real Time Devices PCI4520/DM7520 support"
1061 default N
1062 ---help---
1063 Enable support for Real Time Devices PCI4520/DM7520
1064
1065 To compile this driver as a module, choose M here: the module will be
1066 called rtd520.
1067
1068config COMEDI_S526
1069 tristate "Sensoray s526 support"
1070 default N
1071 ---help---
1072 Enable support for Sensoray s526
1073
1074 To compile this driver as a module, choose M here: the module will be
1075 called s526.
1076
1077config COMEDI_S626
1078 tristate "Sensoray 626 support"
1079 select COMEDI_FC
1080 default N
1081 ---help---
1082 Enable support for Sensoray 626
1083
1084 To compile this driver as a module, choose M here: the module will be
1085 called s626.
1086
1087config COMEDI_SSV_DNP
1088 tristate "SSV Embedded Systems DIL/Net-PC support"
1089 default N
1090 ---help---
1091 Enable support for SSV Embedded Systems DIL/Net-PC
1092
1093 To compile this driver as a module, choose M here: the module will be
1094 called ssv_dnp.
1095
1096endif # COMEDI_PCI_DRIVERS
1097
1098menuconfig COMEDI_PCMCIA_DRIVERS
24 tristate "Comedi PCMCIA drivers" 1099 tristate "Comedi PCMCIA drivers"
25 depends on COMEDI && PCMCIA && PCCARD 1100 depends on COMEDI && PCMCIA && PCCARD
26 default N 1101 default N
27 ---help--- 1102 ---help---
28 Enable lots of comedi PCMCIA and PCCARD drivers to be built 1103 Enable comedi PCMCIA and PCCARD drivers to be built
1104
1105 Note that the answer to this question won't directly affect the
1106 kernel: saying N will just cause the configurator to skip all
1107 the questions about PCMCIA comedi drivers.
1108
1109if COMEDI_PCMCIA_DRIVERS && PCMCIA
1110
1111config COMEDI_CB_DAS16_CS
1112 tristate "CB DAS16 series PCMCIA support"
1113 default N
1114 ---help---
1115 Enable support for the ComputerBoards/MeasurementComputing PCMCIA
1116 cards DAS16/16, PCM-DAS16D/12 and PCM-DAS16s/16
1117
1118 To compile this driver as a module, choose M here: the module will be
1119 called cb_das16_cs.
1120
1121config COMEDI_DAS08_CS
1122 tristate "CB DAS08 PCMCIA support"
1123 select COMEDI_DAS08
1124 default N
1125 ---help---
1126 Enable support for the ComputerBoards/MeasurementComputing DAS-08
1127 PCMCIA card
1128
1129 To compile this driver as a module, choose M here: the module will be
1130 called das08_cs.
29 1131
30config COMEDI_USB_DRIVERS 1132config COMEDI_NI_DAQ_700_CS
1133 tristate "NI DAQCard-700 PCMCIA support"
1134 depends on COMEDI_NI_COMMON
1135 default N
1136 ---help---
1137 Enable support for the National Instruments PCMCIA DAQCard-700 DIO
1138
1139 To compile this driver as a module, choose M here: the module will be
1140 called ni_daq_700.
1141
1142config COMEDI_NI_DAQ_DIO24_CS
1143 tristate "NI DAQ-Card DIO-24 PCMCIA support"
1144 depends on COMEDI_NI_COMMON
1145 default N
1146 ---help---
1147 Enable support for the National Instruments PCMCIA DAQ-Card DIO-24
1148
1149 To compile this driver as a module, choose M here: the module will be
1150 called ni_daq_dio24.
1151
1152config COMEDI_NI_LABPC_CS
1153 tristate "NI DAQCard-1200 PCMCIA support"
1154 depends on COMEDI_NI_LABPC
1155 default N
1156 ---help---
1157 Enable support for the National Instruments PCMCIA DAQCard-1200
1158
1159 To compile this driver as a module, choose M here: the module will be
1160 called ni_labpc_cs.
1161
1162config COMEDI_NI_MIO_CS
1163 tristate "NI DAQCard E series PCMCIA support"
1164 depends on COMEDI_NI_TIO && COMEDI_NI_COMMON
1165 default N
1166 select COMEDI_FC
1167 ---help---
1168 Enable support for the National Instruments PCMCIA DAQCard E series
1169 DAQCard-ai-16xe-50, DAQCard-ai-16e-4, DAQCard-6062E, DAQCard-6024E
1170 and DAQCard-6036E
1171
1172 To compile this driver as a module, choose M here: the module will be
1173 called ni_mio_cs.
1174
1175config COMEDI_QUATECH_DAQP_CS
1176 tristate "Quatech DAQP PCMCIA data capture card support"
1177 default N
1178 ---help---
1179 Enable support for the Quatech DAQP PCMCIA data capture cards
1180 DAQP-208 and DAQP-308
1181
1182 To compile this driver as a module, choose M here: the module will be
1183 called quatech_daqp_cs.
1184
1185endif # COMEDI_PCMCIA_DRIVERS
1186
1187menuconfig COMEDI_USB_DRIVERS
31 tristate "Comedi USB drivers" 1188 tristate "Comedi USB drivers"
32 depends on COMEDI && USB 1189 depends on COMEDI && USB
33 default N 1190 default N
34 ---help--- 1191 ---help---
35 Enable lots of comedi USB drivers to be built 1192 Enable comedi USB drivers to be built
1193
1194 Note that the answer to this question won't directly affect the
1195 kernel: saying N will just cause the configurator to skip all
1196 the questions about USB comedi drivers.
1197
1198if COMEDI_USB_DRIVERS && USB
1199
1200config COMEDI_DT9812
1201 tristate "DataTranslation DT9812 USB module support"
1202 default N
1203 ---help---
1204 Enable support for the Data Translation DT9812 USB module
1205
1206 To compile this driver as a module, choose M here: the module will be
1207 called dt9812.
1208
1209config COMEDI_USBDUX
1210 tristate "ITL USBDUX support"
1211 default N
1212 ---help---
1213 Enable support for the University of Stirling USB DAQ and INCITE
1214 Technology Limited driver
1215
1216 To compile this driver as a module, choose M here: the module will be
1217 called usbdux.
1218
1219config COMEDI_USBDUXFAST
1220 tristate "ITL USB-DUXfast support"
1221 select COMEDI_FC
1222 default N
1223 ---help---
1224 Enable support for the University of Stirling USB-DUXfast and INCITE
1225 Technology Limited driver
1226
1227 To compile this driver as a module, choose M here: the module will be
1228 called usbduxfast.
1229
1230config COMEDI_VMK80XX
1231 tristate "Velleman VM110/VM140 USB Board support"
1232 default N
1233 ---help---
1234 Build the Velleman USB Board Low-Level Driver supporting the
1235 K8055/K8061 aka VM110/VM140 devices
1236
1237 To compile this driver as a module, choose M here: the module will be
1238 called vmk80xx.
1239
1240endif # COMEDI_USB_DRIVERS
1241
1242menuconfig COMEDI_NI_COMMON
1243 tristate "Comedi National Instruments card support"
1244 depends on COMEDI
1245 default N
1246 ---help---
1247 Enable comedi support for National Instruments cards.
1248 Modules in this section are used by many comedi NI drivers.
1249
1250 Note that the answer to this question won't directly affect the
1251 kernel: saying N will just cause the configurator to skip all
1252 the questions about National Instruments cards.
1253
1254if COMEDI_NI_COMMON
1255
1256config COMEDI_MITE
1257 tristate "NI Mite PCI interface chip support"
1258 depends on PCI
1259 default N
1260 ---help---
1261 Enable support for National Instruments Mite PCI interface chip
1262
1263 To compile this driver as a module, choose M here: the module will be
1264 called mite.
1265
1266config COMEDI_NI_TIO
1267 tristate "NI general purpose counter support"
1268 select COMEDI_MITE
1269 default N
1270 ---help---
1271 Enable support for National Instruments general purpose counters.
1272 This module is not used directly by end-users. Rather, it
1273 is used by other drivers (for example ni_660x and ni_pcimio)
1274 to provide support for NI's general purpose counters.
1275
1276 To compile this driver as a modules, choose M here: two modules will
1277 be build: ni_tio and ni_tiocmd.
1278
1279config COMEDI_NI_LABPC
1280 tristate "NI Lab-PC and compatibles ISA and PCI support"
1281 select COMEDI_FC
1282 default N
1283 ---help---
1284 Enable support for National Instruments Lab-PC and compatibles
1285 Lab-PC-1200, Lab-PC-1200AI, Lab-PC+ and PCI-1200.
1286 Kernel-level ISA plug-and-play support for the lab-pc-1200 boards has
1287 not yet been added to the driver.
1288
1289 To compile this driver as a module, choose M here: the module will be
1290 called ni_labpc.
1291
1292endif # COMEDI_NI_COMMON
1293
1294config COMEDI_FC
1295 tristate "Comedi shared functions for low-level driver support"
1296 default N
1297 ---help---
1298 Enable support for shared functions for low-level drivers.
1299 This module is not used directly by end-users. Rather, it
1300 is used by many other comedi drivers.
1301
1302 To compile this driver as a module, choose M here: the module will be
1303 called comedi_fc.
diff --git a/drivers/staging/comedi/Makefile b/drivers/staging/comedi/Makefile
index 05811f79d85b..20afea301c87 100644
--- a/drivers/staging/comedi/Makefile
+++ b/drivers/staging/comedi/Makefile
@@ -9,4 +9,3 @@ comedi-objs := \
9 range.o \ 9 range.o \
10 drivers.o \ 10 drivers.o \
11 comedi_compat32.o \ 11 comedi_compat32.o \
12 comedi_ksyms.o \
diff --git a/drivers/staging/comedi/comedi.h b/drivers/staging/comedi/comedi.h
index b559a9c2f857..6c900e2756fb 100644
--- a/drivers/staging/comedi/comedi.h
+++ b/drivers/staging/comedi/comedi.h
@@ -46,8 +46,10 @@
46#define COMEDI_DEVCONF_AUX_DATA2_LENGTH 26 46#define COMEDI_DEVCONF_AUX_DATA2_LENGTH 26
47#define COMEDI_DEVCONF_AUX_DATA1_LENGTH 27 47#define COMEDI_DEVCONF_AUX_DATA1_LENGTH 27
48#define COMEDI_DEVCONF_AUX_DATA0_LENGTH 28 48#define COMEDI_DEVCONF_AUX_DATA0_LENGTH 28
49#define COMEDI_DEVCONF_AUX_DATA_HI 29 /* most significant 32 bits of pointer address (if needed) */ 49/* most significant 32 bits of pointer address (if needed) */
50#define COMEDI_DEVCONF_AUX_DATA_LO 30 /* least significant 32 bits of pointer address */ 50#define COMEDI_DEVCONF_AUX_DATA_HI 29
51/* least significant 32 bits of pointer address */
52#define COMEDI_DEVCONF_AUX_DATA_LO 30
51#define COMEDI_DEVCONF_AUX_DATA_LENGTH 31 /* total data length */ 53#define COMEDI_DEVCONF_AUX_DATA_LENGTH 31 /* total data length */
52 54
53/* max length of device and driver names */ 55/* max length of device and driver names */
@@ -55,8 +57,10 @@
55 57
56/* packs and unpacks a channel/range number */ 58/* packs and unpacks a channel/range number */
57 59
58#define CR_PACK(chan, rng, aref) ((((aref)&0x3)<<24) | (((rng)&0xff)<<16) | (chan)) 60#define CR_PACK(chan, rng, aref) \
59#define CR_PACK_FLAGS(chan, range, aref, flags) (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK)) 61 ((((aref)&0x3)<<24) | (((rng)&0xff)<<16) | (chan))
62#define CR_PACK_FLAGS(chan, range, aref, flags) \
63 (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK))
60 64
61#define CR_CHAN(a) ((a)&0xffff) 65#define CR_CHAN(a) ((a)&0xffff)
62#define CR_RANGE(a) (((a)>>16)&0xff) 66#define CR_RANGE(a) (((a)>>16)&0xff)
@@ -125,7 +129,8 @@
125/* command flags */ 129/* command flags */
126/* These flags are used in comedi_cmd structures */ 130/* These flags are used in comedi_cmd structures */
127 131
128#define CMDF_PRIORITY 0x00000008 /* try to use a real-time interrupt while performing command */ 132/* try to use a real-time interrupt while performing command */
133#define CMDF_PRIORITY 0x00000008
129 134
130#define TRIG_RT CMDF_PRIORITY /* compatibility definition */ 135#define TRIG_RT CMDF_PRIORITY /* compatibility definition */
131 136
@@ -151,15 +156,15 @@
151#define TRIG_ANY 0xffffffff 156#define TRIG_ANY 0xffffffff
152#define TRIG_INVALID 0x00000000 157#define TRIG_INVALID 0x00000000
153 158
154#define TRIG_NONE 0x00000001 /* never trigger */ 159#define TRIG_NONE 0x00000001 /* never trigger */
155#define TRIG_NOW 0x00000002 /* trigger now + N ns */ 160#define TRIG_NOW 0x00000002 /* trigger now + N ns */
156#define TRIG_FOLLOW 0x00000004 /* trigger on next lower level trig */ 161#define TRIG_FOLLOW 0x00000004 /* trigger on next lower level trig */
157#define TRIG_TIME 0x00000008 /* trigger at time N ns */ 162#define TRIG_TIME 0x00000008 /* trigger at time N ns */
158#define TRIG_TIMER 0x00000010 /* trigger at rate N ns */ 163#define TRIG_TIMER 0x00000010 /* trigger at rate N ns */
159#define TRIG_COUNT 0x00000020 /* trigger when count reaches N */ 164#define TRIG_COUNT 0x00000020 /* trigger when count reaches N */
160#define TRIG_EXT 0x00000040 /* trigger on external signal N */ 165#define TRIG_EXT 0x00000040 /* trigger on external signal N */
161#define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */ 166#define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */
162#define TRIG_OTHER 0x00000100 /* driver defined */ 167#define TRIG_OTHER 0x00000100 /* driver defined */
163 168
164/* subdevice flags */ 169/* subdevice flags */
165 170
@@ -176,14 +181,17 @@
176#define SDF_MODE3 0x0400 /* can do mode 3 */ 181#define SDF_MODE3 0x0400 /* can do mode 3 */
177#define SDF_MODE4 0x0800 /* can do mode 4 */ 182#define SDF_MODE4 0x0800 /* can do mode 4 */
178#define SDF_CMD 0x1000 /* can do commands (deprecated) */ 183#define SDF_CMD 0x1000 /* can do commands (deprecated) */
179#define SDF_SOFT_CALIBRATED 0x2000 /* subdevice uses software calibration */ 184#define SDF_SOFT_CALIBRATED 0x2000 /* subdevice uses software calibration */
180#define SDF_CMD_WRITE 0x4000 /* can do output commands */ 185#define SDF_CMD_WRITE 0x4000 /* can do output commands */
181#define SDF_CMD_READ 0x8000 /* can do input commands */ 186#define SDF_CMD_READ 0x8000 /* can do input commands */
182 187
183#define SDF_READABLE 0x00010000 /* subdevice can be read (e.g. analog input) */ 188/* subdevice can be read (e.g. analog input) */
184#define SDF_WRITABLE 0x00020000 /* subdevice can be written (e.g. analog output) */ 189#define SDF_READABLE 0x00010000
190/* subdevice can be written (e.g. analog output) */
191#define SDF_WRITABLE 0x00020000
185#define SDF_WRITEABLE SDF_WRITABLE /* spelling error in API */ 192#define SDF_WRITEABLE SDF_WRITABLE /* spelling error in API */
186#define SDF_INTERNAL 0x00040000 /* subdevice does not have externally visible lines */ 193/* subdevice does not have externally visible lines */
194#define SDF_INTERNAL 0x00040000
187#define SDF_GROUND 0x00100000 /* can do aref=ground */ 195#define SDF_GROUND 0x00100000 /* can do aref=ground */
188#define SDF_COMMON 0x00200000 /* can do aref=common */ 196#define SDF_COMMON 0x00200000 /* can do aref=common */
189#define SDF_DIFF 0x00400000 /* can do aref=diff */ 197#define SDF_DIFF 0x00400000 /* can do aref=diff */
@@ -242,22 +250,25 @@
242 INSN_CONFIG_DISARM = 32, 250 INSN_CONFIG_DISARM = 32,
243 INSN_CONFIG_GET_COUNTER_STATUS = 33, 251 INSN_CONFIG_GET_COUNTER_STATUS = 33,
244 INSN_CONFIG_RESET = 34, 252 INSN_CONFIG_RESET = 34,
245 INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001, /* Use CTR as single pulsegenerator */ 253 /* Use CTR as single pulsegenerator */
246 INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002, /* Use CTR as pulsetraingenerator */ 254 INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001,
247 INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003, /* Use the counter as encoder */ 255 /* Use CTR as pulsetraingenerator */
256 INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002,
257 /* Use the counter as encoder */
258 INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003,
248 INSN_CONFIG_SET_GATE_SRC = 2001, /* Set gate source */ 259 INSN_CONFIG_SET_GATE_SRC = 2001, /* Set gate source */
249 INSN_CONFIG_GET_GATE_SRC = 2002, /* Get gate source */ 260 INSN_CONFIG_GET_GATE_SRC = 2002, /* Get gate source */
250 INSN_CONFIG_SET_CLOCK_SRC = 2003, /* Set master clock source */ 261 /* Set master clock source */
251 INSN_CONFIG_GET_CLOCK_SRC = 2004, /* Get master clock source */ 262 INSN_CONFIG_SET_CLOCK_SRC = 2003,
252 INSN_CONFIG_SET_OTHER_SRC = 2005, /* Set other source */ 263 INSN_CONFIG_GET_CLOCK_SRC = 2004, /* Get master clock source */
253 /* INSN_CONFIG_GET_OTHER_SRC = 2006,*//* Get other source */ 264 INSN_CONFIG_SET_OTHER_SRC = 2005, /* Set other source */
254 INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006, /* Get size in bytes of 265 /* INSN_CONFIG_GET_OTHER_SRC = 2006,*//* Get other source */
255 subdevice's on-board 266 /* Get size in bytes of subdevice's on-board fifos used during
256 fifos used during 267 * streaming input/output */
257 streaming 268 INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006,
258 input/output */
259 INSN_CONFIG_SET_COUNTER_MODE = 4097, 269 INSN_CONFIG_SET_COUNTER_MODE = 4097,
260 INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, /* deprecated */ 270 /* INSN_CONFIG_8254_SET_MODE is deprecated */
271 INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE,
261 INSN_CONFIG_8254_READ_STATUS = 4098, 272 INSN_CONFIG_8254_READ_STATUS = 4098,
262 INSN_CONFIG_SET_ROUTING = 4099, 273 INSN_CONFIG_SET_ROUTING = 4099,
263 INSN_CONFIG_GET_ROUTING = 4109, 274 INSN_CONFIG_GET_ROUTING = 4109,
@@ -265,8 +276,11 @@
265 INSN_CONFIG_PWM_SET_PERIOD = 5000, /* sets frequency */ 276 INSN_CONFIG_PWM_SET_PERIOD = 5000, /* sets frequency */
266 INSN_CONFIG_PWM_GET_PERIOD = 5001, /* gets frequency */ 277 INSN_CONFIG_PWM_GET_PERIOD = 5001, /* gets frequency */
267 INSN_CONFIG_GET_PWM_STATUS = 5002, /* is it running? */ 278 INSN_CONFIG_GET_PWM_STATUS = 5002, /* is it running? */
268 INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, /* sets H bridge: duty cycle and sign bit for a relay at the same time */ 279 /* sets H bridge: duty cycle and sign bit for a relay at the
269 INSN_CONFIG_PWM_GET_H_BRIDGE = 5004 /* gets H bridge data: duty cycle and the sign bit */ 280 * same time */
281 INSN_CONFIG_PWM_SET_H_BRIDGE = 5003,
282 /* gets H bridge data: duty cycle and the sign bit */
283 INSN_CONFIG_PWM_GET_H_BRIDGE = 5004
270 }; 284 };
271 285
272 enum comedi_io_direction { 286 enum comedi_io_direction {
@@ -321,7 +335,7 @@
321 struct comedi_insn { 335 struct comedi_insn {
322 unsigned int insn; 336 unsigned int insn;
323 unsigned int n; 337 unsigned int n;
324 unsigned int *data; 338 unsigned int __user *data;
325 unsigned int subdev; 339 unsigned int subdev;
326 unsigned int chanspec; 340 unsigned int chanspec;
327 unsigned int unused[3]; 341 unsigned int unused[3];
@@ -329,7 +343,7 @@
329 343
330 struct comedi_insnlist { 344 struct comedi_insnlist {
331 unsigned int n_insns; 345 unsigned int n_insns;
332 struct comedi_insn *insns; 346 struct comedi_insn __user *insns;
333 }; 347 };
334 348
335 struct comedi_cmd { 349 struct comedi_cmd {
@@ -351,24 +365,24 @@
351 unsigned int stop_src; 365 unsigned int stop_src;
352 unsigned int stop_arg; 366 unsigned int stop_arg;
353 367
354 unsigned int *chanlist; /* channel/range list */ 368 unsigned int __user *chanlist; /* channel/range list */
355 unsigned int chanlist_len; 369 unsigned int chanlist_len;
356 370
357 short *data; /* data list, size depends on subd flags */ 371 short __user *data; /* data list, size depends on subd flags */
358 unsigned int data_len; 372 unsigned int data_len;
359 }; 373 };
360 374
361 struct comedi_chaninfo { 375 struct comedi_chaninfo {
362 unsigned int subdev; 376 unsigned int subdev;
363 unsigned int *maxdata_list; 377 unsigned int __user *maxdata_list;
364 unsigned int *flaglist; 378 unsigned int __user *flaglist;
365 unsigned int *rangelist; 379 unsigned int __user *rangelist;
366 unsigned int unused[4]; 380 unsigned int unused[4];
367 }; 381 };
368 382
369 struct comedi_rangeinfo { 383 struct comedi_rangeinfo {
370 unsigned int range_type; 384 unsigned int range_type;
371 void *range_ptr; 385 void __user *range_ptr;
372 }; 386 };
373 387
374 struct comedi_krange { 388 struct comedi_krange {
@@ -387,7 +401,8 @@
387 unsigned int flags; /* channel flags */ 401 unsigned int flags; /* channel flags */
388 unsigned int range_type; /* lookup in kernel */ 402 unsigned int range_type; /* lookup in kernel */
389 unsigned int settling_time_0; 403 unsigned int settling_time_0;
390 unsigned insn_bits_support; /* see support_level enum for values */ 404 /* see support_level enum for values */
405 unsigned insn_bits_support;
391 unsigned int unused[8]; 406 unsigned int unused[8];
392 }; 407 };
393 408
@@ -451,7 +466,8 @@
451 466
452#define COMEDI_CB_EOS 1 /* end of scan */ 467#define COMEDI_CB_EOS 1 /* end of scan */
453#define COMEDI_CB_EOA 2 /* end of acquisition */ 468#define COMEDI_CB_EOA 2 /* end of acquisition */
454#define COMEDI_CB_BLOCK 4 /* data has arrived: wakes up read() / write() */ 469#define COMEDI_CB_BLOCK 4 /* data has arrived:
470 * wakes up read() / write() */
455#define COMEDI_CB_EOBUF 8 /* DEPRECATED: end of buffer */ 471#define COMEDI_CB_EOBUF 8 /* DEPRECATED: end of buffer */
456#define COMEDI_CB_ERROR 16 /* card error during acquisition */ 472#define COMEDI_CB_ERROR 16 /* card error during acquisition */
457#define COMEDI_CB_OVERFLOW 32 /* buffer overflow/underflow */ 473#define COMEDI_CB_OVERFLOW 32 /* buffer overflow/underflow */
@@ -485,12 +501,15 @@
485 I8254_MODE2 = (2 << 1), /* Rate generator */ 501 I8254_MODE2 = (2 << 1), /* Rate generator */
486 I8254_MODE3 = (3 << 1), /* Square wave mode */ 502 I8254_MODE3 = (3 << 1), /* Square wave mode */
487 I8254_MODE4 = (4 << 1), /* Software triggered strobe */ 503 I8254_MODE4 = (4 << 1), /* Software triggered strobe */
488 I8254_MODE5 = (5 << 1), /* Hardware triggered strobe (retriggerable) */ 504 I8254_MODE5 = (5 << 1), /* Hardware triggered strobe
489 I8254_BCD = 1, /* use binary-coded decimal instead of binary (pretty useless) */ 505 * (retriggerable) */
506 I8254_BCD = 1, /* use binary-coded decimal instead of binary
507 * (pretty useless) */
490 I8254_BINARY = 0 508 I8254_BINARY = 0
491 }; 509 };
492 510
493 static inline unsigned NI_USUAL_PFI_SELECT(unsigned pfi_channel) { 511 static inline unsigned NI_USUAL_PFI_SELECT(unsigned pfi_channel)
512 {
494 if (pfi_channel < 10) 513 if (pfi_channel < 10)
495 return 0x1 + pfi_channel; 514 return 0x1 + pfi_channel;
496 else 515 else
@@ -580,24 +599,30 @@
580 NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3, 599 NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3,
581 NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4, 600 NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4,
582 NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5, 601 NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5,
583 NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6, /* NI 660x-specific */ 602 /* NI 660x-specific */
603 NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6,
584 NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7, 604 NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7,
585 NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8, 605 NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8,
586 NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9, 606 NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9,
587 NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000, 607 NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000,
588 NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0, 608 NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0,
589 NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000, /* divide source by 2 */ 609 /* divide source by 2 */
590 NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, /* divide source by 8 */ 610 NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000,
611 /* divide source by 8 */
612 NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000,
591 NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000 613 NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
592 }; 614 };
593 static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n) { 615 static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n)
616 {
594 /* NI 660x-specific */ 617 /* NI 660x-specific */
595 return 0x10 + n; 618 return 0x10 + n;
596 } 619 }
597 static inline unsigned NI_GPCT_RTSI_CLOCK_SRC_BITS(unsigned n) { 620 static inline unsigned NI_GPCT_RTSI_CLOCK_SRC_BITS(unsigned n)
621 {
598 return 0x18 + n; 622 return 0x18 + n;
599 } 623 }
600 static inline unsigned NI_GPCT_PFI_CLOCK_SRC_BITS(unsigned n) { 624 static inline unsigned NI_GPCT_PFI_CLOCK_SRC_BITS(unsigned n)
625 {
601 /* no pfi on NI 660x */ 626 /* no pfi on NI 660x */
602 return 0x20 + n; 627 return 0x20 + n;
603 } 628 }
@@ -622,19 +647,24 @@ May be bitwise-or'd with CR_EDGE or CR_INVERT. */
622 NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201, 647 NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201,
623 NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e, 648 NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e,
624 /* m-series "second gate" sources are unknown, 649 /* m-series "second gate" sources are unknown,
625 we should add them here with an offset of 0x300 when known. */ 650 * we should add them here with an offset of 0x300 when
651 * known. */
626 NI_GPCT_DISABLED_GATE_SELECT = 0x8000, 652 NI_GPCT_DISABLED_GATE_SELECT = 0x8000,
627 }; 653 };
628 static inline unsigned NI_GPCT_GATE_PIN_GATE_SELECT(unsigned n) { 654 static inline unsigned NI_GPCT_GATE_PIN_GATE_SELECT(unsigned n)
655 {
629 return 0x102 + n; 656 return 0x102 + n;
630 } 657 }
631 static inline unsigned NI_GPCT_RTSI_GATE_SELECT(unsigned n) { 658 static inline unsigned NI_GPCT_RTSI_GATE_SELECT(unsigned n)
659 {
632 return NI_USUAL_RTSI_SELECT(n); 660 return NI_USUAL_RTSI_SELECT(n);
633 } 661 }
634 static inline unsigned NI_GPCT_PFI_GATE_SELECT(unsigned n) { 662 static inline unsigned NI_GPCT_PFI_GATE_SELECT(unsigned n)
663 {
635 return NI_USUAL_PFI_SELECT(n); 664 return NI_USUAL_PFI_SELECT(n);
636 } 665 }
637 static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n) { 666 static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n)
667 {
638 return 0x202 + n; 668 return 0x202 + n;
639 } 669 }
640 670
@@ -650,7 +680,8 @@ INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. */
650 /* Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT */ 680 /* Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT */
651 NI_GPCT_DISABLED_OTHER_SELECT = 0x8000, 681 NI_GPCT_DISABLED_OTHER_SELECT = 0x8000,
652 }; 682 };
653 static inline unsigned NI_GPCT_PFI_OTHER_SELECT(unsigned n) { 683 static inline unsigned NI_GPCT_PFI_OTHER_SELECT(unsigned n)
684 {
654 return NI_USUAL_PFI_SELECT(n); 685 return NI_USUAL_PFI_SELECT(n);
655 } 686 }
656 687
@@ -658,14 +689,14 @@ INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. */
658INSN_CONFIG_ARM */ 689INSN_CONFIG_ARM */
659 enum ni_gpct_arm_source { 690 enum ni_gpct_arm_source {
660 NI_GPCT_ARM_IMMEDIATE = 0x0, 691 NI_GPCT_ARM_IMMEDIATE = 0x0,
661 NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, /* Start both the counter and 692 NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, /* Start both the counter
662 the adjacent paired counter 693 * and the adjacent paired
663 simultaneously */ 694 * counter simultaneously */
664 /* NI doesn't document bits for selecting hardware arm triggers. If 695 /* NI doesn't document bits for selecting hardware arm triggers.
665 * the NI_GPCT_ARM_UNKNOWN bit is set, we will pass the least 696 * If the NI_GPCT_ARM_UNKNOWN bit is set, we will pass the least
666 * significant bits (3 bits for 660x or 5 bits for m-series) through to 697 * significant bits (3 bits for 660x or 5 bits for m-series)
667 * the hardware. This will at least allow someone to figure out what 698 * through to the hardware. This will at least allow someone to
668 * the bits do later. */ 699 * figure out what the bits do later. */
669 NI_GPCT_ARM_UNKNOWN = 0x1000, 700 NI_GPCT_ARM_UNKNOWN = 0x1000,
670 }; 701 };
671 702
@@ -699,7 +730,8 @@ INSN_CONFIG_ARM */
699 NI_MIO_PLL_PXI10_CLOCK = 3, 730 NI_MIO_PLL_PXI10_CLOCK = 3,
700 NI_MIO_PLL_RTSI0_CLOCK = 4 731 NI_MIO_PLL_RTSI0_CLOCK = 4
701 }; 732 };
702 static inline unsigned NI_MIO_PLL_RTSI_CLOCK(unsigned rtsi_channel) { 733 static inline unsigned NI_MIO_PLL_RTSI_CLOCK(unsigned rtsi_channel)
734 {
703 return NI_MIO_PLL_RTSI0_CLOCK + rtsi_channel; 735 return NI_MIO_PLL_RTSI0_CLOCK + rtsi_channel;
704 } 736 }
705 737
@@ -716,10 +748,11 @@ INSN_CONFIG_ARM */
716 NI_RTSI_OUTPUT_G_GATE0 = 6, 748 NI_RTSI_OUTPUT_G_GATE0 = 6,
717 NI_RTSI_OUTPUT_RGOUT0 = 7, 749 NI_RTSI_OUTPUT_RGOUT0 = 7,
718 NI_RTSI_OUTPUT_RTSI_BRD_0 = 8, 750 NI_RTSI_OUTPUT_RTSI_BRD_0 = 8,
719 NI_RTSI_OUTPUT_RTSI_OSC = 12 /* pre-m-series always have RTSI clock 751 NI_RTSI_OUTPUT_RTSI_OSC = 12 /* pre-m-series always have RTSI
720 on line 7 */ 752 * clock on line 7 */
721 }; 753 };
722 static inline unsigned NI_RTSI_OUTPUT_RTSI_BRD(unsigned n) { 754 static inline unsigned NI_RTSI_OUTPUT_RTSI_BRD(unsigned n)
755 {
723 return NI_RTSI_OUTPUT_RTSI_BRD_0 + n; 756 return NI_RTSI_OUTPUT_RTSI_BRD_0 + n;
724 } 757 }
725 758
@@ -754,7 +787,8 @@ INSN_CONFIG_ARM */
754 NI_PFI_OUTPUT_CDI_SAMPLE = 29, 787 NI_PFI_OUTPUT_CDI_SAMPLE = 29,
755 NI_PFI_OUTPUT_CDO_UPDATE = 30 788 NI_PFI_OUTPUT_CDO_UPDATE = 30
756 }; 789 };
757 static inline unsigned NI_PFI_OUTPUT_RTSI(unsigned rtsi_channel) { 790 static inline unsigned NI_PFI_OUTPUT_RTSI(unsigned rtsi_channel)
791 {
758 return NI_PFI_OUTPUT_RTSI0 + rtsi_channel; 792 return NI_PFI_OUTPUT_RTSI0 + rtsi_channel;
759 } 793 }
760 794
@@ -772,10 +806,12 @@ INSN_CONFIG_ARM */
772/* NI External Trigger lines. These values are not arbitrary, but are related 806/* NI External Trigger lines. These values are not arbitrary, but are related
773 * to the bits required to program the board (offset by 1 for historical 807 * to the bits required to program the board (offset by 1 for historical
774 * reasons). */ 808 * reasons). */
775 static inline unsigned NI_EXT_PFI(unsigned pfi_channel) { 809 static inline unsigned NI_EXT_PFI(unsigned pfi_channel)
810 {
776 return NI_USUAL_PFI_SELECT(pfi_channel) - 1; 811 return NI_USUAL_PFI_SELECT(pfi_channel) - 1;
777 } 812 }
778 static inline unsigned NI_EXT_RTSI(unsigned rtsi_channel) { 813 static inline unsigned NI_EXT_RTSI(unsigned rtsi_channel)
814 {
779 return NI_USUAL_RTSI_SELECT(rtsi_channel) - 1; 815 return NI_USUAL_RTSI_SELECT(rtsi_channel) - 1;
780 } 816 }
781 817
@@ -801,21 +837,25 @@ INSN_CONFIG_ARM */
801 NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32, 837 NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32,
802 NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33 838 NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33
803 }; 839 };
804 static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) { 840 static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel)
841 {
805 return NI_USUAL_PFI_SELECT(pfi_channel); 842 return NI_USUAL_PFI_SELECT(pfi_channel);
806 } 843 }
807 static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned 844 static inline unsigned
808 rtsi_channel) { 845 NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel)
846 {
809 return NI_USUAL_RTSI_SELECT(rtsi_channel); 847 return NI_USUAL_RTSI_SELECT(rtsi_channel);
810 } 848 }
811 849
812/* scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI 850/* scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command on NI
813 * boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to 851 * boards. These scan begin sources can also be bitwise-or'd with CR_INVERT to
814 * change polarity. */ 852 * change polarity. */
815 static inline unsigned NI_AO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) { 853 static inline unsigned NI_AO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel)
854 {
816 return NI_USUAL_PFI_SELECT(pfi_channel); 855 return NI_USUAL_PFI_SELECT(pfi_channel);
817 } 856 }
818 static inline unsigned NI_AO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel) { 857 static inline unsigned NI_AO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel)
858 {
819 return NI_USUAL_RTSI_SELECT(rtsi_channel); 859 return NI_USUAL_RTSI_SELECT(rtsi_channel);
820 } 860 }
821 861
diff --git a/drivers/staging/comedi/comedi_compat32.c b/drivers/staging/comedi/comedi_compat32.c
index 581aa5fee2e3..41a7a62ba49a 100644
--- a/drivers/staging/comedi/comedi_compat32.c
+++ b/drivers/staging/comedi/comedi_compat32.c
@@ -25,9 +25,8 @@
25*/ 25*/
26 26
27#define __NO_VERSION__ 27#define __NO_VERSION__
28#include "comedi.h"
29#include <linux/uaccess.h> 28#include <linux/uaccess.h>
30 29#include "comedi.h"
31#include "comedi_compat32.h" 30#include "comedi_compat32.h"
32 31
33#ifdef CONFIG_COMPAT 32#ifdef CONFIG_COMPAT
diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c
index aca96747e5e2..aced00e5cd10 100644
--- a/drivers/staging/comedi/comedi_fops.c
+++ b/drivers/staging/comedi/comedi_fops.c
@@ -49,7 +49,7 @@
49#include <linux/io.h> 49#include <linux/io.h>
50#include <linux/uaccess.h> 50#include <linux/uaccess.h>
51 51
52/* #include "kvmem.h" */ 52#include "internal.h"
53 53
54MODULE_AUTHOR("http://www.comedi.org"); 54MODULE_AUTHOR("http://www.comedi.org");
55MODULE_DESCRIPTION("Comedi core module"); 55MODULE_DESCRIPTION("Comedi core module");
@@ -57,13 +57,14 @@ MODULE_LICENSE("GPL");
57 57
58#ifdef CONFIG_COMEDI_DEBUG 58#ifdef CONFIG_COMEDI_DEBUG
59int comedi_debug; 59int comedi_debug;
60EXPORT_SYMBOL(comedi_debug);
60module_param(comedi_debug, int, 0644); 61module_param(comedi_debug, int, 0644);
61#endif 62#endif
62 63
63int comedi_autoconfig = 1; 64int comedi_autoconfig = 1;
64module_param(comedi_autoconfig, bool, 0444); 65module_param(comedi_autoconfig, bool, 0444);
65 66
66int comedi_num_legacy_minors; 67static int comedi_num_legacy_minors;
67module_param(comedi_num_legacy_minors, int, 0444); 68module_param(comedi_num_legacy_minors, int, 0444);
68 69
69static DEFINE_SPINLOCK(comedi_file_info_table_lock); 70static DEFINE_SPINLOCK(comedi_file_info_table_lock);
@@ -71,25 +72,32 @@ static struct comedi_device_file_info
71*comedi_file_info_table[COMEDI_NUM_MINORS]; 72*comedi_file_info_table[COMEDI_NUM_MINORS];
72 73
73static int do_devconfig_ioctl(struct comedi_device *dev, 74static int do_devconfig_ioctl(struct comedi_device *dev,
74 struct comedi_devconfig *arg); 75 struct comedi_devconfig __user *arg);
75static int do_bufconfig_ioctl(struct comedi_device *dev, void *arg); 76static int do_bufconfig_ioctl(struct comedi_device *dev,
77 struct comedi_bufconfig __user *arg);
76static int do_devinfo_ioctl(struct comedi_device *dev, 78static int do_devinfo_ioctl(struct comedi_device *dev,
77 struct comedi_devinfo *arg, struct file *file); 79 struct comedi_devinfo __user *arg,
80 struct file *file);
78static int do_subdinfo_ioctl(struct comedi_device *dev, 81static int do_subdinfo_ioctl(struct comedi_device *dev,
79 struct comedi_subdinfo *arg, void *file); 82 struct comedi_subdinfo __user *arg, void *file);
80static int do_chaninfo_ioctl(struct comedi_device *dev, 83static int do_chaninfo_ioctl(struct comedi_device *dev,
81 struct comedi_chaninfo *arg); 84 struct comedi_chaninfo __user *arg);
82static int do_bufinfo_ioctl(struct comedi_device *dev, void *arg); 85static int do_bufinfo_ioctl(struct comedi_device *dev,
83static int do_cmd_ioctl(struct comedi_device *dev, void *arg, void *file); 86 struct comedi_bufinfo __user *arg);
87static int do_cmd_ioctl(struct comedi_device *dev,
88 struct comedi_cmd __user *arg, void *file);
84static int do_lock_ioctl(struct comedi_device *dev, unsigned int arg, 89static int do_lock_ioctl(struct comedi_device *dev, unsigned int arg,
85 void *file); 90 void *file);
86static int do_unlock_ioctl(struct comedi_device *dev, unsigned int arg, 91static int do_unlock_ioctl(struct comedi_device *dev, unsigned int arg,
87 void *file); 92 void *file);
88static int do_cancel_ioctl(struct comedi_device *dev, unsigned int arg, 93static int do_cancel_ioctl(struct comedi_device *dev, unsigned int arg,
89 void *file); 94 void *file);
90static int do_cmdtest_ioctl(struct comedi_device *dev, void *arg, void *file); 95static int do_cmdtest_ioctl(struct comedi_device *dev,
91static int do_insnlist_ioctl(struct comedi_device *dev, void *arg, void *file); 96 struct comedi_cmd __user *arg, void *file);
92static int do_insn_ioctl(struct comedi_device *dev, void *arg, void *file); 97static int do_insnlist_ioctl(struct comedi_device *dev,
98 struct comedi_insnlist __user *arg, void *file);
99static int do_insn_ioctl(struct comedi_device *dev,
100 struct comedi_insn __user *arg, void *file);
93static int do_poll_ioctl(struct comedi_device *dev, unsigned int subd, 101static int do_poll_ioctl(struct comedi_device *dev, unsigned int subd,
94 void *file); 102 void *file);
95 103
@@ -128,7 +136,8 @@ static long comedi_unlocked_ioctl(struct file *file, unsigned int cmd,
128 /* Device config is special, because it must work on 136 /* Device config is special, because it must work on
129 * an unconfigured device. */ 137 * an unconfigured device. */
130 if (cmd == COMEDI_DEVCONFIG) { 138 if (cmd == COMEDI_DEVCONFIG) {
131 rc = do_devconfig_ioctl(dev, (void *)arg); 139 rc = do_devconfig_ioctl(dev,
140 (struct comedi_devconfig __user *)arg);
132 goto done; 141 goto done;
133 } 142 }
134 143
@@ -140,22 +149,27 @@ static long comedi_unlocked_ioctl(struct file *file, unsigned int cmd,
140 149
141 switch (cmd) { 150 switch (cmd) {
142 case COMEDI_BUFCONFIG: 151 case COMEDI_BUFCONFIG:
143 rc = do_bufconfig_ioctl(dev, (void *)arg); 152 rc = do_bufconfig_ioctl(dev,
153 (struct comedi_bufconfig __user *)arg);
144 break; 154 break;
145 case COMEDI_DEVINFO: 155 case COMEDI_DEVINFO:
146 rc = do_devinfo_ioctl(dev, (void *)arg, file); 156 rc = do_devinfo_ioctl(dev, (struct comedi_devinfo __user *)arg,
157 file);
147 break; 158 break;
148 case COMEDI_SUBDINFO: 159 case COMEDI_SUBDINFO:
149 rc = do_subdinfo_ioctl(dev, (void *)arg, file); 160 rc = do_subdinfo_ioctl(dev,
161 (struct comedi_subdinfo __user *)arg,
162 file);
150 break; 163 break;
151 case COMEDI_CHANINFO: 164 case COMEDI_CHANINFO:
152 rc = do_chaninfo_ioctl(dev, (void *)arg); 165 rc = do_chaninfo_ioctl(dev, (void __user *)arg);
153 break; 166 break;
154 case COMEDI_RANGEINFO: 167 case COMEDI_RANGEINFO:
155 rc = do_rangeinfo_ioctl(dev, (void *)arg); 168 rc = do_rangeinfo_ioctl(dev, (void __user *)arg);
156 break; 169 break;
157 case COMEDI_BUFINFO: 170 case COMEDI_BUFINFO:
158 rc = do_bufinfo_ioctl(dev, (void *)arg); 171 rc = do_bufinfo_ioctl(dev,
172 (struct comedi_bufinfo __user *)arg);
159 break; 173 break;
160 case COMEDI_LOCK: 174 case COMEDI_LOCK:
161 rc = do_lock_ioctl(dev, arg, file); 175 rc = do_lock_ioctl(dev, arg, file);
@@ -167,16 +181,20 @@ static long comedi_unlocked_ioctl(struct file *file, unsigned int cmd,
167 rc = do_cancel_ioctl(dev, arg, file); 181 rc = do_cancel_ioctl(dev, arg, file);
168 break; 182 break;
169 case COMEDI_CMD: 183 case COMEDI_CMD:
170 rc = do_cmd_ioctl(dev, (void *)arg, file); 184 rc = do_cmd_ioctl(dev, (struct comedi_cmd __user *)arg, file);
171 break; 185 break;
172 case COMEDI_CMDTEST: 186 case COMEDI_CMDTEST:
173 rc = do_cmdtest_ioctl(dev, (void *)arg, file); 187 rc = do_cmdtest_ioctl(dev, (struct comedi_cmd __user *)arg,
188 file);
174 break; 189 break;
175 case COMEDI_INSNLIST: 190 case COMEDI_INSNLIST:
176 rc = do_insnlist_ioctl(dev, (void *)arg, file); 191 rc = do_insnlist_ioctl(dev,
192 (struct comedi_insnlist __user *)arg,
193 file);
177 break; 194 break;
178 case COMEDI_INSN: 195 case COMEDI_INSN:
179 rc = do_insn_ioctl(dev, (void *)arg, file); 196 rc = do_insn_ioctl(dev, (struct comedi_insn __user *)arg,
197 file);
180 break; 198 break;
181 case COMEDI_POLL: 199 case COMEDI_POLL:
182 rc = do_poll_ioctl(dev, arg, file); 200 rc = do_poll_ioctl(dev, arg, file);
@@ -205,7 +223,7 @@ done:
205 none 223 none
206*/ 224*/
207static int do_devconfig_ioctl(struct comedi_device *dev, 225static int do_devconfig_ioctl(struct comedi_device *dev,
208 struct comedi_devconfig *arg) 226 struct comedi_devconfig __user *arg)
209{ 227{
210 struct comedi_devconfig it; 228 struct comedi_devconfig it;
211 int ret; 229 int ret;
@@ -285,7 +303,8 @@ static int do_devconfig_ioctl(struct comedi_device *dev,
285 modified bufconfig at arg 303 modified bufconfig at arg
286 304
287*/ 305*/
288static int do_bufconfig_ioctl(struct comedi_device *dev, void *arg) 306static int do_bufconfig_ioctl(struct comedi_device *dev,
307 struct comedi_bufconfig __user *arg)
289{ 308{
290 struct comedi_bufconfig bc; 309 struct comedi_bufconfig bc;
291 struct comedi_async *async; 310 struct comedi_async *async;
@@ -346,7 +365,8 @@ copyback:
346 365
347*/ 366*/
348static int do_devinfo_ioctl(struct comedi_device *dev, 367static int do_devinfo_ioctl(struct comedi_device *dev,
349 struct comedi_devinfo *arg, struct file *file) 368 struct comedi_devinfo __user *arg,
369 struct file *file)
350{ 370{
351 struct comedi_devinfo devinfo; 371 struct comedi_devinfo devinfo;
352 const unsigned minor = iminor(file->f_dentry->d_inode); 372 const unsigned minor = iminor(file->f_dentry->d_inode);
@@ -396,7 +416,7 @@ static int do_devinfo_ioctl(struct comedi_device *dev,
396 416
397*/ 417*/
398static int do_subdinfo_ioctl(struct comedi_device *dev, 418static int do_subdinfo_ioctl(struct comedi_device *dev,
399 struct comedi_subdinfo *arg, void *file) 419 struct comedi_subdinfo __user *arg, void *file)
400{ 420{
401 int ret, i; 421 int ret, i;
402 struct comedi_subdinfo *tmp, *us; 422 struct comedi_subdinfo *tmp, *us;
@@ -478,7 +498,7 @@ static int do_subdinfo_ioctl(struct comedi_device *dev,
478 498
479*/ 499*/
480static int do_chaninfo_ioctl(struct comedi_device *dev, 500static int do_chaninfo_ioctl(struct comedi_device *dev,
481 struct comedi_chaninfo *arg) 501 struct comedi_chaninfo __user *arg)
482{ 502{
483 struct comedi_subdevice *s; 503 struct comedi_subdevice *s;
484 struct comedi_chaninfo it; 504 struct comedi_chaninfo it;
@@ -542,7 +562,8 @@ static int do_chaninfo_ioctl(struct comedi_device *dev,
542 modified bufinfo at arg 562 modified bufinfo at arg
543 563
544 */ 564 */
545static int do_bufinfo_ioctl(struct comedi_device *dev, void *arg) 565static int do_bufinfo_ioctl(struct comedi_device *dev,
566 struct comedi_bufinfo __user *arg)
546{ 567{
547 struct comedi_bufinfo bi; 568 struct comedi_bufinfo bi;
548 struct comedi_subdevice *s; 569 struct comedi_subdevice *s;
@@ -598,23 +619,24 @@ copyback:
598static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn, 619static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn,
599 unsigned int *data, void *file); 620 unsigned int *data, void *file);
600/* 621/*
601 * COMEDI_INSNLIST 622 * COMEDI_INSNLIST
602 * synchronous instructions 623 * synchronous instructions
603 * 624 *
604 * arg: 625 * arg:
605 * pointer to sync cmd structure 626 * pointer to sync cmd structure
606 * 627 *
607 * reads: 628 * reads:
608 * sync cmd struct at arg 629 * sync cmd struct at arg
609 * instruction list 630 * instruction list
610 * data (for writes) 631 * data (for writes)
611 * 632 *
612 * writes: 633 * writes:
613 * data (for reads) 634 * data (for reads)
614 */ 635 */
615/* arbitrary limits */ 636/* arbitrary limits */
616#define MAX_SAMPLES 256 637#define MAX_SAMPLES 256
617static int do_insnlist_ioctl(struct comedi_device *dev, void *arg, void *file) 638static int do_insnlist_ioctl(struct comedi_device *dev,
639 struct comedi_insnlist __user *arg, void *file)
618{ 640{
619 struct comedi_insnlist insnlist; 641 struct comedi_insnlist insnlist;
620 struct comedi_insn *insns = NULL; 642 struct comedi_insn *insns = NULL;
@@ -736,7 +758,8 @@ static int check_insn_config_length(struct comedi_insn *insn,
736 /* by default we allow the insn since we don't have checks for 758 /* by default we allow the insn since we don't have checks for
737 * all possible cases yet */ 759 * all possible cases yet */
738 default: 760 default:
739 printk("comedi: no check for data length of config insn id " 761 printk(KERN_WARNING
762 "comedi: no check for data length of config insn id "
740 "%i is implemented.\n" 763 "%i is implemented.\n"
741 " Add a check to %s in %s.\n" 764 " Add a check to %s in %s.\n"
742 " Assuming n=%i is correct.\n", data[0], __func__, 765 " Assuming n=%i is correct.\n", data[0], __func__,
@@ -837,7 +860,7 @@ static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn,
837 goto out; 860 goto out;
838 } 861 }
839 862
840 ret = check_chanlist(s, 1, &insn->chanspec); 863 ret = comedi_check_chanlist(s, 1, &insn->chanspec);
841 if (ret < 0) { 864 if (ret < 0) {
842 ret = -EINVAL; 865 ret = -EINVAL;
843 DPRINTK("bad chanspec\n"); 866 DPRINTK("bad chanspec\n");
@@ -894,20 +917,21 @@ out:
894} 917}
895 918
896/* 919/*
897 * COMEDI_INSN 920 * COMEDI_INSN
898 * synchronous instructions 921 * synchronous instructions
899 * 922 *
900 * arg: 923 * arg:
901 * pointer to insn 924 * pointer to insn
902 * 925 *
903 * reads: 926 * reads:
904 * struct comedi_insn struct at arg 927 * struct comedi_insn struct at arg
905 * data (for writes) 928 * data (for writes)
906 * 929 *
907 * writes: 930 * writes:
908 * data (for reads) 931 * data (for reads)
909 */ 932 */
910static int do_insn_ioctl(struct comedi_device *dev, void *arg, void *file) 933static int do_insn_ioctl(struct comedi_device *dev,
934 struct comedi_insn __user *arg, void *file)
911{ 935{
912 struct comedi_insn insn; 936 struct comedi_insn insn;
913 unsigned int *data = NULL; 937 unsigned int *data = NULL;
@@ -928,8 +952,9 @@ static int do_insn_ioctl(struct comedi_device *dev, void *arg, void *file)
928 if (insn.n > MAX_SAMPLES) 952 if (insn.n > MAX_SAMPLES)
929 insn.n = MAX_SAMPLES; 953 insn.n = MAX_SAMPLES;
930 if (insn.insn & INSN_MASK_WRITE) { 954 if (insn.insn & INSN_MASK_WRITE) {
931 if (copy_from_user 955 if (copy_from_user(data,
932 (data, insn.data, insn.n * sizeof(unsigned int))) { 956 insn.data,
957 insn.n * sizeof(unsigned int))) {
933 ret = -EFAULT; 958 ret = -EFAULT;
934 goto error; 959 goto error;
935 } 960 }
@@ -938,8 +963,9 @@ static int do_insn_ioctl(struct comedi_device *dev, void *arg, void *file)
938 if (ret < 0) 963 if (ret < 0)
939 goto error; 964 goto error;
940 if (insn.insn & INSN_MASK_READ) { 965 if (insn.insn & INSN_MASK_READ) {
941 if (copy_to_user 966 if (copy_to_user(insn.data,
942 (insn.data, data, insn.n * sizeof(unsigned int))) { 967 data,
968 insn.n * sizeof(unsigned int))) {
943 ret = -EFAULT; 969 ret = -EFAULT;
944 goto error; 970 goto error;
945 } 971 }
@@ -952,30 +978,27 @@ error:
952 return ret; 978 return ret;
953} 979}
954 980
955/* 981static void comedi_set_subdevice_runflags(struct comedi_subdevice *s,
956 COMEDI_CMD 982 unsigned mask, unsigned bits)
957 command ioctl 983{
958 984 unsigned long flags;
959 arg:
960 pointer to cmd structure
961
962 reads:
963 cmd structure at arg
964 channel/range list
965 985
966 writes: 986 spin_lock_irqsave(&s->spin_lock, flags);
967 modified cmd structure at arg 987 s->runflags &= ~mask;
988 s->runflags |= (bits & mask);
989 spin_unlock_irqrestore(&s->spin_lock, flags);
990}
968 991
969*/ 992static int do_cmd_ioctl(struct comedi_device *dev,
970static int do_cmd_ioctl(struct comedi_device *dev, void *arg, void *file) 993 struct comedi_cmd __user *cmd, void *file)
971{ 994{
972 struct comedi_cmd user_cmd; 995 struct comedi_cmd user_cmd;
973 struct comedi_subdevice *s; 996 struct comedi_subdevice *s;
974 struct comedi_async *async; 997 struct comedi_async *async;
975 int ret = 0; 998 int ret = 0;
976 unsigned int *chanlist_saver = NULL; 999 unsigned int __user *chanlist_saver = NULL;
977 1000
978 if (copy_from_user(&user_cmd, arg, sizeof(struct comedi_cmd))) { 1001 if (copy_from_user(&user_cmd, cmd, sizeof(struct comedi_cmd))) {
979 DPRINTK("bad cmd address\n"); 1002 DPRINTK("bad cmd address\n");
980 return -EFAULT; 1003 return -EFAULT;
981 } 1004 }
@@ -1050,7 +1073,9 @@ static int do_cmd_ioctl(struct comedi_device *dev, void *arg, void *file)
1050 } 1073 }
1051 1074
1052 /* make sure each element in channel/gain list is valid */ 1075 /* make sure each element in channel/gain list is valid */
1053 ret = check_chanlist(s, async->cmd.chanlist_len, async->cmd.chanlist); 1076 ret = comedi_check_chanlist(s,
1077 async->cmd.chanlist_len,
1078 async->cmd.chanlist);
1054 if (ret < 0) { 1079 if (ret < 0) {
1055 DPRINTK("bad chanlist\n"); 1080 DPRINTK("bad chanlist\n");
1056 goto cleanup; 1081 goto cleanup;
@@ -1064,7 +1089,7 @@ static int do_cmd_ioctl(struct comedi_device *dev, void *arg, void *file)
1064 /* restore chanlist pointer before copying back */ 1089 /* restore chanlist pointer before copying back */
1065 user_cmd.chanlist = chanlist_saver; 1090 user_cmd.chanlist = chanlist_saver;
1066 user_cmd.data = NULL; 1091 user_cmd.data = NULL;
1067 if (copy_to_user(arg, &user_cmd, sizeof(struct comedi_cmd))) { 1092 if (copy_to_user(cmd, &user_cmd, sizeof(struct comedi_cmd))) {
1068 DPRINTK("fault writing cmd\n"); 1093 DPRINTK("fault writing cmd\n");
1069 ret = -EFAULT; 1094 ret = -EFAULT;
1070 goto cleanup; 1095 goto cleanup;
@@ -1114,13 +1139,14 @@ cleanup:
1114 modified cmd structure at arg 1139 modified cmd structure at arg
1115 1140
1116*/ 1141*/
1117static int do_cmdtest_ioctl(struct comedi_device *dev, void *arg, void *file) 1142static int do_cmdtest_ioctl(struct comedi_device *dev,
1143 struct comedi_cmd __user *arg, void *file)
1118{ 1144{
1119 struct comedi_cmd user_cmd; 1145 struct comedi_cmd user_cmd;
1120 struct comedi_subdevice *s; 1146 struct comedi_subdevice *s;
1121 int ret = 0; 1147 int ret = 0;
1122 unsigned int *chanlist = NULL; 1148 unsigned int *chanlist = NULL;
1123 unsigned int *chanlist_saver = NULL; 1149 unsigned int __user *chanlist_saver = NULL;
1124 1150
1125 if (copy_from_user(&user_cmd, arg, sizeof(struct comedi_cmd))) { 1151 if (copy_from_user(&user_cmd, arg, sizeof(struct comedi_cmd))) {
1126 DPRINTK("bad cmd address\n"); 1152 DPRINTK("bad cmd address\n");
@@ -1172,7 +1198,7 @@ static int do_cmdtest_ioctl(struct comedi_device *dev, void *arg, void *file)
1172 } 1198 }
1173 1199
1174 /* make sure each element in channel/gain list is valid */ 1200 /* make sure each element in channel/gain list is valid */
1175 ret = check_chanlist(s, user_cmd.chanlist_len, chanlist); 1201 ret = comedi_check_chanlist(s, user_cmd.chanlist_len, chanlist);
1176 if (ret < 0) { 1202 if (ret < 0) {
1177 DPRINTK("bad chanlist\n"); 1203 DPRINTK("bad chanlist\n");
1178 goto cleanup; 1204 goto cleanup;
@@ -1371,7 +1397,7 @@ static int do_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1371 return ret; 1397 return ret;
1372} 1398}
1373 1399
1374void comedi_unmap(struct vm_area_struct *area) 1400static void comedi_unmap(struct vm_area_struct *area)
1375{ 1401{
1376 struct comedi_async *async; 1402 struct comedi_async *async;
1377 struct comedi_device *dev; 1403 struct comedi_device *dev;
@@ -1509,8 +1535,8 @@ static unsigned int comedi_poll(struct file *file, poll_table * wait)
1509 return mask; 1535 return mask;
1510} 1536}
1511 1537
1512static ssize_t comedi_write(struct file *file, const char *buf, size_t nbytes, 1538static ssize_t comedi_write(struct file *file, const char __user *buf,
1513 loff_t *offset) 1539 size_t nbytes, loff_t *offset)
1514{ 1540{
1515 struct comedi_subdevice *s; 1541 struct comedi_subdevice *s;
1516 struct comedi_async *async; 1542 struct comedi_async *async;
@@ -1611,7 +1637,7 @@ done:
1611 return count ? count : retval; 1637 return count ? count : retval;
1612} 1638}
1613 1639
1614static ssize_t comedi_read(struct file *file, char *buf, size_t nbytes, 1640static ssize_t comedi_read(struct file *file, char __user *buf, size_t nbytes,
1615 loff_t *offset) 1641 loff_t *offset)
1616{ 1642{
1617 struct comedi_subdevice *s; 1643 struct comedi_subdevice *s;
@@ -1925,7 +1951,7 @@ static int __init comedi_init(void)
1925 } 1951 }
1926 comedi_class = class_create(THIS_MODULE, "comedi"); 1952 comedi_class = class_create(THIS_MODULE, "comedi");
1927 if (IS_ERR(comedi_class)) { 1953 if (IS_ERR(comedi_class)) {
1928 printk("comedi: failed to create class"); 1954 printk(KERN_ERR "comedi: failed to create class");
1929 cdev_del(&comedi_cdev); 1955 cdev_del(&comedi_cdev);
1930 unregister_chrdev_region(MKDEV(COMEDI_MAJOR, 0), 1956 unregister_chrdev_region(MKDEV(COMEDI_MAJOR, 0),
1931 COMEDI_NUM_MINORS); 1957 COMEDI_NUM_MINORS);
@@ -1971,8 +1997,10 @@ module_exit(comedi_cleanup);
1971 1997
1972void comedi_error(const struct comedi_device *dev, const char *s) 1998void comedi_error(const struct comedi_device *dev, const char *s)
1973{ 1999{
1974 printk("comedi%d: %s: %s\n", dev->minor, dev->driver->driver_name, s); 2000 printk(KERN_ERR "comedi%d: %s: %s\n", dev->minor,
2001 dev->driver->driver_name, s);
1975} 2002}
2003EXPORT_SYMBOL(comedi_error);
1976 2004
1977void comedi_event(struct comedi_device *dev, struct comedi_subdevice *s) 2005void comedi_event(struct comedi_device *dev, struct comedi_subdevice *s)
1978{ 2006{
@@ -2015,17 +2043,7 @@ void comedi_event(struct comedi_device *dev, struct comedi_subdevice *s)
2015 } 2043 }
2016 s->async->events = 0; 2044 s->async->events = 0;
2017} 2045}
2018 2046EXPORT_SYMBOL(comedi_event);
2019void comedi_set_subdevice_runflags(struct comedi_subdevice *s, unsigned mask,
2020 unsigned bits)
2021{
2022 unsigned long flags;
2023
2024 spin_lock_irqsave(&s->spin_lock, flags);
2025 s->runflags &= ~mask;
2026 s->runflags |= (bits & mask);
2027 spin_unlock_irqrestore(&s->spin_lock, flags);
2028}
2029 2047
2030unsigned comedi_get_subdevice_runflags(struct comedi_subdevice *s) 2048unsigned comedi_get_subdevice_runflags(struct comedi_subdevice *s)
2031{ 2049{
@@ -2037,6 +2055,7 @@ unsigned comedi_get_subdevice_runflags(struct comedi_subdevice *s)
2037 spin_unlock_irqrestore(&s->spin_lock, flags); 2055 spin_unlock_irqrestore(&s->spin_lock, flags);
2038 return runflags; 2056 return runflags;
2039} 2057}
2058EXPORT_SYMBOL(comedi_get_subdevice_runflags);
2040 2059
2041static int is_device_busy(struct comedi_device *dev) 2060static int is_device_busy(struct comedi_device *dev)
2042{ 2061{
@@ -2057,7 +2076,7 @@ static int is_device_busy(struct comedi_device *dev)
2057 return 0; 2076 return 0;
2058} 2077}
2059 2078
2060void comedi_device_init(struct comedi_device *dev) 2079static void comedi_device_init(struct comedi_device *dev)
2061{ 2080{
2062 memset(dev, 0, sizeof(struct comedi_device)); 2081 memset(dev, 0, sizeof(struct comedi_device));
2063 spin_lock_init(&dev->spinlock); 2082 spin_lock_init(&dev->spinlock);
@@ -2065,7 +2084,7 @@ void comedi_device_init(struct comedi_device *dev)
2065 dev->minor = -1; 2084 dev->minor = -1;
2066} 2085}
2067 2086
2068void comedi_device_cleanup(struct comedi_device *dev) 2087static void comedi_device_cleanup(struct comedi_device *dev)
2069{ 2088{
2070 if (dev == NULL) 2089 if (dev == NULL)
2071 return; 2090 return;
@@ -2105,7 +2124,8 @@ int comedi_alloc_board_minor(struct device *hardware_device)
2105 kfree(info->device); 2124 kfree(info->device);
2106 kfree(info); 2125 kfree(info);
2107 printk(KERN_ERR 2126 printk(KERN_ERR
2108 "comedi: error: ran out of minor numbers for board device files.\n"); 2127 "comedi: error: "
2128 "ran out of minor numbers for board device files.\n");
2109 return -EBUSY; 2129 return -EBUSY;
2110 } 2130 }
2111 info->device->minor = i; 2131 info->device->minor = i;
@@ -2118,7 +2138,8 @@ int comedi_alloc_board_minor(struct device *hardware_device)
2118 retval = device_create_file(csdev, &dev_attr_max_read_buffer_kb); 2138 retval = device_create_file(csdev, &dev_attr_max_read_buffer_kb);
2119 if (retval) { 2139 if (retval) {
2120 printk(KERN_ERR 2140 printk(KERN_ERR
2121 "comedi: failed to create sysfs attribute file \"%s\".\n", 2141 "comedi: "
2142 "failed to create sysfs attribute file \"%s\".\n",
2122 dev_attr_max_read_buffer_kb.attr.name); 2143 dev_attr_max_read_buffer_kb.attr.name);
2123 comedi_free_board_minor(i); 2144 comedi_free_board_minor(i);
2124 return retval; 2145 return retval;
@@ -2126,7 +2147,8 @@ int comedi_alloc_board_minor(struct device *hardware_device)
2126 retval = device_create_file(csdev, &dev_attr_read_buffer_kb); 2147 retval = device_create_file(csdev, &dev_attr_read_buffer_kb);
2127 if (retval) { 2148 if (retval) {
2128 printk(KERN_ERR 2149 printk(KERN_ERR
2129 "comedi: failed to create sysfs attribute file \"%s\".\n", 2150 "comedi: "
2151 "failed to create sysfs attribute file \"%s\".\n",
2130 dev_attr_read_buffer_kb.attr.name); 2152 dev_attr_read_buffer_kb.attr.name);
2131 comedi_free_board_minor(i); 2153 comedi_free_board_minor(i);
2132 return retval; 2154 return retval;
@@ -2134,7 +2156,8 @@ int comedi_alloc_board_minor(struct device *hardware_device)
2134 retval = device_create_file(csdev, &dev_attr_max_write_buffer_kb); 2156 retval = device_create_file(csdev, &dev_attr_max_write_buffer_kb);
2135 if (retval) { 2157 if (retval) {
2136 printk(KERN_ERR 2158 printk(KERN_ERR
2137 "comedi: failed to create sysfs attribute file \"%s\".\n", 2159 "comedi: "
2160 "failed to create sysfs attribute file \"%s\".\n",
2138 dev_attr_max_write_buffer_kb.attr.name); 2161 dev_attr_max_write_buffer_kb.attr.name);
2139 comedi_free_board_minor(i); 2162 comedi_free_board_minor(i);
2140 return retval; 2163 return retval;
@@ -2142,7 +2165,8 @@ int comedi_alloc_board_minor(struct device *hardware_device)
2142 retval = device_create_file(csdev, &dev_attr_write_buffer_kb); 2165 retval = device_create_file(csdev, &dev_attr_write_buffer_kb);
2143 if (retval) { 2166 if (retval) {
2144 printk(KERN_ERR 2167 printk(KERN_ERR
2145 "comedi: failed to create sysfs attribute file \"%s\".\n", 2168 "comedi: "
2169 "failed to create sysfs attribute file \"%s\".\n",
2146 dev_attr_write_buffer_kb.attr.name); 2170 dev_attr_write_buffer_kb.attr.name);
2147 comedi_free_board_minor(i); 2171 comedi_free_board_minor(i);
2148 return retval; 2172 return retval;
@@ -2201,7 +2225,8 @@ int comedi_alloc_subdevice_minor(struct comedi_device *dev,
2201 if (i == COMEDI_NUM_MINORS) { 2225 if (i == COMEDI_NUM_MINORS) {
2202 kfree(info); 2226 kfree(info);
2203 printk(KERN_ERR 2227 printk(KERN_ERR
2204 "comedi: error: ran out of minor numbers for board device files.\n"); 2228 "comedi: error: "
2229 "ran out of minor numbers for board device files.\n");
2205 return -EBUSY; 2230 return -EBUSY;
2206 } 2231 }
2207 s->minor = i; 2232 s->minor = i;
@@ -2215,7 +2240,8 @@ int comedi_alloc_subdevice_minor(struct comedi_device *dev,
2215 retval = device_create_file(csdev, &dev_attr_max_read_buffer_kb); 2240 retval = device_create_file(csdev, &dev_attr_max_read_buffer_kb);
2216 if (retval) { 2241 if (retval) {
2217 printk(KERN_ERR 2242 printk(KERN_ERR
2218 "comedi: failed to create sysfs attribute file \"%s\".\n", 2243 "comedi: "
2244 "failed to create sysfs attribute file \"%s\".\n",
2219 dev_attr_max_read_buffer_kb.attr.name); 2245 dev_attr_max_read_buffer_kb.attr.name);
2220 comedi_free_subdevice_minor(s); 2246 comedi_free_subdevice_minor(s);
2221 return retval; 2247 return retval;
@@ -2223,7 +2249,8 @@ int comedi_alloc_subdevice_minor(struct comedi_device *dev,
2223 retval = device_create_file(csdev, &dev_attr_read_buffer_kb); 2249 retval = device_create_file(csdev, &dev_attr_read_buffer_kb);
2224 if (retval) { 2250 if (retval) {
2225 printk(KERN_ERR 2251 printk(KERN_ERR
2226 "comedi: failed to create sysfs attribute file \"%s\".\n", 2252 "comedi: "
2253 "failed to create sysfs attribute file \"%s\".\n",
2227 dev_attr_read_buffer_kb.attr.name); 2254 dev_attr_read_buffer_kb.attr.name);
2228 comedi_free_subdevice_minor(s); 2255 comedi_free_subdevice_minor(s);
2229 return retval; 2256 return retval;
@@ -2231,7 +2258,8 @@ int comedi_alloc_subdevice_minor(struct comedi_device *dev,
2231 retval = device_create_file(csdev, &dev_attr_max_write_buffer_kb); 2258 retval = device_create_file(csdev, &dev_attr_max_write_buffer_kb);
2232 if (retval) { 2259 if (retval) {
2233 printk(KERN_ERR 2260 printk(KERN_ERR
2234 "comedi: failed to create sysfs attribute file \"%s\".\n", 2261 "comedi: "
2262 "failed to create sysfs attribute file \"%s\".\n",
2235 dev_attr_max_write_buffer_kb.attr.name); 2263 dev_attr_max_write_buffer_kb.attr.name);
2236 comedi_free_subdevice_minor(s); 2264 comedi_free_subdevice_minor(s);
2237 return retval; 2265 return retval;
@@ -2239,7 +2267,8 @@ int comedi_alloc_subdevice_minor(struct comedi_device *dev,
2239 retval = device_create_file(csdev, &dev_attr_write_buffer_kb); 2267 retval = device_create_file(csdev, &dev_attr_write_buffer_kb);
2240 if (retval) { 2268 if (retval) {
2241 printk(KERN_ERR 2269 printk(KERN_ERR
2242 "comedi: failed to create sysfs attribute file \"%s\".\n", 2270 "comedi: "
2271 "failed to create sysfs attribute file \"%s\".\n",
2243 dev_attr_write_buffer_kb.attr.name); 2272 dev_attr_write_buffer_kb.attr.name);
2244 comedi_free_subdevice_minor(s); 2273 comedi_free_subdevice_minor(s);
2245 return retval; 2274 return retval;
@@ -2283,6 +2312,7 @@ struct comedi_device_file_info *comedi_get_device_file_info(unsigned minor)
2283 spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2312 spin_unlock_irqrestore(&comedi_file_info_table_lock, flags);
2284 return info; 2313 return info;
2285} 2314}
2315EXPORT_SYMBOL_GPL(comedi_get_device_file_info);
2286 2316
2287static int resize_async_buffer(struct comedi_device *dev, 2317static int resize_async_buffer(struct comedi_device *dev,
2288 struct comedi_subdevice *s, 2318 struct comedi_subdevice *s,
diff --git a/drivers/staging/comedi/comedi_fops.h b/drivers/staging/comedi/comedi_fops.h
index cb503c88c7f4..da4b4f5553f5 100644
--- a/drivers/staging/comedi/comedi_fops.h
+++ b/drivers/staging/comedi/comedi_fops.h
@@ -5,5 +5,6 @@
5extern struct class *comedi_class; 5extern struct class *comedi_class;
6extern const struct file_operations comedi_fops; 6extern const struct file_operations comedi_fops;
7extern int comedi_autoconfig; 7extern int comedi_autoconfig;
8extern struct comedi_driver *comedi_drivers;
8 9
9#endif /* _COMEDI_FOPS_H */ 10#endif /* _COMEDI_FOPS_H */
diff --git a/drivers/staging/comedi/comedi_ksyms.c b/drivers/staging/comedi/comedi_ksyms.c
deleted file mode 100644
index 87803e69a149..000000000000
--- a/drivers/staging/comedi/comedi_ksyms.c
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 module/exp_ioctl.c
3 exported comedi functions
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23
24#define __NO_VERSION__
25
26#include "comedidev.h"
27
28/* for drivers */
29EXPORT_SYMBOL(comedi_driver_register);
30EXPORT_SYMBOL(comedi_driver_unregister);
31/* EXPORT_SYMBOL(comedi_bufcheck); */
32/* EXPORT_SYMBOL(comedi_done); */
33/* EXPORT_SYMBOL(comedi_error_done); */
34EXPORT_SYMBOL(comedi_error);
35/* EXPORT_SYMBOL(comedi_eobuf); */
36/* EXPORT_SYMBOL(comedi_eos); */
37EXPORT_SYMBOL(comedi_event);
38EXPORT_SYMBOL(comedi_get_subdevice_runflags);
39EXPORT_SYMBOL(comedi_set_subdevice_runflags);
40EXPORT_SYMBOL(range_bipolar10);
41EXPORT_SYMBOL(range_bipolar5);
42EXPORT_SYMBOL(range_bipolar2_5);
43EXPORT_SYMBOL(range_unipolar10);
44EXPORT_SYMBOL(range_unipolar5);
45EXPORT_SYMBOL(range_unknown);
46#ifdef CONFIG_COMEDI_DEBUG
47EXPORT_SYMBOL(comedi_debug);
48#endif
49EXPORT_SYMBOL_GPL(comedi_alloc_board_minor);
50EXPORT_SYMBOL_GPL(comedi_free_board_minor);
51EXPORT_SYMBOL_GPL(comedi_pci_auto_config);
52EXPORT_SYMBOL_GPL(comedi_pci_auto_unconfig);
53EXPORT_SYMBOL_GPL(comedi_usb_auto_config);
54EXPORT_SYMBOL_GPL(comedi_usb_auto_unconfig);
55
56/* for kcomedilib */
57EXPORT_SYMBOL(check_chanlist);
58EXPORT_SYMBOL_GPL(comedi_get_device_file_info);
59
60EXPORT_SYMBOL(comedi_buf_put);
61EXPORT_SYMBOL(comedi_buf_get);
62EXPORT_SYMBOL(comedi_buf_read_n_available);
63EXPORT_SYMBOL(comedi_buf_write_free);
64EXPORT_SYMBOL(comedi_buf_write_alloc);
65EXPORT_SYMBOL(comedi_buf_read_free);
66EXPORT_SYMBOL(comedi_buf_read_alloc);
67EXPORT_SYMBOL(comedi_buf_memcpy_to);
68EXPORT_SYMBOL(comedi_buf_memcpy_from);
69EXPORT_SYMBOL(comedi_reset_async_buf);
diff --git a/drivers/staging/comedi/comedidev.h b/drivers/staging/comedi/comedidev.h
index ebdccfdf220e..4eb2b77f56dc 100644
--- a/drivers/staging/comedi/comedidev.h
+++ b/drivers/staging/comedi/comedidev.h
@@ -57,7 +57,7 @@
57 static int __init x ## _init_module(void) \ 57 static int __init x ## _init_module(void) \
58 {return comedi_driver_register(&(x)); } \ 58 {return comedi_driver_register(&(x)); } \
59 static void __exit x ## _cleanup_module(void) \ 59 static void __exit x ## _cleanup_module(void) \
60 {comedi_driver_unregister(&(x)); } \ 60 {comedi_driver_unregister(&(x)); } \
61 module_init(x ## _init_module); \ 61 module_init(x ## _init_module); \
62 module_exit(x ## _cleanup_module); 62 module_exit(x ## _cleanup_module);
63 63
@@ -109,17 +109,9 @@
109 COMEDI_MODULE_MACROS \ 109 COMEDI_MODULE_MACROS \
110 COMEDI_PCI_INITCLEANUP_NOMODULE(comedi_driver, pci_id_table) 110 COMEDI_PCI_INITCLEANUP_NOMODULE(comedi_driver, pci_id_table)
111 111
112#define PCI_VENDOR_ID_INOVA 0x104c
113#define PCI_VENDOR_ID_NATINST 0x1093
114#define PCI_VENDOR_ID_DATX 0x1116
115#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
116#define PCI_VENDOR_ID_ADVANTECH 0x13fe
117#define PCI_VENDOR_ID_RTD 0x1435
118#define PCI_VENDOR_ID_AMPLICON 0x14dc
119#define PCI_VENDOR_ID_ADLINK 0x144a 112#define PCI_VENDOR_ID_ADLINK 0x144a
120#define PCI_VENDOR_ID_ICP 0x104c 113#define PCI_VENDOR_ID_ICP 0x104c
121#define PCI_VENDOR_ID_CONTEC 0x1221 114#define PCI_VENDOR_ID_CONTEC 0x1221
122#define PCI_VENDOR_ID_MEILHAUS 0x1402
123 115
124#define COMEDI_NUM_MINORS 0x100 116#define COMEDI_NUM_MINORS 0x100
125#define COMEDI_NUM_BOARD_MINORS 0x30 117#define COMEDI_NUM_BOARD_MINORS 0x30
@@ -132,7 +124,7 @@ struct comedi_subdevice {
132 struct comedi_device *device; 124 struct comedi_device *device;
133 int type; 125 int type;
134 int n_chan; 126 int n_chan;
135 volatile int subdev_flags; 127 int subdev_flags;
136 int len_chanlist; /* maximum length of channel/gain list */ 128 int len_chanlist; /* maximum length of channel/gain list */
137 129
138 void *private; 130 void *private;
@@ -359,9 +351,6 @@ void cleanup_polling(void);
359void start_polling(struct comedi_device *); 351void start_polling(struct comedi_device *);
360void stop_polling(struct comedi_device *); 352void stop_polling(struct comedi_device *);
361 353
362int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
363 unsigned long new_size);
364
365#ifdef CONFIG_PROC_FS 354#ifdef CONFIG_PROC_FS
366void comedi_proc_init(void); 355void comedi_proc_init(void);
367void comedi_proc_cleanup(void); 356void comedi_proc_cleanup(void);
@@ -385,24 +374,17 @@ enum subdevice_runflags {
385 SRF_RUNNING = 0x08000000 374 SRF_RUNNING = 0x08000000
386}; 375};
387 376
388/* 377int comedi_check_chanlist(struct comedi_subdevice *s,
389 various internal comedi functions 378 int n,
390 */ 379 unsigned int *chanlist);
391
392int do_rangeinfo_ioctl(struct comedi_device *dev, struct comedi_rangeinfo *arg);
393int check_chanlist(struct comedi_subdevice *s, int n, unsigned int *chanlist);
394void comedi_set_subdevice_runflags(struct comedi_subdevice *s, unsigned mask,
395 unsigned bits);
396unsigned comedi_get_subdevice_runflags(struct comedi_subdevice *s); 380unsigned comedi_get_subdevice_runflags(struct comedi_subdevice *s);
397int insn_inval(struct comedi_device *dev, struct comedi_subdevice *s,
398 struct comedi_insn *insn, unsigned int *data);
399 381
400/* range stuff */ 382/* range stuff */
401 383
402#define RANGE(a, b) {(a)*1e6, (b)*1e6, 0} 384#define RANGE(a, b) {(a)*1e6, (b)*1e6, 0}
403#define RANGE_ext(a, b) {(a)*1e6, (b)*1e6, RF_EXTERNAL} 385#define RANGE_ext(a, b) {(a)*1e6, (b)*1e6, RF_EXTERNAL}
404#define RANGE_mA(a, b) {(a)*1e6, (b)*1e6, UNIT_mA} 386#define RANGE_mA(a, b) {(a)*1e6, (b)*1e6, UNIT_mA}
405#define RANGE_unitless(a, b) {(a)*1e6, (b)*1e6, 0} /* XXX */ 387#define RANGE_unitless(a, b) {(a)*1e6, (b)*1e6, 0}
406#define BIP_RANGE(a) {-(a)*1e6, (a)*1e6, 0} 388#define BIP_RANGE(a) {-(a)*1e6, (a)*1e6, 0}
407#define UNI_RANGE(a) {0, (a)*1e6, 0} 389#define UNI_RANGE(a) {0, (a)*1e6, 0}
408 390
@@ -505,8 +487,6 @@ static inline unsigned comedi_buf_read_n_allocated(struct comedi_async *async)
505 return async->buf_read_alloc_count - async->buf_read_count; 487 return async->buf_read_alloc_count - async->buf_read_count;
506} 488}
507 489
508void comedi_reset_async_buf(struct comedi_async *async);
509
510static inline void *comedi_aux_data(int options[], int n) 490static inline void *comedi_aux_data(int options[], int n)
511{ 491{
512 unsigned long address; 492 unsigned long address;
@@ -532,8 +512,6 @@ static inline void *comedi_aux_data(int options[], int n)
532 return (void *)address; 512 return (void *)address;
533} 513}
534 514
535int comedi_alloc_board_minor(struct device *hardware_device);
536void comedi_free_board_minor(unsigned minor);
537int comedi_alloc_subdevice_minor(struct comedi_device *dev, 515int comedi_alloc_subdevice_minor(struct comedi_device *dev,
538 struct comedi_subdevice *s); 516 struct comedi_subdevice *s);
539void comedi_free_subdevice_minor(struct comedi_subdevice *s); 517void comedi_free_subdevice_minor(struct comedi_subdevice *s);
diff --git a/drivers/staging/comedi/comedilib.h b/drivers/staging/comedi/comedilib.h
index 3918d53b3040..ca92c43fdb38 100644
--- a/drivers/staging/comedi/comedilib.h
+++ b/drivers/staging/comedi/comedilib.h
@@ -24,170 +24,14 @@
24#ifndef _LINUX_COMEDILIB_H 24#ifndef _LINUX_COMEDILIB_H
25#define _LINUX_COMEDILIB_H 25#define _LINUX_COMEDILIB_H
26 26
27#include "comedi.h" 27struct comedi_device *comedi_open(const char *path);
28 28int comedi_close(struct comedi_device *dev);
29/* Kernel internal stuff. Needed by real-time modules and such. */ 29int comedi_dio_config(struct comedi_device *dev, unsigned int subdev,
30 30 unsigned int chan, unsigned int io);
31#ifndef __KERNEL__ 31int comedi_dio_bitfield(struct comedi_device *dev, unsigned int subdev,
32#error linux/comedilib.h should not be included by non-kernel-space code
33#endif
34
35/* exported functions */
36
37#ifndef KCOMEDILIB_DEPRECATED
38
39/* these functions may not be called at real-time priority */
40
41void *comedi_open(const char *path);
42int comedi_close(void *dev);
43
44/* these functions may be called at any priority, but may fail at
45 real-time priority */
46
47int comedi_lock(void *dev, unsigned int subdev);
48int comedi_unlock(void *dev, unsigned int subdev);
49
50/* these functions may be called at any priority, but you must hold
51 the lock for the subdevice */
52
53int comedi_loglevel(int loglevel);
54void comedi_perror(const char *s);
55char *comedi_strerror(int errnum);
56int comedi_errno(void);
57int comedi_fileno(void *dev);
58
59int comedi_cancel(void *dev, unsigned int subdev);
60int comedi_register_callback(void *dev, unsigned int subdev,
61 unsigned int mask, int (*cb) (unsigned int,
62 void *), void *arg);
63
64int comedi_command(void *dev, struct comedi_cmd *cmd);
65int comedi_command_test(void *dev, struct comedi_cmd *cmd);
66int comedi_trigger(void *dev, unsigned int subdev, struct comedi_trig *it);
67int __comedi_trigger(void *dev, unsigned int subdev, struct comedi_trig *it);
68int comedi_data_write(void *dev, unsigned int subdev, unsigned int chan,
69 unsigned int range, unsigned int aref, unsigned int data);
70int comedi_data_read(void *dev, unsigned int subdev, unsigned int chan,
71 unsigned int range, unsigned int aref, unsigned int *data);
72int comedi_data_read_hint(void *dev, unsigned int subdev,
73 unsigned int chan, unsigned int range,
74 unsigned int aref);
75int comedi_data_read_delayed(void *dev, unsigned int subdev, unsigned int chan,
76 unsigned int range, unsigned int aref,
77 unsigned int *data, unsigned int nano_sec);
78int comedi_dio_config(void *dev, unsigned int subdev, unsigned int chan,
79 unsigned int io);
80int comedi_dio_read(void *dev, unsigned int subdev, unsigned int chan,
81 unsigned int *val);
82int comedi_dio_write(void *dev, unsigned int subdev, unsigned int chan,
83 unsigned int val);
84int comedi_dio_bitfield(void *dev, unsigned int subdev, unsigned int mask,
85 unsigned int *bits);
86int comedi_get_n_subdevices(void *dev);
87int comedi_get_version_code(void *dev);
88const char *comedi_get_driver_name(void *dev);
89const char *comedi_get_board_name(void *dev);
90int comedi_get_subdevice_type(void *dev, unsigned int subdevice);
91int comedi_find_subdevice_by_type(void *dev, int type, unsigned int subd);
92int comedi_get_n_channels(void *dev, unsigned int subdevice);
93unsigned int comedi_get_maxdata(void *dev, unsigned int subdevice, unsigned
94 int chan);
95int comedi_get_n_ranges(void *dev, unsigned int subdevice, unsigned int chan);
96int comedi_do_insn(void *dev, struct comedi_insn *insn);
97int comedi_poll(void *dev, unsigned int subdev);
98
99/* DEPRECATED functions */
100int comedi_get_rangetype(void *dev, unsigned int subdevice, unsigned int chan);
101
102/* ALPHA functions */
103unsigned int comedi_get_subdevice_flags(void *dev, unsigned int subdevice);
104int comedi_get_len_chanlist(void *dev, unsigned int subdevice);
105int comedi_get_krange(void *dev, unsigned int subdevice, unsigned int
106 chan, unsigned int range, struct comedi_krange *krange);
107unsigned int comedi_get_buf_head_pos(void *dev, unsigned int subdevice);
108int comedi_set_user_int_count(void *dev, unsigned int subdevice,
109 unsigned int buf_user_count);
110int comedi_map(void *dev, unsigned int subdev, void *ptr);
111int comedi_unmap(void *dev, unsigned int subdev);
112int comedi_get_buffer_size(void *dev, unsigned int subdev);
113int comedi_mark_buffer_read(void *dev, unsigned int subdevice,
114 unsigned int num_bytes);
115int comedi_mark_buffer_written(void *d, unsigned int subdevice,
116 unsigned int num_bytes);
117int comedi_get_buffer_contents(void *dev, unsigned int subdevice);
118int comedi_get_buffer_offset(void *dev, unsigned int subdevice);
119
120#else
121
122/* these functions may not be called at real-time priority */
123
124int comedi_open(unsigned int minor);
125void comedi_close(unsigned int minor);
126
127/* these functions may be called at any priority, but may fail at
128 real-time priority */
129
130int comedi_lock(unsigned int minor, unsigned int subdev);
131int comedi_unlock(unsigned int minor, unsigned int subdev);
132
133/* these functions may be called at any priority, but you must hold
134 the lock for the subdevice */
135
136int comedi_cancel(unsigned int minor, unsigned int subdev);
137int comedi_register_callback(unsigned int minor, unsigned int subdev,
138 unsigned int mask, int (*cb) (unsigned int,
139 void *), void *arg);
140
141int comedi_command(unsigned int minor, struct comedi_cmd *cmd);
142int comedi_command_test(unsigned int minor, struct comedi_cmd *cmd);
143int comedi_trigger(unsigned int minor, unsigned int subdev,
144 struct comedi_trig *it);
145int __comedi_trigger(unsigned int minor, unsigned int subdev,
146 struct comedi_trig *it);
147int comedi_data_write(unsigned int dev, unsigned int subdev, unsigned int chan,
148 unsigned int range, unsigned int aref, unsigned int data);
149int comedi_data_read(unsigned int dev, unsigned int subdev, unsigned int chan,
150 unsigned int range, unsigned int aref, unsigned int *data);
151int comedi_dio_config(unsigned int dev, unsigned int subdev, unsigned int chan,
152 unsigned int io);
153int comedi_dio_read(unsigned int dev, unsigned int subdev, unsigned int chan,
154 unsigned int *val);
155int comedi_dio_write(unsigned int dev, unsigned int subdev, unsigned int chan,
156 unsigned int val);
157int comedi_dio_bitfield(unsigned int dev, unsigned int subdev,
158 unsigned int mask, unsigned int *bits); 32 unsigned int mask, unsigned int *bits);
159int comedi_get_n_subdevices(unsigned int dev); 33int comedi_find_subdevice_by_type(struct comedi_device *dev, int type,
160int comedi_get_version_code(unsigned int dev);
161char *comedi_get_driver_name(unsigned int dev);
162char *comedi_get_board_name(unsigned int minor);
163int comedi_get_subdevice_type(unsigned int minor, unsigned int subdevice);
164int comedi_find_subdevice_by_type(unsigned int minor, int type,
165 unsigned int subd); 34 unsigned int subd);
166int comedi_get_n_channels(unsigned int minor, unsigned int subdevice); 35int comedi_get_n_channels(struct comedi_device *dev, unsigned int subdevice);
167unsigned int comedi_get_maxdata(unsigned int minor, unsigned int subdevice, unsigned
168 int chan);
169int comedi_get_n_ranges(unsigned int minor, unsigned int subdevice, unsigned int
170 chan);
171int comedi_do_insn(unsigned int minor, struct comedi_insn *insn);
172int comedi_poll(unsigned int minor, unsigned int subdev);
173
174/* DEPRECATED functions */
175int comedi_get_rangetype(unsigned int minor, unsigned int subdevice,
176 unsigned int chan);
177
178/* ALPHA functions */
179unsigned int comedi_get_subdevice_flags(unsigned int minor, unsigned int
180 subdevice);
181int comedi_get_len_chanlist(unsigned int minor, unsigned int subdevice);
182int comedi_get_krange(unsigned int minor, unsigned int subdevice, unsigned int
183 chan, unsigned int range, struct comedi_krange *krange);
184unsigned int comedi_get_buf_head_pos(unsigned int minor, unsigned int
185 subdevice);
186int comedi_set_user_int_count(unsigned int minor, unsigned int subdevice,
187 unsigned int buf_user_count);
188int comedi_map(unsigned int minor, unsigned int subdev, void **ptr);
189int comedi_unmap(unsigned int minor, unsigned int subdev);
190
191#endif
192 36
193#endif 37#endif
diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c
index 44d6b62c230d..4a29ed737e3f 100644
--- a/drivers/staging/comedi/drivers.c
+++ b/drivers/staging/comedi/drivers.c
@@ -37,16 +37,16 @@
37#include <linux/ioport.h> 37#include <linux/ioport.h>
38#include <linux/mm.h> 38#include <linux/mm.h>
39#include <linux/slab.h> 39#include <linux/slab.h>
40#include "comedidev.h"
41#include "wrapper.h"
42#include <linux/highmem.h> /* for SuSE brokenness */ 40#include <linux/highmem.h> /* for SuSE brokenness */
43#include <linux/vmalloc.h> 41#include <linux/vmalloc.h>
44#include <linux/cdev.h> 42#include <linux/cdev.h>
45#include <linux/dma-mapping.h> 43#include <linux/dma-mapping.h>
46
47#include <linux/io.h> 44#include <linux/io.h>
48#include <asm/system.h> 45#include <asm/system.h>
49 46
47#include "comedidev.h"
48#include "internal.h"
49
50static int postconfig(struct comedi_device *dev); 50static int postconfig(struct comedi_device *dev);
51static int insn_rw_emulate_bits(struct comedi_device *dev, 51static int insn_rw_emulate_bits(struct comedi_device *dev,
52 struct comedi_subdevice *s, 52 struct comedi_subdevice *s,
@@ -54,16 +54,9 @@ static int insn_rw_emulate_bits(struct comedi_device *dev,
54static void *comedi_recognize(struct comedi_driver *driv, const char *name); 54static void *comedi_recognize(struct comedi_driver *driv, const char *name);
55static void comedi_report_boards(struct comedi_driver *driv); 55static void comedi_report_boards(struct comedi_driver *driv);
56static int poll_invalid(struct comedi_device *dev, struct comedi_subdevice *s); 56static int poll_invalid(struct comedi_device *dev, struct comedi_subdevice *s);
57int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
58 unsigned long new_size);
59 57
60struct comedi_driver *comedi_drivers; 58struct comedi_driver *comedi_drivers;
61 59
62int comedi_modprobe(int minor)
63{
64 return -EINVAL;
65}
66
67static void cleanup_device(struct comedi_device *dev) 60static void cleanup_device(struct comedi_device *dev)
68{ 61{
69 int i; 62 int i;
@@ -84,7 +77,7 @@ static void cleanup_device(struct comedi_device *dev)
84 } 77 }
85 kfree(dev->private); 78 kfree(dev->private);
86 dev->private = NULL; 79 dev->private = NULL;
87 dev->driver = 0; 80 dev->driver = NULL;
88 dev->board_name = NULL; 81 dev->board_name = NULL;
89 dev->board_ptr = NULL; 82 dev->board_ptr = NULL;
90 dev->iobase = 0; 83 dev->iobase = 0;
@@ -102,7 +95,8 @@ static void __comedi_device_detach(struct comedi_device *dev)
102 if (dev->driver) 95 if (dev->driver)
103 dev->driver->detach(dev); 96 dev->driver->detach(dev);
104 else 97 else
105 printk("BUG: dev->driver=NULL in comedi_device_detach()\n"); 98 printk(KERN_WARNING
99 "BUG: dev->driver=NULL in comedi_device_detach()\n");
106 cleanup_device(dev); 100 cleanup_device(dev);
107} 101}
108 102
@@ -124,7 +118,7 @@ int comedi_device_attach(struct comedi_device *dev, struct comedi_devconfig *it)
124 for (driv = comedi_drivers; driv; driv = driv->next) { 118 for (driv = comedi_drivers; driv; driv = driv->next) {
125 if (!try_module_get(driv->module)) { 119 if (!try_module_get(driv->module)) {
126 printk 120 printk
127 ("comedi: failed to increment module count, skipping\n"); 121 (KERN_INFO "comedi: failed to increment module count, skipping\n");
128 continue; 122 continue;
129 } 123 }
130 if (driv->num_names) { 124 if (driv->num_names) {
@@ -139,7 +133,8 @@ int comedi_device_attach(struct comedi_device *dev, struct comedi_devconfig *it)
139 continue; 133 continue;
140 } 134 }
141 } 135 }
142 /* initialize dev->driver here so comedi_error() can be called from attach */ 136 /* initialize dev->driver here so
137 * comedi_error() can be called from attach */
143 dev->driver = driv; 138 dev->driver = driv;
144 ret = driv->attach(dev, it); 139 ret = driv->attach(dev, it);
145 if (ret < 0) { 140 if (ret < 0) {
@@ -154,7 +149,8 @@ int comedi_device_attach(struct comedi_device *dev, struct comedi_devconfig *it)
154 /* report valid board names before returning error */ 149 /* report valid board names before returning error */
155 for (driv = comedi_drivers; driv; driv = driv->next) { 150 for (driv = comedi_drivers; driv; driv = driv->next) {
156 if (!try_module_get(driv->module)) { 151 if (!try_module_get(driv->module)) {
157 printk("comedi: failed to increment module count\n"); 152 printk(KERN_INFO
153 "comedi: failed to increment module count\n");
158 continue; 154 continue;
159 } 155 }
160 comedi_report_boards(driv); 156 comedi_report_boards(driv);
@@ -172,7 +168,8 @@ attached:
172 } 168 }
173 169
174 if (!dev->board_name) { 170 if (!dev->board_name) {
175 printk("BUG: dev->board_name=<%p>\n", dev->board_name); 171 printk(KERN_WARNING "BUG: dev->board_name=<%p>\n",
172 dev->board_name);
176 dev->board_name = "BUG"; 173 dev->board_name = "BUG";
177 } 174 }
178 smp_wmb(); 175 smp_wmb();
@@ -188,6 +185,7 @@ int comedi_driver_register(struct comedi_driver *driver)
188 185
189 return 0; 186 return 0;
190} 187}
188EXPORT_SYMBOL(comedi_driver_register);
191 189
192int comedi_driver_unregister(struct comedi_driver *driver) 190int comedi_driver_unregister(struct comedi_driver *driver)
193{ 191{
@@ -208,7 +206,7 @@ int comedi_driver_unregister(struct comedi_driver *driver)
208 if (dev->attached && dev->driver == driver) { 206 if (dev->attached && dev->driver == driver) {
209 if (dev->use_count) 207 if (dev->use_count)
210 printk 208 printk
211 ("BUG! detaching device with use_count=%d\n", 209 (KERN_WARNING "BUG! detaching device with use_count=%d\n",
212 dev->use_count); 210 dev->use_count);
213 comedi_device_detach(dev); 211 comedi_device_detach(dev);
214 } 212 }
@@ -228,6 +226,7 @@ int comedi_driver_unregister(struct comedi_driver *driver)
228 } 226 }
229 return -EINVAL; 227 return -EINVAL;
230} 228}
229EXPORT_SYMBOL(comedi_driver_unregister);
231 230
232static int postconfig(struct comedi_device *dev) 231static int postconfig(struct comedi_device *dev)
233{ 232{
@@ -253,7 +252,8 @@ static int postconfig(struct comedi_device *dev)
253 async = 252 async =
254 kzalloc(sizeof(struct comedi_async), GFP_KERNEL); 253 kzalloc(sizeof(struct comedi_async), GFP_KERNEL);
255 if (async == NULL) { 254 if (async == NULL) {
256 printk("failed to allocate async struct\n"); 255 printk(KERN_INFO
256 "failed to allocate async struct\n");
257 return -ENOMEM; 257 return -ENOMEM;
258 } 258 }
259 init_waitqueue_head(&async->wait_head); 259 init_waitqueue_head(&async->wait_head);
@@ -268,7 +268,7 @@ static int postconfig(struct comedi_device *dev)
268 async->prealloc_buf = NULL; 268 async->prealloc_buf = NULL;
269 async->prealloc_bufsz = 0; 269 async->prealloc_bufsz = 0;
270 if (comedi_buf_alloc(dev, s, DEFAULT_BUF_SIZE) < 0) { 270 if (comedi_buf_alloc(dev, s, DEFAULT_BUF_SIZE) < 0) {
271 printk("Buffer allocation failed\n"); 271 printk(KERN_INFO "Buffer allocation failed\n");
272 return -ENOMEM; 272 return -ENOMEM;
273 } 273 }
274 if (s->buf_change) { 274 if (s->buf_change) {
@@ -303,8 +303,9 @@ static int postconfig(struct comedi_device *dev)
303 return 0; 303 return 0;
304} 304}
305 305
306/* generic recognize function for drivers that register their supported board names */ 306/* generic recognize function for drivers
307void *comedi_recognize(struct comedi_driver *driv, const char *name) 307 * that register their supported board names */
308static void *comedi_recognize(struct comedi_driver *driv, const char *name)
308{ 309{
309 unsigned i; 310 unsigned i;
310 const char *const *name_ptr = driv->board_name; 311 const char *const *name_ptr = driv->board_name;
@@ -319,22 +320,22 @@ void *comedi_recognize(struct comedi_driver *driv, const char *name)
319 return NULL; 320 return NULL;
320} 321}
321 322
322void comedi_report_boards(struct comedi_driver *driv) 323static void comedi_report_boards(struct comedi_driver *driv)
323{ 324{
324 unsigned int i; 325 unsigned int i;
325 const char *const *name_ptr; 326 const char *const *name_ptr;
326 327
327 printk("comedi: valid board names for %s driver are:\n", 328 printk(KERN_INFO "comedi: valid board names for %s driver are:\n",
328 driv->driver_name); 329 driv->driver_name);
329 330
330 name_ptr = driv->board_name; 331 name_ptr = driv->board_name;
331 for (i = 0; i < driv->num_names; i++) { 332 for (i = 0; i < driv->num_names; i++) {
332 printk(" %s\n", *name_ptr); 333 printk(KERN_INFO " %s\n", *name_ptr);
333 name_ptr = (const char **)((char *)name_ptr + driv->offset); 334 name_ptr = (const char **)((char *)name_ptr + driv->offset);
334 } 335 }
335 336
336 if (driv->num_names == 0) 337 if (driv->num_names == 0)
337 printk(" %s\n", driv->driver_name); 338 printk(KERN_INFO " %s\n", driv->driver_name);
338} 339}
339 340
340static int poll_invalid(struct comedi_device *dev, struct comedi_subdevice *s) 341static int poll_invalid(struct comedi_device *dev, struct comedi_subdevice *s)
@@ -371,8 +372,9 @@ static int insn_rw_emulate_bits(struct comedi_device *dev,
371 if (insn->insn == INSN_WRITE) { 372 if (insn->insn == INSN_WRITE) {
372 if (!(s->subdev_flags & SDF_WRITABLE)) 373 if (!(s->subdev_flags & SDF_WRITABLE))
373 return -EINVAL; 374 return -EINVAL;
374 new_data[0] = 1 << (chan - base_bitfield_channel); /* mask */ 375 new_data[0] = 1 << (chan - base_bitfield_channel); /* mask */
375 new_data[1] = data[0] ? (1 << (chan - base_bitfield_channel)) : 0; /* bits */ 376 new_data[1] = data[0] ? (1 << (chan - base_bitfield_channel))
377 : 0; /* bits */
376 } 378 }
377 379
378 ret = s->insn_bits(dev, s, &new_insn, new_data); 380 ret = s->insn_bits(dev, s, &new_insn, new_data);
@@ -440,9 +442,7 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
440 unsigned i; 442 unsigned i;
441 for (i = 0; i < async->n_buf_pages; ++i) { 443 for (i = 0; i < async->n_buf_pages; ++i) {
442 if (async->buf_page_list[i].virt_addr) { 444 if (async->buf_page_list[i].virt_addr) {
443 mem_map_unreserve(virt_to_page 445 clear_bit(PG_reserved, &(virt_to_page(async->buf_page_list[i].virt_addr)->flags));
444 (async->buf_page_list[i].
445 virt_addr));
446 if (s->async_dma_dir != DMA_NONE) { 446 if (s->async_dma_dir != DMA_NONE) {
447 dma_free_coherent(dev->hw_dev, 447 dma_free_coherent(dev->hw_dev,
448 PAGE_SIZE, 448 PAGE_SIZE,
@@ -495,12 +495,9 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
495 if (async->buf_page_list[i].virt_addr == NULL) 495 if (async->buf_page_list[i].virt_addr == NULL)
496 break; 496 break;
497 497
498 mem_map_reserve(virt_to_page 498 set_bit(PG_reserved,
499 (async->buf_page_list[i]. 499 &(virt_to_page(async->buf_page_list[i].virt_addr)->flags));
500 virt_addr)); 500 pages[i] = virt_to_page(async->buf_page_list[i].virt_addr);
501 pages[i] =
502 virt_to_page(async->
503 buf_page_list[i].virt_addr);
504 } 501 }
505 } 502 }
506 if (i == n_pages) { 503 if (i == n_pages) {
@@ -517,9 +514,7 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
517 NULL) { 514 NULL) {
518 break; 515 break;
519 } 516 }
520 mem_map_unreserve(virt_to_page 517 clear_bit(PG_reserved, &(virt_to_page(async->buf_page_list[i].virt_addr)->flags));
521 (async->buf_page_list
522 [i].virt_addr));
523 if (s->async_dma_dir != DMA_NONE) { 518 if (s->async_dma_dir != DMA_NONE) {
524 dma_free_coherent(dev->hw_dev, 519 dma_free_coherent(dev->hw_dev,
525 PAGE_SIZE, 520 PAGE_SIZE,
@@ -549,8 +544,8 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
549 544
550/* munging is applied to data by core as it passes between user 545/* munging is applied to data by core as it passes between user
551 * and kernel space */ 546 * and kernel space */
552unsigned int comedi_buf_munge(struct comedi_async *async, 547static unsigned int comedi_buf_munge(struct comedi_async *async,
553 unsigned int num_bytes) 548 unsigned int num_bytes)
554{ 549{
555 struct comedi_subdevice *s = async->subdevice; 550 struct comedi_subdevice *s = async->subdevice;
556 unsigned int count = 0; 551 unsigned int count = 0;
@@ -568,7 +563,8 @@ unsigned int comedi_buf_munge(struct comedi_async *async,
568 563
569 block_size = num_bytes - count; 564 block_size = num_bytes - count;
570 if (block_size < 0) { 565 if (block_size < 0) {
571 printk("%s: %s: bug! block_size is negative\n", 566 printk(KERN_WARNING
567 "%s: %s: bug! block_size is negative\n",
572 __FILE__, __func__); 568 __FILE__, __func__);
573 break; 569 break;
574 } 570 }
@@ -579,7 +575,8 @@ unsigned int comedi_buf_munge(struct comedi_async *async,
579 s->munge(s->device, s, async->prealloc_buf + async->munge_ptr, 575 s->munge(s->device, s, async->prealloc_buf + async->munge_ptr,
580 block_size, async->munge_chan); 576 block_size, async->munge_chan);
581 577
582 smp_wmb(); /* barrier insures data is munged in buffer before munge_count is incremented */ 578 smp_wmb(); /* barrier insures data is munged in buffer
579 * before munge_count is incremented */
583 580
584 async->munge_chan += block_size / num_sample_bytes; 581 async->munge_chan += block_size / num_sample_bytes;
585 async->munge_chan %= async->cmd.chanlist_len; 582 async->munge_chan %= async->cmd.chanlist_len;
@@ -626,6 +623,7 @@ unsigned int comedi_buf_write_alloc(struct comedi_async *async,
626 smp_mb(); 623 smp_mb();
627 return nbytes; 624 return nbytes;
628} 625}
626EXPORT_SYMBOL(comedi_buf_write_alloc);
629 627
630/* allocates nothing unless it can completely fulfill the request */ 628/* allocates nothing unless it can completely fulfill the request */
631unsigned int comedi_buf_write_alloc_strict(struct comedi_async *async, 629unsigned int comedi_buf_write_alloc_strict(struct comedi_async *async,
@@ -649,7 +647,7 @@ unsigned comedi_buf_write_free(struct comedi_async *async, unsigned int nbytes)
649 if ((int)(async->buf_write_count + nbytes - 647 if ((int)(async->buf_write_count + nbytes -
650 async->buf_write_alloc_count) > 0) { 648 async->buf_write_alloc_count) > 0) {
651 printk 649 printk
652 ("comedi: attempted to write-free more bytes than have been write-allocated.\n"); 650 (KERN_INFO "comedi: attempted to write-free more bytes than have been write-allocated.\n");
653 nbytes = async->buf_write_alloc_count - async->buf_write_count; 651 nbytes = async->buf_write_alloc_count - async->buf_write_count;
654 } 652 }
655 async->buf_write_count += nbytes; 653 async->buf_write_count += nbytes;
@@ -660,6 +658,7 @@ unsigned comedi_buf_write_free(struct comedi_async *async, unsigned int nbytes)
660 658
661 return nbytes; 659 return nbytes;
662} 660}
661EXPORT_SYMBOL(comedi_buf_write_free);
663 662
664/* allocates a chunk for the reader from filled (and munged) buffer space */ 663/* allocates a chunk for the reader from filled (and munged) buffer space */
665unsigned comedi_buf_read_alloc(struct comedi_async *async, unsigned nbytes) 664unsigned comedi_buf_read_alloc(struct comedi_async *async, unsigned nbytes)
@@ -674,16 +673,18 @@ unsigned comedi_buf_read_alloc(struct comedi_async *async, unsigned nbytes)
674 smp_rmb(); 673 smp_rmb();
675 return nbytes; 674 return nbytes;
676} 675}
676EXPORT_SYMBOL(comedi_buf_read_alloc);
677 677
678/* transfers control of a chunk from reader to free buffer space */ 678/* transfers control of a chunk from reader to free buffer space */
679unsigned comedi_buf_read_free(struct comedi_async *async, unsigned int nbytes) 679unsigned comedi_buf_read_free(struct comedi_async *async, unsigned int nbytes)
680{ 680{
681 /* barrier insures data has been read out of buffer before read count is incremented */ 681 /* barrier insures data has been read out of
682 * buffer before read count is incremented */
682 smp_mb(); 683 smp_mb();
683 if ((int)(async->buf_read_count + nbytes - 684 if ((int)(async->buf_read_count + nbytes -
684 async->buf_read_alloc_count) > 0) { 685 async->buf_read_alloc_count) > 0) {
685 printk 686 printk(KERN_INFO
686 ("comedi: attempted to read-free more bytes than have been read-allocated.\n"); 687 "comedi: attempted to read-free more bytes than have been read-allocated.\n");
687 nbytes = async->buf_read_alloc_count - async->buf_read_count; 688 nbytes = async->buf_read_alloc_count - async->buf_read_count;
688 } 689 }
689 async->buf_read_count += nbytes; 690 async->buf_read_count += nbytes;
@@ -691,6 +692,7 @@ unsigned comedi_buf_read_free(struct comedi_async *async, unsigned int nbytes)
691 async->buf_read_ptr %= async->prealloc_bufsz; 692 async->buf_read_ptr %= async->prealloc_bufsz;
692 return nbytes; 693 return nbytes;
693} 694}
695EXPORT_SYMBOL(comedi_buf_read_free);
694 696
695void comedi_buf_memcpy_to(struct comedi_async *async, unsigned int offset, 697void comedi_buf_memcpy_to(struct comedi_async *async, unsigned int offset,
696 const void *data, unsigned int num_bytes) 698 const void *data, unsigned int num_bytes)
@@ -716,6 +718,7 @@ void comedi_buf_memcpy_to(struct comedi_async *async, unsigned int offset,
716 write_ptr = 0; 718 write_ptr = 0;
717 } 719 }
718} 720}
721EXPORT_SYMBOL(comedi_buf_memcpy_to);
719 722
720void comedi_buf_memcpy_from(struct comedi_async *async, unsigned int offset, 723void comedi_buf_memcpy_from(struct comedi_async *async, unsigned int offset,
721 void *dest, unsigned int nbytes) 724 void *dest, unsigned int nbytes)
@@ -742,6 +745,7 @@ void comedi_buf_memcpy_from(struct comedi_async *async, unsigned int offset,
742 read_ptr = 0; 745 read_ptr = 0;
743 } 746 }
744} 747}
748EXPORT_SYMBOL(comedi_buf_memcpy_from);
745 749
746unsigned int comedi_buf_read_n_available(struct comedi_async *async) 750unsigned int comedi_buf_read_n_available(struct comedi_async *async)
747{ 751{
@@ -757,6 +761,7 @@ unsigned int comedi_buf_read_n_available(struct comedi_async *async)
757 smp_rmb(); 761 smp_rmb();
758 return num_bytes; 762 return num_bytes;
759} 763}
764EXPORT_SYMBOL(comedi_buf_read_n_available);
760 765
761int comedi_buf_get(struct comedi_async *async, short *x) 766int comedi_buf_get(struct comedi_async *async, short *x)
762{ 767{
@@ -769,6 +774,7 @@ int comedi_buf_get(struct comedi_async *async, short *x)
769 comedi_buf_read_free(async, sizeof(short)); 774 comedi_buf_read_free(async, sizeof(short));
770 return 1; 775 return 1;
771} 776}
777EXPORT_SYMBOL(comedi_buf_get);
772 778
773int comedi_buf_put(struct comedi_async *async, short x) 779int comedi_buf_put(struct comedi_async *async, short x)
774{ 780{
@@ -782,6 +788,7 @@ int comedi_buf_put(struct comedi_async *async, short x)
782 comedi_buf_write_free(async, sizeof(short)); 788 comedi_buf_write_free(async, sizeof(short));
783 return 1; 789 return 1;
784} 790}
791EXPORT_SYMBOL(comedi_buf_put);
785 792
786void comedi_reset_async_buf(struct comedi_async *async) 793void comedi_reset_async_buf(struct comedi_async *async)
787{ 794{
@@ -802,8 +809,9 @@ void comedi_reset_async_buf(struct comedi_async *async)
802 async->events = 0; 809 async->events = 0;
803} 810}
804 811
805int comedi_auto_config(struct device *hardware_device, const char *board_name, 812static int comedi_auto_config(struct device *hardware_device,
806 const int *options, unsigned num_options) 813 const char *board_name, const int *options,
814 unsigned num_options)
807{ 815{
808 struct comedi_devconfig it; 816 struct comedi_devconfig it;
809 int minor; 817 int minor;
@@ -848,7 +856,7 @@ cleanup:
848 return retval; 856 return retval;
849} 857}
850 858
851void comedi_auto_unconfig(struct device *hardware_device) 859static void comedi_auto_unconfig(struct device *hardware_device)
852{ 860{
853 unsigned *minor = (unsigned *)dev_get_drvdata(hardware_device); 861 unsigned *minor = (unsigned *)dev_get_drvdata(hardware_device);
854 if (minor == NULL) 862 if (minor == NULL)
@@ -873,20 +881,24 @@ int comedi_pci_auto_config(struct pci_dev *pcidev, const char *board_name)
873 return comedi_auto_config(&pcidev->dev, board_name, 881 return comedi_auto_config(&pcidev->dev, board_name,
874 options, ARRAY_SIZE(options)); 882 options, ARRAY_SIZE(options));
875} 883}
884EXPORT_SYMBOL_GPL(comedi_pci_auto_config);
876 885
877void comedi_pci_auto_unconfig(struct pci_dev *pcidev) 886void comedi_pci_auto_unconfig(struct pci_dev *pcidev)
878{ 887{
879 comedi_auto_unconfig(&pcidev->dev); 888 comedi_auto_unconfig(&pcidev->dev);
880} 889}
890EXPORT_SYMBOL_GPL(comedi_pci_auto_unconfig);
881 891
882int comedi_usb_auto_config(struct usb_device *usbdev, const char *board_name) 892int comedi_usb_auto_config(struct usb_device *usbdev, const char *board_name)
883{ 893{
884 BUG_ON(usbdev == NULL); 894 BUG_ON(usbdev == NULL);
885 return comedi_auto_config(&usbdev->dev, board_name, NULL, 0); 895 return comedi_auto_config(&usbdev->dev, board_name, NULL, 0);
886} 896}
897EXPORT_SYMBOL_GPL(comedi_usb_auto_config);
887 898
888void comedi_usb_auto_unconfig(struct usb_device *usbdev) 899void comedi_usb_auto_unconfig(struct usb_device *usbdev)
889{ 900{
890 BUG_ON(usbdev == NULL); 901 BUG_ON(usbdev == NULL);
891 comedi_auto_unconfig(&usbdev->dev); 902 comedi_auto_unconfig(&usbdev->dev);
892} 903}
904EXPORT_SYMBOL_GPL(comedi_usb_auto_unconfig);
diff --git a/drivers/staging/comedi/drivers/8253.h b/drivers/staging/comedi/drivers/8253.h
index 0bb35db4ea3b..3eb45d46e05b 100644
--- a/drivers/staging/comedi/drivers/8253.h
+++ b/drivers/staging/comedi/drivers/8253.h
@@ -214,7 +214,8 @@ static inline void i8253_cascade_ns_to_timer_2div(int i8253_osc_base,
214 214
215#ifndef CMDTEST 215#ifndef CMDTEST
216/* i8254_load programs 8254 counter chip. It should also work for the 8253. 216/* i8254_load programs 8254 counter chip. It should also work for the 8253.
217 * base_address is the lowest io address for the chip (the address of counter 0). 217 * base_address is the lowest io address
218 * for the chip (the address of counter 0).
218 * counter_number is the counter you want to load (0,1 or 2) 219 * counter_number is the counter you want to load (0,1 or 2)
219 * count is the number to load into the counter. 220 * count is the number to load into the counter.
220 * 221 *
diff --git a/drivers/staging/comedi/drivers/8255.c b/drivers/staging/comedi/drivers/8255.c
index 2d54993ffb12..fe63830bd850 100644
--- a/drivers/staging/comedi/drivers/8255.c
+++ b/drivers/staging/comedi/drivers/8255.c
@@ -82,6 +82,7 @@ I/O port base address can be found in the output of 'lspci -v'.
82 82
83#include <linux/ioport.h> 83#include <linux/ioport.h>
84#include <linux/slab.h> 84#include <linux/slab.h>
85#include "8255.h"
85 86
86#define _8255_SIZE 4 87#define _8255_SIZE 4
87 88
@@ -395,8 +396,6 @@ static int dev_8255_attach(struct comedi_device *dev,
395 unsigned long iobase; 396 unsigned long iobase;
396 int i; 397 int i;
397 398
398 printk("comedi%d: 8255:", dev->minor);
399
400 dev->board_name = "8255"; 399 dev->board_name = "8255";
401 400
402 for (i = 0; i < COMEDI_NDEVCONFOPTS; i++) { 401 for (i = 0; i < COMEDI_NDEVCONFOPTS; i++) {
@@ -405,13 +404,20 @@ static int dev_8255_attach(struct comedi_device *dev,
405 break; 404 break;
406 } 405 }
407 if (i == 0) { 406 if (i == 0) {
408 printk(" no devices specified\n"); 407 printk(KERN_WARNING
408 "comedi%d: 8255: no devices specified\n", dev->minor);
409 return -EINVAL; 409 return -EINVAL;
410 } 410 }
411 411
412 ret = alloc_subdevices(dev, i); 412 ret = alloc_subdevices(dev, i);
413 if (ret < 0) 413 if (ret < 0) {
414 /* FIXME this printk call should give a proper message, the
415 * below line just maintains previous functionality */
416 printk("comedi%d: 8255:", dev->minor);
414 return ret; 417 return ret;
418 }
419
420 printk(KERN_INFO "comedi%d: 8255:", dev->minor);
415 421
416 for (i = 0; i < dev->n_subdevices; i++) { 422 for (i = 0; i < dev->n_subdevices; i++) {
417 iobase = it->options[i]; 423 iobase = it->options[i];
@@ -438,7 +444,7 @@ static int dev_8255_detach(struct comedi_device *dev)
438 unsigned long iobase; 444 unsigned long iobase;
439 struct comedi_subdevice *s; 445 struct comedi_subdevice *s;
440 446
441 printk("comedi%d: 8255: remove\n", dev->minor); 447 printk(KERN_INFO "comedi%d: 8255: remove\n", dev->minor);
442 448
443 for (i = 0; i < dev->n_subdevices; i++) { 449 for (i = 0; i < dev->n_subdevices; i++) {
444 s = dev->subdevices + i; 450 s = dev->subdevices + i;
diff --git a/drivers/staging/comedi/drivers/8255.h b/drivers/staging/comedi/drivers/8255.h
index 02c5a361b1ab..b6314c9b7eae 100644
--- a/drivers/staging/comedi/drivers/8255.h
+++ b/drivers/staging/comedi/drivers/8255.h
@@ -26,8 +26,6 @@
26 26
27#include "../comedidev.h" 27#include "../comedidev.h"
28 28
29#if defined(CONFIG_COMEDI_8255) || defined(CONFIG_COMEDI_8255_MODULE)
30
31int subdev_8255_init(struct comedi_device *dev, struct comedi_subdevice *s, 29int subdev_8255_init(struct comedi_device *dev, struct comedi_subdevice *s,
32 int (*cb) (int, int, int, unsigned long), 30 int (*cb) (int, int, int, unsigned long),
33 unsigned long arg); 31 unsigned long arg);
@@ -38,24 +36,4 @@ void subdev_8255_cleanup(struct comedi_device *dev, struct comedi_subdevice *s);
38void subdev_8255_interrupt(struct comedi_device *dev, 36void subdev_8255_interrupt(struct comedi_device *dev,
39 struct comedi_subdevice *s); 37 struct comedi_subdevice *s);
40 38
41#else
42
43static inline int subdev_8255_init(struct comedi_device *dev,
44 struct comedi_subdevice *s, void *x,
45 unsigned long y)
46{
47 printk("8255 support not configured -- disabling subdevice\n");
48
49 s->type = COMEDI_SUBD_UNUSED;
50
51 return 0;
52}
53
54static inline void subdev_8255_cleanup(struct comedi_device *dev,
55 struct comedi_subdevice *s)
56{
57}
58
59#endif
60
61#endif 39#endif
diff --git a/drivers/staging/comedi/drivers/Makefile b/drivers/staging/comedi/drivers/Makefile
index df2854d543cc..5ccf246e2526 100644
--- a/drivers/staging/comedi/drivers/Makefile
+++ b/drivers/staging/comedi/drivers/Makefile
@@ -2,132 +2,137 @@
2# 2#
3 3
4# Comedi "helper" modules 4# Comedi "helper" modules
5obj-$(CONFIG_COMEDI) += comedi_fc.o
6obj-$(CONFIG_COMEDI) += comedi_bond.o
7obj-$(CONFIG_COMEDI) += comedi_test.o
8obj-$(CONFIG_COMEDI) += comedi_parport.o
9obj-$(CONFIG_COMEDI) += pcm_common.o 5obj-$(CONFIG_COMEDI) += pcm_common.o
10 6
7# Comedi misc drivers
8obj-$(CONFIG_COMEDI_BOND) += comedi_bond.o
9obj-$(CONFIG_COMEDI_TEST) += comedi_test.o
10obj-$(CONFIG_COMEDI_PARPORT) += comedi_parport.o
11obj-$(CONFIG_COMEDI_SERIAL2002) += serial2002.o
12obj-$(CONFIG_COMEDI_SKEL) += skel.o
13
14# Comedi ISA drivers
15obj-$(CONFIG_COMEDI_8255) += 8255.o
16obj-$(CONFIG_COMEDI_ACL7225B) += acl7225b.o
17obj-$(CONFIG_COMEDI_PCL711) += pcl711.o
18obj-$(CONFIG_COMEDI_PCL724) += pcl724.o
19obj-$(CONFIG_COMEDI_PCL725) += pcl725.o
20obj-$(CONFIG_COMEDI_PCL726) += pcl726.o
21obj-$(CONFIG_COMEDI_PCL730) += pcl730.o
22obj-$(CONFIG_COMEDI_PCL812) += pcl812.o
23obj-$(CONFIG_COMEDI_PCL816) += pcl816.o
24obj-$(CONFIG_COMEDI_PCL818) += pcl818.o
25obj-$(CONFIG_COMEDI_PCM3724) += pcm3724.o
26obj-$(CONFIG_COMEDI_PCM3730) += pcm3730.o
27obj-$(CONFIG_COMEDI_RTI800) += rti800.o
28obj-$(CONFIG_COMEDI_RTI802) += rti802.o
29obj-$(CONFIG_COMEDI_DAS08) += das08.o
30obj-$(CONFIG_COMEDI_DAS16M1) += das16m1.o
31obj-$(CONFIG_COMEDI_DAS16) += das16.o
32obj-$(CONFIG_COMEDI_DAS800) += das800.o
33obj-$(CONFIG_COMEDI_DAS1800) += das1800.o
34obj-$(CONFIG_COMEDI_DAS6402) += das6402.o
35obj-$(CONFIG_COMEDI_DT2801) += dt2801.o
36obj-$(CONFIG_COMEDI_DT2811) += dt2811.o
37obj-$(CONFIG_COMEDI_DT2814) += dt2814.o
38obj-$(CONFIG_COMEDI_DT2815) += dt2815.o
39obj-$(CONFIG_COMEDI_DT2817) += dt2817.o
40obj-$(CONFIG_COMEDI_DT282X) += dt282x.o
41obj-$(CONFIG_COMEDI_DMM32AT) += dmm32at.o
42obj-$(CONFIG_COMEDI_FL512) += fl512.o
43obj-$(CONFIG_COMEDI_AIO_AIO12_8) += aio_aio12_8.o
44obj-$(CONFIG_COMEDI_AIO_IIRO_16) += aio_iiro_16.o
45obj-$(CONFIG_COMEDI_C6XDIGIO) += c6xdigio.o
46obj-$(CONFIG_COMEDI_MPC624) += mpc624.o
47obj-$(CONFIG_COMEDI_ADQ12B) += adq12b.o
48obj-$(CONFIG_COMEDI_NI_AT_A2150) += ni_at_a2150.o
49obj-$(CONFIG_COMEDI_NI_AT_AO) += ni_at_ao.o
50obj-$(CONFIG_COMEDI_NI_ATMIO) += ni_atmio.o
51obj-$(CONFIG_COMEDI_NI_ATMIO16D) += ni_atmio16d.o
52obj-$(CONFIG_COMEDI_PCMAD) += pcmad.o
53obj-$(CONFIG_COMEDI_PCMDA12) += pcmda12.o
54obj-$(CONFIG_COMEDI_PCMMIO) += pcmmio.o
55obj-$(CONFIG_COMEDI_PCMUIO) += pcmuio.o
56obj-$(CONFIG_COMEDI_MULTIQ3) += multiq3.o
57obj-$(CONFIG_COMEDI_POC) += poc.o
58
11# Comedi PCI drivers 59# Comedi PCI drivers
12obj-$(CONFIG_COMEDI_PCI_DRIVERS) += 8255.o 60obj-$(CONFIG_COMEDI_PCI_DRIVERS) += 8255.o
13obj-$(CONFIG_COMEDI_PCI_DRIVERS) += acl7225b.o 61obj-$(CONFIG_COMEDI_ADDI_APCI_035) += addi_apci_035.o
14obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_035.o 62obj-$(CONFIG_COMEDI_ADDI_APCI_1032) += addi_apci_1032.o
15obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_1032.o 63obj-$(CONFIG_COMEDI_ADDI_APCI_1500) += addi_apci_1500.o
16obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_1500.o 64obj-$(CONFIG_COMEDI_ADDI_APCI_1516) += addi_apci_1516.o
17obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_1516.o 65obj-$(CONFIG_COMEDI_ADDI_APCI_1564) += addi_apci_1564.o
18obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_1564.o 66obj-$(CONFIG_COMEDI_ADDI_APCI_16XX) += addi_apci_16xx.o
19obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_16xx.o 67obj-$(CONFIG_COMEDI_ADDI_APCI_2016) += addi_apci_2016.o
20obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_2016.o 68obj-$(CONFIG_COMEDI_ADDI_APCI_2032) += addi_apci_2032.o
21obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_2032.o 69obj-$(CONFIG_COMEDI_ADDI_APCI_2200) += addi_apci_2200.o
22obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_2200.o 70obj-$(CONFIG_COMEDI_ADDI_APCI_3001) += addi_apci_3001.o
23obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_3001.o 71obj-$(CONFIG_COMEDI_ADDI_APCI_3120) += addi_apci_3120.o
24obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_3120.o 72obj-$(CONFIG_COMEDI_ADDI_APCI_3501) += addi_apci_3501.o
25obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_3501.o 73obj-$(CONFIG_COMEDI_ADDI_APCI_3XXX) += addi_apci_3xxx.o
26obj-$(CONFIG_COMEDI_PCI_DRIVERS) += addi_apci_3xxx.o 74obj-$(CONFIG_COMEDI_ADL_PCI6208) += adl_pci6208.o
27obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci6208.o 75obj-$(CONFIG_COMEDI_ADL_PCI7230) += adl_pci7230.o
28obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci7296.o 76obj-$(CONFIG_COMEDI_ADL_PCI7296) += adl_pci7296.o
29obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci7432.o 77obj-$(CONFIG_COMEDI_ADL_PCI7432) += adl_pci7432.o
30obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci8164.o 78obj-$(CONFIG_COMEDI_ADL_PCI8164) += adl_pci8164.o
31obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci9111.o 79obj-$(CONFIG_COMEDI_ADL_PCI9111) += adl_pci9111.o
32obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adl_pci9118.o 80obj-$(CONFIG_COMEDI_ADL_PCI9118) += adl_pci9118.o
33obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adq12b.o 81obj-$(CONFIG_COMEDI_ADV_PCI1710) += adv_pci1710.o
34obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adv_pci1710.o 82obj-$(CONFIG_COMEDI_ADV_PCI1723) += adv_pci1723.o
35obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adv_pci1723.o 83obj-$(CONFIG_COMEDI_ADV_PCI_DIO) += adv_pci_dio.o
36obj-$(CONFIG_COMEDI_PCI_DRIVERS) += adv_pci_dio.o 84obj-$(CONFIG_COMEDI_AMPLC_DIO200) += amplc_dio200.o
37obj-$(CONFIG_COMEDI_PCI_DRIVERS) += aio_aio12_8.o 85obj-$(CONFIG_COMEDI_AMPLC_PC236) += amplc_pc236.o
38obj-$(CONFIG_COMEDI_PCI_DRIVERS) += aio_iiro_16.o 86obj-$(CONFIG_COMEDI_AMPLC_PC263) += amplc_pc263.o
39obj-$(CONFIG_COMEDI_PCI_DRIVERS) += amplc_dio200.o 87obj-$(CONFIG_COMEDI_AMPLC_PCI224) += amplc_pci224.o
40obj-$(CONFIG_COMEDI_PCI_DRIVERS) += amplc_pc236.o 88obj-$(CONFIG_COMEDI_AMPLC_PCI230) += amplc_pci230.o
41obj-$(CONFIG_COMEDI_PCI_DRIVERS) += amplc_pc263.o 89obj-$(CONFIG_COMEDI_CONTEC_PCI_DIO) += contec_pci_dio.o
42obj-$(CONFIG_COMEDI_PCI_DRIVERS) += amplc_pci224.o 90obj-$(CONFIG_COMEDI_DT3000) += dt3000.o
43obj-$(CONFIG_COMEDI_PCI_DRIVERS) += amplc_pci230.o 91obj-$(CONFIG_COMEDI_UNIOXX5) += unioxx5.o
44obj-$(CONFIG_COMEDI_PCI_DRIVERS) += c6xdigio.o 92obj-$(CONFIG_COMEDI_GSC_HPDI) += gsc_hpdi.o
45obj-$(CONFIG_COMEDI_PCI_DRIVERS) += cb_pcidas64.o 93obj-$(CONFIG_COMEDI_ICP_MULTI) += icp_multi.o
46obj-$(CONFIG_COMEDI_PCI_DRIVERS) += cb_pcidas.o 94obj-$(CONFIG_COMEDI_II_PCI20KC) += ii_pci20kc.o
47obj-$(CONFIG_COMEDI_PCI_DRIVERS) += cb_pcidda.o 95obj-$(CONFIG_COMEDI_DAQBOARD2000) += daqboard2000.o
48obj-$(CONFIG_COMEDI_PCI_DRIVERS) += cb_pcidio.o 96obj-$(CONFIG_COMEDI_JR3_PCI) += jr3_pci.o
49obj-$(CONFIG_COMEDI_PCI_DRIVERS) += cb_pcimdas.o 97obj-$(CONFIG_COMEDI_KE_COUNTER) += ke_counter.o
50obj-$(CONFIG_COMEDI_PCI_DRIVERS) += cb_pcimdda.o 98obj-$(CONFIG_COMEDI_CB_PCIDAS64) += cb_pcidas64.o
51obj-$(CONFIG_COMEDI_PCI_DRIVERS) += comedi_bond.o 99obj-$(CONFIG_COMEDI_CB_PCIDAS) += cb_pcidas.o
52obj-$(CONFIG_COMEDI_PCI_DRIVERS) += comedi_parport.o 100obj-$(CONFIG_COMEDI_CB_PCIDDA) += cb_pcidda.o
53obj-$(CONFIG_COMEDI_PCI_DRIVERS) += comedi_test.o 101obj-$(CONFIG_COMEDI_CB_PCIDIO) += cb_pcidio.o
54obj-$(CONFIG_COMEDI_PCI_DRIVERS) += contec_pci_dio.o 102obj-$(CONFIG_COMEDI_CB_PCIMDAS) += cb_pcimdas.o
55obj-$(CONFIG_COMEDI_PCI_DRIVERS) += daqboard2000.o 103obj-$(CONFIG_COMEDI_CB_PCIMDDA) += cb_pcimdda.o
56obj-$(CONFIG_COMEDI_PCI_DRIVERS) += das08.o 104obj-$(CONFIG_COMEDI_ME4000) += me4000.o
57obj-$(CONFIG_COMEDI_PCI_DRIVERS) += das16m1.o 105obj-$(CONFIG_COMEDI_ME_DAQ) += me_daq.o
58obj-$(CONFIG_COMEDI_PCI_DRIVERS) += das16.o 106obj-$(CONFIG_COMEDI_NI_6527) += ni_6527.o
59obj-$(CONFIG_COMEDI_PCI_DRIVERS) += das1800.o 107obj-$(CONFIG_COMEDI_NI_65XX) += ni_65xx.o
60obj-$(CONFIG_COMEDI_PCI_DRIVERS) += das6402.o 108obj-$(CONFIG_COMEDI_NI_660X) += ni_660x.o
61obj-$(CONFIG_COMEDI_PCI_DRIVERS) += das800.o 109obj-$(CONFIG_COMEDI_NI_670X) += ni_670x.o
62obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dmm32at.o 110obj-$(CONFIG_COMEDI_NI_PCIDIO) += ni_pcidio.o
63obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dt2801.o 111obj-$(CONFIG_COMEDI_NI_PCIMIO) += ni_pcimio.o
64obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dt2811.o 112obj-$(CONFIG_COMEDI_RTD520) += rtd520.o
65obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dt2814.o 113obj-$(CONFIG_COMEDI_S526) += s526.o
66obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dt2815.o 114obj-$(CONFIG_COMEDI_S626) += s626.o
67obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dt2817.o 115obj-$(CONFIG_COMEDI_SSV_DNP) += ssv_dnp.o
68obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dt282x.o
69obj-$(CONFIG_COMEDI_PCI_DRIVERS) += dt3000.o
70obj-$(CONFIG_COMEDI_PCI_DRIVERS) += fl512.o
71obj-$(CONFIG_COMEDI_PCI_DRIVERS) += gsc_hpdi.o
72obj-$(CONFIG_COMEDI_PCI_DRIVERS) += icp_multi.o
73obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ii_pci20kc.o
74obj-$(CONFIG_COMEDI_PCI_DRIVERS) += jr3_pci.o
75obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ke_counter.o
76obj-$(CONFIG_COMEDI_PCI_DRIVERS) += me4000.o
77obj-$(CONFIG_COMEDI_PCI_DRIVERS) += me_daq.o
78obj-$(CONFIG_COMEDI_PCI_DRIVERS) += mite.o
79obj-$(CONFIG_COMEDI_PCI_DRIVERS) += mpc624.o
80obj-$(CONFIG_COMEDI_PCI_DRIVERS) += multiq3.o
81obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_6527.o
82obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_65xx.o
83obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_660x.o
84obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_670x.o
85obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_at_a2150.o
86obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_at_ao.o
87obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_atmio16d.o
88obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_atmio.o
89obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_labpc.o
90obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_pcidio.o
91obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_pcimio.o
92obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_tiocmd.o
93obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ni_tio.o
94obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl711.o
95obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl724.o
96obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl725.o
97obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl726.o
98obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl730.o
99obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl812.o
100obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl816.o
101obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcl818.o
102obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcm3724.o
103obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcm3730.o
104obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcmad.o
105obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcmda12.o
106obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcmmio.o
107obj-$(CONFIG_COMEDI_PCI_DRIVERS) += pcmuio.o
108obj-$(CONFIG_COMEDI_PCI_DRIVERS) += poc.o
109obj-$(CONFIG_COMEDI_PCI_DRIVERS) += rtd520.o
110obj-$(CONFIG_COMEDI_PCI_DRIVERS) += rti800.o
111obj-$(CONFIG_COMEDI_PCI_DRIVERS) += rti802.o
112obj-$(CONFIG_COMEDI_PCI_DRIVERS) += s526.o
113obj-$(CONFIG_COMEDI_PCI_DRIVERS) += s626.o
114obj-$(CONFIG_COMEDI_PCI_DRIVERS) += serial2002.o
115obj-$(CONFIG_COMEDI_PCI_DRIVERS) += skel.o
116obj-$(CONFIG_COMEDI_PCI_DRIVERS) += ssv_dnp.o
117obj-$(CONFIG_COMEDI_PCI_DRIVERS) += unioxx5.o
118 116
119# Comedi PCMCIA drivers 117# Comedi PCMCIA drivers
120obj-$(CONFIG_COMEDI_PCMCIA_DRIVERS) += cb_das16_cs.o 118obj-$(CONFIG_COMEDI_CB_DAS16_CS) += cb_das16_cs.o
121obj-$(CONFIG_COMEDI_PCMCIA_DRIVERS) += das08_cs.o 119obj-$(CONFIG_COMEDI_DAS08_CS) += das08_cs.o
122obj-$(CONFIG_COMEDI_PCMCIA_DRIVERS) += ni_daq_700.o 120obj-$(CONFIG_COMEDI_NI_DAQ_700_CS) += ni_daq_700.o
123obj-$(CONFIG_COMEDI_PCMCIA_DRIVERS) += ni_daq_dio24.o 121obj-$(CONFIG_COMEDI_NI_DAQ_DIO24_CS) += ni_daq_dio24.o
124obj-$(CONFIG_COMEDI_PCMCIA_DRIVERS) += ni_labpc_cs.o 122obj-$(CONFIG_COMEDI_NI_LABPC_CS) += ni_labpc_cs.o
125obj-$(CONFIG_COMEDI_PCMCIA_DRIVERS) += ni_mio_cs.o 123obj-$(CONFIG_COMEDI_NI_MIO_CS) += ni_mio_cs.o
126obj-$(CONFIG_COMEDI_PCMCIA_DRIVERS) += quatech_daqp_cs.o 124obj-$(CONFIG_COMEDI_QUATECH_DAQP_CS) += quatech_daqp_cs.o
127 125
128# Comedi USB drivers 126# Comedi USB drivers
129obj-$(CONFIG_COMEDI_USB_DRIVERS) += dt9812.o 127obj-$(CONFIG_COMEDI_DT9812) += dt9812.o
130obj-$(CONFIG_COMEDI_USB_DRIVERS) += usbdux.o 128obj-$(CONFIG_COMEDI_USBDUX) += usbdux.o
131obj-$(CONFIG_COMEDI_USB_DRIVERS) += usbduxfast.o 129obj-$(CONFIG_COMEDI_USBDUXFAST) += usbduxfast.o
132obj-$(CONFIG_COMEDI_USB_DRIVERS) += vmk80xx.o 130obj-$(CONFIG_COMEDI_VMK80XX) += vmk80xx.o
131
132# Comedi NI drivers
133obj-$(CONFIG_COMEDI_MITE) += mite.o
134obj-$(CONFIG_COMEDI_NI_TIO) += ni_tio.o
135obj-$(CONFIG_COMEDI_NI_TIO) += ni_tiocmd.o
136obj-$(CONFIG_COMEDI_NI_LABPC) += ni_labpc.o
133 137
138obj-$(CONFIG_COMEDI_FC) += comedi_fc.o
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h b/drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h
index f96b1289cdfc..c3284eb0f0ac 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h
+++ b/drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h
@@ -212,7 +212,7 @@ struct pcilst_struct {
212}; 212};
213 213
214/* ptr to root list of all amcc devices */ 214/* ptr to root list of all amcc devices */
215struct pcilst_struct *amcc_devices; 215static struct pcilst_struct *amcc_devices;
216 216
217static const int i_ADDIDATADeviceID[] = { 0x15B8, 0x10E8 }; 217static const int i_ADDIDATADeviceID[] = { 0x15B8, 0x10E8 };
218 218
@@ -260,12 +260,10 @@ void v_pci_card_list_init(unsigned short pci_vendor, char display)
260 for (i_Count = 0; i_Count < 2; i_Count++) { 260 for (i_Count = 0; i_Count < 2; i_Count++) {
261 pci_vendor = i_ADDIDATADeviceID[i_Count]; 261 pci_vendor = i_ADDIDATADeviceID[i_Count];
262 if (pcidev->vendor == pci_vendor) { 262 if (pcidev->vendor == pci_vendor) {
263 amcc = kmalloc(sizeof(*amcc), GFP_KERNEL); 263 amcc = kzalloc(sizeof(*amcc), GFP_KERNEL);
264 if (amcc == NULL) 264 if (amcc == NULL)
265 continue; 265 continue;
266 266
267 memset(amcc, 0, sizeof(*amcc));
268
269 amcc->pcidev = pcidev; 267 amcc->pcidev = pcidev;
270 if (last) 268 if (last)
271 last->next = amcc; 269 last->next = amcc;
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.c b/drivers/staging/comedi/drivers/addi-data/addi_common.c
index 6625fdc8e903..2c986413a81a 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_common.c
+++ b/drivers/staging/comedi/drivers/addi-data/addi_common.c
@@ -293,8 +293,8 @@ static const struct addi_board boardtypes[] = {
293 0, 293 0,
294 0, 294 0,
295 0, 295 0,
296 0, 296 NULL,
297 0, 297 NULL,
298 32, 298 32,
299 0, 299 0,
300 0, 300 0,
@@ -2527,7 +2527,7 @@ static const struct addi_board boardtypes[] = {
2527 2527
2528#define n_boardtypes (sizeof(boardtypes)/sizeof(struct addi_board)) 2528#define n_boardtypes (sizeof(boardtypes)/sizeof(struct addi_board))
2529 2529
2530struct comedi_driver driver_addi = { 2530static struct comedi_driver driver_addi = {
2531 .driver_name = "addi_common", 2531 .driver_name = "addi_common",
2532 .module = THIS_MODULE, 2532 .module = THIS_MODULE,
2533 .attach = i_ADDI_Attach, 2533 .attach = i_ADDI_Attach,
@@ -2639,9 +2639,8 @@ static int i_ADDI_Attach(struct comedi_device *dev, struct comedi_devconfig *it)
2639 devpriv->ps_BoardInfo = this_board; 2639 devpriv->ps_BoardInfo = this_board;
2640 devpriv->i_IobaseReserved = (int) io_addr[3]; 2640 devpriv->i_IobaseReserved = (int) io_addr[3];
2641 printk("\nioremap begin"); 2641 printk("\nioremap begin");
2642 devpriv->dw_AiBase = 2642 devpriv->dw_AiBase = ioremap(io_addr[3],
2643 (unsigned long) ioremap(io_addr[3], 2643 this_board->i_IorangeBase3);
2644 this_board->i_IorangeBase3);
2645 printk("\nioremap end"); 2644 printk("\nioremap end");
2646 } 2645 }
2647 2646
@@ -2952,7 +2951,7 @@ static int i_ADDI_Detach(struct comedi_device *dev)
2952 devpriv->ui_DmaBufferPages[1]); 2951 devpriv->ui_DmaBufferPages[1]);
2953 } 2952 }
2954 } else { 2953 } else {
2955 iounmap((void *)devpriv->dw_AiBase); 2954 iounmap(devpriv->dw_AiBase);
2956 2955
2957 if (devpriv->allocated) { 2956 if (devpriv->allocated) {
2958 i_pci_card_free(devpriv->amcc); 2957 i_pci_card_free(devpriv->amcc);
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.h b/drivers/staging/comedi/drivers/addi-data/addi_common.h
index caeb6fd2d9b1..1a2816920fff 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_common.h
+++ b/drivers/staging/comedi/drivers/addi-data/addi_common.h
@@ -351,7 +351,7 @@ struct addi_private {
351 int i_IobaseAmcc; /* base+size for AMCC chip */ 351 int i_IobaseAmcc; /* base+size for AMCC chip */
352 int i_IobaseAddon; /* addon base address */ 352 int i_IobaseAddon; /* addon base address */
353 int i_IobaseReserved; 353 int i_IobaseReserved;
354 unsigned long dw_AiBase; 354 void __iomem *dw_AiBase;
355 struct pcilst_struct *amcc; /* ptr too AMCC data */ 355 struct pcilst_struct *amcc; /* ptr too AMCC data */
356 unsigned char allocated; /* we have blocked card */ 356 unsigned char allocated; /* we have blocked card */
357 unsigned char b_ValidDriver; /* driver is ok */ 357 unsigned char b_ValidDriver; /* driver is ok */
diff --git a/drivers/staging/comedi/drivers/addi-data/amcc_s5933_58.h b/drivers/staging/comedi/drivers/addi-data/amcc_s5933_58.h
index 49141b3558e1..349e93c23e91 100644
--- a/drivers/staging/comedi/drivers/addi-data/amcc_s5933_58.h
+++ b/drivers/staging/comedi/drivers/addi-data/amcc_s5933_58.h
@@ -253,12 +253,10 @@ void v_pci_card_list_init(unsigned short pci_vendor, char display)
253 253
254 pci_for_each_dev(pcidev) { 254 pci_for_each_dev(pcidev) {
255 if (pcidev->vendor == pci_vendor) { 255 if (pcidev->vendor == pci_vendor) {
256 amcc = kmalloc(sizeof(*amcc), GFP_KERNEL); 256 amcc = kzalloc(sizeof(*amcc), GFP_KERNEL);
257 if (amcc == NULL) 257 if (amcc == NULL)
258 continue; 258 continue;
259 259
260 memset(amcc, 0, sizeof(*amcc));
261
262 amcc->pcidev = pcidev; 260 amcc->pcidev = pcidev;
263 if (last) { 261 if (last) {
264 last->next = amcc; 262 last->next = amcc;
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c
index 791297266fc0..1369e22b7ee6 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.c
@@ -52,9 +52,9 @@ You should also find the complete GPL in the COPYING file accompanying this sour
52+----------------------------------------------------------------------------+ 52+----------------------------------------------------------------------------+
53*/ 53*/
54#include "hwdrv_apci035.h" 54#include "hwdrv_apci035.h"
55int i_WatchdogNbr = 0; 55static int i_WatchdogNbr = 0;
56int i_Temp = 0; 56static int i_Temp = 0;
57int i_Flag = 1; 57static int i_Flag = 1;
58/* 58/*
59+----------------------------------------------------------------------------+ 59+----------------------------------------------------------------------------+
60| Function Name : int i_APCI035_ConfigTimerWatchdog | 60| Function Name : int i_APCI035_ConfigTimerWatchdog |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h
index e0023c8cb628..68db9c10c99e 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci035.h
@@ -19,22 +19,8 @@
19#define APCI035_BOARD_VENDOR_ID 0x15B8 19#define APCI035_BOARD_VENDOR_ID 0x15B8
20#define APCI035_ADDRESS_RANGE 255 20#define APCI035_ADDRESS_RANGE 255
21 21
22int i_TW_Number;
23struct {
24 int i_Gain;
25 int i_Polarity;
26 int i_OffsetRange;
27 int i_Coupling;
28 int i_SingleDiff;
29 int i_AutoCalibration;
30 unsigned int ui_ReloadValue;
31 unsigned int ui_TimeUnitReloadVal;
32 int i_Interrupt;
33 int i_ModuleSelection;
34} Config_Parameters_Main;
35
36/* ANALOG INPUT RANGE */ 22/* ANALOG INPUT RANGE */
37struct comedi_lrange range_apci035_ai = { 8, { 23static struct comedi_lrange range_apci035_ai = { 8, {
38 BIP_RANGE(10), 24 BIP_RANGE(10),
39 BIP_RANGE(5), 25 BIP_RANGE(5),
40 BIP_RANGE(2), 26 BIP_RANGE(2),
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c
index fe06789699f3..faea003e16c7 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1032.c
@@ -53,8 +53,8 @@ You should also find the complete GPL in the COPYING file accompanying this sour
53*/ 53*/
54#include "hwdrv_apci1032.h" 54#include "hwdrv_apci1032.h"
55#include <linux/delay.h> 55#include <linux/delay.h>
56/* Global variables */ 56
57unsigned int ui_InterruptStatus; 57static unsigned int ui_InterruptStatus;
58 58
59/* 59/*
60+----------------------------------------------------------------------------+ 60+----------------------------------------------------------------------------+
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c
index d5e06ad6acc2..b3b921853e60 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c
@@ -47,16 +47,16 @@ You should also find the complete GPL in the COPYING file accompanying this sour
47*/ 47*/
48#include "hwdrv_apci1500.h" 48#include "hwdrv_apci1500.h"
49 49
50int i_TimerCounter1Init = 0; 50static int i_TimerCounter1Init = 0;
51int i_TimerCounter2Init = 0; 51static int i_TimerCounter2Init = 0;
52int i_WatchdogCounter3Init = 0; 52static int i_WatchdogCounter3Init = 0;
53int i_Event1Status = 0, i_Event2Status = 0; 53static int i_Event1Status = 0, i_Event2Status = 0;
54int i_TimerCounterWatchdogInterrupt = 0; 54static int i_TimerCounterWatchdogInterrupt = 0;
55int i_Logic = 0, i_CounterLogic = 0; 55static int i_Logic = 0, i_CounterLogic = 0;
56int i_InterruptMask = 0; 56static int i_InterruptMask = 0;
57int i_InputChannel = 0; 57static int i_InputChannel = 0;
58int i_TimerCounter1Enabled = 0, i_TimerCounter2Enabled = 58static int i_TimerCounter1Enabled = 0, i_TimerCounter2Enabled = 0,
59 0, i_WatchdogCounter3Enabled = 0; 59 i_WatchdogCounter3Enabled = 0;
60 60
61/* 61/*
62 +----------------------------------------------------------------------------+ 62 +----------------------------------------------------------------------------+
@@ -136,9 +136,10 @@ int i_TimerCounter1Enabled = 0, i_TimerCounter2Enabled =
136| | 136| |
137+----------------------------------------------------------------------------+ 137+----------------------------------------------------------------------------+
138*/ 138*/
139 139static int i_APCI1500_ConfigDigitalInputEvent(struct comedi_device *dev,
140int i_APCI1500_ConfigDigitalInputEvent(struct comedi_device *dev, 140 struct comedi_subdevice *s,
141 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 141 struct comedi_insn *insn,
142 unsigned int *data)
142{ 143{
143 int i_PatternPolarity = 0, i_PatternTransition = 0, i_PatternMask = 0; 144 int i_PatternPolarity = 0, i_PatternTransition = 0, i_PatternMask = 0;
144 int i_MaxChannel = 0, i_Count = 0, i_EventMask = 0; 145 int i_MaxChannel = 0, i_Count = 0, i_EventMask = 0;
@@ -519,8 +520,10 @@ int i_APCI1500_ConfigDigitalInputEvent(struct comedi_device *dev,
519| | 520| |
520+----------------------------------------------------------------------------+ 521+----------------------------------------------------------------------------+
521*/ 522*/
522int i_APCI1500_StartStopInputEvent(struct comedi_device *dev, struct comedi_subdevice *s, 523static int i_APCI1500_StartStopInputEvent(struct comedi_device *dev,
523 struct comedi_insn *insn, unsigned int *data) 524 struct comedi_subdevice *s,
525 struct comedi_insn *insn,
526 unsigned int *data)
524{ 527{
525 int i_Event1InterruptStatus = 0, i_Event2InterruptStatus = 528 int i_Event1InterruptStatus = 0, i_Event2InterruptStatus =
526 0, i_RegValue; 529 0, i_RegValue;
@@ -784,8 +787,10 @@ int i_APCI1500_StartStopInputEvent(struct comedi_device *dev, struct comedi_subd
784| | 787| |
785+----------------------------------------------------------------------------+ 788+----------------------------------------------------------------------------+
786*/ 789*/
787int i_APCI1500_Initialisation(struct comedi_device *dev, struct comedi_subdevice *s, 790static int i_APCI1500_Initialisation(struct comedi_device *dev,
788 struct comedi_insn *insn, unsigned int *data) 791 struct comedi_subdevice *s,
792 struct comedi_insn *insn,
793 unsigned int *data)
789{ 794{
790 int i_DummyRead = 0; 795 int i_DummyRead = 0;
791 /******************/ 796 /******************/
@@ -956,9 +961,10 @@ int i_APCI1500_Initialisation(struct comedi_device *dev, struct comedi_subdevice
956| | 961| |
957+----------------------------------------------------------------------------+ 962+----------------------------------------------------------------------------+
958*/ 963*/
959 964static int i_APCI1500_ReadMoreDigitalInput(struct comedi_device *dev,
960int i_APCI1500_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s, 965 struct comedi_subdevice *s,
961 struct comedi_insn *insn, unsigned int *data) 966 struct comedi_insn *insn,
967 unsigned int *data)
962{ 968{
963 unsigned int ui_PortValue = data[1]; 969 unsigned int ui_PortValue = data[1];
964 unsigned int ui_Mask = 0; 970 unsigned int ui_Mask = 0;
@@ -1040,8 +1046,10 @@ int i_APCI1500_ReadMoreDigitalInput(struct comedi_device *dev, struct comedi_sub
1040| | 1046| |
1041+----------------------------------------------------------------------------+ 1047+----------------------------------------------------------------------------+
1042*/ 1048*/
1043int i_APCI1500_ConfigDigitalOutputErrorInterrupt(struct comedi_device *dev, 1049static int i_APCI1500_ConfigDigitalOutputErrorInterrupt(struct comedi_device *dev,
1044 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1050 struct comedi_subdevice *s,
1051 struct comedi_insn *insn,
1052 unsigned int *data)
1045{ 1053{
1046 devpriv->b_OutputMemoryStatus = data[0]; 1054 devpriv->b_OutputMemoryStatus = data[0];
1047 return insn->n; 1055 return insn->n;
@@ -1066,9 +1074,10 @@ int i_APCI1500_ConfigDigitalOutputErrorInterrupt(struct comedi_device *dev,
1066| | 1074| |
1067+----------------------------------------------------------------------------+ 1075+----------------------------------------------------------------------------+
1068*/ 1076*/
1069 1077static int i_APCI1500_WriteDigitalOutput(struct comedi_device *dev,
1070int i_APCI1500_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s, 1078 struct comedi_subdevice *s,
1071 struct comedi_insn *insn, unsigned int *data) 1079 struct comedi_insn *insn,
1080 unsigned int *data)
1072{ 1081{
1073 static unsigned int ui_Temp = 0; 1082 static unsigned int ui_Temp = 0;
1074 unsigned int ui_Temp1; 1083 unsigned int ui_Temp1;
@@ -1260,9 +1269,10 @@ int i_APCI1500_WriteDigitalOutput(struct comedi_device *dev, struct comedi_subde
1260| | 1269| |
1261+----------------------------------------------------------------------------+ 1270+----------------------------------------------------------------------------+
1262*/ 1271*/
1263 1272static int i_APCI1500_ConfigCounterTimerWatchdog(struct comedi_device *dev,
1264int i_APCI1500_ConfigCounterTimerWatchdog(struct comedi_device *dev, 1273 struct comedi_subdevice *s,
1265 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1274 struct comedi_insn *insn,
1275 unsigned int *data)
1266{ 1276{
1267 int i_TimerCounterMode, i_MasterConfiguration; 1277 int i_TimerCounterMode, i_MasterConfiguration;
1268 1278
@@ -1860,8 +1870,10 @@ int i_APCI1500_ConfigCounterTimerWatchdog(struct comedi_device *dev,
1860| | 1870| |
1861+----------------------------------------------------------------------------+ 1871+----------------------------------------------------------------------------+
1862*/ 1872*/
1863int i_APCI1500_StartStopTriggerTimerCounterWatchdog(struct comedi_device *dev, 1873static int i_APCI1500_StartStopTriggerTimerCounterWatchdog(struct comedi_device *dev,
1864 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1874 struct comedi_subdevice *s,
1875 struct comedi_insn *insn,
1876 unsigned int *data)
1865{ 1877{
1866 int i_CommandAndStatusValue; 1878 int i_CommandAndStatusValue;
1867 1879
@@ -2181,9 +2193,10 @@ int i_APCI1500_StartStopTriggerTimerCounterWatchdog(struct comedi_device *dev,
2181| | 2193| |
2182+----------------------------------------------------------------------------+ 2194+----------------------------------------------------------------------------+
2183*/ 2195*/
2184 2196static int i_APCI1500_ReadCounterTimerWatchdog(struct comedi_device *dev,
2185int i_APCI1500_ReadCounterTimerWatchdog(struct comedi_device *dev, 2197 struct comedi_subdevice *s,
2186 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 2198 struct comedi_insn *insn,
2199 unsigned int *data)
2187{ 2200{
2188 int i_CommandAndStatusValue; 2201 int i_CommandAndStatusValue;
2189 switch (data[0]) { 2202 switch (data[0]) {
@@ -2370,8 +2383,10 @@ int i_APCI1500_ReadCounterTimerWatchdog(struct comedi_device *dev,
2370| | 2383| |
2371+----------------------------------------------------------------------------+ 2384+----------------------------------------------------------------------------+
2372*/ 2385*/
2373int i_APCI1500_ReadInterruptMask(struct comedi_device *dev, struct comedi_subdevice *s, 2386static int i_APCI1500_ReadInterruptMask(struct comedi_device *dev,
2374 struct comedi_insn *insn, unsigned int *data) 2387 struct comedi_subdevice *s,
2388 struct comedi_insn *insn,
2389 unsigned int *data)
2375{ 2390{
2376 data[0] = i_InterruptMask; 2391 data[0] = i_InterruptMask;
2377 data[1] = i_InputChannel; 2392 data[1] = i_InputChannel;
@@ -2401,8 +2416,10 @@ int i_APCI1500_ReadInterruptMask(struct comedi_device *dev, struct comedi_subdev
2401| | 2416| |
2402+----------------------------------------------------------------------------+ 2417+----------------------------------------------------------------------------+
2403*/ 2418*/
2404int i_APCI1500_ConfigureInterrupt(struct comedi_device *dev, struct comedi_subdevice *s, 2419static int i_APCI1500_ConfigureInterrupt(struct comedi_device *dev,
2405 struct comedi_insn *insn, unsigned int *data) 2420 struct comedi_subdevice *s,
2421 struct comedi_insn *insn,
2422 unsigned int *data)
2406{ 2423{
2407 unsigned int ui_Status; 2424 unsigned int ui_Status;
2408 int i_RegValue; 2425 int i_RegValue;
@@ -2821,8 +2838,7 @@ static void v_APCI1500_Interrupt(int irq, void *d)
2821| | 2838| |
2822+----------------------------------------------------------------------------+ 2839+----------------------------------------------------------------------------+
2823*/ 2840*/
2824 2841static int i_APCI1500_Reset(struct comedi_device *dev)
2825int i_APCI1500_Reset(struct comedi_device *dev)
2826{ 2842{
2827 int i_DummyRead = 0; 2843 int i_DummyRead = 0;
2828 i_TimerCounter1Init = 0; 2844 i_TimerCounter1Init = 0;
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
index 4413279c880b..4299ff5214dd 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
@@ -56,8 +56,8 @@ You should also find the complete GPL in the COPYING file accompanying this sour
56#include "hwdrv_apci1564.h" 56#include "hwdrv_apci1564.h"
57 57
58/* Global variables */ 58/* Global variables */
59unsigned int ui_InterruptStatus_1564 = 0; 59static unsigned int ui_InterruptStatus_1564 = 0;
60unsigned int ui_InterruptData, ui_Type; 60static unsigned int ui_InterruptData, ui_Type;
61 61
62/* 62/*
63+----------------------------------------------------------------------------+ 63+----------------------------------------------------------------------------+
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c
index 2d325163c169..d7d22236778d 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci2032.c
@@ -53,7 +53,7 @@ You should also find the complete GPL in the COPYING file accompanying this sour
53*/ 53*/
54 54
55#include "hwdrv_apci2032.h" 55#include "hwdrv_apci2032.h"
56unsigned int ui_InterruptData, ui_Type; 56static unsigned int ui_InterruptData, ui_Type;
57/* 57/*
58+----------------------------------------------------------------------------+ 58+----------------------------------------------------------------------------+
59| Function Name : int i_APCI2032_ConfigDigitalOutput | 59| Function Name : int i_APCI2032_ConfigDigitalOutput |
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h
index c456d75674b8..743523e804a9 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3501.h
@@ -32,7 +32,7 @@
32#define MODE0 0 32#define MODE0 0
33#define MODE1 1 33#define MODE1 1
34/* ANALOG OUTPUT RANGE */ 34/* ANALOG OUTPUT RANGE */
35struct comedi_lrange range_apci3501_ao = { 2, { 35static struct comedi_lrange range_apci3501_ao = { 2, {
36 BIP_RANGE(10), 36 BIP_RANGE(10),
37 UNI_RANGE(10) 37 UNI_RANGE(10)
38 } 38 }
diff --git a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c
index 3692326d474a..2e20bc7cdcdb 100644
--- a/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c
+++ b/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3xxx.c
@@ -67,10 +67,9 @@ You should also find the complete GPL in the COPYING file accompanying this sour
67| 1 : Conversion started | 67| 1 : Conversion started |
68+----------------------------------------------------------------------------+ 68+----------------------------------------------------------------------------+
69*/ 69*/
70 70static int i_APCI3XXX_TestConversionStarted(struct comedi_device *dev)
71int i_APCI3XXX_TestConversionStarted(struct comedi_device *dev)
72{ 71{
73 if ((readl((void *)(devpriv->dw_AiBase + 8)) & 0x80000UL) == 0x80000UL) 72 if ((readl(devpriv->dw_AiBase + 8) & 0x80000UL) == 0x80000UL)
74 return 1; 73 return 1;
75 else 74 else
76 return 0; 75 return 0;
@@ -104,9 +103,10 @@ int i_APCI3XXX_TestConversionStarted(struct comedi_device *dev)
104| -101 : Data size error | 103| -101 : Data size error |
105+----------------------------------------------------------------------------+ 104+----------------------------------------------------------------------------+
106*/ 105*/
107 106static int i_APCI3XXX_AnalogInputConfigOperatingMode(struct comedi_device *dev,
108int i_APCI3XXX_AnalogInputConfigOperatingMode(struct comedi_device *dev, 107 struct comedi_subdevice *s,
109 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 108 struct comedi_insn *insn,
109 unsigned int *data)
110{ 110{
111 int i_ReturnValue = insn->n; 111 int i_ReturnValue = insn->n;
112 unsigned char b_TimeBase = 0; 112 unsigned char b_TimeBase = 0;
@@ -204,19 +204,14 @@ int i_APCI3XXX_AnalogInputConfigOperatingMode(struct comedi_device *dev,
204 /* Set the convert timing unit */ 204 /* Set the convert timing unit */
205 /*******************************/ 205 /*******************************/
206 206
207 writel((unsigned int) 207 writel((unsigned int)b_TimeBase,
208 b_TimeBase, 208 devpriv->dw_AiBase + 36);
209 (void *)
210 (devpriv->
211 dw_AiBase
212 +
213 36));
214 209
215 /**************************/ 210 /**************************/
216 /* Set the convert timing */ 211 /* Set the convert timing */
217 /*************************/ 212 /*************************/
218 213
219 writel(dw_ReloadValue, (void *)(devpriv->dw_AiBase + 32)); 214 writel(dw_ReloadValue, devpriv->dw_AiBase + 32);
220 } else { 215 } else {
221 /**************************/ 216 /**************************/
222 /* Any conversion started */ 217 /* Any conversion started */
@@ -294,9 +289,10 @@ int i_APCI3XXX_AnalogInputConfigOperatingMode(struct comedi_device *dev,
294| -101 : Data size error | 289| -101 : Data size error |
295+----------------------------------------------------------------------------+ 290+----------------------------------------------------------------------------+
296*/ 291*/
297 292static int i_APCI3XXX_InsnConfigAnalogInput(struct comedi_device *dev,
298int i_APCI3XXX_InsnConfigAnalogInput(struct comedi_device *dev, 293 struct comedi_subdevice *s,
299 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 294 struct comedi_insn *insn,
295 unsigned int *data)
300{ 296{
301 int i_ReturnValue = insn->n; 297 int i_ReturnValue = insn->n;
302 298
@@ -354,9 +350,10 @@ int i_APCI3XXX_InsnConfigAnalogInput(struct comedi_device *dev,
354| -101 : Data size error | 350| -101 : Data size error |
355+----------------------------------------------------------------------------+ 351+----------------------------------------------------------------------------+
356*/ 352*/
357 353static int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev,
358int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev, 354 struct comedi_subdevice *s,
359 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 355 struct comedi_insn *insn,
356 unsigned int *data)
360{ 357{
361 int i_ReturnValue = insn->n; 358 int i_ReturnValue = insn->n;
362 unsigned char b_Configuration = (unsigned char) CR_RANGE(insn->chanspec); 359 unsigned char b_Configuration = (unsigned char) CR_RANGE(insn->chanspec);
@@ -422,26 +419,20 @@ int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev,
422 /* Clear the FIFO */ 419 /* Clear the FIFO */
423 /******************/ 420 /******************/
424 421
425 writel(0x10000UL, 422 writel(0x10000UL, devpriv->dw_AiBase + 12);
426 (void *)(devpriv->dw_AiBase +
427 12));
428 423
429 /*******************************/ 424 /*******************************/
430 /* Get and save the delay mode */ 425 /* Get and save the delay mode */
431 /*******************************/ 426 /*******************************/
432 427
433 dw_Temp = 428 dw_Temp = readl(devpriv->dw_AiBase + 4);
434 readl((void *)(devpriv->
435 dw_AiBase + 4));
436 dw_Temp = dw_Temp & 0xFFFFFEF0UL; 429 dw_Temp = dw_Temp & 0xFFFFFEF0UL;
437 430
438 /***********************************/ 431 /***********************************/
439 /* Channel configuration selection */ 432 /* Channel configuration selection */
440 /***********************************/ 433 /***********************************/
441 434
442 writel(dw_Temp, 435 writel(dw_Temp, devpriv->dw_AiBase + 4);
443 (void *)(devpriv->dw_AiBase +
444 4));
445 436
446 /**************************/ 437 /**************************/
447 /* Make the configuration */ 438 /* Make the configuration */
@@ -458,35 +449,28 @@ int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev,
458 /***************************/ 449 /***************************/
459 450
460 writel(dw_Configuration, 451 writel(dw_Configuration,
461 (void *)(devpriv->dw_AiBase + 452 devpriv->dw_AiBase + 0);
462 0));
463 453
464 /*********************/ 454 /*********************/
465 /* Channel selection */ 455 /* Channel selection */
466 /*********************/ 456 /*********************/
467 457
468 writel(dw_Temp | 0x100UL, 458 writel(dw_Temp | 0x100UL,
469 (void *)(devpriv->dw_AiBase + 459 devpriv->dw_AiBase + 4);
470 4));
471 writel((unsigned int) b_Channel, 460 writel((unsigned int) b_Channel,
472 (void *)(devpriv->dw_AiBase + 461 devpriv->dw_AiBase + 0);
473 0));
474 462
475 /***********************/ 463 /***********************/
476 /* Restaure delay mode */ 464 /* Restaure delay mode */
477 /***********************/ 465 /***********************/
478 466
479 writel(dw_Temp, 467 writel(dw_Temp, devpriv->dw_AiBase + 4);
480 (void *)(devpriv->dw_AiBase +
481 4));
482 468
483 /***********************************/ 469 /***********************************/
484 /* Set the number of sequence to 1 */ 470 /* Set the number of sequence to 1 */
485 /***********************************/ 471 /***********************************/
486 472
487 writel(1, 473 writel(1, devpriv->dw_AiBase + 48);
488 (void *)(devpriv->dw_AiBase +
489 48));
490 474
491 /***************************/ 475 /***************************/
492 /* Save the interrupt flag */ 476 /* Save the interrupt flag */
@@ -514,50 +498,29 @@ int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev,
514 /* Start the conversion */ 498 /* Start the conversion */
515 /************************/ 499 /************************/
516 500
517 writel(0x80000UL, 501 writel(0x80000UL, devpriv->dw_AiBase + 8);
518 (void *)
519 (devpriv->
520 dw_AiBase
521 + 8));
522 502
523 /****************/ 503 /****************/
524 /* Wait the EOS */ 504 /* Wait the EOS */
525 /****************/ 505 /****************/
526 506
527 do { 507 do {
528 dw_Temp = 508 dw_Temp = readl(devpriv->dw_AiBase + 20);
529 readl( 509 dw_Temp = dw_Temp & 1;
530 (void *)
531 (devpriv->
532 dw_AiBase
533 +
534 20));
535 dw_Temp =
536 dw_Temp
537 & 1;
538 } while (dw_Temp != 1); 510 } while (dw_Temp != 1);
539 511
540 /*************************/ 512 /*************************/
541 /* Read the analog value */ 513 /* Read the analog value */
542 /*************************/ 514 /*************************/
543 515
544 data[dw_AcquisitionCpt] 516 data[dw_AcquisitionCpt] = (unsigned int)readl(devpriv->dw_AiBase + 28);
545 =
546 (unsigned int)
547 readl((void
548 *)
549 (devpriv->
550 dw_AiBase
551 + 28));
552 } 517 }
553 } else { 518 } else {
554 /************************/ 519 /************************/
555 /* Start the conversion */ 520 /* Start the conversion */
556 /************************/ 521 /************************/
557 522
558 writel(0x180000UL, 523 writel(0x180000UL, devpriv->dw_AiBase + 8);
559 (void *)(devpriv->
560 dw_AiBase + 8));
561 } 524 }
562 } else { 525 } else {
563 /**************************/ 526 /**************************/
@@ -603,7 +566,7 @@ int i_APCI3XXX_InsnReadAnalogInput(struct comedi_device *dev,
603+----------------------------------------------------------------------------+ 566+----------------------------------------------------------------------------+
604*/ 567*/
605 568
606void v_APCI3XXX_Interrupt(int irq, void *d) 569static void v_APCI3XXX_Interrupt(int irq, void *d)
607{ 570{
608 struct comedi_device *dev = d; 571 struct comedi_device *dev = d;
609 unsigned char b_CopyCpt = 0; 572 unsigned char b_CopyCpt = 0;
@@ -613,13 +576,13 @@ void v_APCI3XXX_Interrupt(int irq, void *d)
613 /* Test if interrupt occur */ 576 /* Test if interrupt occur */
614 /***************************/ 577 /***************************/
615 578
616 dw_Status = readl((void *)(devpriv->dw_AiBase + 16)); 579 dw_Status = readl(devpriv->dw_AiBase + 16);
617 if ( (dw_Status & 0x2UL) == 0x2UL) { 580 if ( (dw_Status & 0x2UL) == 0x2UL) {
618 /***********************/ 581 /***********************/
619 /* Reset the interrupt */ 582 /* Reset the interrupt */
620 /***********************/ 583 /***********************/
621 584
622 writel(dw_Status, (void *)(devpriv->dw_AiBase + 16)); 585 writel(dw_Status, devpriv->dw_AiBase + 16);
623 586
624 /*****************************/ 587 /*****************************/
625 /* Test if interrupt enabled */ 588 /* Test if interrupt enabled */
@@ -634,8 +597,7 @@ void v_APCI3XXX_Interrupt(int irq, void *d)
634 b_CopyCpt < devpriv->ui_AiNbrofChannels; 597 b_CopyCpt < devpriv->ui_AiNbrofChannels;
635 b_CopyCpt++) { 598 b_CopyCpt++) {
636 devpriv->ui_AiReadData[b_CopyCpt] = 599 devpriv->ui_AiReadData[b_CopyCpt] =
637 (unsigned int) readl((void *)(devpriv-> 600 (unsigned int)readl(devpriv->dw_AiBase + 28);
638 dw_AiBase + 28));
639 } 601 }
640 602
641 /**************************/ 603 /**************************/
@@ -682,9 +644,10 @@ void v_APCI3XXX_Interrupt(int irq, void *d)
682| -101 : Data size error | 644| -101 : Data size error |
683+----------------------------------------------------------------------------+ 645+----------------------------------------------------------------------------+
684*/ 646*/
685 647static int i_APCI3XXX_InsnWriteAnalogOutput(struct comedi_device *dev,
686int i_APCI3XXX_InsnWriteAnalogOutput(struct comedi_device *dev, 648 struct comedi_subdevice *s,
687 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 649 struct comedi_insn *insn,
650 unsigned int *data)
688{ 651{
689 unsigned char b_Range = (unsigned char) CR_RANGE(insn->chanspec); 652 unsigned char b_Range = (unsigned char) CR_RANGE(insn->chanspec);
690 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 653 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
@@ -710,24 +673,21 @@ int i_APCI3XXX_InsnWriteAnalogOutput(struct comedi_device *dev,
710 /* Set the range selection */ 673 /* Set the range selection */
711 /***************************/ 674 /***************************/
712 675
713 writel(b_Range, 676 writel(b_Range, devpriv->dw_AiBase + 96);
714 (void *)(devpriv->dw_AiBase + 96));
715 677
716 /**************************************************/ 678 /**************************************************/
717 /* Write the analog value to the selected channel */ 679 /* Write the analog value to the selected channel */
718 /**************************************************/ 680 /**************************************************/
719 681
720 writel((data[0] << 8) | b_Channel, 682 writel((data[0] << 8) | b_Channel,
721 (void *)(devpriv->dw_AiBase + 100)); 683 devpriv->dw_AiBase + 100);
722 684
723 /****************************/ 685 /****************************/
724 /* Wait the end of transfer */ 686 /* Wait the end of transfer */
725 /****************************/ 687 /****************************/
726 688
727 do { 689 do {
728 dw_Status = 690 dw_Status = readl(devpriv->dw_AiBase + 96);
729 readl((void *)(devpriv->
730 dw_AiBase + 96));
731 } while ((dw_Status & 0x100) != 0x100); 691 } while ((dw_Status & 0x100) != 0x100);
732 } else { 692 } else {
733 /***************************/ 693 /***************************/
@@ -788,9 +748,10 @@ int i_APCI3XXX_InsnWriteAnalogOutput(struct comedi_device *dev,
788| -101 : Data size error | 748| -101 : Data size error |
789+----------------------------------------------------------------------------+ 749+----------------------------------------------------------------------------+
790*/ 750*/
791 751static int i_APCI3XXX_InsnConfigInitTTLIO(struct comedi_device *dev,
792int i_APCI3XXX_InsnConfigInitTTLIO(struct comedi_device *dev, 752 struct comedi_subdevice *s,
793 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 753 struct comedi_insn *insn,
754 unsigned int *data)
794{ 755{
795 int i_ReturnValue = insn->n; 756 int i_ReturnValue = insn->n;
796 unsigned char b_Command = 0; 757 unsigned char b_Command = 0;
@@ -916,9 +877,10 @@ int i_APCI3XXX_InsnConfigInitTTLIO(struct comedi_device *dev,
916| -101 : Data size error | 877| -101 : Data size error |
917+----------------------------------------------------------------------------+ 878+----------------------------------------------------------------------------+
918*/ 879*/
919 880static int i_APCI3XXX_InsnBitsTTLIO(struct comedi_device *dev,
920int i_APCI3XXX_InsnBitsTTLIO(struct comedi_device *dev, 881 struct comedi_subdevice *s,
921 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 882 struct comedi_insn *insn,
883 unsigned int *data)
922{ 884{
923 int i_ReturnValue = insn->n; 885 int i_ReturnValue = insn->n;
924 unsigned char b_ChannelCpt = 0; 886 unsigned char b_ChannelCpt = 0;
@@ -1071,9 +1033,10 @@ int i_APCI3XXX_InsnBitsTTLIO(struct comedi_device *dev,
1071| -101 : Data size error | 1033| -101 : Data size error |
1072+----------------------------------------------------------------------------+ 1034+----------------------------------------------------------------------------+
1073*/ 1035*/
1074 1036static int i_APCI3XXX_InsnReadTTLIO(struct comedi_device *dev,
1075int i_APCI3XXX_InsnReadTTLIO(struct comedi_device *dev, 1037 struct comedi_subdevice *s,
1076 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1038 struct comedi_insn *insn,
1039 unsigned int *data)
1077{ 1040{
1078 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 1041 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
1079 int i_ReturnValue = insn->n; 1042 int i_ReturnValue = insn->n;
@@ -1184,9 +1147,10 @@ int i_APCI3XXX_InsnReadTTLIO(struct comedi_device *dev,
1184| -101 : Data size error | 1147| -101 : Data size error |
1185+----------------------------------------------------------------------------+ 1148+----------------------------------------------------------------------------+
1186*/ 1149*/
1187 1150static int i_APCI3XXX_InsnWriteTTLIO(struct comedi_device *dev,
1188int i_APCI3XXX_InsnWriteTTLIO(struct comedi_device *dev, 1151 struct comedi_subdevice *s,
1189 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1152 struct comedi_insn *insn,
1153 unsigned int *data)
1190{ 1154{
1191 int i_ReturnValue = insn->n; 1155 int i_ReturnValue = insn->n;
1192 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 1156 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
@@ -1296,8 +1260,10 @@ int i_APCI3XXX_InsnWriteTTLIO(struct comedi_device *dev,
1296+----------------------------------------------------------------------------+ 1260+----------------------------------------------------------------------------+
1297*/ 1261*/
1298 1262
1299int i_APCI3XXX_InsnReadDigitalInput(struct comedi_device *dev, 1263static int i_APCI3XXX_InsnReadDigitalInput(struct comedi_device *dev,
1300 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1264 struct comedi_subdevice *s,
1265 struct comedi_insn *insn,
1266 unsigned int *data)
1301{ 1267{
1302 int i_ReturnValue = insn->n; 1268 int i_ReturnValue = insn->n;
1303 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec); 1269 unsigned char b_Channel = (unsigned char) CR_CHAN(insn->chanspec);
@@ -1354,8 +1320,10 @@ int i_APCI3XXX_InsnReadDigitalInput(struct comedi_device *dev,
1354| -101 : Data size error | 1320| -101 : Data size error |
1355+----------------------------------------------------------------------------+ 1321+----------------------------------------------------------------------------+
1356*/ 1322*/
1357int i_APCI3XXX_InsnBitsDigitalInput(struct comedi_device *dev, 1323static int i_APCI3XXX_InsnBitsDigitalInput(struct comedi_device *dev,
1358 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1324 struct comedi_subdevice *s,
1325 struct comedi_insn *insn,
1326 unsigned int *data)
1359{ 1327{
1360 int i_ReturnValue = insn->n; 1328 int i_ReturnValue = insn->n;
1361 unsigned int dw_Temp = 0; 1329 unsigned int dw_Temp = 0;
@@ -1407,8 +1375,10 @@ int i_APCI3XXX_InsnBitsDigitalInput(struct comedi_device *dev,
1407| -101 : Data size error | 1375| -101 : Data size error |
1408+----------------------------------------------------------------------------+ 1376+----------------------------------------------------------------------------+
1409*/ 1377*/
1410int i_APCI3XXX_InsnBitsDigitalOutput(struct comedi_device *dev, 1378static int i_APCI3XXX_InsnBitsDigitalOutput(struct comedi_device *dev,
1411 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1379 struct comedi_subdevice *s,
1380 struct comedi_insn *insn,
1381 unsigned int *data)
1412{ 1382{
1413 int i_ReturnValue = insn->n; 1383 int i_ReturnValue = insn->n;
1414 unsigned char b_ChannelCpt = 0; 1384 unsigned char b_ChannelCpt = 0;
@@ -1503,8 +1473,10 @@ int i_APCI3XXX_InsnBitsDigitalOutput(struct comedi_device *dev,
1503+----------------------------------------------------------------------------+ 1473+----------------------------------------------------------------------------+
1504*/ 1474*/
1505 1475
1506int i_APCI3XXX_InsnWriteDigitalOutput(struct comedi_device *dev, 1476static int i_APCI3XXX_InsnWriteDigitalOutput(struct comedi_device *dev,
1507 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1477 struct comedi_subdevice *s,
1478 struct comedi_insn *insn,
1479 unsigned int *data)
1508{ 1480{
1509 int i_ReturnValue = insn->n; 1481 int i_ReturnValue = insn->n;
1510 unsigned char b_Channel = CR_CHAN(insn->chanspec); 1482 unsigned char b_Channel = CR_CHAN(insn->chanspec);
@@ -1578,8 +1550,10 @@ int i_APCI3XXX_InsnWriteDigitalOutput(struct comedi_device *dev,
1578+----------------------------------------------------------------------------+ 1550+----------------------------------------------------------------------------+
1579*/ 1551*/
1580 1552
1581int i_APCI3XXX_InsnReadDigitalOutput(struct comedi_device *dev, 1553static int i_APCI3XXX_InsnReadDigitalOutput(struct comedi_device *dev,
1582 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 1554 struct comedi_subdevice *s,
1555 struct comedi_insn *insn,
1556 unsigned int *data)
1583{ 1557{
1584 int i_ReturnValue = insn->n; 1558 int i_ReturnValue = insn->n;
1585 unsigned char b_Channel = CR_CHAN(insn->chanspec); 1559 unsigned char b_Channel = CR_CHAN(insn->chanspec);
@@ -1636,7 +1610,7 @@ int i_APCI3XXX_InsnReadDigitalOutput(struct comedi_device *dev,
1636+----------------------------------------------------------------------------+ 1610+----------------------------------------------------------------------------+
1637*/ 1611*/
1638 1612
1639int i_APCI3XXX_Reset(struct comedi_device *dev) 1613static int i_APCI3XXX_Reset(struct comedi_device *dev)
1640{ 1614{
1641 unsigned char b_Cpt = 0; 1615 unsigned char b_Cpt = 0;
1642 1616
@@ -1656,27 +1630,26 @@ int i_APCI3XXX_Reset(struct comedi_device *dev)
1656 /* Clear the start command */ 1630 /* Clear the start command */
1657 /***************************/ 1631 /***************************/
1658 1632
1659 writel(0, (void *)(devpriv->dw_AiBase + 8)); 1633 writel(0, devpriv->dw_AiBase + 8);
1660 1634
1661 /*****************************/ 1635 /*****************************/
1662 /* Reset the interrupt flags */ 1636 /* Reset the interrupt flags */
1663 /*****************************/ 1637 /*****************************/
1664 1638
1665 writel(readl((void *)(devpriv->dw_AiBase + 16)), 1639 writel(readl(devpriv->dw_AiBase + 16), devpriv->dw_AiBase + 16);
1666 (void *)(devpriv->dw_AiBase + 16));
1667 1640
1668 /*****************/ 1641 /*****************/
1669 /* clear the EOS */ 1642 /* clear the EOS */
1670 /*****************/ 1643 /*****************/
1671 1644
1672 readl((void *)(devpriv->dw_AiBase + 20)); 1645 readl(devpriv->dw_AiBase + 20);
1673 1646
1674 /******************/ 1647 /******************/
1675 /* Clear the FIFO */ 1648 /* Clear the FIFO */
1676 /******************/ 1649 /******************/
1677 1650
1678 for (b_Cpt = 0; b_Cpt < 16; b_Cpt++) { 1651 for (b_Cpt = 0; b_Cpt < 16; b_Cpt++) {
1679 readl((void *)(devpriv->dw_AiBase + 28)); 1652 readl(devpriv->dw_AiBase + 28);
1680 } 1653 }
1681 1654
1682 /************************/ 1655 /************************/
diff --git a/drivers/staging/comedi/drivers/adl_pci6208.c b/drivers/staging/comedi/drivers/adl_pci6208.c
index 6925faaf5293..712b9e0788b6 100644
--- a/drivers/staging/comedi/drivers/adl_pci6208.c
+++ b/drivers/staging/comedi/drivers/adl_pci6208.c
@@ -54,7 +54,7 @@ References:
54#include "../comedidev.h" 54#include "../comedidev.h"
55#include "comedi_pci.h" 55#include "comedi_pci.h"
56 56
57#define PCI6208_DRIVER_NAME "adl_pci6208" 57#define PCI6208_DRIVER_NAME "adl_pci6208"
58 58
59/* Board descriptions */ 59/* Board descriptions */
60struct pci6208_board { 60struct pci6208_board {
@@ -134,10 +134,10 @@ static int pci6208_ao_rinsn(struct comedi_device *dev,
134 struct comedi_subdevice *s, 134 struct comedi_subdevice *s,
135 struct comedi_insn *insn, unsigned int *data); 135 struct comedi_insn *insn, unsigned int *data);
136/* static int pci6208_dio_insn_bits (struct comedi_device *dev, 136/* static int pci6208_dio_insn_bits (struct comedi_device *dev,
137 * struct comedi_subdevice *s, */ 137 * struct comedi_subdevice *s, */
138/* struct comedi_insn *insn,unsigned int *data); */ 138/* struct comedi_insn *insn,unsigned int *data); */
139/* static int pci6208_dio_insn_config(struct comedi_device *dev, 139/* static int pci6208_dio_insn_config(struct comedi_device *dev,
140 * struct comedi_subdevice *s, */ 140 * struct comedi_subdevice *s, */
141/* struct comedi_insn *insn,unsigned int *data); */ 141/* struct comedi_insn *insn,unsigned int *data); */
142 142
143/* 143/*
@@ -268,7 +268,7 @@ static int pci6208_ao_rinsn(struct comedi_device *dev,
268 * This allows packed reading/writing of the DIO channels. The 268 * This allows packed reading/writing of the DIO channels. The
269 * comedi core can convert between insn_bits and insn_read/write */ 269 * comedi core can convert between insn_bits and insn_read/write */
270/* static int pci6208_dio_insn_bits(struct comedi_device *dev, 270/* static int pci6208_dio_insn_bits(struct comedi_device *dev,
271 * struct comedi_subdevice *s, */ 271 * struct comedi_subdevice *s, */
272/* struct comedi_insn *insn,unsigned int *data) */ 272/* struct comedi_insn *insn,unsigned int *data) */
273/* { */ 273/* { */
274/* if(insn->n!=2)return -EINVAL; */ 274/* if(insn->n!=2)return -EINVAL; */
@@ -293,7 +293,7 @@ static int pci6208_ao_rinsn(struct comedi_device *dev,
293/* } */ 293/* } */
294 294
295/* static int pci6208_dio_insn_config(struct comedi_device *dev, 295/* static int pci6208_dio_insn_config(struct comedi_device *dev,
296 * struct comedi_subdevice *s, */ 296 * struct comedi_subdevice *s, */
297/* struct comedi_insn *insn,unsigned int *data) */ 297/* struct comedi_insn *insn,unsigned int *data) */
298/* { */ 298/* { */
299/* int chan=CR_CHAN(insn->chanspec); */ 299/* int chan=CR_CHAN(insn->chanspec); */
diff --git a/drivers/staging/comedi/drivers/adl_pci7230.c b/drivers/staging/comedi/drivers/adl_pci7230.c
new file mode 100644
index 000000000000..24a82eb9d153
--- /dev/null
+++ b/drivers/staging/comedi/drivers/adl_pci7230.c
@@ -0,0 +1,206 @@
1/*
2 comedi/drivers/adl_pci7230.c
3
4 Hardware comedi driver fot PCI7230 Adlink card
5 Copyright (C) 2010 David Fernandez <dfcastelao@gmail.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
21*/
22/*
23Driver: adl_pci7230
24Description: Driver for the Adlink PCI-7230 32 ch. isolated digital io board
25Devices: [ADLink] PCI-7230 (adl_pci7230)
26Author: David Fernandez <dfcastelao@gmail.com>
27Status: experimental
28Updated: Mon, 14 Apr 2008 15:08:14 +0100
29
30Configuration Options:
31 [0] - PCI bus of device (optional)
32 [1] - PCI slot of device (optional)
33 If bus/slot is not specified, the first supported
34 PCI device found will be used.
35*/
36
37#include "../comedidev.h"
38#include <linux/kernel.h>
39#include "comedi_pci.h"
40
41#define PCI7230_DI 0x00
42#define PCI7230_DO 0x00
43
44#define PCI_DEVICE_ID_PCI7230 0x7230
45
46static DEFINE_PCI_DEVICE_TABLE(adl_pci7230_pci_table) = {
47 {
48 PCI_VENDOR_ID_ADLINK,
49 PCI_DEVICE_ID_PCI7230,
50 PCI_ANY_ID,
51 PCI_ANY_ID,
52 0,
53 0,
54 0
55 },
56 {0}
57};
58
59MODULE_DEVICE_TABLE(pci, adl_pci7230_pci_table);
60
61struct adl_pci7230_private {
62 int data;
63 struct pci_dev *pci_dev;
64};
65
66#define devpriv ((struct adl_pci7230_private *)dev->private)
67
68static int adl_pci7230_attach(struct comedi_device *dev,
69 struct comedi_devconfig *it);
70static int adl_pci7230_detach(struct comedi_device *dev);
71static struct comedi_driver driver_adl_pci7230 = {
72 .driver_name = "adl_pci7230",
73 .module = THIS_MODULE,
74 .attach = adl_pci7230_attach,
75 .detach = adl_pci7230_detach,
76};
77
78/* Digital IO */
79
80static int adl_pci7230_di_insn_bits(struct comedi_device *dev,
81 struct comedi_subdevice *s,
82 struct comedi_insn *insn,
83 unsigned int *data);
84
85static int adl_pci7230_do_insn_bits(struct comedi_device *dev,
86 struct comedi_subdevice *s,
87 struct comedi_insn *insn,
88 unsigned int *data);
89
90static int adl_pci7230_attach(struct comedi_device *dev,
91 struct comedi_devconfig *it)
92{
93 struct pci_dev *pcidev;
94 struct comedi_subdevice *s;
95 int bus, slot;
96
97 printk(KERN_INFO "comedi%d: adl_pci7230\n", dev->minor);
98
99 dev->board_name = "pci7230";
100 bus = it->options[0];
101 slot = it->options[1];
102
103 if (alloc_private(dev, sizeof(struct adl_pci7230_private)) < 0)
104 return -ENOMEM;
105
106 if (alloc_subdevices(dev, 2) < 0)
107 return -ENOMEM;
108
109 for (pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
110 pcidev != NULL;
111 pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) {
112
113 if (pcidev->vendor == PCI_VENDOR_ID_ADLINK &&
114 pcidev->device == PCI_DEVICE_ID_PCI7230) {
115 if (bus || slot) {
116 /* requested particular bus/slot */
117 if (pcidev->bus->number != bus ||
118 PCI_SLOT(pcidev->devfn) != slot) {
119 continue;
120 }
121 }
122 devpriv->pci_dev = pcidev;
123 break;
124 }
125 }
126 if (pcidev == NULL) {
127 printk(KERN_ERR "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n",
128 dev->minor, bus, slot);
129 return -EIO;
130 }
131 if (comedi_pci_enable(pcidev, "adl_pci7230") < 0) {
132 printk(KERN_ERR "comedi%d: Failed to enable PCI device and request regions\n",
133 dev->minor);
134 return -EIO;
135 }
136 dev->iobase = pci_resource_start(pcidev, 2);
137 printk(KERN_DEBUG "comedi: base addr %4lx\n", dev->iobase);
138
139 s = dev->subdevices + 0;
140 /* Isolated do */
141 s->type = COMEDI_SUBD_DO;
142 s->subdev_flags = SDF_WRITABLE | SDF_GROUND | SDF_COMMON;
143 s->n_chan = 16;
144 s->maxdata = 1;
145 s->range_table = &range_digital;
146 s->insn_bits = adl_pci7230_do_insn_bits;
147
148 s = dev->subdevices + 1;
149 /* Isolated di */
150 s->type = COMEDI_SUBD_DI;
151 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON;
152 s->n_chan = 16;
153 s->maxdata = 1;
154 s->range_table = &range_digital;
155 s->insn_bits = adl_pci7230_di_insn_bits;
156
157 printk(KERN_DEBUG "comedi: attached\n");
158
159 return 1;
160}
161
162static int adl_pci7230_detach(struct comedi_device *dev)
163{
164 printk(KERN_DEBUG "comedi%d: pci7230: remove\n", dev->minor);
165
166 if (devpriv && devpriv->pci_dev) {
167 if (dev->iobase)
168 comedi_pci_disable(devpriv->pci_dev);
169 pci_dev_put(devpriv->pci_dev);
170 }
171
172 return 0;
173}
174
175static int adl_pci7230_do_insn_bits(struct comedi_device *dev,
176 struct comedi_subdevice *s,
177 struct comedi_insn *insn,
178 unsigned int *data)
179{
180 if (insn->n != 2)
181 return -EINVAL;
182
183 if (data[0]) {
184 s->state &= ~data[0];
185 s->state |= (data[0] & data[1]);
186
187 outl((s->state << 16) & 0xffffffff, dev->iobase + PCI7230_DO);
188 }
189
190 return 2;
191}
192
193static int adl_pci7230_di_insn_bits(struct comedi_device *dev,
194 struct comedi_subdevice *s,
195 struct comedi_insn *insn,
196 unsigned int *data)
197{
198 if (insn->n != 2)
199 return -EINVAL;
200
201 data[1] = inl(dev->iobase + PCI7230_DI) & 0xffffffff;
202
203 return 2;
204}
205
206COMEDI_PCI_INITCLEANUP(driver_adl_pci7230, adl_pci7230_pci_table);
diff --git a/drivers/staging/comedi/drivers/adl_pci9111.c b/drivers/staging/comedi/drivers/adl_pci9111.c
index da172a553d15..36a254cd4413 100644
--- a/drivers/staging/comedi/drivers/adl_pci9111.c
+++ b/drivers/staging/comedi/drivers/adl_pci9111.c
@@ -358,8 +358,8 @@ struct pci9111_private_data {
358 358
359 int ao_readback; /* Last written analog output data */ 359 int ao_readback; /* Last written analog output data */
360 360
361 int timer_divisor_1; /* Divisor values for the 8254 timer pacer */ 361 unsigned int timer_divisor_1; /* Divisor values for the 8254 timer pacer */
362 int timer_divisor_2; 362 unsigned int timer_divisor_2;
363 363
364 int is_valid; /* Is device valid */ 364 int is_valid; /* Is device valid */
365 365
@@ -585,19 +585,17 @@ pci9111_ai_do_cmd_test(struct comedi_device *dev,
585 (cmd->scan_begin_src != TRIG_EXT)) 585 (cmd->scan_begin_src != TRIG_EXT))
586 error++; 586 error++;
587 587
588 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT)) { 588 if ((cmd->convert_src != TRIG_TIMER) && (cmd->convert_src != TRIG_EXT))
589 error++; 589 error++;
590 }
591 if ((cmd->convert_src == TRIG_TIMER) && 590 if ((cmd->convert_src == TRIG_TIMER) &&
592 !((cmd->scan_begin_src == TRIG_TIMER) || 591 !((cmd->scan_begin_src == TRIG_TIMER) ||
593 (cmd->scan_begin_src == TRIG_FOLLOW))) { 592 (cmd->scan_begin_src == TRIG_FOLLOW)))
594 error++; 593 error++;
595 }
596 if ((cmd->convert_src == TRIG_EXT) && 594 if ((cmd->convert_src == TRIG_EXT) &&
597 !((cmd->scan_begin_src == TRIG_EXT) || 595 !((cmd->scan_begin_src == TRIG_EXT) ||
598 (cmd->scan_begin_src == TRIG_FOLLOW))) { 596 (cmd->scan_begin_src == TRIG_FOLLOW)))
599 error++; 597 error++;
600 } 598
601 599
602 if (cmd->scan_end_src != TRIG_COUNT) 600 if (cmd->scan_end_src != TRIG_COUNT)
603 error++; 601 error++;
@@ -1067,9 +1065,8 @@ static int pci9111_ai_insn_read(struct comedi_device *dev,
1067 1065
1068 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0])); 1066 pci9111_ai_channel_set(CR_CHAN((&insn->chanspec)[0]));
1069 1067
1070 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0])) { 1068 if ((pci9111_ai_range_get()) != CR_RANGE((&insn->chanspec)[0]))
1071 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0])); 1069 pci9111_ai_range_set(CR_RANGE((&insn->chanspec)[0]));
1072 }
1073 1070
1074 pci9111_fifo_reset(); 1071 pci9111_fifo_reset();
1075 1072
@@ -1090,11 +1087,10 @@ static int pci9111_ai_insn_read(struct comedi_device *dev,
1090 1087
1091conversion_done: 1088conversion_done:
1092 1089
1093 if (resolution == PCI9111_HR_AI_RESOLUTION) { 1090 if (resolution == PCI9111_HR_AI_RESOLUTION)
1094 data[i] = pci9111_hr_ai_get_data(); 1091 data[i] = pci9111_hr_ai_get_data();
1095 } else { 1092 else
1096 data[i] = pci9111_ai_get_data(); 1093 data[i] = pci9111_ai_get_data();
1097 }
1098 } 1094 }
1099 1095
1100#ifdef AI_INSN_DEBUG 1096#ifdef AI_INSN_DEBUG
@@ -1131,9 +1127,8 @@ static int pci9111_ao_insn_read(struct comedi_device *dev,
1131{ 1127{
1132 int i; 1128 int i;
1133 1129
1134 for (i = 0; i < insn->n; i++) { 1130 for (i = 0; i < insn->n; i++)
1135 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK; 1131 data[i] = dev_private->ao_readback & PCI9111_AO_RESOLUTION_MASK;
1136 }
1137 1132
1138 return i; 1133 return i;
1139} 1134}
@@ -1222,9 +1217,8 @@ static int pci9111_attach(struct comedi_device *dev,
1222 int error, i; 1217 int error, i;
1223 const struct pci9111_board *board; 1218 const struct pci9111_board *board;
1224 1219
1225 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0) { 1220 if (alloc_private(dev, sizeof(struct pci9111_private_data)) < 0)
1226 return -ENOMEM; 1221 return -ENOMEM;
1227 }
1228 /* Probe the device to determine what device in the series it is. */ 1222 /* Probe the device to determine what device in the series it is. */
1229 1223
1230 printk("comedi%d: " PCI9111_DRIVER_NAME " driver\n", dev->minor); 1224 printk("comedi%d: " PCI9111_DRIVER_NAME " driver\n", dev->minor);
@@ -1275,9 +1269,6 @@ found:
1275 1269
1276 /* TODO: Warn about non-tested boards. */ 1270 /* TODO: Warn about non-tested boards. */
1277 1271
1278 switch (board->device_id) {
1279 };
1280
1281 /* Read local configuration register base address [PCI_BASE_ADDRESS #1]. */ 1272 /* Read local configuration register base address [PCI_BASE_ADDRESS #1]. */
1282 1273
1283 lcr_io_base = pci_resource_start(pci_device, 1); 1274 lcr_io_base = pci_resource_start(pci_device, 1);
@@ -1387,21 +1378,19 @@ static int pci9111_detach(struct comedi_device *dev)
1387{ 1378{
1388 /* Reset device */ 1379 /* Reset device */
1389 1380
1390 if (dev->private != 0) { 1381 if (dev->private != NULL) {
1391 if (dev_private->is_valid) 1382 if (dev_private->is_valid)
1392 pci9111_reset(dev); 1383 pci9111_reset(dev);
1393 1384
1394 } 1385 }
1395 /* Release previously allocated irq */ 1386 /* Release previously allocated irq */
1396 1387
1397 if (dev->irq != 0) { 1388 if (dev->irq != 0)
1398 free_irq(dev->irq, dev); 1389 free_irq(dev->irq, dev);
1399 }
1400 1390
1401 if (dev_private != 0 && dev_private->pci_device != 0) { 1391 if (dev_private != NULL && dev_private->pci_device != NULL) {
1402 if (dev->iobase) { 1392 if (dev->iobase)
1403 comedi_pci_disable(dev_private->pci_device); 1393 comedi_pci_disable(dev_private->pci_device);
1404 }
1405 pci_dev_put(dev_private->pci_device); 1394 pci_dev_put(dev_private->pci_device);
1406 } 1395 }
1407 1396
diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c
index 944f20ae5a6a..ccef549778e4 100644
--- a/drivers/staging/comedi/drivers/adl_pci9118.c
+++ b/drivers/staging/comedi/drivers/adl_pci9118.c
@@ -44,26 +44,25 @@ c) If isn't used DMA then you can use only mode where
44Configuration options: 44Configuration options:
45 [0] - PCI bus of device (optional) 45 [0] - PCI bus of device (optional)
46 [1] - PCI slot of device (optional) 46 [1] - PCI slot of device (optional)
47 If bus/slot is not specified, then first available PCI 47 If bus/slot is not specified, then first available PCI
48 card will be used. 48 card will be used.
49 [2] - 0= standard 8 DIFF/16 SE channels configuration 49 [2] - 0= standard 8 DIFF/16 SE channels configuration
50 n= external multiplexer connected, 1<=n<=256 50 n = external multiplexer connected, 1 <= n <= 256
51 [3] - 0=autoselect DMA or EOC interrupts operation 51 [3] - 0=autoselect DMA or EOC interrupts operation
52 1=disable DMA mode 52 1 = disable DMA mode
53 3=disable DMA and INT, only insn interface will work 53 3 = disable DMA and INT, only insn interface will work
54 [4] - sample&hold signal - card can generate signal for external S&H board 54 [4] - sample&hold signal - card can generate signal for external S&H board
55 0=use SSHO (pin 45) signal is generated in onboard hardware S&H logic 55 0 = use SSHO(pin 45) signal is generated in onboard hardware S&H logic
56 0!=use ADCHN7 (pin 23) signal is generated from driver, number 56 0 != use ADCHN7(pin 23) signal is generated from driver, number say how
57 say how long delay is requested in ns and sign polarity of the hold 57 long delay is requested in ns and sign polarity of the hold
58 (in this case external multiplexor can serve only 128 channels) 58 (in this case external multiplexor can serve only 128 channels)
59 [5] - 0=stop measure on all hardware errors 59 [5] - 0=stop measure on all hardware errors
60 2|=ignore ADOR - A/D Overrun status 60 2 | = ignore ADOR - A/D Overrun status
61 8|=ignore Bover - A/D Burst Mode Overrun status 61 8|=ignore Bover - A/D Burst Mode Overrun status
62 256|=ignore nFull - A/D FIFO Full status 62 256|=ignore nFull - A/D FIFO Full status
63 63
64*/ 64*/
65#include "../comedidev.h" 65#include "../comedidev.h"
66#include "../pci_ids.h"
67 66
68#include <linux/delay.h> 67#include <linux/delay.h>
69#include <linux/gfp.h> 68#include <linux/gfp.h>
@@ -74,10 +73,18 @@ Configuration options:
74#include "comedi_pci.h" 73#include "comedi_pci.h"
75#include "comedi_fc.h" 74#include "comedi_fc.h"
76 75
76#define PCI_VENDOR_ID_AMCC 0x10e8
77
77/* paranoid checks are broken */ 78/* paranoid checks are broken */
78#undef PCI9118_PARANOIDCHECK /* if defined, then is used code which control correct channel number on every 12 bit sample */ 79#undef PCI9118_PARANOIDCHECK /*
80 * if defined, then is used code which control
81 * correct channel number on every 12 bit sample
82 */
79 83
80#undef PCI9118_EXTDEBUG /* if defined then driver prints a lot of messages */ 84#undef PCI9118_EXTDEBUG /*
85 * if defined then driver prints
86 * a lot of messages
87 */
81 88
82#undef DPRINTK 89#undef DPRINTK
83#ifdef PCI9118_EXTDEBUG 90#ifdef PCI9118_EXTDEBUG
@@ -87,7 +94,10 @@ Configuration options:
87#endif 94#endif
88 95
89#define IORANGE_9118 64 /* I hope */ 96#define IORANGE_9118 64 /* I hope */
90#define PCI9118_CHANLEN 255 /* len of chanlist, some source say 256, but reality looks like 255 :-( */ 97#define PCI9118_CHANLEN 255 /*
98 * len of chanlist, some source say 256,
99 * but reality looks like 255 :-(
100 */
91 101
92#define PCI9118_CNT0 0x00 /* R/W: 8254 counter 0 */ 102#define PCI9118_CNT0 0x00 /* R/W: 8254 counter 0 */
93#define PCI9118_CNT1 0x04 /* R/W: 8254 counter 0 */ 103#define PCI9118_CNT1 0x04 /* R/W: 8254 counter 0 */
@@ -113,20 +123,47 @@ Configuration options:
113#define AdControl_UniP 0x80 /* 1=bipolar, 0=unipolar */ 123#define AdControl_UniP 0x80 /* 1=bipolar, 0=unipolar */
114#define AdControl_Diff 0x40 /* 1=differential, 0= single end inputs */ 124#define AdControl_Diff 0x40 /* 1=differential, 0= single end inputs */
115#define AdControl_SoftG 0x20 /* 1=8254 counter works, 0=counter stops */ 125#define AdControl_SoftG 0x20 /* 1=8254 counter works, 0=counter stops */
116#define AdControl_ExtG 0x10 /* 1=8254 countrol controlled by TGIN(pin 46), 0=controled by SoftG */ 126#define AdControl_ExtG 0x10 /*
117#define AdControl_ExtM 0x08 /* 1=external hardware trigger (pin 44), 0=internal trigger */ 127 * 1=8254 countrol controlled by TGIN(pin 46),
118#define AdControl_TmrTr 0x04 /* 1=8254 is iternal trigger source, 0=software trigger is source (register PCI9118_SOFTTRG) */ 128 * 0=controlled by SoftG
129 */
130#define AdControl_ExtM 0x08 /*
131 * 1=external hardware trigger (pin 44),
132 * 0=internal trigger
133 */
134#define AdControl_TmrTr 0x04 /*
135 * 1=8254 is iternal trigger source,
136 * 0=software trigger is source
137 * (register PCI9118_SOFTTRG)
138 */
119#define AdControl_Int 0x02 /* 1=enable INT, 0=disable */ 139#define AdControl_Int 0x02 /* 1=enable INT, 0=disable */
120#define AdControl_Dma 0x01 /* 1=enable DMA, 0=disable */ 140#define AdControl_Dma 0x01 /* 1=enable DMA, 0=disable */
121 141
122/* bits from A/D function register (PCI9118_ADFUNC) */ 142/* bits from A/D function register (PCI9118_ADFUNC) */
123#define AdFunction_PDTrg 0x80 /* 1=positive, 0=negative digital trigger (only positive is correct) */ 143#define AdFunction_PDTrg 0x80 /*
124#define AdFunction_PETrg 0x40 /* 1=positive, 0=negative external trigger (only positive is correct) */ 144 * 1=positive,
145 * 0=negative digital trigger
146 * (only positive is correct)
147 */
148#define AdFunction_PETrg 0x40 /*
149 * 1=positive,
150 * 0=negative external trigger
151 * (only positive is correct)
152 */
125#define AdFunction_BSSH 0x20 /* 1=with sample&hold, 0=without */ 153#define AdFunction_BSSH 0x20 /* 1=with sample&hold, 0=without */
126#define AdFunction_BM 0x10 /* 1=burst mode, 0=normal mode */ 154#define AdFunction_BM 0x10 /* 1=burst mode, 0=normal mode */
127#define AdFunction_BS 0x08 /* 1=burst mode start, 0=burst mode stop */ 155#define AdFunction_BS 0x08 /*
128#define AdFunction_PM 0x04 /* 1=post trigger mode, 0=not post trigger */ 156 * 1=burst mode start,
129#define AdFunction_AM 0x02 /* 1=about trigger mode, 0=not about trigger */ 157 * 0=burst mode stop
158 */
159#define AdFunction_PM 0x04 /*
160 * 1=post trigger mode,
161 * 0=not post trigger
162 */
163#define AdFunction_AM 0x02 /*
164 * 1=about trigger mode,
165 * 0=not about trigger
166 */
130#define AdFunction_Start 0x01 /* 1=trigger start, 0=trigger stop */ 167#define AdFunction_Start 0x01 /* 1=trigger start, 0=trigger stop */
131 168
132/* bits from A/D status register (PCI9118_ADSTAT) */ 169/* bits from A/D status register (PCI9118_ADSTAT) */
@@ -178,30 +215,39 @@ static const struct comedi_lrange range_pci9118hg = { 8, {
178 } 215 }
179}; 216};
180 217
181#define PCI9118_BIPOLAR_RANGES 4 /* used for test on mixture of BIP/UNI ranges */ 218#define PCI9118_BIPOLAR_RANGES 4 /*
219 * used for test on mixture
220 * of BIP/UNI ranges
221 */
182 222
183static int pci9118_attach(struct comedi_device *dev, 223static int pci9118_attach(struct comedi_device *dev,
184 struct comedi_devconfig *it); 224 struct comedi_devconfig *it);
185static int pci9118_detach(struct comedi_device *dev); 225static int pci9118_detach(struct comedi_device *dev);
186 226
187struct boardtype { 227struct boardtype {
188 const char *name; /* board name */ 228 const char *name; /* board name */
189 int vendor_id; /* PCI vendor a device ID of card */ 229 int vendor_id; /* PCI vendor a device ID of card */
190 int device_id; 230 int device_id;
191 int iorange_amcc; /* iorange for own S5933 region */ 231 int iorange_amcc; /* iorange for own S5933 region */
192 int iorange_9118; /* pass thru card region size */ 232 int iorange_9118; /* pass thru card region size */
193 int n_aichan; /* num of A/D chans */ 233 int n_aichan; /* num of A/D chans */
194 int n_aichand; /* num of A/D chans in diff mode */ 234 int n_aichand; /* num of A/D chans in diff mode */
195 int mux_aichan; /* num of A/D chans with external multiplexor */ 235 int mux_aichan; /*
196 int n_aichanlist; /* len of chanlist */ 236 * num of A/D chans with
197 int n_aochan; /* num of D/A chans */ 237 * external multiplexor
198 int ai_maxdata; /* resolution of A/D */ 238 */
199 int ao_maxdata; /* resolution of D/A */ 239 int n_aichanlist; /* len of chanlist */
200 const struct comedi_lrange *rangelist_ai; /* rangelist for A/D */ 240 int n_aochan; /* num of D/A chans */
201 const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */ 241 int ai_maxdata; /* resolution of A/D */
202 unsigned int ai_ns_min; /* max sample speed of card v ns */ 242 int ao_maxdata; /* resolution of D/A */
203 unsigned int ai_pacer_min; /* minimal pacer value (c1*c2 or c1 in burst) */ 243 const struct comedi_lrange *rangelist_ai; /* rangelist for A/D */
204 int half_fifo_size; /* size of FIFO/2 */ 244 const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */
245 unsigned int ai_ns_min; /* max sample speed of card v ns */
246 unsigned int ai_pacer_min; /*
247 * minimal pacer value
248 * (c1*c2 or c1 in burst)
249 */
250 int half_fifo_size; /* size of FIFO/2 */
205 251
206}; 252};
207 253
@@ -246,63 +292,113 @@ static struct comedi_driver driver_pci9118 = {
246COMEDI_PCI_INITCLEANUP(driver_pci9118, pci9118_pci_table); 292COMEDI_PCI_INITCLEANUP(driver_pci9118, pci9118_pci_table);
247 293
248struct pci9118_private { 294struct pci9118_private {
249 unsigned long iobase_a; /* base+size for AMCC chip */ 295 unsigned long iobase_a; /* base+size for AMCC chip */
250 unsigned int master; /* master capable */ 296 unsigned int master; /* master capable */
251 struct pci_dev *pcidev; /* ptr to actual pcidev */ 297 struct pci_dev *pcidev; /* ptr to actual pcidev */
252 unsigned int usemux; /* we want to use external multiplexor! */ 298 unsigned int usemux; /* we want to use external multiplexor! */
253#ifdef PCI9118_PARANOIDCHECK 299#ifdef PCI9118_PARANOIDCHECK
254 unsigned short chanlist[PCI9118_CHANLEN + 1]; /* list of scaned channel */ 300 unsigned short chanlist[PCI9118_CHANLEN + 1]; /*
255 unsigned char chanlistlen; /* number of scanlist */ 301 * list of
302 * scanned channel
303 */
304 unsigned char chanlistlen; /* number of scanlist */
256#endif 305#endif
257 unsigned char AdControlReg; /* A/D control register */ 306 unsigned char AdControlReg; /* A/D control register */
258 unsigned char IntControlReg; /* Interrupt control register */ 307 unsigned char IntControlReg; /* Interrupt control register */
259 unsigned char AdFunctionReg; /* A/D function register */ 308 unsigned char AdFunctionReg; /* A/D function register */
260 char valid; /* driver is ok */ 309 char valid; /* driver is ok */
261 char ai_neverending; /* we do unlimited AI */ 310 char ai_neverending; /* we do unlimited AI */
262 unsigned int i8254_osc_base; /* frequence of onboard oscilator */ 311 unsigned int i8254_osc_base; /* frequence of onboard oscilator */
263 unsigned int ai_do; /* what do AI? 0=nothing, 1 to 4 mode */ 312 unsigned int ai_do; /* what do AI? 0=nothing, 1 to 4 mode */
264 unsigned int ai_act_scan; /* how many scans we finished */ 313 unsigned int ai_act_scan; /* how many scans we finished */
265 unsigned int ai_buf_ptr; /* data buffer ptr in samples */ 314 unsigned int ai_buf_ptr; /* data buffer ptr in samples */
266 unsigned int ai_n_chan; /* how many channels is measured */ 315 unsigned int ai_n_chan; /* how many channels is measured */
267 unsigned int ai_n_scanlen; /* len of actual scanlist */ 316 unsigned int ai_n_scanlen; /* len of actual scanlist */
268 unsigned int ai_n_realscanlen; /* what we must transfer for one outgoing scan include front/back adds */ 317 unsigned int ai_n_realscanlen; /*
269 unsigned int ai_act_dmapos; /* position in actual real stream */ 318 * what we must transfer for one
270 unsigned int ai_add_front; /* how many channels we must add before scan to satisfy S&H? */ 319 * outgoing scan include front/back adds
271 unsigned int ai_add_back; /* how many channels we must add before scan to satisfy DMA? */ 320 */
272 unsigned int *ai_chanlist; /* actaul chanlist */ 321 unsigned int ai_act_dmapos; /* position in actual real stream */
322 unsigned int ai_add_front; /*
323 * how many channels we must add
324 * before scan to satisfy S&H?
325 */
326 unsigned int ai_add_back; /*
327 * how many channels we must add
328 * before scan to satisfy DMA?
329 */
330 unsigned int *ai_chanlist; /* actual chanlist */
273 unsigned int ai_timer1; 331 unsigned int ai_timer1;
274 unsigned int ai_timer2; 332 unsigned int ai_timer2;
275 unsigned int ai_flags; 333 unsigned int ai_flags;
276 char ai12_startstop; /* measure can start/stop on external trigger */ 334 char ai12_startstop; /*
277 unsigned int ai_divisor1, ai_divisor2; /* divisors for start of measure on external start */ 335 * measure can start/stop
336 * on external trigger
337 */
338 unsigned int ai_divisor1, ai_divisor2; /*
339 * divisors for start of measure
340 * on external start
341 */
278 unsigned int ai_data_len; 342 unsigned int ai_data_len;
279 short *ai_data; 343 short *ai_data;
280 short ao_data[2]; /* data output buffer */ 344 short ao_data[2]; /* data output buffer */
281 unsigned int ai_scans; /* number of scans to do */ 345 unsigned int ai_scans; /* number of scans to do */
282 char dma_doublebuf; /* we can use double buffring */ 346 char dma_doublebuf; /* we can use double buffring */
283 unsigned int dma_actbuf; /* which buffer is used now */ 347 unsigned int dma_actbuf; /* which buffer is used now */
284 short *dmabuf_virt[2]; /* pointers to begin of DMA buffer */ 348 short *dmabuf_virt[2]; /*
285 unsigned long dmabuf_hw[2]; /* hw address of DMA buff */ 349 * pointers to begin of
286 unsigned int dmabuf_size[2]; /* size of dma buffer in bytes */ 350 * DMA buffer
287 unsigned int dmabuf_use_size[2]; /* which size we may now used for transfer */ 351 */
288 unsigned int dmabuf_used_size[2]; /* which size was trully used */ 352 unsigned long dmabuf_hw[2]; /* hw address of DMA buff */
353 unsigned int dmabuf_size[2]; /*
354 * size of dma buffer in bytes
355 */
356 unsigned int dmabuf_use_size[2]; /*
357 * which size we may now use
358 * for transfer
359 */
360 unsigned int dmabuf_used_size[2]; /* which size was truly used */
289 unsigned int dmabuf_panic_size[2]; 361 unsigned int dmabuf_panic_size[2];
290 unsigned int dmabuf_samples[2]; /* size in samples */ 362 unsigned int dmabuf_samples[2]; /* size in samples */
291 int dmabuf_pages[2]; /* number of pages in buffer */ 363 int dmabuf_pages[2]; /* number of pages in buffer */
292 unsigned char cnt0_users; /* bit field of 8254 CNT0 users (0-unused, 1-AO, 2-DI, 3-DO) */ 364 unsigned char cnt0_users; /*
293 unsigned char exttrg_users; /* bit field of external trigger users (0-AI, 1-AO, 2-DI, 3-DO) */ 365 * bit field of 8254 CNT0 users
294 unsigned int cnt0_divisor; /* actual CNT0 divisor */ 366 * (0-unused, 1-AO, 2-DI, 3-DO)
295 void (*int_ai_func) (struct comedi_device *, struct comedi_subdevice *, unsigned short, unsigned int, unsigned short); /* ptr to actual interrupt AI function */ 367 */
296 unsigned char ai16bits; /* =1 16 bit card */ 368 unsigned char exttrg_users; /*
297 unsigned char usedma; /* =1 use DMA transfer and not INT */ 369 * bit field of external trigger
298 unsigned char useeoshandle; /* =1 change WAKE_EOS DMA transfer to fit on every second */ 370 * users(0-AI, 1-AO, 2-DI, 3-DO)
299 unsigned char usessh; /* =1 turn on S&H support */ 371 */
300 int softsshdelay; /* >0 use software S&H, numer is requested delay in ns */ 372 unsigned int cnt0_divisor; /* actual CNT0 divisor */
301 unsigned char softsshsample; /* polarity of S&H signal in sample state */ 373 void (*int_ai_func) (struct comedi_device *, struct comedi_subdevice *,
302 unsigned char softsshhold; /* polarity of S&H signal in hold state */ 374 unsigned short,
303 unsigned int ai_maskerr; /* which warning was printed */ 375 unsigned int,
304 unsigned int ai_maskharderr; /* on which error bits stops */ 376 unsigned short); /*
305 unsigned int ai_inttrig_start; /* TRIG_INT for start */ 377 * ptr to actual interrupt
378 * AI function
379 */
380 unsigned char ai16bits; /* =1 16 bit card */
381 unsigned char usedma; /* =1 use DMA transfer and not INT */
382 unsigned char useeoshandle; /*
383 * =1 change WAKE_EOS DMA transfer
384 * to fit on every second
385 */
386 unsigned char usessh; /* =1 turn on S&H support */
387 int softsshdelay; /*
388 * >0 use software S&H,
389 * numer is requested delay in ns
390 */
391 unsigned char softsshsample; /*
392 * polarity of S&H signal
393 * in sample state
394 */
395 unsigned char softsshhold; /*
396 * polarity of S&H signal
397 * in hold state
398 */
399 unsigned int ai_maskerr; /* which warning was printed */
400 unsigned int ai_maskharderr; /* on which error bits stops */
401 unsigned int ai_inttrig_start; /* TRIG_INT for start */
306}; 402};
307 403
308#define devpriv ((struct pci9118_private *)dev->private) 404#define devpriv ((struct pci9118_private *)dev->private)
@@ -346,12 +442,19 @@ static int pci9118_insn_read_ai(struct comedi_device *dev,
346 442
347 devpriv->AdControlReg = AdControl_Int & 0xff; 443 devpriv->AdControlReg = AdControl_Int & 0xff;
348 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; 444 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
349 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ 445 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
446 /*
447 * positive triggers, no S&H,
448 * no burst, burst stop,
449 * no post trigger,
450 * no about trigger,
451 * trigger stop
452 */
350 453
351 if (!setup_channel_list(dev, s, 1, &insn->chanspec, 0, 0, 0, 0, 0)) 454 if (!setup_channel_list(dev, s, 1, &insn->chanspec, 0, 0, 0, 0, 0))
352 return -EINVAL; 455 return -EINVAL;
353 456
354 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 457 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
355 458
356 for (n = 0; n < insn->n; n++) { 459 for (n = 0; n < insn->n; n++) {
357 outw(0, dev->iobase + PCI9118_SOFTTRG); /* start conversion */ 460 outw(0, dev->iobase + PCI9118_SOFTTRG); /* start conversion */
@@ -365,7 +468,7 @@ static int pci9118_insn_read_ai(struct comedi_device *dev,
365 468
366 comedi_error(dev, "A/D insn timeout"); 469 comedi_error(dev, "A/D insn timeout");
367 data[n] = 0; 470 data[n] = 0;
368 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 471 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
369 return -ETIME; 472 return -ETIME;
370 473
371conv_finish: 474conv_finish:
@@ -379,7 +482,7 @@ conv_finish:
379 } 482 }
380 } 483 }
381 484
382 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 485 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
383 return n; 486 return n;
384 487
385} 488}
@@ -394,11 +497,11 @@ static int pci9118_insn_write_ao(struct comedi_device *dev,
394 int n, chanreg, ch; 497 int n, chanreg, ch;
395 498
396 ch = CR_CHAN(insn->chanspec); 499 ch = CR_CHAN(insn->chanspec);
397 if (ch) { 500 if (ch)
398 chanreg = PCI9118_DA2; 501 chanreg = PCI9118_DA2;
399 } else { 502 else
400 chanreg = PCI9118_DA1; 503 chanreg = PCI9118_DA1;
401 } 504
402 505
403 for (n = 0; n < insn->n; n++) { 506 for (n = 0; n < insn->n; n++) {
404 outl(data[n], dev->iobase + chanreg); 507 outl(data[n], dev->iobase + chanreg);
@@ -561,11 +664,11 @@ static void pci9118_ai_munge(struct comedi_device *dev,
561 for (i = 0; i < num_samples; i++) { 664 for (i = 0; i < num_samples; i++) {
562 if (devpriv->usedma) 665 if (devpriv->usedma)
563 array[i] = be16_to_cpu(array[i]); 666 array[i] = be16_to_cpu(array[i]);
564 if (devpriv->ai16bits) { 667 if (devpriv->ai16bits)
565 array[i] ^= 0x8000; 668 array[i] ^= 0x8000;
566 } else { 669 else
567 array[i] = (array[i] >> 4) & 0x0fff; 670 array[i] = (array[i] >> 4) & 0x0fff;
568 } 671
569 } 672 }
570} 673}
571 674
@@ -590,11 +693,13 @@ static void interrupt_pci9118_ai_onesample(struct comedi_device *dev,
590 693
591#ifdef PCI9118_PARANOIDCHECK 694#ifdef PCI9118_PARANOIDCHECK
592 if (devpriv->ai16bits == 0) { 695 if (devpriv->ai16bits == 0) {
593 if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) { /* data dropout! */ 696 if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) {
697 /* data dropout! */
594 printk 698 printk
595 ("comedi: A/D SAMPL - data dropout: received channel %d, expected %d!\n", 699 ("comedi: A/D SAMPL - data dropout: "
596 sampl & 0x000f, 700 "received channel %d, expected %d!\n",
597 devpriv->chanlist[s->async->cur_chan]); 701 sampl & 0x000f,
702 devpriv->chanlist[s->async->cur_chan]);
598 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; 703 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
599 pci9118_ai_cancel(dev, s); 704 pci9118_ai_cancel(dev, s);
600 comedi_event(dev, s); 705 comedi_event(dev, s);
@@ -604,11 +709,13 @@ static void interrupt_pci9118_ai_onesample(struct comedi_device *dev,
604#endif 709#endif
605 cfc_write_to_buffer(s, sampl); 710 cfc_write_to_buffer(s, sampl);
606 s->async->cur_chan++; 711 s->async->cur_chan++;
607 if (s->async->cur_chan >= devpriv->ai_n_scanlen) { /* one scan done */ 712 if (s->async->cur_chan >= devpriv->ai_n_scanlen) {
713 /* one scan done */
608 s->async->cur_chan %= devpriv->ai_n_scanlen; 714 s->async->cur_chan %= devpriv->ai_n_scanlen;
609 devpriv->ai_act_scan++; 715 devpriv->ai_act_scan++;
610 if (!(devpriv->ai_neverending)) 716 if (!(devpriv->ai_neverending))
611 if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ 717 if (devpriv->ai_act_scan >= devpriv->ai_scans) {
718 /* all data sampled */
612 pci9118_ai_cancel(dev, s); 719 pci9118_ai_cancel(dev, s);
613 s->async->events |= COMEDI_CB_EOA; 720 s->async->events |= COMEDI_CB_EOA;
614 } 721 }
@@ -644,16 +751,19 @@ static void interrupt_pci9118_ai_dma(struct comedi_device *dev,
644 comedi_event(dev, s); 751 comedi_event(dev, s);
645 return; 752 return;
646 } 753 }
647
648 if (int_adstat & devpriv->ai_maskerr) 754 if (int_adstat & devpriv->ai_maskerr)
649/* if (int_adstat & 0x106) */ 755 /* if (int_adstat & 0x106) */
650 if (pci9118_decode_error_status(dev, s, int_adstat)) 756 if (pci9118_decode_error_status(dev, s, int_adstat))
651 return; 757 return;
652 758
653 samplesinbuf = devpriv->dmabuf_use_size[devpriv->dma_actbuf] >> 1; /* number of received real samples */ 759 samplesinbuf = devpriv->dmabuf_use_size[devpriv->dma_actbuf] >> 1;
760 /* number of received real samples */
654/* DPRINTK("dma_actbuf=%d\n",devpriv->dma_actbuf); */ 761/* DPRINTK("dma_actbuf=%d\n",devpriv->dma_actbuf); */
655 762
656 if (devpriv->dma_doublebuf) { /* switch DMA buffers if is used double buffering */ 763 if (devpriv->dma_doublebuf) { /*
764 * switch DMA buffers if is used
765 * double buffering
766 */
657 next_dma_buf = 1 - devpriv->dma_actbuf; 767 next_dma_buf = 1 - devpriv->dma_actbuf;
658 outl(devpriv->dmabuf_hw[next_dma_buf], 768 outl(devpriv->dmabuf_hw[next_dma_buf],
659 devpriv->iobase_a + AMCC_OP_REG_MWAR); 769 devpriv->iobase_a + AMCC_OP_REG_MWAR);
@@ -666,25 +776,32 @@ static void interrupt_pci9118_ai_dma(struct comedi_device *dev,
666 } 776 }
667 777
668 if (samplesinbuf) { 778 if (samplesinbuf) {
669 m = devpriv->ai_data_len >> 1; /* how many samples is to end of buffer */ 779 m = devpriv->ai_data_len >> 1; /*
670/* DPRINTK("samps=%d m=%d %d %d\n",samplesinbuf,m,s->async->buf_int_count,s->async->buf_int_ptr); */ 780 * how many samples is to
781 * end of buffer
782 */
783/*
784 * DPRINTK("samps=%d m=%d %d %d\n",
785 * samplesinbuf,m,s->async->buf_int_count,s->async->buf_int_ptr);
786 */
671 sampls = m; 787 sampls = m;
672 move_block_from_dma(dev, s, 788 move_block_from_dma(dev, s,
673 devpriv->dmabuf_virt[devpriv->dma_actbuf], 789 devpriv->dmabuf_virt[devpriv->dma_actbuf],
674 samplesinbuf); 790 samplesinbuf);
675 m = m - sampls; /* m= how many samples was transfered */ 791 m = m - sampls; /* m= how many samples was transfered */
676 } 792 }
677/* DPRINTK("YYY\n"); */ 793/* DPRINTK("YYY\n"); */
678 794
679 if (!devpriv->ai_neverending) 795 if (!devpriv->ai_neverending)
680 if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data sampled */ 796 if (devpriv->ai_act_scan >= devpriv->ai_scans) {
797 /* all data sampled */
681 pci9118_ai_cancel(dev, s); 798 pci9118_ai_cancel(dev, s);
682 s->async->events |= COMEDI_CB_EOA; 799 s->async->events |= COMEDI_CB_EOA;
683 } 800 }
684 801
685 if (devpriv->dma_doublebuf) { /* switch dma buffers */ 802 if (devpriv->dma_doublebuf) { /* switch dma buffers */
686 devpriv->dma_actbuf = 1 - devpriv->dma_actbuf; 803 devpriv->dma_actbuf = 1 - devpriv->dma_actbuf;
687 } else { /* restart DMA if is not used double buffering */ 804 } else { /* restart DMA if is not used double buffering */
688 outl(devpriv->dmabuf_hw[0], 805 outl(devpriv->dmabuf_hw[0],
689 devpriv->iobase_a + AMCC_OP_REG_MWAR); 806 devpriv->iobase_a + AMCC_OP_REG_MWAR);
690 outl(devpriv->dmabuf_use_size[0], 807 outl(devpriv->dmabuf_use_size[0],
@@ -705,39 +822,62 @@ static irqreturn_t interrupt_pci9118(int irq, void *d)
705 unsigned int int_daq = 0, int_amcc, int_adstat; 822 unsigned int int_daq = 0, int_amcc, int_adstat;
706 823
707 if (!dev->attached) 824 if (!dev->attached)
708 return IRQ_NONE; /* not fully initialized */ 825 return IRQ_NONE; /* not fully initialized */
709 826
710 int_daq = inl(dev->iobase + PCI9118_INTSRC) & 0xf; /* get IRQ reasons from card */ 827 int_daq = inl(dev->iobase + PCI9118_INTSRC) & 0xf;
711 int_amcc = inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* get INT register from AMCC chip */ 828 /* get IRQ reasons from card */
829 int_amcc = inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR);
830 /* get INT register from AMCC chip */
712 831
713/* DPRINTK("INT daq=0x%01x amcc=0x%08x MWAR=0x%08x MWTC=0x%08x ADSTAT=0x%02x ai_do=%d\n", int_daq, int_amcc, inl(devpriv->iobase_a+AMCC_OP_REG_MWAR), inl(devpriv->iobase_a+AMCC_OP_REG_MWTC), inw(dev->iobase+PCI9118_ADSTAT)&0x1ff,devpriv->ai_do); */ 832/*
833 * DPRINTK("INT daq=0x%01x amcc=0x%08x MWAR=0x%08x
834 * MWTC=0x%08x ADSTAT=0x%02x ai_do=%d\n",
835 * int_daq, int_amcc, inl(devpriv->iobase_a+AMCC_OP_REG_MWAR),
836 * inl(devpriv->iobase_a+AMCC_OP_REG_MWTC),
837 * inw(dev->iobase+PCI9118_ADSTAT)&0x1ff,devpriv->ai_do);
838 */
714 839
715 if ((!int_daq) && (!(int_amcc & ANY_S593X_INT))) 840 if ((!int_daq) && (!(int_amcc & ANY_S593X_INT)))
716 return IRQ_NONE; /* interrupt from other source */ 841 return IRQ_NONE; /* interrupt from other source */
717 842
718 outl(int_amcc | 0x00ff0000, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* shutdown IRQ reasons in AMCC */ 843 outl(int_amcc | 0x00ff0000, devpriv->iobase_a + AMCC_OP_REG_INTCSR);
844 /* shutdown IRQ reasons in AMCC */
719 845
720 int_adstat = inw(dev->iobase + PCI9118_ADSTAT) & 0x1ff; /* get STATUS register */ 846 int_adstat = inw(dev->iobase + PCI9118_ADSTAT) & 0x1ff;
847 /* get STATUS register */
721 848
722 if (devpriv->ai_do) { 849 if (devpriv->ai_do) {
723 if (devpriv->ai12_startstop) 850 if (devpriv->ai12_startstop)
724 if ((int_adstat & AdStatus_DTH) && (int_daq & Int_DTrg)) { /* start stop of measure */ 851 if ((int_adstat & AdStatus_DTH) &&
852 (int_daq & Int_DTrg)) {
853 /* start stop of measure */
725 if (devpriv->ai12_startstop & START_AI_EXT) { 854 if (devpriv->ai12_startstop & START_AI_EXT) {
726 devpriv->ai12_startstop &= 855 devpriv->ai12_startstop &=
727 ~START_AI_EXT; 856 ~START_AI_EXT;
728 if (!(devpriv->ai12_startstop & 857 if (!(devpriv->ai12_startstop &
729 STOP_AI_EXT)) 858 STOP_AI_EXT))
730 pci9118_exttrg_del(dev, EXTTRG_AI); /* deactivate EXT trigger */ 859 pci9118_exttrg_del
731 start_pacer(dev, devpriv->ai_do, devpriv->ai_divisor1, devpriv->ai_divisor2); /* start pacer */ 860 (dev, EXTTRG_AI);
861 /* deactivate EXT trigger */
862 start_pacer(dev, devpriv->ai_do,
863 devpriv->ai_divisor1,
864 devpriv->ai_divisor2);
865 /* start pacer */
732 outl(devpriv->AdControlReg, 866 outl(devpriv->AdControlReg,
733 dev->iobase + PCI9118_ADCNTRL); 867 dev->iobase + PCI9118_ADCNTRL);
734 } else { 868 } else {
735 if (devpriv->ai12_startstop & 869 if (devpriv->ai12_startstop &
736 STOP_AI_EXT) { 870 STOP_AI_EXT) {
737 devpriv->ai12_startstop &= 871 devpriv->ai12_startstop &=
738 ~STOP_AI_EXT; 872 ~STOP_AI_EXT;
739 pci9118_exttrg_del(dev, EXTTRG_AI); /* deactivate EXT trigger */ 873 pci9118_exttrg_del
740 devpriv->ai_neverending = 0; /* well, on next interrupt from DMA/EOC measure will stop */ 874 (dev, EXTTRG_AI);
875 /* deactivate EXT trigger */
876 devpriv->ai_neverending = 0;
877 /*
878 * well, on next interrupt from
879 * DMA/EOC measure will stop
880 */
741 } 881 }
742 } 882 }
743 } 883 }
@@ -781,7 +921,8 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev,
781 struct comedi_cmd *cmd) 921 struct comedi_cmd *cmd)
782{ 922{
783 int err = 0; 923 int err = 0;
784 int tmp, divisor1 = 0, divisor2 = 0; 924 int tmp;
925 unsigned int divisor1 = 0, divisor2 = 0;
785 926
786 /* step 1: make sure trigger sources are trivially valid */ 927 /* step 1: make sure trigger sources are trivially valid */
787 928
@@ -791,20 +932,20 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev,
791 err++; 932 err++;
792 933
793 tmp = cmd->scan_begin_src; 934 tmp = cmd->scan_begin_src;
794 if (devpriv->master) { 935 if (devpriv->master)
795 cmd->scan_begin_src &= TRIG_TIMER | TRIG_EXT | TRIG_FOLLOW; 936 cmd->scan_begin_src &= TRIG_TIMER | TRIG_EXT | TRIG_FOLLOW;
796 } else { 937 else
797 cmd->scan_begin_src &= TRIG_FOLLOW; 938 cmd->scan_begin_src &= TRIG_FOLLOW;
798 } 939
799 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) 940 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
800 err++; 941 err++;
801 942
802 tmp = cmd->convert_src; 943 tmp = cmd->convert_src;
803 if (devpriv->master) { 944 if (devpriv->master)
804 cmd->convert_src &= TRIG_TIMER | TRIG_EXT | TRIG_NOW; 945 cmd->convert_src &= TRIG_TIMER | TRIG_EXT | TRIG_NOW;
805 } else { 946 else
806 cmd->convert_src &= TRIG_TIMER | TRIG_EXT; 947 cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
807 } 948
808 if (!cmd->convert_src || tmp != cmd->convert_src) 949 if (!cmd->convert_src || tmp != cmd->convert_src)
809 err++; 950 err++;
810 951
@@ -821,7 +962,11 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev,
821 if (err) 962 if (err)
822 return 1; 963 return 1;
823 964
824 /* step 2: make sure trigger sources are unique and mutually compatible */ 965 /*
966 * step 2:
967 * make sure trigger sources are
968 * unique and mutually compatible
969 */
825 970
826 if (cmd->start_src != TRIG_NOW && 971 if (cmd->start_src != TRIG_NOW &&
827 cmd->start_src != TRIG_INT && cmd->start_src != TRIG_EXT) { 972 cmd->start_src != TRIG_INT && cmd->start_src != TRIG_EXT) {
@@ -1026,7 +1171,7 @@ static int pci9118_ai_cmdtest(struct comedi_device *dev,
1026 if (cmd->chanlist) 1171 if (cmd->chanlist)
1027 if (!check_channel_list(dev, s, cmd->chanlist_len, 1172 if (!check_channel_list(dev, s, cmd->chanlist_len,
1028 cmd->chanlist, 0, 0)) 1173 cmd->chanlist, 0, 0))
1029 return 5; /* incorrect channels list */ 1174 return 5; /* incorrect channels list */
1030 1175
1031 return 0; 1176 return 0;
1032} 1177}
@@ -1043,88 +1188,101 @@ static int Compute_and_setup_dma(struct comedi_device *dev)
1043 dmalen1 = devpriv->dmabuf_size[1]; 1188 dmalen1 = devpriv->dmabuf_size[1];
1044 DPRINTK("1 dmalen0=%d dmalen1=%d ai_data_len=%d\n", dmalen0, dmalen1, 1189 DPRINTK("1 dmalen0=%d dmalen1=%d ai_data_len=%d\n", dmalen0, dmalen1,
1045 devpriv->ai_data_len); 1190 devpriv->ai_data_len);
1046 /* isn't output buff smaller that our DMA buff? */ 1191 /* isn't output buff smaller that our DMA buff? */
1047 if (dmalen0 > (devpriv->ai_data_len)) { 1192 if (dmalen0 > (devpriv->ai_data_len)) {
1048 dmalen0 = devpriv->ai_data_len & ~3L; /* allign to 32bit down */ 1193 dmalen0 = devpriv->ai_data_len & ~3L; /*
1194 * align to 32bit down
1195 */
1049 } 1196 }
1050 if (dmalen1 > (devpriv->ai_data_len)) { 1197 if (dmalen1 > (devpriv->ai_data_len)) {
1051 dmalen1 = devpriv->ai_data_len & ~3L; /* allign to 32bit down */ 1198 dmalen1 = devpriv->ai_data_len & ~3L; /*
1199 * align to 32bit down
1200 */
1052 } 1201 }
1053 DPRINTK("2 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1); 1202 DPRINTK("2 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1);
1054 1203
1055 /* we want wake up every scan? */ 1204 /* we want wake up every scan? */
1056 if (devpriv->ai_flags & TRIG_WAKE_EOS) { 1205 if (devpriv->ai_flags & TRIG_WAKE_EOS) {
1057 if (dmalen0 < (devpriv->ai_n_realscanlen << 1)) { 1206 if (dmalen0 < (devpriv->ai_n_realscanlen << 1)) {
1058 /* uff, too short DMA buffer, disable EOS support! */ 1207 /* uff, too short DMA buffer, disable EOS support! */
1059 devpriv->ai_flags &= (~TRIG_WAKE_EOS); 1208 devpriv->ai_flags &= (~TRIG_WAKE_EOS);
1060 printk 1209 printk
1061 ("comedi%d: WAR: DMA0 buf too short, cann't support TRIG_WAKE_EOS (%d<%d)\n", 1210 ("comedi%d: WAR: DMA0 buf too short, can't "
1211 "support TRIG_WAKE_EOS (%d<%d)\n",
1062 dev->minor, dmalen0, 1212 dev->minor, dmalen0,
1063 devpriv->ai_n_realscanlen << 1); 1213 devpriv->ai_n_realscanlen << 1);
1064 } else { 1214 } else {
1065 /* short first DMA buffer to one scan */ 1215 /* short first DMA buffer to one scan */
1066 dmalen0 = devpriv->ai_n_realscanlen << 1; 1216 dmalen0 = devpriv->ai_n_realscanlen << 1;
1067 DPRINTK 1217 DPRINTK
1068 ("21 dmalen0=%d ai_n_realscanlen=%d useeoshandle=%d\n", 1218 ("21 dmalen0=%d ai_n_realscanlen=%d "
1069 dmalen0, devpriv->ai_n_realscanlen, 1219 "useeoshandle=%d\n",
1070 devpriv->useeoshandle); 1220 dmalen0, devpriv->ai_n_realscanlen,
1221 devpriv->useeoshandle);
1071 if (devpriv->useeoshandle) 1222 if (devpriv->useeoshandle)
1072 dmalen0 += 2; 1223 dmalen0 += 2;
1073 if (dmalen0 < 4) { 1224 if (dmalen0 < 4) {
1074 printk 1225 printk
1075 ("comedi%d: ERR: DMA0 buf len bug? (%d<4)\n", 1226 ("comedi%d: ERR: DMA0 buf len bug? "
1076 dev->minor, dmalen0); 1227 "(%d<4)\n",
1228 dev->minor, dmalen0);
1077 dmalen0 = 4; 1229 dmalen0 = 4;
1078 } 1230 }
1079 } 1231 }
1080 } 1232 }
1081 if (devpriv->ai_flags & TRIG_WAKE_EOS) { 1233 if (devpriv->ai_flags & TRIG_WAKE_EOS) {
1082 if (dmalen1 < (devpriv->ai_n_realscanlen << 1)) { 1234 if (dmalen1 < (devpriv->ai_n_realscanlen << 1)) {
1083 /* uff, too short DMA buffer, disable EOS support! */ 1235 /* uff, too short DMA buffer, disable EOS support! */
1084 devpriv->ai_flags &= (~TRIG_WAKE_EOS); 1236 devpriv->ai_flags &= (~TRIG_WAKE_EOS);
1085 printk 1237 printk
1086 ("comedi%d: WAR: DMA1 buf too short, cann't support TRIG_WAKE_EOS (%d<%d)\n", 1238 ("comedi%d: WAR: DMA1 buf too short, "
1239 "can't support TRIG_WAKE_EOS (%d<%d)\n",
1087 dev->minor, dmalen1, 1240 dev->minor, dmalen1,
1088 devpriv->ai_n_realscanlen << 1); 1241 devpriv->ai_n_realscanlen << 1);
1089 } else { 1242 } else {
1090 /* short second DMA buffer to one scan */ 1243 /* short second DMA buffer to one scan */
1091 dmalen1 = devpriv->ai_n_realscanlen << 1; 1244 dmalen1 = devpriv->ai_n_realscanlen << 1;
1092 DPRINTK 1245 DPRINTK
1093 ("22 dmalen1=%d ai_n_realscanlen=%d useeoshandle=%d\n", 1246 ("22 dmalen1=%d ai_n_realscanlen=%d "
1247 "useeoshandle=%d\n",
1094 dmalen1, devpriv->ai_n_realscanlen, 1248 dmalen1, devpriv->ai_n_realscanlen,
1095 devpriv->useeoshandle); 1249 devpriv->useeoshandle);
1096 if (devpriv->useeoshandle) 1250 if (devpriv->useeoshandle)
1097 dmalen1 -= 2; 1251 dmalen1 -= 2;
1098 if (dmalen1 < 4) { 1252 if (dmalen1 < 4) {
1099 printk 1253 printk
1100 ("comedi%d: ERR: DMA1 buf len bug? (%d<4)\n", 1254 ("comedi%d: ERR: DMA1 buf len bug? "
1101 dev->minor, dmalen1); 1255 "(%d<4)\n",
1256 dev->minor, dmalen1);
1102 dmalen1 = 4; 1257 dmalen1 = 4;
1103 } 1258 }
1104 } 1259 }
1105 } 1260 }
1106 1261
1107 DPRINTK("3 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1); 1262 DPRINTK("3 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1);
1108 /* transfer without TRIG_WAKE_EOS */ 1263 /* transfer without TRIG_WAKE_EOS */
1109 if (!(devpriv->ai_flags & TRIG_WAKE_EOS)) { 1264 if (!(devpriv->ai_flags & TRIG_WAKE_EOS)) {
1110 /* if it's possible then allign DMA buffers to length of scan */ 1265 /* if it's possible then allign DMA buffers to length of scan */
1111 i = dmalen0; 1266 i = dmalen0;
1112 dmalen0 = 1267 dmalen0 =
1113 (dmalen0 / (devpriv->ai_n_realscanlen << 1)) * 1268 (dmalen0 / (devpriv->ai_n_realscanlen << 1)) *
1114 (devpriv->ai_n_realscanlen << 1); 1269 (devpriv->ai_n_realscanlen << 1);
1115 dmalen0 &= ~3L; 1270 dmalen0 &= ~3L;
1116 if (!dmalen0) 1271 if (!dmalen0)
1117 dmalen0 = i; /* uff. very long scan? */ 1272 dmalen0 = i; /* uff. very long scan? */
1118 i = dmalen1; 1273 i = dmalen1;
1119 dmalen1 = 1274 dmalen1 =
1120 (dmalen1 / (devpriv->ai_n_realscanlen << 1)) * 1275 (dmalen1 / (devpriv->ai_n_realscanlen << 1)) *
1121 (devpriv->ai_n_realscanlen << 1); 1276 (devpriv->ai_n_realscanlen << 1);
1122 dmalen1 &= ~3L; 1277 dmalen1 &= ~3L;
1123 if (!dmalen1) 1278 if (!dmalen1)
1124 dmalen1 = i; /* uff. very long scan? */ 1279 dmalen1 = i; /* uff. very long scan? */
1125 /* if measure isn't neverending then test, if it whole fits into one or two DMA buffers */ 1280 /*
1281 * if measure isn't neverending then test, if it fits whole
1282 * into one or two DMA buffers
1283 */
1126 if (!devpriv->ai_neverending) { 1284 if (!devpriv->ai_neverending) {
1127 /* fits whole measure into one DMA buffer? */ 1285 /* fits whole measure into one DMA buffer? */
1128 if (dmalen0 > 1286 if (dmalen0 >
1129 ((devpriv->ai_n_realscanlen << 1) * 1287 ((devpriv->ai_n_realscanlen << 1) *
1130 devpriv->ai_scans)) { 1288 devpriv->ai_scans)) {
@@ -1138,7 +1296,10 @@ static int Compute_and_setup_dma(struct comedi_device *dev)
1138 DPRINTK("3.1 dmalen0=%d dmalen1=%d \n", dmalen0, 1296 DPRINTK("3.1 dmalen0=%d dmalen1=%d \n", dmalen0,
1139 dmalen1); 1297 dmalen1);
1140 dmalen0 &= ~3L; 1298 dmalen0 &= ~3L;
1141 } else { /* fits whole measure into two DMA buffer? */ 1299 } else { /*
1300 * fits whole measure into
1301 * two DMA buffer?
1302 */
1142 if (dmalen1 > 1303 if (dmalen1 >
1143 ((devpriv->ai_n_realscanlen << 1) * 1304 ((devpriv->ai_n_realscanlen << 1) *
1144 devpriv->ai_scans - dmalen0)) 1305 devpriv->ai_scans - dmalen0))
@@ -1154,7 +1315,7 @@ static int Compute_and_setup_dma(struct comedi_device *dev)
1154 1315
1155 DPRINTK("4 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1); 1316 DPRINTK("4 dmalen0=%d dmalen1=%d \n", dmalen0, dmalen1);
1156 1317
1157 /* these DMA buffer size we'll be used */ 1318 /* these DMA buffer size will be used */
1158 devpriv->dma_actbuf = 0; 1319 devpriv->dma_actbuf = 0;
1159 devpriv->dmabuf_use_size[0] = dmalen0; 1320 devpriv->dmabuf_use_size[0] = dmalen0;
1160 devpriv->dmabuf_use_size[1] = dmalen1; 1321 devpriv->dmabuf_use_size[1] = dmalen1;
@@ -1176,10 +1337,11 @@ static int Compute_and_setup_dma(struct comedi_device *dev)
1176 } 1337 }
1177#endif 1338#endif
1178 1339
1179 outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & (~EN_A2P_TRANSFERS), devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */ 1340 outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & (~EN_A2P_TRANSFERS),
1341 devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */
1180 outl(devpriv->dmabuf_hw[0], devpriv->iobase_a + AMCC_OP_REG_MWAR); 1342 outl(devpriv->dmabuf_hw[0], devpriv->iobase_a + AMCC_OP_REG_MWAR);
1181 outl(devpriv->dmabuf_use_size[0], devpriv->iobase_a + AMCC_OP_REG_MWTC); 1343 outl(devpriv->dmabuf_use_size[0], devpriv->iobase_a + AMCC_OP_REG_MWTC);
1182 /* init DMA transfer */ 1344 /* init DMA transfer */
1183 outl(0x00000000 | AINT_WRITE_COMPL, 1345 outl(0x00000000 | AINT_WRITE_COMPL,
1184 devpriv->iobase_a + AMCC_OP_REG_INTCSR); 1346 devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1185/* outl(0x02000000|AINT_WRITE_COMPL, devpriv->iobase_a+AMCC_OP_REG_INTCSR); */ 1347/* outl(0x02000000|AINT_WRITE_COMPL, devpriv->iobase_a+AMCC_OP_REG_INTCSR); */
@@ -1187,7 +1349,9 @@ static int Compute_and_setup_dma(struct comedi_device *dev)
1187 outl(inl(devpriv->iobase_a + 1349 outl(inl(devpriv->iobase_a +
1188 AMCC_OP_REG_MCSR) | RESET_A2P_FLAGS | A2P_HI_PRIORITY | 1350 AMCC_OP_REG_MCSR) | RESET_A2P_FLAGS | A2P_HI_PRIORITY |
1189 EN_A2P_TRANSFERS, devpriv->iobase_a + AMCC_OP_REG_MCSR); 1351 EN_A2P_TRANSFERS, devpriv->iobase_a + AMCC_OP_REG_MCSR);
1190 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | EN_A2P_TRANSFERS, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow bus mastering */ 1352 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | EN_A2P_TRANSFERS,
1353 devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1354 /* allow bus mastering */
1191 1355
1192 DPRINTK("adl_pci9118 EDBG: END: Compute_and_setup_dma()\n"); 1356 DPRINTK("adl_pci9118 EDBG: END: Compute_and_setup_dma()\n");
1193 return 0; 1357 return 0;
@@ -1220,17 +1384,21 @@ static int pci9118_ai_docmd_sampl(struct comedi_device *dev,
1220 return -EIO; 1384 return -EIO;
1221 }; 1385 };
1222 1386
1223 devpriv->int_ai_func = interrupt_pci9118_ai_onesample; /* transfer function */ 1387 devpriv->int_ai_func = interrupt_pci9118_ai_onesample;
1388 /* transfer function */
1224 1389
1225 if (devpriv->ai12_startstop) 1390 if (devpriv->ai12_startstop)
1226 pci9118_exttrg_add(dev, EXTTRG_AI); /* activate EXT trigger */ 1391 pci9118_exttrg_add(dev, EXTTRG_AI);
1392 /* activate EXT trigger */
1227 1393
1228 if ((devpriv->ai_do == 1) || (devpriv->ai_do == 2)) 1394 if ((devpriv->ai_do == 1) || (devpriv->ai_do == 2))
1229 devpriv->IntControlReg |= Int_Timer; 1395 devpriv->IntControlReg |= Int_Timer;
1230 1396
1231 devpriv->AdControlReg |= AdControl_Int; 1397 devpriv->AdControlReg |= AdControl_Int;
1232 1398
1233 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow INT in AMCC */ 1399 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00,
1400 devpriv->iobase_a + AMCC_OP_REG_INTCSR);
1401 /* allow INT in AMCC */
1234 1402
1235 if (!(devpriv->ai12_startstop & (START_AI_EXT | START_AI_INT))) { 1403 if (!(devpriv->ai12_startstop & (START_AI_EXT | START_AI_INT))) {
1236 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); 1404 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
@@ -1296,10 +1464,12 @@ static int pci9118_ai_docmd_dma(struct comedi_device *dev,
1296 }; 1464 };
1297 1465
1298 if (devpriv->ai12_startstop) { 1466 if (devpriv->ai12_startstop) {
1299 pci9118_exttrg_add(dev, EXTTRG_AI); /* activate EXT trigger */ 1467 pci9118_exttrg_add(dev, EXTTRG_AI);
1468 /* activate EXT trigger */
1300 } 1469 }
1301 1470
1302 devpriv->int_ai_func = interrupt_pci9118_ai_dma; /* transfer function */ 1471 devpriv->int_ai_func = interrupt_pci9118_ai_dma;
1472 /* transfer function */
1303 1473
1304 outl(0x02000000 | AINT_WRITE_COMPL, 1474 outl(0x02000000 | AINT_WRITE_COMPL,
1305 devpriv->iobase_a + AMCC_OP_REG_INTCSR); 1475 devpriv->iobase_a + AMCC_OP_REG_INTCSR);
@@ -1342,7 +1512,7 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1342 devpriv->ai_add_back = 0; 1512 devpriv->ai_add_back = 0;
1343 devpriv->ai_maskerr = 0x10e; 1513 devpriv->ai_maskerr = 0x10e;
1344 1514
1345 /* prepare for start/stop conditions */ 1515 /* prepare for start/stop conditions */
1346 if (cmd->start_src == TRIG_EXT) 1516 if (cmd->start_src == TRIG_EXT)
1347 devpriv->ai12_startstop |= START_AI_EXT; 1517 devpriv->ai12_startstop |= START_AI_EXT;
1348 if (cmd->stop_src == TRIG_EXT) { 1518 if (cmd->stop_src == TRIG_EXT) {
@@ -1369,10 +1539,10 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1369 devpriv->ai_scans = 0; 1539 devpriv->ai_scans = 0;
1370 } 1540 }
1371 1541
1372 /* use sample&hold signal? */ 1542 /* use sample&hold signal? */
1373 if (cmd->convert_src == TRIG_NOW) { 1543 if (cmd->convert_src == TRIG_NOW) {
1374 devpriv->usessh = 1; 1544 devpriv->usessh = 1;
1375 } /* yes */ 1545 } /* yes */
1376 else { 1546 else {
1377 devpriv->usessh = 0; 1547 devpriv->usessh = 0;
1378 } /* no */ 1548 } /* no */
@@ -1381,7 +1551,10 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1381 devpriv->ai_neverending, devpriv->ai_scans, devpriv->usessh, 1551 devpriv->ai_neverending, devpriv->ai_scans, devpriv->usessh,
1382 devpriv->ai12_startstop); 1552 devpriv->ai12_startstop);
1383 1553
1384 /* use additional sample at end of every scan to satisty DMA 32 bit transfer? */ 1554 /*
1555 * use additional sample at end of every scan
1556 * to satisty DMA 32 bit transfer?
1557 */
1385 devpriv->ai_add_front = 0; 1558 devpriv->ai_add_front = 0;
1386 devpriv->ai_add_back = 0; 1559 devpriv->ai_add_back = 0;
1387 devpriv->useeoshandle = 0; 1560 devpriv->useeoshandle = 0;
@@ -1393,27 +1566,44 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1393 devpriv->ai_add_back = 1; 1566 devpriv->ai_add_back = 1;
1394 } 1567 }
1395 if (cmd->convert_src == TRIG_TIMER) { 1568 if (cmd->convert_src == TRIG_TIMER) {
1396 devpriv->usedma = 0; /* use INT transfer if scanlist have only one channel */ 1569 devpriv->usedma = 0;
1570 /*
1571 * use INT transfer if scanlist
1572 * have only one channel
1573 */
1397 } 1574 }
1398 } 1575 }
1399 if ((cmd->flags & TRIG_WAKE_EOS) && 1576 if ((cmd->flags & TRIG_WAKE_EOS) &&
1400 (devpriv->ai_n_scanlen & 1) && 1577 (devpriv->ai_n_scanlen & 1) &&
1401 (devpriv->ai_n_scanlen > 1)) { 1578 (devpriv->ai_n_scanlen > 1)) {
1402 if (cmd->scan_begin_src == TRIG_FOLLOW) { 1579 if (cmd->scan_begin_src == TRIG_FOLLOW) {
1403 /* vpriv->useeoshandle=1; // change DMA transfer block to fit EOS on every second call */ 1580 /*
1404 devpriv->usedma = 0; /* XXX maybe can be corrected to use 16 bit DMA */ 1581 * vpriv->useeoshandle=1; // change DMA transfer
1405 } else { /* well, we must insert one sample to end of EOS to meet 32 bit transfer */ 1582 * block to fit EOS on every second call
1583 */
1584 devpriv->usedma = 0;
1585 /*
1586 * XXX maybe can be corrected to use 16 bit DMA
1587 */
1588 } else { /*
1589 * well, we must insert one sample
1590 * to end of EOS to meet 32 bit transfer
1591 */
1406 devpriv->ai_add_back = 1; 1592 devpriv->ai_add_back = 1;
1407 } 1593 }
1408 } 1594 }
1409 } else { /* interrupt transfer don't need any correction */ 1595 } else { /* interrupt transfer don't need any correction */
1410 devpriv->usedma = 0; 1596 devpriv->usedma = 0;
1411 } 1597 }
1412 1598
1413 /* we need software S&H signal? It add two samples before every scan as minimum */ 1599 /*
1600 * we need software S&H signal?
1601 * It adds two samples before every scan as minimum
1602 */
1414 if (devpriv->usessh && devpriv->softsshdelay) { 1603 if (devpriv->usessh && devpriv->softsshdelay) {
1415 devpriv->ai_add_front = 2; 1604 devpriv->ai_add_front = 2;
1416 if ((devpriv->usedma == 1) && (devpriv->ai_add_back == 1)) { /* move it to front */ 1605 if ((devpriv->usedma == 1) && (devpriv->ai_add_back == 1)) {
1606 /* move it to front */
1417 devpriv->ai_add_front++; 1607 devpriv->ai_add_front++;
1418 devpriv->ai_add_back = 0; 1608 devpriv->ai_add_back = 0;
1419 } 1609 }
@@ -1422,17 +1612,22 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1422 addchans = devpriv->softsshdelay / cmd->convert_arg; 1612 addchans = devpriv->softsshdelay / cmd->convert_arg;
1423 if (devpriv->softsshdelay % cmd->convert_arg) 1613 if (devpriv->softsshdelay % cmd->convert_arg)
1424 addchans++; 1614 addchans++;
1425 if (addchans > (devpriv->ai_add_front - 1)) { /* uff, still short :-( */ 1615 if (addchans > (devpriv->ai_add_front - 1)) {
1616 /* uff, still short */
1426 devpriv->ai_add_front = addchans + 1; 1617 devpriv->ai_add_front = addchans + 1;
1427 if (devpriv->usedma == 1) 1618 if (devpriv->usedma == 1)
1428 if ((devpriv->ai_add_front + 1619 if ((devpriv->ai_add_front +
1429 devpriv->ai_n_chan + 1620 devpriv->ai_n_chan +
1430 devpriv->ai_add_back) & 1) 1621 devpriv->ai_add_back) & 1)
1431 devpriv->ai_add_front++; /* round up to 32 bit */ 1622 devpriv->ai_add_front++;
1623 /* round up to 32 bit */
1432 } 1624 }
1433 } 1625 }
1434 /* well, we now know what must be all added */ 1626 /* well, we now know what must be all added */
1435 devpriv->ai_n_realscanlen = /* what we must take from card in real to have ai_n_scanlen on output? */ 1627 devpriv->ai_n_realscanlen = /*
1628 * what we must take from card in real
1629 * to have ai_n_scanlen on output?
1630 */
1436 (devpriv->ai_add_front + devpriv->ai_n_chan + 1631 (devpriv->ai_add_front + devpriv->ai_n_chan +
1437 devpriv->ai_add_back) * (devpriv->ai_n_scanlen / 1632 devpriv->ai_add_back) * (devpriv->ai_n_scanlen /
1438 devpriv->ai_n_chan); 1633 devpriv->ai_n_chan);
@@ -1443,7 +1638,7 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1443 devpriv->ai_n_chan, devpriv->ai_add_back, 1638 devpriv->ai_n_chan, devpriv->ai_add_back,
1444 devpriv->ai_n_scanlen); 1639 devpriv->ai_n_scanlen);
1445 1640
1446 /* check and setup channel list */ 1641 /* check and setup channel list */
1447 if (!check_channel_list(dev, s, devpriv->ai_n_chan, 1642 if (!check_channel_list(dev, s, devpriv->ai_n_chan,
1448 devpriv->ai_chanlist, devpriv->ai_add_front, 1643 devpriv->ai_chanlist, devpriv->ai_add_front,
1449 devpriv->ai_add_back)) 1644 devpriv->ai_add_back))
@@ -1454,9 +1649,16 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1454 devpriv->useeoshandle)) 1649 devpriv->useeoshandle))
1455 return -EINVAL; 1650 return -EINVAL;
1456 1651
1457 /* compute timers settings */ 1652 /* compute timers settings */
1458 /* simplest way, fr=4Mhz/(tim1*tim2), channel manipulation without timers effect */ 1653 /*
1459 if (((cmd->scan_begin_src == TRIG_FOLLOW) || (cmd->scan_begin_src == TRIG_EXT) || (cmd->scan_begin_src == TRIG_INT)) && (cmd->convert_src == TRIG_TIMER)) { /* both timer is used for one time */ 1654 * simplest way, fr=4Mhz/(tim1*tim2),
1655 * channel manipulation without timers effect
1656 */
1657 if (((cmd->scan_begin_src == TRIG_FOLLOW) ||
1658 (cmd->scan_begin_src == TRIG_EXT) ||
1659 (cmd->scan_begin_src == TRIG_INT)) &&
1660 (cmd->convert_src == TRIG_TIMER)) {
1661 /* both timer is used for one time */
1460 if (cmd->scan_begin_src == TRIG_EXT) { 1662 if (cmd->scan_begin_src == TRIG_EXT) {
1461 devpriv->ai_do = 4; 1663 devpriv->ai_do = 4;
1462 } else { 1664 } else {
@@ -1472,10 +1674,14 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1472 devpriv->ai_timer2 = cmd->convert_arg; 1674 devpriv->ai_timer2 = cmd->convert_arg;
1473 } 1675 }
1474 1676
1475 if ((cmd->scan_begin_src == TRIG_TIMER) && ((cmd->convert_src == TRIG_TIMER) || (cmd->convert_src == TRIG_NOW))) { /* double timed action */ 1677 if ((cmd->scan_begin_src == TRIG_TIMER) &&
1678 ((cmd->convert_src == TRIG_TIMER) ||
1679 (cmd->convert_src == TRIG_NOW))) {
1680 /* double timed action */
1476 if (!devpriv->usedma) { 1681 if (!devpriv->usedma) {
1477 comedi_error(dev, 1682 comedi_error(dev,
1478 "cmd->scan_begin_src=TRIG_TIMER works only with bus mastering!"); 1683 "cmd->scan_begin_src=TRIG_TIMER works "
1684 "only with bus mastering!");
1479 return -EIO; 1685 return -EIO;
1480 } 1686 }
1481 1687
@@ -1496,15 +1702,27 @@ static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1496 devpriv->ai_do = 3; 1702 devpriv->ai_do = 3;
1497 } 1703 }
1498 1704
1499 start_pacer(dev, -1, 0, 0); /* stop pacer */ 1705 start_pacer(dev, -1, 0, 0); /* stop pacer */
1500 1706
1501 devpriv->AdControlReg = 0; /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable DMA */ 1707 devpriv->AdControlReg = 0; /*
1708 * bipolar, S.E., use 8254, stop 8354,
1709 * internal trigger, soft trigger,
1710 * disable DMA
1711 */
1502 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); 1712 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
1503 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ 1713 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
1714 /*
1715 * positive triggers, no S&H, no burst,
1716 * burst stop, no post trigger,
1717 * no about trigger, trigger stop
1718 */
1504 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); 1719 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
1505 udelay(1); 1720 udelay(1);
1506 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 1721 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
1507 inl(dev->iobase + PCI9118_ADSTAT); /* flush A/D and INT status register */ 1722 inl(dev->iobase + PCI9118_ADSTAT); /*
1723 * flush A/D and INT
1724 * status register
1725 */
1508 inl(dev->iobase + PCI9118_INTSRC); 1726 inl(dev->iobase + PCI9118_INTSRC);
1509 1727
1510 devpriv->ai_act_scan = 0; 1728 devpriv->ai_act_scan = 0;
@@ -1537,33 +1755,37 @@ static int check_channel_list(struct comedi_device *dev,
1537 } 1755 }
1538 if ((frontadd + n_chan + backadd) > s->len_chanlist) { 1756 if ((frontadd + n_chan + backadd) > s->len_chanlist) {
1539 printk 1757 printk
1540 ("comedi%d: range/channel list is too long for actual configuration (%d>%d)!", 1758 ("comedi%d: range/channel list is too long for "
1759 "actual configuration (%d>%d)!",
1541 dev->minor, n_chan, s->len_chanlist - frontadd - backadd); 1760 dev->minor, n_chan, s->len_chanlist - frontadd - backadd);
1542 return 0; 1761 return 0;
1543 } 1762 }
1544 1763
1545 if (CR_AREF(chanlist[0]) == AREF_DIFF) 1764 if (CR_AREF(chanlist[0]) == AREF_DIFF)
1546 differencial = 1; /* all input must be diff */ 1765 differencial = 1; /* all input must be diff */
1547 if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES) 1766 if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES)
1548 bipolar = 1; /* all input must be bipolar */ 1767 bipolar = 1; /* all input must be bipolar */
1549 if (n_chan > 1) 1768 if (n_chan > 1)
1550 for (i = 1; i < n_chan; i++) { /* check S.E/diff */ 1769 for (i = 1; i < n_chan; i++) { /* check S.E/diff */
1551 if ((CR_AREF(chanlist[i]) == AREF_DIFF) != 1770 if ((CR_AREF(chanlist[i]) == AREF_DIFF) !=
1552 (differencial)) { 1771 (differencial)) {
1553 comedi_error(dev, 1772 comedi_error(dev,
1554 "Differencial and single ended inputs cann't be mixtured!"); 1773 "Differencial and single ended "
1774 "inputs can't be mixtured!");
1555 return 0; 1775 return 0;
1556 } 1776 }
1557 if ((CR_RANGE(chanlist[i]) < PCI9118_BIPOLAR_RANGES) != 1777 if ((CR_RANGE(chanlist[i]) < PCI9118_BIPOLAR_RANGES) !=
1558 (bipolar)) { 1778 (bipolar)) {
1559 comedi_error(dev, 1779 comedi_error(dev,
1560 "Bipolar and unipolar ranges cann't be mixtured!"); 1780 "Bipolar and unipolar ranges "
1781 "can't be mixtured!");
1561 return 0; 1782 return 0;
1562 } 1783 }
1563 if ((!devpriv->usemux) & (differencial) & 1784 if ((!devpriv->usemux) & (differencial) &
1564 (CR_CHAN(chanlist[i]) >= this_board->n_aichand)) { 1785 (CR_CHAN(chanlist[i]) >= this_board->n_aichand)) {
1565 comedi_error(dev, 1786 comedi_error(dev,
1566 "If AREF_DIFF is used then is available only first 8 channels!"); 1787 "If AREF_DIFF is used then is "
1788 "available only first 8 channels!");
1567 return 0; 1789 return 0;
1568 } 1790 }
1569 } 1791 }
@@ -1583,7 +1805,8 @@ static int setup_channel_list(struct comedi_device *dev,
1583 unsigned int scanquad, gain, ssh = 0x00; 1805 unsigned int scanquad, gain, ssh = 0x00;
1584 1806
1585 DPRINTK 1807 DPRINTK
1586 ("adl_pci9118 EDBG: BGN: setup_channel_list(%d,.,%d,.,%d,%d,%d,%d)\n", 1808 ("adl_pci9118 EDBG: BGN: setup_channel_list"
1809 "(%d,.,%d,.,%d,%d,%d,%d)\n",
1587 dev->minor, n_chan, rot, frontadd, backadd, usedma); 1810 dev->minor, n_chan, rot, frontadd, backadd, usedma);
1588 1811
1589 if (usedma == 1) { 1812 if (usedma == 1) {
@@ -1592,27 +1815,33 @@ static int setup_channel_list(struct comedi_device *dev,
1592 } 1815 }
1593 1816
1594 if (CR_AREF(chanlist[0]) == AREF_DIFF) 1817 if (CR_AREF(chanlist[0]) == AREF_DIFF)
1595 differencial = 1; /* all input must be diff */ 1818 differencial = 1; /* all input must be diff */
1596 if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES) 1819 if (CR_RANGE(chanlist[0]) < PCI9118_BIPOLAR_RANGES)
1597 bipolar = 1; /* all input must be bipolar */ 1820 bipolar = 1; /* all input must be bipolar */
1598 1821
1599 /* All is ok, so we can setup channel/range list */ 1822 /* All is ok, so we can setup channel/range list */
1600 1823
1601 if (!bipolar) { 1824 if (!bipolar) {
1602 devpriv->AdControlReg |= AdControl_UniP; /* set unibipolar */ 1825 devpriv->AdControlReg |= AdControl_UniP;
1826 /* set unibipolar */
1603 } else { 1827 } else {
1604 devpriv->AdControlReg &= ((~AdControl_UniP) & 0xff); /* enable bipolar */ 1828 devpriv->AdControlReg &= ((~AdControl_UniP) & 0xff);
1829 /* enable bipolar */
1605 } 1830 }
1606 1831
1607 if (differencial) { 1832 if (differencial) {
1608 devpriv->AdControlReg |= AdControl_Diff; /* enable diff inputs */ 1833 devpriv->AdControlReg |= AdControl_Diff;
1834 /* enable diff inputs */
1609 } else { 1835 } else {
1610 devpriv->AdControlReg &= ((~AdControl_Diff) & 0xff); /* set single ended inputs */ 1836 devpriv->AdControlReg &= ((~AdControl_Diff) & 0xff);
1837 /* set single ended inputs */
1611 } 1838 }
1612 1839
1613 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* setup mode */ 1840 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
1841 /* setup mode */
1614 1842
1615 outl(2, dev->iobase + PCI9118_SCANMOD); /* gods know why this sequence! */ 1843 outl(2, dev->iobase + PCI9118_SCANMOD);
1844 /* gods know why this sequence! */
1616 outl(0, dev->iobase + PCI9118_SCANMOD); 1845 outl(0, dev->iobase + PCI9118_SCANMOD);
1617 outl(1, dev->iobase + PCI9118_SCANMOD); 1846 outl(1, dev->iobase + PCI9118_SCANMOD);
1618 1847
@@ -1622,12 +1851,15 @@ static int setup_channel_list(struct comedi_device *dev,
1622 devpriv->chanlist[i] = 0x55aa; 1851 devpriv->chanlist[i] = 0x55aa;
1623#endif 1852#endif
1624 1853
1625 if (frontadd) { /* insert channels for S&H */ 1854 if (frontadd) { /* insert channels for S&H */
1626 ssh = devpriv->softsshsample; 1855 ssh = devpriv->softsshsample;
1627 DPRINTK("FA: %04x: ", ssh); 1856 DPRINTK("FA: %04x: ", ssh);
1628 for (i = 0; i < frontadd; i++) { /* store range list to card */ 1857 for (i = 0; i < frontadd; i++) {
1629 scanquad = CR_CHAN(chanlist[0]); /* get channel number; */ 1858 /* store range list to card */
1630 gain = CR_RANGE(chanlist[0]); /* get gain number */ 1859 scanquad = CR_CHAN(chanlist[0]);
1860 /* get channel number; */
1861 gain = CR_RANGE(chanlist[0]);
1862 /* get gain number */
1631 scanquad |= ((gain & 0x03) << 8); 1863 scanquad |= ((gain & 0x03) << 8);
1632 outl(scanquad | ssh, dev->iobase + PCI9118_GAIN); 1864 outl(scanquad | ssh, dev->iobase + PCI9118_GAIN);
1633 DPRINTK("%02x ", scanquad | ssh); 1865 DPRINTK("%02x ", scanquad | ssh);
@@ -1637,23 +1869,24 @@ static int setup_channel_list(struct comedi_device *dev,
1637 } 1869 }
1638 1870
1639 DPRINTK("SL: ", ssh); 1871 DPRINTK("SL: ", ssh);
1640 for (i = 0; i < n_chan; i++) { /* store range list to card */ 1872 for (i = 0; i < n_chan; i++) { /* store range list to card */
1641 scanquad = CR_CHAN(chanlist[i]); /* get channel number; */ 1873 scanquad = CR_CHAN(chanlist[i]); /* get channel number */
1642#ifdef PCI9118_PARANOIDCHECK 1874#ifdef PCI9118_PARANOIDCHECK
1643 devpriv->chanlist[i ^ usedma] = (scanquad & 0xf) << rot; 1875 devpriv->chanlist[i ^ usedma] = (scanquad & 0xf) << rot;
1644#endif 1876#endif
1645 gain = CR_RANGE(chanlist[i]); /* get gain number */ 1877 gain = CR_RANGE(chanlist[i]); /* get gain number */
1646 scanquad |= ((gain & 0x03) << 8); 1878 scanquad |= ((gain & 0x03) << 8);
1647 outl(scanquad | ssh, dev->iobase + PCI9118_GAIN); 1879 outl(scanquad | ssh, dev->iobase + PCI9118_GAIN);
1648 DPRINTK("%02x ", scanquad | ssh); 1880 DPRINTK("%02x ", scanquad | ssh);
1649 } 1881 }
1650 DPRINTK("\n "); 1882 DPRINTK("\n ");
1651 1883
1652 if (backadd) { /* insert channels for fit onto 32bit DMA */ 1884 if (backadd) { /* insert channels for fit onto 32bit DMA */
1653 DPRINTK("BA: %04x: ", ssh); 1885 DPRINTK("BA: %04x: ", ssh);
1654 for (i = 0; i < backadd; i++) { /* store range list to card */ 1886 for (i = 0; i < backadd; i++) { /* store range list to card */
1655 scanquad = CR_CHAN(chanlist[0]); /* get channel number; */ 1887 scanquad = CR_CHAN(chanlist[0]);
1656 gain = CR_RANGE(chanlist[0]); /* get gain number */ 1888 /* get channel number */
1889 gain = CR_RANGE(chanlist[0]); /* get gain number */
1657 scanquad |= ((gain & 0x03) << 8); 1890 scanquad |= ((gain & 0x03) << 8);
1658 outl(scanquad | ssh, dev->iobase + PCI9118_GAIN); 1891 outl(scanquad | ssh, dev->iobase + PCI9118_GAIN);
1659 DPRINTK("%02x ", scanquad | ssh); 1892 DPRINTK("%02x ", scanquad | ssh);
@@ -1661,30 +1894,33 @@ static int setup_channel_list(struct comedi_device *dev,
1661 DPRINTK("\n "); 1894 DPRINTK("\n ");
1662 } 1895 }
1663#ifdef PCI9118_PARANOIDCHECK 1896#ifdef PCI9118_PARANOIDCHECK
1664 devpriv->chanlist[n_chan ^ usedma] = devpriv->chanlist[0 ^ usedma]; /* for 32bit oerations */ 1897 devpriv->chanlist[n_chan ^ usedma] = devpriv->chanlist[0 ^ usedma];
1898 /* for 32bit operations */
1665 if (useeos) { 1899 if (useeos) {
1666 for (i = 1; i < n_chan; i++) { /* store range list to card */ 1900 for (i = 1; i < n_chan; i++) { /* store range list to card */
1667 devpriv->chanlist[(n_chan + i) ^ usedma] = 1901 devpriv->chanlist[(n_chan + i) ^ usedma] =
1668 (CR_CHAN(chanlist[i]) & 0xf) << rot; 1902 (CR_CHAN(chanlist[i]) & 0xf) << rot;
1669 } 1903 }
1670 devpriv->chanlist[(2 * n_chan) ^ usedma] = devpriv->chanlist[0 ^ usedma]; /* for 32bit oerations */ 1904 devpriv->chanlist[(2 * n_chan) ^ usedma] =
1905 devpriv->chanlist[0 ^ usedma];
1906 /* for 32bit operations */
1671 useeos = 2; 1907 useeos = 2;
1672 } else { 1908 } else {
1673 useeos = 1; 1909 useeos = 1;
1674 } 1910 }
1675#ifdef PCI9118_EXTDEBUG 1911#ifdef PCI9118_EXTDEBUG
1676 DPRINTK("CHL: "); 1912 DPRINTK("CHL: ");
1677 for (i = 0; i <= (useeos * n_chan); i++) { 1913 for (i = 0; i <= (useeos * n_chan); i++)
1678 DPRINTK("%04x ", devpriv->chanlist[i]); 1914 DPRINTK("%04x ", devpriv->chanlist[i]);
1679 } 1915
1680 DPRINTK("\n "); 1916 DPRINTK("\n ");
1681#endif 1917#endif
1682#endif 1918#endif
1683 outl(0, dev->iobase + PCI9118_SCANMOD); /* close scan queue */ 1919 outl(0, dev->iobase + PCI9118_SCANMOD); /* close scan queue */
1684/* udelay(100); important delay, or first sample will be cripled */ 1920 /* udelay(100); important delay, or first sample will be crippled */
1685 1921
1686 DPRINTK("adl_pci9118 EDBG: END: setup_channel_list()\n"); 1922 DPRINTK("adl_pci9118 EDBG: END: setup_channel_list()\n");
1687 return 1; /* we can serve this with scan logic */ 1923 return 1; /* we can serve this with scan logic */
1688} 1924}
1689 1925
1690/* 1926/*
@@ -1699,7 +1935,8 @@ static void pci9118_calc_divisors(char mode, struct comedi_device *dev,
1699 char usessh, unsigned int chnsshfront) 1935 char usessh, unsigned int chnsshfront)
1700{ 1936{
1701 DPRINTK 1937 DPRINTK
1702 ("adl_pci9118 EDBG: BGN: pci9118_calc_divisors(%d,%d,.,%u,%u,%u,%d,.,.,,%u,%u)\n", 1938 ("adl_pci9118 EDBG: BGN: pci9118_calc_divisors"
1939 "(%d,%d,.,%u,%u,%u,%d,.,.,,%u,%u)\n",
1703 mode, dev->minor, *tim1, *tim2, flags, chans, usessh, chnsshfront); 1940 mode, dev->minor, *tim1, *tim2, flags, chans, usessh, chnsshfront);
1704 switch (mode) { 1941 switch (mode) {
1705 case 1: 1942 case 1:
@@ -1716,17 +1953,18 @@ static void pci9118_calc_divisors(char mode, struct comedi_device *dev,
1716 *tim2 = this_board->ai_ns_min; 1953 *tim2 = this_board->ai_ns_min;
1717 DPRINTK("1 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, 1954 DPRINTK("1 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2,
1718 *tim1, *tim2); 1955 *tim1, *tim2);
1719 *div1 = *tim2 / devpriv->i8254_osc_base; /* convert timer (burst) */ 1956 *div1 = *tim2 / devpriv->i8254_osc_base;
1957 /* convert timer (burst) */
1720 DPRINTK("2 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, 1958 DPRINTK("2 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2,
1721 *tim1, *tim2); 1959 *tim1, *tim2);
1722 if (*div1 < this_board->ai_pacer_min) 1960 if (*div1 < this_board->ai_pacer_min)
1723 *div1 = this_board->ai_pacer_min; 1961 *div1 = this_board->ai_pacer_min;
1724 DPRINTK("3 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, 1962 DPRINTK("3 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2,
1725 *tim1, *tim2); 1963 *tim1, *tim2);
1726 *div2 = *tim1 / devpriv->i8254_osc_base; /* scan timer */ 1964 *div2 = *tim1 / devpriv->i8254_osc_base; /* scan timer */
1727 DPRINTK("4 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, 1965 DPRINTK("4 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2,
1728 *tim1, *tim2); 1966 *tim1, *tim2);
1729 *div2 = *div2 / *div1; /* major timer is c1*c2 */ 1967 *div2 = *div2 / *div1; /* major timer is c1*c2 */
1730 DPRINTK("5 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, 1968 DPRINTK("5 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2,
1731 *tim1, *tim2); 1969 *tim1, *tim2);
1732 if (*div2 < chans) 1970 if (*div2 < chans)
@@ -1734,9 +1972,10 @@ static void pci9118_calc_divisors(char mode, struct comedi_device *dev,
1734 DPRINTK("6 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2, 1972 DPRINTK("6 div1=%u div2=%u timer1=%u timer2=%u\n", *div1, *div2,
1735 *tim1, *tim2); 1973 *tim1, *tim2);
1736 1974
1737 *tim2 = *div1 * devpriv->i8254_osc_base; /* real convert timer */ 1975 *tim2 = *div1 * devpriv->i8254_osc_base;
1976 /* real convert timer */
1738 1977
1739 if (usessh & (chnsshfront == 0)) /* use BSSH signal */ 1978 if (usessh & (chnsshfront == 0)) /* use BSSH signal */
1740 if (*div2 < (chans + 2)) 1979 if (*div2 < (chans + 2))
1741 *div2 = chans + 2; 1980 *div2 = chans + 2;
1742 1981
@@ -1776,11 +2015,13 @@ static void start_pacer(struct comedi_device *dev, int mode,
1776static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source) 2015static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source)
1777{ 2016{
1778 if (source > 3) 2017 if (source > 3)
1779 return -1; /* incorrect source */ 2018 return -1; /* incorrect source */
1780 devpriv->exttrg_users |= (1 << source); 2019 devpriv->exttrg_users |= (1 << source);
1781 devpriv->IntControlReg |= Int_DTrg; 2020 devpriv->IntControlReg |= Int_DTrg;
1782 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); 2021 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
1783 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow INT in AMCC */ 2022 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00,
2023 devpriv->iobase_a + AMCC_OP_REG_INTCSR);
2024 /* allow INT in AMCC */
1784 return 0; 2025 return 0;
1785} 2026}
1786 2027
@@ -1790,12 +2031,15 @@ static int pci9118_exttrg_add(struct comedi_device *dev, unsigned char source)
1790static int pci9118_exttrg_del(struct comedi_device *dev, unsigned char source) 2031static int pci9118_exttrg_del(struct comedi_device *dev, unsigned char source)
1791{ 2032{
1792 if (source > 3) 2033 if (source > 3)
1793 return -1; /* incorrect source */ 2034 return -1; /* incorrect source */
1794 devpriv->exttrg_users &= ~(1 << source); 2035 devpriv->exttrg_users &= ~(1 << source);
1795 if (!devpriv->exttrg_users) { /* shutdown ext trg intterrupts */ 2036 if (!devpriv->exttrg_users) { /* shutdown ext trg intterrupts */
1796 devpriv->IntControlReg &= ~Int_DTrg; 2037 devpriv->IntControlReg &= ~Int_DTrg;
1797 if (!devpriv->IntControlReg) /* all IRQ disabled */ 2038 if (!devpriv->IntControlReg) /* all IRQ disabled */
1798 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) & (~0x00001f00), devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* disable int in AMCC */ 2039 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) &
2040 (~0x00001f00),
2041 devpriv->iobase_a + AMCC_OP_REG_INTCSR);
2042 /* disable int in AMCC */
1799 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); 2043 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
1800 } 2044 }
1801 return 0; 2045 return 0;
@@ -1808,17 +2052,29 @@ static int pci9118_ai_cancel(struct comedi_device *dev,
1808 struct comedi_subdevice *s) 2052 struct comedi_subdevice *s)
1809{ 2053{
1810 if (devpriv->usedma) 2054 if (devpriv->usedma)
1811 outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) & (~EN_A2P_TRANSFERS), devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */ 2055 outl(inl(devpriv->iobase_a + AMCC_OP_REG_MCSR) &
2056 (~EN_A2P_TRANSFERS),
2057 devpriv->iobase_a + AMCC_OP_REG_MCSR); /* stop DMA */
1812 pci9118_exttrg_del(dev, EXTTRG_AI); 2058 pci9118_exttrg_del(dev, EXTTRG_AI);
1813 start_pacer(dev, 0, 0, 0); /* stop 8254 counters */ 2059 start_pacer(dev, 0, 0, 0); /* stop 8254 counters */
1814 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; 2060 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
1815 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ 2061 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
2062 /*
2063 * positive triggers, no S&H, no burst,
2064 * burst stop, no post trigger,
2065 * no about trigger, trigger stop
2066 */
1816 devpriv->AdControlReg = 0x00; 2067 devpriv->AdControlReg = 0x00;
1817 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable INT and DMA */ 2068 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
2069 /*
2070 * bipolar, S.E., use 8254, stop 8354,
2071 * internal trigger, soft trigger,
2072 * disable INT and DMA
2073 */
1818 outl(0, dev->iobase + PCI9118_BURST); 2074 outl(0, dev->iobase + PCI9118_BURST);
1819 outl(1, dev->iobase + PCI9118_SCANMOD); 2075 outl(1, dev->iobase + PCI9118_SCANMOD);
1820 outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */ 2076 outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */
1821 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 2077 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
1822 2078
1823 devpriv->ai_do = 0; 2079 devpriv->ai_do = 0;
1824 devpriv->usedma = 0; 2080 devpriv->usedma = 0;
@@ -1832,7 +2088,9 @@ static int pci9118_ai_cancel(struct comedi_device *dev,
1832 devpriv->dma_actbuf = 0; 2088 devpriv->dma_actbuf = 0;
1833 2089
1834 if (!devpriv->IntControlReg) 2090 if (!devpriv->IntControlReg)
1835 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00, devpriv->iobase_a + AMCC_OP_REG_INTCSR); /* allow INT in AMCC */ 2091 outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | 0x1f00,
2092 devpriv->iobase_a + AMCC_OP_REG_INTCSR);
2093 /* allow INT in AMCC */
1836 2094
1837 return 0; 2095 return 0;
1838} 2096}
@@ -1845,31 +2103,52 @@ static int pci9118_reset(struct comedi_device *dev)
1845 devpriv->IntControlReg = 0; 2103 devpriv->IntControlReg = 0;
1846 devpriv->exttrg_users = 0; 2104 devpriv->exttrg_users = 0;
1847 inl(dev->iobase + PCI9118_INTCTRL); 2105 inl(dev->iobase + PCI9118_INTCTRL);
1848 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL); /* disable interrupts source */ 2106 outl(devpriv->IntControlReg, dev->iobase + PCI9118_INTCTRL);
2107 /* disable interrupts source */
1849 outl(0x30, dev->iobase + PCI9118_CNTCTRL); 2108 outl(0x30, dev->iobase + PCI9118_CNTCTRL);
1850/* outl(0xb4, dev->iobase + PCI9118_CNTCTRL); */ 2109/* outl(0xb4, dev->iobase + PCI9118_CNTCTRL); */
1851 start_pacer(dev, 0, 0, 0); /* stop 8254 counters */ 2110 start_pacer(dev, 0, 0, 0); /* stop 8254 counters */
1852 devpriv->AdControlReg = 0; 2111 devpriv->AdControlReg = 0;
1853 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable INT and DMA */ 2112 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
2113 /*
2114 * bipolar, S.E., use 8254,
2115 * stop 8354, internal trigger,
2116 * soft trigger,
2117 * disable INT and DMA
2118 */
1854 outl(0, dev->iobase + PCI9118_BURST); 2119 outl(0, dev->iobase + PCI9118_BURST);
1855 outl(1, dev->iobase + PCI9118_SCANMOD); 2120 outl(1, dev->iobase + PCI9118_SCANMOD);
1856 outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */ 2121 outl(2, dev->iobase + PCI9118_SCANMOD); /* reset scan queue */
1857 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; 2122 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg;
1858 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ 2123 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC);
2124 /*
2125 * positive triggers, no S&H,
2126 * no burst, burst stop,
2127 * no post trigger,
2128 * no about trigger,
2129 * trigger stop
2130 */
1859 2131
1860 devpriv->ao_data[0] = 2047; 2132 devpriv->ao_data[0] = 2047;
1861 devpriv->ao_data[1] = 2047; 2133 devpriv->ao_data[1] = 2047;
1862 outl(devpriv->ao_data[0], dev->iobase + PCI9118_DA1); /* reset A/D outs to 0V */ 2134 outl(devpriv->ao_data[0], dev->iobase + PCI9118_DA1);
2135 /* reset A/D outs to 0V */
1863 outl(devpriv->ao_data[1], dev->iobase + PCI9118_DA2); 2136 outl(devpriv->ao_data[1], dev->iobase + PCI9118_DA2);
1864 outl(0, dev->iobase + PCI9118_DO); /* reset digi outs to L */ 2137 outl(0, dev->iobase + PCI9118_DO); /* reset digi outs to L */
1865 udelay(10); 2138 udelay(10);
1866 inl(dev->iobase + PCI9118_AD_DATA); 2139 inl(dev->iobase + PCI9118_AD_DATA);
1867 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 2140 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */
1868 outl(0, dev->iobase + PCI9118_INTSRC); /* remove INT requests */ 2141 outl(0, dev->iobase + PCI9118_INTSRC); /* remove INT requests */
1869 inl(dev->iobase + PCI9118_ADSTAT); /* flush A/D status register */ 2142 inl(dev->iobase + PCI9118_ADSTAT); /* flush A/D status register */
1870 inl(dev->iobase + PCI9118_INTSRC); /* flush INT requests */ 2143 inl(dev->iobase + PCI9118_INTSRC); /* flush INT requests */
1871 devpriv->AdControlReg = 0; 2144 devpriv->AdControlReg = 0;
1872 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); /* bipolar, S.E., use 8254, stop 8354, internal trigger, soft trigger, disable INT and DMA */ 2145 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL);
2146 /*
2147 * bipolar, S.E., use 8254,
2148 * stop 8354, internal trigger,
2149 * soft trigger,
2150 * disable INT and DMA
2151 */
1873 2152
1874 devpriv->cnt0_users = 0; 2153 devpriv->cnt0_users = 0;
1875 devpriv->exttrg_users = 0; 2154 devpriv->exttrg_users = 0;
@@ -1899,7 +2178,7 @@ static int pci9118_attach(struct comedi_device *dev,
1899 opt_bus = it->options[0]; 2178 opt_bus = it->options[0];
1900 opt_slot = it->options[1]; 2179 opt_slot = it->options[1];
1901 if (it->options[3] & 1) { 2180 if (it->options[3] & 1) {
1902 master = 0; /* user don't want use bus master */ 2181 master = 0; /* user don't want use bus master */
1903 } else { 2182 } else {
1904 master = 1; 2183 master = 1;
1905 } 2184 }
@@ -1937,17 +2216,17 @@ static int pci9118_attach(struct comedi_device *dev,
1937 2216
1938 if (!pcidev) { 2217 if (!pcidev) {
1939 if (opt_bus || opt_slot) { 2218 if (opt_bus || opt_slot) {
1940 printk(" - Card at b:s %d:%d %s\n", 2219 printk(KERN_ERR " - Card at b:s %d:%d %s\n",
1941 opt_bus, opt_slot, errstr); 2220 opt_bus, opt_slot, errstr);
1942 } else { 2221 } else {
1943 printk(" - Card %s\n", errstr); 2222 printk(KERN_ERR " - Card %s\n", errstr);
1944 } 2223 }
1945 return -EIO; 2224 return -EIO;
1946 } 2225 }
1947 2226
1948 if (master) { 2227 if (master)
1949 pci_set_master(pcidev); 2228 pci_set_master(pcidev);
1950 } 2229
1951 2230
1952 pci_bus = pcidev->bus->number; 2231 pci_bus = pcidev->bus->number;
1953 pci_slot = PCI_SLOT(pcidev->devfn); 2232 pci_slot = PCI_SLOT(pcidev->devfn);
@@ -1956,8 +2235,8 @@ static int pci9118_attach(struct comedi_device *dev,
1956 iobase_a = pci_resource_start(pcidev, 0); 2235 iobase_a = pci_resource_start(pcidev, 0);
1957 iobase_9 = pci_resource_start(pcidev, 2); 2236 iobase_9 = pci_resource_start(pcidev, 2);
1958 2237
1959 printk(", b:s:f=%d:%d:%d, io=0x%4lx, 0x%4lx", pci_bus, pci_slot, 2238 printk(KERN_ERR ", b:s:f=%d:%d:%d, io=0x%4lx, 0x%4lx", pci_bus,
1960 pci_func, iobase_9, iobase_a); 2239 pci_slot, pci_func, iobase_9, iobase_a);
1961 2240
1962 dev->iobase = iobase_9; 2241 dev->iobase = iobase_9;
1963 dev->board_name = this_board->name; 2242 dev->board_name = this_board->name;
@@ -1968,7 +2247,7 @@ static int pci9118_attach(struct comedi_device *dev,
1968 pci9118_reset(dev); 2247 pci9118_reset(dev);
1969 2248
1970 if (it->options[3] & 2) 2249 if (it->options[3] & 2)
1971 irq = 0; /* user don't want use IRQ */ 2250 irq = 0; /* user don't want use IRQ */
1972 if (irq > 0) { 2251 if (irq > 0) {
1973 if (request_irq(irq, interrupt_pci9118, IRQF_SHARED, 2252 if (request_irq(irq, interrupt_pci9118, IRQF_SHARED,
1974 "ADLink PCI-9118", dev)) { 2253 "ADLink PCI-9118", dev)) {
@@ -1984,7 +2263,7 @@ static int pci9118_attach(struct comedi_device *dev,
1984 2263
1985 dev->irq = irq; 2264 dev->irq = irq;
1986 2265
1987 if (master) { /* alloc DMA buffers */ 2266 if (master) { /* alloc DMA buffers */
1988 devpriv->dma_doublebuf = 0; 2267 devpriv->dma_doublebuf = 0;
1989 for (i = 0; i < 2; i++) { 2268 for (i = 0; i < 2; i++) {
1990 for (pages = 4; pages >= 0; pages--) { 2269 for (pages = 4; pages >= 0; pages--) {
@@ -2024,16 +2303,18 @@ static int pci9118_attach(struct comedi_device *dev,
2024 if (it->options[2] > 0) { 2303 if (it->options[2] > 0) {
2025 devpriv->usemux = it->options[2]; 2304 devpriv->usemux = it->options[2];
2026 if (devpriv->usemux > 256) 2305 if (devpriv->usemux > 256)
2027 devpriv->usemux = 256; /* max 256 channels! */ 2306 devpriv->usemux = 256; /* max 256 channels! */
2028 if (it->options[4] > 0) 2307 if (it->options[4] > 0)
2029 if (devpriv->usemux > 128) { 2308 if (devpriv->usemux > 128) {
2030 devpriv->usemux = 128; /* max 128 channels with softare S&H! */ 2309 devpriv->usemux = 128;
2310 /* max 128 channels with softare S&H! */
2031 } 2311 }
2032 printk(", ext. mux %d channels", devpriv->usemux); 2312 printk(", ext. mux %d channels", devpriv->usemux);
2033 } 2313 }
2034 2314
2035 devpriv->softsshdelay = it->options[4]; 2315 devpriv->softsshdelay = it->options[4];
2036 if (devpriv->softsshdelay < 0) { /* select sample&hold signal polarity */ 2316 if (devpriv->softsshdelay < 0) {
2317 /* select sample&hold signal polarity */
2037 devpriv->softsshdelay = -devpriv->softsshdelay; 2318 devpriv->softsshdelay = -devpriv->softsshdelay;
2038 devpriv->softsshsample = 0x80; 2319 devpriv->softsshsample = 0x80;
2039 devpriv->softsshhold = 0x00; 2320 devpriv->softsshhold = 0x00;
@@ -2045,7 +2326,8 @@ static int pci9118_attach(struct comedi_device *dev,
2045 printk(".\n"); 2326 printk(".\n");
2046 2327
2047 pci_read_config_word(devpriv->pcidev, PCI_COMMAND, &u16w); 2328 pci_read_config_word(devpriv->pcidev, PCI_COMMAND, &u16w);
2048 pci_write_config_word(devpriv->pcidev, PCI_COMMAND, u16w | 64); /* Enable parity check for parity error */ 2329 pci_write_config_word(devpriv->pcidev, PCI_COMMAND, u16w | 64);
2330 /* Enable parity check for parity error */
2049 2331
2050 ret = alloc_subdevices(dev, 4); 2332 ret = alloc_subdevices(dev, 4);
2051 if (ret < 0) 2333 if (ret < 0)
@@ -2055,11 +2337,11 @@ static int pci9118_attach(struct comedi_device *dev,
2055 dev->read_subdev = s; 2337 dev->read_subdev = s;
2056 s->type = COMEDI_SUBD_AI; 2338 s->type = COMEDI_SUBD_AI;
2057 s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_GROUND | SDF_DIFF; 2339 s->subdev_flags = SDF_READABLE | SDF_COMMON | SDF_GROUND | SDF_DIFF;
2058 if (devpriv->usemux) { 2340 if (devpriv->usemux)
2059 s->n_chan = devpriv->usemux; 2341 s->n_chan = devpriv->usemux;
2060 } else { 2342 else
2061 s->n_chan = this_board->n_aichan; 2343 s->n_chan = this_board->n_aichan;
2062 } 2344
2063 s->maxdata = this_board->ai_maxdata; 2345 s->maxdata = this_board->ai_maxdata;
2064 s->len_chanlist = this_board->n_aichanlist; 2346 s->len_chanlist = this_board->n_aichanlist;
2065 s->range_table = this_board->rangelist_ai; 2347 s->range_table = this_board->rangelist_ai;
@@ -2103,9 +2385,10 @@ static int pci9118_attach(struct comedi_device *dev,
2103 s->insn_bits = pci9118_insn_bits_do; 2385 s->insn_bits = pci9118_insn_bits_do;
2104 2386
2105 devpriv->valid = 1; 2387 devpriv->valid = 1;
2106 devpriv->i8254_osc_base = 250; /* 250ns=4MHz */ 2388 devpriv->i8254_osc_base = 250; /* 250ns=4MHz */
2107 devpriv->ai_maskharderr = 0x10a; /* default measure crash condition */ 2389 devpriv->ai_maskharderr = 0x10a;
2108 if (it->options[5]) /* disable some requested */ 2390 /* default measure crash condition */
2391 if (it->options[5]) /* disable some requested */
2109 devpriv->ai_maskharderr &= ~it->options[5]; 2392 devpriv->ai_maskharderr &= ~it->options[5];
2110 2393
2111 switch (this_board->ai_maxdata) { 2394 switch (this_board->ai_maxdata) {
@@ -2130,9 +2413,9 @@ static int pci9118_detach(struct comedi_device *dev)
2130 if (dev->irq) 2413 if (dev->irq)
2131 free_irq(dev->irq, dev); 2414 free_irq(dev->irq, dev);
2132 if (devpriv->pcidev) { 2415 if (devpriv->pcidev) {
2133 if (dev->iobase) { 2416 if (dev->iobase)
2134 comedi_pci_disable(devpriv->pcidev); 2417 comedi_pci_disable(devpriv->pcidev);
2135 } 2418
2136 pci_dev_put(devpriv->pcidev); 2419 pci_dev_put(devpriv->pcidev);
2137 } 2420 }
2138 if (devpriv->dmabuf_virt[0]) 2421 if (devpriv->dmabuf_virt[0])
diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c
index 394d2ea19c2e..67c4f11a36ab 100644
--- a/drivers/staging/comedi/drivers/adv_pci1710.c
+++ b/drivers/staging/comedi/drivers/adv_pci1710.c
@@ -63,6 +63,8 @@ Configuration options:
63#define DPRINTK(fmt, args...) 63#define DPRINTK(fmt, args...)
64#endif 64#endif
65 65
66#define PCI_VENDOR_ID_ADVANTECH 0x13fe
67
66/* hardware types of the cards */ 68/* hardware types of the cards */
67#define TYPE_PCI171X 0 69#define TYPE_PCI171X 0
68#define TYPE_PCI1713 2 70#define TYPE_PCI1713 2
@@ -657,9 +659,9 @@ static void interrupt_pci1710_every_sample(void *d)
657#endif 659#endif
658 ++s->async->cur_chan; 660 ++s->async->cur_chan;
659 661
660 if (s->async->cur_chan >= devpriv->ai_n_chan) { 662 if (s->async->cur_chan >= devpriv->ai_n_chan)
661 s->async->cur_chan = 0; 663 s->async->cur_chan = 0;
662 } 664
663 665
664 if (s->async->cur_chan == 0) { /* one scan done */ 666 if (s->async->cur_chan == 0) { /* one scan done */
665 devpriv->ai_act_scan++; 667 devpriv->ai_act_scan++;
@@ -863,12 +865,12 @@ static int pci171x_ai_docmd_and_mode(int mode, struct comedi_device *dev,
863 devpriv->ai_eos = 0; 865 devpriv->ai_eos = 0;
864 } 866 }
865 867
866 if ((devpriv->ai_scans == 0) || (devpriv->ai_scans == -1)) { 868 if ((devpriv->ai_scans == 0) || (devpriv->ai_scans == -1))
867 devpriv->neverending_ai = 1; 869 devpriv->neverending_ai = 1;
868 } /* well, user want neverending */ 870 /* well, user want neverending */
869 else { 871 else
870 devpriv->neverending_ai = 0; 872 devpriv->neverending_ai = 0;
871 } 873
872 switch (mode) { 874 switch (mode) {
873 case 1: 875 case 1:
874 case 2: 876 case 2:
@@ -935,7 +937,8 @@ static int pci171x_ai_cmdtest(struct comedi_device *dev,
935 struct comedi_cmd *cmd) 937 struct comedi_cmd *cmd)
936{ 938{
937 int err = 0; 939 int err = 0;
938 int tmp, divisor1 = 0, divisor2 = 0; 940 int tmp;
941 unsigned int divisor1 = 0, divisor2 = 0;
939 942
940 DPRINTK("adv_pci1710 EDBG: BGN: pci171x_ai_cmdtest(...)\n"); 943 DPRINTK("adv_pci1710 EDBG: BGN: pci171x_ai_cmdtest(...)\n");
941#ifdef PCI171X_EXTDEBUG 944#ifdef PCI171X_EXTDEBUG
@@ -1109,11 +1112,11 @@ static int pci171x_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1109 devpriv->ai_timer1 = 0; 1112 devpriv->ai_timer1 = 0;
1110 devpriv->ai_timer2 = 0; 1113 devpriv->ai_timer2 = 0;
1111 1114
1112 if (cmd->stop_src == TRIG_COUNT) { 1115 if (cmd->stop_src == TRIG_COUNT)
1113 devpriv->ai_scans = cmd->stop_arg; 1116 devpriv->ai_scans = cmd->stop_arg;
1114 } else { 1117 else
1115 devpriv->ai_scans = 0; 1118 devpriv->ai_scans = 0;
1116 } 1119
1117 1120
1118 if (cmd->scan_begin_src == TRIG_FOLLOW) { /* mode 1, 2, 3 */ 1121 if (cmd->scan_begin_src == TRIG_FOLLOW) { /* mode 1, 2, 3 */
1119 if (cmd->convert_src == TRIG_TIMER) { /* mode 1 and 2 */ 1122 if (cmd->convert_src == TRIG_TIMER) { /* mode 1 and 2 */
@@ -1593,9 +1596,9 @@ static int pci1710_detach(struct comedi_device *dev)
1593 if (dev->irq) 1596 if (dev->irq)
1594 free_irq(dev->irq, dev); 1597 free_irq(dev->irq, dev);
1595 if (devpriv->pcidev) { 1598 if (devpriv->pcidev) {
1596 if (dev->iobase) { 1599 if (dev->iobase)
1597 comedi_pci_disable(devpriv->pcidev); 1600 comedi_pci_disable(devpriv->pcidev);
1598 } 1601
1599 pci_dev_put(devpriv->pcidev); 1602 pci_dev_put(devpriv->pcidev);
1600 } 1603 }
1601 } 1604 }
diff --git a/drivers/staging/comedi/drivers/adv_pci1723.c b/drivers/staging/comedi/drivers/adv_pci1723.c
index 6b0b7eda3be8..9fe8fcc7f1d6 100644
--- a/drivers/staging/comedi/drivers/adv_pci1723.c
+++ b/drivers/staging/comedi/drivers/adv_pci1723.c
@@ -52,7 +52,7 @@ TODO:
52 52
53#include "comedi_pci.h" 53#include "comedi_pci.h"
54 54
55#define ADVANTECH_VENDOR 0x13fe /* Advantech PCI vendor ID */ 55#define PCI_VENDOR_ID_ADVANTECH 0x13fe /* Advantech PCI vendor ID */
56 56
57/* hardware types of the cards */ 57/* hardware types of the cards */
58#define TYPE_PCI1723 0 58#define TYPE_PCI1723 0
@@ -60,35 +60,57 @@ TODO:
60#define IORANGE_1723 0x2A 60#define IORANGE_1723 0x2A
61 61
62/* all the registers for the pci1723 board */ 62/* all the registers for the pci1723 board */
63#define PCI1723_DA(N) ((N)<<1) /* W: D/A register N (0 to 7) */ 63#define PCI1723_DA(N) ((N)<<1) /* W: D/A register N (0 to 7) */
64 64
65#define PCI1723_SYN_SET 0x12 /*synchronized set register */ 65#define PCI1723_SYN_SET 0x12 /* synchronized set register */
66#define PCI1723_ALL_CHNNELE_SYN_STROBE 0x12 /*synchronized status register */ 66#define PCI1723_ALL_CHNNELE_SYN_STROBE 0x12
67 67 /* synchronized status register */
68#define PCI1723_RANGE_CALIBRATION_MODE 0x14 /* range and calibration mode */ 68
69#define PCI1723_RANGE_CALIBRATION_STATUS 0x14 /* range and calibration status */ 69#define PCI1723_RANGE_CALIBRATION_MODE 0x14
70 70 /* range and calibration mode */
71#define PCI1723_CONTROL_CMD_CALIBRATION_FUN 0x16 /* SADC control command for calibration function */ 71#define PCI1723_RANGE_CALIBRATION_STATUS 0x14
72#define PCI1723_STATUS_CMD_CALIBRATION_FUN 0x16 /* SADC control status for calibration function */ 72 /* range and calibration status */
73 73
74#define PCI1723_CALIBRATION_PARA_STROBE 0x18 /* Calibration parameter strobe */ 74#define PCI1723_CONTROL_CMD_CALIBRATION_FUN 0x16
75 /*
76 * SADC control command for
77 * calibration function
78 */
79#define PCI1723_STATUS_CMD_CALIBRATION_FUN 0x16
80 /*
81 * SADC control status for
82 * calibration function
83 */
84
85#define PCI1723_CALIBRATION_PARA_STROBE 0x18
86 /* Calibration parameter strobe */
75 87
76#define PCI1723_DIGITAL_IO_PORT_SET 0x1A /* Digital I/O port setting */ 88#define PCI1723_DIGITAL_IO_PORT_SET 0x1A /* Digital I/O port setting */
77#define PCI1723_DIGITAL_IO_PORT_MODE 0x1A /* Digital I/O port mode */ 89#define PCI1723_DIGITAL_IO_PORT_MODE 0x1A /* Digital I/O port mode */
78 90
79#define PCI1723_WRITE_DIGITAL_OUTPUT_CMD 0x1C /* Write digital output command */ 91#define PCI1723_WRITE_DIGITAL_OUTPUT_CMD 0x1C
92 /* Write digital output command */
80#define PCI1723_READ_DIGITAL_INPUT_DATA 0x1C /* Read digital input data */ 93#define PCI1723_READ_DIGITAL_INPUT_DATA 0x1C /* Read digital input data */
81 94
82#define PCI1723_WRITE_CAL_CMD 0x1E /* Write calibration command */ 95#define PCI1723_WRITE_CAL_CMD 0x1E /* Write calibration command */
83#define PCI1723_READ_CAL_STATUS 0x1E /* Read calibration status */ 96#define PCI1723_READ_CAL_STATUS 0x1E /* Read calibration status */
84 97
85#define PCI1723_SYN_STROBE 0x20 /* Synchronized strobe */ 98#define PCI1723_SYN_STROBE 0x20 /* Synchronized strobe */
86 99
87#define PCI1723_RESET_ALL_CHN_STROBE 0x22 /* Reset all D/A channels strobe */ 100#define PCI1723_RESET_ALL_CHN_STROBE 0x22
101 /* Reset all D/A channels strobe */
88 102
89#define PCI1723_RESET_CAL_CONTROL_STROBE 0x24 /* Reset the calibration controller strobe */ 103#define PCI1723_RESET_CAL_CONTROL_STROBE 0x24
104 /*
105 * Reset the calibration
106 * controller strobe
107 */
90 108
91#define PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE 0x26 /* Change D/A channels output type strobe */ 109#define PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE 0x26
110 /*
111 * Change D/A channels output
112 * type strobe
113 */
92 114
93#define PCI1723_SELECT_CALIBRATION 0x28 /* Select the calibration Ref_V */ 115#define PCI1723_SELECT_CALIBRATION 0x28 /* Select the calibration Ref_V */
94 116
@@ -104,20 +126,20 @@ static const struct comedi_lrange range_pci1723 = { 1, {
104 */ 126 */
105struct pci1723_board { 127struct pci1723_board {
106 const char *name; 128 const char *name;
107 int vendor_id; /* PCI vendor a device ID of card */ 129 int vendor_id; /* PCI vendor a device ID of card */
108 int device_id; 130 int device_id;
109 int iorange; 131 int iorange;
110 char cardtype; 132 char cardtype;
111 int n_aochan; /* num of D/A chans */ 133 int n_aochan; /* num of D/A chans */
112 int n_diochan; /* num of DIO chans */ 134 int n_diochan; /* num of DIO chans */
113 int ao_maxdata; /* resolution of D/A */ 135 int ao_maxdata; /* resolution of D/A */
114 const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */ 136 const struct comedi_lrange *rangelist_ao; /* rangelist for D/A */
115}; 137};
116 138
117static const struct pci1723_board boardtypes[] = { 139static const struct pci1723_board boardtypes[] = {
118 { 140 {
119 .name = "pci1723", 141 .name = "pci1723",
120 .vendor_id = ADVANTECH_VENDOR, 142 .vendor_id = PCI_VENDOR_ID_ADVANTECH,
121 .device_id = 0x1723, 143 .device_id = 0x1723,
122 .iorange = IORANGE_1723, 144 .iorange = IORANGE_1723,
123 .cardtype = TYPE_PCI1723, 145 .cardtype = TYPE_PCI1723,
@@ -128,8 +150,10 @@ static const struct pci1723_board boardtypes[] = {
128 }, 150 },
129}; 151};
130 152
131/* This is used by modprobe to translate PCI IDs to drivers. Should 153/*
132 * only be used for PCI and ISA-PnP devices */ 154 * This is used by modprobe to translate PCI IDs to drivers.
155 * Should only be used for PCI and ISA-PnP devices
156 */
133static DEFINE_PCI_DEVICE_TABLE(pci1723_pci_table) = { 157static DEFINE_PCI_DEVICE_TABLE(pci1723_pci_table) = {
134 { 158 {
135 PCI_VENDOR_ID_ADVANTECH, 0x1723, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 159 PCI_VENDOR_ID_ADVANTECH, 0x1723, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
@@ -157,47 +181,47 @@ static struct comedi_driver driver_pci1723 = {
157 .detach = pci1723_detach, 181 .detach = pci1723_detach,
158}; 182};
159 183
160/* this structure is for data unique to this hardware driver. */ 184/* This structure is for data unique to this hardware driver. */
161struct pci1723_private { 185struct pci1723_private {
162 int valid; /* card is usable; */ 186 int valid; /* card is usable; */
163 187
164 struct pci_dev *pcidev; 188 struct pci_dev *pcidev;
165 unsigned char da_range[8]; /* D/A output range for each channel */ 189 unsigned char da_range[8]; /* D/A output range for each channel */
166 190
167 short ao_data[8]; /* data output buffer */ 191 short ao_data[8]; /* data output buffer */
168}; 192};
169 193
170/*the following macro to make it easy to 194/* The following macro to make it easy to access the private structure. */
171* access the private structure.
172*/
173#define devpriv ((struct pci1723_private *)dev->private) 195#define devpriv ((struct pci1723_private *)dev->private)
174 196
175#define this_board boardtypes 197#define this_board boardtypes
176 198
177/* 199/*
178 * the pci1723 card reset; 200 * The pci1723 card reset;
179 */ 201 */
180static int pci1723_reset(struct comedi_device *dev) 202static int pci1723_reset(struct comedi_device *dev)
181{ 203{
182 int i; 204 int i;
183 DPRINTK("adv_pci1723 EDBG: BGN: pci1723_reset(...)\n"); 205 DPRINTK("adv_pci1723 EDBG: BGN: pci1723_reset(...)\n");
184 206
185 outw(0x01, dev->iobase + PCI1723_SYN_SET); /* set synchronous output mode */ 207 outw(0x01, dev->iobase + PCI1723_SYN_SET);
208 /* set synchronous output mode */
186 209
187 for (i = 0; i < 8; i++) { 210 for (i = 0; i < 8; i++) {
188 /* set all outputs to 0V */ 211 /* set all outputs to 0V */
189 devpriv->ao_data[i] = 0x8000; 212 devpriv->ao_data[i] = 0x8000;
190 outw(devpriv->ao_data[i], dev->iobase + PCI1723_DA(i)); 213 outw(devpriv->ao_data[i], dev->iobase + PCI1723_DA(i));
191 /* set all ranges to +/- 10V */ 214 /* set all ranges to +/- 10V */
192 devpriv->da_range[i] = 0; 215 devpriv->da_range[i] = 0;
193 outw(((devpriv->da_range[i] << 4) | i), 216 outw(((devpriv->da_range[i] << 4) | i),
194 PCI1723_RANGE_CALIBRATION_MODE); 217 PCI1723_RANGE_CALIBRATION_MODE);
195 } 218 }
196 219
197 outw(0, dev->iobase + PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE); /* update ranges */ 220 outw(0, dev->iobase + PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE);
198 outw(0, dev->iobase + PCI1723_SYN_STROBE); /* update outputs */ 221 /* update ranges */
222 outw(0, dev->iobase + PCI1723_SYN_STROBE); /* update outputs */
199 223
200 /* set asynchronous output mode */ 224 /* set asynchronous output mode */
201 outw(0, dev->iobase + PCI1723_SYN_SET); 225 outw(0, dev->iobase + PCI1723_SYN_SET);
202 226
203 DPRINTK("adv_pci1723 EDBG: END: pci1723_reset(...)\n"); 227 DPRINTK("adv_pci1723 EDBG: END: pci1723_reset(...)\n");
@@ -251,11 +275,11 @@ static int pci1723_dio_insn_config(struct comedi_device *dev,
251 unsigned short dio_mode; 275 unsigned short dio_mode;
252 276
253 mask = 1 << CR_CHAN(insn->chanspec); 277 mask = 1 << CR_CHAN(insn->chanspec);
254 if (mask & 0x00FF) { 278 if (mask & 0x00FF)
255 bits = 0x00FF; 279 bits = 0x00FF;
256 } else { 280 else
257 bits = 0xFF00; 281 bits = 0xFF00;
258 } 282
259 switch (data[0]) { 283 switch (data[0]) {
260 case INSN_CONFIG_DIO_INPUT: 284 case INSN_CONFIG_DIO_INPUT:
261 s->io_bits &= ~bits; 285 s->io_bits &= ~bits;
@@ -270,12 +294,12 @@ static int pci1723_dio_insn_config(struct comedi_device *dev,
270 return -EINVAL; 294 return -EINVAL;
271 } 295 }
272 296
273 /* update hardware DIO mode */ 297 /* update hardware DIO mode */
274 dio_mode = 0x0000; /* low byte output, high byte output */ 298 dio_mode = 0x0000; /* low byte output, high byte output */
275 if ((s->io_bits & 0x00FF) == 0) 299 if ((s->io_bits & 0x00FF) == 0)
276 dio_mode |= 0x0001; /* low byte input */ 300 dio_mode |= 0x0001; /* low byte input */
277 if ((s->io_bits & 0xFF00) == 0) 301 if ((s->io_bits & 0xFF00) == 0)
278 dio_mode |= 0x0002; /* high byte input */ 302 dio_mode |= 0x0002; /* high byte input */
279 outw(dio_mode, dev->iobase + PCI1723_DIGITAL_IO_PORT_SET); 303 outw(dio_mode, dev->iobase + PCI1723_DIGITAL_IO_PORT_SET);
280 return 1; 304 return 1;
281} 305}
@@ -311,7 +335,8 @@ static int pci1723_attach(struct comedi_device *dev,
311 int opt_bus, opt_slot; 335 int opt_bus, opt_slot;
312 const char *errstr; 336 const char *errstr;
313 337
314 printk("comedi%d: adv_pci1723: board=%s", dev->minor, this_board->name); 338 printk(KERN_ERR "comedi%d: adv_pci1723: board=%s",
339 dev->minor, this_board->name);
315 340
316 opt_bus = it->options[0]; 341 opt_bus = it->options[0];
317 opt_slot = it->options[1]; 342 opt_slot = it->options[1];
@@ -349,10 +374,10 @@ static int pci1723_attach(struct comedi_device *dev,
349 374
350 if (!pcidev) { 375 if (!pcidev) {
351 if (opt_bus || opt_slot) { 376 if (opt_bus || opt_slot) {
352 printk(" - Card at b:s %d:%d %s\n", 377 printk(KERN_ERR " - Card at b:s %d:%d %s\n",
353 opt_bus, opt_slot, errstr); 378 opt_bus, opt_slot, errstr);
354 } else { 379 } else {
355 printk(" - Card %s\n", errstr); 380 printk(KERN_ERR " - Card %s\n", errstr);
356 } 381 }
357 return -EIO; 382 return -EIO;
358 } 383 }
@@ -362,8 +387,8 @@ static int pci1723_attach(struct comedi_device *dev,
362 pci_func = PCI_FUNC(pcidev->devfn); 387 pci_func = PCI_FUNC(pcidev->devfn);
363 iobase = pci_resource_start(pcidev, 2); 388 iobase = pci_resource_start(pcidev, 2);
364 389
365 printk(", b:s:f=%d:%d:%d, io=0x%4x", pci_bus, pci_slot, pci_func, 390 printk(KERN_ERR ", b:s:f=%d:%d:%d, io=0x%4x",
366 iobase); 391 pci_bus, pci_slot, pci_func, iobase);
367 392
368 dev->iobase = iobase; 393 dev->iobase = iobase;
369 394
@@ -398,22 +423,23 @@ static int pci1723_attach(struct comedi_device *dev,
398 s->insn_write = pci1723_ao_write_winsn; 423 s->insn_write = pci1723_ao_write_winsn;
399 s->insn_read = pci1723_insn_read_ao; 424 s->insn_read = pci1723_insn_read_ao;
400 425
401 /* read DIO config */ 426 /* read DIO config */
402 switch (inw(dev->iobase + PCI1723_DIGITAL_IO_PORT_MODE) & 0x03) { 427 switch (inw(dev->iobase + PCI1723_DIGITAL_IO_PORT_MODE)
403 case 0x00: /* low byte output, high byte output */ 428 & 0x03) {
429 case 0x00: /* low byte output, high byte output */
404 s->io_bits = 0xFFFF; 430 s->io_bits = 0xFFFF;
405 break; 431 break;
406 case 0x01: /* low byte input, high byte output */ 432 case 0x01: /* low byte input, high byte output */
407 s->io_bits = 0xFF00; 433 s->io_bits = 0xFF00;
408 break; 434 break;
409 case 0x02: /* low byte output, high byte input */ 435 case 0x02: /* low byte output, high byte input */
410 s->io_bits = 0x00FF; 436 s->io_bits = 0x00FF;
411 break; 437 break;
412 case 0x03: /* low byte input, high byte input */ 438 case 0x03: /* low byte input, high byte input */
413 s->io_bits = 0x0000; 439 s->io_bits = 0x0000;
414 break; 440 break;
415 } 441 }
416 /* read DIO port state */ 442 /* read DIO port state */
417 s->state = inw(dev->iobase + PCI1723_READ_DIGITAL_INPUT_DATA); 443 s->state = inw(dev->iobase + PCI1723_READ_DIGITAL_INPUT_DATA);
418 444
419 subdev++; 445 subdev++;
@@ -450,16 +476,15 @@ static int pci1723_attach(struct comedi_device *dev,
450 */ 476 */
451static int pci1723_detach(struct comedi_device *dev) 477static int pci1723_detach(struct comedi_device *dev)
452{ 478{
453 printk("comedi%d: pci1723: remove\n", dev->minor); 479 printk(KERN_ERR "comedi%d: pci1723: remove\n", dev->minor);
454 480
455 if (dev->private) { 481 if (dev->private) {
456 if (devpriv->valid) 482 if (devpriv->valid)
457 pci1723_reset(dev); 483 pci1723_reset(dev);
458 484
459 if (devpriv->pcidev) { 485 if (devpriv->pcidev) {
460 if (dev->iobase) { 486 if (dev->iobase)
461 comedi_pci_disable(devpriv->pcidev); 487 comedi_pci_disable(devpriv->pcidev);
462 }
463 pci_dev_put(devpriv->pcidev); 488 pci_dev_put(devpriv->pcidev);
464 } 489 }
465 } 490 }
diff --git a/drivers/staging/comedi/drivers/adv_pci_dio.c b/drivers/staging/comedi/drivers/adv_pci_dio.c
index 61d35fe64350..40eeecf5347f 100644
--- a/drivers/staging/comedi/drivers/adv_pci_dio.c
+++ b/drivers/staging/comedi/drivers/adv_pci_dio.c
@@ -45,6 +45,8 @@ Configuration options:
45#define DPRINTK(fmt, args...) 45#define DPRINTK(fmt, args...)
46#endif 46#endif
47 47
48#define PCI_VENDOR_ID_ADVANTECH 0x13fe
49
48/* hardware types of the cards */ 50/* hardware types of the cards */
49enum hw_cards_id { 51enum hw_cards_id {
50 TYPE_PCI1730, TYPE_PCI1733, TYPE_PCI1734, TYPE_PCI1736, 52 TYPE_PCI1730, TYPE_PCI1733, TYPE_PCI1734, TYPE_PCI1736,
@@ -367,9 +369,9 @@ static int pci_dio_insn_bits_di_b(struct comedi_device *dev,
367 int i; 369 int i;
368 370
369 data[1] = 0; 371 data[1] = 0;
370 for (i = 0; i < d->regs; i++) { 372 for (i = 0; i < d->regs; i++)
371 data[1] |= inb(dev->iobase + d->addr + i) << (8 * i); 373 data[1] |= inb(dev->iobase + d->addr + i) << (8 * i);
372 } 374
373 375
374 return 2; 376 return 2;
375} 377}
@@ -882,9 +884,9 @@ static int CheckAndAllocCard(struct comedi_device *dev,
882 struct pci_dio_private *pr, *prev; 884 struct pci_dio_private *pr, *prev;
883 885
884 for (pr = pci_priv, prev = NULL; pr != NULL; prev = pr, pr = pr->next) { 886 for (pr = pci_priv, prev = NULL; pr != NULL; prev = pr, pr = pr->next) {
885 if (pr->pcidev == pcidev) { 887 if (pr->pcidev == pcidev)
886 return 0; /* this card is used, look for another */ 888 return 0; /* this card is used, look for another */
887 } 889
888 } 890 }
889 891
890 if (prev) { 892 if (prev) {
@@ -1040,22 +1042,22 @@ static int pci_dio_detach(struct comedi_device *dev)
1040 int subdev; 1042 int subdev;
1041 1043
1042 if (dev->private) { 1044 if (dev->private) {
1043 if (devpriv->valid) { 1045 if (devpriv->valid)
1044 pci_dio_reset(dev); 1046 pci_dio_reset(dev);
1045 } 1047
1046 1048
1047 /* This shows the silliness of using this kind of 1049 /* This shows the silliness of using this kind of
1048 * scheme for numbering subdevices. Don't do it. --ds */ 1050 * scheme for numbering subdevices. Don't do it. --ds */
1049 subdev = 0; 1051 subdev = 0;
1050 for (i = 0; i < MAX_DI_SUBDEVS; i++) { 1052 for (i = 0; i < MAX_DI_SUBDEVS; i++) {
1051 if (this_board->sdi[i].chans) { 1053 if (this_board->sdi[i].chans)
1052 subdev++; 1054 subdev++;
1053 } 1055
1054 } 1056 }
1055 for (i = 0; i < MAX_DO_SUBDEVS; i++) { 1057 for (i = 0; i < MAX_DO_SUBDEVS; i++) {
1056 if (this_board->sdo[i].chans) { 1058 if (this_board->sdo[i].chans)
1057 subdev++; 1059 subdev++;
1058 } 1060
1059 } 1061 }
1060 for (i = 0; i < MAX_DIO_SUBDEVG; i++) { 1062 for (i = 0; i < MAX_DIO_SUBDEVG; i++) {
1061 for (j = 0; j < this_board->sdio[i].regs; j++) { 1063 for (j = 0; j < this_board->sdio[i].regs; j++) {
@@ -1071,20 +1073,20 @@ static int pci_dio_detach(struct comedi_device *dev)
1071 } 1073 }
1072 1074
1073 if (devpriv->pcidev) { 1075 if (devpriv->pcidev) {
1074 if (dev->iobase) { 1076 if (dev->iobase)
1075 comedi_pci_disable(devpriv->pcidev); 1077 comedi_pci_disable(devpriv->pcidev);
1076 } 1078
1077 pci_dev_put(devpriv->pcidev); 1079 pci_dev_put(devpriv->pcidev);
1078 } 1080 }
1079 1081
1080 if (devpriv->prev) { 1082 if (devpriv->prev)
1081 devpriv->prev->next = devpriv->next; 1083 devpriv->prev->next = devpriv->next;
1082 } else { 1084 else
1083 pci_priv = devpriv->next; 1085 pci_priv = devpriv->next;
1084 } 1086
1085 if (devpriv->next) { 1087 if (devpriv->next)
1086 devpriv->next->prev = devpriv->prev; 1088 devpriv->next->prev = devpriv->prev;
1087 } 1089
1088 } 1090 }
1089 1091
1090 return 0; 1092 return 0;
diff --git a/drivers/staging/comedi/drivers/aio_aio12_8.c b/drivers/staging/comedi/drivers/aio_aio12_8.c
index c4cac66db12e..7a1c636df5be 100644
--- a/drivers/staging/comedi/drivers/aio_aio12_8.c
+++ b/drivers/staging/comedi/drivers/aio_aio12_8.c
@@ -110,7 +110,7 @@ static int aio_aio12_8_ai_read(struct comedi_device *dev,
110 while (timeout && 110 while (timeout &&
111 !(inb(dev->iobase + AIO12_8_STATUS) & STATUS_ADC_EOC)) { 111 !(inb(dev->iobase + AIO12_8_STATUS) & STATUS_ADC_EOC)) {
112 timeout--; 112 timeout--;
113 printk("timeout %d\n", timeout); 113 printk(KERN_ERR "timeout %d\n", timeout);
114 udelay(1); 114 udelay(1);
115 } 115 }
116 if (timeout == 0) { 116 if (timeout == 0) {
@@ -172,7 +172,7 @@ static int aio_aio12_8_attach(struct comedi_device *dev,
172 172
173 iobase = it->options[0]; 173 iobase = it->options[0];
174 if (!request_region(iobase, 24, "aio_aio12_8")) { 174 if (!request_region(iobase, 24, "aio_aio12_8")) {
175 printk("I/O port conflict"); 175 printk(KERN_ERR "I/O port conflict");
176 return -EIO; 176 return -EIO;
177 } 177 }
178 178
diff --git a/drivers/staging/comedi/drivers/amplc_dio200.c b/drivers/staging/comedi/drivers/amplc_dio200.c
index 92bcc205dd4b..8eb67651486a 100644
--- a/drivers/staging/comedi/drivers/amplc_dio200.c
+++ b/drivers/staging/comedi/drivers/amplc_dio200.c
@@ -218,7 +218,7 @@ order they appear in the channel list.
218#define DIO200_DRIVER_NAME "amplc_dio200" 218#define DIO200_DRIVER_NAME "amplc_dio200"
219 219
220/* PCI IDs */ 220/* PCI IDs */
221/* #define PCI_VENDOR_ID_AMPLICON 0x14dc */ 221#define PCI_VENDOR_ID_AMPLICON 0x14dc
222#define PCI_DEVICE_ID_AMPLICON_PCI272 0x000a 222#define PCI_DEVICE_ID_AMPLICON_PCI272 0x000a
223#define PCI_DEVICE_ID_AMPLICON_PCI215 0x000b 223#define PCI_DEVICE_ID_AMPLICON_PCI215 0x000b
224#define PCI_DEVICE_ID_INVALID 0xffff 224#define PCI_DEVICE_ID_INVALID 0xffff
@@ -661,7 +661,7 @@ dio200_inttrig_start_intr(struct comedi_device *dev, struct comedi_subdevice *s,
661 subpriv = s->private; 661 subpriv = s->private;
662 662
663 spin_lock_irqsave(&subpriv->spinlock, flags); 663 spin_lock_irqsave(&subpriv->spinlock, flags);
664 s->async->inttrig = 0; 664 s->async->inttrig = NULL;
665 if (subpriv->active) 665 if (subpriv->active)
666 event = dio200_start_intr(dev, s); 666 event = dio200_start_intr(dev, s);
667 667
@@ -1364,7 +1364,7 @@ static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1364 break; 1364 break;
1365 case sd_8255: 1365 case sd_8255:
1366 /* digital i/o subdevice (8255) */ 1366 /* digital i/o subdevice (8255) */
1367 ret = subdev_8255_init(dev, s, 0, 1367 ret = subdev_8255_init(dev, s, NULL,
1368 iobase + layout->sdinfo[n]); 1368 iobase + layout->sdinfo[n]);
1369 if (ret < 0) 1369 if (ret < 0)
1370 return ret; 1370 return ret;
diff --git a/drivers/staging/comedi/drivers/amplc_pci224.c b/drivers/staging/comedi/drivers/amplc_pci224.c
index c54cca8b2565..c486a878e180 100644
--- a/drivers/staging/comedi/drivers/amplc_pci224.c
+++ b/drivers/staging/comedi/drivers/amplc_pci224.c
@@ -118,7 +118,7 @@ Caveats:
118/* 118/*
119 * PCI IDs. 119 * PCI IDs.
120 */ 120 */
121/* #define PCI_VENDOR_ID_AMPLICON 0x14dc */ 121#define PCI_VENDOR_ID_AMPLICON 0x14dc
122#define PCI_DEVICE_ID_AMPLICON_PCI224 0x0007 122#define PCI_DEVICE_ID_AMPLICON_PCI224 0x0007
123#define PCI_DEVICE_ID_AMPLICON_PCI234 0x0008 123#define PCI_DEVICE_ID_AMPLICON_PCI234 0x0008
124#define PCI_DEVICE_ID_INVALID 0xffff 124#define PCI_DEVICE_ID_INVALID 0xffff
@@ -496,9 +496,9 @@ pci224_ao_insn_write(struct comedi_device *dev, struct comedi_subdevice *s,
496 496
497 /* Writing a list of values to an AO channel is probably not 497 /* Writing a list of values to an AO channel is probably not
498 * very useful, but that's how the interface is defined. */ 498 * very useful, but that's how the interface is defined. */
499 for (i = 0; i < insn->n; i++) { 499 for (i = 0; i < insn->n; i++)
500 pci224_ao_set_data(dev, chan, range, data[i]); 500 pci224_ao_set_data(dev, chan, range, data[i]);
501 } 501
502 return i; 502 return i;
503} 503}
504 504
@@ -519,9 +519,9 @@ pci224_ao_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
519 519
520 chan = CR_CHAN(insn->chanspec); 520 chan = CR_CHAN(insn->chanspec);
521 521
522 for (i = 0; i < insn->n; i++) { 522 for (i = 0; i < insn->n; i++)
523 data[i] = devpriv->ao_readback[chan]; 523 data[i] = devpriv->ao_readback[chan];
524 } 524
525 525
526 return i; 526 return i;
527} 527}
@@ -544,9 +544,9 @@ static void pci224_ao_stop(struct comedi_device *dev,
544{ 544{
545 unsigned long flags; 545 unsigned long flags;
546 546
547 if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state)) { 547 if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state))
548 return; 548 return;
549 } 549
550 550
551 spin_lock_irqsave(&devpriv->ao_spinlock, flags); 551 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
552 /* Kill the interrupts. */ 552 /* Kill the interrupts. */
@@ -597,11 +597,11 @@ static void pci224_ao_start(struct comedi_device *dev,
597 } else { 597 } else {
598 /* Enable interrupts. */ 598 /* Enable interrupts. */
599 spin_lock_irqsave(&devpriv->ao_spinlock, flags); 599 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
600 if (cmd->stop_src == TRIG_EXT) { 600 if (cmd->stop_src == TRIG_EXT)
601 devpriv->intsce = PCI224_INTR_EXT | PCI224_INTR_DAC; 601 devpriv->intsce = PCI224_INTR_EXT | PCI224_INTR_DAC;
602 } else { 602 else
603 devpriv->intsce = PCI224_INTR_DAC; 603 devpriv->intsce = PCI224_INTR_DAC;
604 } 604
605 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE); 605 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE);
606 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 606 spin_unlock_irqrestore(&devpriv->ao_spinlock, flags);
607 } 607 }
@@ -630,9 +630,9 @@ static void pci224_ao_handle_fifo(struct comedi_device *dev,
630 num_scans = comedi_buf_read_n_available(s->async) / bytes_per_scan; 630 num_scans = comedi_buf_read_n_available(s->async) / bytes_per_scan;
631 if (!devpriv->ao_stop_continuous) { 631 if (!devpriv->ao_stop_continuous) {
632 /* Fixed number of scans. */ 632 /* Fixed number of scans. */
633 if (num_scans > devpriv->ao_stop_count) { 633 if (num_scans > devpriv->ao_stop_count)
634 num_scans = devpriv->ao_stop_count; 634 num_scans = devpriv->ao_stop_count;
635 } 635
636 } 636 }
637 637
638 /* Determine how much room is in the FIFO (in samples). */ 638 /* Determine how much room is in the FIFO (in samples). */
@@ -669,13 +669,13 @@ static void pci224_ao_handle_fifo(struct comedi_device *dev,
669 } 669 }
670 } 670 }
671 /* Determine how many new scans can be put in the FIFO. */ 671 /* Determine how many new scans can be put in the FIFO. */
672 if (cmd->chanlist_len) { 672 if (cmd->chanlist_len)
673 room /= cmd->chanlist_len; 673 room /= cmd->chanlist_len;
674 } 674
675 /* Determine how many scans to process. */ 675 /* Determine how many scans to process. */
676 if (num_scans > room) { 676 if (num_scans > room)
677 num_scans = room; 677 num_scans = room;
678 } 678
679 /* Process scans. */ 679 /* Process scans. */
680 for (n = 0; n < num_scans; n++) { 680 for (n = 0; n < num_scans; n++) {
681 cfc_read_array_from_buffer(s, &devpriv->ao_scan_vals[0], 681 cfc_read_array_from_buffer(s, &devpriv->ao_scan_vals[0],
@@ -718,19 +718,19 @@ static void pci224_ao_handle_fifo(struct comedi_device *dev,
718 trig = PCI224_DACCON_TRIG_Z2CT0; 718 trig = PCI224_DACCON_TRIG_Z2CT0;
719 } else { 719 } else {
720 /* cmd->scan_begin_src == TRIG_EXT */ 720 /* cmd->scan_begin_src == TRIG_EXT */
721 if (cmd->scan_begin_arg & CR_INVERT) { 721 if (cmd->scan_begin_arg & CR_INVERT)
722 trig = PCI224_DACCON_TRIG_EXTN; 722 trig = PCI224_DACCON_TRIG_EXTN;
723 } else { 723 else
724 trig = PCI224_DACCON_TRIG_EXTP; 724 trig = PCI224_DACCON_TRIG_EXTP;
725 } 725
726 } 726 }
727 devpriv->daccon = COMBINE(devpriv->daccon, trig, 727 devpriv->daccon = COMBINE(devpriv->daccon, trig,
728 PCI224_DACCON_TRIG_MASK); 728 PCI224_DACCON_TRIG_MASK);
729 outw(devpriv->daccon, dev->iobase + PCI224_DACCON); 729 outw(devpriv->daccon, dev->iobase + PCI224_DACCON);
730 } 730 }
731 if (s->async->events) { 731 if (s->async->events)
732 comedi_event(dev, s); 732 comedi_event(dev, s);
733 } 733
734} 734}
735 735
736/* 736/*
@@ -855,9 +855,9 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
855 err++; 855 err++;
856 } 856 }
857 tmp = cmd->chanlist_len * CONVERT_PERIOD; 857 tmp = cmd->chanlist_len * CONVERT_PERIOD;
858 if (tmp < MIN_SCAN_PERIOD) { 858 if (tmp < MIN_SCAN_PERIOD)
859 tmp = MIN_SCAN_PERIOD; 859 tmp = MIN_SCAN_PERIOD;
860 } 860
861 if (cmd->scan_begin_arg < tmp) { 861 if (cmd->scan_begin_arg < tmp) {
862 cmd->scan_begin_arg = tmp; 862 cmd->scan_begin_arg = tmp;
863 err++; 863 err++;
@@ -966,9 +966,9 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
966 devpriv->cached_div1 = div1; 966 devpriv->cached_div1 = div1;
967 devpriv->cached_div2 = div2; 967 devpriv->cached_div2 = div2;
968 } 968 }
969 if (tmp != cmd->scan_begin_arg) { 969 if (tmp != cmd->scan_begin_arg)
970 err++; 970 err++;
971 } 971
972 } 972 }
973 973
974 if (err) 974 if (err)
@@ -994,13 +994,13 @@ pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
994 tmp = 0; 994 tmp = 0;
995 for (n = 0; n < cmd->chanlist_len; n++) { 995 for (n = 0; n < cmd->chanlist_len; n++) {
996 ch = CR_CHAN(cmd->chanlist[n]); 996 ch = CR_CHAN(cmd->chanlist[n]);
997 if (tmp & (1U << ch)) { 997 if (tmp & (1U << ch))
998 errors |= dupchan_err; 998 errors |= dupchan_err;
999 } 999
1000 tmp |= (1U << ch); 1000 tmp |= (1U << ch);
1001 if (CR_RANGE(cmd->chanlist[n]) != range) { 1001 if (CR_RANGE(cmd->chanlist[n]) != range)
1002 errors |= range_err; 1002 errors |= range_err;
1003 } 1003
1004 } 1004 }
1005 if (errors) { 1005 if (errors) {
1006 if (errors & dupchan_err) { 1006 if (errors & dupchan_err) {
@@ -1038,9 +1038,9 @@ static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1038 unsigned long flags; 1038 unsigned long flags;
1039 1039
1040 /* Cannot handle null/empty chanlist. */ 1040 /* Cannot handle null/empty chanlist. */
1041 if (cmd->chanlist == NULL || cmd->chanlist_len == 0) { 1041 if (cmd->chanlist == NULL || cmd->chanlist_len == 0)
1042 return -EINVAL; 1042 return -EINVAL;
1043 } 1043
1044 1044
1045 /* Determine which channels are enabled and their load order. */ 1045 /* Determine which channels are enabled and their load order. */
1046 devpriv->ao_enab = 0; 1046 devpriv->ao_enab = 0;
@@ -1050,9 +1050,9 @@ static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1050 devpriv->ao_enab |= 1U << ch; 1050 devpriv->ao_enab |= 1U << ch;
1051 rank = 0; 1051 rank = 0;
1052 for (j = 0; j < cmd->chanlist_len; j++) { 1052 for (j = 0; j < cmd->chanlist_len; j++) {
1053 if (CR_CHAN(cmd->chanlist[j]) < ch) { 1053 if (CR_CHAN(cmd->chanlist[j]) < ch)
1054 rank++; 1054 rank++;
1055 } 1055
1056 } 1056 }
1057 devpriv->ao_scan_order[rank] = i; 1057 devpriv->ao_scan_order[rank] = i;
1058 } 1058 }
@@ -1221,9 +1221,9 @@ pci224_ao_munge(struct comedi_device *dev, struct comedi_subdevice *s,
1221 offset = 32768; 1221 offset = 32768;
1222 } 1222 }
1223 /* Munge the data. */ 1223 /* Munge the data. */
1224 for (i = 0; i < length; i++) { 1224 for (i = 0; i < length; i++)
1225 array[i] = (array[i] << shift) - offset; 1225 array[i] = (array[i] << shift) - offset;
1226 } 1226
1227} 1227}
1228 1228
1229/* 1229/*
@@ -1254,15 +1254,15 @@ static irqreturn_t pci224_interrupt(int irq, void *d)
1254 cmd = &s->async->cmd; 1254 cmd = &s->async->cmd;
1255 if (valid_intstat & PCI224_INTR_EXT) { 1255 if (valid_intstat & PCI224_INTR_EXT) {
1256 devpriv->intsce &= ~PCI224_INTR_EXT; 1256 devpriv->intsce &= ~PCI224_INTR_EXT;
1257 if (cmd->start_src == TRIG_EXT) { 1257 if (cmd->start_src == TRIG_EXT)
1258 pci224_ao_start(dev, s); 1258 pci224_ao_start(dev, s);
1259 } else if (cmd->stop_src == TRIG_EXT) { 1259 else if (cmd->stop_src == TRIG_EXT)
1260 pci224_ao_stop(dev, s); 1260 pci224_ao_stop(dev, s);
1261 } 1261
1262 } 1262 }
1263 if (valid_intstat & PCI224_INTR_DAC) { 1263 if (valid_intstat & PCI224_INTR_DAC)
1264 pci224_ao_handle_fifo(dev, s); 1264 pci224_ao_handle_fifo(dev, s);
1265 } 1265
1266 } 1266 }
1267 /* Reenable interrupt sources. */ 1267 /* Reenable interrupt sources. */
1268 spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1268 spin_lock_irqsave(&devpriv->ao_spinlock, flags);
@@ -1381,23 +1381,23 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1381 /* Allocate readback buffer for AO channels. */ 1381 /* Allocate readback buffer for AO channels. */
1382 devpriv->ao_readback = kmalloc(sizeof(devpriv->ao_readback[0]) * 1382 devpriv->ao_readback = kmalloc(sizeof(devpriv->ao_readback[0]) *
1383 thisboard->ao_chans, GFP_KERNEL); 1383 thisboard->ao_chans, GFP_KERNEL);
1384 if (!devpriv->ao_readback) { 1384 if (!devpriv->ao_readback)
1385 return -ENOMEM; 1385 return -ENOMEM;
1386 } 1386
1387 1387
1388 /* Allocate buffer to hold values for AO channel scan. */ 1388 /* Allocate buffer to hold values for AO channel scan. */
1389 devpriv->ao_scan_vals = kmalloc(sizeof(devpriv->ao_scan_vals[0]) * 1389 devpriv->ao_scan_vals = kmalloc(sizeof(devpriv->ao_scan_vals[0]) *
1390 thisboard->ao_chans, GFP_KERNEL); 1390 thisboard->ao_chans, GFP_KERNEL);
1391 if (!devpriv->ao_scan_vals) { 1391 if (!devpriv->ao_scan_vals)
1392 return -ENOMEM; 1392 return -ENOMEM;
1393 } 1393
1394 1394
1395 /* Allocate buffer to hold AO channel scan order. */ 1395 /* Allocate buffer to hold AO channel scan order. */
1396 devpriv->ao_scan_order = kmalloc(sizeof(devpriv->ao_scan_order[0]) * 1396 devpriv->ao_scan_order = kmalloc(sizeof(devpriv->ao_scan_order[0]) *
1397 thisboard->ao_chans, GFP_KERNEL); 1397 thisboard->ao_chans, GFP_KERNEL);
1398 if (!devpriv->ao_scan_order) { 1398 if (!devpriv->ao_scan_order)
1399 return -ENOMEM; 1399 return -ENOMEM;
1400 } 1400
1401 1401
1402 /* Disable interrupt sources. */ 1402 /* Disable interrupt sources. */
1403 devpriv->intsce = 0; 1403 devpriv->intsce = 0;
@@ -1445,9 +1445,9 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1445 s->range_table_list = range_table_list = 1445 s->range_table_list = range_table_list =
1446 kmalloc(sizeof(struct comedi_lrange *) * s->n_chan, 1446 kmalloc(sizeof(struct comedi_lrange *) * s->n_chan,
1447 GFP_KERNEL); 1447 GFP_KERNEL);
1448 if (!s->range_table_list) { 1448 if (!s->range_table_list)
1449 return -ENOMEM; 1449 return -ENOMEM;
1450 } 1450
1451 for (n = 2; n < 3 + s->n_chan; n++) { 1451 for (n = 2; n < 3 + s->n_chan; n++) {
1452 if (it->options[n] < 0 || it->options[n] > 1) { 1452 if (it->options[n] < 0 || it->options[n] > 1) {
1453 printk(KERN_WARNING "comedi%d: %s: warning! " 1453 printk(KERN_WARNING "comedi%d: %s: warning! "
@@ -1459,11 +1459,11 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1459 for (n = 0; n < s->n_chan; n++) { 1459 for (n = 0; n < s->n_chan; n++) {
1460 if (n < COMEDI_NDEVCONFOPTS - 3 && 1460 if (n < COMEDI_NDEVCONFOPTS - 3 &&
1461 it->options[3 + n] == 1) { 1461 it->options[3 + n] == 1) {
1462 if (it->options[2] == 1) { 1462 if (it->options[2] == 1)
1463 range_table_list[n] = &range_pci234_ext; 1463 range_table_list[n] = &range_pci234_ext;
1464 } else { 1464 else
1465 range_table_list[n] = &range_bipolar5; 1465 range_table_list[n] = &range_bipolar5;
1466 } 1466
1467 } else { 1467 } else {
1468 if (it->options[2] == 1) { 1468 if (it->options[2] == 1) {
1469 range_table_list[n] = 1469 range_table_list[n] =
@@ -1506,11 +1506,11 @@ static int pci224_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1506 1506
1507 printk(KERN_INFO "comedi%d: %s ", dev->minor, dev->board_name); 1507 printk(KERN_INFO "comedi%d: %s ", dev->minor, dev->board_name);
1508 printk("(pci %s) ", pci_name(pci_dev)); 1508 printk("(pci %s) ", pci_name(pci_dev));
1509 if (irq) { 1509 if (irq)
1510 printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE")); 1510 printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE"));
1511 } else { 1511 else
1512 printk("(no irq) "); 1512 printk("(no irq) ");
1513 } 1513
1514 1514
1515 printk("attached\n"); 1515 printk("attached\n");
1516 1516
@@ -1529,9 +1529,9 @@ static int pci224_detach(struct comedi_device *dev)
1529{ 1529{
1530 printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, DRIVER_NAME); 1530 printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, DRIVER_NAME);
1531 1531
1532 if (dev->irq) { 1532 if (dev->irq)
1533 free_irq(dev->irq, dev); 1533 free_irq(dev->irq, dev);
1534 } 1534
1535 if (dev->subdevices) { 1535 if (dev->subdevices) {
1536 struct comedi_subdevice *s; 1536 struct comedi_subdevice *s;
1537 1537
@@ -1544,9 +1544,9 @@ static int pci224_detach(struct comedi_device *dev)
1544 kfree(devpriv->ao_scan_vals); 1544 kfree(devpriv->ao_scan_vals);
1545 kfree(devpriv->ao_scan_order); 1545 kfree(devpriv->ao_scan_order);
1546 if (devpriv->pci_dev) { 1546 if (devpriv->pci_dev) {
1547 if (dev->iobase) { 1547 if (dev->iobase)
1548 comedi_pci_disable(devpriv->pci_dev); 1548 comedi_pci_disable(devpriv->pci_dev);
1549 } 1549
1550 pci_dev_put(devpriv->pci_dev); 1550 pci_dev_put(devpriv->pci_dev);
1551 } 1551 }
1552 } 1552 }
diff --git a/drivers/staging/comedi/drivers/amplc_pci230.c b/drivers/staging/comedi/drivers/amplc_pci230.c
index 091a1a5822a8..7fffd967d47e 100644
--- a/drivers/staging/comedi/drivers/amplc_pci230.c
+++ b/drivers/staging/comedi/drivers/amplc_pci230.c
@@ -669,9 +669,9 @@ static short pci230_ai_read(struct comedi_device *dev)
669 669
670 /* If a bipolar range was specified, mangle it (twos 670 /* If a bipolar range was specified, mangle it (twos
671 * complement->straight binary). */ 671 * complement->straight binary). */
672 if (devpriv->ai_bipolar) { 672 if (devpriv->ai_bipolar)
673 data ^= 1 << (thisboard->ai_bits - 1); 673 data ^= 1 << (thisboard->ai_bits - 1);
674 } 674
675 return data; 675 return data;
676} 676}
677 677
@@ -680,9 +680,9 @@ static inline unsigned short pci230_ao_mangle_datum(struct comedi_device *dev,
680{ 680{
681 /* If a bipolar range was specified, mangle it (straight binary->twos 681 /* If a bipolar range was specified, mangle it (straight binary->twos
682 * complement). */ 682 * complement). */
683 if (devpriv->ao_bipolar) { 683 if (devpriv->ao_bipolar)
684 datum ^= 1 << (thisboard->ao_bits - 1); 684 datum ^= 1 << (thisboard->ao_bits - 1);
685 } 685
686 686
687 /* PCI230 is 12 bit - stored in upper bits of 16 bit register (lower 687 /* PCI230 is 12 bit - stored in upper bits of 16 bit register (lower
688 * four bits reserved for expansion). */ 688 * four bits reserved for expansion). */
@@ -734,9 +734,9 @@ static int pci230_attach(struct comedi_device *dev, struct comedi_devconfig *it)
734 734
735 /* Allocate the private structure area using alloc_private(). 735 /* Allocate the private structure area using alloc_private().
736 * Macro defined in comedidev.h - memsets struct fields to 0. */ 736 * Macro defined in comedidev.h - memsets struct fields to 0. */
737 if ((alloc_private(dev, sizeof(struct pci230_private))) < 0) { 737 if ((alloc_private(dev, sizeof(struct pci230_private))) < 0)
738 return -ENOMEM; 738 return -ENOMEM;
739 } 739
740 spin_lock_init(&devpriv->isr_spinlock); 740 spin_lock_init(&devpriv->isr_spinlock);
741 spin_lock_init(&devpriv->res_spinlock); 741 spin_lock_init(&devpriv->res_spinlock);
742 spin_lock_init(&devpriv->ai_stop_spinlock); 742 spin_lock_init(&devpriv->ai_stop_spinlock);
@@ -991,9 +991,9 @@ static int pci230_detach(struct comedi_device *dev)
991 991
992 if (devpriv) { 992 if (devpriv) {
993 if (devpriv->pci_dev) { 993 if (devpriv->pci_dev) {
994 if (dev->iobase) { 994 if (dev->iobase)
995 comedi_pci_disable(devpriv->pci_dev); 995 comedi_pci_disable(devpriv->pci_dev);
996 } 996
997 pci_dev_put(devpriv->pci_dev); 997 pci_dev_put(devpriv->pci_dev);
998 } 998 }
999 } 999 }
@@ -1055,9 +1055,9 @@ static void put_resources(struct comedi_device *dev, unsigned int res_mask,
1055 && (res_mask != 0); b <<= 1, i++) { 1055 && (res_mask != 0); b <<= 1, i++) {
1056 if ((res_mask & b) != 0) { 1056 if ((res_mask & b) != 0) {
1057 res_mask &= ~b; 1057 res_mask &= ~b;
1058 if (devpriv->res_owner[i] == owner) { 1058 if (devpriv->res_owner[i] == owner)
1059 devpriv->res_owner[i] = OWNER_NONE; 1059 devpriv->res_owner[i] = OWNER_NONE;
1060 } 1060
1061 } 1061 }
1062 } 1062 }
1063 spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags); 1063 spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags);
@@ -1132,11 +1132,11 @@ static int pci230_ai_rinsn(struct comedi_device *dev,
1132 } 1132 }
1133 devpriv->adcg = (devpriv->adcg & ~(3 << gainshift)) 1133 devpriv->adcg = (devpriv->adcg & ~(3 << gainshift))
1134 | (pci230_ai_gain[range] << gainshift); 1134 | (pci230_ai_gain[range] << gainshift);
1135 if (devpriv->ai_bipolar) { 1135 if (devpriv->ai_bipolar)
1136 adccon |= PCI230_ADC_IR_BIP; 1136 adccon |= PCI230_ADC_IR_BIP;
1137 } else { 1137 else
1138 adccon |= PCI230_ADC_IR_UNI; 1138 adccon |= PCI230_ADC_IR_UNI;
1139 } 1139
1140 1140
1141 /* Enable only this channel in the scan list - otherwise by default 1141 /* Enable only this channel in the scan list - otherwise by default
1142 * we'll get one sample from each channel. */ 1142 * we'll get one sample from each channel. */
@@ -1408,13 +1408,13 @@ static int pci230_ao_cmdtest(struct comedi_device *dev,
1408 chan = CR_CHAN(cmd->chanlist[n]); 1408 chan = CR_CHAN(cmd->chanlist[n]);
1409 range = CR_RANGE(cmd->chanlist[n]); 1409 range = CR_RANGE(cmd->chanlist[n]);
1410 /* Channel numbers must strictly increase. */ 1410 /* Channel numbers must strictly increase. */
1411 if (chan < prev_chan) { 1411 if (chan < prev_chan)
1412 errors |= seq_err; 1412 errors |= seq_err;
1413 } 1413
1414 /* Ranges must be the same. */ 1414 /* Ranges must be the same. */
1415 if (range != first_range) { 1415 if (range != first_range)
1416 errors |= range_err; 1416 errors |= range_err;
1417 } 1417
1418 prev_chan = chan; 1418 prev_chan = chan;
1419 } 1419 }
1420 if (errors != 0) { 1420 if (errors != 0) {
@@ -1583,9 +1583,9 @@ static int pci230_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1583 1583
1584 if (cmd->scan_begin_src == TRIG_TIMER) { 1584 if (cmd->scan_begin_src == TRIG_TIMER) {
1585 /* Claim Z2-CT1. */ 1585 /* Claim Z2-CT1. */
1586 if (!get_one_resource(dev, RES_Z2CT1, OWNER_AOCMD)) { 1586 if (!get_one_resource(dev, RES_Z2CT1, OWNER_AOCMD))
1587 return -EBUSY; 1587 return -EBUSY;
1588 } 1588
1589 } 1589 }
1590 1590
1591 /* Get number of scans required. */ 1591 /* Get number of scans required. */
@@ -1609,9 +1609,9 @@ static int pci230_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1609 unsigned int i; 1609 unsigned int i;
1610 1610
1611 dacen = 0; 1611 dacen = 0;
1612 for (i = 0; i < cmd->chanlist_len; i++) { 1612 for (i = 0; i < cmd->chanlist_len; i++)
1613 dacen |= 1 << CR_CHAN(cmd->chanlist[i]); 1613 dacen |= 1 << CR_CHAN(cmd->chanlist[i]);
1614 } 1614
1615 /* Set channel scan list. */ 1615 /* Set channel scan list. */
1616 outw(dacen, dev->iobase + PCI230P2_DACEN); 1616 outw(dacen, dev->iobase + PCI230P2_DACEN);
1617 /* 1617 /*
@@ -1656,9 +1656,9 @@ static int pci230_ai_check_scan_period(struct comedi_cmd *cmd)
1656 int err = 0; 1656 int err = 0;
1657 1657
1658 chanlist_len = cmd->chanlist_len; 1658 chanlist_len = cmd->chanlist_len;
1659 if (cmd->chanlist_len == 0) { 1659 if (cmd->chanlist_len == 0)
1660 chanlist_len = 1; 1660 chanlist_len = 1;
1661 } 1661
1662 min_scan_period = chanlist_len * cmd->convert_arg; 1662 min_scan_period = chanlist_len * cmd->convert_arg;
1663 if ((min_scan_period < chanlist_len) 1663 if ((min_scan_period < chanlist_len)
1664 || (min_scan_period < cmd->convert_arg)) { 1664 || (min_scan_period < cmd->convert_arg)) {
@@ -1777,11 +1777,11 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1777 * single-ended or pseudo-differential. */ 1777 * single-ended or pseudo-differential. */
1778 if (cmd->chanlist && (cmd->chanlist_len > 0)) { 1778 if (cmd->chanlist && (cmd->chanlist_len > 0)) {
1779 /* Peek analogue reference of first channel. */ 1779 /* Peek analogue reference of first channel. */
1780 if (CR_AREF(cmd->chanlist[0]) == AREF_DIFF) { 1780 if (CR_AREF(cmd->chanlist[0]) == AREF_DIFF)
1781 max_speed_ai = MAX_SPEED_AI_DIFF; 1781 max_speed_ai = MAX_SPEED_AI_DIFF;
1782 } else { 1782 else
1783 max_speed_ai = MAX_SPEED_AI_SE; 1783 max_speed_ai = MAX_SPEED_AI_SE;
1784 } 1784
1785 } else { 1785 } else {
1786 /* No channel list. Assume single-ended. */ 1786 /* No channel list. Assume single-ended. */
1787 max_speed_ai = MAX_SPEED_AI_SE; 1787 max_speed_ai = MAX_SPEED_AI_SE;
@@ -1871,9 +1871,9 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1871 } 1871 }
1872 } else if (cmd->scan_begin_src == TRIG_TIMER) { 1872 } else if (cmd->scan_begin_src == TRIG_TIMER) {
1873 /* N.B. cmd->convert_arg is also TRIG_TIMER */ 1873 /* N.B. cmd->convert_arg is also TRIG_TIMER */
1874 if (!pci230_ai_check_scan_period(cmd)) { 1874 if (!pci230_ai_check_scan_period(cmd))
1875 err++; 1875 err++;
1876 } 1876
1877 } else { 1877 } else {
1878 if (cmd->scan_begin_arg != 0) { 1878 if (cmd->scan_begin_arg != 0) {
1879 cmd->scan_begin_arg = 0; 1879 cmd->scan_begin_arg = 0;
@@ -1961,13 +1961,13 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1961 errors |= seq_err; 1961 errors |= seq_err;
1962 } 1962 }
1963 /* Channels must have same AREF. */ 1963 /* Channels must have same AREF. */
1964 if (aref != prev_aref) { 1964 if (aref != prev_aref)
1965 errors |= aref_err; 1965 errors |= aref_err;
1966 } 1966
1967 /* Channel ranges must have same polarity. */ 1967 /* Channel ranges must have same polarity. */
1968 if (polarity != prev_polarity) { 1968 if (polarity != prev_polarity)
1969 errors |= polarity_err; 1969 errors |= polarity_err;
1970 } 1970
1971 /* Single-ended channel pairs must have same 1971 /* Single-ended channel pairs must have same
1972 * range. */ 1972 * range. */
1973 if ((aref != AREF_DIFF) 1973 if ((aref != AREF_DIFF)
@@ -1987,9 +1987,9 @@ static int pci230_ai_cmdtest(struct comedi_device *dev,
1987 } 1987 }
1988 /* If channel list is a repeating subsequence, need a whole 1988 /* If channel list is a repeating subsequence, need a whole
1989 * number of repeats. */ 1989 * number of repeats. */
1990 if ((n % subseq_len) != 0) { 1990 if ((n % subseq_len) != 0)
1991 errors |= seq_err; 1991 errors |= seq_err;
1992 } 1992
1993 if ((devpriv->hwver > 0) && (devpriv->hwver < 4)) { 1993 if ((devpriv->hwver > 0) && (devpriv->hwver < 4)) {
1994 /* 1994 /*
1995 * Buggy PCI230+ or PCI260+ requires channel 0 to be 1995 * Buggy PCI230+ or PCI260+ requires channel 0 to be
@@ -2228,9 +2228,9 @@ static void pci230_ai_start(struct comedi_device *dev,
2228 devpriv->adccon = (devpriv->adccon & ~PCI230_ADC_TRIG_MASK) 2228 devpriv->adccon = (devpriv->adccon & ~PCI230_ADC_TRIG_MASK)
2229 | conv; 2229 | conv;
2230 outw(devpriv->adccon, dev->iobase + PCI230_ADCCON); 2230 outw(devpriv->adccon, dev->iobase + PCI230_ADCCON);
2231 if (cmd->convert_src == TRIG_INT) { 2231 if (cmd->convert_src == TRIG_INT)
2232 async->inttrig = pci230_ai_inttrig_convert; 2232 async->inttrig = pci230_ai_inttrig_convert;
2233 } 2233
2234 /* Update FIFO interrupt trigger level, which is currently 2234 /* Update FIFO interrupt trigger level, which is currently
2235 * set to "full". */ 2235 * set to "full". */
2236 pci230_ai_update_fifo_trigger_level(dev, s); 2236 pci230_ai_update_fifo_trigger_level(dev, s);
@@ -2345,9 +2345,9 @@ static int pci230_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2345 } 2345 }
2346 } 2346 }
2347 /* Claim resources. */ 2347 /* Claim resources. */
2348 if (!get_resources(dev, res_mask, OWNER_AICMD)) { 2348 if (!get_resources(dev, res_mask, OWNER_AICMD))
2349 return -EBUSY; 2349 return -EBUSY;
2350 } 2350
2351 2351
2352 /* Get number of scans required. */ 2352 /* Get number of scans required. */
2353 if (cmd->stop_src == TRIG_COUNT) { 2353 if (cmd->stop_src == TRIG_COUNT) {
@@ -2392,11 +2392,11 @@ static int pci230_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2392 2392
2393 range = CR_RANGE(cmd->chanlist[0]); 2393 range = CR_RANGE(cmd->chanlist[0]);
2394 devpriv->ai_bipolar = pci230_ai_bipolar[range]; 2394 devpriv->ai_bipolar = pci230_ai_bipolar[range];
2395 if (devpriv->ai_bipolar) { 2395 if (devpriv->ai_bipolar)
2396 adccon |= PCI230_ADC_IR_BIP; 2396 adccon |= PCI230_ADC_IR_BIP;
2397 } else { 2397 else
2398 adccon |= PCI230_ADC_IR_UNI; 2398 adccon |= PCI230_ADC_IR_UNI;
2399 } 2399
2400 for (i = 0; i < cmd->chanlist_len; i++) { 2400 for (i = 0; i < cmd->chanlist_len; i++) {
2401 unsigned int gainshift; 2401 unsigned int gainshift;
2402 2402
@@ -2543,9 +2543,9 @@ static unsigned int pci230_choose_clk_count(uint64_t ns, unsigned int *count,
2543 2543
2544 for (clk_src = CLK_10MHZ;; clk_src++) { 2544 for (clk_src = CLK_10MHZ;; clk_src++) {
2545 cnt = divide_ns(ns, pci230_timebase[clk_src], round_mode); 2545 cnt = divide_ns(ns, pci230_timebase[clk_src], round_mode);
2546 if ((cnt <= 65536) || (clk_src == CLK_1KHZ)) { 2546 if ((cnt <= 65536) || (clk_src == CLK_1KHZ))
2547 break; 2547 break;
2548 } 2548
2549 } 2549 }
2550 *count = cnt; 2550 *count = cnt;
2551 return clk_src; 2551 return clk_src;
@@ -2575,9 +2575,9 @@ static void pci230_ct_setup_ns_mode(struct comedi_device *dev, unsigned int ct,
2575 /* Program clock source. */ 2575 /* Program clock source. */
2576 outb(CLK_CONFIG(ct, clk_src), devpriv->iobase1 + PCI230_ZCLK_SCE); 2576 outb(CLK_CONFIG(ct, clk_src), devpriv->iobase1 + PCI230_ZCLK_SCE);
2577 /* Set initial count. */ 2577 /* Set initial count. */
2578 if (count >= 65536) { 2578 if (count >= 65536)
2579 count = 0; 2579 count = 0;
2580 } 2580
2581 i8254_write(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, ct, count); 2581 i8254_write(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, ct, count);
2582} 2582}
2583 2583
@@ -2599,9 +2599,9 @@ static irqreturn_t pci230_interrupt(int irq, void *d)
2599 /* Read interrupt status/enable register. */ 2599 /* Read interrupt status/enable register. */
2600 status_int = inb(devpriv->iobase1 + PCI230_INT_STAT); 2600 status_int = inb(devpriv->iobase1 + PCI230_INT_STAT);
2601 2601
2602 if (status_int == PCI230_INT_DISABLE) { 2602 if (status_int == PCI230_INT_DISABLE)
2603 return IRQ_NONE; 2603 return IRQ_NONE;
2604 } 2604
2605 2605
2606 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2606 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
2607 valid_status_int = devpriv->int_en & status_int; 2607 valid_status_int = devpriv->int_en & status_int;
@@ -2660,9 +2660,9 @@ static void pci230_handle_ao_nofifo(struct comedi_device *dev,
2660 struct comedi_async *async = s->async; 2660 struct comedi_async *async = s->async;
2661 struct comedi_cmd *cmd = &async->cmd; 2661 struct comedi_cmd *cmd = &async->cmd;
2662 2662
2663 if (!devpriv->ao_continuous && (devpriv->ao_scan_count == 0)) { 2663 if (!devpriv->ao_continuous && (devpriv->ao_scan_count == 0))
2664 return; 2664 return;
2665 } 2665
2666 2666
2667 for (i = 0; i < cmd->chanlist_len; i++) { 2667 for (i = 0; i < cmd->chanlist_len; i++) {
2668 /* Read sample from Comedi's circular buffer. */ 2668 /* Read sample from Comedi's circular buffer. */
@@ -2711,9 +2711,9 @@ static int pci230_handle_ao_fifo(struct comedi_device *dev,
2711 num_scans = comedi_buf_read_n_available(async) / bytes_per_scan; 2711 num_scans = comedi_buf_read_n_available(async) / bytes_per_scan;
2712 if (!devpriv->ao_continuous) { 2712 if (!devpriv->ao_continuous) {
2713 /* Fixed number of scans. */ 2713 /* Fixed number of scans. */
2714 if (num_scans > devpriv->ao_scan_count) { 2714 if (num_scans > devpriv->ao_scan_count)
2715 num_scans = devpriv->ao_scan_count; 2715 num_scans = devpriv->ao_scan_count;
2716 } 2716
2717 if (devpriv->ao_scan_count == 0) { 2717 if (devpriv->ao_scan_count == 0) {
2718 /* End of acquisition. */ 2718 /* End of acquisition. */
2719 events |= COMEDI_CB_EOA; 2719 events |= COMEDI_CB_EOA;
@@ -2736,21 +2736,21 @@ static int pci230_handle_ao_fifo(struct comedi_device *dev,
2736 } 2736 }
2737 if (events == 0) { 2737 if (events == 0) {
2738 /* Determine how much room is in the FIFO (in samples). */ 2738 /* Determine how much room is in the FIFO (in samples). */
2739 if ((dacstat & PCI230P2_DAC_FIFO_FULL) != 0) { 2739 if ((dacstat & PCI230P2_DAC_FIFO_FULL) != 0)
2740 room = PCI230P2_DAC_FIFOROOM_FULL; 2740 room = PCI230P2_DAC_FIFOROOM_FULL;
2741 } else if ((dacstat & PCI230P2_DAC_FIFO_HALF) != 0) { 2741 else if ((dacstat & PCI230P2_DAC_FIFO_HALF) != 0)
2742 room = PCI230P2_DAC_FIFOROOM_HALFTOFULL; 2742 room = PCI230P2_DAC_FIFOROOM_HALFTOFULL;
2743 } else if ((dacstat & PCI230P2_DAC_FIFO_EMPTY) != 0) { 2743 else if ((dacstat & PCI230P2_DAC_FIFO_EMPTY) != 0)
2744 room = PCI230P2_DAC_FIFOROOM_EMPTY; 2744 room = PCI230P2_DAC_FIFOROOM_EMPTY;
2745 } else { 2745 else
2746 room = PCI230P2_DAC_FIFOROOM_ONETOHALF; 2746 room = PCI230P2_DAC_FIFOROOM_ONETOHALF;
2747 } 2747
2748 /* Convert room to number of scans that can be added. */ 2748 /* Convert room to number of scans that can be added. */
2749 room /= cmd->chanlist_len; 2749 room /= cmd->chanlist_len;
2750 /* Determine number of scans to process. */ 2750 /* Determine number of scans to process. */
2751 if (num_scans > room) { 2751 if (num_scans > room)
2752 num_scans = room; 2752 num_scans = room;
2753 } 2753
2754 /* Process scans. */ 2754 /* Process scans. */
2755 for (n = 0; n < num_scans; n++) { 2755 for (n = 0; n < num_scans; n++) {
2756 for (i = 0; i < cmd->chanlist_len; i++) { 2756 for (i = 0; i < cmd->chanlist_len; i++) {
@@ -2817,14 +2817,14 @@ static void pci230_handle_ai(struct comedi_device *dev,
2817 } else { 2817 } else {
2818 todo = (devpriv->ai_scan_count * scanlen) 2818 todo = (devpriv->ai_scan_count * scanlen)
2819 - devpriv->ai_scan_pos; 2819 - devpriv->ai_scan_pos;
2820 if (todo > PCI230_ADC_FIFOLEVEL_HALFFULL) { 2820 if (todo > PCI230_ADC_FIFOLEVEL_HALFFULL)
2821 todo = PCI230_ADC_FIFOLEVEL_HALFFULL; 2821 todo = PCI230_ADC_FIFOLEVEL_HALFFULL;
2822 } 2822
2823 } 2823 }
2824 2824
2825 if (todo == 0) { 2825 if (todo == 0)
2826 return; 2826 return;
2827 } 2827
2828 2828
2829 fifoamount = 0; 2829 fifoamount = 0;
2830 for (i = 0; i < todo; i++) { 2830 for (i = 0; i < todo; i++) {
@@ -2906,9 +2906,9 @@ static void pci230_ao_stop(struct comedi_device *dev,
2906 spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags); 2906 spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags);
2907 started = test_and_clear_bit(AO_CMD_STARTED, &devpriv->state); 2907 started = test_and_clear_bit(AO_CMD_STARTED, &devpriv->state);
2908 spin_unlock_irqrestore(&devpriv->ao_stop_spinlock, irqflags); 2908 spin_unlock_irqrestore(&devpriv->ao_stop_spinlock, irqflags);
2909 if (!started) { 2909 if (!started)
2910 return; 2910 return;
2911 } 2911
2912 2912
2913 cmd = &s->async->cmd; 2913 cmd = &s->async->cmd;
2914 if (cmd->scan_begin_src == TRIG_TIMER) { 2914 if (cmd->scan_begin_src == TRIG_TIMER) {
@@ -2968,9 +2968,9 @@ static void pci230_ai_stop(struct comedi_device *dev,
2968 spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); 2968 spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags);
2969 started = test_and_clear_bit(AI_CMD_STARTED, &devpriv->state); 2969 started = test_and_clear_bit(AI_CMD_STARTED, &devpriv->state);
2970 spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags); 2970 spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags);
2971 if (!started) { 2971 if (!started)
2972 return; 2972 return;
2973 } 2973
2974 2974
2975 cmd = &s->async->cmd; 2975 cmd = &s->async->cmd;
2976 if (cmd->convert_src == TRIG_TIMER) { 2976 if (cmd->convert_src == TRIG_TIMER) {
diff --git a/drivers/staging/comedi/drivers/cb_das16_cs.c b/drivers/staging/comedi/drivers/cb_das16_cs.c
index 30b522c0bf2c..cfeb11f443e3 100644
--- a/drivers/staging/comedi/drivers/cb_das16_cs.c
+++ b/drivers/staging/comedi/drivers/cb_das16_cs.c
@@ -175,17 +175,18 @@ static int das16cs_attach(struct comedi_device *dev,
175 printk("I/O base=0x%04lx ", dev->iobase); 175 printk("I/O base=0x%04lx ", dev->iobase);
176 176
177 printk("fingerprint:\n"); 177 printk("fingerprint:\n");
178 for (i = 0; i < 48; i += 2) { 178 for (i = 0; i < 48; i += 2)
179 printk("%04x ", inw(dev->iobase + i)); 179 printk("%04x ", inw(dev->iobase + i));
180 } 180
181 printk("\n"); 181 printk("\n");
182 182
183 ret = request_irq(link->irq, das16cs_interrupt, 183 ret = request_irq(link->irq, das16cs_interrupt,
184 IRQF_SHARED, "cb_das16_cs", dev); 184 IRQF_SHARED, "cb_das16_cs", dev);
185 if (ret < 0) { 185 if (ret < 0)
186 return ret; 186 return ret;
187 } 187
188 dev->irq = link->irq; 188 dev->irq = link->irq;
189
189 printk("irq=%u ", dev->irq); 190 printk("irq=%u ", dev->irq);
190 191
191 dev->board_ptr = das16cs_probe(dev, link); 192 dev->board_ptr = das16cs_probe(dev, link);
@@ -262,9 +263,9 @@ static int das16cs_detach(struct comedi_device *dev)
262{ 263{
263 printk("comedi%d: das16cs: remove\n", dev->minor); 264 printk("comedi%d: das16cs: remove\n", dev->minor);
264 265
265 if (dev->irq) { 266 if (dev->irq)
266 free_irq(dev->irq, dev); 267 free_irq(dev->irq, dev);
267 } 268
268 269
269 return 0; 270 return 0;
270} 271}
@@ -834,6 +835,9 @@ static struct pcmcia_device_id das16cs_id_table[] = {
834}; 835};
835 836
836MODULE_DEVICE_TABLE(pcmcia, das16cs_id_table); 837MODULE_DEVICE_TABLE(pcmcia, das16cs_id_table);
838MODULE_AUTHOR("David A. Schleef <ds@schleef.org>");
839MODULE_DESCRIPTION("Comedi driver for Computer Boards PC-CARD DAS16/16");
840MODULE_LICENSE("GPL");
837 841
838struct pcmcia_driver das16cs_driver = { 842struct pcmcia_driver das16cs_driver = {
839 .probe = das16cs_pcmcia_attach, 843 .probe = das16cs_pcmcia_attach,
diff --git a/drivers/staging/comedi/drivers/cb_pcidas64.c b/drivers/staging/comedi/drivers/cb_pcidas64.c
index 82295e0f07f9..79aa286e9bb4 100644
--- a/drivers/staging/comedi/drivers/cb_pcidas64.c
+++ b/drivers/staging/comedi/drivers/cb_pcidas64.c
@@ -107,6 +107,8 @@ TODO:
107#define PRESCALED_TIMER_BASE 10000 /* 100kHz 'prescaled' clock for slow aquisition, maybe I'll support this someday */ 107#define PRESCALED_TIMER_BASE 10000 /* 100kHz 'prescaled' clock for slow aquisition, maybe I'll support this someday */
108#define DMA_BUFFER_SIZE 0x1000 108#define DMA_BUFFER_SIZE 0x1000
109 109
110#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
111
110/* maximum value that can be loaded into board's 24-bit counters*/ 112/* maximum value that can be loaded into board's 24-bit counters*/
111static const int max_counter_value = 0xffffff; 113static const int max_counter_value = 0xffffff;
112 114
@@ -1099,9 +1101,9 @@ struct pcidas64_private {
1099 resource_size_t main_phys_iobase; 1101 resource_size_t main_phys_iobase;
1100 resource_size_t dio_counter_phys_iobase; 1102 resource_size_t dio_counter_phys_iobase;
1101 /* base addresses (ioremapped) */ 1103 /* base addresses (ioremapped) */
1102 void *plx9080_iobase; 1104 void __iomem *plx9080_iobase;
1103 void *main_iobase; 1105 void __iomem *main_iobase;
1104 void *dio_counter_iobase; 1106 void __iomem *dio_counter_iobase;
1105 /* local address (used by dma controller) */ 1107 /* local address (used by dma controller) */
1106 uint32_t local0_iobase; 1108 uint32_t local0_iobase;
1107 uint32_t local1_iobase; 1109 uint32_t local1_iobase;
@@ -1314,7 +1316,7 @@ static inline int ao_cmd_is_supported(const struct pcidas64_board *board)
1314static void init_plx9080(struct comedi_device *dev) 1316static void init_plx9080(struct comedi_device *dev)
1315{ 1317{
1316 uint32_t bits; 1318 uint32_t bits;
1317 void *plx_iobase = priv(dev)->plx9080_iobase; 1319 void __iomem *plx_iobase = priv(dev)->plx9080_iobase;
1318 1320
1319 priv(dev)->plx_control_bits = 1321 priv(dev)->plx_control_bits =
1320 readl(priv(dev)->plx9080_iobase + PLX_CONTROL_REG); 1322 readl(priv(dev)->plx9080_iobase + PLX_CONTROL_REG);
@@ -1404,7 +1406,7 @@ static void init_plx9080(struct comedi_device *dev)
1404static int setup_subdevices(struct comedi_device *dev) 1406static int setup_subdevices(struct comedi_device *dev)
1405{ 1407{
1406 struct comedi_subdevice *s; 1408 struct comedi_subdevice *s;
1407 void *dio_8255_iobase; 1409 void __iomem *dio_8255_iobase;
1408 int i; 1410 int i;
1409 1411
1410 if (alloc_subdevices(dev, 10) < 0) 1412 if (alloc_subdevices(dev, 10) < 0)
@@ -1430,7 +1432,6 @@ static int setup_subdevices(struct comedi_device *dev)
1430 s->do_cmdtest = ai_cmdtest; 1432 s->do_cmdtest = ai_cmdtest;
1431 s->cancel = ai_cancel; 1433 s->cancel = ai_cancel;
1432 if (board(dev)->layout == LAYOUT_4020) { 1434 if (board(dev)->layout == LAYOUT_4020) {
1433 unsigned int i;
1434 uint8_t data; 1435 uint8_t data;
1435 /* set adc to read from inputs (not internal calibration sources) */ 1436 /* set adc to read from inputs (not internal calibration sources) */
1436 priv(dev)->i2c_cal_range_bits = adc_src_4020_bits(4); 1437 priv(dev)->i2c_cal_range_bits = adc_src_4020_bits(4);
@@ -1612,7 +1613,7 @@ static void init_stc_registers(struct comedi_device *dev)
1612 disable_ai_pacing(dev); 1613 disable_ai_pacing(dev);
1613}; 1614};
1614 1615
1615int alloc_and_init_dma_members(struct comedi_device *dev) 1616static int alloc_and_init_dma_members(struct comedi_device *dev)
1616{ 1617{
1617 int i; 1618 int i;
1618 1619
@@ -1621,9 +1622,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev)
1621 priv(dev)->ai_buffer[i] = 1622 priv(dev)->ai_buffer[i] =
1622 pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE, 1623 pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE,
1623 &priv(dev)->ai_buffer_bus_addr[i]); 1624 &priv(dev)->ai_buffer_bus_addr[i]);
1624 if (priv(dev)->ai_buffer[i] == NULL) { 1625 if (priv(dev)->ai_buffer[i] == NULL)
1625 return -ENOMEM; 1626 return -ENOMEM;
1626 } 1627
1627 } 1628 }
1628 for (i = 0; i < AO_DMA_RING_COUNT; i++) { 1629 for (i = 0; i < AO_DMA_RING_COUNT; i++) {
1629 if (ao_cmd_is_supported(board(dev))) { 1630 if (ao_cmd_is_supported(board(dev))) {
@@ -1632,9 +1633,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev)
1632 DMA_BUFFER_SIZE, 1633 DMA_BUFFER_SIZE,
1633 &priv(dev)-> 1634 &priv(dev)->
1634 ao_buffer_bus_addr[i]); 1635 ao_buffer_bus_addr[i]);
1635 if (priv(dev)->ao_buffer[i] == NULL) { 1636 if (priv(dev)->ao_buffer[i] == NULL)
1636 return -ENOMEM; 1637 return -ENOMEM;
1637 } 1638
1638 } 1639 }
1639 } 1640 }
1640 /* allocate dma descriptors */ 1641 /* allocate dma descriptors */
@@ -1643,9 +1644,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev)
1643 sizeof(struct plx_dma_desc) * 1644 sizeof(struct plx_dma_desc) *
1644 ai_dma_ring_count(board(dev)), 1645 ai_dma_ring_count(board(dev)),
1645 &priv(dev)->ai_dma_desc_bus_addr); 1646 &priv(dev)->ai_dma_desc_bus_addr);
1646 if (priv(dev)->ai_dma_desc == NULL) { 1647 if (priv(dev)->ai_dma_desc == NULL)
1647 return -ENOMEM; 1648 return -ENOMEM;
1648 } 1649
1649 DEBUG_PRINT("ai dma descriptors start at bus addr 0x%x\n", 1650 DEBUG_PRINT("ai dma descriptors start at bus addr 0x%x\n",
1650 priv(dev)->ai_dma_desc_bus_addr); 1651 priv(dev)->ai_dma_desc_bus_addr);
1651 if (ao_cmd_is_supported(board(dev))) { 1652 if (ao_cmd_is_supported(board(dev))) {
@@ -1654,9 +1655,9 @@ int alloc_and_init_dma_members(struct comedi_device *dev)
1654 sizeof(struct plx_dma_desc) * 1655 sizeof(struct plx_dma_desc) *
1655 AO_DMA_RING_COUNT, 1656 AO_DMA_RING_COUNT,
1656 &priv(dev)->ao_dma_desc_bus_addr); 1657 &priv(dev)->ao_dma_desc_bus_addr);
1657 if (priv(dev)->ao_dma_desc == NULL) { 1658 if (priv(dev)->ao_dma_desc == NULL)
1658 return -ENOMEM; 1659 return -ENOMEM;
1659 } 1660
1660 DEBUG_PRINT("ao dma descriptors start at bus addr 0x%x\n", 1661 DEBUG_PRINT("ao dma descriptors start at bus addr 0x%x\n",
1661 priv(dev)->ao_dma_desc_bus_addr); 1662 priv(dev)->ao_dma_desc_bus_addr);
1662 } 1663 }
@@ -1848,9 +1849,9 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it)
1848 printk(" irq %u\n", dev->irq); 1849 printk(" irq %u\n", dev->irq);
1849 1850
1850 retval = setup_subdevices(dev); 1851 retval = setup_subdevices(dev);
1851 if (retval < 0) { 1852 if (retval < 0)
1852 return retval; 1853 return retval;
1853 } 1854
1854 1855
1855 return 0; 1856 return 0;
1856} 1857}
@@ -1875,12 +1876,12 @@ static int detach(struct comedi_device *dev)
1875 if (priv(dev)->hw_dev) { 1876 if (priv(dev)->hw_dev) {
1876 if (priv(dev)->plx9080_iobase) { 1877 if (priv(dev)->plx9080_iobase) {
1877 disable_plx_interrupts(dev); 1878 disable_plx_interrupts(dev);
1878 iounmap((void *)priv(dev)->plx9080_iobase); 1879 iounmap(priv(dev)->plx9080_iobase);
1879 } 1880 }
1880 if (priv(dev)->main_iobase) 1881 if (priv(dev)->main_iobase)
1881 iounmap((void *)priv(dev)->main_iobase); 1882 iounmap(priv(dev)->main_iobase);
1882 if (priv(dev)->dio_counter_iobase) 1883 if (priv(dev)->dio_counter_iobase)
1883 iounmap((void *)priv(dev)->dio_counter_iobase); 1884 iounmap(priv(dev)->dio_counter_iobase);
1884 /* free pci dma buffers */ 1885 /* free pci dma buffers */
1885 for (i = 0; i < ai_dma_ring_count(board(dev)); i++) { 1886 for (i = 0; i < ai_dma_ring_count(board(dev)); i++) {
1886 if (priv(dev)->ai_buffer[i]) 1887 if (priv(dev)->ai_buffer[i])
@@ -1919,9 +1920,9 @@ static int detach(struct comedi_device *dev)
1919 priv(dev)->ao_dma_desc, 1920 priv(dev)->ao_dma_desc,
1920 priv(dev)-> 1921 priv(dev)->
1921 ao_dma_desc_bus_addr); 1922 ao_dma_desc_bus_addr);
1922 if (priv(dev)->main_phys_iobase) { 1923 if (priv(dev)->main_phys_iobase)
1923 comedi_pci_disable(priv(dev)->hw_dev); 1924 comedi_pci_disable(priv(dev)->hw_dev);
1924 } 1925
1925 pci_dev_put(priv(dev)->hw_dev); 1926 pci_dev_put(priv(dev)->hw_dev);
1926 } 1927 }
1927 } 1928 }
@@ -2902,9 +2903,9 @@ static void pio_drain_ai_fifo_16(struct comedi_device *dev)
2902 if (cmd->stop_src == TRIG_COUNT) { 2903 if (cmd->stop_src == TRIG_COUNT) {
2903 if (priv(dev)->ai_count == 0) 2904 if (priv(dev)->ai_count == 0)
2904 break; 2905 break;
2905 if (num_samples > priv(dev)->ai_count) { 2906 if (num_samples > priv(dev)->ai_count)
2906 num_samples = priv(dev)->ai_count; 2907 num_samples = priv(dev)->ai_count;
2907 } 2908
2908 priv(dev)->ai_count -= num_samples; 2909 priv(dev)->ai_count -= num_samples;
2909 } 2910 }
2910 2911
@@ -2943,9 +2944,9 @@ static void pio_drain_ai_fifo_32(struct comedi_device *dev)
2943 readw(priv(dev)->main_iobase + ADC_READ_PNTR_REG) & 0x7fff; 2944 readw(priv(dev)->main_iobase + ADC_READ_PNTR_REG) & 0x7fff;
2944 2945
2945 if (cmd->stop_src == TRIG_COUNT) { 2946 if (cmd->stop_src == TRIG_COUNT) {
2946 if (max_transfer > priv(dev)->ai_count) { 2947 if (max_transfer > priv(dev)->ai_count)
2947 max_transfer = priv(dev)->ai_count; 2948 max_transfer = priv(dev)->ai_count;
2948 } 2949
2949 } 2950 }
2950 for (i = 0; read_code != write_code && i < max_transfer;) { 2951 for (i = 0; read_code != write_code && i < max_transfer;) {
2951 fifo_data = readl(priv(dev)->dio_counter_iobase + ADC_FIFO_REG); 2952 fifo_data = readl(priv(dev)->dio_counter_iobase + ADC_FIFO_REG);
@@ -2964,9 +2965,9 @@ static void pio_drain_ai_fifo_32(struct comedi_device *dev)
2964/* empty fifo */ 2965/* empty fifo */
2965static void pio_drain_ai_fifo(struct comedi_device *dev) 2966static void pio_drain_ai_fifo(struct comedi_device *dev)
2966{ 2967{
2967 if (board(dev)->layout == LAYOUT_4020) { 2968 if (board(dev)->layout == LAYOUT_4020)
2968 pio_drain_ai_fifo_32(dev); 2969 pio_drain_ai_fifo_32(dev);
2969 } else 2970 else
2970 pio_drain_ai_fifo_16(dev); 2971 pio_drain_ai_fifo_16(dev);
2971} 2972}
2972 2973
@@ -2976,7 +2977,7 @@ static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
2976 uint32_t next_transfer_addr; 2977 uint32_t next_transfer_addr;
2977 int j; 2978 int j;
2978 int num_samples = 0; 2979 int num_samples = 0;
2979 void *pci_addr_reg; 2980 void __iomem *pci_addr_reg;
2980 2981
2981 if (channel) 2982 if (channel)
2982 pci_addr_reg = 2983 pci_addr_reg =
@@ -3016,8 +3017,9 @@ static void drain_dma_buffers(struct comedi_device *dev, unsigned int channel)
3016 * unused buffer) */ 3017 * unused buffer) */
3017} 3018}
3018 3019
3019void handle_ai_interrupt(struct comedi_device *dev, unsigned short status, 3020static void handle_ai_interrupt(struct comedi_device *dev,
3020 unsigned int plx_status) 3021 unsigned short status,
3022 unsigned int plx_status)
3021{ 3023{
3022 struct comedi_subdevice *s = dev->read_subdev; 3024 struct comedi_subdevice *s = dev->read_subdev;
3023 struct comedi_async *async = s->async; 3025 struct comedi_async *async = s->async;
@@ -3038,9 +3040,9 @@ void handle_ai_interrupt(struct comedi_device *dev, unsigned short status,
3038 priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 3040 priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
3039 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status); 3041 DEBUG_PRINT("dma1 status 0x%x\n", dma1_status);
3040 3042
3041 if (dma1_status & PLX_DMA_EN_BIT) { 3043 if (dma1_status & PLX_DMA_EN_BIT)
3042 drain_dma_buffers(dev, 1); 3044 drain_dma_buffers(dev, 1);
3043 } 3045
3044 DEBUG_PRINT(" cleared dma ch1 interrupt\n"); 3046 DEBUG_PRINT(" cleared dma ch1 interrupt\n");
3045 } 3047 }
3046 spin_unlock_irqrestore(&dev->spinlock, flags); 3048 spin_unlock_irqrestore(&dev->spinlock, flags);
@@ -3227,7 +3229,7 @@ static irqreturn_t handle_interrupt(int irq, void *d)
3227 return IRQ_HANDLED; 3229 return IRQ_HANDLED;
3228} 3230}
3229 3231
3230void abort_dma(struct comedi_device *dev, unsigned int channel) 3232static void abort_dma(struct comedi_device *dev, unsigned int channel)
3231{ 3233{
3232 unsigned long flags; 3234 unsigned long flags;
3233 3235
@@ -3422,7 +3424,7 @@ static void load_ao_dma(struct comedi_device *dev, const struct comedi_cmd *cmd)
3422{ 3424{
3423 unsigned int num_bytes; 3425 unsigned int num_bytes;
3424 unsigned int next_transfer_addr; 3426 unsigned int next_transfer_addr;
3425 void *pci_addr_reg = 3427 void __iomem *pci_addr_reg =
3426 priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG; 3428 priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
3427 unsigned int buffer_index; 3429 unsigned int buffer_index;
3428 3430
@@ -3656,24 +3658,26 @@ static int ao_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
3656 return 0; 3658 return 0;
3657} 3659}
3658 3660
3659static int dio_callback(int dir, int port, int data, unsigned long iobase) 3661static int dio_callback(int dir, int port, int data, unsigned long arg)
3660{ 3662{
3663 void __iomem *iobase = (void __iomem *)arg;
3661 if (dir) { 3664 if (dir) {
3662 writeb(data, (void *)(iobase + port)); 3665 writeb(data, iobase + port);
3663 DEBUG_PRINT("wrote 0x%x to port %i\n", data, port); 3666 DEBUG_PRINT("wrote 0x%x to port %i\n", data, port);
3664 return 0; 3667 return 0;
3665 } else { 3668 } else {
3666 return readb((void *)(iobase + port)); 3669 return readb(iobase + port);
3667 } 3670 }
3668} 3671}
3669 3672
3670static int dio_callback_4020(int dir, int port, int data, unsigned long iobase) 3673static int dio_callback_4020(int dir, int port, int data, unsigned long arg)
3671{ 3674{
3675 void __iomem *iobase = (void __iomem *)arg;
3672 if (dir) { 3676 if (dir) {
3673 writew(data, (void *)(iobase + 2 * port)); 3677 writew(data, iobase + 2 * port);
3674 return 0; 3678 return 0;
3675 } else { 3679 } else {
3676 return readw((void *)(iobase + 2 * port)); 3680 return readw(iobase + 2 * port);
3677 } 3681 }
3678} 3682}
3679 3683
@@ -3860,7 +3864,7 @@ static uint16_t read_eeprom(struct comedi_device *dev, uint8_t address)
3860 static const int read_command = 0x6; 3864 static const int read_command = 0x6;
3861 unsigned int bitstream = (read_command << 8) | address; 3865 unsigned int bitstream = (read_command << 8) | address;
3862 unsigned int bit; 3866 unsigned int bit;
3863 void *const plx_control_addr = 3867 void __iomem * const plx_control_addr =
3864 priv(dev)->plx9080_iobase + PLX_CONTROL_REG; 3868 priv(dev)->plx9080_iobase + PLX_CONTROL_REG;
3865 uint16_t value; 3869 uint16_t value;
3866 static const int value_length = 16; 3870 static const int value_length = 16;
@@ -4183,7 +4187,8 @@ static const int i2c_low_udelay = 10;
4183static void i2c_set_sda(struct comedi_device *dev, int state) 4187static void i2c_set_sda(struct comedi_device *dev, int state)
4184{ 4188{
4185 static const int data_bit = CTL_EE_W; 4189 static const int data_bit = CTL_EE_W;
4186 void *plx_control_addr = priv(dev)->plx9080_iobase + PLX_CONTROL_REG; 4190 void __iomem *plx_control_addr = priv(dev)->plx9080_iobase +
4191 PLX_CONTROL_REG;
4187 4192
4188 if (state) { 4193 if (state) {
4189 /* set data line high */ 4194 /* set data line high */
@@ -4202,7 +4207,8 @@ static void i2c_set_sda(struct comedi_device *dev, int state)
4202static void i2c_set_scl(struct comedi_device *dev, int state) 4207static void i2c_set_scl(struct comedi_device *dev, int state)
4203{ 4208{
4204 static const int clock_bit = CTL_USERO; 4209 static const int clock_bit = CTL_USERO;
4205 void *plx_control_addr = priv(dev)->plx9080_iobase + PLX_CONTROL_REG; 4210 void __iomem *plx_control_addr = priv(dev)->plx9080_iobase +
4211 PLX_CONTROL_REG;
4206 4212
4207 if (state) { 4213 if (state) {
4208 /* set clock line high */ 4214 /* set clock line high */
diff --git a/drivers/staging/comedi/drivers/cb_pcimdas.c b/drivers/staging/comedi/drivers/cb_pcimdas.c
index 2e61727fc9a0..49dccbbd713f 100644
--- a/drivers/staging/comedi/drivers/cb_pcimdas.c
+++ b/drivers/staging/comedi/drivers/cb_pcimdas.c
@@ -52,6 +52,8 @@ See http://www.measurementcomputing.com/PDFManuals/pcim-das1602_16.pdf for more
52/* #define CBPCIMDAS_DEBUG */ 52/* #define CBPCIMDAS_DEBUG */
53#undef CBPCIMDAS_DEBUG 53#undef CBPCIMDAS_DEBUG
54 54
55#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
56
55/* Registers for the PCIM-DAS1602/16 */ 57/* Registers for the PCIM-DAS1602/16 */
56 58
57/* sizes of io regions (bytes) */ 59/* sizes of io regions (bytes) */
diff --git a/drivers/staging/comedi/drivers/cb_pcimdda.c b/drivers/staging/comedi/drivers/cb_pcimdda.c
index e32a31763d50..f404ec7723e5 100644
--- a/drivers/staging/comedi/drivers/cb_pcimdda.c
+++ b/drivers/staging/comedi/drivers/cb_pcimdda.c
@@ -91,7 +91,8 @@ Configuration Options:
91#include "8255.h" 91#include "8255.h"
92 92
93/* device ids of the cards we support -- currently only 1 card supported */ 93/* device ids of the cards we support -- currently only 1 card supported */
94#define PCI_ID_PCIM_DDA06_16 0x0053 94#define PCI_VENDOR_ID_COMPUTERBOARDS 0x1307
95#define PCI_ID_PCIM_DDA06_16 0x0053
95 96
96/* 97/*
97 * This is straight from skel.c -- I did this in case this source file 98 * This is straight from skel.c -- I did this in case this source file
diff --git a/drivers/staging/comedi/drivers/comedi_bond.c b/drivers/staging/comedi/drivers/comedi_bond.c
index 41311d99473b..701622280ff4 100644
--- a/drivers/staging/comedi/drivers/comedi_bond.c
+++ b/drivers/staging/comedi/drivers/comedi_bond.c
@@ -87,18 +87,17 @@ Configuration Options:
87 * options that are used with comedi_config. 87 * options that are used with comedi_config.
88 */ 88 */
89 89
90#include "../comedilib.h"
91#include "../comedidev.h"
92#include <linux/string.h> 90#include <linux/string.h>
93#include <linux/slab.h> 91#include <linux/slab.h>
92#include "../comedi.h"
93#include "../comedilib.h"
94#include "../comedidev.h"
94 95
95/* The maxiumum number of channels per subdevice. */ 96/* The maxiumum number of channels per subdevice. */
96#define MAX_CHANS 256 97#define MAX_CHANS 256
97 98
98#define MODULE_NAME "comedi_bond" 99#define MODULE_NAME "comedi_bond"
99#ifdef MODULE_LICENSE
100MODULE_LICENSE("GPL"); 100MODULE_LICENSE("GPL");
101#endif
102#ifndef STR 101#ifndef STR
103# define STR1(x) #x 102# define STR1(x) #x
104# define STR(x) STR1(x) 103# define STR(x) STR1(x)
@@ -143,7 +142,7 @@ static const struct BondingBoard bondingBoards[] = {
143#define thisboard ((const struct BondingBoard *)dev->board_ptr) 142#define thisboard ((const struct BondingBoard *)dev->board_ptr)
144 143
145struct BondedDevice { 144struct BondedDevice {
146 void *dev; 145 struct comedi_device *dev;
147 unsigned minor; 146 unsigned minor;
148 unsigned subdev; 147 unsigned subdev;
149 unsigned subdev_type; 148 unsigned subdev_type;
@@ -405,7 +404,7 @@ static void *Realloc(const void *oldmem, size_t newlen, size_t oldlen)
405static int doDevConfig(struct comedi_device *dev, struct comedi_devconfig *it) 404static int doDevConfig(struct comedi_device *dev, struct comedi_devconfig *it)
406{ 405{
407 int i; 406 int i;
408 void *devs_opened[COMEDI_NUM_BOARD_MINORS]; 407 struct comedi_device *devs_opened[COMEDI_NUM_BOARD_MINORS];
409 408
410 memset(devs_opened, 0, sizeof(devs_opened)); 409 memset(devs_opened, 0, sizeof(devs_opened));
411 devpriv->name[0] = 0;; 410 devpriv->name[0] = 0;;
@@ -414,7 +413,7 @@ static int doDevConfig(struct comedi_device *dev, struct comedi_devconfig *it)
414 for (i = 0; i < COMEDI_NDEVCONFOPTS && (!i || it->options[i]); ++i) { 413 for (i = 0; i < COMEDI_NDEVCONFOPTS && (!i || it->options[i]); ++i) {
415 char file[] = "/dev/comediXXXXXX"; 414 char file[] = "/dev/comediXXXXXX";
416 int minor = it->options[i]; 415 int minor = it->options[i];
417 void *d; 416 struct comedi_device *d;
418 int sdev = -1, nchans, tmp; 417 int sdev = -1, nchans, tmp;
419 struct BondedDevice *bdev = NULL; 418 struct BondedDevice *bdev = NULL;
420 419
diff --git a/drivers/staging/comedi/drivers/comedi_parport.c b/drivers/staging/comedi/drivers/comedi_parport.c
index 043afe4439c7..fcd7721c5537 100644
--- a/drivers/staging/comedi/drivers/comedi_parport.c
+++ b/drivers/staging/comedi/drivers/comedi_parport.c
@@ -309,18 +309,18 @@ static int parport_attach(struct comedi_device *dev,
309 iobase = it->options[0]; 309 iobase = it->options[0];
310 printk(KERN_INFO "comedi%d: parport: 0x%04lx ", dev->minor, iobase); 310 printk(KERN_INFO "comedi%d: parport: 0x%04lx ", dev->minor, iobase);
311 if (!request_region(iobase, PARPORT_SIZE, "parport (comedi)")) { 311 if (!request_region(iobase, PARPORT_SIZE, "parport (comedi)")) {
312 printk("I/O port conflict\n"); 312 printk(KERN_ERR "I/O port conflict\n");
313 return -EIO; 313 return -EIO;
314 } 314 }
315 dev->iobase = iobase; 315 dev->iobase = iobase;
316 316
317 irq = it->options[1]; 317 irq = it->options[1];
318 if (irq) { 318 if (irq) {
319 printk(" irq=%u", irq); 319 printk(KERN_INFO " irq=%u", irq);
320 ret = request_irq(irq, parport_interrupt, 0, "comedi_parport", 320 ret = request_irq(irq, parport_interrupt, 0, "comedi_parport",
321 dev); 321 dev);
322 if (ret < 0) { 322 if (ret < 0) {
323 printk(" irq not available\n"); 323 printk(KERN_ERR " irq not available\n");
324 return -EINVAL; 324 return -EINVAL;
325 } 325 }
326 dev->irq = irq; 326 dev->irq = irq;
@@ -380,13 +380,13 @@ static int parport_attach(struct comedi_device *dev,
380 devpriv->c_data = 0; 380 devpriv->c_data = 0;
381 outb(devpriv->c_data, dev->iobase + PARPORT_C); 381 outb(devpriv->c_data, dev->iobase + PARPORT_C);
382 382
383 printk("\n"); 383 printk(KERN_INFO "\n");
384 return 1; 384 return 1;
385} 385}
386 386
387static int parport_detach(struct comedi_device *dev) 387static int parport_detach(struct comedi_device *dev)
388{ 388{
389 printk("comedi%d: parport: remove\n", dev->minor); 389 printk(KERN_INFO "comedi%d: parport: remove\n", dev->minor);
390 390
391 if (dev->iobase) 391 if (dev->iobase)
392 release_region(dev->iobase, PARPORT_SIZE); 392 release_region(dev->iobase, PARPORT_SIZE);
diff --git a/drivers/staging/comedi/drivers/das08.c b/drivers/staging/comedi/drivers/das08.c
index f4258334532c..9cb144f7e70c 100644
--- a/drivers/staging/comedi/drivers/das08.c
+++ b/drivers/staging/comedi/drivers/das08.c
@@ -1,55 +1,55 @@
1/* 1/*
2 comedi/drivers/das08.c 2 * comedi/drivers/das08.c
3 DAS08 driver 3 * DAS08 driver
4 4 *
5 COMEDI - Linux Control and Measurement Device Interface 5 * COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000 David A. Schleef <ds@schleef.org> 6 * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
7 Copyright (C) 2001,2002,2003 Frank Mori Hess <fmhess@users.sourceforge.net> 7 * Copyright (C) 2001,2002,2003 Frank Mori Hess <fmhess@users.sourceforge.net>
8 Copyright (C) 2004 Salvador E. Tropea <set@users.sf.net> <set@ieee.org> 8 * Copyright (C) 2004 Salvador E. Tropea <set@users.sf.net> <set@ieee.org>
9 9 *
10 This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or 12 * the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version. 13 * (at your option) any later version.
14 14 *
15 This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details. 18 * GNU General Public License for more details.
19 19 *
20 You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 23 *
24***************************************************************** 24 *****************************************************************
25 */
25 26
26*/
27/* 27/*
28Driver: das08 28 * Driver: das08
29Description: DAS-08 compatible boards 29 * Description: DAS-08 compatible boards
30Author: Warren Jasper, ds, Frank Hess 30 * Author: Warren Jasper, ds, Frank Hess
31Devices: [Keithley Metrabyte] DAS08 (isa-das08), [ComputerBoards] DAS08 (isa-das08), 31 * Devices: [Keithley Metrabyte] DAS08 (isa-das08),
32 DAS08-PGM (das08-pgm), 32 * [ComputerBoards] DAS08 (isa-das08), DAS08-PGM (das08-pgm),
33 DAS08-PGH (das08-pgh), DAS08-PGL (das08-pgl), DAS08-AOH (das08-aoh), 33 * DAS08-PGH (das08-pgh), DAS08-PGL (das08-pgl), DAS08-AOH (das08-aoh),
34 DAS08-AOL (das08-aol), DAS08-AOM (das08-aom), DAS08/JR-AO (das08/jr-ao), 34 * DAS08-AOL (das08-aol), DAS08-AOM (das08-aom), DAS08/JR-AO (das08/jr-ao),
35 DAS08/JR-16-AO (das08jr-16-ao), PCI-DAS08 (das08), 35 * DAS08/JR-16-AO (das08jr-16-ao), PCI-DAS08 (das08),
36 PC104-DAS08 (pc104-das08), DAS08/JR/16 (das08jr/16) 36 * PC104-DAS08 (pc104-das08), DAS08/JR/16 (das08jr/16)
37Status: works 37 * Status: works
38 38 *
39This is a rewrite of the das08 and das08jr drivers. 39 * This is a rewrite of the das08 and das08jr drivers.
40 40 *
41Options (for ISA cards): 41 * Options (for ISA cards):
42 [0] - base io address 42 * [0] - base io address
43 43 *
44Options (for pci-das08): 44 * Options (for pci-das08):
45 [0] - bus (optional) 45 * [0] - bus (optional)
46 [1] = slot (optional) 46 * [1] = slot (optional)
47 47 *
48The das08 driver doesn't support asynchronous commands, since 48 * The das08 driver doesn't support asynchronous commands, since
49the cheap das08 hardware doesn't really support them. The 49 * the cheap das08 hardware doesn't really support them. The
50comedi_rt_timer driver can be used to emulate commands for this 50 * comedi_rt_timer driver can be used to emulate commands for this
51driver. 51 * driver.
52*/ 52 */
53 53
54#include "../comedidev.h" 54#include "../comedidev.h"
55 55
@@ -122,8 +122,8 @@ driver.
122*/ 122*/
123 123
124#define DAS08JR_DIO 3 124#define DAS08JR_DIO 3
125#define DAS08JR_AO_LSB(x) ((x)?6:4) 125#define DAS08JR_AO_LSB(x) ((x) ? 6 : 4)
126#define DAS08JR_AO_MSB(x) ((x)?7:5) 126#define DAS08JR_AO_MSB(x) ((x) ? 7 : 5)
127 127
128/* 128/*
129 cio-das08_aox.pdf 129 cio-das08_aox.pdf
@@ -148,8 +148,8 @@ driver.
148#define DAS08AO_GAIN_CONTROL 3 148#define DAS08AO_GAIN_CONTROL 3
149#define DAS08AO_GAIN_STATUS 3 149#define DAS08AO_GAIN_STATUS 3
150 150
151#define DAS08AO_AO_LSB(x) ((x)?0xa:8) 151#define DAS08AO_AO_LSB(x) ((x) ? 0xa : 8)
152#define DAS08AO_AO_MSB(x) ((x)?0xb:9) 152#define DAS08AO_AO_MSB(x) ((x) ? 0xb : 9)
153#define DAS08AO_AO_UPDATE 8 153#define DAS08AO_AO_UPDATE 8
154 154
155/* gainlist same as _pgx_ below */ 155/* gainlist same as _pgx_ below */
@@ -239,8 +239,9 @@ static const struct comedi_lrange *const das08_ai_lranges[] = {
239 &range_das08_pgm, 239 &range_das08_pgm,
240}; 240};
241 241
242static const int das08_pgh_gainlist[] = 242static const int das08_pgh_gainlist[] = {
243 { 8, 0, 10, 2, 12, 4, 14, 6, 1, 3, 5, 7 }; 243 8, 0, 10, 2, 12, 4, 14, 6, 1, 3, 5, 7
244};
244static const int das08_pgl_gainlist[] = { 8, 0, 2, 4, 6, 1, 3, 5, 7 }; 245static const int das08_pgl_gainlist[] = { 8, 0, 2, 4, 6, 1, 3, 5, 7 };
245static const int das08_pgm_gainlist[] = { 8, 0, 10, 12, 14, 9, 11, 13, 15 }; 246static const int das08_pgm_gainlist[] = { 8, 0, 10, 12, 14, 9, 11, 13, 15 };
246 247
@@ -535,7 +536,8 @@ static int das08_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
535 inb(dev->iobase + DAS08_MSB); 536 inb(dev->iobase + DAS08_MSB);
536 537
537 /* set multiplexer */ 538 /* set multiplexer */
538 spin_lock(&dev->spinlock); /* lock to prevent race with digital output */ 539 /* lock to prevent race with digital output */
540 spin_lock(&dev->spinlock);
539 devpriv->do_mux_bits &= ~DAS08_MUX_MASK; 541 devpriv->do_mux_bits &= ~DAS08_MUX_MASK;
540 devpriv->do_mux_bits |= DAS08_MUX(chan); 542 devpriv->do_mux_bits |= DAS08_MUX(chan);
541 outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL); 543 outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL);
@@ -552,7 +554,7 @@ static int das08_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
552 /* clear over-range bits for 16-bit boards */ 554 /* clear over-range bits for 16-bit boards */
553 if (thisboard->ai_nbits == 16) 555 if (thisboard->ai_nbits == 16)
554 if (inb(dev->iobase + DAS08_MSB) & 0x80) 556 if (inb(dev->iobase + DAS08_MSB) & 0x80)
555 printk("das08: over-range\n"); 557 printk(KERN_INFO "das08: over-range\n");
556 558
557 /* trigger conversion */ 559 /* trigger conversion */
558 outb_p(0, dev->iobase + DAS08_TRIG_12BIT); 560 outb_p(0, dev->iobase + DAS08_TRIG_12BIT);
@@ -562,7 +564,7 @@ static int das08_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
562 break; 564 break;
563 } 565 }
564 if (i == TIMEOUT) { 566 if (i == TIMEOUT) {
565 printk("das08: timeout\n"); 567 printk(KERN_ERR "das08: timeout\n");
566 return -ETIME; 568 return -ETIME;
567 } 569 }
568 msb = inb(dev->iobase + DAS08_MSB); 570 msb = inb(dev->iobase + DAS08_MSB);
@@ -607,7 +609,8 @@ static int das08_do_wbits(struct comedi_device *dev, struct comedi_subdevice *s,
607 /* set new bit values */ 609 /* set new bit values */
608 wbits |= data[0] & data[1]; 610 wbits |= data[0] & data[1];
609 /* remember digital output bits */ 611 /* remember digital output bits */
610 spin_lock(&dev->spinlock); /* prevent race with setting of analog input mux */ 612 /* prevent race with setting of analog input mux */
613 spin_lock(&dev->spinlock);
611 devpriv->do_mux_bits &= ~DAS08_DO_MASK; 614 devpriv->do_mux_bits &= ~DAS08_DO_MASK;
612 devpriv->do_mux_bits |= DAS08_OP(wbits); 615 devpriv->do_mux_bits |= DAS08_OP(wbits);
613 outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL); 616 outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL);
@@ -860,9 +863,9 @@ int das08_common_attach(struct comedi_device *dev, unsigned long iobase)
860 863
861 /* allocate ioports for non-pcmcia, non-pci boards */ 864 /* allocate ioports for non-pcmcia, non-pci boards */
862 if ((thisboard->bustype != pcmcia) && (thisboard->bustype != pci)) { 865 if ((thisboard->bustype != pcmcia) && (thisboard->bustype != pci)) {
863 printk(" iobase 0x%lx\n", iobase); 866 printk(KERN_INFO " iobase 0x%lx\n", iobase);
864 if (!request_region(iobase, thisboard->iosize, DRV_NAME)) { 867 if (!request_region(iobase, thisboard->iosize, DRV_NAME)) {
865 printk(" I/O port conflict\n"); 868 printk(KERN_ERR " I/O port conflict\n");
866 return -EIO; 869 return -EIO;
867 } 870 }
868 } 871 }
@@ -878,8 +881,11 @@ int das08_common_attach(struct comedi_device *dev, unsigned long iobase)
878 /* ai */ 881 /* ai */
879 if (thisboard->ai) { 882 if (thisboard->ai) {
880 s->type = COMEDI_SUBD_AI; 883 s->type = COMEDI_SUBD_AI;
881 /* XXX some boards actually have differential inputs instead of single ended. 884 /* XXX some boards actually have differential
882 * The driver does nothing with arefs though, so it's no big deal. */ 885 * inputs instead of single ended.
886 * The driver does nothing with arefs though,
887 * so it's no big deal.
888 */
883 s->subdev_flags = SDF_READABLE | SDF_GROUND; 889 s->subdev_flags = SDF_READABLE | SDF_GROUND;
884 s->n_chan = 8; 890 s->n_chan = 8;
885 s->maxdata = (1 << thisboard->ai_nbits) - 1; 891 s->maxdata = (1 << thisboard->ai_nbits) - 1;
@@ -966,6 +972,7 @@ int das08_common_attach(struct comedi_device *dev, unsigned long iobase)
966 972
967 return 0; 973 return 0;
968} 974}
975EXPORT_SYMBOL_GPL(das08_common_attach);
969 976
970static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it) 977static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it)
971{ 978{
@@ -980,7 +987,7 @@ static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it)
980 if (ret < 0) 987 if (ret < 0)
981 return ret; 988 return ret;
982 989
983 printk("comedi%d: das08: ", dev->minor); 990 printk(KERN_INFO "comedi%d: das08: ", dev->minor);
984 /* deal with a pci board */ 991 /* deal with a pci board */
985 if (thisboard->bustype == pci) { 992 if (thisboard->bustype == pci) {
986#ifdef CONFIG_COMEDI_PCI 993#ifdef CONFIG_COMEDI_PCI
@@ -1007,20 +1014,21 @@ static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1007 } 1014 }
1008 } 1015 }
1009 if (!pdev) { 1016 if (!pdev) {
1010 printk("No pci das08 cards found\n"); 1017 printk(KERN_ERR "No pci das08 cards found\n");
1011 return -EIO; 1018 return -EIO;
1012 } 1019 }
1013 devpriv->pdev = pdev; 1020 devpriv->pdev = pdev;
1014 /* enable PCI device and reserve I/O spaces */ 1021 /* enable PCI device and reserve I/O spaces */
1015 if (comedi_pci_enable(pdev, DRV_NAME)) { 1022 if (comedi_pci_enable(pdev, DRV_NAME)) {
1016 printk 1023 printk(KERN_ERR " Error enabling PCI device and "
1017 (" Error enabling PCI device and requesting regions\n"); 1024 "requesting regions\n");
1018 return -EIO; 1025 return -EIO;
1019 } 1026 }
1020 /* read base addresses */ 1027 /* read base addresses */
1021 pci_iobase = pci_resource_start(pdev, 1); 1028 pci_iobase = pci_resource_start(pdev, 1);
1022 iobase = pci_resource_start(pdev, 2); 1029 iobase = pci_resource_start(pdev, 2);
1023 printk("pcibase 0x%lx iobase 0x%lx\n", pci_iobase, iobase); 1030 printk(KERN_INFO "pcibase 0x%lx iobase 0x%lx\n",
1031 pci_iobase, iobase);
1024 devpriv->pci_iobase = pci_iobase; 1032 devpriv->pci_iobase = pci_iobase;
1025#if 0 1033#if 0
1026/* We could enable to pci-das08's interrupt here to make it possible 1034/* We could enable to pci-das08's interrupt here to make it possible
@@ -1034,17 +1042,18 @@ static int das08_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1034 outw(INTR1_ENABLE | PCI_INTR_ENABLE, pci_iobase + INTCSR); 1042 outw(INTR1_ENABLE | PCI_INTR_ENABLE, pci_iobase + INTCSR);
1035#endif 1043#endif
1036#else /* CONFIG_COMEDI_PCI */ 1044#else /* CONFIG_COMEDI_PCI */
1037 printk("this driver has not been built with PCI support.\n"); 1045 printk(KERN_ERR "this driver has not been built with PCI support.\n");
1038 return -EINVAL; 1046 return -EINVAL;
1039#endif /* CONFIG_COMEDI_PCI */ 1047#endif /* CONFIG_COMEDI_PCI */
1040 } else { 1048 } else {
1041 iobase = it->options[0]; 1049 iobase = it->options[0];
1042 } 1050 }
1043 printk("\n"); 1051 printk(KERN_INFO "\n");
1044 1052
1045 return das08_common_attach(dev, iobase); 1053 return das08_common_attach(dev, iobase);
1046} 1054}
1047 1055
1056
1048int das08_common_detach(struct comedi_device *dev) 1057int das08_common_detach(struct comedi_device *dev)
1049{ 1058{
1050 printk(KERN_INFO "comedi%d: das08: remove\n", dev->minor); 1059 printk(KERN_INFO "comedi%d: das08: remove\n", dev->minor);
@@ -1060,9 +1069,9 @@ int das08_common_detach(struct comedi_device *dev)
1060#ifdef CONFIG_COMEDI_PCI 1069#ifdef CONFIG_COMEDI_PCI
1061 if (devpriv) { 1070 if (devpriv) {
1062 if (devpriv->pdev) { 1071 if (devpriv->pdev) {
1063 if (devpriv->pci_iobase) { 1072 if (devpriv->pci_iobase)
1064 comedi_pci_disable(devpriv->pdev); 1073 comedi_pci_disable(devpriv->pdev);
1065 } 1074
1066 pci_dev_put(devpriv->pdev); 1075 pci_dev_put(devpriv->pdev);
1067 } 1076 }
1068 } 1077 }
@@ -1070,6 +1079,7 @@ int das08_common_detach(struct comedi_device *dev)
1070 1079
1071 return 0; 1080 return 0;
1072} 1081}
1082EXPORT_SYMBOL_GPL(das08_common_detach);
1073 1083
1074#ifdef CONFIG_COMEDI_PCI 1084#ifdef CONFIG_COMEDI_PCI
1075COMEDI_PCI_INITCLEANUP(driver_das08, das08_pci_table); 1085COMEDI_PCI_INITCLEANUP(driver_das08, das08_pci_table);
@@ -1077,8 +1087,6 @@ COMEDI_PCI_INITCLEANUP(driver_das08, das08_pci_table);
1077COMEDI_INITCLEANUP(driver_das08); 1087COMEDI_INITCLEANUP(driver_das08);
1078#endif 1088#endif
1079 1089
1080EXPORT_SYMBOL_GPL(das08_common_attach);
1081EXPORT_SYMBOL_GPL(das08_common_detach);
1082#ifdef CONFIG_COMEDI_PCMCIA 1090#ifdef CONFIG_COMEDI_PCMCIA
1083EXPORT_SYMBOL_GPL(das08_cs_boards); 1091EXPORT_SYMBOL_GPL(das08_cs_boards);
1084#endif 1092#endif
diff --git a/drivers/staging/comedi/drivers/das08.h b/drivers/staging/comedi/drivers/das08.h
index 35d2660cf93b..2a30d764ddfc 100644
--- a/drivers/staging/comedi/drivers/das08.h
+++ b/drivers/staging/comedi/drivers/das08.h
@@ -62,7 +62,7 @@ struct i8254_struct {
62#define I8254_CTRL 3 62#define I8254_CTRL 3
63 63
64struct das08_private_struct { 64struct das08_private_struct {
65 unsigned int do_mux_bits; /* bits for do/mux register on boards without seperate do register */ 65 unsigned int do_mux_bits; /* bits for do/mux register on boards without separate do register */
66 unsigned int do_bits; /* bits for do register on boards with register dedicated to digital out only */ 66 unsigned int do_bits; /* bits for do register on boards with register dedicated to digital out only */
67 const unsigned int *pg_gainlist; 67 const unsigned int *pg_gainlist;
68 struct pci_dev *pdev; /* struct for pci-das08 */ 68 struct pci_dev *pdev; /* struct for pci-das08 */
diff --git a/drivers/staging/comedi/drivers/das08_cs.c b/drivers/staging/comedi/drivers/das08_cs.c
index 896d25bc85b5..8761a6d285dc 100644
--- a/drivers/staging/comedi/drivers/das08_cs.c
+++ b/drivers/staging/comedi/drivers/das08_cs.c
@@ -350,6 +350,10 @@ static struct pcmcia_device_id das08_cs_id_table[] = {
350}; 350};
351 351
352MODULE_DEVICE_TABLE(pcmcia, das08_cs_id_table); 352MODULE_DEVICE_TABLE(pcmcia, das08_cs_id_table);
353MODULE_AUTHOR("David A. Schleef <ds@schleef.org>, "
354 "Frank Mori Hess <fmhess@users.sourceforge.net>");
355MODULE_DESCRIPTION("Comedi driver for ComputerBoards DAS-08 PCMCIA boards");
356MODULE_LICENSE("GPL");
353 357
354struct pcmcia_driver das08_cs_driver = { 358struct pcmcia_driver das08_cs_driver = {
355 .probe = das08_pcmcia_attach, 359 .probe = das08_pcmcia_attach,
@@ -392,6 +396,5 @@ static void __exit das08_cs_exit_module(void)
392 comedi_driver_unregister(&driver_das08_cs); 396 comedi_driver_unregister(&driver_das08_cs);
393} 397}
394 398
395MODULE_LICENSE("GPL");
396module_init(das08_cs_init_module); 399module_init(das08_cs_init_module);
397module_exit(das08_cs_exit_module); 400module_exit(das08_cs_exit_module);
diff --git a/drivers/staging/comedi/drivers/das16.c b/drivers/staging/comedi/drivers/das16.c
index f2aadda9b241..ccee4f1802d6 100644
--- a/drivers/staging/comedi/drivers/das16.c
+++ b/drivers/staging/comedi/drivers/das16.c
@@ -74,7 +74,8 @@ Keithley Manuals:
74 4922.PDF (das-1400) 74 4922.PDF (das-1400)
75 4923.PDF (das1200, 1400, 1600) 75 4923.PDF (das1200, 1400, 1600)
76 76
77Computer boards manuals also available from their website www.measurementcomputing.com 77Computer boards manuals also available from their website
78www.measurementcomputing.com
78 79
79*/ 80*/
80 81
@@ -92,7 +93,8 @@ Computer boards manuals also available from their website www.measurementcomputi
92/* #define DEBUG */ 93/* #define DEBUG */
93 94
94#ifdef DEBUG 95#ifdef DEBUG
95#define DEBUG_PRINT(format, args...) printk("das16: " format, ## args) 96#define DEBUG_PRINT(format, args...) \
97 printk(KERN_DEBUG "das16: " format, ## args)
96#else 98#else
97#define DEBUG_PRINT(format, args...) 99#define DEBUG_PRINT(format, args...)
98#endif 100#endif
@@ -186,15 +188,16 @@ Computer boards manuals also available from their website www.measurementcomputi
186 188
187*/ 189*/
188 190
189static const int sample_size = 2; /* size in bytes of a sample from board */ 191/* size in bytes of a sample from board */
192static const int sample_size = 2;
190 193
191#define DAS16_TRIG 0 194#define DAS16_TRIG 0
192#define DAS16_AI_LSB 0 195#define DAS16_AI_LSB 0
193#define DAS16_AI_MSB 1 196#define DAS16_AI_MSB 1
194#define DAS16_MUX 2 197#define DAS16_MUX 2
195#define DAS16_DIO 3 198#define DAS16_DIO 3
196#define DAS16_AO_LSB(x) ((x)?6:4) 199#define DAS16_AO_LSB(x) ((x) ? 6 : 4)
197#define DAS16_AO_MSB(x) ((x)?7:5) 200#define DAS16_AO_MSB(x) ((x) ? 7 : 5)
198#define DAS16_STATUS 8 201#define DAS16_STATUS 8
199#define BUSY (1<<7) 202#define BUSY (1<<7)
200#define UNIPOLAR (1<<6) 203#define UNIPOLAR (1<<6)
@@ -271,7 +274,7 @@ static const struct comedi_lrange range_das1x02_unip = { 4, {
271}; 274};
272 275
273static const struct comedi_lrange range_das16jr = { 9, { 276static const struct comedi_lrange range_das16jr = { 9, {
274 /* also used by 16/330 */ 277 /* also used by 16/330 */
275 BIP_RANGE(10), 278 BIP_RANGE(10),
276 BIP_RANGE(5), 279 BIP_RANGE(5),
277 BIP_RANGE(2.5), 280 BIP_RANGE(2.5),
@@ -547,7 +550,8 @@ static const struct das16_board das16_boards[] = {
547 .id = 0x20, 550 .id = 0x20,
548 }, 551 },
549 { 552 {
550 .name = "das-1401", /* 4919.pdf and 4922.pdf (keithley user's manual) */ 553 /* 4919.pdf and 4922.pdf (keithley user's manual) */
554 .name = "das-1401",
551 .ai = das16_ai_rinsn, 555 .ai = das16_ai_rinsn,
552 .ai_nbits = 12, 556 .ai_nbits = 12,
553 .ai_speed = 10000, 557 .ai_speed = 10000,
@@ -558,10 +562,11 @@ static const struct das16_board das16_boards[] = {
558 .i8255_offset = 0x0, 562 .i8255_offset = 0x0,
559 .i8254_offset = 0x0c, 563 .i8254_offset = 0x0c,
560 .size = 0x408, 564 .size = 0x408,
561 .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */ 565 .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */
562 }, 566 },
563 { 567 {
564 .name = "das-1402", /* 4919.pdf and 4922.pdf (keithley user's manual) */ 568 /* 4919.pdf and 4922.pdf (keithley user's manual) */
569 .name = "das-1402",
565 .ai = das16_ai_rinsn, 570 .ai = das16_ai_rinsn,
566 .ai_nbits = 12, 571 .ai_nbits = 12,
567 .ai_speed = 10000, 572 .ai_speed = 10000,
@@ -572,7 +577,7 @@ static const struct das16_board das16_boards[] = {
572 .i8255_offset = 0x0, 577 .i8255_offset = 0x0,
573 .i8254_offset = 0x0c, 578 .i8254_offset = 0x0c,
574 .size = 0x408, 579 .size = 0x408,
575 .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */ 580 .id = 0xc0 /* 4919.pdf says id bits are 0xe0, 4922.pdf says 0xc0 */
576 }, 581 },
577 { 582 {
578 .name = "das-1601", /* 4919.pdf */ 583 .name = "das-1601", /* 4919.pdf */
@@ -704,7 +709,8 @@ static const struct das16_board das16_boards[] = {
704 .name = "das16/jr/ctr5", /* ? */ 709 .name = "das16/jr/ctr5", /* ? */
705 }, 710 },
706 { 711 {
707 .name = "cio-das16/m1/16", /* cio-das16_m1_16.pdf, this board is a bit quirky, no dma */ 712 /* cio-das16_m1_16.pdf, this board is a bit quirky, no dma */
713 .name = "cio-das16/m1/16",
708 }, 714 },
709#endif 715#endif
710}; 716};
@@ -736,14 +742,19 @@ struct das16_private_struct {
736 unsigned int clockbase; /* master clock speed in ns */ 742 unsigned int clockbase; /* master clock speed in ns */
737 volatile unsigned int control_state; /* dma, interrupt and trigger control bits */ 743 volatile unsigned int control_state; /* dma, interrupt and trigger control bits */
738 volatile unsigned long adc_byte_count; /* number of bytes remaining */ 744 volatile unsigned long adc_byte_count; /* number of bytes remaining */
739 unsigned int divisor1; /* divisor dividing master clock to get conversion frequency */ 745 /* divisor dividing master clock to get conversion frequency */
740 unsigned int divisor2; /* divisor dividing master clock to get conversion frequency */ 746 unsigned int divisor1;
747 /* divisor dividing master clock to get conversion frequency */
748 unsigned int divisor2;
741 unsigned int dma_chan; /* dma channel */ 749 unsigned int dma_chan; /* dma channel */
742 uint16_t *dma_buffer[2]; 750 uint16_t *dma_buffer[2];
743 dma_addr_t dma_buffer_addr[2]; 751 dma_addr_t dma_buffer_addr[2];
744 unsigned int current_buffer; 752 unsigned int current_buffer;
745 volatile unsigned int dma_transfer_size; /* target number of bytes to transfer per dma shot */ 753 volatile unsigned int dma_transfer_size; /* target number of bytes to transfer per dma shot */
746 /* user-defined analog input and output ranges defined from config options */ 754 /**
755 * user-defined analog input and output ranges
756 * defined from config options
757 */
747 struct comedi_lrange *user_ai_range_table; 758 struct comedi_lrange *user_ai_range_table;
748 struct comedi_lrange *user_ao_range_table; 759 struct comedi_lrange *user_ao_range_table;
749 760
@@ -798,7 +809,10 @@ static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
798 if (err) 809 if (err)
799 return 1; 810 return 1;
800 811
801 /* step 2: make sure trigger sources are unique and mutually compatible */ 812 /**
813 * step 2: make sure trigger sources are unique and
814 * mutually compatible
815 */
802 if (cmd->scan_begin_src != TRIG_TIMER && 816 if (cmd->scan_begin_src != TRIG_TIMER &&
803 cmd->scan_begin_src != TRIG_EXT && 817 cmd->scan_begin_src != TRIG_EXT &&
804 cmd->scan_begin_src != TRIG_FOLLOW) 818 cmd->scan_begin_src != TRIG_FOLLOW)
@@ -893,12 +907,15 @@ static int das16_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
893 if (CR_CHAN(cmd->chanlist[i]) != 907 if (CR_CHAN(cmd->chanlist[i]) !=
894 (start_chan + i) % s->n_chan) { 908 (start_chan + i) % s->n_chan) {
895 comedi_error(dev, 909 comedi_error(dev,
896 "entries in chanlist must be consecutive channels, counting upwards\n"); 910 "entries in chanlist must be "
911 "consecutive channels, "
912 "counting upwards\n");
897 err++; 913 err++;
898 } 914 }
899 if (CR_RANGE(cmd->chanlist[i]) != gain) { 915 if (CR_RANGE(cmd->chanlist[i]) != gain) {
900 comedi_error(dev, 916 comedi_error(dev,
901 "entries in chanlist must all have the same gain\n"); 917 "entries in chanlist must all "
918 "have the same gain\n");
902 err++; 919 err++;
903 } 920 }
904 } 921 }
@@ -920,12 +937,13 @@ static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s)
920 if (devpriv->dma_chan == 0 || (dev->irq == 0 937 if (devpriv->dma_chan == 0 || (dev->irq == 0
921 && devpriv->timer_mode == 0)) { 938 && devpriv->timer_mode == 0)) {
922 comedi_error(dev, 939 comedi_error(dev,
923 "irq (or use of 'timer mode') dma required to execute comedi_cmd"); 940 "irq (or use of 'timer mode') dma required to "
941 "execute comedi_cmd");
924 return -1; 942 return -1;
925 } 943 }
926 if (cmd->flags & TRIG_RT) { 944 if (cmd->flags & TRIG_RT) {
927 comedi_error(dev, 945 comedi_error(dev, "isa dma transfers cannot be performed with "
928 "isa dma transfers cannot be performed with TRIG_RT, aborting"); 946 "TRIG_RT, aborting");
929 return -1; 947 return -1;
930 } 948 }
931 949
@@ -933,16 +951,17 @@ static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s)
933 cmd->stop_arg * cmd->chanlist_len * sizeof(uint16_t); 951 cmd->stop_arg * cmd->chanlist_len * sizeof(uint16_t);
934 952
935 /* disable conversions for das1600 mode */ 953 /* disable conversions for das1600 mode */
936 if (thisboard->size > 0x400) { 954 if (thisboard->size > 0x400)
937 outb(DAS1600_CONV_DISABLE, dev->iobase + DAS1600_CONV); 955 outb(DAS1600_CONV_DISABLE, dev->iobase + DAS1600_CONV);
938 } 956
939 /* set scan limits */ 957 /* set scan limits */
940 byte = CR_CHAN(cmd->chanlist[0]); 958 byte = CR_CHAN(cmd->chanlist[0]);
941 byte |= CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]) << 4; 959 byte |= CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]) << 4;
942 outb(byte, dev->iobase + DAS16_MUX); 960 outb(byte, dev->iobase + DAS16_MUX);
943 961
944 /* set gain (this is also burst rate register but according to 962 /* set gain (this is also burst rate register but according to
945 * computer boards manual, burst rate does nothing, even on keithley cards) */ 963 * computer boards manual, burst rate does nothing, even on
964 * keithley cards) */
946 if (thisboard->ai_pg != das16_pg_none) { 965 if (thisboard->ai_pg != das16_pg_none) {
947 range = CR_RANGE(cmd->chanlist[0]); 966 range = CR_RANGE(cmd->chanlist[0]);
948 outb((das16_gainlists[thisboard->ai_pg])[range], 967 outb((das16_gainlists[thisboard->ai_pg])[range],
@@ -1005,9 +1024,9 @@ static int das16_cmd_exec(struct comedi_device *dev, struct comedi_subdevice *s)
1005 outb(devpriv->control_state, dev->iobase + DAS16_CONTROL); 1024 outb(devpriv->control_state, dev->iobase + DAS16_CONTROL);
1006 1025
1007 /* Enable conversions if using das1600 mode */ 1026 /* Enable conversions if using das1600 mode */
1008 if (thisboard->size > 0x400) { 1027 if (thisboard->size > 0x400)
1009 outb(0, dev->iobase + DAS1600_CONV); 1028 outb(0, dev->iobase + DAS1600_CONV);
1010 } 1029
1011 1030
1012 return 0; 1031 return 0;
1013} 1032}
@@ -1030,9 +1049,9 @@ static int das16_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1030 } 1049 }
1031 1050
1032 /* disable burst mode */ 1051 /* disable burst mode */
1033 if (thisboard->size > 0x400) { 1052 if (thisboard->size > 0x400)
1034 outb(0, dev->iobase + DAS1600_BURST); 1053 outb(0, dev->iobase + DAS1600_BURST);
1035 } 1054
1036 1055
1037 spin_unlock_irqrestore(&dev->spinlock, flags); 1056 spin_unlock_irqrestore(&dev->spinlock, flags);
1038 1057
@@ -1085,11 +1104,11 @@ static int das16_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1085 } 1104 }
1086 msb = inb(dev->iobase + DAS16_AI_MSB); 1105 msb = inb(dev->iobase + DAS16_AI_MSB);
1087 lsb = inb(dev->iobase + DAS16_AI_LSB); 1106 lsb = inb(dev->iobase + DAS16_AI_LSB);
1088 if (thisboard->ai_nbits == 12) { 1107 if (thisboard->ai_nbits == 12)
1089 data[n] = ((lsb >> 4) & 0xf) | (msb << 4); 1108 data[n] = ((lsb >> 4) & 0xf) | (msb << 4);
1090 } else { 1109 else
1091 data[n] = lsb | (msb << 8); 1110 data[n] = lsb | (msb << 8);
1092 } 1111
1093 } 1112 }
1094 1113
1095 return n; 1114 return n;
@@ -1207,8 +1226,8 @@ static int disable_dma_on_even(struct comedi_device *dev)
1207 residue = get_dma_residue(devpriv->dma_chan); 1226 residue = get_dma_residue(devpriv->dma_chan);
1208 } 1227 }
1209 if (i == disable_limit) { 1228 if (i == disable_limit) {
1210 comedi_error(dev, 1229 comedi_error(dev, "failed to get an even dma transfer, "
1211 "failed to get an even dma transfer, could be trouble."); 1230 "could be trouble.");
1212 } 1231 }
1213 return residue; 1232 return residue;
1214} 1233}
@@ -1254,7 +1273,8 @@ static void das16_interrupt(struct comedi_device *dev)
1254 } else 1273 } else
1255 num_bytes = devpriv->dma_transfer_size - residue; 1274 num_bytes = devpriv->dma_transfer_size - residue;
1256 1275
1257 if (cmd->stop_src == TRIG_COUNT && num_bytes >= devpriv->adc_byte_count) { 1276 if (cmd->stop_src == TRIG_COUNT &&
1277 num_bytes >= devpriv->adc_byte_count) {
1258 num_bytes = devpriv->adc_byte_count; 1278 num_bytes = devpriv->adc_byte_count;
1259 async->events |= COMEDI_CB_EOA; 1279 async->events |= COMEDI_CB_EOA;
1260 } 1280 }
@@ -1275,9 +1295,9 @@ static void das16_interrupt(struct comedi_device *dev)
1275 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size); 1295 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1276 enable_dma(devpriv->dma_chan); 1296 enable_dma(devpriv->dma_chan);
1277 /* reenable conversions for das1600 mode, (stupid hardware) */ 1297 /* reenable conversions for das1600 mode, (stupid hardware) */
1278 if (thisboard->size > 0x400 && devpriv->timer_mode == 0) { 1298 if (thisboard->size > 0x400 && devpriv->timer_mode == 0)
1279 outb(0x00, dev->iobase + DAS1600_CONV); 1299 outb(0x00, dev->iobase + DAS1600_CONV);
1280 } 1300
1281 } 1301 }
1282 release_dma_lock(dma_flags); 1302 release_dma_lock(dma_flags);
1283 1303
@@ -1330,25 +1350,25 @@ static int das16_probe(struct comedi_device *dev, struct comedi_devconfig *it)
1330 1350
1331 status = inb(dev->iobase + DAS16_STATUS); 1351 status = inb(dev->iobase + DAS16_STATUS);
1332 1352
1333 if ((status & UNIPOLAR)) { 1353 if ((status & UNIPOLAR))
1334 devpriv->ai_unipolar = 1; 1354 devpriv->ai_unipolar = 1;
1335 } else { 1355 else
1336 devpriv->ai_unipolar = 0; 1356 devpriv->ai_unipolar = 0;
1337 }
1338 1357
1339 if ((status & DAS16_MUXBIT)) { 1358
1359 if ((status & DAS16_MUXBIT))
1340 devpriv->ai_singleended = 1; 1360 devpriv->ai_singleended = 1;
1341 } else { 1361 else
1342 devpriv->ai_singleended = 0; 1362 devpriv->ai_singleended = 0;
1343 } 1363
1344 1364
1345 /* diobits indicates boards */ 1365 /* diobits indicates boards */
1346 1366
1347 diobits = inb(dev->iobase + DAS16_DIO) & 0xf0; 1367 diobits = inb(dev->iobase + DAS16_DIO) & 0xf0;
1348 1368
1349 printk(" id bits are 0x%02x\n", diobits); 1369 printk(KERN_INFO " id bits are 0x%02x\n", diobits);
1350 if (thisboard->id != diobits) { 1370 if (thisboard->id != diobits) {
1351 printk(" requested board's id bits are 0x%x (ignore)\n", 1371 printk(KERN_INFO " requested board's id bits are 0x%x (ignore)\n",
1352 thisboard->id); 1372 thisboard->id);
1353 } 1373 }
1354 1374
@@ -1363,10 +1383,10 @@ static int das1600_mode_detect(struct comedi_device *dev)
1363 1383
1364 if (status & DAS1600_CLK_10MHZ) { 1384 if (status & DAS1600_CLK_10MHZ) {
1365 devpriv->clockbase = 100; 1385 devpriv->clockbase = 100;
1366 printk(" 10MHz pacer clock\n"); 1386 printk(KERN_INFO " 10MHz pacer clock\n");
1367 } else { 1387 } else {
1368 devpriv->clockbase = 1000; 1388 devpriv->clockbase = 1000;
1369 printk(" 1MHz pacer clock\n"); 1389 printk(KERN_INFO " 1MHz pacer clock\n");
1370 } 1390 }
1371 1391
1372 reg_dump(dev); 1392 reg_dump(dev);
@@ -1406,14 +1426,15 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1406 if (timer_mode) 1426 if (timer_mode)
1407 irq = 0; 1427 irq = 0;
1408 1428
1409 printk("comedi%d: das16:", dev->minor); 1429 printk(KERN_INFO "comedi%d: das16:", dev->minor);
1410 1430
1411 /* check that clock setting is valid */ 1431 /* check that clock setting is valid */
1412 if (it->options[3]) { 1432 if (it->options[3]) {
1413 if (it->options[3] != 0 && 1433 if (it->options[3] != 0 &&
1414 it->options[3] != 1 && it->options[3] != 10) { 1434 it->options[3] != 1 && it->options[3] != 10) {
1415 printk 1435 printk
1416 ("\n Invalid option. Master clock must be set to 1 or 10 (MHz)\n"); 1436 ("\n Invalid option. Master clock must be set "
1437 "to 1 or 10 (MHz)\n");
1417 return -EINVAL; 1438 return -EINVAL;
1418 } 1439 }
1419 } 1440 }
@@ -1425,23 +1446,23 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1425 if (thisboard->size < 0x400) { 1446 if (thisboard->size < 0x400) {
1426 printk(" 0x%04lx-0x%04lx\n", iobase, iobase + thisboard->size); 1447 printk(" 0x%04lx-0x%04lx\n", iobase, iobase + thisboard->size);
1427 if (!request_region(iobase, thisboard->size, "das16")) { 1448 if (!request_region(iobase, thisboard->size, "das16")) {
1428 printk(" I/O port conflict\n"); 1449 printk(KERN_ERR " I/O port conflict\n");
1429 return -EIO; 1450 return -EIO;
1430 } 1451 }
1431 } else { 1452 } else {
1432 printk(" 0x%04lx-0x%04lx 0x%04lx-0x%04lx\n", 1453 printk(KERN_INFO " 0x%04lx-0x%04lx 0x%04lx-0x%04lx\n",
1433 iobase, iobase + 0x0f, 1454 iobase, iobase + 0x0f,
1434 iobase + 0x400, 1455 iobase + 0x400,
1435 iobase + 0x400 + (thisboard->size & 0x3ff)); 1456 iobase + 0x400 + (thisboard->size & 0x3ff));
1436 if (!request_region(iobase, 0x10, "das16")) { 1457 if (!request_region(iobase, 0x10, "das16")) {
1437 printk(" I/O port conflict: 0x%04lx-0x%04lx\n", 1458 printk(KERN_ERR " I/O port conflict: 0x%04lx-0x%04lx\n",
1438 iobase, iobase + 0x0f); 1459 iobase, iobase + 0x0f);
1439 return -EIO; 1460 return -EIO;
1440 } 1461 }
1441 if (!request_region(iobase + 0x400, thisboard->size & 0x3ff, 1462 if (!request_region(iobase + 0x400, thisboard->size & 0x3ff,
1442 "das16")) { 1463 "das16")) {
1443 release_region(iobase, 0x10); 1464 release_region(iobase, 0x10);
1444 printk(" I/O port conflict: 0x%04lx-0x%04lx\n", 1465 printk(KERN_ERR " I/O port conflict: 0x%04lx-0x%04lx\n",
1445 iobase + 0x400, 1466 iobase + 0x400,
1446 iobase + 0x400 + (thisboard->size & 0x3ff)); 1467 iobase + 0x400 + (thisboard->size & 0x3ff));
1447 return -EIO; 1468 return -EIO;
@@ -1452,7 +1473,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1452 1473
1453 /* probe id bits to make sure they are consistent */ 1474 /* probe id bits to make sure they are consistent */
1454 if (das16_probe(dev, it)) { 1475 if (das16_probe(dev, it)) {
1455 printk(" id bits do not match selected board, aborting\n"); 1476 printk(KERN_ERR " id bits do not match selected board, aborting\n");
1456 return -EINVAL; 1477 return -EINVAL;
1457 } 1478 }
1458 dev->board_name = thisboard->name; 1479 dev->board_name = thisboard->name;
@@ -1474,7 +1495,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1474 if (ret < 0) 1495 if (ret < 0)
1475 return ret; 1496 return ret;
1476 dev->irq = irq; 1497 dev->irq = irq;
1477 printk(" ( irq = %u )", irq); 1498 printk(KERN_INFO " ( irq = %u )", irq);
1478 } else if (irq == 0) { 1499 } else if (irq == 0) {
1479 printk(" ( no irq )"); 1500 printk(" ( no irq )");
1480 } else { 1501 } else {
@@ -1488,16 +1509,15 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1488 /* allocate dma buffers */ 1509 /* allocate dma buffers */
1489 int i; 1510 int i;
1490 for (i = 0; i < 2; i++) { 1511 for (i = 0; i < 2; i++) {
1491 devpriv->dma_buffer[i] = pci_alloc_consistent(NULL, 1512 devpriv->dma_buffer[i] = pci_alloc_consistent(
1492 DAS16_DMA_SIZE, 1513 NULL, DAS16_DMA_SIZE,
1493 &devpriv-> 1514 &devpriv->dma_buffer_addr[i]);
1494 dma_buffer_addr 1515
1495 [i]);
1496 if (devpriv->dma_buffer[i] == NULL) 1516 if (devpriv->dma_buffer[i] == NULL)
1497 return -ENOMEM; 1517 return -ENOMEM;
1498 } 1518 }
1499 if (request_dma(dma_chan, "das16")) { 1519 if (request_dma(dma_chan, "das16")) {
1500 printk(" failed to allocate dma channel %i\n", 1520 printk(KERN_ERR " failed to allocate dma channel %i\n",
1501 dma_chan); 1521 dma_chan);
1502 return -EINVAL; 1522 return -EINVAL;
1503 } 1523 }
@@ -1506,11 +1526,11 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1506 disable_dma(devpriv->dma_chan); 1526 disable_dma(devpriv->dma_chan);
1507 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ); 1527 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
1508 release_dma_lock(flags); 1528 release_dma_lock(flags);
1509 printk(" ( dma = %u)\n", dma_chan); 1529 printk(KERN_INFO " ( dma = %u)\n", dma_chan);
1510 } else if (dma_chan == 0) { 1530 } else if (dma_chan == 0) {
1511 printk(" ( no dma )\n"); 1531 printk(KERN_INFO " ( no dma )\n");
1512 } else { 1532 } else {
1513 printk(" invalid dma channel\n"); 1533 printk(KERN_ERR " invalid dma channel\n");
1514 return -EINVAL; 1534 return -EINVAL;
1515 } 1535 }
1516 1536
@@ -1569,7 +1589,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1569 s->subdev_flags |= SDF_DIFF; 1589 s->subdev_flags |= SDF_DIFF;
1570 } 1590 }
1571 s->maxdata = (1 << thisboard->ai_nbits) - 1; 1591 s->maxdata = (1 << thisboard->ai_nbits) - 1;
1572 if (devpriv->user_ai_range_table) { /* user defined ai range */ 1592 if (devpriv->user_ai_range_table) { /* user defined ai range */
1573 s->range_table = devpriv->user_ai_range_table; 1593 s->range_table = devpriv->user_ai_range_table;
1574 } else if (devpriv->ai_unipolar) { 1594 } else if (devpriv->ai_unipolar) {
1575 s->range_table = das16_ai_uni_lranges[thisboard->ai_pg]; 1595 s->range_table = das16_ai_uni_lranges[thisboard->ai_pg];
@@ -1592,11 +1612,12 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1592 s->subdev_flags = SDF_WRITABLE; 1612 s->subdev_flags = SDF_WRITABLE;
1593 s->n_chan = 2; 1613 s->n_chan = 2;
1594 s->maxdata = (1 << thisboard->ao_nbits) - 1; 1614 s->maxdata = (1 << thisboard->ao_nbits) - 1;
1595 if (devpriv->user_ao_range_table) { /* user defined ao range */ 1615 /* user defined ao range */
1616 if (devpriv->user_ao_range_table)
1596 s->range_table = devpriv->user_ao_range_table; 1617 s->range_table = devpriv->user_ao_range_table;
1597 } else { 1618 else
1598 s->range_table = &range_unknown; 1619 s->range_table = &range_unknown;
1599 } 1620
1600 s->insn_write = thisboard->ao; 1621 s->insn_write = thisboard->ao;
1601 } else { 1622 } else {
1602 s->type = COMEDI_SUBD_UNUSED; 1623 s->type = COMEDI_SUBD_UNUSED;
@@ -1656,7 +1677,7 @@ static int das16_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1656 1677
1657static int das16_detach(struct comedi_device *dev) 1678static int das16_detach(struct comedi_device *dev)
1658{ 1679{
1659 printk("comedi%d: das16: remove\n", dev->minor); 1680 printk(KERN_INFO "comedi%d: das16: remove\n", dev->minor);
1660 1681
1661 das16_reset(dev); 1682 das16_reset(dev);
1662 1683
@@ -1750,8 +1771,8 @@ static void das16_ai_munge(struct comedi_device *dev,
1750 1771
1751 for (i = 0; i < num_samples; i++) { 1772 for (i = 0; i < num_samples; i++) {
1752 data[i] = le16_to_cpu(data[i]); 1773 data[i] = le16_to_cpu(data[i]);
1753 if (thisboard->ai_nbits == 12) { 1774 if (thisboard->ai_nbits == 12)
1754 data[i] = (data[i] >> 4) & 0xfff; 1775 data[i] = (data[i] >> 4) & 0xfff;
1755 } 1776
1756 } 1777 }
1757} 1778}
diff --git a/drivers/staging/comedi/drivers/das1800.c b/drivers/staging/comedi/drivers/das1800.c
index 3c3e0455c7c4..de5e82fec878 100644
--- a/drivers/staging/comedi/drivers/das1800.c
+++ b/drivers/staging/comedi/drivers/das1800.c
@@ -797,10 +797,8 @@ static int das1800_detach(struct comedi_device *dev)
797 free_dma(devpriv->dma0); 797 free_dma(devpriv->dma0);
798 if (devpriv->dma1) 798 if (devpriv->dma1)
799 free_dma(devpriv->dma1); 799 free_dma(devpriv->dma1);
800 if (devpriv->ai_buf0) 800 kfree(devpriv->ai_buf0);
801 kfree(devpriv->ai_buf0); 801 kfree(devpriv->ai_buf1);
802 if (devpriv->ai_buf1)
803 kfree(devpriv->ai_buf1);
804 } 802 }
805 803
806 printk("comedi%d: %s: remove\n", dev->minor, 804 printk("comedi%d: %s: remove\n", dev->minor,
@@ -1639,7 +1637,8 @@ static int das1800_ai_rinsn(struct comedi_device *dev,
1639 } 1637 }
1640 if (i == timeout) { 1638 if (i == timeout) {
1641 comedi_error(dev, "timeout"); 1639 comedi_error(dev, "timeout");
1642 return -ETIME; 1640 n = -ETIME;
1641 goto exit;
1643 } 1642 }
1644 dpnt = inw(dev->iobase + DAS1800_FIFO); 1643 dpnt = inw(dev->iobase + DAS1800_FIFO);
1645 /* shift data to offset binary for bipolar ranges */ 1644 /* shift data to offset binary for bipolar ranges */
@@ -1647,6 +1646,7 @@ static int das1800_ai_rinsn(struct comedi_device *dev,
1647 dpnt += 1 << (thisboard->resolution - 1); 1646 dpnt += 1 << (thisboard->resolution - 1);
1648 data[n] = dpnt; 1647 data[n] = dpnt;
1649 } 1648 }
1649exit:
1650 spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1650 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
1651 1651
1652 return n; 1652 return n;
diff --git a/drivers/staging/comedi/drivers/dt2801.c b/drivers/staging/comedi/drivers/dt2801.c
index 3f365aee4822..83fb6e56c3e9 100644
--- a/drivers/staging/comedi/drivers/dt2801.c
+++ b/drivers/staging/comedi/drivers/dt2801.c
@@ -472,7 +472,7 @@ static const struct comedi_lrange *dac_range_table[] = {
472 472
473static const struct comedi_lrange *dac_range_lkup(int opt) 473static const struct comedi_lrange *dac_range_lkup(int opt)
474{ 474{
475 if (opt < 0 || opt > 5) 475 if (opt < 0 || opt >= 5)
476 return &range_unknown; 476 return &range_unknown;
477 return dac_range_table[opt]; 477 return dac_range_table[opt];
478} 478}
diff --git a/drivers/staging/comedi/drivers/dt2811.c b/drivers/staging/comedi/drivers/dt2811.c
index 51ef695698a3..ea9bfb7fd88e 100644
--- a/drivers/staging/comedi/drivers/dt2811.c
+++ b/drivers/staging/comedi/drivers/dt2811.c
@@ -34,13 +34,13 @@ Configuration options:
34 [0] - I/O port base address 34 [0] - I/O port base address
35 [1] - IRQ, although this is currently unused 35 [1] - IRQ, although this is currently unused
36 [2] - A/D reference 36 [2] - A/D reference
37 0 = signle-ended 37 0 = signle-ended
38 1 = differential 38 1 = differential
39 2 = pseudo-differential (common reference) 39 2 = pseudo-differential (common reference)
40 [3] - A/D range 40 [3] - A/D range
41 0 = [-5,5] 41 0 = [-5, 5]
42 1 = [-2.5,2.5] 42 1 = [-2.5, 2.5]
43 2 = [0,5] 43 2 = [0, 5]
44 [4] - D/A 0 range (same choices) 44 [4] - D/A 0 range (same choices)
45 [4] - D/A 1 range (same choices) 45 [4] - D/A 1 range (same choices)
46*/ 46*/
@@ -52,96 +52,58 @@ Configuration options:
52 52
53static const char *driver_name = "dt2811"; 53static const char *driver_name = "dt2811";
54 54
55static const struct comedi_lrange range_dt2811_pgh_ai_5_unipolar = { 4, { 55static const struct comedi_lrange range_dt2811_pgh_ai_5_unipolar = {
56 RANGE 56 4, {
57 (0, 5), 57 RANGE(0, 5),
58 RANGE 58 RANGE(0, 2.5),
59 (0, 59 RANGE(0, 1.25),
60 2.5), 60 RANGE(0, 0.625)
61 RANGE 61 }
62 (0,
63 1.25),
64 RANGE
65 (0,
66 0.625)
67 }
68}; 62};
69 63
70static const struct comedi_lrange range_dt2811_pgh_ai_2_5_bipolar = { 4, { 64static const struct comedi_lrange range_dt2811_pgh_ai_2_5_bipolar = {
71 RANGE 65 4, {
72 (-2.5, 66 RANGE(-2.5, 2.5),
73 2.5), 67 RANGE(-1.25, 1.25),
74 RANGE 68 RANGE(-0.625, 0.625),
75 (-1.25, 69 RANGE(-0.3125, 0.3125)
76 1.25), 70 }
77 RANGE
78 (-0.625,
79 0.625),
80 RANGE
81 (-0.3125,
82 0.3125)
83 }
84}; 71};
85 72
86static const struct comedi_lrange range_dt2811_pgh_ai_5_bipolar = { 4, { 73static const struct comedi_lrange range_dt2811_pgh_ai_5_bipolar = {
87 RANGE 74 4, {
88 (-5, 5), 75 RANGE(-5, 5),
89 RANGE 76 RANGE(-2.5, 2.5),
90 (-2.5, 77 RANGE(-1.25, 1.25),
91 2.5), 78 RANGE(-0.625, 0.625)
92 RANGE 79 }
93 (-1.25,
94 1.25),
95 RANGE
96 (-0.625,
97 0.625)
98 }
99}; 80};
100 81
101static const struct comedi_lrange range_dt2811_pgl_ai_5_unipolar = { 4, { 82static const struct comedi_lrange range_dt2811_pgl_ai_5_unipolar = {
102 RANGE 83 4, {
103 (0, 5), 84 RANGE(0, 5),
104 RANGE 85 RANGE(0, 0.5),
105 (0, 86 RANGE(0, 0.05),
106 0.5), 87 RANGE(0, 0.01)
107 RANGE 88 }
108 (0,
109 0.05),
110 RANGE
111 (0,
112 0.01)
113 }
114}; 89};
115 90
116static const struct comedi_lrange range_dt2811_pgl_ai_2_5_bipolar = { 4, { 91static const struct comedi_lrange range_dt2811_pgl_ai_2_5_bipolar = {
117 RANGE 92 4, {
118 (-2.5, 93 RANGE(-2.5, 2.5),
119 2.5), 94 RANGE(-0.25, 0.25),
120 RANGE 95 RANGE(-0.025, 0.025),
121 (-0.25, 96 RANGE(-0.005, 0.005)
122 0.25), 97 }
123 RANGE
124 (-0.025,
125 0.025),
126 RANGE
127 (-0.005,
128 0.005)
129 }
130}; 98};
131 99
132static const struct comedi_lrange range_dt2811_pgl_ai_5_bipolar = { 4, { 100static const struct comedi_lrange range_dt2811_pgl_ai_5_bipolar = {
133 RANGE 101 4, {
134 (-5, 5), 102 RANGE(-5, 5),
135 RANGE 103 RANGE(-0.5, 0.5),
136 (-0.5, 104 RANGE(-0.05, 0.05),
137 0.5), 105 RANGE(-0.01, 0.01)
138 RANGE 106 }
139 (-0.05,
140 0.05),
141 RANGE
142 (-0.01,
143 0.01)
144 }
145}; 107};
146 108
147/* 109/*
@@ -348,21 +310,21 @@ static irqreturn_t dt2811_interrupt(int irq, void *d)
348 options[0] Board base address 310 options[0] Board base address
349 options[1] IRQ 311 options[1] IRQ
350 options[2] Input configuration 312 options[2] Input configuration
351 0 == single-ended 313 0 == single-ended
352 1 == differential 314 1 == differential
353 2 == pseudo-differential 315 2 == pseudo-differential
354 options[3] Analog input range configuration 316 options[3] Analog input range configuration
355 0 == bipolar 5 (-5V -- +5V) 317 0 == bipolar 5 (-5V -- +5V)
356 1 == bipolar 2.5V (-2.5V -- +2.5V) 318 1 == bipolar 2.5V (-2.5V -- +2.5V)
357 2 == unipolar 5V (0V -- +5V) 319 2 == unipolar 5V (0V -- +5V)
358 options[4] Analog output 0 range configuration 320 options[4] Analog output 0 range configuration
359 0 == bipolar 5 (-5V -- +5V) 321 0 == bipolar 5 (-5V -- +5V)
360 1 == bipolar 2.5V (-2.5V -- +2.5V) 322 1 == bipolar 2.5V (-2.5V -- +2.5V)
361 2 == unipolar 5V (0V -- +5V) 323 2 == unipolar 5V (0V -- +5V)
362 options[5] Analog output 1 range configuration 324 options[5] Analog output 1 range configuration
363 0 == bipolar 5 (-5V -- +5V) 325 0 == bipolar 5 (-5V -- +5V)
364 1 == bipolar 2.5V (-2.5V -- +2.5V) 326 1 == bipolar 2.5V (-2.5V -- +2.5V)
365 2 == unipolar 5V (0V -- +5V) 327 2 == unipolar 5V (0V -- +5V)
366*/ 328*/
367 329
368static int dt2811_attach(struct comedi_device *dev, struct comedi_devconfig *it) 330static int dt2811_attach(struct comedi_device *dev, struct comedi_devconfig *it)
@@ -377,10 +339,10 @@ static int dt2811_attach(struct comedi_device *dev, struct comedi_devconfig *it)
377 339
378 iobase = it->options[0]; 340 iobase = it->options[0];
379 341
380 printk("comedi%d: dt2811: base=0x%04lx\n", dev->minor, iobase); 342 printk(KERN_INFO "comedi%d: dt2811:base=0x%04lx\n", dev->minor, iobase);
381 343
382 if (!request_region(iobase, DT2811_SIZE, driver_name)) { 344 if (!request_region(iobase, DT2811_SIZE, driver_name)) {
383 printk("I/O port conflict\n"); 345 printk(KERN_ERR "I/O port conflict\n");
384 return -EIO; 346 return -EIO;
385 } 347 }
386 348
@@ -410,25 +372,25 @@ static int dt2811_attach(struct comedi_device *dev, struct comedi_devconfig *it)
410 irq = probe_irq_off(irqs); 372 irq = probe_irq_off(irqs);
411 restore_flags(flags); 373 restore_flags(flags);
412 374
413 /*outb(DT2811_CLRERROR|DT2811_INTENB,dev->iobase+DT2811_ADCSR); */ 375 /*outb(DT2811_CLRERROR|DT2811_INTENB,
376 dev->iobase+DT2811_ADCSR);*/
414 377
415 if (inb(dev->iobase + DT2811_ADCSR) & DT2811_ADERROR) { 378 if (inb(dev->iobase + DT2811_ADCSR) & DT2811_ADERROR)
416 printk("error probing irq (bad) \n"); 379 printk(KERN_ERR "error probing irq (bad)\n");
417 }
418 dev->irq = 0; 380 dev->irq = 0;
419 if (irq > 0) { 381 if (irq > 0) {
420 i = inb(dev->iobase + DT2811_ADDATLO); 382 i = inb(dev->iobase + DT2811_ADDATLO);
421 i = inb(dev->iobase + DT2811_ADDATHI); 383 i = inb(dev->iobase + DT2811_ADDATHI);
422 printk("(irq = %d)\n", irq); 384 printk(KERN_INFO "(irq = %d)\n", irq);
423 ret = request_irq(irq, dt2811_interrupt, 0, 385 ret = request_irq(irq, dt2811_interrupt, 0,
424 driver_name, dev); 386 driver_name, dev);
425 if (ret < 0) 387 if (ret < 0)
426 return -EIO; 388 return -EIO;
427 dev->irq = irq; 389 dev->irq = irq;
428 } else if (irq == 0) { 390 } else if (irq == 0) {
429 printk("(no irq)\n"); 391 printk(KERN_INFO "(no irq)\n");
430 } else { 392 } else {
431 printk("( multiple irq's -- this is bad! )\n"); 393 printk(KERN_ERR "( multiple irq's -- this is bad! )\n");
432 } 394 }
433 } 395 }
434#endif 396#endif
@@ -540,14 +502,12 @@ static int dt2811_attach(struct comedi_device *dev, struct comedi_devconfig *it)
540 502
541static int dt2811_detach(struct comedi_device *dev) 503static int dt2811_detach(struct comedi_device *dev)
542{ 504{
543 printk("comedi%d: dt2811: remove\n", dev->minor); 505 printk(KERN_INFO "comedi%d: dt2811: remove\n", dev->minor);
544 506
545 if (dev->irq) { 507 if (dev->irq)
546 free_irq(dev->irq, dev); 508 free_irq(dev->irq, dev);
547 } 509 if (dev->iobase)
548 if (dev->iobase) {
549 release_region(dev->iobase, DT2811_SIZE); 510 release_region(dev->iobase, DT2811_SIZE);
550 }
551 511
552 return 0; 512 return 0;
553} 513}
@@ -579,7 +539,7 @@ static int dt2811_ai_insn(struct comedi_device *dev, struct comedi_subdevice *s,
579#if 0 539#if 0
580/* Wow. This is code from the Comedi stone age. But it hasn't been 540/* Wow. This is code from the Comedi stone age. But it hasn't been
581 * replaced, so I'll let it stay. */ 541 * replaced, so I'll let it stay. */
582int dt2811_adtrig(kdev_t minor, comedi_adtrig * adtrig) 542int dt2811_adtrig(kdev_t minor, comedi_adtrig *adtrig)
583{ 543{
584 struct comedi_device *dev = comedi_devices + minor; 544 struct comedi_device *dev = comedi_devices + minor;
585 545
@@ -589,8 +549,10 @@ int dt2811_adtrig(kdev_t minor, comedi_adtrig * adtrig)
589 switch (dev->i_admode) { 549 switch (dev->i_admode) {
590 case COMEDI_MDEMAND: 550 case COMEDI_MDEMAND:
591 dev->ntrig = adtrig->n - 1; 551 dev->ntrig = adtrig->n - 1;
552 /* not neccessary */
592 /*printk("dt2811: AD soft trigger\n"); */ 553 /*printk("dt2811: AD soft trigger\n"); */
593 /*outb(DT2811_CLRERROR|DT2811_INTENB,dev->iobase+DT2811_ADCSR); *//* not neccessary */ 554 /*outb(DT2811_CLRERROR|DT2811_INTENB,
555 dev->iobase+DT2811_ADCSR); */
594 outb(dev->curadchan, dev->iobase + DT2811_ADGCR); 556 outb(dev->curadchan, dev->iobase + DT2811_ADGCR);
595 do_gettimeofday(&trigtime); 557 do_gettimeofday(&trigtime);
596 break; 558 break;
@@ -630,9 +592,8 @@ static int dt2811_ao_insn_read(struct comedi_device *dev,
630 592
631 chan = CR_CHAN(insn->chanspec); 593 chan = CR_CHAN(insn->chanspec);
632 594
633 for (i = 0; i < insn->n; i++) { 595 for (i = 0; i < insn->n; i++)
634 data[i] = devpriv->ao_readback[chan]; 596 data[i] = devpriv->ao_readback[chan];
635 }
636 597
637 return i; 598 return i;
638} 599}
diff --git a/drivers/staging/comedi/drivers/dt2814.c b/drivers/staging/comedi/drivers/dt2814.c
index e1b73752f607..16fde066d266 100644
--- a/drivers/staging/comedi/drivers/dt2814.c
+++ b/drivers/staging/comedi/drivers/dt2814.c
@@ -99,13 +99,13 @@ static int dt2814_ai_insn_read(struct comedi_device *dev,
99 outb(chan, dev->iobase + DT2814_CSR); 99 outb(chan, dev->iobase + DT2814_CSR);
100 for (i = 0; i < DT2814_TIMEOUT; i++) { 100 for (i = 0; i < DT2814_TIMEOUT; i++) {
101 status = inb(dev->iobase + DT2814_CSR); 101 status = inb(dev->iobase + DT2814_CSR);
102 printk("dt2814: status: %02x\n", status); 102 printk(KERN_INFO "dt2814: status: %02x\n", status);
103 udelay(10); 103 udelay(10);
104 if (status & DT2814_FINISH) 104 if (status & DT2814_FINISH)
105 break; 105 break;
106 } 106 }
107 if (i >= DT2814_TIMEOUT) { 107 if (i >= DT2814_TIMEOUT) {
108 printk("dt2814: status: %02x\n", status); 108 printk(KERN_INFO "dt2814: status: %02x\n", status);
109 return -ETIMEDOUT; 109 return -ETIMEDOUT;
110 } 110 }
111 111
@@ -173,7 +173,8 @@ static int dt2814_ai_cmdtest(struct comedi_device *dev,
173 if (err) 173 if (err)
174 return 1; 174 return 1;
175 175
176 /* step 2: make sure trigger sources are unique and mutually compatible */ 176 /* step 2: make sure trigger sources are
177 * unique and mutually compatible */
177 178
178 /* note that mutual compatibility is not an issue here */ 179 /* note that mutual compatibility is not an issue here */
179 if (cmd->stop_src != TRIG_TIMER && cmd->stop_src != TRIG_EXT) 180 if (cmd->stop_src != TRIG_TIMER && cmd->stop_src != TRIG_EXT)
@@ -256,9 +257,9 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it)
256 unsigned long iobase; 257 unsigned long iobase;
257 258
258 iobase = it->options[0]; 259 iobase = it->options[0];
259 printk("comedi%d: dt2814: 0x%04lx ", dev->minor, iobase); 260 printk(KERN_INFO "comedi%d: dt2814: 0x%04lx ", dev->minor, iobase);
260 if (!request_region(iobase, DT2814_SIZE, "dt2814")) { 261 if (!request_region(iobase, DT2814_SIZE, "dt2814")) {
261 printk("I/O port conflict\n"); 262 printk(KERN_ERR "I/O port conflict\n");
262 return -EIO; 263 return -EIO;
263 } 264 }
264 dev->iobase = iobase; 265 dev->iobase = iobase;
@@ -267,7 +268,7 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it)
267 outb(0, dev->iobase + DT2814_CSR); 268 outb(0, dev->iobase + DT2814_CSR);
268 udelay(100); 269 udelay(100);
269 if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR) { 270 if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR) {
270 printk("reset error (fatal)\n"); 271 printk(KERN_ERR "reset error (fatal)\n");
271 return -EIO; 272 return -EIO;
272 } 273 }
273 i = inb(dev->iobase + DT2814_DATA); 274 i = inb(dev->iobase + DT2814_DATA);
@@ -286,9 +287,9 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it)
286 287
287 irq = probe_irq_off(irqs); 288 irq = probe_irq_off(irqs);
288 restore_flags(flags); 289 restore_flags(flags);
289 if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR) { 290 if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR)
290 printk("error probing irq (bad) \n"); 291 printk(KERN_DEBUG "error probing irq (bad)\n");
291 } 292
292 293
293 i = inb(dev->iobase + DT2814_DATA); 294 i = inb(dev->iobase + DT2814_DATA);
294 i = inb(dev->iobase + DT2814_DATA); 295 i = inb(dev->iobase + DT2814_DATA);
@@ -297,18 +298,18 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it)
297 dev->irq = 0; 298 dev->irq = 0;
298 if (irq > 0) { 299 if (irq > 0) {
299 if (request_irq(irq, dt2814_interrupt, 0, "dt2814", dev)) { 300 if (request_irq(irq, dt2814_interrupt, 0, "dt2814", dev)) {
300 printk("(irq %d unavailable)\n", irq); 301 printk(KERN_WARNING "(irq %d unavailable)\n", irq);
301 } else { 302 } else {
302 printk("( irq = %d )\n", irq); 303 printk(KERN_INFO "( irq = %d )\n", irq);
303 dev->irq = irq; 304 dev->irq = irq;
304 } 305 }
305 } else if (irq == 0) { 306 } else if (irq == 0) {
306 printk("(no irq)\n"); 307 printk(KERN_WARNING "(no irq)\n");
307 } else { 308 } else {
308#if 0 309#if 0
309 printk("(probe returned multiple irqs--bad)\n"); 310 printk(KERN_DEBUG "(probe returned multiple irqs--bad)\n");
310#else 311#else
311 printk("(irq probe not implemented)\n"); 312 printk(KERN_WARNING "(irq probe not implemented)\n");
312#endif 313#endif
313 } 314 }
314 315
@@ -337,14 +338,13 @@ static int dt2814_attach(struct comedi_device *dev, struct comedi_devconfig *it)
337 338
338static int dt2814_detach(struct comedi_device *dev) 339static int dt2814_detach(struct comedi_device *dev)
339{ 340{
340 printk("comedi%d: dt2814: remove\n", dev->minor); 341 printk(KERN_INFO "comedi%d: dt2814: remove\n", dev->minor);
341 342
342 if (dev->irq) { 343 if (dev->irq)
343 free_irq(dev->irq, dev); 344 free_irq(dev->irq, dev);
344 } 345
345 if (dev->iobase) { 346 if (dev->iobase)
346 release_region(dev->iobase, DT2814_SIZE); 347 release_region(dev->iobase, DT2814_SIZE);
347 }
348 348
349 return 0; 349 return 0;
350} 350}
diff --git a/drivers/staging/comedi/drivers/dt282x.c b/drivers/staging/comedi/drivers/dt282x.c
index e548763cf2f3..fd8728c83669 100644
--- a/drivers/staging/comedi/drivers/dt282x.c
+++ b/drivers/staging/comedi/drivers/dt282x.c
@@ -45,9 +45,9 @@ Configuration options:
45 [7] - AO 1 jumpered for 0=straight binary, 1=2's complement 45 [7] - AO 1 jumpered for 0=straight binary, 1=2's complement
46 [8] - AI jumpered for 0=[-10,10]V, 1=[0,10], 2=[-5,5], 3=[0,5] 46 [8] - AI jumpered for 0=[-10,10]V, 1=[0,10], 2=[-5,5], 3=[0,5]
47 [9] - AO 0 jumpered for 0=[-10,10]V, 1=[0,10], 2=[-5,5], 3=[0,5], 47 [9] - AO 0 jumpered for 0=[-10,10]V, 1=[0,10], 2=[-5,5], 3=[0,5],
48 4=[-2.5,2.5] 48 4=[-2.5,2.5]
49 [10]- A0 1 jumpered for 0=[-10,10]V, 1=[0,10], 2=[-5,5], 3=[0,5], 49 [10]- A0 1 jumpered for 0=[-10,10]V, 1=[0,10], 2=[-5,5], 3=[0,5],
50 4=[-2.5,2.5] 50 4=[-2.5,2.5]
51 51
52Notes: 52Notes:
53 - AO commands might be broken. 53 - AO commands might be broken.
@@ -155,79 +155,58 @@ Notes:
155#define DT2821_XCLK 0x0002 /* (R/W) external clock enable */ 155#define DT2821_XCLK 0x0002 /* (R/W) external clock enable */
156#define DT2821_BDINIT 0x0001 /* (W) initialize board */ 156#define DT2821_BDINIT 0x0001 /* (W) initialize board */
157 157
158static const struct comedi_lrange range_dt282x_ai_lo_bipolar = { 4, { 158static const struct comedi_lrange range_dt282x_ai_lo_bipolar = {
159 RANGE(-10, 159 4, {
160 10), 160 RANGE(-10, 10),
161 RANGE(-5, 161 RANGE(-5, 5),
162 5), 162 RANGE(-2.5, 2.5),
163 RANGE(-2.5, 163 RANGE(-1.25, 1.25)
164 2.5), 164 }
165 RANGE
166 (-1.25,
167 1.25)
168 }
169}; 165};
170 166
171static const struct comedi_lrange range_dt282x_ai_lo_unipolar = { 4, { 167static const struct comedi_lrange range_dt282x_ai_lo_unipolar = {
172 RANGE(0, 168 4, {
173 10), 169 RANGE(0, 10),
174 RANGE(0, 170 RANGE(0, 5),
175 5), 171 RANGE(0, 2.5),
176 RANGE(0, 172 RANGE(0, 1.25)
177 2.5), 173 }
178 RANGE(0,
179 1.25)
180 }
181}; 174};
182 175
183static const struct comedi_lrange range_dt282x_ai_5_bipolar = { 4, { 176static const struct comedi_lrange range_dt282x_ai_5_bipolar = {
184 RANGE(-5, 177 4, {
185 5), 178 RANGE(-5, 5),
186 RANGE(-2.5, 179 RANGE(-2.5, 2.5),
187 2.5), 180 RANGE(-1.25, 1.25),
188 RANGE(-1.25, 181 RANGE(-0.625, 0.625)
189 1.25), 182 }
190 RANGE
191 (-0.625,
192 0.625),
193 }
194}; 183};
195 184
196static const struct comedi_lrange range_dt282x_ai_5_unipolar = { 4, { 185static const struct comedi_lrange range_dt282x_ai_5_unipolar = {
197 RANGE(0, 186 4, {
198 5), 187 RANGE(0, 5),
199 RANGE(0, 188 RANGE(0, 2.5),
200 2.5), 189 RANGE(0, 1.25),
201 RANGE(0, 190 RANGE(0, 0.625),
202 1.25), 191 }
203 RANGE(0,
204 0.625),
205 }
206}; 192};
207 193
208static const struct comedi_lrange range_dt282x_ai_hi_bipolar = { 4, { 194static const struct comedi_lrange range_dt282x_ai_hi_bipolar = {
209 RANGE(-10, 195 4, {
210 10), 196 RANGE(-10, 10),
211 RANGE(-1, 197 RANGE(-1, 1),
212 1), 198 RANGE(-0.1, 0.1),
213 RANGE(-0.1, 199 RANGE(-0.02, 0.02)
214 0.1), 200 }
215 RANGE
216 (-0.02,
217 0.02)
218 }
219}; 201};
220 202
221static const struct comedi_lrange range_dt282x_ai_hi_unipolar = { 4, { 203static const struct comedi_lrange range_dt282x_ai_hi_unipolar = {
222 RANGE(0, 204 4, {
223 10), 205 RANGE(0, 10),
224 RANGE(0, 206 RANGE(0, 1),
225 1), 207 RANGE(0, 0.1),
226 RANGE(0, 208 RANGE(0, 0.02)
227 0.1), 209 }
228 RANGE(0,
229 0.02)
230 }
231}; 210};
232 211
233struct dt282x_board { 212struct dt282x_board {
@@ -370,7 +349,7 @@ static const struct dt282x_board boardtypes[] = {
370 }, 349 },
371}; 350};
372 351
373#define n_boardtypes sizeof(boardtypes)/sizeof(struct dt282x_board) 352#define n_boardtypes (sizeof(boardtypes)/sizeof(struct dt282x_board))
374#define this_board ((const struct dt282x_board *)dev->board_ptr) 353#define this_board ((const struct dt282x_board *)dev->board_ptr)
375 354
376struct dt282x_private { 355struct dt282x_private {
@@ -411,21 +390,25 @@ struct dt282x_private {
411#define update_adcsr(a) outw(devpriv->adcsr|(a), dev->iobase+DT2821_ADCSR) 390#define update_adcsr(a) outw(devpriv->adcsr|(a), dev->iobase+DT2821_ADCSR)
412#define mux_busy() (inw(dev->iobase+DT2821_ADCSR)&DT2821_MUXBUSY) 391#define mux_busy() (inw(dev->iobase+DT2821_ADCSR)&DT2821_MUXBUSY)
413#define ad_done() (inw(dev->iobase+DT2821_ADCSR)&DT2821_ADDONE) 392#define ad_done() (inw(dev->iobase+DT2821_ADCSR)&DT2821_ADDONE)
414#define update_supcsr(a) outw(devpriv->supcsr|(a), dev->iobase+DT2821_SUPCSR) 393#define update_supcsr(a) outw(devpriv->supcsr|(a), dev->iobase+DT2821_SUPCSR)
415 394
416/* 395/*
417 * danger! macro abuse... a is the expression to wait on, and b is 396 * danger! macro abuse... a is the expression to wait on, and b is
418 * the statement(s) to execute if it doesn't happen. 397 * the statement(s) to execute if it doesn't happen.
419 */ 398 */
420#define wait_for(a, b) \ 399#define wait_for(a, b) \
421 do{ \ 400 do { \
422 int _i; \ 401 int _i; \
423 for (_i=0;_i<DT2821_TIMEOUT;_i++){ \ 402 for (_i = 0; _i < DT2821_TIMEOUT; _i++) { \
424 if (a){_i=0;break;} \ 403 if (a) { \
425 udelay(5); \ 404 _i = 0; \
426 } \ 405 break; \
427 if (_i){b} \ 406 } \
428 }while (0) 407 udelay(5); \
408 } \
409 if (_i) \
410 b \
411 } while (0)
429 412
430static int dt282x_attach(struct comedi_device *dev, 413static int dt282x_attach(struct comedi_device *dev,
431 struct comedi_devconfig *it); 414 struct comedi_devconfig *it);
@@ -462,18 +445,16 @@ static void dt282x_munge(struct comedi_device *dev, short *buf,
462 unsigned short sign = 1 << (boardtype.adbits - 1); 445 unsigned short sign = 1 << (boardtype.adbits - 1);
463 int n; 446 int n;
464 447
465 if (devpriv->ad_2scomp) { 448 if (devpriv->ad_2scomp)
466 sign = 1 << (boardtype.adbits - 1); 449 sign = 1 << (boardtype.adbits - 1);
467 } else { 450 else
468 sign = 0; 451 sign = 0;
469 }
470 452
471 if (nbytes % 2) 453 if (nbytes % 2)
472 comedi_error(dev, "bug! odd number of bytes from dma xfer"); 454 comedi_error(dev, "bug! odd number of bytes from dma xfer");
473 n = nbytes / 2; 455 n = nbytes / 2;
474 for (i = 0; i < n; i++) { 456 for (i = 0; i < n; i++)
475 buf[i] = (buf[i] & mask) ^ sign; 457 buf[i] = (buf[i] & mask) ^ sign;
476 }
477} 458}
478 459
479static void dt282x_ao_dma_interrupt(struct comedi_device *dev) 460static void dt282x_ao_dma_interrupt(struct comedi_device *dev)
@@ -486,7 +467,7 @@ static void dt282x_ao_dma_interrupt(struct comedi_device *dev)
486 update_supcsr(DT2821_CLRDMADNE); 467 update_supcsr(DT2821_CLRDMADNE);
487 468
488 if (!s->async->prealloc_buf) { 469 if (!s->async->prealloc_buf) {
489 printk("async->data disappeared. dang!\n"); 470 printk(KERN_ERR "async->data disappeared. dang!\n");
490 return; 471 return;
491 } 472 }
492 473
@@ -499,7 +480,7 @@ static void dt282x_ao_dma_interrupt(struct comedi_device *dev)
499 480
500 size = cfc_read_array_from_buffer(s, ptr, devpriv->dma_maxsize); 481 size = cfc_read_array_from_buffer(s, ptr, devpriv->dma_maxsize);
501 if (size == 0) { 482 if (size == 0) {
502 printk("dt282x: AO underrun\n"); 483 printk(KERN_ERR "dt282x: AO underrun\n");
503 dt282x_ao_cancel(dev, s); 484 dt282x_ao_cancel(dev, s);
504 s->async->events |= COMEDI_CB_OVERFLOW; 485 s->async->events |= COMEDI_CB_OVERFLOW;
505 return; 486 return;
@@ -519,7 +500,7 @@ static void dt282x_ai_dma_interrupt(struct comedi_device *dev)
519 update_supcsr(DT2821_CLRDMADNE); 500 update_supcsr(DT2821_CLRDMADNE);
520 501
521 if (!s->async->prealloc_buf) { 502 if (!s->async->prealloc_buf) {
522 printk("async->data disappeared. dang!\n"); 503 printk(KERN_ERR "async->data disappeared. dang!\n");
523 return; 504 return;
524 } 505 }
525 506
@@ -540,7 +521,7 @@ static void dt282x_ai_dma_interrupt(struct comedi_device *dev)
540 devpriv->nread -= size / 2; 521 devpriv->nread -= size / 2;
541 522
542 if (devpriv->nread < 0) { 523 if (devpriv->nread < 0) {
543 printk("dt282x: off by one\n"); 524 printk(KERN_INFO "dt282x: off by one\n");
544 devpriv->nread = 0; 525 devpriv->nread = 0;
545 } 526 }
546 if (!devpriv->nread) { 527 if (!devpriv->nread) {
@@ -651,7 +632,7 @@ static irqreturn_t dt282x_interrupt(int irq, void *d)
651 static int warn = 5; 632 static int warn = 5;
652 if (--warn <= 0) { 633 if (--warn <= 0) {
653 disable_irq(dev->irq); 634 disable_irq(dev->irq);
654 printk("disabling irq\n"); 635 printk(KERN_INFO "disabling irq\n");
655 } 636 }
656#endif 637#endif
657 comedi_error(dev, "D/A error"); 638 comedi_error(dev, "D/A error");
@@ -666,13 +647,13 @@ static irqreturn_t dt282x_interrupt(int irq, void *d)
666 647
667 data = (short)inw(dev->iobase + DT2821_ADDAT); 648 data = (short)inw(dev->iobase + DT2821_ADDAT);
668 data &= (1 << boardtype.adbits) - 1; 649 data &= (1 << boardtype.adbits) - 1;
669 if (devpriv->ad_2scomp) { 650
651 if (devpriv->ad_2scomp)
670 data ^= 1 << (boardtype.adbits - 1); 652 data ^= 1 << (boardtype.adbits - 1);
671 }
672 ret = comedi_buf_put(s->async, data); 653 ret = comedi_buf_put(s->async, data);
673 if (ret == 0) { 654
655 if (ret == 0)
674 s->async->events |= COMEDI_CB_OVERFLOW; 656 s->async->events |= COMEDI_CB_OVERFLOW;
675 }
676 657
677 devpriv->nread--; 658 devpriv->nread--;
678 if (!devpriv->nread) { 659 if (!devpriv->nread) {
@@ -685,7 +666,8 @@ static irqreturn_t dt282x_interrupt(int irq, void *d)
685 } 666 }
686#endif 667#endif
687 comedi_event(dev, s); 668 comedi_event(dev, s);
688 /* printk("adcsr=0x%02x dacsr-0x%02x supcsr=0x%02x\n", adcsr, dacsr, supcsr); */ 669 /* printk("adcsr=0x%02x dacsr-0x%02x supcsr=0x%02x\n",
670 adcsr, dacsr, supcsr); */
689 return IRQ_RETVAL(handled); 671 return IRQ_RETVAL(handled);
690} 672}
691 673
@@ -776,7 +758,10 @@ static int dt282x_ai_cmdtest(struct comedi_device *dev,
776 if (err) 758 if (err)
777 return 1; 759 return 1;
778 760
779 /* step 2: make sure trigger sources are unique and mutually compatible */ 761 /*
762 * step 2: make sure trigger sources are unique
763 * and mutually compatible
764 */
780 765
781 /* note that mutual compatibility is not an issue here */ 766 /* note that mutual compatibility is not an issue here */
782 if (cmd->scan_begin_src != TRIG_FOLLOW && 767 if (cmd->scan_begin_src != TRIG_FOLLOW &&
@@ -859,7 +844,8 @@ static int dt282x_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
859 844
860 if (devpriv->usedma == 0) { 845 if (devpriv->usedma == 0) {
861 comedi_error(dev, 846 comedi_error(dev,
862 "driver requires 2 dma channels to execute command"); 847 "driver requires 2 dma channels"
848 " to execute command");
863 return -EIO; 849 return -EIO;
864 } 850 }
865 851
@@ -1049,7 +1035,10 @@ static int dt282x_ao_cmdtest(struct comedi_device *dev,
1049 if (err) 1035 if (err)
1050 return 1; 1036 return 1;
1051 1037
1052 /* step 2: make sure trigger sources are unique and mutually compatible */ 1038 /*
1039 * step 2: make sure trigger sources are unique
1040 * and mutually compatible
1041 */
1053 1042
1054 /* note that mutual compatibility is not an issue here */ 1043 /* note that mutual compatibility is not an issue here */
1055 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE) 1044 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
@@ -1064,7 +1053,7 @@ static int dt282x_ao_cmdtest(struct comedi_device *dev,
1064 cmd->start_arg = 0; 1053 cmd->start_arg = 0;
1065 err++; 1054 err++;
1066 } 1055 }
1067 if (cmd->scan_begin_arg < 5000 /* XXX unknown */ ) { 1056 if (cmd->scan_begin_arg < 5000 /* XXX unknown */) {
1068 cmd->scan_begin_arg = 5000; 1057 cmd->scan_begin_arg = 5000;
1069 err++; 1058 err++;
1070 } 1059 }
@@ -1115,7 +1104,7 @@ static int dt282x_ao_inttrig(struct comedi_device *dev,
1115 size = cfc_read_array_from_buffer(s, devpriv->dma[0].buf, 1104 size = cfc_read_array_from_buffer(s, devpriv->dma[0].buf,
1116 devpriv->dma_maxsize); 1105 devpriv->dma_maxsize);
1117 if (size == 0) { 1106 if (size == 0) {
1118 printk("dt282x: AO underrun\n"); 1107 printk(KERN_ERR "dt282x: AO underrun\n");
1119 return -EPIPE; 1108 return -EPIPE;
1120 } 1109 }
1121 prep_ao_dma(dev, 0, size); 1110 prep_ao_dma(dev, 0, size);
@@ -1123,7 +1112,7 @@ static int dt282x_ao_inttrig(struct comedi_device *dev,
1123 size = cfc_read_array_from_buffer(s, devpriv->dma[1].buf, 1112 size = cfc_read_array_from_buffer(s, devpriv->dma[1].buf,
1124 devpriv->dma_maxsize); 1113 devpriv->dma_maxsize);
1125 if (size == 0) { 1114 if (size == 0) {
1126 printk("dt282x: AO underrun\n"); 1115 printk(KERN_ERR "dt282x: AO underrun\n");
1127 return -EPIPE; 1116 return -EPIPE;
1128 } 1117 }
1129 prep_ao_dma(dev, 1, size); 1118 prep_ao_dma(dev, 1, size);
@@ -1141,7 +1130,8 @@ static int dt282x_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1141 1130
1142 if (devpriv->usedma == 0) { 1131 if (devpriv->usedma == 0) {
1143 comedi_error(dev, 1132 comedi_error(dev,
1144 "driver requires 2 dma channels to execute command"); 1133 "driver requires 2 dma channels"
1134 " to execute command");
1145 return -EIO; 1135 return -EIO;
1146 } 1136 }
1147 1137
@@ -1262,7 +1252,8 @@ static const struct comedi_lrange *opt_ao_range_lkup(int x)
1262 return ao_range_table[x]; 1252 return ao_range_table[x];
1263} 1253}
1264 1254
1265enum { opt_iobase = 0, opt_irq, opt_dma1, opt_dma2, /* i/o base, irq, dma channels */ 1255enum { /* i/o base, irq, dma channels */
1256 opt_iobase = 0, opt_irq, opt_dma1, opt_dma2,
1266 opt_diff, /* differential */ 1257 opt_diff, /* differential */
1267 opt_ai_twos, opt_ao0_twos, opt_ao1_twos, /* twos comp */ 1258 opt_ai_twos, opt_ao0_twos, opt_ao1_twos, /* twos comp */
1268 opt_ai_range, opt_ao0_range, opt_ao1_range, /* range */ 1259 opt_ai_range, opt_ao0_range, opt_ao1_range, /* range */
@@ -1295,9 +1286,9 @@ static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1295 if (!iobase) 1286 if (!iobase)
1296 iobase = 0x240; 1287 iobase = 0x240;
1297 1288
1298 printk("comedi%d: dt282x: 0x%04lx", dev->minor, iobase); 1289 printk(KERN_INFO "comedi%d: dt282x: 0x%04lx", dev->minor, iobase);
1299 if (!request_region(iobase, DT2821_SIZE, "dt282x")) { 1290 if (!request_region(iobase, DT2821_SIZE, "dt282x")) {
1300 printk(" I/O port conflict\n"); 1291 printk(KERN_INFO " I/O port conflict\n");
1301 return -EBUSY; 1292 return -EBUSY;
1302 } 1293 }
1303 dev->iobase = iobase; 1294 dev->iobase = iobase;
@@ -1305,7 +1296,7 @@ static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1305 outw(DT2821_BDINIT, dev->iobase + DT2821_SUPCSR); 1296 outw(DT2821_BDINIT, dev->iobase + DT2821_SUPCSR);
1306 i = inw(dev->iobase + DT2821_ADCSR); 1297 i = inw(dev->iobase + DT2821_ADCSR);
1307#ifdef DEBUG 1298#ifdef DEBUG
1308 printk(" fingerprint=%x,%x,%x,%x,%x", 1299 printk(KERN_DEBUG " fingerprint=%x,%x,%x,%x,%x",
1309 inw(dev->iobase + DT2821_ADCSR), 1300 inw(dev->iobase + DT2821_ADCSR),
1310 inw(dev->iobase + DT2821_CHANCSR), 1301 inw(dev->iobase + DT2821_CHANCSR),
1311 inw(dev->iobase + DT2821_DACSR), 1302 inw(dev->iobase + DT2821_DACSR),
@@ -1323,7 +1314,7 @@ static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1323 != DT2821_SUPCSR_VAL) || 1314 != DT2821_SUPCSR_VAL) ||
1324 ((inw(dev->iobase + DT2821_TMRCTR) & DT2821_TMRCTR_MASK) 1315 ((inw(dev->iobase + DT2821_TMRCTR) & DT2821_TMRCTR_MASK)
1325 != DT2821_TMRCTR_VAL)) { 1316 != DT2821_TMRCTR_VAL)) {
1326 printk(" board not found"); 1317 printk(KERN_ERR " board not found");
1327 return -EIO; 1318 return -EIO;
1328 } 1319 }
1329 /* should do board test */ 1320 /* should do board test */
@@ -1344,26 +1335,25 @@ static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1344 1335
1345 irq = probe_irq_off(irqs); 1336 irq = probe_irq_off(irqs);
1346 restore_flags(flags); 1337 restore_flags(flags);
1347 if (0 /* error */ ) { 1338 if (0 /* error */)
1348 printk(" error probing irq (bad)"); 1339 printk(KERN_ERR " error probing irq (bad)");
1349 }
1350 } 1340 }
1351#endif 1341#endif
1352 if (irq > 0) { 1342 if (irq > 0) {
1353 printk(" ( irq = %d )", irq); 1343 printk(KERN_INFO " ( irq = %d )", irq);
1354 ret = request_irq(irq, dt282x_interrupt, 0, "dt282x", dev); 1344 ret = request_irq(irq, dt282x_interrupt, 0, "dt282x", dev);
1355 if (ret < 0) { 1345 if (ret < 0) {
1356 printk(" failed to get irq\n"); 1346 printk(KERN_ERR " failed to get irq\n");
1357 return -EIO; 1347 return -EIO;
1358 } 1348 }
1359 dev->irq = irq; 1349 dev->irq = irq;
1360 } else if (irq == 0) { 1350 } else if (irq == 0) {
1361 printk(" (no irq)"); 1351 printk(KERN_INFO " (no irq)");
1362 } else { 1352 } else {
1363#if 0 1353#if 0
1364 printk(" (probe returned multiple irqs--bad)"); 1354 printk(KERN_INFO " (probe returned multiple irqs--bad)");
1365#else 1355#else
1366 printk(" (irq probe not implemented)"); 1356 printk(KERN_INFO " (irq probe not implemented)");
1367#endif 1357#endif
1368 } 1358 }
1369 1359
@@ -1435,16 +1425,15 @@ static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1435 s->maxdata = 1; 1425 s->maxdata = 1;
1436 s->range_table = &range_digital; 1426 s->range_table = &range_digital;
1437 1427
1438 printk("\n"); 1428 printk(KERN_INFO "\n");
1439 1429
1440 return 0; 1430 return 0;
1441} 1431}
1442 1432
1443static void free_resources(struct comedi_device *dev) 1433static void free_resources(struct comedi_device *dev)
1444{ 1434{
1445 if (dev->irq) { 1435 if (dev->irq)
1446 free_irq(dev->irq, dev); 1436 free_irq(dev->irq, dev);
1447 }
1448 if (dev->iobase) 1437 if (dev->iobase)
1449 release_region(dev->iobase, DT2821_SIZE); 1438 release_region(dev->iobase, DT2821_SIZE);
1450 if (dev->private) { 1439 if (dev->private) {
@@ -1461,7 +1450,7 @@ static void free_resources(struct comedi_device *dev)
1461 1450
1462static int dt282x_detach(struct comedi_device *dev) 1451static int dt282x_detach(struct comedi_device *dev)
1463{ 1452{
1464 printk("comedi%d: dt282x: remove\n", dev->minor); 1453 printk(KERN_INFO "comedi%d: dt282x: remove\n", dev->minor);
1465 1454
1466 free_resources(dev); 1455 free_resources(dev);
1467 1456
@@ -1475,7 +1464,7 @@ static int dt282x_grab_dma(struct comedi_device *dev, int dma1, int dma2)
1475 devpriv->usedma = 0; 1464 devpriv->usedma = 0;
1476 1465
1477 if (!dma1 && !dma2) { 1466 if (!dma1 && !dma2) {
1478 printk(" (no dma)"); 1467 printk(KERN_ERR " (no dma)");
1479 return 0; 1468 return 0;
1480 } 1469 }
1481 1470
@@ -1503,11 +1492,11 @@ static int dt282x_grab_dma(struct comedi_device *dev, int dma1, int dma2)
1503 devpriv->dma[0].buf = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); 1492 devpriv->dma[0].buf = (void *)__get_free_page(GFP_KERNEL | GFP_DMA);
1504 devpriv->dma[1].buf = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); 1493 devpriv->dma[1].buf = (void *)__get_free_page(GFP_KERNEL | GFP_DMA);
1505 if (!devpriv->dma[0].buf || !devpriv->dma[1].buf) { 1494 if (!devpriv->dma[0].buf || !devpriv->dma[1].buf) {
1506 printk(" can't get DMA memory"); 1495 printk(KERN_ERR " can't get DMA memory");
1507 return -ENOMEM; 1496 return -ENOMEM;
1508 } 1497 }
1509 1498
1510 printk(" (dma=%d,%d)", dma1, dma2); 1499 printk(KERN_INFO " (dma=%d,%d)", dma1, dma2);
1511 1500
1512 devpriv->usedma = 1; 1501 devpriv->usedma = 1;
1513 1502
diff --git a/drivers/staging/comedi/drivers/dt3000.c b/drivers/staging/comedi/drivers/dt3000.c
index bbbef790c8f6..ca687890fc12 100644
--- a/drivers/staging/comedi/drivers/dt3000.c
+++ b/drivers/staging/comedi/drivers/dt3000.c
@@ -314,9 +314,8 @@ static int dt3k_send_cmd(struct comedi_device *dev, unsigned int cmd)
314 break; 314 break;
315 udelay(1); 315 udelay(1);
316 } 316 }
317 if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR) { 317 if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR)
318 return 0; 318 return 0;
319 }
320 319
321 printk("dt3k_send_cmd() timeout/error status=0x%04x\n", status); 320 printk("dt3k_send_cmd() timeout/error status=0x%04x\n", status);
322 321
@@ -359,9 +358,8 @@ static irqreturn_t dt3k_interrupt(int irq, void *d)
359 struct comedi_subdevice *s; 358 struct comedi_subdevice *s;
360 unsigned int status; 359 unsigned int status;
361 360
362 if (!dev->attached) { 361 if (!dev->attached)
363 return IRQ_NONE; 362 return IRQ_NONE;
364 }
365 363
366 s = dev->subdevices + 0; 364 s = dev->subdevices + 0;
367 status = readw(devpriv->io_addr + DPR_Intr_Flag); 365 status = readw(devpriv->io_addr + DPR_Intr_Flag);
@@ -374,9 +372,8 @@ static irqreturn_t dt3k_interrupt(int irq, void *d)
374 s->async->events |= COMEDI_CB_BLOCK; 372 s->async->events |= COMEDI_CB_BLOCK;
375 } 373 }
376 374
377 if (status & (DT3000_ADSWERR | DT3000_ADHWERR)) { 375 if (status & (DT3000_ADSWERR | DT3000_ADHWERR))
378 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; 376 s->async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
379 }
380 377
381 debug_n_ints++; 378 debug_n_ints++;
382 if (debug_n_ints >= 10) { 379 if (debug_n_ints >= 10) {
@@ -399,9 +396,8 @@ static void debug_intr_flags(unsigned int flags)
399 int i; 396 int i;
400 printk("dt3k: intr_flags:"); 397 printk("dt3k: intr_flags:");
401 for (i = 0; i < 8; i++) { 398 for (i = 0; i < 8; i++) {
402 if (flags & (1 << i)) { 399 if (flags & (1 << i))
403 printk(" %s", intr_flags[i]); 400 printk(" %s", intr_flags[i]);
404 }
405 } 401 }
406 printk("\n"); 402 printk("\n");
407} 403}
@@ -690,9 +686,8 @@ static int dt3k_ai_insn(struct comedi_device *dev, struct comedi_subdevice *s,
690 /* XXX docs don't explain how to select aref */ 686 /* XXX docs don't explain how to select aref */
691 aref = CR_AREF(insn->chanspec); 687 aref = CR_AREF(insn->chanspec);
692 688
693 for (i = 0; i < insn->n; i++) { 689 for (i = 0; i < insn->n; i++)
694 data[i] = dt3k_readsingle(dev, SUBS_AI, chan, gain); 690 data[i] = dt3k_readsingle(dev, SUBS_AI, chan, gain);
695 }
696 691
697 return i; 692 return i;
698} 693}
@@ -720,9 +715,8 @@ static int dt3k_ao_insn_read(struct comedi_device *dev,
720 unsigned int chan; 715 unsigned int chan;
721 716
722 chan = CR_CHAN(insn->chanspec); 717 chan = CR_CHAN(insn->chanspec);
723 for (i = 0; i < insn->n; i++) { 718 for (i = 0; i < insn->n; i++)
724 data[i] = devpriv->ao_readback[chan]; 719 data[i] = devpriv->ao_readback[chan];
725 }
726 720
727 return i; 721 return i;
728} 722}
@@ -911,9 +905,8 @@ static int dt3000_detach(struct comedi_device *dev)
911 905
912 if (devpriv) { 906 if (devpriv) {
913 if (devpriv->pci_dev) { 907 if (devpriv->pci_dev) {
914 if (devpriv->phys_addr) { 908 if (devpriv->phys_addr)
915 comedi_pci_disable(devpriv->pci_dev); 909 comedi_pci_disable(devpriv->pci_dev);
916 }
917 pci_dev_put(devpriv->pci_dev); 910 pci_dev_put(devpriv->pci_dev);
918 } 911 }
919 if (devpriv->io_addr) 912 if (devpriv->io_addr)
diff --git a/drivers/staging/comedi/drivers/icp_multi.h b/drivers/staging/comedi/drivers/icp_multi.h
index 8caadc630ed5..2bb96b1d21e7 100644
--- a/drivers/staging/comedi/drivers/icp_multi.h
+++ b/drivers/staging/comedi/drivers/icp_multi.h
@@ -73,14 +73,13 @@ static void pci_card_list_init(unsigned short pci_vendor, char display)
73 pcidev != NULL; 73 pcidev != NULL;
74 pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) { 74 pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) {
75 if (pcidev->vendor == pci_vendor) { 75 if (pcidev->vendor == pci_vendor) {
76 inova = kmalloc(sizeof(*inova), GFP_KERNEL); 76 inova = kzalloc(sizeof(*inova), GFP_KERNEL);
77 if (!inova) { 77 if (!inova) {
78 printk 78 printk
79 ("icp_multi: pci_card_list_init: allocation failed\n"); 79 ("icp_multi: pci_card_list_init: allocation failed\n");
80 pci_dev_put(pcidev); 80 pci_dev_put(pcidev);
81 break; 81 break;
82 } 82 }
83 memset(inova, 0, sizeof(*inova));
84 83
85 inova->pcidev = pci_dev_get(pcidev); 84 inova->pcidev = pci_dev_get(pcidev);
86 if (last) { 85 if (last) {
diff --git a/drivers/staging/comedi/drivers/me_daq.c b/drivers/staging/comedi/drivers/me_daq.c
index 80e192d2e77e..c8484aec657d 100644
--- a/drivers/staging/comedi/drivers/me_daq.c
+++ b/drivers/staging/comedi/drivers/me_daq.c
@@ -60,6 +60,7 @@ from http://www.comedi.org
60 60
61#define ME_DRIVER_NAME "me_daq" 61#define ME_DRIVER_NAME "me_daq"
62 62
63#define PCI_VENDOR_ID_MEILHAUS 0x1402
63#define ME2000_DEVICE_ID 0x2000 64#define ME2000_DEVICE_ID 0x2000
64#define ME2600_DEVICE_ID 0x2600 65#define ME2600_DEVICE_ID 0x2600
65 66
diff --git a/drivers/staging/comedi/drivers/mite.c b/drivers/staging/comedi/drivers/mite.c
index 188f58042746..99d9985c5b37 100644
--- a/drivers/staging/comedi/drivers/mite.c
+++ b/drivers/staging/comedi/drivers/mite.c
@@ -76,7 +76,7 @@ void mite_init(void)
76 for (pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL); 76 for (pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
77 pcidev != NULL; 77 pcidev != NULL;
78 pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) { 78 pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) {
79 if (pcidev->vendor == PCI_VENDOR_ID_NATINST) { 79 if (pcidev->vendor == PCI_VENDOR_ID_NI) {
80 unsigned i; 80 unsigned i;
81 81
82 mite = kzalloc(sizeof(*mite), GFP_KERNEL); 82 mite = kzalloc(sizeof(*mite), GFP_KERNEL);
diff --git a/drivers/staging/comedi/drivers/mite.h b/drivers/staging/comedi/drivers/mite.h
index 9d5049f8fa85..999551f54c2a 100644
--- a/drivers/staging/comedi/drivers/mite.h
+++ b/drivers/staging/comedi/drivers/mite.h
@@ -27,8 +27,6 @@
27#include <linux/pci.h> 27#include <linux/pci.h>
28#include "../comedidev.h" 28#include "../comedidev.h"
29 29
30#define PCI_VENDOR_ID_NATINST 0x1093
31
32/* #define DEBUG_MITE */ 30/* #define DEBUG_MITE */
33#define PCIMIO_COMPAT 31#define PCIMIO_COMPAT
34 32
diff --git a/drivers/staging/comedi/drivers/mpc624.c b/drivers/staging/comedi/drivers/mpc624.c
index 12e72c828157..9874ac3749c3 100644
--- a/drivers/staging/comedi/drivers/mpc624.c
+++ b/drivers/staging/comedi/drivers/mpc624.c
@@ -40,20 +40,20 @@ Status: working
40Configuration Options: 40Configuration Options:
41 [0] - I/O base address 41 [0] - I/O base address
42 [1] - convertion rate 42 [1] - convertion rate
43 Convertion rate RMS noise Effective Number Of Bits 43 Convertion rate RMS noise Effective Number Of Bits
44 0 3.52kHz 23uV 17 44 0 3.52kHz 23uV 17
45 1 1.76kHz 3.5uV 20 45 1 1.76kHz 3.5uV 20
46 2 880Hz 2uV 21.3 46 2 880Hz 2uV 21.3
47 3 440Hz 1.4uV 21.8 47 3 440Hz 1.4uV 21.8
48 4 220Hz 1uV 22.4 48 4 220Hz 1uV 22.4
49 5 110Hz 750uV 22.9 49 5 110Hz 750uV 22.9
50 6 55Hz 510nV 23.4 50 6 55Hz 510nV 23.4
51 7 27.5Hz 375nV 24 51 7 27.5Hz 375nV 24
52 8 13.75Hz 250nV 24.4 52 8 13.75Hz 250nV 24.4
53 9 6.875Hz 200nV 24.6 53 9 6.875Hz 200nV 24.6
54 [2] - voltage range 54 [2] - voltage range
55 0 -1.01V .. +1.01V 55 0 -1.01V .. +1.01V
56 1 -10.1V .. +10.1V 56 1 -10.1V .. +10.1V
57*/ 57*/
58 58
59#include "../comedidev.h" 59#include "../comedidev.h"
@@ -65,13 +65,13 @@ Configuration Options:
65#define MPC624_SIZE 16 65#define MPC624_SIZE 16
66 66
67/* Offsets of different ports */ 67/* Offsets of different ports */
68#define MPC624_MASTER_CONTROL 0 /* not used */ 68#define MPC624_MASTER_CONTROL 0 /* not used */
69#define MPC624_GNMUXCH 1 /* Gain, Mux, Channel of ADC */ 69#define MPC624_GNMUXCH 1 /* Gain, Mux, Channel of ADC */
70#define MPC624_ADC 2 /* read/write to/from ADC */ 70#define MPC624_ADC 2 /* read/write to/from ADC */
71#define MPC624_EE 3 /* read/write to/from serial EEPROM via I2C */ 71#define MPC624_EE 3 /* read/write to/from serial EEPROM via I2C */
72#define MPC624_LEDS 4 /* write to LEDs */ 72#define MPC624_LEDS 4 /* write to LEDs */
73#define MPC624_DIO 5 /* read/write to/from digital I/O ports */ 73#define MPC624_DIO 5 /* read/write to/from digital I/O ports */
74#define MPC624_IRQ_MASK 6 /* IRQ masking enable/disable */ 74#define MPC624_IRQ_MASK 6 /* IRQ masking enable/disable */
75 75
76/* Register bits' names */ 76/* Register bits' names */
77#define MPC624_ADBUSY (1<<5) 77#define MPC624_ADBUSY (1<<5)
@@ -109,24 +109,27 @@ Configuration Options:
109 * ^ - Effective Number Of Bits 109 * ^ - Effective Number Of Bits
110 */ 110 */
111 111
112#define MPC624_SPEED_3_52_kHz (MPC624_OSR4 | MPC624_OSR0) 112#define MPC624_SPEED_3_52_kHz (MPC624_OSR4 | MPC624_OSR0)
113#define MPC624_SPEED_1_76_kHz (MPC624_OSR4 | MPC624_OSR1) 113#define MPC624_SPEED_1_76_kHz (MPC624_OSR4 | MPC624_OSR1)
114#define MPC624_SPEED_880_Hz (MPC624_OSR4 | MPC624_OSR1 | MPC624_OSR0) 114#define MPC624_SPEED_880_Hz (MPC624_OSR4 | MPC624_OSR1 | MPC624_OSR0)
115#define MPC624_SPEED_440_Hz (MPC624_OSR4 | MPC624_OSR2) 115#define MPC624_SPEED_440_Hz (MPC624_OSR4 | MPC624_OSR2)
116#define MPC624_SPEED_220_Hz (MPC624_OSR4 | MPC624_OSR2 | MPC624_OSR0) 116#define MPC624_SPEED_220_Hz (MPC624_OSR4 | MPC624_OSR2 | MPC624_OSR0)
117#define MPC624_SPEED_110_Hz (MPC624_OSR4 | MPC624_OSR2 | MPC624_OSR1) 117#define MPC624_SPEED_110_Hz (MPC624_OSR4 | MPC624_OSR2 | MPC624_OSR1)
118#define MPC624_SPEED_55_Hz (MPC624_OSR4 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0) 118#define MPC624_SPEED_55_Hz \
119#define MPC624_SPEED_27_5_Hz (MPC624_OSR4 | MPC624_OSR3) 119 (MPC624_OSR4 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0)
120#define MPC624_SPEED_13_75_Hz (MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR0) 120#define MPC624_SPEED_27_5_Hz (MPC624_OSR4 | MPC624_OSR3)
121#define MPC624_SPEED_6_875_Hz (MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0) 121#define MPC624_SPEED_13_75_Hz (MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR0)
122/* ---------------------------------------------------------------------------- */ 122#define MPC624_SPEED_6_875_Hz \
123 (MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0)
124/* -------------------------------------------------------------------------- */
123struct skel_private { 125struct skel_private {
124 126
125 unsigned long int ulConvertionRate; /* set by mpc624_attach() from driver's parameters */ 127 /* set by mpc624_attach() from driver's parameters */
128 unsigned long int ulConvertionRate;
126}; 129};
127 130
128#define devpriv ((struct skel_private *)dev->private) 131#define devpriv ((struct skel_private *)dev->private)
129/* ---------------------------------------------------------------------------- */ 132/* -------------------------------------------------------------------------- */
130static const struct comedi_lrange range_mpc624_bipolar1 = { 133static const struct comedi_lrange range_mpc624_bipolar1 = {
131 1, 134 1,
132 { 135 {
@@ -145,11 +148,11 @@ static const struct comedi_lrange range_mpc624_bipolar10 = {
145 } 148 }
146}; 149};
147 150
148/* ---------------------------------------------------------------------------- */ 151/* -------------------------------------------------------------------------- */
149static int mpc624_attach(struct comedi_device *dev, 152static int mpc624_attach(struct comedi_device *dev,
150 struct comedi_devconfig *it); 153 struct comedi_devconfig *it);
151static int mpc624_detach(struct comedi_device *dev); 154static int mpc624_detach(struct comedi_device *dev);
152/* ---------------------------------------------------------------------------- */ 155/* -------------------------------------------------------------------------- */
153static struct comedi_driver driver_mpc624 = { 156static struct comedi_driver driver_mpc624 = {
154 .driver_name = "mpc624", 157 .driver_name = "mpc624",
155 .module = THIS_MODULE, 158 .module = THIS_MODULE,
@@ -157,20 +160,20 @@ static struct comedi_driver driver_mpc624 = {
157 .detach = mpc624_detach 160 .detach = mpc624_detach
158}; 161};
159 162
160/* ---------------------------------------------------------------------------- */ 163/* -------------------------------------------------------------------------- */
161static int mpc624_ai_rinsn(struct comedi_device *dev, 164static int mpc624_ai_rinsn(struct comedi_device *dev,
162 struct comedi_subdevice *s, struct comedi_insn *insn, 165 struct comedi_subdevice *s, struct comedi_insn *insn,
163 unsigned int *data); 166 unsigned int *data);
164/* ---------------------------------------------------------------------------- */ 167/* -------------------------------------------------------------------------- */
165static int mpc624_attach(struct comedi_device *dev, struct comedi_devconfig *it) 168static int mpc624_attach(struct comedi_device *dev, struct comedi_devconfig *it)
166{ 169{
167 struct comedi_subdevice *s; 170 struct comedi_subdevice *s;
168 unsigned long iobase; 171 unsigned long iobase;
169 172
170 iobase = it->options[0]; 173 iobase = it->options[0];
171 printk("comedi%d: mpc624 [0x%04lx, ", dev->minor, iobase); 174 printk(KERN_INFO "comedi%d: mpc624 [0x%04lx, ", dev->minor, iobase);
172 if (request_region(iobase, MPC624_SIZE, "mpc624") == NULL) { 175 if (request_region(iobase, MPC624_SIZE, "mpc624") == NULL) {
173 printk("I/O port(s) in use\n"); 176 printk(KERN_ERR "I/O port(s) in use\n");
174 return -EIO; 177 return -EIO;
175 } 178 }
176 179
@@ -184,47 +187,48 @@ static int mpc624_attach(struct comedi_device *dev, struct comedi_devconfig *it)
184 switch (it->options[1]) { 187 switch (it->options[1]) {
185 case 0: 188 case 0:
186 devpriv->ulConvertionRate = MPC624_SPEED_3_52_kHz; 189 devpriv->ulConvertionRate = MPC624_SPEED_3_52_kHz;
187 printk("3.52 kHz, "); 190 printk(KERN_INFO "3.52 kHz, ");
188 break; 191 break;
189 case 1: 192 case 1:
190 devpriv->ulConvertionRate = MPC624_SPEED_1_76_kHz; 193 devpriv->ulConvertionRate = MPC624_SPEED_1_76_kHz;
191 printk("1.76 kHz, "); 194 printk(KERN_INFO "1.76 kHz, ");
192 break; 195 break;
193 case 2: 196 case 2:
194 devpriv->ulConvertionRate = MPC624_SPEED_880_Hz; 197 devpriv->ulConvertionRate = MPC624_SPEED_880_Hz;
195 printk("880 Hz, "); 198 printk(KERN_INFO "880 Hz, ");
196 break; 199 break;
197 case 3: 200 case 3:
198 devpriv->ulConvertionRate = MPC624_SPEED_440_Hz; 201 devpriv->ulConvertionRate = MPC624_SPEED_440_Hz;
199 printk("440 Hz, "); 202 printk(KERN_INFO "440 Hz, ");
200 break; 203 break;
201 case 4: 204 case 4:
202 devpriv->ulConvertionRate = MPC624_SPEED_220_Hz; 205 devpriv->ulConvertionRate = MPC624_SPEED_220_Hz;
203 printk("220 Hz, "); 206 printk(KERN_INFO "220 Hz, ");
204 break; 207 break;
205 case 5: 208 case 5:
206 devpriv->ulConvertionRate = MPC624_SPEED_110_Hz; 209 devpriv->ulConvertionRate = MPC624_SPEED_110_Hz;
207 printk("110 Hz, "); 210 printk(KERN_INFO "110 Hz, ");
208 break; 211 break;
209 case 6: 212 case 6:
210 devpriv->ulConvertionRate = MPC624_SPEED_55_Hz; 213 devpriv->ulConvertionRate = MPC624_SPEED_55_Hz;
211 printk("55 Hz, "); 214 printk(KERN_INFO "55 Hz, ");
212 break; 215 break;
213 case 7: 216 case 7:
214 devpriv->ulConvertionRate = MPC624_SPEED_27_5_Hz; 217 devpriv->ulConvertionRate = MPC624_SPEED_27_5_Hz;
215 printk("27.5 Hz, "); 218 printk(KERN_INFO "27.5 Hz, ");
216 break; 219 break;
217 case 8: 220 case 8:
218 devpriv->ulConvertionRate = MPC624_SPEED_13_75_Hz; 221 devpriv->ulConvertionRate = MPC624_SPEED_13_75_Hz;
219 printk("13.75 Hz, "); 222 printk(KERN_INFO "13.75 Hz, ");
220 break; 223 break;
221 case 9: 224 case 9:
222 devpriv->ulConvertionRate = MPC624_SPEED_6_875_Hz; 225 devpriv->ulConvertionRate = MPC624_SPEED_6_875_Hz;
223 printk("6.875 Hz, "); 226 printk(KERN_INFO "6.875 Hz, ");
224 break; 227 break;
225 default: 228 default:
226 printk 229 printk
227 ("illegal convertion rate setting! Valid numbers are 0..9. Using 9 => 6.875 Hz, "); 230 (KERN_ERR "illegal convertion rate setting!"
231 " Valid numbers are 0..9. Using 9 => 6.875 Hz, ");
228 devpriv->ulConvertionRate = MPC624_SPEED_3_52_kHz; 232 devpriv->ulConvertionRate = MPC624_SPEED_3_52_kHz;
229 } 233 }
230 234
@@ -239,29 +243,29 @@ static int mpc624_attach(struct comedi_device *dev, struct comedi_devconfig *it)
239 switch (it->options[1]) { 243 switch (it->options[1]) {
240 default: 244 default:
241 s->maxdata = 0x3FFFFFFF; 245 s->maxdata = 0x3FFFFFFF;
242 printk("30 bit, "); 246 printk(KERN_INFO "30 bit, ");
243 } 247 }
244 248
245 switch (it->options[1]) { 249 switch (it->options[1]) {
246 case 0: 250 case 0:
247 s->range_table = &range_mpc624_bipolar1; 251 s->range_table = &range_mpc624_bipolar1;
248 printk("1.01V]: "); 252 printk(KERN_INFO "1.01V]: ");
249 break; 253 break;
250 default: 254 default:
251 s->range_table = &range_mpc624_bipolar10; 255 s->range_table = &range_mpc624_bipolar10;
252 printk("10.1V]: "); 256 printk(KERN_INFO "10.1V]: ");
253 } 257 }
254 s->len_chanlist = 1; 258 s->len_chanlist = 1;
255 s->insn_read = mpc624_ai_rinsn; 259 s->insn_read = mpc624_ai_rinsn;
256 260
257 printk("attached\n"); 261 printk(KERN_INFO "attached\n");
258 262
259 return 1; 263 return 1;
260} 264}
261 265
262static int mpc624_detach(struct comedi_device *dev) 266static int mpc624_detach(struct comedi_device *dev)
263{ 267{
264 printk("comedi%d: mpc624: remove\n", dev->minor); 268 printk(KERN_INFO "comedi%d: mpc624: remove\n", dev->minor);
265 269
266 if (dev->iobase) 270 if (dev->iobase)
267 release_region(dev->iobase, MPC624_SIZE); 271 release_region(dev->iobase, MPC624_SIZE);
@@ -280,11 +284,14 @@ static int mpc624_ai_rinsn(struct comedi_device *dev,
280 unsigned long int data_in, data_out; 284 unsigned long int data_in, data_out;
281 unsigned char ucPort; 285 unsigned char ucPort;
282 286
283 /* WARNING: We always write 0 to GNSWA bit, so the channel range is +-/10.1Vdc */ 287 /*
288 * WARNING:
289 * We always write 0 to GNSWA bit, so the channel range is +-/10.1Vdc
290 */
284 outb(insn->chanspec, dev->iobase + MPC624_GNMUXCH); 291 outb(insn->chanspec, dev->iobase + MPC624_GNMUXCH);
285/* printk("Channel %d: \n", insn->chanspec); */ 292/* printk("Channel %d:\n", insn->chanspec); */
286 if (!insn->n) { 293 if (!insn->n) {
287 printk("MPC624: Warning, no data to acquire\n"); 294 printk(KERN_INFO "MPC624: Warning, no data to acquire\n");
288 return 0; 295 return 0;
289 } 296 }
290 297
@@ -306,7 +313,7 @@ static int mpc624_ai_rinsn(struct comedi_device *dev,
306 break; 313 break;
307 } 314 }
308 if (i == TIMEOUT) { 315 if (i == TIMEOUT) {
309 printk("MPC624: timeout (%dms)\n", TIMEOUT); 316 printk(KERN_ERR "MPC624: timeout (%dms)\n", TIMEOUT);
310 data[n] = 0; 317 data[n] = 0;
311 return -ETIMEDOUT; 318 return -ETIMEDOUT;
312 } 319 }
@@ -319,7 +326,7 @@ static int mpc624_ai_rinsn(struct comedi_device *dev,
319 outb(0, dev->iobase + MPC624_ADC); 326 outb(0, dev->iobase + MPC624_ADC);
320 udelay(1); 327 udelay(1);
321 328
322 if (data_out & (1 << 31)) { /* the next bit is a 1 */ 329 if (data_out & (1 << 31)) { /* the next bit is a 1 */
323 /* Set the ADSDI line (send to MPC624) */ 330 /* Set the ADSDI line (send to MPC624) */
324 outb(MPC624_ADSDI, dev->iobase + MPC624_ADC); 331 outb(MPC624_ADSDI, dev->iobase + MPC624_ADC);
325 udelay(1); 332 udelay(1);
@@ -344,31 +351,47 @@ static int mpc624_ai_rinsn(struct comedi_device *dev,
344 data_out <<= 1; 351 data_out <<= 1;
345 } 352 }
346 353
347 /* Received 32-bit long value consist of: */ 354 /*
348 /* 31: EOC (End Of Transmission) bit - should be 0 */ 355 * Received 32-bit long value consist of:
349 /* 30: DMY (Dummy) bit - should be 0 */ 356 * 31: EOC -
350 /* 29: SIG (Sign) bit - 1 if the voltage is positive, 0 if negative */ 357 * (End Of Transmission) bit - should be 0
351 /* 28: MSB (Most Significant Bit) - the first bit of convertion result */ 358 * 30: DMY
352 /* .... */ 359 * (Dummy) bit - should be 0
353 /* 05: LSB (Least Significant Bit) - the last bit of convertion result */ 360 * 29: SIG
354 /* 04: sub-LSB - sub-LSBs are basically noise, but when */ 361 * (Sign) bit- 1 if the voltage is positive,
355 /* 03: sub-LSB averaged properly, they can increase convertion */ 362 * 0 if negative
356 /* 02: sub-LSB precision up to 29 bits; they can be discarded */ 363 * 28: MSB
357 /* 01: sub-LSB without loss of resolution. */ 364 * (Most Significant Bit) - the first bit of
358 /* 00: sub-LSB */ 365 * the conversion result
366 * ....
367 * 05: LSB
368 * (Least Significant Bit)- the last bit of the
369 * conversion result
370 * 04-00: sub-LSB
371 * - sub-LSBs are basically noise, but when
372 * averaged properly, they can increase conversion
373 * precision up to 29 bits; they can be discarded
374 * without loss of resolution.
375 */
359 376
360 if (data_in & MPC624_EOC_BIT) 377 if (data_in & MPC624_EOC_BIT)
361 printk("MPC624: EOC bit is set (data_in=%lu)!", 378 printk(KERN_INFO "MPC624:EOC bit is set (data_in=%lu)!",
362 data_in); 379 data_in);
363 if (data_in & MPC624_DMY_BIT) 380 if (data_in & MPC624_DMY_BIT)
364 printk("MPC624: DMY bit is set (data_in=%lu)!", 381 printk(KERN_INFO "MPC624:DMY bit is set (data_in=%lu)!",
365 data_in); 382 data_in);
366 if (data_in & MPC624_SGN_BIT) { /* check the sign bit *//* The voltage is positive */ 383 if (data_in & MPC624_SGN_BIT) { /* Volatge is positive */
367 data_in &= 0x3FFFFFFF; /* EOC and DMY should be 0, but we will mask them out just to be sure */ 384 /*
368 data[n] = data_in; /* comedi operates on unsigned numbers, so we don't clear the SGN bit */ 385 * comedi operates on unsigned numbers, so mask off EOC
369 /* SGN bit is still set! It's correct, since we're converting to unsigned. */ 386 * and DMY and don't clear the SGN bit
370 } else { /* The voltage is negative */ 387 */
371 /* data_in contains a number in 30-bit two's complement code and we must deal with it */ 388 data_in &= 0x3FFFFFFF;
389 data[n] = data_in;
390 } else { /* The voltage is negative */
391 /*
392 * data_in contains a number in 30-bit two's complement
393 * code and we must deal with it
394 */
372 data_in |= MPC624_SGN_BIT; 395 data_in |= MPC624_SGN_BIT;
373 data_in = ~data_in; 396 data_in = ~data_in;
374 data_in += 1; 397 data_in += 1;
diff --git a/drivers/staging/comedi/drivers/ni_6527.c b/drivers/staging/comedi/drivers/ni_6527.c
index 653b4c8700af..1fc76cc6a28e 100644
--- a/drivers/staging/comedi/drivers/ni_6527.c
+++ b/drivers/staging/comedi/drivers/ni_6527.c
@@ -107,10 +107,9 @@ static const struct ni6527_board ni6527_boards[] = {
107#define this_board ((const struct ni6527_board *)dev->board_ptr) 107#define this_board ((const struct ni6527_board *)dev->board_ptr)
108 108
109static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = { 109static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = {
110 { 110 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2b10)},
111 PCI_VENDOR_ID_NATINST, 0x2b10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 111 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2b20)},
112 PCI_VENDOR_ID_NATINST, 0x2b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 112 {0}
113 0}
114}; 113};
115 114
116MODULE_DEVICE_TABLE(pci, ni6527_pci_table); 115MODULE_DEVICE_TABLE(pci, ni6527_pci_table);
diff --git a/drivers/staging/comedi/drivers/ni_65xx.c b/drivers/staging/comedi/drivers/ni_65xx.c
index 9a4fffe5655f..d793f5a4ac98 100644
--- a/drivers/staging/comedi/drivers/ni_65xx.c
+++ b/drivers/staging/comedi/drivers/ni_65xx.c
@@ -266,30 +266,29 @@ static inline unsigned ni_65xx_total_num_ports(const struct ni_65xx_board
266} 266}
267 267
268static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table) = { 268static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table) = {
269 { 269 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1710)},
270 PCI_VENDOR_ID_NATINST, 0x1710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 270 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7085)},
271 PCI_VENDOR_ID_NATINST, 0x7085, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 271 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7086)},
272 PCI_VENDOR_ID_NATINST, 0x7086, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 272 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7087)},
273 PCI_VENDOR_ID_NATINST, 0x7087, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 273 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7088)},
274 PCI_VENDOR_ID_NATINST, 0x7088, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 274 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70a9)},
275 PCI_VENDOR_ID_NATINST, 0x70a9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 275 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70c3)},
276 PCI_VENDOR_ID_NATINST, 0x70c3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 276 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70c8)},
277 PCI_VENDOR_ID_NATINST, 0x70c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 277 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70c9)},
278 PCI_VENDOR_ID_NATINST, 0x70c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 278 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70cc)},
279 PCI_VENDOR_ID_NATINST, 0x70cc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 279 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70CD)},
280 PCI_VENDOR_ID_NATINST, 0x70CD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 280 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70d1)},
281 PCI_VENDOR_ID_NATINST, 0x70d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 281 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70d2)},
282 PCI_VENDOR_ID_NATINST, 0x70d2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 282 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70d3)},
283 PCI_VENDOR_ID_NATINST, 0x70d3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 283 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7124)},
284 PCI_VENDOR_ID_NATINST, 0x7124, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 284 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7125)},
285 PCI_VENDOR_ID_NATINST, 0x7125, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 285 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7126)},
286 PCI_VENDOR_ID_NATINST, 0x7126, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 286 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7127)},
287 PCI_VENDOR_ID_NATINST, 0x7127, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 287 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x7128)},
288 PCI_VENDOR_ID_NATINST, 0x7128, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 288 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x718b)},
289 PCI_VENDOR_ID_NATINST, 0x718b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 289 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x718c)},
290 PCI_VENDOR_ID_NATINST, 0x718c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 290 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x71c5)},
291 PCI_VENDOR_ID_NATINST, 0x71c5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 291 {0}
292 0}
293}; 292};
294 293
295MODULE_DEVICE_TABLE(pci, ni_65xx_pci_table); 294MODULE_DEVICE_TABLE(pci, ni_65xx_pci_table);
diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c
index 017630fb2424..6a6fae53ea0b 100644
--- a/drivers/staging/comedi/drivers/ni_660x.c
+++ b/drivers/staging/comedi/drivers/ni_660x.c
@@ -420,12 +420,11 @@ static const struct ni_660x_board ni_660x_boards[] = {
420#define NI_660X_MAX_NUM_COUNTERS (NI_660X_MAX_NUM_CHIPS * counters_per_chip) 420#define NI_660X_MAX_NUM_COUNTERS (NI_660X_MAX_NUM_CHIPS * counters_per_chip)
421 421
422static DEFINE_PCI_DEVICE_TABLE(ni_660x_pci_table) = { 422static DEFINE_PCI_DEVICE_TABLE(ni_660x_pci_table) = {
423 { 423 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2c60)},
424 PCI_VENDOR_ID_NATINST, 0x2c60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 424 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1310)},
425 PCI_VENDOR_ID_NATINST, 0x1310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 425 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1360)},
426 PCI_VENDOR_ID_NATINST, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 426 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2cc0)},
427 PCI_VENDOR_ID_NATINST, 0x2cc0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 427 {0}
428 0}
429}; 428};
430 429
431MODULE_DEVICE_TABLE(pci, ni_660x_pci_table); 430MODULE_DEVICE_TABLE(pci, ni_660x_pci_table);
diff --git a/drivers/staging/comedi/drivers/ni_670x.c b/drivers/staging/comedi/drivers/ni_670x.c
index 68221bfba5dd..44ae8368454d 100644
--- a/drivers/staging/comedi/drivers/ni_670x.c
+++ b/drivers/staging/comedi/drivers/ni_670x.c
@@ -47,8 +47,6 @@ Commands are not supported.
47 47
48#include "mite.h" 48#include "mite.h"
49 49
50#define PCI_VENDOR_ID_NATINST 0x1093
51
52#define AO_VALUE_OFFSET 0x00 50#define AO_VALUE_OFFSET 0x00
53#define AO_CHAN_OFFSET 0x0c 51#define AO_CHAN_OFFSET 0x0c
54#define AO_STATUS_OFFSET 0x10 52#define AO_STATUS_OFFSET 0x10
@@ -91,12 +89,9 @@ static const struct ni_670x_board ni_670x_boards[] = {
91}; 89};
92 90
93static DEFINE_PCI_DEVICE_TABLE(ni_670x_pci_table) = { 91static DEFINE_PCI_DEVICE_TABLE(ni_670x_pci_table) = {
94 { 92 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2c90)},
95 PCI_VENDOR_ID_NATINST, 0x2c90, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 93 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1920)},
96 PCI_VENDOR_ID_NATINST, 0x1920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 94 {0}
97 /*{ PCI_VENDOR_ID_NATINST, 0x0000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },*/
98 {
99 0}
100}; 95};
101 96
102MODULE_DEVICE_TABLE(pci, ni_670x_pci_table); 97MODULE_DEVICE_TABLE(pci, ni_670x_pci_table);
diff --git a/drivers/staging/comedi/drivers/ni_at_ao.c b/drivers/staging/comedi/drivers/ni_at_ao.c
index 3778565c1f6b..ce60224bb7bf 100644
--- a/drivers/staging/comedi/drivers/ni_at_ao.c
+++ b/drivers/staging/comedi/drivers/ni_at_ao.c
@@ -226,7 +226,7 @@ static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
226 iobase = 0x1c0; 226 iobase = 0x1c0;
227 ao_unipolar = it->options[3]; 227 ao_unipolar = it->options[3];
228 228
229 printk("comedi%d: ni_at_ao: 0x%04lx", dev->minor, iobase); 229 printk(KERN_INFO "comedi%d: ni_at_ao: 0x%04lx", dev->minor, iobase);
230 230
231 if (!request_region(iobase, ATAO_SIZE, "ni_at_ao")) { 231 if (!request_region(iobase, ATAO_SIZE, "ni_at_ao")) {
232 printk(" I/O port conflict\n"); 232 printk(" I/O port conflict\n");
@@ -283,14 +283,14 @@ static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
283 283
284 atao_reset(dev); 284 atao_reset(dev);
285 285
286 printk("\n"); 286 printk(KERN_INFO "\n");
287 287
288 return 0; 288 return 0;
289} 289}
290 290
291static int atao_detach(struct comedi_device *dev) 291static int atao_detach(struct comedi_device *dev)
292{ 292{
293 printk("comedi%d: atao: remove\n", dev->minor); 293 printk(KERN_INFO "comedi%d: atao: remove\n", dev->minor);
294 294
295 if (dev->iobase) 295 if (dev->iobase)
296 release_region(dev->iobase, ATAO_SIZE); 296 release_region(dev->iobase, ATAO_SIZE);
diff --git a/drivers/staging/comedi/drivers/ni_daq_700.c b/drivers/staging/comedi/drivers/ni_daq_700.c
index 06dd44ff1a95..6ec77bf88c63 100644
--- a/drivers/staging/comedi/drivers/ni_daq_700.c
+++ b/drivers/staging/comedi/drivers/ni_daq_700.c
@@ -145,6 +145,7 @@ void subdev_700_interrupt(struct comedi_device *dev, struct comedi_subdevice *s)
145 145
146 comedi_event(dev, s); 146 comedi_event(dev, s);
147} 147}
148EXPORT_SYMBOL(subdev_700_interrupt);
148 149
149static int subdev_700_cb(int dir, int port, int data, unsigned long arg) 150static int subdev_700_cb(int dir, int port, int data, unsigned long arg)
150{ 151{
@@ -326,6 +327,7 @@ int subdev_700_init(struct comedi_device *dev, struct comedi_subdevice *s,
326 327
327 return 0; 328 return 0;
328} 329}
330EXPORT_SYMBOL(subdev_700_init);
329 331
330int subdev_700_init_irq(struct comedi_device *dev, struct comedi_subdevice *s, 332int subdev_700_init_irq(struct comedi_device *dev, struct comedi_subdevice *s,
331 int (*cb) (int, int, int, unsigned long), 333 int (*cb) (int, int, int, unsigned long),
@@ -345,6 +347,7 @@ int subdev_700_init_irq(struct comedi_device *dev, struct comedi_subdevice *s,
345 347
346 return 0; 348 return 0;
347} 349}
350EXPORT_SYMBOL(subdev_700_init_irq);
348 351
349void subdev_700_cleanup(struct comedi_device *dev, struct comedi_subdevice *s) 352void subdev_700_cleanup(struct comedi_device *dev, struct comedi_subdevice *s)
350{ 353{
@@ -353,11 +356,7 @@ void subdev_700_cleanup(struct comedi_device *dev, struct comedi_subdevice *s)
353 356
354 kfree(s->private); 357 kfree(s->private);
355} 358}
356
357EXPORT_SYMBOL(subdev_700_init);
358EXPORT_SYMBOL(subdev_700_init_irq);
359EXPORT_SYMBOL(subdev_700_cleanup); 359EXPORT_SYMBOL(subdev_700_cleanup);
360EXPORT_SYMBOL(subdev_700_interrupt);
361 360
362static int dio700_attach(struct comedi_device *dev, struct comedi_devconfig *it) 361static int dio700_attach(struct comedi_device *dev, struct comedi_devconfig *it)
363{ 362{
@@ -709,8 +708,12 @@ static struct pcmcia_device_id dio700_cs_ids[] = {
709 PCMCIA_DEVICE_NULL 708 PCMCIA_DEVICE_NULL
710}; 709};
711 710
712MODULE_LICENSE("GPL"); 711
713MODULE_DEVICE_TABLE(pcmcia, dio700_cs_ids); 712MODULE_DEVICE_TABLE(pcmcia, dio700_cs_ids);
713MODULE_AUTHOR("Fred Brooks <nsaspook@nsaspook.com>");
714MODULE_DESCRIPTION("Comedi driver for National Instruments "
715 "PCMCIA DAQCard-700 DIO");
716MODULE_LICENSE("GPL");
714 717
715struct pcmcia_driver dio700_cs_driver = { 718struct pcmcia_driver dio700_cs_driver = {
716 .probe = dio700_cs_attach, 719 .probe = dio700_cs_attach,
diff --git a/drivers/staging/comedi/drivers/ni_daq_dio24.c b/drivers/staging/comedi/drivers/ni_daq_dio24.c
index 7bfe08b01fe9..e4865b1c2310 100644
--- a/drivers/staging/comedi/drivers/ni_daq_dio24.c
+++ b/drivers/staging/comedi/drivers/ni_daq_dio24.c
@@ -461,6 +461,10 @@ static struct pcmcia_device_id dio24_cs_ids[] = {
461}; 461};
462 462
463MODULE_DEVICE_TABLE(pcmcia, dio24_cs_ids); 463MODULE_DEVICE_TABLE(pcmcia, dio24_cs_ids);
464MODULE_AUTHOR("Daniel Vecino Castel <dvecino@able.es>");
465MODULE_DESCRIPTION("Comedi driver for National Instruments "
466 "PCMCIA DAQ-Card DIO-24");
467MODULE_LICENSE("GPL");
464 468
465struct pcmcia_driver dio24_cs_driver = { 469struct pcmcia_driver dio24_cs_driver = {
466 .probe = dio24_cs_attach, 470 .probe = dio24_cs_attach,
diff --git a/drivers/staging/comedi/drivers/ni_labpc.c b/drivers/staging/comedi/drivers/ni_labpc.c
index 558e525fed37..67c8a538802c 100644
--- a/drivers/staging/comedi/drivers/ni_labpc.c
+++ b/drivers/staging/comedi/drivers/ni_labpc.c
@@ -499,9 +499,8 @@ static struct comedi_driver driver_labpc = {
499 499
500#ifdef CONFIG_COMEDI_PCI 500#ifdef CONFIG_COMEDI_PCI
501static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = { 501static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
502 { 502 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
503 PCI_VENDOR_ID_NATINST, 0x161, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 503 {0}
504 0}
505}; 504};
506 505
507MODULE_DEVICE_TABLE(pci, labpc_pci_table); 506MODULE_DEVICE_TABLE(pci, labpc_pci_table);
@@ -536,7 +535,7 @@ int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
536 printk("\n"); 535 printk("\n");
537 536
538 if (iobase == 0) { 537 if (iobase == 0) {
539 printk("io base address is zero!\n"); 538 printk(KERN_ERR "io base address is zero!\n");
540 return -EINVAL; 539 return -EINVAL;
541 } 540 }
542 /* request io regions for isa boards */ 541 /* request io regions for isa boards */
diff --git a/drivers/staging/comedi/drivers/ni_labpc_cs.c b/drivers/staging/comedi/drivers/ni_labpc_cs.c
index fd8d3e9520a0..163245ebb311 100644
--- a/drivers/staging/comedi/drivers/ni_labpc_cs.c
+++ b/drivers/staging/comedi/drivers/ni_labpc_cs.c
@@ -437,6 +437,9 @@ static struct pcmcia_device_id labpc_cs_ids[] = {
437}; 437};
438 438
439MODULE_DEVICE_TABLE(pcmcia, labpc_cs_ids); 439MODULE_DEVICE_TABLE(pcmcia, labpc_cs_ids);
440MODULE_AUTHOR("Frank Mori Hess <fmhess@users.sourceforge.net>");
441MODULE_DESCRIPTION("Comedi driver for National Instruments Lab-PC");
442MODULE_LICENSE("GPL");
440 443
441struct pcmcia_driver labpc_cs_driver = { 444struct pcmcia_driver labpc_cs_driver = {
442 .probe = labpc_cs_attach, 445 .probe = labpc_cs_attach,
@@ -478,6 +481,5 @@ void __exit labpc_exit_module(void)
478 comedi_driver_unregister(&driver_labpc_cs); 481 comedi_driver_unregister(&driver_labpc_cs);
479} 482}
480 483
481MODULE_LICENSE("GPL");
482module_init(labpc_init_module); 484module_init(labpc_init_module);
483module_exit(labpc_exit_module); 485module_exit(labpc_exit_module);
diff --git a/drivers/staging/comedi/drivers/ni_mio_cs.c b/drivers/staging/comedi/drivers/ni_mio_cs.c
index 1e8aebae8ae8..cedb02d40f95 100644
--- a/drivers/staging/comedi/drivers/ni_mio_cs.c
+++ b/drivers/staging/comedi/drivers/ni_mio_cs.c
@@ -428,8 +428,6 @@ static int ni_getboardtype(struct comedi_device *dev,
428 428
429#ifdef MODULE 429#ifdef MODULE
430 430
431MODULE_LICENSE("GPL");
432
433static struct pcmcia_device_id ni_mio_cs_ids[] = { 431static struct pcmcia_device_id ni_mio_cs_ids[] = {
434 PCMCIA_DEVICE_MANF_CARD(0x010b, 0x010d), /* DAQCard-ai-16xe-50 */ 432 PCMCIA_DEVICE_MANF_CARD(0x010b, 0x010d), /* DAQCard-ai-16xe-50 */
435 PCMCIA_DEVICE_MANF_CARD(0x010b, 0x010c), /* DAQCard-ai-16e-4 */ 433 PCMCIA_DEVICE_MANF_CARD(0x010b, 0x010c), /* DAQCard-ai-16e-4 */
@@ -440,6 +438,9 @@ static struct pcmcia_device_id ni_mio_cs_ids[] = {
440}; 438};
441 439
442MODULE_DEVICE_TABLE(pcmcia, ni_mio_cs_ids); 440MODULE_DEVICE_TABLE(pcmcia, ni_mio_cs_ids);
441MODULE_AUTHOR("David A. Schleef <ds@schleef.org>");
442MODULE_DESCRIPTION("Comedi driver for National Instruments DAQCard E series");
443MODULE_LICENSE("GPL");
443 444
444struct pcmcia_driver ni_mio_cs_driver = { 445struct pcmcia_driver ni_mio_cs_driver = {
445 .probe = &cs_attach, 446 .probe = &cs_attach,
diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c
index 9d337516409d..b126638d33b2 100644
--- a/drivers/staging/comedi/drivers/ni_pcidio.c
+++ b/drivers/staging/comedi/drivers/ni_pcidio.c
@@ -83,8 +83,6 @@ comedi_nonfree_firmware tarball available from http://www.comedi.org
83#define DPRINTK(format, args...) 83#define DPRINTK(format, args...)
84#endif 84#endif
85 85
86#define PCI_VENDOR_ID_NATINST 0x1093
87
88#define PCI_DIO_SIZE 4096 86#define PCI_DIO_SIZE 4096
89#define PCI_MITE_SIZE 4096 87#define PCI_MITE_SIZE 4096
90 88
@@ -379,18 +377,17 @@ static const struct nidio_board nidio_boards[] = {
379#define this_board ((const struct nidio_board *)dev->board_ptr) 377#define this_board ((const struct nidio_board *)dev->board_ptr)
380 378
381static DEFINE_PCI_DEVICE_TABLE(ni_pcidio_pci_table) = { 379static DEFINE_PCI_DEVICE_TABLE(ni_pcidio_pci_table) = {
382 { 380 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1150)},
383 PCI_VENDOR_ID_NATINST, 0x1150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 381 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1320)},
384 PCI_VENDOR_ID_NATINST, 0x1320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 382 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x12b0)},
385 PCI_VENDOR_ID_NATINST, 0x12b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 383 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x0160)},
386 PCI_VENDOR_ID_NATINST, 0x0160, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 384 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1630)},
387 PCI_VENDOR_ID_NATINST, 0x1630, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 385 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x13c0)},
388 PCI_VENDOR_ID_NATINST, 0x13c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 386 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x0400)},
389 PCI_VENDOR_ID_NATINST, 0x0400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 387 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1250)},
390 PCI_VENDOR_ID_NATINST, 0x1250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 388 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x17d0)},
391 PCI_VENDOR_ID_NATINST, 0x17d0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 389 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1800)},
392 PCI_VENDOR_ID_NATINST, 0x1800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 390 {0}
393 0}
394}; 391};
395 392
396MODULE_DEVICE_TABLE(pci, ni_pcidio_pci_table); 393MODULE_DEVICE_TABLE(pci, ni_pcidio_pci_table);
diff --git a/drivers/staging/comedi/drivers/ni_pcimio.c b/drivers/staging/comedi/drivers/ni_pcimio.c
index 24c8b8ed5b4c..577fda84190d 100644
--- a/drivers/staging/comedi/drivers/ni_pcimio.c
+++ b/drivers/staging/comedi/drivers/ni_pcimio.c
@@ -130,60 +130,59 @@ Bugs:
130 130
131/* The following two tables must be in the same order */ 131/* The following two tables must be in the same order */
132static DEFINE_PCI_DEVICE_TABLE(ni_pci_table) = { 132static DEFINE_PCI_DEVICE_TABLE(ni_pci_table) = {
133 { 133 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x0162)},
134 PCI_VENDOR_ID_NATINST, 0x0162, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 134 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1170)},
135 PCI_VENDOR_ID_NATINST, 0x1170, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 135 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1180)},
136 PCI_VENDOR_ID_NATINST, 0x1180, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 136 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1190)},
137 PCI_VENDOR_ID_NATINST, 0x1190, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 137 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x11b0)},
138 PCI_VENDOR_ID_NATINST, 0x11b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 138 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x11c0)},
139 PCI_VENDOR_ID_NATINST, 0x11c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 139 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x11d0)},
140 PCI_VENDOR_ID_NATINST, 0x11d0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 140 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1270)},
141 PCI_VENDOR_ID_NATINST, 0x1270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 141 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1330)},
142 PCI_VENDOR_ID_NATINST, 0x1330, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 142 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1340)},
143 PCI_VENDOR_ID_NATINST, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 143 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1350)},
144 PCI_VENDOR_ID_NATINST, 0x1350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 144 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x14e0)},
145 PCI_VENDOR_ID_NATINST, 0x14e0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 145 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x14f0)},
146 PCI_VENDOR_ID_NATINST, 0x14f0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 146 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1580)},
147 PCI_VENDOR_ID_NATINST, 0x1580, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 147 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x15b0)},
148 PCI_VENDOR_ID_NATINST, 0x15b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 148 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1880)},
149 PCI_VENDOR_ID_NATINST, 0x1880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 149 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x1870)},
150 PCI_VENDOR_ID_NATINST, 0x1870, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 150 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x18b0)},
151 PCI_VENDOR_ID_NATINST, 0x18b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 151 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x18c0)},
152 PCI_VENDOR_ID_NATINST, 0x18c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 152 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2410)},
153 PCI_VENDOR_ID_NATINST, 0x2410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 153 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2420)},
154 PCI_VENDOR_ID_NATINST, 0x2420, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 154 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2430)},
155 PCI_VENDOR_ID_NATINST, 0x2430, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 155 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2890)},
156 PCI_VENDOR_ID_NATINST, 0x2890, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 156 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x28c0)},
157 PCI_VENDOR_ID_NATINST, 0x28c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 157 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2a60)},
158 PCI_VENDOR_ID_NATINST, 0x2a60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 158 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2a70)},
159 PCI_VENDOR_ID_NATINST, 0x2a70, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 159 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2a80)},
160 PCI_VENDOR_ID_NATINST, 0x2a80, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 160 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2ab0)},
161 PCI_VENDOR_ID_NATINST, 0x2ab0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 161 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2b80)},
162 PCI_VENDOR_ID_NATINST, 0x2b80, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 162 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2b90)},
163 PCI_VENDOR_ID_NATINST, 0x2b90, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 163 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2c80)},
164 PCI_VENDOR_ID_NATINST, 0x2c80, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 164 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x2ca0)},
165 PCI_VENDOR_ID_NATINST, 0x2ca0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 165 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70aa)},
166 PCI_VENDOR_ID_NATINST, 0x70aa, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 166 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70ab)},
167 PCI_VENDOR_ID_NATINST, 0x70ab, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 167 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70ac)},
168 PCI_VENDOR_ID_NATINST, 0x70ac, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 168 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70af)},
169 PCI_VENDOR_ID_NATINST, 0x70af, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 169 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70b0)},
170 PCI_VENDOR_ID_NATINST, 0x70b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 170 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70b4)},
171 PCI_VENDOR_ID_NATINST, 0x70b4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 171 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70b6)},
172 PCI_VENDOR_ID_NATINST, 0x70b6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 172 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70b7)},
173 PCI_VENDOR_ID_NATINST, 0x70b7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 173 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70b8)},
174 PCI_VENDOR_ID_NATINST, 0x70b8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 174 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70bc)},
175 PCI_VENDOR_ID_NATINST, 0x70bc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 175 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70bd)},
176 PCI_VENDOR_ID_NATINST, 0x70bd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 176 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70bf)},
177 PCI_VENDOR_ID_NATINST, 0x70bf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 177 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70c0)},
178 PCI_VENDOR_ID_NATINST, 0x70c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 178 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x70f2)},
179 PCI_VENDOR_ID_NATINST, 0x70f2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 179 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x710d)},
180 PCI_VENDOR_ID_NATINST, 0x710d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 180 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x716c)},
181 PCI_VENDOR_ID_NATINST, 0x716c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 181 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x716d)},
182 PCI_VENDOR_ID_NATINST, 0x716d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 182 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x717f)},
183 PCI_VENDOR_ID_NATINST, 0x717f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 183 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x71bc)},
184 PCI_VENDOR_ID_NATINST, 0x71bc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 184 {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x717d)},
185 PCI_VENDOR_ID_NATINST, 0x717d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 185 {0}
186 0}
187}; 186};
188 187
189MODULE_DEVICE_TABLE(pci, ni_pci_table); 188MODULE_DEVICE_TABLE(pci, ni_pci_table);
diff --git a/drivers/staging/comedi/drivers/plx9080.h b/drivers/staging/comedi/drivers/plx9080.h
index 53bcdb7b5c5a..485d63f99293 100644
--- a/drivers/staging/comedi/drivers/plx9080.h
+++ b/drivers/staging/comedi/drivers/plx9080.h
@@ -380,9 +380,9 @@ enum bigend_bits {
380#define MBX_ADDR_SPACE_360 0x80 /* wanXL100s/200/400 */ 380#define MBX_ADDR_SPACE_360 0x80 /* wanXL100s/200/400 */
381#define MBX_ADDR_MASK_360 (MBX_ADDR_SPACE_360-1) 381#define MBX_ADDR_MASK_360 (MBX_ADDR_SPACE_360-1)
382 382
383static inline int plx9080_abort_dma(void *iobase, unsigned int channel) 383static inline int plx9080_abort_dma(void __iomem *iobase, unsigned int channel)
384{ 384{
385 void *dma_cs_addr; 385 void __iomem *dma_cs_addr;
386 uint8_t dma_status; 386 uint8_t dma_status;
387 const int timeout = 10000; 387 const int timeout = 10000;
388 unsigned int i; 388 unsigned int i;
diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
index 8b274b708259..a91db6c42028 100644
--- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c
+++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
@@ -56,6 +56,8 @@ Devices: [Quatech] DAQP-208 (daqp), DAQP-308
56#include <pcmcia/cisreg.h> 56#include <pcmcia/cisreg.h>
57#include <pcmcia/ds.h> 57#include <pcmcia/ds.h>
58 58
59#include <linux/completion.h>
60
59/* Maximum number of separate DAQP devices we'll allow */ 61/* Maximum number of separate DAQP devices we'll allow */
60#define MAX_DEV 4 62#define MAX_DEV 4
61 63
@@ -67,7 +69,7 @@ struct local_info_t {
67 69
68 enum { semaphore, buffer } interrupt_mode; 70 enum { semaphore, buffer } interrupt_mode;
69 71
70 struct semaphore eos; 72 struct completion eos;
71 73
72 struct comedi_device *dev; 74 struct comedi_device *dev;
73 struct comedi_subdevice *s; 75 struct comedi_subdevice *s;
@@ -238,14 +240,13 @@ static int daqp_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
238/* Interrupt handler 240/* Interrupt handler
239 * 241 *
240 * Operates in one of two modes. If local->interrupt_mode is 242 * Operates in one of two modes. If local->interrupt_mode is
241 * 'semaphore', just signal the local->eos semaphore and return 243 * 'semaphore', just signal the local->eos completion and return
242 * (one-shot mode). Otherwise (continuous mode), read data in from 244 * (one-shot mode). Otherwise (continuous mode), read data in from
243 * the card, transfer it to the buffer provided by the higher-level 245 * the card, transfer it to the buffer provided by the higher-level
244 * comedi kernel module, and signal various comedi callback routines, 246 * comedi kernel module, and signal various comedi callback routines,
245 * which run pretty quick. 247 * which run pretty quick.
246 */ 248 */
247 249static enum irqreturn daqp_interrupt(int irq, void *dev_id)
248static void daqp_interrupt(int irq, void *dev_id)
249{ 250{
250 struct local_info_t *local = (struct local_info_t *)dev_id; 251 struct local_info_t *local = (struct local_info_t *)dev_id;
251 struct comedi_device *dev; 252 struct comedi_device *dev;
@@ -256,39 +257,39 @@ static void daqp_interrupt(int irq, void *dev_id)
256 if (local == NULL) { 257 if (local == NULL) {
257 printk(KERN_WARNING 258 printk(KERN_WARNING
258 "daqp_interrupt(): irq %d for unknown device.\n", irq); 259 "daqp_interrupt(): irq %d for unknown device.\n", irq);
259 return; 260 return IRQ_NONE;
260 } 261 }
261 262
262 dev = local->dev; 263 dev = local->dev;
263 if (dev == NULL) { 264 if (dev == NULL) {
264 printk(KERN_WARNING "daqp_interrupt(): NULL comedi_device.\n"); 265 printk(KERN_WARNING "daqp_interrupt(): NULL comedi_device.\n");
265 return; 266 return IRQ_NONE;
266 } 267 }
267 268
268 if (!dev->attached) { 269 if (!dev->attached) {
269 printk(KERN_WARNING 270 printk(KERN_WARNING
270 "daqp_interrupt(): struct comedi_device not yet attached.\n"); 271 "daqp_interrupt(): struct comedi_device not yet attached.\n");
271 return; 272 return IRQ_NONE;
272 } 273 }
273 274
274 s = local->s; 275 s = local->s;
275 if (s == NULL) { 276 if (s == NULL) {
276 printk(KERN_WARNING 277 printk(KERN_WARNING
277 "daqp_interrupt(): NULL comedi_subdevice.\n"); 278 "daqp_interrupt(): NULL comedi_subdevice.\n");
278 return; 279 return IRQ_NONE;
279 } 280 }
280 281
281 if ((struct local_info_t *)s->private != local) { 282 if ((struct local_info_t *)s->private != local) {
282 printk(KERN_WARNING 283 printk(KERN_WARNING
283 "daqp_interrupt(): invalid comedi_subdevice.\n"); 284 "daqp_interrupt(): invalid comedi_subdevice.\n");
284 return; 285 return IRQ_NONE;
285 } 286 }
286 287
287 switch (local->interrupt_mode) { 288 switch (local->interrupt_mode) {
288 289
289 case semaphore: 290 case semaphore:
290 291
291 up(&local->eos); 292 complete(&local->eos);
292 break; 293 break;
293 294
294 case buffer: 295 case buffer:
@@ -340,6 +341,7 @@ static void daqp_interrupt(int irq, void *dev_id)
340 341
341 comedi_event(dev, s); 342 comedi_event(dev, s);
342 } 343 }
344 return IRQ_HANDLED;
343} 345}
344 346
345/* One-shot analog data acquisition routine */ 347/* One-shot analog data acquisition routine */
@@ -401,8 +403,7 @@ static int daqp_ai_insn_read(struct comedi_device *dev,
401 return -1; 403 return -1;
402 } 404 }
403 405
404 /* Make sure semaphore is blocked */ 406 init_completion(&local->eos);
405 sema_init(&local->eos, 0);
406 local->interrupt_mode = semaphore; 407 local->interrupt_mode = semaphore;
407 local->dev = dev; 408 local->dev = dev;
408 local->s = s; 409 local->s = s;
@@ -413,9 +414,9 @@ static int daqp_ai_insn_read(struct comedi_device *dev,
413 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA, 414 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
414 dev->iobase + DAQP_COMMAND); 415 dev->iobase + DAQP_COMMAND);
415 416
416 /* Wait for interrupt service routine to unblock semaphore */ 417 /* Wait for interrupt service routine to unblock completion */
417 /* Maybe could use a timeout here, but it's interruptible */ 418 /* Maybe could use a timeout here, but it's interruptible */
418 if (down_interruptible(&local->eos)) 419 if (wait_for_completion_interruptible(&local->eos))
419 return -EINTR; 420 return -EINTR;
420 421
421 data[i] = inb(dev->iobase + DAQP_FIFO); 422 data[i] = inb(dev->iobase + DAQP_FIFO);
@@ -580,7 +581,7 @@ static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
580{ 581{
581 struct local_info_t *local = (struct local_info_t *)s->private; 582 struct local_info_t *local = (struct local_info_t *)s->private;
582 struct comedi_cmd *cmd = &s->async->cmd; 583 struct comedi_cmd *cmd = &s->async->cmd;
583 int counter = 100; 584 int counter;
584 int scanlist_start_on_every_entry; 585 int scanlist_start_on_every_entry;
585 int threshold; 586 int threshold;
586 587
@@ -613,14 +614,14 @@ static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
613 */ 614 */
614 615
615 if (cmd->convert_src == TRIG_TIMER) { 616 if (cmd->convert_src == TRIG_TIMER) {
616 int counter = daqp_ns_to_timer(&cmd->convert_arg, 617 counter = daqp_ns_to_timer(&cmd->convert_arg,
617 cmd->flags & TRIG_ROUND_MASK); 618 cmd->flags & TRIG_ROUND_MASK);
618 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW); 619 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
619 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID); 620 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
620 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH); 621 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH);
621 scanlist_start_on_every_entry = 1; 622 scanlist_start_on_every_entry = 1;
622 } else { 623 } else {
623 int counter = daqp_ns_to_timer(&cmd->scan_begin_arg, 624 counter = daqp_ns_to_timer(&cmd->scan_begin_arg,
624 cmd->flags & TRIG_ROUND_MASK); 625 cmd->flags & TRIG_ROUND_MASK);
625 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW); 626 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
626 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID); 627 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
@@ -755,7 +756,7 @@ static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
755 /* Reset any pending interrupts (my card has a tendancy to require 756 /* Reset any pending interrupts (my card has a tendancy to require
756 * require multiple reads on the status register to achieve this) 757 * require multiple reads on the status register to achieve this)
757 */ 758 */
758 759 counter = 100;
759 while (--counter 760 while (--counter
760 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS)) ; 761 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS)) ;
761 if (!counter) { 762 if (!counter) {
@@ -1215,8 +1216,11 @@ static struct pcmcia_device_id daqp_cs_id_table[] = {
1215}; 1216};
1216 1217
1217MODULE_DEVICE_TABLE(pcmcia, daqp_cs_id_table); 1218MODULE_DEVICE_TABLE(pcmcia, daqp_cs_id_table);
1219MODULE_AUTHOR("Brent Baccala <baccala@freesoft.org>");
1220MODULE_DESCRIPTION("Comedi driver for Quatech DAQP PCMCIA data capture cards");
1221MODULE_LICENSE("GPL");
1218 1222
1219struct pcmcia_driver daqp_cs_driver = { 1223static struct pcmcia_driver daqp_cs_driver = {
1220 .probe = daqp_cs_attach, 1224 .probe = daqp_cs_attach,
1221 .remove = daqp_cs_detach, 1225 .remove = daqp_cs_detach,
1222 .suspend = daqp_cs_suspend, 1226 .suspend = daqp_cs_suspend,
diff --git a/drivers/staging/comedi/drivers/skel.c b/drivers/staging/comedi/drivers/skel.c
index aba57d93dd3d..490753b3d904 100644
--- a/drivers/staging/comedi/drivers/skel.c
+++ b/drivers/staging/comedi/drivers/skel.c
@@ -131,7 +131,8 @@ MODULE_DEVICE_TABLE(pci, skel_pci_table);
131 131
132/* this structure is for data unique to this hardware driver. If 132/* this structure is for data unique to this hardware driver. If
133 several hardware drivers keep similar information in this structure, 133 several hardware drivers keep similar information in this structure,
134 feel free to suggest moving the variable to the struct comedi_device struct. */ 134 feel free to suggest moving the variable to the struct comedi_device struct.
135 */
135struct skel_private { 136struct skel_private {
136 137
137 int data; 138 int data;
@@ -211,7 +212,7 @@ static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it)
211{ 212{
212 struct comedi_subdevice *s; 213 struct comedi_subdevice *s;
213 214
214 printk("comedi%d: skel: ", dev->minor); 215 pr_info("comedi%d: skel: ", dev->minor);
215 216
216/* 217/*
217 * If you can probe the device to determine what device in a series 218 * If you can probe the device to determine what device in a series
@@ -282,7 +283,7 @@ static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it)
282 s->type = COMEDI_SUBD_UNUSED; 283 s->type = COMEDI_SUBD_UNUSED;
283 } 284 }
284 285
285 printk("attached\n"); 286 pr_info("attached\n");
286 287
287 return 0; 288 return 0;
288} 289}
@@ -297,7 +298,7 @@ static int skel_attach(struct comedi_device *dev, struct comedi_devconfig *it)
297 */ 298 */
298static int skel_detach(struct comedi_device *dev) 299static int skel_detach(struct comedi_device *dev)
299{ 300{
300 printk("comedi%d: skel: remove\n", dev->minor); 301 pr_info("comedi%d: skel: remove\n", dev->minor);
301 302
302 return 0; 303 return 0;
303} 304}
@@ -336,7 +337,7 @@ static int skel_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
336 if (i == TIMEOUT) { 337 if (i == TIMEOUT) {
337 /* printk() should be used instead of printk() 338 /* printk() should be used instead of printk()
338 * whenever the code can be called from real-time. */ 339 * whenever the code can be called from real-time. */
339 printk("timeout\n"); 340 pr_info("timeout\n");
340 return -ETIMEDOUT; 341 return -ETIMEDOUT;
341 } 342 }
342 343
@@ -397,7 +398,8 @@ static int skel_ai_cmdtest(struct comedi_device *dev,
397 if (err) 398 if (err)
398 return 1; 399 return 1;
399 400
400 /* step 2: make sure trigger sources are unique and mutually compatible */ 401 /* step 2: make sure trigger sources are unique and mutually compatible
402 */
401 403
402 /* note that mutual compatibility is not an issue here */ 404 /* note that mutual compatibility is not an issue here */
403 if (cmd->scan_begin_src != TRIG_TIMER && 405 if (cmd->scan_begin_src != TRIG_TIMER &&
@@ -529,7 +531,7 @@ static int skel_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
529 int i; 531 int i;
530 int chan = CR_CHAN(insn->chanspec); 532 int chan = CR_CHAN(insn->chanspec);
531 533
532 printk("skel_ao_winsn\n"); 534 pr_info("skel_ao_winsn\n");
533 /* Writing a list of values to an AO channel is probably not 535 /* Writing a list of values to an AO channel is probably not
534 * very useful, but that's how the interface is defined. */ 536 * very useful, but that's how the interface is defined. */
535 for (i = 0; i < insn->n; i++) { 537 for (i = 0; i < insn->n; i++) {
@@ -623,6 +625,7 @@ static int skel_dio_insn_config(struct comedi_device *dev,
623 * as necessary. 625 * as necessary.
624 */ 626 */
625COMEDI_INITCLEANUP(driver_skel); 627COMEDI_INITCLEANUP(driver_skel);
626/* If you are writing a PCI driver you should use COMEDI_PCI_INITCLEANUP instead. 628/* If you are writing a PCI driver you should use COMEDI_PCI_INITCLEANUP
627*/ 629 * instead.
630 */
628/* COMEDI_PCI_INITCLEANUP(driver_skel, skel_pci_table) */ 631/* COMEDI_PCI_INITCLEANUP(driver_skel, skel_pci_table) */
diff --git a/drivers/staging/comedi/drivers/ssv_dnp.c b/drivers/staging/comedi/drivers/ssv_dnp.c
index 17c92a57b0dd..18b0a83c4bbc 100644
--- a/drivers/staging/comedi/drivers/ssv_dnp.c
+++ b/drivers/staging/comedi/drivers/ssv_dnp.c
@@ -41,14 +41,14 @@ Status: unknown
41/* 0..3 remain unchanged! For details about Port C Mode Register see */ 41/* 0..3 remain unchanged! For details about Port C Mode Register see */
42/* the remarks in dnp_insn_config() below. */ 42/* the remarks in dnp_insn_config() below. */
43 43
44#define CSCIR 0x22 /* Chip Setup and Control Index Register */ 44#define CSCIR 0x22 /* Chip Setup and Control Index Register */
45#define CSCDR 0x23 /* Chip Setup and Control Data Register */ 45#define CSCDR 0x23 /* Chip Setup and Control Data Register */
46#define PAMR 0xa5 /* Port A Mode Register */ 46#define PAMR 0xa5 /* Port A Mode Register */
47#define PADR 0xa9 /* Port A Data Register */ 47#define PADR 0xa9 /* Port A Data Register */
48#define PBMR 0xa4 /* Port B Mode Register */ 48#define PBMR 0xa4 /* Port B Mode Register */
49#define PBDR 0xa8 /* Port B Data Register */ 49#define PBDR 0xa8 /* Port B Data Register */
50#define PCMR 0xa3 /* Port C Mode Register */ 50#define PCMR 0xa3 /* Port C Mode Register */
51#define PCDR 0xa7 /* Port C Data Register */ 51#define PCDR 0xa7 /* Port C Data Register */
52 52
53/* This data structure holds information about the supported boards -------- */ 53/* This data structure holds information about the supported boards -------- */
54 54
@@ -59,8 +59,9 @@ struct dnp_board {
59 int have_dio; 59 int have_dio;
60}; 60};
61 61
62static const struct dnp_board dnp_boards[] = { /* we only support one DNP 'board' */ 62/* We only support one DNP 'board' variant at the moment */
63 { /* variant at the moment */ 63static const struct dnp_board dnp_boards[] = {
64{
64 .name = "dnp-1486", 65 .name = "dnp-1486",
65 .ai_chans = 16, 66 .ai_chans = 16,
66 .ai_bits = 12, 67 .ai_bits = 12,
@@ -80,9 +81,9 @@ struct dnp_private_data {
80#define devpriv ((dnp_private *)dev->private) 81#define devpriv ((dnp_private *)dev->private)
81 82
82/* ------------------------------------------------------------------------- */ 83/* ------------------------------------------------------------------------- */
83/* The struct comedi_driver structure tells the Comedi core module which functions */ 84/* The struct comedi_driver structure tells the Comedi core module which */
84/* to call to configure/deconfigure (attach/detach) the board, and also */ 85/* functions to call to configure/deconfigure (attach/detach) the board, and */
85/* about the kernel module that contains the device code. */ 86/* also about the kernel module that contains the device code. */
86/* */ 87/* */
87/* In the following section we define the API of this driver. */ 88/* In the following section we define the API of this driver. */
88/* ------------------------------------------------------------------------- */ 89/* ------------------------------------------------------------------------- */
@@ -97,7 +98,7 @@ static struct comedi_driver driver_dnp = {
97 .detach = dnp_detach, 98 .detach = dnp_detach,
98 .board_name = &dnp_boards[0].name, 99 .board_name = &dnp_boards[0].name,
99 /* only necessary for non-PnP devs */ 100 /* only necessary for non-PnP devs */
100 .offset = sizeof(struct dnp_board), /* like ISA-PnP, PCI or PCMCIA. */ 101 .offset = sizeof(struct dnp_board), /* like ISA-PnP, PCI or PCMCIA */
101 .num_names = ARRAY_SIZE(dnp_boards), 102 .num_names = ARRAY_SIZE(dnp_boards),
102}; 103};
103 104
@@ -122,28 +123,30 @@ static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
122 123
123 struct comedi_subdevice *s; 124 struct comedi_subdevice *s;
124 125
125 printk("comedi%d: dnp: ", dev->minor); 126 printk(KERN_INFO "comedi%d: dnp: ", dev->minor);
126 127
127 /* Autoprobing: this should find out which board we have. Currently only */ 128 /* Autoprobing: this should find out which board we have. Currently */
128 /* the 1486 board is supported and autoprobing is not implemented :-) */ 129 /* only the 1486 board is supported and autoprobing is not */
130 /* implemented :-) */
129 /* dev->board_ptr = dnp_probe(dev); */ 131 /* dev->board_ptr = dnp_probe(dev); */
130 132
131 /* Initialize the name of the board. We can use the "thisboard" macro now. */ 133 /* Initialize the name of the board. */
134 /* We can use the "thisboard" macro now. */
132 dev->board_name = thisboard->name; 135 dev->board_name = thisboard->name;
133 136
134 /* Allocate the private structure area. alloc_private() is a convenient */ 137 /* Allocate the private structure area. alloc_private() is a */
135 /* macro defined in comedidev.h. */ 138 /* convenient macro defined in comedidev.h. */
136 if (alloc_private(dev, sizeof(struct dnp_private_data)) < 0) 139 if (alloc_private(dev, sizeof(struct dnp_private_data)) < 0)
137 return -ENOMEM; 140 return -ENOMEM;
138 141
139 /* Allocate the subdevice structures. alloc_subdevice() is a convenient */ 142 /* Allocate the subdevice structures. alloc_subdevice() is a */
140 /* macro defined in comedidev.h. */ 143 /* convenient macro defined in comedidev.h. */
141 144
142 if (alloc_subdevices(dev, 1) < 0) 145 if (alloc_subdevices(dev, 1) < 0)
143 return -ENOMEM; 146 return -ENOMEM;
144 147
145 s = dev->subdevices + 0; 148 s = dev->subdevices + 0;
146 /* digital i/o subdevice */ 149 /* digital i/o subdevice */
147 s->type = COMEDI_SUBD_DIO; 150 s->type = COMEDI_SUBD_DIO;
148 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; 151 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
149 s->n_chan = 20; 152 s->n_chan = 20;
@@ -158,7 +161,7 @@ static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
158 * allocated for the primary 8259, so we don't need to allocate them 161 * allocated for the primary 8259, so we don't need to allocate them
159 * ourselves. */ 162 * ourselves. */
160 163
161 /* configure all ports as input (default) */ 164 /* configure all ports as input (default) */
162 outb(PAMR, CSCIR); 165 outb(PAMR, CSCIR);
163 outb(0x00, CSCDR); 166 outb(0x00, CSCDR);
164 outb(PBMR, CSCIR); 167 outb(PBMR, CSCIR);
@@ -181,7 +184,7 @@ static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
181static int dnp_detach(struct comedi_device *dev) 184static int dnp_detach(struct comedi_device *dev)
182{ 185{
183 186
184 /* configure all ports as input (default) */ 187 /* configure all ports as input (default) */
185 outb(PAMR, CSCIR); 188 outb(PAMR, CSCIR);
186 outb(0x00, CSCDR); 189 outb(0x00, CSCDR);
187 outb(PBMR, CSCIR); 190 outb(PBMR, CSCIR);
@@ -189,8 +192,8 @@ static int dnp_detach(struct comedi_device *dev)
189 outb(PCMR, CSCIR); 192 outb(PCMR, CSCIR);
190 outb((inb(CSCDR) & 0xAA), CSCDR); 193 outb((inb(CSCDR) & 0xAA), CSCDR);
191 194
192 /* announce that we are finished */ 195 /* announce that we are finished */
193 printk("comedi%d: dnp: remove\n", dev->minor); 196 printk(KERN_INFO "comedi%d: dnp: remove\n", dev->minor);
194 197
195 return 0; 198 return 0;
196 199
@@ -210,12 +213,12 @@ static int dnp_dio_insn_bits(struct comedi_device *dev,
210 if (insn->n != 2) 213 if (insn->n != 2)
211 return -EINVAL; /* insn uses data[0] and data[1] */ 214 return -EINVAL; /* insn uses data[0] and data[1] */
212 215
213 /* The insn data is a mask in data[0] and the new data in data[1], each */ 216 /* The insn data is a mask in data[0] and the new data in data[1], */
214 /* channel cooresponding to a bit. */ 217 /* each channel cooresponding to a bit. */
215 218
216 /* Ports A and B are straight forward: each bit corresponds to an output */ 219 /* Ports A and B are straight forward: each bit corresponds to an */
217 /* pin with the same order. Port C is different: bits 0...3 correspond to */ 220 /* output pin with the same order. Port C is different: bits 0...3 */
218 /* bits 4...7 of the output register (PCDR). */ 221 /* correspond to bits 4...7 of the output register (PCDR). */
219 222
220 if (data[0]) { 223 if (data[0]) {
221 224
@@ -235,7 +238,7 @@ static int dnp_dio_insn_bits(struct comedi_device *dev,
235 | (u8) ((data[1] & 0x0F0000) >> 12), CSCDR); 238 | (u8) ((data[1] & 0x0F0000) >> 12), CSCDR);
236 } 239 }
237 240
238 /* on return, data[1] contains the value of the digital input lines. */ 241 /* on return, data[1] contains the value of the digital input lines. */
239 outb(PADR, CSCIR); 242 outb(PADR, CSCIR);
240 data[0] = inb(CSCDR); 243 data[0] = inb(CSCDR);
241 outb(PBDR, CSCIR); 244 outb(PBDR, CSCIR);
@@ -260,7 +263,8 @@ static int dnp_dio_insn_config(struct comedi_device *dev,
260 263
261 u8 register_buffer; 264 u8 register_buffer;
262 265
263 int chan = CR_CHAN(insn->chanspec); /* reduces chanspec to lower 16 bits */ 266 /* reduces chanspec to lower 16 bits */
267 int chan = CR_CHAN(insn->chanspec);
264 268
265 switch (data[0]) { 269 switch (data[0]) {
266 case INSN_CONFIG_DIO_OUTPUT: 270 case INSN_CONFIG_DIO_OUTPUT:
@@ -275,11 +279,11 @@ static int dnp_dio_insn_config(struct comedi_device *dev,
275 return -EINVAL; 279 return -EINVAL;
276 break; 280 break;
277 } 281 }
278 /* Test: which port does the channel belong to? */ 282 /* Test: which port does the channel belong to? */
279 283
280 /* We have to pay attention with port C: this is the meaning of PCMR: */ 284 /* We have to pay attention with port C: this is the meaning of PCMR: */
281 /* Bit in PCMR: 7 6 5 4 3 2 1 0 */ 285 /* Bit in PCMR: 7 6 5 4 3 2 1 0 */
282 /* Corresponding port C pin: d 3 d 2 d 1 d 0 d= don't touch */ 286 /* Corresponding port C pin: d 3 d 2 d 1 d 0 d= don't touch */
283 287
284 if ((chan >= 0) && (chan <= 7)) { 288 if ((chan >= 0) && (chan <= 7)) {
285 /* this is port A */ 289 /* this is port A */
@@ -289,8 +293,8 @@ static int dnp_dio_insn_config(struct comedi_device *dev,
289 chan -= 8; 293 chan -= 8;
290 outb(PBMR, CSCIR); 294 outb(PBMR, CSCIR);
291 } else if ((chan >= 16) && (chan <= 19)) { 295 } else if ((chan >= 16) && (chan <= 19)) {
292 /* this is port C; multiplication with 2 brings bits into correct */ 296 /* this is port C; multiplication with 2 brings bits into */
293 /* position for PCMR! */ 297 /* correct position for PCMR! */
294 chan -= 16; 298 chan -= 16;
295 chan *= 2; 299 chan *= 2;
296 outb(PCMR, CSCIR); 300 outb(PCMR, CSCIR);
@@ -298,7 +302,7 @@ static int dnp_dio_insn_config(struct comedi_device *dev,
298 return -EINVAL; 302 return -EINVAL;
299 } 303 }
300 304
301 /* read 'old' direction of the port and set bits (out=1, in=0) */ 305 /* read 'old' direction of the port and set bits (out=1, in=0) */
302 register_buffer = inb(CSCDR); 306 register_buffer = inb(CSCDR);
303 if (data[0] == COMEDI_OUTPUT) 307 if (data[0] == COMEDI_OUTPUT)
304 register_buffer |= (1 << chan); 308 register_buffer |= (1 << chan);
diff --git a/drivers/staging/comedi/drivers/unioxx5.c b/drivers/staging/comedi/drivers/unioxx5.c
index be1d83df0de5..16d4c9f69165 100644
--- a/drivers/staging/comedi/drivers/unioxx5.c
+++ b/drivers/staging/comedi/drivers/unioxx5.c
@@ -285,7 +285,7 @@ static int __unioxx5_subdev_init(struct comedi_subdevice *subdev,
285 return -EIO; 285 return -EIO;
286 } 286 }
287 287
288 usp = (struct unioxx5_subd_priv *)kzalloc(sizeof(*usp), GFP_KERNEL); 288 usp = kzalloc(sizeof(*usp), GFP_KERNEL);
289 289
290 if (usp == NULL) { 290 if (usp == NULL) {
291 printk(KERN_ERR "comedi%d: erorr! --> out of memory!\n", minor); 291 printk(KERN_ERR "comedi%d: erorr! --> out of memory!\n", minor);
diff --git a/drivers/staging/comedi/drivers/usbdux.c b/drivers/staging/comedi/drivers/usbdux.c
index 8942ae45708d..86f035d00675 100644
--- a/drivers/staging/comedi/drivers/usbdux.c
+++ b/drivers/staging/comedi/drivers/usbdux.c
@@ -793,7 +793,7 @@ static int usbduxsub_stop(struct usbduxsub *usbduxsub)
793} 793}
794 794
795static int usbduxsub_upload(struct usbduxsub *usbduxsub, 795static int usbduxsub_upload(struct usbduxsub *usbduxsub,
796 uint8_t * local_transfer_buffer, 796 uint8_t *local_transfer_buffer,
797 unsigned int startAddr, unsigned int len) 797 unsigned int startAddr, unsigned int len)
798{ 798{
799 int errcode; 799 int errcode;
@@ -825,7 +825,7 @@ static int usbduxsub_upload(struct usbduxsub *usbduxsub,
825#define FIRMWARE_MAX_LEN 0x2000 825#define FIRMWARE_MAX_LEN 0x2000
826 826
827static int firmwareUpload(struct usbduxsub *usbduxsub, 827static int firmwareUpload(struct usbduxsub *usbduxsub,
828 const u8 * firmwareBinary, int sizeFirmware) 828 const u8 *firmwareBinary, int sizeFirmware)
829{ 829{
830 int ret; 830 int ret;
831 uint8_t *fwBuf; 831 uint8_t *fwBuf;
@@ -835,18 +835,17 @@ static int firmwareUpload(struct usbduxsub *usbduxsub,
835 835
836 if (sizeFirmware > FIRMWARE_MAX_LEN) { 836 if (sizeFirmware > FIRMWARE_MAX_LEN) {
837 dev_err(&usbduxsub->interface->dev, 837 dev_err(&usbduxsub->interface->dev,
838 "comedi_: usbdux firmware binary it too large for FX2.\n"); 838 "usbdux firmware binary it too large for FX2.\n");
839 return -ENOMEM; 839 return -ENOMEM;
840 } 840 }
841 841
842 /* we generate a local buffer for the firmware */ 842 /* we generate a local buffer for the firmware */
843 fwBuf = kzalloc(sizeFirmware, GFP_KERNEL); 843 fwBuf = kmemdup(firmwareBinary, sizeFirmware, GFP_KERNEL);
844 if (!fwBuf) { 844 if (!fwBuf) {
845 dev_err(&usbduxsub->interface->dev, 845 dev_err(&usbduxsub->interface->dev,
846 "comedi_: mem alloc for firmware failed\n"); 846 "comedi_: mem alloc for firmware failed\n");
847 return -ENOMEM; 847 return -ENOMEM;
848 } 848 }
849 memcpy(fwBuf, firmwareBinary, sizeFirmware);
850 849
851 ret = usbduxsub_stop(usbduxsub); 850 ret = usbduxsub_stop(usbduxsub);
852 if (ret < 0) { 851 if (ret < 0) {
@@ -1264,8 +1263,8 @@ static int usbdux_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1264 (this_usbduxsub->ai_interval) * 2; 1263 (this_usbduxsub->ai_interval) * 2;
1265 } 1264 }
1266 this_usbduxsub->ai_timer = cmd->scan_begin_arg / (125000 * 1265 this_usbduxsub->ai_timer = cmd->scan_begin_arg / (125000 *
1267 (this_usbduxsub-> 1266 (this_usbduxsub->
1268 ai_interval)); 1267 ai_interval));
1269 } else { 1268 } else {
1270 /* interval always 1ms */ 1269 /* interval always 1ms */
1271 this_usbduxsub->ai_interval = 1; 1270 this_usbduxsub->ai_interval = 1;
diff --git a/drivers/staging/comedi/drivers/usbduxfast.c b/drivers/staging/comedi/drivers/usbduxfast.c
index e89b81812538..29c3c016b93a 100644
--- a/drivers/staging/comedi/drivers/usbduxfast.c
+++ b/drivers/staging/comedi/drivers/usbduxfast.c
@@ -177,8 +177,8 @@ struct usbduxfastsub_s {
177 int16_t *insnBuffer; /* input buffer for single insn */ 177 int16_t *insnBuffer; /* input buffer for single insn */
178 int ifnum; /* interface number */ 178 int ifnum; /* interface number */
179 struct usb_interface *interface; /* interface structure */ 179 struct usb_interface *interface; /* interface structure */
180 struct comedi_device *comedidev; /* comedi device for the interrupt 180 /* comedi device for the interrupt context */
181 context */ 181 struct comedi_device *comedidev;
182 short int ai_cmd_running; /* asynchronous command is running */ 182 short int ai_cmd_running; /* asynchronous command is running */
183 short int ai_continous; /* continous aquisition */ 183 short int ai_continous; /* continous aquisition */
184 long int ai_sample_count; /* number of samples to acquire */ 184 long int ai_sample_count; /* number of samples to acquire */
@@ -271,7 +271,8 @@ static int usbduxfast_ai_stop(struct usbduxfastsub_s *udfs, int do_unlink)
271 udfs->ai_cmd_running = 0; 271 udfs->ai_cmd_running = 0;
272 272
273 if (do_unlink) 273 if (do_unlink)
274 ret = usbduxfastsub_unlink_InURBs(udfs); /* stop aquistion */ 274 /* stop aquistion */
275 ret = usbduxfastsub_unlink_InURBs(udfs);
275 276
276 return ret; 277 return ret;
277} 278}
@@ -451,13 +452,15 @@ static int usbduxfastsub_start(struct usbduxfastsub_s *udfs)
451 452
452 /* 7f92 to zero */ 453 /* 7f92 to zero */
453 local_transfer_buffer[0] = 0; 454 local_transfer_buffer[0] = 0;
454 ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, /* bRequest, "Firmware" */ 455 /* bRequest, "Firmware" */
455 VENDOR_DIR_OUT, /* bmRequestType */ 456 ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE,
456 USBDUXFASTSUB_CPUCS, /* Value */ 457 VENDOR_DIR_OUT, /* bmRequestType */
457 0x0000, /* Index */ 458 USBDUXFASTSUB_CPUCS, /* Value */
458 local_transfer_buffer, /* address of the transfer buffer */ 459 0x0000, /* Index */
459 1, /* Length */ 460 /* address of the transfer buffer */
460 EZTIMEOUT); /* Timeout */ 461 local_transfer_buffer,
462 1, /* Length */
463 EZTIMEOUT); /* Timeout */
461 if (ret < 0) { 464 if (ret < 0) {
462 printk("comedi_: usbduxfast_: control msg failed (start)\n"); 465 printk("comedi_: usbduxfast_: control msg failed (start)\n");
463 return ret; 466 return ret;
@@ -473,7 +476,8 @@ static int usbduxfastsub_stop(struct usbduxfastsub_s *udfs)
473 476
474 /* 7f92 to one */ 477 /* 7f92 to one */
475 local_transfer_buffer[0] = 1; 478 local_transfer_buffer[0] = 1;
476 ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, /* bRequest, "Firmware" */ 479 /* bRequest, "Firmware" */
480 ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE,
477 VENDOR_DIR_OUT, /* bmRequestType */ 481 VENDOR_DIR_OUT, /* bmRequestType */
478 USBDUXFASTSUB_CPUCS, /* Value */ 482 USBDUXFASTSUB_CPUCS, /* Value */
479 0x0000, /* Index */ 483 0x0000, /* Index */
@@ -499,13 +503,15 @@ static int usbduxfastsub_upload(struct usbduxfastsub_s *udfs,
499 printk(KERN_DEBUG " to addr %d, first byte=%d.\n", 503 printk(KERN_DEBUG " to addr %d, first byte=%d.\n",
500 startAddr, local_transfer_buffer[0]); 504 startAddr, local_transfer_buffer[0]);
501#endif 505#endif
502 ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, /* brequest, firmware */ 506 /* brequest, firmware */
503 VENDOR_DIR_OUT, /* bmRequestType */ 507 ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE,
504 startAddr, /* value */ 508 VENDOR_DIR_OUT, /* bmRequestType */
505 0x0000, /* index */ 509 startAddr, /* value */
506 local_transfer_buffer, /* our local safe buffer */ 510 0x0000, /* index */
507 len, /* length */ 511 /* our local safe buffer */
508 EZTIMEOUT); /* timeout */ 512 local_transfer_buffer,
513 len, /* length */
514 EZTIMEOUT); /* timeout */
509 515
510#ifdef CONFIG_COMEDI_DEBUG 516#ifdef CONFIG_COMEDI_DEBUG
511 printk(KERN_DEBUG "comedi_: usbduxfast: result=%d\n", ret); 517 printk(KERN_DEBUG "comedi_: usbduxfast: result=%d\n", ret);
@@ -519,7 +525,7 @@ static int usbduxfastsub_upload(struct usbduxfastsub_s *udfs,
519 return 0; 525 return 0;
520} 526}
521 527
522int usbduxfastsub_submit_InURBs(struct usbduxfastsub_s *udfs) 528static int usbduxfastsub_submit_InURBs(struct usbduxfastsub_s *udfs)
523{ 529{
524 int ret; 530 int ret;
525 531
@@ -1347,7 +1353,7 @@ static int usbduxfast_ai_insn_read(struct comedi_device *dev,
1347#define FIRMWARE_MAX_LEN 0x2000 1353#define FIRMWARE_MAX_LEN 0x2000
1348 1354
1349static int firmwareUpload(struct usbduxfastsub_s *usbduxfastsub, 1355static int firmwareUpload(struct usbduxfastsub_s *usbduxfastsub,
1350 const u8 * firmwareBinary, int sizeFirmware) 1356 const u8 *firmwareBinary, int sizeFirmware)
1351{ 1357{
1352 int ret; 1358 int ret;
1353 uint8_t *fwBuf; 1359 uint8_t *fwBuf;
@@ -1362,13 +1368,12 @@ static int firmwareUpload(struct usbduxfastsub_s *usbduxfastsub,
1362 } 1368 }
1363 1369
1364 /* we generate a local buffer for the firmware */ 1370 /* we generate a local buffer for the firmware */
1365 fwBuf = kzalloc(sizeFirmware, GFP_KERNEL); 1371 fwBuf = kmemdup(firmwareBinary, sizeFirmware, GFP_KERNEL);
1366 if (!fwBuf) { 1372 if (!fwBuf) {
1367 dev_err(&usbduxfastsub->interface->dev, 1373 dev_err(&usbduxfastsub->interface->dev,
1368 "comedi_: mem alloc for firmware failed\n"); 1374 "comedi_: mem alloc for firmware failed\n");
1369 return -ENOMEM; 1375 return -ENOMEM;
1370 } 1376 }
1371 memcpy(fwBuf, firmwareBinary, sizeFirmware);
1372 1377
1373 ret = usbduxfastsub_stop(usbduxfastsub); 1378 ret = usbduxfastsub_stop(usbduxfastsub);
1374 if (ret < 0) { 1379 if (ret < 0) {
diff --git a/drivers/staging/comedi/internal.h b/drivers/staging/comedi/internal.h
new file mode 100644
index 000000000000..434ce3433368
--- /dev/null
+++ b/drivers/staging/comedi/internal.h
@@ -0,0 +1,12 @@
1/*
2 * various internal comedi functions
3 */
4int do_rangeinfo_ioctl(struct comedi_device *dev,
5 struct comedi_rangeinfo __user *arg);
6int insn_inval(struct comedi_device *dev, struct comedi_subdevice *s,
7 struct comedi_insn *insn, unsigned int *data);
8int comedi_alloc_board_minor(struct device *hardware_device);
9void comedi_free_board_minor(unsigned minor);
10void comedi_reset_async_buf(struct comedi_async *async);
11int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
12 unsigned long new_size);
diff --git a/drivers/staging/comedi/kcomedilib/Makefile b/drivers/staging/comedi/kcomedilib/Makefile
index ffcc9ad32adb..18ee99bdde08 100644
--- a/drivers/staging/comedi/kcomedilib/Makefile
+++ b/drivers/staging/comedi/kcomedilib/Makefile
@@ -1,8 +1,3 @@
1obj-$(CONFIG_COMEDI) += kcomedilib.o 1obj-$(CONFIG_COMEDI_KCOMEDILIB) += kcomedilib.o
2 2
3kcomedilib-objs := \ 3kcomedilib-objs := kcomedilib_main.o
4 data.o \
5 ksyms.o \
6 dio.o \
7 kcomedilib_main.o \
8 get.o
diff --git a/drivers/staging/comedi/kcomedilib/data.c b/drivers/staging/comedi/kcomedilib/data.c
deleted file mode 100644
index aefc41ab7c46..000000000000
--- a/drivers/staging/comedi/kcomedilib/data.c
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 kcomedilib/data.c
3 implements comedi_data_*() functions
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23
24#include "../comedi.h"
25#include "../comedilib.h"
26#include "../comedidev.h"
27
28#include <linux/string.h>
29#include <linux/delay.h>
30
31int comedi_data_write(void *dev, unsigned int subdev, unsigned int chan,
32 unsigned int range, unsigned int aref, unsigned int data)
33{
34 struct comedi_insn insn;
35
36 memset(&insn, 0, sizeof(insn));
37 insn.insn = INSN_WRITE;
38 insn.n = 1;
39 insn.data = &data;
40 insn.subdev = subdev;
41 insn.chanspec = CR_PACK(chan, range, aref);
42
43 return comedi_do_insn(dev, &insn);
44}
45
46int comedi_data_read(void *dev, unsigned int subdev, unsigned int chan,
47 unsigned int range, unsigned int aref, unsigned int *data)
48{
49 struct comedi_insn insn;
50
51 memset(&insn, 0, sizeof(insn));
52 insn.insn = INSN_READ;
53 insn.n = 1;
54 insn.data = data;
55 insn.subdev = subdev;
56 insn.chanspec = CR_PACK(chan, range, aref);
57
58 return comedi_do_insn(dev, &insn);
59}
60
61int comedi_data_read_hint(void *dev, unsigned int subdev,
62 unsigned int chan, unsigned int range,
63 unsigned int aref)
64{
65 struct comedi_insn insn;
66 unsigned int dummy_data;
67
68 memset(&insn, 0, sizeof(insn));
69 insn.insn = INSN_READ;
70 insn.n = 0;
71 insn.data = &dummy_data;
72 insn.subdev = subdev;
73 insn.chanspec = CR_PACK(chan, range, aref);
74
75 return comedi_do_insn(dev, &insn);
76}
77
78int comedi_data_read_delayed(void *dev, unsigned int subdev,
79 unsigned int chan, unsigned int range,
80 unsigned int aref, unsigned int *data,
81 unsigned int nano_sec)
82{
83 int retval;
84
85 retval = comedi_data_read_hint(dev, subdev, chan, range, aref);
86 if (retval < 0)
87 return retval;
88
89 udelay((nano_sec + 999) / 1000);
90
91 return comedi_data_read(dev, subdev, chan, range, aref, data);
92}
diff --git a/drivers/staging/comedi/kcomedilib/dio.c b/drivers/staging/comedi/kcomedilib/dio.c
deleted file mode 100644
index 30192f3c4652..000000000000
--- a/drivers/staging/comedi/kcomedilib/dio.c
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 kcomedilib/dio.c
3 implements comedi_dio_*() functions
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23
24#include "../comedi.h"
25#include "../comedilib.h"
26
27#include <linux/string.h>
28
29int comedi_dio_config(void *dev, unsigned int subdev, unsigned int chan,
30 unsigned int io)
31{
32 struct comedi_insn insn;
33
34 memset(&insn, 0, sizeof(insn));
35 insn.insn = INSN_CONFIG;
36 insn.n = 1;
37 insn.data = &io;
38 insn.subdev = subdev;
39 insn.chanspec = CR_PACK(chan, 0, 0);
40
41 return comedi_do_insn(dev, &insn);
42}
43
44int comedi_dio_read(void *dev, unsigned int subdev, unsigned int chan,
45 unsigned int *val)
46{
47 struct comedi_insn insn;
48
49 memset(&insn, 0, sizeof(insn));
50 insn.insn = INSN_READ;
51 insn.n = 1;
52 insn.data = val;
53 insn.subdev = subdev;
54 insn.chanspec = CR_PACK(chan, 0, 0);
55
56 return comedi_do_insn(dev, &insn);
57}
58
59int comedi_dio_write(void *dev, unsigned int subdev, unsigned int chan,
60 unsigned int val)
61{
62 struct comedi_insn insn;
63
64 memset(&insn, 0, sizeof(insn));
65 insn.insn = INSN_WRITE;
66 insn.n = 1;
67 insn.data = &val;
68 insn.subdev = subdev;
69 insn.chanspec = CR_PACK(chan, 0, 0);
70
71 return comedi_do_insn(dev, &insn);
72}
73
74int comedi_dio_bitfield(void *dev, unsigned int subdev, unsigned int mask,
75 unsigned int *bits)
76{
77 struct comedi_insn insn;
78 unsigned int data[2];
79 int ret;
80
81 memset(&insn, 0, sizeof(insn));
82 insn.insn = INSN_BITS;
83 insn.n = 2;
84 insn.data = data;
85 insn.subdev = subdev;
86
87 data[0] = mask;
88 data[1] = *bits;
89
90 ret = comedi_do_insn(dev, &insn);
91
92 *bits = data[1];
93
94 return ret;
95}
diff --git a/drivers/staging/comedi/kcomedilib/get.c b/drivers/staging/comedi/kcomedilib/get.c
deleted file mode 100644
index 6d8418715253..000000000000
--- a/drivers/staging/comedi/kcomedilib/get.c
+++ /dev/null
@@ -1,293 +0,0 @@
1/*
2 kcomedilib/get.c
3 a comedlib interface for kernel modules
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1997-2000 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23
24#define __NO_VERSION__
25#include "../comedi.h"
26#include "../comedilib.h"
27#include "../comedidev.h"
28
29int comedi_get_n_subdevices(void *d)
30{
31 struct comedi_device *dev = (struct comedi_device *)d;
32
33 return dev->n_subdevices;
34}
35
36int comedi_get_version_code(void *d)
37{
38 return COMEDI_VERSION_CODE;
39}
40
41const char *comedi_get_driver_name(void *d)
42{
43 struct comedi_device *dev = (struct comedi_device *)d;
44
45 return dev->driver->driver_name;
46}
47
48const char *comedi_get_board_name(void *d)
49{
50 struct comedi_device *dev = (struct comedi_device *)d;
51
52 return dev->board_name;
53}
54
55int comedi_get_subdevice_type(void *d, unsigned int subdevice)
56{
57 struct comedi_device *dev = (struct comedi_device *)d;
58 struct comedi_subdevice *s = dev->subdevices + subdevice;
59
60 return s->type;
61}
62
63unsigned int comedi_get_subdevice_flags(void *d, unsigned int subdevice)
64{
65 struct comedi_device *dev = (struct comedi_device *)d;
66 struct comedi_subdevice *s = dev->subdevices + subdevice;
67
68 return s->subdev_flags;
69}
70
71int comedi_find_subdevice_by_type(void *d, int type, unsigned int subd)
72{
73 struct comedi_device *dev = (struct comedi_device *)d;
74
75 if (subd > dev->n_subdevices)
76 return -ENODEV;
77
78 for (; subd < dev->n_subdevices; subd++) {
79 if (dev->subdevices[subd].type == type)
80 return subd;
81 }
82 return -1;
83}
84
85int comedi_get_n_channels(void *d, unsigned int subdevice)
86{
87 struct comedi_device *dev = (struct comedi_device *)d;
88 struct comedi_subdevice *s = dev->subdevices + subdevice;
89
90 return s->n_chan;
91}
92
93int comedi_get_len_chanlist(void *d, unsigned int subdevice)
94{
95 struct comedi_device *dev = (struct comedi_device *)d;
96 struct comedi_subdevice *s = dev->subdevices + subdevice;
97
98 return s->len_chanlist;
99}
100
101unsigned int comedi_get_maxdata(void *d, unsigned int subdevice,
102 unsigned int chan)
103{
104 struct comedi_device *dev = (struct comedi_device *)d;
105 struct comedi_subdevice *s = dev->subdevices + subdevice;
106
107 if (s->maxdata_list)
108 return s->maxdata_list[chan];
109
110 return s->maxdata;
111}
112
113#ifdef KCOMEDILIB_DEPRECATED
114int comedi_get_rangetype(void *d, unsigned int subdevice, unsigned int chan)
115{
116 struct comedi_device *dev = (struct comedi_device *)d;
117 struct comedi_subdevice *s = dev->subdevices + subdevice;
118 int ret;
119
120 if (s->range_table_list) {
121 ret = s->range_table_list[chan]->length;
122 } else {
123 ret = s->range_table->length;
124 }
125
126 ret = ret | (dev->minor << 28) | (subdevice << 24) | (chan << 16);
127
128 return ret;
129}
130#endif
131
132int comedi_get_n_ranges(void *d, unsigned int subdevice, unsigned int chan)
133{
134 struct comedi_device *dev = (struct comedi_device *)d;
135 struct comedi_subdevice *s = dev->subdevices + subdevice;
136 int ret;
137
138 if (s->range_table_list) {
139 ret = s->range_table_list[chan]->length;
140 } else {
141 ret = s->range_table->length;
142 }
143
144 return ret;
145}
146
147/*
148 * ALPHA (non-portable)
149*/
150int comedi_get_krange(void *d, unsigned int subdevice, unsigned int chan,
151 unsigned int range, struct comedi_krange *krange)
152{
153 struct comedi_device *dev = (struct comedi_device *)d;
154 struct comedi_subdevice *s = dev->subdevices + subdevice;
155 const struct comedi_lrange *lr;
156
157 if (s->range_table_list) {
158 lr = s->range_table_list[chan];
159 } else {
160 lr = s->range_table;
161 }
162 if (range >= lr->length)
163 return -EINVAL;
164
165 memcpy(krange, lr->range + range, sizeof(struct comedi_krange));
166
167 return 0;
168}
169
170/*
171 * ALPHA (may be renamed)
172*/
173unsigned int comedi_get_buf_head_pos(void *d, unsigned int subdevice)
174{
175 struct comedi_device *dev = (struct comedi_device *)d;
176 struct comedi_subdevice *s = dev->subdevices + subdevice;
177 struct comedi_async *async;
178
179 async = s->async;
180 if (async == NULL)
181 return 0;
182
183 return async->buf_write_count;
184}
185
186int comedi_get_buffer_contents(void *d, unsigned int subdevice)
187{
188 struct comedi_device *dev = (struct comedi_device *)d;
189 struct comedi_subdevice *s = dev->subdevices + subdevice;
190 struct comedi_async *async;
191 unsigned int num_bytes;
192
193 if (subdevice >= dev->n_subdevices)
194 return -1;
195 async = s->async;
196 if (async == NULL)
197 return 0;
198 num_bytes = comedi_buf_read_n_available(s->async);
199 return num_bytes;
200}
201
202/*
203 * ALPHA
204*/
205int comedi_set_user_int_count(void *d, unsigned int subdevice,
206 unsigned int buf_user_count)
207{
208 struct comedi_device *dev = (struct comedi_device *)d;
209 struct comedi_subdevice *s = dev->subdevices + subdevice;
210 struct comedi_async *async;
211 int num_bytes;
212
213 async = s->async;
214 if (async == NULL)
215 return -1;
216
217 num_bytes = buf_user_count - async->buf_read_count;
218 if (num_bytes < 0)
219 return -1;
220 comedi_buf_read_alloc(async, num_bytes);
221 comedi_buf_read_free(async, num_bytes);
222
223 return 0;
224}
225
226int comedi_mark_buffer_read(void *d, unsigned int subdevice,
227 unsigned int num_bytes)
228{
229 struct comedi_device *dev = (struct comedi_device *)d;
230 struct comedi_subdevice *s = dev->subdevices + subdevice;
231 struct comedi_async *async;
232
233 if (subdevice >= dev->n_subdevices)
234 return -1;
235 async = s->async;
236 if (async == NULL)
237 return -1;
238
239 comedi_buf_read_alloc(async, num_bytes);
240 comedi_buf_read_free(async, num_bytes);
241
242 return 0;
243}
244
245int comedi_mark_buffer_written(void *d, unsigned int subdevice,
246 unsigned int num_bytes)
247{
248 struct comedi_device *dev = (struct comedi_device *)d;
249 struct comedi_subdevice *s = dev->subdevices + subdevice;
250 struct comedi_async *async;
251 int bytes_written;
252
253 if (subdevice >= dev->n_subdevices)
254 return -1;
255 async = s->async;
256 if (async == NULL)
257 return -1;
258 bytes_written = comedi_buf_write_alloc(async, num_bytes);
259 comedi_buf_write_free(async, bytes_written);
260 if (bytes_written != num_bytes)
261 return -1;
262 return 0;
263}
264
265int comedi_get_buffer_size(void *d, unsigned int subdev)
266{
267 struct comedi_device *dev = (struct comedi_device *)d;
268 struct comedi_subdevice *s = dev->subdevices + subdev;
269 struct comedi_async *async;
270
271 if (subdev >= dev->n_subdevices)
272 return -1;
273 async = s->async;
274 if (async == NULL)
275 return 0;
276
277 return async->prealloc_bufsz;
278}
279
280int comedi_get_buffer_offset(void *d, unsigned int subdevice)
281{
282 struct comedi_device *dev = (struct comedi_device *)d;
283 struct comedi_subdevice *s = dev->subdevices + subdevice;
284 struct comedi_async *async;
285
286 if (subdevice >= dev->n_subdevices)
287 return -1;
288 async = s->async;
289 if (async == NULL)
290 return 0;
291
292 return async->buf_read_ptr;
293}
diff --git a/drivers/staging/comedi/kcomedilib/kcomedilib_main.c b/drivers/staging/comedi/kcomedilib/kcomedilib_main.c
index 288fef4fcbcc..863aae40edeb 100644
--- a/drivers/staging/comedi/kcomedilib/kcomedilib_main.c
+++ b/drivers/staging/comedi/kcomedilib/kcomedilib_main.c
@@ -31,7 +31,7 @@
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/ioport.h> 32#include <linux/ioport.h>
33#include <linux/mm.h> 33#include <linux/mm.h>
34#include <asm/io.h> 34#include <linux/io.h>
35 35
36#include "../comedi.h" 36#include "../comedi.h"
37#include "../comedilib.h" 37#include "../comedilib.h"
@@ -41,7 +41,7 @@ MODULE_AUTHOR("David Schleef <ds@schleef.org>");
41MODULE_DESCRIPTION("Comedi kernel library"); 41MODULE_DESCRIPTION("Comedi kernel library");
42MODULE_LICENSE("GPL"); 42MODULE_LICENSE("GPL");
43 43
44void *comedi_open(const char *filename) 44struct comedi_device *comedi_open(const char *filename)
45{ 45{
46 struct comedi_device_file_info *dev_file_info; 46 struct comedi_device_file_info *dev_file_info;
47 struct comedi_device *dev; 47 struct comedi_device *dev;
@@ -66,29 +66,11 @@ void *comedi_open(const char *filename)
66 if (!try_module_get(dev->driver->module)) 66 if (!try_module_get(dev->driver->module))
67 return NULL; 67 return NULL;
68 68
69 return (void *)dev; 69 return dev;
70} 70}
71EXPORT_SYMBOL(comedi_open);
71 72
72void *comedi_open_old(unsigned int minor) 73int comedi_close(struct comedi_device *d)
73{
74 struct comedi_device_file_info *dev_file_info;
75 struct comedi_device *dev;
76
77 if (minor >= COMEDI_NUM_MINORS)
78 return NULL;
79
80 dev_file_info = comedi_get_device_file_info(minor);
81 if (dev_file_info == NULL)
82 return NULL;
83 dev = dev_file_info->device;
84
85 if (dev == NULL || !dev->attached)
86 return NULL;
87
88 return (void *)dev;
89}
90
91int comedi_close(void *d)
92{ 74{
93 struct comedi_device *dev = (struct comedi_device *)d; 75 struct comedi_device *dev = (struct comedi_device *)d;
94 76
@@ -96,465 +78,118 @@ int comedi_close(void *d)
96 78
97 return 0; 79 return 0;
98} 80}
81EXPORT_SYMBOL(comedi_close);
99 82
100int comedi_loglevel(int newlevel) 83static int comedi_do_insn(struct comedi_device *dev, struct comedi_insn *insn)
101{
102 return 0;
103}
104
105void comedi_perror(const char *message)
106{
107 printk("%s: unknown error\n", message);
108}
109
110char *comedi_strerror(int err)
111{
112 return "unknown error";
113}
114
115int comedi_fileno(void *d)
116{ 84{
117 struct comedi_device *dev = (struct comedi_device *)d;
118
119 /* return something random */
120 return dev->minor;
121}
122
123int comedi_command(void *d, struct comedi_cmd *cmd)
124{
125 struct comedi_device *dev = (struct comedi_device *)d;
126 struct comedi_subdevice *s;
127 struct comedi_async *async;
128 unsigned runflags;
129
130 if (cmd->subdev >= dev->n_subdevices)
131 return -ENODEV;
132
133 s = dev->subdevices + cmd->subdev;
134 if (s->type == COMEDI_SUBD_UNUSED)
135 return -EIO;
136
137 async = s->async;
138 if (async == NULL)
139 return -ENODEV;
140
141 if (s->busy)
142 return -EBUSY;
143 s->busy = d;
144
145 if (async->cb_mask & COMEDI_CB_EOS)
146 cmd->flags |= TRIG_WAKE_EOS;
147
148 async->cmd = *cmd;
149
150 runflags = SRF_RUNNING;
151
152 comedi_set_subdevice_runflags(s, ~0, runflags);
153
154 comedi_reset_async_buf(async);
155
156 return s->do_cmd(dev, s);
157}
158
159int comedi_command_test(void *d, struct comedi_cmd *cmd)
160{
161 struct comedi_device *dev = (struct comedi_device *)d;
162 struct comedi_subdevice *s;
163
164 if (cmd->subdev >= dev->n_subdevices)
165 return -ENODEV;
166
167 s = dev->subdevices + cmd->subdev;
168 if (s->type == COMEDI_SUBD_UNUSED)
169 return -EIO;
170
171 if (s->async == NULL)
172 return -ENODEV;
173
174 return s->do_cmdtest(dev, s, cmd);
175}
176
177/*
178 * COMEDI_INSN
179 * perform an instruction
180 */
181int comedi_do_insn(void *d, struct comedi_insn *insn)
182{
183 struct comedi_device *dev = (struct comedi_device *)d;
184 struct comedi_subdevice *s; 85 struct comedi_subdevice *s;
185 int ret = 0; 86 int ret = 0;
186 87
187 if (insn->insn & INSN_MASK_SPECIAL) { 88 /* a subdevice instruction */
188 switch (insn->insn) { 89 if (insn->subdev >= dev->n_subdevices) {
189 case INSN_GTOD:
190 {
191 struct timeval tv;
192
193 do_gettimeofday(&tv);
194 insn->data[0] = tv.tv_sec;
195 insn->data[1] = tv.tv_usec;
196 ret = 2;
197
198 break;
199 }
200 case INSN_WAIT:
201 /* XXX isn't the value supposed to be nanosecs? */
202 if (insn->n != 1 || insn->data[0] >= 100) {
203 ret = -EINVAL;
204 break;
205 }
206 udelay(insn->data[0]);
207 ret = 1;
208 break;
209 case INSN_INTTRIG:
210 if (insn->n != 1) {
211 ret = -EINVAL;
212 break;
213 }
214 if (insn->subdev >= dev->n_subdevices) {
215 printk("%d not usable subdevice\n",
216 insn->subdev);
217 ret = -EINVAL;
218 break;
219 }
220 s = dev->subdevices + insn->subdev;
221 if (!s->async) {
222 printk("no async\n");
223 ret = -EINVAL;
224 break;
225 }
226 if (!s->async->inttrig) {
227 printk("no inttrig\n");
228 ret = -EAGAIN;
229 break;
230 }
231 ret = s->async->inttrig(dev, s, insn->data[0]);
232 if (ret >= 0)
233 ret = 1;
234 break;
235 default:
236 ret = -EINVAL;
237 }
238 } else {
239 /* a subdevice instruction */
240 if (insn->subdev >= dev->n_subdevices) {
241 ret = -EINVAL;
242 goto error;
243 }
244 s = dev->subdevices + insn->subdev;
245
246 if (s->type == COMEDI_SUBD_UNUSED) {
247 printk("%d not useable subdevice\n", insn->subdev);
248 ret = -EIO;
249 goto error;
250 }
251
252 /* XXX check lock */
253
254 ret = check_chanlist(s, 1, &insn->chanspec);
255 if (ret < 0) {
256 printk("bad chanspec\n");
257 ret = -EINVAL;
258 goto error;
259 }
260
261 if (s->busy) {
262 ret = -EBUSY;
263 goto error;
264 }
265 s->busy = d;
266
267 switch (insn->insn) {
268 case INSN_READ:
269 ret = s->insn_read(dev, s, insn, insn->data);
270 break;
271 case INSN_WRITE:
272 ret = s->insn_write(dev, s, insn, insn->data);
273 break;
274 case INSN_BITS:
275 ret = s->insn_bits(dev, s, insn, insn->data);
276 break;
277 case INSN_CONFIG:
278 /* XXX should check instruction length */
279 ret = s->insn_config(dev, s, insn, insn->data);
280 break;
281 default:
282 ret = -EINVAL;
283 break;
284 }
285
286 s->busy = NULL;
287 }
288 if (ret < 0)
289 goto error;
290#if 0
291 /* XXX do we want this? -- abbotti #if'ed it out for now. */
292 if (ret != insn->n) {
293 printk("BUG: result of insn != insn.n\n");
294 ret = -EINVAL; 90 ret = -EINVAL;
295 goto error; 91 goto error;
296 } 92 }
297#endif 93 s = dev->subdevices + insn->subdev;
298error:
299
300 return ret;
301}
302
303/*
304 COMEDI_LOCK
305 lock subdevice
306
307 arg:
308 subdevice number
309
310 reads:
311 none
312
313 writes:
314 none
315
316 necessary locking:
317 - ioctl/rt lock (this type)
318 - lock while subdevice busy
319 - lock while subdevice being programmed
320 94
321*/ 95 if (s->type == COMEDI_SUBD_UNUSED) {
322int comedi_lock(void *d, unsigned int subdevice) 96 printk("%d not useable subdevice\n", insn->subdev);
323{ 97 ret = -EIO;
324 struct comedi_device *dev = (struct comedi_device *)d; 98 goto error;
325 struct comedi_subdevice *s;
326 unsigned long flags;
327 int ret = 0;
328
329 if (subdevice >= dev->n_subdevices)
330 return -EINVAL;
331
332 s = dev->subdevices + subdevice;
333
334 spin_lock_irqsave(&s->spin_lock, flags);
335
336 if (s->busy) {
337 ret = -EBUSY;
338 } else {
339 if (s->lock) {
340 ret = -EBUSY;
341 } else {
342 s->lock = d;
343 }
344 } 99 }
345 100
346 spin_unlock_irqrestore(&s->spin_lock, flags); 101 /* XXX check lock */
347
348 return ret;
349}
350 102
351/* 103 ret = comedi_check_chanlist(s, 1, &insn->chanspec);
352 COMEDI_UNLOCK 104 if (ret < 0) {
353 unlock subdevice 105 printk("bad chanspec\n");
354 106 ret = -EINVAL;
355 arg: 107 goto error;
356 subdevice number 108 }
357
358 reads:
359 none
360
361 writes:
362 none
363
364*/
365int comedi_unlock(void *d, unsigned int subdevice)
366{
367 struct comedi_device *dev = (struct comedi_device *)d;
368 struct comedi_subdevice *s;
369 unsigned long flags;
370 struct comedi_async *async;
371 int ret;
372
373 if (subdevice >= dev->n_subdevices)
374 return -EINVAL;
375
376 s = dev->subdevices + subdevice;
377
378 async = s->async;
379
380 spin_lock_irqsave(&s->spin_lock, flags);
381 109
382 if (s->busy) { 110 if (s->busy) {
383 ret = -EBUSY; 111 ret = -EBUSY;
384 } else if (s->lock && s->lock != (void *)d) { 112 goto error;
385 ret = -EACCES; 113 }
386 } else { 114 s->busy = dev;
387 s->lock = NULL; 115
388 116 switch (insn->insn) {
389 if (async) { 117 case INSN_BITS:
390 async->cb_mask = 0; 118 ret = s->insn_bits(dev, s, insn, insn->data);
391 async->cb_func = NULL; 119 break;
392 async->cb_arg = NULL; 120 case INSN_CONFIG:
393 } 121 /* XXX should check instruction length */
394 122 ret = s->insn_config(dev, s, insn, insn->data);
395 ret = 0; 123 break;
124 default:
125 ret = -EINVAL;
126 break;
396 } 127 }
397 128
398 spin_unlock_irqrestore(&s->spin_lock, flags);
399
400 return ret;
401}
402
403/*
404 COMEDI_CANCEL
405 cancel acquisition ioctl
406
407 arg:
408 subdevice number
409
410 reads:
411 nothing
412
413 writes:
414 nothing
415
416*/
417int comedi_cancel(void *d, unsigned int subdevice)
418{
419 struct comedi_device *dev = (struct comedi_device *)d;
420 struct comedi_subdevice *s;
421 int ret = 0;
422
423 if (subdevice >= dev->n_subdevices)
424 return -EINVAL;
425
426 s = dev->subdevices + subdevice;
427
428 if (s->lock && s->lock != d)
429 return -EACCES;
430
431#if 0
432 if (!s->busy)
433 return 0;
434
435 if (s->busy != d)
436 return -EBUSY;
437#endif
438
439 if (!s->cancel || !s->async)
440 return -EINVAL;
441
442 ret = s->cancel(dev, s);
443
444 if (ret)
445 return ret;
446
447 comedi_set_subdevice_runflags(s, SRF_RUNNING | SRF_RT, 0);
448 s->async->inttrig = NULL;
449 s->busy = NULL; 129 s->busy = NULL;
130error:
450 131
451 return 0; 132 return ret;
452} 133}
453 134
454/* 135int comedi_dio_config(struct comedi_device *dev, unsigned int subdev,
455 registration of callback functions 136 unsigned int chan, unsigned int io)
456 */
457int comedi_register_callback(void *d, unsigned int subdevice,
458 unsigned int mask, int (*cb) (unsigned int,
459 void *), void *arg)
460{ 137{
461 struct comedi_device *dev = (struct comedi_device *)d; 138 struct comedi_insn insn;
462 struct comedi_subdevice *s;
463 struct comedi_async *async;
464
465 if (subdevice >= dev->n_subdevices)
466 return -EINVAL;
467
468 s = dev->subdevices + subdevice;
469
470 async = s->async;
471 if (s->type == COMEDI_SUBD_UNUSED || !async)
472 return -EIO;
473 139
474 /* are we locked? (ioctl lock) */ 140 memset(&insn, 0, sizeof(insn));
475 if (s->lock && s->lock != d) 141 insn.insn = INSN_CONFIG;
476 return -EACCES; 142 insn.n = 1;
143 insn.data = &io;
144 insn.subdev = subdev;
145 insn.chanspec = CR_PACK(chan, 0, 0);
477 146
478 /* are we busy? */ 147 return comedi_do_insn(dev, &insn);
479 if (s->busy)
480 return -EBUSY;
481
482 if (!mask) {
483 async->cb_mask = 0;
484 async->cb_func = NULL;
485 async->cb_arg = NULL;
486 } else {
487 async->cb_mask = mask;
488 async->cb_func = cb;
489 async->cb_arg = arg;
490 }
491
492 return 0;
493} 148}
149EXPORT_SYMBOL(comedi_dio_config);
494 150
495int comedi_poll(void *d, unsigned int subdevice) 151int comedi_dio_bitfield(struct comedi_device *dev, unsigned int subdev,
152 unsigned int mask, unsigned int *bits)
496{ 153{
497 struct comedi_device *dev = (struct comedi_device *)d; 154 struct comedi_insn insn;
498 struct comedi_subdevice *s = dev->subdevices; 155 unsigned int data[2];
499 struct comedi_async *async; 156 int ret;
500
501 if (subdevice >= dev->n_subdevices)
502 return -EINVAL;
503 157
504 s = dev->subdevices + subdevice; 158 memset(&insn, 0, sizeof(insn));
159 insn.insn = INSN_BITS;
160 insn.n = 2;
161 insn.data = data;
162 insn.subdev = subdev;
505 163
506 async = s->async; 164 data[0] = mask;
507 if (s->type == COMEDI_SUBD_UNUSED || !async) 165 data[1] = *bits;
508 return -EIO;
509 166
510 /* are we locked? (ioctl lock) */ 167 ret = comedi_do_insn(dev, &insn);
511 if (s->lock && s->lock != d)
512 return -EACCES;
513 168
514 /* are we running? XXX wrong? */ 169 *bits = data[1];
515 if (!s->busy)
516 return -EIO;
517 170
518 return s->poll(dev, s); 171 return ret;
519} 172}
173EXPORT_SYMBOL(comedi_dio_bitfield);
520 174
521/* WARNING: not portable */ 175int comedi_find_subdevice_by_type(struct comedi_device *dev, int type,
522int comedi_map(void *d, unsigned int subdevice, void *ptr) 176 unsigned int subd)
523{ 177{
524 struct comedi_device *dev = (struct comedi_device *)d; 178 if (subd > dev->n_subdevices)
525 struct comedi_subdevice *s; 179 return -ENODEV;
526
527 if (subdevice >= dev->n_subdevices)
528 return -EINVAL;
529
530 s = dev->subdevices + subdevice;
531
532 if (!s->async)
533 return -EINVAL;
534
535 if (ptr)
536 *((void **)ptr) = s->async->prealloc_buf;
537
538 /* XXX no reference counting */
539 180
540 return 0; 181 for (; subd < dev->n_subdevices; subd++) {
182 if (dev->subdevices[subd].type == type)
183 return subd;
184 }
185 return -1;
541} 186}
187EXPORT_SYMBOL(comedi_find_subdevice_by_type);
542 188
543/* WARNING: not portable */ 189int comedi_get_n_channels(struct comedi_device *dev, unsigned int subdevice)
544int comedi_unmap(void *d, unsigned int subdevice)
545{ 190{
546 struct comedi_device *dev = (struct comedi_device *)d; 191 struct comedi_subdevice *s = dev->subdevices + subdevice;
547 struct comedi_subdevice *s;
548 192
549 if (subdevice >= dev->n_subdevices) 193 return s->n_chan;
550 return -EINVAL;
551
552 s = dev->subdevices + subdevice;
553
554 if (!s->async)
555 return -EINVAL;
556
557 /* XXX no reference counting */
558
559 return 0;
560} 194}
195EXPORT_SYMBOL(comedi_get_n_channels);
diff --git a/drivers/staging/comedi/kcomedilib/ksyms.c b/drivers/staging/comedi/kcomedilib/ksyms.c
deleted file mode 100644
index 8bf4471ce6c1..000000000000
--- a/drivers/staging/comedi/kcomedilib/ksyms.c
+++ /dev/null
@@ -1,146 +0,0 @@
1/*
2 comedi/kcomedilib/ksyms.c
3 a comedlib interface for kernel modules
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1997-2001 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23
24#include "../comedi.h"
25#include "../comedilib.h"
26#include "../comedidev.h"
27
28#include <linux/module.h>
29
30#include <linux/errno.h>
31#include <linux/kernel.h>
32#include <linux/sched.h>
33#include <linux/fcntl.h>
34#include <linux/delay.h>
35#include <linux/ioport.h>
36#include <linux/mm.h>
37
38/* functions specific to kcomedilib */
39
40EXPORT_SYMBOL(comedi_register_callback);
41EXPORT_SYMBOL(comedi_get_krange);
42EXPORT_SYMBOL(comedi_get_buf_head_pos);
43EXPORT_SYMBOL(comedi_set_user_int_count);
44EXPORT_SYMBOL(comedi_map);
45EXPORT_SYMBOL(comedi_unmap);
46
47/* This list comes from user-space comedilib, to show which
48 * functions are not ported yet. */
49
50EXPORT_SYMBOL(comedi_open);
51EXPORT_SYMBOL(comedi_close);
52
53/* logging */
54EXPORT_SYMBOL(comedi_loglevel);
55EXPORT_SYMBOL(comedi_perror);
56EXPORT_SYMBOL(comedi_strerror);
57/* EXPORT_SYMBOL(comedi_errno); */
58EXPORT_SYMBOL(comedi_fileno);
59
60/* device queries */
61EXPORT_SYMBOL(comedi_get_n_subdevices);
62EXPORT_SYMBOL(comedi_get_version_code);
63EXPORT_SYMBOL(comedi_get_driver_name);
64EXPORT_SYMBOL(comedi_get_board_name);
65
66/* subdevice queries */
67EXPORT_SYMBOL(comedi_get_subdevice_type);
68EXPORT_SYMBOL(comedi_find_subdevice_by_type);
69EXPORT_SYMBOL(comedi_get_subdevice_flags);
70EXPORT_SYMBOL(comedi_get_n_channels);
71/*
72* EXPORT_SYMBOL(comedi_range_is_chan_specific);
73* EXPORT_SYMBOL(comedi_maxdata_is_chan_specific);
74*/
75
76/* channel queries */
77EXPORT_SYMBOL(comedi_get_maxdata);
78#ifdef KCOMEDILIB_DEPRECATED
79EXPORT_SYMBOL(comedi_get_rangetype);
80#endif
81EXPORT_SYMBOL(comedi_get_n_ranges);
82/* EXPORT_SYMBOL(comedi_find_range); */
83
84/* buffer queries */
85EXPORT_SYMBOL(comedi_get_buffer_size);
86/*
87* EXPORT_SYMBOL(comedi_get_max_buffer_size);
88* EXPORT_SYMBOL(comedi_set_buffer_size);
89*/
90EXPORT_SYMBOL(comedi_get_buffer_contents);
91EXPORT_SYMBOL(comedi_get_buffer_offset);
92
93/* low-level stuff */
94/*
95* EXPORT_SYMBOL(comedi_trigger); EXPORT_SYMBOL(comedi_do_insnlist);
96*/
97EXPORT_SYMBOL(comedi_do_insn);
98EXPORT_SYMBOL(comedi_lock);
99EXPORT_SYMBOL(comedi_unlock);
100
101/* physical units */
102/*
103* EXPORT_SYMBOL(comedi_to_phys); EXPORT_SYMBOL(comedi_from_phys);
104*/
105
106/* synchronous stuff */
107EXPORT_SYMBOL(comedi_data_read);
108EXPORT_SYMBOL(comedi_data_read_hint);
109EXPORT_SYMBOL(comedi_data_read_delayed);
110EXPORT_SYMBOL(comedi_data_write);
111EXPORT_SYMBOL(comedi_dio_config);
112EXPORT_SYMBOL(comedi_dio_read);
113EXPORT_SYMBOL(comedi_dio_write);
114EXPORT_SYMBOL(comedi_dio_bitfield);
115
116/* slowly varying stuff */
117/*
118* EXPORT_SYMBOL(comedi_sv_init); EXPORT_SYMBOL(comedi_sv_update);
119* EXPORT_SYMBOL(comedi_sv_measure);
120*/
121
122/* commands */
123/*
124* EXPORT_SYMBOL(comedi_get_cmd_src_mask);
125* EXPORT_SYMBOL(comedi_get_cmd_generic_timed);
126*/
127EXPORT_SYMBOL(comedi_cancel);
128EXPORT_SYMBOL(comedi_command);
129EXPORT_SYMBOL(comedi_command_test);
130EXPORT_SYMBOL(comedi_poll);
131
132/* buffer configuration */
133EXPORT_SYMBOL(comedi_mark_buffer_read);
134EXPORT_SYMBOL(comedi_mark_buffer_written);
135
136/* EXPORT_SYMBOL(comedi_get_range); */
137EXPORT_SYMBOL(comedi_get_len_chanlist);
138
139/* deprecated */
140/*
141* EXPORT_SYMBOL(comedi_get_timer);
142* EXPORT_SYMBOL(comedi_timed_1chan);
143*/
144
145/* alpha */
146/* EXPORT_SYMBOL(comedi_set_global_oor_behavior); */
diff --git a/drivers/staging/comedi/pci_ids.h b/drivers/staging/comedi/pci_ids.h
deleted file mode 100644
index d979aa8e396b..000000000000
--- a/drivers/staging/comedi/pci_ids.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/***************************************************************************
2 * *
3 * This program is free software; you can redistribute it and/or modify *
4 * it under the terms of the GNU General Public License as published by *
5 * the Free Software Foundation; either version 2 of the License, or *
6 * (at your option) any later version. *
7 * *
8 ***************************************************************************/
9
10#ifndef __COMPAT_LINUX_PCI_IDS_H
11#define __COMPAT_LINUX_PCI_IDS_H
12
13#include <linux/pci_ids.h>
14
15#ifndef PCI_VENDOR_ID_AMCC
16#define PCI_VENDOR_ID_AMCC 0x10e8
17#endif
18
19#ifndef PCI_VENDOR_ID_CBOARDS
20#define PCI_VENDOR_ID_CBOARDS 0x1307
21#endif
22
23#ifndef PCI_VENDOR_ID_QUANCOM
24#define PCI_VENDOR_ID_QUANCOM 0x8008
25#endif
26
27#ifndef PCI_DEVICE_ID_QUANCOM_GPIB
28#define PCI_DEVICE_ID_QUANCOM_GPIB 0x3302
29#endif
30
31#endif /* __COMPAT_LINUX_PCI_IDS_H */
diff --git a/drivers/staging/comedi/proc.c b/drivers/staging/comedi/proc.c
index 5a22fe62c400..2aa487b60187 100644
--- a/drivers/staging/comedi/proc.c
+++ b/drivers/staging/comedi/proc.c
@@ -30,16 +30,13 @@
30 30
31#define __NO_VERSION__ 31#define __NO_VERSION__
32#include "comedidev.h" 32#include "comedidev.h"
33#include "comedi_fops.h"
33#include <linux/proc_fs.h> 34#include <linux/proc_fs.h>
34/* #include <linux/string.h> */ 35#include <linux/string.h>
35 36
36int comedi_read_procmem(char *buf, char **start, off_t offset, int len, 37#ifdef CONFIG_PROC_FS
37 int *eof, void *data); 38static int comedi_read(char *buf, char **start, off_t offset, int len,
38 39 int *eof, void *data)
39extern struct comedi_driver *comedi_drivers;
40
41int comedi_read_procmem(char *buf, char **start, off_t offset, int len,
42 int *eof, void *data)
43{ 40{
44 int i; 41 int i;
45 int devices_q = 0; 42 int devices_q = 0;
@@ -49,7 +46,8 @@ int comedi_read_procmem(char *buf, char **start, off_t offset, int len,
49 l += sprintf(buf + l, 46 l += sprintf(buf + l,
50 "comedi version " COMEDI_RELEASE "\n" 47 "comedi version " COMEDI_RELEASE "\n"
51 "format string: %s\n", 48 "format string: %s\n",
52 "\"%2d: %-20s %-20s %4d\",i,driver_name,board_name,n_subdevices"); 49 "\"%2d: %-20s %-20s %4d\", i, "
50 "driver_name, board_name, n_subdevices");
53 51
54 for (i = 0; i < COMEDI_NUM_BOARD_MINORS; i++) { 52 for (i = 0; i < COMEDI_NUM_BOARD_MINORS; i++) {
55 struct comedi_device_file_info *dev_file_info = 53 struct comedi_device_file_info *dev_file_info =
@@ -85,18 +83,17 @@ int comedi_read_procmem(char *buf, char **start, off_t offset, int len,
85 return l; 83 return l;
86} 84}
87 85
88#ifdef CONFIG_PROC_FS
89void comedi_proc_init(void) 86void comedi_proc_init(void)
90{ 87{
91 struct proc_dir_entry *comedi_proc; 88 struct proc_dir_entry *comedi_proc;
92 89
93 comedi_proc = create_proc_entry("comedi", S_IFREG | S_IRUGO, 0); 90 comedi_proc = create_proc_entry("comedi", S_IFREG | S_IRUGO, NULL);
94 if (comedi_proc) 91 if (comedi_proc)
95 comedi_proc->read_proc = comedi_read_procmem; 92 comedi_proc->read_proc = comedi_read;
96} 93}
97 94
98void comedi_proc_cleanup(void) 95void comedi_proc_cleanup(void)
99{ 96{
100 remove_proc_entry("comedi", 0); 97 remove_proc_entry("comedi", NULL);
101} 98}
102#endif 99#endif
diff --git a/drivers/staging/comedi/range.c b/drivers/staging/comedi/range.c
index 8313dfcb6732..148ec6fd6fdd 100644
--- a/drivers/staging/comedi/range.c
+++ b/drivers/staging/comedi/range.c
@@ -21,15 +21,22 @@
21 21
22*/ 22*/
23 23
24#include <linux/uaccess.h>
24#include "comedidev.h" 25#include "comedidev.h"
25#include <asm/uaccess.h> 26#include "internal.h"
26 27
27const struct comedi_lrange range_bipolar10 = { 1, {BIP_RANGE(10)} }; 28const struct comedi_lrange range_bipolar10 = { 1, {BIP_RANGE(10)} };
29EXPORT_SYMBOL(range_bipolar10);
28const struct comedi_lrange range_bipolar5 = { 1, {BIP_RANGE(5)} }; 30const struct comedi_lrange range_bipolar5 = { 1, {BIP_RANGE(5)} };
31EXPORT_SYMBOL(range_bipolar5);
29const struct comedi_lrange range_bipolar2_5 = { 1, {BIP_RANGE(2.5)} }; 32const struct comedi_lrange range_bipolar2_5 = { 1, {BIP_RANGE(2.5)} };
33EXPORT_SYMBOL(range_bipolar2_5);
30const struct comedi_lrange range_unipolar10 = { 1, {UNI_RANGE(10)} }; 34const struct comedi_lrange range_unipolar10 = { 1, {UNI_RANGE(10)} };
35EXPORT_SYMBOL(range_unipolar10);
31const struct comedi_lrange range_unipolar5 = { 1, {UNI_RANGE(5)} }; 36const struct comedi_lrange range_unipolar5 = { 1, {UNI_RANGE(5)} };
32const struct comedi_lrange range_unknown = { 1, {{0, 1000000, UNIT_none}} }; 37EXPORT_SYMBOL(range_unipolar5);
38const struct comedi_lrange range_unknown = { 1, {{0, 1000000, UNIT_none} } };
39EXPORT_SYMBOL(range_unknown);
33 40
34/* 41/*
35 COMEDI_RANGEINFO 42 COMEDI_RANGEINFO
@@ -44,7 +51,8 @@ const struct comedi_lrange range_unknown = { 1, {{0, 1000000, UNIT_none}} };
44 writes: 51 writes:
45 n struct comedi_krange structures to rangeinfo->range_ptr 52 n struct comedi_krange structures to rangeinfo->range_ptr
46*/ 53*/
47int do_rangeinfo_ioctl(struct comedi_device *dev, struct comedi_rangeinfo *arg) 54int do_rangeinfo_ioctl(struct comedi_device *dev,
55 struct comedi_rangeinfo __user *arg)
48{ 56{
49 struct comedi_rangeinfo it; 57 struct comedi_rangeinfo it;
50 int subd, chan; 58 int subd, chan;
@@ -120,7 +128,8 @@ static int aref_invalid(struct comedi_subdevice *s, unsigned int chanspec)
120 This function checks each element in a channel/gain list to make 128 This function checks each element in a channel/gain list to make
121 make sure it is valid. 129 make sure it is valid.
122*/ 130*/
123int check_chanlist(struct comedi_subdevice *s, int n, unsigned int *chanlist) 131int comedi_check_chanlist(struct comedi_subdevice *s, int n,
132 unsigned int *chanlist)
124{ 133{
125 int i; 134 int i;
126 int chan; 135 int chan;
@@ -130,14 +139,10 @@ int check_chanlist(struct comedi_subdevice *s, int n, unsigned int *chanlist)
130 if (CR_CHAN(chanlist[i]) >= s->n_chan || 139 if (CR_CHAN(chanlist[i]) >= s->n_chan ||
131 CR_RANGE(chanlist[i]) >= s->range_table->length 140 CR_RANGE(chanlist[i]) >= s->range_table->length
132 || aref_invalid(s, chanlist[i])) { 141 || aref_invalid(s, chanlist[i])) {
133 printk 142 printk(KERN_ERR "bad chanlist[%d]=0x%08x "
134 ("bad chanlist[%d]=0x%08x n_chan=%d range length=%d\n", 143 "in_chan=%d range length=%d\n", i,
135 i, chanlist[i], s->n_chan, 144 chanlist[i], s->n_chan,
136 s->range_table->length); 145 s->range_table->length);
137#if 0
138 for (i = 0; i < n; i++)
139 printk("[%d]=0x%08x\n", i, chanlist[i]);
140#endif
141 return -EINVAL; 146 return -EINVAL;
142 } 147 }
143 } else if (s->range_table_list) { 148 } else if (s->range_table_list) {
@@ -147,14 +152,15 @@ int check_chanlist(struct comedi_subdevice *s, int n, unsigned int *chanlist)
147 CR_RANGE(chanlist[i]) >= 152 CR_RANGE(chanlist[i]) >=
148 s->range_table_list[chan]->length 153 s->range_table_list[chan]->length
149 || aref_invalid(s, chanlist[i])) { 154 || aref_invalid(s, chanlist[i])) {
150 printk("bad chanlist[%d]=0x%08x\n", i, 155 printk(KERN_ERR "bad chanlist[%d]=0x%08x\n",
151 chanlist[i]); 156 i, chanlist[i]);
152 return -EINVAL; 157 return -EINVAL;
153 } 158 }
154 } 159 }
155 } else { 160 } else {
156 printk("comedi: (bug) no range type list!\n"); 161 printk(KERN_ERR "comedi: (bug) no range type list!\n");
157 return -EINVAL; 162 return -EINVAL;
158 } 163 }
159 return 0; 164 return 0;
160} 165}
166EXPORT_SYMBOL(comedi_check_chanlist);
diff --git a/drivers/staging/comedi/wrapper.h b/drivers/staging/comedi/wrapper.h
deleted file mode 100644
index 77fc673900e9..000000000000
--- a/drivers/staging/comedi/wrapper.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 linux/wrapper.h compatibility header
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __COMPAT_LINUX_WRAPPER_H_
20#define __COMPAT_LINUX_WRAPPER_H_
21
22#define mem_map_reserve(p) set_bit(PG_reserved, &((p)->flags))
23#define mem_map_unreserve(p) clear_bit(PG_reserved, &((p)->flags))
24
25#endif /* __COMPAT_LINUX_WRAPPER_H_ */
diff --git a/drivers/staging/crystalhd/TODO b/drivers/staging/crystalhd/TODO
index 69be5d0cb80c..daca2d4d2a2f 100644
--- a/drivers/staging/crystalhd/TODO
+++ b/drivers/staging/crystalhd/TODO
@@ -1,7 +1,6 @@
1- Testing 1- Testing
2- Cleanup return codes 2- Cleanup return codes
3- Cleanup typedefs 3- Cleanup typedefs
4- Cleanup all WIN* references
5- Allocate an Accelerator device class specific Major number, 4- Allocate an Accelerator device class specific Major number,
6 since we don't have any other open sourced accelerators, it is the only 5 since we don't have any other open sourced accelerators, it is the only
7 one in that category for now. 6 one in that category for now.
diff --git a/drivers/staging/crystalhd/bc_dts_defs.h b/drivers/staging/crystalhd/bc_dts_defs.h
index c34cc07127b8..778e76af0528 100644
--- a/drivers/staging/crystalhd/bc_dts_defs.h
+++ b/drivers/staging/crystalhd/bc_dts_defs.h
@@ -26,12 +26,10 @@
26#ifndef _BC_DTS_DEFS_H_ 26#ifndef _BC_DTS_DEFS_H_
27#define _BC_DTS_DEFS_H_ 27#define _BC_DTS_DEFS_H_
28 28
29#include "bc_dts_types.h"
30
31/* BIT Mask */ 29/* BIT Mask */
32#define BC_BIT(_x) (1 << (_x)) 30#define BC_BIT(_x) (1 << (_x))
33 31
34typedef enum _BC_STATUS { 32enum BC_STATUS {
35 BC_STS_SUCCESS = 0, 33 BC_STS_SUCCESS = 0,
36 BC_STS_INV_ARG = 1, 34 BC_STS_INV_ARG = 1,
37 BC_STS_BUSY = 2, 35 BC_STS_BUSY = 2,
@@ -62,7 +60,7 @@ typedef enum _BC_STATUS {
62 60
63 /* Must be the last one.*/ 61 /* Must be the last one.*/
64 BC_STS_ERROR = -1 62 BC_STS_ERROR = -1
65} BC_STATUS; 63};
66 64
67/*------------------------------------------------------* 65/*------------------------------------------------------*
68 * Registry Key Definitions * 66 * Registry Key Definitions *
@@ -81,14 +79,14 @@ typedef enum _BC_STATUS {
81 * 79 *
82 */ 80 */
83 81
84typedef enum _BC_SW_OPTIONS { 82enum BC_SW_OPTIONS {
85 BC_OPT_DOSER_OUT_ENCRYPT = BC_BIT(3), 83 BC_OPT_DOSER_OUT_ENCRYPT = BC_BIT(3),
86 BC_OPT_LINK_OUT_ENCRYPT = BC_BIT(29), 84 BC_OPT_LINK_OUT_ENCRYPT = BC_BIT(29),
87} BC_SW_OPTIONS; 85};
88 86
89typedef struct _BC_REG_CONFIG{ 87struct BC_REG_CONFIG{
90 uint32_t DbgOptions; 88 uint32_t DbgOptions;
91} BC_REG_CONFIG; 89};
92 90
93#if defined(__KERNEL__) || defined(__LINUX_USER__) 91#if defined(__KERNEL__) || defined(__LINUX_USER__)
94#else 92#else
@@ -108,7 +106,7 @@ typedef struct _BC_REG_CONFIG{
108 */ 106 */
109 107
110/* To allow multiple apps to open the device. */ 108/* To allow multiple apps to open the device. */
111enum _DtsDeviceOpenMode { 109enum DtsDeviceOpenMode {
112 DTS_PLAYBACK_MODE = 0, 110 DTS_PLAYBACK_MODE = 0,
113 DTS_DIAG_MODE, 111 DTS_DIAG_MODE,
114 DTS_MONITOR_MODE, 112 DTS_MONITOR_MODE,
@@ -116,7 +114,7 @@ enum _DtsDeviceOpenMode {
116}; 114};
117 115
118/* To enable the filter to selectively enable/disable fixes or erratas */ 116/* To enable the filter to selectively enable/disable fixes or erratas */
119enum _DtsDeviceFixMode { 117enum DtsDeviceFixMode {
120 DTS_LOAD_NEW_FW = BC_BIT(8), 118 DTS_LOAD_NEW_FW = BC_BIT(8),
121 DTS_LOAD_FILE_PLAY_FW = BC_BIT(9), 119 DTS_LOAD_FILE_PLAY_FW = BC_BIT(9),
122 DTS_DISK_FMT_BD = BC_BIT(10), 120 DTS_DISK_FMT_BD = BC_BIT(10),
@@ -133,7 +131,7 @@ enum _DtsDeviceFixMode {
133#define DTS_DFLT_CLOCK(x) (x<<19) 131#define DTS_DFLT_CLOCK(x) (x<<19)
134 132
135/* F/W File Version corresponding to S/W Releases */ 133/* F/W File Version corresponding to S/W Releases */
136enum _FW_FILE_VER { 134enum FW_FILE_VER {
137 /* S/W release: 02.04.02 F/W release 2.12.2.0 */ 135 /* S/W release: 02.04.02 F/W release 2.12.2.0 */
138 BC_FW_VER_020402 = ((12<<16) | (2<<8) | (0)) 136 BC_FW_VER_020402 = ((12<<16) | (2<<8) | (0))
139}; 137};
@@ -141,7 +139,7 @@ enum _FW_FILE_VER {
141/*------------------------------------------------------* 139/*------------------------------------------------------*
142 * Stream Types for DtsOpenDecoder() * 140 * Stream Types for DtsOpenDecoder() *
143 *------------------------------------------------------*/ 141 *------------------------------------------------------*/
144enum _DtsOpenDecStreamTypes { 142enum DtsOpenDecStreamTypes {
145 BC_STREAM_TYPE_ES = 0, 143 BC_STREAM_TYPE_ES = 0,
146 BC_STREAM_TYPE_PES = 1, 144 BC_STREAM_TYPE_PES = 1,
147 BC_STREAM_TYPE_TS = 2, 145 BC_STREAM_TYPE_TS = 2,
@@ -151,7 +149,7 @@ enum _DtsOpenDecStreamTypes {
151/*------------------------------------------------------* 149/*------------------------------------------------------*
152 * Video Algorithms for DtsSetVideoParams() * 150 * Video Algorithms for DtsSetVideoParams() *
153 *------------------------------------------------------*/ 151 *------------------------------------------------------*/
154enum _DtsSetVideoParamsAlgo { 152enum DtsSetVideoParamsAlgo {
155 BC_VID_ALGO_H264 = 0, 153 BC_VID_ALGO_H264 = 0,
156 BC_VID_ALGO_MPEG2 = 1, 154 BC_VID_ALGO_MPEG2 = 1,
157 BC_VID_ALGO_VC1 = 4, 155 BC_VID_ALGO_VC1 = 4,
@@ -163,7 +161,7 @@ enum _DtsSetVideoParamsAlgo {
163 *------------------------------------------------------*/ 161 *------------------------------------------------------*/
164#define BC_MPEG_VALID_PANSCAN (1) 162#define BC_MPEG_VALID_PANSCAN (1)
165 163
166typedef struct _BC_PIB_EXT_MPEG { 164struct BC_PIB_EXT_MPEG {
167 uint32_t valid; 165 uint32_t valid;
168 /* Always valid, defaults to picture size if no 166 /* Always valid, defaults to picture size if no
169 * sequence display extension in the stream. */ 167 * sequence display extension in the stream. */
@@ -175,8 +173,7 @@ typedef struct _BC_PIB_EXT_MPEG {
175 uint32_t offset_count; 173 uint32_t offset_count;
176 int32_t horizontal_offset[3]; 174 int32_t horizontal_offset[3];
177 int32_t vertical_offset[3]; 175 int32_t vertical_offset[3];
178 176};
179} BC_PIB_EXT_MPEG;
180 177
181/*------------------------------------------------------* 178/*------------------------------------------------------*
182 * H.264 Extension to the PPB * 179 * H.264 Extension to the PPB *
@@ -186,7 +183,7 @@ typedef struct _BC_PIB_EXT_MPEG {
186#define H264_VALID_SPS_CROP (2) 183#define H264_VALID_SPS_CROP (2)
187#define H264_VALID_VUI (4) 184#define H264_VALID_VUI (4)
188 185
189typedef struct _BC_PIB_EXT_H264 { 186struct BC_PIB_EXT_H264 {
190 /* 'valid' specifies which fields (or sets of 187 /* 'valid' specifies which fields (or sets of
191 * fields) below are valid. If the corresponding 188 * fields) below are valid. If the corresponding
192 * bit in 'valid' is NOT set then that field(s) 189 * bit in 'valid' is NOT set then that field(s)
@@ -209,15 +206,14 @@ typedef struct _BC_PIB_EXT_H264 {
209 /* H264_VALID_VUI */ 206 /* H264_VALID_VUI */
210 uint32_t chroma_top; 207 uint32_t chroma_top;
211 uint32_t chroma_bottom; 208 uint32_t chroma_bottom;
212 209};
213} BC_PIB_EXT_H264;
214 210
215/*------------------------------------------------------* 211/*------------------------------------------------------*
216 * VC1 Extension to the PPB * 212 * VC1 Extension to the PPB *
217 *------------------------------------------------------*/ 213 *------------------------------------------------------*/
218#define VC1_VALID_PANSCAN (1) 214#define VC1_VALID_PANSCAN (1)
219 215
220typedef struct _BC_PIB_EXT_VC1 { 216struct BC_PIB_EXT_VC1 {
221 uint32_t valid; 217 uint32_t valid;
222 218
223 /* Always valid, defaults to picture size if no 219 /* Always valid, defaults to picture size if no
@@ -231,14 +227,12 @@ typedef struct _BC_PIB_EXT_VC1 {
231 int32_t ps_vert_offset[4]; 227 int32_t ps_vert_offset[4];
232 int32_t ps_width[4]; 228 int32_t ps_width[4];
233 int32_t ps_height[4]; 229 int32_t ps_height[4];
234 230};
235} BC_PIB_EXT_VC1;
236
237 231
238/*------------------------------------------------------* 232/*------------------------------------------------------*
239 * Picture Information Block * 233 * Picture Information Block *
240 *------------------------------------------------------*/ 234 *------------------------------------------------------*/
241#if defined(_WIN32) || defined(_WIN64) || defined(__LINUX_USER__) 235#if defined(__LINUX_USER__)
242/* Values for 'pulldown' field. '0' means no pulldown information 236/* Values for 'pulldown' field. '0' means no pulldown information
243 * was present for this picture. */ 237 * was present for this picture. */
244enum { 238enum {
@@ -358,7 +352,7 @@ enum {
358 352
359#define VDEC_FLAG_PICTURE_META_DATA_PRESENT (0x40000) 353#define VDEC_FLAG_PICTURE_META_DATA_PRESENT (0x40000)
360 354
361#endif /* _WIN32 || _WIN64 */ 355#endif /* __LINUX_USER__ */
362 356
363enum _BC_OUTPUT_FORMAT { 357enum _BC_OUTPUT_FORMAT {
364 MODE420 = 0x0, 358 MODE420 = 0x0,
@@ -366,7 +360,7 @@ enum _BC_OUTPUT_FORMAT {
366 MODE422_UYVY = 0x2, 360 MODE422_UYVY = 0x2,
367}; 361};
368 362
369typedef struct _BC_PIC_INFO_BLOCK { 363struct BC_PIC_INFO_BLOCK {
370 /* Common fields. */ 364 /* Common fields. */
371 uint64_t timeStamp; /* Timestamp */ 365 uint64_t timeStamp; /* Timestamp */
372 uint32_t picture_number; /* Ordinal display number */ 366 uint32_t picture_number; /* Ordinal display number */
@@ -386,18 +380,18 @@ typedef struct _BC_PIC_INFO_BLOCK {
386 380
387 /* Protocol-specific extensions. */ 381 /* Protocol-specific extensions. */
388 union { 382 union {
389 BC_PIB_EXT_H264 h264; 383 struct BC_PIB_EXT_H264 h264;
390 BC_PIB_EXT_MPEG mpeg; 384 struct BC_PIB_EXT_MPEG mpeg;
391 BC_PIB_EXT_VC1 vc1; 385 struct BC_PIB_EXT_VC1 vc1;
392 } other; 386 } other;
393 387
394} BC_PIC_INFO_BLOCK, *PBC_PIC_INFO_BLOCK; 388};
395 389
396/*------------------------------------------------------* 390/*------------------------------------------------------*
397 * ProcOut Info * 391 * ProcOut Info *
398 *------------------------------------------------------*/ 392 *------------------------------------------------------*/
399/* Optional flags for ProcOut Interface.*/ 393/* Optional flags for ProcOut Interface.*/
400enum _POUT_OPTIONAL_IN_FLAGS_{ 394enum POUT_OPTIONAL_IN_FLAGS_{
401 /* Flags from App to Device */ 395 /* Flags from App to Device */
402 BC_POUT_FLAGS_YV12 = 0x01, /* Copy Data in YV12 format */ 396 BC_POUT_FLAGS_YV12 = 0x01, /* Copy Data in YV12 format */
403 BC_POUT_FLAGS_STRIDE = 0x02, /* Stride size is valid. */ 397 BC_POUT_FLAGS_STRIDE = 0x02, /* Stride size is valid. */
@@ -412,17 +406,13 @@ enum _POUT_OPTIONAL_IN_FLAGS_{
412 BC_POUT_FLAGS_FLD_BOT = 0x80000, /* Bottom Field data */ 406 BC_POUT_FLAGS_FLD_BOT = 0x80000, /* Bottom Field data */
413}; 407};
414 408
415#if defined(__KERNEL__) || defined(__LINUX_USER__) 409typedef enum BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, void *pOut);
416typedef BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, void *pOut);
417#else
418typedef BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, struct _BC_DTS_PROC_OUT *pOut);
419#endif
420 410
421/* Line 21 Closed Caption */ 411/* Line 21 Closed Caption */
422/* User Data */ 412/* User Data */
423#define MAX_UD_SIZE 1792 /* 1920 - 128 */ 413#define MAX_UD_SIZE 1792 /* 1920 - 128 */
424 414
425typedef struct _BC_DTS_PROC_OUT { 415struct BC_DTS_PROC_OUT {
426 uint8_t *Ybuff; /* Caller Supplied buffer for Y data */ 416 uint8_t *Ybuff; /* Caller Supplied buffer for Y data */
427 uint32_t YbuffSz; /* Caller Supplied Y buffer size */ 417 uint32_t YbuffSz; /* Caller Supplied Y buffer size */
428 uint32_t YBuffDoneSz; /* Transferred Y datasize */ 418 uint32_t YBuffDoneSz; /* Transferred Y datasize */
@@ -436,7 +426,7 @@ typedef struct _BC_DTS_PROC_OUT {
436 426
437 uint32_t discCnt; /* Picture discontinuity count */ 427 uint32_t discCnt; /* Picture discontinuity count */
438 428
439 BC_PIC_INFO_BLOCK PicInfo; /* Picture Information Block Data */ 429 struct BC_PIC_INFO_BLOCK PicInfo; /* Picture Information Block Data */
440 430
441 /* Line 21 Closed Caption */ 431 /* Line 21 Closed Caption */
442 /* User Data */ 432 /* User Data */
@@ -450,9 +440,9 @@ typedef struct _BC_DTS_PROC_OUT {
450 uint8_t bPibEnc; /* PIB encrypted */ 440 uint8_t bPibEnc; /* PIB encrypted */
451 uint8_t bRevertScramble; 441 uint8_t bRevertScramble;
452 442
453} BC_DTS_PROC_OUT; 443};
454 444
455typedef struct _BC_DTS_STATUS { 445struct BC_DTS_STATUS {
456 uint8_t ReadyListCount; /* Number of frames in ready list (reported by driver) */ 446 uint8_t ReadyListCount; /* Number of frames in ready list (reported by driver) */
457 uint8_t FreeListCount; /* Number of frame buffers free. (reported by driver) */ 447 uint8_t FreeListCount; /* Number of frame buffers free. (reported by driver) */
458 uint8_t PowerStateChange; /* Number of active state power transitions (reported by driver) */ 448 uint8_t PowerStateChange; /* Number of active state power transitions (reported by driver) */
@@ -479,7 +469,7 @@ typedef struct _BC_DTS_STATUS {
479 * back from the driver */ 469 * back from the driver */
480 uint8_t reserved__[16]; 470 uint8_t reserved__[16];
481 471
482} BC_DTS_STATUS; 472};
483 473
484#define BC_SWAP32(_v) \ 474#define BC_SWAP32(_v) \
485 ((((_v) & 0xFF000000)>>24)| \ 475 ((((_v) & 0xFF000000)>>24)| \
diff --git a/drivers/staging/crystalhd/bc_dts_glob_lnx.h b/drivers/staging/crystalhd/bc_dts_glob_lnx.h
index b3125e3e0372..80b7a73a9d46 100644
--- a/drivers/staging/crystalhd/bc_dts_glob_lnx.h
+++ b/drivers/staging/crystalhd/bc_dts_glob_lnx.h
@@ -40,7 +40,7 @@
40#include <sys/time.h> 40#include <sys/time.h>
41#include <time.h> 41#include <time.h>
42#include <arpa/inet.h> 42#include <arpa/inet.h>
43#include <asm/param.h> 43#include <linux/param.h>
44#include <linux/ioctl.h> 44#include <linux/ioctl.h>
45#include <sys/select.h> 45#include <sys/select.h>
46 46
@@ -58,7 +58,7 @@
58 * These are SW stack tunable parameters shared 58 * These are SW stack tunable parameters shared
59 * between the driver and the application. 59 * between the driver and the application.
60 */ 60 */
61enum _BC_DTS_GLOBALS { 61enum BC_DTS_GLOBALS {
62 BC_MAX_FW_CMD_BUFF_SZ = 0x40, /* FW passthrough cmd/rsp buffer size */ 62 BC_MAX_FW_CMD_BUFF_SZ = 0x40, /* FW passthrough cmd/rsp buffer size */
63 PCI_CFG_SIZE = 256, /* PCI config size buffer */ 63 PCI_CFG_SIZE = 256, /* PCI config size buffer */
64 BC_IOCTL_DATA_POOL_SIZE = 8, /* BC_IOCTL_DATA Pool size */ 64 BC_IOCTL_DATA_POOL_SIZE = 8, /* BC_IOCTL_DATA Pool size */
@@ -70,62 +70,62 @@ enum _BC_DTS_GLOBALS {
70 BC_INFIFO_THRESHOLD = 0x10000, 70 BC_INFIFO_THRESHOLD = 0x10000,
71}; 71};
72 72
73typedef struct _BC_CMD_REG_ACC { 73struct BC_CMD_REG_ACC {
74 uint32_t Offset; 74 uint32_t Offset;
75 uint32_t Value; 75 uint32_t Value;
76} BC_CMD_REG_ACC; 76};
77 77
78typedef struct _BC_CMD_DEV_MEM { 78struct BC_CMD_DEV_MEM {
79 uint32_t StartOff; 79 uint32_t StartOff;
80 uint32_t NumDwords; 80 uint32_t NumDwords;
81 uint32_t Rsrd; 81 uint32_t Rsrd;
82} BC_CMD_DEV_MEM; 82};
83 83
84/* FW Passthrough command structure */ 84/* FW Passthrough command structure */
85enum _bc_fw_cmd_flags { 85enum bc_fw_cmd_flags {
86 BC_FW_CMD_FLAGS_NONE = 0, 86 BC_FW_CMD_FLAGS_NONE = 0,
87 BC_FW_CMD_PIB_QS = 0x01, 87 BC_FW_CMD_PIB_QS = 0x01,
88}; 88};
89 89
90typedef struct _BC_FW_CMD { 90struct BC_FW_CMD {
91 uint32_t cmd[BC_MAX_FW_CMD_BUFF_SZ]; 91 uint32_t cmd[BC_MAX_FW_CMD_BUFF_SZ];
92 uint32_t rsp[BC_MAX_FW_CMD_BUFF_SZ]; 92 uint32_t rsp[BC_MAX_FW_CMD_BUFF_SZ];
93 uint32_t flags; 93 uint32_t flags;
94 uint32_t add_data; 94 uint32_t add_data;
95} BC_FW_CMD, *PBC_FW_CMD; 95};
96 96
97typedef struct _BC_HW_TYPE { 97struct BC_HW_TYPE {
98 uint16_t PciDevId; 98 uint16_t PciDevId;
99 uint16_t PciVenId; 99 uint16_t PciVenId;
100 uint8_t HwRev; 100 uint8_t HwRev;
101 uint8_t Align[3]; 101 uint8_t Align[3];
102} BC_HW_TYPE; 102};
103 103
104typedef struct _BC_PCI_CFG { 104struct BC_PCI_CFG {
105 uint32_t Size; 105 uint32_t Size;
106 uint32_t Offset; 106 uint32_t Offset;
107 uint8_t pci_cfg_space[PCI_CFG_SIZE]; 107 uint8_t pci_cfg_space[PCI_CFG_SIZE];
108} BC_PCI_CFG; 108};
109 109
110typedef struct _BC_VERSION_INFO_ { 110struct BC_VERSION_INFO {
111 uint8_t DriverMajor; 111 uint8_t DriverMajor;
112 uint8_t DriverMinor; 112 uint8_t DriverMinor;
113 uint16_t DriverRevision; 113 uint16_t DriverRevision;
114} BC_VERSION_INFO; 114};
115 115
116typedef struct _BC_START_RX_CAP_ { 116struct BC_START_RX_CAP {
117 uint32_t Rsrd; 117 uint32_t Rsrd;
118 uint32_t StartDeliveryThsh; 118 uint32_t StartDeliveryThsh;
119 uint32_t PauseThsh; 119 uint32_t PauseThsh;
120 uint32_t ResumeThsh; 120 uint32_t ResumeThsh;
121} BC_START_RX_CAP; 121};
122 122
123typedef struct _BC_FLUSH_RX_CAP_ { 123struct BC_FLUSH_RX_CAP {
124 uint32_t Rsrd; 124 uint32_t Rsrd;
125 uint32_t bDiscardOnly; 125 uint32_t bDiscardOnly;
126} BC_FLUSH_RX_CAP; 126};
127 127
128typedef struct _BC_DTS_STATS { 128struct BC_DTS_STATS {
129 uint8_t drvRLL; 129 uint8_t drvRLL;
130 uint8_t drvFLL; 130 uint8_t drvFLL;
131 uint8_t eosDetected; 131 uint8_t eosDetected;
@@ -154,18 +154,18 @@ typedef struct _BC_DTS_STATS {
154 uint32_t DrvRepeatedFrms; 154 uint32_t DrvRepeatedFrms;
155 uint32_t res1[13]; 155 uint32_t res1[13];
156 156
157} BC_DTS_STATS; 157};
158 158
159typedef struct _BC_PROC_INPUT_ { 159struct BC_PROC_INPUT {
160 uint8_t *pDmaBuff; 160 uint8_t *pDmaBuff;
161 uint32_t BuffSz; 161 uint32_t BuffSz;
162 uint8_t Mapped; 162 uint8_t Mapped;
163 uint8_t Encrypted; 163 uint8_t Encrypted;
164 uint8_t Rsrd[2]; 164 uint8_t Rsrd[2];
165 uint32_t DramOffset; /* For debug use only */ 165 uint32_t DramOffset; /* For debug use only */
166} BC_PROC_INPUT, *PBC_PROC_INPUT; 166};
167 167
168typedef struct _BC_DEC_YUV_BUFFS { 168struct BC_DEC_YUV_BUFFS {
169 uint32_t b422Mode; 169 uint32_t b422Mode;
170 uint8_t *YuvBuff; 170 uint8_t *YuvBuff;
171 uint32_t YuvBuffSz; 171 uint32_t YuvBuffSz;
@@ -173,9 +173,9 @@ typedef struct _BC_DEC_YUV_BUFFS {
173 uint32_t YBuffDoneSz; 173 uint32_t YBuffDoneSz;
174 uint32_t UVBuffDoneSz; 174 uint32_t UVBuffDoneSz;
175 uint32_t RefCnt; 175 uint32_t RefCnt;
176} BC_DEC_YUV_BUFFS; 176};
177 177
178enum _DECOUT_COMPLETION_FLAGS{ 178enum DECOUT_COMPLETION_FLAGS{
179 COMP_FLAG_NO_INFO = 0x00, 179 COMP_FLAG_NO_INFO = 0x00,
180 COMP_FLAG_FMT_CHANGE = 0x01, 180 COMP_FLAG_FMT_CHANGE = 0x01,
181 COMP_FLAG_PIB_VALID = 0x02, 181 COMP_FLAG_PIB_VALID = 0x02,
@@ -184,47 +184,47 @@ enum _DECOUT_COMPLETION_FLAGS{
184 COMP_FLAG_DATA_BOT = 0x10, 184 COMP_FLAG_DATA_BOT = 0x10,
185}; 185};
186 186
187typedef struct _BC_DEC_OUT_BUFF{ 187struct BC_DEC_OUT_BUFF{
188 BC_DEC_YUV_BUFFS OutPutBuffs; 188 struct BC_DEC_YUV_BUFFS OutPutBuffs;
189 BC_PIC_INFO_BLOCK PibInfo; 189 struct BC_PIC_INFO_BLOCK PibInfo;
190 uint32_t Flags; 190 uint32_t Flags;
191 uint32_t BadFrCnt; 191 uint32_t BadFrCnt;
192} BC_DEC_OUT_BUFF; 192};
193 193
194typedef struct _BC_NOTIFY_MODE { 194struct BC_NOTIFY_MODE {
195 uint32_t Mode; 195 uint32_t Mode;
196 uint32_t Rsvr[3]; 196 uint32_t Rsvr[3];
197} BC_NOTIFY_MODE; 197};
198 198
199typedef struct _BC_CLOCK { 199struct BC_CLOCK {
200 uint32_t clk; 200 uint32_t clk;
201 uint32_t Rsvr[3]; 201 uint32_t Rsvr[3];
202} BC_CLOCK; 202};
203 203
204typedef struct _BC_IOCTL_DATA { 204struct BC_IOCTL_DATA {
205 BC_STATUS RetSts; 205 enum BC_STATUS RetSts;
206 uint32_t IoctlDataSz; 206 uint32_t IoctlDataSz;
207 uint32_t Timeout; 207 uint32_t Timeout;
208 union { 208 union {
209 BC_CMD_REG_ACC regAcc; 209 struct BC_CMD_REG_ACC regAcc;
210 BC_CMD_DEV_MEM devMem; 210 struct BC_CMD_DEV_MEM devMem;
211 BC_FW_CMD fwCmd; 211 struct BC_FW_CMD fwCmd;
212 BC_HW_TYPE hwType; 212 struct BC_HW_TYPE hwType;
213 BC_PCI_CFG pciCfg; 213 struct BC_PCI_CFG pciCfg;
214 BC_VERSION_INFO VerInfo; 214 struct BC_VERSION_INFO VerInfo;
215 BC_PROC_INPUT ProcInput; 215 struct BC_PROC_INPUT ProcInput;
216 BC_DEC_YUV_BUFFS RxBuffs; 216 struct BC_DEC_YUV_BUFFS RxBuffs;
217 BC_DEC_OUT_BUFF DecOutData; 217 struct BC_DEC_OUT_BUFF DecOutData;
218 BC_START_RX_CAP RxCap; 218 struct BC_START_RX_CAP RxCap;
219 BC_FLUSH_RX_CAP FlushRxCap; 219 struct BC_FLUSH_RX_CAP FlushRxCap;
220 BC_DTS_STATS drvStat; 220 struct BC_DTS_STATS drvStat;
221 BC_NOTIFY_MODE NotifyMode; 221 struct BC_NOTIFY_MODE NotifyMode;
222 BC_CLOCK clockValue; 222 struct BC_CLOCK clockValue;
223 } u; 223 } u;
224 struct _BC_IOCTL_DATA *next; 224 struct _BC_IOCTL_DATA *next;
225} BC_IOCTL_DATA; 225};
226 226
227typedef enum _BC_DRV_CMD{ 227enum BC_DRV_CMD {
228 DRV_CMD_VERSION = 0, /* Get SW version */ 228 DRV_CMD_VERSION = 0, /* Get SW version */
229 DRV_CMD_GET_HWTYPE, /* Get HW version and type Dozer/Tank */ 229 DRV_CMD_GET_HWTYPE, /* Get HW version and type Dozer/Tank */
230 DRV_CMD_REG_RD, /* Read Device Register */ 230 DRV_CMD_REG_RD, /* Read Device Register */
@@ -249,12 +249,12 @@ typedef enum _BC_DRV_CMD{
249 249
250 /* MUST be the last one.. */ 250 /* MUST be the last one.. */
251 DRV_CMD_END, /* End of the List.. */ 251 DRV_CMD_END, /* End of the List.. */
252} BC_DRV_CMD; 252};
253 253
254#define BC_IOC_BASE 'b' 254#define BC_IOC_BASE 'b'
255#define BC_IOC_VOID _IOC_NONE 255#define BC_IOC_VOID _IOC_NONE
256#define BC_IOC_IOWR(nr, type) _IOWR(BC_IOC_BASE, nr, type) 256#define BC_IOC_IOWR(nr, type) _IOWR(BC_IOC_BASE, nr, type)
257#define BC_IOCTL_MB BC_IOCTL_DATA 257#define BC_IOCTL_MB struct BC_IOCTL_DATA
258 258
259#define BCM_IOC_GET_VERSION BC_IOC_IOWR(DRV_CMD_VERSION, BC_IOCTL_MB) 259#define BCM_IOC_GET_VERSION BC_IOC_IOWR(DRV_CMD_VERSION, BC_IOCTL_MB)
260#define BCM_IOC_GET_HWTYPE BC_IOC_IOWR(DRV_CMD_GET_HWTYPE, BC_IOCTL_MB) 260#define BCM_IOC_GET_HWTYPE BC_IOC_IOWR(DRV_CMD_GET_HWTYPE, BC_IOCTL_MB)
@@ -280,17 +280,16 @@ typedef enum _BC_DRV_CMD{
280#define BCM_IOC_END BC_IOC_VOID 280#define BCM_IOC_END BC_IOC_VOID
281 281
282/* Wrapper for main IOCTL data */ 282/* Wrapper for main IOCTL data */
283typedef struct _crystalhd_ioctl_data { 283struct crystalhd_ioctl_data {
284 BC_IOCTL_DATA udata; /* IOCTL from App..*/ 284 struct BC_IOCTL_DATA udata; /* IOCTL from App..*/
285 uint32_t u_id; /* Driver specific user ID */ 285 uint32_t u_id; /* Driver specific user ID */
286 uint32_t cmd; /* Cmd ID for driver's use. */ 286 uint32_t cmd; /* Cmd ID for driver's use. */
287 void *add_cdata; /* Additional command specific data..*/ 287 void *add_cdata; /* Additional command specific data..*/
288 uint32_t add_cdata_sz; /* Additional command specific data size */ 288 uint32_t add_cdata_sz; /* Additional command specific data size */
289 struct _crystalhd_ioctl_data *next; /* List/Fifo management */ 289 struct crystalhd_ioctl_data *next; /* List/Fifo management */
290} crystalhd_ioctl_data; 290};
291
292 291
293enum _crystalhd_kmod_ver{ 292enum crystalhd_kmod_ver{
294 crystalhd_kmod_major = 0, 293 crystalhd_kmod_major = 0,
295 crystalhd_kmod_minor = 9, 294 crystalhd_kmod_minor = 9,
296 crystalhd_kmod_rev = 27, 295 crystalhd_kmod_rev = 27,
diff --git a/drivers/staging/crystalhd/bc_dts_types.h b/drivers/staging/crystalhd/bc_dts_types.h
index ac0c81717385..6fd8089415d6 100644
--- a/drivers/staging/crystalhd/bc_dts_types.h
+++ b/drivers/staging/crystalhd/bc_dts_types.h
@@ -25,19 +25,10 @@
25#ifndef _BC_DTS_TYPES_H_ 25#ifndef _BC_DTS_TYPES_H_
26#define _BC_DTS_TYPES_H_ 26#define _BC_DTS_TYPES_H_
27 27
28#ifdef __LINUX_USER__ // Don't include these for KERNEL.. 28#ifdef __LINUX_USER__ /* Don't include these for KERNEL.. */
29#include <stdint.h> 29#include <stdint.h>
30#endif 30#endif
31 31
32#if defined(_WIN64) || defined(_WIN32)
33typedef uint32_t U32;
34typedef int32_t S32;
35typedef uint16_t U16;
36typedef int16_t S16;
37typedef unsigned char U8;
38typedef char S8;
39#endif
40
41#ifndef PVOID 32#ifndef PVOID
42typedef void *PVOID; 33typedef void *PVOID;
43#endif 34#endif
@@ -46,20 +37,6 @@ typedef void *PVOID;
46typedef int BOOL; 37typedef int BOOL;
47#endif 38#endif
48 39
49#ifdef WIN32
50 typedef unsigned __int64 U64;
51#elif defined(_WIN64)
52 typedef uint64_t U64;
53#endif
54
55#ifdef _WIN64
56#if !(defined(POINTER_32))
57#define POINTER_32 __ptr32
58#endif
59#else /* _WIN32 */
60#define POINTER_32
61#endif
62
63#if defined(__KERNEL__) || defined(__LINUX_USER__) 40#if defined(__KERNEL__) || defined(__LINUX_USER__)
64 41
65#ifdef __LINUX_USER__ /* Don't include these for KERNEL */ 42#ifdef __LINUX_USER__ /* Don't include these for KERNEL */
diff --git a/drivers/staging/crystalhd/bcm_70012_regs.h b/drivers/staging/crystalhd/bcm_70012_regs.h
index 6922f54e432f..f3ab3146cd90 100644
--- a/drivers/staging/crystalhd/bcm_70012_regs.h
+++ b/drivers/staging/crystalhd/bcm_70012_regs.h
@@ -25,22 +25,22 @@
25 * m = memory, c = core, r = register, f = field, d = data. 25 * m = memory, c = core, r = register, f = field, d = data.
26 */ 26 */
27#if !defined(GET_FIELD) && !defined(SET_FIELD) 27#if !defined(GET_FIELD) && !defined(SET_FIELD)
28#define BRCM_ALIGN(c,r,f) c##_##r##_##f##_ALIGN 28#define BRCM_ALIGN(c, r, f) c##_##r##_##f##_ALIGN
29#define BRCM_BITS(c,r,f) c##_##r##_##f##_BITS 29#define BRCM_BITS(c, r, f) c##_##r##_##f##_BITS
30#define BRCM_MASK(c,r,f) c##_##r##_##f##_MASK 30#define BRCM_MASK(c, r, f) c##_##r##_##f##_MASK
31#define BRCM_SHIFT(c,r,f) c##_##r##_##f##_SHIFT 31#define BRCM_SHIFT(c, r, f) c##_##r##_##f##_SHIFT
32 32
33#define GET_FIELD(m,c,r,f) \ 33#define GET_FIELD(m, c, r, f) \
34 ((((m) & BRCM_MASK(c,r,f)) >> BRCM_SHIFT(c,r,f)) << BRCM_ALIGN(c,r,f)) 34 ((((m) & BRCM_MASK(c, r, f)) >> BRCM_SHIFT(c, r, f)) << BRCM_ALIGN(c, r, f))
35 35
36#define SET_FIELD(m,c,r,f,d) \ 36#define SET_FIELD(m, c, r, f, d) \
37 ((m) = (((m) & ~BRCM_MASK(c,r,f)) | ((((d) >> BRCM_ALIGN(c,r,f)) << \ 37 ((m) = (((m) & ~BRCM_MASK(c, r, f)) | ((((d) >> BRCM_ALIGN(c, r, f)) << \
38 BRCM_SHIFT(c,r,f)) & BRCM_MASK(c,r,f))) \ 38 BRCM_SHIFT(c, r, f)) & BRCM_MASK(c, r, f))) \
39 ) 39 )
40 40
41#define SET_TYPE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##d) 41#define SET_TYPE_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, c##_##d)
42#define SET_NAME_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,c##_##r##_##f##_##d) 42#define SET_NAME_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, c##_##r##_##f##_##d)
43#define SET_VALUE_FIELD(m,c,r,f,d) SET_FIELD(m,c,r,f,d) 43#define SET_VALUE_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, d)
44 44
45#endif /* GET & SET */ 45#endif /* GET & SET */
46 46
diff --git a/drivers/staging/crystalhd/crystalhd_cmds.c b/drivers/staging/crystalhd/crystalhd_cmds.c
index 26145a8d0f78..1429608544d6 100644
--- a/drivers/staging/crystalhd/crystalhd_cmds.c
+++ b/drivers/staging/crystalhd/crystalhd_cmds.c
@@ -69,8 +69,8 @@ static void bc_cproc_mark_pwr_state(struct crystalhd_cmd *ctx)
69 } 69 }
70} 70}
71 71
72static BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx, 72static enum BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx,
73 crystalhd_ioctl_data *idata) 73 struct crystalhd_ioctl_data *idata)
74{ 74{
75 int rc = 0, i = 0; 75 int rc = 0, i = 0;
76 76
@@ -88,7 +88,7 @@ static BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx,
88 return BC_STS_SUCCESS; 88 return BC_STS_SUCCESS;
89 } 89 }
90 if (ctx->state != BC_LINK_INVALID) { 90 if (ctx->state != BC_LINK_INVALID) {
91 BCMLOG_ERR("Link invalid state %d \n", ctx->state); 91 BCMLOG_ERR("Link invalid state %d\n", ctx->state);
92 return BC_STS_ERR_USAGE; 92 return BC_STS_ERR_USAGE;
93 } 93 }
94 /* Check for duplicate playback sessions..*/ 94 /* Check for duplicate playback sessions..*/
@@ -111,8 +111,8 @@ static BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx,
111 return crystalhd_hw_setup_dma_rings(&ctx->hw_ctx); 111 return crystalhd_hw_setup_dma_rings(&ctx->hw_ctx);
112} 112}
113 113
114static BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx, 114static enum BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx,
115 crystalhd_ioctl_data *idata) 115 struct crystalhd_ioctl_data *idata)
116{ 116{
117 117
118 if (!ctx || !idata) { 118 if (!ctx || !idata) {
@@ -126,7 +126,8 @@ static BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx,
126} 126}
127 127
128 128
129static BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) 129static enum BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx,
130 struct crystalhd_ioctl_data *idata)
130{ 131{
131 if (!ctx || !idata) { 132 if (!ctx || !idata) {
132 BCMLOG_ERR("Invalid Arg!!\n"); 133 BCMLOG_ERR("Invalid Arg!!\n");
@@ -143,8 +144,8 @@ static BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx, crystalhd_ioctl_
143 return BC_STS_SUCCESS; 144 return BC_STS_SUCCESS;
144} 145}
145 146
146static BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx, 147static enum BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx,
147 crystalhd_ioctl_data *idata) 148 struct crystalhd_ioctl_data *idata)
148{ 149{
149 if (!ctx || !idata) 150 if (!ctx || !idata)
150 return BC_STS_INV_ARG; 151 return BC_STS_INV_ARG;
@@ -153,8 +154,8 @@ static BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx,
153 return BC_STS_SUCCESS; 154 return BC_STS_SUCCESS;
154} 155}
155 156
156static BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx, 157static enum BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx,
157 crystalhd_ioctl_data *idata) 158 struct crystalhd_ioctl_data *idata)
158{ 159{
159 if (!ctx || !idata) 160 if (!ctx || !idata)
160 return BC_STS_INV_ARG; 161 return BC_STS_INV_ARG;
@@ -165,8 +166,8 @@ static BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx,
165 return BC_STS_SUCCESS; 166 return BC_STS_SUCCESS;
166} 167}
167 168
168static BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx, 169static enum BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx,
169 crystalhd_ioctl_data *idata) 170 struct crystalhd_ioctl_data *idata)
170{ 171{
171 if (!ctx || !idata) 172 if (!ctx || !idata)
172 return BC_STS_INV_ARG; 173 return BC_STS_INV_ARG;
@@ -176,8 +177,8 @@ static BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx,
176 return BC_STS_SUCCESS; 177 return BC_STS_SUCCESS;
177} 178}
178 179
179static BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx, 180static enum BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx,
180 crystalhd_ioctl_data *idata) 181 struct crystalhd_ioctl_data *idata)
181{ 182{
182 if (!ctx || !idata) 183 if (!ctx || !idata)
183 return BC_STS_INV_ARG; 184 return BC_STS_INV_ARG;
@@ -188,10 +189,10 @@ static BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx,
188 return BC_STS_SUCCESS; 189 return BC_STS_SUCCESS;
189} 190}
190 191
191static BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx, 192static enum BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx,
192 crystalhd_ioctl_data *idata) 193 struct crystalhd_ioctl_data *idata)
193{ 194{
194 BC_STATUS sts = BC_STS_SUCCESS; 195 enum BC_STATUS sts = BC_STS_SUCCESS;
195 196
196 if (!ctx || !idata || !idata->add_cdata) 197 if (!ctx || !idata || !idata->add_cdata)
197 return BC_STS_INV_ARG; 198 return BC_STS_INV_ARG;
@@ -207,10 +208,10 @@ static BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx,
207 208
208} 209}
209 210
210static BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx, 211static enum BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx,
211 crystalhd_ioctl_data *idata) 212 struct crystalhd_ioctl_data *idata)
212{ 213{
213 BC_STATUS sts = BC_STS_SUCCESS; 214 enum BC_STATUS sts = BC_STS_SUCCESS;
214 215
215 if (!ctx || !idata || !idata->add_cdata) 216 if (!ctx || !idata || !idata->add_cdata)
216 return BC_STS_INV_ARG; 217 return BC_STS_INV_ARG;
@@ -226,11 +227,11 @@ static BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx,
226 return sts; 227 return sts;
227} 228}
228 229
229static BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx, 230static enum BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx,
230 crystalhd_ioctl_data *idata) 231 struct crystalhd_ioctl_data *idata)
231{ 232{
232 uint32_t ix, cnt, off, len; 233 uint32_t ix, cnt, off, len;
233 BC_STATUS sts = BC_STS_SUCCESS; 234 enum BC_STATUS sts = BC_STS_SUCCESS;
234 uint32_t *temp; 235 uint32_t *temp;
235 236
236 if (!ctx || !idata) 237 if (!ctx || !idata)
@@ -258,11 +259,11 @@ static BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx,
258 return sts; 259 return sts;
259} 260}
260 261
261static BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx, 262static enum BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx,
262 crystalhd_ioctl_data *idata) 263 struct crystalhd_ioctl_data *idata)
263{ 264{
264 uint32_t ix, cnt, off, len; 265 uint32_t ix, cnt, off, len;
265 BC_STATUS sts = BC_STS_SUCCESS; 266 enum BC_STATUS sts = BC_STS_SUCCESS;
266 uint32_t *temp; 267 uint32_t *temp;
267 268
268 if (!ctx || !idata) 269 if (!ctx || !idata)
@@ -290,10 +291,10 @@ static BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx,
290 return sts; 291 return sts;
291} 292}
292 293
293static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx, 294static enum BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx,
294 crystalhd_ioctl_data *idata) 295 struct crystalhd_ioctl_data *idata)
295{ 296{
296 BC_STATUS sts = BC_STS_SUCCESS; 297 enum BC_STATUS sts = BC_STS_SUCCESS;
297 298
298 if (!ctx || !idata || !idata->add_cdata || !idata->add_cdata_sz) { 299 if (!ctx || !idata || !idata->add_cdata || !idata->add_cdata_sz) {
299 BCMLOG_ERR("Invalid Arg!!\n"); 300 BCMLOG_ERR("Invalid Arg!!\n");
@@ -301,7 +302,7 @@ static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx,
301 } 302 }
302 303
303 if (ctx->state != BC_LINK_INVALID) { 304 if (ctx->state != BC_LINK_INVALID) {
304 BCMLOG_ERR("Link invalid state %d \n", ctx->state); 305 BCMLOG_ERR("Link invalid state %d\n", ctx->state);
305 return BC_STS_ERR_USAGE; 306 return BC_STS_ERR_USAGE;
306 } 307 }
307 308
@@ -329,13 +330,14 @@ static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx,
329 * Abort pending input transfers and issue decoder flush command. 330 * Abort pending input transfers and issue decoder flush command.
330 * 331 *
331 */ 332 */
332static BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) 333static enum BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx,
334 struct crystalhd_ioctl_data *idata)
333{ 335{
334 BC_STATUS sts; 336 enum BC_STATUS sts;
335 uint32_t *cmd; 337 uint32_t *cmd;
336 338
337 if (!(ctx->state & BC_LINK_INIT)) { 339 if (!(ctx->state & BC_LINK_INIT)) {
338 BCMLOG_ERR("Link invalid state %d \n", ctx->state); 340 BCMLOG_ERR("Link invalid state %d\n", ctx->state);
339 return BC_STS_ERR_USAGE; 341 return BC_STS_ERR_USAGE;
340 } 342 }
341 343
@@ -371,22 +373,22 @@ static BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx, crystalhd_ioctl_d
371 return sts; 373 return sts;
372} 374}
373 375
374static void bc_proc_in_completion(crystalhd_dio_req *dio_hnd, 376static void bc_proc_in_completion(struct crystalhd_dio_req *dio_hnd,
375 wait_queue_head_t *event, BC_STATUS sts) 377 wait_queue_head_t *event, enum BC_STATUS sts)
376{ 378{
377 if (!dio_hnd || !event) { 379 if (!dio_hnd || !event) {
378 BCMLOG_ERR("Invalid Arg!!\n"); 380 BCMLOG_ERR("Invalid Arg!!\n");
379 return; 381 return;
380 } 382 }
381 if (sts == BC_STS_IO_USER_ABORT) 383 if (sts == BC_STS_IO_USER_ABORT)
382 return; 384 return;
383 385
384 dio_hnd->uinfo.comp_sts = sts; 386 dio_hnd->uinfo.comp_sts = sts;
385 dio_hnd->uinfo.ev_sts = 1; 387 dio_hnd->uinfo.ev_sts = 1;
386 crystalhd_set_event(event); 388 crystalhd_set_event(event);
387} 389}
388 390
389static BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx) 391static enum BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx)
390{ 392{
391 wait_queue_head_t sleep_ev; 393 wait_queue_head_t sleep_ev;
392 int rc = 0; 394 int rc = 0;
@@ -406,12 +408,12 @@ static BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx)
406 return BC_STS_SUCCESS; 408 return BC_STS_SUCCESS;
407} 409}
408 410
409static BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx, 411static enum BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx,
410 crystalhd_ioctl_data *idata, 412 struct crystalhd_ioctl_data *idata,
411 crystalhd_dio_req *dio) 413 struct crystalhd_dio_req *dio)
412{ 414{
413 uint32_t tx_listid = 0; 415 uint32_t tx_listid = 0;
414 BC_STATUS sts = BC_STS_SUCCESS; 416 enum BC_STATUS sts = BC_STS_SUCCESS;
415 wait_queue_head_t event; 417 wait_queue_head_t event;
416 int rc = 0; 418 int rc = 0;
417 419
@@ -452,7 +454,7 @@ static BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx,
452 if (!rc) { 454 if (!rc) {
453 return dio->uinfo.comp_sts; 455 return dio->uinfo.comp_sts;
454 } else if (rc == -EBUSY) { 456 } else if (rc == -EBUSY) {
455 BCMLOG(BCMLOG_DBG, "_tx_post() T/O \n"); 457 BCMLOG(BCMLOG_DBG, "_tx_post() T/O\n");
456 sts = BC_STS_TIMEOUT; 458 sts = BC_STS_TIMEOUT;
457 } else if (rc == -EINTR) { 459 } else if (rc == -EINTR) {
458 BCMLOG(BCMLOG_DBG, "Tx Wait Signal int.\n"); 460 BCMLOG(BCMLOG_DBG, "Tx Wait Signal int.\n");
@@ -471,7 +473,7 @@ static BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx,
471} 473}
472 474
473/* Helper function to check on user buffers */ 475/* Helper function to check on user buffers */
474static BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz, 476static enum BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz,
475 uint32_t uv_off, bool en_422) 477 uint32_t uv_off, bool en_422)
476{ 478{
477 if (!ubuff || !ub_sz) { 479 if (!ubuff || !ub_sz) {
@@ -482,7 +484,7 @@ static BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz,
482 484
483 /* Check for alignment */ 485 /* Check for alignment */
484 if (((uintptr_t)ubuff) & 0x03) { 486 if (((uintptr_t)ubuff) & 0x03) {
485 BCMLOG_ERR("%s-->Un-aligned address not implemented yet.. %p \n", 487 BCMLOG_ERR("%s-->Un-aligned address not implemented yet.. %p\n",
486 ((pin) ? "TX" : "RX"), ubuff); 488 ((pin) ? "TX" : "RX"), ubuff);
487 return BC_STS_NOT_IMPL; 489 return BC_STS_NOT_IMPL;
488 } 490 }
@@ -502,12 +504,13 @@ static BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz,
502 return BC_STS_SUCCESS; 504 return BC_STS_SUCCESS;
503} 505}
504 506
505static BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) 507static enum BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx,
508 struct crystalhd_ioctl_data *idata)
506{ 509{
507 void *ubuff; 510 void *ubuff;
508 uint32_t ub_sz; 511 uint32_t ub_sz;
509 crystalhd_dio_req *dio_hnd = NULL; 512 struct crystalhd_dio_req *dio_hnd = NULL;
510 BC_STATUS sts = BC_STS_SUCCESS; 513 enum BC_STATUS sts = BC_STS_SUCCESS;
511 514
512 if (!ctx || !idata) { 515 if (!ctx || !idata) {
513 BCMLOG_ERR("Invalid Arg!!\n"); 516 BCMLOG_ERR("Invalid Arg!!\n");
@@ -523,7 +526,7 @@ static BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, crystalhd_ioctl_
523 526
524 sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, 0, 0, 1, &dio_hnd); 527 sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, 0, 0, 1, &dio_hnd);
525 if (sts != BC_STS_SUCCESS) { 528 if (sts != BC_STS_SUCCESS) {
526 BCMLOG_ERR("dio map - %d \n", sts); 529 BCMLOG_ERR("dio map - %d\n", sts);
527 return sts; 530 return sts;
528 } 531 }
529 532
@@ -537,14 +540,14 @@ static BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, crystalhd_ioctl_
537 return sts; 540 return sts;
538} 541}
539 542
540static BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx, 543static enum BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx,
541 crystalhd_ioctl_data *idata) 544 struct crystalhd_ioctl_data *idata)
542{ 545{
543 void *ubuff; 546 void *ubuff;
544 uint32_t ub_sz, uv_off; 547 uint32_t ub_sz, uv_off;
545 bool en_422; 548 bool en_422;
546 crystalhd_dio_req *dio_hnd = NULL; 549 struct crystalhd_dio_req *dio_hnd = NULL;
547 BC_STATUS sts = BC_STS_SUCCESS; 550 enum BC_STATUS sts = BC_STS_SUCCESS;
548 551
549 if (!ctx || !idata) { 552 if (!ctx || !idata) {
550 BCMLOG_ERR("Invalid Arg!!\n"); 553 BCMLOG_ERR("Invalid Arg!!\n");
@@ -563,7 +566,7 @@ static BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx,
563 sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, uv_off, 566 sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, uv_off,
564 en_422, 0, &dio_hnd); 567 en_422, 0, &dio_hnd);
565 if (sts != BC_STS_SUCCESS) { 568 if (sts != BC_STS_SUCCESS) {
566 BCMLOG_ERR("dio map - %d \n", sts); 569 BCMLOG_ERR("dio map - %d\n", sts);
567 return sts; 570 return sts;
568 } 571 }
569 572
@@ -579,10 +582,10 @@ static BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx,
579 return BC_STS_SUCCESS; 582 return BC_STS_SUCCESS;
580} 583}
581 584
582static BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx, 585static enum BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx,
583 crystalhd_dio_req *dio) 586 struct crystalhd_dio_req *dio)
584{ 587{
585 BC_STATUS sts = BC_STS_SUCCESS; 588 enum BC_STATUS sts = BC_STS_SUCCESS;
586 589
587 sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio, 0); 590 sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio, 0);
588 if (sts != BC_STS_SUCCESS) 591 if (sts != BC_STS_SUCCESS)
@@ -595,12 +598,12 @@ static BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx,
595 return sts; 598 return sts;
596} 599}
597 600
598static BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx, 601static enum BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx,
599 crystalhd_ioctl_data *idata) 602 struct crystalhd_ioctl_data *idata)
600{ 603{
601 crystalhd_dio_req *dio = NULL; 604 struct crystalhd_dio_req *dio = NULL;
602 BC_STATUS sts = BC_STS_SUCCESS; 605 enum BC_STATUS sts = BC_STS_SUCCESS;
603 BC_DEC_OUT_BUFF *frame; 606 struct BC_DEC_OUT_BUFF *frame;
604 607
605 if (!ctx || !idata) { 608 if (!ctx || !idata) {
606 BCMLOG_ERR("Invalid Arg!!\n"); 609 BCMLOG_ERR("Invalid Arg!!\n");
@@ -636,8 +639,8 @@ static BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx,
636 return BC_STS_SUCCESS; 639 return BC_STS_SUCCESS;
637} 640}
638 641
639static BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx, 642static enum BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx,
640 crystalhd_ioctl_data *idata) 643 struct crystalhd_ioctl_data *idata)
641{ 644{
642 ctx->state |= BC_LINK_CAP_EN; 645 ctx->state |= BC_LINK_CAP_EN;
643 if (ctx->state == BC_LINK_READY) 646 if (ctx->state == BC_LINK_READY)
@@ -646,12 +649,12 @@ static BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx,
646 return BC_STS_SUCCESS; 649 return BC_STS_SUCCESS;
647} 650}
648 651
649static BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx, 652static enum BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx,
650 crystalhd_ioctl_data *idata) 653 struct crystalhd_ioctl_data *idata)
651{ 654{
652 crystalhd_dio_req *dio = NULL; 655 struct crystalhd_dio_req *dio = NULL;
653 BC_STATUS sts = BC_STS_SUCCESS; 656 enum BC_STATUS sts = BC_STS_SUCCESS;
654 BC_DEC_OUT_BUFF *frame; 657 struct BC_DEC_OUT_BUFF *frame;
655 uint32_t count; 658 uint32_t count;
656 659
657 if (!ctx || !idata) { 660 if (!ctx || !idata) {
@@ -681,10 +684,10 @@ static BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx,
681 return crystalhd_hw_stop_capture(&ctx->hw_ctx); 684 return crystalhd_hw_stop_capture(&ctx->hw_ctx);
682} 685}
683 686
684static BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx, 687static enum BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx,
685 crystalhd_ioctl_data *idata) 688 struct crystalhd_ioctl_data *idata)
686{ 689{
687 BC_DTS_STATS *stats; 690 struct BC_DTS_STATS *stats;
688 struct crystalhd_hw_stats hw_stats; 691 struct crystalhd_hw_stats hw_stats;
689 692
690 if (!ctx || !idata) { 693 if (!ctx || !idata) {
@@ -713,20 +716,20 @@ static BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx,
713 return BC_STS_SUCCESS; 716 return BC_STS_SUCCESS;
714} 717}
715 718
716static BC_STATUS bc_cproc_reset_stats(struct crystalhd_cmd *ctx, 719static enum BC_STATUS bc_cproc_reset_stats(struct crystalhd_cmd *ctx,
717 crystalhd_ioctl_data *idata) 720 struct crystalhd_ioctl_data *idata)
718{ 721{
719 crystalhd_hw_stats(&ctx->hw_ctx, NULL); 722 crystalhd_hw_stats(&ctx->hw_ctx, NULL);
720 723
721 return BC_STS_SUCCESS; 724 return BC_STS_SUCCESS;
722} 725}
723 726
724static BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx, 727static enum BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx,
725 crystalhd_ioctl_data *idata) 728 struct crystalhd_ioctl_data *idata)
726{ 729{
727 BC_CLOCK *clock; 730 struct BC_CLOCK *clock;
728 uint32_t oldClk; 731 uint32_t oldClk;
729 BC_STATUS sts = BC_STS_SUCCESS; 732 enum BC_STATUS sts = BC_STS_SUCCESS;
730 733
731 if (!ctx || !idata) { 734 if (!ctx || !idata) {
732 BCMLOG_ERR("Invalid Arg!!\n"); 735 BCMLOG_ERR("Invalid Arg!!\n");
@@ -749,7 +752,7 @@ static BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx,
749} 752}
750 753
751/*=============== Cmd Proc Table.. ======================================*/ 754/*=============== Cmd Proc Table.. ======================================*/
752static const crystalhd_cmd_tbl_t g_crystalhd_cproc_tbl[] = { 755static const struct crystalhd_cmd_tbl g_crystalhd_cproc_tbl[] = {
753 { BCM_IOC_GET_VERSION, bc_cproc_get_version, 0}, 756 { BCM_IOC_GET_VERSION, bc_cproc_get_version, 0},
754 { BCM_IOC_GET_HWTYPE, bc_cproc_get_hwtype, 0}, 757 { BCM_IOC_GET_HWTYPE, bc_cproc_get_hwtype, 0},
755 { BCM_IOC_REG_RD, bc_cproc_reg_rd, 0}, 758 { BCM_IOC_REG_RD, bc_cproc_reg_rd, 0},
@@ -796,9 +799,10 @@ static const crystalhd_cmd_tbl_t g_crystalhd_cproc_tbl[] = {
796 * we pass on the power mangement notification to our plug-in by completing 799 * we pass on the power mangement notification to our plug-in by completing
797 * all outstanding requests with BC_STS_IO_USER_ABORT return code. 800 * all outstanding requests with BC_STS_IO_USER_ABORT return code.
798 */ 801 */
799BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) 802enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx,
803 struct crystalhd_ioctl_data *idata)
800{ 804{
801 BC_STATUS sts = BC_STS_SUCCESS; 805 enum BC_STATUS sts = BC_STS_SUCCESS;
802 806
803 if (!ctx || !idata) { 807 if (!ctx || !idata) {
804 BCMLOG_ERR("Invalid Parameters\n"); 808 BCMLOG_ERR("Invalid Parameters\n");
@@ -854,7 +858,7 @@ BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *ida
854 * start a new playback session from the pre-suspend clip position. 858 * start a new playback session from the pre-suspend clip position.
855 * 859 *
856 */ 860 */
857BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx) 861enum BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx)
858{ 862{
859 BCMLOG(BCMLOG_DBG, "crystalhd_resume Success %x\n", ctx->state); 863 BCMLOG(BCMLOG_DBG, "crystalhd_resume Success %x\n", ctx->state);
860 864
@@ -875,7 +879,7 @@ BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx)
875 * application specific resources. HW layer initialization 879 * application specific resources. HW layer initialization
876 * is done for the first open request. 880 * is done for the first open request.
877 */ 881 */
878BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, 882enum BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx,
879 struct crystalhd_user **user_ctx) 883 struct crystalhd_user **user_ctx)
880{ 884{
881 struct crystalhd_user *uc; 885 struct crystalhd_user *uc;
@@ -913,7 +917,7 @@ BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx,
913 * Closer aplication handle and release app specific 917 * Closer aplication handle and release app specific
914 * resources. 918 * resources.
915 */ 919 */
916BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc) 920enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc)
917{ 921{
918 uint32_t mode = uc->mode; 922 uint32_t mode = uc->mode;
919 923
@@ -948,7 +952,7 @@ BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user
948 * 952 *
949 * Called at the time of driver load. 953 * Called at the time of driver load.
950 */ 954 */
951BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, 955enum BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx,
952 struct crystalhd_adp *adp) 956 struct crystalhd_adp *adp)
953{ 957{
954 int i = 0; 958 int i = 0;
@@ -983,7 +987,7 @@ BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx,
983 * 987 *
984 * Called at the time of driver un-load. 988 * Called at the time of driver un-load.
985 */ 989 */
986BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx) 990enum BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx)
987{ 991{
988 BCMLOG(BCMLOG_DBG, "Deleting Command context..\n"); 992 BCMLOG(BCMLOG_DBG, "Deleting Command context..\n");
989 993
@@ -1021,12 +1025,12 @@ crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cm
1021 return NULL; 1025 return NULL;
1022 } 1026 }
1023 1027
1024 tbl_sz = sizeof(g_crystalhd_cproc_tbl) / sizeof(crystalhd_cmd_tbl_t); 1028 tbl_sz = sizeof(g_crystalhd_cproc_tbl) / sizeof(struct crystalhd_cmd_tbl);
1025 for (i = 0; i < tbl_sz; i++) { 1029 for (i = 0; i < tbl_sz; i++) {
1026 if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) { 1030 if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) {
1027 if ((uc->mode == DTS_MONITOR_MODE) && 1031 if ((uc->mode == DTS_MONITOR_MODE) &&
1028 (g_crystalhd_cproc_tbl[i].block_mon)) { 1032 (g_crystalhd_cproc_tbl[i].block_mon)) {
1029 BCMLOG(BCMLOG_INFO, "Blocking cmd %d \n", cmd); 1033 BCMLOG(BCMLOG_INFO, "Blocking cmd %d\n", cmd);
1030 break; 1034 break;
1031 } 1035 }
1032 cproc = g_crystalhd_cproc_tbl[i].cmd_proc; 1036 cproc = g_crystalhd_cproc_tbl[i].cmd_proc;
diff --git a/drivers/staging/crystalhd/crystalhd_cmds.h b/drivers/staging/crystalhd/crystalhd_cmds.h
index 6b290aed8e0b..10130296601f 100644
--- a/drivers/staging/crystalhd/crystalhd_cmds.h
+++ b/drivers/staging/crystalhd/crystalhd_cmds.h
@@ -36,7 +36,7 @@
36#include "crystalhd_misc.h" 36#include "crystalhd_misc.h"
37#include "crystalhd_hw.h" 37#include "crystalhd_hw.h"
38 38
39enum _crystalhd_state{ 39enum crystalhd_state{
40 BC_LINK_INVALID = 0x00, 40 BC_LINK_INVALID = 0x00,
41 BC_LINK_INIT = 0x01, 41 BC_LINK_INIT = 0x01,
42 BC_LINK_CAP_EN = 0x02, 42 BC_LINK_CAP_EN = 0x02,
@@ -66,23 +66,22 @@ struct crystalhd_cmd {
66 struct crystalhd_hw hw_ctx; 66 struct crystalhd_hw hw_ctx;
67}; 67};
68 68
69typedef BC_STATUS (*crystalhd_cmd_proc)(struct crystalhd_cmd *, crystalhd_ioctl_data *); 69typedef enum BC_STATUS(*crystalhd_cmd_proc)(struct crystalhd_cmd *, struct crystalhd_ioctl_data *);
70 70
71typedef struct _crystalhd_cmd_tbl { 71struct crystalhd_cmd_tbl {
72 uint32_t cmd_id; 72 uint32_t cmd_id;
73 const crystalhd_cmd_proc cmd_proc; 73 const crystalhd_cmd_proc cmd_proc;
74 uint32_t block_mon; 74 uint32_t block_mon;
75} crystalhd_cmd_tbl_t; 75};
76
77 76
78BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata); 77enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, struct crystalhd_ioctl_data *idata);
79BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx); 78enum BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx);
80crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cmd, 79crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cmd,
81 struct crystalhd_user *uc); 80 struct crystalhd_user *uc);
82BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, struct crystalhd_user **user_ctx); 81enum BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, struct crystalhd_user **user_ctx);
83BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc); 82enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc);
84BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, struct crystalhd_adp *adp); 83enum BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, struct crystalhd_adp *adp);
85BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx); 84enum BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx);
86bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx); 85bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx);
87 86
88#endif 87#endif
diff --git a/drivers/staging/crystalhd/crystalhd_fw_if.h b/drivers/staging/crystalhd/crystalhd_fw_if.h
index 261cd19a0ee7..77560d4b6802 100644
--- a/drivers/staging/crystalhd/crystalhd_fw_if.h
+++ b/drivers/staging/crystalhd/crystalhd_fw_if.h
@@ -29,21 +29,17 @@
29 29
30/* TBD: Pull in only required defs into this file.. */ 30/* TBD: Pull in only required defs into this file.. */
31 31
32
33
34/* User Data Header */ 32/* User Data Header */
35typedef struct user_data { 33struct user_data {
36 struct user_data *next; 34 struct user_data *next;
37 uint32_t type; 35 uint32_t type;
38 uint32_t size; 36 uint32_t size;
39} UD_HDR; 37};
40
41
42 38
43/*------------------------------------------------------* 39/*------------------------------------------------------*
44 * MPEG Extension to the PPB * 40 * MPEG Extension to the PPB *
45 *------------------------------------------------------*/ 41 *------------------------------------------------------*/
46typedef struct { 42struct ppb_mpeg {
47 uint32_t to_be_defined; 43 uint32_t to_be_defined;
48 uint32_t valid; 44 uint32_t valid;
49 45
@@ -61,15 +57,15 @@ typedef struct {
61 /* MPEG_VALID_USERDATA 57 /* MPEG_VALID_USERDATA
62 User data is in the form of a linked list. */ 58 User data is in the form of a linked list. */
63 int32_t userDataSize; 59 int32_t userDataSize;
64 UD_HDR *userData; 60 struct user_data *userData;
65 61
66} PPB_MPEG; 62};
67 63
68 64
69/*------------------------------------------------------* 65/*------------------------------------------------------*
70 * VC1 Extension to the PPB * 66 * VC1 Extension to the PPB *
71 *------------------------------------------------------*/ 67 *------------------------------------------------------*/
72typedef struct { 68struct ppb_vc1 {
73 uint32_t to_be_defined; 69 uint32_t to_be_defined;
74 uint32_t valid; 70 uint32_t valid;
75 71
@@ -88,9 +84,9 @@ typedef struct {
88 /* VC1_VALID_USERDATA 84 /* VC1_VALID_USERDATA
89 User data is in the form of a linked list. */ 85 User data is in the form of a linked list. */
90 int32_t userDataSize; 86 int32_t userDataSize;
91 UD_HDR *userData; 87 struct user_data *userData;
92 88
93} PPB_VC1; 89};
94 90
95/*------------------------------------------------------* 91/*------------------------------------------------------*
96 * H.264 Extension to the PPB * 92 * H.264 Extension to the PPB *
@@ -108,8 +104,8 @@ typedef struct {
108/* maximum number of intervals(as many as 256 intervals?) */ 104/* maximum number of intervals(as many as 256 intervals?) */
109#define MAX_FGT_VALUE_INTERVAL (256) 105#define MAX_FGT_VALUE_INTERVAL (256)
110 106
111typedef struct FGT_SEI { 107struct fgt_sei {
112 struct FGT_SEI *next; 108 struct fgt_sei *next;
113 unsigned char model_values[3][MAX_FGT_VALUE_INTERVAL][MAX_FGT_MODEL_VALUE]; 109 unsigned char model_values[3][MAX_FGT_VALUE_INTERVAL][MAX_FGT_MODEL_VALUE];
114 unsigned char upper_bound[3][MAX_FGT_VALUE_INTERVAL]; 110 unsigned char upper_bound[3][MAX_FGT_VALUE_INTERVAL];
115 unsigned char lower_bound[3][MAX_FGT_VALUE_INTERVAL]; 111 unsigned char lower_bound[3][MAX_FGT_VALUE_INTERVAL];
@@ -134,9 +130,9 @@ typedef struct FGT_SEI {
134 unsigned char num_model_values[3]; /* Number of model values. */ 130 unsigned char num_model_values[3]; /* Number of model values. */
135 uint16_t repetition_period; /* Repetition period (0-16384) */ 131 uint16_t repetition_period; /* Repetition period (0-16384) */
136 132
137} FGT_SEI; 133};
138 134
139typedef struct { 135struct ppb_h264 {
140 /* 'valid' specifies which fields (or sets of 136 /* 'valid' specifies which fields (or sets of
141 * fields) below are valid. If the corresponding 137 * fields) below are valid. If the corresponding
142 * bit in 'valid' is NOT set then that field(s) 138 * bit in 'valid' is NOT set then that field(s)
@@ -170,14 +166,14 @@ typedef struct {
170 166
171 /* H264_VALID_USER */ 167 /* H264_VALID_USER */
172 uint32_t user_data_size; 168 uint32_t user_data_size;
173 UD_HDR *user_data; 169 struct user_data *user_data;
174 170
175 /* H264 VALID FGT */ 171 /* H264 VALID FGT */
176 FGT_SEI *pfgt; 172 struct fgt_sei *pfgt;
177 173
178} PPB_H264; 174};
179 175
180typedef struct { 176struct ppb {
181 /* Common fields. */ 177 /* Common fields. */
182 uint32_t picture_number; /* Ordinal display number */ 178 uint32_t picture_number; /* Ordinal display number */
183 uint32_t video_buffer; /* Video (picbuf) number */ 179 uint32_t video_buffer; /* Video (picbuf) number */
@@ -215,14 +211,14 @@ typedef struct {
215 211
216 /* Protocol-specific extensions. */ 212 /* Protocol-specific extensions. */
217 union { 213 union {
218 PPB_H264 h264; 214 struct ppb_h264 h264;
219 PPB_MPEG mpeg; 215 struct ppb_mpeg mpeg;
220 PPB_VC1 vc1; 216 struct ppb_vc1 vc1;
221 } other; 217 } other;
222 218
223} PPB; 219};
224 220
225typedef struct { 221struct c011_pib {
226 uint32_t bFormatChange; 222 uint32_t bFormatChange;
227 uint32_t resolution; 223 uint32_t resolution;
228 uint32_t channelId; 224 uint32_t channelId;
@@ -231,13 +227,11 @@ typedef struct {
231 uint32_t zeroPanscanValid; 227 uint32_t zeroPanscanValid;
232 uint32_t dramOutBufAddr; 228 uint32_t dramOutBufAddr;
233 uint32_t yComponent; 229 uint32_t yComponent;
234 PPB ppb; 230 struct ppb ppb;
235
236} C011_PIB;
237
238 231
232};
239 233
240typedef struct { 234struct dec_rsp_channel_start_video {
241 uint32_t command; 235 uint32_t command;
242 uint32_t sequence; 236 uint32_t sequence;
243 uint32_t status; 237 uint32_t status;
@@ -251,12 +245,12 @@ typedef struct {
251 uint32_t transportStreamCaptureAddr; 245 uint32_t transportStreamCaptureAddr;
252 uint32_t asyncEventQ; 246 uint32_t asyncEventQ;
253 247
254} DecRspChannelStartVideo; 248};
255 249
256#define eCMD_C011_CMD_BASE (0x73763000) 250#define eCMD_C011_CMD_BASE (0x73763000)
257 251
258/* host commands */ 252/* host commands */
259typedef enum { 253enum c011_ts_cmd {
260 eCMD_TS_GET_NEXT_PIC = 0x7376F100, /* debug get next picture */ 254 eCMD_TS_GET_NEXT_PIC = 0x7376F100, /* debug get next picture */
261 eCMD_TS_GET_LAST_PIC = 0x7376F102, /* debug get last pic status */ 255 eCMD_TS_GET_LAST_PIC = 0x7376F102, /* debug get last pic status */
262 eCMD_TS_READ_WRITE_MEM = 0x7376F104, /* debug read write memory */ 256 eCMD_TS_READ_WRITE_MEM = 0x7376F104, /* debug read write memory */
@@ -364,6 +358,6 @@ typedef enum {
364 358
365 eNOTIFY_C011_ENC_CHAN_EVENT = eCMD_C011_CMD_BASE + 0x210, 359 eNOTIFY_C011_ENC_CHAN_EVENT = eCMD_C011_CMD_BASE + 0x210,
366 360
367} eC011_TS_CMD; 361};
368 362
369#endif 363#endif
diff --git a/drivers/staging/crystalhd/crystalhd_hw.c b/drivers/staging/crystalhd/crystalhd_hw.c
index c438c489aa92..f63185790c48 100644
--- a/drivers/staging/crystalhd/crystalhd_hw.c
+++ b/drivers/staging/crystalhd/crystalhd_hw.c
@@ -61,8 +61,8 @@ static void crystalhd_start_dram(struct crystalhd_adp *adp)
61 61
62static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp) 62static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp)
63{ 63{
64 link_misc_perst_deco_ctrl rst_deco_cntrl; 64 union link_misc_perst_deco_ctrl rst_deco_cntrl;
65 link_misc_perst_clk_ctrl rst_clk_cntrl; 65 union link_misc_perst_clk_ctrl rst_clk_cntrl;
66 uint32_t temp; 66 uint32_t temp;
67 67
68 /* 68 /*
@@ -122,8 +122,8 @@ static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp)
122 122
123static bool crystalhd_put_in_reset(struct crystalhd_adp *adp) 123static bool crystalhd_put_in_reset(struct crystalhd_adp *adp)
124{ 124{
125 link_misc_perst_deco_ctrl rst_deco_cntrl; 125 union link_misc_perst_deco_ctrl rst_deco_cntrl;
126 link_misc_perst_clk_ctrl rst_clk_cntrl; 126 union link_misc_perst_clk_ctrl rst_clk_cntrl;
127 uint32_t temp; 127 uint32_t temp;
128 128
129 /* 129 /*
@@ -178,7 +178,7 @@ static bool crystalhd_put_in_reset(struct crystalhd_adp *adp)
178 178
179static void crystalhd_disable_interrupts(struct crystalhd_adp *adp) 179static void crystalhd_disable_interrupts(struct crystalhd_adp *adp)
180{ 180{
181 intr_mask_reg intr_mask; 181 union intr_mask_reg intr_mask;
182 intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); 182 intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG);
183 intr_mask.mask_pcie_err = 1; 183 intr_mask.mask_pcie_err = 1;
184 intr_mask.mask_pcie_rbusmast_err = 1; 184 intr_mask.mask_pcie_rbusmast_err = 1;
@@ -194,7 +194,7 @@ static void crystalhd_disable_interrupts(struct crystalhd_adp *adp)
194 194
195static void crystalhd_enable_interrupts(struct crystalhd_adp *adp) 195static void crystalhd_enable_interrupts(struct crystalhd_adp *adp)
196{ 196{
197 intr_mask_reg intr_mask; 197 union intr_mask_reg intr_mask;
198 intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); 198 intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG);
199 intr_mask.mask_pcie_err = 1; 199 intr_mask.mask_pcie_err = 1;
200 intr_mask.mask_pcie_rbusmast_err = 1; 200 intr_mask.mask_pcie_rbusmast_err = 1;
@@ -348,10 +348,10 @@ static bool crystalhd_stop_device(struct crystalhd_adp *adp)
348 return true; 348 return true;
349} 349}
350 350
351static crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(struct crystalhd_hw *hw) 351static struct crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(struct crystalhd_hw *hw)
352{ 352{
353 unsigned long flags = 0; 353 unsigned long flags = 0;
354 crystalhd_rx_dma_pkt *temp = NULL; 354 struct crystalhd_rx_dma_pkt *temp = NULL;
355 355
356 if (!hw) 356 if (!hw)
357 return NULL; 357 return NULL;
@@ -370,7 +370,7 @@ static crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(struct crystalhd_hw *hw)
370} 370}
371 371
372static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw, 372static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw,
373 crystalhd_rx_dma_pkt *pkt) 373 struct crystalhd_rx_dma_pkt *pkt)
374{ 374{
375 unsigned long flags = 0; 375 unsigned long flags = 0;
376 376
@@ -406,7 +406,7 @@ static void crystalhd_tx_desc_rel_call_back(void *context, void *data)
406static void crystalhd_rx_pkt_rel_call_back(void *context, void *data) 406static void crystalhd_rx_pkt_rel_call_back(void *context, void *data)
407{ 407{
408 struct crystalhd_hw *hw = (struct crystalhd_hw *)context; 408 struct crystalhd_hw *hw = (struct crystalhd_hw *)context;
409 crystalhd_rx_dma_pkt *pkt = (crystalhd_rx_dma_pkt *)data; 409 struct crystalhd_rx_dma_pkt *pkt = (struct crystalhd_rx_dma_pkt *)data;
410 410
411 if (!pkt || !hw) { 411 if (!pkt || !hw) {
412 BCMLOG_ERR("Invalid arg - %p %p\n", hw, pkt); 412 BCMLOG_ERR("Invalid arg - %p %p\n", hw, pkt);
@@ -432,7 +432,7 @@ static void crystalhd_hw_delete_ioqs(struct crystalhd_hw *hw)
432 if (!hw) 432 if (!hw)
433 return; 433 return;
434 434
435 BCMLOG(BCMLOG_DBG, "Deleting IOQs \n"); 435 BCMLOG(BCMLOG_DBG, "Deleting IOQs\n");
436 crystalhd_hw_delete_ioq(hw->adp, hw->tx_actq); 436 crystalhd_hw_delete_ioq(hw->adp, hw->tx_actq);
437 crystalhd_hw_delete_ioq(hw->adp, hw->tx_freeq); 437 crystalhd_hw_delete_ioq(hw->adp, hw->tx_freeq);
438 crystalhd_hw_delete_ioq(hw->adp, hw->rx_actq); 438 crystalhd_hw_delete_ioq(hw->adp, hw->rx_actq);
@@ -453,9 +453,9 @@ do { \
453 * TX - Active & Free 453 * TX - Active & Free
454 * RX - Active, Ready and Free. 454 * RX - Active, Ready and Free.
455 */ 455 */
456static BC_STATUS crystalhd_hw_create_ioqs(struct crystalhd_hw *hw) 456static enum BC_STATUS crystalhd_hw_create_ioqs(struct crystalhd_hw *hw)
457{ 457{
458 BC_STATUS sts = BC_STS_SUCCESS; 458 enum BC_STATUS sts = BC_STS_SUCCESS;
459 459
460 if (!hw) { 460 if (!hw) {
461 BCMLOG_ERR("Invalid Arg!!\n"); 461 BCMLOG_ERR("Invalid Arg!!\n");
@@ -523,10 +523,10 @@ static bool crystalhd_code_in_full(struct crystalhd_adp *adp, uint32_t needed_sz
523 return false; 523 return false;
524} 524}
525 525
526static BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw, 526static enum BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw,
527 uint32_t list_id, BC_STATUS cs) 527 uint32_t list_id, enum BC_STATUS cs)
528{ 528{
529 tx_dma_pkt *tx_req; 529 struct tx_dma_pkt *tx_req;
530 530
531 if (!hw || !list_id) { 531 if (!hw || !list_id) {
532 BCMLOG_ERR("Invalid Arg..\n"); 532 BCMLOG_ERR("Invalid Arg..\n");
@@ -535,7 +535,7 @@ static BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw,
535 535
536 hw->pwr_lock--; 536 hw->pwr_lock--;
537 537
538 tx_req = (tx_dma_pkt *)crystalhd_dioq_find_and_fetch(hw->tx_actq, list_id); 538 tx_req = (struct tx_dma_pkt *)crystalhd_dioq_find_and_fetch(hw->tx_actq, list_id);
539 if (!tx_req) { 539 if (!tx_req) {
540 if (cs != BC_STS_IO_USER_ABORT) 540 if (cs != BC_STS_IO_USER_ABORT)
541 BCMLOG_ERR("Find and Fetch Did not find req\n"); 541 BCMLOG_ERR("Find and Fetch Did not find req\n");
@@ -570,7 +570,7 @@ static bool crystalhd_tx_list0_handler(struct crystalhd_hw *hw, uint32_t err_sts
570 if (!(err_sts & err_mask)) 570 if (!(err_sts & err_mask))
571 return false; 571 return false;
572 572
573 BCMLOG_ERR("Error on Tx-L0 %x \n", err_sts); 573 BCMLOG_ERR("Error on Tx-L0 %x\n", err_sts);
574 574
575 tmp = err_mask; 575 tmp = err_mask;
576 576
@@ -602,7 +602,7 @@ static bool crystalhd_tx_list1_handler(struct crystalhd_hw *hw, uint32_t err_sts
602 if (!(err_sts & err_mask)) 602 if (!(err_sts & err_mask))
603 return false; 603 return false;
604 604
605 BCMLOG_ERR("Error on Tx-L1 %x \n", err_sts); 605 BCMLOG_ERR("Error on Tx-L1 %x\n", err_sts);
606 606
607 tmp = err_mask; 607 tmp = err_mask;
608 608
@@ -635,9 +635,9 @@ static void crystalhd_tx_isr(struct crystalhd_hw *hw, uint32_t int_sts)
635 BC_STS_SUCCESS); 635 BC_STS_SUCCESS);
636 636
637 if (!(int_sts & (INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_MASK | 637 if (!(int_sts & (INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_MASK |
638 INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK))) { 638 INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK))) {
639 /* No error mask set.. */ 639 /* No error mask set.. */
640 return; 640 return;
641 } 641 }
642 642
643 /* Handle Tx errors. */ 643 /* Handle Tx errors. */
@@ -654,7 +654,7 @@ static void crystalhd_tx_isr(struct crystalhd_hw *hw, uint32_t int_sts)
654 hw->stats.tx_errors++; 654 hw->stats.tx_errors++;
655} 655}
656 656
657static void crystalhd_hw_dump_desc(pdma_descriptor p_dma_desc, 657static void crystalhd_hw_dump_desc(struct dma_descriptor *p_dma_desc,
658 uint32_t ul_desc_index, uint32_t cnt) 658 uint32_t ul_desc_index, uint32_t cnt)
659{ 659{
660 uint32_t ix, ll = 0; 660 uint32_t ix, ll = 0;
@@ -682,15 +682,15 @@ static void crystalhd_hw_dump_desc(pdma_descriptor p_dma_desc,
682 682
683} 683}
684 684
685static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq, 685static enum BC_STATUS crystalhd_hw_fill_desc(struct crystalhd_dio_req *ioreq,
686 dma_descriptor *desc, 686 struct dma_descriptor *desc,
687 dma_addr_t desc_paddr_base, 687 dma_addr_t desc_paddr_base,
688 uint32_t sg_cnt, uint32_t sg_st_ix, 688 uint32_t sg_cnt, uint32_t sg_st_ix,
689 uint32_t sg_st_off, uint32_t xfr_sz) 689 uint32_t sg_st_off, uint32_t xfr_sz)
690{ 690{
691 uint32_t count = 0, ix = 0, sg_ix = 0, len = 0, last_desc_ix = 0; 691 uint32_t count = 0, ix = 0, sg_ix = 0, len = 0, last_desc_ix = 0;
692 dma_addr_t desc_phy_addr = desc_paddr_base; 692 dma_addr_t desc_phy_addr = desc_paddr_base;
693 addr_64 addr_temp; 693 union addr_64 addr_temp;
694 694
695 if (!ioreq || !desc || !desc_paddr_base || !xfr_sz || 695 if (!ioreq || !desc || !desc_paddr_base || !xfr_sz ||
696 (!sg_cnt && !ioreq->uinfo.dir_tx)) { 696 (!sg_cnt && !ioreq->uinfo.dir_tx)) {
@@ -721,7 +721,7 @@ static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq,
721 desc[ix].dma_dir = ioreq->uinfo.dir_tx; 721 desc[ix].dma_dir = ioreq->uinfo.dir_tx;
722 722
723 /* Chain DMA descriptor. */ 723 /* Chain DMA descriptor. */
724 addr_temp.full_addr = desc_phy_addr + sizeof(dma_descriptor); 724 addr_temp.full_addr = desc_phy_addr + sizeof(struct dma_descriptor);
725 desc[ix].next_desc_addr_low = addr_temp.low_part; 725 desc[ix].next_desc_addr_low = addr_temp.low_part;
726 desc[ix].next_desc_addr_high = addr_temp.high_part; 726 desc[ix].next_desc_addr_high = addr_temp.high_part;
727 727
@@ -740,7 +740,7 @@ static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq,
740 crystalhd_hw_dump_desc(desc, ix, 1); 740 crystalhd_hw_dump_desc(desc, ix, 1);
741 741
742 count += len; 742 count += len;
743 desc_phy_addr += sizeof(dma_descriptor); 743 desc_phy_addr += sizeof(struct dma_descriptor);
744 } 744 }
745 745
746 last_desc_ix = ix - 1; 746 last_desc_ix = ix - 1;
@@ -773,15 +773,15 @@ static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq,
773 return BC_STS_SUCCESS; 773 return BC_STS_SUCCESS;
774} 774}
775 775
776static BC_STATUS crystalhd_xlat_sgl_to_dma_desc(crystalhd_dio_req *ioreq, 776static enum BC_STATUS crystalhd_xlat_sgl_to_dma_desc(struct crystalhd_dio_req *ioreq,
777 pdma_desc_mem pdesc_mem, 777 struct dma_desc_mem *pdesc_mem,
778 uint32_t *uv_desc_index) 778 uint32_t *uv_desc_index)
779{ 779{
780 dma_descriptor *desc = NULL; 780 struct dma_descriptor *desc = NULL;
781 dma_addr_t desc_paddr_base = 0; 781 dma_addr_t desc_paddr_base = 0;
782 uint32_t sg_cnt = 0, sg_st_ix = 0, sg_st_off = 0; 782 uint32_t sg_cnt = 0, sg_st_ix = 0, sg_st_off = 0;
783 uint32_t xfr_sz = 0; 783 uint32_t xfr_sz = 0;
784 BC_STATUS sts = BC_STS_SUCCESS; 784 enum BC_STATUS sts = BC_STS_SUCCESS;
785 785
786 /* Check params.. */ 786 /* Check params.. */
787 if (!ioreq || !pdesc_mem || !uv_desc_index) { 787 if (!ioreq || !pdesc_mem || !uv_desc_index) {
@@ -821,7 +821,7 @@ static BC_STATUS crystalhd_xlat_sgl_to_dma_desc(crystalhd_dio_req *ioreq,
821 /* Prepare for UV mapping.. */ 821 /* Prepare for UV mapping.. */
822 desc = &pdesc_mem->pdma_desc_start[sg_cnt]; 822 desc = &pdesc_mem->pdma_desc_start[sg_cnt];
823 desc_paddr_base = pdesc_mem->phy_addr + 823 desc_paddr_base = pdesc_mem->phy_addr +
824 (sg_cnt * sizeof(dma_descriptor)); 824 (sg_cnt * sizeof(struct dma_descriptor));
825 825
826 /* Done with desc addr.. now update sg stuff.*/ 826 /* Done with desc addr.. now update sg stuff.*/
827 sg_cnt = ioreq->sg_cnt - ioreq->uinfo.uv_sg_ix; 827 sg_cnt = ioreq->sg_cnt - ioreq->uinfo.uv_sg_ix;
@@ -858,7 +858,7 @@ static void crystalhd_start_tx_dma_engine(struct crystalhd_hw *hw)
858 * Verify if the Stop generates a completion interrupt or not. 858 * Verify if the Stop generates a completion interrupt or not.
859 * if it does not generate an interrupt, then add polling here. 859 * if it does not generate an interrupt, then add polling here.
860 */ 860 */
861static BC_STATUS crystalhd_stop_tx_dma_engine(struct crystalhd_hw *hw) 861static enum BC_STATUS crystalhd_stop_tx_dma_engine(struct crystalhd_hw *hw)
862{ 862{
863 uint32_t dma_cntrl, cnt = 30; 863 uint32_t dma_cntrl, cnt = 30;
864 uint32_t l1 = 1, l2 = 1; 864 uint32_t l1 = 1, l2 = 1;
@@ -1021,7 +1021,7 @@ static bool crystalhd_rel_addr_to_pib_Q(struct crystalhd_hw *hw, uint32_t addr_t
1021 return true; 1021 return true;
1022} 1022}
1023 1023
1024static void cpy_pib_to_app(C011_PIB *src_pib, BC_PIC_INFO_BLOCK *dst_pib) 1024static void cpy_pib_to_app(struct c011_pib *src_pib, struct BC_PIC_INFO_BLOCK *dst_pib)
1025{ 1025{
1026 if (!src_pib || !dst_pib) { 1026 if (!src_pib || !dst_pib) {
1027 BCMLOG_ERR("Invalid Arguments\n"); 1027 BCMLOG_ERR("Invalid Arguments\n");
@@ -1046,10 +1046,10 @@ static void cpy_pib_to_app(C011_PIB *src_pib, BC_PIC_INFO_BLOCK *dst_pib)
1046static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw) 1046static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw)
1047{ 1047{
1048 unsigned int cnt; 1048 unsigned int cnt;
1049 C011_PIB src_pib; 1049 struct c011_pib src_pib;
1050 uint32_t pib_addr, pib_cnt; 1050 uint32_t pib_addr, pib_cnt;
1051 BC_PIC_INFO_BLOCK *AppPib; 1051 struct BC_PIC_INFO_BLOCK *AppPib;
1052 crystalhd_rx_dma_pkt *rx_pkt = NULL; 1052 struct crystalhd_rx_dma_pkt *rx_pkt = NULL;
1053 1053
1054 pib_cnt = crystalhd_get_pib_avail_cnt(hw); 1054 pib_cnt = crystalhd_get_pib_avail_cnt(hw);
1055 1055
@@ -1059,11 +1059,11 @@ static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw)
1059 for (cnt = 0; cnt < pib_cnt; cnt++) { 1059 for (cnt = 0; cnt < pib_cnt; cnt++) {
1060 1060
1061 pib_addr = crystalhd_get_addr_from_pib_Q(hw); 1061 pib_addr = crystalhd_get_addr_from_pib_Q(hw);
1062 crystalhd_mem_rd(hw->adp, pib_addr, sizeof(C011_PIB) / 4, 1062 crystalhd_mem_rd(hw->adp, pib_addr, sizeof(struct c011_pib) / 4,
1063 (uint32_t *)&src_pib); 1063 (uint32_t *)&src_pib);
1064 1064
1065 if (src_pib.bFormatChange) { 1065 if (src_pib.bFormatChange) {
1066 rx_pkt = (crystalhd_rx_dma_pkt *)crystalhd_dioq_fetch(hw->rx_freeq); 1066 rx_pkt = (struct crystalhd_rx_dma_pkt *)crystalhd_dioq_fetch(hw->rx_freeq);
1067 if (!rx_pkt) 1067 if (!rx_pkt)
1068 return; 1068 return;
1069 rx_pkt->flags = 0; 1069 rx_pkt->flags = 0;
@@ -1134,33 +1134,29 @@ static void crystalhd_stop_rx_dma_engine(struct crystalhd_hw *hw)
1134 if (l0y) { 1134 if (l0y) {
1135 l0y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0); 1135 l0y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0);
1136 l0y &= DMA_START_BIT; 1136 l0y &= DMA_START_BIT;
1137 if (!l0y) { 1137 if (!l0y)
1138 hw->rx_list_sts[0] &= ~rx_waiting_y_intr; 1138 hw->rx_list_sts[0] &= ~rx_waiting_y_intr;
1139 }
1140 } 1139 }
1141 1140
1142 if (l1y) { 1141 if (l1y) {
1143 l1y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1); 1142 l1y = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1);
1144 l1y &= DMA_START_BIT; 1143 l1y &= DMA_START_BIT;
1145 if (!l1y) { 1144 if (!l1y)
1146 hw->rx_list_sts[1] &= ~rx_waiting_y_intr; 1145 hw->rx_list_sts[1] &= ~rx_waiting_y_intr;
1147 }
1148 } 1146 }
1149 1147
1150 if (l0uv) { 1148 if (l0uv) {
1151 l0uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0); 1149 l0uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0);
1152 l0uv &= DMA_START_BIT; 1150 l0uv &= DMA_START_BIT;
1153 if (!l0uv) { 1151 if (!l0uv)
1154 hw->rx_list_sts[0] &= ~rx_waiting_uv_intr; 1152 hw->rx_list_sts[0] &= ~rx_waiting_uv_intr;
1155 }
1156 } 1153 }
1157 1154
1158 if (l1uv) { 1155 if (l1uv) {
1159 l1uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1); 1156 l1uv = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1);
1160 l1uv &= DMA_START_BIT; 1157 l1uv &= DMA_START_BIT;
1161 if (!l1uv) { 1158 if (!l1uv)
1162 hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; 1159 hw->rx_list_sts[1] &= ~rx_waiting_uv_intr;
1163 }
1164 } 1160 }
1165 msleep_interruptible(100); 1161 msleep_interruptible(100);
1166 count--; 1162 count--;
@@ -1172,11 +1168,11 @@ static void crystalhd_stop_rx_dma_engine(struct crystalhd_hw *hw)
1172 count, hw->rx_list_sts[0], hw->rx_list_sts[1]); 1168 count, hw->rx_list_sts[0], hw->rx_list_sts[1]);
1173} 1169}
1174 1170
1175static BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw, crystalhd_rx_dma_pkt *rx_pkt) 1171static enum BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw, struct crystalhd_rx_dma_pkt *rx_pkt)
1176{ 1172{
1177 uint32_t y_low_addr_reg, y_high_addr_reg; 1173 uint32_t y_low_addr_reg, y_high_addr_reg;
1178 uint32_t uv_low_addr_reg, uv_high_addr_reg; 1174 uint32_t uv_low_addr_reg, uv_high_addr_reg;
1179 addr_64 desc_addr; 1175 union addr_64 desc_addr;
1180 unsigned long flags; 1176 unsigned long flags;
1181 1177
1182 if (!hw || !rx_pkt) { 1178 if (!hw || !rx_pkt) {
@@ -1232,10 +1228,10 @@ static BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw, crystalhd_rx_d
1232 return BC_STS_SUCCESS; 1228 return BC_STS_SUCCESS;
1233} 1229}
1234 1230
1235static BC_STATUS crystalhd_hw_post_cap_buff(struct crystalhd_hw *hw, 1231static enum BC_STATUS crystalhd_hw_post_cap_buff(struct crystalhd_hw *hw,
1236 crystalhd_rx_dma_pkt *rx_pkt) 1232 struct crystalhd_rx_dma_pkt *rx_pkt)
1237{ 1233{
1238 BC_STATUS sts = crystalhd_hw_prog_rxdma(hw, rx_pkt); 1234 enum BC_STATUS sts = crystalhd_hw_prog_rxdma(hw, rx_pkt);
1239 1235
1240 if (sts == BC_STS_BUSY) 1236 if (sts == BC_STS_BUSY)
1241 crystalhd_dioq_add(hw->rx_freeq, (void *)rx_pkt, 1237 crystalhd_dioq_add(hw->rx_freeq, (void *)rx_pkt,
@@ -1291,12 +1287,12 @@ static void crystalhd_hw_finalize_pause(struct crystalhd_hw *hw)
1291 crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm); 1287 crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm);
1292} 1288}
1293 1289
1294static BC_STATUS crystalhd_rx_pkt_done(struct crystalhd_hw *hw, uint32_t list_index, 1290static enum BC_STATUS crystalhd_rx_pkt_done(struct crystalhd_hw *hw, uint32_t list_index,
1295 BC_STATUS comp_sts) 1291 enum BC_STATUS comp_sts)
1296{ 1292{
1297 crystalhd_rx_dma_pkt *rx_pkt = NULL; 1293 struct crystalhd_rx_dma_pkt *rx_pkt = NULL;
1298 uint32_t y_dw_dnsz, uv_dw_dnsz; 1294 uint32_t y_dw_dnsz, uv_dw_dnsz;
1299 BC_STATUS sts = BC_STS_SUCCESS; 1295 enum BC_STATUS sts = BC_STS_SUCCESS;
1300 1296
1301 if (!hw || list_index >= DMA_ENGINE_CNT) { 1297 if (!hw || list_index >= DMA_ENGINE_CNT) {
1302 BCMLOG_ERR("Invalid Arguments\n"); 1298 BCMLOG_ERR("Invalid Arguments\n");
@@ -1332,7 +1328,7 @@ static bool crystalhd_rx_list0_handler(struct crystalhd_hw *hw, uint32_t int_sts
1332 uint32_t y_err_sts, uint32_t uv_err_sts) 1328 uint32_t y_err_sts, uint32_t uv_err_sts)
1333{ 1329{
1334 uint32_t tmp; 1330 uint32_t tmp;
1335 list_sts tmp_lsts; 1331 enum list_sts tmp_lsts;
1336 1332
1337 if (!(y_err_sts & GET_Y0_ERR_MSK) && !(uv_err_sts & GET_UV0_ERR_MSK)) 1333 if (!(y_err_sts & GET_Y0_ERR_MSK) && !(uv_err_sts & GET_UV0_ERR_MSK))
1338 return false; 1334 return false;
@@ -1400,7 +1396,7 @@ static bool crystalhd_rx_list1_handler(struct crystalhd_hw *hw, uint32_t int_sts
1400 uint32_t y_err_sts, uint32_t uv_err_sts) 1396 uint32_t y_err_sts, uint32_t uv_err_sts)
1401{ 1397{
1402 uint32_t tmp; 1398 uint32_t tmp;
1403 list_sts tmp_lsts; 1399 enum list_sts tmp_lsts;
1404 1400
1405 if (!(y_err_sts & GET_Y1_ERR_MSK) && !(uv_err_sts & GET_UV1_ERR_MSK)) 1401 if (!(y_err_sts & GET_Y1_ERR_MSK) && !(uv_err_sts & GET_UV1_ERR_MSK))
1406 return false; 1402 return false;
@@ -1432,9 +1428,8 @@ static bool crystalhd_rx_list1_handler(struct crystalhd_hw *hw, uint32_t int_sts
1432 1428
1433 /* UV1 - DMA */ 1429 /* UV1 - DMA */
1434 tmp = uv_err_sts & GET_UV1_ERR_MSK; 1430 tmp = uv_err_sts & GET_UV1_ERR_MSK;
1435 if (int_sts & INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK) { 1431 if (int_sts & INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK)
1436 hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; 1432 hw->rx_list_sts[1] &= ~rx_waiting_uv_intr;
1437 }
1438 1433
1439 if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) { 1434 if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) {
1440 hw->rx_list_sts[1] &= ~rx_waiting_uv_intr; 1435 hw->rx_list_sts[1] &= ~rx_waiting_uv_intr;
@@ -1472,7 +1467,7 @@ static void crystalhd_rx_isr(struct crystalhd_hw *hw, uint32_t intr_sts)
1472{ 1467{
1473 unsigned long flags; 1468 unsigned long flags;
1474 uint32_t i, list_avail = 0; 1469 uint32_t i, list_avail = 0;
1475 BC_STATUS comp_sts = BC_STS_NO_DATA; 1470 enum BC_STATUS comp_sts = BC_STS_NO_DATA;
1476 uint32_t y_err_sts, uv_err_sts, y_dn_sz = 0, uv_dn_sz = 0; 1471 uint32_t y_err_sts, uv_err_sts, y_dn_sz = 0, uv_dn_sz = 0;
1477 bool ret = 0; 1472 bool ret = 0;
1478 1473
@@ -1540,15 +1535,15 @@ static void crystalhd_rx_isr(struct crystalhd_hw *hw, uint32_t intr_sts)
1540 } 1535 }
1541} 1536}
1542 1537
1543static BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw, 1538static enum BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw,
1544 BC_FW_CMD *fw_cmd) 1539 struct BC_FW_CMD *fw_cmd)
1545{ 1540{
1546 BC_STATUS sts = BC_STS_SUCCESS; 1541 enum BC_STATUS sts = BC_STS_SUCCESS;
1547 DecRspChannelStartVideo *st_rsp = NULL; 1542 struct dec_rsp_channel_start_video *st_rsp = NULL;
1548 1543
1549 switch (fw_cmd->cmd[0]) { 1544 switch (fw_cmd->cmd[0]) {
1550 case eCMD_C011_DEC_CHAN_START_VIDEO: 1545 case eCMD_C011_DEC_CHAN_START_VIDEO:
1551 st_rsp = (DecRspChannelStartVideo *)fw_cmd->rsp; 1546 st_rsp = (struct dec_rsp_channel_start_video *)fw_cmd->rsp;
1552 hw->pib_del_Q_addr = st_rsp->picInfoDeliveryQ; 1547 hw->pib_del_Q_addr = st_rsp->picInfoDeliveryQ;
1553 hw->pib_rel_Q_addr = st_rsp->picInfoReleaseQ; 1548 hw->pib_rel_Q_addr = st_rsp->picInfoReleaseQ;
1554 BCMLOG(BCMLOG_DBG, "DelQAddr:%x RelQAddr:%x\n", 1549 BCMLOG(BCMLOG_DBG, "DelQAddr:%x RelQAddr:%x\n",
@@ -1566,10 +1561,10 @@ static BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw,
1566 return sts; 1561 return sts;
1567} 1562}
1568 1563
1569static BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw) 1564static enum BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw)
1570{ 1565{
1571 uint32_t reg; 1566 uint32_t reg;
1572 link_misc_perst_decoder_ctrl rst_cntrl_reg; 1567 union link_misc_perst_decoder_ctrl rst_cntrl_reg;
1573 1568
1574 /* Pulse reset pin of 7412 (MISC_PERST_DECODER_CTRL) */ 1569 /* Pulse reset pin of 7412 (MISC_PERST_DECODER_CTRL) */
1575 rst_cntrl_reg.whole_reg = crystalhd_reg_rd(hw->adp, MISC_PERST_DECODER_CTRL); 1570 rst_cntrl_reg.whole_reg = crystalhd_reg_rd(hw->adp, MISC_PERST_DECODER_CTRL);
@@ -1627,7 +1622,7 @@ static BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw)
1627** 1622**
1628*************************************************/ 1623*************************************************/
1629 1624
1630BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer, uint32_t sz) 1625enum BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer, uint32_t sz)
1631{ 1626{
1632 uint32_t reg_data, cnt, *temp_buff; 1627 uint32_t reg_data, cnt, *temp_buff;
1633 uint32_t fw_sig_len = 36; 1628 uint32_t fw_sig_len = 36;
@@ -1719,13 +1714,14 @@ BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer, uint32_
1719 return BC_STS_SUCCESS;; 1714 return BC_STS_SUCCESS;;
1720} 1715}
1721 1716
1722BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd) 1717enum BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw,
1718 struct BC_FW_CMD *fw_cmd)
1723{ 1719{
1724 uint32_t cnt = 0, cmd_res_addr; 1720 uint32_t cnt = 0, cmd_res_addr;
1725 uint32_t *cmd_buff, *res_buff; 1721 uint32_t *cmd_buff, *res_buff;
1726 wait_queue_head_t fw_cmd_event; 1722 wait_queue_head_t fw_cmd_event;
1727 int rc = 0; 1723 int rc = 0;
1728 BC_STATUS sts; 1724 enum BC_STATUS sts;
1729 1725
1730 crystalhd_create_event(&fw_cmd_event); 1726 crystalhd_create_event(&fw_cmd_event);
1731 1727
@@ -1740,7 +1736,7 @@ BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd)
1740 res_buff = fw_cmd->rsp; 1736 res_buff = fw_cmd->rsp;
1741 1737
1742 if (!cmd_buff || !res_buff) { 1738 if (!cmd_buff || !res_buff) {
1743 BCMLOG_ERR("Invalid Parameters for F/W Command \n"); 1739 BCMLOG_ERR("Invalid Parameters for F/W Command\n");
1744 return BC_STS_INV_ARG; 1740 return BC_STS_INV_ARG;
1745 } 1741 }
1746 1742
@@ -1859,7 +1855,7 @@ bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw)
1859 return rc; 1855 return rc;
1860} 1856}
1861 1857
1862BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw, struct crystalhd_adp *adp) 1858enum BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw, struct crystalhd_adp *adp)
1863{ 1859{
1864 if (!hw || !adp) { 1860 if (!hw || !adp) {
1865 BCMLOG_ERR("Invalid Arguments\n"); 1861 BCMLOG_ERR("Invalid Arguments\n");
@@ -1891,7 +1887,7 @@ BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw, struct crystalhd_adp *adp)
1891 return BC_STS_SUCCESS; 1887 return BC_STS_SUCCESS;
1892} 1888}
1893 1889
1894BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw) 1890enum BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw)
1895{ 1891{
1896 if (!hw) { 1892 if (!hw) {
1897 BCMLOG_ERR("Invalid Arguments\n"); 1893 BCMLOG_ERR("Invalid Arguments\n");
@@ -1908,14 +1904,14 @@ BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw)
1908 return BC_STS_SUCCESS; 1904 return BC_STS_SUCCESS;
1909} 1905}
1910 1906
1911BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) 1907enum BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw)
1912{ 1908{
1913 unsigned int i; 1909 unsigned int i;
1914 void *mem; 1910 void *mem;
1915 size_t mem_len; 1911 size_t mem_len;
1916 dma_addr_t phy_addr; 1912 dma_addr_t phy_addr;
1917 BC_STATUS sts = BC_STS_SUCCESS; 1913 enum BC_STATUS sts = BC_STS_SUCCESS;
1918 crystalhd_rx_dma_pkt *rpkt; 1914 struct crystalhd_rx_dma_pkt *rpkt;
1919 1915
1920 if (!hw || !hw->adp) { 1916 if (!hw || !hw->adp) {
1921 BCMLOG_ERR("Invalid Arguments\n"); 1917 BCMLOG_ERR("Invalid Arguments\n");
@@ -1928,7 +1924,7 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw)
1928 return sts; 1924 return sts;
1929 } 1925 }
1930 1926
1931 mem_len = BC_LINK_MAX_SGLS * sizeof(dma_descriptor); 1927 mem_len = BC_LINK_MAX_SGLS * sizeof(struct dma_descriptor);
1932 1928
1933 for (i = 0; i < BC_TX_LIST_CNT; i++) { 1929 for (i = 0; i < BC_TX_LIST_CNT; i++) {
1934 mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr); 1930 mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr);
@@ -1943,7 +1939,7 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw)
1943 hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = mem; 1939 hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = mem;
1944 hw->tx_pkt_pool[i].desc_mem.phy_addr = phy_addr; 1940 hw->tx_pkt_pool[i].desc_mem.phy_addr = phy_addr;
1945 hw->tx_pkt_pool[i].desc_mem.sz = BC_LINK_MAX_SGLS * 1941 hw->tx_pkt_pool[i].desc_mem.sz = BC_LINK_MAX_SGLS *
1946 sizeof(dma_descriptor); 1942 sizeof(struct dma_descriptor);
1947 hw->tx_pkt_pool[i].list_tag = 0; 1943 hw->tx_pkt_pool[i].list_tag = 0;
1948 1944
1949 /* Add TX dma requests to Free Queue..*/ 1945 /* Add TX dma requests to Free Queue..*/
@@ -1973,7 +1969,7 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw)
1973 } 1969 }
1974 rpkt->desc_mem.pdma_desc_start = mem; 1970 rpkt->desc_mem.pdma_desc_start = mem;
1975 rpkt->desc_mem.phy_addr = phy_addr; 1971 rpkt->desc_mem.phy_addr = phy_addr;
1976 rpkt->desc_mem.sz = BC_LINK_MAX_SGLS * sizeof(dma_descriptor); 1972 rpkt->desc_mem.sz = BC_LINK_MAX_SGLS * sizeof(struct dma_descriptor);
1977 rpkt->pkt_tag = hw->rx_pkt_tag_seed + i; 1973 rpkt->pkt_tag = hw->rx_pkt_tag_seed + i;
1978 crystalhd_hw_free_rx_pkt(hw, rpkt); 1974 crystalhd_hw_free_rx_pkt(hw, rpkt);
1979 } 1975 }
@@ -1981,10 +1977,10 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw)
1981 return BC_STS_SUCCESS; 1977 return BC_STS_SUCCESS;
1982} 1978}
1983 1979
1984BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw) 1980enum BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw)
1985{ 1981{
1986 unsigned int i; 1982 unsigned int i;
1987 crystalhd_rx_dma_pkt *rpkt = NULL; 1983 struct crystalhd_rx_dma_pkt *rpkt = NULL;
1988 1984
1989 if (!hw || !hw->adp) { 1985 if (!hw || !hw->adp) {
1990 BCMLOG_ERR("Invalid Arguments\n"); 1986 BCMLOG_ERR("Invalid Arguments\n");
@@ -2019,16 +2015,16 @@ BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw)
2019 return BC_STS_SUCCESS; 2015 return BC_STS_SUCCESS;
2020} 2016}
2021 2017
2022BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq, 2018enum BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, struct crystalhd_dio_req *ioreq,
2023 hw_comp_callback call_back, 2019 hw_comp_callback call_back,
2024 wait_queue_head_t *cb_event, uint32_t *list_id, 2020 wait_queue_head_t *cb_event, uint32_t *list_id,
2025 uint8_t data_flags) 2021 uint8_t data_flags)
2026{ 2022{
2027 tx_dma_pkt *tx_dma_packet = NULL; 2023 struct tx_dma_pkt *tx_dma_packet = NULL;
2028 uint32_t first_desc_u_addr, first_desc_l_addr; 2024 uint32_t first_desc_u_addr, first_desc_l_addr;
2029 uint32_t low_addr, high_addr; 2025 uint32_t low_addr, high_addr;
2030 addr_64 desc_addr; 2026 union addr_64 desc_addr;
2031 BC_STATUS sts, add_sts; 2027 enum BC_STATUS sts, add_sts;
2032 uint32_t dummy_index = 0; 2028 uint32_t dummy_index = 0;
2033 unsigned long flags; 2029 unsigned long flags;
2034 bool rc; 2030 bool rc;
@@ -2053,7 +2049,7 @@ BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq
2053 } 2049 }
2054 2050
2055 /* Get a list from TxFreeQ */ 2051 /* Get a list from TxFreeQ */
2056 tx_dma_packet = (tx_dma_pkt *)crystalhd_dioq_fetch(hw->tx_freeq); 2052 tx_dma_packet = (struct tx_dma_pkt *)crystalhd_dioq_fetch(hw->tx_freeq);
2057 if (!tx_dma_packet) { 2053 if (!tx_dma_packet) {
2058 BCMLOG_ERR("No empty elements..\n"); 2054 BCMLOG_ERR("No empty elements..\n");
2059 return BC_STS_ERR_USAGE; 2055 return BC_STS_ERR_USAGE;
@@ -2126,7 +2122,7 @@ BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq
2126 * 2122 *
2127 * FIX_ME: Not Tested the actual condition.. 2123 * FIX_ME: Not Tested the actual condition..
2128 */ 2124 */
2129BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id) 2125enum BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id)
2130{ 2126{
2131 if (!hw || !list_id) { 2127 if (!hw || !list_id) {
2132 BCMLOG_ERR("Invalid Arguments\n"); 2128 BCMLOG_ERR("Invalid Arguments\n");
@@ -2139,12 +2135,12 @@ BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id)
2139 return BC_STS_SUCCESS; 2135 return BC_STS_SUCCESS;
2140} 2136}
2141 2137
2142BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, 2138enum BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw,
2143 crystalhd_dio_req *ioreq, bool en_post) 2139 struct crystalhd_dio_req *ioreq, bool en_post)
2144{ 2140{
2145 crystalhd_rx_dma_pkt *rpkt; 2141 struct crystalhd_rx_dma_pkt *rpkt;
2146 uint32_t tag, uv_desc_ix = 0; 2142 uint32_t tag, uv_desc_ix = 0;
2147 BC_STATUS sts; 2143 enum BC_STATUS sts;
2148 2144
2149 if (!hw || !ioreq) { 2145 if (!hw || !ioreq) {
2150 BCMLOG_ERR("Invalid Arguments\n"); 2146 BCMLOG_ERR("Invalid Arguments\n");
@@ -2169,7 +2165,7 @@ BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw,
2169 /* Store the address of UV in the rx packet for post*/ 2165 /* Store the address of UV in the rx packet for post*/
2170 if (uv_desc_ix) 2166 if (uv_desc_ix)
2171 rpkt->uv_phy_addr = rpkt->desc_mem.phy_addr + 2167 rpkt->uv_phy_addr = rpkt->desc_mem.phy_addr +
2172 (sizeof(dma_descriptor) * (uv_desc_ix + 1)); 2168 (sizeof(struct dma_descriptor) * (uv_desc_ix + 1));
2173 2169
2174 if (en_post) 2170 if (en_post)
2175 sts = crystalhd_hw_post_cap_buff(hw, rpkt); 2171 sts = crystalhd_hw_post_cap_buff(hw, rpkt);
@@ -2179,11 +2175,11 @@ BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw,
2179 return sts; 2175 return sts;
2180} 2176}
2181 2177
2182BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, 2178enum BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw,
2183 BC_PIC_INFO_BLOCK *pib, 2179 struct BC_PIC_INFO_BLOCK *pib,
2184 crystalhd_dio_req **ioreq) 2180 struct crystalhd_dio_req **ioreq)
2185{ 2181{
2186 crystalhd_rx_dma_pkt *rpkt; 2182 struct crystalhd_rx_dma_pkt *rpkt;
2187 uint32_t timeout = BC_PROC_OUTPUT_TIMEOUT / 1000; 2183 uint32_t timeout = BC_PROC_OUTPUT_TIMEOUT / 1000;
2188 uint32_t sig_pending = 0; 2184 uint32_t sig_pending = 0;
2189 2185
@@ -2215,10 +2211,10 @@ BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw,
2215 return BC_STS_SUCCESS; 2211 return BC_STS_SUCCESS;
2216} 2212}
2217 2213
2218BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw) 2214enum BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw)
2219{ 2215{
2220 crystalhd_rx_dma_pkt *rx_pkt; 2216 struct crystalhd_rx_dma_pkt *rx_pkt;
2221 BC_STATUS sts; 2217 enum BC_STATUS sts;
2222 uint32_t i; 2218 uint32_t i;
2223 2219
2224 if (!hw) { 2220 if (!hw) {
@@ -2240,7 +2236,7 @@ BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw)
2240 return BC_STS_SUCCESS; 2236 return BC_STS_SUCCESS;
2241} 2237}
2242 2238
2243BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw) 2239enum BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw)
2244{ 2240{
2245 void *temp = NULL; 2241 void *temp = NULL;
2246 2242
@@ -2260,7 +2256,7 @@ BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw)
2260 return BC_STS_SUCCESS; 2256 return BC_STS_SUCCESS;
2261} 2257}
2262 2258
2263BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw) 2259enum BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw)
2264{ 2260{
2265 hw->stats.pause_cnt++; 2261 hw->stats.pause_cnt++;
2266 hw->stop_pending = 1; 2262 hw->stop_pending = 1;
@@ -2272,9 +2268,9 @@ BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw)
2272 return BC_STS_SUCCESS; 2268 return BC_STS_SUCCESS;
2273} 2269}
2274 2270
2275BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw) 2271enum BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw)
2276{ 2272{
2277 BC_STATUS sts; 2273 enum BC_STATUS sts;
2278 uint32_t aspm; 2274 uint32_t aspm;
2279 2275
2280 hw->stop_pending = 0; 2276 hw->stop_pending = 0;
@@ -2288,9 +2284,9 @@ BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw)
2288 return sts; 2284 return sts;
2289} 2285}
2290 2286
2291BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw) 2287enum BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw)
2292{ 2288{
2293 BC_STATUS sts; 2289 enum BC_STATUS sts;
2294 2290
2295 if (!hw) { 2291 if (!hw) {
2296 BCMLOG_ERR("Invalid Arguments\n"); 2292 BCMLOG_ERR("Invalid Arguments\n");
@@ -2329,7 +2325,7 @@ void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stat
2329 memcpy(stats, &hw->stats, sizeof(*stats)); 2325 memcpy(stats, &hw->stats, sizeof(*stats));
2330} 2326}
2331 2327
2332BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *hw) 2328enum BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *hw)
2333{ 2329{
2334 uint32_t reg, n, i; 2330 uint32_t reg, n, i;
2335 uint32_t vco_mg, refresh_reg; 2331 uint32_t vco_mg, refresh_reg;
diff --git a/drivers/staging/crystalhd/crystalhd_hw.h b/drivers/staging/crystalhd/crystalhd_hw.h
index 1c6318e912ac..3efbf9d4ff5d 100644
--- a/drivers/staging/crystalhd/crystalhd_hw.h
+++ b/drivers/staging/crystalhd/crystalhd_hw.h
@@ -109,7 +109,7 @@
109#define DecHt_HostSwReset 0x340000 109#define DecHt_HostSwReset 0x340000
110#define BC_DRAM_FW_CFG_ADDR 0x001c2000 110#define BC_DRAM_FW_CFG_ADDR 0x001c2000
111 111
112typedef union _addr_64_ { 112union addr_64 {
113 struct { 113 struct {
114 uint32_t low_part; 114 uint32_t low_part;
115 uint32_t high_part; 115 uint32_t high_part;
@@ -117,9 +117,9 @@ typedef union _addr_64_ {
117 117
118 uint64_t full_addr; 118 uint64_t full_addr;
119 119
120} addr_64; 120};
121 121
122typedef union _intr_mask_reg_ { 122union intr_mask_reg {
123 struct { 123 struct {
124 uint32_t mask_tx_done:1; 124 uint32_t mask_tx_done:1;
125 uint32_t mask_tx_err:1; 125 uint32_t mask_tx_err:1;
@@ -133,9 +133,9 @@ typedef union _intr_mask_reg_ {
133 133
134 uint32_t whole_reg; 134 uint32_t whole_reg;
135 135
136} intr_mask_reg; 136};
137 137
138typedef union _link_misc_perst_deco_ctrl_ { 138union link_misc_perst_deco_ctrl {
139 struct { 139 struct {
140 uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ 140 uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/
141 uint32_t reserved0:3; /* Reserved.No Effect*/ 141 uint32_t reserved0:3; /* Reserved.No Effect*/
@@ -145,9 +145,9 @@ typedef union _link_misc_perst_deco_ctrl_ {
145 145
146 uint32_t whole_reg; 146 uint32_t whole_reg;
147 147
148} link_misc_perst_deco_ctrl; 148};
149 149
150typedef union _link_misc_perst_clk_ctrl_ { 150union link_misc_perst_clk_ctrl {
151 struct { 151 struct {
152 uint32_t sel_alt_clk:1; /* When set, selects a 6.75MHz clock as the source of core_clk */ 152 uint32_t sel_alt_clk:1; /* When set, selects a 6.75MHz clock as the source of core_clk */
153 uint32_t stop_core_clk:1; /* When set, stops the branch of core_clk that is not needed for low power operation */ 153 uint32_t stop_core_clk:1; /* When set, stops the branch of core_clk that is not needed for low power operation */
@@ -161,10 +161,9 @@ typedef union _link_misc_perst_clk_ctrl_ {
161 161
162 uint32_t whole_reg; 162 uint32_t whole_reg;
163 163
164} link_misc_perst_clk_ctrl; 164};
165
166 165
167typedef union _link_misc_perst_decoder_ctrl_ { 166union link_misc_perst_decoder_ctrl {
168 struct { 167 struct {
169 uint32_t bcm_7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ 168 uint32_t bcm_7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/
170 uint32_t res0:3; /* Reserved.No Effect*/ 169 uint32_t res0:3; /* Reserved.No Effect*/
@@ -174,10 +173,9 @@ typedef union _link_misc_perst_decoder_ctrl_ {
174 173
175 uint32_t whole_reg; 174 uint32_t whole_reg;
176 175
177} link_misc_perst_decoder_ctrl; 176};
178
179 177
180typedef union _desc_low_addr_reg_ { 178union desc_low_addr_reg {
181 struct { 179 struct {
182 uint32_t list_valid:1; 180 uint32_t list_valid:1;
183 uint32_t reserved:4; 181 uint32_t reserved:4;
@@ -186,9 +184,9 @@ typedef union _desc_low_addr_reg_ {
186 184
187 uint32_t whole_reg; 185 uint32_t whole_reg;
188 186
189} desc_low_addr_reg; 187};
190 188
191typedef struct _dma_descriptor_ { /* 8 32-bit values */ 189struct dma_descriptor { /* 8 32-bit values */
192 /* 0th u32 */ 190 /* 0th u32 */
193 uint32_t sdram_buff_addr:28; /* bits 0-27: SDRAM Address */ 191 uint32_t sdram_buff_addr:28; /* bits 0-27: SDRAM Address */
194 uint32_t res0:4; /* bits 28-31: Reserved */ 192 uint32_t res0:4; /* bits 28-31: Reserved */
@@ -220,24 +218,22 @@ typedef struct _dma_descriptor_ { /* 8 32-bit values */
220 /* 7th u32 */ 218 /* 7th u32 */
221 uint32_t res8; /* Last 32bits reserved */ 219 uint32_t res8; /* Last 32bits reserved */
222 220
223} dma_descriptor, *pdma_descriptor; 221};
224 222
225/* 223/*
226 * We will allocate the memory in 4K pages 224 * We will allocate the memory in 4K pages
227 * the linked list will be a list of 32 byte descriptors. 225 * the linked list will be a list of 32 byte descriptors.
228 * The virtual address will determine what should be freed. 226 * The virtual address will determine what should be freed.
229 */ 227 */
230typedef struct _dma_desc_mem_ { 228struct dma_desc_mem {
231 pdma_descriptor pdma_desc_start; /* 32-bytes for dma descriptor. should be first element */ 229 struct dma_descriptor *pdma_desc_start; /* 32-bytes for dma descriptor. should be first element */
232 dma_addr_t phy_addr; /* physical address of each DMA desc */ 230 dma_addr_t phy_addr; /* physical address of each DMA desc */
233 uint32_t sz; 231 uint32_t sz;
234 struct _dma_desc_mem_ *Next; /* points to Next Descriptor in chain */ 232 struct _dma_desc_mem_ *Next; /* points to Next Descriptor in chain */
235 233
236} dma_desc_mem, *pdma_desc_mem; 234};
237
238
239 235
240typedef enum _list_sts_ { 236enum list_sts {
241 sts_free = 0, 237 sts_free = 0,
242 238
243 /* RX-Y Bits 0:7 */ 239 /* RX-Y Bits 0:7 */
@@ -253,30 +249,27 @@ typedef enum _list_sts_ {
253 249
254 rx_y_mask = 0x000000FF, 250 rx_y_mask = 0x000000FF,
255 rx_uv_mask = 0x0000FF00, 251 rx_uv_mask = 0x0000FF00,
252};
256 253
257} list_sts; 254struct tx_dma_pkt {
258 255 struct dma_desc_mem desc_mem;
259typedef struct _tx_dma_pkt_ {
260 dma_desc_mem desc_mem;
261 hw_comp_callback call_back; 256 hw_comp_callback call_back;
262 crystalhd_dio_req *dio_req; 257 struct crystalhd_dio_req *dio_req;
263 wait_queue_head_t *cb_event; 258 wait_queue_head_t *cb_event;
264 uint32_t list_tag; 259 uint32_t list_tag;
260};
265 261
266} tx_dma_pkt; 262struct crystalhd_rx_dma_pkt {
267 263 struct dma_desc_mem desc_mem;
268typedef struct _crystalhd_rx_dma_pkt { 264 struct crystalhd_dio_req *dio_req;
269 dma_desc_mem desc_mem;
270 crystalhd_dio_req *dio_req;
271 uint32_t pkt_tag; 265 uint32_t pkt_tag;
272 uint32_t flags; 266 uint32_t flags;
273 BC_PIC_INFO_BLOCK pib; 267 struct BC_PIC_INFO_BLOCK pib;
274 dma_addr_t uv_phy_addr; 268 dma_addr_t uv_phy_addr;
275 struct _crystalhd_rx_dma_pkt *next; 269 struct crystalhd_rx_dma_pkt *next;
276 270};
277} crystalhd_rx_dma_pkt;
278 271
279struct crystalhd_hw_stats{ 272struct crystalhd_hw_stats {
280 uint32_t rx_errors; 273 uint32_t rx_errors;
281 uint32_t tx_errors; 274 uint32_t tx_errors;
282 uint32_t freeq_count; 275 uint32_t freeq_count;
@@ -288,13 +281,13 @@ struct crystalhd_hw_stats{
288}; 281};
289 282
290struct crystalhd_hw { 283struct crystalhd_hw {
291 tx_dma_pkt tx_pkt_pool[DMA_ENGINE_CNT]; 284 struct tx_dma_pkt tx_pkt_pool[DMA_ENGINE_CNT];
292 spinlock_t lock; 285 spinlock_t lock;
293 286
294 uint32_t tx_ioq_tag_seed; 287 uint32_t tx_ioq_tag_seed;
295 uint32_t tx_list_post_index; 288 uint32_t tx_list_post_index;
296 289
297 crystalhd_rx_dma_pkt *rx_pkt_pool_head; 290 struct crystalhd_rx_dma_pkt *rx_pkt_pool_head;
298 uint32_t rx_pkt_tag_seed; 291 uint32_t rx_pkt_tag_seed;
299 292
300 bool dev_started; 293 bool dev_started;
@@ -306,16 +299,16 @@ struct crystalhd_hw {
306 uint32_t pib_del_Q_addr; 299 uint32_t pib_del_Q_addr;
307 uint32_t pib_rel_Q_addr; 300 uint32_t pib_rel_Q_addr;
308 301
309 crystalhd_dioq_t *tx_freeq; 302 struct crystalhd_dioq *tx_freeq;
310 crystalhd_dioq_t *tx_actq; 303 struct crystalhd_dioq *tx_actq;
311 304
312 /* Rx DMA Engine Specific Locks */ 305 /* Rx DMA Engine Specific Locks */
313 spinlock_t rx_lock; 306 spinlock_t rx_lock;
314 uint32_t rx_list_post_index; 307 uint32_t rx_list_post_index;
315 list_sts rx_list_sts[DMA_ENGINE_CNT]; 308 enum list_sts rx_list_sts[DMA_ENGINE_CNT];
316 crystalhd_dioq_t *rx_rdyq; 309 struct crystalhd_dioq *rx_rdyq;
317 crystalhd_dioq_t *rx_freeq; 310 struct crystalhd_dioq *rx_freeq;
318 crystalhd_dioq_t *rx_actq; 311 struct crystalhd_dioq *rx_actq;
319 uint32_t stop_pending; 312 uint32_t stop_pending;
320 313
321 /* HW counters.. */ 314 /* HW counters.. */
@@ -364,35 +357,35 @@ struct crystalhd_hw {
364 357
365 358
366/**** API Exposed to the other layers ****/ 359/**** API Exposed to the other layers ****/
367BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, 360enum BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp,
368 void *buffer, uint32_t sz); 361 void *buffer, uint32_t sz);
369BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd); 362enum BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, struct BC_FW_CMD *fw_cmd);
370bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw); 363bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw);
371BC_STATUS crystalhd_hw_open(struct crystalhd_hw *, struct crystalhd_adp *); 364enum BC_STATUS crystalhd_hw_open(struct crystalhd_hw *, struct crystalhd_adp *);
372BC_STATUS crystalhd_hw_close(struct crystalhd_hw *); 365enum BC_STATUS crystalhd_hw_close(struct crystalhd_hw *);
373BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *); 366enum BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *);
374BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *); 367enum BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *);
375 368
376 369
377BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq, 370enum BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, struct crystalhd_dio_req *ioreq,
378 hw_comp_callback call_back, 371 hw_comp_callback call_back,
379 wait_queue_head_t *cb_event, 372 wait_queue_head_t *cb_event,
380 uint32_t *list_id, uint8_t data_flags); 373 uint32_t *list_id, uint8_t data_flags);
381 374
382BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw); 375enum BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw);
383BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw); 376enum BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw);
384BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw); 377enum BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw);
385BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id); 378enum BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id);
386BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, 379enum BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw,
387 crystalhd_dio_req *ioreq, bool en_post); 380 struct crystalhd_dio_req *ioreq, bool en_post);
388BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, 381enum BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw,
389 BC_PIC_INFO_BLOCK *pib, 382 struct BC_PIC_INFO_BLOCK *pib,
390 crystalhd_dio_req **ioreq); 383 struct crystalhd_dio_req **ioreq);
391BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw); 384enum BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw);
392BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw); 385enum BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw);
393void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stats); 386void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stats);
394 387
395/* API to program the core clock on the decoder */ 388/* API to program the core clock on the decoder */
396BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *); 389enum BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *);
397 390
398#endif 391#endif
diff --git a/drivers/staging/crystalhd/crystalhd_lnx.c b/drivers/staging/crystalhd/crystalhd_lnx.c
index 54bad652c0c5..a4ec891328cd 100644
--- a/drivers/staging/crystalhd/crystalhd_lnx.c
+++ b/drivers/staging/crystalhd/crystalhd_lnx.c
@@ -15,7 +15,7 @@
15 along with this driver. If not, see <http://www.gnu.org/licenses/>. 15 along with this driver. If not, see <http://www.gnu.org/licenses/>.
16***************************************************************************/ 16***************************************************************************/
17 17
18#include <linux/version.h> 18#include <linux/smp_lock.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20 20
21#include "crystalhd_lnx.h" 21#include "crystalhd_lnx.h"
@@ -51,7 +51,7 @@ static int chd_dec_enable_int(struct crystalhd_adp *adp)
51 rc = request_irq(adp->pdev->irq, chd_dec_isr, IRQF_SHARED, 51 rc = request_irq(adp->pdev->irq, chd_dec_isr, IRQF_SHARED,
52 adp->name, (void *)adp); 52 adp->name, (void *)adp);
53 if (rc) { 53 if (rc) {
54 BCMLOG_ERR("Interrupt request failed.. \n"); 54 BCMLOG_ERR("Interrupt request failed..\n");
55 pci_disable_msi(adp->pdev); 55 pci_disable_msi(adp->pdev);
56 } 56 }
57 57
@@ -73,10 +73,10 @@ static int chd_dec_disable_int(struct crystalhd_adp *adp)
73 return 0; 73 return 0;
74} 74}
75 75
76crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp, bool isr) 76struct crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp, bool isr)
77{ 77{
78 unsigned long flags = 0; 78 unsigned long flags = 0;
79 crystalhd_ioctl_data *temp; 79 struct crystalhd_ioctl_data *temp;
80 80
81 if (!adp) 81 if (!adp)
82 return NULL; 82 return NULL;
@@ -93,7 +93,7 @@ crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp, bool isr)
93 return temp; 93 return temp;
94} 94}
95 95
96void chd_dec_free_iodata(struct crystalhd_adp *adp, crystalhd_ioctl_data *iodata, 96void chd_dec_free_iodata(struct crystalhd_adp *adp, struct crystalhd_ioctl_data *iodata,
97 bool isr) 97 bool isr)
98{ 98{
99 unsigned long flags = 0; 99 unsigned long flags = 0;
@@ -112,7 +112,7 @@ static inline int crystalhd_user_data(unsigned long ud, void *dr, int size, int
112 int rc; 112 int rc;
113 113
114 if (!ud || !dr) { 114 if (!ud || !dr) {
115 BCMLOG_ERR("Invalid arg \n"); 115 BCMLOG_ERR("Invalid arg\n");
116 return -EINVAL; 116 return -EINVAL;
117 } 117 }
118 118
@@ -122,14 +122,14 @@ static inline int crystalhd_user_data(unsigned long ud, void *dr, int size, int
122 rc = copy_from_user(dr, (void *)ud, size); 122 rc = copy_from_user(dr, (void *)ud, size);
123 123
124 if (rc) { 124 if (rc) {
125 BCMLOG_ERR("Invalid args for command \n"); 125 BCMLOG_ERR("Invalid args for command\n");
126 rc = -EFAULT; 126 rc = -EFAULT;
127 } 127 }
128 128
129 return rc; 129 return rc;
130} 130}
131 131
132static int chd_dec_fetch_cdata(struct crystalhd_adp *adp, crystalhd_ioctl_data *io, 132static int chd_dec_fetch_cdata(struct crystalhd_adp *adp, struct crystalhd_ioctl_data *io,
133 uint32_t m_sz, unsigned long ua) 133 uint32_t m_sz, unsigned long ua)
134{ 134{
135 unsigned long ua_off; 135 unsigned long ua_off;
@@ -163,7 +163,7 @@ static int chd_dec_fetch_cdata(struct crystalhd_adp *adp, crystalhd_ioctl_data *
163} 163}
164 164
165static int chd_dec_release_cdata(struct crystalhd_adp *adp, 165static int chd_dec_release_cdata(struct crystalhd_adp *adp,
166 crystalhd_ioctl_data *io, unsigned long ua) 166 struct crystalhd_ioctl_data *io, unsigned long ua)
167{ 167{
168 unsigned long ua_off; 168 unsigned long ua_off;
169 int rc; 169 int rc;
@@ -193,7 +193,7 @@ static int chd_dec_release_cdata(struct crystalhd_adp *adp,
193} 193}
194 194
195static int chd_dec_proc_user_data(struct crystalhd_adp *adp, 195static int chd_dec_proc_user_data(struct crystalhd_adp *adp,
196 crystalhd_ioctl_data *io, 196 struct crystalhd_ioctl_data *io,
197 unsigned long ua, int set) 197 unsigned long ua, int set)
198{ 198{
199 int rc; 199 int rc;
@@ -206,7 +206,7 @@ static int chd_dec_proc_user_data(struct crystalhd_adp *adp,
206 206
207 rc = crystalhd_user_data(ua, &io->udata, sizeof(io->udata), set); 207 rc = crystalhd_user_data(ua, &io->udata, sizeof(io->udata), set);
208 if (rc) { 208 if (rc) {
209 BCMLOG_ERR("failed to %s iodata \n", (set ? "set" : "get")); 209 BCMLOG_ERR("failed to %s iodata\n", (set ? "set" : "get"));
210 return rc; 210 return rc;
211 } 211 }
212 212
@@ -231,8 +231,8 @@ static int chd_dec_api_cmd(struct crystalhd_adp *adp, unsigned long ua,
231 uint32_t uid, uint32_t cmd, crystalhd_cmd_proc func) 231 uint32_t uid, uint32_t cmd, crystalhd_cmd_proc func)
232{ 232{
233 int rc; 233 int rc;
234 crystalhd_ioctl_data *temp; 234 struct crystalhd_ioctl_data *temp;
235 BC_STATUS sts = BC_STS_SUCCESS; 235 enum BC_STATUS sts = BC_STS_SUCCESS;
236 236
237 temp = chd_dec_alloc_iodata(adp, 0); 237 temp = chd_dec_alloc_iodata(adp, 0);
238 if (!temp) { 238 if (!temp) {
@@ -261,12 +261,12 @@ static int chd_dec_api_cmd(struct crystalhd_adp *adp, unsigned long ua,
261} 261}
262 262
263/* API interfaces */ 263/* API interfaces */
264static int chd_dec_ioctl(struct inode *in, struct file *fd, 264static long chd_dec_ioctl(struct file *fd, unsigned int cmd, unsigned long ua)
265 unsigned int cmd, unsigned long ua)
266{ 265{
267 struct crystalhd_adp *adp = chd_get_adp(); 266 struct crystalhd_adp *adp = chd_get_adp();
268 crystalhd_cmd_proc cproc; 267 crystalhd_cmd_proc cproc;
269 struct crystalhd_user *uc; 268 struct crystalhd_user *uc;
269 int ret;
270 270
271 if (!adp || !fd) { 271 if (!adp || !fd) {
272 BCMLOG_ERR("Invalid adp\n"); 272 BCMLOG_ERR("Invalid adp\n");
@@ -279,20 +279,24 @@ static int chd_dec_ioctl(struct inode *in, struct file *fd,
279 return -ENODATA; 279 return -ENODATA;
280 } 280 }
281 281
282 lock_kernel();
282 cproc = crystalhd_get_cmd_proc(&adp->cmds, cmd, uc); 283 cproc = crystalhd_get_cmd_proc(&adp->cmds, cmd, uc);
283 if (!cproc) { 284 if (!cproc) {
284 BCMLOG_ERR("Unhandled command: %d\n", cmd); 285 BCMLOG_ERR("Unhandled command: %d\n", cmd);
286 unlock_kernel();
285 return -EINVAL; 287 return -EINVAL;
286 } 288 }
287 289
288 return chd_dec_api_cmd(adp, ua, uc->uid, cmd, cproc); 290 ret = chd_dec_api_cmd(adp, ua, uc->uid, cmd, cproc);
291 unlock_kernel();
292 return ret;
289} 293}
290 294
291static int chd_dec_open(struct inode *in, struct file *fd) 295static int chd_dec_open(struct inode *in, struct file *fd)
292{ 296{
293 struct crystalhd_adp *adp = chd_get_adp(); 297 struct crystalhd_adp *adp = chd_get_adp();
294 int rc = 0; 298 int rc = 0;
295 BC_STATUS sts = BC_STS_SUCCESS; 299 enum BC_STATUS sts = BC_STS_SUCCESS;
296 struct crystalhd_user *uc = NULL; 300 struct crystalhd_user *uc = NULL;
297 301
298 BCMLOG_ENTER; 302 BCMLOG_ENTER;
@@ -308,7 +312,7 @@ static int chd_dec_open(struct inode *in, struct file *fd)
308 312
309 sts = crystalhd_user_open(&adp->cmds, &uc); 313 sts = crystalhd_user_open(&adp->cmds, &uc);
310 if (sts != BC_STS_SUCCESS) { 314 if (sts != BC_STS_SUCCESS) {
311 BCMLOG_ERR("cmd_user_open - %d \n", sts); 315 BCMLOG_ERR("cmd_user_open - %d\n", sts);
312 rc = -EBUSY; 316 rc = -EBUSY;
313 } 317 }
314 318
@@ -326,7 +330,7 @@ static int chd_dec_close(struct inode *in, struct file *fd)
326 330
327 BCMLOG_ENTER; 331 BCMLOG_ENTER;
328 if (!adp) { 332 if (!adp) {
329 BCMLOG_ERR("Invalid adp \n"); 333 BCMLOG_ERR("Invalid adp\n");
330 return -EINVAL; 334 return -EINVAL;
331 } 335 }
332 336
@@ -345,14 +349,14 @@ static int chd_dec_close(struct inode *in, struct file *fd)
345 349
346static const struct file_operations chd_dec_fops = { 350static const struct file_operations chd_dec_fops = {
347 .owner = THIS_MODULE, 351 .owner = THIS_MODULE,
348 .ioctl = chd_dec_ioctl, 352 .unlocked_ioctl = chd_dec_ioctl,
349 .open = chd_dec_open, 353 .open = chd_dec_open,
350 .release = chd_dec_close, 354 .release = chd_dec_close,
351}; 355};
352 356
353static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) 357static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp)
354{ 358{
355 crystalhd_ioctl_data *temp; 359 struct crystalhd_ioctl_data *temp;
356 struct device *dev; 360 struct device *dev;
357 int rc = -ENODEV, i = 0; 361 int rc = -ENODEV, i = 0;
358 362
@@ -376,7 +380,7 @@ static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp)
376 380
377 dev = device_create(crystalhd_class, NULL, MKDEV(adp->chd_dec_major, 0), 381 dev = device_create(crystalhd_class, NULL, MKDEV(adp->chd_dec_major, 0),
378 NULL, "crystalhd"); 382 NULL, "crystalhd");
379 if (!dev) { 383 if (IS_ERR(dev)) {
380 BCMLOG_ERR("failed to create device\n"); 384 BCMLOG_ERR("failed to create device\n");
381 goto device_create_fail; 385 goto device_create_fail;
382 } 386 }
@@ -390,7 +394,7 @@ static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp)
390 /* Allocate general purpose ioctl pool. */ 394 /* Allocate general purpose ioctl pool. */
391 for (i = 0; i < CHD_IODATA_POOL_SZ; i++) { 395 for (i = 0; i < CHD_IODATA_POOL_SZ; i++) {
392 /* FIXME: jarod: why atomic? */ 396 /* FIXME: jarod: why atomic? */
393 temp = kzalloc(sizeof(crystalhd_ioctl_data), GFP_ATOMIC); 397 temp = kzalloc(sizeof(struct crystalhd_ioctl_data), GFP_ATOMIC);
394 if (!temp) { 398 if (!temp) {
395 BCMLOG_ERR("ioctl data pool kzalloc failed\n"); 399 BCMLOG_ERR("ioctl data pool kzalloc failed\n");
396 rc = -ENOMEM; 400 rc = -ENOMEM;
@@ -414,7 +418,7 @@ fail:
414 418
415static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp) 419static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp)
416{ 420{
417 crystalhd_ioctl_data *temp = NULL; 421 struct crystalhd_ioctl_data *temp = NULL;
418 if (!adp) 422 if (!adp)
419 return; 423 return;
420 424
@@ -509,7 +513,7 @@ static void __devexit chd_pci_release_mem(struct crystalhd_adp *pinfo)
509static void __devexit chd_dec_pci_remove(struct pci_dev *pdev) 513static void __devexit chd_dec_pci_remove(struct pci_dev *pdev)
510{ 514{
511 struct crystalhd_adp *pinfo; 515 struct crystalhd_adp *pinfo;
512 BC_STATUS sts = BC_STS_SUCCESS; 516 enum BC_STATUS sts = BC_STS_SUCCESS;
513 517
514 BCMLOG_ENTER; 518 BCMLOG_ENTER;
515 519
@@ -521,7 +525,7 @@ static void __devexit chd_dec_pci_remove(struct pci_dev *pdev)
521 525
522 sts = crystalhd_delete_cmd_context(&pinfo->cmds); 526 sts = crystalhd_delete_cmd_context(&pinfo->cmds);
523 if (sts != BC_STS_SUCCESS) 527 if (sts != BC_STS_SUCCESS)
524 BCMLOG_ERR("cmd delete :%d \n", sts); 528 BCMLOG_ERR("cmd delete :%d\n", sts);
525 529
526 chd_dec_release_chdev(pinfo); 530 chd_dec_release_chdev(pinfo);
527 531
@@ -539,7 +543,7 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev,
539{ 543{
540 struct crystalhd_adp *pinfo; 544 struct crystalhd_adp *pinfo;
541 int rc; 545 int rc;
542 BC_STATUS sts = BC_STS_SUCCESS; 546 enum BC_STATUS sts = BC_STS_SUCCESS;
543 547
544 BCMLOG(BCMLOG_DBG, "PCI_INFO: Vendor:0x%04x Device:0x%04x " 548 BCMLOG(BCMLOG_DBG, "PCI_INFO: Vendor:0x%04x Device:0x%04x "
545 "s_vendor:0x%04x s_device: 0x%04x\n", 549 "s_vendor:0x%04x s_device: 0x%04x\n",
@@ -581,7 +585,7 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev,
581 chd_dec_init_chdev(pinfo); 585 chd_dec_init_chdev(pinfo);
582 rc = chd_dec_enable_int(pinfo); 586 rc = chd_dec_enable_int(pinfo);
583 if (rc) { 587 if (rc) {
584 BCMLOG_ERR("_enable_int err:%d \n", rc); 588 BCMLOG_ERR("_enable_int err:%d\n", rc);
585 pci_disable_device(pdev); 589 pci_disable_device(pdev);
586 return -ENODEV; 590 return -ENODEV;
587 } 591 }
@@ -601,7 +605,7 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev,
601 605
602 sts = crystalhd_setup_cmd_context(&pinfo->cmds, pinfo); 606 sts = crystalhd_setup_cmd_context(&pinfo->cmds, pinfo);
603 if (sts != BC_STS_SUCCESS) { 607 if (sts != BC_STS_SUCCESS) {
604 BCMLOG_ERR("cmd setup :%d \n", sts); 608 BCMLOG_ERR("cmd setup :%d\n", sts);
605 pci_disable_device(pdev); 609 pci_disable_device(pdev);
606 return -ENODEV; 610 return -ENODEV;
607 } 611 }
@@ -619,8 +623,8 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev,
619int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state) 623int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state)
620{ 624{
621 struct crystalhd_adp *adp; 625 struct crystalhd_adp *adp;
622 crystalhd_ioctl_data *temp; 626 struct crystalhd_ioctl_data *temp;
623 BC_STATUS sts = BC_STS_SUCCESS; 627 enum BC_STATUS sts = BC_STS_SUCCESS;
624 628
625 adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); 629 adp = (struct crystalhd_adp *)pci_get_drvdata(pdev);
626 if (!adp) { 630 if (!adp) {
@@ -653,7 +657,7 @@ int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state)
653int chd_dec_pci_resume(struct pci_dev *pdev) 657int chd_dec_pci_resume(struct pci_dev *pdev)
654{ 658{
655 struct crystalhd_adp *adp; 659 struct crystalhd_adp *adp;
656 BC_STATUS sts = BC_STS_SUCCESS; 660 enum BC_STATUS sts = BC_STS_SUCCESS;
657 int rc; 661 int rc;
658 662
659 adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); 663 adp = (struct crystalhd_adp *)pci_get_drvdata(pdev);
@@ -675,7 +679,7 @@ int chd_dec_pci_resume(struct pci_dev *pdev)
675 679
676 rc = chd_dec_enable_int(adp); 680 rc = chd_dec_enable_int(adp);
677 if (rc) { 681 if (rc) {
678 BCMLOG_ERR("_enable_int err:%d \n", rc); 682 BCMLOG_ERR("_enable_int err:%d\n", rc);
679 pci_disable_device(pdev); 683 pci_disable_device(pdev);
680 return -ENODEV; 684 return -ENODEV;
681 } 685 }
@@ -738,13 +742,13 @@ static int __init chd_dec_module_init(void)
738 int rc; 742 int rc;
739 743
740 chd_set_log_level(NULL, "debug"); 744 chd_set_log_level(NULL, "debug");
741 BCMLOG(BCMLOG_DATA, "Loading crystalhd %d.%d.%d \n", 745 BCMLOG(BCMLOG_DATA, "Loading crystalhd %d.%d.%d\n",
742 crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev); 746 crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev);
743 747
744 rc = pci_register_driver(&bc_chd_70012_driver); 748 rc = pci_register_driver(&bc_chd_70012_driver);
745 749
746 if (rc < 0) 750 if (rc < 0)
747 BCMLOG_ERR("Could not find any devices. err:%d \n", rc); 751 BCMLOG_ERR("Could not find any devices. err:%d\n", rc);
748 752
749 return rc; 753 return rc;
750} 754}
@@ -752,7 +756,7 @@ module_init(chd_dec_module_init);
752 756
753static void __exit chd_dec_module_cleanup(void) 757static void __exit chd_dec_module_cleanup(void)
754{ 758{
755 BCMLOG(BCMLOG_DATA, "unloading crystalhd %d.%d.%d \n", 759 BCMLOG(BCMLOG_DATA, "unloading crystalhd %d.%d.%d\n",
756 crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev); 760 crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev);
757 761
758 pci_unregister_driver(&bc_chd_70012_driver); 762 pci_unregister_driver(&bc_chd_70012_driver);
diff --git a/drivers/staging/crystalhd/crystalhd_lnx.h b/drivers/staging/crystalhd/crystalhd_lnx.h
index d338ae97a4cf..c951e43cbb3d 100644
--- a/drivers/staging/crystalhd/crystalhd_lnx.h
+++ b/drivers/staging/crystalhd/crystalhd_lnx.h
@@ -42,11 +42,11 @@
42#include <linux/pagemap.h> 42#include <linux/pagemap.h>
43#include <linux/vmalloc.h> 43#include <linux/vmalloc.h>
44 44
45#include <asm/io.h> 45#include <linux/io.h>
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <asm/pgtable.h> 47#include <asm/pgtable.h>
48#include <asm/system.h> 48#include <asm/system.h>
49#include <asm/uaccess.h> 49#include <linux/uaccess.h>
50 50
51#include "crystalhd_cmds.h" 51#include "crystalhd_cmds.h"
52 52
@@ -79,12 +79,12 @@ struct crystalhd_adp {
79 unsigned int chd_dec_major; 79 unsigned int chd_dec_major;
80 unsigned int cfg_users; 80 unsigned int cfg_users;
81 81
82 crystalhd_ioctl_data *idata_free_head; /* ioctl data pool */ 82 struct crystalhd_ioctl_data *idata_free_head; /* ioctl data pool */
83 crystalhd_elem_t *elem_pool_head; /* Queue element pool */ 83 struct crystalhd_elem *elem_pool_head; /* Queue element pool */
84 84
85 struct crystalhd_cmd cmds; 85 struct crystalhd_cmd cmds;
86 86
87 crystalhd_dio_req *ua_map_free_head; 87 struct crystalhd_dio_req *ua_map_free_head;
88 struct pci_pool *fill_byte_pool; 88 struct pci_pool *fill_byte_pool;
89}; 89};
90 90
diff --git a/drivers/staging/crystalhd/crystalhd_misc.c b/drivers/staging/crystalhd/crystalhd_misc.c
index 73593b078b33..2c5138e4e1b5 100644
--- a/drivers/staging/crystalhd/crystalhd_misc.c
+++ b/drivers/staging/crystalhd/crystalhd_misc.c
@@ -43,15 +43,15 @@ static inline void crystalhd_dram_wr(struct crystalhd_adp *adp, uint32_t mem_off
43 bc_dec_reg_wr(adp, (0x00380000 | (mem_off & 0x0007FFFF)), val); 43 bc_dec_reg_wr(adp, (0x00380000 | (mem_off & 0x0007FFFF)), val);
44} 44}
45 45
46static inline BC_STATUS bc_chk_dram_range(struct crystalhd_adp *adp, uint32_t start_off, uint32_t cnt) 46static inline enum BC_STATUS bc_chk_dram_range(struct crystalhd_adp *adp, uint32_t start_off, uint32_t cnt)
47{ 47{
48 return BC_STS_SUCCESS; 48 return BC_STS_SUCCESS;
49} 49}
50 50
51static crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp) 51static struct crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp)
52{ 52{
53 unsigned long flags = 0; 53 unsigned long flags = 0;
54 crystalhd_dio_req *temp = NULL; 54 struct crystalhd_dio_req *temp = NULL;
55 55
56 if (!adp) { 56 if (!adp) {
57 BCMLOG_ERR("Invalid Arg!!\n"); 57 BCMLOG_ERR("Invalid Arg!!\n");
@@ -67,7 +67,7 @@ static crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp)
67 return temp; 67 return temp;
68} 68}
69 69
70static void crystalhd_free_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio) 70static void crystalhd_free_dio(struct crystalhd_adp *adp, struct crystalhd_dio_req *dio)
71{ 71{
72 unsigned long flags = 0; 72 unsigned long flags = 0;
73 73
@@ -83,10 +83,10 @@ static void crystalhd_free_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio
83 spin_unlock_irqrestore(&adp->lock, flags); 83 spin_unlock_irqrestore(&adp->lock, flags);
84} 84}
85 85
86static crystalhd_elem_t *crystalhd_alloc_elem(struct crystalhd_adp *adp) 86static struct crystalhd_elem *crystalhd_alloc_elem(struct crystalhd_adp *adp)
87{ 87{
88 unsigned long flags = 0; 88 unsigned long flags = 0;
89 crystalhd_elem_t *temp = NULL; 89 struct crystalhd_elem *temp = NULL;
90 90
91 if (!adp) 91 if (!adp)
92 return temp; 92 return temp;
@@ -100,7 +100,7 @@ static crystalhd_elem_t *crystalhd_alloc_elem(struct crystalhd_adp *adp)
100 100
101 return temp; 101 return temp;
102} 102}
103static void crystalhd_free_elem(struct crystalhd_adp *adp, crystalhd_elem_t *elem) 103static void crystalhd_free_elem(struct crystalhd_adp *adp, struct crystalhd_elem *elem)
104{ 104{
105 unsigned long flags = 0; 105 unsigned long flags = 0;
106 106
@@ -230,14 +230,14 @@ void crystalhd_reg_wr(struct crystalhd_adp *adp, uint32_t reg_off, uint32_t val)
230 * 230 *
231 * 7412's Dram read routine. 231 * 7412's Dram read routine.
232 */ 232 */
233BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off, 233enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off,
234 uint32_t dw_cnt, uint32_t *rd_buff) 234 uint32_t dw_cnt, uint32_t *rd_buff)
235{ 235{
236 uint32_t ix = 0; 236 uint32_t ix = 0;
237 237
238 if (!adp || !rd_buff || 238 if (!adp || !rd_buff ||
239 (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) { 239 (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) {
240 BCMLOG_ERR("Invalid arg \n"); 240 BCMLOG_ERR("Invalid arg\n");
241 return BC_STS_INV_ARG; 241 return BC_STS_INV_ARG;
242 } 242 }
243 for (ix = 0; ix < dw_cnt; ix++) 243 for (ix = 0; ix < dw_cnt; ix++)
@@ -258,14 +258,14 @@ BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off,
258 * 258 *
259 * 7412's Dram write routine. 259 * 7412's Dram write routine.
260 */ 260 */
261BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off, 261enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off,
262 uint32_t dw_cnt, uint32_t *wr_buff) 262 uint32_t dw_cnt, uint32_t *wr_buff)
263{ 263{
264 uint32_t ix = 0; 264 uint32_t ix = 0;
265 265
266 if (!adp || !wr_buff || 266 if (!adp || !wr_buff ||
267 (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) { 267 (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) {
268 BCMLOG_ERR("Invalid arg \n"); 268 BCMLOG_ERR("Invalid arg\n");
269 return BC_STS_INV_ARG; 269 return BC_STS_INV_ARG;
270 } 270 }
271 271
@@ -286,14 +286,14 @@ BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off,
286 * 286 *
287 * Get value from Link's PCIe config space. 287 * Get value from Link's PCIe config space.
288 */ 288 */
289BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off, 289enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off,
290 uint32_t len, uint32_t *val) 290 uint32_t len, uint32_t *val)
291{ 291{
292 BC_STATUS sts = BC_STS_SUCCESS; 292 enum BC_STATUS sts = BC_STS_SUCCESS;
293 int rc = 0; 293 int rc = 0;
294 294
295 if (!adp || !val) { 295 if (!adp || !val) {
296 BCMLOG_ERR("Invalid arg \n"); 296 BCMLOG_ERR("Invalid arg\n");
297 return BC_STS_INV_ARG; 297 return BC_STS_INV_ARG;
298 } 298 }
299 299
@@ -331,14 +331,14 @@ BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off,
331 * 331 *
332 * Set value to Link's PCIe config space. 332 * Set value to Link's PCIe config space.
333 */ 333 */
334BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *adp, uint32_t off, 334enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *adp, uint32_t off,
335 uint32_t len, uint32_t val) 335 uint32_t len, uint32_t val)
336{ 336{
337 BC_STATUS sts = BC_STS_SUCCESS; 337 enum BC_STATUS sts = BC_STS_SUCCESS;
338 int rc = 0; 338 int rc = 0;
339 339
340 if (!adp || !val) { 340 if (!adp || !val) {
341 BCMLOG_ERR("Invalid arg \n"); 341 BCMLOG_ERR("Invalid arg\n");
342 return BC_STS_INV_ARG; 342 return BC_STS_INV_ARG;
343 } 343 }
344 344
@@ -429,11 +429,11 @@ void bc_kern_dma_free(struct crystalhd_adp *adp, uint32_t sz, void *ka,
429 * Initialize Generic DIO queue to hold any data. Callback 429 * Initialize Generic DIO queue to hold any data. Callback
430 * will be used to free elements while deleting the queue. 430 * will be used to free elements while deleting the queue.
431 */ 431 */
432BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp, 432enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp,
433 crystalhd_dioq_t **dioq_hnd, 433 struct crystalhd_dioq **dioq_hnd,
434 crystalhd_data_free_cb cb, void *cbctx) 434 crystalhd_data_free_cb cb, void *cbctx)
435{ 435{
436 crystalhd_dioq_t *dioq = NULL; 436 struct crystalhd_dioq *dioq = NULL;
437 437
438 if (!adp || !dioq_hnd) { 438 if (!adp || !dioq_hnd) {
439 BCMLOG_ERR("Invalid arg!!\n"); 439 BCMLOG_ERR("Invalid arg!!\n");
@@ -446,8 +446,8 @@ BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp,
446 446
447 spin_lock_init(&dioq->lock); 447 spin_lock_init(&dioq->lock);
448 dioq->sig = BC_LINK_DIOQ_SIG; 448 dioq->sig = BC_LINK_DIOQ_SIG;
449 dioq->head = (crystalhd_elem_t *)&dioq->head; 449 dioq->head = (struct crystalhd_elem *)&dioq->head;
450 dioq->tail = (crystalhd_elem_t *)&dioq->head; 450 dioq->tail = (struct crystalhd_elem *)&dioq->head;
451 crystalhd_create_event(&dioq->event); 451 crystalhd_create_event(&dioq->event);
452 dioq->adp = adp; 452 dioq->adp = adp;
453 dioq->data_rel_cb = cb; 453 dioq->data_rel_cb = cb;
@@ -470,7 +470,7 @@ BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp,
470 * by calling the call back provided during creation. 470 * by calling the call back provided during creation.
471 * 471 *
472 */ 472 */
473void crystalhd_delete_dioq(struct crystalhd_adp *adp, crystalhd_dioq_t *dioq) 473void crystalhd_delete_dioq(struct crystalhd_adp *adp, struct crystalhd_dioq *dioq)
474{ 474{
475 void *temp; 475 void *temp;
476 476
@@ -498,11 +498,11 @@ void crystalhd_delete_dioq(struct crystalhd_adp *adp, crystalhd_dioq_t *dioq)
498 * 498 *
499 * Insert new element to Q tail. 499 * Insert new element to Q tail.
500 */ 500 */
501BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, 501enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq, void *data,
502 bool wake, uint32_t tag) 502 bool wake, uint32_t tag)
503{ 503{
504 unsigned long flags = 0; 504 unsigned long flags = 0;
505 crystalhd_elem_t *tmp; 505 struct crystalhd_elem *tmp;
506 506
507 if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !data) { 507 if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !data) {
508 BCMLOG_ERR("Invalid arg!!\n"); 508 BCMLOG_ERR("Invalid arg!!\n");
@@ -518,7 +518,7 @@ BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data,
518 tmp->data = data; 518 tmp->data = data;
519 tmp->tag = tag; 519 tmp->tag = tag;
520 spin_lock_irqsave(&ioq->lock, flags); 520 spin_lock_irqsave(&ioq->lock, flags);
521 tmp->flink = (crystalhd_elem_t *)&ioq->head; 521 tmp->flink = (struct crystalhd_elem *)&ioq->head;
522 tmp->blink = ioq->tail; 522 tmp->blink = ioq->tail;
523 tmp->flink->blink = tmp; 523 tmp->flink->blink = tmp;
524 tmp->blink->flink = tmp; 524 tmp->blink->flink = tmp;
@@ -540,11 +540,11 @@ BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data,
540 * 540 *
541 * Remove an element from Queue. 541 * Remove an element from Queue.
542 */ 542 */
543void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq) 543void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq)
544{ 544{
545 unsigned long flags = 0; 545 unsigned long flags = 0;
546 crystalhd_elem_t *tmp; 546 struct crystalhd_elem *tmp;
547 crystalhd_elem_t *ret = NULL; 547 struct crystalhd_elem *ret = NULL;
548 void *data = NULL; 548 void *data = NULL;
549 549
550 if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { 550 if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) {
@@ -554,7 +554,7 @@ void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq)
554 554
555 spin_lock_irqsave(&ioq->lock, flags); 555 spin_lock_irqsave(&ioq->lock, flags);
556 tmp = ioq->head; 556 tmp = ioq->head;
557 if (tmp != (crystalhd_elem_t *)&ioq->head) { 557 if (tmp != (struct crystalhd_elem *)&ioq->head) {
558 ret = tmp; 558 ret = tmp;
559 tmp->flink->blink = tmp->blink; 559 tmp->flink->blink = tmp->blink;
560 tmp->blink->flink = tmp->flink; 560 tmp->blink->flink = tmp->flink;
@@ -578,11 +578,11 @@ void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq)
578 * 578 *
579 * Search TAG and remove the element. 579 * Search TAG and remove the element.
580 */ 580 */
581void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag) 581void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq, uint32_t tag)
582{ 582{
583 unsigned long flags = 0; 583 unsigned long flags = 0;
584 crystalhd_elem_t *tmp; 584 struct crystalhd_elem *tmp;
585 crystalhd_elem_t *ret = NULL; 585 struct crystalhd_elem *ret = NULL;
586 void *data = NULL; 586 void *data = NULL;
587 587
588 if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { 588 if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) {
@@ -592,7 +592,7 @@ void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag)
592 592
593 spin_lock_irqsave(&ioq->lock, flags); 593 spin_lock_irqsave(&ioq->lock, flags);
594 tmp = ioq->head; 594 tmp = ioq->head;
595 while (tmp != (crystalhd_elem_t *)&ioq->head) { 595 while (tmp != (struct crystalhd_elem *)&ioq->head) {
596 if (tmp->tag == tag) { 596 if (tmp->tag == tag) {
597 ret = tmp; 597 ret = tmp;
598 tmp->flink->blink = tmp->blink; 598 tmp->flink->blink = tmp->blink;
@@ -623,7 +623,7 @@ void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag)
623 * Return element from head if Q is not empty. Wait for new element 623 * Return element from head if Q is not empty. Wait for new element
624 * if Q is empty for Timeout seconds. 624 * if Q is empty for Timeout seconds.
625 */ 625 */
626void *crystalhd_dioq_fetch_wait(crystalhd_dioq_t *ioq, uint32_t to_secs, 626void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq, uint32_t to_secs,
627 uint32_t *sig_pend) 627 uint32_t *sig_pend)
628{ 628{
629 unsigned long flags = 0; 629 unsigned long flags = 0;
@@ -673,19 +673,19 @@ out:
673 * This routine maps user address and lock pages for DMA. 673 * This routine maps user address and lock pages for DMA.
674 * 674 *
675 */ 675 */
676BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff, 676enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff,
677 uint32_t ubuff_sz, uint32_t uv_offset, 677 uint32_t ubuff_sz, uint32_t uv_offset,
678 bool en_422mode, bool dir_tx, 678 bool en_422mode, bool dir_tx,
679 crystalhd_dio_req **dio_hnd) 679 struct crystalhd_dio_req **dio_hnd)
680{ 680{
681 crystalhd_dio_req *dio; 681 struct crystalhd_dio_req *dio;
682 /* FIXME: jarod: should some of these unsigned longs be uint32_t or uintptr_t? */ 682 /* FIXME: jarod: should some of these unsigned longs be uint32_t or uintptr_t? */
683 unsigned long start = 0, end = 0, uaddr = 0, count = 0; 683 unsigned long start = 0, end = 0, uaddr = 0, count = 0;
684 unsigned long spsz = 0, uv_start = 0; 684 unsigned long spsz = 0, uv_start = 0;
685 int i = 0, rw = 0, res = 0, nr_pages = 0, skip_fb_sg = 0; 685 int i = 0, rw = 0, res = 0, nr_pages = 0, skip_fb_sg = 0;
686 686
687 if (!adp || !ubuff || !ubuff_sz || !dio_hnd) { 687 if (!adp || !ubuff || !ubuff_sz || !dio_hnd) {
688 BCMLOG_ERR("Invalid arg \n"); 688 BCMLOG_ERR("Invalid arg\n");
689 return BC_STS_INV_ARG; 689 return BC_STS_INV_ARG;
690 } 690 }
691 /* Compute pages */ 691 /* Compute pages */
@@ -791,7 +791,7 @@ BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff,
791 dio->sg_cnt = pci_map_sg(adp->pdev, dio->sg, 791 dio->sg_cnt = pci_map_sg(adp->pdev, dio->sg,
792 dio->page_cnt, dio->direction); 792 dio->page_cnt, dio->direction);
793 if (dio->sg_cnt <= 0) { 793 if (dio->sg_cnt <= 0) {
794 BCMLOG_ERR("sg map %d-%d \n", dio->sg_cnt, dio->page_cnt); 794 BCMLOG_ERR("sg map %d-%d\n", dio->sg_cnt, dio->page_cnt);
795 crystalhd_unmap_dio(adp, dio); 795 crystalhd_unmap_dio(adp, dio);
796 return BC_STS_ERROR; 796 return BC_STS_ERROR;
797 } 797 }
@@ -820,13 +820,13 @@ BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff,
820 * 820 *
821 * This routine is to unmap the user buffer pages. 821 * This routine is to unmap the user buffer pages.
822 */ 822 */
823BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio) 823enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *adp, struct crystalhd_dio_req *dio)
824{ 824{
825 struct page *page = NULL; 825 struct page *page = NULL;
826 int j = 0; 826 int j = 0;
827 827
828 if (!adp || !dio) { 828 if (!adp || !dio) {
829 BCMLOG_ERR("Invalid arg \n"); 829 BCMLOG_ERR("Invalid arg\n");
830 return BC_STS_INV_ARG; 830 return BC_STS_INV_ARG;
831 } 831 }
832 832
@@ -864,7 +864,7 @@ int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages)
864{ 864{
865 uint32_t asz = 0, i = 0; 865 uint32_t asz = 0, i = 0;
866 uint8_t *temp; 866 uint8_t *temp;
867 crystalhd_dio_req *dio; 867 struct crystalhd_dio_req *dio;
868 868
869 if (!adp || !max_pages) { 869 if (!adp || !max_pages) {
870 BCMLOG_ERR("Invalid Arg!!\n"); 870 BCMLOG_ERR("Invalid Arg!!\n");
@@ -887,13 +887,13 @@ int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages)
887 BC_LINK_SG_POOL_SZ, max_pages, asz, adp->fill_byte_pool); 887 BC_LINK_SG_POOL_SZ, max_pages, asz, adp->fill_byte_pool);
888 888
889 for (i = 0; i < BC_LINK_SG_POOL_SZ; i++) { 889 for (i = 0; i < BC_LINK_SG_POOL_SZ; i++) {
890 temp = (uint8_t *)kzalloc(asz, GFP_KERNEL); 890 temp = kzalloc(asz, GFP_KERNEL);
891 if ((temp) == NULL) { 891 if ((temp) == NULL) {
892 BCMLOG_ERR("Failed to alloc %d mem\n", asz); 892 BCMLOG_ERR("Failed to alloc %d mem\n", asz);
893 return -ENOMEM; 893 return -ENOMEM;
894 } 894 }
895 895
896 dio = (crystalhd_dio_req *)temp; 896 dio = (struct crystalhd_dio_req *)temp;
897 temp += sizeof(*dio); 897 temp += sizeof(*dio);
898 dio->pages = (struct page **)temp; 898 dio->pages = (struct page **)temp;
899 temp += (sizeof(*dio->pages) * max_pages); 899 temp += (sizeof(*dio->pages) * max_pages);
@@ -923,7 +923,7 @@ int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages)
923 */ 923 */
924void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp) 924void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp)
925{ 925{
926 crystalhd_dio_req *dio; 926 struct crystalhd_dio_req *dio;
927 int count = 0; 927 int count = 0;
928 928
929 if (!adp) { 929 if (!adp) {
@@ -947,7 +947,7 @@ void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp)
947 adp->fill_byte_pool = NULL; 947 adp->fill_byte_pool = NULL;
948 } 948 }
949 949
950 BCMLOG(BCMLOG_DBG, "Released dio pool %d \n", count); 950 BCMLOG(BCMLOG_DBG, "Released dio pool %d\n", count);
951} 951}
952 952
953/** 953/**
@@ -965,7 +965,7 @@ int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp,
965 uint32_t pool_size) 965 uint32_t pool_size)
966{ 966{
967 uint32_t i; 967 uint32_t i;
968 crystalhd_elem_t *temp; 968 struct crystalhd_elem *temp;
969 969
970 if (!adp || !pool_size) 970 if (!adp || !pool_size)
971 return -EINVAL; 971 return -EINVAL;
@@ -973,7 +973,7 @@ int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp,
973 for (i = 0; i < pool_size; i++) { 973 for (i = 0; i < pool_size; i++) {
974 temp = kzalloc(sizeof(*temp), GFP_KERNEL); 974 temp = kzalloc(sizeof(*temp), GFP_KERNEL);
975 if (!temp) { 975 if (!temp) {
976 BCMLOG_ERR("kalloc failed \n"); 976 BCMLOG_ERR("kalloc failed\n");
977 return -ENOMEM; 977 return -ENOMEM;
978 } 978 }
979 crystalhd_free_elem(adp, temp); 979 crystalhd_free_elem(adp, temp);
@@ -993,7 +993,7 @@ int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp,
993 */ 993 */
994void crystalhd_delete_elem_pool(struct crystalhd_adp *adp) 994void crystalhd_delete_elem_pool(struct crystalhd_adp *adp)
995{ 995{
996 crystalhd_elem_t *temp; 996 struct crystalhd_elem *temp;
997 int dbg_cnt = 0; 997 int dbg_cnt = 0;
998 998
999 if (!adp) 999 if (!adp)
diff --git a/drivers/staging/crystalhd/crystalhd_misc.h b/drivers/staging/crystalhd/crystalhd_misc.h
index a2aa6ad7fc81..382078eafa03 100644
--- a/drivers/staging/crystalhd/crystalhd_misc.h
+++ b/drivers/staging/crystalhd/crystalhd_misc.h
@@ -34,7 +34,6 @@
34#include <linux/string.h> 34#include <linux/string.h>
35#include <linux/ioctl.h> 35#include <linux/ioctl.h>
36#include <linux/dma-mapping.h> 36#include <linux/dma-mapping.h>
37#include <linux/version.h>
38#include <linux/sched.h> 37#include <linux/sched.h>
39#include <asm/system.h> 38#include <asm/system.h>
40#include "bc_dts_glob_lnx.h" 39#include "bc_dts_glob_lnx.h"
@@ -55,7 +54,7 @@ extern uint32_t g_linklog_level;
55/* Scatter Gather memory pool size for Tx and Rx */ 54/* Scatter Gather memory pool size for Tx and Rx */
56#define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT) 55#define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT)
57 56
58enum _crystalhd_dio_sig { 57enum crystalhd_dio_sig {
59 crystalhd_dio_inv = 0, 58 crystalhd_dio_inv = 0,
60 crystalhd_dio_locked, 59 crystalhd_dio_locked,
61 crystalhd_dio_sg_mapped, 60 crystalhd_dio_sg_mapped,
@@ -77,7 +76,7 @@ struct crystalhd_dio_user_info {
77 bool b422mode; 76 bool b422mode;
78}; 77};
79 78
80typedef struct _crystalhd_dio_req { 79struct crystalhd_dio_req {
81 uint32_t sig; 80 uint32_t sig;
82 uint32_t max_pages; 81 uint32_t max_pages;
83 struct page **pages; 82 struct page **pages;
@@ -89,34 +88,34 @@ typedef struct _crystalhd_dio_req {
89 void *fb_va; 88 void *fb_va;
90 uint32_t fb_size; 89 uint32_t fb_size;
91 dma_addr_t fb_pa; 90 dma_addr_t fb_pa;
92 struct _crystalhd_dio_req *next; 91 struct crystalhd_dio_req *next;
93} crystalhd_dio_req; 92};
94 93
95#define BC_LINK_DIOQ_SIG (0x09223280) 94#define BC_LINK_DIOQ_SIG (0x09223280)
96 95
97typedef struct _crystalhd_elem_s { 96struct crystalhd_elem {
98 struct _crystalhd_elem_s *flink; 97 struct crystalhd_elem *flink;
99 struct _crystalhd_elem_s *blink; 98 struct crystalhd_elem *blink;
100 void *data; 99 void *data;
101 uint32_t tag; 100 uint32_t tag;
102} crystalhd_elem_t; 101};
103 102
104typedef void (*crystalhd_data_free_cb)(void *context, void *data); 103typedef void (*crystalhd_data_free_cb)(void *context, void *data);
105 104
106typedef struct _crystalhd_dioq_s { 105struct crystalhd_dioq {
107 uint32_t sig; 106 uint32_t sig;
108 struct crystalhd_adp *adp; 107 struct crystalhd_adp *adp;
109 crystalhd_elem_t *head; 108 struct crystalhd_elem *head;
110 crystalhd_elem_t *tail; 109 struct crystalhd_elem *tail;
111 uint32_t count; 110 uint32_t count;
112 spinlock_t lock; 111 spinlock_t lock;
113 wait_queue_head_t event; 112 wait_queue_head_t event;
114 crystalhd_data_free_cb data_rel_cb; 113 crystalhd_data_free_cb data_rel_cb;
115 void *cb_context; 114 void *cb_context;
116} crystalhd_dioq_t; 115};
117 116
118typedef void (*hw_comp_callback)(crystalhd_dio_req *, 117typedef void (*hw_comp_callback)(struct crystalhd_dio_req *,
119 wait_queue_head_t *event, BC_STATUS sts); 118 wait_queue_head_t *event, enum BC_STATUS sts);
120 119
121/*========= Decoder (7412) register access routines.================= */ 120/*========= Decoder (7412) register access routines.================= */
122uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t); 121uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t);
@@ -127,12 +126,12 @@ uint32_t crystalhd_reg_rd(struct crystalhd_adp *, uint32_t);
127void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t); 126void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t);
128 127
129/*========= Decoder (7412) memory access routines..=================*/ 128/*========= Decoder (7412) memory access routines..=================*/
130BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); 129enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
131BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); 130enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
132 131
133/*==========Link (70012) PCIe Config access routines.================*/ 132/*==========Link (70012) PCIe Config access routines.================*/
134BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); 133enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *);
135BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t); 134enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t);
136 135
137/*========= Linux Kernel Interface routines. ======================= */ 136/*========= Linux Kernel Interface routines. ======================= */
138void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *); 137void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *);
@@ -168,20 +167,20 @@ do { \
168/*================ Direct IO mapping routines ==================*/ 167/*================ Direct IO mapping routines ==================*/
169extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t); 168extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t);
170extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *); 169extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *);
171extern BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *, uint32_t, 170extern enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *, uint32_t,
172 uint32_t, bool, bool, crystalhd_dio_req**); 171 uint32_t, bool, bool, struct crystalhd_dio_req**);
173 172
174extern BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *, crystalhd_dio_req*); 173extern enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *, struct crystalhd_dio_req*);
175#define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix]))) 174#define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix])))
176#define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix]))) 175#define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix])))
177 176
178/*================ General Purpose Queues ==================*/ 177/*================ General Purpose Queues ==================*/
179extern BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *, crystalhd_dioq_t **, crystalhd_data_free_cb , void *); 178extern enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *, struct crystalhd_dioq **, crystalhd_data_free_cb , void *);
180extern void crystalhd_delete_dioq(struct crystalhd_adp *, crystalhd_dioq_t *); 179extern void crystalhd_delete_dioq(struct crystalhd_adp *, struct crystalhd_dioq *);
181extern BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, bool wake, uint32_t tag); 180extern enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq, void *data, bool wake, uint32_t tag);
182extern void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq); 181extern void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq);
183extern void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag); 182extern void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq, uint32_t tag);
184extern void *crystalhd_dioq_fetch_wait(crystalhd_dioq_t *ioq, uint32_t to_secs, uint32_t *sig_pend); 183extern void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq, uint32_t to_secs, uint32_t *sig_pend);
185 184
186#define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0) 185#define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0)
187 186
diff --git a/drivers/staging/cx25821/cx25821-audio-upstream.c b/drivers/staging/cx25821/cx25821-audio-upstream.c
index 6a4e8720b478..eb39d13f7d75 100644
--- a/drivers/staging/cx25821/cx25821-audio-upstream.c
+++ b/drivers/staging/cx25821/cx25821-audio-upstream.c
@@ -753,8 +753,7 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
753 753
754 if (dev->input_audiofilename) { 754 if (dev->input_audiofilename) {
755 str_length = strlen(dev->input_audiofilename); 755 str_length = strlen(dev->input_audiofilename);
756 dev->_audiofilename = 756 dev->_audiofilename = kmalloc(str_length + 1, GFP_KERNEL);
757 (char *)kmalloc(str_length + 1, GFP_KERNEL);
758 757
759 if (!dev->_audiofilename) 758 if (!dev->_audiofilename)
760 goto error; 759 goto error;
@@ -768,8 +767,7 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
768 } 767 }
769 } else { 768 } else {
770 str_length = strlen(_defaultAudioName); 769 str_length = strlen(_defaultAudioName);
771 dev->_audiofilename = 770 dev->_audiofilename = kmalloc(str_length + 1, GFP_KERNEL);
772 (char *)kmalloc(str_length + 1, GFP_KERNEL);
773 771
774 if (!dev->_audiofilename) 772 if (!dev->_audiofilename)
775 goto error; 773 goto error;
diff --git a/drivers/staging/cx25821/cx25821-video-upstream-ch2.c b/drivers/staging/cx25821/cx25821-video-upstream-ch2.c
index cc51618cffa9..343df6619fe8 100644
--- a/drivers/staging/cx25821/cx25821-video-upstream-ch2.c
+++ b/drivers/staging/cx25821/cx25821-video-upstream-ch2.c
@@ -769,8 +769,7 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select,
769 769
770 if (dev->input_filename_ch2) { 770 if (dev->input_filename_ch2) {
771 str_length = strlen(dev->input_filename_ch2); 771 str_length = strlen(dev->input_filename_ch2);
772 dev->_filename_ch2 = 772 dev->_filename_ch2 = kmalloc(str_length + 1, GFP_KERNEL);
773 (char *)kmalloc(str_length + 1, GFP_KERNEL);
774 773
775 if (!dev->_filename_ch2) 774 if (!dev->_filename_ch2)
776 goto error; 775 goto error;
@@ -779,8 +778,7 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select,
779 str_length + 1); 778 str_length + 1);
780 } else { 779 } else {
781 str_length = strlen(dev->_defaultname_ch2); 780 str_length = strlen(dev->_defaultname_ch2);
782 dev->_filename_ch2 = 781 dev->_filename_ch2 = kmalloc(str_length + 1, GFP_KERNEL);
783 (char *)kmalloc(str_length + 1, GFP_KERNEL);
784 782
785 if (!dev->_filename_ch2) 783 if (!dev->_filename_ch2)
786 goto error; 784 goto error;
diff --git a/drivers/staging/cx25821/cx25821-video-upstream.c b/drivers/staging/cx25821/cx25821-video-upstream.c
index c842d8f3d692..7a3dad91eba8 100644
--- a/drivers/staging/cx25821/cx25821-video-upstream.c
+++ b/drivers/staging/cx25821/cx25821-video-upstream.c
@@ -830,7 +830,7 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
830 830
831 if (dev->input_filename) { 831 if (dev->input_filename) {
832 str_length = strlen(dev->input_filename); 832 str_length = strlen(dev->input_filename);
833 dev->_filename = (char *)kmalloc(str_length + 1, GFP_KERNEL); 833 dev->_filename = kmalloc(str_length + 1, GFP_KERNEL);
834 834
835 if (!dev->_filename) 835 if (!dev->_filename)
836 goto error; 836 goto error;
@@ -838,7 +838,7 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
838 memcpy(dev->_filename, dev->input_filename, str_length + 1); 838 memcpy(dev->_filename, dev->input_filename, str_length + 1);
839 } else { 839 } else {
840 str_length = strlen(dev->_defaultname); 840 str_length = strlen(dev->_defaultname);
841 dev->_filename = (char *)kmalloc(str_length + 1, GFP_KERNEL); 841 dev->_filename = kmalloc(str_length + 1, GFP_KERNEL);
842 842
843 if (!dev->_filename) 843 if (!dev->_filename)
844 goto error; 844 goto error;
diff --git a/drivers/staging/cxt1e1/Kconfig b/drivers/staging/cxt1e1/Kconfig
new file mode 100644
index 000000000000..68e9b6d973f7
--- /dev/null
+++ b/drivers/staging/cxt1e1/Kconfig
@@ -0,0 +1,22 @@
1config CXT1E1
2 tristate "SBE wanPMC-C[421]E1T1 hardware support"
3 depends on HDLC && PCI
4 ---help---
5 This driver supports the SBE wanPMC-CxT1E1 1, 2 and 4 port T3
6 channelized stream WAN adapter card which contains a HDLC/Transparent
7 mode controller.
8
9 If you want to compile this driver as a module
10 say M here and read <file:Documentation/modules.txt>.
11 The module will be called 'cxt1e1'.
12
13 If unsure, say N.
14
15config SBE_PMCC4_NCOMM
16 bool "SBE PMCC4 NCOMM support"
17 depends on CXT1E1
18 ---help---
19 SBE supplies optional support for NCOMM products.
20
21 If you have purchased this optional support you must say Y or M
22 here to allow the driver to operate with the NCOMM product.
diff --git a/drivers/staging/cxt1e1/Makefile b/drivers/staging/cxt1e1/Makefile
new file mode 100644
index 000000000000..10020d7b79a8
--- /dev/null
+++ b/drivers/staging/cxt1e1/Makefile
@@ -0,0 +1,19 @@
1obj-$(CONFIG_CXT1E1) += cxt1e1.o
2
3EXTRA_CFLAGS += -DSBE_PMCC4_ENABLE
4EXTRA_CFLAGS += -DSBE_ISR_TASKLET
5EXTRA_CFLAGS += -DSBE_INCLUDE_SYMBOLS
6
7cxt1e1-objs += \
8 ossiRelease.o \
9 musycc.o \
10 pmcc4_drv.o \
11 comet.o \
12 linux.o \
13 functions.o \
14 hwprobe.o \
15 sbeproc.o \
16 pmc93x6_eeprom.o \
17 sbecrc.o \
18 comet_tables.o \
19 sbeid.o
diff --git a/drivers/staging/cxt1e1/comet.c b/drivers/staging/cxt1e1/comet.c
new file mode 100644
index 000000000000..dcbe6b628455
--- /dev/null
+++ b/drivers/staging/cxt1e1/comet.c
@@ -0,0 +1,568 @@
1/* Copyright (C) 2003-2005 SBE, Inc.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16#include <asm/io.h>
17#include <linux/hdlc.h>
18#include "pmcc4_sysdep.h"
19#include "sbecom_inline_linux.h"
20#include "libsbew.h"
21#include "pmcc4.h"
22#include "comet.h"
23#include "comet_tables.h"
24
25#ifdef SBE_INCLUDE_SYMBOLS
26#define STATIC
27#else
28#define STATIC static
29#endif
30
31
32extern int log_level;
33
34#define COMET_NUM_SAMPLES 24 /* Number of entries in the waveform table */
35#define COMET_NUM_UNITS 5 /* Number of points per entry in table */
36
37/* forward references */
38STATIC void SetPwrLevel (comet_t * comet);
39STATIC void WrtRcvEqualizerTbl (ci_t * ci, comet_t * comet, u_int32_t *table);
40STATIC void WrtXmtWaveformTbl (ci_t * ci, comet_t * comet, u_int8_t table[COMET_NUM_SAMPLES][COMET_NUM_UNITS]);
41
42
43void *TWV_table[12] = {
44 TWVLongHaul0DB, TWVLongHaul7_5DB, TWVLongHaul15DB, TWVLongHaul22_5DB,
45 TWVShortHaul0, TWVShortHaul1, TWVShortHaul2, TWVShortHaul3, TWVShortHaul4,
46 TWVShortHaul5,
47 TWV_E1_75Ohm, /** PORT POINT - 75 Ohm not supported **/
48 TWV_E1_120Ohm
49};
50
51
52static int
53lbo_tbl_lkup (int t1, int lbo)
54{
55 if ((lbo < CFG_LBO_LH0) || (lbo > CFG_LBO_E120)) /* error switches to
56 * default */
57 {
58 if (t1)
59 lbo = CFG_LBO_LH0; /* default T1 waveform table */
60 else
61 lbo = CFG_LBO_E120; /* default E1 waveform table */
62 }
63 return (lbo - 1); /* make index ZERO relative */
64}
65
66
67void
68init_comet (void *ci, comet_t * comet, u_int32_t port_mode, int clockmaster,
69 u_int8_t moreParams)
70{
71 u_int8_t isT1mode;
72 u_int8_t tix = CFG_LBO_LH0; /* T1 default */
73
74 isT1mode = IS_FRAME_ANY_T1 (port_mode);
75 /* T1 or E1 */
76 if (isT1mode)
77 {
78 pci_write_32 ((u_int32_t *) &comet->gbl_cfg, 0xa0); /* Select T1 Mode & PIO
79 * output enabled */
80 tix = lbo_tbl_lkup (isT1mode, CFG_LBO_LH0); /* default T1 waveform
81 * table */
82 } else
83 {
84 pci_write_32 ((u_int32_t *) &comet->gbl_cfg, 0x81); /* Select E1 Mode & PIO
85 * output enabled */
86 tix = lbo_tbl_lkup (isT1mode, CFG_LBO_E120); /* default E1 waveform
87 * table */
88 }
89
90 if (moreParams & CFG_LBO_MASK)
91 tix = lbo_tbl_lkup (isT1mode, moreParams & CFG_LBO_MASK); /* dial-in requested
92 * waveform table */
93
94 /* Tx line Intfc cfg ** Set for analog & no special patterns */
95 pci_write_32 ((u_int32_t *) &comet->tx_line_cfg, 0x00); /* Transmit Line
96 * Interface Config. */
97
98 /* master test ** Ignore Test settings for now */
99 pci_write_32 ((u_int32_t *) &comet->mtest, 0x00); /* making sure it's
100 * Default value */
101
102 /* Turn on Center (CENT) and everything else off */
103 pci_write_32 ((u_int32_t *) &comet->rjat_cfg, 0x10); /* RJAT cfg */
104 /* Set Jitter Attenuation to recommend T1 values */
105 if (isT1mode)
106 {
107 pci_write_32 ((u_int32_t *) &comet->rjat_n1clk, 0x2F); /* RJAT Divider N1
108 * Control */
109 pci_write_32 ((u_int32_t *) &comet->rjat_n2clk, 0x2F); /* RJAT Divider N2
110 * Control */
111 } else
112 {
113 pci_write_32 ((u_int32_t *) &comet->rjat_n1clk, 0xFF); /* RJAT Divider N1
114 * Control */
115 pci_write_32 ((u_int32_t *) &comet->rjat_n2clk, 0xFF); /* RJAT Divider N2
116 * Control */
117 }
118
119 /* Turn on Center (CENT) and everything else off */
120 pci_write_32 ((u_int32_t *) &comet->tjat_cfg, 0x10); /* TJAT Config. */
121
122 /* Do not bypass jitter attenuation and bypass elastic store */
123 pci_write_32 ((u_int32_t *) &comet->rx_opt, 0x00); /* rx opts */
124
125 /* TJAT ctrl & TJAT divider ctrl */
126 /* Set Jitter Attenuation to recommended T1 values */
127 if (isT1mode)
128 {
129 pci_write_32 ((u_int32_t *) &comet->tjat_n1clk, 0x2F); /* TJAT Divider N1
130 * Control */
131 pci_write_32 ((u_int32_t *) &comet->tjat_n2clk, 0x2F); /* TJAT Divider N2
132 * Control */
133 } else
134 {
135 pci_write_32 ((u_int32_t *) &comet->tjat_n1clk, 0xFF); /* TJAT Divider N1
136 * Control */
137 pci_write_32 ((u_int32_t *) &comet->tjat_n2clk, 0xFF); /* TJAT Divider N2
138 * Control */
139 }
140
141 /* 1c: rx ELST cfg 20: tx ELST cfg 28&38: rx&tx data link ctrl */
142 if (isT1mode)
143 { /* Select 193-bit frame format */
144 pci_write_32 ((u_int32_t *) &comet->rx_elst_cfg, 0x00);
145 pci_write_32 ((u_int32_t *) &comet->tx_elst_cfg, 0x00);
146 } else
147 { /* Select 256-bit frame format */
148 pci_write_32 ((u_int32_t *) &comet->rx_elst_cfg, 0x03);
149 pci_write_32 ((u_int32_t *) &comet->tx_elst_cfg, 0x03);
150 pci_write_32 ((u_int32_t *) &comet->rxce1_ctl, 0x00); /* disable T1 data link
151 * receive */
152 pci_write_32 ((u_int32_t *) &comet->txci1_ctl, 0x00); /* disable T1 data link
153 * transmit */
154 }
155
156 /* the following is a default value */
157 /* Enable 8 out of 10 validation */
158 pci_write_32 ((u_int32_t *) &comet->t1_rboc_ena, 0x00); /* t1RBOC
159 * enable(BOC:BitOriented
160 * Code) */
161 if (isT1mode)
162 {
163
164 /* IBCD cfg: aka Inband Code Detection ** loopback code length set to */
165 pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x04); /* 6 bit down, 5 bit up
166 * (assert) */
167 pci_write_32 ((u_int32_t *) &comet->ibcd_act, 0x08); /* line loopback
168 * activate pattern */
169 pci_write_32 ((u_int32_t *) &comet->ibcd_deact, 0x24); /* deactivate code
170 * pattern (i.e.001) */
171 }
172 /* 10: CDRC cfg 28&38: rx&tx data link 1 ctrl 48: t1 frmr cfg */
173 /* 50: SIGX cfg, COSS (change of signaling state) 54: XBAS cfg */
174 /* 60: t1 ALMI cfg */
175 /* Configure Line Coding */
176
177 switch (port_mode)
178 {
179 case CFG_FRAME_SF: /* 1 - T1 B8ZS */
180 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0);
181 pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0);
182 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
183 pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0x20); /* 5:B8ZS */
184 pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0);
185 break;
186 case CFG_FRAME_ESF: /* 2 - T1 B8ZS */
187 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0);
188 pci_write_32 ((u_int32_t *) &comet->rxce1_ctl, 0x20); /* Bit 5: T1 DataLink
189 * Enable */
190 pci_write_32 ((u_int32_t *) &comet->txci1_ctl, 0x20); /* 5: T1 DataLink Enable */
191 pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0x30); /* 4:ESF 5:ESFFA */
192 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0x04); /* 2:ESF */
193 pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0x30); /* 4:ESF 5:B8ZS */
194 pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0x10); /* 4:ESF */
195 break;
196 case CFG_FRAME_E1PLAIN: /* 3 - HDB3 */
197 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0);
198 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
199 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0);
200 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x40);
201 break;
202 case CFG_FRAME_E1CAS: /* 4 - HDB3 */
203 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0);
204 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
205 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x60);
206 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0);
207 break;
208 case CFG_FRAME_E1CRC: /* 5 - HDB3 */
209 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0);
210 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
211 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x10);
212 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0xc2);
213 break;
214 case CFG_FRAME_E1CRC_CAS: /* 6 - HDB3 */
215 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0);
216 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
217 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x70);
218 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x82);
219 break;
220 case CFG_FRAME_SF_AMI: /* 7 - T1 AMI */
221 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line
222 * Decoding */
223 pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0);
224 pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0);
225 pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0);
226 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
227 break;
228 case CFG_FRAME_ESF_AMI: /* 8 - T1 AMI */
229 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line
230 * Decoding */
231 pci_write_32 ((u_int32_t *) &comet->rxce1_ctl, 0x20); /* 5: T1 DataLink Enable */
232 pci_write_32 ((u_int32_t *) &comet->txci1_ctl, 0x20); /* 5: T1 DataLink Enable */
233 pci_write_32 ((u_int32_t *) &comet->t1_frmr_cfg, 0x30); /* Bit 4:ESF 5:ESFFA */
234 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0x04); /* 2:ESF */
235 pci_write_32 ((u_int32_t *) &comet->t1_xbas_cfg, 0x10); /* 4:ESF */
236 pci_write_32 ((u_int32_t *) &comet->t1_almi_cfg, 0x10); /* 4:ESF */
237 break;
238 case CFG_FRAME_E1PLAIN_AMI: /* 9 - AMI */
239 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line
240 * Decoding */
241 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
242 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x80);
243 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x40);
244 break;
245 case CFG_FRAME_E1CAS_AMI: /* 10 - AMI */
246 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line
247 * Decoding */
248 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
249 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0xe0);
250 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0);
251 break;
252 case CFG_FRAME_E1CRC_AMI: /* 11 - AMI */
253 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line
254 * Decoding */
255 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
256 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0x90);
257 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0xc2);
258 break;
259 case CFG_FRAME_E1CRC_CAS_AMI: /* 12 - AMI */
260 pci_write_32 ((u_int32_t *) &comet->cdrc_cfg, 0x80); /* Enable AMI Line
261 * Decoding */
262 pci_write_32 ((u_int32_t *) &comet->sigx_cfg, 0);
263 pci_write_32 ((u_int32_t *) &comet->e1_tran_cfg, 0xf0);
264 pci_write_32 ((u_int32_t *) &comet->e1_frmr_aopts, 0x82);
265 break;
266 } /* end switch */
267
268 /***
269 * Set Full Frame mode (NXDSO[1] = 0, NXDSO[0] = 0)
270 * CMODE=1: Clock slave mode with BRCLK as an input,
271 * DE=0: Use falling edge of BRCLK for data,
272 * FE=0: Use falling edge of BRCLK for frame,
273 * CMS=0: Use backplane freq,
274 * RATE[1:0]=0,0: T1
275 ***/
276
277
278 /* 0x30: "BRIF cfg"; 0x20 is 'CMODE', 0x03 is (bit) rate */
279 /* note "rate bits can only be set once after reset" */
280 if (clockmaster)
281 { /* CMODE == clockMode, 0=clock master (so
282 * all 3 others should be slave) */
283 if (isT1mode) /* rate = 1.544 Mb/s */
284 pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x00); /* Comet 0 Master
285 * Mode(CMODE=0) */
286 else /* rate = 2.048 Mb/s */
287 pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x01); /* Comet 0 Master
288 * Mode(CMODE=0) */
289
290 /* 31: BRIF frame pulse cfg 06: tx timing options */
291 pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, 0x00); /* Master Mode
292 * i.e.FPMODE=0 (@0x20) */
293 if ((moreParams & CFG_CLK_PORT_MASK) == CFG_CLK_PORT_INTERNAL)
294 {
295 if (log_level >= LOG_SBEBUG12)
296 pr_info(">> %s: clockmaster internal clock\n", __func__);
297 pci_write_32 ((u_int32_t *) &comet->tx_time, 0x0d); /* internal oscillator */
298 } else /* external clock source */
299 {
300 if (log_level >= LOG_SBEBUG12)
301 pr_info(">> %s: clockmaster external clock\n", __func__);
302 pci_write_32 ((u_int32_t *) &comet->tx_time, 0x09); /* loop timing
303 * (external) */
304 }
305
306 } else /* slave */
307 {
308 if (isT1mode)
309 pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x20); /* Slave Mode(CMODE=1,
310 * see above) */
311 else
312 pci_write_32 ((u_int32_t *) &comet->brif_cfg, 0x21); /* Slave Mode (CMODE=1) */
313 pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, 0x20); /* Slave Mode i.e.
314 * FPMODE=1 (@0x20) */
315 if (log_level >= LOG_SBEBUG12)
316 pr_info(">> %s: clockslave internal clock\n", __func__);
317 pci_write_32 ((u_int32_t *) &comet->tx_time, 0x0d); /* oscillator timing */
318 }
319
320 /* 32: BRIF parity F-bit cfg */
321 /* Totem-pole operation */
322 pci_write_32 ((u_int32_t *) &comet->brif_pfcfg, 0x01); /* Receive Backplane
323 * Parity/F-bit */
324
325 /* dc: RLPS equalizer V ref */
326 /* Configuration */
327 if (isT1mode)
328 pci_write_32 ((u_int32_t *) &comet->rlps_eqvr, 0x2c); /* RLPS Equalizer
329 * Voltage */
330 else
331 pci_write_32 ((u_int32_t *) &comet->rlps_eqvr, 0x34); /* RLPS Equalizer
332 * Voltage */
333
334 /* Reserved bit set and SQUELCH enabled */
335 /* f8: RLPS cfg & status f9: RLPS ALOS detect/clear threshold */
336 pci_write_32 ((u_int32_t *) &comet->rlps_cfgsts, 0x11); /* RLPS Configuration
337 * Status */
338 if (isT1mode)
339 pci_write_32 ((u_int32_t *) &comet->rlps_alos_thresh, 0x55); /* ? */
340 else
341 pci_write_32 ((u_int32_t *) &comet->rlps_alos_thresh, 0x22); /* ? */
342
343
344 /* Set Full Frame mode (NXDSO[1] = 0, NXDSO[0] = 0) */
345 /* CMODE=0: Clock slave mode with BTCLK as an input, DE=1: Use rising */
346 /* edge of BTCLK for data, FE=1: Use rising edge of BTCLK for frame, */
347 /* CMS=0: Use backplane freq, RATE[1:0]=0,0: T1 */
348/*** Transmit side is always an Input, Slave Clock*/
349 /* 40: BTIF cfg 41: BTIF frame pulse cfg */
350 if (isT1mode)
351 pci_write_32 ((u_int32_t *) &comet->btif_cfg, 0x38); /* BTIF Configuration
352 * Reg. */
353 else
354 pci_write_32 ((u_int32_t *) &comet->btif_cfg, 0x39); /* BTIF Configuration
355 * Reg. */
356
357 pci_write_32 ((u_int32_t *) &comet->btif_fpcfg, 0x01); /* BTIF Frame Pulse
358 * Config. */
359
360 /* 0a: master diag 06: tx timing options */
361 /* if set Comet to loop back */
362
363 /* Comets set to normal */
364 pci_write_32 ((u_int32_t *) &comet->mdiag, 0x00);
365
366 /* BTCLK driven by TCLKI internally (crystal driven) and Xmt Elasted */
367 /* Store is enabled. */
368
369 WrtXmtWaveformTbl (ci, comet, TWV_table[tix]);
370 if (isT1mode)
371 WrtRcvEqualizerTbl ((ci_t *) ci, comet, &T1_Equalizer[0]);
372 else
373 WrtRcvEqualizerTbl ((ci_t *) ci, comet, &E1_Equalizer[0]);
374 SetPwrLevel (comet);
375}
376
377/*
378** Name: WrtXmtWaveform
379** Description: Formulate the Data for the Pulse Waveform Storage
380** Write register, (F2), from the sample and unit inputs.
381** Write the data to the Pulse Waveform Storage Data register.
382** Returns: Nothing
383*/
384STATIC void
385WrtXmtWaveform (ci_t * ci, comet_t * comet, u_int32_t sample, u_int32_t unit, u_int8_t data)
386{
387 u_int8_t WaveformAddr;
388
389 WaveformAddr = (sample << 3) + (unit & 7);
390 pci_write_32 ((u_int32_t *) &comet->xlpg_pwave_addr, WaveformAddr);
391 pci_flush_write (ci); /* for write order preservation when
392 * Optimizing driver */
393 pci_write_32 ((u_int32_t *) &comet->xlpg_pwave_data, 0x7F & data);
394}
395
396/*
397** Name: WrtXmtWaveformTbl
398** Description: Fill in the Transmit Waveform Values
399** for driving the transmitter DAC.
400** Returns: Nothing
401*/
402STATIC void
403WrtXmtWaveformTbl (ci_t * ci, comet_t * comet,
404 u_int8_t table[COMET_NUM_SAMPLES][COMET_NUM_UNITS])
405{
406 u_int32_t sample, unit;
407
408 for (sample = 0; sample < COMET_NUM_SAMPLES; sample++)
409 {
410 for (unit = 0; unit < COMET_NUM_UNITS; unit++)
411 WrtXmtWaveform (ci, comet, sample, unit, table[sample][unit]);
412 }
413
414 /* Enable transmitter and set output amplitude */
415 pci_write_32 ((u_int32_t *) &comet->xlpg_cfg, table[COMET_NUM_SAMPLES][0]);
416}
417
418
419/*
420** Name: WrtXmtWaveform
421** Description: Fill in the Receive Equalizer RAM from the desired
422** table.
423** Returns: Nothing
424**
425** Remarks: Per PM4351 Device Errata, Receive Equalizer RAM Initialization
426** is coded with early setup of indirect address.
427*/
428
429STATIC void
430WrtRcvEqualizerTbl (ci_t * ci, comet_t * comet, u_int32_t *table)
431{
432 u_int32_t ramaddr;
433 volatile u_int32_t value;
434
435 for (ramaddr = 0; ramaddr < 256; ramaddr++)
436 {
437 /*** the following lines are per Errata 7, 2.5 ***/
438 {
439 pci_write_32 ((u_int32_t *) &comet->rlps_eq_rwsel, 0x80); /* Set up for a read
440 * operation */
441 pci_flush_write (ci); /* for write order preservation when
442 * Optimizing driver */
443 pci_write_32 ((u_int32_t *) &comet->rlps_eq_iaddr, (u_int8_t) ramaddr); /* write the addr,
444 * initiate a read */
445 pci_flush_write (ci); /* for write order preservation when
446 * Optimizing driver */
447 /*
448 * wait 3 line rate clock cycles to ensure address bits are
449 * captured by T1/E1 clock
450 */
451 OS_uwait (4, "wret"); /* 683ns * 3 = 1366 ns, approx 2us (but
452 * use 4us) */
453 }
454
455 value = *table++;
456 pci_write_32 ((u_int32_t *) &comet->rlps_idata3, (u_int8_t) (value >> 24));
457 pci_write_32 ((u_int32_t *) &comet->rlps_idata2, (u_int8_t) (value >> 16));
458 pci_write_32 ((u_int32_t *) &comet->rlps_idata1, (u_int8_t) (value >> 8));
459 pci_write_32 ((u_int32_t *) &comet->rlps_idata0, (u_int8_t) value);
460 pci_flush_write (ci); /* for write order preservation when
461 * Optimizing driver */
462
463 /* Storing RAM address, causes RAM to be updated */
464
465 pci_write_32 ((u_int32_t *) &comet->rlps_eq_rwsel, 0); /* Set up for a write
466 * operation */
467 pci_flush_write (ci); /* for write order preservation when
468 * Optimizing driver */
469 pci_write_32 ((u_int32_t *) &comet->rlps_eq_iaddr, (u_int8_t) ramaddr); /* write the addr,
470 * initiate a read */
471 pci_flush_write (ci); /* for write order preservation when
472 * Optimizing driver */
473 /*
474 * wait 3 line rate clock cycles to ensure address bits are captured
475 * by T1/E1 clock
476 */
477 OS_uwait (4, "wret"); /* 683ns * 3 = 1366 ns, approx 2us (but
478 * use 4us) */
479 }
480
481 pci_write_32 ((u_int32_t *) &comet->rlps_eq_cfg, 0xCB); /* Enable Equalizer &
482 * set it to use 256
483 * periods */
484}
485
486
487/*
488** Name: SetPwrLevel
489** Description: Implement power level setting algorithm described below
490** Returns: Nothing
491*/
492
493STATIC void
494SetPwrLevel (comet_t * comet)
495{
496 volatile u_int32_t temp;
497
498/*
499** Algorithm to Balance the Power Distribution of Ttip Tring
500**
501** Zero register F6
502** Write 0x01 to register F4
503** Write another 0x01 to register F4
504** Read register F4
505** Remove the 0x01 bit by Anding register F4 with 0xFE
506** Write the resultant value to register F4
507** Repeat these steps for register F5
508** Write 0x01 to register F6
509*/
510 pci_write_32 ((u_int32_t *) &comet->xlpg_fdata_sel, 0x00); /* XLPG Fuse Data Select */
511
512 pci_write_32 ((u_int32_t *) &comet->xlpg_atest_pctl, 0x01); /* XLPG Analog Test
513 * Positive control */
514 pci_write_32 ((u_int32_t *) &comet->xlpg_atest_pctl, 0x01);
515
516 temp = pci_read_32 ((u_int32_t *) &comet->xlpg_atest_pctl) & 0xfe;
517 pci_write_32 ((u_int32_t *) &comet->xlpg_atest_pctl, temp);
518
519 pci_write_32 ((u_int32_t *) &comet->xlpg_atest_nctl, 0x01); /* XLPG Analog Test
520 * Negative control */
521 pci_write_32 ((u_int32_t *) &comet->xlpg_atest_nctl, 0x01);
522
523 temp = pci_read_32 ((u_int32_t *) &comet->xlpg_atest_nctl) & 0xfe;
524 pci_write_32 ((u_int32_t *) &comet->xlpg_atest_nctl, temp);
525 pci_write_32 ((u_int32_t *) &comet->xlpg_fdata_sel, 0x01); /* XLPG */
526}
527
528
529/*
530** Name: SetCometOps
531** Description: Set up the selected Comet's clock edge drive for both
532** the transmit out the analog side and receive to the
533** backplane side.
534** Returns: Nothing
535*/
536#if 0
537STATIC void
538SetCometOps (comet_t * comet)
539{
540 volatile u_int8_t rd_value;
541
542 if (comet == mConfig.C4Func1Base + (COMET0_OFFSET >> 2))
543 {
544 rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_cfg); /* read the BRIF
545 * Configuration */
546 rd_value &= ~0x20;
547 pci_write_32 ((u_int32_t *) &comet->brif_cfg, (u_int32_t) rd_value);
548
549 rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_fpcfg); /* read the BRIF Frame
550 * Pulse Configuration */
551 rd_value &= ~0x20;
552 pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, (u_int8_t) rd_value);
553 } else
554 {
555 rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_cfg); /* read the BRIF
556 * Configuration */
557 rd_value |= 0x20;
558 pci_write_32 ((u_int32_t *) &comet->brif_cfg, (u_int32_t) rd_value);
559
560 rd_value = (u_int8_t) pci_read_32 ((u_int32_t *) &comet->brif_fpcfg); /* read the BRIF Frame
561 * Pulse Configuration */
562 rd_value |= 0x20;
563 pci_write_32 ((u_int32_t *) &comet->brif_fpcfg, (u_int8_t) rd_value);
564 }
565}
566#endif
567
568/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/comet.h b/drivers/staging/cxt1e1/comet.h
new file mode 100644
index 000000000000..5cb3afda0112
--- /dev/null
+++ b/drivers/staging/cxt1e1/comet.h
@@ -0,0 +1,366 @@
1/*
2 * $Id: comet.h,v 1.3 2005/09/28 00:10:07 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_COMET_H_
6#define _INC_COMET_H_
7
8/*-----------------------------------------------------------------------------
9 * comet.h -
10 *
11 * Copyright (C) 2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.3 $
28 * Last changed on $Date: 2005/09/28 00:10:07 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: comet.h,v $
32 * Revision 1.3 2005/09/28 00:10:07 rickd
33 * Add RCS header. Switch to structure usage.
34 *
35 * Revision 1.2 2005/04/28 23:43:03 rickd
36 * Add RCS tracking heading.
37 *
38 *-----------------------------------------------------------------------------
39 */
40
41#if defined(__FreeBSD__) || defined (__NetBSD__)
42#include <sys/types.h>
43#else
44#include <linux/types.h>
45#endif
46
47
48#define VINT32 volatile u_int32_t
49
50struct s_comet_reg
51{
52 VINT32 gbl_cfg; /* 00 Global Cfg */
53 VINT32 clkmon; /* 01 Clk Monitor */
54 VINT32 rx_opt; /* 02 RX Options */
55 VINT32 rx_line_cfg; /* 03 RX Line Interface Cfg */
56 VINT32 tx_line_cfg; /* 04 TX Line Interface Cfg */
57 VINT32 tx_frpass; /* 05 TX Framing & Bypass Options */
58 VINT32 tx_time; /* 06 TX Timing Options */
59 VINT32 intr_1; /* 07 Intr Source #1 */
60 VINT32 intr_2; /* 08 Intr Source #2 */
61 VINT32 intr_3; /* 09 Intr Source #3 */
62 VINT32 mdiag; /* 0A Master Diagnostics */
63 VINT32 mtest; /* 0B Master Test */
64 VINT32 adiag; /* 0C Analog Diagnostics */
65 VINT32 rev_id; /* 0D Rev/Chip Id/Global PMON Update */
66#define pmon rev_id
67 VINT32 reset; /* 0E Reset */
68 VINT32 prgd_phctl; /* 0F PRGD Positioning/Ctl & HDLC Ctl */
69 VINT32 cdrc_cfg; /* 10 CDRC Cfg */
70 VINT32 cdrc_ien; /* 11 CDRC Intr Enable */
71 VINT32 cdrc_ists; /* 12 CDRC Intr Sts */
72 VINT32 cdrc_alos; /* 13 CDRC Alternate Loss of Signal */
73
74 VINT32 rjat_ists; /* 14 RJAT Intr Sts */
75 VINT32 rjat_n1clk; /* 15 RJAT Reference Clk Divisor (N1) Ctl */
76 VINT32 rjat_n2clk; /* 16 RJAT Output Clk Divisor (N2) Ctl */
77 VINT32 rjat_cfg; /* 17 RJAT Cfg */
78
79 VINT32 tjat_ists; /* 18 TJAT Intr Sts */
80 VINT32 tjat_n1clk; /* 19 TJAT Reference Clk Divisor (N1) Ctl */
81 VINT32 tjat_n2clk; /* 1A TJAT Output Clk Divisor (N2) Ctl */
82 VINT32 tjat_cfg; /* 1B TJAT Cfg */
83
84 VINT32 rx_elst_cfg; /* 1C RX-ELST Cfg */
85 VINT32 rx_elst_ists; /* 1D RX-ELST Intr Sts */
86 VINT32 rx_elst_idle; /* 1E RX-ELST Idle Code */
87 VINT32 _rx_elst_res1f; /* 1F RX-ELST Reserved */
88
89 VINT32 tx_elst_cfg; /* 20 TX-ELST Cfg */
90 VINT32 tx_elst_ists; /* 21 TX-ELST Intr Sts */
91 VINT32 _tx_elst_res22; /* 22 TX-ELST Reserved */
92 VINT32 _tx_elst_res23; /* 23 TX-ELST Reserved */
93 VINT32 __res24; /* 24 Reserved */
94 VINT32 __res25; /* 25 Reserved */
95 VINT32 __res26; /* 26 Reserved */
96 VINT32 __res27; /* 27 Reserved */
97
98 VINT32 rxce1_ctl; /* 28 RXCE RX Data Link 1 Ctl */
99 VINT32 rxce1_bits; /* 29 RXCE RX Data Link 1 Bit Select */
100 VINT32 rxce2_ctl; /* 2A RXCE RX Data Link 2 Ctl */
101 VINT32 rxce2_bits; /* 2B RXCE RX Data Link 2 Bit Select */
102 VINT32 rxce3_ctl; /* 2C RXCE RX Data Link 3 Ctl */
103 VINT32 rxce3_bits; /* 2D RXCE RX Data Link 3 Bit Select */
104 VINT32 _rxce_res2E; /* 2E RXCE Reserved */
105 VINT32 _rxce_res2F; /* 2F RXCE Reserved */
106
107 VINT32 brif_cfg; /* 30 BRIF RX Backplane Cfg */
108 VINT32 brif_fpcfg; /* 31 BRIF RX Backplane Frame Pulse Cfg */
109 VINT32 brif_pfcfg; /* 32 BRIF RX Backplane Parity/F-Bit Cfg */
110 VINT32 brif_tsoff; /* 33 BRIF RX Backplane Time Slot Offset */
111 VINT32 brif_boff; /* 34 BRIF RX Backplane Bit Offset */
112 VINT32 _brif_res35; /* 35 BRIF RX Backplane Reserved */
113 VINT32 _brif_res36; /* 36 BRIF RX Backplane Reserved */
114 VINT32 _brif_res37; /* 37 BRIF RX Backplane Reserved */
115
116 VINT32 txci1_ctl; /* 38 TXCI TX Data Link 1 Ctl */
117 VINT32 txci1_bits; /* 39 TXCI TX Data Link 2 Bit Select */
118 VINT32 txci2_ctl; /* 3A TXCI TX Data Link 1 Ctl */
119 VINT32 txci2_bits; /* 3B TXCI TX Data Link 2 Bit Select */
120 VINT32 txci3_ctl; /* 3C TXCI TX Data Link 1 Ctl */
121 VINT32 txci3_bits; /* 3D TXCI TX Data Link 2 Bit Select */
122 VINT32 _txci_res3E; /* 3E TXCI Reserved */
123 VINT32 _txci_res3F; /* 3F TXCI Reserved */
124
125 VINT32 btif_cfg; /* 40 BTIF TX Backplane Cfg */
126 VINT32 btif_fpcfg; /* 41 BTIF TX Backplane Frame Pulse Cfg */
127 VINT32 btif_pcfgsts; /* 42 BTIF TX Backplane Parity Cfg & Sts */
128 VINT32 btif_tsoff; /* 43 BTIF TX Backplane Time Slot Offset */
129 VINT32 btif_boff; /* 44 BTIF TX Backplane Bit Offset */
130 VINT32 _btif_res45; /* 45 BTIF TX Backplane Reserved */
131 VINT32 _btif_res46; /* 46 BTIF TX Backplane Reserved */
132 VINT32 _btif_res47; /* 47 BTIF TX Backplane Reserved */
133 VINT32 t1_frmr_cfg; /* 48 T1 FRMR Cfg */
134 VINT32 t1_frmr_ien; /* 49 T1 FRMR Intr Enable */
135 VINT32 t1_frmr_ists; /* 4A T1 FRMR Intr Sts */
136 VINT32 __res_4B; /* 4B Reserved */
137 VINT32 ibcd_cfg; /* 4C IBCD Cfg */
138 VINT32 ibcd_ies; /* 4D IBCD Intr Enable/Sts */
139 VINT32 ibcd_act; /* 4E IBCD Activate Code */
140 VINT32 ibcd_deact; /* 4F IBCD Deactivate Code */
141
142 VINT32 sigx_cfg; /* 50 SIGX Cfg/Change of Signaling State */
143 VINT32 sigx_acc_cos; /* 51 SIGX uP Access Sts/Change of Signaling State */
144 VINT32 sigx_iac_cos; /* 52 SIGX Channel Indirect
145 * Addr/Ctl/Change of Signaling State */
146 VINT32 sigx_idb_cos; /* 53 SIGX Channel Indirect Data
147 * Buffer/Change of Signaling State */
148
149 VINT32 t1_xbas_cfg; /* 54 T1 XBAS Cfg */
150 VINT32 t1_xbas_altx; /* 55 T1 XBAS Alarm TX */
151 VINT32 t1_xibc_ctl; /* 56 T1 XIBC Ctl */
152 VINT32 t1_xibc_lbcode; /* 57 T1 XIBC Loopback Code */
153
154 VINT32 pmon_ies; /* 58 PMON Intr Enable/Sts */
155 VINT32 pmon_fberr; /* 59 PMON Framing Bit Err Cnt */
156 VINT32 pmon_feb_lsb; /* 5A PMON OFF/COFA/Far End Block Err Cnt (LSB) */
157 VINT32 pmon_feb_msb; /* 5B PMON OFF/COFA/Far End Block Err Cnt (MSB) */
158 VINT32 pmon_bed_lsb; /* 5C PMON Bit/Err/CRCE Cnt (LSB) */
159 VINT32 pmon_bed_msb; /* 5D PMON Bit/Err/CRCE Cnt (MSB) */
160 VINT32 pmon_lvc_lsb; /* 5E PMON LVC Cnt (LSB) */
161 VINT32 pmon_lvc_msb; /* 5F PMON LVC Cnt (MSB) */
162
163 VINT32 t1_almi_cfg; /* 60 T1 ALMI Cfg */
164 VINT32 t1_almi_ien; /* 61 T1 ALMI Intr Enable */
165 VINT32 t1_almi_ists; /* 62 T1 ALMI Intr Sts */
166 VINT32 t1_almi_detsts; /* 63 T1 ALMI Alarm Detection Sts */
167
168 VINT32 _t1_pdvd_res64; /* 64 T1 PDVD Reserved */
169 VINT32 t1_pdvd_ies; /* 65 T1 PDVD Intr Enable/Sts */
170 VINT32 _t1_xboc_res66; /* 66 T1 XBOC Reserved */
171 VINT32 t1_xboc_code; /* 67 T1 XBOC Code */
172 VINT32 _t1_xpde_res68; /* 68 T1 XPDE Reserved */
173 VINT32 t1_xpde_ies; /* 69 T1 XPDE Intr Enable/Sts */
174
175 VINT32 t1_rboc_ena; /* 6A T1 RBOC Enable */
176 VINT32 t1_rboc_sts; /* 6B T1 RBOC Code Sts */
177
178 VINT32 t1_tpsc_cfg; /* 6C TPSC Cfg */
179 VINT32 t1_tpsc_sts; /* 6D TPSC uP Access Sts */
180 VINT32 t1_tpsc_ciaddr; /* 6E TPSC Channel Indirect
181 * Addr/Ctl */
182 VINT32 t1_tpsc_cidata; /* 6F TPSC Channel Indirect Data
183 * Buffer */
184 VINT32 t1_rpsc_cfg; /* 70 RPSC Cfg */
185 VINT32 t1_rpsc_sts; /* 71 RPSC uP Access Sts */
186 VINT32 t1_rpsc_ciaddr; /* 72 RPSC Channel Indirect
187 * Addr/Ctl */
188 VINT32 t1_rpsc_cidata; /* 73 RPSC Channel Indirect Data
189 * Buffer */
190 VINT32 __res74; /* 74 Reserved */
191 VINT32 __res75; /* 75 Reserved */
192 VINT32 __res76; /* 76 Reserved */
193 VINT32 __res77; /* 77 Reserved */
194
195 VINT32 t1_aprm_cfg; /* 78 T1 APRM Cfg/Ctl */
196 VINT32 t1_aprm_load; /* 79 T1 APRM Manual Load */
197 VINT32 t1_aprm_ists; /* 7A T1 APRM Intr Sts */
198 VINT32 t1_aprm_1sec_2; /* 7B T1 APRM One Second Content Octet 2 */
199 VINT32 t1_aprm_1sec_3; /* 7C T1 APRM One Second Content Octet 3 */
200 VINT32 t1_aprm_1sec_4; /* 7D T1 APRM One Second Content Octet 4 */
201 VINT32 t1_aprm_1sec_5; /* 7E T1 APRM One Second Content MSB (Octect 5) */
202 VINT32 t1_aprm_1sec_6; /* 7F T1 APRM One Second Content MSB (Octect 6) */
203
204 VINT32 e1_tran_cfg; /* 80 E1 TRAN Cfg */
205 VINT32 e1_tran_txalarm; /* 81 E1 TRAN TX Alarm/Diagnostic Ctl */
206 VINT32 e1_tran_intctl; /* 82 E1 TRAN International Ctl */
207 VINT32 e1_tran_extrab; /* 83 E1 TRAN Extra Bits Ctl */
208 VINT32 e1_tran_ien; /* 84 E1 TRAN Intr Enable */
209 VINT32 e1_tran_ists; /* 85 E1 TRAN Intr Sts */
210 VINT32 e1_tran_nats; /* 86 E1 TRAN National Bit Codeword
211 * Select */
212 VINT32 e1_tran_nat; /* 87 E1 TRAN National Bit Codeword */
213 VINT32 __res88; /* 88 Reserved */
214 VINT32 __res89; /* 89 Reserved */
215 VINT32 __res8A; /* 8A Reserved */
216 VINT32 __res8B; /* 8B Reserved */
217
218 VINT32 _t1_frmr_res8C; /* 8C T1 FRMR Reserved */
219 VINT32 _t1_frmr_res8D; /* 8D T1 FRMR Reserved */
220 VINT32 __res8E; /* 8E Reserved */
221 VINT32 __res8F; /* 8F Reserved */
222
223 VINT32 e1_frmr_aopts; /* 90 E1 FRMR Frame Alignment Options */
224 VINT32 e1_frmr_mopts; /* 91 E1 FRMR Maintenance Mode Options */
225 VINT32 e1_frmr_ien; /* 92 E1 FRMR Framing Sts Intr Enable */
226 VINT32 e1_frmr_mien; /* 93 E1 FRMR Maintenance/Alarm Sts Intr Enable */
227 VINT32 e1_frmr_ists; /* 94 E1 FRMR Framing Sts Intr Indication */
228 VINT32 e1_frmr_mists; /* 95 E1 FRMR Maintenance/Alarm Sts Indication Enable */
229 VINT32 e1_frmr_sts; /* 96 E1 FRMR Framing Sts */
230 VINT32 e1_frmr_masts; /* 97 E1 FRMR Maintenance/Alarm Sts */
231 VINT32 e1_frmr_nat_bits; /* 98 E1 FRMR International/National Bits */
232 VINT32 e1_frmr_crc_lsb; /* 99 E1 FRMR CRC Err Cnt - LSB */
233 VINT32 e1_frmr_crc_msb; /* 9A E1 FRMR CRC Err Cnt - MSB */
234 VINT32 e1_frmr_nat_ien; /* 9B E1 FRMR National Bit Codeword Intr Enables */
235 VINT32 e1_frmr_nat_ists; /* 9C E1 FRMR National Bit Codeword Intr/Sts */
236 VINT32 e1_frmr_nat; /* 9D E1 FRMR National Bit Codewords */
237 VINT32 e1_frmr_fp_ien; /* 9E E1 FRMR Frame Pulse/Alarm Intr Enables */
238 VINT32 e1_frmr_fp_ists; /* 9F E1 FRMR Frame Pulse/Alarm Intr/Sts */
239
240 VINT32 __resA0; /* A0 Reserved */
241 VINT32 __resA1; /* A1 Reserved */
242 VINT32 __resA2; /* A2 Reserved */
243 VINT32 __resA3; /* A3 Reserved */
244 VINT32 __resA4; /* A4 Reserved */
245 VINT32 __resA5; /* A5 Reserved */
246 VINT32 __resA6; /* A6 Reserved */
247 VINT32 __resA7; /* A7 Reserved */
248
249 VINT32 tdpr1_cfg; /* A8 TDPR #1 Cfg */
250 VINT32 tdpr1_utl; /* A9 TDPR #1 Upper TX Threshold */
251 VINT32 tdpr1_ltl; /* AA TDPR #1 Lower TX Threshold */
252 VINT32 tdpr1_ien; /* AB TDPR #1 Intr Enable */
253 VINT32 tdpr1_ists; /* AC TDPR #1 Intr Sts/UDR Clear */
254 VINT32 tdpr1_data; /* AD TDPR #1 TX Data */
255 VINT32 __resAE; /* AE Reserved */
256 VINT32 __resAF; /* AF Reserved */
257 VINT32 tdpr2_cfg; /* B0 TDPR #2 Cfg */
258 VINT32 tdpr2_utl; /* B1 TDPR #2 Upper TX Threshold */
259 VINT32 tdpr2_ltl; /* B2 TDPR #2 Lower TX Threshold */
260 VINT32 tdpr2_ien; /* B3 TDPR #2 Intr Enable */
261 VINT32 tdpr2_ists; /* B4 TDPR #2 Intr Sts/UDR Clear */
262 VINT32 tdpr2_data; /* B5 TDPR #2 TX Data */
263 VINT32 __resB6; /* B6 Reserved */
264 VINT32 __resB7; /* B7 Reserved1 */
265 VINT32 tdpr3_cfg; /* B8 TDPR #3 Cfg */
266 VINT32 tdpr3_utl; /* B9 TDPR #3 Upper TX Threshold */
267 VINT32 tdpr3_ltl; /* BA TDPR #3 Lower TX Threshold */
268 VINT32 tdpr3_ien; /* BB TDPR #3 Intr Enable */
269 VINT32 tdpr3_ists; /* BC TDPR #3 Intr Sts/UDR Clear */
270 VINT32 tdpr3_data; /* BD TDPR #3 TX Data */
271 VINT32 __resBE; /* BE Reserved */
272 VINT32 __resBF; /* BF Reserved */
273
274 VINT32 rdlc1_cfg; /* C0 RDLC #1 Cfg */
275 VINT32 rdlc1_intctl; /* C1 RDLC #1 Intr Ctl */
276 VINT32 rdlc1_sts; /* C2 RDLC #1 Sts */
277 VINT32 rdlc1_data; /* C3 RDLC #1 Data */
278 VINT32 rdlc1_paddr; /* C4 RDLC #1 Primary Addr Match */
279 VINT32 rdlc1_saddr; /* C5 RDLC #1 Secondary Addr Match */
280 VINT32 __resC6; /* C6 Reserved */
281 VINT32 __resC7; /* C7 Reserved */
282 VINT32 rdlc2_cfg; /* C8 RDLC #2 Cfg */
283 VINT32 rdlc2_intctl; /* C9 RDLC #2 Intr Ctl */
284 VINT32 rdlc2_sts; /* CA RDLC #2 Sts */
285 VINT32 rdlc2_data; /* CB RDLC #2 Data */
286 VINT32 rdlc2_paddr; /* CC RDLC #2 Primary Addr Match */
287 VINT32 rdlc2_saddr; /* CD RDLC #2 Secondary Addr Match */
288 VINT32 __resCE; /* CE Reserved */
289 VINT32 __resCF; /* CF Reserved */
290 VINT32 rdlc3_cfg; /* D0 RDLC #3 Cfg */
291 VINT32 rdlc3_intctl; /* D1 RDLC #3 Intr Ctl */
292 VINT32 rdlc3_sts; /* D2 RDLC #3 Sts */
293 VINT32 rdlc3_data; /* D3 RDLC #3 Data */
294 VINT32 rdlc3_paddr; /* D4 RDLC #3 Primary Addr Match */
295 VINT32 rdlc3_saddr; /* D5 RDLC #3 Secondary Addr Match */
296
297 VINT32 csu_cfg; /* D6 CSU Cfg */
298 VINT32 _csu_resD7; /* D7 CSU Reserved */
299
300 VINT32 rlps_idata3; /* D8 RLPS Indirect Data, 24-31 */
301 VINT32 rlps_idata2; /* D9 RLPS Indirect Data, 16-23 */
302 VINT32 rlps_idata1; /* DA RLPS Indirect Data, 8-15 */
303 VINT32 rlps_idata0; /* DB RLPS Indirect Data, 0-7 */
304 VINT32 rlps_eqvr; /* DC RLPS Equalizer Voltage Reference
305 * (E1 missing) */
306 VINT32 _rlps_resDD; /* DD RLPS Reserved */
307 VINT32 _rlps_resDE; /* DE RLPS Reserved */
308 VINT32 _rlps_resDF; /* DF RLPS Reserved */
309
310 VINT32 prgd_ctl; /* E0 PRGD Ctl */
311 VINT32 prgd_ies; /* E1 PRGD Intr Enable/Sts */
312 VINT32 prgd_shift_len; /* E2 PRGD Shift Length */
313 VINT32 prgd_tap; /* E3 PRGD Tap */
314 VINT32 prgd_errin; /* E4 PRGD Err Insertion */
315 VINT32 _prgd_resE5; /* E5 PRGD Reserved */
316 VINT32 _prgd_resE6; /* E6 PRGD Reserved */
317 VINT32 _prgd_resE7; /* E7 PRGD Reserved */
318 VINT32 prgd_patin1; /* E8 PRGD Pattern Insertion #1 */
319 VINT32 prgd_patin2; /* E9 PRGD Pattern Insertion #2 */
320 VINT32 prgd_patin3; /* EA PRGD Pattern Insertion #3 */
321 VINT32 prgd_patin4; /* EB PRGD Pattern Insertion #4 */
322 VINT32 prgd_patdet1; /* EC PRGD Pattern Detector #1 */
323 VINT32 prgd_patdet2; /* ED PRGD Pattern Detector #2 */
324 VINT32 prgd_patdet3; /* EE PRGD Pattern Detector #3 */
325 VINT32 prgd_patdet4; /* EF PRGD Pattern Detector #4 */
326
327 VINT32 xlpg_cfg; /* F0 XLPG Line Driver Cfg */
328 VINT32 xlpg_ctlsts; /* F1 XLPG Ctl/Sts */
329 VINT32 xlpg_pwave_addr; /* F2 XLPG Pulse Waveform Storage Write Addr */
330 VINT32 xlpg_pwave_data; /* F3 XLPG Pulse Waveform Storage Data */
331 VINT32 xlpg_atest_pctl; /* F4 XLPG Analog Test Positive Ctl */
332 VINT32 xlpg_atest_nctl; /* F5 XLPG Analog Test Negative Ctl */
333 VINT32 xlpg_fdata_sel; /* F6 XLPG Fuse Data Select */
334 VINT32 _xlpg_resF7; /* F7 XLPG Reserved */
335
336 VINT32 rlps_cfgsts; /* F8 RLPS Cfg & Sts */
337 VINT32 rlps_alos_thresh; /* F9 RLPS ALOS Detection/Clearance Threshold */
338 VINT32 rlps_alos_dper; /* FA RLPS ALOS Detection Period */
339 VINT32 rlps_alos_cper; /* FB RLPS ALOS Clearance Period */
340 VINT32 rlps_eq_iaddr; /* FC RLPS Equalization Indirect Addr */
341 VINT32 rlps_eq_rwsel; /* FD RLPS Equalization Read/WriteB Select */
342 VINT32 rlps_eq_ctlsts; /* FE RLPS Equalizer Loop Sts & Ctl */
343 VINT32 rlps_eq_cfg; /* FF RLPS Equalizer Cfg */
344};
345
346typedef struct s_comet_reg comet_t;
347
348/* 00AH: MDIAG Register bit definitions */
349#define COMET_MDIAG_ID5 0x40
350#define COMET_MDIAG_LBMASK 0x3F
351#define COMET_MDIAG_PAYLB 0x20
352#define COMET_MDIAG_LINELB 0x10
353#define COMET_MDIAG_RAIS 0x08
354#define COMET_MDIAG_DDLB 0x04
355#define COMET_MDIAG_TXMFP 0x02
356#define COMET_MDIAG_TXLOS 0x01
357#define COMET_MDIAG_LBOFF 0x00
358
359#undef VINT32
360
361#ifdef __KERNEL__
362extern void
363init_comet (void *, comet_t *, u_int32_t, int, u_int8_t);
364#endif
365
366#endif /* _INC_COMET_H_ */
diff --git a/drivers/staging/cxt1e1/comet_tables.c b/drivers/staging/cxt1e1/comet_tables.c
new file mode 100644
index 000000000000..db1293c71a6d
--- /dev/null
+++ b/drivers/staging/cxt1e1/comet_tables.c
@@ -0,0 +1,561 @@
1/*
2 * $Id: comet_tables.c,v 1.2 2005/10/17 23:55:27 rickd PMCC4_3_1B $
3 */
4
5/*-----------------------------------------------------------------------------
6 * comet_tables.c - waveform tables for the PM4351 'COMET'
7 *
8 * Copyright (C) 2003-2005 SBE, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * For further information, contact via email: support@sbei.com
21 * SBE, Inc. San Ramon, California U.S.A.
22 *-----------------------------------------------------------------------------
23 * RCS info:
24 * RCS revision: $Revision: 1.2 $
25 * Last changed on $Date: 2005/10/17 23:55:27 $
26 * Changed by $Author: rickd $
27 *-----------------------------------------------------------------------------
28 * $Log: comet_tables.c,v $
29 * Revision 1.2 2005/10/17 23:55:27 rickd
30 * Note that 75 Ohm transmit waveform is not supported on PMCC4.
31 *
32 * Revision 1.1 2005/09/28 00:10:05 rickd
33 * Cosmetic alignment of tables for readability.
34 *
35 * Revision 1.0 2005/05/10 22:47:53 rickd
36 * Initial revision
37 *
38 *-----------------------------------------------------------------------------
39 */
40
41char SBEid_pmcc4_comet_tblc[] =
42 "@(#)comet_tables.c - $Revision: 1.2 $ (c) Copyright 2004-2005 SBE, Inc.";
43
44
45#include <linux/types.h>
46
47/*****************************************************************************
48*
49* Array names:
50*
51* TWVLongHaul0DB
52* TWVLongHaul7_5DB
53* TWVLongHaul15DB
54* TWVLongHaul22_5DB
55* TWVShortHaul0
56* TWVShortHaul1
57* TWVShortHaul2
58* TWVShortHaul3
59* TWVShortHaul4
60* TWVShortHaul5
61* TWV_E1_120Ohm
62* TWV_E1_75Ohm <not supported>
63* T1_Equalizer
64* E1_Equalizer
65*
66*****************************************************************************/
67
68u_int8_t TWVLongHaul0DB[25][5] =/* T1 Long Haul 0 DB */
69{
70 {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */
71 {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */
72 {0x20, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */
73 {0x32, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */
74 {0x3E, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */
75 {0x3D, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */
76 {0x3C, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */
77 {0x3B, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */
78 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
79 {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
80 {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
81 {0x38, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
82 {0x37, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
83 {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
84 {0x34, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
85 {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
86 {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
87 {0x4C, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
88 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
89 {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
90 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
91 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
92 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
93 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
94 {0x0C} /* PMC's suggested value */
95/* {0x14} Output Amplitude */
96};
97
98u_int8_t TWVLongHaul7_5DB[25][5] = /* T1 Long Haul 7.5 DB */
99{
100 {0x00, 0x10, 0x00, 0x00, 0x00}, /* Sample 0 */
101 {0x01, 0x0E, 0x00, 0x00, 0x00}, /* Sample 1 */
102 {0x02, 0x0C, 0x00, 0x00, 0x00}, /* Sample 2 */
103 {0x04, 0x0A, 0x00, 0x00, 0x00}, /* Sample 3 */
104 {0x08, 0x08, 0x00, 0x00, 0x00}, /* Sample 4 */
105 {0x0C, 0x06, 0x00, 0x00, 0x00}, /* Sample 5 */
106 {0x10, 0x04, 0x00, 0x00, 0x00}, /* Sample 6 */
107 {0x16, 0x02, 0x00, 0x00, 0x00}, /* Sample 7 */
108 {0x1A, 0x01, 0x00, 0x00, 0x00}, /* Sample 8 */
109 {0x1E, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
110 {0x22, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
111 {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
112 {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
113 {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
114 {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
115 {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
116 {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
117 {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
118 {0x24, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
119 {0x20, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
120 {0x1C, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
121 {0x18, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
122 {0x14, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
123 {0x12, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
124 {0x07} /* PMC's suggested value */
125/* { 0x0A } Output Amplitude */
126};
127
128u_int8_t TWVLongHaul15DB[25][5] = /* T1 Long Haul 15 DB */
129{
130 {0x00, 0x2A, 0x09, 0x01, 0x00}, /* Sample 0 */
131 {0x00, 0x28, 0x08, 0x01, 0x00}, /* Sample 1 */
132 {0x00, 0x26, 0x08, 0x01, 0x00}, /* Sample 2 */
133 {0x00, 0x24, 0x07, 0x01, 0x00}, /* Sample 3 */
134 {0x01, 0x22, 0x07, 0x01, 0x00}, /* Sample 4 */
135 {0x02, 0x20, 0x06, 0x01, 0x00}, /* Sample 5 */
136 {0x04, 0x1E, 0x06, 0x01, 0x00}, /* Sample 6 */
137 {0x07, 0x1C, 0x05, 0x00, 0x00}, /* Sample 7 */
138 {0x0A, 0x1B, 0x05, 0x00, 0x00}, /* Sample 8 */
139 {0x0D, 0x19, 0x05, 0x00, 0x00}, /* Sample 9 */
140 {0x10, 0x18, 0x04, 0x00, 0x00}, /* Sample 10 */
141 {0x14, 0x16, 0x04, 0x00, 0x00}, /* Sample 11 */
142 {0x18, 0x15, 0x04, 0x00, 0x00}, /* Sample 12 */
143 {0x1B, 0x13, 0x03, 0x00, 0x00}, /* Sample 13 */
144 {0x1E, 0x12, 0x03, 0x00, 0x00}, /* Sample 14 */
145 {0x21, 0x10, 0x03, 0x00, 0x00}, /* Sample 15 */
146 {0x24, 0x0F, 0x03, 0x00, 0x00}, /* Sample 16 */
147 {0x27, 0x0D, 0x03, 0x00, 0x00}, /* Sample 17 */
148 {0x2A, 0x0D, 0x02, 0x00, 0x00}, /* Sample 18 */
149 {0x2D, 0x0B, 0x02, 0x00, 0x00}, /* Sample 19 */
150 {0x30, 0x0B, 0x02, 0x00, 0x00}, /* Sample 20 */
151 {0x30, 0x0A, 0x02, 0x00, 0x00}, /* Sample 21 */
152 {0x2E, 0x0A, 0x02, 0x00, 0x00}, /* Sample 22 */
153 {0x2C, 0x09, 0x02, 0x00, 0x00}, /* Sample 23 */
154 {0x03} /* Output Amplitude */
155};
156
157u_int8_t TWVLongHaul22_5DB[25][5] = /* T1 Long Haul 22.5 DB */
158{
159 {0x00, 0x1F, 0x16, 0x06, 0x01}, /* Sample 0 */
160 {0x00, 0x20, 0x15, 0x05, 0x01}, /* Sample 1 */
161 {0x00, 0x21, 0x15, 0x05, 0x01}, /* Sample 2 */
162 {0x00, 0x22, 0x14, 0x05, 0x01}, /* Sample 3 */
163 {0x00, 0x22, 0x13, 0x04, 0x00}, /* Sample 4 */
164 {0x00, 0x23, 0x12, 0x04, 0x00}, /* Sample 5 */
165 {0x01, 0x23, 0x12, 0x04, 0x00}, /* Sample 6 */
166 {0x01, 0x24, 0x11, 0x03, 0x00}, /* Sample 7 */
167 {0x01, 0x23, 0x10, 0x03, 0x00}, /* Sample 8 */
168 {0x02, 0x23, 0x10, 0x03, 0x00}, /* Sample 9 */
169 {0x03, 0x22, 0x0F, 0x03, 0x00}, /* Sample 10 */
170 {0x05, 0x22, 0x0E, 0x03, 0x00}, /* Sample 11 */
171 {0x07, 0x21, 0x0E, 0x02, 0x00}, /* Sample 12 */
172 {0x09, 0x20, 0x0D, 0x02, 0x00}, /* Sample 13 */
173 {0x0B, 0x1E, 0x0C, 0x02, 0x00}, /* Sample 14 */
174 {0x0E, 0x1D, 0x0C, 0x02, 0x00}, /* Sample 15 */
175 {0x10, 0x1B, 0x0B, 0x02, 0x00}, /* Sample 16 */
176 {0x13, 0x1B, 0x0A, 0x02, 0x00}, /* Sample 17 */
177 {0x15, 0x1A, 0x0A, 0x02, 0x00}, /* Sample 18 */
178 {0x17, 0x19, 0x09, 0x01, 0x00}, /* Sample 19 */
179 {0x19, 0x19, 0x08, 0x01, 0x00}, /* Sample 20 */
180 {0x1B, 0x18, 0x08, 0x01, 0x00}, /* Sample 21 */
181 {0x1D, 0x17, 0x07, 0x01, 0x00}, /* Sample 22 */
182 {0x1E, 0x17, 0x06, 0x01, 0x00}, /* Sample 23 */
183 {0x02} /* Output Amplitude */
184};
185
186u_int8_t TWVShortHaul0[25][5] = /* T1 Short Haul 0 - 110 ft */
187{
188 {0x00, 0x45, 0x00, 0x00, 0x00}, /* Sample 0 */
189 {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */
190 {0x20, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */
191 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */
192 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */
193 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */
194 {0x3C, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */
195 {0x3B, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */
196 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
197 {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
198 {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
199 {0x38, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
200 {0x37, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
201 {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
202 {0x34, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
203 {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
204 {0x59, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
205 {0x55, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
206 {0x50, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
207 {0x4D, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
208 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
209 {0x48, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
210 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
211 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
212 {0x0C} /* Output Amplitude */
213};
214
215u_int8_t TWVShortHaul1[25][5] = /* T1 Short Haul 110 - 220 ft */
216{
217 {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */
218 {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */
219 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */
220 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */
221 {0x36, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */
222 {0x34, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */
223 {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */
224 {0x2F, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */
225 {0x2E, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
226 {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
227 {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
228 {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
229 {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
230 {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
231 {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
232 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
233 {0x68, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
234 {0x54, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
235 {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
236 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
237 {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
238 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
239 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
240 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
241 {0x10} /* Output Amplitude */
242};
243
244u_int8_t TWVShortHaul2[25][5] = /* T1 Short Haul 220 - 330 ft */
245{
246 {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */
247 {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */
248 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */
249 {0x3A, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */
250 {0x3A, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */
251 {0x38, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */
252 {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */
253 {0x2F, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */
254 {0x2E, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
255 {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
256 {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
257 {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
258 {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
259 {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
260 {0x23, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
261 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
262 {0x6C, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
263 {0x60, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
264 {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
265 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
266 {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
267 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
268 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
269 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
270 {0x11} /* Output Amplitude */
271};
272
273u_int8_t TWVShortHaul3[25][5] = /* T1 Short Haul 330 - 440 ft */
274{
275 {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */
276 {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */
277 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */
278 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */
279 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */
280 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */
281 {0x2F, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */
282 {0x2E, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */
283 {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
284 {0x2C, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
285 {0x2B, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
286 {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
287 {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
288 {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
289 {0x19, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
290 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
291 {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
292 {0x60, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
293 {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
294 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
295 {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
296 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
297 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
298 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
299 {0x12} /* Output Amplitude */
300};
301
302u_int8_t TWVShortHaul4[25][5] = /* T1 Short Haul 440 - 550 ft */
303{
304 {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */
305 {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */
306 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */
307 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */
308 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */
309 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */
310 {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */
311 {0x2B, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */
312 {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
313 {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
314 {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
315 {0x27, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
316 {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
317 {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
318 {0x24, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
319 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
320 {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
321 {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
322 {0x4F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
323 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
324 {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
325 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
326 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
327 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
328 {0x14} /* Output Amplitude */
329};
330
331u_int8_t TWVShortHaul5[25][5] = /* T1 Short Haul 550 - 660 ft */
332{
333 {0x00, 0x44, 0x00, 0x00, 0x00}, /* Sample 0 */
334 {0x0A, 0x44, 0x00, 0x00, 0x00}, /* Sample 1 */
335 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 2 */
336 {0x3F, 0x43, 0x00, 0x00, 0x00}, /* Sample 3 */
337 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 4 */
338 {0x3F, 0x42, 0x00, 0x00, 0x00}, /* Sample 5 */
339 {0x3F, 0x41, 0x00, 0x00, 0x00}, /* Sample 6 */
340 {0x30, 0x41, 0x00, 0x00, 0x00}, /* Sample 7 */
341 {0x2A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
342 {0x29, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
343 {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
344 {0x27, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
345 {0x26, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
346 {0x25, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
347 {0x24, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
348 {0x4A, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
349 {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
350 {0x7F, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
351 {0x5F, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
352 {0x50, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
353 {0x49, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
354 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
355 {0x47, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
356 {0x46, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
357 {0x15} /* Output Amplitude */
358};
359
360u_int8_t TWV_E1_120Ohm[25][5] = /* E1 120 Ohm */
361{
362 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 0 */
363 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 1 */
364 {0x0A, 0x00, 0x00, 0x00, 0x00}, /* Sample 2 */
365 {0x3F, 0x00, 0x00, 0x00, 0x00}, /* Sample 3 */
366 {0x3F, 0x00, 0x00, 0x00, 0x00}, /* Sample 4 */
367 {0x39, 0x00, 0x00, 0x00, 0x00}, /* Sample 5 */
368 {0x38, 0x00, 0x00, 0x00, 0x00}, /* Sample 6 */
369 {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 7 */
370 {0x36, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
371 {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
372 {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
373 {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
374 {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
375 {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
376 {0x35, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
377 {0x2D, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
378 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
379 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
380 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
381 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
382 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
383 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
384 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
385 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
386 {0x0C} /* PMC's suggested value */
387/* { 0x10 } Output Amplitude */
388};
389
390
391
392u_int8_t TWV_E1_75Ohm[25][5] = /* E1 75 Ohm */
393{
394#ifdef PMCC4_DOES_NOT_SUPPORT
395 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 0 */
396 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 1 */
397 {0x0A, 0x00, 0x00, 0x00, 0x00}, /* Sample 2 */
398 {0x28, 0x00, 0x00, 0x00, 0x00}, /* Sample 3 */
399 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 4 */
400 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 5 */
401 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 6 */
402 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 7 */
403 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 8 */
404 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 9 */
405 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 10 */
406 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 11 */
407 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 12 */
408 {0x3A, 0x00, 0x00, 0x00, 0x00}, /* Sample 13 */
409 {0x32, 0x00, 0x00, 0x00, 0x00}, /* Sample 14 */
410 {0x14, 0x00, 0x00, 0x00, 0x00}, /* Sample 15 */
411 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 16 */
412 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 17 */
413 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 18 */
414 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 19 */
415 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 20 */
416 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 21 */
417 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 22 */
418 {0x00, 0x00, 0x00, 0x00, 0x00}, /* Sample 23 */
419#endif
420 {0x0C} /* Output Amplitude */
421};
422
423
424u_int32_t T1_Equalizer[256] = /* T1 Receiver Equalizer */
425{
426 0x03FE1840, 0x03F61840, 0x03EE1840, 0x03E61840, /* 000 - 003 */
427 0x03DE1840, 0x03D61840, 0x03D61840, 0x03D61840, /* 004 - 007 */
428 0x03CE1840, 0x03CE1840, 0x03CE1840, 0x03CE1840, /* 008 - 011 */
429 0x03C61840, 0x03C61840, 0x03C61840, 0x0BBE1840, /* 012 - 015 */
430 0x0BBE1840, 0x0BBE1840, 0x0BBE1840, 0x0BB61840, /* 016 - 019 */
431 0x0BB61840, 0x0BB61840, 0x0BB61840, 0x13AE1838, /* 020 - 023 */
432 0x13AE183C, 0x13AE1840, 0x13AE1840, 0x13AE1840, /* 024 - 027 */
433 0x13AE1840, 0x1BB618B8, 0x1BAE18B8, 0x1BAE18BC, /* 028 - 031 */
434 0x1BAE18C0, 0x1BAE18C0, 0x23A618C0, 0x23A618C0, /* 032 - 035 */
435 0x23A618C0, 0x23A618C0, 0x23A618C0, 0x239E18C0, /* 036 - 039 */
436 0x239E18C0, 0x239E18C0, 0x239E18C0, 0x239E18C0, /* 040 - 043 */
437 0x2B9618C0, 0x2B9618C0, 0x2B9618C0, 0x33961940, /* 044 - 047 */
438 0x37961940, 0x37961940, 0x37961940, 0x3F9E19C0, /* 048 - 051 */
439 0x3F9E19C0, 0x3F9E19C0, 0x3FA61A40, 0x3FA61A40, /* 052 - 055 */
440 0x3FA61A40, 0x3FA61A40, 0x3F9619C0, 0x3F9619C0, /* 056 - 059 */
441 0x3F9619C0, 0x3F9619C0, 0x479E1A40, 0x479E1A40, /* 060 - 063 */
442 0x479E1A40, 0x47961A40, 0x47961A40, 0x47961A40, /* 064 - 067 */
443 0x47961A40, 0x4F8E1A40, 0x4F8E1A40, 0x4F8E1A40, /* 068 - 071 */
444 0x4F8E1A40, 0x4F8E1A40, 0x57861A40, 0x57861A40, /* 072 - 075 */
445 0x57861A40, 0x57861A40, 0x57861A40, 0x5F861AC0, /* 076 - 079 */
446 0x5F861AC0, 0x5F861AC0, 0x5F861AC0, 0x5F861AC0, /* 080 - 083 */
447 0x5F861AC0, 0x5F7E1AC0, 0x5F7E1AC0, 0x5F7E1AC0, /* 084 - 087 */
448 0x5F7E1AC0, 0x5F7E1AC0, 0x677E2AC0, 0x677E2AC0, /* 088 - 091 */
449 0x677E2AC0, 0x677E2AC0, 0x67762AC0, 0x67762AC0, /* 092 - 095 */
450 0x67762AC0, 0x67762AC0, 0x67762AC0, 0x6F6E2AC0, /* 096 - 099 */
451 0x6F6E2AC0, 0x6F6E2AC0, 0x6F6E2AC0, 0x776E3AC0, /* 100 - 103 */
452 0x776E3AC0, 0x776E3AC0, 0x776E3AC0, 0x7F663AC0, /* 104 - 107 */
453 0x7F663AC0, 0x7F664AC0, 0x7F664AC0, 0x7F664AC0, /* 108 - 111 */
454 0x7F664AC0, 0x87665AC0, 0x87665AC0, 0x87665AC0, /* 112 - 115 */
455 0x87665AC0, 0x87665AC0, 0x875E5AC0, 0x875E5AC0, /* 116 - 119 */
456 0x875E5AC0, 0x875E5AC0, 0x875E5AC0, 0x8F5E6AC0, /* 120 - 123 */
457 0x8F5E6AC0, 0x8F5E6AC0, 0x8F5E6AC0, 0x975E7AC0, /* 124 - 127 */
458 0x975E7AC0, 0x975E7AC0, 0x975E7AC0, 0x9F5E8AC0, /* 128 - 131 */
459 0x9F5E8AC0, 0x9F5E8AC0, 0x9F5E8AC0, 0x9F5E8AC0, /* 132 - 135 */
460 0xA7569AC0, 0xA7569AC0, 0xA7569AC0, 0xA7569AC0, /* 136 - 139 */
461 0xA756AAC0, 0xA756AAC0, 0xA756AAC0, 0xAF4EAAC0, /* 140 - 143 */
462 0xAF4EAAC0, 0xAF4EAAC0, 0xAF4EAAC0, 0xAF4EAAC0, /* 144 - 147 */
463 0xB746AAC0, 0xB746AAC0, 0xB746AAC0, 0xB746AAC0, /* 148 - 151 */
464 0xB746AAC0, 0xB746AAC0, 0xB746AAC0, 0xB746BAC0, /* 152 - 155 */
465 0xB746BAC0, 0xB746BAC0, 0xBF4EBB40, 0xBF4EBB40, /* 156 - 159 */
466 0xBF4EBB40, 0xBF4EBB40, 0xBF4EBB40, 0xBF4EBB40, /* 160 - 163 */
467 0xBF4EBB40, 0xBF4EBB40, 0xBF4EBB40, 0xBE46CB40, /* 164 - 167 */
468 0xBE46CB40, 0xBE46CB40, 0xBE46CB40, 0xBE46CB40, /* 168 - 171 */
469 0xBE46CB40, 0xBE46DB40, 0xBE46DB40, 0xBE46DB40, /* 172 - 175 */
470 0xC63ECB40, 0xC63ECB40, 0xC63EDB40, 0xC63EDB40, /* 176 - 179 */
471 0xC63EDB40, 0xC644DB40, 0xC644DB40, 0xC644DB40, /* 180 - 183 */
472 0xC644DB40, 0xC63CDB40, 0xC63CDB40, 0xC63CDB40, /* 184 - 187 */
473 0xC63CDB40, 0xD634DB40, 0xD634DB40, 0xD634DB40, /* 188 - 191 */
474 0xD634DB40, 0xD634DB40, 0xDE2CDB3C, 0xDE2CDB3C, /* 192 - 195 */
475 0xDE2CDB3C, 0xE62CDB40, 0xE62CDB40, 0xE62CDB40, /* 196 - 199 */
476 0xE62CDB40, 0xE62CDB40, 0xE62CEB40, 0xE62CEB40, /* 200 - 203 */
477 0xE62CEB40, 0xEE2CFB40, 0xEE2CFB40, 0xEE2CFB40, /* 204 - 207 */
478 0xEE2D0B40, 0xEE2D0B40, 0xEE2D0B40, 0xEE2D0B40, /* 208 - 211 */
479 0xEE2D0B40, 0xF5250B38, 0xF5250B3C, 0xF5250B40, /* 212 - 215 */
480 0xF5251B40, 0xF5251B40, 0xF5251B40, 0xF5251B40, /* 216 - 219 */
481 0xF5251B40, 0xFD252B40, 0xFD252B40, 0xFD252B40, /* 220 - 223 */
482 0xFD252B40, 0xFD252740, 0xFD252740, 0xFD252740, /* 224 - 227 */
483 0xFD252340, 0xFD252340, 0xFD252340, 0xFD253340, /* 228 - 231 */
484 0xFD253340, 0xFD253340, 0xFD253340, 0xFD253340, /* 232 - 235 */
485 0xFD253340, 0xFD253340, 0xFD253340, 0xFC254340, /* 236 - 239 */
486 0xFD254340, 0xFD254340, 0xFD254344, 0xFC254348, /* 240 - 243 */
487 0xFC25434C, 0xFD2543BC, 0xFD2543C0, 0xFC2543C0, /* 244 - 247 */
488 0xFC2343C0, 0xFC2343C0, 0xFD2343C0, 0xFC2143C0, /* 248 - 251 */
489 0xFC2143C0, 0xFC2153C0, 0xFD2153C0, 0xFC2153C0 /* 252 - 255 */
490};
491
492
493u_int32_t E1_Equalizer[256] = /* E1 Receiver Equalizer */
494{
495 0x07DE182C, 0x07DE182C, 0x07D6182C, 0x07D6182C, /* 000 - 003 */
496 0x07D6182C, 0x07CE182C, 0x07CE182C, 0x07CE182C, /* 004 - 007 */
497 0x07C6182C, 0x07C6182C, 0x07C6182C, 0x07BE182C, /* 008 - 011 */
498 0x07BE182C, 0x07BE182C, 0x07BE182C, 0x07BE182C, /* 012 - 015 */
499 0x07B6182C, 0x07B6182C, 0x07B6182C, 0x07B6182C, /* 016 - 019 */
500 0x07B6182C, 0x07AE182C, 0x07AE182C, 0x07AE182C, /* 020 - 023 */
501 0x07AE182C, 0x07AE182C, 0x07B618AC, 0x07AE18AC, /* 024 - 027 */
502 0x07AE18AC, 0x07AE18AC, 0x07AE18AC, 0x07A618AC, /* 028 - 031 */
503 0x07A618AC, 0x07A618AC, 0x07A618AC, 0x079E18AC, /* 032 - 035 */
504 0x07A6192C, 0x07A6192C, 0x07A6192C, 0x0FA6192C, /* 036 - 039 */
505 0x0FA6192C, 0x0F9E192C, 0x0F9E192C, 0x0F9E192C, /* 040 - 043 */
506 0x179E192C, 0x17A619AC, 0x179E19AC, 0x179E19AC, /* 044 - 047 */
507 0x179619AC, 0x1F9619AC, 0x1F9619AC, 0x1F8E19AC, /* 048 - 051 */
508 0x1F8E19AC, 0x1F8E19AC, 0x278E19AC, 0x278E1A2C, /* 052 - 055 */
509 0x278E1A2C, 0x278E1A2C, 0x278E1A2C, 0x2F861A2C, /* 056 - 059 */
510 0x2F861A2C, 0x2F861A2C, 0x2F7E1A2C, 0x2F7E1A2C, /* 060 - 063 */
511 0x2F7E1A2C, 0x377E1A2C, 0x377E1AAC, 0x377E1AAC, /* 064 - 067 */
512 0x377E1AAC, 0x377E1AAC, 0x3F7E2AAC, 0x3F7E2AAC, /* 068 - 071 */
513 0x3F762AAC, 0x3F862B2C, 0x3F7E2B2C, 0x477E2B2C, /* 072 - 075 */
514 0x477E2F2C, 0x477E2F2C, 0x477E2F2C, 0x47762F2C, /* 076 - 079 */
515 0x4F762F2C, 0x4F762F2C, 0x4F6E2F2C, 0x4F6E2F2C, /* 080 - 083 */
516 0x4F6E2F2C, 0x576E2F2C, 0x576E2F2C, 0x576E3F2C, /* 084 - 087 */
517 0x576E3F2C, 0x576E3F2C, 0x5F6E3F2C, 0x5F6E4F2C, /* 088 - 091 */
518 0x5F6E4F2C, 0x5F6E4F2C, 0x5F664F2C, 0x67664F2C, /* 092 - 095 */
519 0x67664F2C, 0x675E4F2C, 0x675E4F2C, 0x67664F2C, /* 096 - 099 */
520 0x67664F2C, 0x67665F2C, 0x6F6E5F2C, 0x6F6E6F2C, /* 100 - 103 */
521 0x6F6E6F2C, 0x6F6E7F2C, 0x6F6E7F2C, 0x6F6E7F2C, /* 104 - 107 */
522 0x77667F2C, 0x77667F2C, 0x775E6F2C, 0x775E7F2C, /* 108 - 111 */
523 0x775E7F2C, 0x7F5E7F2C, 0x7F5E8F2C, 0x7F5E8F2C, /* 112 - 115 */
524 0x7F5E8F2C, 0x87568F2C, 0x87568F2C, 0x87568F2C, /* 116 - 119 */
525 0x874E8F2C, 0x874E8F2C, 0x874E8F2C, 0x8F4E9F2C, /* 120 - 123 */
526 0x8F4E9F2C, 0x8F4EAF2C, 0x8F4EAF2C, 0x8F4EAF2C, /* 124 - 127 */
527 0x974EAF2C, 0x974EAF2C, 0x974EAB2C, 0x974EAB2C, /* 128 - 131 */
528 0x974EAB2C, 0x9F4EAB2C, 0x9F4EBB2C, 0x9F4EBB2C, /* 132 - 135 */
529 0x9F4EBB2C, 0x9F4ECB2C, 0xA74ECB2C, 0xA74ECB2C, /* 136 - 139 */
530 0xA746CB2C, 0xA746CB2C, 0xA746CB2C, 0xA746DB2C, /* 140 - 143 */
531 0xAF46DB2C, 0xAF46EB2C, 0xAF46EB2C, 0xAF4EEB2C, /* 144 - 147 */
532 0xAE4EEB2C, 0xAE4EEB2C, 0xB546FB2C, 0xB554FB2C, /* 148 - 151 */
533 0xB54CEB2C, 0xB554FB2C, 0xB554FB2C, 0xBD54FB2C, /* 152 - 155 */
534 0xBD4CFB2C, 0xBD4CFB2C, 0xBD4CFB2C, 0xBD44EB2C, /* 156 - 159 */
535 0xC544FB2C, 0xC544FB2C, 0xC544FB2C, 0xC5450B2C, /* 160 - 163 */
536 0xC5450B2C, 0xC5450B2C, 0xCD450B2C, 0xCD450B2C, /* 164 - 167 */
537 0xCD3D0B2C, 0xCD3D0B2C, 0xCD3D0B2C, 0xD53D0B2C, /* 168 - 171 */
538 0xD53D0B2C, 0xD53D1B2C, 0xD53D1B2C, 0xD53D1B2C, /* 172 - 175 */
539 0xDD3D1B2C, 0xDD3D1B2C, 0xDD351B2C, 0xDD351B2C, /* 176 - 179 */
540 0xDD351B2C, 0xE5351B2C, 0xE5351B2C, 0xE52D1B2C, /* 180 - 183 */
541 0xE52D1B2C, 0xE52D3B2C, 0xED2D4B2C, 0xED2D1BA8, /* 184 - 187 */
542 0xED2D1BAC, 0xED2D17AC, 0xED2D17AC, 0xED2D27AC, /* 188 - 191 */
543 0xF52D27AC, 0xF52D27AC, 0xF52D2BAC, 0xF52D2BAC, /* 192 - 195 */
544 0xF52D2BAC, 0xFD2D2BAC, 0xFD2B2BAC, 0xFD2B2BAC, /* 196 - 199 */
545 0xFD2B2BAC, 0xFD2B2BAC, 0xFD232BAC, 0xFD232BAC, /* 200 - 203 */
546 0xFD232BAC, 0xFD212BAC, 0xFD212BAC, 0xFD292BAC, /* 204 - 207 */
547 0xFD292BAC, 0xFD2927AC, 0xFD2937AC, 0xFD2923AC, /* 208 - 211 */
548 0xFD2923AC, 0xFD2923AC, 0xFD2923AC, 0xFD2123AC, /* 212 - 215 */
549 0xFD2123AC, 0xFD2123AC, 0xFD2133AC, 0xFD2133AC, /* 216 - 219 */
550 0xFD2133AC, 0xFD2143AC, 0xFD2143AC, 0xFD2143AC, /* 220 - 223 */
551 0xFC2143AC, 0xFC2143AC, 0xFC1943AC, 0xFC1943AC, /* 224 - 227 */
552 0xFC1943AC, 0xFC1943AC, 0xFC1953AC, 0xFC1953AC, /* 228 - 231 */
553 0xFC1953AC, 0xFC1953AC, 0xFC1963AC, 0xFC1963AC, /* 232 - 235 */
554 0xFC1963AC, 0xFC1973AC, 0xFC1973AC, 0xFC1973AC, /* 236 - 239 */
555 0xFC1973AC, 0xFC1973AC, 0xFC1983AC, 0xFC1983AC, /* 240 - 243 */
556 0xFC1983AC, 0xFC1983AC, 0xFC1983AC, 0xFC1993AC, /* 244 - 247 */
557 0xFC1993AC, 0xFC1993AC, 0xFC19A3AC, 0xFC19A3AC, /* 248 - 251 */
558 0xFC19B3AC, 0xFC19B3AC, 0xFC19B3AC, 0xFC19B3AC /* 252 - 255 */
559};
560
561/*** End-of-Files ***/
diff --git a/drivers/staging/cxt1e1/comet_tables.h b/drivers/staging/cxt1e1/comet_tables.h
new file mode 100644
index 000000000000..80424a26a169
--- /dev/null
+++ b/drivers/staging/cxt1e1/comet_tables.h
@@ -0,0 +1,85 @@
1/*
2 * $Id: comet_tables.h,v 1.5 2006/01/02 22:37:31 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_COMET_TBLS_H_
6#define _INC_COMET_TBLS_H_
7
8/*-----------------------------------------------------------------------------
9 * comet_tables.h - Waveform Tables for the PM4351 'COMET'
10 *
11 * Copyright (C) 2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.5 $
28 * Last changed on $Date: 2006/01/02 22:37:31 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: comet_tables.h,v $
32 * Revision 1.5 2006/01/02 22:37:31 rickd
33 * Double indexed arrays need sizings to avoid CC errors under
34 * gcc 4.0.0
35 *
36 * Revision 1.4 2005/10/17 23:55:28 rickd
37 * The 75 Ohm transmit waveform is not supported on PMCC4.
38 *
39 * Revision 1.3 2005/09/28 00:10:08 rickd
40 * Add GNU License info. Structures moved to -C- file.
41 *
42 * Revision 1.2 2005/04/28 23:43:04 rickd
43 * Add RCS tracking heading.
44 *
45 *-----------------------------------------------------------------------------
46 */
47
48
49/*****************************************************************************
50*
51* Array names:
52*
53* TWVLongHaul0DB
54* TWVLongHaul7_5DB
55* TWVLongHaul15DB
56* TWVLongHaul22_5DB
57* TWVShortHaul0
58* TWVShortHaul1
59* TWVShortHaul2
60* TWVShortHaul3
61* TWVShortHaul4
62* TWVShortHaul5
63* TWV_E1_120Ohm
64* TWV_E1_75Ohm <not supported>
65* T1_Equalizer
66* E1_Equalizer
67*
68*****************************************************************************/
69
70extern u_int8_t TWVLongHaul0DB[25][5]; /* T1 Long Haul 0 DB */
71extern u_int8_t TWVLongHaul7_5DB[25][5]; /* T1 Long Haul 7.5 DB */
72extern u_int8_t TWVLongHaul15DB[25][5]; /* T1 Long Haul 15 DB */
73extern u_int8_t TWVLongHaul22_5DB[25][5]; /* T1 Long Haul 22.5 DB */
74extern u_int8_t TWVShortHaul0[25][5]; /* T1 Short Haul 0-110 ft */
75extern u_int8_t TWVShortHaul1[25][5]; /* T1 Short Haul 110-220 ft */
76extern u_int8_t TWVShortHaul2[25][5]; /* T1 Short Haul 220-330 ft */
77extern u_int8_t TWVShortHaul3[25][5]; /* T1 Short Haul 330-440 ft */
78extern u_int8_t TWVShortHaul4[25][5]; /* T1 Short Haul 440-550 ft */
79extern u_int8_t TWVShortHaul5[25][5]; /* T1 Short Haul 550-660 ft */
80extern u_int8_t TWV_E1_75Ohm[25][5]; /* E1 75 Ohm */
81extern u_int8_t TWV_E1_120Ohm[25][5]; /* E1 120 Ohm */
82extern u_int32_t T1_Equalizer[256]; /* T1 Receiver Equalizer */
83extern u_int32_t E1_Equalizer[256]; /* E1 Receiver Equalizer */
84
85#endif /* _INC_COMET_TBLS_H_ */
diff --git a/drivers/staging/cxt1e1/functions.c b/drivers/staging/cxt1e1/functions.c
new file mode 100644
index 000000000000..86b498090265
--- /dev/null
+++ b/drivers/staging/cxt1e1/functions.c
@@ -0,0 +1,368 @@
1/* Copyright (C) 2003-2005 SBE, Inc.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16#include <linux/slab.h>
17#include <asm/io.h>
18#include <asm/byteorder.h>
19#include <linux/netdevice.h>
20#include <linux/delay.h>
21#include <linux/hdlc.h>
22#include "pmcc4_sysdep.h"
23#include "sbecom_inline_linux.h"
24#include "libsbew.h"
25#include "pmcc4.h"
26
27
28#ifdef SBE_INCLUDE_SYMBOLS
29#define STATIC
30#else
31#define STATIC static
32#endif
33
34#if defined(CONFIG_SBE_HDLC_V7) || defined(CONFIG_SBE_WAN256T3_HDLC_V7) || \
35 defined(CONFIG_SBE_HDLC_V7_MODULE) || defined(CONFIG_SBE_WAN256T3_HDLC_V7_MODULE)
36#define _v7_hdlc_ 1
37#else
38#define _v7_hdlc_ 0
39#endif
40
41#if _v7_hdlc_
42#define V7(x) (x ## _v7)
43extern int hdlc_netif_rx_v7 (hdlc_device *, struct sk_buff *);
44extern int register_hdlc_device_v7 (hdlc_device *);
45extern int unregister_hdlc_device_v7 (hdlc_device *);
46
47#else
48#define V7(x) x
49#endif
50
51
52#ifndef USE_MAX_INT_DELAY
53static int dummy = 0;
54
55#endif
56
57extern int log_level;
58extern int drvr_state;
59
60
61#if 1
62u_int32_t
63pci_read_32 (u_int32_t *p)
64{
65#ifdef FLOW_DEBUG
66 u_int32_t v;
67
68 FLUSH_PCI_READ ();
69 v = le32_to_cpu (*p);
70 if (log_level >= LOG_DEBUG)
71 pr_info("pci_read : %x = %x\n", (u_int32_t) p, v);
72 return v;
73#else
74 FLUSH_PCI_READ (); /* */
75 return le32_to_cpu (*p);
76#endif
77}
78
79void
80pci_write_32 (u_int32_t *p, u_int32_t v)
81{
82#ifdef FLOW_DEBUG
83 if (log_level >= LOG_DEBUG)
84 pr_info("pci_write: %x = %x\n", (u_int32_t) p, v);
85#endif
86 *p = cpu_to_le32 (v);
87 FLUSH_PCI_WRITE (); /* This routine is called from routines
88 * which do multiple register writes
89 * which themselves need flushing between
90 * writes in order to guarantee write
91 * ordering. It is less code-cumbersome
92 * to flush here-in then to investigate
93 * and code the many other register
94 * writing routines. */
95}
96#endif
97
98
99void
100pci_flush_write (ci_t * ci)
101{
102 volatile u_int32_t v;
103
104 /* issue a PCI read to flush PCI write thru bridge */
105 v = *(u_int32_t *) &ci->reg->glcd; /* any address would do */
106
107 /*
108 * return nothing, this just reads PCI bridge interface to flush
109 * previously written data
110 */
111}
112
113
114STATIC void
115watchdog_func (unsigned long arg)
116{
117 struct watchdog *wd = (void *) arg;
118
119 if (drvr_state != SBE_DRVR_AVAILABLE)
120 {
121 if (log_level >= LOG_MONITOR)
122 pr_warning("%s: drvr not available (%x)\n", __func__, drvr_state);
123 return;
124 }
125#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
126 /* Initialize the tq entry only the first time */
127 if (wd->init_tq)
128 {
129 wd->init_tq = 0;
130 wd->tq.routine = wd->func;
131 wd->tq.sync = 0;
132 wd->tq.data = wd->softc;
133 }
134 schedule_task (&wd->tq);
135#else
136 schedule_work (&wd->work);
137#endif
138 mod_timer (&wd->h, jiffies + wd->ticks);
139}
140
141int OS_init_watchdog(struct watchdog *wdp, void (*f) (void *), void *c, int usec)
142{
143 wdp->func = f;
144 wdp->softc = c;
145 wdp->ticks = (HZ) * (usec / 1000) / 1000;
146 INIT_WORK(&wdp->work, (void *)f);
147 init_timer (&wdp->h);
148 {
149 ci_t *ci = (ci_t *) c;
150
151 wdp->h.data = (unsigned long) &ci->wd;
152 }
153 wdp->h.function = watchdog_func;
154 return 0;
155}
156
157void
158OS_uwait (int usec, char *description)
159{
160 int tmp;
161
162 if (usec >= 1000)
163 {
164 mdelay (usec / 1000);
165 /* now delay residual */
166 tmp = (usec / 1000) * 1000; /* round */
167 tmp = usec - tmp; /* residual */
168 if (tmp)
169 { /* wait on residual */
170 udelay (tmp);
171 }
172 } else
173 {
174 udelay (usec);
175 }
176}
177
178/* dummy short delay routine called as a subroutine so that compiler
179 * does not optimize/remove its intent (a short delay)
180 */
181
182void
183OS_uwait_dummy (void)
184{
185#ifndef USE_MAX_INT_DELAY
186 dummy++;
187#else
188 udelay (1);
189#endif
190}
191
192
193void
194OS_sem_init (void *sem, int state)
195{
196 switch (state)
197 {
198 case SEM_TAKEN:
199 init_MUTEX_LOCKED ((struct semaphore *) sem);
200 break;
201 case SEM_AVAILABLE:
202 init_MUTEX ((struct semaphore *) sem);
203 break;
204 default: /* otherwise, set sem.count to state's
205 * value */
206 sema_init (sem, state);
207 break;
208 }
209}
210
211
212int
213sd_line_is_ok (void *user)
214{
215 struct net_device *ndev = (struct net_device *) user;
216
217 return (netif_carrier_ok (ndev));
218}
219
220void
221sd_line_is_up (void *user)
222{
223 struct net_device *ndev = (struct net_device *) user;
224
225 netif_carrier_on (ndev);
226 return;
227}
228
229void
230sd_line_is_down (void *user)
231{
232 struct net_device *ndev = (struct net_device *) user;
233
234 netif_carrier_off (ndev);
235 return;
236}
237
238void
239sd_disable_xmit (void *user)
240{
241 struct net_device *dev = (struct net_device *) user;
242
243 netif_stop_queue (dev);
244 return;
245}
246
247void
248sd_enable_xmit (void *user)
249{
250 struct net_device *dev = (struct net_device *) user;
251
252 netif_wake_queue (dev);
253 return;
254}
255
256int
257sd_queue_stopped (void *user)
258{
259 struct net_device *ndev = (struct net_device *) user;
260
261 return (netif_queue_stopped (ndev));
262}
263
264void sd_recv_consume(void *token, size_t len, void *user)
265{
266 struct net_device *ndev = user;
267 struct sk_buff *skb = token;
268
269 skb->dev = ndev;
270 skb_put (skb, len);
271 skb->protocol = hdlc_type_trans(skb, ndev);
272 netif_rx(skb);
273}
274
275
276/**
277 ** Read some reserved location w/in the COMET chip as a usable
278 ** VMETRO trigger point or other trace marking event.
279 **/
280
281#include "comet.h"
282
283extern ci_t *CI; /* dummy pointer to board ZERO's data */
284void
285VMETRO_TRACE (void *x)
286{
287 u_int32_t y = (u_int32_t) x;
288
289 pci_write_32 ((u_int32_t *) &CI->cpldbase->leds, y);
290}
291
292
293void
294VMETRO_TRIGGER (ci_t * ci, int x)
295{
296 comet_t *comet;
297 volatile u_int32_t data;
298
299 comet = ci->port[0].cometbase; /* default to COMET # 0 */
300
301 switch (x)
302 {
303 default:
304 case 0:
305 data = pci_read_32 ((u_int32_t *) &comet->__res24); /* 0x90 */
306 break;
307 case 1:
308 data = pci_read_32 ((u_int32_t *) &comet->__res25); /* 0x94 */
309 break;
310 case 2:
311 data = pci_read_32 ((u_int32_t *) &comet->__res26); /* 0x98 */
312 break;
313 case 3:
314 data = pci_read_32 ((u_int32_t *) &comet->__res27); /* 0x9C */
315 break;
316 case 4:
317 data = pci_read_32 ((u_int32_t *) &comet->__res88); /* 0x220 */
318 break;
319 case 5:
320 data = pci_read_32 ((u_int32_t *) &comet->__res89); /* 0x224 */
321 break;
322 case 6:
323 data = pci_read_32 ((u_int32_t *) &comet->__res8A); /* 0x228 */
324 break;
325 case 7:
326 data = pci_read_32 ((u_int32_t *) &comet->__res8B); /* 0x22C */
327 break;
328 case 8:
329 data = pci_read_32 ((u_int32_t *) &comet->__resA0); /* 0x280 */
330 break;
331 case 9:
332 data = pci_read_32 ((u_int32_t *) &comet->__resA1); /* 0x284 */
333 break;
334 case 10:
335 data = pci_read_32 ((u_int32_t *) &comet->__resA2); /* 0x288 */
336 break;
337 case 11:
338 data = pci_read_32 ((u_int32_t *) &comet->__resA3); /* 0x28C */
339 break;
340 case 12:
341 data = pci_read_32 ((u_int32_t *) &comet->__resA4); /* 0x290 */
342 break;
343 case 13:
344 data = pci_read_32 ((u_int32_t *) &comet->__resA5); /* 0x294 */
345 break;
346 case 14:
347 data = pci_read_32 ((u_int32_t *) &comet->__resA6); /* 0x298 */
348 break;
349 case 15:
350 data = pci_read_32 ((u_int32_t *) &comet->__resA7); /* 0x29C */
351 break;
352 case 16:
353 data = pci_read_32 ((u_int32_t *) &comet->__res74); /* 0x1D0 */
354 break;
355 case 17:
356 data = pci_read_32 ((u_int32_t *) &comet->__res75); /* 0x1D4 */
357 break;
358 case 18:
359 data = pci_read_32 ((u_int32_t *) &comet->__res76); /* 0x1D8 */
360 break;
361 case 19:
362 data = pci_read_32 ((u_int32_t *) &comet->__res77); /* 0x1DC */
363 break;
364 }
365}
366
367
368/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/hwprobe.c b/drivers/staging/cxt1e1/hwprobe.c
new file mode 100644
index 000000000000..4c8610293fcc
--- /dev/null
+++ b/drivers/staging/cxt1e1/hwprobe.c
@@ -0,0 +1,402 @@
1/* Copyright (C) 2007 One Stop Systems
2 * Copyright (C) 2003-2005 SBE, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/netdevice.h>
18#include <linux/hdlc.h>
19#include <linux/if_arp.h>
20#include <asm/uaccess.h>
21#include <linux/rtnetlink.h>
22#include <linux/pci.h>
23#include "pmcc4_sysdep.h"
24#include "sbecom_inline_linux.h"
25#include "libsbew.h"
26#include "pmcc4_private.h"
27#include "pmcc4.h"
28#include "pmcc4_ioctls.h"
29#include "pmc93x6_eeprom.h"
30#ifdef CONFIG_PROC_FS
31#include "sbeproc.h"
32#endif
33
34#ifdef SBE_INCLUDE_SYMBOLS
35#define STATIC
36#else
37#define STATIC static
38#endif
39
40extern int log_level;
41extern int error_flag;
42extern int drvr_state;
43
44/* forward references */
45void c4_stopwd (ci_t *);
46struct net_device * __init c4_add_dev (hdw_info_t *, int, unsigned long, unsigned long, int, int);
47
48
49struct s_hdw_info hdw_info[MAX_BOARDS];
50
51
52void __init
53show_two (hdw_info_t * hi, int brdno)
54{
55 ci_t *ci;
56 struct pci_dev *pdev;
57 char *bid;
58 char *bp, banner[80];
59 char sn[6];
60
61 bp = banner;
62 memset (banner, 0, 80); /* clear print buffer */
63
64 ci = (ci_t *)(netdev_priv(hi->ndev));
65 bid = sbeid_get_bdname (ci);
66 switch (hi->promfmt)
67 {
68 case PROM_FORMAT_TYPE1:
69 memcpy (sn, (FLD_TYPE1 *) (hi->mfg_info.pft1.Serial), 6);
70 break;
71 case PROM_FORMAT_TYPE2:
72 memcpy (sn, (FLD_TYPE2 *) (hi->mfg_info.pft2.Serial), 6);
73 break;
74 default:
75 memset (sn, 0, 6);
76 break;
77 }
78
79 sprintf (banner, "%s: %s S/N %06X, MUSYCC Rev %02X",
80 hi->devname, bid,
81 ((sn[3] << 16) & 0xff0000) |
82 ((sn[4] << 8) & 0x00ff00) |
83 (sn[5] & 0x0000ff),
84 (u_int8_t) hi->revid[0]);
85
86 pr_info("%s\n", banner);
87
88 pdev = hi->pdev[0];
89 pr_info("%s: %s at v/p=%lx/%lx (%02x:%02x.%x) irq %d\n",
90 hi->devname, "MUSYCC",
91 (unsigned long) hi->addr_mapped[0], hi->addr[0],
92 hi->pci_busno, (u_int8_t) PCI_SLOT (pdev->devfn),
93 (u_int8_t) PCI_FUNC (pdev->devfn), pdev->irq);
94
95 pdev = hi->pdev[1];
96 pr_info("%s: %s at v/p=%lx/%lx (%02x:%02x.%x) irq %d\n",
97 hi->devname, "EBUS ",
98 (unsigned long) hi->addr_mapped[1], hi->addr[1],
99 hi->pci_busno, (u_int8_t) PCI_SLOT (pdev->devfn),
100 (u_int8_t) PCI_FUNC (pdev->devfn), pdev->irq);
101}
102
103
104void __init
105hdw_sn_get (hdw_info_t * hi, int brdno)
106{
107 /* obtain hardware EEPROM information */
108 long addr;
109
110 addr = (long) hi->addr_mapped[1] + EEPROM_OFFSET;
111
112 /* read EEPROM with largest known format size... */
113 pmc_eeprom_read_buffer (addr, 0, (char *) hi->mfg_info.data, sizeof (FLD_TYPE2));
114
115#if 0
116 {
117 unsigned char *ucp = (unsigned char *) &hi->mfg_info.data;
118
119 pr_info("eeprom[00]: %02x %02x %02x %02x %02x %02x %02x %02x\n",
120 *(ucp + 0), *(ucp + 1), *(ucp + 2), *(ucp + 3), *(ucp + 4), *(ucp + 5), *(ucp + 6), *(ucp + 7));
121 pr_info("eeprom[08]: %02x %02x %02x %02x %02x %02x %02x %02x\n",
122 *(ucp + 8), *(ucp + 9), *(ucp + 10), *(ucp + 11), *(ucp + 12), *(ucp + 13), *(ucp + 14), *(ucp + 15));
123 pr_info("eeprom[16]: %02x %02x %02x %02x %02x %02x %02x %02x\n",
124 *(ucp + 16), *(ucp + 17), *(ucp + 18), *(ucp + 19), *(ucp + 20), *(ucp + 21), *(ucp + 22), *(ucp + 23));
125 pr_info("eeprom[24]: %02x %02x %02x %02x %02x %02x %02x %02x\n",
126 *(ucp + 24), *(ucp + 25), *(ucp + 26), *(ucp + 27), *(ucp + 28), *(ucp + 29), *(ucp + 30), *(ucp + 31));
127 pr_info("eeprom[32]: %02x %02x %02x %02x %02x %02x %02x %02x\n",
128 *(ucp + 32), *(ucp + 33), *(ucp + 34), *(ucp + 35), *(ucp + 36), *(ucp + 37), *(ucp + 38), *(ucp + 39));
129 pr_info("eeprom[40]: %02x %02x %02x %02x %02x %02x %02x %02x\n",
130 *(ucp + 40), *(ucp + 41), *(ucp + 42), *(ucp + 43), *(ucp + 44), *(ucp + 45), *(ucp + 46), *(ucp + 47));
131 }
132#endif
133#if 0
134 pr_info("sn: %x %x %x %x %x %x\n",
135 hi->mfg_info.Serial[0],
136 hi->mfg_info.Serial[1],
137 hi->mfg_info.Serial[2],
138 hi->mfg_info.Serial[3],
139 hi->mfg_info.Serial[4],
140 hi->mfg_info.Serial[5]);
141#endif
142
143 if ((hi->promfmt = pmc_verify_cksum (&hi->mfg_info.data)) == PROM_FORMAT_Unk)
144 {
145 /* bad crc, data is suspect */
146 if (log_level >= LOG_WARN)
147 pr_info("%s: EEPROM cksum error\n", hi->devname);
148 hi->mfg_info_sts = EEPROM_CRCERR;
149 } else
150 hi->mfg_info_sts = EEPROM_OK;
151}
152
153
154void __init
155prep_hdw_info (void)
156{
157 hdw_info_t *hi;
158 int i;
159
160 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
161 {
162 hi->pci_busno = 0xff;
163 hi->pci_slot = 0xff;
164 hi->pci_pin[0] = 0;
165 hi->pci_pin[1] = 0;
166 hi->ndev = 0;
167 hi->addr[0] = 0L;
168 hi->addr[1] = 0L;
169 hi->addr_mapped[0] = 0L;
170 hi->addr_mapped[1] = 0L;
171 }
172}
173
174void
175cleanup_ioremap (void)
176{
177 hdw_info_t *hi;
178 int i;
179
180 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
181 {
182 if (hi->pci_slot == 0xff)
183 break;
184 if (hi->addr_mapped[0])
185 {
186 iounmap ((void *) (hi->addr_mapped[0]));
187 release_mem_region ((long) hi->addr[0], hi->len[0]);
188 hi->addr_mapped[0] = 0;
189 }
190 if (hi->addr_mapped[1])
191 {
192 iounmap ((void *) (hi->addr_mapped[1]));
193 release_mem_region ((long) hi->addr[1], hi->len[1]);
194 hi->addr_mapped[1] = 0;
195 }
196 }
197}
198
199
200void
201cleanup_devs (void)
202{
203 hdw_info_t *hi;
204 int i;
205
206 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
207 {
208 if (hi->pci_slot == 0xff || !hi->ndev)
209 break;
210 c4_stopwd(netdev_priv(hi->ndev));
211#ifdef CONFIG_PROC_FS
212 sbecom_proc_brd_cleanup(netdev_priv(hi->ndev));
213#endif
214 unregister_netdev (hi->ndev);
215 free_irq (hi->pdev[0]->irq, hi->ndev);
216#ifdef CONFIG_SBE_PMCC4_NCOMM
217 free_irq (hi->pdev[1]->irq, hi->ndev);
218#endif
219 OS_kfree (hi->ndev);
220 }
221}
222
223
224STATIC int __init
225c4_hdw_init (struct pci_dev * pdev, int found)
226{
227 hdw_info_t *hi;
228 int i;
229 int fun, slot;
230 unsigned char busno = 0xff;
231
232 /* our MUSYCC chip supports two functions, 0 & 1 */
233 if ((fun = PCI_FUNC (pdev->devfn)) > 1)
234 {
235 pr_warning("unexpected devfun: 0x%x\n", pdev->devfn);
236 return 0;
237 }
238 if (pdev->bus) /* obtain bus number */
239 busno = pdev->bus->number;
240 else
241 busno = 0; /* default for system PCI inconsistency */
242 slot = pdev->devfn & ~0x07;
243
244 /*
245 * Functions 0 & 1 for a given board (identified by same bus(busno) and
246 * slot(slot)) are placed into the same 'hardware' structure. The first
247 * part of the board's functionality will be placed into an unpopulated
248 * element, identified by "slot==(0xff)". The second part of a board's
249 * functionality will match the previously loaded slot/busno.
250 */
251 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
252 {
253 /*
254 * match with board's first found interface, otherwise this is first
255 * found
256 */
257 if ((hi->pci_slot == 0xff) || /* new board */
258 ((hi->pci_slot == slot) && (hi->bus == pdev->bus)))
259 break; /* found for-loop exit */
260 }
261 if (i == MAX_BOARDS) /* no match in above loop means MAX
262 * exceeded */
263 {
264 pr_warning("exceeded number of allowed devices (>%d)?\n", MAX_BOARDS);
265 return 0;
266 }
267 if (pdev->bus)
268 hi->pci_busno = pdev->bus->number;
269 else
270 hi->pci_busno = 0; /* default for system PCI inconsistency */
271 hi->pci_slot = slot;
272 pci_read_config_byte (pdev, PCI_INTERRUPT_PIN, &hi->pci_pin[fun]);
273 pci_read_config_byte (pdev, PCI_REVISION_ID, &hi->revid[fun]);
274 hi->bus = pdev->bus;
275 hi->addr[fun] = pci_resource_start (pdev, 0);
276 hi->len[fun] = pci_resource_end (pdev, 0) - hi->addr[fun] + 1;
277 hi->pdev[fun] = pdev;
278
279 {
280 /*
281 * create device name from module name, plus add the appropriate
282 * board number
283 */
284 char *cp = hi->devname;
285
286 strcpy (cp, KBUILD_MODNAME);
287 cp += strlen (cp); /* reposition */
288 *cp++ = '-';
289 *cp++ = '0' + (found / 2); /* there are two found interfaces per
290 * board */
291 *cp = 0; /* termination */
292 }
293
294 return 1;
295}
296
297
298status_t __init
299c4hw_attach_all (void)
300{
301 hdw_info_t *hi;
302 struct pci_dev *pdev = NULL;
303 int found = 0, i, j;
304
305 error_flag = 0;
306 prep_hdw_info ();
307 /*** scan PCI bus for all possible boards */
308#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
309 while ((pdev = pci_get_device (PCI_VENDOR_ID_CONEXANT,
310 PCI_DEVICE_ID_CN8474,
311 pdev)))
312#else
313 while ((pdev = pci_find_device (PCI_VENDOR_ID_CONEXANT,
314 PCI_DEVICE_ID_CN8474,
315 pdev)))
316#endif
317 {
318 if (c4_hdw_init (pdev, found))
319 found++;
320 }
321 if (!found)
322 {
323 pr_warning("No boards found\n");
324 return ENODEV;
325 }
326 /* sanity check for consistant hardware found */
327 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
328 {
329 if (hi->pci_slot != 0xff && (!hi->addr[0] || !hi->addr[1]))
330 {
331 pr_warning("%s: something very wrong with pci_get_device\n",
332 hi->devname);
333 return EIO;
334 }
335 }
336 /* bring board's memory regions on/line */
337 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
338 {
339 if (hi->pci_slot == 0xff)
340 break;
341 for (j = 0; j < 2; j++)
342 {
343 if (request_mem_region (hi->addr[j], hi->len[j], hi->devname) == 0)
344 {
345 pr_warning("%s: memory in use, addr=0x%lx, len=0x%lx ?\n",
346 hi->devname, hi->addr[j], hi->len[j]);
347 cleanup_ioremap ();
348 return ENOMEM;
349 }
350 hi->addr_mapped[j] = (unsigned long) ioremap (hi->addr[j], hi->len[j]);
351 if (!hi->addr_mapped[j])
352 {
353 pr_warning("%s: ioremap fails, addr=0x%lx, len=0x%lx ?\n",
354 hi->devname, hi->addr[j], hi->len[j]);
355 cleanup_ioremap ();
356 return ENOMEM;
357 }
358#ifdef SBE_MAP_DEBUG
359 pr_warning("%s: io remapped from phys %x to virt %x\n",
360 hi->devname, (u_int32_t) hi->addr[j], (u_int32_t) hi->addr_mapped[j]);
361#endif
362 }
363 }
364
365 drvr_state = SBE_DRVR_AVAILABLE;
366
367 /* Have now memory mapped all boards. Now allow board's access to system */
368 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
369 {
370 if (hi->pci_slot == 0xff)
371 break;
372 if (pci_enable_device (hi->pdev[0]) ||
373 pci_enable_device (hi->pdev[1]))
374 {
375 drvr_state = SBE_DRVR_DOWN;
376 pr_warning("%s: failed to enable card %d slot %d\n",
377 hi->devname, i, hi->pci_slot);
378 cleanup_devs ();
379 cleanup_ioremap ();
380 return EIO;
381 }
382 pci_set_master (hi->pdev[0]);
383 pci_set_master (hi->pdev[1]);
384 if (!(hi->ndev = c4_add_dev (hi, i, (long) hi->addr_mapped[0],
385 (long) hi->addr_mapped[1],
386 hi->pdev[0]->irq,
387 hi->pdev[1]->irq)))
388 {
389 drvr_state = SBE_DRVR_DOWN;
390 cleanup_ioremap ();
391 /* NOTE: c4_add_dev() does its own device cleanup */
392#if 0
393 cleanup_devs ();
394#endif
395 return error_flag; /* error_flag set w/in add_dev() */
396 }
397 show_two (hi, i); /* displays found information */
398 }
399 return 0;
400}
401
402/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/libsbew.h b/drivers/staging/cxt1e1/libsbew.h
new file mode 100644
index 000000000000..5c99646cd103
--- /dev/null
+++ b/drivers/staging/cxt1e1/libsbew.h
@@ -0,0 +1,581 @@
1/*
2 * $Id: libsbew.h,v 2.1 2005/10/27 18:54:19 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_LIBSBEW_H_
6#define _INC_LIBSBEW_H_
7
8/*-----------------------------------------------------------------------------
9 * libsbew.h - common library elements, charge across mulitple boards
10 *
11 * This file contains common Ioctl structures and contents definitions.
12 *
13 * Copyright (C) 2004-2005 SBE, Inc.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * For further information, contact via email: support@sbei.com
26 * SBE, Inc. San Ramon, California U.S.A.
27 *-----------------------------------------------------------------------------
28 * RCS info:
29 * RCS revision: $Revision: 2.1 $
30 * Last changed on $Date: 2005/10/27 18:54:19 $
31 * Changed by $Author: rickd $
32 *-----------------------------------------------------------------------------
33 * $Log: libsbew.h,v $
34 * Revision 2.1 2005/10/27 18:54:19 rickd
35 * Add E1PLAIN support.
36 *
37 * Revision 2.0 2005/09/28 00:10:08 rickd
38 * Customized for PMCC4 comet-per-port design.
39 *
40 * Revision 1.15 2005/03/29 00:51:31 rickd
41 * File imported from C1T3 port, Revision 1.15
42 *-----------------------------------------------------------------------------
43 */
44
45#ifndef __KERNEL__
46#include <sys/types.h>
47#endif
48
49#ifdef __cplusplus
50extern "C"
51{
52#endif
53
54/********************************/
55/** set driver logging level **/
56/********************************/
57
58/* routine/ioctl: wancfg_set_loglevel() - SBE_IOC_SET_LOGLEVEL */
59
60#define LOG_NONE 0
61#define LOG_ERROR 1
62#define LOG_SBEBUG3 3 /* hidden, for development/debug usage */
63#define LOG_LSCHANGE 5 /* line state change logging */
64#define LOG_LSIMMEDIATE 6 /* line state change logging w/o hysterisis */
65#define LOG_WARN 8
66#define LOG_MONITOR 10
67#define LOG_SBEBUG12 12 /* hidden, for development/debug usage */
68#define LOG_MONITOR2 14 /* hidden, for development/debug usage */
69#define LOG_DEBUG 16
70
71 /* TEMPORARY DEFINES *//* RLD DEBUG */
72#define c4_LOG_NONE LOG_NONE
73#define c4_LOG_ERROR LOG_ERROR
74#define c4_LOG_WARN LOG_WARN
75#define c4_LOG_sTrace LOG_MONITOR /* do some trace logging into
76 * functions */
77#define c4_LOG_DEBUG LOG_DEBUG
78#define c4_LOG_MAX LOG_DEBUG
79
80
81
82/******************************/
83/** get driver information **/
84/******************************/
85
86/* routine/ioctl: wancfg_get_drvinfo() - SBE_IOC_GET_DRVINFO */
87
88#define REL_STRLEN 80
89 struct sbe_drv_info
90 {
91 int rel_strlen;
92 char release[REL_STRLEN];
93 };
94
95
96/*****************************/
97/** get board information **/
98/*****************************/
99
100/* routine/ioctl: wancfg_get_brdinfo() - SBE_IOC_GET_BRDINFO */
101
102#define CHNM_STRLEN 16
103 struct sbe_brd_info
104 {
105 u_int32_t brd_id; /* SBE's unique PCI VENDOR/DEVID */
106 u_int32_t brd_sn;
107 int brd_chan_cnt; /* number of channels being used */
108 int brd_port_cnt; /* number of ports being used */
109 unsigned char brdno; /* our board number */
110 unsigned char brd_pci_speed; /* PCI speed, 33/66Mhz */
111 u_int8_t brd_mac_addr[6];
112 char first_iname[CHNM_STRLEN]; /* first assigned channel's
113 * interface name */
114 char last_iname[CHNM_STRLEN]; /* last assigned channel's
115 * interface name */
116 u_int8_t brd_hdw_id; /* on/board unique hdw ID */
117 u_int8_t reserved8[3]; /* alignment preservation */
118 u_int32_t reserved32[3]; /* size preservation */
119 };
120
121/* These IDs are sometimes available thru pci_ids.h, but not currently. */
122
123#define PCI_VENDOR_ID_SBE 0x1176
124#define PCI_DEVICE_ID_WANPMC_C4T1E1 0x0701 /* BID 0x0X, BTYP 0x0X */
125#define PCI_DEVICE_ID_WANPTMC_C4T1E1 0x0702 /* BID 0x41 */
126#define PCI_DEVICE_ID_WANADAPT_HC4T1E1 0x0703 /* BID 0x44 */
127#define PCI_DEVICE_ID_WANPTMC_256T3_T1 0x0704 /* BID 0x42 (T1 Version) */
128#define PCI_DEVICE_ID_WANPCI_C4T1E1 0x0705 /* BID 0x1X, BTYP 0x0X */
129#define PCI_DEVICE_ID_WANPMC_C1T3 0x0706 /* BID 0x45 */
130#define PCI_DEVICE_ID_WANPCI_C2T1E1 0x0707 /* BID 0x1X, BTYP 0x2X */
131#define PCI_DEVICE_ID_WANPCI_C1T1E1 0x0708 /* BID 0x1X, BTYP 0x1X */
132#define PCI_DEVICE_ID_WANPMC_C2T1E1 0x0709 /* BID 0x0X, BTYP 0x2X */
133#define PCI_DEVICE_ID_WANPMC_C1T1E1 0x070A /* BID 0x0X, BTYP 0x1X */
134#define PCI_DEVICE_ID_WANPTMC_256T3_E1 0x070B /* BID 0x46 (E1 Version) */
135#define PCI_DEVICE_ID_WANPTMC_C24TE1 0x070C /* BID 0x47 */
136#define PCI_DEVICE_ID_WANPMC_C4T1E1_L 0x070D /* BID 0x2X, BTYPE 0x0X w/FP
137 * LEDs */
138#define PCI_DEVICE_ID_WANPMC_C2T1E1_L 0x070E /* BID 0x2X, BTYPE 0x2X w/FP
139 * LEDs */
140#define PCI_DEVICE_ID_WANPMC_C1T1E1_L 0x070F /* BID 0x2X, BTYPE 0x1X w/FP
141 * LEDs */
142#define PCI_DEVICE_ID_WANPMC_2SSI 0x0801
143#define PCI_DEVICE_ID_WANPCI_4SSI 0x0802
144#define PCI_DEVICE_ID_WANPMC_2T3E3 0x0900 /* BID 0x43 */
145#define SBE_BOARD_ID(v,id) ((v<<16) | id)
146
147#define BINFO_PCI_SPEED_unk 0
148#define BINFO_PCI_SPEED_33 1
149#define BINFO_PCI_SPEED_66 2
150
151/***************************/
152/** obtain interface ID **/
153/***************************/
154
155/* routine/ioctl: wancfg_get_iid() - SBE_IOC_IID_GET */
156
157 struct sbe_iid_info
158 {
159 u_int32_t channum; /* channel requested */
160 char iname[CHNM_STRLEN]; /* channel's interface name */
161 };
162
163/**************************************/
164/** get board address information **/
165/**************************************/
166
167/* routine/ioctl: wancfg_get_brdaddr() - SBE_IOC_BRDADDR_GET */
168
169 struct sbe_brd_addr
170 {
171 unsigned char func; /* select PCI address space function */
172 unsigned char brdno; /* returns brdno requested */
173 unsigned char irq;
174 unsigned char size; /* returns size of address */
175#define BRDADDR_SIZE_64 1
176#define BRDADDR_SIZE_32 2
177 int reserved1; /* mod64 align, reserved for future use */
178
179 union
180 {
181 unsigned long virt64; /* virtual/mapped address */
182 u_int32_t virt32[2];
183 } v;
184 union
185 {
186 unsigned long phys64; /* physical bus address */
187 u_int32_t phys32[2];
188 } p;
189 int reserved2[4]; /* reserved for future use */
190 };
191
192/**********************************/
193/** read/write board registers **/
194/**********************************/
195
196/* routine/ioctl: wancfg_read_vec() - SBE_IOC_READ_VEC */
197/* routine/ioctl: wancfg_write_vec() - SBE_IOC_WRITE_VEC */
198
199 struct sbecom_wrt_vec
200 {
201 u_int32_t reg;
202 u_int32_t data;
203 };
204
205#define C1T3_CHIP_MSCC_32 0x01000000
206#define C1T3_CHIP_TECT3_8 0x02000000
207#define C1T3_CHIP_CPLD_8 0x03000000
208#define C1T3_CHIP_EEPROM_8 0x04000000
209
210#define W256T3_CHIP_MUSYCC_32 0x02000000
211#define W256T3_CHIP_TEMUX_8 0x10000000
212#define W256T3_CHIP_T8110_8 0x20000000
213#define W256T3_CHIP_T8110_32 0x22000000
214#define W256T3_CHIP_CPLD_8 0x30000000
215#define W256T3_CHIP_EEPROM_8 0x40000000
216
217
218/**********************************/
219/** read write port parameters **/
220/**********************************/
221
222/* routine/ioctl: wancfg_getset_port_param() - SBE_IOC_PORT_GET */
223/* routine/ioctl: wancfg_set_port_param() - SBE_IOC_PORT_SET */
224
225/* NOTE: this structure supports hardware which supports individual per/port control */
226
227struct sbecom_port_param
228{
229 u_int8_t portnum;
230 u_int8_t port_mode; /* variations of T1 or E1 mode */
231 u_int8_t portStatus;
232 u_int8_t portP; /* more port parameters (clock source - 0x80;
233 * and LBO - 0xf; */
234 /* bits 0x70 are reserved for future use ) */
235#ifdef SBE_PMCC4_ENABLE
236 u_int32_t hypersize; /* RLD DEBUG - add this in until I learn how to make this entry obsolete */
237#endif
238 int reserved[3-1]; /* reserved for future use */
239 int _res[4];
240};
241
242#define CFG_CLK_PORT_MASK 0x80 /* Loop timing */
243#define CFG_CLK_PORT_INTERNAL 0x80 /* Loop timing */
244#define CFG_CLK_PORT_EXTERNAL 0x00 /* Loop timing */
245
246#define CFG_LBO_MASK 0x0F
247#define CFG_LBO_unk 0 /* <not defined> */
248#define CFG_LBO_LH0 1 /* T1 Long Haul (default) */
249#define CFG_LBO_LH7_5 2 /* T1 Long Haul */
250#define CFG_LBO_LH15 3 /* T1 Long Haul */
251#define CFG_LBO_LH22_5 4 /* T1 Long Haul */
252#define CFG_LBO_SH110 5 /* T1 Short Haul */
253#define CFG_LBO_SH220 6 /* T1 Short Haul */
254#define CFG_LBO_SH330 7 /* T1 Short Haul */
255#define CFG_LBO_SH440 8 /* T1 Short Haul */
256#define CFG_LBO_SH550 9 /* T1 Short Haul */
257#define CFG_LBO_SH660 10 /* T1 Short Haul */
258#define CFG_LBO_E75 11 /* E1 75 Ohm */
259#define CFG_LBO_E120 12 /* E1 120 Ohm (default) */
260
261
262/*************************************/
263/** read write channel parameters **/
264/*************************************/
265
266/* routine/ioctl: wancfg_getset_chan_param() - SBE_IOC_CHAN_GET */
267/* routine/ioctl: wancfg_set_chan_param() - SBE_IOC_CHAN_SET */
268
269/* NOTE: this structure supports hardware which supports individual per/channel control */
270
271 struct sbecom_chan_param
272 {
273 u_int32_t channum; /* 0: */
274#ifdef SBE_PMCC4_ENABLE
275 u_int32_t card; /* RLD DEBUG - add this in until I learn how to make this entry obsolete */
276 u_int32_t port; /* RLD DEBUG - add this in until I learn how to make this entry obsolete */
277 u_int8_t bitmask[32];
278#endif
279 u_int32_t intr_mask; /* 4: interrupt mask, specify ored
280 * (SS7_)INTR_* to disable */
281 u_int8_t status; /* 8: channel transceiver status (TX_ENABLED,
282 * RX_ENABLED) */
283 u_int8_t chan_mode; /* 9: protocol mode */
284 u_int8_t idlecode; /* A: idle code, in (FLAG_7E, FLAG_FF,
285 * FLAG_00) */
286 u_int8_t pad_fill_count; /* B: pad fill count (1-127), 0 - pad
287 * fill disabled */
288 u_int8_t data_inv; /* C: channel data inversion selection */
289 u_int8_t mode_56k; /* D: 56kbps mode */
290 u_int8_t reserved[2 + 8]; /* E: */
291 };
292
293/* SS7 interrupt signals <intr_mask> */
294#define SS7_INTR_SFILT 0x00000020
295#define SS7_INTR_SDEC 0x00000040
296#define SS7_INTR_SINC 0x00000080
297#define SS7_INTR_SUERR 0x00000100
298/* Other interrupts that can be masked */
299#define INTR_BUFF 0x00000002
300#define INTR_EOM 0x00000004
301#define INTR_MSG 0x00000008
302#define INTR_IDLE 0x00000010
303
304/* transceiver status flags <status> */
305#define TX_ENABLED 0x01
306#define RX_ENABLED 0x02
307
308/* Protocol modes <mode> */
309#define CFG_CH_PROTO_TRANS 0
310#define CFG_CH_PROTO_SS7 1
311#define CFG_CH_PROTO_HDLC_FCS16 2
312#define CFG_CH_PROTO_HDLC_FCS32 3
313#define CFG_CH_PROTO_ISLP_MODE 4
314
315/* Possible idle code assignments <idlecode> */
316#define CFG_CH_FLAG_7E 0
317#define CFG_CH_FLAG_FF 1
318#define CFG_CH_FLAG_00 2
319
320/* data inversion selection <data_inv> */
321#define CFG_CH_DINV_NONE 0x00
322#define CFG_CH_DINV_RX 0x01
323#define CFG_CH_DINV_TX 0x02
324
325
326/* Posssible resettable chipsets/functions */
327#define RESET_DEV_TEMUX 1
328#define RESET_DEV_TECT3 RESET_DEV_TEMUX
329#define RESET_DEV_PLL 2
330
331
332/*********************************************/
333/** read reset channel thruput statistics **/
334/*********************************************/
335
336/* routine/ioctl: wancfg_get_chan_stats() - SBE_IOC_CHAN_GET_STAT */
337/* routine/ioctl: wancfg_del_chan_stats() - SBE_IOC_CHAN_DEL_STAT */
338/* routine/ioctl: wancfg_get_card_chan_stats() - SBE_IOC_CARD_CHAN_STAT */
339
340 struct sbecom_chan_stats
341 {
342 unsigned long rx_packets; /* total packets received */
343 unsigned long tx_packets; /* total packets transmitted */
344 unsigned long rx_bytes; /* total bytes received */
345 unsigned long tx_bytes; /* total bytes transmitted */
346 unsigned long rx_errors;/* bad packets received */
347 unsigned long tx_errors;/* packet transmit problems */
348 unsigned long rx_dropped; /* no space in linux buffers */
349 unsigned long tx_dropped; /* no space available in linux */
350
351 /* detailed rx_errors: */
352 unsigned long rx_length_errors;
353 unsigned long rx_over_errors; /* receiver ring buff overflow */
354 unsigned long rx_crc_errors; /* recved pkt with crc error */
355 unsigned long rx_frame_errors; /* recv'd frame alignment error */
356 unsigned long rx_fifo_errors; /* recv'r fifo overrun */
357 unsigned long rx_missed_errors; /* receiver missed packet */
358
359 /* detailed tx_errors */
360 unsigned long tx_aborted_errors;
361 unsigned long tx_fifo_errors;
362 unsigned long tx_pending;
363 };
364
365
366/****************************************/
367/** read write card level parameters **/
368/****************************************/
369
370 /* NOTE: this structure supports hardware which supports per/card control */
371
372 struct sbecom_card_param
373 {
374 u_int8_t framing_type; /* 0: CBP or M13 */
375 u_int8_t loopback; /* 1: one of LOOPBACK_* */
376 u_int8_t line_build_out; /* 2: boolean */
377 u_int8_t receive_eq; /* 3: boolean */
378 u_int8_t transmit_ones; /* 4: boolean */
379 u_int8_t clock; /* 5: 0 - internal, i>0 - external (recovered
380 * from framer i) */
381 u_int8_t h110enable; /* 6: */
382 u_int8_t disable_leds; /* 7: */
383 u_int8_t reserved1; /* 8: available - old 256t3 hypersized, but
384 * never used */
385 u_int8_t rear_io; /* 9: rear I/O off/on */
386 u_int8_t disable_tx; /* A: disable TX off/on */
387 u_int8_t mute_los; /* B: mute LOS off/on */
388 u_int8_t los_threshold; /* C: LOS threshold norm/low
389 * (default: norm) */
390 u_int8_t ds1_mode; /* D: DS1 mode T1/E1 (default: T1) */
391 u_int8_t ds3_unchan; /* E: DS3 unchannelized mode off/on */
392 u_int8_t reserved[1 + 16]; /* reserved for expansion - must be
393 * ZERO filled */
394 };
395
396/* framing types <framing_type> */
397#define FRAMING_M13 0
398#define FRAMING_CBP 1
399
400/* card level loopback options <loopback> */
401#define CFG_CARD_LOOPBACK_NONE 0x00
402#define CFG_CARD_LOOPBACK_DIAG 0x01
403#define CFG_CARD_LOOPBACK_LINE 0x02
404#define CFG_CARD_LOOPBACK_PAYLOAD 0x03
405
406/* line level loopback options <loopback> */
407#define CFG_LIU_LOOPBACK_NONE 0x00
408#define CFG_LIU_LOOPBACK_ANALOG 0x10
409#define CFG_LIU_LOOPBACK_DIGITAL 0x11
410#define CFG_LIU_LOOPBACK_REMOTE 0x12
411
412/* card level clock options <clock> */
413#define CFG_CLK_INTERNAL 0x00
414#define CFG_CLK_EXTERNAL 0x01
415
416/* legacy 256T3 loopback values */
417#define LOOPBACK_NONE 0
418#define LOOPBACK_LIU_ANALOG 1
419#define LOOPBACK_LIU_DIGITAL 2
420#define LOOPBACK_FRAMER_DS3 3
421#define LOOPBACK_FRAMER_T1 4
422#define LOOPBACK_LIU_REMOTE 5
423
424/* DS1 mode <ds1_mode> */
425#define CFG_DS1_MODE_MASK 0x0f
426#define CFG_DS1_MODE_T1 0x00
427#define CFG_DS1_MODE_E1 0x01
428#define CFG_DS1_MODE_CHANGE 0x80
429
430/* DS3 unchannelized values <ds1_unchan> */
431#define CFG_DS3_UNCHAN_MASK 0x01
432#define CFG_DS3_UNCHAN_OFF 0x00
433#define CFG_DS3_UNCHAN_ON 0x01
434
435
436/************************************/
437/** read write framer parameters **/
438/************************************/
439
440/* routine/ioctl: wancfg_get_framer() - SBE_IOC_FRAMER_GET */
441/* routine/ioctl: wancfg_set_framer() - SBE_IOC_FRAMER_SET */
442
443 struct sbecom_framer_param
444 {
445 u_int8_t framer_num;
446 u_int8_t frame_type; /* SF, ESF, E1PLAIN, E1CAS, E1CRC, E1CRC+CAS */
447 u_int8_t loopback_type; /* DIGITAL, LINE, PAYLOAD */
448 u_int8_t auto_alarms;/* auto alarms */
449 u_int8_t reserved[12]; /* reserved for expansion - must be
450 * ZERO filled */
451 };
452
453/* frame types <frame_type> */
454#define CFG_FRAME_NONE 0
455#define CFG_FRAME_SF 1 /* T1 B8ZS */
456#define CFG_FRAME_ESF 2 /* T1 B8ZS */
457#define CFG_FRAME_E1PLAIN 3 /* HDB3 w/o CAS,CRC */
458#define CFG_FRAME_E1CAS 4 /* HDB3 */
459#define CFG_FRAME_E1CRC 5 /* HDB3 */
460#define CFG_FRAME_E1CRC_CAS 6 /* HDB3 */
461#define CFG_FRAME_SF_AMI 7 /* T1 AMI */
462#define CFG_FRAME_ESF_AMI 8 /* T1 AMI */
463#define CFG_FRAME_E1PLAIN_AMI 9 /* E1 AMI w/o CAS,CRC */
464#define CFG_FRAME_E1CAS_AMI 10 /* E1 AMI */
465#define CFG_FRAME_E1CRC_AMI 11 /* E1 AMI */
466#define CFG_FRAME_E1CRC_CAS_AMI 12 /* E1 AMI */
467
468#define IS_FRAME_ANY_T1(field) \
469 (((field) == CFG_FRAME_NONE) || \
470 ((field) == CFG_FRAME_SF) || \
471 ((field) == CFG_FRAME_ESF) || \
472 ((field) == CFG_FRAME_SF_AMI) || \
473 ((field) == CFG_FRAME_ESF_AMI))
474
475#define IS_FRAME_ANY_T1ESF(field) \
476 (((field) == CFG_FRAME_ESF) || \
477 ((field) == CFG_FRAME_ESF_AMI))
478
479#define IS_FRAME_ANY_E1(field) \
480 (((field) == CFG_FRAME_E1PLAIN) || \
481 ((field) == CFG_FRAME_E1CAS) || \
482 ((field) == CFG_FRAME_E1CRC) || \
483 ((field) == CFG_FRAME_E1CRC_CAS) || \
484 ((field) == CFG_FRAME_E1PLAIN_AMI) || \
485 ((field) == CFG_FRAME_E1CAS_AMI) || \
486 ((field) == CFG_FRAME_E1CRC_AMI) || \
487 ((field) == CFG_FRAME_E1CRC_CAS_AMI))
488
489#define IS_FRAME_ANY_AMI(field) \
490 (((field) == CFG_FRAME_SF_AMI) || \
491 ((field) == CFG_FRAME_ESF_AMI) || \
492 ((field) == CFG_FRAME_E1PLAIN_AMI) || \
493 ((field) == CFG_FRAME_E1CAS_AMI) || \
494 ((field) == CFG_FRAME_E1CRC_AMI) || \
495 ((field) == CFG_FRAME_E1CRC_CAS_AMI))
496
497/* frame level loopback options <loopback_type> */
498#define CFG_FRMR_LOOPBACK_NONE 0
499#define CFG_FRMR_LOOPBACK_DIAG 1
500#define CFG_FRMR_LOOPBACK_LINE 2
501#define CFG_FRMR_LOOPBACK_PAYLOAD 3
502
503
504/****************************************/
505/** read reset card error statistics **/
506/****************************************/
507
508/* routine/ioctl: wancfg_get_card_stats() - SBE_IOC_CARD_GET_STAT */
509/* routine/ioctl: wancfg_del_card_stats() - SBE_IOC_CARD_DEL_STAT */
510
511 struct temux_card_stats
512 {
513 struct temux_stats
514 {
515 /* TEMUX DS3 PMON counters */
516 u_int32_t lcv;
517 u_int32_t err_framing;
518 u_int32_t febe;
519 u_int32_t err_cpbit;
520 u_int32_t err_parity;
521 /* TEMUX DS3 FRMR status */
522 u_int8_t los;
523 u_int8_t oof;
524 u_int8_t red;
525 u_int8_t yellow;
526 u_int8_t idle;
527 u_int8_t ais;
528 u_int8_t cbit;
529 /* TEMUX DS3 FEAC receiver */
530 u_int8_t feac;
531 u_int8_t feac_last;
532 } t;
533 u_int32_t tx_pending; /* total */
534 };
535
536/**************************************************************/
537
538 struct wancfg
539 {
540 int cs, ds;
541 char *p;
542 };
543 typedef struct wancfg wcfg_t;
544
545 extern wcfg_t *wancfg_init (char *, char *);
546 extern int wancfg_card_blink (wcfg_t *, int);
547 extern int wancfg_ctl (wcfg_t *, int, void *, int, void *, int);
548 extern int wancfg_del_card_stats (wcfg_t *);
549 extern int wancfg_del_chan_stats (wcfg_t *, int);
550 extern int wancfg_enable_ports (wcfg_t *, int);
551 extern int wancfg_free (wcfg_t *);
552 extern int wancfg_get_brdaddr (wcfg_t *, struct sbe_brd_addr *);
553 extern int wancfg_get_brdinfo (wcfg_t *, struct sbe_brd_info *);
554 extern int wancfg_get_card (wcfg_t *, struct sbecom_card_param *);
555 extern int wancfg_get_card_chan_stats (wcfg_t *, struct sbecom_chan_stats *);
556 extern int wancfg_get_card_sn (wcfg_t *);
557 extern int wancfg_get_card_stats (wcfg_t *, struct temux_card_stats *);
558 extern int wancfg_get_chan (wcfg_t *, int, struct sbecom_chan_param *);
559 extern int wancfg_get_chan_stats (wcfg_t *, int, struct sbecom_chan_stats *);
560 extern int wancfg_get_drvinfo (wcfg_t *, int, struct sbe_drv_info *);
561 extern int wancfg_get_framer (wcfg_t *, int, struct sbecom_framer_param *);
562 extern int wancfg_get_iid (wcfg_t *, int, struct sbe_iid_info *);
563 extern int wancfg_get_sn (wcfg_t *, unsigned int *);
564 extern int wancfg_read (wcfg_t *, int, struct sbecom_wrt_vec *);
565 extern int wancfg_reset_device (wcfg_t *, int);
566 extern int wancfg_set_card (wcfg_t *, struct sbecom_card_param *);
567 extern int wancfg_set_chan (wcfg_t *, int, struct sbecom_chan_param *);
568 extern int wancfg_set_framer (wcfg_t *, int, struct sbecom_framer_param *);
569 extern int wancfg_set_loglevel (wcfg_t *, uint);
570 extern int wancfg_write (wcfg_t *, int, struct sbecom_wrt_vec *);
571
572#ifdef NOT_YET_COMMON
573 extern int wancfg_get_tsioc (wcfg_t *, struct wanc1t3_ts_hdr *, struct wanc1t3_ts_param *);
574 extern int wancfg_set_tsioc (wcfg_t *, struct wanc1t3_ts_param *);
575#endif
576
577#ifdef __cplusplus
578}
579#endif
580
581#endif /*** _INC_LIBSBEW_H_ ***/
diff --git a/drivers/staging/cxt1e1/linux.c b/drivers/staging/cxt1e1/linux.c
new file mode 100644
index 000000000000..134e7568024b
--- /dev/null
+++ b/drivers/staging/cxt1e1/linux.c
@@ -0,0 +1,1356 @@
1/* Copyright (C) 2007-2008 One Stop Systems
2 * Copyright (C) 2003-2006 SBE, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/types.h>
18#include <linux/netdevice.h>
19#include <linux/hdlc.h>
20#include <linux/if_arp.h>
21#include <linux/init.h>
22#include <asm/uaccess.h>
23#include <linux/rtnetlink.h>
24#include <linux/skbuff.h>
25#include "pmcc4_sysdep.h"
26#include "sbecom_inline_linux.h"
27#include "libsbew.h"
28#include "pmcc4.h"
29#include "pmcc4_ioctls.h"
30#include "pmcc4_private.h"
31#include "sbeproc.h"
32
33/*****************************************************************************************
34 * Error out early if we have compiler trouble.
35 *
36 * (This section is included from the kernel's init/main.c as a friendly
37 * spiderman recommendation...)
38 *
39 * Versions of gcc older than that listed below may actually compile and link
40 * okay, but the end product can have subtle run time bugs. To avoid associated
41 * bogus bug reports, we flatly refuse to compile with a gcc that is known to be
42 * too old from the very beginning.
43 */
44#if (__GNUC__ < 3) || (__GNUC__ == 3 && __GNUC_MINOR__ < 2)
45#error Sorry, your GCC is too old. It builds incorrect kernels.
46#endif
47
48#if __GNUC__ == 4 && __GNUC_MINOR__ == 1 && __GNUC_PATCHLEVEL__ == 0
49#warning gcc-4.1.0 is known to miscompile the kernel. A different compiler version is recommended.
50#endif
51
52/*****************************************************************************************/
53
54#ifdef SBE_INCLUDE_SYMBOLS
55#define STATIC
56#else
57#define STATIC static
58#endif
59
60#define CHANNAME "hdlc"
61
62/*******************************************************************/
63/* forward references */
64status_t c4_chan_work_init (mpi_t *, mch_t *);
65void musycc_wq_chan_restart (void *);
66status_t __init c4_init (ci_t *, u_char *, u_char *);
67status_t __init c4_init2 (ci_t *);
68ci_t *__init c4_new (void *);
69int __init c4hw_attach_all (void);
70void __init hdw_sn_get (hdw_info_t *, int);
71
72#ifdef CONFIG_SBE_PMCC4_NCOMM
73irqreturn_t c4_ebus_intr_th_handler (void *);
74
75#endif
76int c4_frame_rw (ci_t *, struct sbecom_port_param *);
77status_t c4_get_port (ci_t *, int);
78int c4_loop_port (ci_t *, int, u_int8_t);
79int c4_musycc_rw (ci_t *, struct c4_musycc_param *);
80int c4_new_chan (ci_t *, int, int, void *);
81status_t c4_set_port (ci_t *, int);
82int c4_pld_rw (ci_t *, struct sbecom_port_param *);
83void cleanup_devs (void);
84void cleanup_ioremap (void);
85status_t musycc_chan_down (ci_t *, int);
86irqreturn_t musycc_intr_th_handler (void *);
87int musycc_start_xmit (ci_t *, int, void *);
88
89extern char pmcc4_OSSI_release[];
90extern ci_t *CI;
91extern struct s_hdw_info hdw_info[];
92
93#if defined(CONFIG_SBE_HDLC_V7) || defined(CONFIG_SBE_WAN256T3_HDLC_V7) || \
94 defined(CONFIG_SBE_HDLC_V7_MODULE) || defined(CONFIG_SBE_WAN256T3_HDLC_V7_MODULE)
95#define _v7_hdlc_ 1
96#else
97#define _v7_hdlc_ 0
98#endif
99
100#if _v7_hdlc_
101#define V7(x) (x ## _v7)
102extern int hdlc_netif_rx_v7 (hdlc_device *, struct sk_buff *);
103extern int register_hdlc_device_v7 (hdlc_device *);
104extern int unregister_hdlc_device_v7 (hdlc_device *);
105
106#else
107#define V7(x) x
108#endif
109
110int error_flag; /* module load error reporting */
111int log_level = LOG_ERROR;
112int log_level_default = LOG_ERROR;
113module_param(log_level, int, 0444);
114
115int max_mru = MUSYCC_MRU;
116int max_mru_default = MUSYCC_MRU;
117module_param(max_mru, int, 0444);
118
119int max_mtu = MUSYCC_MTU;
120int max_mtu_default = MUSYCC_MTU;
121module_param(max_mtu, int, 0444);
122
123int max_txdesc_used = MUSYCC_TXDESC_MIN;
124int max_txdesc_default = MUSYCC_TXDESC_MIN;
125module_param(max_txdesc_used, int, 0444);
126
127int max_rxdesc_used = MUSYCC_RXDESC_MIN;
128int max_rxdesc_default = MUSYCC_RXDESC_MIN;
129module_param(max_rxdesc_used, int, 0444);
130
131/****************************************************************************/
132/****************************************************************************/
133/****************************************************************************/
134
135void *
136getuserbychan (int channum)
137{
138 mch_t *ch;
139
140 ch = c4_find_chan (channum);
141 return ch ? ch->user : 0;
142}
143
144
145#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
146#define DEV_TO_PRIV(dev) ( * (struct c4_priv **) ((hdlc_device*)(dev)+1))
147#else
148
149char *
150get_hdlc_name (hdlc_device * hdlc)
151{
152 struct c4_priv *priv = hdlc->priv;
153 struct net_device *dev = getuserbychan (priv->channum);
154
155 return dev->name;
156}
157#endif
158
159
160static status_t
161mkret (int bsd)
162{
163 if (bsd > 0)
164 return -bsd;
165 else
166 return bsd;
167}
168
169/***************************************************************************/
170#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
171#include <linux/workqueue.h>
172
173/***
174 * One workqueue (wq) per port (since musycc allows simultaneous group
175 * commands), with individual data for each channel:
176 *
177 * mpi_t -> struct workqueue_struct *wq_port; (dynamically allocated using
178 * create_workqueue())
179 *
180 * With work structure (work) statically allocated for each channel:
181 *
182 * mch_t -> struct work_struct ch_work; (statically allocated using ???)
183 *
184 ***/
185
186
187/*
188 * Called by the start transmit routine when a channel TX_ENABLE is to be
189 * issued. This queues the transmission start request among other channels
190 * within a port's group.
191 */
192void
193c4_wk_chan_restart (mch_t * ch)
194{
195 mpi_t *pi = ch->up;
196
197#ifdef RLD_RESTART_DEBUG
198 pr_info(">> %s: queueing Port %d Chan %d, mch_t @ %p\n",
199 __func__, pi->portnum, ch->channum, ch);
200#endif
201
202 /* create new entry w/in workqueue for this channel and let'er rip */
203
204 /** queue_work (struct workqueue_struct *queue,
205 ** struct work_struct *work);
206 **/
207 queue_work (pi->wq_port, &ch->ch_work);
208}
209
210status_t
211c4_wk_chan_init (mpi_t * pi, mch_t * ch)
212{
213 /*
214 * this will be used to restart a stopped channel
215 */
216
217 /** INIT_WORK (struct work_struct *work,
218 ** void (*function)(void *),
219 ** void *data);
220 **/
221 INIT_WORK(&ch->ch_work, (void *)musycc_wq_chan_restart);
222 return 0; /* success */
223}
224
225status_t
226c4_wq_port_init (mpi_t * pi)
227{
228
229 char name[16], *np; /* NOTE: name of the queue limited by system
230 * to 10 characters */
231
232 if (pi->wq_port)
233 return 0; /* already initialized */
234
235 np = name;
236 memset (name, 0, 16);
237 sprintf (np, "%s%d", pi->up->devname, pi->portnum); /* IE pmcc4-01) */
238
239#ifdef RLD_RESTART_DEBUG
240 pr_info(">> %s: creating workqueue <%s> for Port %d.\n",
241 __func__, name, pi->portnum); /* RLD DEBUG */
242#endif
243 if (!(pi->wq_port = create_singlethread_workqueue (name)))
244 return ENOMEM;
245 return 0; /* success */
246}
247
248void
249c4_wq_port_cleanup (mpi_t * pi)
250{
251 /*
252 * PORT POINT: cannot call this if WQ is statically allocated w/in
253 * structure since it calls kfree(wq);
254 */
255 if (pi->wq_port)
256 {
257 destroy_workqueue (pi->wq_port); /* this also calls
258 * flush_workqueue() */
259 pi->wq_port = 0;
260 }
261}
262#endif
263
264/***************************************************************************/
265
266irqreturn_t
267c4_linux_interrupt (int irq, void *dev_instance)
268{
269 struct net_device *ndev = dev_instance;
270
271 return musycc_intr_th_handler(netdev_priv(ndev));
272}
273
274
275#ifdef CONFIG_SBE_PMCC4_NCOMM
276irqreturn_t
277c4_ebus_interrupt (int irq, void *dev_instance)
278{
279 struct net_device *ndev = dev_instance;
280
281 return c4_ebus_intr_th_handler(netdev_priv(ndev));
282}
283#endif
284
285
286static int
287void_open (struct net_device * ndev)
288{
289 pr_info("%s: trying to open master device !\n", ndev->name);
290 return -1;
291}
292
293
294#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
295#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4)
296
297/** Linux 2.4.18-19 **/
298STATIC int
299chan_open (hdlc_device * hdlc)
300{
301 status_t ret;
302
303 if ((ret = c4_chan_up (DEV_TO_PRIV (hdlc)->ci, DEV_TO_PRIV (hdlc)->channum)))
304 return -ret;
305 MOD_INC_USE_COUNT;
306 netif_start_queue (hdlc_to_dev (hdlc));
307 return 0; /* no error = success */
308}
309
310#else
311
312/** Linux 2.4.20 and higher **/
313STATIC int
314chan_open (struct net_device * ndev)
315{
316 hdlc_device *hdlc = dev_to_hdlc (ndev);
317 status_t ret;
318
319 hdlc->proto = IF_PROTO_HDLC;
320 if ((ret = hdlc_open (hdlc)))
321 {
322 pr_info("hdlc_open failure, err %d.\n", ret);
323 return ret;
324 }
325 if ((ret = c4_chan_up (DEV_TO_PRIV (hdlc)->ci, DEV_TO_PRIV (hdlc)->channum)))
326 return -ret;
327 MOD_INC_USE_COUNT;
328 netif_start_queue (hdlc_to_dev (hdlc));
329 return 0; /* no error = success */
330}
331#endif
332
333#else
334
335/** Linux 2.6 **/
336STATIC int
337chan_open (struct net_device * ndev)
338{
339 hdlc_device *hdlc = dev_to_hdlc (ndev);
340 const struct c4_priv *priv = hdlc->priv;
341 int ret;
342
343 if ((ret = hdlc_open (ndev)))
344 {
345 pr_info("hdlc_open failure, err %d.\n", ret);
346 return ret;
347 }
348 if ((ret = c4_chan_up (priv->ci, priv->channum)))
349 return -ret;
350 try_module_get (THIS_MODULE);
351 netif_start_queue (ndev);
352 return 0; /* no error = success */
353}
354#endif
355
356
357#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
358#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4)
359
360/** Linux 2.4.18-19 **/
361STATIC void
362chan_close (hdlc_device * hdlc)
363{
364 netif_stop_queue (hdlc_to_dev (hdlc));
365 musycc_chan_down ((ci_t *) 0, DEV_TO_PRIV (hdlc)->channum);
366 MOD_DEC_USE_COUNT;
367}
368#else
369
370/** Linux 2.4.20 and higher **/
371STATIC int
372chan_close (struct net_device * ndev)
373{
374 hdlc_device *hdlc = dev_to_hdlc (ndev);
375
376 netif_stop_queue (hdlc_to_dev (hdlc));
377 musycc_chan_down ((ci_t *) 0, DEV_TO_PRIV (hdlc)->channum);
378 hdlc_close (hdlc);
379 MOD_DEC_USE_COUNT;
380 return 0;
381}
382#endif
383
384#else
385
386/** Linux 2.6 **/
387STATIC int
388chan_close (struct net_device * ndev)
389{
390 hdlc_device *hdlc = dev_to_hdlc (ndev);
391 const struct c4_priv *priv = hdlc->priv;
392
393 netif_stop_queue (ndev);
394 musycc_chan_down ((ci_t *) 0, priv->channum);
395 hdlc_close (ndev);
396 module_put (THIS_MODULE);
397 return 0;
398}
399#endif
400
401
402#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4)
403
404/** Linux 2.4.18-19 **/
405STATIC int
406chan_ioctl (hdlc_device * hdlc, struct ifreq * ifr, int cmd)
407{
408 if (cmd == HDLCSCLOCK)
409 {
410 ifr->ifr_ifru.ifru_ivalue = LINE_DEFAULT;
411 return 0;
412 }
413 return -EINVAL;
414}
415#endif
416
417
418#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4)
419STATIC int
420chan_dev_ioctl (struct net_device * hdlc, struct ifreq * ifr, int cmd)
421{
422 if (cmd == HDLCSCLOCK)
423 {
424 ifr->ifr_ifru.ifru_ivalue = LINE_DEFAULT;
425 return 0;
426 }
427 return -EINVAL;
428}
429#else
430STATIC int
431chan_dev_ioctl (struct net_device * dev, struct ifreq * ifr, int cmd)
432{
433 return hdlc_ioctl (dev, ifr, cmd);
434}
435
436
437STATIC int
438#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
439chan_attach_noop (hdlc_device * hdlc, unsigned short foo_1, unsigned short foo_2)
440#else
441chan_attach_noop (struct net_device * ndev, unsigned short foo_1, unsigned short foo_2)
442#endif
443{
444 return 0; /* our driver has nothing to do here, show's
445 * over, go home */
446}
447#endif
448
449
450STATIC struct net_device_stats *
451chan_get_stats (struct net_device * ndev)
452{
453 mch_t *ch;
454 struct net_device_stats *nstats;
455 struct sbecom_chan_stats *stats;
456 int channum;
457
458#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
459 channum = DEV_TO_PRIV (ndev)->channum;
460#else
461 {
462 struct c4_priv *priv;
463
464 priv = (struct c4_priv *) dev_to_hdlc (ndev)->priv;
465 channum = priv->channum;
466 }
467#endif
468
469 ch = c4_find_chan (channum);
470 if (ch == NULL)
471 return NULL;
472
473 nstats = &ndev->stats;
474 stats = &ch->s;
475
476 memset (nstats, 0, sizeof (struct net_device_stats));
477 nstats->rx_packets = stats->rx_packets;
478 nstats->tx_packets = stats->tx_packets;
479 nstats->rx_bytes = stats->rx_bytes;
480 nstats->tx_bytes = stats->tx_bytes;
481 nstats->rx_errors = stats->rx_length_errors +
482 stats->rx_over_errors +
483 stats->rx_crc_errors +
484 stats->rx_frame_errors +
485 stats->rx_fifo_errors +
486 stats->rx_missed_errors;
487 nstats->tx_errors = stats->tx_dropped +
488 stats->tx_aborted_errors +
489 stats->tx_fifo_errors;
490 nstats->rx_dropped = stats->rx_dropped;
491 nstats->tx_dropped = stats->tx_dropped;
492
493 nstats->rx_length_errors = stats->rx_length_errors;
494 nstats->rx_over_errors = stats->rx_over_errors;
495 nstats->rx_crc_errors = stats->rx_crc_errors;
496 nstats->rx_frame_errors = stats->rx_frame_errors;
497 nstats->rx_fifo_errors = stats->rx_fifo_errors;
498 nstats->rx_missed_errors = stats->rx_missed_errors;
499
500 nstats->tx_aborted_errors = stats->tx_aborted_errors;
501 nstats->tx_fifo_errors = stats->tx_fifo_errors;
502
503 return nstats;
504}
505
506
507static ci_t *
508get_ci_by_dev (struct net_device * ndev)
509{
510 return (ci_t *)(netdev_priv(ndev));
511}
512
513
514#if !defined(GENERIC_HDLC_VERSION) || (GENERIC_HDLC_VERSION < 4)
515STATIC int
516c4_linux_xmit (hdlc_device * hdlc, struct sk_buff * skb)
517{
518 int rval;
519
520 rval = musycc_start_xmit (DEV_TO_PRIV (hdlc)->ci, DEV_TO_PRIV (hdlc)->channum, skb);
521 return -rval;
522}
523#else /* new */
524STATIC int
525c4_linux_xmit (struct sk_buff * skb, struct net_device * ndev)
526{
527 const struct c4_priv *priv;
528 int rval;
529
530#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
531 priv = DEV_TO_PRIV (ndev);
532#else
533 hdlc_device *hdlc = dev_to_hdlc (ndev);
534
535 priv = hdlc->priv;
536#endif
537
538 rval = musycc_start_xmit (priv->ci, priv->channum, skb);
539 return -rval;
540}
541#endif /* GENERIC_HDLC_VERSION */
542
543static const struct net_device_ops chan_ops = {
544 .ndo_open = chan_open,
545 .ndo_stop = chan_close,
546 .ndo_start_xmit = c4_linux_xmit,
547 .ndo_do_ioctl = chan_dev_ioctl,
548 .ndo_get_stats = chan_get_stats,
549};
550
551STATIC struct net_device *
552create_chan (struct net_device * ndev, ci_t * ci,
553 struct sbecom_chan_param * cp)
554{
555 hdlc_device *hdlc;
556 struct net_device *dev;
557 hdw_info_t *hi;
558 int ret;
559
560 if (c4_find_chan (cp->channum))
561 return 0; /* channel already exists */
562
563 {
564 struct c4_priv *priv;
565
566 /* allocate then fill in private data structure */
567 priv = OS_kmalloc (sizeof (struct c4_priv));
568 if (!priv)
569 {
570 pr_warning("%s: no memory for net_device !\n", ci->devname);
571 return 0;
572 }
573 dev = alloc_hdlcdev (priv);
574 if (!dev)
575 {
576 pr_warning("%s: no memory for hdlc_device !\n", ci->devname);
577 OS_kfree (priv);
578 return 0;
579 }
580 priv->ci = ci;
581 priv->channum = cp->channum;
582 }
583
584 hdlc = dev_to_hdlc (dev);
585
586 dev->base_addr = 0; /* not I/O mapped */
587 dev->irq = ndev->irq;
588 dev->type = ARPHRD_RAWHDLC;
589 *dev->name = 0; /* default ifconfig name = "hdlc" */
590
591 hi = (hdw_info_t *) ci->hdw_info;
592 if (hi->mfg_info_sts == EEPROM_OK)
593 {
594 switch (hi->promfmt)
595 {
596 case PROM_FORMAT_TYPE1:
597 memcpy (dev->dev_addr, (FLD_TYPE1 *) (hi->mfg_info.pft1.Serial), 6);
598 break;
599 case PROM_FORMAT_TYPE2:
600 memcpy (dev->dev_addr, (FLD_TYPE2 *) (hi->mfg_info.pft2.Serial), 6);
601 break;
602 default:
603 memset (dev->dev_addr, 0, 6);
604 break;
605 }
606 } else
607 {
608 memset (dev->dev_addr, 0, 6);
609 }
610
611 hdlc->xmit = c4_linux_xmit;
612
613 dev->netdev_ops = &chan_ops;
614 /*
615 * The native hdlc stack calls this 'attach' routine during
616 * hdlc_raw_ioctl(), passing parameters for line encoding and parity.
617 * Since hdlc_raw_ioctl() stack does not interrogate whether an 'attach'
618 * routine is actually registered or not, we supply a dummy routine which
619 * does nothing (since encoding and parity are setup for our driver via a
620 * special configuration application).
621 */
622
623 hdlc->attach = chan_attach_noop;
624
625 rtnl_unlock (); /* needed due to Ioctl calling sequence */
626 ret = register_hdlc_device (dev);
627 /* NOTE: <stats> setting must occur AFTER registration in order to "take" */
628 dev->tx_queue_len = MAX_DEFAULT_IFQLEN;
629
630 rtnl_lock (); /* needed due to Ioctl calling sequence */
631 if (ret)
632 {
633 if (log_level >= LOG_WARN)
634 pr_info("%s: create_chan[%d] registration error = %d.\n",
635 ci->devname, cp->channum, ret);
636 free_netdev (dev); /* cleanup */
637 return 0; /* failed to register */
638 }
639 return dev;
640}
641
642
643/* the idea here is to get port information and pass it back (using pointer) */
644STATIC status_t
645do_get_port (struct net_device * ndev, void *data)
646{
647 int ret;
648 ci_t *ci; /* ci stands for card information */
649 struct sbecom_port_param pp;/* copy data to kernel land */
650
651 if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param)))
652 return -EFAULT;
653 if (pp.portnum >= MUSYCC_NPORTS)
654 return -EFAULT;
655 ci = get_ci_by_dev (ndev);
656 if (!ci)
657 return -EINVAL; /* get card info */
658
659 ret = mkret (c4_get_port (ci, pp.portnum));
660 if (ret)
661 return ret;
662 if (copy_to_user (data, &ci->port[pp.portnum].p,
663 sizeof (struct sbecom_port_param)))
664 return -EFAULT;
665 return 0;
666}
667
668/* this function copys the user data and then calls the real action function */
669STATIC status_t
670do_set_port (struct net_device * ndev, void *data)
671{
672 ci_t *ci; /* ci stands for card information */
673 struct sbecom_port_param pp;/* copy data to kernel land */
674
675 if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param)))
676 return -EFAULT;
677 if (pp.portnum >= MUSYCC_NPORTS)
678 return -EFAULT;
679 ci = get_ci_by_dev (ndev);
680 if (!ci)
681 return -EINVAL; /* get card info */
682
683 if (pp.portnum >= ci->max_port) /* sanity check */
684 return ENXIO;
685
686 memcpy (&ci->port[pp.portnum].p, &pp, sizeof (struct sbecom_port_param));
687 return mkret (c4_set_port (ci, pp.portnum));
688}
689
690/* work the port loopback mode as per directed */
691STATIC status_t
692do_port_loop (struct net_device * ndev, void *data)
693{
694 struct sbecom_port_param pp;
695 ci_t *ci;
696
697 if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param)))
698 return -EFAULT;
699 ci = get_ci_by_dev (ndev);
700 if (!ci)
701 return -EINVAL;
702 return mkret (c4_loop_port (ci, pp.portnum, pp.port_mode));
703}
704
705/* set the specified register with the given value / or just read it */
706STATIC status_t
707do_framer_rw (struct net_device * ndev, void *data)
708{
709 struct sbecom_port_param pp;
710 ci_t *ci;
711 int ret;
712
713 if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param)))
714 return -EFAULT;
715 ci = get_ci_by_dev (ndev);
716 if (!ci)
717 return -EINVAL;
718 ret = mkret (c4_frame_rw (ci, &pp));
719 if (ret)
720 return ret;
721 if (copy_to_user (data, &pp, sizeof (struct sbecom_port_param)))
722 return -EFAULT;
723 return 0;
724}
725
726/* set the specified register with the given value / or just read it */
727STATIC status_t
728do_pld_rw (struct net_device * ndev, void *data)
729{
730 struct sbecom_port_param pp;
731 ci_t *ci;
732 int ret;
733
734 if (copy_from_user (&pp, data, sizeof (struct sbecom_port_param)))
735 return -EFAULT;
736 ci = get_ci_by_dev (ndev);
737 if (!ci)
738 return -EINVAL;
739 ret = mkret (c4_pld_rw (ci, &pp));
740 if (ret)
741 return ret;
742 if (copy_to_user (data, &pp, sizeof (struct sbecom_port_param)))
743 return -EFAULT;
744 return 0;
745}
746
747/* set the specified register with the given value / or just read it */
748STATIC status_t
749do_musycc_rw (struct net_device * ndev, void *data)
750{
751 struct c4_musycc_param mp;
752 ci_t *ci;
753 int ret;
754
755 if (copy_from_user (&mp, data, sizeof (struct c4_musycc_param)))
756 return -EFAULT;
757 ci = get_ci_by_dev (ndev);
758 if (!ci)
759 return -EINVAL;
760 ret = mkret (c4_musycc_rw (ci, &mp));
761 if (ret)
762 return ret;
763 if (copy_to_user (data, &mp, sizeof (struct c4_musycc_param)))
764 return -EFAULT;
765 return 0;
766}
767
768STATIC status_t
769do_get_chan (struct net_device * ndev, void *data)
770{
771 struct sbecom_chan_param cp;
772 int ret;
773
774 if (copy_from_user (&cp, data,
775 sizeof (struct sbecom_chan_param)))
776 return -EFAULT;
777
778 if ((ret = mkret (c4_get_chan (cp.channum, &cp))))
779 return ret;
780
781 if (copy_to_user (data, &cp, sizeof (struct sbecom_chan_param)))
782 return -EFAULT;
783 return 0;
784}
785
786STATIC status_t
787do_set_chan (struct net_device * ndev, void *data)
788{
789 struct sbecom_chan_param cp;
790 int ret;
791 ci_t *ci;
792
793 if (copy_from_user (&cp, data, sizeof (struct sbecom_chan_param)))
794 return -EFAULT;
795 ci = get_ci_by_dev (ndev);
796 if (!ci)
797 return -EINVAL;
798 switch (ret = mkret (c4_set_chan (cp.channum, &cp)))
799 {
800 case 0:
801 return 0;
802 default:
803 return ret;
804 }
805}
806
807STATIC status_t
808do_create_chan (struct net_device * ndev, void *data)
809{
810 ci_t *ci;
811 struct net_device *dev;
812 struct sbecom_chan_param cp;
813 int ret;
814
815 if (copy_from_user (&cp, data, sizeof (struct sbecom_chan_param)))
816 return -EFAULT;
817 ci = get_ci_by_dev (ndev);
818 if (!ci)
819 return -EINVAL;
820 dev = create_chan (ndev, ci, &cp);
821 if (!dev)
822 return -EBUSY;
823 ret = mkret (c4_new_chan (ci, cp.port, cp.channum, dev));
824 if (ret)
825 {
826#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
827 rtnl_unlock (); /* needed due to Ioctl calling sequence */
828 V7 (unregister_hdlc_device) (dev_to_hdlc (dev));
829 rtnl_lock (); /* needed due to Ioctl calling sequence */
830 OS_kfree (DEV_TO_PRIV (dev));
831 OS_kfree (dev);
832#else
833 rtnl_unlock (); /* needed due to Ioctl calling sequence */
834 unregister_hdlc_device (dev);
835 rtnl_lock (); /* needed due to Ioctl calling sequence */
836 free_netdev (dev);
837#endif
838 }
839 return ret;
840}
841
842STATIC status_t
843do_get_chan_stats (struct net_device * ndev, void *data)
844{
845 struct c4_chan_stats_wrap ccs;
846 int ret;
847
848 if (copy_from_user (&ccs, data,
849 sizeof (struct c4_chan_stats_wrap)))
850 return -EFAULT;
851 switch (ret = mkret (c4_get_chan_stats (ccs.channum, &ccs.stats)))
852 {
853 case 0:
854 break;
855 default:
856 return ret;
857 }
858 if (copy_to_user (data, &ccs,
859 sizeof (struct c4_chan_stats_wrap)))
860 return -EFAULT;
861 return 0;
862}
863STATIC status_t
864do_set_loglevel (struct net_device * ndev, void *data)
865{
866 unsigned int log_level;
867
868 if (copy_from_user (&log_level, data, sizeof (int)))
869 return -EFAULT;
870 sbecom_set_loglevel (log_level);
871 return 0;
872}
873
874STATIC status_t
875do_deluser (struct net_device * ndev, int lockit)
876{
877 if (ndev->flags & IFF_UP)
878 return -EBUSY;
879
880 {
881 ci_t *ci;
882 mch_t *ch;
883 const struct c4_priv *priv;
884 int channum;
885
886#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
887 priv = DEV_TO_PRIV (ndev);
888#else
889 priv = (struct c4_priv *) dev_to_hdlc (ndev)->priv;
890#endif
891 ci = priv->ci;
892 channum = priv->channum;
893
894 ch = c4_find_chan (channum);
895 if (ch == NULL)
896 return -ENOENT;
897 ch->user = 0; /* will be freed, below */
898 }
899
900#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
901 if (lockit)
902 rtnl_unlock (); /* needed if Ioctl calling sequence */
903 V7 (unregister_hdlc_device) (dev_to_hdlc (ndev));
904 if (lockit)
905 rtnl_lock (); /* needed if Ioctl calling sequence */
906 OS_kfree (DEV_TO_PRIV (ndev));
907 OS_kfree (ndev);
908#else
909 if (lockit)
910 rtnl_unlock (); /* needed if Ioctl calling sequence */
911 unregister_hdlc_device (ndev);
912 if (lockit)
913 rtnl_lock (); /* needed if Ioctl calling sequence */
914 free_netdev (ndev);
915#endif
916 return 0;
917}
918
919int
920do_del_chan (struct net_device * musycc_dev, void *data)
921{
922 struct sbecom_chan_param cp;
923 char buf[sizeof (CHANNAME) + 3];
924 struct net_device *dev;
925 int ret;
926
927 if (copy_from_user (&cp, data,
928 sizeof (struct sbecom_chan_param)))
929 return -EFAULT;
930 sprintf (buf, CHANNAME "%d", cp.channum);
931 if (!(dev = dev_get_by_name (&init_net, buf)))
932 return -ENOENT;
933 dev_put (dev);
934 ret = do_deluser (dev, 1);
935 if (ret)
936 return ret;
937 return c4_del_chan (cp.channum);
938}
939int c4_reset_board (void *);
940
941int
942do_reset (struct net_device * musycc_dev, void *data)
943{
944 const struct c4_priv *priv;
945 int i;
946
947 for (i = 0; i < 128; i++)
948 {
949 struct net_device *ndev;
950 char buf[sizeof (CHANNAME) + 3];
951
952 sprintf (buf, CHANNAME "%d", i);
953 if (!(ndev = dev_get_by_name(&init_net, buf)))
954 continue;
955 priv = dev_to_hdlc (ndev)->priv;
956
957 if ((unsigned long) (priv->ci) ==
958 (unsigned long) (netdev_priv(musycc_dev)))
959 {
960 ndev->flags &= ~IFF_UP;
961 dev_put (ndev);
962 netif_stop_queue (ndev);
963 do_deluser (ndev, 1);
964 } else
965 dev_put (ndev);
966 }
967 return 0;
968}
969
970int
971do_reset_chan_stats (struct net_device * musycc_dev, void *data)
972{
973 struct sbecom_chan_param cp;
974
975 if (copy_from_user (&cp, data,
976 sizeof (struct sbecom_chan_param)))
977 return -EFAULT;
978 return mkret (c4_del_chan_stats (cp.channum));
979}
980
981STATIC status_t
982c4_ioctl (struct net_device * ndev, struct ifreq * ifr, int cmd)
983{
984 ci_t *ci;
985 void *data;
986 int iocmd, iolen;
987 status_t ret;
988 static struct data
989 {
990 union
991 {
992 u_int8_t c;
993 u_int32_t i;
994 struct sbe_brd_info bip;
995 struct sbe_drv_info dip;
996 struct sbe_iid_info iip;
997 struct sbe_brd_addr bap;
998 struct sbecom_chan_stats stats;
999 struct sbecom_chan_param param;
1000 struct temux_card_stats cards;
1001 struct sbecom_card_param cardp;
1002 struct sbecom_framer_param frp;
1003 } u;
1004 } arg;
1005
1006
1007 if (!capable (CAP_SYS_ADMIN))
1008 return -EPERM;
1009 if (cmd != SIOCDEVPRIVATE + 15)
1010 return -EINVAL;
1011 if (!(ci = get_ci_by_dev (ndev)))
1012 return -EINVAL;
1013 if (ci->state != C_RUNNING)
1014 return -ENODEV;
1015 if (copy_from_user (&iocmd, ifr->ifr_data, sizeof (iocmd)))
1016 return -EFAULT;
1017#if 0
1018 if (copy_from_user (&len, ifr->ifr_data + sizeof (iocmd), sizeof (len)))
1019 return -EFAULT;
1020#endif
1021
1022#if 0
1023 pr_info("c4_ioctl: iocmd %x, dir %x type %x nr %x iolen %d.\n", iocmd,
1024 _IOC_DIR (iocmd), _IOC_TYPE (iocmd), _IOC_NR (iocmd),
1025 _IOC_SIZE (iocmd));
1026#endif
1027 iolen = _IOC_SIZE (iocmd);
1028 data = ifr->ifr_data + sizeof (iocmd);
1029 if (copy_from_user (&arg, data, iolen))
1030 return -EFAULT;
1031
1032 ret = 0;
1033 switch (iocmd)
1034 {
1035 case SBE_IOC_PORT_GET:
1036 //pr_info(">> SBE_IOC_PORT_GET Ioctl...\n");
1037 ret = do_get_port (ndev, data);
1038 break;
1039 case SBE_IOC_PORT_SET:
1040 //pr_info(">> SBE_IOC_PORT_SET Ioctl...\n");
1041 ret = do_set_port (ndev, data);
1042 break;
1043 case SBE_IOC_CHAN_GET:
1044 //pr_info(">> SBE_IOC_CHAN_GET Ioctl...\n");
1045 ret = do_get_chan (ndev, data);
1046 break;
1047 case SBE_IOC_CHAN_SET:
1048 //pr_info(">> SBE_IOC_CHAN_SET Ioctl...\n");
1049 ret = do_set_chan (ndev, data);
1050 break;
1051 case C4_DEL_CHAN:
1052 //pr_info(">> C4_DEL_CHAN Ioctl...\n");
1053 ret = do_del_chan (ndev, data);
1054 break;
1055 case SBE_IOC_CHAN_NEW:
1056 ret = do_create_chan (ndev, data);
1057 break;
1058 case SBE_IOC_CHAN_GET_STAT:
1059 ret = do_get_chan_stats (ndev, data);
1060 break;
1061 case SBE_IOC_LOGLEVEL:
1062 ret = do_set_loglevel (ndev, data);
1063 break;
1064 case SBE_IOC_RESET_DEV:
1065 ret = do_reset (ndev, data);
1066 break;
1067 case SBE_IOC_CHAN_DEL_STAT:
1068 ret = do_reset_chan_stats (ndev, data);
1069 break;
1070 case C4_LOOP_PORT:
1071 ret = do_port_loop (ndev, data);
1072 break;
1073 case C4_RW_FRMR:
1074 ret = do_framer_rw (ndev, data);
1075 break;
1076 case C4_RW_MSYC:
1077 ret = do_musycc_rw (ndev, data);
1078 break;
1079 case C4_RW_PLD:
1080 ret = do_pld_rw (ndev, data);
1081 break;
1082 case SBE_IOC_IID_GET:
1083 ret = (iolen == sizeof (struct sbe_iid_info)) ? c4_get_iidinfo (ci, &arg.u.iip) : -EFAULT;
1084 if (ret == 0) /* no error, copy data */
1085 if (copy_to_user (data, &arg, iolen))
1086 return -EFAULT;
1087 break;
1088 default:
1089 //pr_info(">> c4_ioctl: EINVAL - unknown iocmd <%x>\n", iocmd);
1090 ret = -EINVAL;
1091 break;
1092 }
1093 return mkret (ret);
1094}
1095
1096static const struct net_device_ops c4_ops = {
1097 .ndo_open = void_open,
1098 .ndo_start_xmit = c4_linux_xmit,
1099 .ndo_do_ioctl = c4_ioctl,
1100};
1101
1102static void c4_setup(struct net_device *dev)
1103{
1104 dev->type = ARPHRD_VOID;
1105 dev->netdev_ops = &c4_ops;
1106}
1107
1108struct net_device *__init
1109c4_add_dev (hdw_info_t * hi, int brdno, unsigned long f0, unsigned long f1,
1110 int irq0, int irq1)
1111{
1112 struct net_device *ndev;
1113 ci_t *ci;
1114
1115 ndev = alloc_netdev(sizeof(ci_t), SBE_IFACETMPL, c4_setup);
1116 if (!ndev)
1117 {
1118 pr_warning("%s: no memory for struct net_device !\n", hi->devname);
1119 error_flag = ENOMEM;
1120 return 0;
1121 }
1122 ci = (ci_t *)(netdev_priv(ndev));
1123 ndev->irq = irq0;
1124
1125 ci->hdw_info = hi;
1126 ci->state = C_INIT; /* mark as hardware not available */
1127 ci->next = c4_list;
1128 c4_list = ci;
1129 ci->brdno = ci->next ? ci->next->brdno + 1 : 0;
1130
1131 if (CI == 0)
1132 CI = ci; /* DEBUG, only board 0 usage */
1133
1134 strcpy (ci->devname, hi->devname);
1135 ci->release = &pmcc4_OSSI_release[0];
1136
1137 /* tasklet */
1138#if defined(SBE_ISR_TASKLET)
1139 tasklet_init (&ci->ci_musycc_isr_tasklet,
1140 (void (*) (unsigned long)) musycc_intr_bh_tasklet,
1141 (unsigned long) ci);
1142
1143 if (atomic_read (&ci->ci_musycc_isr_tasklet.count) == 0)
1144 tasklet_disable_nosync (&ci->ci_musycc_isr_tasklet);
1145#elif defined(SBE_ISR_IMMEDIATE)
1146 ci->ci_musycc_isr_tq.routine = (void *) (unsigned long) musycc_intr_bh_tasklet;
1147 ci->ci_musycc_isr_tq.data = ci;
1148#endif
1149
1150
1151 if (register_netdev (ndev) ||
1152 (c4_init (ci, (u_char *) f0, (u_char *) f1) != SBE_DRVR_SUCCESS))
1153 {
1154 OS_kfree (netdev_priv(ndev));
1155 OS_kfree (ndev);
1156 error_flag = ENODEV;
1157 return 0;
1158 }
1159 /*************************************************************
1160 * int request_irq(unsigned int irq,
1161 * void (*handler)(int, void *, struct pt_regs *),
1162 * unsigned long flags, const char *dev_name, void *dev_id);
1163 * wherein:
1164 * irq -> The interrupt number that is being requested.
1165 * handler -> Pointer to handling function being installed.
1166 * flags -> A bit mask of options related to interrupt management.
1167 * dev_name -> String used in /proc/interrupts to show owner of interrupt.
1168 * dev_id -> Pointer (for shared interrupt lines) to point to its own
1169 * private data area (to identify which device is interrupting).
1170 *
1171 * extern void free_irq(unsigned int irq, void *dev_id);
1172 **************************************************************/
1173
1174 if (request_irq (irq0, &c4_linux_interrupt,
1175#if defined(SBE_ISR_TASKLET)
1176 IRQF_DISABLED | IRQF_SHARED,
1177#elif defined(SBE_ISR_IMMEDIATE)
1178 IRQF_DISABLED | IRQF_SHARED,
1179#elif defined(SBE_ISR_INLINE)
1180 IRQF_SHARED,
1181#endif
1182 ndev->name, ndev))
1183 {
1184 pr_warning("%s: MUSYCC could not get irq: %d\n", ndev->name, irq0);
1185 unregister_netdev (ndev);
1186 OS_kfree (netdev_priv(ndev));
1187 OS_kfree (ndev);
1188 error_flag = EIO;
1189 return 0;
1190 }
1191#ifdef CONFIG_SBE_PMCC4_NCOMM
1192 if (request_irq (irq1, &c4_ebus_interrupt, IRQF_SHARED, ndev->name, ndev))
1193 {
1194 pr_warning("%s: EBUS could not get irq: %d\n", hi->devname, irq1);
1195 unregister_netdev (ndev);
1196 free_irq (irq0, ndev);
1197 OS_kfree (netdev_priv(ndev));
1198 OS_kfree (ndev);
1199 error_flag = EIO;
1200 return 0;
1201 }
1202#endif
1203
1204 /* setup board identification information */
1205
1206 {
1207 u_int32_t tmp;
1208
1209 hdw_sn_get (hi, brdno); /* also sets PROM format type (promfmt)
1210 * for later usage */
1211
1212 switch (hi->promfmt)
1213 {
1214 case PROM_FORMAT_TYPE1:
1215 memcpy (ndev->dev_addr, (FLD_TYPE1 *) (hi->mfg_info.pft1.Serial), 6);
1216 memcpy (&tmp, (FLD_TYPE1 *) (hi->mfg_info.pft1.Id), 4); /* unaligned data
1217 * acquisition */
1218 ci->brd_id = cpu_to_be32 (tmp);
1219 break;
1220 case PROM_FORMAT_TYPE2:
1221 memcpy (ndev->dev_addr, (FLD_TYPE2 *) (hi->mfg_info.pft2.Serial), 6);
1222 memcpy (&tmp, (FLD_TYPE2 *) (hi->mfg_info.pft2.Id), 4); /* unaligned data
1223 * acquisition */
1224 ci->brd_id = cpu_to_be32 (tmp);
1225 break;
1226 default:
1227 ci->brd_id = 0;
1228 memset (ndev->dev_addr, 0, 6);
1229 break;
1230 }
1231
1232#if 1
1233 sbeid_set_hdwbid (ci); /* requires bid to be preset */
1234#else
1235 sbeid_set_bdtype (ci); /* requires hdw_bid to be preset */
1236#endif
1237
1238 }
1239
1240#ifdef CONFIG_PROC_FS
1241 sbecom_proc_brd_init (ci);
1242#endif
1243#if defined(SBE_ISR_TASKLET)
1244 tasklet_enable (&ci->ci_musycc_isr_tasklet);
1245#endif
1246
1247
1248 if ((error_flag = c4_init2 (ci)) != SBE_DRVR_SUCCESS)
1249 {
1250#ifdef CONFIG_PROC_FS
1251 sbecom_proc_brd_cleanup (ci);
1252#endif
1253 unregister_netdev (ndev);
1254 free_irq (irq1, ndev);
1255 free_irq (irq0, ndev);
1256 OS_kfree (netdev_priv(ndev));
1257 OS_kfree (ndev);
1258 return 0; /* failure, error_flag is set */
1259 }
1260 return ndev;
1261}
1262
1263STATIC int __init
1264c4_mod_init (void)
1265{
1266 int rtn;
1267
1268 pr_warning("%s\n", pmcc4_OSSI_release);
1269 if ((rtn = c4hw_attach_all ()))
1270 return -rtn; /* installation failure - see system log */
1271
1272 /* housekeeping notifications */
1273 if (log_level != log_level_default)
1274 pr_info("NOTE: driver parameter <log_level> changed from default %d to %d.\n",
1275 log_level_default, log_level);
1276 if (max_mru != max_mru_default)
1277 pr_info("NOTE: driver parameter <max_mru> changed from default %d to %d.\n",
1278 max_mru_default, max_mru);
1279 if (max_mtu != max_mtu_default)
1280 pr_info("NOTE: driver parameter <max_mtu> changed from default %d to %d.\n",
1281 max_mtu_default, max_mtu);
1282 if (max_rxdesc_used != max_rxdesc_default)
1283 {
1284 if (max_rxdesc_used > 2000)
1285 max_rxdesc_used = 2000; /* out-of-bounds reset */
1286 pr_info("NOTE: driver parameter <max_rxdesc_used> changed from default %d to %d.\n",
1287 max_rxdesc_default, max_rxdesc_used);
1288 }
1289 if (max_txdesc_used != max_txdesc_default)
1290 {
1291 if (max_txdesc_used > 1000)
1292 max_txdesc_used = 1000; /* out-of-bounds reset */
1293 pr_info("NOTE: driver parameter <max_txdesc_used> changed from default %d to %d.\n",
1294 max_txdesc_default, max_txdesc_used);
1295 }
1296 return 0; /* installation success */
1297}
1298
1299
1300 /*
1301 * find any still allocated hdlc registrations and unregister via call to
1302 * do_deluser()
1303 */
1304
1305STATIC void __exit
1306cleanup_hdlc (void)
1307{
1308 hdw_info_t *hi;
1309 ci_t *ci;
1310 struct net_device *ndev;
1311 int i, j, k;
1312
1313 for (i = 0, hi = hdw_info; i < MAX_BOARDS; i++, hi++)
1314 {
1315 if (hi->ndev) /* a board has been attached */
1316 {
1317 ci = (ci_t *)(netdev_priv(hi->ndev));
1318 for (j = 0; j < ci->max_port; j++)
1319 for (k = 0; k < MUSYCC_NCHANS; k++)
1320 if ((ndev = ci->port[j].chan[k]->user))
1321 {
1322 do_deluser (ndev, 0);
1323 }
1324 }
1325 }
1326}
1327
1328
1329STATIC void __exit
1330c4_mod_remove (void)
1331{
1332 cleanup_hdlc (); /* delete any missed channels */
1333 cleanup_devs ();
1334 c4_cleanup ();
1335 cleanup_ioremap ();
1336 pr_info("SBE - driver removed.\n");
1337}
1338
1339module_init (c4_mod_init);
1340module_exit (c4_mod_remove);
1341
1342#ifndef SBE_INCLUDE_SYMBOLS
1343#ifndef CONFIG_SBE_WANC24_NCOMM
1344#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1345EXPORT_NO_SYMBOLS;
1346#endif
1347#endif
1348#endif
1349
1350MODULE_AUTHOR ("SBE Technical Services <support@sbei.com>");
1351MODULE_DESCRIPTION ("wanPCI-CxT1E1 Generic HDLC WAN Driver module");
1352#ifdef MODULE_LICENSE
1353MODULE_LICENSE ("GPL");
1354#endif
1355
1356/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/musycc.c b/drivers/staging/cxt1e1/musycc.c
new file mode 100644
index 000000000000..d3f5a5b52dc3
--- /dev/null
+++ b/drivers/staging/cxt1e1/musycc.c
@@ -0,0 +1,2185 @@
1/*
2 * $Id: musycc.c,v 2.1 2007/08/15 23:32:17 rickd PMCC4_3_1B $
3 */
4
5unsigned int max_intcnt = 0;
6unsigned int max_bh = 0;
7
8/*-----------------------------------------------------------------------------
9 * musycc.c -
10 *
11 * Copyright (C) 2007 One Stop Systems, Inc.
12 * Copyright (C) 2003-2006 SBE, Inc.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * For further information, contact via email: support@onestopsystems.com
25 * One Stop Systems, Inc. Escondido, California U.S.A.
26 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 2.1 $
29 * Last changed on $Date: 2007/08/15 23:32:17 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: musycc.c,v $
33 * Revision 2.1 2007/08/15 23:32:17 rickd
34 * Use 'if 0' instead of GNU comment delimeter to avoid line wrap induced compiler errors.
35 *
36 * Revision 2.0 2007/08/15 22:13:20 rickd
37 * Update to printf pointer %p usage and correct some UINT to ULONG for
38 * 64bit comptibility.
39 *
40 * Revision 1.7 2006/04/21 00:56:40 rickd
41 * workqueue files now prefixed with <sbecom> prefix.
42 *
43 * Revision 1.6 2005/10/27 18:54:19 rickd
44 * Clean out old code. Default to HDLC_FCS16, not TRANS.
45 *
46 * Revision 1.5 2005/10/17 23:55:28 rickd
47 * Initial port of NCOMM support patches from original work found
48 * in pmc_c4t1e1 as updated by NCOMM. Ref: CONFIG_SBE_PMCC4_NCOMM.
49 *
50 * Revision 1.4 2005/10/13 20:35:25 rickd
51 * Cleanup warning for unused <flags> variable.
52 *
53 * Revision 1.3 2005/10/13 19:19:22 rickd
54 * Disable redundant driver removal cleanup code.
55 *
56 * Revision 1.2 2005/10/11 18:36:16 rickd
57 * Clean up warning messages caused by de-implemented some <flags> associated
58 * with spin_lock() removals.
59 *
60 * Revision 1.1 2005/10/05 00:45:28 rickd
61 * Re-enable xmit on flow-controlled and full channel to fix restart hang.
62 * Add some temp spin-lock debug code (rld_spin_owner).
63 *
64 * Revision 1.0 2005/09/28 00:10:06 rickd
65 * Initial release for C4T1E1 support. Lots of transparent
66 * mode updates.
67 *
68 *-----------------------------------------------------------------------------
69 */
70
71char SBEid_pmcc4_musyccc[] =
72"@(#)musycc.c - $Revision: 2.1 $ (c) Copyright 2004-2006 SBE, Inc.";
73
74#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
75
76#include <linux/types.h>
77#include "pmcc4_sysdep.h"
78#include <linux/kernel.h>
79#include <linux/errno.h>
80#include <linux/init.h>
81#include "sbecom_inline_linux.h"
82#include "libsbew.h"
83#include "pmcc4_private.h"
84#include "pmcc4.h"
85#include "musycc.h"
86
87#ifdef SBE_INCLUDE_SYMBOLS
88#define STATIC
89#else
90#define STATIC static
91#endif
92
93#define sd_find_chan(ci,ch) c4_find_chan(ch)
94
95
96/*******************************************************************/
97/* global driver variables */
98extern ci_t *c4_list;
99extern int drvr_state;
100extern int log_level;
101
102extern int max_mru;
103extern int max_mtu;
104extern int max_rxdesc_used;
105extern int max_txdesc_used;
106extern ci_t *CI; /* dummy pointr to board ZEROE's data - DEBUG
107 * USAGE */
108
109
110/*******************************************************************/
111/* forward references */
112void c4_fifo_free (mpi_t *, int);
113void c4_wk_chan_restart (mch_t *);
114void musycc_bh_tx_eom (mpi_t *, int);
115int musycc_chan_up (ci_t *, int);
116status_t __init musycc_init (ci_t *);
117STATIC void __init musycc_init_port (mpi_t *);
118void musycc_intr_bh_tasklet (ci_t *);
119void musycc_serv_req (mpi_t *, u_int32_t);
120void musycc_update_timeslots (mpi_t *);
121
122/*******************************************************************/
123
124#if 1
125STATIC int
126musycc_dump_rxbuffer_ring (mch_t * ch, int lockit)
127{
128 struct mdesc *m;
129 unsigned long flags = 0;
130
131 u_int32_t status;
132 int n;
133
134 if (lockit)
135 {
136 spin_lock_irqsave (&ch->ch_rxlock, flags);
137 }
138 if (ch->rxd_num == 0)
139 {
140 pr_info(" ZERO receive buffers allocated for this channel.");
141 } else
142 {
143 FLUSH_MEM_READ ();
144 m = &ch->mdr[ch->rxix_irq_srv];
145 for (n = ch->rxd_num; n; n--)
146 {
147 status = le32_to_cpu (m->status);
148 {
149 pr_info("%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n",
150 (m == &ch->mdr[ch->rxix_irq_srv]) ? 'F' : ' ',
151 (unsigned long) m, n,
152 status,
153 m->data ? (status & HOST_RX_OWNED ? 'H' : 'M') : '-',
154 status & POLL_DISABLED ? 'P' : '-',
155 status & EOBIRQ_ENABLE ? 'b' : '-',
156 status & EOMIRQ_ENABLE ? 'm' : '-',
157 status & LENGTH_MASK,
158 le32_to_cpu (m->data), le32_to_cpu (m->next));
159#ifdef RLD_DUMP_BUFDATA
160 {
161 u_int32_t *dp;
162 int len = status & LENGTH_MASK;
163
164#if 1
165 if (m->data && (status & HOST_RX_OWNED))
166#else
167 if (m->data) /* always dump regardless of valid RX
168 * data */
169#endif
170 {
171 dp = (u_int32_t *) OS_phystov ((void *) (le32_to_cpu (m->data)));
172 if (len >= 0x10)
173 pr_info(" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len,
174 *dp, *(dp + 1), *(dp + 2), *(dp + 3));
175 else if (len >= 0x08)
176 pr_info(" %x[%x]: %08X %08X\n", (u_int32_t) dp, len,
177 *dp, *(dp + 1));
178 else
179 pr_info(" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp);
180 }
181 }
182#endif
183 }
184 m = m->snext;
185 }
186 } /* -for- */
187 pr_info("\n");
188
189 if (lockit)
190 {
191 spin_unlock_irqrestore (&ch->ch_rxlock, flags);
192 }
193 return 0;
194}
195#endif
196
197#if 1
198STATIC int
199musycc_dump_txbuffer_ring (mch_t * ch, int lockit)
200{
201 struct mdesc *m;
202 unsigned long flags = 0;
203 u_int32_t status;
204 int n;
205
206 if (lockit)
207 {
208 spin_lock_irqsave (&ch->ch_txlock, flags);
209 }
210 if (ch->txd_num == 0)
211 {
212 pr_info(" ZERO transmit buffers allocated for this channel.");
213 } else
214 {
215 FLUSH_MEM_READ ();
216 m = ch->txd_irq_srv;
217 for (n = ch->txd_num; n; n--)
218 {
219 status = le32_to_cpu (m->status);
220 {
221 pr_info("%c%c %08lx[%2d]: sts %08x (%c%c%c%c:%d.) Data [%08x] Next [%08x]\n",
222 (m == ch->txd_usr_add) ? 'F' : ' ',
223 (m == ch->txd_irq_srv) ? 'L' : ' ',
224 (unsigned long) m, n,
225 status,
226 m->data ? (status & MUSYCC_TX_OWNED ? 'M' : 'H') : '-',
227 status & POLL_DISABLED ? 'P' : '-',
228 status & EOBIRQ_ENABLE ? 'b' : '-',
229 status & EOMIRQ_ENABLE ? 'm' : '-',
230 status & LENGTH_MASK,
231 le32_to_cpu (m->data), le32_to_cpu (m->next));
232#ifdef RLD_DUMP_BUFDATA
233 {
234 u_int32_t *dp;
235 int len = status & LENGTH_MASK;
236
237 if (m->data)
238 {
239 dp = (u_int32_t *) OS_phystov ((void *) (le32_to_cpu (m->data)));
240 if (len >= 0x10)
241 pr_info(" %x[%x]: %08X %08X %08X %08x\n", (u_int32_t) dp, len,
242 *dp, *(dp + 1), *(dp + 2), *(dp + 3));
243 else if (len >= 0x08)
244 pr_info(" %x[%x]: %08X %08X\n", (u_int32_t) dp, len,
245 *dp, *(dp + 1));
246 else
247 pr_info(" %x[%x]: %08X\n", (u_int32_t) dp, len, *dp);
248 }
249 }
250#endif
251 }
252 m = m->snext;
253 }
254 } /* -for- */
255 pr_info("\n");
256
257 if (lockit)
258 {
259 spin_unlock_irqrestore (&ch->ch_txlock, flags);
260 }
261 return 0;
262}
263#endif
264
265
266/*
267 * The following supports a backdoor debug facility which can be used to
268 * display the state of a board's channel.
269 */
270
271status_t
272musycc_dump_ring (ci_t * ci, unsigned int chan)
273{
274 mch_t *ch;
275
276 if (chan >= MAX_CHANS_USED)
277 {
278 return SBE_DRVR_FAIL; /* E2BIG */
279 }
280 {
281 int bh;
282
283 bh = atomic_read (&ci->bh_pending);
284 pr_info(">> bh_pend %d [%d] ihead %d itail %d [%d] th_cnt %d bh_cnt %d wdcnt %d note %d\n",
285 bh, max_bh, ci->iqp_headx, ci->iqp_tailx, max_intcnt,
286 ci->intlog.drvr_intr_thcount,
287 ci->intlog.drvr_intr_bhcount,
288 ci->wdcount, ci->wd_notify);
289 max_bh = 0; /* reset counter */
290 max_intcnt = 0; /* reset counter */
291 }
292
293 if (!(ch = sd_find_chan (dummy, chan)))
294 {
295 pr_info(">> musycc_dump_ring: channel %d not up.\n", chan);
296 return ENOENT;
297 }
298 pr_info(">> CI %p CHANNEL %3d @ %p: state %x status/p %x/%x\n", ci, chan, ch, ch->state,
299 ch->status, ch->p.status);
300 pr_info("--------------------------------\nTX Buffer Ring - Channel %d, txd_num %d. (bd/ch pend %d %d), TXD required %d, txpkt %lu\n",
301 chan, ch->txd_num,
302 (u_int32_t) atomic_read (&ci->tx_pending), (u_int32_t) atomic_read (&ch->tx_pending), ch->txd_required, ch->s.tx_packets);
303 pr_info("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n",
304 ch->user, ch->txd_irq_srv, ch->txd_usr_add,
305 sd_queue_stopped (ch->user),
306 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode);
307 musycc_dump_txbuffer_ring (ch, 1);
308 pr_info("RX Buffer Ring - Channel %d, rxd_num %d. IRQ_SRV[%d] 0x%p, start_rx %x rxpkt %lu\n",
309 chan, ch->rxd_num, ch->rxix_irq_srv,
310 &ch->mdr[ch->rxix_irq_srv], ch->ch_start_rx, ch->s.rx_packets);
311 musycc_dump_rxbuffer_ring (ch, 1);
312
313 return SBE_DRVR_SUCCESS;
314}
315
316
317status_t
318musycc_dump_rings (ci_t * ci, unsigned int start_chan)
319{
320 unsigned int chan;
321
322 for (chan = start_chan; chan < (start_chan + 5); chan++)
323 musycc_dump_ring (ci, chan);
324 return SBE_DRVR_SUCCESS;
325}
326
327
328/*
329 * NOTE on musycc_init_mdt(): These MUSYCC writes are only operational after
330 * a MUSYCC GROUP_INIT command has been issued.
331 */
332
333void
334musycc_init_mdt (mpi_t * pi)
335{
336 u_int32_t *addr, cfg;
337 int i;
338
339 /*
340 * This Idle Code insertion takes effect prior to channel's first
341 * transmitted message. After that, each message contains its own Idle
342 * Code information which is to be issued after the message is
343 * transmitted (Ref.MUSYCC 5.2.2.3: MCENBL bit in Group Configuration
344 * Descriptor).
345 */
346
347 addr = (u_int32_t *) ((u_long) pi->reg + MUSYCC_MDT_BASE03_ADDR);
348 cfg = CFG_CH_FLAG_7E << IDLE_CODE;
349
350 for (i = 0; i < 32; addr++, i++)
351 {
352 pci_write_32 (addr, cfg);
353 }
354}
355
356
357/* Set TX thp to the next unprocessed md */
358
359void
360musycc_update_tx_thp (mch_t * ch)
361{
362 struct mdesc *md;
363 unsigned long flags;
364
365 spin_lock_irqsave (&ch->ch_txlock, flags);
366 while (1)
367 {
368 md = ch->txd_irq_srv;
369 FLUSH_MEM_READ ();
370 if (!md->data)
371 {
372 /* No MDs with buffers to process */
373 spin_unlock_irqrestore (&ch->ch_txlock, flags);
374 return;
375 }
376 if ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED)
377 {
378 /* this is the MD to restart TX with */
379 break;
380 }
381 /*
382 * Otherwise, we have a valid, host-owned message descriptor which
383 * has been successfully transmitted and whose buffer can be freed,
384 * so... process this MD, it's owned by the host. (This might give
385 * as a new, updated txd_irq_srv.)
386 */
387 musycc_bh_tx_eom (ch->up, ch->gchan);
388 }
389 md = ch->txd_irq_srv;
390 ch->up->regram->thp[ch->gchan] = cpu_to_le32 (OS_vtophys (md));
391 FLUSH_MEM_WRITE ();
392
393 if (ch->tx_full)
394 {
395 ch->tx_full = 0;
396 ch->txd_required = 0;
397 sd_enable_xmit (ch->user); /* re-enable to catch flow controlled
398 * channel */
399 }
400 spin_unlock_irqrestore (&ch->ch_txlock, flags);
401
402#ifdef RLD_TRANS_DEBUG
403 pr_info("++ musycc_update_tx_thp[%d]: setting thp = %p, sts %x\n", ch->channum, md, md->status);
404#endif
405}
406
407
408#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
409/*
410 * This is the workq task executed by the OS when our queue_work() is
411 * scheduled and run. It can fire off either RX or TX ACTIVATION depending
412 * upon the channel's ch_start_tx and ch_start_rx variables. This routine
413 * is implemented as a work queue so that the call to the service request is
414 * able to sleep, awaiting an interrupt acknowledgment response (SACK) from
415 * the hardware.
416 */
417
418void
419musycc_wq_chan_restart (void *arg) /* channel private structure */
420{
421 mch_t *ch;
422 mpi_t *pi;
423 struct mdesc *md;
424#if 0
425 unsigned long flags;
426#endif
427
428 ch = container_of(arg, struct c4_chan_info, ch_work);
429 pi = ch->up;
430
431#ifdef RLD_TRANS_DEBUG
432 pr_info("wq_chan_restart[%d]: start_RT[%d/%d] status %x\n",
433 ch->channum, ch->ch_start_rx, ch->ch_start_tx, ch->status);
434
435#endif
436
437 /**********************************/
438 /** check for RX restart request **/
439 /**********************************/
440
441 if ((ch->ch_start_rx) && (ch->status & RX_ENABLED))
442 {
443
444 ch->ch_start_rx = 0;
445#if defined(RLD_TRANS_DEBUG) || defined(RLD_RXACT_DEBUG)
446 {
447 static int hereb4 = 7;
448
449 if (hereb4) /* RLD DEBUG */
450 {
451 hereb4--;
452#ifdef RLD_TRANS_DEBUG
453 md = &ch->mdr[ch->rxix_irq_srv];
454 pr_info("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n",
455 ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status),
456 ch->s.rx_packets);
457#elif defined(RLD_RXACT_DEBUG)
458 md = &ch->mdr[ch->rxix_irq_srv];
459 pr_info("++ musycc_wq_chan_restart[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n",
460 ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status),
461 ch->s.rx_packets);
462 musycc_dump_rxbuffer_ring (ch, 1); /* RLD DEBUG */
463#endif
464 }
465 }
466#endif
467 musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | ch->gchan);
468 }
469 /**********************************/
470 /** check for TX restart request **/
471 /**********************************/
472
473 if ((ch->ch_start_tx) && (ch->status & TX_ENABLED))
474 {
475 /* find next unprocessed message, then set TX thp to it */
476 musycc_update_tx_thp (ch);
477
478#if 0
479 spin_lock_irqsave (&ch->ch_txlock, flags);
480#endif
481 md = ch->txd_irq_srv;
482 if (!md)
483 {
484#ifdef RLD_TRANS_DEBUG
485 pr_info("-- musycc_wq_chan_restart[%d]: WARNING, starting NULL md\n", ch->channum);
486#endif
487#if 0
488 spin_unlock_irqrestore (&ch->ch_txlock, flags);
489#endif
490 } else if (md->data && ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED))
491 {
492 ch->ch_start_tx = 0;
493#if 0
494 spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for service request */
495#endif
496#ifdef RLD_TRANS_DEBUG
497 pr_info("++ musycc_wq_chan_restart() CHAN TX ACTIVATE: chan %d txd_irq_srv %p = sts %x, txpkt %lu\n",
498 ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status, ch->s.tx_packets);
499#endif
500 musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION | ch->gchan);
501 }
502#ifdef RLD_RESTART_DEBUG
503 else
504 {
505 /* retain request to start until retried and we have data to xmit */
506 pr_info("-- musycc_wq_chan_restart[%d]: DELAYED due to md %p sts %x data %x, start_tx %x\n",
507 ch->channum, md,
508 le32_to_cpu (md->status),
509 le32_to_cpu (md->data), ch->ch_start_tx);
510 musycc_dump_txbuffer_ring (ch, 0);
511#if 0
512 spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for service request */
513#endif
514 }
515#endif
516 }
517}
518#endif
519
520
521 /*
522 * Channel restart either fires of a workqueue request (2.6) or lodges a
523 * watchdog activation sequence (2.4).
524 */
525
526void
527musycc_chan_restart (mch_t * ch)
528{
529#ifdef RLD_RESTART_DEBUG
530 pr_info("++ musycc_chan_restart[%d]: txd_irq_srv @ %p = sts %x\n",
531 ch->channum, ch->txd_irq_srv, ch->txd_irq_srv->status);
532#endif
533
534#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
535 /* 2.6 - find next unprocessed message, then set TX thp to it */
536#ifdef RLD_RESTART_DEBUG
537 pr_info(">> musycc_chan_restart: scheduling Chan %x workQ @ %p\n", ch->channum, &ch->ch_work);
538#endif
539 c4_wk_chan_restart (ch); /* work queue mechanism fires off: Ref:
540 * musycc_wq_chan_restart () */
541
542#else
543
544
545 /* 2.4 - find next unprocessed message, then set TX thp to it */
546#ifdef RLD_RESTART_DEBUG
547 pr_info(">> musycc_chan_restart: scheduling Chan %x start_tx %x\n", ch->channum, ch->ch_start_tx);
548#endif
549 /* restart transmission from background loop */
550 ch->up->up->wd_notify = WD_NOTIFY_1TX;
551#endif
552}
553
554
555#if 0
556void
557musycc_cleanup (ci_t * ci)
558{
559 mpi_t *pi;
560 int i, j;
561
562 /* free up driver resources */
563 ci->state = C_INIT; /* mark as hardware not available */
564
565 for (i = 0; i < ci->max_ports; i++)
566 {
567 pi = &ci->port[i];
568#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
569 c4_wq_port_cleanup (pi);
570#endif
571 for (j = 0; j < MUSYCC_NCHANS; j++)
572 {
573 if (pi->chan[j])
574 OS_kfree (pi->chan[j]); /* free mch_t struct */
575 }
576 OS_kfree (pi->regram_saved);
577 }
578#if 0
579 /* obsolete - watchdog is now static w/in ci_t */
580 OS_free_watchdog (ci->wd);
581#endif
582 OS_kfree (ci->iqd_p_saved);
583 OS_kfree (ci);
584}
585#endif
586
587void
588rld_put_led (mpi_t * pi, u_int32_t ledval)
589{
590 static u_int32_t led = 0;
591
592 if (ledval == 0)
593 led = 0;
594 else
595 led |= ledval;
596
597 pci_write_32 ((u_int32_t *) &pi->up->cpldbase->leds, led); /* RLD DEBUG TRANHANG */
598}
599
600
601#define MUSYCC_SR_RETRY_CNT 9
602
603void
604musycc_serv_req (mpi_t * pi, u_int32_t req)
605{
606 volatile u_int32_t r;
607 int rcnt;
608
609 /*
610 * PORT NOTE: Semaphore protect service loop guarantees only a single
611 * operation at a time. Per MUSYCC Manual - "Issuing service requests to
612 * the same channel group without first receiving ACK from each request
613 * may cause the host to lose track of which service request has been
614 * acknowledged."
615 */
616
617 SD_SEM_TAKE (&pi->sr_sem_busy, "serv"); /* only 1 thru here, per
618 * group */
619
620 if (pi->sr_last == req)
621 {
622#ifdef RLD_TRANS_DEBUG
623 pr_info(">> same SR, Port %d Req %x\n", pi->portnum, req);
624#endif
625
626 /*
627 * The most likely repeated request is the channel activation command
628 * which follows the occurrence of a Transparent mode TX ONR or a
629 * BUFF error. If the previous command was a CHANNEL ACTIVATE,
630 * precede it with a NOOP command in order maintain coherent control
631 * of this current (re)ACTIVATE.
632 */
633
634 r = (pi->sr_last & ~SR_GCHANNEL_MASK);
635 if ((r == (SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION)) ||
636 (r == (SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION)))
637 {
638#ifdef RLD_TRANS_DEBUG
639 pr_info(">> same CHAN ACT SR, Port %d Req %x => issue SR_NOOP CMD\n", pi->portnum, req);
640#endif
641 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow this next request */
642 musycc_serv_req (pi, SR_NOOP);
643 SD_SEM_TAKE (&pi->sr_sem_busy, "serv"); /* relock & continue w/
644 * original req */
645 } else if (req == SR_NOOP)
646 {
647 /* no need to issue back-to-back SR_NOOP commands at this time */
648#ifdef RLD_TRANS_DEBUG
649 pr_info(">> same Port SR_NOOP skipped, Port %d\n", pi->portnum);
650#endif
651 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow this next request */
652 return;
653 }
654 }
655 rcnt = 0;
656 pi->sr_last = req;
657rewrite:
658 pci_write_32 ((u_int32_t *) &pi->reg->srd, req);
659 FLUSH_MEM_WRITE ();
660
661 /*
662 * Per MUSYCC Manual, Section 6.1,2 - "When writing an SCR service
663 * request, the host must ensure at least one PCI bus clock cycle has
664 * elapsed before writing another service request. To meet this minimum
665 * elapsed service request write timing interval, it is recommended that
666 * the host follow any SCR write with another operation which reads from
667 * the same address."
668 */
669 r = pci_read_32 ((u_int32_t *) &pi->reg->srd); /* adhere to write
670 * timing imposition */
671
672
673 if ((r != req) && (req != SR_CHIP_RESET) && (++rcnt <= MUSYCC_SR_RETRY_CNT))
674 {
675 if (log_level >= LOG_MONITOR)
676 pr_info("%s: %d - reissue srv req/last %x/%x (hdw reads %x), Chan %d.\n",
677 pi->up->devname, rcnt, req, pi->sr_last, r,
678 (pi->portnum * MUSYCC_NCHANS) + (req & 0x1f));
679 OS_uwait_dummy (); /* this delay helps reduce reissue counts
680 * (reason not yet researched) */
681 goto rewrite;
682 }
683 if (rcnt > MUSYCC_SR_RETRY_CNT)
684 {
685 pr_warning("%s: failed service request (#%d)= %x, group %d.\n",
686 pi->up->devname, MUSYCC_SR_RETRY_CNT, req, pi->portnum);
687 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow any next request */
688 return;
689 }
690 if (req == SR_CHIP_RESET)
691 {
692 /*
693 * PORT NOTE: the CHIP_RESET command is NOT ack'd by the MUSYCC, thus
694 * the upcoming delay is used. Though the MUSYCC documentation
695 * suggests a read-after-write would supply the required delay, it's
696 * unclear what CPU/BUS clock speeds might have been assumed when
697 * suggesting this 'lack of ACK' workaround. Thus the use of uwait.
698 */
699 OS_uwait (100000, "icard"); /* 100ms */
700 } else
701 {
702 FLUSH_MEM_READ ();
703 SD_SEM_TAKE (&pi->sr_sem_wait, "sakack"); /* sleep until SACK
704 * interrupt occurs */
705 }
706 SD_SEM_GIVE (&pi->sr_sem_busy); /* allow any next request */
707}
708
709
710#ifdef SBE_PMCC4_ENABLE
711void
712musycc_update_timeslots (mpi_t * pi)
713{
714 int i, ch;
715 char e1mode = IS_FRAME_ANY_E1 (pi->p.port_mode);
716
717 for (i = 0; i < 32; i++)
718 {
719 int usedby = 0, last = 0, ts, j, bits[8];
720
721 u_int8_t lastval = 0;
722
723 if (((i == 0) && e1mode) || /* disable if E1 mode */
724 ((i == 16) && ((pi->p.port_mode == CFG_FRAME_E1CRC_CAS) || (pi->p.port_mode == CFG_FRAME_E1CRC_CAS_AMI)))
725 || ((i > 23) && (!e1mode))) /* disable if T1 mode */
726 {
727 pi->tsm[i] = 0xff; /* make tslot unavailable for this mode */
728 } else
729 {
730 pi->tsm[i] = 0x00; /* make tslot available for assignment */
731 }
732 for (j = 0; j < 8; j++)
733 bits[j] = -1;
734 for (ch = 0; ch < MUSYCC_NCHANS; ch++)
735 {
736 if ((pi->chan[ch]->state == UP) && (pi->chan[ch]->p.bitmask[i]))
737 {
738 usedby++;
739 last = ch;
740 lastval = pi->chan[ch]->p.bitmask[i];
741 for (j = 0; j < 8; j++)
742 if (lastval & (1 << j))
743 bits[j] = ch;
744 pi->tsm[i] |= lastval;
745 }
746 }
747 if (!usedby)
748 ts = 0;
749 else if ((usedby == 1) && (lastval == 0xff))
750 ts = (4 << 5) | last;
751 else if ((usedby == 1) && (lastval == 0x7f))
752 ts = (5 << 5) | last;
753 else
754 {
755 int idx;
756
757 if (bits[0] < 0)
758 ts = (6 << 5) | (idx = last);
759 else
760 ts = (7 << 5) | (idx = bits[0]);
761 for (j = 1; j < 8; j++)
762 {
763 pi->regram->rscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]);
764 pi->regram->tscm[idx * 8 + j] = (bits[j] < 0) ? 0 : (0x80 | bits[j]);
765 }
766 }
767 pi->regram->rtsm[i] = ts;
768 pi->regram->ttsm[i] = ts;
769 }
770 FLUSH_MEM_WRITE ();
771
772 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION);
773 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION);
774 musycc_serv_req (pi, SR_SUBCHANNEL_MAP | SR_RX_DIRECTION);
775 musycc_serv_req (pi, SR_SUBCHANNEL_MAP | SR_TX_DIRECTION);
776}
777#endif
778
779
780#ifdef SBE_WAN256T3_ENABLE
781void
782musycc_update_timeslots (mpi_t * pi)
783{
784 mch_t *ch;
785
786 u_int8_t ts, hmask, tsen;
787 int gchan;
788 int i;
789
790#ifdef SBE_PMCC4_ENABLE
791 hmask = (0x1f << pi->up->p.hypersize) & 0x1f;
792#endif
793#ifdef SBE_WAN256T3_ENABLE
794 hmask = (0x1f << hyperdummy) & 0x1f;
795#endif
796 for (i = 0; i < 128; i++)
797 {
798 gchan = ((pi->portnum * MUSYCC_NCHANS) + (i & hmask)) % MUSYCC_NCHANS;
799 ch = pi->chan[gchan];
800 if (ch->p.mode_56k)
801 tsen = MODE_56KBPS;
802 else
803 tsen = MODE_64KBPS; /* also the default */
804 ts = ((pi->portnum % 4) == (i / 32)) ? (tsen << 5) | (i & hmask) : 0;
805 pi->regram->rtsm[i] = ts;
806 pi->regram->ttsm[i] = ts;
807 }
808 FLUSH_MEM_WRITE ();
809 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_RX_DIRECTION);
810 musycc_serv_req (pi, SR_TIMESLOT_MAP | SR_TX_DIRECTION);
811}
812#endif
813
814
815 /*
816 * This routine converts a generic library channel configuration parameter
817 * into a hardware specific register value (IE. MUSYCC CCD Register).
818 */
819u_int32_t
820musycc_chan_proto (int proto)
821{
822 int reg;
823
824 switch (proto)
825 {
826 case CFG_CH_PROTO_TRANS: /* 0 */
827 reg = MUSYCC_CCD_TRANS;
828 break;
829 case CFG_CH_PROTO_SS7: /* 1 */
830 reg = MUSYCC_CCD_SS7;
831 break;
832 default:
833 case CFG_CH_PROTO_ISLP_MODE: /* 4 */
834 case CFG_CH_PROTO_HDLC_FCS16: /* 2 */
835 reg = MUSYCC_CCD_HDLC_FCS16;
836 break;
837 case CFG_CH_PROTO_HDLC_FCS32: /* 3 */
838 reg = MUSYCC_CCD_HDLC_FCS32;
839 break;
840 }
841
842 return reg;
843}
844
845#ifdef SBE_WAN256T3_ENABLE
846STATIC void __init
847musycc_init_port (mpi_t * pi)
848{
849 pci_write_32 ((u_int32_t *) &pi->reg->gbp, OS_vtophys (pi->regram));
850
851 pi->regram->grcd =
852 __constant_cpu_to_le32 (MUSYCC_GRCD_RX_ENABLE |
853 MUSYCC_GRCD_TX_ENABLE |
854 MUSYCC_GRCD_SF_ALIGN |
855 MUSYCC_GRCD_SUBCHAN_DISABLE |
856 MUSYCC_GRCD_OOFMP_DISABLE |
857 MUSYCC_GRCD_COFAIRQ_DISABLE |
858 MUSYCC_GRCD_MC_ENABLE |
859 (MUSYCC_GRCD_POLLTH_32 << MUSYCC_GRCD_POLLTH_SHIFT));
860
861 pi->regram->pcd =
862 __constant_cpu_to_le32 (MUSYCC_PCD_E1X4_MODE |
863 MUSYCC_PCD_TXDATA_RISING |
864 MUSYCC_PCD_TX_DRIVEN);
865
866 /* Message length descriptor */
867 pi->regram->mld = __constant_cpu_to_le32 (max_mru | (max_mru << 16));
868 FLUSH_MEM_WRITE ();
869
870 musycc_serv_req (pi, SR_GROUP_INIT | SR_RX_DIRECTION);
871 musycc_serv_req (pi, SR_GROUP_INIT | SR_TX_DIRECTION);
872
873 musycc_init_mdt (pi);
874
875 musycc_update_timeslots (pi);
876}
877#endif
878
879
880status_t __init
881musycc_init (ci_t * ci)
882{
883 char *regaddr; /* temp for address boundary calculations */
884 int i, gchan;
885
886 OS_sem_init (&ci->sem_wdbusy, SEM_AVAILABLE); /* watchdog exclusion */
887
888 /*
889 * Per MUSYCC manual, Section 6.3.4 - "The host must allocate a dword
890 * aligned memory segment for interrupt queue pointers."
891 */
892
893#define INT_QUEUE_BOUNDARY 4
894
895 regaddr = OS_kmalloc ((INT_QUEUE_SIZE + 1) * sizeof (u_int32_t));
896 if (regaddr == 0)
897 return ENOMEM;
898 ci->iqd_p_saved = regaddr; /* save orig value for free's usage */
899 ci->iqd_p = (u_int32_t *) ((unsigned long) (regaddr + INT_QUEUE_BOUNDARY - 1) &
900 (~(INT_QUEUE_BOUNDARY - 1))); /* this calculates
901 * closest boundary */
902
903 for (i = 0; i < INT_QUEUE_SIZE; i++)
904 {
905 ci->iqd_p[i] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY);
906 }
907
908 for (i = 0; i < ci->max_port; i++)
909 {
910 mpi_t *pi = &ci->port[i];
911
912 /*
913 * Per MUSYCC manual, Section 6.3.2 - "The host must allocate a 2KB
914 * bound memory segment for Channel Group 0."
915 */
916
917#define GROUP_BOUNDARY 0x800
918
919 regaddr = OS_kmalloc (sizeof (struct musycc_groupr) + GROUP_BOUNDARY);
920 if (regaddr == 0)
921 {
922 for (gchan = 0; gchan < i; gchan++)
923 {
924 pi = &ci->port[gchan];
925 OS_kfree (pi->reg);
926 pi->reg = 0;
927 }
928 return ENOMEM;
929 }
930 pi->regram_saved = regaddr; /* save orig value for free's usage */
931 pi->regram = (struct musycc_groupr *) ((unsigned long) (regaddr + GROUP_BOUNDARY - 1) &
932 (~(GROUP_BOUNDARY - 1))); /* this calculates
933 * closest boundary */
934 }
935
936 /* any board centric MUSYCC commands will use group ZERO as its "home" */
937 ci->regram = ci->port[0].regram;
938 musycc_serv_req (&ci->port[0], SR_CHIP_RESET);
939
940 pci_write_32 ((u_int32_t *) &ci->reg->gbp, OS_vtophys (ci->regram));
941 pci_flush_write (ci);
942#ifdef CONFIG_SBE_PMCC4_NCOMM
943 ci->regram->__glcd = __constant_cpu_to_le32 (GCD_MAGIC);
944#else
945 /* standard driver POLLS for INTB via CPLD register */
946 ci->regram->__glcd = __constant_cpu_to_le32 (GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE);
947#endif
948
949 ci->regram->__iqp = cpu_to_le32 (OS_vtophys (&ci->iqd_p[0]));
950 ci->regram->__iql = __constant_cpu_to_le32 (INT_QUEUE_SIZE - 1);
951 pci_write_32 ((u_int32_t *) &ci->reg->dacbp, 0);
952 FLUSH_MEM_WRITE ();
953
954 ci->state = C_RUNNING; /* mark as full interrupt processing
955 * available */
956
957 musycc_serv_req (&ci->port[0], SR_GLOBAL_INIT); /* FIRST INTERRUPT ! */
958
959 /* sanity check settable parameters */
960
961 if (max_mru > 0xffe)
962 {
963 pr_warning("Maximum allowed MRU exceeded, resetting %d to %d.\n",
964 max_mru, 0xffe);
965 max_mru = 0xffe;
966 }
967 if (max_mtu > 0xffe)
968 {
969 pr_warning("Maximum allowed MTU exceeded, resetting %d to %d.\n",
970 max_mtu, 0xffe);
971 max_mtu = 0xffe;
972 }
973#ifdef SBE_WAN256T3_ENABLE
974 for (i = 0; i < MUSYCC_NPORTS; i++)
975 musycc_init_port (&ci->port[i]);
976#endif
977
978 return SBE_DRVR_SUCCESS; /* no error */
979}
980
981
982void
983musycc_bh_tx_eom (mpi_t * pi, int gchan)
984{
985 mch_t *ch;
986 struct mdesc *md;
987
988#if 0
989#ifndef SBE_ISR_INLINE
990 unsigned long flags;
991
992#endif
993#endif
994 volatile u_int32_t status;
995
996 ch = pi->chan[gchan];
997 if (ch == 0 || ch->state != UP)
998 {
999 if (log_level >= LOG_ERROR)
1000 pr_info("%s: intr: xmit EOM on uninitialized channel %d\n",
1001 pi->up->devname, gchan);
1002 }
1003 if (ch == 0 || ch->mdt == 0)
1004 return; /* note: mdt==0 implies a malloc()
1005 * failure w/in chan_up() routine */
1006
1007#if 0
1008#ifdef SBE_ISR_INLINE
1009 spin_lock_irq (&ch->ch_txlock);
1010#else
1011 spin_lock_irqsave (&ch->ch_txlock, flags);
1012#endif
1013#endif
1014 do
1015 {
1016 FLUSH_MEM_READ ();
1017 md = ch->txd_irq_srv;
1018 status = le32_to_cpu (md->status);
1019
1020 /*
1021 * Note: Per MUSYCC Ref 6.4.9, the host does not poll a host-owned
1022 * Transmit Buffer Descriptor during Transparent Mode.
1023 */
1024 if (status & MUSYCC_TX_OWNED)
1025 {
1026 int readCount, loopCount;
1027
1028 /***********************************************************/
1029 /* HW Bug Fix */
1030 /* ---------- */
1031 /* Under certain PCI Bus loading conditions, the data */
1032 /* associated with an update of Shared Memory is delayed */
1033 /* relative to its PCI Interrupt. This is caught when */
1034 /* the host determines it does not yet OWN the descriptor. */
1035 /***********************************************************/
1036
1037 readCount = 0;
1038 while (status & MUSYCC_TX_OWNED)
1039 {
1040 for (loopCount = 0; loopCount < 0x30; loopCount++)
1041 OS_uwait_dummy (); /* use call to avoid optimization
1042 * removal of dummy delay */
1043 FLUSH_MEM_READ ();
1044 status = le32_to_cpu (md->status);
1045 if (readCount++ > 40)
1046 break; /* don't wait any longer */
1047 }
1048 if (status & MUSYCC_TX_OWNED)
1049 {
1050 if (log_level >= LOG_MONITOR)
1051 {
1052 pr_info("%s: Port %d Chan %2d - unexpected TX msg ownership intr (md %p sts %x)\n",
1053 pi->up->devname, pi->portnum, ch->channum,
1054 md, status);
1055 pr_info("++ User 0x%p IRQ_SRV 0x%p USR_ADD 0x%p QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n",
1056 ch->user, ch->txd_irq_srv, ch->txd_usr_add,
1057 sd_queue_stopped (ch->user),
1058 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode);
1059 musycc_dump_txbuffer_ring (ch, 0);
1060 }
1061 break; /* Not our mdesc, done */
1062 } else
1063 {
1064 if (log_level >= LOG_MONITOR)
1065 pr_info("%s: Port %d Chan %2d - recovered TX msg ownership [%d] (md %p sts %x)\n",
1066 pi->up->devname, pi->portnum, ch->channum, readCount, md, status);
1067 }
1068 }
1069 ch->txd_irq_srv = md->snext;
1070
1071 md->data = 0;
1072 if (md->mem_token != 0)
1073 {
1074 /* upcount channel */
1075 atomic_sub (OS_mem_token_tlen (md->mem_token), &ch->tx_pending);
1076 /* upcount card */
1077 atomic_sub (OS_mem_token_tlen (md->mem_token), &pi->up->tx_pending);
1078#ifdef SBE_WAN256T3_ENABLE
1079 if (!atomic_read (&pi->up->tx_pending))
1080 wan256t3_led (pi->up, LED_TX, 0);
1081#endif
1082
1083#ifdef CONFIG_SBE_WAN256T3_NCOMM
1084 /* callback that our packet was sent */
1085 {
1086 int hdlcnum = (pi->portnum * 32 + gchan);
1087
1088 if (hdlcnum >= 228)
1089 {
1090 if (nciProcess_TX_complete)
1091 (*nciProcess_TX_complete) (hdlcnum,
1092 getuserbychan (gchan));
1093 }
1094 }
1095#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/
1096
1097 OS_mem_token_free_irq (md->mem_token);
1098 md->mem_token = 0;
1099 }
1100 md->status = 0;
1101#ifdef RLD_TXFULL_DEBUG
1102 if (log_level >= LOG_MONITOR2)
1103 pr_info("~~ tx_eom: tx_full %x txd_free %d -> %d\n",
1104 ch->tx_full, ch->txd_free, ch->txd_free + 1);
1105#endif
1106 ++ch->txd_free;
1107 FLUSH_MEM_WRITE ();
1108
1109 if ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && (status & EOBIRQ_ENABLE))
1110 {
1111 if (log_level >= LOG_MONITOR)
1112 pr_info("%s: Mode (%x) incorrect EOB status (%x)\n",
1113 pi->up->devname, ch->p.chan_mode, status);
1114 if ((status & EOMIRQ_ENABLE) == 0)
1115 break;
1116 }
1117 }
1118 while ((ch->p.chan_mode != CFG_CH_PROTO_TRANS) && ((status & EOMIRQ_ENABLE) == 0));
1119 /*
1120 * NOTE: (The above 'while' is coupled w/ previous 'do', way above.) Each
1121 * Transparent data buffer has the EOB bit, and NOT the EOM bit, set and
1122 * will furthermore have a separate IQD associated with each messages
1123 * buffer.
1124 */
1125
1126 FLUSH_MEM_READ ();
1127 /*
1128 * Smooth flow control hysterisis by maintaining task stoppage until half
1129 * the available write buffers are available.
1130 */
1131 if (ch->tx_full && (ch->txd_free >= (ch->txd_num / 2)))
1132 {
1133 /*
1134 * Then, only releave task stoppage if we actually have enough
1135 * buffers to service the last requested packet. It may require MORE
1136 * than half the available!
1137 */
1138 if (ch->txd_free >= ch->txd_required)
1139 {
1140
1141#ifdef RLD_TXFULL_DEBUG
1142 if (log_level >= LOG_MONITOR2)
1143 pr_info("tx_eom[%d]: enable xmit tx_full no more, txd_free %d txd_num/2 %d\n",
1144 ch->channum,
1145 ch->txd_free, ch->txd_num / 2);
1146#endif
1147 ch->tx_full = 0;
1148 ch->txd_required = 0;
1149 sd_enable_xmit (ch->user); /* re-enable to catch flow controlled
1150 * channel */
1151 }
1152 }
1153#ifdef RLD_TXFULL_DEBUG
1154 else if (ch->tx_full)
1155 {
1156 if (log_level >= LOG_MONITOR2)
1157 pr_info("tx_eom[%d]: bypass TX enable though room available? (txd_free %d txd_num/2 %d)\n",
1158 ch->channum,
1159 ch->txd_free, ch->txd_num / 2);
1160 }
1161#endif
1162
1163 FLUSH_MEM_WRITE ();
1164#if 0
1165#ifdef SBE_ISR_INLINE
1166 spin_unlock_irq (&ch->ch_txlock);
1167#else
1168 spin_unlock_irqrestore (&ch->ch_txlock, flags);
1169#endif
1170#endif
1171}
1172
1173
1174STATIC void
1175musycc_bh_rx_eom (mpi_t * pi, int gchan)
1176{
1177 mch_t *ch;
1178 void *m, *m2;
1179 struct mdesc *md;
1180 volatile u_int32_t status;
1181 u_int32_t error;
1182
1183 ch = pi->chan[gchan];
1184 if (ch == 0 || ch->state != UP)
1185 {
1186 if (log_level > LOG_ERROR)
1187 pr_info("%s: intr: receive EOM on uninitialized channel %d\n",
1188 pi->up->devname, gchan);
1189 return;
1190 }
1191 if (ch->mdr == 0)
1192 return; /* can this happen ? */
1193
1194 for (;;)
1195 {
1196 FLUSH_MEM_READ ();
1197 md = &ch->mdr[ch->rxix_irq_srv];
1198 status = le32_to_cpu (md->status);
1199 if (!(status & HOST_RX_OWNED))
1200 break; /* Not our mdesc, done */
1201 m = md->mem_token;
1202 error = (status >> 16) & 0xf;
1203 if (error == 0)
1204 {
1205#ifdef CONFIG_SBE_WAN256T3_NCOMM
1206 int hdlcnum = (pi->portnum * 32 + gchan);
1207
1208 /*
1209 * if the packet number belongs to NCOMM, then send it to the TMS
1210 * driver
1211 */
1212 if (hdlcnum >= 228)
1213 {
1214 if (nciProcess_RX_packet)
1215 (*nciProcess_RX_packet) (hdlcnum, status & 0x3fff, m, ch->user);
1216 } else
1217#endif /*** CONFIG_SBE_WAN256T3_NCOMM ***/
1218
1219 {
1220 if ((m2 = OS_mem_token_alloc (max_mru)))
1221 {
1222 /* substitute the mbuf+cluster */
1223 md->mem_token = m2;
1224 md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m2)));
1225
1226 /* pass the received mbuf upward */
1227 sd_recv_consume (m, status & LENGTH_MASK, ch->user);
1228 ch->s.rx_packets++;
1229 ch->s.rx_bytes += status & LENGTH_MASK;
1230 } else
1231 {
1232 ch->s.rx_dropped++;
1233 }
1234 }
1235 } else if (error == ERR_FCS)
1236 {
1237 ch->s.rx_crc_errors++;
1238 } else if (error == ERR_ALIGN)
1239 {
1240 ch->s.rx_missed_errors++;
1241 } else if (error == ERR_ABT)
1242 {
1243 ch->s.rx_missed_errors++;
1244 } else if (error == ERR_LNG)
1245 {
1246 ch->s.rx_length_errors++;
1247 } else if (error == ERR_SHT)
1248 {
1249 ch->s.rx_length_errors++;
1250 }
1251 FLUSH_MEM_WRITE ();
1252 status = max_mru;
1253 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1254 status |= EOBIRQ_ENABLE;
1255 md->status = cpu_to_le32 (status);
1256
1257 /* Check next mdesc in the ring */
1258 if (++ch->rxix_irq_srv >= ch->rxd_num)
1259 ch->rxix_irq_srv = 0;
1260 FLUSH_MEM_WRITE ();
1261 }
1262}
1263
1264
1265irqreturn_t
1266musycc_intr_th_handler (void *devp)
1267{
1268 ci_t *ci = (ci_t *) devp;
1269 volatile u_int32_t status, currInt = 0;
1270 u_int32_t nextInt, intCnt;
1271
1272 /*
1273 * Hardware not available, potential interrupt hang. But since interrupt
1274 * might be shared, just return.
1275 */
1276 if (ci->state == C_INIT)
1277 {
1278 return IRQ_NONE;
1279 }
1280 /*
1281 * Marked as hardware available. Don't service interrupts, just clear the
1282 * event.
1283 */
1284
1285 if (ci->state == C_IDLE)
1286 {
1287 status = pci_read_32 ((u_int32_t *) &ci->reg->isd);
1288
1289 /* clear the interrupt but process nothing else */
1290 pci_write_32 ((u_int32_t *) &ci->reg->isd, status);
1291 return IRQ_HANDLED;
1292 }
1293 FLUSH_PCI_READ ();
1294 FLUSH_MEM_READ ();
1295
1296 status = pci_read_32 ((u_int32_t *) &ci->reg->isd);
1297 nextInt = INTRPTS_NEXTINT (status);
1298 intCnt = INTRPTS_INTCNT (status);
1299 ci->intlog.drvr_intr_thcount++;
1300
1301 /*********************************************************/
1302 /* HW Bug Fix */
1303 /* ---------- */
1304 /* Under certain PCI Bus loading conditions, the */
1305 /* MUSYCC looses the data associated with an update */
1306 /* of its ISD and erroneously returns the immediately */
1307 /* preceding 'nextInt' value. However, the 'intCnt' */
1308 /* value appears to be correct. By not starting service */
1309 /* where the 'missing' 'nextInt' SHOULD point causes */
1310 /* the IQD not to be serviced - the 'not serviced' */
1311 /* entries then remain and continue to increase as more */
1312 /* incorrect ISD's are encountered. */
1313 /*********************************************************/
1314
1315 if (nextInt != INTRPTS_NEXTINT (ci->intlog.this_status_new))
1316 {
1317 if (log_level >= LOG_MONITOR)
1318 {
1319 pr_info("%s: note - updated ISD from %08x to %08x\n",
1320 ci->devname, status,
1321 (status & (~INTRPTS_NEXTINT_M)) | ci->intlog.this_status_new);
1322 }
1323 /*
1324 * Replace bogus status with software corrected value.
1325 *
1326 * It's not known whether, during this problem occurrence, if the
1327 * INTFULL bit is correctly reported or not.
1328 */
1329 status = (status & (~INTRPTS_NEXTINT_M)) | (ci->intlog.this_status_new);
1330 nextInt = INTRPTS_NEXTINT (status);
1331 }
1332 /**********************************************/
1333 /* Cn847x Bug Fix */
1334 /* -------------- */
1335 /* Fix for inability to write back same index */
1336 /* as read for a full interrupt queue. */
1337 /**********************************************/
1338
1339 if (intCnt == INT_QUEUE_SIZE)
1340 {
1341 currInt = ((intCnt - 1) + nextInt) & (INT_QUEUE_SIZE - 1);
1342 } else
1343 /************************************************/
1344 /* Interrupt Write Location Issues */
1345 /* ------------------------------- */
1346 /* When the interrupt status descriptor is */
1347 /* written, the interrupt line is de-asserted */
1348 /* by the Cn847x. In the case of MIPS */
1349 /* microprocessors, this must occur at the */
1350 /* beginning of the interrupt handler so that */
1351 /* the interrupt handle is not re-entered due */
1352 /* to interrupt dis-assertion latency. */
1353 /* In the case of all other processors, this */
1354 /* action should occur at the end of the */
1355 /* interrupt handler to avoid overwriting the */
1356 /* interrupt queue. */
1357 /************************************************/
1358
1359 if (intCnt)
1360 {
1361 currInt = (intCnt + nextInt) & (INT_QUEUE_SIZE - 1);
1362 } else
1363 {
1364 /*
1365 * NOTE: Servicing an interrupt whose ISD contains a count of ZERO
1366 * can be indicative of a Shared Interrupt chain. Our driver can be
1367 * called from the system's interrupt handler as a matter of the OS
1368 * walking the chain. As the chain is walked, the interrupt will
1369 * eventually be serviced by the correct driver/handler.
1370 */
1371#if 0
1372 /* chained interrupt = not ours */
1373 pr_info(">> %s: intCnt NULL, sts %x, possibly a chained interrupt!\n",
1374 ci->devname, status);
1375#endif
1376 return IRQ_NONE;
1377 }
1378
1379 ci->iqp_tailx = currInt;
1380
1381 currInt <<= INTRPTS_NEXTINT_S;
1382 ci->intlog.last_status_new = ci->intlog.this_status_new;
1383 ci->intlog.this_status_new = currInt;
1384
1385 if ((log_level >= LOG_WARN) && (status & INTRPTS_INTFULL_M))
1386 {
1387 pr_info("%s: Interrupt queue full condition occurred\n", ci->devname);
1388 }
1389 if (log_level >= LOG_DEBUG)
1390 pr_info("%s: interrupts pending, isd @ 0x%p: %x curr %d cnt %d NEXT %d\n",
1391 ci->devname, &ci->reg->isd,
1392 status, nextInt, intCnt, (intCnt + nextInt) & (INT_QUEUE_SIZE - 1));
1393
1394 FLUSH_MEM_WRITE ();
1395#if defined(SBE_ISR_TASKLET)
1396 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt);
1397 atomic_inc (&ci->bh_pending);
1398 tasklet_schedule (&ci->ci_musycc_isr_tasklet);
1399#elif defined(SBE_ISR_IMMEDIATE)
1400 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt);
1401 atomic_inc (&ci->bh_pending);
1402 queue_task (&ci->ci_musycc_isr_tq, &tq_immediate);
1403 mark_bh (IMMEDIATE_BH);
1404#elif defined(SBE_ISR_INLINE)
1405 (void) musycc_intr_bh_tasklet (ci);
1406 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt);
1407#endif
1408 return IRQ_HANDLED;
1409}
1410
1411
1412#if defined(SBE_ISR_IMMEDIATE)
1413unsigned long
1414#else
1415void
1416#endif
1417musycc_intr_bh_tasklet (ci_t * ci)
1418{
1419 mpi_t *pi;
1420 mch_t *ch;
1421 unsigned int intCnt;
1422 volatile u_int32_t currInt = 0;
1423 volatile unsigned int headx, tailx;
1424 int readCount, loopCount;
1425 int group, gchan, event, err, tx;
1426 u_int32_t badInt = INT_EMPTY_ENTRY;
1427 u_int32_t badInt2 = INT_EMPTY_ENTRY2;
1428
1429 /*
1430 * Hardware not available, potential interrupt hang. But since interrupt
1431 * might be shared, just return.
1432 */
1433 if ((drvr_state != SBE_DRVR_AVAILABLE) || (ci->state == C_INIT))
1434 {
1435#if defined(SBE_ISR_IMMEDIATE)
1436 return 0L;
1437#else
1438 return;
1439#endif
1440 }
1441#if defined(SBE_ISR_TASKLET) || defined(SBE_ISR_IMMEDIATE)
1442 if (drvr_state != SBE_DRVR_AVAILABLE)
1443 {
1444#if defined(SBE_ISR_TASKLET)
1445 return;
1446#elif defined(SBE_ISR_IMMEDIATE)
1447 return 0L;
1448#endif
1449 }
1450#elif defined(SBE_ISR_INLINE)
1451 /* no semaphore taken, no double checks */
1452#endif
1453
1454 ci->intlog.drvr_intr_bhcount++;
1455 FLUSH_MEM_READ ();
1456 {
1457 unsigned int bh = atomic_read (&ci->bh_pending);
1458
1459 max_bh = max (bh, max_bh);
1460 }
1461 atomic_set (&ci->bh_pending, 0);/* if here, no longer pending */
1462 while ((headx = ci->iqp_headx) != (tailx = ci->iqp_tailx))
1463 {
1464 intCnt = (tailx >= headx) ? (tailx - headx) : (tailx - headx + INT_QUEUE_SIZE);
1465 currInt = le32_to_cpu (ci->iqd_p[headx]);
1466
1467 max_intcnt = max (intCnt, max_intcnt); /* RLD DEBUG */
1468
1469 /**************************************************/
1470 /* HW Bug Fix */
1471 /* ---------- */
1472 /* The following code checks for the condition */
1473 /* of interrupt assertion before interrupt */
1474 /* queue update. This is a problem on several */
1475 /* PCI-Local bridge chips found on some products. */
1476 /**************************************************/
1477
1478 readCount = 0;
1479 if ((currInt == badInt) || (currInt == badInt2))
1480 ci->intlog.drvr_int_failure++;
1481
1482 while ((currInt == badInt) || (currInt == badInt2))
1483 {
1484 for (loopCount = 0; loopCount < 0x30; loopCount++)
1485 OS_uwait_dummy (); /* use call to avoid optimization removal
1486 * of dummy delay */
1487 FLUSH_MEM_READ ();
1488 currInt = le32_to_cpu (ci->iqd_p[headx]);
1489 if (readCount++ > 20)
1490 break;
1491 }
1492
1493 if ((currInt == badInt) || (currInt == badInt2)) /* catch failure of Bug
1494 * Fix checking */
1495 {
1496 if (log_level >= LOG_WARN)
1497 pr_info("%s: Illegal Interrupt Detected @ 0x%p, mod %d.)\n",
1498 ci->devname, &ci->iqd_p[headx], headx);
1499
1500 /*
1501 * If the descriptor has not recovered, then leaving the EMPTY
1502 * entry set will not signal to the MUSYCC that this descriptor
1503 * has been serviced. The Interrupt Queue can then start loosing
1504 * available descriptors and MUSYCC eventually encounters and
1505 * reports the INTFULL condition. Per manual, changing any bit
1506 * marks descriptor as available, thus the use of different
1507 * EMPTY_ENTRY values.
1508 */
1509
1510 if (currInt == badInt)
1511 {
1512 ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY2);
1513 } else
1514 {
1515 ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY);
1516 }
1517 ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */
1518 FLUSH_MEM_WRITE ();
1519 FLUSH_MEM_READ ();
1520 continue;
1521 }
1522 group = INTRPT_GRP (currInt);
1523 gchan = INTRPT_CH (currInt);
1524 event = INTRPT_EVENT (currInt);
1525 err = INTRPT_ERROR (currInt);
1526 tx = currInt & INTRPT_DIR_M;
1527
1528 ci->iqd_p[headx] = __constant_cpu_to_le32 (INT_EMPTY_ENTRY);
1529 FLUSH_MEM_WRITE ();
1530
1531 if (log_level >= LOG_DEBUG)
1532 {
1533 if (err != 0)
1534 pr_info(" %08x -> err: %2d,", currInt, err);
1535
1536 pr_info("+ interrupt event: %d, grp: %d, chan: %2d, side: %cX\n",
1537 event, group, gchan, tx ? 'T' : 'R');
1538 }
1539 pi = &ci->port[group]; /* notice that here we assume 1-1 group -
1540 * port mapping */
1541 ch = pi->chan[gchan];
1542 switch (event)
1543 {
1544 case EVE_SACK: /* Service Request Acknowledge */
1545 if (log_level >= LOG_DEBUG)
1546 {
1547 volatile u_int32_t r;
1548
1549 r = pci_read_32 ((u_int32_t *) &pi->reg->srd);
1550 pr_info("- SACK cmd: %08x (hdw= %08x)\n", pi->sr_last, r);
1551 }
1552 SD_SEM_GIVE (&pi->sr_sem_wait); /* wake up waiting process */
1553 break;
1554 case EVE_CHABT: /* Change To Abort Code (0x7e -> 0xff) */
1555 case EVE_CHIC: /* Change To Idle Code (0xff -> 0x7e) */
1556 break;
1557 case EVE_EOM: /* End Of Message */
1558 case EVE_EOB: /* End Of Buffer (Transparent mode) */
1559 if (tx)
1560 {
1561 musycc_bh_tx_eom (pi, gchan);
1562 } else
1563 {
1564 musycc_bh_rx_eom (pi, gchan);
1565 }
1566#if 0
1567 break;
1568#else
1569 /*
1570 * MUSYCC Interrupt Descriptor section states that EOB and EOM
1571 * can be combined with the NONE error (as well as others). So
1572 * drop thru to catch this...
1573 */
1574#endif
1575 case EVE_NONE:
1576 if (err == ERR_SHT)
1577 {
1578 ch->s.rx_length_errors++;
1579 }
1580 break;
1581 default:
1582 if (log_level >= LOG_WARN)
1583 pr_info("%s: unexpected interrupt event: %d, iqd[%d]: %08x, port: %d\n", ci->devname,
1584 event, headx, currInt, group);
1585 break;
1586 } /* switch on event */
1587
1588
1589 /*
1590 * Per MUSYCC Manual, Section 6.4.8.3 [Transmit Errors], TX errors
1591 * are service-affecting and require action to resume normal
1592 * bit-level processing.
1593 */
1594
1595 switch (err)
1596 {
1597 case ERR_ONR:
1598 /*
1599 * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors], this
1600 * error requires Transmit channel reactivation.
1601 *
1602 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], this error
1603 * requires Receive channel reactivation.
1604 */
1605 if (tx)
1606 {
1607
1608 /*
1609 * TX ONR Error only occurs when channel is configured for
1610 * Transparent Mode. However, this code will catch and
1611 * re-activate on ANY TX ONR error.
1612 */
1613
1614 /*
1615 * Set flag to re-enable on any next transmit attempt.
1616 */
1617 ch->ch_start_tx = CH_START_TX_ONR;
1618
1619 {
1620#ifdef RLD_TRANS_DEBUG
1621 if (1 || log_level >= LOG_MONITOR)
1622#else
1623 if (log_level >= LOG_MONITOR)
1624#endif
1625 {
1626 pr_info("%s: TX buffer underflow [ONR] on channel %d, mode %x QStopped %x free %d\n",
1627 ci->devname, ch->channum, ch->p.chan_mode, sd_queue_stopped (ch->user), ch->txd_free);
1628#ifdef RLD_DEBUG
1629 if (ch->p.chan_mode == 2) /* problem = ONR on HDLC
1630 * mode */
1631 {
1632 pr_info("++ Failed Last %x Next %x QStopped %x, start_tx %x tx_full %d txd_free %d mode %x\n",
1633 (u_int32_t) ch->txd_irq_srv, (u_int32_t) ch->txd_usr_add,
1634 sd_queue_stopped (ch->user),
1635 ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode);
1636 musycc_dump_txbuffer_ring (ch, 0);
1637 }
1638#endif
1639 }
1640 }
1641 } else /* RX buffer overrun */
1642 {
1643 /*
1644 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors],
1645 * channel recovery for this RX ONR error IS required. It is
1646 * also suggested to increase the number of receive buffers
1647 * for this channel. Receive channel reactivation IS
1648 * required, and data has been lost.
1649 */
1650 ch->s.rx_over_errors++;
1651 ch->ch_start_rx = CH_START_RX_ONR;
1652
1653 if (log_level >= LOG_WARN)
1654 {
1655 pr_info("%s: RX buffer overflow [ONR] on channel %d, mode %x\n",
1656 ci->devname, ch->channum, ch->p.chan_mode);
1657 //musycc_dump_rxbuffer_ring (ch, 0); /* RLD DEBUG */
1658 }
1659 }
1660 musycc_chan_restart (ch);
1661 break;
1662 case ERR_BUF:
1663 if (tx)
1664 {
1665 ch->s.tx_fifo_errors++;
1666 ch->ch_start_tx = CH_START_TX_BUF;
1667 /*
1668 * Per MUSYCC manual, Section 6.4.8.3 [Transmit Errors],
1669 * this BUFF error requires Transmit channel reactivation.
1670 */
1671 if (log_level >= LOG_MONITOR)
1672 pr_info("%s: TX buffer underrun [BUFF] on channel %d, mode %x\n",
1673 ci->devname, ch->channum, ch->p.chan_mode);
1674 } else /* RX buffer overrun */
1675 {
1676 ch->s.rx_over_errors++;
1677 /*
1678 * Per MUSYCC manual, Section 6.4.8.4 [Receive Errors], HDLC
1679 * mode requires NO recovery for this RX BUFF error is
1680 * required. It is suggested to increase the FIFO buffer
1681 * space for this channel. Receive channel reactivation is
1682 * not required, but data has been lost.
1683 */
1684 if (log_level >= LOG_WARN)
1685 pr_info("%s: RX buffer overrun [BUFF] on channel %d, mode %x\n",
1686 ci->devname, ch->channum, ch->p.chan_mode);
1687 /*
1688 * Per MUSYCC manual, Section 6.4.9.4 [Receive Errors],
1689 * Transparent mode DOES require recovery for the RX BUFF
1690 * error. It is suggested to increase the FIFO buffer space
1691 * for this channel. Receive channel reactivation IS
1692 * required and data has been lost.
1693 */
1694 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1695 ch->ch_start_rx = CH_START_RX_BUF;
1696 }
1697
1698 if (tx || (ch->p.chan_mode == CFG_CH_PROTO_TRANS))
1699 musycc_chan_restart (ch);
1700 break;
1701 default:
1702 break;
1703 } /* switch on err */
1704
1705 /* Check for interrupt lost condition */
1706 if ((currInt & INTRPT_ILOST_M) && (log_level >= LOG_ERROR))
1707 {
1708 pr_info("%s: Interrupt queue overflow - ILOST asserted\n",
1709 ci->devname);
1710 }
1711 ci->iqp_headx = (headx + 1) & (INT_QUEUE_SIZE - 1); /* insure wrapness */
1712 FLUSH_MEM_WRITE ();
1713 FLUSH_MEM_READ ();
1714 } /* while */
1715 if ((log_level >= LOG_MONITOR2) && (ci->iqp_headx != ci->iqp_tailx))
1716 {
1717 int bh;
1718
1719 bh = atomic_read (&CI->bh_pending);
1720 pr_info("_bh_: late arrivals, head %d != tail %d, pending %d\n",
1721 ci->iqp_headx, ci->iqp_tailx, bh);
1722 }
1723#if defined(SBE_ISR_IMMEDIATE)
1724 return 0L;
1725#endif
1726 /* else, nothing returned */
1727}
1728
1729#if 0
1730int __init
1731musycc_new_chan (ci_t * ci, int channum, void *user)
1732{
1733 mch_t *ch;
1734
1735 ch = ci->port[channum / MUSYCC_NCHANS].chan[channum % MUSYCC_NCHANS];
1736
1737 if (ch->state != UNASSIGNED)
1738 return EEXIST;
1739 /* NOTE: mch_t already cleared during OS_kmalloc() */
1740 ch->state = DOWN;
1741 ch->user = user;
1742#if 0
1743 ch->status = 0;
1744 ch->p.status = 0;
1745 ch->p.intr_mask = 0;
1746#endif
1747 ch->p.chan_mode = CFG_CH_PROTO_HDLC_FCS16;
1748 ch->p.idlecode = CFG_CH_FLAG_7E;
1749 ch->p.pad_fill_count = 2;
1750 spin_lock_init (&ch->ch_rxlock);
1751 spin_lock_init (&ch->ch_txlock);
1752
1753 return 0;
1754}
1755#endif
1756
1757
1758#ifdef SBE_PMCC4_ENABLE
1759status_t
1760musycc_chan_down (ci_t * dummy, int channum)
1761{
1762 mpi_t *pi;
1763 mch_t *ch;
1764 int i, gchan;
1765
1766 if (!(ch = sd_find_chan (dummy, channum)))
1767 return EINVAL;
1768 pi = ch->up;
1769 gchan = ch->gchan;
1770
1771 /* Deactivate the channel */
1772 musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_RX_DIRECTION | gchan);
1773 ch->ch_start_rx = 0;
1774 musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_TX_DIRECTION | gchan);
1775 ch->ch_start_tx = 0;
1776
1777 if (ch->state == DOWN)
1778 return 0;
1779 ch->state = DOWN;
1780
1781 pi->regram->thp[gchan] = 0;
1782 pi->regram->tmp[gchan] = 0;
1783 pi->regram->rhp[gchan] = 0;
1784 pi->regram->rmp[gchan] = 0;
1785 FLUSH_MEM_WRITE ();
1786 for (i = 0; i < ch->txd_num; i++)
1787 {
1788 if (ch->mdt[i].mem_token != 0)
1789 OS_mem_token_free (ch->mdt[i].mem_token);
1790 }
1791
1792 for (i = 0; i < ch->rxd_num; i++)
1793 {
1794 if (ch->mdr[i].mem_token != 0)
1795 OS_mem_token_free (ch->mdr[i].mem_token);
1796 }
1797
1798 OS_kfree (ch->mdr);
1799 ch->mdr = 0;
1800 ch->rxd_num = 0;
1801 OS_kfree (ch->mdt);
1802 ch->mdt = 0;
1803 ch->txd_num = 0;
1804
1805 musycc_update_timeslots (pi);
1806 c4_fifo_free (pi, ch->gchan);
1807
1808 pi->openchans--;
1809 return 0;
1810}
1811#endif
1812
1813
1814int
1815musycc_del_chan (ci_t * ci, int channum)
1816{
1817 mch_t *ch;
1818
1819 if ((channum < 0) || (channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS))) /* sanity chk param */
1820 return ECHRNG;
1821 if (!(ch = sd_find_chan (ci, channum)))
1822 return ENOENT;
1823 if (ch->state == UP)
1824 musycc_chan_down (ci, channum);
1825 ch->state = UNASSIGNED;
1826 return 0;
1827}
1828
1829
1830int
1831musycc_del_chan_stats (ci_t * ci, int channum)
1832{
1833 mch_t *ch;
1834
1835 if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */
1836 return ECHRNG;
1837 if (!(ch = sd_find_chan (ci, channum)))
1838 return ENOENT;
1839
1840 memset (&ch->s, 0, sizeof (struct sbecom_chan_stats));
1841 return 0;
1842}
1843
1844
1845int
1846musycc_start_xmit (ci_t * ci, int channum, void *mem_token)
1847{
1848 mch_t *ch;
1849 struct mdesc *md;
1850 void *m2;
1851#if 0
1852 unsigned long flags;
1853#endif
1854 int txd_need_cnt;
1855 u_int32_t len;
1856
1857 if (!(ch = sd_find_chan (ci, channum)))
1858 return ENOENT;
1859
1860 if (ci->state != C_RUNNING) /* full interrupt processing available */
1861 return EINVAL;
1862 if (ch->state != UP)
1863 return EINVAL;
1864
1865 if (!(ch->status & TX_ENABLED))
1866 return EROFS; /* how else to flag unwritable state ? */
1867
1868#ifdef RLD_TRANS_DEBUGx
1869 if (1 || log_level >= LOG_MONITOR2)
1870#else
1871 if (log_level >= LOG_MONITOR2)
1872#endif
1873 {
1874 pr_info("++ start_xmt[%d]: state %x start %x full %d free %d required %d stopped %x\n",
1875 channum, ch->state, ch->ch_start_tx, ch->tx_full,
1876 ch->txd_free, ch->txd_required, sd_queue_stopped (ch->user));
1877 }
1878 /***********************************************/
1879 /** Determine total amount of data to be sent **/
1880 /***********************************************/
1881 m2 = mem_token;
1882 txd_need_cnt = 0;
1883 for (len = OS_mem_token_tlen (m2); len > 0;
1884 m2 = (void *) OS_mem_token_next (m2))
1885 {
1886 if (!OS_mem_token_len (m2))
1887 continue;
1888 txd_need_cnt++;
1889 len -= OS_mem_token_len (m2);
1890 }
1891
1892 if (txd_need_cnt == 0)
1893 {
1894 if (log_level >= LOG_MONITOR2)
1895 pr_info("%s channel %d: no TX data in User buffer\n", ci->devname, channum);
1896 OS_mem_token_free (mem_token);
1897 return 0; /* no data to send */
1898 }
1899 /*************************************************/
1900 /** Are there sufficient descriptors available? **/
1901 /*************************************************/
1902 if (txd_need_cnt > ch->txd_num) /* never enough descriptors for this
1903 * large a buffer */
1904 {
1905 if (log_level >= LOG_DEBUG)
1906 {
1907 pr_info("start_xmit: discarding buffer, insufficient descriptor cnt %d, need %d.\n",
1908 ch->txd_num, txd_need_cnt + 1);
1909 }
1910 ch->s.tx_dropped++;
1911 OS_mem_token_free (mem_token);
1912 return 0;
1913 }
1914#if 0
1915 spin_lock_irqsave (&ch->ch_txlock, flags);
1916#endif
1917 /************************************************************/
1918 /** flow control the line if not enough descriptors remain **/
1919 /************************************************************/
1920 if (txd_need_cnt > ch->txd_free)
1921 {
1922 if (log_level >= LOG_MONITOR2)
1923 {
1924 pr_info("start_xmit[%d]: EBUSY - need more descriptors, have %d of %d need %d\n",
1925 channum, ch->txd_free, ch->txd_num, txd_need_cnt);
1926 }
1927 ch->tx_full = 1;
1928 ch->txd_required = txd_need_cnt;
1929 sd_disable_xmit (ch->user);
1930#if 0
1931 spin_unlock_irqrestore (&ch->ch_txlock, flags);
1932#endif
1933 return EBUSY; /* tell user to try again later */
1934 }
1935 /**************************************************/
1936 /** Put the user data into MUSYCC data buffer(s) **/
1937 /**************************************************/
1938 m2 = mem_token;
1939 md = ch->txd_usr_add; /* get current available descriptor */
1940
1941 for (len = OS_mem_token_tlen (m2); len > 0; m2 = OS_mem_token_next (m2))
1942 {
1943 int u = OS_mem_token_len (m2);
1944
1945 if (!u)
1946 continue;
1947 len -= u;
1948
1949 /*
1950 * Enable following chunks, yet wait to enable the FIRST chunk until
1951 * after ALL subsequent chunks are setup.
1952 */
1953 if (md != ch->txd_usr_add) /* not first chunk */
1954 u |= MUSYCC_TX_OWNED; /* transfer ownership from HOST to MUSYCC */
1955
1956 if (len) /* not last chunk */
1957 u |= EOBIRQ_ENABLE;
1958 else if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1959 {
1960 /*
1961 * Per MUSYCC Ref 6.4.9 for Transparent Mode, the host must
1962 * always clear EOMIRQ_ENABLE in every Transmit Buffer Descriptor
1963 * (IE. don't set herein).
1964 */
1965 u |= EOBIRQ_ENABLE;
1966 } else
1967 u |= EOMIRQ_ENABLE; /* EOM, last HDLC chunk */
1968
1969
1970 /* last chunk in hdlc mode */
1971 u |= (ch->p.idlecode << IDLE_CODE);
1972 if (ch->p.pad_fill_count)
1973 {
1974#if 0
1975 /* NOOP NOTE: u_int8_t cannot be > 0xFF */
1976 /* sanitize pad_fill_count for maximums allowed by hardware */
1977 if (ch->p.pad_fill_count > EXTRA_FLAGS_MASK)
1978 ch->p.pad_fill_count = EXTRA_FLAGS_MASK;
1979#endif
1980 u |= (PADFILL_ENABLE | (ch->p.pad_fill_count << EXTRA_FLAGS));
1981 }
1982 md->mem_token = len ? 0 : mem_token; /* Fill in mds on last
1983 * segment, others set ZERO
1984 * so that entire token is
1985 * removed ONLY when ALL
1986 * segments have been
1987 * transmitted. */
1988
1989 md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m2)));
1990 FLUSH_MEM_WRITE ();
1991 md->status = cpu_to_le32 (u);
1992 --ch->txd_free;
1993 md = md->snext;
1994 }
1995 FLUSH_MEM_WRITE ();
1996
1997
1998 /*
1999 * Now transfer ownership of first chunk from HOST to MUSYCC in order to
2000 * fire-off this XMIT.
2001 */
2002 ch->txd_usr_add->status |= __constant_cpu_to_le32 (MUSYCC_TX_OWNED);
2003 FLUSH_MEM_WRITE ();
2004 ch->txd_usr_add = md;
2005
2006 len = OS_mem_token_tlen (mem_token);
2007 atomic_add (len, &ch->tx_pending);
2008 atomic_add (len, &ci->tx_pending);
2009 ch->s.tx_packets++;
2010 ch->s.tx_bytes += len;
2011#if 0
2012 spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow pending
2013 * interrupt to sneak
2014 * thru */
2015#endif
2016
2017 /*
2018 * If an ONR was seen, then channel requires poking to restart
2019 * transmission.
2020 */
2021 if (ch->ch_start_tx)
2022 {
2023#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41)
2024 SD_SEM_TAKE (&ci->sem_wdbusy, "_wd_"); /* only 1 thru here, per
2025 * board */
2026 if ((ch->ch_start_tx == CH_START_TX_ONR) && (ch->p.chan_mode == CFG_CH_PROTO_TRANS))
2027 {
2028 /* ONR restart transmission from background loop */
2029 ci->wd_notify = WD_NOTIFY_ONR; /* enabled global watchdog
2030 * scan-thru */
2031 } else
2032 {
2033 /* start first transmission from background loop */
2034 ci->wd_notify = WD_NOTIFY_1TX; /* enabled global watchdog
2035 * scan-thru */
2036 }
2037 musycc_chan_restart (ch);
2038 SD_SEM_GIVE (&ci->sem_wdbusy);
2039#else
2040 musycc_chan_restart (ch);
2041#endif
2042 }
2043#ifdef SBE_WAN256T3_ENABLE
2044 wan256t3_led (ci, LED_TX, LEDV_G);
2045#endif
2046 return 0;
2047}
2048
2049
2050#if 0
2051int
2052musycc_set_chan (ci_t * ci, int channum, struct sbecom_chan_param * p)
2053{
2054 mch_t *ch;
2055 int rok = 0;
2056 int n = 0;
2057
2058 if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */
2059 return ECHRNG;
2060 if (!(ch = sd_find_chan (ci, channum)))
2061 return ENOENT;
2062 if (ch->channum != p->channum)
2063 return EINVAL;
2064 if (sd_line_is_ok (ch->user))
2065 {
2066 rok = 1;
2067 sd_line_is_down (ch->user);
2068 }
2069 if (ch->state == UP && /* bring down in current configuration */
2070 (ch->p.status != p->status ||
2071 ch->p.chan_mode != p->chan_mode ||
2072 ch->p.intr_mask != p->intr_mask ||
2073 ch->txd_free < ch->txd_num))
2074 {
2075 if ((n = musycc_chan_down (ci, channum)))
2076 return n;
2077 if (ch->p.mode_56k != p->mode_56k)
2078 {
2079 ch->p = *p; /* copy in new parameters */
2080 musycc_update_timeslots (&ci->port[ch->channum / MUSYCC_NCHANS]);
2081 } else
2082 ch->p = *p; /* copy in new parameters */
2083 if ((n = musycc_chan_up (ci, channum)))
2084 return n;
2085 sd_enable_xmit (ch->user); /* re-enable to catch flow controlled
2086 * channel */
2087 } else
2088 {
2089 if (ch->p.mode_56k != p->mode_56k)
2090 {
2091 ch->p = *p; /* copy in new parameters */
2092 musycc_update_timeslots (&ci->port[ch->channum / MUSYCC_NCHANS]);
2093 } else
2094 ch->p = *p; /* copy in new parameters */
2095 }
2096
2097 if (rok)
2098 sd_line_is_up (ch->user);
2099 return 0;
2100}
2101#endif
2102
2103
2104int
2105musycc_get_chan (ci_t * ci, int channum, struct sbecom_chan_param * p)
2106{
2107 mch_t *ch;
2108
2109#if 0
2110 if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */
2111 return ECHRNG;
2112#endif
2113 if (!(ch = sd_find_chan (ci, channum)))
2114 return ENOENT;
2115 *p = ch->p;
2116 return 0;
2117}
2118
2119
2120int
2121musycc_get_chan_stats (ci_t * ci, int channum, struct sbecom_chan_stats * p)
2122{
2123 mch_t *ch;
2124
2125 if (channum < 0 || channum >= (MUSYCC_NPORTS * MUSYCC_NCHANS)) /* sanity chk param */
2126 return ECHRNG;
2127 if (!(ch = sd_find_chan (ci, channum)))
2128 return ENOENT;
2129 *p = ch->s;
2130 p->tx_pending = atomic_read (&ch->tx_pending);
2131 return 0;
2132}
2133
2134
2135
2136#ifdef SBE_WAN256T3_ENABLE
2137int
2138musycc_chan_down (ci_t * ci, int channum)
2139{
2140 mch_t *ch;
2141 mpi_t *pi;
2142 int i, gchan;
2143
2144 if (!(ch = sd_find_chan (ci, channum)))
2145 return EINVAL;
2146 pi = ch->up;
2147 gchan = ch->gchan;
2148
2149 /* Deactivate the channel */
2150 musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_RX_DIRECTION | gchan);
2151 ch->ch_start_rx = 0;
2152 musycc_serv_req (pi, SR_CHANNEL_DEACTIVATE | SR_TX_DIRECTION | gchan);
2153 ch->ch_start_tx = 0;
2154
2155 if (ch->state == DOWN)
2156 return 0;
2157 ch->state = DOWN;
2158
2159 pi->regram->thp[gchan] = 0;
2160 pi->regram->tmp[gchan] = 0;
2161 pi->regram->rhp[gchan] = 0;
2162 pi->regram->rmp[gchan] = 0;
2163 FLUSH_MEM_WRITE ();
2164 for (i = 0; i < ch->txd_num; i++)
2165 {
2166 if (ch->mdt[i].mem_token != 0)
2167 OS_mem_token_free (ch->mdt[i].mem_token);
2168 }
2169
2170 for (i = 0; i < ch->rxd_num; i++)
2171 {
2172 if (ch->mdr[i].mem_token != 0)
2173 OS_mem_token_free (ch->mdr[i].mem_token);
2174 }
2175
2176 OS_kfree (ch->mdt);
2177 ch->mdt = 0;
2178 OS_kfree (ch->mdr);
2179 ch->mdr = 0;
2180
2181 return 0;
2182}
2183#endif
2184
2185/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/musycc.h b/drivers/staging/cxt1e1/musycc.h
new file mode 100644
index 000000000000..d2c91ef686d1
--- /dev/null
+++ b/drivers/staging/cxt1e1/musycc.h
@@ -0,0 +1,460 @@
1/*
2 * $Id: musycc.h,v 1.3 2005/09/28 00:10:08 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_MUSYCC_H_
6#define _INC_MUSYCC_H_
7
8/*-----------------------------------------------------------------------------
9 * musycc.h - Multichannel Synchronous Communications Controller
10 * CN8778/8474A/8472A/8471A
11 *
12 * Copyright (C) 2002-2005 SBE, Inc.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * For further information, contact via email: support@sbei.com
25 * SBE, Inc. San Ramon, California U.S.A.
26 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.3 $
29 * Last changed on $Date: 2005/09/28 00:10:08 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: musycc.h,v $
33 * Revision 1.3 2005/09/28 00:10:08 rickd
34 * Add GNU license info. Add PMCC4 PCI/DevIDs. Implement new
35 * musycc reg&bits namings. Use PORTMAP_0 GCD grouping.
36 *
37 * Revision 1.2 2005/04/28 23:43:04 rickd
38 * Add RCS tracking heading.
39 *
40 *-----------------------------------------------------------------------------
41 */
42
43#if defined (__FreeBSD__) || defined (__NetBSD__)
44#include <sys/types.h>
45#else
46#include <linux/types.h>
47#endif
48
49#define VINT8 volatile u_int8_t
50#define VINT32 volatile u_int32_t
51
52#ifdef __cplusplus
53extern "C"
54{
55#endif
56
57#include "pmcc4_defs.h"
58
59
60/*------------------------------------------------------------------------
61// Vendor, Board Identification definitions
62//------------------------------------------------------------------------
63*/
64
65#define PCI_VENDOR_ID_CONEXANT 0x14f1
66#define PCI_DEVICE_ID_CN8471 0x8471
67#define PCI_DEVICE_ID_CN8472 0x8472
68#define PCI_DEVICE_ID_CN8474 0x8474
69#define PCI_DEVICE_ID_CN8478 0x8478
70#define PCI_DEVICE_ID_CN8500 0x8500
71#define PCI_DEVICE_ID_CN8501 0x8501
72#define PCI_DEVICE_ID_CN8502 0x8502
73#define PCI_DEVICE_ID_CN8503 0x8503
74
75#define INT_QUEUE_SIZE MUSYCC_NIQD
76
77/* RAM image of MUSYCC registers layed out as a C structure */
78 struct musycc_groupr
79 {
80 VINT32 thp[32]; /* Transmit Head Pointer [5-29] */
81 VINT32 tmp[32]; /* Transmit Message Pointer [5-30] */
82 VINT32 rhp[32]; /* Receive Head Pointer [5-29] */
83 VINT32 rmp[32]; /* Receive Message Pointer [5-30] */
84 VINT8 ttsm[128]; /* Time Slot Map [5-22] */
85 VINT8 tscm[256]; /* Subchannel Map [5-24] */
86 VINT32 tcct[32]; /* Channel Configuration [5-26] */
87 VINT8 rtsm[128]; /* Time Slot Map [5-22] */
88 VINT8 rscm[256]; /* Subchannel Map [5-24] */
89 VINT32 rcct[32]; /* Channel Configuration [5-26] */
90 VINT32 __glcd; /* Global Configuration Descriptor [5-10] */
91 VINT32 __iqp; /* Interrupt Queue Pointer [5-36] */
92 VINT32 __iql; /* Interrupt Queue Length [5-36] */
93 VINT32 grcd; /* Group Configuration Descriptor [5-16] */
94 VINT32 mpd; /* Memory Protection Descriptor [5-18] */
95 VINT32 mld; /* Message Length Descriptor [5-20] */
96 VINT32 pcd; /* Port Configuration Descriptor [5-19] */
97 };
98
99/* hardware MUSYCC registers layed out as a C structure */
100 struct musycc_globalr
101 {
102 VINT32 gbp; /* Group Base Pointer */
103 VINT32 dacbp; /* Dual Address Cycle Base Pointer */
104 VINT32 srd; /* Service Request Descriptor */
105 VINT32 isd; /* Interrupt Service Descriptor */
106 /*
107 * adjust __thp due to above 4 registers, which are not contained
108 * within musycc_groupr[]. All __XXX[] are just place holders,
109 * anyhow.
110 */
111 VINT32 __thp[32 - 4]; /* Transmit Head Pointer [5-29] */
112 VINT32 __tmp[32]; /* Transmit Message Pointer [5-30] */
113 VINT32 __rhp[32]; /* Receive Head Pointer [5-29] */
114 VINT32 __rmp[32]; /* Receive Message Pointer [5-30] */
115 VINT8 ttsm[128]; /* Time Slot Map [5-22] */
116 VINT8 tscm[256]; /* Subchannel Map [5-24] */
117 VINT32 tcct[32]; /* Channel Configuration [5-26] */
118 VINT8 rtsm[128]; /* Time Slot Map [5-22] */
119 VINT8 rscm[256]; /* Subchannel Map [5-24] */
120 VINT32 rcct[32]; /* Channel Configuration [5-26] */
121 VINT32 glcd; /* Global Configuration Descriptor [5-10] */
122 VINT32 iqp; /* Interrupt Queue Pointer [5-36] */
123 VINT32 iql; /* Interrupt Queue Length [5-36] */
124 VINT32 grcd; /* Group Configuration Descriptor [5-16] */
125 VINT32 mpd; /* Memory Protection Descriptor [5-18] */
126 VINT32 mld; /* Message Length Descriptor [5-20] */
127 VINT32 pcd; /* Port Configuration Descriptor [5-19] */
128 VINT32 rbist; /* Receive BIST status [5-4] */
129 VINT32 tbist; /* Receive BIST status [5-4] */
130 };
131
132/* Global Config Descriptor bit macros */
133#define MUSYCC_GCD_ECLK_ENABLE 0x00000800 /* EBUS clock enable */
134#define MUSYCC_GCD_INTEL_SELECT 0x00000400 /* MPU type select */
135#define MUSYCC_GCD_INTA_DISABLE 0x00000008 /* PCI INTA disable */
136#define MUSYCC_GCD_INTB_DISABLE 0x00000004 /* PCI INTB disable */
137#define MUSYCC_GCD_BLAPSE 12 /* Position index for BLAPSE bit
138 * field */
139#define MUSYCC_GCD_ALAPSE 8 /* Position index for ALAPSE bit
140 * field */
141#define MUSYCC_GCD_ELAPSE 4 /* Position index for ELAPSE bit
142 * field */
143#define MUSYCC_GCD_PORTMAP_3 3 /* Reserved */
144#define MUSYCC_GCD_PORTMAP_2 2 /* Port 0=>Grp 0,1,2,3; Port 1=>Grp
145 * 4,5,6,7 */
146#define MUSYCC_GCD_PORTMAP_1 1 /* Port 0=>Grp 0,1; Port 1=>Grp 2,3,
147 * etc... */
148#define MUSYCC_GCD_PORTMAP_0 0 /* Port 0=>Grp 0; Port 1=>Grp 2,
149 * etc... */
150
151/* and board specific assignments... */
152#ifdef SBE_WAN256T3_ENABLE
153#define BLAPSE_VAL 0
154#define ALAPSE_VAL 0
155#define ELAPSE_VAL 7
156#define PORTMAP_VAL MUSYCC_GCD_PORTMAP_2
157#endif
158
159#ifdef SBE_PMCC4_ENABLE
160#define BLAPSE_VAL 7
161#define ALAPSE_VAL 3
162#define ELAPSE_VAL 7
163#define PORTMAP_VAL MUSYCC_GCD_PORTMAP_0
164#endif
165
166#define GCD_MAGIC (((BLAPSE_VAL)<<(MUSYCC_GCD_BLAPSE)) | \
167 ((ALAPSE_VAL)<<(MUSYCC_GCD_ALAPSE)) | \
168 ((ELAPSE_VAL)<<(MUSYCC_GCD_ELAPSE)) | \
169 (MUSYCC_GCD_ECLK_ENABLE) | PORTMAP_VAL)
170
171/* Group Config Descriptor bit macros */
172#define MUSYCC_GRCD_RX_ENABLE 0x00000001 /* Enable receive processing */
173#define MUSYCC_GRCD_TX_ENABLE 0x00000002 /* Enable transmit processing */
174#define MUSYCC_GRCD_SUBCHAN_DISABLE 0x00000004 /* Master disable for
175 * subchanneling */
176#define MUSYCC_GRCD_OOFMP_DISABLE 0x00000008 /* Out of Frame message
177 * processing disabled all
178 * channels */
179#define MUSYCC_GRCD_OOFIRQ_DISABLE 0x00000010 /* Out of Frame/In Frame irqs
180 * disabled */
181#define MUSYCC_GRCD_COFAIRQ_DISABLE 0x00000020 /* Change of Frame Alignment
182 * irq disabled */
183#define MUSYCC_GRCD_INHRBSD 0x00000100 /* Receive Buffer Status
184 * overwrite disabled */
185#define MUSYCC_GRCD_INHTBSD 0x00000200 /* Transmit Buffer Status
186 * overwrite disabled */
187#define MUSYCC_GRCD_SF_ALIGN 0x00008000 /* External frame sync */
188#define MUSYCC_GRCD_MC_ENABLE 0x00000040 /* Message configuration bits
189 * copy enable. Conexant sez
190 * turn this on */
191#define MUSYCC_GRCD_POLLTH_16 0x00000001 /* Poll every 16th frame */
192#define MUSYCC_GRCD_POLLTH_32 0x00000002 /* Poll every 32nd frame */
193#define MUSYCC_GRCD_POLLTH_64 0x00000003 /* Poll every 64th frame */
194#define MUSYCC_GRCD_POLLTH_SHIFT 10 /* Position index for poll throttle
195 * bit field */
196#define MUSYCC_GRCD_SUERM_THRESH_SHIFT 16 /* Position index for SUERM
197 * count threshold */
198
199/* Port Config Descriptor bit macros */
200#define MUSYCC_PCD_E1X2_MODE 2 /* Port mode in bits 0-2. T1 and E1 */
201#define MUSYCC_PCD_E1X4_MODE 3 /* are defined in cn847x.h */
202#define MUSYCC_PCD_NX64_MODE 4
203#define MUSYCC_PCD_TXDATA_RISING 0x00000010 /* Sample Tx data on TCLK
204 * rising edge */
205#define MUSYCC_PCD_TXSYNC_RISING 0x00000020 /* Sample Tx frame sync on
206 * TCLK rising edge */
207#define MUSYCC_PCD_RXDATA_RISING 0x00000040 /* Sample Rx data on RCLK
208 * rising edge */
209#define MUSYCC_PCD_RXSYNC_RISING 0x00000080 /* Sample Rx frame sync on
210 * RCLK rising edge */
211#define MUSYCC_PCD_ROOF_RISING 0x00000100 /* Sample Rx Out Of Frame
212 * signal on RCLK rising edge */
213#define MUSYCC_PCD_TX_DRIVEN 0x00000200 /* No mapped timeslots causes
214 * logic 1 on output, else
215 * tristate */
216#define MUSYCC_PCD_PORTMODE_MASK 0xfffffff8 /* For changing the port mode
217 * between E1 and T1 */
218
219/* Time Slot Descriptor bit macros */
220#define MUSYCC_TSD_MODE_64KBPS 4
221#define MUSYCC_TSD_MODE_56KBPS 5
222#define MUSYCC_TSD_SUBCHANNEL_WO_FIRST 6
223#define MUSYCC_TSD_SUBCHANNEL_WITH_FIRST 7
224
225/* Message Descriptor bit macros */
226#define MUSYCC_MDT_BASE03_ADDR 0x00006000
227
228/* Channel Config Descriptor bit macros */
229#define MUSYCC_CCD_BUFIRQ_DISABLE 0x00000002 /* BUFF and ONR irqs disabled */
230#define MUSYCC_CCD_EOMIRQ_DISABLE 0x00000004 /* EOM irq disabled */
231#define MUSYCC_CCD_MSGIRQ_DISABLE 0x00000008 /* LNG, FCS, ALIGN, and ABT
232 * irqs disabled */
233#define MUSYCC_CCD_IDLEIRQ_DISABLE 0x00000010 /* CHABT, CHIC, and SHT irqs
234 * disabled */
235#define MUSYCC_CCD_FILTIRQ_DISABLE 0x00000020 /* SFILT irq disabled */
236#define MUSYCC_CCD_SDECIRQ_DISABLE 0x00000040 /* SDEC irq disabled */
237#define MUSYCC_CCD_SINCIRQ_DISABLE 0x00000080 /* SINC irq disabled */
238#define MUSYCC_CCD_SUERIRQ_DISABLE 0x00000100 /* SUERR irq disabled */
239#define MUSYCC_CCD_FCS_XFER 0x00000200 /* Propagate FCS along with
240 * received data */
241#define MUSYCC_CCD_PROTO_SHIFT 12 /* Position index for protocol bit
242 * field */
243#define MUSYCC_CCD_TRANS 0 /* Protocol mode in bits 12-14 */
244#define MUSYCC_CCD_SS7 1
245#define MUSYCC_CCD_HDLC_FCS16 2
246#define MUSYCC_CCD_HDLC_FCS32 3
247#define MUSYCC_CCD_EOPIRQ_DISABLE 0x00008000 /* EOP irq disabled */
248#define MUSYCC_CCD_INVERT_DATA 0x00800000 /* Invert data */
249#define MUSYCC_CCD_MAX_LENGTH 10 /* Position index for max length bit
250 * field */
251#define MUSYCC_CCD_BUFFER_LENGTH 16 /* Position index for internal data
252 * buffer length */
253#define MUSYCC_CCD_BUFFER_LOC 24 /* Position index for internal data
254 * buffer starting location */
255
256/****************************************************************************
257 * Interrupt Descriptor Information */
258
259#define INT_EMPTY_ENTRY 0xfeedface
260#define INT_EMPTY_ENTRY2 0xdeadface
261
262/****************************************************************************
263 * Interrupt Status Descriptor
264 *
265 * NOTE: One must first fetch the value of the interrupt status descriptor
266 * into a local variable, then pass that value into the read macros. This
267 * is required to avoid race conditions.
268 ***/
269
270#define INTRPTS_NEXTINT_M 0x7FFF0000
271#define INTRPTS_NEXTINT_S 16
272#define INTRPTS_NEXTINT(x) ((x & INTRPTS_NEXTINT_M) >> INTRPTS_NEXTINT_S)
273
274#define INTRPTS_INTFULL_M 0x00008000
275#define INTRPTS_INTFULL_S 15
276#define INTRPTS_INTFULL(x) ((x & INTRPTS_INTFULL_M) >> INTRPTS_INTFULL_S)
277
278#define INTRPTS_INTCNT_M 0x00007FFF
279#define INTRPTS_INTCNT_S 0
280#define INTRPTS_INTCNT(x) ((x & INTRPTS_INTCNT_M) >> INTRPTS_INTCNT_S)
281
282
283/****************************************************************************
284 * Interrupt Descriptor
285 ***/
286
287#define INTRPT_DIR_M 0x80000000
288#define INTRPT_DIR_S 31
289#define INTRPT_DIR(x) ((x & INTRPT_DIR_M) >> INTRPT_DIR_S)
290
291#define INTRPT_GRP_M 0x60000000
292#define INTRPT_GRP_MSB_M 0x00004000
293#define INTRPT_GRP_S 29
294#define INTRPT_GRP_MSB_S 12
295#define INTRPT_GRP(x) (((x & INTRPT_GRP_M) >> INTRPT_GRP_S) | \
296 ((x & INTRPT_GRP_MSB_M) >> INTRPT_GRP_MSB_S))
297
298#define INTRPT_CH_M 0x1F000000
299#define INTRPT_CH_S 24
300#define INTRPT_CH(x) ((x & INTRPT_CH_M) >> INTRPT_CH_S)
301
302#define INTRPT_EVENT_M 0x00F00000
303#define INTRPT_EVENT_S 20
304#define INTRPT_EVENT(x) ((x & INTRPT_EVENT_M) >> INTRPT_EVENT_S)
305
306#define INTRPT_ERROR_M 0x000F0000
307#define INTRPT_ERROR_S 16
308#define INTRPT_ERROR(x) ((x & INTRPT_ERROR_M) >> INTRPT_ERROR_S)
309
310#define INTRPT_ILOST_M 0x00008000
311#define INTRPT_ILOST_S 15
312#define INTRPT_ILOST(x) ((x & INTRPT_ILOST_M) >> INTRPT_ILOST_S)
313
314#define INTRPT_PERR_M 0x00004000
315#define INTRPT_PERR_S 14
316#define INTRPT_PERR(x) ((x & INTRPT_PERR_M) >> INTRPT_PERR_S)
317
318#define INTRPT_BLEN_M 0x00003FFF
319#define INTRPT_BLEN_S 0
320#define INTRPT_BLEN(x) ((x & INTRPT_BLEN_M) >> INTRPT_BLEN_S)
321
322
323/* Buffer Descriptor bit macros */
324#define OWNER_BIT 0x80000000 /* Set for MUSYCC owner on xmit, host
325 * owner on receive */
326#define HOST_TX_OWNED 0x00000000 /* Host owns descriptor */
327#define MUSYCC_TX_OWNED 0x80000000 /* MUSYCC owns descriptor */
328#define HOST_RX_OWNED 0x80000000 /* Host owns descriptor */
329#define MUSYCC_RX_OWNED 0x00000000 /* MUSYCC owns descriptor */
330
331#define POLL_DISABLED 0x40000000 /* MUSYCC not allowed to poll buffer
332 * for ownership */
333#define EOMIRQ_ENABLE 0x20000000 /* This buffer contains the end of
334 * the message */
335#define EOBIRQ_ENABLE 0x10000000 /* EOB irq enabled */
336#define PADFILL_ENABLE 0x01000000 /* Enable padfill */
337#define REPEAT_BIT 0x00008000 /* Bit on for FISU descriptor */
338#define LENGTH_MASK 0X3fff /* This part of status descriptor is
339 * length */
340#define IDLE_CODE 25 /* Position index for idle code (2
341 * bits) */
342#define EXTRA_FLAGS 16 /* Position index for minimum flags
343 * between messages (8 bits) */
344#define IDLE_CODE_MASK 0x03 /* Gets rid of garbage before the
345 * pattern is OR'd in */
346#define EXTRA_FLAGS_MASK 0xff /* Gets rid of garbage before the
347 * pattern is OR'd in */
348#define PCI_PERMUTED_OWNER_BIT 0x00000080 /* For flipping the bit on
349 * the polled mode descriptor */
350
351/* Service Request Descriptor bit macros */
352#define SREQ 8 /* Position index for service request bit
353 * field */
354#define SR_NOOP (0<<(SREQ)) /* No Operation. Generates SACK */
355#define SR_CHIP_RESET (1<<(SREQ)) /* Soft chip reset */
356#define SR_GROUP_RESET (2<<(SREQ)) /* Group reset */
357#define SR_GLOBAL_INIT (4<<(SREQ)) /* Global init: read global
358 * config deswc and interrupt
359 * queue desc */
360#define SR_GROUP_INIT (5<<(SREQ)) /* Group init: read Timeslot
361 * and Subchannel maps,
362 * Channel Config, */
363 /*
364 * Group Config, Memory Protect, Message Length, and Port Config
365 * Descriptors
366 */
367#define SR_CHANNEL_ACTIVATE (8<<(SREQ)) /* Init channel, read Head
368 * Pointer, process first
369 * Message Descriptor */
370#define SR_GCHANNEL_MASK 0x001F /* channel portion (gchan) */
371#define SR_CHANNEL_DEACTIVATE (9<<(SREQ)) /* Stop channel processing */
372#define SR_JUMP (10<<(SREQ)) /* a: Process new Message
373 * List */
374#define SR_CHANNEL_CONFIG (11<<(SREQ)) /* b: Read channel
375 * Configuration Descriptor */
376#define SR_GLOBAL_CONFIG (16<<(SREQ)) /* 10: Read Global
377 * Configuration Descriptor */
378#define SR_INTERRUPT_Q (17<<(SREQ)) /* 11: Read Interrupt Queue
379 * Descriptor */
380#define SR_GROUP_CONFIG (18<<(SREQ)) /* 12: Read Group
381 * Configuration Descriptor */
382#define SR_MEMORY_PROTECT (19<<(SREQ)) /* 13: Read Memory Protection
383 * Descriptor */
384#define SR_MESSAGE_LENGTH (20<<(SREQ)) /* 14: Read Message Length
385 * Descriptor */
386#define SR_PORT_CONFIG (21<<(SREQ)) /* 15: Read Port
387 * Configuration Descriptor */
388#define SR_TIMESLOT_MAP (24<<(SREQ)) /* 18: Read Timeslot Map */
389#define SR_SUBCHANNEL_MAP (25<<(SREQ)) /* 19: Read Subchannel Map */
390#define SR_CHAN_CONFIG_TABLE (26<<(SREQ)) /* 20: Read Channel
391 * Configuration Table for
392 * the group */
393#define SR_TX_DIRECTION 0x00000020 /* Transmit direction bit.
394 * Bit off indicates receive
395 * direction */
396#define SR_RX_DIRECTION 0x00000000
397
398/* Interrupt Descriptor bit macros */
399#define GROUP10 29 /* Position index for the 2 LS group
400 * bits */
401#define CHANNEL 24 /* Position index for channel bits */
402#define INT_IQD_TX 0x80000000
403#define INT_IQD_GRP 0x60000000
404#define INT_IQD_CHAN 0x1f000000
405#define INT_IQD_EVENT 0x00f00000
406#define INT_IQD_ERROR 0x000f0000
407#define INT_IQD_ILOST 0x00008000
408#define INT_IQD_PERR 0x00004000
409#define INT_IQD_BLEN 0x00003fff
410
411/* Interrupt Descriptor Events */
412#define EVE_EVENT 20 /* Position index for event bits */
413#define EVE_NONE 0 /* No event to report in this
414 * interrupt */
415#define EVE_SACK 1 /* Service Request acknowledge */
416#define EVE_EOB 2 /* End of Buffer */
417#define EVE_EOM 3 /* End of Message */
418#define EVE_EOP 4 /* End of Padfill */
419#define EVE_CHABT 5 /* Change to Abort Code */
420#define EVE_CHIC 6 /* Change to Idle Code */
421#define EVE_FREC 7 /* Frame Recovery */
422#define EVE_SINC 8 /* MTP2 SUERM Increment */
423#define EVE_SDEC 9 /* MTP2 SUERM Decrement */
424#define EVE_SFILT 10 /* MTP2 SUERM Filtered Message */
425/* Interrupt Descriptor Errors */
426#define ERR_ERRORS 16 /* Position index for error bits */
427#define ERR_BUF 1 /* Buffer Error */
428#define ERR_COFA 2 /* Change of Frame Alignment Error */
429#define ERR_ONR 3 /* Owner Bit Error */
430#define ERR_PROT 4 /* Memory Protection Error */
431#define ERR_OOF 8 /* Out of Frame Error */
432#define ERR_FCS 9 /* FCS Error */
433#define ERR_ALIGN 10 /* Octet Alignment Error */
434#define ERR_ABT 11 /* Abort Termination */
435#define ERR_LNG 12 /* Long Message Error */
436#define ERR_SHT 13 /* Short Message Error */
437#define ERR_SUERR 14 /* SUERM threshold exceeded */
438#define ERR_PERR 15 /* PCI Parity Error */
439/* Other Stuff */
440#define TRANSMIT_DIRECTION 0x80000000 /* Transmit direction bit. Bit off
441 * indicates receive direction */
442#define ILOST 0x00008000 /* Interrupt Lost */
443#define GROUPMSB 0x00004000 /* Group number MSB */
444#define SACK_IMAGE 0x00100000 /* Used in IRQ for semaphore test */
445#define INITIAL_STATUS 0x10000 /* IRQ status should be this after
446 * reset */
447
448/* This must be defined on an entire channel group (Port) basis */
449#define SUERM_THRESHOLD 0x1f
450
451#ifdef __cplusplus
452}
453#endif
454
455#undef VINT32
456#undef VINT8
457
458#endif /*** _INC_MUSYCC_H_ ***/
459
460/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/ossiRelease.c b/drivers/staging/cxt1e1/ossiRelease.c
new file mode 100644
index 000000000000..a56029866c2d
--- /dev/null
+++ b/drivers/staging/cxt1e1/ossiRelease.c
@@ -0,0 +1,39 @@
1/*
2 * $Id: ossiRelease.c,v 1.2 2008/05/08 20:14:03 rdobbs PMCC4_3_1B $
3 */
4
5/*-----------------------------------------------------------------------------
6 * ossiRelease.c -
7 *
8 * This string will be embedded into the executable and will track the
9 * release. The embedded string may be displayed using the following:
10 *
11 * strings <filename> | grep \$Rel
12 *
13 * Copyright (C) 2002-2008 One Stop Systems, Inc.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * For further information, contact via email: support@onestopsystems.com
26 * One Stop Systems, Inc. Escondido, California U.S.A.
27 *
28 *-----------------------------------------------------------------------------
29 * RCS info:
30 * RCS revision: $Revision: 1.2 $
31 * Last changed on $Date: 2008/05/08 20:14:03 $
32 * Changed by $Author: rdobbs $
33 *-----------------------------------------------------------------------------
34 */
35
36
37char pmcc4_OSSI_release[] = "$Release: PMCC4_3_1B, Copyright (c) 2008 One Stop Systems$";
38
39/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.c b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
new file mode 100644
index 000000000000..1c8dfb80e7d7
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.c
@@ -0,0 +1,561 @@
1/* pmc93x6_eeprom.c - PMC's 93LC46 EEPROM Device
2 *
3 * The 93LC46 is a low-power, serial Electrically Erasable and
4 * Programmable Read Only Memory organized as 128 8-bit bytes.
5 *
6 * Accesses to the 93LC46 are done in a bit serial stream, organized
7 * in a 3 wire format. Writes are internally timed by the device
8 * (the In data bit is pulled low until the write is complete and
9 * then is pulled high) and take about 6 milliseconds.
10 *
11 * Copyright (C) 2003-2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26#include <linux/types.h>
27#include "pmcc4_sysdep.h"
28#include "sbecom_inline_linux.h"
29#include "pmcc4.h"
30#include "sbe_promformat.h"
31
32#ifndef TRUE
33#define TRUE 1
34#define FALSE 0
35#endif
36
37#ifdef SBE_INCLUDE_SYMBOLS
38#define STATIC
39#else
40#define STATIC static
41#endif
42
43
44/*------------------------------------------------------------------------
45 * EEPROM address definitions
46 *------------------------------------------------------------------------
47 *
48 * The offset in the definitions below allows the test to skip over
49 * areas of the EEPROM that other programs (such a VxWorks) are
50 * using.
51 */
52
53#define EE_MFG (long)0 /* Index to manufacturing record */
54#define EE_FIRST 0x28 /* Index to start testing at */
55#define EE_LIMIT 128 /* Index to end testing at */
56
57
58/* Bit Ordering for Instructions
59**
60** A0, A1, A2, A3, A4, A5, A6, OP0, OP1, SB (lsb, or 1st bit out)
61**
62*/
63
64#define EPROM_EWEN 0x0019 /* Erase/Write enable (reversed) */
65#define EPROM_EWDS 0x0001 /* Erase/Write disable (reversed) */
66#define EPROM_READ 0x0003 /* Read (reversed) */
67#define EPROM_WRITE 0x0005 /* Write (reversed) */
68#define EPROM_ERASE 0x0007 /* Erase (reversed) */
69#define EPROM_ERAL 0x0009 /* Erase All (reversed) */
70#define EPROM_WRAL 0x0011 /* Write All (reversed) */
71
72#define EPROM_ADR_SZ 7 /* Number of bits in offset address */
73#define EPROM_OP_SZ 3 /* Number of bits in command */
74#define SIZE_ADDR_OP (EPROM_ADR_SZ + EPROM_OP_SZ)
75#define LC46A_MAX_OPS 10 /* Number of bits in Instruction */
76#define NUM_OF_BITS 8 /* Number of bits in data */
77
78
79/* EEPROM signal bits */
80#define EPROM_ACTIVE_OUT_BIT 0x0001 /* Out data bit */
81#define EPROM_ACTIVE_IN_BIT 0x0002 /* In data bit */
82#define ACTIVE_IN_BIT_SHIFT 0x0001 /* Shift In data bit to LSB */
83#define EPROM_ENCS 0x0004 /* Set EEPROM CS during operation */
84
85
86/*------------------------------------------------------------------------
87 * The ByteReverse table is used to reverses the 8 bits within a byte
88 *------------------------------------------------------------------------
89 */
90
91static unsigned char ByteReverse[256];
92static int ByteReverseBuilt = FALSE;
93
94
95/*------------------------------------------------------------------------
96 * mfg_template - initial serial EEPROM data structure
97 *------------------------------------------------------------------------
98 */
99
100short mfg_template[sizeof (FLD_TYPE2)] =
101{
102 PROM_FORMAT_TYPE2, /* type; */
103 0x00, 0x1A, /* length[2]; */
104 0x00, 0x00, 0x00, 0x00, /* Crc32[4]; */
105 0x11, 0x76, /* Id[2]; */
106 0x07, 0x05, /* SubId[2] E1; */
107 0x00, 0xA0, 0xD6, 0x00, 0x00, 0x00, /* Serial[6]; */
108 0x00, 0x00, 0x00, 0x00, /* CreateTime[4]; */
109 0x00, 0x00, 0x00, 0x00, /* HeatRunTime[4]; */
110 0x00, 0x00, 0x00, 0x00, /* HeatRunIterations[4]; */
111 0x00, 0x00, 0x00, 0x00, /* HeatRunErrors[4]; */
112};
113
114
115/*------------------------------------------------------------------------
116 * BuildByteReverse - build the 8-bit reverse table
117 *------------------------------------------------------------------------
118 *
119 * The 'ByteReverse' table reverses the 8 bits within a byte
120 * (the MSB becomes the LSB etc.).
121 */
122
123STATIC void
124BuildByteReverse (void)
125{
126 long half; /* Used to build by powers to 2 */
127 int i;
128
129 ByteReverse[0] = 0;
130
131 for (half = 1; half < sizeof (ByteReverse); half <<= 1)
132 for (i = 0; i < half; i++)
133 ByteReverse[half + i] = (char) (ByteReverse[i] | (0x80 / half));
134
135 ByteReverseBuilt = TRUE;
136}
137
138
139/*------------------------------------------------------------------------
140 * eeprom_delay - small delay for EEPROM timing
141 *------------------------------------------------------------------------
142 */
143
144STATIC void
145eeprom_delay (void)
146{
147 int timeout;
148
149 for (timeout = 20; timeout; --timeout)
150 {
151 OS_uwait_dummy ();
152 }
153}
154
155
156/*------------------------------------------------------------------------
157 * eeprom_put_byte - Send a byte to the EEPROM serially
158 *------------------------------------------------------------------------
159 *
160 * Given the PCI address and the data, this routine serially sends
161 * the data to the EEPROM.
162 */
163
164void
165eeprom_put_byte (long addr, long data, int count)
166{
167 u_int32_t output;
168
169 while (--count >= 0)
170 {
171 output = (data & EPROM_ACTIVE_OUT_BIT) ? 1 : 0; /* Get next data bit */
172 output |= EPROM_ENCS; /* Add Chip Select */
173 data >>= 1;
174
175 eeprom_delay ();
176 pci_write_32 ((u_int32_t *) addr, output); /* Output it */
177 }
178}
179
180
181/*------------------------------------------------------------------------
182 * eeprom_get_byte - Receive a byte from the EEPROM serially
183 *------------------------------------------------------------------------
184 *
185 * Given the PCI address, this routine serially fetches the data
186 * from the EEPROM.
187 */
188
189u_int32_t
190eeprom_get_byte (long addr)
191{
192 u_int32_t input;
193 u_int32_t data;
194 int count;
195
196/* Start the Reading of DATA
197**
198** The first read is a dummy as the data is latched in the
199** EPLD and read on the next read access to the EEPROM.
200*/
201
202 input = pci_read_32 ((u_int32_t *) addr);
203
204 data = 0;
205 count = NUM_OF_BITS;
206 while (--count >= 0)
207 {
208 eeprom_delay ();
209 input = pci_read_32 ((u_int32_t *) addr);
210
211 data <<= 1; /* Shift data over */
212 data |= (input & EPROM_ACTIVE_IN_BIT) ? 1 : 0;
213
214 }
215
216 return data;
217}
218
219
220/*------------------------------------------------------------------------
221 * disable_pmc_eeprom - Disable writes to the EEPROM
222 *------------------------------------------------------------------------
223 *
224 * Issue the EEPROM command to disable writes.
225 */
226
227STATIC void
228disable_pmc_eeprom (long addr)
229{
230 eeprom_put_byte (addr, EPROM_EWDS, SIZE_ADDR_OP);
231
232 pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select
233 * from EEPROM */
234}
235
236
237/*------------------------------------------------------------------------
238 * enable_pmc_eeprom - Enable writes to the EEPROM
239 *------------------------------------------------------------------------
240 *
241 * Issue the EEPROM command to enable writes.
242 */
243
244STATIC void
245enable_pmc_eeprom (long addr)
246{
247 eeprom_put_byte (addr, EPROM_EWEN, SIZE_ADDR_OP);
248
249 pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select
250 * from EEPROM */
251}
252
253
254/*------------------------------------------------------------------------
255 * pmc_eeprom_read - EEPROM location read
256 *------------------------------------------------------------------------
257 *
258 * Given a EEPROM PCI address and location offset, this routine returns
259 * the contents of the specified location to the calling routine.
260 */
261
262u_int32_t
263pmc_eeprom_read (long addr, long mem_offset)
264{
265 u_int32_t data; /* Data from chip */
266
267 if (!ByteReverseBuilt)
268 BuildByteReverse ();
269
270 mem_offset = ByteReverse[0x7F & mem_offset]; /* Reverse address */
271 /*
272 * NOTE: The max offset address is 128 or half the reversal table. So the
273 * LSB is always zero and counts as a built in shift of one bit. So even
274 * though we need to shift 3 bits to make room for the command, we only
275 * need to shift twice more because of the built in shift.
276 */
277 mem_offset <<= 2; /* Shift for command */
278 mem_offset |= EPROM_READ; /* Add command */
279
280 eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP); /* Output chip address */
281
282 data = eeprom_get_byte (addr); /* Read chip data */
283
284 pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from
285 * EEPROM */
286
287 return (data & 0x000000FF);
288}
289
290
291/*------------------------------------------------------------------------
292 * pmc_eeprom_write - EEPROM location write
293 *------------------------------------------------------------------------
294 *
295 * Given a EEPROM PCI address, location offset and value, this
296 * routine writes the value to the specified location.
297 *
298 * Note: it is up to the caller to determine if the write
299 * operation succeeded.
300 */
301
302int
303pmc_eeprom_write (long addr, long mem_offset, u_int32_t data)
304{
305 volatile u_int32_t temp;
306 int count;
307
308 if (!ByteReverseBuilt)
309 BuildByteReverse ();
310
311 mem_offset = ByteReverse[0x7F & mem_offset]; /* Reverse address */
312 /*
313 * NOTE: The max offset address is 128 or half the reversal table. So the
314 * LSB is always zero and counts as a built in shift of one bit. So even
315 * though we need to shift 3 bits to make room for the command, we only
316 * need to shift twice more because of the built in shift.
317 */
318 mem_offset <<= 2; /* Shift for command */
319 mem_offset |= EPROM_WRITE; /* Add command */
320
321 eeprom_put_byte (addr, mem_offset, SIZE_ADDR_OP); /* Output chip address */
322
323 data = ByteReverse[0xFF & data];/* Reverse data */
324 eeprom_put_byte (addr, data, NUM_OF_BITS); /* Output chip data */
325
326 pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from
327 * EEPROM */
328
329/*
330** Must see Data In at a low state before completing this transaction.
331**
332** Afterwards, the data bit will return to a high state, ~6 ms, terminating
333** the operation.
334*/
335 pci_write_32 ((u_int32_t *) addr, EPROM_ENCS); /* Re-enable Chip Select */
336 temp = pci_read_32 ((u_int32_t *) addr); /* discard first read */
337 temp = pci_read_32 ((u_int32_t *) addr);
338 if (temp & EPROM_ACTIVE_IN_BIT)
339 {
340 temp = pci_read_32 ((u_int32_t *) addr);
341 if (temp & EPROM_ACTIVE_IN_BIT)
342 {
343 pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select
344 * from EEPROM */
345 return (1);
346 }
347 }
348 count = 1000;
349 while (count--)
350 {
351 for (temp = 0; temp < 0x10; temp++)
352 OS_uwait_dummy ();
353
354 if (pci_read_32 ((u_int32_t *) addr) & EPROM_ACTIVE_IN_BIT)
355 break;
356 }
357
358 if (count == -1)
359 return (2);
360
361 return (0);
362}
363
364
365/*------------------------------------------------------------------------
366 * pmcGetBuffValue - read the specified value from buffer
367 *------------------------------------------------------------------------
368 */
369
370long
371pmcGetBuffValue (char *ptr, int size)
372{
373 long value = 0;
374 int index;
375
376 for (index = 0; index < size; ++index)
377 {
378 value <<= 8;
379 value |= ptr[index] & 0xFF;
380 }
381
382 return value;
383}
384
385
386/*------------------------------------------------------------------------
387 * pmcSetBuffValue - save the specified value to buffer
388 *------------------------------------------------------------------------
389 */
390
391void
392pmcSetBuffValue (char *ptr, long value, int size)
393{
394 int index = size;
395
396 while (--index >= 0)
397 {
398 ptr[index] = (char) (value & 0xFF);
399 value >>= 8;
400 }
401}
402
403
404/*------------------------------------------------------------------------
405 * pmc_eeprom_read_buffer - read EEPROM data into specified buffer
406 *------------------------------------------------------------------------
407 */
408
409void
410pmc_eeprom_read_buffer (long addr, long mem_offset, char *dest_ptr, int size)
411{
412 while (--size >= 0)
413 *dest_ptr++ = (char) pmc_eeprom_read (addr, mem_offset++);
414}
415
416
417/*------------------------------------------------------------------------
418 * pmc_eeprom_write_buffer - write EEPROM data from specified buffer
419 *------------------------------------------------------------------------
420 */
421
422void
423pmc_eeprom_write_buffer (long addr, long mem_offset, char *dest_ptr, int size)
424{
425 enable_pmc_eeprom (addr);
426
427 while (--size >= 0)
428 pmc_eeprom_write (addr, mem_offset++, *dest_ptr++);
429
430 disable_pmc_eeprom (addr);
431}
432
433
434/*------------------------------------------------------------------------
435 * pmcCalcCrc - calculate the CRC for the serial EEPROM structure
436 *------------------------------------------------------------------------
437 */
438
439u_int32_t
440pmcCalcCrc_T01 (void *bufp)
441{
442 FLD_TYPE2 *buf = bufp;
443 u_int32_t crc; /* CRC of the structure */
444
445 /* Calc CRC for type and length fields */
446 sbeCrc (
447 (u_int8_t *) &buf->type,
448 (u_int32_t) STRUCT_OFFSET (FLD_TYPE1, Crc32),
449 (u_int32_t) 0,
450 (u_int32_t *) &crc);
451
452#ifdef EEPROM_TYPE_DEBUG
453 pr_info("sbeCrc: crc 1 calculated as %08x\n", crc); /* RLD DEBUG */
454#endif
455 return ~crc;
456}
457
458u_int32_t
459pmcCalcCrc_T02 (void *bufp)
460{
461 FLD_TYPE2 *buf = bufp;
462 u_int32_t crc; /* CRC of the structure */
463
464 /* Calc CRC for type and length fields */
465 sbeCrc (
466 (u_int8_t *) &buf->type,
467 (u_int32_t) STRUCT_OFFSET (FLD_TYPE2, Crc32),
468 (u_int32_t) 0,
469 (u_int32_t *) &crc);
470
471 /* Calc CRC for remaining fields */
472 sbeCrc (
473 (u_int8_t *) &buf->Id[0],
474 (u_int32_t) (sizeof (FLD_TYPE2) - STRUCT_OFFSET (FLD_TYPE2, Id)),
475 (u_int32_t) crc,
476 (u_int32_t *) &crc);
477
478#ifdef EEPROM_TYPE_DEBUG
479 pr_info("sbeCrc: crc 2 calculated as %08x\n", crc); /* RLD DEBUG */
480#endif
481 return crc;
482}
483
484
485/*------------------------------------------------------------------------
486 * pmc_init_seeprom - initialize the serial EEPROM structure
487 *------------------------------------------------------------------------
488 *
489 * At the front of the serial EEPROM there is a record that contains
490 * manufacturing information. If the info does not already exist, it
491 * is created. The only field modifiable by the operator is the
492 * serial number field.
493 */
494
495void
496pmc_init_seeprom (u_int32_t addr, u_int32_t serialNum)
497{
498 PROMFORMAT buffer; /* Memory image of structure */
499 u_int32_t crc; /* CRC of structure */
500 time_t createTime;
501 int i;
502
503#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
504 createTime = CURRENT_TIME;
505#else
506 createTime = get_seconds ();
507#endif
508
509 /* use template data */
510 for (i = 0; i < sizeof (FLD_TYPE2); ++i)
511 buffer.bytes[i] = mfg_template[i];
512
513 /* Update serial number field in buffer */
514 pmcSetBuffValue (&buffer.fldType2.Serial[3], serialNum, 3);
515
516 /* Update create time field in buffer */
517 pmcSetBuffValue (&buffer.fldType2.CreateTime[0], createTime, 4);
518
519 /* Update CRC field in buffer */
520 crc = pmcCalcCrc_T02 (&buffer);
521 pmcSetBuffValue (&buffer.fldType2.Crc32[0], crc, 4);
522
523#ifdef DEBUG
524 for (i = 0; i < sizeof (FLD_TYPE2); ++i)
525 pr_info("[%02X] = %02X\n", i, buffer.bytes[i] & 0xFF);
526#endif
527
528 /* Write structure to serial EEPROM */
529 pmc_eeprom_write_buffer (addr, EE_MFG, (char *) &buffer, sizeof (FLD_TYPE2));
530}
531
532
533char
534pmc_verify_cksum (void *bufp)
535{
536 FLD_TYPE1 *buf1 = bufp;
537 FLD_TYPE2 *buf2 = bufp;
538 u_int32_t crc1, crc2; /* CRC read from EEPROM */
539
540 /* Retrieve contents of CRC field */
541 crc1 = pmcGetBuffValue (&buf1->Crc32[0], sizeof (buf1->Crc32));
542#ifdef EEPROM_TYPE_DEBUG
543 pr_info("EEPROM: chksum 1 reads as %08x\n", crc1); /* RLD DEBUG */
544#endif
545 if ((buf1->type == PROM_FORMAT_TYPE1) &&
546 (pmcCalcCrc_T01 ((void *) buf1) == crc1))
547 return PROM_FORMAT_TYPE1; /* checksum type 1 verified */
548
549 crc2 = pmcGetBuffValue (&buf2->Crc32[0], sizeof (buf2->Crc32));
550#ifdef EEPROM_TYPE_DEBUG
551 pr_info("EEPROM: chksum 2 reads as %08x\n", crc2); /* RLD DEBUG */
552#endif
553 if ((buf2->type == PROM_FORMAT_TYPE2) &&
554 (pmcCalcCrc_T02 ((void *) buf2) == crc2))
555 return PROM_FORMAT_TYPE2; /* checksum type 2 verified */
556
557 return PROM_FORMAT_Unk; /* failed to validate */
558}
559
560
561/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.h b/drivers/staging/cxt1e1/pmc93x6_eeprom.h
new file mode 100644
index 000000000000..c3ada87efd26
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.h
@@ -0,0 +1,60 @@
1/*
2 * $Id: pmc93x6_eeprom.h,v 1.1 2005/09/28 00:10:08 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMC93X6_EEPROM_H_
6#define _INC_PMC93X6_EEPROM_H_
7
8/*-----------------------------------------------------------------------------
9 * pmc93x6_eeprom.h -
10 *
11 * Copyright (C) 2002-2004 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *-----------------------------------------------------------------------------
26 * RCS info:
27 *-----------------------------------------------------------------------------
28 * $Log: pmc93x6_eeprom.h,v $
29 * Revision 1.1 2005/09/28 00:10:08 rickd
30 * pmc_verify_cksum return value is char.
31 *
32 * Revision 1.0 2005/05/04 17:20:51 rickd
33 * Initial revision
34 *
35 * Revision 1.0 2005/04/22 23:48:48 rickd
36 * Initial revision
37 *
38 *-----------------------------------------------------------------------------
39 */
40
41#if defined (__FreeBSD__) || defined (__NetBSD__)
42#include <sys/types.h>
43#else
44#include <linux/types.h>
45#endif
46
47#ifdef __KERNEL__
48
49#include "pmcc4_private.h"
50
51void pmc_eeprom_read_buffer (long, long, char *, int);
52void pmc_eeprom_write_buffer (long, long, char *, int);
53void pmc_init_seeprom (u_int32_t, u_int32_t);
54char pmc_verify_cksum (void *);
55
56#endif /*** __KERNEL__ ***/
57
58#endif
59
60/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/pmcc4.h b/drivers/staging/cxt1e1/pmcc4.h
new file mode 100644
index 000000000000..26c1f0ea72e9
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmcc4.h
@@ -0,0 +1,155 @@
1/*
2 * $Id: pmcc4.h,v 1.4 2005/11/01 19:24:48 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMCC4_H_
6#define _INC_PMCC4_H_
7
8/*-----------------------------------------------------------------------------
9 * pmcc4.h -
10 *
11 * Copyright (C) 2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.4 $
28 * Last changed on $Date: 2005/11/01 19:24:48 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: pmcc4.h,v $
32 * Revision 1.4 2005/11/01 19:24:48 rickd
33 * Remove de-implement function prototypes. Several <int> to
34 * <status_t> changes for consistant usage of same.
35 *
36 * Revision 1.3 2005/09/28 00:10:08 rickd
37 * Add GNU license info. Use config params from libsbew.h
38 *
39 * Revision 1.2 2005/04/28 23:43:03 rickd
40 * Add RCS tracking heading.
41 *
42 *-----------------------------------------------------------------------------
43 */
44
45
46#if defined(__FreeBSD__) || defined(__NetBSD__)
47#include <sys/types.h>
48#else
49#ifndef __KERNEL__
50#include <sys/types.h>
51#else
52#include <linux/types.h>
53#endif
54#endif
55
56
57
58typedef int status_t;
59
60#define SBE_DRVR_FAIL 0
61#define SBE_DRVR_SUCCESS 1
62
63#ifdef __cplusplus
64extern "C"
65{
66#endif
67
68
69/********************/
70/* PMCC4 memory Map */
71/********************/
72
73#define COMET_OFFSET(x) (0x80000+(x)*0x10000)
74#define EEPROM_OFFSET 0xC0000
75#define CPLD_OFFSET 0xD0000
76
77 struct pmcc4_timeslot_param
78 {
79 u_int8_t card; /* the card number */
80 u_int8_t port; /* the port number */
81 u_int8_t _reserved1;
82 u_int8_t _reserved2;
83
84 /*
85 * each byte in bitmask below represents one timeslot (bitmask[0] is
86 * for timeslot 0 and so on), each bit in the byte selects timeslot
87 * bits for this channel (0xff - whole timeslot, 0x7f - 56kbps mode)
88 */
89 u_int8_t bitmask[32];
90 };
91
92 struct c4_musycc_param
93 {
94 u_int8_t RWportnum;
95 u_int16_t offset;
96 u_int32_t value;
97 };
98
99/*Alarm values */
100#define sbeE1RMAI 0x100
101#define sbeYelAlm 0x04
102#define sbeRedAlm 0x02
103#define sbeAISAlm 0x01
104
105#define sbeE1errSMF 0x02
106#define sbeE1CRC 0x01
107
108#ifdef __cplusplus
109}
110#endif
111
112#ifdef __KERNEL__
113
114/*
115 * Device Driver interface, routines are for internal use only.
116 */
117
118#include "pmcc4_private.h"
119
120#if !(LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
121char *get_hdlc_name (hdlc_device *);
122
123#endif
124
125
126/*
127 * external interface
128 */
129
130void c4_cleanup (void);
131status_t c4_chan_up (ci_t *, int channum);
132status_t c4_del_chan_stats (int channum);
133status_t c4_del_chan (int channum);
134status_t c4_get_iidinfo (ci_t * ci, struct sbe_iid_info * iip);
135int c4_is_chan_up (int channum);
136
137void *getuserbychan (int channum);
138void pci_flush_write (ci_t * ci);
139void sbecom_set_loglevel (int debuglevel);
140char *sbeid_get_bdname (ci_t * ci);
141void sbeid_set_bdtype (ci_t * ci);
142void sbeid_set_hdwbid (ci_t * ci);
143u_int32_t sbeCrc (u_int8_t *, u_int32_t, u_int32_t, u_int32_t *);
144
145void VMETRO_TRACE (void *); /* put data into 8 LEDs */
146void VMETRO_TRIGGER (ci_t *, int); /* Note: int = 0(default)
147 * thru 15 */
148
149#if defined (SBE_ISR_TASKLET)
150void musycc_intr_bh_tasklet (ci_t *);
151
152#endif
153
154#endif /*** __KERNEL __ ***/
155#endif /* _INC_PMCC4_H_ */
diff --git a/drivers/staging/cxt1e1/pmcc4_cpld.h b/drivers/staging/cxt1e1/pmcc4_cpld.h
new file mode 100644
index 000000000000..6d8f0337aa3e
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmcc4_cpld.h
@@ -0,0 +1,124 @@
1/*
2 * $Id: pmcc4_cpld.h,v 1.0 2005/09/28 00:10:08 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMCC4_CPLD_H_
6#define _INC_PMCC4_CPLD_H_
7
8/*-----------------------------------------------------------------------------
9 * pmcc4_cpld.h -
10 *
11 * Copyright (C) 2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.0 $
28 * Last changed on $Date: 2005/09/28 00:10:08 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: pmcc4_cpld.h,v $
32 * Revision 1.0 2005/09/28 00:10:08 rickd
33 * Initial revision
34 *
35 *-----------------------------------------------------------------------------
36 */
37
38
39#if defined(__FreeBSD__) || defined(__NetBSD__)
40#include <sys/types.h>
41#else
42#ifndef __KERNEL__
43#include <sys/types.h>
44#else
45#include <linux/types.h>
46#endif
47#endif
48
49#ifdef __cplusplus
50extern "C"
51{
52#endif
53
54
55/********************************/
56/* iSPLD control chip registers */
57/********************************/
58
59#if 0
60#define CPLD_MCSR 0x0
61#define CPLD_MCLK 0x1
62#define CPLD_LEDS 0x2
63#define CPLD_INTR 0x3
64#endif
65
66 struct c4_cpld
67 {
68 volatile u_int32_t mcsr;/* r/w: Master Clock Source Register */
69 volatile u_int32_t mclk;/* r/w: Master Clock Register */
70 volatile u_int32_t leds;/* r/w: LED Register */
71 volatile u_int32_t intr;/* r: Interrupt Register */
72 };
73
74 typedef struct c4_cpld c4cpld_t;
75
76/* mcsr note: sourcing COMET must be initialized to Master Mode */
77#define PMCC4_CPLD_MCSR_IND 0 /* ports used individual BP Clk as
78 * source, no slaves */
79#define PMCC4_CPLD_MCSR_CMT_1 1 /* COMET 1 BP Clk is source, 2,3,4
80 * are Clk slaves */
81#define PMCC4_CPLD_MCSR_CMT_2 2 /* COMET 2 BP Clk is source, 1,3,4
82 * are Clk slaves */
83#define PMCC4_CPLD_MCSR_CMT_3 3 /* COMET 3 BP Clk is source, 1,2,4
84 * are Clk slaves */
85#define PMCC4_CPLD_MCSR_CMT_4 4 /* COMET 4 BP Clk is source, 1,2,3
86 * are Clk slaves */
87
88#define PMCC4_CPLD_MCLK_MASK 0x0f
89#define PMCC4_CPLD_MCLK_P1 0x1
90#define PMCC4_CPLD_MCLK_P2 0x2
91#define PMCC4_CPLD_MCLK_P3 0x4
92#define PMCC4_CPLD_MCLK_P4 0x8
93#define PMCC4_CPLD_MCLK_T1 0x00
94#define PMCC4_CPLD_MCLK_P1_E1 0x01
95#define PMCC4_CPLD_MCLK_P2_E1 0x02
96#define PMCC4_CPLD_MCLK_P3_E1 0x04
97#define PMCC4_CPLD_MCLK_P4_E1 0x08
98
99#define PMCC4_CPLD_LED_OFF 0
100#define PMCC4_CPLD_LED_ON 1
101#define PMCC4_CPLD_LED_GP0 0x01 /* port 0, green */
102#define PMCC4_CPLD_LED_YP0 0x02 /* port 0, yellow */
103#define PMCC4_CPLD_LED_GP1 0x04 /* port 1, green */
104#define PMCC4_CPLD_LED_YP1 0x08 /* port 1, yellow */
105#define PMCC4_CPLD_LED_GP2 0x10 /* port 2, green */
106#define PMCC4_CPLD_LED_YP2 0x20 /* port 2, yellow */
107#define PMCC4_CPLD_LED_GP3 0x40 /* port 3, green */
108#define PMCC4_CPLD_LED_YP3 0x80 /* port 3, yellow */
109#define PMCC4_CPLD_LED_GREEN (PMCC4_CPLD_LED_GP0 | PMCC4_CPLD_LED_GP1 | \
110 PMCC4_CPLD_LED_GP2 | PMCC4_CPLD_LED_GP3 )
111#define PMCC4_CPLD_LED_YELLOW (PMCC4_CPLD_LED_YP0 | PMCC4_CPLD_LED_YP1 | \
112 PMCC4_CPLD_LED_YP2 | PMCC4_CPLD_LED_YP3)
113
114#define PMCC4_CPLD_INTR_MASK 0x0f
115#define PMCC4_CPLD_INTR_CMT_1 0x01
116#define PMCC4_CPLD_INTR_CMT_2 0x02
117#define PMCC4_CPLD_INTR_CMT_3 0x04
118#define PMCC4_CPLD_INTR_CMT_4 0x08
119
120#ifdef __cplusplus
121}
122#endif
123
124#endif /* _INC_PMCC4_CPLD_H_ */
diff --git a/drivers/staging/cxt1e1/pmcc4_defs.h b/drivers/staging/cxt1e1/pmcc4_defs.h
new file mode 100644
index 000000000000..186347b8d565
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmcc4_defs.h
@@ -0,0 +1,82 @@
1/*
2 * $Id: pmcc4_defs.h,v 1.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMCC4_DEFS_H_
6#define _INC_PMCC4_DEFS_H_
7
8/*-----------------------------------------------------------------------------
9 * c4_defs.h -
10 *
11 * Implementation elements of the wanPMC-C4T1E1 device driver
12 *
13 * Copyright (C) 2005 SBE, Inc.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * For further information, contact via email: support@sbei.com
26 * SBE, Inc. San Ramon, California U.S.A.
27 *-----------------------------------------------------------------------------
28 * RCS info:
29 * RCS revision: $Revision: 1.0 $
30 * Last changed on $Date: 2005/09/28 00:10:09 $
31 * Changed by $Author: rickd $
32 *-----------------------------------------------------------------------------
33 * $Log: pmcc4_defs.h,v $
34 * Revision 1.0 2005/09/28 00:10:09 rickd
35 * Initial revision
36 *
37 *-----------------------------------------------------------------------------
38 */
39
40
41#define MAX_BOARDS 8
42#define MAX_CHANS_USED 128
43
44#ifdef SBE_PMCC4_ENABLE
45#define MUSYCC_NPORTS 4 /* CN8474 */
46#endif
47#ifdef SBE_WAN256T3_ENABLE
48#define MUSYCC_NPORTS 8 /* CN8478 */
49#endif
50#define MUSYCC_NCHANS 32 /* actually, chans per port */
51
52#define MUSYCC_NIQD 0x1000 /* power of 2 */
53#define MUSYCC_MRU 2048 /* default */
54#define MUSYCC_MTU 2048 /* default */
55#define MUSYCC_TXDESC_MIN 10 /* HDLC mode default */
56#define MUSYCC_RXDESC_MIN 18 /* HDLC mode default */
57#define MUSYCC_TXDESC_TRANS 4 /* Transparent mode minumum # of TX descriptors */
58#define MUSYCC_RXDESC_TRANS 12 /* Transparent mode minumum # of RX descriptors */
59
60#define MAX_DEFAULT_IFQLEN 32 /* network qlen */
61
62
63#define SBE_IFACETMPL "pmcc4-%d"
64#ifdef IFNAMSIZ
65#define SBE_IFACETMPL_SIZE IFNAMSIZ
66#else
67#define SBE_IFACETMPL_SIZE 16
68#endif
69
70/* we want the PMCC4 watchdog to fire off every 250ms */
71#define WATCHDOG_TIMEOUT 250000
72
73/* if we restart the watchdog every 250ms, then we'll time out
74 * an additional 300ms later */
75#define WATCHDOG_UTIMEOUT (WATCHDOG_TIMEOUT+300000)
76
77#if !defined(SBE_ISR_TASKLET) && !defined(SBE_ISR_IMMEDIATE) && !defined(SBE_ISR_INLINE)
78#define SBE_ISR_TASKLET
79#endif
80
81#endif /*** _INC_PMCC4_DEFS_H_ ***/
82
diff --git a/drivers/staging/cxt1e1/pmcc4_drv.c b/drivers/staging/cxt1e1/pmcc4_drv.c
new file mode 100644
index 000000000000..333cf2687dd1
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmcc4_drv.c
@@ -0,0 +1,1860 @@
1/*
2 * $Id: pmcc4_drv.c,v 3.1 2007/08/15 23:32:17 rickd PMCC4_3_1B $
3 */
4
5
6/*-----------------------------------------------------------------------------
7 * pmcc4_drv.c -
8 *
9 * Copyright (C) 2007 One Stop Systems, Inc.
10 * Copyright (C) 2002-2006 SBE, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * For further information, contact via email: support@onestopsystems.com
23 * One Stop Systems, Inc. Escondido, California U.S.A.
24 *-----------------------------------------------------------------------------
25 * RCS info:
26 * RCS revision: $Revision: 3.1 $
27 * Last changed on $Date: 2007/08/15 23:32:17 $
28 * Changed by $Author: rickd $
29 *-----------------------------------------------------------------------------
30 * $Log: pmcc4_drv.c,v $
31 * Revision 3.1 2007/08/15 23:32:17 rickd
32 * Use 'if 0' instead of GNU comment delimeter to avoid line wrap induced compiler errors.
33 *
34 * Revision 3.0 2007/08/15 22:19:55 rickd
35 * Correct sizeof() castings and pi->regram to support 64bit compatibility.
36 *
37 * Revision 2.10 2006/04/21 00:56:40 rickd
38 * workqueue files now prefixed with <sbecom> prefix.
39 *
40 * Revision 2.9 2005/11/01 19:22:49 rickd
41 * Add sanity checks against max_port for ioctl functions.
42 *
43 * Revision 2.8 2005/10/27 18:59:25 rickd
44 * Code cleanup. Default channel config to HDLC_FCS16.
45 *
46 * Revision 2.7 2005/10/18 18:16:30 rickd
47 * Further NCOMM code repairs - (1) interrupt matrix usage inconsistant
48 * for indexing into nciInterrupt[][], code missing double parameters.
49 * (2) check input of ncomm interrupt registration cardID for correct
50 * boundary values.
51 *
52 * Revision 2.6 2005/10/17 23:55:28 rickd
53 * Initial port of NCOMM support patches from original work found
54 * in pmc_c4t1e1 as updated by NCOMM. Ref: CONFIG_SBE_PMCC4_NCOMM.
55 * Corrected NCOMMs wanpmcC4T1E1_getBaseAddress() to correctly handle
56 * multiple boards.
57 *
58 * Revision 2.5 2005/10/13 23:01:28 rickd
59 * Correct panic for illegal address reference w/in get_brdinfo on
60 * first_if/last_if name acquistion under Linux 2.6
61 *
62 * Revision 2.4 2005/10/13 21:20:19 rickd
63 * Correction of c4_cleanup() wherein next should be acquired before
64 * ci_t structure is free'd.
65 *
66 * Revision 2.3 2005/10/13 19:20:10 rickd
67 * Correct driver removal cleanup code for multiple boards.
68 *
69 * Revision 2.2 2005/10/11 18:34:04 rickd
70 * New routine added to determine number of ports (comets) on board.
71 *
72 * Revision 2.1 2005/10/05 00:48:13 rickd
73 * Add some RX activation trace code.
74 *
75 * Revision 2.0 2005/09/28 00:10:06 rickd
76 * Implement 2.6 workqueue for TX/RX restart. Correction to
77 * hardware register boundary checks allows expanded access of MUSYCC.
78 * Implement new musycc reg&bits namings.
79 *
80 *-----------------------------------------------------------------------------
81 */
82
83char OSSIid_pmcc4_drvc[] =
84"@(#)pmcc4_drv.c - $Revision: 3.1 $ (c) Copyright 2002-2007 One Stop Systems, Inc.";
85
86#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
87
88#if defined (__FreeBSD__) || defined (__NetBSD__)
89#include <sys/param.h>
90#include <sys/systm.h>
91#include <sys/errno.h>
92#else
93#include <linux/types.h>
94#include "pmcc4_sysdep.h"
95#include <linux/errno.h>
96#include <linux/kernel.h>
97#include <linux/sched.h> /* include for timer */
98#include <linux/timer.h> /* include for timer */
99#include <linux/hdlc.h>
100#include <asm/io.h>
101#endif
102
103#include "sbecom_inline_linux.h"
104#include "libsbew.h"
105#include "pmcc4_private.h"
106#include "pmcc4.h"
107#include "pmcc4_ioctls.h"
108#include "musycc.h"
109#include "comet.h"
110#include "sbe_bid.h"
111
112#ifdef SBE_INCLUDE_SYMBOLS
113#define STATIC
114#else
115#define STATIC static
116#endif
117
118
119#define KERN_WARN KERN_WARNING
120
121/* forward references */
122#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
123status_t c4_wk_chan_init (mpi_t *, mch_t *);
124void c4_wq_port_cleanup (mpi_t *);
125status_t c4_wq_port_init (mpi_t *);
126
127#endif
128int c4_loop_port (ci_t *, int, u_int8_t);
129status_t c4_set_port (ci_t *, int);
130status_t musycc_chan_down (ci_t *, int);
131
132u_int32_t musycc_chan_proto (int);
133status_t musycc_dump_ring (ci_t *, unsigned int);
134status_t __init musycc_init (ci_t *);
135void musycc_init_mdt (mpi_t *);
136void musycc_serv_req (mpi_t *, u_int32_t);
137void musycc_update_timeslots (mpi_t *);
138
139extern void musycc_update_tx_thp (mch_t *);
140extern int log_level;
141extern int max_mru;
142extern int max_mtu;
143extern int max_rxdesc_used, max_rxdesc_default;
144extern int max_txdesc_used, max_txdesc_default;
145
146#if defined (__powerpc__)
147extern void *memset (void *s, int c, size_t n);
148
149#endif
150
151int drvr_state = SBE_DRVR_INIT;
152ci_t *c4_list = 0;
153ci_t *CI; /* dummy pointer to board ZEROE's data -
154 * DEBUG USAGE */
155
156
157void
158sbecom_set_loglevel (int d)
159{
160 /*
161 * The code within the following -if- clause is a backdoor debug facility
162 * which can be used to display the state of a board's channel.
163 */
164 if (d > LOG_DEBUG)
165 {
166 unsigned int channum = d - (LOG_DEBUG + 1); /* convert to ZERO
167 * relativity */
168
169 (void) musycc_dump_ring ((ci_t *) CI, channum); /* CI implies support
170 * for card 0 only */
171 } else
172 {
173 if (log_level != d)
174 {
175 pr_info("log level changed from %d to %d\n", log_level, d);
176 log_level = d; /* set new */
177 } else
178 pr_info("log level is %d\n", log_level);
179 }
180}
181
182
183mch_t *
184c4_find_chan (int channum)
185{
186 ci_t *ci;
187 mch_t *ch;
188 int portnum, gchan;
189
190 for (ci = c4_list; ci; ci = ci->next)
191 for (portnum = 0; portnum < ci->max_port; portnum++)
192 for (gchan = 0; gchan < MUSYCC_NCHANS; gchan++)
193 {
194 if ((ch = ci->port[portnum].chan[gchan]))
195 {
196 if ((ch->state != UNASSIGNED) &&
197 (ch->channum == channum))
198 return (ch);
199 }
200 }
201 return 0;
202}
203
204
205ci_t *__init
206c4_new (void *hi)
207{
208 ci_t *ci;
209
210#ifdef SBE_MAP_DEBUG
211 pr_warning("c4_new() entered, ci needs %u.\n",
212 (unsigned int) sizeof (ci_t));
213#endif
214
215 ci = (ci_t *) OS_kmalloc (sizeof (ci_t));
216 if (ci)
217 {
218 ci->hdw_info = hi;
219 ci->state = C_INIT; /* mark as hardware not available */
220 ci->next = c4_list;
221 c4_list = ci;
222 ci->brdno = ci->next ? ci->next->brdno + 1 : 0;
223 } else
224 pr_warning("failed CI malloc, size %u.\n",
225 (unsigned int) sizeof (ci_t));
226
227 if (CI == 0)
228 CI = ci; /* DEBUG, only board 0 usage */
229 return ci;
230}
231
232
233/***
234 * Check port state and set LED states using watchdog or ioctl...
235 * also check for in-band SF loopback commands (& cause results if they are there)
236 *
237 * Alarm function depends on comet bits indicating change in
238 * link status (linkMask) to keep the link status indication straight.
239 *
240 * Indications are only LED and system log -- except when ioctl is invoked.
241 *
242 * "alarmed" record (a.k.a. copyVal, in some cases below) decodes as:
243 *
244 * RMAI (E1 only) 0x100
245 * alarm LED on 0x80
246 * link LED on 0x40
247 * link returned 0x20 (link was down, now it's back and 'port get' hasn't run)
248 * change in LED 0x10 (update LED register because value has changed)
249 * link is down 0x08
250 * YelAlm(RAI) 0x04
251 * RedAlm 0x02
252 * AIS(blue)Alm 0x01
253 *
254 * note "link has returned" indication is reset on read
255 * (e.g. by use of the c4_control port get command)
256 */
257
258#define sbeLinkMask 0x41 /* change in signal status (lost/recovered) +
259 * state */
260#define sbeLinkChange 0x40
261#define sbeLinkDown 0x01
262#define sbeAlarmsMask 0x07 /* red / yellow / blue alarm conditions */
263#define sbeE1AlarmsMask 0x107 /* alarm conditions */
264
265#define COMET_LBCMD_READ 0x80 /* read only (do not set, return read value) */
266
267void
268checkPorts (ci_t * ci)
269{
270#ifndef CONFIG_SBE_PMCC4_NCOMM
271 /*
272 * PORT POINT - NCOMM needs to avoid this code since the polling of
273 * alarms conflicts with NCOMM's interrupt servicing implementation.
274 */
275
276 comet_t *comet;
277 volatile u_int32_t value;
278 u_int32_t copyVal, LEDval;
279
280 u_int8_t portnum;
281
282 LEDval = 0;
283 for (portnum = 0; portnum < ci->max_port; portnum++)
284 {
285 copyVal = 0x12f & (ci->alarmed[portnum]); /* port's alarm record */
286 comet = ci->port[portnum].cometbase;
287 value = pci_read_32 ((u_int32_t *) &comet->cdrc_ists) & sbeLinkMask; /* link loss reg */
288
289 if (value & sbeLinkChange) /* is there a change in the link stuff */
290 {
291 /* if there's been a change (above) and yet it's the same (below) */
292 if (!(((copyVal >> 3) & sbeLinkDown) ^ (value & sbeLinkDown)))
293 {
294 if (value & sbeLinkDown)
295 pr_warning("%s: Port %d momentarily recovered.\n",
296 ci->devname, portnum);
297 else
298 pr_warning("%s: Warning: Port %d link was briefly down.\n",
299 ci->devname, portnum);
300 } else if (value & sbeLinkDown)
301 pr_warning("%s: Warning: Port %d link is down.\n",
302 ci->devname, portnum);
303 else
304 {
305 pr_warning("%s: Port %d link has recovered.\n",
306 ci->devname, portnum);
307 copyVal |= 0x20; /* record link transition to up */
308 }
309 copyVal |= 0x10; /* change (link) --> update LEDs */
310 }
311 copyVal &= 0x137; /* clear LED & link old history bits &
312 * save others */
313 if (value & sbeLinkDown)
314 copyVal |= 0x08; /* record link status (now) */
315 else
316 { /* if link is up, do this */
317 copyVal |= 0x40; /* LED indicate link is up */
318 /* Alarm things & the like ... first if E1, then if T1 */
319 if (IS_FRAME_ANY_E1 (ci->port[portnum].p.port_mode))
320 {
321 /*
322 * first check Codeword (SaX) changes & CRC and
323 * sub-multi-frame errors
324 */
325 /*
326 * note these errors are printed every time they are detected
327 * vs. alarms
328 */
329 value = pci_read_32 ((u_int32_t *) &comet->e1_frmr_nat_ists); /* codeword */
330 if (value & 0x1f)
331 { /* if errors (crc or smf only) */
332 if (value & 0x10)
333 pr_warning("%s: E1 Port %d Codeword Sa4 change detected.\n",
334 ci->devname, portnum);
335 if (value & 0x08)
336 pr_warning("%s: E1 Port %d Codeword Sa5 change detected.\n",
337 ci->devname, portnum);
338 if (value & 0x04)
339 pr_warning("%s: E1 Port %d Codeword Sa6 change detected.\n",
340 ci->devname, portnum);
341 if (value & 0x02)
342 pr_warning("%s: E1 Port %d Codeword Sa7 change detected.\n",
343 ci->devname, portnum);
344 if (value & 0x01)
345 pr_warning("%s: E1 Port %d Codeword Sa8 change detected.\n",
346 ci->devname, portnum);
347 }
348 value = pci_read_32 ((u_int32_t *) &comet->e1_frmr_mists); /* crc & smf */
349 if (value & 0x3)
350 { /* if errors (crc or smf only) */
351 if (value & sbeE1CRC)
352 pr_warning("%s: E1 Port %d CRC-4 error(s) detected.\n",
353 ci->devname, portnum);
354 if (value & sbeE1errSMF) /* error in sub-multiframe */
355 pr_warning("%s: E1 Port %d received errored SMF.\n",
356 ci->devname, portnum);
357 }
358 value = pci_read_32 ((u_int32_t *) &comet->e1_frmr_masts) & 0xcc; /* alarms */
359 /*
360 * pack alarms together (bitmiser), and construct similar to
361 * T1
362 */
363 /* RAI,RMAI,.,.,LOF,AIS,.,. ==> RMAI,.,.,.,.,.,RAI,LOF,AIS */
364 /* see 0x97 */
365 value = (value >> 2);
366 if (value & 0x30)
367 {
368 if (value & 0x20)
369 value |= 0x40; /* RAI */
370 if (value & 0x10)
371 value |= 0x100; /* RMAI */
372 value &= ~0x30;
373 } /* finished packing alarm in handy order */
374 if (value != (copyVal & sbeE1AlarmsMask))
375 { /* if alarms changed */
376 copyVal |= 0x10;/* change LED status */
377 if ((copyVal & sbeRedAlm) && !(value & sbeRedAlm))
378 {
379 copyVal &= ~sbeRedAlm;
380 pr_warning("%s: E1 Port %d LOF alarm ended.\n",
381 ci->devname, portnum);
382 } else if (!(copyVal & sbeRedAlm) && (value & sbeRedAlm))
383 {
384 copyVal |= sbeRedAlm;
385 pr_warning("%s: E1 Warning: Port %d LOF alarm.\n",
386 ci->devname, portnum);
387 } else if ((copyVal & sbeYelAlm) && !(value & sbeYelAlm))
388 {
389 copyVal &= ~sbeYelAlm;
390 pr_warning("%s: E1 Port %d RAI alarm ended.\n",
391 ci->devname, portnum);
392 } else if (!(copyVal & sbeYelAlm) && (value & sbeYelAlm))
393 {
394 copyVal |= sbeYelAlm;
395 pr_warning("%s: E1 Warning: Port %d RAI alarm.\n",
396 ci->devname, portnum);
397 } else if ((copyVal & sbeE1RMAI) && !(value & sbeE1RMAI))
398 {
399 copyVal &= ~sbeE1RMAI;
400 pr_warning("%s: E1 Port %d RMAI alarm ended.\n",
401 ci->devname, portnum);
402 } else if (!(copyVal & sbeE1RMAI) && (value & sbeE1RMAI))
403 {
404 copyVal |= sbeE1RMAI;
405 pr_warning("%s: E1 Warning: Port %d RMAI alarm.\n",
406 ci->devname, portnum);
407 } else if ((copyVal & sbeAISAlm) && !(value & sbeAISAlm))
408 {
409 copyVal &= ~sbeAISAlm;
410 pr_warning("%s: E1 Port %d AIS alarm ended.\n",
411 ci->devname, portnum);
412 } else if (!(copyVal & sbeAISAlm) && (value & sbeAISAlm))
413 {
414 copyVal |= sbeAISAlm;
415 pr_warning("%s: E1 Warning: Port %d AIS alarm.\n",
416 ci->devname, portnum);
417 }
418 }
419 /* end of E1 alarm code */
420 } else
421 { /* if a T1 mode */
422 value = pci_read_32 ((u_int32_t *) &comet->t1_almi_ists); /* alarms */
423 value &= sbeAlarmsMask;
424 if (value != (copyVal & sbeAlarmsMask))
425 { /* if alarms changed */
426 copyVal |= 0x10;/* change LED status */
427 if ((copyVal & sbeRedAlm) && !(value & sbeRedAlm))
428 {
429 copyVal &= ~sbeRedAlm;
430 pr_warning("%s: Port %d red alarm ended.\n",
431 ci->devname, portnum);
432 } else if (!(copyVal & sbeRedAlm) && (value & sbeRedAlm))
433 {
434 copyVal |= sbeRedAlm;
435 pr_warning("%s: Warning: Port %d red alarm.\n",
436 ci->devname, portnum);
437 } else if ((copyVal & sbeYelAlm) && !(value & sbeYelAlm))
438 {
439 copyVal &= ~sbeYelAlm;
440 pr_warning("%s: Port %d yellow (RAI) alarm ended.\n",
441 ci->devname, portnum);
442 } else if (!(copyVal & sbeYelAlm) && (value & sbeYelAlm))
443 {
444 copyVal |= sbeYelAlm;
445 pr_warning("%s: Warning: Port %d yellow (RAI) alarm.\n",
446 ci->devname, portnum);
447 } else if ((copyVal & sbeAISAlm) && !(value & sbeAISAlm))
448 {
449 copyVal &= ~sbeAISAlm;
450 pr_warning("%s: Port %d blue (AIS) alarm ended.\n",
451 ci->devname, portnum);
452 } else if (!(copyVal & sbeAISAlm) && (value & sbeAISAlm))
453 {
454 copyVal |= sbeAISAlm;
455 pr_warning("%s: Warning: Port %d blue (AIS) alarm.\n",
456 ci->devname, portnum);
457 }
458 }
459 } /* end T1 mode alarm checks */
460 }
461 if (copyVal & sbeAlarmsMask)
462 copyVal |= 0x80; /* if alarm turn yel LED on */
463 if (copyVal & 0x10)
464 LEDval |= 0x100; /* tag if LED values have changed */
465 LEDval |= ((copyVal & 0xc0) >> (6 - (portnum * 2)));
466
467 ci->alarmed[portnum] &= 0xfffff000; /* out with the old (it's fff
468 * ... foo) */
469 ci->alarmed[portnum] |= (copyVal); /* in with the new */
470
471 /*
472 * enough with the alarms and LED's, now let's check for loopback
473 * requests
474 */
475
476 if (IS_FRAME_ANY_T1 (ci->port[portnum].p.port_mode))
477 { /* if a T1 mode */
478 /*
479 * begin in-band (SF) loopback code detection -- start by reading
480 * command
481 */
482 value = pci_read_32 ((u_int32_t *) &comet->ibcd_ies); /* detect reg. */
483 value &= 0x3; /* trim to handy bits */
484 if (value & 0x2)
485 { /* activate loopback (sets for deactivate
486 * code length) */
487 copyVal = c4_loop_port (ci, portnum, COMET_LBCMD_READ); /* read line loopback
488 * mode */
489 if (copyVal != COMET_MDIAG_LINELB) /* don't do it again if
490 * already in that mode */
491 c4_loop_port (ci, portnum, COMET_MDIAG_LINELB); /* put port in line
492 * loopback mode */
493 }
494 if (value & 0x1)
495 { /* deactivate loopback (sets for activate
496 * code length) */
497 copyVal = c4_loop_port (ci, portnum, COMET_LBCMD_READ); /* read line loopback
498 * mode */
499 if (copyVal != COMET_MDIAG_LBOFF) /* don't do it again if
500 * already in that mode */
501 c4_loop_port (ci, portnum, COMET_MDIAG_LBOFF); /* take port out of any
502 * loopback mode */
503 }
504 }
505 if (IS_FRAME_ANY_T1ESF (ci->port[portnum].p.port_mode))
506 { /* if a T1 ESF mode */
507 /* begin ESF loopback code */
508 value = pci_read_32 ((u_int32_t *) &comet->t1_rboc_sts) & 0x3f; /* read command */
509 if (value == 0x07)
510 c4_loop_port (ci, portnum, COMET_MDIAG_LINELB); /* put port in line
511 * loopback mode */
512 if (value == 0x0a)
513 c4_loop_port (ci, portnum, COMET_MDIAG_PAYLB); /* put port in payload
514 * loopbk mode */
515 if ((value == 0x1c) || (value == 0x19) || (value == 0x12))
516 c4_loop_port (ci, portnum, COMET_MDIAG_LBOFF); /* take port out of any
517 * loopbk mode */
518 if (log_level >= LOG_DEBUG)
519 if (value != 0x3f)
520 pr_warning("%s: BOC value = %x on Port %d\n",
521 ci->devname, value, portnum);
522 /* end ESF loopback code */
523 }
524 }
525
526 /* if something is new, update LED's */
527 if (LEDval & 0x100)
528 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, LEDval & 0xff);
529#endif /*** CONFIG_SBE_PMCC4_NCOMM ***/
530}
531
532
533STATIC void
534c4_watchdog (ci_t * ci)
535{
536#if 0
537 //unsigned long flags;
538#endif
539
540 if (drvr_state != SBE_DRVR_AVAILABLE)
541 {
542 if (log_level >= LOG_MONITOR)
543 pr_info("drvr not available (%x)\n", drvr_state);
544 return;
545 }
546#if 0
547 SD_SEM_TAKE (&ci->sem_wdbusy, "_wd_"); /* only 1 thru here, per
548 * board */
549#endif
550
551 ci->wdcount++;
552 checkPorts (ci);
553#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,41)
554 if (ci->wd_notify)
555 { /* is there a state change to search for */
556 int port, gchan;
557
558 ci->wd_notify = 0; /* reset notification */
559 for (gchan = 0; gchan < MUSYCC_NCHANS; gchan++)
560 {
561 for (port = 0; port < ci->max_port; port++)
562 {
563 mch_t *ch = ci->port[port].chan[gchan];
564
565 if (!ch || ci->state != C_RUNNING) /* state changed while
566 * acquiring semaphore */
567 break;
568 if (ch->state == UP)/* channel must be set up */
569 {
570#if 0
571#ifdef RLD_TRANS_DEBUG
572 if (1 || log_level >= LOG_MONITOR)
573#else
574 if (log_level >= LOG_MONITOR)
575#endif
576 pr_info("%s: watchdog reviving Port %d Channel %d [%d] sts %x/%x, start_TX %x free %x start_RX %x\n",
577 ci->devname, ch->channum, port, gchan, ch->channum,
578 ch->p.status, ch->status,
579 ch->ch_start_tx, ch->txd_free, ch->ch_start_rx);
580#endif
581
582 /**********************************/
583 /** check for RX restart request **/
584 /**********************************/
585
586 if (ch->ch_start_rx &&
587 (ch->status & RX_ENABLED)) /* requires start on
588 * enabled RX */
589 {
590 ch->ch_start_rx = 0; /* we are restarting RX... */
591#ifdef RLD_TRANS_DEBUG
592 pr_info("++ c4_watchdog() CHAN RX ACTIVATE: chan %d\n",
593 ch->channum);
594#endif
595#ifdef RLD_RXACT_DEBUG
596 {
597 struct mdesc *md;
598 static int hereb4 = 7;
599
600 if (hereb4)
601 {
602 hereb4--;
603 md = &ch->mdr[ch->rxix_irq_srv];
604 pr_info("++ c4_watchdog[%d] CHAN RX ACTIVATE: rxix_irq_srv %d, md %p sts %x, rxpkt %lu\n",
605 ch->channum, ch->rxix_irq_srv, md, le32_to_cpu (md->status), ch->s.rx_packets);
606 musycc_dump_rxbuffer_ring (ch, 1); /* RLD DEBUG */
607 }
608 }
609#endif
610 musycc_serv_req (ch->up, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | gchan);
611 }
612 /**********************************/
613 /** check for TX restart request **/
614 /**********************************/
615
616 if (ch->ch_start_tx &&
617 (ch->status & TX_ENABLED)) /* requires start on
618 * enabled TX */
619 {
620 struct mdesc *md;
621
622 /*
623 * find next unprocessed message, then set TX thp to
624 * it
625 */
626 musycc_update_tx_thp (ch);
627
628#if 0
629 spin_lock_irqsave (&ch->ch_txlock, flags);
630#endif
631 md = ch->txd_irq_srv;
632 if (!md)
633 {
634 pr_info("-- c4_watchdog[%d]: WARNING, starting NULL md\n",
635 ch->channum);
636 pr_info("-- chan %d txd_irq_srv %p sts %x usr_add %p sts %x, txpkt %lu\n",
637 ch->channum, ch->txd_irq_srv, le32_to_cpu ((struct mdesc *) (ch->txd_irq_srv)->status),
638 ch->txd_usr_add, le32_to_cpu ((struct mdesc *) (ch->txd_usr_add)->status),
639 ch->s.tx_packets);
640#if 0
641 spin_unlock_irqrestore (&ch->ch_txlock, flags);
642#endif
643 } else if (md->data && ((le32_to_cpu (md->status)) & MUSYCC_TX_OWNED))
644 {
645#ifdef RLD_TRANS_DEBUG
646 pr_info("++ c4_watchdog[%d] CHAN TX ACTIVATE: start_tx %x\n",
647 ch->channum, ch->ch_start_tx);
648#endif
649 ch->ch_start_tx = 0; /* we are restarting
650 * TX... */
651#if 0
652 spin_unlock_irqrestore (&ch->ch_txlock, flags); /* allow interrupts for
653 * service request */
654#endif
655 musycc_serv_req (ch->up, SR_CHANNEL_ACTIVATE | SR_TX_DIRECTION | gchan);
656#ifdef RLD_TRANS_DEBUG
657 if (1 || log_level >= LOG_MONITOR)
658#else
659 if (log_level >= LOG_MONITOR)
660#endif
661 pr_info("++ SACK[P%d/C%d] ack'd, continuing...\n",
662 ch->up->portnum, ch->channum);
663 }
664 }
665 }
666 }
667 }
668 }
669#else
670 ci->wd_notify = 0;
671#endif
672#if 0
673 SD_SEM_GIVE (&ci->sem_wdbusy);/* release per-board hold */
674#endif
675}
676
677
678void
679c4_cleanup (void)
680{
681 ci_t *ci, *next;
682 mpi_t *pi;
683 int portnum, j;
684
685 ci = c4_list;
686 while (ci)
687 {
688 next = ci->next; /* protect <next> from upcoming <free> */
689 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, PMCC4_CPLD_LED_OFF);
690 for (portnum = 0; portnum < ci->max_port; portnum++)
691 {
692 pi = &ci->port[portnum];
693#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
694 c4_wq_port_cleanup (pi);
695#endif
696 for (j = 0; j < MUSYCC_NCHANS; j++)
697 {
698 if (pi->chan[j])
699 OS_kfree (pi->chan[j]); /* free mch_t struct */
700 }
701 OS_kfree (pi->regram_saved);
702 }
703#if 0
704 /* obsolete - watchdog is now static w/in ci_t */
705 OS_free_watchdog (ci->wd);
706#endif
707 OS_kfree (ci->iqd_p_saved);
708 OS_kfree (ci);
709 ci = next; /* cleanup next board, if any */
710 }
711}
712
713
714/*
715 * This function issues a write to all comet chips and expects the same data
716 * to be returned from the subsequent read. This determines the board build
717 * to be a 1-port, 2-port, or 4-port build. The value returned represents a
718 * bit-mask of the found ports. Only certain configurations are considered
719 * VALID or LEGAL builds.
720 */
721
722int
723c4_get_portcfg (ci_t * ci)
724{
725 comet_t *comet;
726 int portnum, mask;
727 u_int32_t wdata, rdata;
728
729 wdata = COMET_MDIAG_LBOFF; /* take port out of any loopback mode */
730
731 mask = 0;
732 for (portnum = 0; portnum < MUSYCC_NPORTS; portnum++)
733 {
734 comet = ci->port[portnum].cometbase;
735 pci_write_32 ((u_int32_t *) &comet->mdiag, wdata);
736 rdata = pci_read_32 ((u_int32_t *) &comet->mdiag) & COMET_MDIAG_LBMASK;
737 if (wdata == rdata)
738 mask |= 1 << portnum;
739 }
740 return mask;
741}
742
743
744/* nothing herein should generate interrupts */
745
746status_t __init
747c4_init (ci_t * ci, u_char *func0, u_char *func1)
748{
749 mpi_t *pi;
750 mch_t *ch;
751 static u_int32_t count = 0;
752 int portnum, j;
753
754 ci->state = C_INIT;
755 ci->brdno = count++;
756 ci->intlog.this_status_new = 0;
757 atomic_set (&ci->bh_pending, 0);
758
759 ci->reg = (struct musycc_globalr *) func0;
760 ci->eeprombase = (u_int32_t *) (func1 + EEPROM_OFFSET);
761 ci->cpldbase = (c4cpld_t *) ((u_int32_t *) (func1 + ISPLD_OFFSET));
762
763 /*** PORT POINT - the following is the first access of any type to the hardware ***/
764#ifdef CONFIG_SBE_PMCC4_NCOMM
765 /* NCOMM driver uses INTB interrupt to monitor CPLD register */
766 pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC);
767#else
768 /* standard driver POLLS for INTB via CPLD register */
769 pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE);
770#endif
771
772 {
773 int pmsk;
774
775 /* need comet addresses available for determination of hardware build */
776 for (portnum = 0; portnum < MUSYCC_NPORTS; portnum++)
777 {
778 pi = &ci->port[portnum];
779 pi->cometbase = (comet_t *) ((u_int32_t *) (func1 + COMET_OFFSET (portnum)));
780 pi->reg = (struct musycc_globalr *) ((u_char *) ci->reg + (portnum * 0x800));
781 pi->portnum = portnum;
782 pi->p.portnum = portnum;
783 pi->openchans = 0;
784#ifdef SBE_MAP_DEBUG
785 pr_info("Comet-%d: addr = %p\n", portnum, pi->cometbase);
786#endif
787 }
788 pmsk = c4_get_portcfg (ci);
789 switch (pmsk)
790 {
791 case 0x1:
792 ci->max_port = 1;
793 break;
794 case 0x3:
795 ci->max_port = 2;
796 break;
797#if 0
798 case 0x7: /* not built, but could be... */
799 ci->max_port = 3;
800 break;
801#endif
802 case 0xf:
803 ci->max_port = 4;
804 break;
805 default:
806 ci->max_port = 0;
807 pr_warning("%s: illegal port configuration (%x)\n",
808 ci->devname, pmsk);
809 return SBE_DRVR_FAIL;
810 }
811#ifdef SBE_MAP_DEBUG
812 pr_info(">> %s: c4_get_build - pmsk %x max_port %x\n",
813 ci->devname, pmsk, ci->max_port);
814#endif
815 }
816
817 for (portnum = 0; portnum < ci->max_port; portnum++)
818 {
819 pi = &ci->port[portnum];
820 pi->up = ci;
821 pi->sr_last = 0xffffffff;
822 pi->p.port_mode = CFG_FRAME_SF; /* T1 B8ZS, the default */
823 pi->p.portP = (CFG_CLK_PORT_EXTERNAL | CFG_LBO_LH0); /* T1 defaults */
824
825 OS_sem_init (&pi->sr_sem_busy, SEM_AVAILABLE);
826 OS_sem_init (&pi->sr_sem_wait, SEM_TAKEN);
827
828 for (j = 0; j < 32; j++)
829 {
830 pi->fifomap[j] = -1;
831 pi->tsm[j] = 0; /* no assignments, all available */
832 }
833
834 /* allocate channel structures for this port */
835 for (j = 0; j < MUSYCC_NCHANS; j++)
836 {
837 ch = OS_kmalloc (sizeof (mch_t));
838 if (ch)
839 {
840 pi->chan[j] = ch;
841 ch->state = UNASSIGNED;
842 ch->up = pi;
843 ch->gchan = (-1); /* channel assignment not yet known */
844 ch->channum = (-1); /* channel assignment not yet known */
845 ch->p.card = ci->brdno;
846 ch->p.port = portnum;
847 ch->p.channum = (-1); /* channel assignment not yet known */
848 ch->p.mode_56k = 0; /* default is 64kbps mode */
849 } else
850 {
851 pr_warning("failed mch_t malloc, port %d channel %d size %u.\n",
852 portnum, j, (unsigned int) sizeof (mch_t));
853 break;
854 }
855 }
856 }
857
858
859 {
860 /*
861 * Set LEDs through their paces to supply visual proof that LEDs are
862 * functional and not burnt out nor broken.
863 *
864 * YELLOW + GREEN -> OFF.
865 */
866
867 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds,
868 PMCC4_CPLD_LED_GREEN | PMCC4_CPLD_LED_YELLOW);
869 OS_uwait (750000, "leds");
870 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, PMCC4_CPLD_LED_OFF);
871 }
872
873 OS_init_watchdog (&ci->wd, (void (*) (void *)) c4_watchdog, ci, WATCHDOG_TIMEOUT);
874 return SBE_DRVR_SUCCESS;
875}
876
877
878/* better be fully setup to handle interrupts when you call this */
879
880status_t __init
881c4_init2 (ci_t * ci)
882{
883 status_t ret;
884
885 /* PORT POINT: this routine generates first interrupt */
886 if ((ret = musycc_init (ci)) != SBE_DRVR_SUCCESS)
887 return ret;
888
889#if 0
890 ci->p.framing_type = FRAMING_CBP;
891 ci->p.h110enable = 1;
892#if 0
893 ci->p.hypersize = 0;
894#else
895 hyperdummy = 0;
896#endif
897 ci->p.clock = 0; /* Use internal clocking until set to
898 * external */
899 c4_card_set_params (ci, &ci->p);
900#endif
901 OS_start_watchdog (&ci->wd);
902 return SBE_DRVR_SUCCESS;
903}
904
905
906/* This function sets the loopback mode (or clears it, as the case may be). */
907
908int
909c4_loop_port (ci_t * ci, int portnum, u_int8_t cmd)
910{
911 comet_t *comet;
912 volatile u_int32_t loopValue;
913
914 comet = ci->port[portnum].cometbase;
915 loopValue = pci_read_32 ((u_int32_t *) &comet->mdiag) & COMET_MDIAG_LBMASK;
916
917 if (cmd & COMET_LBCMD_READ)
918 return loopValue; /* return the read value */
919
920 if (loopValue != cmd)
921 {
922 switch (cmd)
923 {
924 case COMET_MDIAG_LINELB:
925 /* set(SF)loopback down (turn off) code length to 6 bits */
926 pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x05);
927 break;
928 case COMET_MDIAG_LBOFF:
929 /* set (SF) loopback up (turn on) code length to 5 bits */
930 pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x00);
931 break;
932 }
933
934 pci_write_32 ((u_int32_t *) &comet->mdiag, cmd);
935 if (log_level >= LOG_WARN)
936 pr_info("%s: loopback mode changed to %2x from %2x on Port %d\n",
937 ci->devname, cmd, loopValue, portnum);
938 loopValue = pci_read_32 ((u_int32_t *) &comet->mdiag) & COMET_MDIAG_LBMASK;
939 if (loopValue != cmd)
940 {
941 if (log_level >= LOG_ERROR)
942 pr_info("%s: write to loop register failed, unknown state for Port %d\n",
943 ci->devname, portnum);
944 }
945 } else
946 {
947 if (log_level >= LOG_WARN)
948 pr_info("%s: loopback already in that mode (%2x)\n",
949 ci->devname, loopValue);
950 }
951 return 0;
952}
953
954
955/* c4_frame_rw: read or write the comet register specified
956 * (modifies use of port_param to non-standard use of struct)
957 * Specifically:
958 * pp.portnum (one guess)
959 * pp.port_mode offset of register
960 * pp.portP write (or not, i.e. read)
961 * pp.portStatus write value
962 * BTW:
963 * pp.portStatus also used to return read value
964 * pp.portP also used during write, to return old reg value
965 */
966
967status_t
968c4_frame_rw (ci_t * ci, struct sbecom_port_param * pp)
969{
970 comet_t *comet;
971 volatile u_int32_t data;
972
973 if (pp->portnum >= ci->max_port)/* sanity check */
974 return ENXIO;
975
976 comet = ci->port[pp->portnum].cometbase;
977 data = pci_read_32 ((u_int32_t *) comet + pp->port_mode) & 0xff;
978
979 if (pp->portP)
980 { /* control says this is a register
981 * _write_ */
982 if (pp->portStatus == data)
983 pr_info("%s: Port %d already that value! Writing again anyhow.\n",
984 ci->devname, pp->portnum);
985 pp->portP = (u_int8_t) data;
986 pci_write_32 ((u_int32_t *) comet + pp->port_mode,
987 pp->portStatus);
988 data = pci_read_32 ((u_int32_t *) comet + pp->port_mode) & 0xff;
989 }
990 pp->portStatus = (u_int8_t) data;
991 return 0;
992}
993
994
995/* c4_pld_rw: read or write the pld register specified
996 * (modifies use of port_param to non-standard use of struct)
997 * Specifically:
998 * pp.port_mode offset of register
999 * pp.portP write (or not, i.e. read)
1000 * pp.portStatus write value
1001 * BTW:
1002 * pp.portStatus also used to return read value
1003 * pp.portP also used during write, to return old reg value
1004 */
1005
1006status_t
1007c4_pld_rw (ci_t * ci, struct sbecom_port_param * pp)
1008{
1009 volatile u_int32_t *regaddr;
1010 volatile u_int32_t data;
1011 int regnum = pp->port_mode;
1012
1013 regaddr = (u_int32_t *) ci->cpldbase + regnum;
1014 data = pci_read_32 ((u_int32_t *) regaddr) & 0xff;
1015
1016 if (pp->portP)
1017 { /* control says this is a register
1018 * _write_ */
1019 pp->portP = (u_int8_t) data;
1020 pci_write_32 ((u_int32_t *) regaddr, pp->portStatus);
1021 data = pci_read_32 ((u_int32_t *) regaddr) & 0xff;
1022 }
1023 pp->portStatus = (u_int8_t) data;
1024 return 0;
1025}
1026
1027/* c4_musycc_rw: read or write the musycc register specified
1028 * (modifies use of port_param to non-standard use of struct)
1029 * Specifically:
1030 * mcp.RWportnum port number and write indication bit (0x80)
1031 * mcp.offset offset of register
1032 * mcp.value write value going in and read value returning
1033 */
1034
1035/* PORT POINT: TX Subchannel Map registers are write-only
1036 * areas within the MUSYCC and always return FF */
1037/* PORT POINT: regram and reg structures are minorly different and <offset> ioctl
1038 * settings are aligned with the <reg> struct musycc_globalr{} usage.
1039 * Also, regram is separately allocated shared memory, allocated for each port.
1040 * PORT POINT: access offsets of 0x6000 for Msg Cfg Desc Tbl are for 4-port MUSYCC
1041 * only. (An 8-port MUSYCC has 0x16000 offsets for accessing its upper 4 tables.)
1042 */
1043
1044status_t
1045c4_musycc_rw (ci_t * ci, struct c4_musycc_param * mcp)
1046{
1047 mpi_t *pi;
1048 volatile u_int32_t *dph; /* hardware implemented register */
1049 u_int32_t *dpr = 0; /* RAM image of registers for group command
1050 * usage */
1051 int offset = mcp->offset % 0x800; /* group relative address
1052 * offset, mcp->portnum is
1053 * not used */
1054 int portnum, ramread = 0;
1055 volatile u_int32_t data;
1056
1057 /*
1058 * Sanity check hardware accessibility. The 0x6000 portion handles port
1059 * numbers associated with Msg Descr Tbl decoding.
1060 */
1061 portnum = (mcp->offset % 0x6000) / 0x800;
1062 if (portnum >= ci->max_port)
1063 return ENXIO;
1064 pi = &ci->port[portnum];
1065 if (mcp->offset >= 0x6000)
1066 offset += 0x6000; /* put back in MsgCfgDesc address offset */
1067 dph = (u_int32_t *) ((u_long) pi->reg + offset);
1068
1069 /* read of TX are from RAM image, since hardware returns FF */
1070 dpr = (u_int32_t *) ((u_long) pi->regram + offset);
1071 if (mcp->offset < 0x6000) /* non MsgDesc Tbl accesses might require
1072 * RAM access */
1073 {
1074 if (offset >= 0x200 && offset < 0x380)
1075 ramread = 1;
1076 if (offset >= 0x10 && offset < 0x200)
1077 ramread = 1;
1078 }
1079 /* read register from RAM or hardware, depending... */
1080 if (ramread)
1081 {
1082 data = *dpr;
1083 //pr_info("c4_musycc_rw: RAM addr %p read data %x (portno %x offset %x RAM ramread %x)\n", dpr, data, portnum, offset, ramread); /* RLD DEBUG */
1084 } else
1085 {
1086 data = pci_read_32 ((u_int32_t *) dph);
1087 //pr_info("c4_musycc_rw: REG addr %p read data %x (portno %x offset %x RAM ramread %x)\n", dph, data, portnum, offset, ramread); /* RLD DEBUG */
1088 }
1089
1090
1091 if (mcp->RWportnum & 0x80)
1092 { /* control says this is a register
1093 * _write_ */
1094 if (mcp->value == data)
1095 pr_info("%s: musycc grp%d already that value! writing again anyhow.\n",
1096 ci->devname, (mcp->RWportnum & 0x7));
1097 /* write register RAM */
1098 if (ramread)
1099 *dpr = mcp->value;
1100 /* write hardware register */
1101 pci_write_32 ((u_int32_t *) dph, mcp->value);
1102 }
1103 mcp->value = data; /* return the read value (or the 'old
1104 * value', if is write) */
1105 return 0;
1106}
1107
1108status_t
1109c4_get_port (ci_t * ci, int portnum)
1110{
1111 if (portnum >= ci->max_port) /* sanity check */
1112 return ENXIO;
1113
1114 SD_SEM_TAKE (&ci->sem_wdbusy, "_wd_"); /* only 1 thru here, per
1115 * board */
1116 checkPorts (ci);
1117 ci->port[portnum].p.portStatus = (u_int8_t) ci->alarmed[portnum];
1118 ci->alarmed[portnum] &= 0xdf;
1119 SD_SEM_GIVE (&ci->sem_wdbusy); /* release per-board hold */
1120 return 0;
1121}
1122
1123status_t
1124c4_set_port (ci_t * ci, int portnum)
1125{
1126 mpi_t *pi;
1127 struct sbecom_port_param *pp;
1128 int e1mode;
1129 u_int8_t clck;
1130 int i;
1131
1132 if (portnum >= ci->max_port) /* sanity check */
1133 return ENXIO;
1134
1135 pi = &ci->port[portnum];
1136 pp = &ci->port[portnum].p;
1137 e1mode = IS_FRAME_ANY_E1 (pp->port_mode);
1138 if (log_level >= LOG_MONITOR2)
1139 {
1140 pr_info("%s: c4_set_port[%d]: entered, e1mode = %x, openchans %d.\n",
1141 ci->devname,
1142 portnum, e1mode, pi->openchans);
1143 }
1144 if (pi->openchans)
1145 return EBUSY; /* group needs initialization only for
1146 * first channel of a group */
1147
1148#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
1149 {
1150 status_t ret;
1151
1152 if ((ret = c4_wq_port_init (pi))) /* create/init
1153 * workqueue_struct */
1154 return (ret);
1155 }
1156#endif
1157
1158 init_comet (ci, pi->cometbase, pp->port_mode, 1 /* clockmaster == true */ , pp->portP);
1159 clck = pci_read_32 ((u_int32_t *) &ci->cpldbase->mclk) & PMCC4_CPLD_MCLK_MASK;
1160 if (e1mode)
1161 clck |= 1 << portnum;
1162 else
1163 clck &= 0xf ^ (1 << portnum);
1164
1165 pci_write_32 ((u_int32_t *) &ci->cpldbase->mclk, clck);
1166 pci_write_32 ((u_int32_t *) &ci->cpldbase->mcsr, PMCC4_CPLD_MCSR_IND);
1167 pci_write_32 ((u_int32_t *) &pi->reg->gbp, OS_vtophys (pi->regram));
1168
1169 /*********************************************************************/
1170 /* ERRATA: If transparent mode is used, do not set OOFMP_DISABLE bit */
1171 /*********************************************************************/
1172
1173 pi->regram->grcd =
1174 __constant_cpu_to_le32 (MUSYCC_GRCD_RX_ENABLE |
1175 MUSYCC_GRCD_TX_ENABLE |
1176 MUSYCC_GRCD_OOFMP_DISABLE |
1177 MUSYCC_GRCD_SF_ALIGN | /* per MUSYCC ERRATA,
1178 * for T1 * fix */
1179 MUSYCC_GRCD_COFAIRQ_DISABLE |
1180 MUSYCC_GRCD_MC_ENABLE |
1181 (MUSYCC_GRCD_POLLTH_32 << MUSYCC_GRCD_POLLTH_SHIFT));
1182
1183 pi->regram->pcd =
1184 __constant_cpu_to_le32 ((e1mode ? 1 : 0) |
1185 MUSYCC_PCD_TXSYNC_RISING |
1186 MUSYCC_PCD_RXSYNC_RISING |
1187 MUSYCC_PCD_RXDATA_RISING);
1188
1189 /* Message length descriptor */
1190 pi->regram->mld = __constant_cpu_to_le32 (max_mru | (max_mru << 16));
1191
1192 /* tsm algorithm */
1193 for (i = 0; i < 32; i++)
1194 {
1195
1196 /*** ASSIGNMENT NOTES: ***/
1197 /*** Group's channel ZERO unavailable if E1. ***/
1198 /*** Group's channel 16 unavailable if E1 CAS. ***/
1199 /*** Group's channels 24-31 unavailable if T1. ***/
1200
1201 if (((i == 0) && e1mode) ||
1202 ((i == 16) && ((pp->port_mode == CFG_FRAME_E1CRC_CAS) || (pp->port_mode == CFG_FRAME_E1CRC_CAS_AMI)))
1203 || ((i > 23) && (!e1mode)))
1204 {
1205 pi->tsm[i] = 0xff; /* make tslot unavailable for this mode */
1206 } else
1207 {
1208 pi->tsm[i] = 0x00; /* make tslot available for assignment */
1209 }
1210 }
1211 for (i = 0; i < MUSYCC_NCHANS; i++)
1212 {
1213 pi->regram->ttsm[i] = 0;
1214 pi->regram->rtsm[i] = 0;
1215 }
1216 FLUSH_MEM_WRITE ();
1217 musycc_serv_req (pi, SR_GROUP_INIT | SR_RX_DIRECTION);
1218 musycc_serv_req (pi, SR_GROUP_INIT | SR_TX_DIRECTION);
1219
1220 musycc_init_mdt (pi);
1221
1222 pi->group_is_set = 1;
1223 pi->p = *pp;
1224 return 0;
1225}
1226
1227
1228unsigned int max_int = 0;
1229
1230status_t
1231c4_new_chan (ci_t * ci, int portnum, int channum, void *user)
1232{
1233 mpi_t *pi;
1234 mch_t *ch;
1235 int gchan;
1236
1237 if (c4_find_chan (channum)) /* a new channel shouldn't already exist */
1238 return EEXIST;
1239
1240 if (portnum >= ci->max_port) /* sanity check */
1241 return ENXIO;
1242
1243 pi = &(ci->port[portnum]);
1244 /* find any available channel within this port */
1245 for (gchan = 0; gchan < MUSYCC_NCHANS; gchan++)
1246 {
1247 ch = pi->chan[gchan];
1248 if (ch && ch->state == UNASSIGNED) /* no assignment is good! */
1249 break;
1250 }
1251 if (gchan == MUSYCC_NCHANS) /* exhausted table, all were assigned */
1252 return ENFILE;
1253
1254 ch->up = pi;
1255
1256 /* NOTE: mch_t already cleared during OS_kmalloc() */
1257 ch->state = DOWN;
1258 ch->user = user;
1259 ch->gchan = gchan;
1260 ch->channum = channum; /* mark our channel assignment */
1261 ch->p.channum = channum;
1262#if 1
1263 ch->p.card = ci->brdno;
1264 ch->p.port = portnum;
1265#endif
1266 ch->p.chan_mode = CFG_CH_PROTO_HDLC_FCS16;
1267 ch->p.idlecode = CFG_CH_FLAG_7E;
1268 ch->p.pad_fill_count = 2;
1269 spin_lock_init (&ch->ch_rxlock);
1270 spin_lock_init (&ch->ch_txlock);
1271
1272#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41)
1273 {
1274 status_t ret;
1275
1276 if ((ret = c4_wk_chan_init (pi, ch)))
1277 return ret;
1278 }
1279#endif
1280
1281 /* save off interface assignments which bound a board */
1282 if (ci->first_if == 0) /* first channel registered is assumed to
1283 * be the lowest channel */
1284 {
1285 ci->first_if = ci->last_if = user;
1286 ci->first_channum = ci->last_channum = channum;
1287 } else
1288 {
1289 ci->last_if = user;
1290 if (ci->last_channum < channum) /* higher number channel found */
1291 ci->last_channum = channum;
1292 }
1293 return 0;
1294}
1295
1296status_t
1297c4_del_chan (int channum)
1298{
1299 mch_t *ch;
1300
1301 if (!(ch = c4_find_chan (channum)))
1302 return ENOENT;
1303 if (ch->state == UP)
1304 musycc_chan_down ((ci_t *) 0, channum);
1305 ch->state = UNASSIGNED;
1306 ch->gchan = (-1);
1307 ch->channum = (-1);
1308 ch->p.channum = (-1);
1309 return 0;
1310}
1311
1312status_t
1313c4_del_chan_stats (int channum)
1314{
1315 mch_t *ch;
1316
1317 if (!(ch = c4_find_chan (channum)))
1318 return ENOENT;
1319
1320 memset (&ch->s, 0, sizeof (struct sbecom_chan_stats));
1321 return 0;
1322}
1323
1324
1325status_t
1326c4_set_chan (int channum, struct sbecom_chan_param * p)
1327{
1328 mch_t *ch;
1329 int i, x = 0;
1330
1331 if (!(ch = c4_find_chan (channum)))
1332 return ENOENT;
1333
1334#if 1
1335 if (ch->p.card != p->card ||
1336 ch->p.port != p->port ||
1337 ch->p.channum != p->channum)
1338 return EINVAL;
1339#endif
1340
1341 if (!(ch->up->group_is_set))
1342 {
1343 return EIO; /* out of order, SET_PORT command
1344 * required prior to first group's
1345 * SET_CHAN command */
1346 }
1347 /*
1348 * Check for change of parameter settings in order to invoke closing of
1349 * channel prior to hardware poking.
1350 */
1351
1352 if (ch->p.status != p->status || ch->p.chan_mode != p->chan_mode ||
1353 ch->p.data_inv != p->data_inv || ch->p.intr_mask != p->intr_mask ||
1354 ch->txd_free < ch->txd_num) /* to clear out queued messages */
1355 x = 1; /* we have a change requested */
1356 for (i = 0; i < 32; i++) /* check for timeslot mapping changes */
1357 if (ch->p.bitmask[i] != p->bitmask[i])
1358 x = 1; /* we have a change requested */
1359 ch->p = *p;
1360 if (x && (ch->state == UP)) /* if change request and channel is
1361 * open... */
1362 {
1363 status_t ret;
1364
1365 if ((ret = musycc_chan_down ((ci_t *) 0, channum)))
1366 return ret;
1367 if ((ret = c4_chan_up (ch->up->up, channum)))
1368 return ret;
1369 sd_enable_xmit (ch->user); /* re-enable to catch flow controlled
1370 * channel */
1371 }
1372 return 0;
1373}
1374
1375
1376status_t
1377c4_get_chan (int channum, struct sbecom_chan_param * p)
1378{
1379 mch_t *ch;
1380
1381 if (!(ch = c4_find_chan (channum)))
1382 return ENOENT;
1383 *p = ch->p;
1384 return 0;
1385}
1386
1387status_t
1388c4_get_chan_stats (int channum, struct sbecom_chan_stats * p)
1389{
1390 mch_t *ch;
1391
1392 if (!(ch = c4_find_chan (channum)))
1393 return ENOENT;
1394 *p = ch->s;
1395 p->tx_pending = atomic_read (&ch->tx_pending);
1396 return 0;
1397}
1398
1399STATIC int
1400c4_fifo_alloc (mpi_t * pi, int chan, int *len)
1401{
1402 int i, l = 0, start = 0, max = 0, maxstart = 0;
1403
1404 for (i = 0; i < 32; i++)
1405 {
1406 if (pi->fifomap[i] != -1)
1407 {
1408 l = 0;
1409 start = i + 1;
1410 continue;
1411 }
1412 ++l;
1413 if (l > max)
1414 {
1415 max = l;
1416 maxstart = start;
1417 }
1418 if (max == *len)
1419 break;
1420 }
1421 if (max != *len)
1422 {
1423 if (log_level >= LOG_WARN)
1424 pr_info("%s: wanted to allocate %d fifo space, but got only %d\n",
1425 pi->up->devname, *len, max);
1426 *len = max;
1427 }
1428 if (log_level >= LOG_DEBUG)
1429 pr_info("%s: allocated %d fifo at %d for channel %d/%d\n",
1430 pi->up->devname, max, start, chan, pi->p.portnum);
1431 for (i = maxstart; i < (maxstart + max); i++)
1432 pi->fifomap[i] = chan;
1433 return start;
1434}
1435
1436void
1437c4_fifo_free (mpi_t * pi, int chan)
1438{
1439 int i;
1440
1441 if (log_level >= LOG_DEBUG)
1442 pr_info("%s: deallocated fifo for channel %d/%d\n",
1443 pi->up->devname, chan, pi->p.portnum);
1444 for (i = 0; i < 32; i++)
1445 if (pi->fifomap[i] == chan)
1446 pi->fifomap[i] = -1;
1447}
1448
1449
1450status_t
1451c4_chan_up (ci_t * ci, int channum)
1452{
1453 mpi_t *pi;
1454 mch_t *ch;
1455 struct mbuf *m;
1456 struct mdesc *md;
1457 int nts, nbuf, txnum, rxnum;
1458 int addr, i, j, gchan;
1459 u_int32_t tmp; /* for optimizing conversion across BE
1460 * platform */
1461
1462 if (!(ch = c4_find_chan (channum)))
1463 return ENOENT;
1464 if (ch->state == UP)
1465 {
1466 if (log_level >= LOG_MONITOR)
1467 pr_info("%s: channel already UP, graceful early exit\n",
1468 ci->devname);
1469 return 0;
1470 }
1471 pi = ch->up;
1472 gchan = ch->gchan;
1473 /* find nts ('number of timeslots') */
1474 nts = 0;
1475 for (i = 0; i < 32; i++)
1476 {
1477 if (ch->p.bitmask[i] & pi->tsm[i])
1478 {
1479 if (1 || log_level >= LOG_WARN)
1480 {
1481 pr_info("%s: c4_chan_up[%d] EINVAL (attempt to cfg in-use or unavailable TimeSlot[%d])\n",
1482 ci->devname, channum, i);
1483 pr_info("+ ask4 %x, currently %x\n",
1484 ch->p.bitmask[i], pi->tsm[i]);
1485 }
1486 return EINVAL;
1487 }
1488 for (j = 0; j < 8; j++)
1489 if (ch->p.bitmask[i] & (1 << j))
1490 nts++;
1491 }
1492
1493 nbuf = nts / 8 ? nts / 8 : 1;
1494 if (!nbuf)
1495 {
1496 /* if( log_level >= LOG_WARN) */
1497 pr_info("%s: c4_chan_up[%d] ENOBUFS (no TimeSlots assigned)\n",
1498 ci->devname, channum);
1499 return ENOBUFS; /* this should not happen */
1500 }
1501 addr = c4_fifo_alloc (pi, gchan, &nbuf);
1502 ch->state = UP;
1503
1504 /* Setup the Time Slot Map */
1505 musycc_update_timeslots (pi);
1506
1507 /* ch->tx_limit = nts; */
1508 ch->s.tx_pending = 0;
1509
1510 /* Set Channel Configuration Descriptors */
1511 {
1512 u_int32_t ccd;
1513
1514 ccd = musycc_chan_proto (ch->p.chan_mode) << MUSYCC_CCD_PROTO_SHIFT;
1515 if ((ch->p.chan_mode == CFG_CH_PROTO_ISLP_MODE) ||
1516 (ch->p.chan_mode == CFG_CH_PROTO_TRANS))
1517 {
1518 ccd |= MUSYCC_CCD_FCS_XFER; /* Non FSC Mode */
1519 }
1520 ccd |= 2 << MUSYCC_CCD_MAX_LENGTH; /* Select second MTU */
1521 ccd |= ch->p.intr_mask;
1522 ccd |= addr << MUSYCC_CCD_BUFFER_LOC;
1523 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1524 ccd |= (nbuf) << MUSYCC_CCD_BUFFER_LENGTH;
1525 else
1526 ccd |= (nbuf - 1) << MUSYCC_CCD_BUFFER_LENGTH;
1527
1528 if (ch->p.data_inv & CFG_CH_DINV_TX)
1529 ccd |= MUSYCC_CCD_INVERT_DATA; /* Invert data */
1530 pi->regram->tcct[gchan] = cpu_to_le32 (ccd);
1531
1532 if (ch->p.data_inv & CFG_CH_DINV_RX)
1533 ccd |= MUSYCC_CCD_INVERT_DATA; /* Invert data */
1534 else
1535 ccd &= ~MUSYCC_CCD_INVERT_DATA; /* take away data inversion */
1536 pi->regram->rcct[gchan] = cpu_to_le32 (ccd);
1537 FLUSH_MEM_WRITE ();
1538 }
1539
1540 /* Reread the Channel Configuration Descriptor for this channel */
1541 musycc_serv_req (pi, SR_CHANNEL_CONFIG | SR_RX_DIRECTION | gchan);
1542 musycc_serv_req (pi, SR_CHANNEL_CONFIG | SR_TX_DIRECTION | gchan);
1543
1544 /*
1545 * Figure out how many buffers we want. If the customer has changed from
1546 * the defaults, then use the changed values. Otherwise, use Transparent
1547 * mode's specific minimum default settings.
1548 */
1549 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1550 {
1551 if (max_rxdesc_used == max_rxdesc_default) /* use default setting */
1552 max_rxdesc_used = MUSYCC_RXDESC_TRANS;
1553 if (max_txdesc_used == max_txdesc_default) /* use default setting */
1554 max_txdesc_used = MUSYCC_TXDESC_TRANS;
1555 }
1556 /*
1557 * Increase counts when hyperchanneling, since this implies an increase
1558 * in throughput per channel
1559 */
1560 rxnum = max_rxdesc_used + (nts / 4);
1561 txnum = max_txdesc_used + (nts / 4);
1562
1563#if 0
1564 /* DEBUG INFO */
1565 if (log_level >= LOG_MONITOR)
1566 pr_info("%s: mode %x rxnum %d (rxused %d def %d) txnum %d (txused %d def %d)\n",
1567 ci->devname, ch->p.chan_mode,
1568 rxnum, max_rxdesc_used, max_rxdesc_default,
1569 txnum, max_txdesc_used, max_txdesc_default);
1570#endif
1571
1572 ch->rxd_num = rxnum;
1573 ch->txd_num = txnum;
1574 ch->rxix_irq_srv = 0;
1575
1576 ch->mdr = OS_kmalloc (sizeof (struct mdesc) * rxnum);
1577 ch->mdt = OS_kmalloc (sizeof (struct mdesc) * txnum);
1578 if (ch->p.chan_mode == CFG_CH_PROTO_TRANS)
1579 tmp = __constant_cpu_to_le32 (max_mru | EOBIRQ_ENABLE);
1580 else
1581 tmp = __constant_cpu_to_le32 (max_mru);
1582
1583 for (i = 0, md = ch->mdr; i < rxnum; i++, md++)
1584 {
1585 if (i == (rxnum - 1))
1586 {
1587 md->snext = &ch->mdr[0];/* wrapness */
1588 } else
1589 {
1590 md->snext = &ch->mdr[i + 1];
1591 }
1592 md->next = cpu_to_le32 (OS_vtophys (md->snext));
1593
1594 if (!(m = OS_mem_token_alloc (max_mru)))
1595 {
1596 if (log_level >= LOG_MONITOR)
1597 pr_info("%s: c4_chan_up[%d] - token alloc failure, size = %d.\n",
1598 ci->devname, channum, max_mru);
1599 goto errfree;
1600 }
1601 md->mem_token = m;
1602 md->data = cpu_to_le32 (OS_vtophys (OS_mem_token_data (m)));
1603 md->status = tmp | MUSYCC_RX_OWNED; /* MUSYCC owns RX descriptor **
1604 * CODING NOTE:
1605 * MUSYCC_RX_OWNED = 0 so no
1606 * need to byteSwap */
1607 }
1608
1609 for (i = 0, md = ch->mdt; i < txnum; i++, md++)
1610 {
1611 md->status = HOST_TX_OWNED; /* Host owns TX descriptor ** CODING
1612 * NOTE: HOST_TX_OWNED = 0 so no need to
1613 * byteSwap */
1614 md->mem_token = 0;
1615 md->data = 0;
1616 if (i == (txnum - 1))
1617 {
1618 md->snext = &ch->mdt[0];/* wrapness */
1619 } else
1620 {
1621 md->snext = &ch->mdt[i + 1];
1622 }
1623 md->next = cpu_to_le32 (OS_vtophys (md->snext));
1624 }
1625 ch->txd_irq_srv = ch->txd_usr_add = &ch->mdt[0];
1626 ch->txd_free = txnum;
1627 ch->tx_full = 0;
1628 ch->txd_required = 0;
1629
1630 /* Configure it into the chip */
1631 tmp = cpu_to_le32 (OS_vtophys (&ch->mdt[0]));
1632 pi->regram->thp[gchan] = tmp;
1633 pi->regram->tmp[gchan] = tmp;
1634
1635 tmp = cpu_to_le32 (OS_vtophys (&ch->mdr[0]));
1636 pi->regram->rhp[gchan] = tmp;
1637 pi->regram->rmp[gchan] = tmp;
1638
1639 /* Activate the Channel */
1640 FLUSH_MEM_WRITE ();
1641 if (ch->p.status & RX_ENABLED)
1642 {
1643#ifdef RLD_TRANS_DEBUG
1644 pr_info("++ c4_chan_up() CHAN RX ACTIVATE: chan %d\n", ch->channum);
1645#endif
1646 ch->ch_start_rx = 0; /* we are restarting RX... */
1647 musycc_serv_req (pi, SR_CHANNEL_ACTIVATE | SR_RX_DIRECTION | gchan);
1648 }
1649 if (ch->p.status & TX_ENABLED)
1650 {
1651#ifdef RLD_TRANS_DEBUG
1652 pr_info("++ c4_chan_up() CHAN TX ACTIVATE: chan %d <delayed>\n", ch->channum);
1653#endif
1654 ch->ch_start_tx = CH_START_TX_1ST; /* we are delaying start
1655 * until receipt from user of
1656 * first packet to transmit. */
1657 }
1658 ch->status = ch->p.status;
1659 pi->openchans++;
1660 return 0;
1661
1662errfree:
1663 while (i > 0)
1664 {
1665 /* Don't leak all the previously allocated mbufs in this loop */
1666 i--;
1667 OS_mem_token_free (ch->mdr[i].mem_token);
1668 }
1669 OS_kfree (ch->mdt);
1670 ch->mdt = 0;
1671 ch->txd_num = 0;
1672 OS_kfree (ch->mdr);
1673 ch->mdr = 0;
1674 ch->rxd_num = 0;
1675 ch->state = DOWN;
1676 return ENOBUFS;
1677}
1678
1679/* stop the hardware from servicing & interrupting */
1680
1681void
1682c4_stopwd (ci_t * ci)
1683{
1684 OS_stop_watchdog (&ci->wd);
1685 SD_SEM_TAKE (&ci->sem_wdbusy, "_stop_"); /* ensure WD not running */
1686 SD_SEM_GIVE (&ci->sem_wdbusy);
1687}
1688
1689
1690void
1691sbecom_get_brdinfo (ci_t * ci, struct sbe_brd_info * bip, u_int8_t *bsn)
1692{
1693 char *np;
1694 u_int32_t sn = 0;
1695 int i;
1696
1697 bip->brdno = ci->brdno; /* our board number */
1698 bip->brd_id = ci->brd_id;
1699 bip->brd_hdw_id = ci->hdw_bid;
1700 bip->brd_chan_cnt = MUSYCC_NCHANS * ci->max_port; /* number of channels
1701 * being used */
1702 bip->brd_port_cnt = ci->max_port; /* number of ports being used */
1703 bip->brd_pci_speed = BINFO_PCI_SPEED_unk; /* PCI speed not yet
1704 * determinable */
1705
1706 if (ci->first_if)
1707 {
1708#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1709 np = (char *) hdlc_to_name (ci->first_if);
1710#else
1711 {
1712 struct net_device *dev;
1713
1714 dev = (struct net_device *) ci->first_if;
1715 np = (char *) dev->name;
1716 }
1717#endif
1718 strncpy (bip->first_iname, np, CHNM_STRLEN - 1);
1719 } else
1720 strcpy (bip->first_iname, "<NULL>");
1721 if (ci->last_if)
1722 {
1723#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1724 np = (char *) hdlc_to_name (ci->last_if);
1725#else
1726 {
1727 struct net_device *dev;
1728
1729 dev = (struct net_device *) ci->last_if;
1730 np = (char *) dev->name;
1731 }
1732#endif
1733 strncpy (bip->last_iname, np, CHNM_STRLEN - 1);
1734 } else
1735 strcpy (bip->last_iname, "<NULL>");
1736
1737 if (bsn)
1738 {
1739 for (i = 0; i < 3; i++)
1740 {
1741 bip->brd_mac_addr[i] = *bsn++;
1742 }
1743 for (; i < 6; i++)
1744 {
1745 bip->brd_mac_addr[i] = *bsn;
1746 sn = (sn << 8) | *bsn++;
1747 }
1748 } else
1749 {
1750 for (i = 0; i < 6; i++)
1751 bip->brd_mac_addr[i] = 0;
1752 }
1753 bip->brd_sn = sn;
1754}
1755
1756
1757status_t
1758c4_get_iidinfo (ci_t * ci, struct sbe_iid_info * iip)
1759{
1760 struct net_device *dev;
1761 char *np;
1762
1763 if (!(dev = getuserbychan (iip->channum)))
1764 return ENOENT;
1765
1766#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1767 np = (char *) hdlc_to_name (dev_to_hdlc (dev));
1768#else
1769 np = dev->name;
1770#endif
1771 strncpy (iip->iname, np, CHNM_STRLEN - 1);
1772 return 0;
1773}
1774
1775
1776#ifdef CONFIG_SBE_PMCC4_NCOMM
1777void (*nciInterrupt[MAX_BOARDS][4]) (void);
1778extern void wanpmcC4T1E1_hookInterrupt (int cardID, int deviceID, void *handler);
1779
1780void
1781wanpmcC4T1E1_hookInterrupt (int cardID, int deviceID, void *handler)
1782{
1783 if (cardID < MAX_BOARDS) /* sanity check */
1784 nciInterrupt[cardID][deviceID] = handler;
1785}
1786
1787irqreturn_t
1788c4_ebus_intr_th_handler (void *devp)
1789{
1790 ci_t *ci = (ci_t *) devp;
1791 volatile u_int32_t ists;
1792 int handled = 0;
1793 int brdno;
1794
1795 /* which COMET caused the interrupt */
1796 brdno = ci->brdno;
1797 ists = pci_read_32 ((u_int32_t *) &ci->cpldbase->intr);
1798 if (ists & PMCC4_CPLD_INTR_CMT_1)
1799 {
1800 handled = 0x1;
1801 if (nciInterrupt[brdno][0] != NULL)
1802 (*nciInterrupt[brdno][0]) ();
1803 }
1804 if (ists & PMCC4_CPLD_INTR_CMT_2)
1805 {
1806 handled |= 0x2;
1807 if (nciInterrupt[brdno][1] != NULL)
1808 (*nciInterrupt[brdno][1]) ();
1809 }
1810 if (ists & PMCC4_CPLD_INTR_CMT_3)
1811 {
1812 handled |= 0x4;
1813 if (nciInterrupt[brdno][2] != NULL)
1814 (*nciInterrupt[brdno][2]) ();
1815 }
1816 if (ists & PMCC4_CPLD_INTR_CMT_4)
1817 {
1818 handled |= 0x8;
1819 if (nciInterrupt[brdno][3] != NULL)
1820 (*nciInterrupt[brdno][3]) ();
1821 }
1822#if 0
1823 /*** Test code just de-implements the asserted interrupt. Alternate
1824 vendor will supply COMET interrupt handling code herein or such.
1825 ***/
1826 pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE);
1827#endif
1828
1829#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,20)
1830 return;
1831#else
1832 return IRQ_RETVAL (handled);
1833#endif
1834}
1835
1836
1837unsigned long
1838wanpmcC4T1E1_getBaseAddress (int cardID, int deviceID)
1839{
1840 ci_t *ci;
1841 unsigned long base = 0;
1842
1843 ci = c4_list;
1844 while (ci)
1845 {
1846 if (ci->brdno == cardID) /* found valid device */
1847 {
1848 if (deviceID < ci->max_port) /* comet is supported */
1849 base = ((unsigned long) ci->port[deviceID].cometbase);
1850 break;
1851 }
1852 ci = ci->next; /* next board, if any */
1853 }
1854 return (base);
1855}
1856
1857#endif /*** CONFIG_SBE_PMCC4_NCOMM ***/
1858
1859
1860/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/pmcc4_ioctls.h b/drivers/staging/cxt1e1/pmcc4_ioctls.h
new file mode 100644
index 000000000000..6b8d65673c78
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmcc4_ioctls.h
@@ -0,0 +1,81 @@
1/* RCSid: $Header: /home/rickd/projects/pmcc4/include/pmcc4_ioctls.h,v 2.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $
2 */
3
4#ifndef _INC_PMCC4_IOCTLS_H_
5#define _INC_PMCC4_IOCTLS_H_
6
7/*-----------------------------------------------------------------------------
8 * pmcc4_ioctls.h -
9 *
10 * Copyright (C) 2005 SBE, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * For further information, contact via email: support@sbei.com
23 * SBE, Inc. San Ramon, California U.S.A.
24 *-----------------------------------------------------------------------------
25 * RCS info:
26 * RCS revision: $Revision: 2.0 $
27 * Last changed on $Date: 2005/09/28 00:10:09 $
28 * Changed by $Author: rickd $
29 *-----------------------------------------------------------------------------
30 * $Log: pmcc4_ioctls.h,v $
31 * Revision 2.0 2005/09/28 00:10:09 rickd
32 * Add GNU license info. Switch Ioctls to sbe_ioc.h usage.
33 *
34 * Revision 1.2 2005/04/28 23:43:03 rickd
35 * Add RCS tracking heading.
36 *
37 *-----------------------------------------------------------------------------
38 */
39
40#include "sbew_ioc.h"
41
42enum
43{
44 // C4_GET_PORT = 0,
45 // C4_SET_PORT,
46 // C4_GET_CHAN,
47 // C4_SET_CHAN,
48 C4_DEL_CHAN = 0,
49 // C4_CREATE_CHAN,
50 // C4_GET_CHAN_STATS,
51 // C4_RESET,
52 // C4_DEBUG,
53 C4_RESET_STATS,
54 C4_LOOP_PORT,
55 C4_RW_FRMR,
56 C4_RW_MSYC,
57 C4_RW_PLD
58};
59
60#define C4_GET_PORT SBE_IOC_PORT_GET
61#define C4_SET_PORT SBE_IOC_PORT_SET
62#define C4_GET_CHAN SBE_IOC_CHAN_GET
63#define C4_SET_CHAN SBE_IOC_CHAN_SET
64// #define C4_DEL_CHAN XXX
65#define C4_CREATE_CHAN SBE_IOC_CHAN_NEW
66#define C4_GET_CHAN_STATS SBE_IOC_CHAN_GET_STAT
67#define C4_RESET SBE_IOC_RESET_DEV
68#define C4_DEBUG SBE_IOC_LOGLEVEL
69// #define C4_RESET_STATS XXX
70// #define C4_LOOP_PORT XXX
71// #define C4_RW_FRMR XXX
72// #define C4_RW_MSYC XXX
73// #define C4_RW_PLD XXX
74
75struct c4_chan_stats_wrap
76{
77 int channum;
78 struct sbecom_chan_stats stats;
79};
80
81#endif /* _INC_PMCC4_IOCTLS_H_ */
diff --git a/drivers/staging/cxt1e1/pmcc4_private.h b/drivers/staging/cxt1e1/pmcc4_private.h
new file mode 100644
index 000000000000..b2b6e3702630
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmcc4_private.h
@@ -0,0 +1,296 @@
1#ifndef _INC_PMCC4_PRIVATE_H_
2#define _INC_PMCC4_PRIVATE_H_
3
4/*-----------------------------------------------------------------------------
5 * pmcc4_private.h -
6 *
7 * Copyright (C) 2005 SBE, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20
21#include <linux/kernel.h>
22#include <linux/sched.h>
23#include <linux/semaphore.h>
24#include <linux/spinlock.h>
25#include <linux/interrupt.h> /* support for tasklets */
26#include <linux/timer.h> /* support for timer */
27#include <linux/workqueue.h>
28#include <linux/hdlc.h>
29
30#include "libsbew.h"
31#include "pmcc4_defs.h"
32#include "pmcc4_cpld.h"
33#include "musycc.h"
34#include "sbe_promformat.h"
35#include "comet.h"
36
37
38/* driver state */
39#define SBE_DRVR_INIT 0x0
40#define SBE_DRVR_AVAILABLE 0x69734F4E
41#define SBE_DRVR_DOWN 0x1
42
43/******************************************************************************
44 * MUSYCC Message Descriptor - coupled to hardware implementation, the first
45 * three u_int32 must not be reordered.
46 */
47
48struct mdesc
49{
50 volatile u_int32_t status; /* Buffer Descriptor */
51 u_int32_t data; /* Data Pointer */
52 u_int32_t next; /* MUSYCC view of Next Pointer */
53 void *mem_token; /* Data */
54 struct mdesc *snext;
55};
56
57
58/*************************************************************************
59 * Private driver data structures, internal use only.
60 */
61
62struct c4_chan_info
63{
64 int gchan; /* channel number within group/port 0-31 */
65 int channum; /* absolute channel number 0-128 */
66 u_int8_t status;
67#define TX_RECOVERY_MASK 0x0f
68#define TX_ONR_RECOVERY 0x01
69#define TX_BUFF_RECOVERY 0x02
70#define RX_RECOVERY_MASK 0xf0
71#define RX_ONR_RECOVERY 0x10
72
73 unsigned char ch_start_rx;
74#define CH_START_RX_NOW 1
75#define CH_START_RX_ONR 2
76#define CH_START_RX_BUF 3
77
78 unsigned char ch_start_tx;
79#define CH_START_TX_1ST 1
80#define CH_START_TX_ONR 2
81#define CH_START_TX_BUF 3
82
83 char tx_full; /* boolean */
84 short txd_free; /* count of TX Desc available */
85 short txd_required; /* count of TX Desc needed by mesg */
86 unsigned short rxd_num; /* must support range up to 2000 */
87 unsigned short txd_num; /* must support range up to 1000 */
88 int rxix_irq_srv;
89
90 enum
91 {
92 UNASSIGNED, /* AVAILABLE, NOTINUSE */
93 DOWN, /* ASSIGNED, NOTINUSE */
94 UP /* ASSIGNED and INUSE */
95 } state;
96
97 struct c4_port_info *up;
98 void *user;
99
100 struct work_struct ch_work;
101 struct mdesc *mdt;
102 struct mdesc *mdr;
103 struct mdesc *txd_irq_srv;
104 struct mdesc *txd_usr_add;
105
106#if 0
107 /*
108 * FUTURE CODE MIGHT SEPARATE TIMESLOT MAP SETUPS INTO SINGLE IOCTL and
109 * REMOVE MAPS FROM CHANNEL PARAMETER STRUCTURE
110 */
111 /*
112 * each byte in bitmask below represents one timeslot (bitmask[0] is for
113 * timeslot 0 and so on), each bit in the byte selects timeslot bits for
114 * this channel (0xff - whole timeslot, 0x7f - 56kbps mode)
115 */
116
117 u_int8_t ts_bitmask[32];
118#endif
119 spinlock_t ch_rxlock;
120 spinlock_t ch_txlock;
121 atomic_t tx_pending;
122
123 struct sbecom_chan_stats s;
124 struct sbecom_chan_param p;
125};
126typedef struct c4_chan_info mch_t;
127
128struct c4_port_info
129{
130
131 struct musycc_globalr *reg;
132 struct musycc_groupr *regram;
133 void *regram_saved; /* Original malloc value may have non-2KB
134 * boundary. Need to save for use when
135 * freeing. */
136 comet_t *cometbase;
137 struct sbe_card_info *up;
138
139 /*
140 * The workqueue is used for TX restart of ONR'd channels when in
141 * Transparent mode.
142 */
143
144 struct workqueue_struct *wq_port; /* chan restart work queue */
145 struct semaphore sr_sem_busy; /* service request exclusion
146 * semaphore */
147 struct semaphore sr_sem_wait; /* service request handshake
148 * semaphore */
149 u_int32_t sr_last;
150 short openchans;
151 char portnum;
152 char group_is_set; /* GROUP_INIT command issued to MUSYCC,
153 * otherwise SET_CHAN Ioctl fails */
154
155 mch_t *chan[MUSYCC_NCHANS];
156 struct sbecom_port_param p;
157
158 /*
159 * The MUSYCC timeslot mappings are maintained within the driver and are
160 * modified and reloaded as each of a group's channels are configured.
161 */
162 u_int8_t tsm[32]; /* tsm (time slot map) */
163 int fifomap[32];
164};
165typedef struct c4_port_info mpi_t;
166
167
168#define COMET_OFFSET(x) (0x80000+(x)*0x10000)
169#define EEPROM_OFFSET 0xC0000
170#define ISPLD_OFFSET 0xD0000
171
172/* iSPLD control chip registers */
173#define ISPLD_MCSR 0x0
174#define ISPLD_MCLK 0x1
175#define ISPLD_LEDS 0x2
176#define ISPLD_INTR 0x3
177#define ISPLD_MAX 0x3
178
179struct sbe_card_info
180{
181 struct musycc_globalr *reg;
182 struct musycc_groupr *regram;
183 u_int32_t *iqd_p; /* pointer to dword aligned interrupt queue
184 * descriptors */
185 void *iqd_p_saved; /* Original malloc value may have non-dword
186 * aligned boundary. Need to save for use
187 * when freeing. */
188 unsigned int iqp_headx, iqp_tailx;
189
190 struct semaphore sem_wdbusy;/* watchdog exclusion semaphore */
191 struct watchdog wd; /* statically allocated watchdog structure */
192 atomic_t bh_pending; /* bh queued, but not yet running */
193 u_int32_t brd_id; /* unique PCI ID */
194 u_int16_t hdw_bid; /* on/board hardware ID */
195 unsigned short wdcount;
196 unsigned char max_port;
197 unsigned char brdno; /* our board number */
198 unsigned char wd_notify;
199#define WD_NOTIFY_1TX 1
200#define WD_NOTIFY_BUF 2
201#define WD_NOTIFY_ONR 4
202 enum /* state as regards interrupt processing */
203 {
204 C_INIT, /* of-board-address not configured or are in
205 * process of being removed, don't access
206 * hardware */
207 C_IDLE, /* off-board-addresses are configured, but
208 * don't service interrupts, just clear them
209 * from hardware */
210 C_RUNNING /* life is good, service away */
211 } state;
212
213 struct sbe_card_info *next;
214 u_int32_t *eeprombase; /* mapped address of board's EEPROM */
215 c4cpld_t *cpldbase; /* mapped address of board's CPLD hardware */
216 char *release; /* SBE ID string w/in sbeRelease.c */
217 void *hdw_info;
218#ifdef CONFIG_PROC_FS
219 struct proc_dir_entry *dir_dev;
220#endif
221
222 /* saved off interface assignments which bound a board */
223 hdlc_device *first_if;
224 hdlc_device *last_if;
225 short first_channum, last_channum;
226
227 struct intlog
228 {
229 u_int32_t this_status_new;
230 u_int32_t last_status_new;
231 u_int32_t drvr_intr_thcount;
232 u_int32_t drvr_intr_bhcount;
233 u_int32_t drvr_int_failure;
234 } intlog;
235
236 mpi_t port[MUSYCC_NPORTS];
237 char devname[SBE_IFACETMPL_SIZE + 1];
238 atomic_t tx_pending;
239 u_int32_t alarmed[4]; /* dpm211 */
240
241#if defined(SBE_ISR_TASKLET)
242 struct tasklet_struct ci_musycc_isr_tasklet;
243#elif defined(SBE_ISR_IMMEDIATE)
244 struct tq_struct ci_musycc_isr_tq;
245#endif
246};
247typedef struct sbe_card_info ci_t;
248
249struct s_hdw_info
250{
251 u_int8_t pci_busno;
252 u_int8_t pci_slot;
253 u_int8_t pci_pin[2];
254 u_int8_t revid[2];
255 u_int8_t mfg_info_sts;
256#define EEPROM_OK 0x00
257#define EEPROM_CRCERR 0x01
258 char promfmt; /* prom type, from sbe_promformat.h */
259
260 char devname[SBE_IFACETMPL_SIZE];
261 struct pci_bus *bus;
262 struct net_device *ndev;
263 struct pci_dev *pdev[2];
264
265 unsigned long addr[2];
266 unsigned long addr_mapped[2];
267 unsigned long len[2];
268
269 union
270 {
271 char data[128];
272 FLD_TYPE1 pft1; /* prom field, type #1 */
273 FLD_TYPE2 pft2; /* prom field, type #2 */
274 } mfg_info;
275};
276typedef struct s_hdw_info hdw_info_t;
277
278/*****************************************************************/
279
280struct c4_priv
281{
282 int channum;
283 struct sbe_card_info *ci;
284};
285
286
287/*****************************************************************/
288
289extern ci_t *c4_list;
290
291mch_t *c4_find_chan (int);
292int c4_set_chan (int channum, struct sbecom_chan_param *);
293int c4_get_chan (int channum, struct sbecom_chan_param *);
294int c4_get_chan_stats (int channum, struct sbecom_chan_stats *);
295
296#endif /* _INC_PMCC4_PRIVATE_H_ */
diff --git a/drivers/staging/cxt1e1/pmcc4_sysdep.h b/drivers/staging/cxt1e1/pmcc4_sysdep.h
new file mode 100644
index 000000000000..697f1943670f
--- /dev/null
+++ b/drivers/staging/cxt1e1/pmcc4_sysdep.h
@@ -0,0 +1,62 @@
1#ifndef _INC_PMCC4_SYSDEP_H_
2#define _INC_PMCC4_SYSDEP_H_
3
4/*-----------------------------------------------------------------------------
5 * pmcc4_sysdep.h -
6 *
7 * Copyright (C) 2005 SBE, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20/* reduce multiple autoconf entries to a single definition */
21
22#ifdef CONFIG_SBE_PMCC4_HDLC_V7_MODULE
23#undef CONFIG_SBE_PMCC4_HDLC_V7
24#define CONFIG_SBE_PMCC4_HDLC_V7 1
25#endif
26
27#ifdef CONFIG_SBE_PMCC4_NCOMM_MODULE
28#undef CONFIG_SBE_PMCC4_NCOMM
29#define CONFIG_SBE_PMCC4_NCOMM 1
30#endif
31
32
33/* FLUSH MACROS - if using ioremap_nocache(), then these can be NOOPS,
34 * otherwise a memory barrier needs to be inserted.
35 */
36
37#define FLUSH_PCI_READ() rmb()
38#define FLUSH_PCI_WRITE() wmb()
39#define FLUSH_MEM_READ() rmb()
40#define FLUSH_MEM_WRITE() wmb()
41
42
43/*
44 * System dependent callbacks routines, not inlined...
45 * For inlined system dependent routines, see include/sbecom_inlinux_linux.h
46 */
47
48/*
49 * passes received memory token back to the system, <user> is parameter from
50 * sd_new_chan() used to create the channel which the data arrived on
51 */
52
53void sd_recv_consume(void *token, size_t len, void *user);
54
55void sd_disable_xmit (void *user);
56void sd_enable_xmit (void *user);
57int sd_line_is_ok (void *user);
58void sd_line_is_up (void *user);
59void sd_line_is_down (void *user);
60int sd_queue_stopped (void *user);
61
62#endif /*** _INC_PMCC4_SYSDEP_H_ ***/
diff --git a/drivers/staging/cxt1e1/sbe_bid.h b/drivers/staging/cxt1e1/sbe_bid.h
new file mode 100644
index 000000000000..1f49b4061fb7
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbe_bid.h
@@ -0,0 +1,61 @@
1/*
2 * $Id: sbe_bid.h,v 1.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBEBID_H_
6#define _INC_SBEBID_H_
7
8/*-----------------------------------------------------------------------------
9 * sbe_bid.h -
10 *
11 * Copyright (C) 2004-2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *
26 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.0 $
29 * Last changed on $Date: 2005/09/28 00:10:09 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbe_bid.h,v $
33 * Revision 1.0 2005/09/28 00:10:09 rickd
34 * Initial revision
35 *
36 *-----------------------------------------------------------------------------
37 */
38
39#define SBE_BID_REG 0x00000000 /* Board ID Register */
40
41#define SBE_BID_256T3_E1 0x46 /* SBE wanPTMC-256T3 (E1 Version) */
42#define SBE_BID_256T3_T1 0x42 /* SBE wanPTMC-256T3 (T1 Version) */
43#define SBE_BID_2T3E3 0x43 /* SBE wanPMC-2T3E3 */
44#define SBE_BID_C1T3 0x45 /* SBE wanPMC-C1T3 */
45#define SBE_BID_C24TE1 0x47 /* SBE wanPTMC-C24TE1 */
46#define SBE_BID_C24TE1_RTM_24 0x48 /* C24TE1 RTM (24 Port) */
47#define SBE_BID_C24TE1_RTM_12 0x49 /* C24TE1 RTM (12 Port) */
48#define SBE_BID_C24TE1_RTM_12DSU 0x4A /* C24TE1 RTM (12 Port/DSU) */
49#define SBE_BID_C24TE1_RTM_T3 0x4B /* C24TE1 RTM (T3) */
50#define SBE_BID_C4T1E1 0x41 /* SBE wanPTMC-C4T1E1 */
51#define SBE_BID_HC4T1E1 0x44 /* SBE wanADAPT-HC4T1E1 */
52
53/* bogus temporary usage values */
54#define SBE_BID_PMC_C4T1E1 0xC4 /* SBE wanPMC-C4T1E1 (4 Port) */
55#define SBE_BID_PMC_C2T1E1 0xC2 /* SBE wanPMC-C2T1E1 (2 Port) */
56#define SBE_BID_PMC_C1T1E1 0xC1 /* SBE wanPMC-C1T1E1 (1 Port) */
57#define SBE_BID_PCI_C4T1E1 0x04 /* SBE wanPCI-C4T1E1 (4 Port) */
58#define SBE_BID_PCI_C2T1E1 0x02 /* SBE wanPCI-C2T1E1 (2 Port) */
59#define SBE_BID_PCI_C1T1E1 0x01 /* SBE wanPCI-C1T1E1 (1 Port) */
60
61#endif /*** _INC_SBEBID_H_ ***/
diff --git a/drivers/staging/cxt1e1/sbe_promformat.h b/drivers/staging/cxt1e1/sbe_promformat.h
new file mode 100644
index 000000000000..746f81b15c73
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbe_promformat.h
@@ -0,0 +1,157 @@
1/*
2 * $Id: sbe_promformat.h,v 2.2 2005/09/28 00:10:09 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBE_PROMFORMAT_H_
6#define _INC_SBE_PROMFORMAT_H_
7
8/*-----------------------------------------------------------------------------
9 * sbe_promformat.h - Contents of seeprom used by dvt and manufacturing tests
10 *
11 * Copyright (C) 2002-2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *
26 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 2.2 $
29 * Last changed on $Date: 2005/09/28 00:10:09 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbe_promformat.h,v $
33 * Revision 2.2 2005/09/28 00:10:09 rickd
34 * Add EEPROM sample from C4T1E1 board.
35 *
36 * Revision 2.1 2005/05/04 17:18:24 rickd
37 * Initial CI.
38 *
39 *-----------------------------------------------------------------------------
40 */
41
42
43/***
44 * PMCC4 SAMPLE EEPROM IMAGE
45 *
46 * eeprom[00]: 01 11 76 07 01 00 a0 d6
47 * eeprom[08]: 22 34 56 3e 5b c1 1c 3e
48 * eeprom[16]: 5b e1 b6 00 00 00 01 00
49 * eeprom[24]: 00 08 46 d3 7b 5e a8 fb
50 * eeprom[32]: f7 ef df bf 7f 55 00 01
51 * eeprom[40]: 02 04 08 10 20 40 80 ff
52 * eeprom[48]: fe fd fb f7 ef df bf 7f
53 *
54 ***/
55
56
57/*------------------------------------------------------------------------
58 * Type 1 Format
59 * byte:
60 * 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
61 * -------------------------------------------------------------------------
62 * 01 11 76 SS SS 00 0A D6 <SERIAL NUM> <Create TIME> <Heatrun TIME>
63 * SBE SUB SERIAL # (BCD) (time_t) (time_t)
64 * ID VENDOR (format) (format)
65 *
66 * 19 20 21 22 23 24 25 26
67 * Heat Run Heat Run
68 * Iterations Errors
69 *------------------------------------------------------------------------
70 *
71 *
72 *
73 * Type 2 Format - Added length, CRC in fixed position
74 * byte:
75 * 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
76 * -------------------------------------------------------------------------
77 * 02 00 1A CC CC CC CC 11 76 07 03 00 0A D6 <SERIAL NUM>
78 * Payload SBE Crc32 SUB System System SERIAL/MAC
79 * Length VENDOR ID ID
80 *
81 * 17 18 19 20 21 22 23 24 25 26 27 28 29 39 31 32
82 * --------------------------------------------------------------------------
83 * <Create TIME> <Heatrun TIME> Heat Run Heat Run
84 * (time_t) (time_t) Iterations Errors
85 *
86 */
87
88#ifdef __cplusplus
89extern "C"
90{
91#endif
92
93
94#define STRUCT_OFFSET(type, symbol) ((long)&(((type *)0)->symbol))
95
96/*------------------------------------------------------------------------
97 * Historically different Prom format types.
98 *
99 * For diagnostic and failure purposes, do not create a type 0x00 or a
100 * type 0xff
101 *------------------------------------------------------------------------
102 */
103#define PROM_FORMAT_Unk (-1)
104#define PROM_FORMAT_TYPE1 1
105#define PROM_FORMAT_TYPE2 2
106
107
108/****** bit fields for a type 1 formatted seeprom **************************/
109 typedef struct
110 {
111 char type; /* 0x00 */
112 char Id[2]; /* 0x01-0x02 */
113 char SubId[2]; /* 0x03-0x04 */
114 char Serial[6]; /* 0x05-0x0a */
115 char CreateTime[4]; /* 0x0b-0x0e */
116 char HeatRunTime[4]; /* 0x0f-0x12 */
117 char HeatRunIterations[4]; /* 0x13-0x16 */
118 char HeatRunErrors[4]; /* 0x17-0x1a */
119 char Crc32[4]; /* 0x1b-0x1e */
120 } FLD_TYPE1;
121
122
123/****** bit fields for a type 2 formatted seeprom **************************/
124 typedef struct
125 {
126 char type; /* 0x00 */
127 char length[2]; /* 0x01-0x02 */
128 char Crc32[4]; /* 0x03-0x06 */
129 char Id[2]; /* 0x07-0x08 */
130 char SubId[2]; /* 0x09-0x0a */
131 char Serial[6]; /* 0x0b-0x10 */
132 char CreateTime[4]; /* 0x11-0x14 */
133 char HeatRunTime[4]; /* 0x15-0x18 */
134 char HeatRunIterations[4]; /* 0x19-0x1c */
135 char HeatRunErrors[4]; /* 0x1d-0x20 */
136 } FLD_TYPE2;
137
138
139
140/***** this union allows us to access the seeprom as an array of bytes ***/
141/***** or as individual fields ***/
142
143#define SBE_EEPROM_SIZE 128
144#define SBE_MFG_INFO_SIZE sizeof(FLD_TYPE2)
145
146 typedef union
147 {
148 char bytes[128];
149 FLD_TYPE1 fldType1;
150 FLD_TYPE2 fldType2;
151 } PROMFORMAT;
152
153#ifdef __cplusplus
154}
155#endif
156
157#endif /*** _INC_SBE_PROMFORMAT_H_ ***/
diff --git a/drivers/staging/cxt1e1/sbecom_inline_linux.h b/drivers/staging/cxt1e1/sbecom_inline_linux.h
new file mode 100644
index 000000000000..c65172db2ad8
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbecom_inline_linux.h
@@ -0,0 +1,310 @@
1/*
2 * $Id: sbecom_inline_linux.h,v 1.2 2007/08/15 22:51:35 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBECOM_INLNX_H_
6#define _INC_SBECOM_INLNX_H_
7
8/*-----------------------------------------------------------------------------
9 * sbecom_inline_linux.h - SBE common Linux inlined routines
10 *
11 * Copyright (C) 2007 One Stop Systems, Inc.
12 * Copyright (C) 2005 SBE, Inc.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * For further information, contact via email: support@onestopsystems.com
25 * One Stop Systems, Inc. Escondido, California U.S.A.
26 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.2 $
29 * Last changed on $Date: 2007/08/15 22:51:35 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbecom_inline_linux.h,v $
33 * Revision 1.2 2007/08/15 22:51:35 rickd
34 * Remove duplicate version.h entry.
35 *
36 * Revision 1.1 2007/08/15 22:50:29 rickd
37 * Update linux/config for 2.6.18 and later.
38 *
39 * Revision 1.0 2005/09/28 00:10:09 rickd
40 * Initial revision
41 *
42 *-----------------------------------------------------------------------------
43 */
44
45
46#if defined (__FreeBSD__) || defined (__NetBSD__)
47#include <sys/types.h>
48#else
49#include <linux/types.h>
50#include <linux/version.h>
51#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
52#include <linux/config.h>
53#endif
54#if defined(CONFIG_SMP) && ! defined(__SMP__)
55#define __SMP__
56#endif
57#if defined(CONFIG_MODVERSIONS) && defined(MODULE) && ! defined(MODVERSIONS)
58#define MODVERSIONS
59#endif
60
61#ifdef MODULE
62#ifdef MODVERSIONS
63#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
64#include <linux/modversions.h>
65#else
66#include <config/modversions.h>
67#endif
68#endif
69#include <linux/module.h>
70#endif
71#endif
72
73#include <linux/kernel.h> /* resolves kmalloc references */
74#include <linux/skbuff.h> /* resolves skb references */
75#include <linux/netdevice.h> /* resolves dev_kree_skb_any */
76#include <asm/byteorder.h> /* resolves cpu_to_le32 */
77
78#if 0
79
80/*** PORT POINT WARNING
81 ***
82 *** Under Linux 2.6 it has been found that compiler is re-ordering
83 *** in-lined pci_write_32() functions to the detrement of correct
84 *** hardware setup. Therefore, inlining of PCI accesses has been
85 *** de-implemented, and subroutine calls have been implemented.
86 ***/
87
88static inline u_int32_t
89pci_read_32 (u_int32_t *p)
90{
91#ifdef FLOW_DEBUG
92 u_int32_t v;
93
94 FLUSH_PCI_READ ();
95 v = le32_to_cpu (*p);
96 if (log_level >= LOG_DEBUG)
97 pr_info("pci_read : %x = %x\n", (u_int32_t) p, v);
98 return v;
99#else
100 FLUSH_PCI_READ (); /* */
101 return le32_to_cpu (*p);
102#endif
103}
104
105static inline void
106pci_write_32 (u_int32_t *p, u_int32_t v)
107{
108#ifdef FLOW_DEBUG
109 if (log_level >= LOG_DEBUG)
110 pr_info("pci_write: %x = %x\n", (u_int32_t) p, v);
111#endif
112 *p = cpu_to_le32 (v);
113 FLUSH_PCI_WRITE (); /* This routine is called from routines
114 * which do multiple register writes
115 * which themselves need flushing between
116 * writes in order to guarantee write
117 * ordering. It is less code-cumbersome
118 * to flush here-in then to investigate
119 * and code the many other register
120 * writing routines. */
121}
122#else
123/* forward reference */
124u_int32_t pci_read_32 (u_int32_t *p);
125void pci_write_32 (u_int32_t *p, u_int32_t v);
126
127#endif
128
129
130/*
131 * system dependent callbacks
132 */
133
134/**********/
135/* malloc */
136/**********/
137
138static inline void *
139OS_kmalloc (size_t size)
140{
141 char *ptr = kmalloc (size, GFP_KERNEL | GFP_DMA);
142
143 if (ptr)
144 memset (ptr, 0, size);
145 return ptr;
146}
147
148static inline void
149OS_kfree (void *x)
150{
151 kfree (x);
152}
153
154
155/****************/
156/* memory token */
157/****************/
158
159static inline void *
160OS_mem_token_alloc (size_t size)
161{
162 struct sk_buff *skb;
163
164 skb = dev_alloc_skb (size);
165 if (!skb)
166 {
167 //pr_warning("no mem in OS_mem_token_alloc !\n");
168 return 0;
169 }
170 return skb;
171}
172
173
174static inline void
175OS_mem_token_free (void *token)
176{
177 dev_kfree_skb_any (token);
178}
179
180
181static inline void
182OS_mem_token_free_irq (void *token)
183{
184 dev_kfree_skb_irq (token);
185}
186
187
188static inline void *
189OS_mem_token_data (void *token)
190{
191 return ((struct sk_buff *) token)->data;
192}
193
194
195static inline void *
196OS_mem_token_next (void *token)
197{
198 return 0;
199}
200
201
202static inline int
203OS_mem_token_len (void *token)
204{
205 return ((struct sk_buff *) token)->len;
206}
207
208
209static inline int
210OS_mem_token_tlen (void *token)
211{
212 return ((struct sk_buff *) token)->len;
213}
214
215
216/***************************************/
217/* virtual to physical addr conversion */
218/***************************************/
219
220static inline u_long
221OS_phystov (void *addr)
222{
223 return (u_long) __va (addr);
224}
225
226
227static inline u_long
228OS_vtophys (void *addr)
229{
230 return __pa (addr);
231}
232
233
234/**********/
235/* semops */
236/**********/
237
238void OS_sem_init (void *, int);
239
240
241static inline void
242OS_sem_free (void *sem)
243{
244 /*
245 * NOOP - since semaphores structures predeclared w/in structures, no
246 * longer malloc'd
247 */
248}
249
250#define SD_SEM_TAKE(sem,desc) down(sem)
251#define SD_SEM_GIVE(sem) up(sem)
252#define SEM_AVAILABLE 1
253#define SEM_TAKEN 0
254
255
256/**********************/
257/* watchdog functions */
258/**********************/
259
260struct watchdog
261{
262 struct timer_list h;
263#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
264 struct tq_struct tq;
265#else
266 struct work_struct work;
267#endif
268 void *softc;
269 void (*func) (void *softc);
270 int ticks;
271 int init_tq;
272};
273
274
275static inline int
276OS_start_watchdog (struct watchdog * wd)
277{
278 wd->h.expires = jiffies + wd->ticks;
279 add_timer (&wd->h);
280 return 0;
281}
282
283
284static inline int
285OS_stop_watchdog (struct watchdog * wd)
286{
287 del_timer_sync (&wd->h);
288 return 0;
289}
290
291
292static inline int
293OS_free_watchdog (struct watchdog * wd)
294{
295 OS_stop_watchdog (wd);
296 OS_kfree (wd);
297 return 0;
298}
299
300
301/* sleep in microseconds */
302void OS_uwait (int usec, char *description);
303void OS_uwait_dummy (void);
304
305
306/* watchdog functions */
307int OS_init_watchdog(struct watchdog *wdp, void (*f) (void *), void *ci, int usec);
308
309
310#endif /*** _INC_SBECOM_INLNX_H_ ***/
diff --git a/drivers/staging/cxt1e1/sbecrc.c b/drivers/staging/cxt1e1/sbecrc.c
new file mode 100644
index 000000000000..51232948091f
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbecrc.c
@@ -0,0 +1,137 @@
1/* Based on "File Verification Using CRC" by Mark R. Nelson in Dr. Dobbs'
2 * Journal, May 1992, pp. 64-67. This algorithm generates the same CRC
3 * values as ZMODEM and PKZIP
4 *
5 * Copyright (C) 2002-2005 SBE, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/types.h>
19#include "pmcc4_sysdep.h"
20#include "sbecom_inline_linux.h"
21#include "sbe_promformat.h"
22
23/* defines */
24#define CRC32_POLYNOMIAL 0xEDB88320L
25#define CRC_TABLE_ENTRIES 256
26
27
28
29static u_int32_t crcTableInit;
30
31#ifdef STATIC_CRC_TABLE
32static u_int32_t CRCTable[CRC_TABLE_ENTRIES];
33
34#endif
35
36
37/***************************************************************************
38*
39* genCrcTable - fills in CRCTable, as used by sbeCrc()
40*
41* RETURNS: N/A
42*
43* ERRNO: N/A
44***************************************************************************/
45
46static void
47genCrcTable (u_int32_t *CRCTable)
48{
49 int ii, jj;
50 u_int32_t crc;
51
52 for (ii = 0; ii < CRC_TABLE_ENTRIES; ii++)
53 {
54 crc = ii;
55 for (jj = 8; jj > 0; jj--)
56 {
57 if (crc & 1)
58 crc = (crc >> 1) ^ CRC32_POLYNOMIAL;
59 else
60 crc >>= 1;
61 }
62 CRCTable[ii] = crc;
63 }
64
65 crcTableInit++;
66}
67
68
69/***************************************************************************
70*
71* sbeCrc - generates a CRC on a given buffer, and initial CRC
72*
73* This routine calculates the CRC for a buffer of data using the
74* table lookup method. It accepts an original value for the crc,
75* and returns the updated value. This permits "catenation" of
76* discontiguous buffers. An original value of 0 for the "first"
77* buffer is the norm.
78*
79* Based on "File Verification Using CRC" by Mark R. Nelson in Dr. Dobb's
80* Journal, May 1992, pp. 64-67. This algorithm generates the same CRC
81* values as ZMODEM and PKZIP.
82*
83* RETURNS: calculated crc of block
84*
85*/
86
87void
88sbeCrc (u_int8_t *buffer, /* data buffer to crc */
89 u_int32_t count, /* length of block in bytes */
90 u_int32_t initialCrc, /* starting CRC */
91 u_int32_t *result)
92{
93 u_int32_t *tbl = 0;
94 u_int32_t temp1, temp2, crc;
95
96 /*
97 * if table not yet created, do so. Don't care about "extra" time
98 * checking this everytime sbeCrc() is called, since CRC calculations are
99 * already time consuming
100 */
101 if (!crcTableInit)
102 {
103#ifdef STATIC_CRC_TABLE
104 tbl = &CRCTable;
105 genCrcTable (tbl);
106#else
107 tbl = (u_int32_t *) OS_kmalloc (CRC_TABLE_ENTRIES * sizeof (u_int32_t));
108 if (tbl == 0)
109 {
110 *result = 0; /* dummy up return value due to malloc
111 * failure */
112 return;
113 }
114 genCrcTable (tbl);
115#endif
116 }
117 /* inverting bits makes ZMODEM & PKZIP compatible */
118 crc = initialCrc ^ 0xFFFFFFFFL;
119
120 while (count-- != 0)
121 {
122 temp1 = (crc >> 8) & 0x00FFFFFFL;
123 temp2 = tbl[((int) crc ^ *buffer++) & 0xff];
124 crc = temp1 ^ temp2;
125 }
126
127 crc ^= 0xFFFFFFFFL;
128
129 *result = crc;
130
131#ifndef STATIC_CRC_TABLE
132 crcTableInit = 0;
133 OS_kfree (tbl);
134#endif
135}
136
137/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/sbeid.c b/drivers/staging/cxt1e1/sbeid.c
new file mode 100644
index 000000000000..a2243b10ef05
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbeid.c
@@ -0,0 +1,217 @@
1/* Copyright (C) 2005 SBE, Inc.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/types.h>
15#include "pmcc4_sysdep.h"
16#include "sbecom_inline_linux.h"
17#include "libsbew.h"
18#include "pmcc4_private.h"
19#include "pmcc4.h"
20#include "sbe_bid.h"
21
22#ifdef SBE_INCLUDE_SYMBOLS
23#define STATIC
24#else
25#define STATIC static
26#endif
27
28
29char *
30sbeid_get_bdname (ci_t * ci)
31{
32 char *np = 0;
33
34 switch (ci->brd_id)
35 {
36 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1):
37 np = "wanPTMC-256T3 <E1>";
38 break;
39 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1):
40 np = "wanPTMC-256T3 <T1>";
41 break;
42 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1):
43 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1_L):
44 np = "wanPMC-C4T1E1";
45 break;
46 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1):
47 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1_L):
48 np = "wanPMC-C2T1E1";
49 break;
50 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1):
51 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1_L):
52 np = "wanPMC-C1T1E1";
53 break;
54 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1):
55 np = "wanPCI-C4T1E1";
56 break;
57 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1):
58 np = "wanPCI-C2T1E1";
59 break;
60 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1):
61 np = "wanPCI-C1T1E1";
62 break;
63 default:
64 /*** np = "<unknown>"; ***/
65 np = "wanPCI-CxT1E1";
66 break;
67 }
68
69 return np;
70}
71
72
73/* given the presetting of brd_id, set the corresponding hdw_id */
74
75void
76sbeid_set_hdwbid (ci_t * ci)
77{
78 /*
79 * set SBE's unique hardware identification (for legacy boards might not
80 * have this register implemented)
81 */
82
83 switch (ci->brd_id)
84 {
85 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1):
86 ci->hdw_bid = SBE_BID_256T3_E1; /* 0x46 - SBE wanPTMC-256T3 (E1
87 * Version) */
88 break;
89 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1):
90 ci->hdw_bid = SBE_BID_256T3_T1; /* 0x42 - SBE wanPTMC-256T3 (T1
91 * Version) */
92 break;
93 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1):
94 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1_L):
95 /*
96 * This Board ID is a generic identification. Use the found number
97 * of ports to further define this hardware.
98 */
99 switch (ci->max_port)
100 {
101 default: /* shouldn't need a default, but have one
102 * anyway */
103 case 4:
104 ci->hdw_bid = SBE_BID_PMC_C4T1E1; /* 0xC4 - SBE wanPMC-C4T1E1 */
105 break;
106 case 2:
107 ci->hdw_bid = SBE_BID_PMC_C2T1E1; /* 0xC2 - SBE wanPMC-C2T1E1 */
108 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1);
109 break;
110 case 1:
111 ci->hdw_bid = SBE_BID_PMC_C1T1E1; /* 0xC1 - SBE wanPMC-C1T1E1 */
112 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1);
113 break;
114 }
115 break;
116 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1):
117 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1_L):
118 ci->hdw_bid = SBE_BID_PMC_C2T1E1; /* 0xC2 - SBE wanPMC-C2T1E1 */
119 break;
120 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1):
121 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1_L):
122 ci->hdw_bid = SBE_BID_PMC_C1T1E1; /* 0xC1 - SBE wanPMC-C1T1E1 */
123 break;
124#ifdef SBE_PMCC4_ENABLE
125 /*
126 * This case is entered as a result of the inability to obtain the
127 * <bid> from the board's EEPROM. Assume a PCI board and set
128 * <hdsbid> according to the number ofr found ports.
129 */
130 case 0:
131 /* start by assuming 4-port for ZERO casing */
132 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1);
133 /* drop thru to set hdw_bid and alternate PCI CxT1E1 settings */
134#endif
135 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1):
136 /*
137 * This Board ID is a generic identification. Use the number of
138 * found ports to further define this hardware.
139 */
140 switch (ci->max_port)
141 {
142 default: /* shouldn't need a default, but have one
143 * anyway */
144 case 4:
145 ci->hdw_bid = SBE_BID_PCI_C4T1E1; /* 0x04 - SBE wanPCI-C4T1E1 */
146 break;
147 case 2:
148 ci->hdw_bid = SBE_BID_PCI_C2T1E1; /* 0x02 - SBE wanPCI-C2T1E1 */
149 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1);
150 break;
151 case 1:
152 ci->hdw_bid = SBE_BID_PCI_C1T1E1; /* 0x01 - SBE wanPCI-C1T1E1 */
153 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1);
154 break;
155 }
156 break;
157 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1):
158 ci->hdw_bid = SBE_BID_PCI_C2T1E1; /* 0x02 - SBE wanPCI-C2T1E1 */
159 break;
160 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1):
161 ci->hdw_bid = SBE_BID_PCI_C1T1E1; /* 0x01 - SBE wanPCI-C1T1E1 */
162 break;
163 default:
164 /*** bid = "<unknown>"; ***/
165 ci->hdw_bid = SBE_BID_PMC_C4T1E1; /* 0x41 - SBE wanPTMC-C4T1E1 */
166 break;
167 }
168}
169
170/* given the presetting of hdw_bid, set the corresponding brd_id */
171
172void
173sbeid_set_bdtype (ci_t * ci)
174{
175 /* set SBE's unique PCI VENDOR/DEVID */
176 switch (ci->hdw_bid)
177 {
178 case SBE_BID_C1T3: /* SBE wanPMC-C1T3 */
179 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T3);
180 break;
181 case SBE_BID_C24TE1: /* SBE wanPTMC-C24TE1 */
182 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_C24TE1);
183 break;
184 case SBE_BID_256T3_E1: /* SBE wanPTMC-256T3 E1 Version */
185 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1);
186 break;
187 case SBE_BID_256T3_T1: /* SBE wanPTMC-256T3 T1 Version */
188 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1);
189 break;
190 case SBE_BID_PMC_C4T1E1: /* 0xC4 - SBE wanPMC-C4T1E1 */
191 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1);
192 break;
193 case SBE_BID_PMC_C2T1E1: /* 0xC2 - SBE wanPMC-C2T1E1 */
194 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1);
195 break;
196 case SBE_BID_PMC_C1T1E1: /* 0xC1 - SBE wanPMC-C1T1E1 */
197 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1);
198 break;
199 case SBE_BID_PCI_C4T1E1: /* 0x04 - SBE wanPCI-C4T1E1 */
200 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1);
201 break;
202 case SBE_BID_PCI_C2T1E1: /* 0x02 - SBE wanPCI-C2T1E1 */
203 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1);
204 break;
205 case SBE_BID_PCI_C1T1E1: /* 0x01 - SBE wanPCI-C1T1E1 */
206 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1);
207 break;
208
209 default:
210 /*** hdw_bid = "<unknown>"; ***/
211 ci->brd_id = SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1);
212 break;
213 }
214}
215
216
217/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/sbeproc.c b/drivers/staging/cxt1e1/sbeproc.c
new file mode 100644
index 000000000000..4f4dcd36bf4d
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbeproc.c
@@ -0,0 +1,358 @@
1/* Copyright (C) 2004-2005 SBE, Inc.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16#include <linux/types.h>
17#include <linux/module.h>
18#include <linux/errno.h>
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/proc_fs.h>
22#include <linux/sched.h>
23#include <asm/uaccess.h>
24#include "pmcc4_sysdep.h"
25#include "sbecom_inline_linux.h"
26#include "pmcc4_private.h"
27#include "sbeproc.h"
28
29/* forwards */
30void sbecom_get_brdinfo (ci_t *, struct sbe_brd_info *, u_int8_t *);
31extern struct s_hdw_info hdw_info[MAX_BOARDS];
32
33#ifdef CONFIG_PROC_FS
34
35/********************************************************************/
36/* procfs stuff */
37/********************************************************************/
38
39
40void
41sbecom_proc_brd_cleanup (ci_t * ci)
42{
43 if (ci->dir_dev)
44 {
45 char dir[7 + SBE_IFACETMPL_SIZE + 1];
46 snprintf(dir, sizeof(dir), "driver/%s", ci->devname);
47 remove_proc_entry("info", ci->dir_dev);
48 remove_proc_entry(dir, NULL);
49 ci->dir_dev = NULL;
50 }
51}
52
53
54static int
55sbecom_proc_get_sbe_info (char *buffer, char **start, off_t offset,
56 int length, int *eof, void *priv)
57{
58 ci_t *ci = (ci_t *) priv;
59 int len = 0;
60 char *spd;
61 struct sbe_brd_info *bip;
62
63 if (!(bip = OS_kmalloc (sizeof (struct sbe_brd_info))))
64 {
65 return -ENOMEM;
66 }
67#if 0
68 /** RLD DEBUG **/
69 pr_info(">> sbecom_proc_get_sbe_info: entered, offset %d. length %d.\n",
70 (int) offset, (int) length);
71#endif
72
73 {
74 hdw_info_t *hi = &hdw_info[ci->brdno];
75
76 u_int8_t *bsn = 0;
77
78 switch (hi->promfmt)
79 {
80 case PROM_FORMAT_TYPE1:
81 bsn = (u_int8_t *) hi->mfg_info.pft1.Serial;
82 break;
83 case PROM_FORMAT_TYPE2:
84 bsn = (u_int8_t *) hi->mfg_info.pft2.Serial;
85 break;
86 }
87
88 sbecom_get_brdinfo (ci, bip, bsn);
89 }
90
91#if 0
92 /** RLD DEBUG **/
93 pr_info(">> sbecom_get_brdinfo: returned, first_if %p <%s> last_if %p <%s>\n",
94 (char *) &bip->first_iname, (char *) &bip->first_iname,
95 (char *) &bip->last_iname, (char *) &bip->last_iname);
96#endif
97 len += sprintf (buffer + len, "Board Type: ");
98 switch (bip->brd_id)
99 {
100 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T3):
101 len += sprintf (buffer + len, "wanPMC-C1T3");
102 break;
103 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_E1):
104 len += sprintf (buffer + len, "wanPTMC-256T3 <E1>");
105 break;
106 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_256T3_T1):
107 len += sprintf (buffer + len, "wanPTMC-256T3 <T1>");
108 break;
109 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPTMC_C24TE1):
110 len += sprintf (buffer + len, "wanPTMC-C24TE1");
111 break;
112
113 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1):
114 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C4T1E1_L):
115 len += sprintf (buffer + len, "wanPMC-C4T1E1");
116 break;
117 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1):
118 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C2T1E1_L):
119 len += sprintf (buffer + len, "wanPMC-C2T1E1");
120 break;
121 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1):
122 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPMC_C1T1E1_L):
123 len += sprintf (buffer + len, "wanPMC-C1T1E1");
124 break;
125
126 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C4T1E1):
127 len += sprintf (buffer + len, "wanPCI-C4T1E1");
128 break;
129 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C2T1E1):
130 len += sprintf (buffer + len, "wanPCI-C2T1E1");
131 break;
132 case SBE_BOARD_ID (PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_WANPCI_C1T1E1):
133 len += sprintf (buffer + len, "wanPCI-C1T1E1");
134 break;
135
136 default:
137 len += sprintf (buffer + len, "unknown");
138 break;
139 }
140 len += sprintf (buffer + len, " [%08X]\n", bip->brd_id);
141
142 len += sprintf (buffer + len, "Board Number: %d\n", bip->brdno);
143 len += sprintf (buffer + len, "Hardware ID: 0x%02X\n", ci->hdw_bid);
144 len += sprintf (buffer + len, "Board SN: %06X\n", bip->brd_sn);
145 len += sprintf (buffer + len, "Board MAC: %02X-%02X-%02X-%02X-%02X-%02X\n",
146 bip->brd_mac_addr[0], bip->brd_mac_addr[1], bip->brd_mac_addr[2],
147 bip->brd_mac_addr[3], bip->brd_mac_addr[4], bip->brd_mac_addr[5]);
148 len += sprintf (buffer + len, "Ports: %d\n", ci->max_port);
149 len += sprintf (buffer + len, "Channels: %d\n", bip->brd_chan_cnt);
150#if 1
151 len += sprintf (buffer + len, "Interface: %s -> %s\n",
152 (char *) &bip->first_iname, (char *) &bip->last_iname);
153#else
154 len += sprintf (buffer + len, "Interface: <not available> 1st %p lst %p\n",
155 (char *) &bip->first_iname, (char *) &bip->last_iname);
156#endif
157
158 switch (bip->brd_pci_speed)
159 {
160 case BINFO_PCI_SPEED_33:
161 spd = "33Mhz";
162 break;
163 case BINFO_PCI_SPEED_66:
164 spd = "66Mhz";
165 break;
166 default:
167 spd = "<not available>";
168 break;
169 }
170 len += sprintf (buffer + len, "PCI Bus Speed: %s\n", spd);
171 len += sprintf (buffer + len, "Release: %s\n", ci->release);
172
173#ifdef SBE_PMCC4_ENABLE
174 {
175 extern int max_mru;
176#if 0
177 extern int max_chans_used;
178 extern int max_mtu;
179#endif
180 extern int max_rxdesc_used, max_txdesc_used;
181
182 len += sprintf (buffer + len, "\nmax_mru: %d\n", max_mru);
183#if 0
184 len += sprintf (buffer + len, "\nmax_chans_used: %d\n", max_chans_used);
185 len += sprintf (buffer + len, "max_mtu: %d\n", max_mtu);
186#endif
187 len += sprintf (buffer + len, "max_rxdesc_used: %d\n", max_rxdesc_used);
188 len += sprintf (buffer + len, "max_txdesc_used: %d\n", max_txdesc_used);
189 }
190#endif
191
192 OS_kfree (bip); /* cleanup */
193
194 /***
195 * How to be a proc read function
196 * ------------------------------
197 * Prototype:
198 * int f(char *buffer, char **start, off_t offset,
199 * int count, int *peof, void *dat)
200 *
201 * Assume that the buffer is "count" bytes in size.
202 *
203 * If you know you have supplied all the data you
204 * have, set *peof.
205 *
206 * You have three ways to return data:
207 * 0) Leave *start = NULL. (This is the default.)
208 * Put the data of the requested offset at that
209 * offset within the buffer. Return the number (n)
210 * of bytes there are from the beginning of the
211 * buffer up to the last byte of data. If the
212 * number of supplied bytes (= n - offset) is
213 * greater than zero and you didn't signal eof
214 * and the reader is prepared to take more data
215 * you will be called again with the requested
216 * offset advanced by the number of bytes
217 * absorbed. This interface is useful for files
218 * no larger than the buffer.
219 * 1) Set *start = an unsigned long value less than
220 * the buffer address but greater than zero.
221 * Put the data of the requested offset at the
222 * beginning of the buffer. Return the number of
223 * bytes of data placed there. If this number is
224 * greater than zero and you didn't signal eof
225 * and the reader is prepared to take more data
226 * you will be called again with the requested
227 * offset advanced by *start. This interface is
228 * useful when you have a large file consisting
229 * of a series of blocks which you want to count
230 * and return as wholes.
231 * (Hack by Paul.Russell@rustcorp.com.au)
232 * 2) Set *start = an address within the buffer.
233 * Put the data of the requested offset at *start.
234 * Return the number of bytes of data placed there.
235 * If this number is greater than zero and you
236 * didn't signal eof and the reader is prepared to
237 * take more data you will be called again with the
238 * requested offset advanced by the number of bytes
239 * absorbed.
240 */
241
242#if 1
243 /* #4 - intepretation of above = set EOF, return len */
244 *eof = 1;
245#endif
246
247#if 0
248 /*
249 * #1 - from net/wireless/atmel.c RLD NOTE -there's something wrong with
250 * this plagarized code which results in this routine being called TWICE.
251 * The second call returns ZERO, resulting in hidden failure, but at
252 * least only a single message set is being displayed.
253 */
254 if (len <= offset + length)
255 *eof = 1;
256 *start = buffer + offset;
257 len -= offset;
258 if (len > length)
259 len = length;
260 if (len < 0)
261 len = 0;
262#endif
263
264#if 0 /* #2 from net/tokenring/olympic.c +
265 * lanstreamer.c */
266 {
267 off_t begin = 0;
268 int size = 0;
269 off_t pos = 0;
270
271 size = len;
272 pos = begin + size;
273 if (pos < offset)
274 {
275 len = 0;
276 begin = pos;
277 }
278 *start = buffer + (offset - begin); /* Start of wanted data */
279 len -= (offset - begin); /* Start slop */
280 if (len > length)
281 len = length; /* Ending slop */
282 }
283#endif
284
285#if 0 /* #3 from
286 * char/ftape/lowlevel/ftape-proc.c */
287 len = strlen (buffer);
288 *start = NULL;
289 if (offset + length >= len)
290 *eof = 1;
291 else
292 *eof = 0;
293#endif
294
295#if 0
296 pr_info(">> proc_fs: returned len = %d., start %p\n", len, start); /* RLD DEBUG */
297#endif
298
299/***
300 using NONE: returns = 314.314.314.
301 using #1 : returns = 314, 0.
302 using #2 : returns = 314, 0, 0.
303 using #3 : returns = 314, 314.
304 using #4 : returns = 314, 314.
305***/
306
307 return len;
308}
309
310/* initialize the /proc subsystem for the specific SBE driver */
311
312int __init
313sbecom_proc_brd_init (ci_t * ci)
314{
315 struct proc_dir_entry *e;
316 char dir[7 + SBE_IFACETMPL_SIZE + 1];
317
318 /* create a directory in the root procfs */
319 snprintf(dir, sizeof(dir), "driver/%s", ci->devname);
320 ci->dir_dev = proc_mkdir(dir, NULL);
321 if (!ci->dir_dev)
322 {
323 pr_err("Unable to create directory /proc/driver/%s\n", ci->devname);
324 goto fail;
325 }
326 e = create_proc_read_entry ("info", S_IFREG | S_IRUGO,
327 ci->dir_dev, sbecom_proc_get_sbe_info, ci);
328 if (!e)
329 {
330 pr_err("Unable to create entry /proc/driver/%s/info\n", ci->devname);
331 goto fail;
332 }
333 return 0;
334
335fail:
336 sbecom_proc_brd_cleanup (ci);
337 return 1;
338}
339
340#else /*** ! CONFIG_PROC_FS ***/
341
342/* stubbed off dummy routines */
343
344void
345sbecom_proc_brd_cleanup (ci_t * ci)
346{
347}
348
349int __init
350sbecom_proc_brd_init (ci_t * ci)
351{
352 return 0;
353}
354
355#endif /*** CONFIG_PROC_FS ***/
356
357
358/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/sbeproc.h b/drivers/staging/cxt1e1/sbeproc.h
new file mode 100644
index 000000000000..4aa53f44ec0b
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbeproc.h
@@ -0,0 +1,52 @@
1/*
2 * $Id: sbeproc.h,v 1.2 2005/10/17 23:55:28 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBEPROC_H_
6#define _INC_SBEPROC_H_
7
8/*-----------------------------------------------------------------------------
9 * sbeproc.h -
10 *
11 * Copyright (C) 2004-2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.2 $
28 * Last changed on $Date: 2005/10/17 23:55:28 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: sbeproc.h,v $
32 * Revision 1.2 2005/10/17 23:55:28 rickd
33 * sbecom_proc_brd_init() is an declared an __init function.
34 *
35 * Revision 1.1 2005/09/28 00:10:09 rickd
36 * Remove unneeded inclusion of c4_private.h.
37 *
38 * Revision 1.0 2005/05/10 22:21:46 rickd
39 * Initial check-in.
40 *
41 *-----------------------------------------------------------------------------
42 */
43
44
45#ifdef CONFIG_PROC_FS
46#ifdef __KERNEL__
47void sbecom_proc_brd_cleanup (ci_t *);
48int __init sbecom_proc_brd_init (ci_t *);
49
50#endif /*** __KERNEL__ ***/
51#endif /*** CONFIG_PROC_FS ***/
52#endif /*** _INC_SBEPROC_H_ ***/
diff --git a/drivers/staging/cxt1e1/sbew_ioc.h b/drivers/staging/cxt1e1/sbew_ioc.h
new file mode 100644
index 000000000000..14d371904d1f
--- /dev/null
+++ b/drivers/staging/cxt1e1/sbew_ioc.h
@@ -0,0 +1,136 @@
1/*
2 * $Id: sbew_ioc.h,v 1.0 2005/09/28 00:10:10 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBEWIOC_H_
6#define _INC_SBEWIOC_H_
7
8/*-----------------------------------------------------------------------------
9 * sbew_ioc.h -
10 *
11 * Copyright (C) 2002-2005 SBE, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A.
25 *
26 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.0 $
29 * Last changed on $Date: 2005/09/28 00:10:10 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbew_ioc.h,v $
33 * Revision 1.0 2005/09/28 00:10:10 rickd
34 * Initial revision
35 *
36 * Revision 1.6 2005/01/11 18:41:01 rickd
37 * Add BRDADDR_GET Ioctl.
38 *
39 * Revision 1.5 2004/09/16 18:55:59 rickd
40 * Start setting up for generic framer configuration Ioctl by switch
41 * from tect3_framer_param[] to sbecom_framer_param[].
42 *
43 * Revision 1.4 2004/06/28 17:58:15 rickd
44 * Rename IOC_TSMAP_[GS] to IOC_TSIOC_[GS] to support need for
45 * multiple formats of data when setting up TimeSlots.
46 *
47 * Revision 1.3 2004/06/22 21:18:13 rickd
48 * read_vec now() ONLY handles a single common wrt_vec array.
49 *
50 * Revision 1.1 2004/06/10 18:11:34 rickd
51 * Add IID_GET Ioctl reference.
52 *
53 * Revision 1.0 2004/06/08 22:59:38 rickd
54 * Initial revision
55 *
56 * Revision 2.0 2004/06/07 17:49:47 rickd
57 * Initial library release following merge of wanc1t3/wan256 into
58 * common elements for lib.
59 *
60 *-----------------------------------------------------------------------------
61 */
62
63#ifndef __KERNEL__
64#include <sys/types.h>
65#endif
66#ifdef SunOS
67#include <sys/ioccom.h>
68#else
69#include <linux/ioctl.h>
70#endif
71
72#ifdef __cplusplus
73extern "C"
74{
75#endif
76
77#define SBE_LOCKFILE "/tmp/.sbewan.LCK"
78
79#define SBE_IOC_COOKIE 0x19780926
80#define SBE_IOC_MAGIC ('s')
81
82/* IOW write - data has to go into driver from application */
83/* IOR read - data has to be returned to application from driver */
84
85/*
86 * Note: for an IOWR Ioctl, the read and write data do not have to
87 * be the same size, but the entity declared within the IOC must be
88 * the larger of the two.
89 */
90
91#define SBE_IOC_LOGLEVEL _IOW(SBE_IOC_MAGIC, 0x00, int)
92#define SBE_IOC_CHAN_NEW _IOW(SBE_IOC_MAGIC, 0x01,int) /* unused */
93#define SBE_IOC_CHAN_UP _IOW(SBE_IOC_MAGIC, 0x02,int) /* unused */
94#define SBE_IOC_CHAN_DOWN _IOW(SBE_IOC_MAGIC, 0x03,int) /* unused */
95#define SBE_IOC_CHAN_GET _IOWR(SBE_IOC_MAGIC,0x04, struct sbecom_chan_param)
96#define SBE_IOC_CHAN_SET _IOW(SBE_IOC_MAGIC, 0x05, struct sbecom_chan_param)
97#define SBE_IOC_CHAN_GET_STAT _IOWR(SBE_IOC_MAGIC,0x06, struct sbecom_chan_stats)
98#define SBE_IOC_CHAN_DEL_STAT _IOW(SBE_IOC_MAGIC, 0x07, int)
99#define SBE_IOC_PORTS_ENABLE _IOW(SBE_IOC_MAGIC, 0x0A, int)
100#define SBE_IOC_PORT_GET _IOWR(SBE_IOC_MAGIC,0x0C, struct sbecom_port_param)
101#define SBE_IOC_PORT_SET _IOW(SBE_IOC_MAGIC, 0x0D, struct sbecom_port_param)
102#define SBE_IOC_READ_VEC _IOWR(SBE_IOC_MAGIC,0x10, struct sbecom_wrt_vec)
103#define SBE_IOC_WRITE_VEC _IOWR(SBE_IOC_MAGIC,0x11, struct sbecom_wrt_vec)
104#define SBE_IOC_GET_SN _IOR(SBE_IOC_MAGIC, 0x12, u_int32_t)
105#define SBE_IOC_RESET_DEV _IOW(SBE_IOC_MAGIC, 0x13, int)
106#define SBE_IOC_FRAMER_GET _IOWR(SBE_IOC_MAGIC,0x14, struct sbecom_framer_param)
107#define SBE_IOC_FRAMER_SET _IOW(SBE_IOC_MAGIC, 0x15, struct sbecom_framer_param)
108#define SBE_IOC_CARD_GET _IOR(SBE_IOC_MAGIC, 0x20, struct sbecom_card_param)
109#define SBE_IOC_CARD_SET _IOW(SBE_IOC_MAGIC, 0x21, struct sbecom_card_param)
110#define SBE_IOC_CARD_GET_STAT _IOR(SBE_IOC_MAGIC, 0x22, struct temux_card_stats)
111#define SBE_IOC_CARD_DEL_STAT _IO(SBE_IOC_MAGIC, 0x23)
112#define SBE_IOC_CARD_CHAN_STAT _IOR(SBE_IOC_MAGIC, 0x24, struct sbecom_chan_stats)
113#define SBE_IOC_CARD_BLINK _IOW(SBE_IOC_MAGIC, 0x30, int)
114#define SBE_IOC_DRVINFO_GET _IOWR(SBE_IOC_MAGIC,0x31, struct sbe_drv_info)
115#define SBE_IOC_BRDINFO_GET _IOR(SBE_IOC_MAGIC, 0x32, struct sbe_brd_info)
116#define SBE_IOC_IID_GET _IOWR(SBE_IOC_MAGIC,0x33, struct sbe_iid_info)
117#define SBE_IOC_BRDADDR_GET _IOWR(SBE_IOC_MAGIC, 0x34, struct sbe_brd_addr)
118
119#ifdef NOT_YET_COMMON
120#define SBE_IOC_TSIOC_GET _IOWR(SBE_IOC_MAGIC,0x16, struct wanc1t3_ts_param)
121#define SBE_IOC_TSIOC_SET _IOW(SBE_IOC_MAGIC, 0x17, struct wanc1t3_ts_param)
122#endif
123
124/*
125 * Restrict SBE_IOC_WRITE_VEC & READ_VEC to a single parameter pair, application
126 * then must issue multiple Ioctls for large blocks of contiguous data.
127 */
128
129#define SBE_IOC_MAXVEC 1
130
131
132#ifdef __cplusplus
133}
134#endif
135
136#endif /*** _INC_SBEWIOC_H_ ***/
diff --git a/drivers/staging/dream/Kconfig b/drivers/staging/dream/Kconfig
index 4afa081c870c..0c30b19a5a7c 100644
--- a/drivers/staging/dream/Kconfig
+++ b/drivers/staging/dream/Kconfig
@@ -1,16 +1,13 @@
1config DREAM 1config DREAM
2 tristate "HTC Dream support" 2 tristate "HTC Dream support"
3 depends on BROKEN 3 depends on MACH_TROUT
4 4
5source "drivers/staging/dream/smd/Kconfig" 5if DREAM
6 6
7source "drivers/staging/dream/camera/Kconfig" 7source "drivers/staging/dream/camera/Kconfig"
8 8
9
10config INPUT_GPIO 9config INPUT_GPIO
11 tristate "GPIO driver support" 10 tristate "GPIO driver support"
12 help 11 help
13 Say Y here if you want to support gpio based keys, wheels etc... 12 Say Y here if you want to support gpio based keys, wheels etc...
14 13endif
15
16
diff --git a/drivers/staging/dream/Makefile b/drivers/staging/dream/Makefile
index 2b7915197078..fbea0abcc864 100644
--- a/drivers/staging/dream/Makefile
+++ b/drivers/staging/dream/Makefile
@@ -1,4 +1,5 @@
1obj-$(CONFIG_MSM_ADSP) += qdsp5/ smd/ 1EXTRA_CFLAGS=-Idrivers/staging/dream/include
2obj-$(CONFIG_MSM_ADSP) += qdsp5/
2obj-$(CONFIG_MSM_CAMERA) += camera/ 3obj-$(CONFIG_MSM_CAMERA) += camera/
3obj-$(CONFIG_INPUT_GPIO) += gpio_axis.o gpio_event.o gpio_input.o gpio_matrix.o gpio_output.o 4obj-$(CONFIG_INPUT_GPIO) += gpio_axis.o gpio_event.o gpio_input.o gpio_matrix.o gpio_output.o
4 5
diff --git a/drivers/staging/dream/TODO b/drivers/staging/dream/TODO
index c07c8803f07c..dcd3ba808655 100644
--- a/drivers/staging/dream/TODO
+++ b/drivers/staging/dream/TODO
@@ -1,4 +1,3 @@
1* remove support for wakelocks since those are not in mainline
2 1
3* camera driver uses old V4L API 2* camera driver uses old V4L API
4 3
diff --git a/drivers/staging/dream/camera/msm_vfe8x_proc.c b/drivers/staging/dream/camera/msm_vfe8x_proc.c
index 10aef0e59bab..f80ef967ba87 100644
--- a/drivers/staging/dream/camera/msm_vfe8x_proc.c
+++ b/drivers/staging/dream/camera/msm_vfe8x_proc.c
@@ -3828,7 +3828,7 @@ void vfe_camif_config(struct vfe_cmd_camif_config *in)
3828 ctrl->vfeImaskLocal.camifEpoch2Irq = 1; 3828 ctrl->vfeImaskLocal.camifEpoch2Irq = 1;
3829 } 3829 }
3830 3830
3831 /* save the content to program CAMIF_CONFIG seperately. */ 3831 /* save the content to program CAMIF_CONFIG separately. */
3832 ctrl->vfeCamifConfigLocal.camifCfgFromCmd = in->camifConfig; 3832 ctrl->vfeCamifConfigLocal.camifCfgFromCmd = in->camifConfig;
3833 3833
3834 /* EFS_Config */ 3834 /* EFS_Config */
diff --git a/drivers/staging/dream/pmem.c b/drivers/staging/dream/pmem.c
index 6edfdd4ef804..6387365a833d 100644
--- a/drivers/staging/dream/pmem.c
+++ b/drivers/staging/dream/pmem.c
@@ -38,17 +38,17 @@
38 * the file should not be released until put_pmem_file is called */ 38 * the file should not be released until put_pmem_file is called */
39#define PMEM_FLAGS_BUSY 0x1 39#define PMEM_FLAGS_BUSY 0x1
40/* indicates that this is a suballocation of a larger master range */ 40/* indicates that this is a suballocation of a larger master range */
41#define PMEM_FLAGS_CONNECTED ( 0x1 << 1 ) 41#define PMEM_FLAGS_CONNECTED (0x1 << 1)
42/* indicates this is a master and not a sub allocation and that it is mmaped */ 42/* indicates this is a master and not a sub allocation and that it is mmaped */
43#define PMEM_FLAGS_MASTERMAP ( 0x1 << 2 ) 43#define PMEM_FLAGS_MASTERMAP (0x1 << 2)
44/* submap and unsubmap flags indicate: 44/* submap and unsubmap flags indicate:
45 * 00: subregion has never been mmaped 45 * 00: subregion has never been mmaped
46 * 10: subregion has been mmaped, reference to the mm was taken 46 * 10: subregion has been mmaped, reference to the mm was taken
47 * 11: subretion has ben released, refernece to the mm still held 47 * 11: subretion has ben released, refernece to the mm still held
48 * 01: subretion has been released, reference to the mm has been released 48 * 01: subretion has been released, reference to the mm has been released
49 */ 49 */
50#define PMEM_FLAGS_SUBMAP ( 0x1 << 3 ) 50#define PMEM_FLAGS_SUBMAP (0x1 << 3)
51#define PMEM_FLAGS_UNSUBMAP ( 0x1 << 4 ) 51#define PMEM_FLAGS_UNSUBMAP (0x1 << 4)
52 52
53 53
54struct pmem_data { 54struct pmem_data {
@@ -153,7 +153,7 @@ struct pmem_info {
153static struct pmem_info pmem[PMEM_MAX_DEVICES]; 153static struct pmem_info pmem[PMEM_MAX_DEVICES];
154static int id_count; 154static int id_count;
155 155
156#define PMEM_IS_FREE(id, index) ( !(pmem[id].bitmap[index].allocated) ) 156#define PMEM_IS_FREE(id, index) (!(pmem[id].bitmap[index].allocated))
157#define PMEM_ORDER(id, index) pmem[id].bitmap[index].order 157#define PMEM_ORDER(id, index) pmem[id].bitmap[index].order
158#define PMEM_BUDDY_INDEX(id, index) (index ^ (1 << PMEM_ORDER(id, index))) 158#define PMEM_BUDDY_INDEX(id, index) (index ^ (1 << PMEM_ORDER(id, index)))
159#define PMEM_NEXT_INDEX(id, index) (index + (1 << PMEM_ORDER(id, index))) 159#define PMEM_NEXT_INDEX(id, index) (index + (1 << PMEM_ORDER(id, index)))
@@ -845,8 +845,8 @@ static int pmem_connect(unsigned long connect, struct file *file)
845 src_data = (struct pmem_data *)src_file->private_data; 845 src_data = (struct pmem_data *)src_file->private_data;
846 846
847 if (has_allocation(file) && (data->index != src_data->index)) { 847 if (has_allocation(file) && (data->index != src_data->index)) {
848 printk(KERN_INFO "pmem: file is already mapped but doesn't match this" 848 printk(KERN_INFO "pmem: file is already mapped but doesn't "
849 " src_file!\n"); 849 "match this src_file!\n");
850 ret = -EINVAL; 850 ret = -EINVAL;
851 goto err_bad_file; 851 goto err_bad_file;
852 } 852 }
@@ -935,8 +935,8 @@ int pmem_remap(struct pmem_region *region, struct file *file,
935 if (unlikely(!PMEM_IS_PAGE_ALIGNED(region->offset) || 935 if (unlikely(!PMEM_IS_PAGE_ALIGNED(region->offset) ||
936 !PMEM_IS_PAGE_ALIGNED(region->len))) { 936 !PMEM_IS_PAGE_ALIGNED(region->len))) {
937#if PMEM_DEBUG 937#if PMEM_DEBUG
938 printk(KERN_DEBUG "pmem: request for unaligned pmem suballocation " 938 printk(KERN_DEBUG "pmem: request for unaligned pmem "
939 "%lx %lx\n", region->offset, region->len); 939 "suballocation %lx %lx\n", region->offset, region->len);
940#endif 940#endif
941 return -EINVAL; 941 return -EINVAL;
942 } 942 }
@@ -1086,8 +1086,8 @@ static long pmem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1086 region.offset = pmem_start_addr(id, data); 1086 region.offset = pmem_start_addr(id, data);
1087 region.len = pmem_len(id, data); 1087 region.len = pmem_len(id, data);
1088 } 1088 }
1089 printk(KERN_INFO "pmem: request for physical address of pmem region " 1089 printk(KERN_INFO "pmem: request for physical address "
1090 "from process %d.\n", current->pid); 1090 "of pmem region from process %d.\n", current->pid);
1091 if (copy_to_user((void __user *)arg, &region, 1091 if (copy_to_user((void __user *)arg, &region,
1092 sizeof(struct pmem_region))) 1092 sizeof(struct pmem_region)))
1093 return -EFAULT; 1093 return -EFAULT;
@@ -1245,14 +1245,11 @@ int pmem_setup(struct android_pmem_platform_data *pdata,
1245 } 1245 }
1246 pmem[id].num_entries = pmem[id].size / PMEM_MIN_ALLOC; 1246 pmem[id].num_entries = pmem[id].size / PMEM_MIN_ALLOC;
1247 1247
1248 pmem[id].bitmap = kmalloc(pmem[id].num_entries * 1248 pmem[id].bitmap = kcalloc(pmem[id].num_entries,
1249 sizeof(struct pmem_bits), GFP_KERNEL); 1249 sizeof(struct pmem_bits), GFP_KERNEL);
1250 if (!pmem[id].bitmap) 1250 if (!pmem[id].bitmap)
1251 goto err_no_mem_for_metadata; 1251 goto err_no_mem_for_metadata;
1252 1252
1253 memset(pmem[id].bitmap, 0, sizeof(struct pmem_bits) *
1254 pmem[id].num_entries);
1255
1256 for (i = sizeof(pmem[id].num_entries) * 8 - 1; i >= 0; i--) { 1253 for (i = sizeof(pmem[id].num_entries) * 8 - 1; i >= 0; i--) {
1257 if ((pmem[id].num_entries) & 1<<i) { 1254 if ((pmem[id].num_entries) & 1<<i) {
1258 PMEM_ORDER(id, index) = i; 1255 PMEM_ORDER(id, index) = i;
diff --git a/drivers/staging/dream/qdsp5/audio_out.c b/drivers/staging/dream/qdsp5/audio_out.c
index fe7809dd4401..76d7fa5667d5 100644
--- a/drivers/staging/dream/qdsp5/audio_out.c
+++ b/drivers/staging/dream/qdsp5/audio_out.c
@@ -182,9 +182,6 @@ struct audio {
182 int stopped; /* set when stopped, cleared on flush */ 182 int stopped; /* set when stopped, cleared on flush */
183 unsigned volume; 183 unsigned volume;
184 184
185 struct wake_lock wakelock;
186 struct wake_lock idlelock;
187
188 int adrc_enable; 185 int adrc_enable;
189 struct adrc_filter adrc; 186 struct adrc_filter adrc;
190 187
@@ -198,14 +195,10 @@ struct audio {
198static void audio_prevent_sleep(struct audio *audio) 195static void audio_prevent_sleep(struct audio *audio)
199{ 196{
200 printk(KERN_INFO "++++++++++++++++++++++++++++++\n"); 197 printk(KERN_INFO "++++++++++++++++++++++++++++++\n");
201 wake_lock(&audio->wakelock);
202 wake_lock(&audio->idlelock);
203} 198}
204 199
205static void audio_allow_sleep(struct audio *audio) 200static void audio_allow_sleep(struct audio *audio)
206{ 201{
207 wake_unlock(&audio->wakelock);
208 wake_unlock(&audio->idlelock);
209 printk(KERN_INFO "------------------------------\n"); 202 printk(KERN_INFO "------------------------------\n");
210} 203}
211 204
@@ -840,8 +833,6 @@ static int __init audio_init(void)
840 mutex_init(&the_audio.write_lock); 833 mutex_init(&the_audio.write_lock);
841 spin_lock_init(&the_audio.dsp_lock); 834 spin_lock_init(&the_audio.dsp_lock);
842 init_waitqueue_head(&the_audio.wait); 835 init_waitqueue_head(&the_audio.wait);
843 wake_lock_init(&the_audio.wakelock, WAKE_LOCK_SUSPEND, "audio_pcm");
844 wake_lock_init(&the_audio.idlelock, WAKE_LOCK_IDLE, "audio_pcm_idle");
845 return (misc_register(&audio_misc) || misc_register(&audpp_misc)); 836 return (misc_register(&audio_misc) || misc_register(&audpp_misc));
846} 837}
847 838
diff --git a/drivers/staging/dream/smd/Kconfig b/drivers/staging/dream/smd/Kconfig
deleted file mode 100644
index 17b8bdc7b9b7..000000000000
--- a/drivers/staging/dream/smd/Kconfig
+++ /dev/null
@@ -1,26 +0,0 @@
1config MSM_SMD
2 depends on ARCH_MSM
3 default y
4 bool "MSM Shared Memory Driver (SMD)"
5 help
6 Support for the shared memory interface between the apps
7 processor and the baseband processor. Provides access to
8 the "shared heap", as well as virtual serial channels
9 used to communicate with various services on the baseband
10 processor.
11
12config MSM_ONCRPCROUTER
13 depends on MSM_SMD
14 default y
15 bool "MSM ONCRPC router support"
16 help
17 Support for the MSM ONCRPC router for communication between
18 the ARM9 and ARM11
19
20config MSM_RPCSERVERS
21 depends on MSM_ONCRPCROUTER
22 default y
23 bool "Kernel side RPC server bundle"
24 help
25 none
26
diff --git a/drivers/staging/dream/smd/Makefile b/drivers/staging/dream/smd/Makefile
deleted file mode 100644
index 1c87618366a7..000000000000
--- a/drivers/staging/dream/smd/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1EXTRA_CFLAGS=-Idrivers/staging/dream/include
2obj-$(CONFIG_MSM_SMD) += smd.o smd_tty.o smd_qmi.o
3obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter.o
4obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_device.o
5obj-$(CONFIG_MSM_ONCRPCROUTER) += smd_rpcrouter_servers.o
6obj-$(CONFIG_MSM_RPCSERVERS) += rpc_server_dog_keepalive.o
7obj-$(CONFIG_MSM_RPCSERVERS) += rpc_server_time_remote.o
diff --git a/drivers/staging/dream/smd/rpc_server_dog_keepalive.c b/drivers/staging/dream/smd/rpc_server_dog_keepalive.c
deleted file mode 100644
index b23fccfa87e2..000000000000
--- a/drivers/staging/dream/smd/rpc_server_dog_keepalive.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/* arch/arm/mach-msm/rpc_server_dog_keepalive.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Iliyan Malchev <ibm@android.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <mach/msm_rpcrouter.h>
20
21/* dog_keepalive server definitions */
22
23#define DOG_KEEPALIVE_PROG 0x30000015
24#if CONFIG_MSM_AMSS_VERSION==6210
25#define DOG_KEEPALIVE_VERS 0
26#define RPC_DOG_KEEPALIVE_BEACON 1
27#elif (CONFIG_MSM_AMSS_VERSION==6220) || (CONFIG_MSM_AMSS_VERSION==6225)
28#define DOG_KEEPALIVE_VERS 0x731fa727
29#define RPC_DOG_KEEPALIVE_BEACON 2
30#elif CONFIG_MSM_AMSS_VERSION==6350
31#define DOG_KEEPALIVE_VERS 0x00010000
32#define RPC_DOG_KEEPALIVE_BEACON 2
33#else
34#error "Unsupported AMSS version"
35#endif
36#define RPC_DOG_KEEPALIVE_NULL 0
37
38
39/* TODO: Remove server registration with _VERS when modem is upated with _COMP*/
40
41static int handle_rpc_call(struct msm_rpc_server *server,
42 struct rpc_request_hdr *req, unsigned len)
43{
44 switch (req->procedure) {
45 case RPC_DOG_KEEPALIVE_NULL:
46 return 0;
47 case RPC_DOG_KEEPALIVE_BEACON:
48 printk(KERN_INFO "DOG KEEPALIVE PING\n");
49 return 0;
50 default:
51 return -ENODEV;
52 }
53}
54
55static struct msm_rpc_server rpc_server = {
56 .prog = DOG_KEEPALIVE_PROG,
57 .vers = DOG_KEEPALIVE_VERS,
58 .rpc_call = handle_rpc_call,
59};
60
61static int __init rpc_server_init(void)
62{
63 /* Dual server registration to support backwards compatibility vers */
64 return msm_rpc_create_server(&rpc_server);
65}
66
67
68module_init(rpc_server_init);
diff --git a/drivers/staging/dream/smd/rpc_server_time_remote.c b/drivers/staging/dream/smd/rpc_server_time_remote.c
deleted file mode 100644
index 2f90fc88c385..000000000000
--- a/drivers/staging/dream/smd/rpc_server_time_remote.c
+++ /dev/null
@@ -1,77 +0,0 @@
1/* arch/arm/mach-msm/rpc_server_time_remote.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Iliyan Malchev <ibm@android.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <mach/msm_rpcrouter.h>
20
21/* time_remote_mtoa server definitions. */
22
23#define TIME_REMOTE_MTOA_PROG 0x3000005d
24#if CONFIG_MSM_AMSS_VERSION==6210
25#define TIME_REMOTE_MTOA_VERS 0
26#elif (CONFIG_MSM_AMSS_VERSION==6220) || (CONFIG_MSM_AMSS_VERSION==6225)
27#define TIME_REMOTE_MTOA_VERS 0x9202a8e4
28#elif CONFIG_MSM_AMSS_VERSION==6350
29#define TIME_REMOTE_MTOA_VERS 0x00010000
30#else
31#error "Unknown AMSS version"
32#endif
33#define RPC_TIME_REMOTE_MTOA_NULL 0
34#define RPC_TIME_TOD_SET_APPS_BASES 2
35
36struct rpc_time_tod_set_apps_bases_args {
37 uint32_t tick;
38 uint64_t stamp;
39};
40
41static int handle_rpc_call(struct msm_rpc_server *server,
42 struct rpc_request_hdr *req, unsigned len)
43{
44 switch (req->procedure) {
45 case RPC_TIME_REMOTE_MTOA_NULL:
46 return 0;
47
48 case RPC_TIME_TOD_SET_APPS_BASES: {
49 struct rpc_time_tod_set_apps_bases_args *args;
50 args = (struct rpc_time_tod_set_apps_bases_args *)(req + 1);
51 args->tick = be32_to_cpu(args->tick);
52 args->stamp = be64_to_cpu(args->stamp);
53 printk(KERN_INFO "RPC_TIME_TOD_SET_APPS_BASES:\n"
54 "\ttick = %d\n"
55 "\tstamp = %lld\n",
56 args->tick, args->stamp);
57 return 0;
58 }
59 default:
60 return -ENODEV;
61 }
62}
63
64static struct msm_rpc_server rpc_server = {
65 .prog = TIME_REMOTE_MTOA_PROG,
66 .vers = TIME_REMOTE_MTOA_VERS,
67 .rpc_call = handle_rpc_call,
68};
69
70static int __init rpc_server_init(void)
71{
72 /* Dual server registration to support backwards compatibility vers */
73 return msm_rpc_create_server(&rpc_server);
74}
75
76
77module_init(rpc_server_init);
diff --git a/drivers/staging/dream/smd/smd.c b/drivers/staging/dream/smd/smd.c
deleted file mode 100644
index 8f35be7193fb..000000000000
--- a/drivers/staging/dream/smd/smd.c
+++ /dev/null
@@ -1,1330 +0,0 @@
1/* arch/arm/mach-msm/smd.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/fs.h>
20#include <linux/cdev.h>
21#include <linux/device.h>
22#include <linux/wait.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/list.h>
26#include <linux/slab.h>
27#include <linux/debugfs.h>
28#include <linux/delay.h>
29#include <linux/io.h>
30
31#include <mach/msm_smd.h>
32#include <mach/msm_iomap.h>
33#include <mach/system.h>
34
35#include "smd_private.h"
36#include "../../../../arch/arm/mach-msm/proc_comm.h"
37
38void (*msm_hw_reset_hook)(void);
39
40#define MODULE_NAME "msm_smd"
41
42enum {
43 MSM_SMD_DEBUG = 1U << 0,
44 MSM_SMSM_DEBUG = 1U << 0,
45};
46
47static int msm_smd_debug_mask;
48
49module_param_named(debug_mask, msm_smd_debug_mask,
50 int, S_IRUGO | S_IWUSR | S_IWGRP);
51
52void *smem_find(unsigned id, unsigned size);
53static void smd_diag(void);
54
55static unsigned last_heap_free = 0xffffffff;
56
57#define MSM_A2M_INT(n) (MSM_CSR_BASE + 0x400 + (n) * 4)
58
59static inline void notify_other_smsm(void)
60{
61 writel(1, MSM_A2M_INT(5));
62}
63
64static inline void notify_other_smd(void)
65{
66 writel(1, MSM_A2M_INT(0));
67}
68
69static void smd_diag(void)
70{
71 char *x;
72
73 x = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG);
74 if (x != 0) {
75 x[SZ_DIAG_ERR_MSG - 1] = 0;
76 pr_info("smem: DIAG '%s'\n", x);
77 }
78}
79
80/* call when SMSM_RESET flag is set in the A9's smsm_state */
81static void handle_modem_crash(void)
82{
83 pr_err("ARM9 has CRASHED\n");
84 smd_diag();
85
86 /* hard reboot if possible */
87 if (msm_hw_reset_hook)
88 msm_hw_reset_hook();
89
90 /* in this case the modem or watchdog should reboot us */
91 for (;;)
92 ;
93}
94
95extern int (*msm_check_for_modem_crash)(void);
96
97static int check_for_modem_crash(void)
98{
99 struct smsm_shared *smsm;
100
101 smsm = smem_find(ID_SHARED_STATE, 2 * sizeof(struct smsm_shared));
102
103 /* if the modem's not ready yet, we have to hope for the best */
104 if (!smsm)
105 return 0;
106
107 if (smsm[1].state & SMSM_RESET) {
108 handle_modem_crash();
109 return -1;
110 } else {
111 return 0;
112 }
113}
114
115#define SMD_SS_CLOSED 0x00000000
116#define SMD_SS_OPENING 0x00000001
117#define SMD_SS_OPENED 0x00000002
118#define SMD_SS_FLUSHING 0x00000003
119#define SMD_SS_CLOSING 0x00000004
120#define SMD_SS_RESET 0x00000005
121#define SMD_SS_RESET_OPENING 0x00000006
122
123#define SMD_BUF_SIZE 8192
124#define SMD_CHANNELS 64
125
126#define SMD_HEADER_SIZE 20
127
128
129/* the spinlock is used to synchronize between the
130** irq handler and code that mutates the channel
131** list or fiddles with channel state
132*/
133static DEFINE_SPINLOCK(smd_lock);
134static DEFINE_SPINLOCK(smem_lock);
135
136/* the mutex is used during open() and close()
137** operations to avoid races while creating or
138** destroying smd_channel structures
139*/
140static DEFINE_MUTEX(smd_creation_mutex);
141
142static int smd_initialized;
143
144struct smd_alloc_elm {
145 char name[20];
146 uint32_t cid;
147 uint32_t ctype;
148 uint32_t ref_count;
149};
150
151struct smd_half_channel {
152 unsigned state;
153 unsigned char fDSR;
154 unsigned char fCTS;
155 unsigned char fCD;
156 unsigned char fRI;
157 unsigned char fHEAD;
158 unsigned char fTAIL;
159 unsigned char fSTATE;
160 unsigned char fUNUSED;
161 unsigned tail;
162 unsigned head;
163 unsigned char data[SMD_BUF_SIZE];
164};
165
166struct smd_shared {
167 struct smd_half_channel ch0;
168 struct smd_half_channel ch1;
169};
170
171struct smd_channel {
172 volatile struct smd_half_channel *send;
173 volatile struct smd_half_channel *recv;
174 struct list_head ch_list;
175
176 unsigned current_packet;
177 unsigned n;
178 void *priv;
179 void (*notify)(void *priv, unsigned flags);
180
181 int (*read)(smd_channel_t *ch, void *data, int len);
182 int (*write)(smd_channel_t *ch, const void *data, int len);
183 int (*read_avail)(smd_channel_t *ch);
184 int (*write_avail)(smd_channel_t *ch);
185
186 void (*update_state)(smd_channel_t *ch);
187 unsigned last_state;
188
189 char name[32];
190 struct platform_device pdev;
191};
192
193static LIST_HEAD(smd_ch_closed_list);
194static LIST_HEAD(smd_ch_list);
195
196static unsigned char smd_ch_allocated[64];
197static struct work_struct probe_work;
198
199static void smd_alloc_channel(const char *name, uint32_t cid, uint32_t type);
200
201static void smd_channel_probe_worker(struct work_struct *work)
202{
203 struct smd_alloc_elm *shared;
204 unsigned n;
205
206 shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64);
207
208 for (n = 0; n < 64; n++) {
209 if (smd_ch_allocated[n])
210 continue;
211 if (!shared[n].ref_count)
212 continue;
213 if (!shared[n].name[0])
214 continue;
215 smd_alloc_channel(shared[n].name,
216 shared[n].cid,
217 shared[n].ctype);
218 smd_ch_allocated[n] = 1;
219 }
220}
221
222static char *chstate(unsigned n)
223{
224 switch (n) {
225 case SMD_SS_CLOSED:
226 return "CLOSED";
227 case SMD_SS_OPENING:
228 return "OPENING";
229 case SMD_SS_OPENED:
230 return "OPENED";
231 case SMD_SS_FLUSHING:
232 return "FLUSHING";
233 case SMD_SS_CLOSING:
234 return "CLOSING";
235 case SMD_SS_RESET:
236 return "RESET";
237 case SMD_SS_RESET_OPENING:
238 return "ROPENING";
239 default:
240 return "UNKNOWN";
241 }
242}
243
244/* how many bytes are available for reading */
245static int smd_stream_read_avail(struct smd_channel *ch)
246{
247 return (ch->recv->head - ch->recv->tail) & (SMD_BUF_SIZE - 1);
248}
249
250/* how many bytes we are free to write */
251static int smd_stream_write_avail(struct smd_channel *ch)
252{
253 return (SMD_BUF_SIZE - 1) -
254 ((ch->send->head - ch->send->tail) & (SMD_BUF_SIZE - 1));
255}
256
257static int smd_packet_read_avail(struct smd_channel *ch)
258{
259 if (ch->current_packet) {
260 int n = smd_stream_read_avail(ch);
261 if (n > ch->current_packet)
262 n = ch->current_packet;
263 return n;
264 } else {
265 return 0;
266 }
267}
268
269static int smd_packet_write_avail(struct smd_channel *ch)
270{
271 int n = smd_stream_write_avail(ch);
272 return n > SMD_HEADER_SIZE ? n - SMD_HEADER_SIZE : 0;
273}
274
275static int ch_is_open(struct smd_channel *ch)
276{
277 return (ch->recv->state == SMD_SS_OPENED) &&
278 (ch->send->state == SMD_SS_OPENED);
279}
280
281/* provide a pointer and length to readable data in the fifo */
282static unsigned ch_read_buffer(struct smd_channel *ch, void **ptr)
283{
284 unsigned head = ch->recv->head;
285 unsigned tail = ch->recv->tail;
286 *ptr = (void *) (ch->recv->data + tail);
287
288 if (tail <= head)
289 return head - tail;
290 else
291 return SMD_BUF_SIZE - tail;
292}
293
294/* advance the fifo read pointer after data from ch_read_buffer is consumed */
295static void ch_read_done(struct smd_channel *ch, unsigned count)
296{
297 BUG_ON(count > smd_stream_read_avail(ch));
298 ch->recv->tail = (ch->recv->tail + count) & (SMD_BUF_SIZE - 1);
299 ch->recv->fTAIL = 1;
300}
301
302/* basic read interface to ch_read_{buffer,done} used
303** by smd_*_read() and update_packet_state()
304** will read-and-discard if the _data pointer is null
305*/
306static int ch_read(struct smd_channel *ch, void *_data, int len)
307{
308 void *ptr;
309 unsigned n;
310 unsigned char *data = _data;
311 int orig_len = len;
312
313 while (len > 0) {
314 n = ch_read_buffer(ch, &ptr);
315 if (n == 0)
316 break;
317
318 if (n > len)
319 n = len;
320 if (_data)
321 memcpy(data, ptr, n);
322
323 data += n;
324 len -= n;
325 ch_read_done(ch, n);
326 }
327
328 return orig_len - len;
329}
330
331static void update_stream_state(struct smd_channel *ch)
332{
333 /* streams have no special state requiring updating */
334}
335
336static void update_packet_state(struct smd_channel *ch)
337{
338 unsigned hdr[5];
339 int r;
340
341 /* can't do anything if we're in the middle of a packet */
342 if (ch->current_packet != 0)
343 return;
344
345 /* don't bother unless we can get the full header */
346 if (smd_stream_read_avail(ch) < SMD_HEADER_SIZE)
347 return;
348
349 r = ch_read(ch, hdr, SMD_HEADER_SIZE);
350 BUG_ON(r != SMD_HEADER_SIZE);
351
352 ch->current_packet = hdr[0];
353}
354
355/* provide a pointer and length to next free space in the fifo */
356static unsigned ch_write_buffer(struct smd_channel *ch, void **ptr)
357{
358 unsigned head = ch->send->head;
359 unsigned tail = ch->send->tail;
360 *ptr = (void *) (ch->send->data + head);
361
362 if (head < tail) {
363 return tail - head - 1;
364 } else {
365 if (tail == 0)
366 return SMD_BUF_SIZE - head - 1;
367 else
368 return SMD_BUF_SIZE - head;
369 }
370}
371
372/* advace the fifo write pointer after freespace
373 * from ch_write_buffer is filled
374 */
375static void ch_write_done(struct smd_channel *ch, unsigned count)
376{
377 BUG_ON(count > smd_stream_write_avail(ch));
378 ch->send->head = (ch->send->head + count) & (SMD_BUF_SIZE - 1);
379 ch->send->fHEAD = 1;
380}
381
382static void hc_set_state(volatile struct smd_half_channel *hc, unsigned n)
383{
384 if (n == SMD_SS_OPENED) {
385 hc->fDSR = 1;
386 hc->fCTS = 1;
387 hc->fCD = 1;
388 } else {
389 hc->fDSR = 0;
390 hc->fCTS = 0;
391 hc->fCD = 0;
392 }
393 hc->state = n;
394 hc->fSTATE = 1;
395 notify_other_smd();
396}
397
398static void do_smd_probe(void)
399{
400 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
401 if (shared->heap_info.free_offset != last_heap_free) {
402 last_heap_free = shared->heap_info.free_offset;
403 schedule_work(&probe_work);
404 }
405}
406
407static void smd_state_change(struct smd_channel *ch,
408 unsigned last, unsigned next)
409{
410 ch->last_state = next;
411
412 pr_info("SMD: ch %d %s -> %s\n", ch->n,
413 chstate(last), chstate(next));
414
415 switch (next) {
416 case SMD_SS_OPENING:
417 ch->recv->tail = 0;
418 case SMD_SS_OPENED:
419 if (ch->send->state != SMD_SS_OPENED)
420 hc_set_state(ch->send, SMD_SS_OPENED);
421 ch->notify(ch->priv, SMD_EVENT_OPEN);
422 break;
423 case SMD_SS_FLUSHING:
424 case SMD_SS_RESET:
425 /* we should force them to close? */
426 default:
427 ch->notify(ch->priv, SMD_EVENT_CLOSE);
428 }
429}
430
431static irqreturn_t smd_irq_handler(int irq, void *data)
432{
433 unsigned long flags;
434 struct smd_channel *ch;
435 int do_notify = 0;
436 unsigned ch_flags;
437 unsigned tmp;
438
439 spin_lock_irqsave(&smd_lock, flags);
440 list_for_each_entry(ch, &smd_ch_list, ch_list) {
441 ch_flags = 0;
442 if (ch_is_open(ch)) {
443 if (ch->recv->fHEAD) {
444 ch->recv->fHEAD = 0;
445 ch_flags |= 1;
446 do_notify |= 1;
447 }
448 if (ch->recv->fTAIL) {
449 ch->recv->fTAIL = 0;
450 ch_flags |= 2;
451 do_notify |= 1;
452 }
453 if (ch->recv->fSTATE) {
454 ch->recv->fSTATE = 0;
455 ch_flags |= 4;
456 do_notify |= 1;
457 }
458 }
459 tmp = ch->recv->state;
460 if (tmp != ch->last_state)
461 smd_state_change(ch, ch->last_state, tmp);
462 if (ch_flags) {
463 ch->update_state(ch);
464 ch->notify(ch->priv, SMD_EVENT_DATA);
465 }
466 }
467 if (do_notify)
468 notify_other_smd();
469 spin_unlock_irqrestore(&smd_lock, flags);
470 do_smd_probe();
471 return IRQ_HANDLED;
472}
473
474static void smd_fake_irq_handler(unsigned long arg)
475{
476 smd_irq_handler(0, NULL);
477}
478
479static DECLARE_TASKLET(smd_fake_irq_tasklet, smd_fake_irq_handler, 0);
480
481void smd_sleep_exit(void)
482{
483 unsigned long flags;
484 struct smd_channel *ch;
485 unsigned tmp;
486 int need_int = 0;
487
488 spin_lock_irqsave(&smd_lock, flags);
489 list_for_each_entry(ch, &smd_ch_list, ch_list) {
490 if (ch_is_open(ch)) {
491 if (ch->recv->fHEAD) {
492 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
493 pr_info("smd_sleep_exit ch %d fHEAD "
494 "%x %x %x\n",
495 ch->n, ch->recv->fHEAD,
496 ch->recv->head, ch->recv->tail);
497 need_int = 1;
498 break;
499 }
500 if (ch->recv->fTAIL) {
501 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
502 pr_info("smd_sleep_exit ch %d fTAIL "
503 "%x %x %x\n",
504 ch->n, ch->recv->fTAIL,
505 ch->send->head, ch->send->tail);
506 need_int = 1;
507 break;
508 }
509 if (ch->recv->fSTATE) {
510 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
511 pr_info("smd_sleep_exit ch %d fSTATE %x"
512 "\n", ch->n, ch->recv->fSTATE);
513 need_int = 1;
514 break;
515 }
516 tmp = ch->recv->state;
517 if (tmp != ch->last_state) {
518 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
519 pr_info("smd_sleep_exit ch %d "
520 "state %x != %x\n",
521 ch->n, tmp, ch->last_state);
522 need_int = 1;
523 break;
524 }
525 }
526 }
527 spin_unlock_irqrestore(&smd_lock, flags);
528 do_smd_probe();
529 if (need_int) {
530 if (msm_smd_debug_mask & MSM_SMD_DEBUG)
531 pr_info("smd_sleep_exit need interrupt\n");
532 tasklet_schedule(&smd_fake_irq_tasklet);
533 }
534}
535
536
537void smd_kick(smd_channel_t *ch)
538{
539 unsigned long flags;
540 unsigned tmp;
541
542 spin_lock_irqsave(&smd_lock, flags);
543 ch->update_state(ch);
544 tmp = ch->recv->state;
545 if (tmp != ch->last_state) {
546 ch->last_state = tmp;
547 if (tmp == SMD_SS_OPENED)
548 ch->notify(ch->priv, SMD_EVENT_OPEN);
549 else
550 ch->notify(ch->priv, SMD_EVENT_CLOSE);
551 }
552 ch->notify(ch->priv, SMD_EVENT_DATA);
553 notify_other_smd();
554 spin_unlock_irqrestore(&smd_lock, flags);
555}
556
557static int smd_is_packet(int chn)
558{
559 if ((chn > 4) || (chn == 1))
560 return 1;
561 else
562 return 0;
563}
564
565static int smd_stream_write(smd_channel_t *ch, const void *_data, int len)
566{
567 void *ptr;
568 const unsigned char *buf = _data;
569 unsigned xfer;
570 int orig_len = len;
571
572 if (len < 0)
573 return -EINVAL;
574
575 while ((xfer = ch_write_buffer(ch, &ptr)) != 0) {
576 if (!ch_is_open(ch))
577 break;
578 if (xfer > len)
579 xfer = len;
580 memcpy(ptr, buf, xfer);
581 ch_write_done(ch, xfer);
582 len -= xfer;
583 buf += xfer;
584 if (len == 0)
585 break;
586 }
587
588 notify_other_smd();
589
590 return orig_len - len;
591}
592
593static int smd_packet_write(smd_channel_t *ch, const void *_data, int len)
594{
595 unsigned hdr[5];
596
597 if (len < 0)
598 return -EINVAL;
599
600 if (smd_stream_write_avail(ch) < (len + SMD_HEADER_SIZE))
601 return -ENOMEM;
602
603 hdr[0] = len;
604 hdr[1] = hdr[2] = hdr[3] = hdr[4] = 0;
605
606 smd_stream_write(ch, hdr, sizeof(hdr));
607 smd_stream_write(ch, _data, len);
608
609 return len;
610}
611
612static int smd_stream_read(smd_channel_t *ch, void *data, int len)
613{
614 int r;
615
616 if (len < 0)
617 return -EINVAL;
618
619 r = ch_read(ch, data, len);
620 if (r > 0)
621 notify_other_smd();
622
623 return r;
624}
625
626static int smd_packet_read(smd_channel_t *ch, void *data, int len)
627{
628 unsigned long flags;
629 int r;
630
631 if (len < 0)
632 return -EINVAL;
633
634 if (len > ch->current_packet)
635 len = ch->current_packet;
636
637 r = ch_read(ch, data, len);
638 if (r > 0)
639 notify_other_smd();
640
641 spin_lock_irqsave(&smd_lock, flags);
642 ch->current_packet -= r;
643 update_packet_state(ch);
644 spin_unlock_irqrestore(&smd_lock, flags);
645
646 return r;
647}
648
649static void smd_alloc_channel(const char *name, uint32_t cid, uint32_t type)
650{
651 struct smd_channel *ch;
652 struct smd_shared *shared;
653
654 shared = smem_alloc(ID_SMD_CHANNELS + cid, sizeof(*shared));
655 if (!shared) {
656 pr_err("smd_alloc_channel() cid %d does not exist\n", cid);
657 return;
658 }
659
660 ch = kzalloc(sizeof(struct smd_channel), GFP_KERNEL);
661 if (ch == 0) {
662 pr_err("smd_alloc_channel() out of memory\n");
663 return;
664 }
665
666 ch->send = &shared->ch0;
667 ch->recv = &shared->ch1;
668 ch->n = cid;
669
670 if (smd_is_packet(cid)) {
671 ch->read = smd_packet_read;
672 ch->write = smd_packet_write;
673 ch->read_avail = smd_packet_read_avail;
674 ch->write_avail = smd_packet_write_avail;
675 ch->update_state = update_packet_state;
676 } else {
677 ch->read = smd_stream_read;
678 ch->write = smd_stream_write;
679 ch->read_avail = smd_stream_read_avail;
680 ch->write_avail = smd_stream_write_avail;
681 ch->update_state = update_stream_state;
682 }
683
684 memcpy(ch->name, "SMD_", 4);
685 memcpy(ch->name + 4, name, 20);
686 ch->name[23] = 0;
687 ch->pdev.name = ch->name;
688 ch->pdev.id = -1;
689
690 pr_info("smd_alloc_channel() '%s' cid=%d, shared=%p\n",
691 ch->name, ch->n, shared);
692
693 mutex_lock(&smd_creation_mutex);
694 list_add(&ch->ch_list, &smd_ch_closed_list);
695 mutex_unlock(&smd_creation_mutex);
696
697 platform_device_register(&ch->pdev);
698}
699
700static void do_nothing_notify(void *priv, unsigned flags)
701{
702}
703
704struct smd_channel *smd_get_channel(const char *name)
705{
706 struct smd_channel *ch;
707
708 mutex_lock(&smd_creation_mutex);
709 list_for_each_entry(ch, &smd_ch_closed_list, ch_list) {
710 if (!strcmp(name, ch->name)) {
711 list_del(&ch->ch_list);
712 mutex_unlock(&smd_creation_mutex);
713 return ch;
714 }
715 }
716 mutex_unlock(&smd_creation_mutex);
717
718 return NULL;
719}
720
721int smd_open(const char *name, smd_channel_t **_ch,
722 void *priv, void (*notify)(void *, unsigned))
723{
724 struct smd_channel *ch;
725 unsigned long flags;
726
727 if (smd_initialized == 0) {
728 pr_info("smd_open() before smd_init()\n");
729 return -ENODEV;
730 }
731
732 ch = smd_get_channel(name);
733 if (!ch)
734 return -ENODEV;
735
736 if (notify == 0)
737 notify = do_nothing_notify;
738
739 ch->notify = notify;
740 ch->current_packet = 0;
741 ch->last_state = SMD_SS_CLOSED;
742 ch->priv = priv;
743
744 *_ch = ch;
745
746 spin_lock_irqsave(&smd_lock, flags);
747 list_add(&ch->ch_list, &smd_ch_list);
748
749 /* If the remote side is CLOSING, we need to get it to
750 * move to OPENING (which we'll do by moving from CLOSED to
751 * OPENING) and then get it to move from OPENING to
752 * OPENED (by doing the same state change ourselves).
753 *
754 * Otherwise, it should be OPENING and we can move directly
755 * to OPENED so that it will follow.
756 */
757 if (ch->recv->state == SMD_SS_CLOSING) {
758 ch->send->head = 0;
759 hc_set_state(ch->send, SMD_SS_OPENING);
760 } else {
761 hc_set_state(ch->send, SMD_SS_OPENED);
762 }
763 spin_unlock_irqrestore(&smd_lock, flags);
764 smd_kick(ch);
765
766 return 0;
767}
768
769int smd_close(smd_channel_t *ch)
770{
771 unsigned long flags;
772
773 pr_info("smd_close(%p)\n", ch);
774
775 if (ch == 0)
776 return -1;
777
778 spin_lock_irqsave(&smd_lock, flags);
779 ch->notify = do_nothing_notify;
780 list_del(&ch->ch_list);
781 hc_set_state(ch->send, SMD_SS_CLOSED);
782 spin_unlock_irqrestore(&smd_lock, flags);
783
784 mutex_lock(&smd_creation_mutex);
785 list_add(&ch->ch_list, &smd_ch_closed_list);
786 mutex_unlock(&smd_creation_mutex);
787
788 return 0;
789}
790
791int smd_read(smd_channel_t *ch, void *data, int len)
792{
793 return ch->read(ch, data, len);
794}
795
796int smd_write(smd_channel_t *ch, const void *data, int len)
797{
798 return ch->write(ch, data, len);
799}
800
801int smd_read_avail(smd_channel_t *ch)
802{
803 return ch->read_avail(ch);
804}
805
806int smd_write_avail(smd_channel_t *ch)
807{
808 return ch->write_avail(ch);
809}
810
811int smd_wait_until_readable(smd_channel_t *ch, int bytes)
812{
813 return -1;
814}
815
816int smd_wait_until_writable(smd_channel_t *ch, int bytes)
817{
818 return -1;
819}
820
821int smd_cur_packet_size(smd_channel_t *ch)
822{
823 return ch->current_packet;
824}
825
826
827/* ------------------------------------------------------------------------- */
828
829void *smem_alloc(unsigned id, unsigned size)
830{
831 return smem_find(id, size);
832}
833
834static void *_smem_find(unsigned id, unsigned *size)
835{
836 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
837 struct smem_heap_entry *toc = shared->heap_toc;
838
839 if (id >= SMEM_NUM_ITEMS)
840 return 0;
841
842 if (toc[id].allocated) {
843 *size = toc[id].size;
844 return (void *) (MSM_SHARED_RAM_BASE + toc[id].offset);
845 }
846
847 return 0;
848}
849
850void *smem_find(unsigned id, unsigned size_in)
851{
852 unsigned size;
853 void *ptr;
854
855 ptr = _smem_find(id, &size);
856 if (!ptr)
857 return 0;
858
859 size_in = ALIGN(size_in, 8);
860 if (size_in != size) {
861 pr_err("smem_find(%d, %d): wrong size %d\n",
862 id, size_in, size);
863 return 0;
864 }
865
866 return ptr;
867}
868
869static irqreturn_t smsm_irq_handler(int irq, void *data)
870{
871 unsigned long flags;
872 struct smsm_shared *smsm;
873
874 spin_lock_irqsave(&smem_lock, flags);
875 smsm = smem_alloc(ID_SHARED_STATE,
876 2 * sizeof(struct smsm_shared));
877
878 if (smsm == 0) {
879 pr_info("<SM NO STATE>\n");
880 } else {
881 unsigned apps = smsm[0].state;
882 unsigned modm = smsm[1].state;
883
884 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
885 pr_info("<SM %08x %08x>\n", apps, modm);
886 if (modm & SMSM_RESET) {
887 handle_modem_crash();
888 } else {
889 apps |= SMSM_INIT;
890 if (modm & SMSM_SMDINIT)
891 apps |= SMSM_SMDINIT;
892 if (modm & SMSM_RPCINIT)
893 apps |= SMSM_RPCINIT;
894 }
895
896 if (smsm[0].state != apps) {
897 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
898 pr_info("<SM %08x NOTIFY>\n", apps);
899 smsm[0].state = apps;
900 do_smd_probe();
901 notify_other_smsm();
902 }
903 }
904 spin_unlock_irqrestore(&smem_lock, flags);
905 return IRQ_HANDLED;
906}
907
908int smsm_change_state(uint32_t clear_mask, uint32_t set_mask)
909{
910 unsigned long flags;
911 struct smsm_shared *smsm;
912
913 spin_lock_irqsave(&smem_lock, flags);
914
915 smsm = smem_alloc(ID_SHARED_STATE,
916 2 * sizeof(struct smsm_shared));
917
918 if (smsm) {
919 if (smsm[1].state & SMSM_RESET)
920 handle_modem_crash();
921 smsm[0].state = (smsm[0].state & ~clear_mask) | set_mask;
922 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
923 pr_info("smsm_change_state %x\n",
924 smsm[0].state);
925 notify_other_smsm();
926 }
927
928 spin_unlock_irqrestore(&smem_lock, flags);
929
930 if (smsm == NULL) {
931 pr_err("smsm_change_state <SM NO STATE>\n");
932 return -EIO;
933 }
934 return 0;
935}
936
937uint32_t smsm_get_state(void)
938{
939 unsigned long flags;
940 struct smsm_shared *smsm;
941 uint32_t rv;
942
943 spin_lock_irqsave(&smem_lock, flags);
944
945 smsm = smem_alloc(ID_SHARED_STATE,
946 2 * sizeof(struct smsm_shared));
947
948 if (smsm)
949 rv = smsm[1].state;
950 else
951 rv = 0;
952
953 if (rv & SMSM_RESET)
954 handle_modem_crash();
955
956 spin_unlock_irqrestore(&smem_lock, flags);
957
958 if (smsm == NULL)
959 pr_err("smsm_get_state <SM NO STATE>\n");
960 return rv;
961}
962
963int smsm_set_sleep_duration(uint32_t delay)
964{
965 uint32_t *ptr;
966
967 ptr = smem_alloc(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr));
968 if (ptr == NULL) {
969 pr_err("smsm_set_sleep_duration <SM NO SLEEP_DELAY>\n");
970 return -EIO;
971 }
972 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
973 pr_info("smsm_set_sleep_duration %d -> %d\n",
974 *ptr, delay);
975 *ptr = delay;
976 return 0;
977}
978
979int smsm_set_interrupt_info(struct smsm_interrupt_info *info)
980{
981 struct smsm_interrupt_info *ptr;
982
983 ptr = smem_alloc(SMEM_SMSM_INT_INFO, sizeof(*ptr));
984 if (ptr == NULL) {
985 pr_err("smsm_set_sleep_duration <SM NO INT_INFO>\n");
986 return -EIO;
987 }
988 if (msm_smd_debug_mask & MSM_SMSM_DEBUG)
989 pr_info("smsm_set_interrupt_info %x %x -> %x %x\n",
990 ptr->aArm_en_mask, ptr->aArm_interrupts_pending,
991 info->aArm_en_mask, info->aArm_interrupts_pending);
992 *ptr = *info;
993 return 0;
994}
995
996#define MAX_NUM_SLEEP_CLIENTS 64
997#define MAX_SLEEP_NAME_LEN 8
998
999#define NUM_GPIO_INT_REGISTERS 6
1000#define GPIO_SMEM_NUM_GROUPS 2
1001#define GPIO_SMEM_MAX_PC_INTERRUPTS 8
1002
1003struct tramp_gpio_save {
1004 unsigned int enable;
1005 unsigned int detect;
1006 unsigned int polarity;
1007};
1008
1009struct tramp_gpio_smem {
1010 uint16_t num_fired[GPIO_SMEM_NUM_GROUPS];
1011 uint16_t fired[GPIO_SMEM_NUM_GROUPS][GPIO_SMEM_MAX_PC_INTERRUPTS];
1012 uint32_t enabled[NUM_GPIO_INT_REGISTERS];
1013 uint32_t detection[NUM_GPIO_INT_REGISTERS];
1014 uint32_t polarity[NUM_GPIO_INT_REGISTERS];
1015};
1016
1017
1018void smsm_print_sleep_info(void)
1019{
1020 unsigned long flags;
1021 uint32_t *ptr;
1022 struct tramp_gpio_smem *gpio;
1023 struct smsm_interrupt_info *int_info;
1024
1025
1026 spin_lock_irqsave(&smem_lock, flags);
1027
1028 ptr = smem_alloc(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr));
1029 if (ptr)
1030 pr_info("SMEM_SMSM_SLEEP_DELAY: %x\n", *ptr);
1031
1032 ptr = smem_alloc(SMEM_SMSM_LIMIT_SLEEP, sizeof(*ptr));
1033 if (ptr)
1034 pr_info("SMEM_SMSM_LIMIT_SLEEP: %x\n", *ptr);
1035
1036 ptr = smem_alloc(SMEM_SLEEP_POWER_COLLAPSE_DISABLED, sizeof(*ptr));
1037 if (ptr)
1038 pr_info("SMEM_SLEEP_POWER_COLLAPSE_DISABLED: %x\n", *ptr);
1039
1040 int_info = smem_alloc(SMEM_SMSM_INT_INFO, sizeof(*int_info));
1041 if (int_info)
1042 pr_info("SMEM_SMSM_INT_INFO %x %x %x\n",
1043 int_info->aArm_en_mask,
1044 int_info->aArm_interrupts_pending,
1045 int_info->aArm_wakeup_reason);
1046
1047 gpio = smem_alloc(SMEM_GPIO_INT, sizeof(*gpio));
1048 if (gpio) {
1049 int i;
1050 for (i = 0; i < NUM_GPIO_INT_REGISTERS; i++)
1051 pr_info("SMEM_GPIO_INT: %d: e %x d %x p %x\n",
1052 i, gpio->enabled[i], gpio->detection[i],
1053 gpio->polarity[i]);
1054
1055 for (i = 0; i < GPIO_SMEM_NUM_GROUPS; i++)
1056 pr_info("SMEM_GPIO_INT: %d: f %d: %d %d...\n",
1057 i, gpio->num_fired[i], gpio->fired[i][0],
1058 gpio->fired[i][1]);
1059 }
1060
1061 spin_unlock_irqrestore(&smem_lock, flags);
1062}
1063
1064int smd_core_init(void)
1065{
1066 int r;
1067 pr_info("smd_core_init()\n");
1068
1069 r = request_irq(INT_A9_M2A_0, smd_irq_handler,
1070 IRQF_TRIGGER_RISING, "smd_dev", 0);
1071 if (r < 0)
1072 return r;
1073 r = enable_irq_wake(INT_A9_M2A_0);
1074 if (r < 0)
1075 pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_0\n");
1076
1077 r = request_irq(INT_A9_M2A_5, smsm_irq_handler,
1078 IRQF_TRIGGER_RISING, "smsm_dev", 0);
1079 if (r < 0) {
1080 free_irq(INT_A9_M2A_0, 0);
1081 return r;
1082 }
1083 r = enable_irq_wake(INT_A9_M2A_5);
1084 if (r < 0)
1085 pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_5\n");
1086
1087 /* we may have missed a signal while booting -- fake
1088 * an interrupt to make sure we process any existing
1089 * state
1090 */
1091 smsm_irq_handler(0, 0);
1092
1093 pr_info("smd_core_init() done\n");
1094
1095 return 0;
1096}
1097
1098#if defined(CONFIG_DEBUG_FS)
1099
1100static int dump_ch(char *buf, int max, int n,
1101 struct smd_half_channel *s,
1102 struct smd_half_channel *r)
1103{
1104 return scnprintf(
1105 buf, max,
1106 "ch%02d:"
1107 " %8s(%04d/%04d) %c%c%c%c%c%c%c <->"
1108 " %8s(%04d/%04d) %c%c%c%c%c%c%c\n", n,
1109 chstate(s->state), s->tail, s->head,
1110 s->fDSR ? 'D' : 'd',
1111 s->fCTS ? 'C' : 'c',
1112 s->fCD ? 'C' : 'c',
1113 s->fRI ? 'I' : 'i',
1114 s->fHEAD ? 'W' : 'w',
1115 s->fTAIL ? 'R' : 'r',
1116 s->fSTATE ? 'S' : 's',
1117 chstate(r->state), r->tail, r->head,
1118 r->fDSR ? 'D' : 'd',
1119 r->fCTS ? 'R' : 'r',
1120 r->fCD ? 'C' : 'c',
1121 r->fRI ? 'I' : 'i',
1122 r->fHEAD ? 'W' : 'w',
1123 r->fTAIL ? 'R' : 'r',
1124 r->fSTATE ? 'S' : 's'
1125 );
1126}
1127
1128static int debug_read_stat(char *buf, int max)
1129{
1130 struct smsm_shared *smsm;
1131 char *msg;
1132 int i = 0;
1133
1134 smsm = smem_find(ID_SHARED_STATE,
1135 2 * sizeof(struct smsm_shared));
1136
1137 msg = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG);
1138
1139 if (smsm) {
1140 if (smsm[1].state & SMSM_RESET)
1141 i += scnprintf(buf + i, max - i,
1142 "smsm: ARM9 HAS CRASHED\n");
1143 i += scnprintf(buf + i, max - i, "smsm: a9: %08x a11: %08x\n",
1144 smsm[0].state, smsm[1].state);
1145 } else {
1146 i += scnprintf(buf + i, max - i, "smsm: cannot find\n");
1147 }
1148 if (msg) {
1149 msg[SZ_DIAG_ERR_MSG - 1] = 0;
1150 i += scnprintf(buf + i, max - i, "diag: '%s'\n", msg);
1151 }
1152 return i;
1153}
1154
1155static int debug_read_mem(char *buf, int max)
1156{
1157 unsigned n;
1158 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
1159 struct smem_heap_entry *toc = shared->heap_toc;
1160 int i = 0;
1161
1162 i += scnprintf(buf + i, max - i,
1163 "heap: init=%d free=%d remain=%d\n",
1164 shared->heap_info.initialized,
1165 shared->heap_info.free_offset,
1166 shared->heap_info.heap_remaining);
1167
1168 for (n = 0; n < SMEM_NUM_ITEMS; n++) {
1169 if (toc[n].allocated == 0)
1170 continue;
1171 i += scnprintf(buf + i, max - i,
1172 "%04d: offsed %08x size %08x\n",
1173 n, toc[n].offset, toc[n].size);
1174 }
1175 return i;
1176}
1177
1178static int debug_read_ch(char *buf, int max)
1179{
1180 struct smd_shared *shared;
1181 int n, i = 0;
1182
1183 for (n = 0; n < SMD_CHANNELS; n++) {
1184 shared = smem_find(ID_SMD_CHANNELS + n,
1185 sizeof(struct smd_shared));
1186 if (shared == 0)
1187 continue;
1188 i += dump_ch(buf + i, max - i, n, &shared->ch0, &shared->ch1);
1189 }
1190
1191 return i;
1192}
1193
1194static int debug_read_version(char *buf, int max)
1195{
1196 struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
1197 unsigned version = shared->version[VERSION_MODEM];
1198 return sprintf(buf, "%d.%d\n", version >> 16, version & 0xffff);
1199}
1200
1201static int debug_read_build_id(char *buf, int max)
1202{
1203 unsigned size;
1204 void *data;
1205
1206 data = _smem_find(SMEM_HW_SW_BUILD_ID, &size);
1207 if (!data)
1208 return 0;
1209
1210 if (size >= max)
1211 size = max;
1212 memcpy(buf, data, size);
1213
1214 return size;
1215}
1216
1217static int debug_read_alloc_tbl(char *buf, int max)
1218{
1219 struct smd_alloc_elm *shared;
1220 int n, i = 0;
1221
1222 shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64);
1223
1224 for (n = 0; n < 64; n++) {
1225 if (shared[n].ref_count == 0)
1226 continue;
1227 i += scnprintf(buf + i, max - i,
1228 "%03d: %20s cid=%02d ctype=%d ref_count=%d\n",
1229 n, shared[n].name, shared[n].cid,
1230 shared[n].ctype, shared[n].ref_count);
1231 }
1232
1233 return i;
1234}
1235
1236static int debug_boom(char *buf, int max)
1237{
1238 unsigned ms = 5000;
1239 msm_proc_comm(PCOM_RESET_MODEM, &ms, 0);
1240 return 0;
1241}
1242
1243#define DEBUG_BUFMAX 4096
1244static char debug_buffer[DEBUG_BUFMAX];
1245
1246static ssize_t debug_read(struct file *file, char __user *buf,
1247 size_t count, loff_t *ppos)
1248{
1249 int (*fill)(char *buf, int max) = file->private_data;
1250 int bsize = fill(debug_buffer, DEBUG_BUFMAX);
1251 return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize);
1252}
1253
1254static int debug_open(struct inode *inode, struct file *file)
1255{
1256 file->private_data = inode->i_private;
1257 return 0;
1258}
1259
1260static const struct file_operations debug_ops = {
1261 .read = debug_read,
1262 .open = debug_open,
1263};
1264
1265static void debug_create(const char *name, mode_t mode,
1266 struct dentry *dent,
1267 int (*fill)(char *buf, int max))
1268{
1269 debugfs_create_file(name, mode, dent, fill, &debug_ops);
1270}
1271
1272static void smd_debugfs_init(void)
1273{
1274 struct dentry *dent;
1275
1276 dent = debugfs_create_dir("smd", 0);
1277 if (IS_ERR(dent))
1278 return;
1279
1280 debug_create("ch", 0444, dent, debug_read_ch);
1281 debug_create("stat", 0444, dent, debug_read_stat);
1282 debug_create("mem", 0444, dent, debug_read_mem);
1283 debug_create("version", 0444, dent, debug_read_version);
1284 debug_create("tbl", 0444, dent, debug_read_alloc_tbl);
1285 debug_create("build", 0444, dent, debug_read_build_id);
1286 debug_create("boom", 0444, dent, debug_boom);
1287}
1288#else
1289static void smd_debugfs_init(void) {}
1290#endif
1291
1292static int __init msm_smd_probe(struct platform_device *pdev)
1293{
1294 pr_info("smd_init()\n");
1295
1296 INIT_WORK(&probe_work, smd_channel_probe_worker);
1297
1298 if (smd_core_init()) {
1299 pr_err("smd_core_init() failed\n");
1300 return -1;
1301 }
1302
1303 do_smd_probe();
1304
1305 msm_check_for_modem_crash = check_for_modem_crash;
1306
1307 smd_debugfs_init();
1308 smd_initialized = 1;
1309
1310 return 0;
1311}
1312
1313static struct platform_driver msm_smd_driver = {
1314 .probe = msm_smd_probe,
1315 .driver = {
1316 .name = MODULE_NAME,
1317 .owner = THIS_MODULE,
1318 },
1319};
1320
1321static int __init msm_smd_init(void)
1322{
1323 return platform_driver_register(&msm_smd_driver);
1324}
1325
1326module_init(msm_smd_init);
1327
1328MODULE_DESCRIPTION("MSM Shared Memory Core");
1329MODULE_AUTHOR("Brian Swetland <swetland@google.com>");
1330MODULE_LICENSE("GPL");
diff --git a/drivers/staging/dream/smd/smd_private.h b/drivers/staging/dream/smd/smd_private.h
deleted file mode 100644
index c0eb3de1be54..000000000000
--- a/drivers/staging/dream/smd/smd_private.h
+++ /dev/null
@@ -1,171 +0,0 @@
1/* arch/arm/mach-msm/smd_private.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
17#define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
18
19struct smem_heap_info
20{
21 unsigned initialized;
22 unsigned free_offset;
23 unsigned heap_remaining;
24 unsigned reserved;
25};
26
27struct smem_heap_entry
28{
29 unsigned allocated;
30 unsigned offset;
31 unsigned size;
32 unsigned reserved;
33};
34
35struct smem_proc_comm
36{
37 unsigned command;
38 unsigned status;
39 unsigned data1;
40 unsigned data2;
41};
42
43#define PC_APPS 0
44#define PC_MODEM 1
45
46#define VERSION_QDSP6 4
47#define VERSION_APPS_SBL 6
48#define VERSION_MODEM_SBL 7
49#define VERSION_APPS 8
50#define VERSION_MODEM 9
51
52struct smem_shared
53{
54 struct smem_proc_comm proc_comm[4];
55 unsigned version[32];
56 struct smem_heap_info heap_info;
57 struct smem_heap_entry heap_toc[128];
58};
59
60struct smsm_shared
61{
62 unsigned host;
63 unsigned state;
64};
65
66struct smsm_interrupt_info
67{
68 uint32_t aArm_en_mask;
69 uint32_t aArm_interrupts_pending;
70 uint32_t aArm_wakeup_reason;
71};
72
73#define SZ_DIAG_ERR_MSG 0xC8
74#define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE
75#define ID_SMD_CHANNELS SMEM_SMD_BASE_ID
76#define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE
77#define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL
78
79#define SMSM_INIT 0x000001
80#define SMSM_SMDINIT 0x000008
81#define SMSM_RPCINIT 0x000020
82#define SMSM_RESET 0x000040
83#define SMSM_RSA 0x0080
84#define SMSM_RUN 0x000100
85#define SMSM_PWRC 0x0200
86#define SMSM_TIMEWAIT 0x0400
87#define SMSM_TIMEINIT 0x0800
88#define SMSM_PWRC_EARLY_EXIT 0x1000
89#define SMSM_WFPI 0x2000
90#define SMSM_SLEEP 0x4000
91#define SMSM_SLEEPEXIT 0x8000
92#define SMSM_OEMSBL_RELEASE 0x10000
93#define SMSM_PWRC_SUSPEND 0x200000
94
95#define SMSM_WKUP_REASON_RPC 0x00000001
96#define SMSM_WKUP_REASON_INT 0x00000002
97#define SMSM_WKUP_REASON_GPIO 0x00000004
98#define SMSM_WKUP_REASON_TIMER 0x00000008
99#define SMSM_WKUP_REASON_ALARM 0x00000010
100#define SMSM_WKUP_REASON_RESET 0x00000020
101
102void *smem_alloc(unsigned id, unsigned size);
103int smsm_change_state(uint32_t clear_mask, uint32_t set_mask);
104uint32_t smsm_get_state(void);
105int smsm_set_sleep_duration(uint32_t delay);
106int smsm_set_interrupt_info(struct smsm_interrupt_info *info);
107void smsm_print_sleep_info(void);
108
109#define SMEM_NUM_SMD_CHANNELS 64
110
111typedef enum
112{
113 /* fixed items */
114 SMEM_PROC_COMM = 0,
115 SMEM_HEAP_INFO,
116 SMEM_ALLOCATION_TABLE,
117 SMEM_VERSION_INFO,
118 SMEM_HW_RESET_DETECT,
119 SMEM_AARM_WARM_BOOT,
120 SMEM_DIAG_ERR_MESSAGE,
121 SMEM_SPINLOCK_ARRAY,
122 SMEM_MEMORY_BARRIER_LOCATION,
123
124 /* dynamic items */
125 SMEM_AARM_PARTITION_TABLE,
126 SMEM_AARM_BAD_BLOCK_TABLE,
127 SMEM_RESERVE_BAD_BLOCKS,
128 SMEM_WM_UUID,
129 SMEM_CHANNEL_ALLOC_TBL,
130 SMEM_SMD_BASE_ID,
131 SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS,
132 SMEM_SMEM_LOG_EVENTS,
133 SMEM_SMEM_STATIC_LOG_IDX,
134 SMEM_SMEM_STATIC_LOG_EVENTS,
135 SMEM_SMEM_SLOW_CLOCK_SYNC,
136 SMEM_SMEM_SLOW_CLOCK_VALUE,
137 SMEM_BIO_LED_BUF,
138 SMEM_SMSM_SHARED_STATE,
139 SMEM_SMSM_INT_INFO,
140 SMEM_SMSM_SLEEP_DELAY,
141 SMEM_SMSM_LIMIT_SLEEP,
142 SMEM_SLEEP_POWER_COLLAPSE_DISABLED,
143 SMEM_KEYPAD_KEYS_PRESSED,
144 SMEM_KEYPAD_STATE_UPDATED,
145 SMEM_KEYPAD_STATE_IDX,
146 SMEM_GPIO_INT,
147 SMEM_MDDI_LCD_IDX,
148 SMEM_MDDI_HOST_DRIVER_STATE,
149 SMEM_MDDI_LCD_DISP_STATE,
150 SMEM_LCD_CUR_PANEL,
151 SMEM_MARM_BOOT_SEGMENT_INFO,
152 SMEM_AARM_BOOT_SEGMENT_INFO,
153 SMEM_SLEEP_STATIC,
154 SMEM_SCORPION_FREQUENCY,
155 SMEM_SMD_PROFILES,
156 SMEM_TSSC_BUSY,
157 SMEM_HS_SUSPEND_FILTER_INFO,
158 SMEM_BATT_INFO,
159 SMEM_APPS_BOOT_MODE,
160 SMEM_VERSION_FIRST,
161 SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24,
162 SMEM_OSS_RRCASN1_BUF1,
163 SMEM_OSS_RRCASN1_BUF2,
164 SMEM_ID_VENDOR0,
165 SMEM_ID_VENDOR1,
166 SMEM_ID_VENDOR2,
167 SMEM_HW_SW_BUILD_ID,
168 SMEM_NUM_ITEMS,
169} smem_mem_type;
170
171#endif
diff --git a/drivers/staging/dream/smd/smd_qmi.c b/drivers/staging/dream/smd/smd_qmi.c
deleted file mode 100644
index 687db142904c..000000000000
--- a/drivers/staging/dream/smd/smd_qmi.c
+++ /dev/null
@@ -1,855 +0,0 @@
1/* arch/arm/mach-msm/smd_qmi.c
2 *
3 * QMI Control Driver -- Manages network data connections.
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Author: Brian Swetland <swetland@google.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/module.h>
20#include <linux/fs.h>
21#include <linux/cdev.h>
22#include <linux/device.h>
23#include <linux/sched.h>
24#include <linux/wait.h>
25#include <linux/miscdevice.h>
26#include <linux/workqueue.h>
27
28#include <asm/uaccess.h>
29#include <mach/msm_smd.h>
30
31#define QMI_CTL 0x00
32#define QMI_WDS 0x01
33#define QMI_DMS 0x02
34#define QMI_NAS 0x03
35
36#define QMI_RESULT_SUCCESS 0x0000
37#define QMI_RESULT_FAILURE 0x0001
38
39struct qmi_msg {
40 unsigned char service;
41 unsigned char client_id;
42 unsigned short txn_id;
43 unsigned short type;
44 unsigned short size;
45 unsigned char *tlv;
46};
47
48#define qmi_ctl_client_id 0
49
50#define STATE_OFFLINE 0
51#define STATE_QUERYING 1
52#define STATE_ONLINE 2
53
54struct qmi_ctxt {
55 struct miscdevice misc;
56
57 struct mutex lock;
58
59 unsigned char ctl_txn_id;
60 unsigned char wds_client_id;
61 unsigned short wds_txn_id;
62
63 unsigned wds_busy;
64 unsigned wds_handle;
65 unsigned state_dirty;
66 unsigned state;
67
68 unsigned char addr[4];
69 unsigned char mask[4];
70 unsigned char gateway[4];
71 unsigned char dns1[4];
72 unsigned char dns2[4];
73
74 smd_channel_t *ch;
75 const char *ch_name;
76
77 struct work_struct open_work;
78 struct work_struct read_work;
79};
80
81static struct qmi_ctxt *qmi_minor_to_ctxt(unsigned n);
82
83static void qmi_read_work(struct work_struct *ws);
84static void qmi_open_work(struct work_struct *work);
85
86void qmi_ctxt_init(struct qmi_ctxt *ctxt, unsigned n)
87{
88 mutex_init(&ctxt->lock);
89 INIT_WORK(&ctxt->read_work, qmi_read_work);
90 INIT_WORK(&ctxt->open_work, qmi_open_work);
91 ctxt->ctl_txn_id = 1;
92 ctxt->wds_txn_id = 1;
93 ctxt->wds_busy = 1;
94 ctxt->state = STATE_OFFLINE;
95
96}
97
98static struct workqueue_struct *qmi_wq;
99
100static int verbose = 0;
101
102/* anyone waiting for a state change waits here */
103static DECLARE_WAIT_QUEUE_HEAD(qmi_wait_queue);
104
105
106static void qmi_dump_msg(struct qmi_msg *msg, const char *prefix)
107{
108 unsigned sz, n;
109 unsigned char *x;
110
111 if (!verbose)
112 return;
113
114 printk(KERN_INFO
115 "qmi: %s: svc=%02x cid=%02x tid=%04x type=%04x size=%04x\n",
116 prefix, msg->service, msg->client_id,
117 msg->txn_id, msg->type, msg->size);
118
119 x = msg->tlv;
120 sz = msg->size;
121
122 while (sz >= 3) {
123 sz -= 3;
124
125 n = x[1] | (x[2] << 8);
126 if (n > sz)
127 break;
128
129 printk(KERN_INFO "qmi: %s: tlv: %02x %04x { ",
130 prefix, x[0], n);
131 x += 3;
132 sz -= n;
133 while (n-- > 0)
134 printk("%02x ", *x++);
135 printk("}\n");
136 }
137}
138
139int qmi_add_tlv(struct qmi_msg *msg,
140 unsigned type, unsigned size, const void *data)
141{
142 unsigned char *x = msg->tlv + msg->size;
143
144 x[0] = type;
145 x[1] = size;
146 x[2] = size >> 8;
147
148 memcpy(x + 3, data, size);
149
150 msg->size += (size + 3);
151
152 return 0;
153}
154
155/* Extract a tagged item from a qmi message buffer,
156** taking care not to overrun the buffer.
157*/
158static int qmi_get_tlv(struct qmi_msg *msg,
159 unsigned type, unsigned size, void *data)
160{
161 unsigned char *x = msg->tlv;
162 unsigned len = msg->size;
163 unsigned n;
164
165 while (len >= 3) {
166 len -= 3;
167
168 /* size of this item */
169 n = x[1] | (x[2] << 8);
170 if (n > len)
171 break;
172
173 if (x[0] == type) {
174 if (n != size)
175 return -1;
176 memcpy(data, x + 3, size);
177 return 0;
178 }
179
180 x += (n + 3);
181 len -= n;
182 }
183
184 return -1;
185}
186
187static unsigned qmi_get_status(struct qmi_msg *msg, unsigned *error)
188{
189 unsigned short status[2];
190 if (qmi_get_tlv(msg, 0x02, sizeof(status), status)) {
191 *error = 0;
192 return QMI_RESULT_FAILURE;
193 } else {
194 *error = status[1];
195 return status[0];
196 }
197}
198
199/* 0x01 <qmux-header> <payload> */
200#define QMUX_HEADER 13
201
202/* should be >= HEADER + FOOTER */
203#define QMUX_OVERHEAD 16
204
205static int qmi_send(struct qmi_ctxt *ctxt, struct qmi_msg *msg)
206{
207 unsigned char *data;
208 unsigned hlen;
209 unsigned len;
210 int r;
211
212 qmi_dump_msg(msg, "send");
213
214 if (msg->service == QMI_CTL) {
215 hlen = QMUX_HEADER - 1;
216 } else {
217 hlen = QMUX_HEADER;
218 }
219
220 /* QMUX length is total header + total payload - IFC selector */
221 len = hlen + msg->size - 1;
222 if (len > 0xffff)
223 return -1;
224
225 data = msg->tlv - hlen;
226
227 /* prepend encap and qmux header */
228 *data++ = 0x01; /* ifc selector */
229
230 /* qmux header */
231 *data++ = len;
232 *data++ = len >> 8;
233 *data++ = 0x00; /* flags: client */
234 *data++ = msg->service;
235 *data++ = msg->client_id;
236
237 /* qmi header */
238 *data++ = 0x00; /* flags: send */
239 *data++ = msg->txn_id;
240 if (msg->service != QMI_CTL)
241 *data++ = msg->txn_id >> 8;
242
243 *data++ = msg->type;
244 *data++ = msg->type >> 8;
245 *data++ = msg->size;
246 *data++ = msg->size >> 8;
247
248 /* len + 1 takes the interface selector into account */
249 r = smd_write(ctxt->ch, msg->tlv - hlen, len + 1);
250
251 if (r != len) {
252 return -1;
253 } else {
254 return 0;
255 }
256}
257
258static void qmi_process_ctl_msg(struct qmi_ctxt *ctxt, struct qmi_msg *msg)
259{
260 unsigned err;
261 if (msg->type == 0x0022) {
262 unsigned char n[2];
263 if (qmi_get_status(msg, &err))
264 return;
265 if (qmi_get_tlv(msg, 0x01, sizeof(n), n))
266 return;
267 if (n[0] == QMI_WDS) {
268 printk(KERN_INFO
269 "qmi: ctl: wds use client_id 0x%02x\n", n[1]);
270 ctxt->wds_client_id = n[1];
271 ctxt->wds_busy = 0;
272 }
273 }
274}
275
276static int qmi_network_get_profile(struct qmi_ctxt *ctxt);
277
278static void swapaddr(unsigned char *src, unsigned char *dst)
279{
280 dst[0] = src[3];
281 dst[1] = src[2];
282 dst[2] = src[1];
283 dst[3] = src[0];
284}
285
286static unsigned char zero[4];
287static void qmi_read_runtime_profile(struct qmi_ctxt *ctxt, struct qmi_msg *msg)
288{
289 unsigned char tmp[4];
290 unsigned r;
291
292 r = qmi_get_tlv(msg, 0x1e, 4, tmp);
293 swapaddr(r ? zero : tmp, ctxt->addr);
294 r = qmi_get_tlv(msg, 0x21, 4, tmp);
295 swapaddr(r ? zero : tmp, ctxt->mask);
296 r = qmi_get_tlv(msg, 0x20, 4, tmp);
297 swapaddr(r ? zero : tmp, ctxt->gateway);
298 r = qmi_get_tlv(msg, 0x15, 4, tmp);
299 swapaddr(r ? zero : tmp, ctxt->dns1);
300 r = qmi_get_tlv(msg, 0x16, 4, tmp);
301 swapaddr(r ? zero : tmp, ctxt->dns2);
302}
303
304static void qmi_process_unicast_wds_msg(struct qmi_ctxt *ctxt,
305 struct qmi_msg *msg)
306{
307 unsigned err;
308 switch (msg->type) {
309 case 0x0021:
310 if (qmi_get_status(msg, &err)) {
311 printk(KERN_ERR
312 "qmi: wds: network stop failed (%04x)\n", err);
313 } else {
314 printk(KERN_INFO
315 "qmi: wds: network stopped\n");
316 ctxt->state = STATE_OFFLINE;
317 ctxt->state_dirty = 1;
318 }
319 break;
320 case 0x0020:
321 if (qmi_get_status(msg, &err)) {
322 printk(KERN_ERR
323 "qmi: wds: network start failed (%04x)\n", err);
324 } else if (qmi_get_tlv(msg, 0x01, sizeof(ctxt->wds_handle), &ctxt->wds_handle)) {
325 printk(KERN_INFO
326 "qmi: wds no handle?\n");
327 } else {
328 printk(KERN_INFO
329 "qmi: wds: got handle 0x%08x\n",
330 ctxt->wds_handle);
331 }
332 break;
333 case 0x002D:
334 printk("qmi: got network profile\n");
335 if (ctxt->state == STATE_QUERYING) {
336 qmi_read_runtime_profile(ctxt, msg);
337 ctxt->state = STATE_ONLINE;
338 ctxt->state_dirty = 1;
339 }
340 break;
341 default:
342 printk(KERN_ERR "qmi: unknown msg type 0x%04x\n", msg->type);
343 }
344 ctxt->wds_busy = 0;
345}
346
347static void qmi_process_broadcast_wds_msg(struct qmi_ctxt *ctxt,
348 struct qmi_msg *msg)
349{
350 if (msg->type == 0x0022) {
351 unsigned char n[2];
352 if (qmi_get_tlv(msg, 0x01, sizeof(n), n))
353 return;
354 switch (n[0]) {
355 case 1:
356 printk(KERN_INFO "qmi: wds: DISCONNECTED\n");
357 ctxt->state = STATE_OFFLINE;
358 ctxt->state_dirty = 1;
359 break;
360 case 2:
361 printk(KERN_INFO "qmi: wds: CONNECTED\n");
362 ctxt->state = STATE_QUERYING;
363 ctxt->state_dirty = 1;
364 qmi_network_get_profile(ctxt);
365 break;
366 case 3:
367 printk(KERN_INFO "qmi: wds: SUSPENDED\n");
368 ctxt->state = STATE_OFFLINE;
369 ctxt->state_dirty = 1;
370 }
371 } else {
372 printk(KERN_ERR "qmi: unknown bcast msg type 0x%04x\n", msg->type);
373 }
374}
375
376static void qmi_process_wds_msg(struct qmi_ctxt *ctxt,
377 struct qmi_msg *msg)
378{
379 printk("wds: %04x @ %02x\n", msg->type, msg->client_id);
380 if (msg->client_id == ctxt->wds_client_id) {
381 qmi_process_unicast_wds_msg(ctxt, msg);
382 } else if (msg->client_id == 0xff) {
383 qmi_process_broadcast_wds_msg(ctxt, msg);
384 } else {
385 printk(KERN_ERR
386 "qmi_process_wds_msg client id 0x%02x unknown\n",
387 msg->client_id);
388 }
389}
390
391static void qmi_process_qmux(struct qmi_ctxt *ctxt,
392 unsigned char *buf, unsigned sz)
393{
394 struct qmi_msg msg;
395
396 /* require a full header */
397 if (sz < 5)
398 return;
399
400 /* require a size that matches the buffer size */
401 if (sz != (buf[0] | (buf[1] << 8)))
402 return;
403
404 /* only messages from a service (bit7=1) are allowed */
405 if (buf[2] != 0x80)
406 return;
407
408 msg.service = buf[3];
409 msg.client_id = buf[4];
410
411 /* annoyingly, CTL messages have a shorter TID */
412 if (buf[3] == 0) {
413 if (sz < 7)
414 return;
415 msg.txn_id = buf[6];
416 buf += 7;
417 sz -= 7;
418 } else {
419 if (sz < 8)
420 return;
421 msg.txn_id = buf[6] | (buf[7] << 8);
422 buf += 8;
423 sz -= 8;
424 }
425
426 /* no type and size!? */
427 if (sz < 4)
428 return;
429 sz -= 4;
430
431 msg.type = buf[0] | (buf[1] << 8);
432 msg.size = buf[2] | (buf[3] << 8);
433 msg.tlv = buf + 4;
434
435 if (sz != msg.size)
436 return;
437
438 qmi_dump_msg(&msg, "recv");
439
440 mutex_lock(&ctxt->lock);
441 switch (msg.service) {
442 case QMI_CTL:
443 qmi_process_ctl_msg(ctxt, &msg);
444 break;
445 case QMI_WDS:
446 qmi_process_wds_msg(ctxt, &msg);
447 break;
448 default:
449 printk(KERN_ERR "qmi: msg from unknown svc 0x%02x\n",
450 msg.service);
451 break;
452 }
453 mutex_unlock(&ctxt->lock);
454 wake_up(&qmi_wait_queue);
455}
456
457#define QMI_MAX_PACKET (256 + QMUX_OVERHEAD)
458
459static void qmi_read_work(struct work_struct *ws)
460{
461 struct qmi_ctxt *ctxt = container_of(ws, struct qmi_ctxt, read_work);
462 struct smd_channel *ch = ctxt->ch;
463 unsigned char buf[QMI_MAX_PACKET];
464 int sz;
465
466 for (;;) {
467 sz = smd_cur_packet_size(ch);
468 if (sz == 0)
469 break;
470 if (sz < smd_read_avail(ch))
471 break;
472 if (sz > QMI_MAX_PACKET) {
473 smd_read(ch, 0, sz);
474 continue;
475 }
476 if (smd_read(ch, buf, sz) != sz) {
477 printk(KERN_ERR "qmi: not enough data?!\n");
478 continue;
479 }
480
481 /* interface selector must be 1 */
482 if (buf[0] != 0x01)
483 continue;
484
485 qmi_process_qmux(ctxt, buf + 1, sz - 1);
486 }
487}
488
489static int qmi_request_wds_cid(struct qmi_ctxt *ctxt);
490
491static void qmi_open_work(struct work_struct *ws)
492{
493 struct qmi_ctxt *ctxt = container_of(ws, struct qmi_ctxt, open_work);
494 mutex_lock(&ctxt->lock);
495 qmi_request_wds_cid(ctxt);
496 mutex_unlock(&ctxt->lock);
497}
498
499static void qmi_notify(void *priv, unsigned event)
500{
501 struct qmi_ctxt *ctxt = priv;
502
503 switch (event) {
504 case SMD_EVENT_DATA: {
505 int sz;
506 sz = smd_cur_packet_size(ctxt->ch);
507 if ((sz > 0) && (sz <= smd_read_avail(ctxt->ch))) {
508 queue_work(qmi_wq, &ctxt->read_work);
509 }
510 break;
511 }
512 case SMD_EVENT_OPEN:
513 printk(KERN_INFO "qmi: smd opened\n");
514 queue_work(qmi_wq, &ctxt->open_work);
515 break;
516 case SMD_EVENT_CLOSE:
517 printk(KERN_INFO "qmi: smd closed\n");
518 break;
519 }
520}
521
522static int qmi_request_wds_cid(struct qmi_ctxt *ctxt)
523{
524 unsigned char data[64 + QMUX_OVERHEAD];
525 struct qmi_msg msg;
526 unsigned char n;
527
528 msg.service = QMI_CTL;
529 msg.client_id = qmi_ctl_client_id;
530 msg.txn_id = ctxt->ctl_txn_id;
531 msg.type = 0x0022;
532 msg.size = 0;
533 msg.tlv = data + QMUX_HEADER;
534
535 ctxt->ctl_txn_id += 2;
536
537 n = QMI_WDS;
538 qmi_add_tlv(&msg, 0x01, 0x01, &n);
539
540 return qmi_send(ctxt, &msg);
541}
542
543static int qmi_network_get_profile(struct qmi_ctxt *ctxt)
544{
545 unsigned char data[96 + QMUX_OVERHEAD];
546 struct qmi_msg msg;
547
548 msg.service = QMI_WDS;
549 msg.client_id = ctxt->wds_client_id;
550 msg.txn_id = ctxt->wds_txn_id;
551 msg.type = 0x002D;
552 msg.size = 0;
553 msg.tlv = data + QMUX_HEADER;
554
555 ctxt->wds_txn_id += 2;
556
557 return qmi_send(ctxt, &msg);
558}
559
560static int qmi_network_up(struct qmi_ctxt *ctxt, char *apn)
561{
562 unsigned char data[96 + QMUX_OVERHEAD];
563 struct qmi_msg msg;
564 char *auth_type;
565 char *user;
566 char *pass;
567
568 for (user = apn; *user; user++) {
569 if (*user == ' ') {
570 *user++ = 0;
571 break;
572 }
573 }
574 for (pass = user; *pass; pass++) {
575 if (*pass == ' ') {
576 *pass++ = 0;
577 break;
578 }
579 }
580
581 for (auth_type = pass; *auth_type; auth_type++) {
582 if (*auth_type == ' ') {
583 *auth_type++ = 0;
584 break;
585 }
586 }
587
588 msg.service = QMI_WDS;
589 msg.client_id = ctxt->wds_client_id;
590 msg.txn_id = ctxt->wds_txn_id;
591 msg.type = 0x0020;
592 msg.size = 0;
593 msg.tlv = data + QMUX_HEADER;
594
595 ctxt->wds_txn_id += 2;
596
597 qmi_add_tlv(&msg, 0x14, strlen(apn), apn);
598 if (*auth_type)
599 qmi_add_tlv(&msg, 0x16, strlen(auth_type), auth_type);
600 if (*user) {
601 if (!*auth_type) {
602 unsigned char x;
603 x = 3;
604 qmi_add_tlv(&msg, 0x16, 1, &x);
605 }
606 qmi_add_tlv(&msg, 0x17, strlen(user), user);
607 if (*pass)
608 qmi_add_tlv(&msg, 0x18, strlen(pass), pass);
609 }
610 return qmi_send(ctxt, &msg);
611}
612
613static int qmi_network_down(struct qmi_ctxt *ctxt)
614{
615 unsigned char data[16 + QMUX_OVERHEAD];
616 struct qmi_msg msg;
617
618 msg.service = QMI_WDS;
619 msg.client_id = ctxt->wds_client_id;
620 msg.txn_id = ctxt->wds_txn_id;
621 msg.type = 0x0021;
622 msg.size = 0;
623 msg.tlv = data + QMUX_HEADER;
624
625 ctxt->wds_txn_id += 2;
626
627 qmi_add_tlv(&msg, 0x01, sizeof(ctxt->wds_handle), &ctxt->wds_handle);
628
629 return qmi_send(ctxt, &msg);
630}
631
632static int qmi_print_state(struct qmi_ctxt *ctxt, char *buf, int max)
633{
634 int i;
635 char *statename;
636
637 if (ctxt->state == STATE_ONLINE) {
638 statename = "up";
639 } else if (ctxt->state == STATE_OFFLINE) {
640 statename = "down";
641 } else {
642 statename = "busy";
643 }
644
645 i = scnprintf(buf, max, "STATE=%s\n", statename);
646 i += scnprintf(buf + i, max - i, "CID=%d\n",ctxt->wds_client_id);
647
648 if (ctxt->state != STATE_ONLINE){
649 return i;
650 }
651
652 i += scnprintf(buf + i, max - i, "ADDR=%d.%d.%d.%d\n",
653 ctxt->addr[0], ctxt->addr[1], ctxt->addr[2], ctxt->addr[3]);
654 i += scnprintf(buf + i, max - i, "MASK=%d.%d.%d.%d\n",
655 ctxt->mask[0], ctxt->mask[1], ctxt->mask[2], ctxt->mask[3]);
656 i += scnprintf(buf + i, max - i, "GATEWAY=%d.%d.%d.%d\n",
657 ctxt->gateway[0], ctxt->gateway[1], ctxt->gateway[2],
658 ctxt->gateway[3]);
659 i += scnprintf(buf + i, max - i, "DNS1=%d.%d.%d.%d\n",
660 ctxt->dns1[0], ctxt->dns1[1], ctxt->dns1[2], ctxt->dns1[3]);
661 i += scnprintf(buf + i, max - i, "DNS2=%d.%d.%d.%d\n",
662 ctxt->dns2[0], ctxt->dns2[1], ctxt->dns2[2], ctxt->dns2[3]);
663
664 return i;
665}
666
667static ssize_t qmi_read(struct file *fp, char __user *buf,
668 size_t count, loff_t *pos)
669{
670 struct qmi_ctxt *ctxt = fp->private_data;
671 char msg[256];
672 int len;
673 int r;
674
675 mutex_lock(&ctxt->lock);
676 for (;;) {
677 if (ctxt->state_dirty) {
678 ctxt->state_dirty = 0;
679 len = qmi_print_state(ctxt, msg, 256);
680 break;
681 }
682 mutex_unlock(&ctxt->lock);
683 r = wait_event_interruptible(qmi_wait_queue, ctxt->state_dirty);
684 if (r < 0)
685 return r;
686 mutex_lock(&ctxt->lock);
687 }
688 mutex_unlock(&ctxt->lock);
689
690 if (len > count)
691 len = count;
692
693 if (copy_to_user(buf, msg, len))
694 return -EFAULT;
695
696 return len;
697}
698
699
700static ssize_t qmi_write(struct file *fp, const char __user *buf,
701 size_t count, loff_t *pos)
702{
703 struct qmi_ctxt *ctxt = fp->private_data;
704 unsigned char cmd[64];
705 int len;
706 int r;
707
708 if (count < 1)
709 return 0;
710
711 len = count > 63 ? 63 : count;
712
713 if (copy_from_user(cmd, buf, len))
714 return -EFAULT;
715
716 cmd[len] = 0;
717
718 /* lazy */
719 if (cmd[len-1] == '\n') {
720 cmd[len-1] = 0;
721 len--;
722 }
723
724 if (!strncmp(cmd, "verbose", 7)) {
725 verbose = 1;
726 } else if (!strncmp(cmd, "terse", 5)) {
727 verbose = 0;
728 } else if (!strncmp(cmd, "poll", 4)) {
729 ctxt->state_dirty = 1;
730 wake_up(&qmi_wait_queue);
731 } else if (!strncmp(cmd, "down", 4)) {
732retry_down:
733 mutex_lock(&ctxt->lock);
734 if (ctxt->wds_busy) {
735 mutex_unlock(&ctxt->lock);
736 r = wait_event_interruptible(qmi_wait_queue, !ctxt->wds_busy);
737 if (r < 0)
738 return r;
739 goto retry_down;
740 }
741 ctxt->wds_busy = 1;
742 qmi_network_down(ctxt);
743 mutex_unlock(&ctxt->lock);
744 } else if (!strncmp(cmd, "up:", 3)) {
745retry_up:
746 mutex_lock(&ctxt->lock);
747 if (ctxt->wds_busy) {
748 mutex_unlock(&ctxt->lock);
749 r = wait_event_interruptible(qmi_wait_queue, !ctxt->wds_busy);
750 if (r < 0)
751 return r;
752 goto retry_up;
753 }
754 ctxt->wds_busy = 1;
755 qmi_network_up(ctxt, cmd+3);
756 mutex_unlock(&ctxt->lock);
757 } else {
758 return -EINVAL;
759 }
760
761 return count;
762}
763
764static int qmi_open(struct inode *ip, struct file *fp)
765{
766 struct qmi_ctxt *ctxt = qmi_minor_to_ctxt(MINOR(ip->i_rdev));
767 int r = 0;
768
769 if (!ctxt) {
770 printk(KERN_ERR "unknown qmi misc %d\n", MINOR(ip->i_rdev));
771 return -ENODEV;
772 }
773
774 fp->private_data = ctxt;
775
776 mutex_lock(&ctxt->lock);
777 if (ctxt->ch == 0)
778 r = smd_open(ctxt->ch_name, &ctxt->ch, ctxt, qmi_notify);
779 if (r == 0)
780 wake_up(&qmi_wait_queue);
781 mutex_unlock(&ctxt->lock);
782
783 return r;
784}
785
786static int qmi_release(struct inode *ip, struct file *fp)
787{
788 return 0;
789}
790
791static struct file_operations qmi_fops = {
792 .owner = THIS_MODULE,
793 .read = qmi_read,
794 .write = qmi_write,
795 .open = qmi_open,
796 .release = qmi_release,
797};
798
799static struct qmi_ctxt qmi_device0 = {
800 .ch_name = "SMD_DATA5_CNTL",
801 .misc = {
802 .minor = MISC_DYNAMIC_MINOR,
803 .name = "qmi0",
804 .fops = &qmi_fops,
805 }
806};
807static struct qmi_ctxt qmi_device1 = {
808 .ch_name = "SMD_DATA6_CNTL",
809 .misc = {
810 .minor = MISC_DYNAMIC_MINOR,
811 .name = "qmi1",
812 .fops = &qmi_fops,
813 }
814};
815static struct qmi_ctxt qmi_device2 = {
816 .ch_name = "SMD_DATA7_CNTL",
817 .misc = {
818 .minor = MISC_DYNAMIC_MINOR,
819 .name = "qmi2",
820 .fops = &qmi_fops,
821 }
822};
823
824static struct qmi_ctxt *qmi_minor_to_ctxt(unsigned n)
825{
826 if (n == qmi_device0.misc.minor)
827 return &qmi_device0;
828 if (n == qmi_device1.misc.minor)
829 return &qmi_device1;
830 if (n == qmi_device2.misc.minor)
831 return &qmi_device2;
832 return 0;
833}
834
835static int __init qmi_init(void)
836{
837 int ret;
838
839 qmi_wq = create_singlethread_workqueue("qmi");
840 if (qmi_wq == 0)
841 return -ENOMEM;
842
843 qmi_ctxt_init(&qmi_device0, 0);
844 qmi_ctxt_init(&qmi_device1, 1);
845 qmi_ctxt_init(&qmi_device2, 2);
846
847 ret = misc_register(&qmi_device0.misc);
848 if (ret == 0)
849 ret = misc_register(&qmi_device1.misc);
850 if (ret == 0)
851 ret = misc_register(&qmi_device2.misc);
852 return ret;
853}
854
855module_init(qmi_init);
diff --git a/drivers/staging/dream/smd/smd_rpcrouter.c b/drivers/staging/dream/smd/smd_rpcrouter.c
deleted file mode 100644
index 8744a6e499cb..000000000000
--- a/drivers/staging/dream/smd/smd_rpcrouter.c
+++ /dev/null
@@ -1,1261 +0,0 @@
1/* arch/arm/mach-msm/smd_rpcrouter.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007-2009 QUALCOMM Incorporated.
5 * Author: San Mehat <san@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18/* TODO: handle cases where smd_write() will tempfail due to full fifo */
19/* TODO: thread priority? schedule a work to bump it? */
20/* TODO: maybe make server_list_lock a mutex */
21/* TODO: pool fragments to avoid kmalloc/kfree churn */
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/string.h>
26#include <linux/errno.h>
27#include <linux/cdev.h>
28#include <linux/init.h>
29#include <linux/device.h>
30#include <linux/types.h>
31#include <linux/delay.h>
32#include <linux/fs.h>
33#include <linux/err.h>
34#include <linux/sched.h>
35#include <linux/poll.h>
36#include <linux/slab.h>
37#include <asm/uaccess.h>
38#include <asm/byteorder.h>
39#include <linux/platform_device.h>
40#include <linux/uaccess.h>
41
42#include <mach/msm_smd.h>
43#include "smd_rpcrouter.h"
44
45#define TRACE_R2R_MSG 0
46#define TRACE_R2R_RAW 0
47#define TRACE_RPC_MSG 0
48#define TRACE_NOTIFY_MSG 0
49
50#define MSM_RPCROUTER_DEBUG 0
51#define MSM_RPCROUTER_DEBUG_PKT 0
52#define MSM_RPCROUTER_R2R_DEBUG 0
53#define DUMP_ALL_RECEIVED_HEADERS 0
54
55#define DIAG(x...) printk("[RR] ERROR " x)
56
57#if MSM_RPCROUTER_DEBUG
58#define D(x...) printk(x)
59#else
60#define D(x...) do {} while (0)
61#endif
62
63#if TRACE_R2R_MSG
64#define RR(x...) printk("[RR] "x)
65#else
66#define RR(x...) do {} while (0)
67#endif
68
69#if TRACE_RPC_MSG
70#define IO(x...) printk("[RPC] "x)
71#else
72#define IO(x...) do {} while (0)
73#endif
74
75#if TRACE_NOTIFY_MSG
76#define NTFY(x...) printk(KERN_ERR "[NOTIFY] "x)
77#else
78#define NTFY(x...) do {} while (0)
79#endif
80
81static LIST_HEAD(local_endpoints);
82static LIST_HEAD(remote_endpoints);
83
84static LIST_HEAD(server_list);
85
86static smd_channel_t *smd_channel;
87static int initialized;
88static wait_queue_head_t newserver_wait;
89static wait_queue_head_t smd_wait;
90
91static DEFINE_SPINLOCK(local_endpoints_lock);
92static DEFINE_SPINLOCK(remote_endpoints_lock);
93static DEFINE_SPINLOCK(server_list_lock);
94static DEFINE_SPINLOCK(smd_lock);
95
96static struct workqueue_struct *rpcrouter_workqueue;
97static int rpcrouter_need_len;
98
99static atomic_t next_xid = ATOMIC_INIT(1);
100static uint8_t next_pacmarkid;
101
102static void do_read_data(struct work_struct *work);
103static void do_create_pdevs(struct work_struct *work);
104static void do_create_rpcrouter_pdev(struct work_struct *work);
105
106static DECLARE_WORK(work_read_data, do_read_data);
107static DECLARE_WORK(work_create_pdevs, do_create_pdevs);
108static DECLARE_WORK(work_create_rpcrouter_pdev, do_create_rpcrouter_pdev);
109
110#define RR_STATE_IDLE 0
111#define RR_STATE_HEADER 1
112#define RR_STATE_BODY 2
113#define RR_STATE_ERROR 3
114
115struct rr_context {
116 struct rr_packet *pkt;
117 uint8_t *ptr;
118 uint32_t state; /* current assembly state */
119 uint32_t count; /* bytes needed in this state */
120};
121
122static struct rr_context the_rr_context;
123
124static struct platform_device rpcrouter_pdev = {
125 .name = "oncrpc_router",
126 .id = -1,
127};
128
129
130static int rpcrouter_send_control_msg(union rr_control_msg *msg)
131{
132 struct rr_header hdr;
133 unsigned long flags;
134 int need;
135
136 if (!(msg->cmd == RPCROUTER_CTRL_CMD_HELLO) && !initialized) {
137 printk(KERN_ERR "rpcrouter_send_control_msg(): Warning, "
138 "router not initialized\n");
139 return -EINVAL;
140 }
141
142 hdr.version = RPCROUTER_VERSION;
143 hdr.type = msg->cmd;
144 hdr.src_pid = RPCROUTER_PID_LOCAL;
145 hdr.src_cid = RPCROUTER_ROUTER_ADDRESS;
146 hdr.confirm_rx = 0;
147 hdr.size = sizeof(*msg);
148 hdr.dst_pid = 0;
149 hdr.dst_cid = RPCROUTER_ROUTER_ADDRESS;
150
151 /* TODO: what if channel is full? */
152
153 need = sizeof(hdr) + hdr.size;
154 spin_lock_irqsave(&smd_lock, flags);
155 while (smd_write_avail(smd_channel) < need) {
156 spin_unlock_irqrestore(&smd_lock, flags);
157 msleep(250);
158 spin_lock_irqsave(&smd_lock, flags);
159 }
160 smd_write(smd_channel, &hdr, sizeof(hdr));
161 smd_write(smd_channel, msg, hdr.size);
162 spin_unlock_irqrestore(&smd_lock, flags);
163 return 0;
164}
165
166static struct rr_server *rpcrouter_create_server(uint32_t pid,
167 uint32_t cid,
168 uint32_t prog,
169 uint32_t ver)
170{
171 struct rr_server *server;
172 unsigned long flags;
173 int rc;
174
175 server = kmalloc(sizeof(struct rr_server), GFP_KERNEL);
176 if (!server)
177 return ERR_PTR(-ENOMEM);
178
179 memset(server, 0, sizeof(struct rr_server));
180 server->pid = pid;
181 server->cid = cid;
182 server->prog = prog;
183 server->vers = ver;
184
185 spin_lock_irqsave(&server_list_lock, flags);
186 list_add_tail(&server->list, &server_list);
187 spin_unlock_irqrestore(&server_list_lock, flags);
188
189 if (pid == RPCROUTER_PID_REMOTE) {
190 rc = msm_rpcrouter_create_server_cdev(server);
191 if (rc < 0)
192 goto out_fail;
193 }
194 return server;
195out_fail:
196 spin_lock_irqsave(&server_list_lock, flags);
197 list_del(&server->list);
198 spin_unlock_irqrestore(&server_list_lock, flags);
199 kfree(server);
200 return ERR_PTR(rc);
201}
202
203static void rpcrouter_destroy_server(struct rr_server *server)
204{
205 unsigned long flags;
206
207 spin_lock_irqsave(&server_list_lock, flags);
208 list_del(&server->list);
209 spin_unlock_irqrestore(&server_list_lock, flags);
210 device_destroy(msm_rpcrouter_class, server->device_number);
211 kfree(server);
212}
213
214static struct rr_server *rpcrouter_lookup_server(uint32_t prog, uint32_t ver)
215{
216 struct rr_server *server;
217 unsigned long flags;
218
219 spin_lock_irqsave(&server_list_lock, flags);
220 list_for_each_entry(server, &server_list, list) {
221 if (server->prog == prog
222 && server->vers == ver) {
223 spin_unlock_irqrestore(&server_list_lock, flags);
224 return server;
225 }
226 }
227 spin_unlock_irqrestore(&server_list_lock, flags);
228 return NULL;
229}
230
231static struct rr_server *rpcrouter_lookup_server_by_dev(dev_t dev)
232{
233 struct rr_server *server;
234 unsigned long flags;
235
236 spin_lock_irqsave(&server_list_lock, flags);
237 list_for_each_entry(server, &server_list, list) {
238 if (server->device_number == dev) {
239 spin_unlock_irqrestore(&server_list_lock, flags);
240 return server;
241 }
242 }
243 spin_unlock_irqrestore(&server_list_lock, flags);
244 return NULL;
245}
246
247struct msm_rpc_endpoint *msm_rpcrouter_create_local_endpoint(dev_t dev)
248{
249 struct msm_rpc_endpoint *ept;
250 unsigned long flags;
251
252 ept = kmalloc(sizeof(struct msm_rpc_endpoint), GFP_KERNEL);
253 if (!ept)
254 return NULL;
255 memset(ept, 0, sizeof(struct msm_rpc_endpoint));
256
257 /* mark no reply outstanding */
258 ept->reply_pid = 0xffffffff;
259
260 ept->cid = (uint32_t) ept;
261 ept->pid = RPCROUTER_PID_LOCAL;
262 ept->dev = dev;
263
264 if ((dev != msm_rpcrouter_devno) && (dev != MKDEV(0, 0))) {
265 struct rr_server *srv;
266 /*
267 * This is a userspace client which opened
268 * a program/ver devicenode. Bind the client
269 * to that destination
270 */
271 srv = rpcrouter_lookup_server_by_dev(dev);
272 /* TODO: bug? really? */
273 BUG_ON(!srv);
274
275 ept->dst_pid = srv->pid;
276 ept->dst_cid = srv->cid;
277 ept->dst_prog = cpu_to_be32(srv->prog);
278 ept->dst_vers = cpu_to_be32(srv->vers);
279
280 D("Creating local ept %p @ %08x:%08x\n", ept, srv->prog, srv->vers);
281 } else {
282 /* mark not connected */
283 ept->dst_pid = 0xffffffff;
284 D("Creating a master local ept %p\n", ept);
285 }
286
287 init_waitqueue_head(&ept->wait_q);
288 INIT_LIST_HEAD(&ept->read_q);
289 spin_lock_init(&ept->read_q_lock);
290 INIT_LIST_HEAD(&ept->incomplete);
291
292 spin_lock_irqsave(&local_endpoints_lock, flags);
293 list_add_tail(&ept->list, &local_endpoints);
294 spin_unlock_irqrestore(&local_endpoints_lock, flags);
295 return ept;
296}
297
298int msm_rpcrouter_destroy_local_endpoint(struct msm_rpc_endpoint *ept)
299{
300 int rc;
301 union rr_control_msg msg;
302
303 msg.cmd = RPCROUTER_CTRL_CMD_REMOVE_CLIENT;
304 msg.cli.pid = ept->pid;
305 msg.cli.cid = ept->cid;
306
307 RR("x REMOVE_CLIENT id=%d:%08x\n", ept->pid, ept->cid);
308 rc = rpcrouter_send_control_msg(&msg);
309 if (rc < 0)
310 return rc;
311
312 list_del(&ept->list);
313 kfree(ept);
314 return 0;
315}
316
317static int rpcrouter_create_remote_endpoint(uint32_t cid)
318{
319 struct rr_remote_endpoint *new_c;
320 unsigned long flags;
321
322 new_c = kmalloc(sizeof(struct rr_remote_endpoint), GFP_KERNEL);
323 if (!new_c)
324 return -ENOMEM;
325 memset(new_c, 0, sizeof(struct rr_remote_endpoint));
326
327 new_c->cid = cid;
328 new_c->pid = RPCROUTER_PID_REMOTE;
329 init_waitqueue_head(&new_c->quota_wait);
330 spin_lock_init(&new_c->quota_lock);
331
332 spin_lock_irqsave(&remote_endpoints_lock, flags);
333 list_add_tail(&new_c->list, &remote_endpoints);
334 spin_unlock_irqrestore(&remote_endpoints_lock, flags);
335 return 0;
336}
337
338static struct msm_rpc_endpoint *rpcrouter_lookup_local_endpoint(uint32_t cid)
339{
340 struct msm_rpc_endpoint *ept;
341 unsigned long flags;
342
343 spin_lock_irqsave(&local_endpoints_lock, flags);
344 list_for_each_entry(ept, &local_endpoints, list) {
345 if (ept->cid == cid) {
346 spin_unlock_irqrestore(&local_endpoints_lock, flags);
347 return ept;
348 }
349 }
350 spin_unlock_irqrestore(&local_endpoints_lock, flags);
351 return NULL;
352}
353
354static struct rr_remote_endpoint *rpcrouter_lookup_remote_endpoint(uint32_t cid)
355{
356 struct rr_remote_endpoint *ept;
357 unsigned long flags;
358
359 spin_lock_irqsave(&remote_endpoints_lock, flags);
360 list_for_each_entry(ept, &remote_endpoints, list) {
361 if (ept->cid == cid) {
362 spin_unlock_irqrestore(&remote_endpoints_lock, flags);
363 return ept;
364 }
365 }
366 spin_unlock_irqrestore(&remote_endpoints_lock, flags);
367 return NULL;
368}
369
370static int process_control_msg(union rr_control_msg *msg, int len)
371{
372 union rr_control_msg ctl;
373 struct rr_server *server;
374 struct rr_remote_endpoint *r_ept;
375 int rc = 0;
376 unsigned long flags;
377
378 if (len != sizeof(*msg)) {
379 printk(KERN_ERR "rpcrouter: r2r msg size %d != %d\n",
380 len, sizeof(*msg));
381 return -EINVAL;
382 }
383
384 switch (msg->cmd) {
385 case RPCROUTER_CTRL_CMD_HELLO:
386 RR("o HELLO\n");
387
388 RR("x HELLO\n");
389 memset(&ctl, 0, sizeof(ctl));
390 ctl.cmd = RPCROUTER_CTRL_CMD_HELLO;
391 rpcrouter_send_control_msg(&ctl);
392
393 initialized = 1;
394
395 /* Send list of servers one at a time */
396 ctl.cmd = RPCROUTER_CTRL_CMD_NEW_SERVER;
397
398 /* TODO: long time to hold a spinlock... */
399 spin_lock_irqsave(&server_list_lock, flags);
400 list_for_each_entry(server, &server_list, list) {
401 ctl.srv.pid = server->pid;
402 ctl.srv.cid = server->cid;
403 ctl.srv.prog = server->prog;
404 ctl.srv.vers = server->vers;
405
406 RR("x NEW_SERVER id=%d:%08x prog=%08x:%08x\n",
407 server->pid, server->cid,
408 server->prog, server->vers);
409
410 rpcrouter_send_control_msg(&ctl);
411 }
412 spin_unlock_irqrestore(&server_list_lock, flags);
413
414 queue_work(rpcrouter_workqueue, &work_create_rpcrouter_pdev);
415 break;
416
417 case RPCROUTER_CTRL_CMD_RESUME_TX:
418 RR("o RESUME_TX id=%d:%08x\n", msg->cli.pid, msg->cli.cid);
419
420 r_ept = rpcrouter_lookup_remote_endpoint(msg->cli.cid);
421 if (!r_ept) {
422 printk(KERN_ERR
423 "rpcrouter: Unable to resume client\n");
424 break;
425 }
426 spin_lock_irqsave(&r_ept->quota_lock, flags);
427 r_ept->tx_quota_cntr = 0;
428 spin_unlock_irqrestore(&r_ept->quota_lock, flags);
429 wake_up(&r_ept->quota_wait);
430 break;
431
432 case RPCROUTER_CTRL_CMD_NEW_SERVER:
433 RR("o NEW_SERVER id=%d:%08x prog=%08x:%08x\n",
434 msg->srv.pid, msg->srv.cid, msg->srv.prog, msg->srv.vers);
435
436 server = rpcrouter_lookup_server(msg->srv.prog, msg->srv.vers);
437
438 if (!server) {
439 server = rpcrouter_create_server(
440 msg->srv.pid, msg->srv.cid,
441 msg->srv.prog, msg->srv.vers);
442 if (!server)
443 return -ENOMEM;
444 /*
445 * XXX: Verify that its okay to add the
446 * client to our remote client list
447 * if we get a NEW_SERVER notification
448 */
449 if (!rpcrouter_lookup_remote_endpoint(msg->srv.cid)) {
450 rc = rpcrouter_create_remote_endpoint(
451 msg->srv.cid);
452 if (rc < 0)
453 printk(KERN_ERR
454 "rpcrouter:Client create"
455 "error (%d)\n", rc);
456 }
457 schedule_work(&work_create_pdevs);
458 wake_up(&newserver_wait);
459 } else {
460 if ((server->pid == msg->srv.pid) &&
461 (server->cid == msg->srv.cid)) {
462 printk(KERN_ERR "rpcrouter: Duplicate svr\n");
463 } else {
464 server->pid = msg->srv.pid;
465 server->cid = msg->srv.cid;
466 }
467 }
468 break;
469
470 case RPCROUTER_CTRL_CMD_REMOVE_SERVER:
471 RR("o REMOVE_SERVER prog=%08x:%d\n",
472 msg->srv.prog, msg->srv.vers);
473 server = rpcrouter_lookup_server(msg->srv.prog, msg->srv.vers);
474 if (server)
475 rpcrouter_destroy_server(server);
476 break;
477
478 case RPCROUTER_CTRL_CMD_REMOVE_CLIENT:
479 RR("o REMOVE_CLIENT id=%d:%08x\n", msg->cli.pid, msg->cli.cid);
480 if (msg->cli.pid != RPCROUTER_PID_REMOTE) {
481 printk(KERN_ERR
482 "rpcrouter: Denying remote removal of "
483 "local client\n");
484 break;
485 }
486 r_ept = rpcrouter_lookup_remote_endpoint(msg->cli.cid);
487 if (r_ept) {
488 spin_lock_irqsave(&remote_endpoints_lock, flags);
489 list_del(&r_ept->list);
490 spin_unlock_irqrestore(&remote_endpoints_lock, flags);
491 kfree(r_ept);
492 }
493
494 /* Notify local clients of this event */
495 printk(KERN_ERR "rpcrouter: LOCAL NOTIFICATION NOT IMP\n");
496 rc = -ENOSYS;
497
498 break;
499 default:
500 RR("o UNKNOWN(%08x)\n", msg->cmd);
501 rc = -ENOSYS;
502 }
503
504 return rc;
505}
506
507static void do_create_rpcrouter_pdev(struct work_struct *work)
508{
509 platform_device_register(&rpcrouter_pdev);
510}
511
512static void do_create_pdevs(struct work_struct *work)
513{
514 unsigned long flags;
515 struct rr_server *server;
516
517 /* TODO: race if destroyed while being registered */
518 spin_lock_irqsave(&server_list_lock, flags);
519 list_for_each_entry(server, &server_list, list) {
520 if (server->pid == RPCROUTER_PID_REMOTE) {
521 if (server->pdev_name[0] == 0) {
522 spin_unlock_irqrestore(&server_list_lock,
523 flags);
524 msm_rpcrouter_create_server_pdev(server);
525 schedule_work(&work_create_pdevs);
526 return;
527 }
528 }
529 }
530 spin_unlock_irqrestore(&server_list_lock, flags);
531}
532
533static void rpcrouter_smdnotify(void *_dev, unsigned event)
534{
535 if (event != SMD_EVENT_DATA)
536 return;
537
538 wake_up(&smd_wait);
539}
540
541static void *rr_malloc(unsigned sz)
542{
543 void *ptr = kmalloc(sz, GFP_KERNEL);
544 if (ptr)
545 return ptr;
546
547 printk(KERN_ERR "rpcrouter: kmalloc of %d failed, retrying...\n", sz);
548 do {
549 ptr = kmalloc(sz, GFP_KERNEL);
550 } while (!ptr);
551
552 return ptr;
553}
554
555/* TODO: deal with channel teardown / restore */
556static int rr_read(void *data, int len)
557{
558 int rc;
559 unsigned long flags;
560// printk("rr_read() %d\n", len);
561 for(;;) {
562 spin_lock_irqsave(&smd_lock, flags);
563 if (smd_read_avail(smd_channel) >= len) {
564 rc = smd_read(smd_channel, data, len);
565 spin_unlock_irqrestore(&smd_lock, flags);
566 if (rc == len)
567 return 0;
568 else
569 return -EIO;
570 }
571 rpcrouter_need_len = len;
572 spin_unlock_irqrestore(&smd_lock, flags);
573
574// printk("rr_read: waiting (%d)\n", len);
575 wait_event(smd_wait, smd_read_avail(smd_channel) >= len);
576 }
577 return 0;
578}
579
580static uint32_t r2r_buf[RPCROUTER_MSGSIZE_MAX];
581
582static void do_read_data(struct work_struct *work)
583{
584 struct rr_header hdr;
585 struct rr_packet *pkt;
586 struct rr_fragment *frag;
587 struct msm_rpc_endpoint *ept;
588 uint32_t pm, mid;
589 unsigned long flags;
590
591 if (rr_read(&hdr, sizeof(hdr)))
592 goto fail_io;
593
594#if TRACE_R2R_RAW
595 RR("- ver=%d type=%d src=%d:%08x crx=%d siz=%d dst=%d:%08x\n",
596 hdr.version, hdr.type, hdr.src_pid, hdr.src_cid,
597 hdr.confirm_rx, hdr.size, hdr.dst_pid, hdr.dst_cid);
598#endif
599
600 if (hdr.version != RPCROUTER_VERSION) {
601 DIAG("version %d != %d\n", hdr.version, RPCROUTER_VERSION);
602 goto fail_data;
603 }
604 if (hdr.size > RPCROUTER_MSGSIZE_MAX) {
605 DIAG("msg size %d > max %d\n", hdr.size, RPCROUTER_MSGSIZE_MAX);
606 goto fail_data;
607 }
608
609 if (hdr.dst_cid == RPCROUTER_ROUTER_ADDRESS) {
610 if (rr_read(r2r_buf, hdr.size))
611 goto fail_io;
612 process_control_msg((void*) r2r_buf, hdr.size);
613 goto done;
614 }
615
616 if (hdr.size < sizeof(pm)) {
617 DIAG("runt packet (no pacmark)\n");
618 goto fail_data;
619 }
620 if (rr_read(&pm, sizeof(pm)))
621 goto fail_io;
622
623 hdr.size -= sizeof(pm);
624
625 frag = rr_malloc(hdr.size + sizeof(*frag));
626 frag->next = NULL;
627 frag->length = hdr.size;
628 if (rr_read(frag->data, hdr.size))
629 goto fail_io;
630
631 ept = rpcrouter_lookup_local_endpoint(hdr.dst_cid);
632 if (!ept) {
633 DIAG("no local ept for cid %08x\n", hdr.dst_cid);
634 kfree(frag);
635 goto done;
636 }
637
638 /* See if there is already a partial packet that matches our mid
639 * and if so, append this fragment to that packet.
640 */
641 mid = PACMARK_MID(pm);
642 list_for_each_entry(pkt, &ept->incomplete, list) {
643 if (pkt->mid == mid) {
644 pkt->last->next = frag;
645 pkt->last = frag;
646 pkt->length += frag->length;
647 if (PACMARK_LAST(pm)) {
648 list_del(&pkt->list);
649 goto packet_complete;
650 }
651 goto done;
652 }
653 }
654 /* This mid is new -- create a packet for it, and put it on
655 * the incomplete list if this fragment is not a last fragment,
656 * otherwise put it on the read queue.
657 */
658 pkt = rr_malloc(sizeof(struct rr_packet));
659 pkt->first = frag;
660 pkt->last = frag;
661 memcpy(&pkt->hdr, &hdr, sizeof(hdr));
662 pkt->mid = mid;
663 pkt->length = frag->length;
664 if (!PACMARK_LAST(pm)) {
665 list_add_tail(&pkt->list, &ept->incomplete);
666 goto done;
667 }
668
669packet_complete:
670 spin_lock_irqsave(&ept->read_q_lock, flags);
671 list_add_tail(&pkt->list, &ept->read_q);
672 wake_up(&ept->wait_q);
673 spin_unlock_irqrestore(&ept->read_q_lock, flags);
674done:
675
676 if (hdr.confirm_rx) {
677 union rr_control_msg msg;
678
679 msg.cmd = RPCROUTER_CTRL_CMD_RESUME_TX;
680 msg.cli.pid = hdr.dst_pid;
681 msg.cli.cid = hdr.dst_cid;
682
683 RR("x RESUME_TX id=%d:%08x\n", msg.cli.pid, msg.cli.cid);
684 rpcrouter_send_control_msg(&msg);
685 }
686
687 queue_work(rpcrouter_workqueue, &work_read_data);
688 return;
689
690fail_io:
691fail_data:
692 printk(KERN_ERR "rpc_router has died\n");
693}
694
695void msm_rpc_setup_req(struct rpc_request_hdr *hdr, uint32_t prog,
696 uint32_t vers, uint32_t proc)
697{
698 memset(hdr, 0, sizeof(struct rpc_request_hdr));
699 hdr->xid = cpu_to_be32(atomic_add_return(1, &next_xid));
700 hdr->rpc_vers = cpu_to_be32(2);
701 hdr->prog = cpu_to_be32(prog);
702 hdr->vers = cpu_to_be32(vers);
703 hdr->procedure = cpu_to_be32(proc);
704}
705
706struct msm_rpc_endpoint *msm_rpc_open(void)
707{
708 struct msm_rpc_endpoint *ept;
709
710 ept = msm_rpcrouter_create_local_endpoint(MKDEV(0, 0));
711 if (ept == NULL)
712 return ERR_PTR(-ENOMEM);
713
714 return ept;
715}
716
717int msm_rpc_close(struct msm_rpc_endpoint *ept)
718{
719 return msm_rpcrouter_destroy_local_endpoint(ept);
720}
721EXPORT_SYMBOL(msm_rpc_close);
722
723int msm_rpc_write(struct msm_rpc_endpoint *ept, void *buffer, int count)
724{
725 struct rr_header hdr;
726 uint32_t pacmark;
727 struct rpc_request_hdr *rq = buffer;
728 struct rr_remote_endpoint *r_ept;
729 unsigned long flags;
730 int needed;
731 DEFINE_WAIT(__wait);
732
733 /* TODO: fragmentation for large outbound packets */
734 if (count > (RPCROUTER_MSGSIZE_MAX - sizeof(uint32_t)) || !count)
735 return -EINVAL;
736
737 /* snoop the RPC packet and enforce permissions */
738
739 /* has to have at least the xid and type fields */
740 if (count < (sizeof(uint32_t) * 2)) {
741 printk(KERN_ERR "rr_write: rejecting runt packet\n");
742 return -EINVAL;
743 }
744
745 if (rq->type == 0) {
746 /* RPC CALL */
747 if (count < (sizeof(uint32_t) * 6)) {
748 printk(KERN_ERR
749 "rr_write: rejecting runt call packet\n");
750 return -EINVAL;
751 }
752 if (ept->dst_pid == 0xffffffff) {
753 printk(KERN_ERR "rr_write: not connected\n");
754 return -ENOTCONN;
755 }
756
757#if CONFIG_MSM_AMSS_VERSION >= 6350
758 if ((ept->dst_prog != rq->prog) ||
759 !msm_rpc_is_compatible_version(
760 be32_to_cpu(ept->dst_vers),
761 be32_to_cpu(rq->vers))) {
762#else
763 if (ept->dst_prog != rq->prog || ept->dst_vers != rq->vers) {
764#endif
765 printk(KERN_ERR
766 "rr_write: cannot write to %08x:%d "
767 "(bound to %08x:%d)\n",
768 be32_to_cpu(rq->prog), be32_to_cpu(rq->vers),
769 be32_to_cpu(ept->dst_prog),
770 be32_to_cpu(ept->dst_vers));
771 return -EINVAL;
772 }
773 hdr.dst_pid = ept->dst_pid;
774 hdr.dst_cid = ept->dst_cid;
775 IO("CALL on ept %p to %08x:%08x @ %d:%08x (%d bytes) (xid %x proc %x)\n",
776 ept,
777 be32_to_cpu(rq->prog), be32_to_cpu(rq->vers),
778 ept->dst_pid, ept->dst_cid, count,
779 be32_to_cpu(rq->xid), be32_to_cpu(rq->procedure));
780 } else {
781 /* RPC REPLY */
782 /* TODO: locking */
783 if (ept->reply_pid == 0xffffffff) {
784 printk(KERN_ERR
785 "rr_write: rejecting unexpected reply\n");
786 return -EINVAL;
787 }
788 if (ept->reply_xid != rq->xid) {
789 printk(KERN_ERR
790 "rr_write: rejecting packet w/ bad xid\n");
791 return -EINVAL;
792 }
793
794 hdr.dst_pid = ept->reply_pid;
795 hdr.dst_cid = ept->reply_cid;
796
797 /* consume this reply */
798 ept->reply_pid = 0xffffffff;
799
800 IO("REPLY on ept %p to xid=%d @ %d:%08x (%d bytes)\n",
801 ept,
802 be32_to_cpu(rq->xid), hdr.dst_pid, hdr.dst_cid, count);
803 }
804
805 r_ept = rpcrouter_lookup_remote_endpoint(hdr.dst_cid);
806
807 if (!r_ept) {
808 printk(KERN_ERR
809 "msm_rpc_write(): No route to ept "
810 "[PID %x CID %x]\n", hdr.dst_pid, hdr.dst_cid);
811 return -EHOSTUNREACH;
812 }
813
814 /* Create routing header */
815 hdr.type = RPCROUTER_CTRL_CMD_DATA;
816 hdr.version = RPCROUTER_VERSION;
817 hdr.src_pid = ept->pid;
818 hdr.src_cid = ept->cid;
819 hdr.confirm_rx = 0;
820 hdr.size = count + sizeof(uint32_t);
821
822 for (;;) {
823 prepare_to_wait(&r_ept->quota_wait, &__wait,
824 TASK_INTERRUPTIBLE);
825 spin_lock_irqsave(&r_ept->quota_lock, flags);
826 if (r_ept->tx_quota_cntr < RPCROUTER_DEFAULT_RX_QUOTA)
827 break;
828 if (signal_pending(current) &&
829 (!(ept->flags & MSM_RPC_UNINTERRUPTIBLE)))
830 break;
831 spin_unlock_irqrestore(&r_ept->quota_lock, flags);
832 schedule();
833 }
834 finish_wait(&r_ept->quota_wait, &__wait);
835
836 if (signal_pending(current) &&
837 (!(ept->flags & MSM_RPC_UNINTERRUPTIBLE))) {
838 spin_unlock_irqrestore(&r_ept->quota_lock, flags);
839 return -ERESTARTSYS;
840 }
841 r_ept->tx_quota_cntr++;
842 if (r_ept->tx_quota_cntr == RPCROUTER_DEFAULT_RX_QUOTA)
843 hdr.confirm_rx = 1;
844
845 /* bump pacmark while interrupts disabled to avoid race
846 * probably should be atomic op instead
847 */
848 pacmark = PACMARK(count, ++next_pacmarkid, 0, 1);
849
850 spin_unlock_irqrestore(&r_ept->quota_lock, flags);
851
852 spin_lock_irqsave(&smd_lock, flags);
853
854 needed = sizeof(hdr) + hdr.size;
855 while (smd_write_avail(smd_channel) < needed) {
856 spin_unlock_irqrestore(&smd_lock, flags);
857 msleep(250);
858 spin_lock_irqsave(&smd_lock, flags);
859 }
860
861 /* TODO: deal with full fifo */
862 smd_write(smd_channel, &hdr, sizeof(hdr));
863 smd_write(smd_channel, &pacmark, sizeof(pacmark));
864 smd_write(smd_channel, buffer, count);
865
866 spin_unlock_irqrestore(&smd_lock, flags);
867
868 return count;
869}
870EXPORT_SYMBOL(msm_rpc_write);
871
872/*
873 * NOTE: It is the responsibility of the caller to kfree buffer
874 */
875int msm_rpc_read(struct msm_rpc_endpoint *ept, void **buffer,
876 unsigned user_len, long timeout)
877{
878 struct rr_fragment *frag, *next;
879 char *buf;
880 int rc;
881
882 rc = __msm_rpc_read(ept, &frag, user_len, timeout);
883 if (rc <= 0)
884 return rc;
885
886 /* single-fragment messages conveniently can be
887 * returned as-is (the buffer is at the front)
888 */
889 if (frag->next == 0) {
890 *buffer = (void*) frag;
891 return rc;
892 }
893
894 /* multi-fragment messages, we have to do it the
895 * hard way, which is rather disgusting right now
896 */
897 buf = rr_malloc(rc);
898 *buffer = buf;
899
900 while (frag != NULL) {
901 memcpy(buf, frag->data, frag->length);
902 next = frag->next;
903 buf += frag->length;
904 kfree(frag);
905 frag = next;
906 }
907
908 return rc;
909}
910
911int msm_rpc_call(struct msm_rpc_endpoint *ept, uint32_t proc,
912 void *_request, int request_size,
913 long timeout)
914{
915 return msm_rpc_call_reply(ept, proc,
916 _request, request_size,
917 NULL, 0, timeout);
918}
919EXPORT_SYMBOL(msm_rpc_call);
920
921int msm_rpc_call_reply(struct msm_rpc_endpoint *ept, uint32_t proc,
922 void *_request, int request_size,
923 void *_reply, int reply_size,
924 long timeout)
925{
926 struct rpc_request_hdr *req = _request;
927 struct rpc_reply_hdr *reply;
928 int rc;
929
930 if (request_size < sizeof(*req))
931 return -ETOOSMALL;
932
933 if (ept->dst_pid == 0xffffffff)
934 return -ENOTCONN;
935
936 /* We can't use msm_rpc_setup_req() here, because dst_prog and
937 * dst_vers here are already in BE.
938 */
939 memset(req, 0, sizeof(*req));
940 req->xid = cpu_to_be32(atomic_add_return(1, &next_xid));
941 req->rpc_vers = cpu_to_be32(2);
942 req->prog = ept->dst_prog;
943 req->vers = ept->dst_vers;
944 req->procedure = cpu_to_be32(proc);
945
946 rc = msm_rpc_write(ept, req, request_size);
947 if (rc < 0)
948 return rc;
949
950 for (;;) {
951 rc = msm_rpc_read(ept, (void*) &reply, -1, timeout);
952 if (rc < 0)
953 return rc;
954 if (rc < (3 * sizeof(uint32_t))) {
955 rc = -EIO;
956 break;
957 }
958 /* we should not get CALL packets -- ignore them */
959 if (reply->type == 0) {
960 kfree(reply);
961 continue;
962 }
963 /* If an earlier call timed out, we could get the (no
964 * longer wanted) reply for it. Ignore replies that
965 * we don't expect.
966 */
967 if (reply->xid != req->xid) {
968 kfree(reply);
969 continue;
970 }
971 if (reply->reply_stat != 0) {
972 rc = -EPERM;
973 break;
974 }
975 if (reply->data.acc_hdr.accept_stat != 0) {
976 rc = -EINVAL;
977 break;
978 }
979 if (_reply == NULL) {
980 rc = 0;
981 break;
982 }
983 if (rc > reply_size) {
984 rc = -ENOMEM;
985 } else {
986 memcpy(_reply, reply, rc);
987 }
988 break;
989 }
990 kfree(reply);
991 return rc;
992}
993EXPORT_SYMBOL(msm_rpc_call_reply);
994
995
996static inline int ept_packet_available(struct msm_rpc_endpoint *ept)
997{
998 unsigned long flags;
999 int ret;
1000 spin_lock_irqsave(&ept->read_q_lock, flags);
1001 ret = !list_empty(&ept->read_q);
1002 spin_unlock_irqrestore(&ept->read_q_lock, flags);
1003 return ret;
1004}
1005
1006int __msm_rpc_read(struct msm_rpc_endpoint *ept,
1007 struct rr_fragment **frag_ret,
1008 unsigned len, long timeout)
1009{
1010 struct rr_packet *pkt;
1011 struct rpc_request_hdr *rq;
1012 DEFINE_WAIT(__wait);
1013 unsigned long flags;
1014 int rc;
1015
1016 IO("READ on ept %p\n", ept);
1017
1018 if (ept->flags & MSM_RPC_UNINTERRUPTIBLE) {
1019 if (timeout < 0) {
1020 wait_event(ept->wait_q, ept_packet_available(ept));
1021 } else {
1022 rc = wait_event_timeout(
1023 ept->wait_q, ept_packet_available(ept),
1024 timeout);
1025 if (rc == 0)
1026 return -ETIMEDOUT;
1027 }
1028 } else {
1029 if (timeout < 0) {
1030 rc = wait_event_interruptible(
1031 ept->wait_q, ept_packet_available(ept));
1032 if (rc < 0)
1033 return rc;
1034 } else {
1035 rc = wait_event_interruptible_timeout(
1036 ept->wait_q, ept_packet_available(ept),
1037 timeout);
1038 if (rc == 0)
1039 return -ETIMEDOUT;
1040 }
1041 }
1042
1043 spin_lock_irqsave(&ept->read_q_lock, flags);
1044 if (list_empty(&ept->read_q)) {
1045 spin_unlock_irqrestore(&ept->read_q_lock, flags);
1046 return -EAGAIN;
1047 }
1048 pkt = list_first_entry(&ept->read_q, struct rr_packet, list);
1049 if (pkt->length > len) {
1050 spin_unlock_irqrestore(&ept->read_q_lock, flags);
1051 return -ETOOSMALL;
1052 }
1053 list_del(&pkt->list);
1054 spin_unlock_irqrestore(&ept->read_q_lock, flags);
1055
1056 rc = pkt->length;
1057
1058 *frag_ret = pkt->first;
1059 rq = (void*) pkt->first->data;
1060 if ((rc >= (sizeof(uint32_t) * 3)) && (rq->type == 0)) {
1061 IO("READ on ept %p is a CALL on %08x:%08x proc %d xid %d\n",
1062 ept, be32_to_cpu(rq->prog), be32_to_cpu(rq->vers),
1063 be32_to_cpu(rq->procedure),
1064 be32_to_cpu(rq->xid));
1065 /* RPC CALL */
1066 if (ept->reply_pid != 0xffffffff) {
1067 printk(KERN_WARNING
1068 "rr_read: lost previous reply xid...\n");
1069 }
1070 /* TODO: locking? */
1071 ept->reply_pid = pkt->hdr.src_pid;
1072 ept->reply_cid = pkt->hdr.src_cid;
1073 ept->reply_xid = rq->xid;
1074 }
1075#if TRACE_RPC_MSG
1076 else if ((rc >= (sizeof(uint32_t) * 3)) && (rq->type == 1))
1077 IO("READ on ept %p is a REPLY\n", ept);
1078 else IO("READ on ept %p (%d bytes)\n", ept, rc);
1079#endif
1080
1081 kfree(pkt);
1082 return rc;
1083}
1084
1085#if CONFIG_MSM_AMSS_VERSION >= 6350
1086int msm_rpc_is_compatible_version(uint32_t server_version,
1087 uint32_t client_version)
1088{
1089 if ((server_version & RPC_VERSION_MODE_MASK) !=
1090 (client_version & RPC_VERSION_MODE_MASK))
1091 return 0;
1092
1093 if (server_version & RPC_VERSION_MODE_MASK)
1094 return server_version == client_version;
1095
1096 return ((server_version & RPC_VERSION_MAJOR_MASK) ==
1097 (client_version & RPC_VERSION_MAJOR_MASK)) &&
1098 ((server_version & RPC_VERSION_MINOR_MASK) >=
1099 (client_version & RPC_VERSION_MINOR_MASK));
1100}
1101EXPORT_SYMBOL(msm_rpc_is_compatible_version);
1102
1103static int msm_rpc_get_compatible_server(uint32_t prog,
1104 uint32_t ver,
1105 uint32_t *found_vers)
1106{
1107 struct rr_server *server;
1108 unsigned long flags;
1109 if (found_vers == NULL)
1110 return 0;
1111
1112 spin_lock_irqsave(&server_list_lock, flags);
1113 list_for_each_entry(server, &server_list, list) {
1114 if ((server->prog == prog) &&
1115 msm_rpc_is_compatible_version(server->vers, ver)) {
1116 *found_vers = server->vers;
1117 spin_unlock_irqrestore(&server_list_lock, flags);
1118 return 0;
1119 }
1120 }
1121 spin_unlock_irqrestore(&server_list_lock, flags);
1122 return -1;
1123}
1124#endif
1125
1126struct msm_rpc_endpoint *msm_rpc_connect(uint32_t prog, uint32_t vers, unsigned flags)
1127{
1128 struct msm_rpc_endpoint *ept;
1129 struct rr_server *server;
1130
1131#if CONFIG_MSM_AMSS_VERSION >= 6350
1132 if (!(vers & RPC_VERSION_MODE_MASK)) {
1133 uint32_t found_vers;
1134 if (msm_rpc_get_compatible_server(prog, vers, &found_vers) < 0)
1135 return ERR_PTR(-EHOSTUNREACH);
1136 if (found_vers != vers) {
1137 D("RPC using new version %08x:{%08x --> %08x}\n",
1138 prog, vers, found_vers);
1139 vers = found_vers;
1140 }
1141 }
1142#endif
1143
1144 server = rpcrouter_lookup_server(prog, vers);
1145 if (!server)
1146 return ERR_PTR(-EHOSTUNREACH);
1147
1148 ept = msm_rpc_open();
1149 if (IS_ERR(ept))
1150 return ept;
1151
1152 ept->flags = flags;
1153 ept->dst_pid = server->pid;
1154 ept->dst_cid = server->cid;
1155 ept->dst_prog = cpu_to_be32(prog);
1156 ept->dst_vers = cpu_to_be32(vers);
1157
1158 return ept;
1159}
1160EXPORT_SYMBOL(msm_rpc_connect);
1161
1162uint32_t msm_rpc_get_vers(struct msm_rpc_endpoint *ept)
1163{
1164 return be32_to_cpu(ept->dst_vers);
1165}
1166EXPORT_SYMBOL(msm_rpc_get_vers);
1167
1168/* TODO: permission check? */
1169int msm_rpc_register_server(struct msm_rpc_endpoint *ept,
1170 uint32_t prog, uint32_t vers)
1171{
1172 int rc;
1173 union rr_control_msg msg;
1174 struct rr_server *server;
1175
1176 server = rpcrouter_create_server(ept->pid, ept->cid,
1177 prog, vers);
1178 if (!server)
1179 return -ENODEV;
1180
1181 msg.srv.cmd = RPCROUTER_CTRL_CMD_NEW_SERVER;
1182 msg.srv.pid = ept->pid;
1183 msg.srv.cid = ept->cid;
1184 msg.srv.prog = prog;
1185 msg.srv.vers = vers;
1186
1187 RR("x NEW_SERVER id=%d:%08x prog=%08x:%08x\n",
1188 ept->pid, ept->cid, prog, vers);
1189
1190 rc = rpcrouter_send_control_msg(&msg);
1191 if (rc < 0)
1192 return rc;
1193
1194 return 0;
1195}
1196
1197/* TODO: permission check -- disallow unreg of somebody else's server */
1198int msm_rpc_unregister_server(struct msm_rpc_endpoint *ept,
1199 uint32_t prog, uint32_t vers)
1200{
1201 struct rr_server *server;
1202 server = rpcrouter_lookup_server(prog, vers);
1203
1204 if (!server)
1205 return -ENOENT;
1206 rpcrouter_destroy_server(server);
1207 return 0;
1208}
1209
1210static int msm_rpcrouter_probe(struct platform_device *pdev)
1211{
1212 int rc;
1213
1214 /* Initialize what we need to start processing */
1215 INIT_LIST_HEAD(&local_endpoints);
1216 INIT_LIST_HEAD(&remote_endpoints);
1217
1218 init_waitqueue_head(&newserver_wait);
1219 init_waitqueue_head(&smd_wait);
1220
1221 rpcrouter_workqueue = create_singlethread_workqueue("rpcrouter");
1222 if (!rpcrouter_workqueue)
1223 return -ENOMEM;
1224
1225 rc = msm_rpcrouter_init_devices();
1226 if (rc < 0)
1227 goto fail_destroy_workqueue;
1228
1229 /* Open up SMD channel 2 */
1230 initialized = 0;
1231 rc = smd_open("SMD_RPCCALL", &smd_channel, NULL, rpcrouter_smdnotify);
1232 if (rc < 0)
1233 goto fail_remove_devices;
1234
1235 queue_work(rpcrouter_workqueue, &work_read_data);
1236 return 0;
1237
1238 fail_remove_devices:
1239 msm_rpcrouter_exit_devices();
1240 fail_destroy_workqueue:
1241 destroy_workqueue(rpcrouter_workqueue);
1242 return rc;
1243}
1244
1245static struct platform_driver msm_smd_channel2_driver = {
1246 .probe = msm_rpcrouter_probe,
1247 .driver = {
1248 .name = "SMD_RPCCALL",
1249 .owner = THIS_MODULE,
1250 },
1251};
1252
1253static int __init rpcrouter_init(void)
1254{
1255 return platform_driver_register(&msm_smd_channel2_driver);
1256}
1257
1258module_init(rpcrouter_init);
1259MODULE_DESCRIPTION("MSM RPC Router");
1260MODULE_AUTHOR("San Mehat <san@android.com>");
1261MODULE_LICENSE("GPL");
diff --git a/drivers/staging/dream/smd/smd_rpcrouter.h b/drivers/staging/dream/smd/smd_rpcrouter.h
deleted file mode 100644
index 86ab997b1b79..000000000000
--- a/drivers/staging/dream/smd/smd_rpcrouter.h
+++ /dev/null
@@ -1,193 +0,0 @@
1/** arch/arm/mach-msm/smd_rpcrouter.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007-2008 QUALCOMM Incorporated.
5 * Author: San Mehat <san@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#ifndef _ARCH_ARM_MACH_MSM_SMD_RPCROUTER_H
19#define _ARCH_ARM_MACH_MSM_SMD_RPCROUTER_H
20
21#include <linux/types.h>
22#include <linux/list.h>
23#include <linux/cdev.h>
24#include <linux/platform_device.h>
25
26#include <mach/msm_smd.h>
27#include <mach/msm_rpcrouter.h>
28
29/* definitions for the R2R wire protcol */
30
31#define RPCROUTER_VERSION 1
32#define RPCROUTER_PROCESSORS_MAX 4
33#define RPCROUTER_MSGSIZE_MAX 512
34
35#define RPCROUTER_CLIENT_BCAST_ID 0xffffffff
36#define RPCROUTER_ROUTER_ADDRESS 0xfffffffe
37
38#define RPCROUTER_PID_LOCAL 1
39#define RPCROUTER_PID_REMOTE 0
40
41#define RPCROUTER_CTRL_CMD_DATA 1
42#define RPCROUTER_CTRL_CMD_HELLO 2
43#define RPCROUTER_CTRL_CMD_BYE 3
44#define RPCROUTER_CTRL_CMD_NEW_SERVER 4
45#define RPCROUTER_CTRL_CMD_REMOVE_SERVER 5
46#define RPCROUTER_CTRL_CMD_REMOVE_CLIENT 6
47#define RPCROUTER_CTRL_CMD_RESUME_TX 7
48#define RPCROUTER_CTRL_CMD_EXIT 8
49
50#define RPCROUTER_DEFAULT_RX_QUOTA 5
51
52union rr_control_msg {
53 uint32_t cmd;
54 struct {
55 uint32_t cmd;
56 uint32_t prog;
57 uint32_t vers;
58 uint32_t pid;
59 uint32_t cid;
60 } srv;
61 struct {
62 uint32_t cmd;
63 uint32_t pid;
64 uint32_t cid;
65 } cli;
66};
67
68struct rr_header {
69 uint32_t version;
70 uint32_t type;
71 uint32_t src_pid;
72 uint32_t src_cid;
73 uint32_t confirm_rx;
74 uint32_t size;
75 uint32_t dst_pid;
76 uint32_t dst_cid;
77};
78
79/* internals */
80
81#define RPCROUTER_MAX_REMOTE_SERVERS 100
82
83struct rr_fragment {
84 unsigned char data[RPCROUTER_MSGSIZE_MAX];
85 uint32_t length;
86 struct rr_fragment *next;
87};
88
89struct rr_packet {
90 struct list_head list;
91 struct rr_fragment *first;
92 struct rr_fragment *last;
93 struct rr_header hdr;
94 uint32_t mid;
95 uint32_t length;
96};
97
98#define PACMARK_LAST(n) ((n) & 0x80000000)
99#define PACMARK_MID(n) (((n) >> 16) & 0xFF)
100#define PACMARK_LEN(n) ((n) & 0xFFFF)
101
102static inline uint32_t PACMARK(uint32_t len, uint32_t mid, uint32_t first,
103 uint32_t last)
104{
105 return (len & 0xFFFF) |
106 ((mid & 0xFF) << 16) |
107 ((!!first) << 30) |
108 ((!!last) << 31);
109}
110
111struct rr_server {
112 struct list_head list;
113
114 uint32_t pid;
115 uint32_t cid;
116 uint32_t prog;
117 uint32_t vers;
118
119 dev_t device_number;
120 struct cdev cdev;
121 struct device *device;
122 struct rpcsvr_platform_device p_device;
123 char pdev_name[32];
124};
125
126struct rr_remote_endpoint {
127 uint32_t pid;
128 uint32_t cid;
129
130 int tx_quota_cntr;
131 spinlock_t quota_lock;
132 wait_queue_head_t quota_wait;
133
134 struct list_head list;
135};
136
137struct msm_rpc_endpoint {
138 struct list_head list;
139
140 /* incomplete packets waiting for assembly */
141 struct list_head incomplete;
142
143 /* complete packets waiting to be read */
144 struct list_head read_q;
145 spinlock_t read_q_lock;
146 wait_queue_head_t wait_q;
147 unsigned flags;
148
149 /* endpoint address */
150 uint32_t pid;
151 uint32_t cid;
152
153 /* bound remote address
154 * if not connected (dst_pid == 0xffffffff) RPC_CALL writes fail
155 * RPC_CALLs must be to the prog/vers below or they will fail
156 */
157 uint32_t dst_pid;
158 uint32_t dst_cid;
159 uint32_t dst_prog; /* be32 */
160 uint32_t dst_vers; /* be32 */
161
162 /* reply remote address
163 * if reply_pid == 0xffffffff, none available
164 * RPC_REPLY writes may only go to the pid/cid/xid of the
165 * last RPC_CALL we received.
166 */
167 uint32_t reply_pid;
168 uint32_t reply_cid;
169 uint32_t reply_xid; /* be32 */
170 uint32_t next_pm; /* Pacmark sequence */
171
172 /* device node if this endpoint is accessed via userspace */
173 dev_t dev;
174};
175
176/* shared between smd_rpcrouter*.c */
177
178int __msm_rpc_read(struct msm_rpc_endpoint *ept,
179 struct rr_fragment **frag,
180 unsigned len, long timeout);
181
182struct msm_rpc_endpoint *msm_rpcrouter_create_local_endpoint(dev_t dev);
183int msm_rpcrouter_destroy_local_endpoint(struct msm_rpc_endpoint *ept);
184
185int msm_rpcrouter_create_server_cdev(struct rr_server *server);
186int msm_rpcrouter_create_server_pdev(struct rr_server *server);
187
188int msm_rpcrouter_init_devices(void);
189void msm_rpcrouter_exit_devices(void);
190
191extern dev_t msm_rpcrouter_devno;
192extern struct class *msm_rpcrouter_class;
193#endif
diff --git a/drivers/staging/dream/smd/smd_rpcrouter_device.c b/drivers/staging/dream/smd/smd_rpcrouter_device.c
deleted file mode 100644
index e9c28eddce31..000000000000
--- a/drivers/staging/dream/smd/smd_rpcrouter_device.c
+++ /dev/null
@@ -1,377 +0,0 @@
1/* arch/arm/mach-msm/smd_rpcrouter_device.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007-2009 QUALCOMM Incorporated.
5 * Author: San Mehat <san@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/cdev.h>
22#include <linux/init.h>
23#include <linux/device.h>
24#include <linux/types.h>
25#include <linux/delay.h>
26#include <linux/fs.h>
27#include <linux/err.h>
28#include <linux/sched.h>
29#include <linux/poll.h>
30#include <linux/platform_device.h>
31#include <linux/msm_rpcrouter.h>
32#include <linux/slab.h>
33
34#include <asm/uaccess.h>
35#include <asm/byteorder.h>
36
37#include "smd_rpcrouter.h"
38
39#define SAFETY_MEM_SIZE 65536
40
41/* Next minor # available for a remote server */
42static int next_minor = 1;
43
44struct class *msm_rpcrouter_class;
45dev_t msm_rpcrouter_devno;
46
47static struct cdev rpcrouter_cdev;
48static struct device *rpcrouter_device;
49
50static int rpcrouter_open(struct inode *inode, struct file *filp)
51{
52 int rc;
53 struct msm_rpc_endpoint *ept;
54
55 rc = nonseekable_open(inode, filp);
56 if (rc < 0)
57 return rc;
58
59 ept = msm_rpcrouter_create_local_endpoint(inode->i_rdev);
60 if (!ept)
61 return -ENOMEM;
62
63 filp->private_data = ept;
64 return 0;
65}
66
67static int rpcrouter_release(struct inode *inode, struct file *filp)
68{
69 struct msm_rpc_endpoint *ept;
70 ept = (struct msm_rpc_endpoint *) filp->private_data;
71
72 return msm_rpcrouter_destroy_local_endpoint(ept);
73}
74
75static ssize_t rpcrouter_read(struct file *filp, char __user *buf,
76 size_t count, loff_t *ppos)
77{
78 struct msm_rpc_endpoint *ept;
79 struct rr_fragment *frag, *next;
80 int rc;
81
82 ept = (struct msm_rpc_endpoint *) filp->private_data;
83
84 rc = __msm_rpc_read(ept, &frag, count, -1);
85 if (rc < 0)
86 return rc;
87
88 count = rc;
89
90 while (frag != NULL) {
91 if (copy_to_user(buf, frag->data, frag->length)) {
92 printk(KERN_ERR
93 "rpcrouter: could not copy all read data to user!\n");
94 rc = -EFAULT;
95 }
96 buf += frag->length;
97 next = frag->next;
98 kfree(frag);
99 frag = next;
100 }
101
102 return rc;
103}
104
105static ssize_t rpcrouter_write(struct file *filp, const char __user *buf,
106 size_t count, loff_t *ppos)
107{
108 struct msm_rpc_endpoint *ept;
109 int rc = 0;
110 void *k_buffer;
111
112 ept = (struct msm_rpc_endpoint *) filp->private_data;
113
114 /* A check for safety, this seems non-standard */
115 if (count > SAFETY_MEM_SIZE)
116 return -EINVAL;
117
118 k_buffer = kmalloc(count, GFP_KERNEL);
119 if (!k_buffer)
120 return -ENOMEM;
121
122 if (copy_from_user(k_buffer, buf, count)) {
123 rc = -EFAULT;
124 goto write_out_free;
125 }
126
127 rc = msm_rpc_write(ept, k_buffer, count);
128 if (rc < 0)
129 goto write_out_free;
130
131 rc = count;
132write_out_free:
133 kfree(k_buffer);
134 return rc;
135}
136
137static unsigned int rpcrouter_poll(struct file *filp,
138 struct poll_table_struct *wait)
139{
140 struct msm_rpc_endpoint *ept;
141 unsigned mask = 0;
142 ept = (struct msm_rpc_endpoint *) filp->private_data;
143
144 /* If there's data already in the read queue, return POLLIN.
145 * Else, wait for the requested amount of time, and check again.
146 */
147
148 if (!list_empty(&ept->read_q))
149 mask |= POLLIN;
150
151 if (!mask) {
152 poll_wait(filp, &ept->wait_q, wait);
153 if (!list_empty(&ept->read_q))
154 mask |= POLLIN;
155 }
156
157 return mask;
158}
159
160static long rpcrouter_ioctl(struct file *filp, unsigned int cmd,
161 unsigned long arg)
162{
163 struct msm_rpc_endpoint *ept;
164 struct rpcrouter_ioctl_server_args server_args;
165 int rc = 0;
166 uint32_t n;
167
168 ept = (struct msm_rpc_endpoint *) filp->private_data;
169 switch (cmd) {
170
171 case RPC_ROUTER_IOCTL_GET_VERSION:
172 n = RPC_ROUTER_VERSION_V1;
173 rc = put_user(n, (unsigned int *) arg);
174 break;
175
176 case RPC_ROUTER_IOCTL_GET_MTU:
177 /* the pacmark word reduces the actual payload
178 * possible per message
179 */
180 n = RPCROUTER_MSGSIZE_MAX - sizeof(uint32_t);
181 rc = put_user(n, (unsigned int *) arg);
182 break;
183
184 case RPC_ROUTER_IOCTL_REGISTER_SERVER:
185 rc = copy_from_user(&server_args, (void *) arg,
186 sizeof(server_args));
187 if (rc < 0)
188 break;
189 msm_rpc_register_server(ept,
190 server_args.prog,
191 server_args.vers);
192 break;
193
194 case RPC_ROUTER_IOCTL_UNREGISTER_SERVER:
195 rc = copy_from_user(&server_args, (void *) arg,
196 sizeof(server_args));
197 if (rc < 0)
198 break;
199
200 msm_rpc_unregister_server(ept,
201 server_args.prog,
202 server_args.vers);
203 break;
204
205 case RPC_ROUTER_IOCTL_GET_MINOR_VERSION:
206 n = MSM_RPC_GET_MINOR(msm_rpc_get_vers(ept));
207 rc = put_user(n, (unsigned int *)arg);
208 break;
209
210 default:
211 rc = -EINVAL;
212 break;
213 }
214
215 return rc;
216}
217
218static struct file_operations rpcrouter_server_fops = {
219 .owner = THIS_MODULE,
220 .open = rpcrouter_open,
221 .release = rpcrouter_release,
222 .read = rpcrouter_read,
223 .write = rpcrouter_write,
224 .poll = rpcrouter_poll,
225 .unlocked_ioctl = rpcrouter_ioctl,
226};
227
228static struct file_operations rpcrouter_router_fops = {
229 .owner = THIS_MODULE,
230 .open = rpcrouter_open,
231 .release = rpcrouter_release,
232 .read = rpcrouter_read,
233 .write = rpcrouter_write,
234 .poll = rpcrouter_poll,
235 .unlocked_ioctl = rpcrouter_ioctl,
236};
237
238int msm_rpcrouter_create_server_cdev(struct rr_server *server)
239{
240 int rc;
241 uint32_t dev_vers;
242
243 if (next_minor == RPCROUTER_MAX_REMOTE_SERVERS) {
244 printk(KERN_ERR
245 "rpcrouter: Minor numbers exhausted - Increase "
246 "RPCROUTER_MAX_REMOTE_SERVERS\n");
247 return -ENOBUFS;
248 }
249
250#if CONFIG_MSM_AMSS_VERSION >= 6350
251 /* Servers with bit 31 set are remote msm servers with hashkey version.
252 * Servers with bit 31 not set are remote msm servers with
253 * backwards compatible version type in which case the minor number
254 * (lower 16 bits) is set to zero.
255 *
256 */
257 if ((server->vers & RPC_VERSION_MODE_MASK))
258 dev_vers = server->vers;
259 else
260 dev_vers = server->vers & RPC_VERSION_MAJOR_MASK;
261#else
262 dev_vers = server->vers;
263#endif
264
265 server->device_number =
266 MKDEV(MAJOR(msm_rpcrouter_devno), next_minor++);
267
268 server->device =
269 device_create(msm_rpcrouter_class, rpcrouter_device,
270 server->device_number, NULL, "%.8x:%.8x",
271 server->prog, dev_vers);
272 if (IS_ERR(server->device)) {
273 printk(KERN_ERR
274 "rpcrouter: Unable to create device (%ld)\n",
275 PTR_ERR(server->device));
276 return PTR_ERR(server->device);;
277 }
278
279 cdev_init(&server->cdev, &rpcrouter_server_fops);
280 server->cdev.owner = THIS_MODULE;
281
282 rc = cdev_add(&server->cdev, server->device_number, 1);
283 if (rc < 0) {
284 printk(KERN_ERR
285 "rpcrouter: Unable to add chrdev (%d)\n", rc);
286 device_destroy(msm_rpcrouter_class, server->device_number);
287 return rc;
288 }
289 return 0;
290}
291
292/* for backward compatible version type (31st bit cleared)
293 * clearing minor number (lower 16 bits) in device name
294 * is neccessary for driver binding
295 */
296int msm_rpcrouter_create_server_pdev(struct rr_server *server)
297{
298 sprintf(server->pdev_name, "rs%.8x:%.8x",
299 server->prog,
300#if CONFIG_MSM_AMSS_VERSION >= 6350
301 (server->vers & RPC_VERSION_MODE_MASK) ? server->vers :
302 (server->vers & RPC_VERSION_MAJOR_MASK));
303#else
304 server->vers);
305#endif
306
307 server->p_device.base.id = -1;
308 server->p_device.base.name = server->pdev_name;
309
310 server->p_device.prog = server->prog;
311 server->p_device.vers = server->vers;
312
313 platform_device_register(&server->p_device.base);
314 return 0;
315}
316
317int msm_rpcrouter_init_devices(void)
318{
319 int rc;
320 int major;
321
322 /* Create the device nodes */
323 msm_rpcrouter_class = class_create(THIS_MODULE, "oncrpc");
324 if (IS_ERR(msm_rpcrouter_class)) {
325 rc = -ENOMEM;
326 printk(KERN_ERR
327 "rpcrouter: failed to create oncrpc class\n");
328 goto fail;
329 }
330
331 rc = alloc_chrdev_region(&msm_rpcrouter_devno, 0,
332 RPCROUTER_MAX_REMOTE_SERVERS + 1,
333 "oncrpc");
334 if (rc < 0) {
335 printk(KERN_ERR
336 "rpcrouter: Failed to alloc chardev region (%d)\n", rc);
337 goto fail_destroy_class;
338 }
339
340 major = MAJOR(msm_rpcrouter_devno);
341 rpcrouter_device = device_create(msm_rpcrouter_class, NULL,
342 msm_rpcrouter_devno, NULL, "%.8x:%d",
343 0, 0);
344 if (IS_ERR(rpcrouter_device)) {
345 rc = -ENOMEM;
346 goto fail_unregister_cdev_region;
347 }
348
349 cdev_init(&rpcrouter_cdev, &rpcrouter_router_fops);
350 rpcrouter_cdev.owner = THIS_MODULE;
351
352 rc = cdev_add(&rpcrouter_cdev, msm_rpcrouter_devno, 1);
353 if (rc < 0)
354 goto fail_destroy_device;
355
356 return 0;
357
358fail_destroy_device:
359 device_destroy(msm_rpcrouter_class, msm_rpcrouter_devno);
360fail_unregister_cdev_region:
361 unregister_chrdev_region(msm_rpcrouter_devno,
362 RPCROUTER_MAX_REMOTE_SERVERS + 1);
363fail_destroy_class:
364 class_destroy(msm_rpcrouter_class);
365fail:
366 return rc;
367}
368
369void msm_rpcrouter_exit_devices(void)
370{
371 cdev_del(&rpcrouter_cdev);
372 device_destroy(msm_rpcrouter_class, msm_rpcrouter_devno);
373 unregister_chrdev_region(msm_rpcrouter_devno,
374 RPCROUTER_MAX_REMOTE_SERVERS + 1);
375 class_destroy(msm_rpcrouter_class);
376}
377
diff --git a/drivers/staging/dream/smd/smd_rpcrouter_servers.c b/drivers/staging/dream/smd/smd_rpcrouter_servers.c
deleted file mode 100644
index 1b152abb2783..000000000000
--- a/drivers/staging/dream/smd/smd_rpcrouter_servers.c
+++ /dev/null
@@ -1,230 +0,0 @@
1/* arch/arm/mach-msm/rpc_servers.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Iliyan Malchev <ibm@android.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/cdev.h>
22#include <linux/init.h>
23#include <linux/device.h>
24#include <linux/types.h>
25#include <linux/fs.h>
26#include <linux/kthread.h>
27#include <linux/delay.h>
28#include <linux/platform_device.h>
29#include <linux/wakelock.h>
30#include <linux/slab.h>
31
32#include <linux/msm_rpcrouter.h>
33#include <linux/uaccess.h>
34
35#include <mach/msm_rpcrouter.h>
36#include "smd_rpcrouter.h"
37
38static struct msm_rpc_endpoint *endpoint;
39
40#define FLAG_REGISTERED 0x0001
41
42static LIST_HEAD(rpc_server_list);
43static DEFINE_MUTEX(rpc_server_list_lock);
44static int rpc_servers_active;
45static struct wake_lock rpc_servers_wake_lock;
46
47static void rpc_server_register(struct msm_rpc_server *server)
48{
49 int rc;
50 rc = msm_rpc_register_server(endpoint, server->prog, server->vers);
51 if (rc < 0)
52 printk(KERN_ERR "[rpcserver] error registering %p @ %08x:%d\n",
53 server, server->prog, server->vers);
54}
55
56static struct msm_rpc_server *rpc_server_find(uint32_t prog, uint32_t vers)
57{
58 struct msm_rpc_server *server;
59
60 mutex_lock(&rpc_server_list_lock);
61 list_for_each_entry(server, &rpc_server_list, list) {
62 if ((server->prog == prog) &&
63#if CONFIG_MSM_AMSS_VERSION >= 6350
64 msm_rpc_is_compatible_version(server->vers, vers)) {
65#else
66 server->vers == vers) {
67#endif
68 mutex_unlock(&rpc_server_list_lock);
69 return server;
70 }
71 }
72 mutex_unlock(&rpc_server_list_lock);
73 return NULL;
74}
75
76static void rpc_server_register_all(void)
77{
78 struct msm_rpc_server *server;
79
80 mutex_lock(&rpc_server_list_lock);
81 list_for_each_entry(server, &rpc_server_list, list) {
82 if (!(server->flags & FLAG_REGISTERED)) {
83 rpc_server_register(server);
84 server->flags |= FLAG_REGISTERED;
85 }
86 }
87 mutex_unlock(&rpc_server_list_lock);
88}
89
90int msm_rpc_create_server(struct msm_rpc_server *server)
91{
92 /* make sure we're in a sane state first */
93 server->flags = 0;
94 INIT_LIST_HEAD(&server->list);
95
96 mutex_lock(&rpc_server_list_lock);
97 list_add(&server->list, &rpc_server_list);
98 if (rpc_servers_active) {
99 rpc_server_register(server);
100 server->flags |= FLAG_REGISTERED;
101 }
102 mutex_unlock(&rpc_server_list_lock);
103
104 return 0;
105}
106
107static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client,
108 uint32_t xid, uint32_t accept_status)
109{
110 int rc = 0;
111 uint8_t reply_buf[sizeof(struct rpc_reply_hdr)];
112 struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf;
113
114 reply->xid = cpu_to_be32(xid);
115 reply->type = cpu_to_be32(1); /* reply */
116 reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED);
117
118 reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status);
119 reply->data.acc_hdr.verf_flavor = 0;
120 reply->data.acc_hdr.verf_length = 0;
121
122 rc = msm_rpc_write(client, reply_buf, sizeof(reply_buf));
123 if (rc < 0)
124 printk(KERN_ERR
125 "%s: could not write response: %d\n",
126 __FUNCTION__, rc);
127
128 return rc;
129}
130
131static int rpc_servers_thread(void *data)
132{
133 void *buffer;
134 struct rpc_request_hdr *req;
135 struct msm_rpc_server *server;
136 int rc;
137
138 for (;;) {
139 wake_unlock(&rpc_servers_wake_lock);
140 rc = wait_event_interruptible(endpoint->wait_q,
141 !list_empty(&endpoint->read_q));
142 wake_lock(&rpc_servers_wake_lock);
143 rc = msm_rpc_read(endpoint, &buffer, -1, -1);
144 if (rc < 0) {
145 printk(KERN_ERR "%s: could not read: %d\n",
146 __FUNCTION__, rc);
147 break;
148 }
149 req = (struct rpc_request_hdr *)buffer;
150
151 req->type = be32_to_cpu(req->type);
152 req->xid = be32_to_cpu(req->xid);
153 req->rpc_vers = be32_to_cpu(req->rpc_vers);
154 req->prog = be32_to_cpu(req->prog);
155 req->vers = be32_to_cpu(req->vers);
156 req->procedure = be32_to_cpu(req->procedure);
157
158 server = rpc_server_find(req->prog, req->vers);
159
160 if (req->rpc_vers != 2)
161 continue;
162 if (req->type != 0)
163 continue;
164 if (!server) {
165 rpc_send_accepted_void_reply(
166 endpoint, req->xid,
167 RPC_ACCEPTSTAT_PROG_UNAVAIL);
168 continue;
169 }
170
171 rc = server->rpc_call(server, req, rc);
172
173 switch (rc) {
174 case 0:
175 rpc_send_accepted_void_reply(
176 endpoint, req->xid,
177 RPC_ACCEPTSTAT_SUCCESS);
178 break;
179 default:
180 rpc_send_accepted_void_reply(
181 endpoint, req->xid,
182 RPC_ACCEPTSTAT_PROG_UNAVAIL);
183 break;
184 }
185
186 kfree(buffer);
187 }
188
189 do_exit(0);
190}
191
192static int rpcservers_probe(struct platform_device *pdev)
193{
194 struct task_struct *server_thread;
195
196 endpoint = msm_rpc_open();
197 if (IS_ERR(endpoint))
198 return PTR_ERR(endpoint);
199
200 /* we're online -- register any servers installed beforehand */
201 rpc_servers_active = 1;
202 rpc_server_register_all();
203
204 /* start the kernel thread */
205 server_thread = kthread_run(rpc_servers_thread, NULL, "krpcserversd");
206 if (IS_ERR(server_thread))
207 return PTR_ERR(server_thread);
208
209 return 0;
210}
211
212static struct platform_driver rpcservers_driver = {
213 .probe = rpcservers_probe,
214 .driver = {
215 .name = "oncrpc_router",
216 .owner = THIS_MODULE,
217 },
218};
219
220static int __init rpc_servers_init(void)
221{
222 wake_lock_init(&rpc_servers_wake_lock, WAKE_LOCK_SUSPEND, "rpc_server");
223 return platform_driver_register(&rpcservers_driver);
224}
225
226module_init(rpc_servers_init);
227
228MODULE_DESCRIPTION("MSM RPC Servers");
229MODULE_AUTHOR("Iliyan Malchev <ibm@android.com>");
230MODULE_LICENSE("GPL");
diff --git a/drivers/staging/dream/smd/smd_tty.c b/drivers/staging/dream/smd/smd_tty.c
deleted file mode 100644
index f40944958d44..000000000000
--- a/drivers/staging/dream/smd/smd_tty.c
+++ /dev/null
@@ -1,208 +0,0 @@
1/* arch/arm/mach-msm/smd_tty.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/cdev.h>
20#include <linux/device.h>
21#include <linux/wait.h>
22
23#include <linux/tty.h>
24#include <linux/tty_driver.h>
25#include <linux/tty_flip.h>
26
27#include <mach/msm_smd.h>
28
29#define MAX_SMD_TTYS 32
30
31static DEFINE_MUTEX(smd_tty_lock);
32
33struct smd_tty_info {
34 smd_channel_t *ch;
35 struct tty_struct *tty;
36 int open_count;
37};
38
39static struct smd_tty_info smd_tty[MAX_SMD_TTYS];
40
41
42static void smd_tty_notify(void *priv, unsigned event)
43{
44 unsigned char *ptr;
45 int avail;
46 struct smd_tty_info *info = priv;
47 struct tty_struct *tty = info->tty;
48
49 if (!tty)
50 return;
51
52 if (event != SMD_EVENT_DATA)
53 return;
54
55 for (;;) {
56 if (test_bit(TTY_THROTTLED, &tty->flags)) break;
57 avail = smd_read_avail(info->ch);
58 if (avail == 0) break;
59
60 avail = tty_prepare_flip_string(tty, &ptr, avail);
61
62 if (smd_read(info->ch, ptr, avail) != avail) {
63 /* shouldn't be possible since we're in interrupt
64 ** context here and nobody else could 'steal' our
65 ** characters.
66 */
67 printk(KERN_ERR "OOPS - smd_tty_buffer mismatch?!");
68 }
69
70 tty_flip_buffer_push(tty);
71 }
72
73 /* XXX only when writable and necessary */
74 tty_wakeup(tty);
75}
76
77static int smd_tty_open(struct tty_struct *tty, struct file *f)
78{
79 int res = 0;
80 int n = tty->index;
81 struct smd_tty_info *info;
82 const char *name;
83
84 if (n == 0) {
85 name = "SMD_DS";
86 } else if (n == 27) {
87 name = "SMD_GPSNMEA";
88 } else {
89 return -ENODEV;
90 }
91
92 info = smd_tty + n;
93
94 mutex_lock(&smd_tty_lock);
95 tty->driver_data = info;
96
97 if (info->open_count++ == 0) {
98 info->tty = tty;
99 if (info->ch) {
100 smd_kick(info->ch);
101 } else {
102 res = smd_open(name, &info->ch, info, smd_tty_notify);
103 }
104 }
105 mutex_unlock(&smd_tty_lock);
106
107 return res;
108}
109
110static void smd_tty_close(struct tty_struct *tty, struct file *f)
111{
112 struct smd_tty_info *info = tty->driver_data;
113
114 if (info == 0)
115 return;
116
117 mutex_lock(&smd_tty_lock);
118 if (--info->open_count == 0) {
119 info->tty = 0;
120 tty->driver_data = 0;
121 if (info->ch) {
122 smd_close(info->ch);
123 info->ch = 0;
124 }
125 }
126 mutex_unlock(&smd_tty_lock);
127}
128
129static int smd_tty_write(struct tty_struct *tty, const unsigned char *buf, int len)
130{
131 struct smd_tty_info *info = tty->driver_data;
132 int avail;
133
134 /* if we're writing to a packet channel we will
135 ** never be able to write more data than there
136 ** is currently space for
137 */
138 avail = smd_write_avail(info->ch);
139 if (len > avail)
140 len = avail;
141
142 return smd_write(info->ch, buf, len);
143}
144
145static int smd_tty_write_room(struct tty_struct *tty)
146{
147 struct smd_tty_info *info = tty->driver_data;
148 return smd_write_avail(info->ch);
149}
150
151static int smd_tty_chars_in_buffer(struct tty_struct *tty)
152{
153 struct smd_tty_info *info = tty->driver_data;
154 return smd_read_avail(info->ch);
155}
156
157static void smd_tty_unthrottle(struct tty_struct *tty)
158{
159 struct smd_tty_info *info = tty->driver_data;
160 smd_kick(info->ch);
161}
162
163static struct tty_operations smd_tty_ops = {
164 .open = smd_tty_open,
165 .close = smd_tty_close,
166 .write = smd_tty_write,
167 .write_room = smd_tty_write_room,
168 .chars_in_buffer = smd_tty_chars_in_buffer,
169 .unthrottle = smd_tty_unthrottle,
170};
171
172static struct tty_driver *smd_tty_driver;
173
174static int __init smd_tty_init(void)
175{
176 int ret;
177
178 smd_tty_driver = alloc_tty_driver(MAX_SMD_TTYS);
179 if (smd_tty_driver == 0)
180 return -ENOMEM;
181
182 smd_tty_driver->owner = THIS_MODULE;
183 smd_tty_driver->driver_name = "smd_tty_driver";
184 smd_tty_driver->name = "smd";
185 smd_tty_driver->major = 0;
186 smd_tty_driver->minor_start = 0;
187 smd_tty_driver->type = TTY_DRIVER_TYPE_SERIAL;
188 smd_tty_driver->subtype = SERIAL_TYPE_NORMAL;
189 smd_tty_driver->init_termios = tty_std_termios;
190 smd_tty_driver->init_termios.c_iflag = 0;
191 smd_tty_driver->init_termios.c_oflag = 0;
192 smd_tty_driver->init_termios.c_cflag = B38400 | CS8 | CREAD;
193 smd_tty_driver->init_termios.c_lflag = 0;
194 smd_tty_driver->flags = TTY_DRIVER_RESET_TERMIOS |
195 TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
196 tty_set_operations(smd_tty_driver, &smd_tty_ops);
197
198 ret = tty_register_driver(smd_tty_driver);
199 if (ret) return ret;
200
201 /* this should be dynamic */
202 tty_register_device(smd_tty_driver, 0, 0);
203 tty_register_device(smd_tty_driver, 27, 0);
204
205 return 0;
206}
207
208module_init(smd_tty_init);
diff --git a/drivers/staging/dream/synaptics_i2c_rmi.c b/drivers/staging/dream/synaptics_i2c_rmi.c
index d2ca116a1c25..1f020dad6234 100644
--- a/drivers/staging/dream/synaptics_i2c_rmi.c
+++ b/drivers/staging/dream/synaptics_i2c_rmi.c
@@ -109,9 +109,7 @@ static void decode_report(struct synaptics_ts_data *ts, u8 *buf)
109 int f, a; 109 int f, a;
110 int base = 2; 110 int base = 2;
111 int z = buf[1]; 111 int z = buf[1];
112 int w = buf[0] >> 4;
113 int finger = buf[0] & 7; 112 int finger = buf[0] & 7;
114 int finger2_pressed;
115 113
116 for (f = 0; f < 2; f++) { 114 for (f = 0; f < 2; f++) {
117 u32 flip_flag = SYNAPTICS_FLIP_X; 115 u32 flip_flag = SYNAPTICS_FLIP_X;
@@ -151,14 +149,7 @@ static void decode_report(struct synaptics_ts_data *ts, u8 *buf)
151 input_report_abs(ts->input_dev, ABS_Y, pos[0][1]); 149 input_report_abs(ts->input_dev, ABS_Y, pos[0][1]);
152 } 150 }
153 input_report_abs(ts->input_dev, ABS_PRESSURE, z); 151 input_report_abs(ts->input_dev, ABS_PRESSURE, z);
154 input_report_abs(ts->input_dev, ABS_TOOL_WIDTH, w);
155 input_report_key(ts->input_dev, BTN_TOUCH, finger); 152 input_report_key(ts->input_dev, BTN_TOUCH, finger);
156 finger2_pressed = finger > 1 && finger != 7;
157 input_report_key(ts->input_dev, BTN_2, finger2_pressed);
158 if (finger2_pressed) {
159 input_report_abs(ts->input_dev, ABS_HAT0X, pos[1][0]);
160 input_report_abs(ts->input_dev, ABS_HAT0Y, pos[1][1]);
161 }
162 input_sync(ts->input_dev); 153 input_sync(ts->input_dev);
163} 154}
164 155
@@ -208,8 +199,6 @@ static void synaptics_ts_work_func(struct work_struct *work)
208 199
209 decode_report(ts, buf); 200 decode_report(ts, buf);
210 } 201 }
211 if (ts->use_irq)
212 enable_irq(ts->client->irq);
213} 202}
214 203
215static enum hrtimer_restart synaptics_ts_timer_func(struct hrtimer *timer) 204static enum hrtimer_restart synaptics_ts_timer_func(struct hrtimer *timer)
@@ -227,8 +216,7 @@ static irqreturn_t synaptics_ts_irq_handler(int irq, void *dev_id)
227{ 216{
228 struct synaptics_ts_data *ts = dev_id; 217 struct synaptics_ts_data *ts = dev_id;
229 218
230 disable_irq_nosync(ts->client->irq); 219 synaptics_ts_work_func(&ts->work);
231 queue_work(synaptics_wq, &ts->work);
232 return IRQ_HANDLED; 220 return IRQ_HANDLED;
233} 221}
234 222
@@ -347,11 +335,6 @@ static void compute_areas(struct synaptics_ts_data *ts,
347 -inactive_area_top, max_y + inactive_area_bottom, 335 -inactive_area_top, max_y + inactive_area_bottom,
348 fuzz_y, 0); 336 fuzz_y, 0);
349 input_set_abs_params(ts->input_dev, ABS_PRESSURE, 0, 255, fuzz_p, 0); 337 input_set_abs_params(ts->input_dev, ABS_PRESSURE, 0, 255, fuzz_p, 0);
350 input_set_abs_params(ts->input_dev, ABS_TOOL_WIDTH, 0, 15, fuzz_w, 0);
351 input_set_abs_params(ts->input_dev, ABS_HAT0X, -inactive_area_left,
352 max_x + inactive_area_right, fuzz_x, 0);
353 input_set_abs_params(ts->input_dev, ABS_HAT0Y, -inactive_area_top,
354 max_y + inactive_area_bottom, fuzz_y, 0);
355} 338}
356 339
357static struct synaptics_i2c_rmi_platform_data fake_pdata; 340static struct synaptics_i2c_rmi_platform_data fake_pdata;
@@ -487,7 +470,6 @@ static int __devinit synaptics_ts_probe(
487 __set_bit(EV_SYN, ts->input_dev->evbit); 470 __set_bit(EV_SYN, ts->input_dev->evbit);
488 __set_bit(EV_KEY, ts->input_dev->evbit); 471 __set_bit(EV_KEY, ts->input_dev->evbit);
489 __set_bit(BTN_TOUCH, ts->input_dev->keybit); 472 __set_bit(BTN_TOUCH, ts->input_dev->keybit);
490 __set_bit(BTN_2, ts->input_dev->keybit);
491 __set_bit(EV_ABS, ts->input_dev->evbit); 473 __set_bit(EV_ABS, ts->input_dev->evbit);
492 474
493 compute_areas(ts, pdata, max_x, max_y); 475 compute_areas(ts, pdata, max_x, max_y);
@@ -500,8 +482,10 @@ static int __devinit synaptics_ts_probe(
500 goto err_input_register_device_failed; 482 goto err_input_register_device_failed;
501 } 483 }
502 if (client->irq) { 484 if (client->irq) {
503 ret = request_irq(client->irq, synaptics_ts_irq_handler, 485 ret = request_threaded_irq(client->irq, NULL,
504 0, client->name, ts); 486 synaptics_ts_irq_handler,
487 IRQF_TRIGGER_LOW|IRQF_ONESHOT,
488 client->name, ts);
505 if (ret == 0) { 489 if (ret == 0) {
506 ret = i2c_set(ts, 0xf1, 0x01, "enable abs int"); 490 ret = i2c_set(ts, 0xf1, 0x01, "enable abs int");
507 if (ret) 491 if (ret)
@@ -535,6 +519,7 @@ err_input_register_device_failed:
535err_input_dev_alloc_failed: 519err_input_dev_alloc_failed:
536err_detect_failed: 520err_detect_failed:
537err_power_failed: 521err_power_failed:
522 i2c_set_clientdata(client, NULL);
538 kfree(ts); 523 kfree(ts);
539err_alloc_data_failed: 524err_alloc_data_failed:
540err_check_functionality_failed: 525err_check_functionality_failed:
@@ -552,6 +537,7 @@ static int synaptics_ts_remove(struct i2c_client *client)
552 else 537 else
553 hrtimer_cancel(&ts->timer); 538 hrtimer_cancel(&ts->timer);
554 input_unregister_device(ts->input_dev); 539 input_unregister_device(ts->input_dev);
540 i2c_set_clientdata(client, NULL);
555 kfree(ts); 541 kfree(ts);
556 return 0; 542 return 0;
557} 543}
diff --git a/drivers/staging/dt3155/allocator.c b/drivers/staging/dt3155/allocator.c
index db382ef90217..bd5adbc2a238 100644
--- a/drivers/staging/dt3155/allocator.c
+++ b/drivers/staging/dt3155/allocator.c
@@ -45,7 +45,6 @@
45# define MODULE 45# define MODULE
46#endif 46#endif
47 47
48#include <linux/version.h>
49 48
50#include <linux/sched.h> 49#include <linux/sched.h>
51#include <linux/kernel.h> 50#include <linux/kernel.h>
@@ -59,6 +58,8 @@
59 58
60#include <asm/page.h> 59#include <asm/page.h>
61 60
61#include "allocator.h"
62
62/*#define ALL_DEBUG*/ 63/*#define ALL_DEBUG*/
63#define ALL_MSG "allocator: " 64#define ALL_MSG "allocator: "
64 65
@@ -84,9 +85,9 @@
84/*#define PDEBUGG(fmt, args...) printk( KERN_DEBUG ALL_MSG fmt, ## args)*/ 85/*#define PDEBUGG(fmt, args...) printk( KERN_DEBUG ALL_MSG fmt, ## args)*/
85 86
86 87
87int allocator_himem = 1; /* 0 = probe, pos. = megs, neg. = disable */ 88static int allocator_himem = 1; /* 0 = probe, pos. = megs, neg. = disable */
88int allocator_step = 1; /* This is the step size in MB */ 89static int allocator_step = 1; /* This is the step size in MB */
89int allocator_probe = 1; /* This is a flag -- 1=probe, 0=don't probe */ 90static int allocator_probe = 1; /* This is a flag -- 1=probe, 0=don't probe */
90 91
91static unsigned long allocator_buffer; /* physical address */ 92static unsigned long allocator_buffer; /* physical address */
92static unsigned long allocator_buffer_size; /* kilobytes */ 93static unsigned long allocator_buffer_size; /* kilobytes */
@@ -102,8 +103,7 @@ struct allocator_struct {
102 struct allocator_struct *next; 103 struct allocator_struct *next;
103}; 104};
104 105
105struct allocator_struct *allocator_list; 106static struct allocator_struct *allocator_list;
106
107 107
108#ifdef ALL_DEBUG 108#ifdef ALL_DEBUG
109static int dump_list(void) 109static int dump_list(void)
@@ -125,7 +125,7 @@ static int dump_list(void)
125 * be used straight ahead for DMA, but needs remapping for program use). 125 * be used straight ahead for DMA, but needs remapping for program use).
126 */ 126 */
127 127
128unsigned long allocator_allocate_dma(unsigned long kilobytes, int prio) 128unsigned long allocator_allocate_dma(unsigned long kilobytes, gfp_t flags)
129{ 129{
130 struct allocator_struct *ptr = allocator_list, *newptr; 130 struct allocator_struct *ptr = allocator_list, *newptr;
131 unsigned long bytes = kilobytes << 10; 131 unsigned long bytes = kilobytes << 10;
@@ -148,7 +148,7 @@ unsigned long allocator_allocate_dma(unsigned long kilobytes, int prio)
148 PDEBUG("alloc failed\n"); 148 PDEBUG("alloc failed\n");
149 return 0; /* end of list */ 149 return 0; /* end of list */
150 } 150 }
151 newptr = kmalloc(sizeof(struct allocator_struct), prio); 151 newptr = kmalloc(sizeof(struct allocator_struct), flags);
152 if (!newptr) 152 if (!newptr)
153 return 0; 153 return 0;
154 154
diff --git a/drivers/staging/dt3155/allocator.h b/drivers/staging/dt3155/allocator.h
index bdf3268ca52d..425b70fcd500 100644
--- a/drivers/staging/dt3155/allocator.h
+++ b/drivers/staging/dt3155/allocator.h
@@ -22,7 +22,7 @@
22 * 22 *
23 */ 23 */
24 24
25void allocator_free_dma(unsigned long address); 25int allocator_free_dma(unsigned long address);
26unsigned long allocator_allocate_dma(unsigned long kilobytes, int priority); 26unsigned long allocator_allocate_dma(unsigned long kilobytes, gfp_t flags);
27int allocator_init(u32 *); 27int allocator_init(u32 *);
28void allocator_cleanup(void); 28void allocator_cleanup(void);
diff --git a/drivers/staging/dt3155/dt3155.h b/drivers/staging/dt3155/dt3155.h
index 1bf786364eec..793e2fcf4466 100644
--- a/drivers/staging/dt3155/dt3155.h
+++ b/drivers/staging/dt3155/dt3155.h
@@ -34,19 +34,9 @@ MA 02111-1307 USA
34#ifndef _DT3155_INC 34#ifndef _DT3155_INC
35#define _DT3155_INC 35#define _DT3155_INC
36 36
37#ifdef __KERNEL__
38#include <linux/types.h> 37#include <linux/types.h>
39#include <linux/time.h> /* struct timeval */ 38#include <linux/time.h> /* struct timeval */
40#else
41#include <sys/ioctl.h>
42#include <sys/param.h>
43#include <sys/time.h>
44#include <unistd.h>
45#endif
46
47 39
48#define TRUE 1
49#define FALSE 0
50 40
51/* Uncomment this for 50Hz CCIR */ 41/* Uncomment this for 50Hz CCIR */
52#define CCIR 1 42#define CCIR 1
@@ -62,15 +52,15 @@ MA 02111-1307 USA
62#ifdef CCIR 52#ifdef CCIR
63#define DT3155_MAX_ROWS 576 53#define DT3155_MAX_ROWS 576
64#define DT3155_MAX_COLS 768 54#define DT3155_MAX_COLS 768
65#define FORMAT50HZ TRUE 55#define FORMAT50HZ 1
66#else 56#else
67#define DT3155_MAX_ROWS 480 57#define DT3155_MAX_ROWS 480
68#define DT3155_MAX_COLS 640 58#define DT3155_MAX_COLS 640
69#define FORMAT50HZ FALSE 59#define FORMAT50HZ 0
70#endif 60#endif
71 61
72/* Configuration structure */ 62/* Configuration structure */
73struct dt3155_config_s { 63struct dt3155_config {
74 u32 acq_mode; 64 u32 acq_mode;
75 u32 cols, rows; 65 u32 cols, rows;
76 u32 continuous; 66 u32 continuous;
@@ -78,20 +68,20 @@ struct dt3155_config_s {
78 68
79 69
80/* hold data for each frame */ 70/* hold data for each frame */
81typedef struct { 71struct frame_info {
82 u32 addr; /* address of the buffer with the frame */ 72 u32 addr; /* address of the buffer with the frame */
83 u32 tag; /* unique number for the frame */ 73 u32 tag; /* unique number for the frame */
84 struct timeval time; /* time that capture took place */ 74 struct timeval time; /* time that capture took place */
85} frame_info_t; 75};
86 76
87/* 77/*
88 * Structure for interrupt and buffer handling. 78 * Structure for interrupt and buffer handling.
89 * This is the setup for 1 card 79 * This is the setup for 1 card
90 */ 80 */
91struct dt3155_fbuffer_s { 81struct dt3155_fbuffer {
92 int nbuffers; 82 int nbuffers;
93 83
94 frame_info_t frame_info[BOARD_MAX_BUFFS]; 84 struct frame_info frame_info[BOARD_MAX_BUFFS];
95 85
96 int empty_buffers[BOARD_MAX_BUFFS]; /* indexes empty frames */ 86 int empty_buffers[BOARD_MAX_BUFFS]; /* indexes empty frames */
97 int empty_len; /* Number of empty buffers */ 87 int empty_len; /* Number of empty buffers */
@@ -120,20 +110,20 @@ struct dt3155_fbuffer_s {
120#define DT3155_ACQ 2 110#define DT3155_ACQ 2
121 111
122/* There is one status structure for each card. */ 112/* There is one status structure for each card. */
123typedef struct dt3155_status_s { 113struct dt3155_status {
124 int fixed_mode; /* if 1, we are in fixed frame mode */ 114 int fixed_mode; /* if 1, we are in fixed frame mode */
125 u32 reg_addr; /* Register address for a single card */ 115 u32 reg_addr; /* Register address for a single card */
126 u32 mem_addr; /* Buffer start addr for this card */ 116 u32 mem_addr; /* Buffer start addr for this card */
127 u32 mem_size; /* This is the amount of mem available */ 117 u32 mem_size; /* This is the amount of mem available */
128 u32 irq; /* this card's irq */ 118 u32 irq; /* this card's irq */
129 struct dt3155_config_s config; /* configuration struct */ 119 struct dt3155_config config; /* configuration struct */
130 struct dt3155_fbuffer_s fbuffer; /* frame buffer state struct */ 120 struct dt3155_fbuffer fbuffer; /* frame buffer state struct */
131 u32 state; /* this card's state */ 121 u32 state; /* this card's state */
132 u32 device_installed; /* Flag if installed. 1=installed */ 122 u32 device_installed; /* Flag if installed. 1=installed */
133} dt3155_status_t; 123};
134 124
135/* Reference to global status structure */ 125/* Reference to global status structure */
136extern struct dt3155_status_s dt3155_status[MAXBOARDS]; 126extern struct dt3155_status dt3155_status[MAXBOARDS];
137 127
138#define DT3155_STATE_IDLE 0x00 128#define DT3155_STATE_IDLE 0x00
139#define DT3155_STATE_FRAME 0x01 129#define DT3155_STATE_FRAME 0x01
@@ -144,8 +134,8 @@ extern struct dt3155_status_s dt3155_status[MAXBOARDS];
144 134
145#define DT3155_IOC_MAGIC '!' 135#define DT3155_IOC_MAGIC '!'
146 136
147#define DT3155_SET_CONFIG _IOW(DT3155_IOC_MAGIC, 1, struct dt3155_config_s) 137#define DT3155_SET_CONFIG _IOW(DT3155_IOC_MAGIC, 1, struct dt3155_config)
148#define DT3155_GET_CONFIG _IOR(DT3155_IOC_MAGIC, 2, struct dt3155_status_s) 138#define DT3155_GET_CONFIG _IOR(DT3155_IOC_MAGIC, 2, struct dt3155_status)
149#define DT3155_STOP _IO(DT3155_IOC_MAGIC, 3) 139#define DT3155_STOP _IO(DT3155_IOC_MAGIC, 3)
150#define DT3155_START _IO(DT3155_IOC_MAGIC, 4) 140#define DT3155_START _IO(DT3155_IOC_MAGIC, 4)
151#define DT3155_FLUSH _IO(DT3155_IOC_MAGIC, 5) 141#define DT3155_FLUSH _IO(DT3155_IOC_MAGIC, 5)
@@ -160,12 +150,12 @@ extern struct dt3155_status_s dt3155_status[MAXBOARDS];
160#define DT_ERR_MASK 0xff0000/* not used but it might be one day */ 150#define DT_ERR_MASK 0xff0000/* not used but it might be one day */
161 151
162/* User code will probably want to declare one of these for each card */ 152/* User code will probably want to declare one of these for each card */
163typedef struct dt3155_read_s { 153struct dt3155_read {
164 u32 offset; 154 u32 offset;
165 u32 frame_seq; 155 u32 frame_seq;
166 u32 state; 156 u32 state;
167 157
168 frame_info_t frame_info; 158 struct frame_info frame_info;
169} dt3155_read_t; 159};
170 160
171#endif /* _DT3155_inc */ 161#endif /* _DT3155_inc */
diff --git a/drivers/staging/dt3155/dt3155_drv.c b/drivers/staging/dt3155/dt3155_drv.c
index 7ac2c6d8e9a3..40ef97f3feb5 100644
--- a/drivers/staging/dt3155/dt3155_drv.c
+++ b/drivers/staging/dt3155/dt3155_drv.c
@@ -63,6 +63,7 @@ extern void printques(int);
63#include <linux/types.h> 63#include <linux/types.h>
64#include <linux/poll.h> 64#include <linux/poll.h>
65#include <linux/sched.h> 65#include <linux/sched.h>
66#include <linux/smp_lock.h>
66 67
67#include <asm/io.h> 68#include <asm/io.h>
68#include <asm/uaccess.h> 69#include <asm/uaccess.h>
@@ -94,7 +95,7 @@ int dt3155_errno = 0;
94#endif 95#endif
95 96
96/* wait queue for interrupts */ 97/* wait queue for interrupts */
97wait_queue_head_t dt3155_read_wait_queue[ MAXBOARDS ]; 98wait_queue_head_t dt3155_read_wait_queue[MAXBOARDS];
98 99
99#define DT_3155_SUCCESS 0 100#define DT_3155_SUCCESS 0
100#define DT_3155_FAILURE -EIO 101#define DT_3155_FAILURE -EIO
@@ -111,10 +112,10 @@ int dt3155_major = 0;
111/* Global structures and variables */ 112/* Global structures and variables */
112 113
113/* Status of each device */ 114/* Status of each device */
114struct dt3155_status_s dt3155_status[ MAXBOARDS ]; 115struct dt3155_status dt3155_status[MAXBOARDS];
115 116
116/* kernel logical address of the board */ 117/* kernel logical address of the board */
117u8 *dt3155_lbase[ MAXBOARDS ] = { NULL 118u8 *dt3155_lbase[MAXBOARDS] = { NULL
118#if MAXBOARDS == 2 119#if MAXBOARDS == 2
119 , NULL 120 , NULL
120#endif 121#endif
@@ -122,7 +123,7 @@ u8 *dt3155_lbase[ MAXBOARDS ] = { NULL
122/* DT3155 registers */ 123/* DT3155 registers */
123u8 *dt3155_bbase = NULL; /* kernel logical address of the * 124u8 *dt3155_bbase = NULL; /* kernel logical address of the *
124 * buffer region */ 125 * buffer region */
125u32 dt3155_dev_open[ MAXBOARDS ] = {0 126u32 dt3155_dev_open[MAXBOARDS] = {0
126#if MAXBOARDS == 2 127#if MAXBOARDS == 2
127 , 0 128 , 0
128#endif 129#endif
@@ -141,17 +142,17 @@ static void quick_stop (int minor)
141{ 142{
142 // TODO: scott was here 143 // TODO: scott was here
143#if 1 144#if 1
144 ReadMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); 145 ReadMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg);
145 /* disable interrupts */ 146 /* disable interrupts */
146 int_csr_r.fld.FLD_END_EVE_EN = 0; 147 int_csr_r.fld.FLD_END_EVE_EN = 0;
147 int_csr_r.fld.FLD_END_ODD_EN = 0; 148 int_csr_r.fld.FLD_END_ODD_EN = 0;
148 WriteMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); 149 WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg);
149 150
150 dt3155_status[ minor ].state &= ~(DT3155_STATE_STOP|0xff); 151 dt3155_status[minor].state &= ~(DT3155_STATE_STOP|0xff);
151 /* mark the system stopped: */ 152 /* mark the system stopped: */
152 dt3155_status[ minor ].state |= DT3155_STATE_IDLE; 153 dt3155_status[minor].state |= DT3155_STATE_IDLE;
153 dt3155_fbuffer[ minor ]->stop_acquire = 0; 154 dt3155_fbuffer[minor]->stop_acquire = 0;
154 dt3155_fbuffer[ minor ]->even_stopped = 0; 155 dt3155_fbuffer[minor]->even_stopped = 0;
155#else 156#else
156 dt3155_status[minor].state |= DT3155_STATE_STOP; 157 dt3155_status[minor].state |= DT3155_STATE_STOP;
157 dt3155_status[minor].fbuffer.stop_acquire = 1; 158 dt3155_status[minor].fbuffer.stop_acquire = 1;
@@ -167,7 +168,7 @@ static void quick_stop (int minor)
167 * - Assumes irq's are disabled, via SA_INTERRUPT flag 168 * - Assumes irq's are disabled, via SA_INTERRUPT flag
168 * being set in request_irq() call from init_module() 169 * being set in request_irq() call from init_module()
169 *****************************************************/ 170 *****************************************************/
170static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs ) 171static void dt3155_isr(int irq, void *dev_id, struct pt_regs *regs)
171{ 172{
172 int minor = -1; 173 int minor = -1;
173 int index; 174 int index;
@@ -175,8 +176,8 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs )
175 u32 buffer_addr; 176 u32 buffer_addr;
176 177
177 /* find out who issued the interrupt */ 178 /* find out who issued the interrupt */
178 for ( index = 0; index < ndevices; index++ ) { 179 for (index = 0; index < ndevices; index++) {
179 if( dev_id == (void*) &dt3155_status[ index ]) 180 if(dev_id == (void*) &dt3155_status[index])
180 { 181 {
181 minor = index; 182 minor = index;
182 break; 183 break;
@@ -184,15 +185,15 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs )
184 } 185 }
185 186
186 /* hopefully we should not get here */ 187 /* hopefully we should not get here */
187 if ( minor < 0 || minor >= MAXBOARDS ) { 188 if (minor < 0 || minor >= MAXBOARDS) {
188 printk(KERN_ERR "dt3155_isr called with invalid dev_id\n"); 189 printk(KERN_ERR "dt3155_isr called with invalid dev_id\n");
189 return; 190 return;
190 } 191 }
191 192
192 /* Check for corruption and set a flag if so */ 193 /* Check for corruption and set a flag if so */
193 ReadMReg( (dt3155_lbase[ minor ] + CSR1), csr1_r.reg ); 194 ReadMReg((dt3155_lbase[minor] + CSR1), csr1_r.reg);
194 195
195 if ( (csr1_r.fld.FLD_CRPT_EVE) || (csr1_r.fld.FLD_CRPT_ODD) ) 196 if ((csr1_r.fld.FLD_CRPT_EVE) || (csr1_r.fld.FLD_CRPT_ODD))
196 { 197 {
197 /* TODO: this should probably stop acquisition */ 198 /* TODO: this should probably stop acquisition */
198 /* and set some flags so that dt3155_read */ 199 /* and set some flags so that dt3155_read */
@@ -202,27 +203,27 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs )
202 return; 203 return;
203 } 204 }
204 205
205 ReadMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); 206 ReadMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg);
206 207
207 /* Handle the even field ... */ 208 /* Handle the even field ... */
208 if (int_csr_r.fld.FLD_END_EVE) 209 if (int_csr_r.fld.FLD_END_EVE)
209 { 210 {
210 if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE) == 211 if ((dt3155_status[minor].state & DT3155_STATE_MODE) ==
211 DT3155_STATE_FLD ) 212 DT3155_STATE_FLD)
212 { 213 {
213 dt3155_fbuffer[ minor ]->frame_count++; 214 dt3155_fbuffer[minor]->frame_count++;
214 } 215 }
215 216
216 ReadI2C(dt3155_lbase[ minor ], EVEN_CSR, &i2c_even_csr.reg); 217 ReadI2C(dt3155_lbase[minor], EVEN_CSR, &i2c_even_csr.reg);
217 218
218 /* Clear the interrupt? */ 219 /* Clear the interrupt? */
219 int_csr_r.fld.FLD_END_EVE = 1; 220 int_csr_r.fld.FLD_END_EVE = 1;
220 221
221 /* disable the interrupt if last field */ 222 /* disable the interrupt if last field */
222 if (dt3155_fbuffer[ minor ]->stop_acquire) 223 if (dt3155_fbuffer[minor]->stop_acquire)
223 { 224 {
224 printk("dt3155: even stopped.\n"); 225 printk("dt3155: even stopped.\n");
225 dt3155_fbuffer[ minor ]->even_stopped = 1; 226 dt3155_fbuffer[minor]->even_stopped = 1;
226 if (i2c_even_csr.fld.SNGL_EVE) 227 if (i2c_even_csr.fld.SNGL_EVE)
227 { 228 {
228 int_csr_r.fld.FLD_END_EVE_EN = 0; 229 int_csr_r.fld.FLD_END_EVE_EN = 0;
@@ -233,75 +234,75 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs )
233 } 234 }
234 } 235 }
235 236
236 WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); 237 WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg);
237 238
238 /* Set up next DMA if we are doing FIELDS */ 239 /* Set up next DMA if we are doing FIELDS */
239 if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE ) == 240 if ((dt3155_status[minor].state & DT3155_STATE_MODE) ==
240 DT3155_STATE_FLD) 241 DT3155_STATE_FLD)
241 { 242 {
242 /* GCS (Aug 2, 2002) -- In field mode, dma the odd field 243 /* GCS (Aug 2, 2002) -- In field mode, dma the odd field
243 into the lower half of the buffer */ 244 into the lower half of the buffer */
244 const u32 stride = dt3155_status[ minor ].config.cols; 245 const u32 stride = dt3155_status[minor].config.cols;
245 buffer_addr = dt3155_fbuffer[ minor ]-> 246 buffer_addr = dt3155_fbuffer[minor]->
246 frame_info[ dt3155_fbuffer[ minor ]->active_buf ].addr 247 frame_info[dt3155_fbuffer[minor]->active_buf].addr
247 + (DT3155_MAX_ROWS / 2) * stride; 248 + (DT3155_MAX_ROWS / 2) * stride;
248 local_save_flags(flags); 249 local_save_flags(flags);
249 local_irq_disable(); 250 local_irq_disable();
250 wake_up_interruptible( &dt3155_read_wait_queue[ minor ] ); 251 wake_up_interruptible(&dt3155_read_wait_queue[minor]);
251 252
252 /* Set up the DMA address for the next field */ 253 /* Set up the DMA address for the next field */
253 local_irq_restore(flags); 254 local_irq_restore(flags);
254 WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), buffer_addr); 255 WriteMReg((dt3155_lbase[minor] + ODD_DMA_START), buffer_addr);
255 } 256 }
256 257
257 /* Check for errors. */ 258 /* Check for errors. */
258 i2c_even_csr.fld.DONE_EVE = 1; 259 i2c_even_csr.fld.DONE_EVE = 1;
259 if ( i2c_even_csr.fld.ERROR_EVE ) 260 if (i2c_even_csr.fld.ERROR_EVE)
260 dt3155_errno = DT_ERR_OVERRUN; 261 dt3155_errno = DT_ERR_OVERRUN;
261 262
262 WriteI2C( dt3155_lbase[ minor ], EVEN_CSR, i2c_even_csr.reg ); 263 WriteI2C(dt3155_lbase[minor], EVEN_CSR, i2c_even_csr.reg);
263 264
264 /* Note that we actually saw an even field meaning */ 265 /* Note that we actually saw an even field meaning */
265 /* that subsequent odd field complete the frame */ 266 /* that subsequent odd field complete the frame */
266 dt3155_fbuffer[ minor ]->even_happened = 1; 267 dt3155_fbuffer[minor]->even_happened = 1;
267 268
268 /* recording the time that the even field finished, this should be */ 269 /* recording the time that the even field finished, this should be */
269 /* about time in the middle of the frame */ 270 /* about time in the middle of the frame */
270 do_gettimeofday( &(dt3155_fbuffer[ minor ]-> 271 do_gettimeofday(&(dt3155_fbuffer[minor]->
271 frame_info[ dt3155_fbuffer[ minor ]-> 272 frame_info[dt3155_fbuffer[minor]->
272 active_buf ].time) ); 273 active_buf].time));
273 return; 274 return;
274 } 275 }
275 276
276 /* ... now handle the odd field */ 277 /* ... now handle the odd field */
277 if ( int_csr_r.fld.FLD_END_ODD ) 278 if (int_csr_r.fld.FLD_END_ODD)
278 { 279 {
279 ReadI2C( dt3155_lbase[ minor ], ODD_CSR, &i2c_odd_csr.reg ); 280 ReadI2C(dt3155_lbase[minor], ODD_CSR, &i2c_odd_csr.reg);
280 281
281 /* Clear the interrupt? */ 282 /* Clear the interrupt? */
282 int_csr_r.fld.FLD_END_ODD = 1; 283 int_csr_r.fld.FLD_END_ODD = 1;
283 284
284 if (dt3155_fbuffer[ minor ]->even_happened || 285 if (dt3155_fbuffer[minor]->even_happened ||
285 (dt3155_status[ minor ].state & DT3155_STATE_MODE) == 286 (dt3155_status[minor].state & DT3155_STATE_MODE) ==
286 DT3155_STATE_FLD) 287 DT3155_STATE_FLD)
287 { 288 {
288 dt3155_fbuffer[ minor ]->frame_count++; 289 dt3155_fbuffer[minor]->frame_count++;
289 } 290 }
290 291
291 if ( dt3155_fbuffer[ minor ]->stop_acquire && 292 if (dt3155_fbuffer[minor]->stop_acquire &&
292 dt3155_fbuffer[ minor ]->even_stopped ) 293 dt3155_fbuffer[minor]->even_stopped)
293 { 294 {
294 printk(KERN_DEBUG "dt3155: stopping odd..\n"); 295 printk(KERN_DEBUG "dt3155: stopping odd..\n");
295 if ( i2c_odd_csr.fld.SNGL_ODD ) 296 if (i2c_odd_csr.fld.SNGL_ODD)
296 { 297 {
297 /* disable interrupts */ 298 /* disable interrupts */
298 int_csr_r.fld.FLD_END_ODD_EN = 0; 299 int_csr_r.fld.FLD_END_ODD_EN = 0;
299 dt3155_status[ minor ].state &= ~(DT3155_STATE_STOP|0xff); 300 dt3155_status[minor].state &= ~(DT3155_STATE_STOP|0xff);
300 301
301 /* mark the system stopped: */ 302 /* mark the system stopped: */
302 dt3155_status[ minor ].state |= DT3155_STATE_IDLE; 303 dt3155_status[minor].state |= DT3155_STATE_IDLE;
303 dt3155_fbuffer[ minor ]->stop_acquire = 0; 304 dt3155_fbuffer[minor]->stop_acquire = 0;
304 dt3155_fbuffer[ minor ]->even_stopped = 0; 305 dt3155_fbuffer[minor]->even_stopped = 0;
305 306
306 printk(KERN_DEBUG "dt3155: state is now %x\n", 307 printk(KERN_DEBUG "dt3155: state is now %x\n",
307 dt3155_status[minor].state); 308 dt3155_status[minor].state);
@@ -312,104 +313,104 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs )
312 } 313 }
313 } 314 }
314 315
315 WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); 316 WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg);
316 317
317 /* if the odd field has been acquired, then */ 318 /* if the odd field has been acquired, then */
318 /* change the next dma location for both fields */ 319 /* change the next dma location for both fields */
319 /* and wake up the process if sleeping */ 320 /* and wake up the process if sleeping */
320 if ( dt3155_fbuffer[ minor ]->even_happened || 321 if (dt3155_fbuffer[minor]->even_happened ||
321 (dt3155_status[ minor ].state & DT3155_STATE_MODE) == 322 (dt3155_status[minor].state & DT3155_STATE_MODE) ==
322 DT3155_STATE_FLD ) 323 DT3155_STATE_FLD)
323 { 324 {
324 325
325 local_save_flags(flags); 326 local_save_flags(flags);
326 local_irq_disable(); 327 local_irq_disable();
327 328
328#ifdef DEBUG_QUES_B 329#ifdef DEBUG_QUES_B
329 printques( minor ); 330 printques(minor);
330#endif 331#endif
331 if ( dt3155_fbuffer[ minor ]->nbuffers > 2 ) 332 if (dt3155_fbuffer[minor]->nbuffers > 2)
332 { 333 {
333 if ( !are_empty_buffers( minor ) ) 334 if (!are_empty_buffers(minor))
334 { 335 {
335 /* The number of active + locked buffers is 336 /* The number of active + locked buffers is
336 * at most 2, and since there are none empty, there 337 * at most 2, and since there are none empty, there
337 * must be at least nbuffers-2 ready buffers. 338 * must be at least nbuffers-2 ready buffers.
338 * This is where we 'drop frames', oldest first. */ 339 * This is where we 'drop frames', oldest first. */
339 push_empty( pop_ready( minor ), minor ); 340 push_empty(pop_ready(minor), minor);
340 } 341 }
341 342
342 /* The ready_que can't be full, since we know 343 /* The ready_que can't be full, since we know
343 * there is one active buffer right now, so it's safe 344 * there is one active buffer right now, so it's safe
344 * to push the active buf on the ready_que. */ 345 * to push the active buf on the ready_que. */
345 push_ready( minor, dt3155_fbuffer[ minor ]->active_buf ); 346 push_ready(minor, dt3155_fbuffer[minor]->active_buf);
346 /* There's at least 1 empty -- make it active */ 347 /* There's at least 1 empty -- make it active */
347 dt3155_fbuffer[ minor ]->active_buf = pop_empty( minor ); 348 dt3155_fbuffer[minor]->active_buf = pop_empty(minor);
348 dt3155_fbuffer[ minor ]-> 349 dt3155_fbuffer[minor]->
349 frame_info[ dt3155_fbuffer[ minor ]-> 350 frame_info[dt3155_fbuffer[minor]->
350 active_buf ].tag = ++unique_tag; 351 active_buf].tag = ++unique_tag;
351 } 352 }
352 else /* nbuffers == 2, special case */ 353 else /* nbuffers == 2, special case */
353 { /* There is 1 active buffer. 354 { /* There is 1 active buffer.
354 * If there is a locked buffer, keep the active buffer 355 * If there is a locked buffer, keep the active buffer
355 * the same -- that means we drop a frame. 356 * the same -- that means we drop a frame.
356 */ 357 */
357 if ( dt3155_fbuffer[ minor ]->locked_buf < 0 ) 358 if (dt3155_fbuffer[minor]->locked_buf < 0)
358 { 359 {
359 push_ready( minor, 360 push_ready(minor,
360 dt3155_fbuffer[ minor ]->active_buf ); 361 dt3155_fbuffer[minor]->active_buf);
361 if (are_empty_buffers( minor ) ) 362 if (are_empty_buffers(minor))
362 { 363 {
363 dt3155_fbuffer[ minor ]->active_buf = 364 dt3155_fbuffer[minor]->active_buf =
364 pop_empty( minor ); 365 pop_empty(minor);
365 } 366 }
366 else 367 else
367 { /* no empty or locked buffers, so use a readybuf */ 368 { /* no empty or locked buffers, so use a readybuf */
368 dt3155_fbuffer[ minor ]->active_buf = 369 dt3155_fbuffer[minor]->active_buf =
369 pop_ready( minor ); 370 pop_ready(minor);
370 } 371 }
371 } 372 }
372 } 373 }
373 374
374#ifdef DEBUG_QUES_B 375#ifdef DEBUG_QUES_B
375 printques( minor ); 376 printques(minor);
376#endif 377#endif
377 378
378 dt3155_fbuffer[ minor ]->even_happened = 0; 379 dt3155_fbuffer[minor]->even_happened = 0;
379 380
380 wake_up_interruptible( &dt3155_read_wait_queue[ minor ] ); 381 wake_up_interruptible(&dt3155_read_wait_queue[minor]);
381 382
382 local_irq_restore(flags); 383 local_irq_restore(flags);
383 } 384 }
384 385
385 386
386 /* Set up the DMA address for the next frame/field */ 387 /* Set up the DMA address for the next frame/field */
387 buffer_addr = dt3155_fbuffer[ minor ]-> 388 buffer_addr = dt3155_fbuffer[minor]->
388 frame_info[ dt3155_fbuffer[ minor ]->active_buf ].addr; 389 frame_info[dt3155_fbuffer[minor]->active_buf].addr;
389 if ( (dt3155_status[ minor ].state & DT3155_STATE_MODE) == 390 if ((dt3155_status[minor].state & DT3155_STATE_MODE) ==
390 DT3155_STATE_FLD ) 391 DT3155_STATE_FLD)
391 { 392 {
392 WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), buffer_addr); 393 WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START), buffer_addr);
393 } 394 }
394 else 395 else
395 { 396 {
396 WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), buffer_addr); 397 WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START), buffer_addr);
397 398
398 WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), buffer_addr 399 WriteMReg((dt3155_lbase[minor] + ODD_DMA_START), buffer_addr
399 + dt3155_status[ minor ].config.cols); 400 + dt3155_status[minor].config.cols);
400 } 401 }
401 402
402 /* Do error checking */ 403 /* Do error checking */
403 i2c_odd_csr.fld.DONE_ODD = 1; 404 i2c_odd_csr.fld.DONE_ODD = 1;
404 if ( i2c_odd_csr.fld.ERROR_ODD ) 405 if (i2c_odd_csr.fld.ERROR_ODD)
405 dt3155_errno = DT_ERR_OVERRUN; 406 dt3155_errno = DT_ERR_OVERRUN;
406 407
407 WriteI2C(dt3155_lbase[ minor ], ODD_CSR, i2c_odd_csr.reg ); 408 WriteI2C(dt3155_lbase[minor], ODD_CSR, i2c_odd_csr.reg);
408 409
409 return; 410 return;
410 } 411 }
411 /* If we get here, the Odd Field wasn't it either... */ 412 /* If we get here, the Odd Field wasn't it either... */
412 printk( "neither even nor odd. shared perhaps?\n"); 413 printk("neither even nor odd. shared perhaps?\n");
413} 414}
414 415
415/***************************************************** 416/*****************************************************
@@ -420,22 +421,22 @@ static inline void dt3155_isr( int irq, void *dev_id, struct pt_regs *regs )
420 *****************************************************/ 421 *****************************************************/
421static void dt3155_init_isr(int minor) 422static void dt3155_init_isr(int minor)
422{ 423{
423 const u32 stride = dt3155_status[ minor ].config.cols; 424 const u32 stride = dt3155_status[minor].config.cols;
424 425
425 switch (dt3155_status[ minor ].state & DT3155_STATE_MODE) 426 switch (dt3155_status[minor].state & DT3155_STATE_MODE)
426 { 427 {
427 case DT3155_STATE_FLD: 428 case DT3155_STATE_FLD:
428 { 429 {
429 even_dma_start_r = dt3155_status[ minor ]. 430 even_dma_start_r = dt3155_status[minor].
430 fbuffer.frame_info[ dt3155_status[ minor ].fbuffer.active_buf ].addr; 431 fbuffer.frame_info[dt3155_status[minor].fbuffer.active_buf].addr;
431 even_dma_stride_r = 0; 432 even_dma_stride_r = 0;
432 odd_dma_stride_r = 0; 433 odd_dma_stride_r = 0;
433 434
434 WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), 435 WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START),
435 even_dma_start_r); 436 even_dma_start_r);
436 WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_STRIDE), 437 WriteMReg((dt3155_lbase[minor] + EVEN_DMA_STRIDE),
437 even_dma_stride_r); 438 even_dma_stride_r);
438 WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_STRIDE), 439 WriteMReg((dt3155_lbase[minor] + ODD_DMA_STRIDE),
439 odd_dma_stride_r); 440 odd_dma_stride_r);
440 break; 441 break;
441 } 442 }
@@ -443,19 +444,19 @@ static void dt3155_init_isr(int minor)
443 case DT3155_STATE_FRAME: 444 case DT3155_STATE_FRAME:
444 default: 445 default:
445 { 446 {
446 even_dma_start_r = dt3155_status[ minor ]. 447 even_dma_start_r = dt3155_status[minor].
447 fbuffer.frame_info[ dt3155_status[ minor ].fbuffer.active_buf ].addr; 448 fbuffer.frame_info[dt3155_status[minor].fbuffer.active_buf].addr;
448 odd_dma_start_r = even_dma_start_r + stride; 449 odd_dma_start_r = even_dma_start_r + stride;
449 even_dma_stride_r = stride; 450 even_dma_stride_r = stride;
450 odd_dma_stride_r = stride; 451 odd_dma_stride_r = stride;
451 452
452 WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_START), 453 WriteMReg((dt3155_lbase[minor] + EVEN_DMA_START),
453 even_dma_start_r); 454 even_dma_start_r);
454 WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_START), 455 WriteMReg((dt3155_lbase[minor] + ODD_DMA_START),
455 odd_dma_start_r); 456 odd_dma_start_r);
456 WriteMReg((dt3155_lbase[ minor ] + EVEN_DMA_STRIDE), 457 WriteMReg((dt3155_lbase[minor] + EVEN_DMA_STRIDE),
457 even_dma_stride_r); 458 even_dma_stride_r);
458 WriteMReg((dt3155_lbase[ minor ] + ODD_DMA_STRIDE), 459 WriteMReg((dt3155_lbase[minor] + ODD_DMA_STRIDE),
459 odd_dma_stride_r); 460 odd_dma_stride_r);
460 break; 461 break;
461 } 462 }
@@ -464,9 +465,9 @@ static void dt3155_init_isr(int minor)
464 /* 50/60 Hz should be set before this point but let's make sure it is */ 465 /* 50/60 Hz should be set before this point but let's make sure it is */
465 /* right anyway */ 466 /* right anyway */
466 467
467 ReadI2C(dt3155_lbase[ minor ], CSR2, &i2c_csr2.reg); 468 ReadI2C(dt3155_lbase[minor], CSR2, &i2c_csr2.reg);
468 i2c_csr2.fld.HZ50 = FORMAT50HZ; 469 i2c_csr2.fld.HZ50 = FORMAT50HZ;
469 WriteI2C(dt3155_lbase[ minor ], CSR2, i2c_csr2.reg); 470 WriteI2C(dt3155_lbase[minor], CSR2, i2c_csr2.reg);
470 471
471 /* enable busmaster chip, clear flags */ 472 /* enable busmaster chip, clear flags */
472 473
@@ -486,7 +487,7 @@ static void dt3155_init_isr(int minor)
486 csr1_r.fld.FLD_CRPT_EVE = 1; /* writing a 1 clears flags */ 487 csr1_r.fld.FLD_CRPT_EVE = 1; /* writing a 1 clears flags */
487 csr1_r.fld.FLD_CRPT_ODD = 1; 488 csr1_r.fld.FLD_CRPT_ODD = 1;
488 489
489 WriteMReg((dt3155_lbase[ minor ] + CSR1),csr1_r.reg); 490 WriteMReg((dt3155_lbase[minor] + CSR1),csr1_r.reg);
490 491
491 /* Enable interrupts at the end of each field */ 492 /* Enable interrupts at the end of each field */
492 493
@@ -495,14 +496,14 @@ static void dt3155_init_isr(int minor)
495 int_csr_r.fld.FLD_END_ODD_EN = 1; 496 int_csr_r.fld.FLD_END_ODD_EN = 1;
496 int_csr_r.fld.FLD_START_EN = 0; 497 int_csr_r.fld.FLD_START_EN = 0;
497 498
498 WriteMReg((dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg); 499 WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg);
499 500
500 /* start internal BUSY bits */ 501 /* start internal BUSY bits */
501 502
502 ReadI2C(dt3155_lbase[ minor ], CSR2, &i2c_csr2.reg); 503 ReadI2C(dt3155_lbase[minor], CSR2, &i2c_csr2.reg);
503 i2c_csr2.fld.BUSY_ODD = 1; 504 i2c_csr2.fld.BUSY_ODD = 1;
504 i2c_csr2.fld.BUSY_EVE = 1; 505 i2c_csr2.fld.BUSY_EVE = 1;
505 WriteI2C(dt3155_lbase[ minor ], CSR2, i2c_csr2.reg); 506 WriteI2C(dt3155_lbase[minor], CSR2, i2c_csr2.reg);
506 507
507 /* Now its up to the interrupt routine!! */ 508 /* Now its up to the interrupt routine!! */
508 509
@@ -521,7 +522,7 @@ static int dt3155_ioctl(struct inode *inode,
521{ 522{
522 int minor = MINOR(inode->i_rdev); /* What device are we ioctl()'ing? */ 523 int minor = MINOR(inode->i_rdev); /* What device are we ioctl()'ing? */
523 524
524 if ( minor >= MAXBOARDS || minor < 0 ) 525 if (minor >= MAXBOARDS || minor < 0)
525 return -ENODEV; 526 return -ENODEV;
526 527
527 /* make sure it is valid command */ 528 /* make sure it is valid command */
@@ -545,7 +546,7 @@ static int dt3155_ioctl(struct inode *inode,
545 return -EBUSY; 546 return -EBUSY;
546 547
547 { 548 {
548 struct dt3155_config_s tmp; 549 struct dt3155_config tmp;
549 if (copy_from_user((void *)&tmp, (void *) arg, sizeof(tmp))) 550 if (copy_from_user((void *)&tmp, (void *) arg, sizeof(tmp)))
550 return -EFAULT; 551 return -EFAULT;
551 /* check for valid settings */ 552 /* check for valid settings */
@@ -565,7 +566,7 @@ static int dt3155_ioctl(struct inode *inode,
565 case DT3155_GET_CONFIG: 566 case DT3155_GET_CONFIG:
566 { 567 {
567 if (copy_to_user((void *) arg, (void *) &dt3155_status[minor], 568 if (copy_to_user((void *) arg, (void *) &dt3155_status[minor],
568 sizeof(dt3155_status_t) )) 569 sizeof(struct dt3155_status)))
569 return -EFAULT; 570 return -EFAULT;
570 return 0; 571 return 0;
571 } 572 }
@@ -586,7 +587,7 @@ static int dt3155_ioctl(struct inode *inode,
586 587
587 quick_stop(minor); 588 quick_stop(minor);
588 if (copy_to_user((void *) arg, (void *) &dt3155_status[minor], 589 if (copy_to_user((void *) arg, (void *) &dt3155_status[minor],
589 sizeof(dt3155_status_t))) 590 sizeof(struct dt3155_status)))
590 return -EFAULT; 591 return -EFAULT;
591 return 0; 592 return 0;
592 } 593 }
@@ -609,8 +610,8 @@ static int dt3155_ioctl(struct inode *inode,
609 } 610 }
610 611
611 dt3155_init_isr(minor); 612 dt3155_init_isr(minor);
612 if (copy_to_user( (void *) arg, (void *) &dt3155_status[minor], 613 if (copy_to_user((void *) arg, (void *) &dt3155_status[minor],
613 sizeof(dt3155_status_t))) 614 sizeof(struct dt3155_status)))
614 return -EFAULT; 615 return -EFAULT;
615 return 0; 616 return 0;
616 } 617 }
@@ -681,36 +682,36 @@ static int dt3155_mmap (struct file * file, struct vm_area_struct * vma)
681 * MOD_INC_USE_COUNT make sure that the driver memory is not freed 682 * MOD_INC_USE_COUNT make sure that the driver memory is not freed
682 * while the device is in use. 683 * while the device is in use.
683 *****************************************************/ 684 *****************************************************/
684static int dt3155_open( struct inode* inode, struct file* filep) 685static int dt3155_open(struct inode* inode, struct file* filep)
685{ 686{
686 int minor = MINOR(inode->i_rdev); /* what device are we opening? */ 687 int minor = MINOR(inode->i_rdev); /* what device are we opening? */
687 if (dt3155_dev_open[ minor ]) { 688 if (dt3155_dev_open[minor]) {
688 printk ("DT3155: Already opened by another process.\n"); 689 printk ("DT3155: Already opened by another process.\n");
689 return -EBUSY; 690 return -EBUSY;
690 } 691 }
691 692
692 if (dt3155_status[ minor ].device_installed==0) 693 if (dt3155_status[minor].device_installed==0)
693 { 694 {
694 printk("DT3155 Open Error: No such device dt3155 minor number %d\n", 695 printk("DT3155 Open Error: No such device dt3155 minor number %d\n",
695 minor); 696 minor);
696 return -EIO; 697 return -EIO;
697 } 698 }
698 699
699 if (dt3155_status[ minor ].state != DT3155_STATE_IDLE) { 700 if (dt3155_status[minor].state != DT3155_STATE_IDLE) {
700 printk ("DT3155: Not in idle state (state = %x)\n", 701 printk ("DT3155: Not in idle state (state = %x)\n",
701 dt3155_status[ minor ].state); 702 dt3155_status[minor].state);
702 return -EBUSY; 703 return -EBUSY;
703 } 704 }
704 705
705 printk("DT3155: Device opened.\n"); 706 printk("DT3155: Device opened.\n");
706 707
707 dt3155_dev_open[ minor ] = 1 ; 708 dt3155_dev_open[minor] = 1 ;
708 709
709 dt3155_flush( minor ); 710 dt3155_flush(minor);
710 711
711 /* Disable ALL interrupts */ 712 /* Disable ALL interrupts */
712 int_csr_r.reg = 0; 713 int_csr_r.reg = 0;
713 WriteMReg( (dt3155_lbase[ minor ] + INT_CSR), int_csr_r.reg ); 714 WriteMReg((dt3155_lbase[minor] + INT_CSR), int_csr_r.reg);
714 715
715 init_waitqueue_head(&(dt3155_read_wait_queue[minor])); 716 init_waitqueue_head(&(dt3155_read_wait_queue[minor]));
716 717
@@ -724,20 +725,20 @@ static int dt3155_open( struct inode* inode, struct file* filep)
724 * Now decrement the use count. 725 * Now decrement the use count.
725 * 726 *
726 *****************************************************/ 727 *****************************************************/
727static int dt3155_close( struct inode *inode, struct file *filep) 728static int dt3155_close(struct inode *inode, struct file *filep)
728{ 729{
729 int minor; 730 int minor;
730 731
731 minor = MINOR(inode->i_rdev); /* which device are we closing */ 732 minor = MINOR(inode->i_rdev); /* which device are we closing */
732 if (!dt3155_dev_open[ minor ]) 733 if (!dt3155_dev_open[minor])
733 { 734 {
734 printk("DT3155: attempt to CLOSE a not OPEN device\n"); 735 printk("DT3155: attempt to CLOSE a not OPEN device\n");
735 } 736 }
736 else 737 else
737 { 738 {
738 dt3155_dev_open[ minor ] = 0; 739 dt3155_dev_open[minor] = 0;
739 740
740 if (dt3155_status[ minor ].state != DT3155_STATE_IDLE) 741 if (dt3155_status[minor].state != DT3155_STATE_IDLE)
741 { 742 {
742 quick_stop(minor); 743 quick_stop(minor);
743 } 744 }
@@ -756,11 +757,11 @@ static ssize_t dt3155_read(struct file *filep, char __user *buf,
756 int minor = MINOR(filep->f_dentry->d_inode->i_rdev); 757 int minor = MINOR(filep->f_dentry->d_inode->i_rdev);
757 u32 offset; 758 u32 offset;
758 int frame_index; 759 int frame_index;
759 frame_info_t *frame_info_p; 760 struct frame_info *frame_info;
760 761
761 /* TODO: this should check the error flag and */ 762 /* TODO: this should check the error flag and */
762 /* return an error on hardware failures */ 763 /* return an error on hardware failures */
763 if (count != sizeof(dt3155_read_t)) 764 if (count != sizeof(struct dt3155_read))
764 { 765 {
765 printk("DT3155 ERROR (NJC): count is not right\n"); 766 printk("DT3155 ERROR (NJC): count is not right\n");
766 return -EINVAL; 767 return -EINVAL;
@@ -781,7 +782,7 @@ static ssize_t dt3155_read(struct file *filep, char __user *buf,
781 if (filep->f_flags & O_NDELAY) 782 if (filep->f_flags & O_NDELAY)
782 { 783 {
783 if ((frame_index = dt3155_get_ready_buffer(minor)) < 0) { 784 if ((frame_index = dt3155_get_ready_buffer(minor)) < 0) {
784 /*printk( "dt3155: no buffers available (?)\n");*/ 785 /*printk("dt3155: no buffers available (?)\n");*/
785 /* printques(minor); */ 786 /* printques(minor); */
786 return -EAGAIN; 787 return -EAGAIN;
787 } 788 }
@@ -806,21 +807,21 @@ static ssize_t dt3155_read(struct file *filep, char __user *buf,
806 } 807 }
807 } 808 }
808 809
809 frame_info_p = &dt3155_status[minor].fbuffer.frame_info[frame_index]; 810 frame_info = &dt3155_status[minor].fbuffer.frame_info[frame_index];
810 811
811 /* make this an offset */ 812 /* make this an offset */
812 offset = frame_info_p->addr - dt3155_status[minor].mem_addr; 813 offset = frame_info->addr - dt3155_status[minor].mem_addr;
813 814
814 put_user(offset, (unsigned int *) buf); 815 put_user(offset, (unsigned int *) buf);
815 buf += sizeof(u32); 816 buf += sizeof(u32);
816 put_user( dt3155_status[minor].fbuffer.frame_count, (unsigned int *) buf); 817 put_user(dt3155_status[minor].fbuffer.frame_count, (unsigned int *) buf);
817 buf += sizeof(u32); 818 buf += sizeof(u32);
818 put_user(dt3155_status[minor].state, (unsigned int *) buf); 819 put_user(dt3155_status[minor].state, (unsigned int *) buf);
819 buf += sizeof(u32); 820 buf += sizeof(u32);
820 if (copy_to_user(buf, frame_info_p, sizeof(frame_info_t))) 821 if (copy_to_user(buf, frame_info, sizeof(*frame_info)))
821 return -EFAULT; 822 return -EFAULT;
822 823
823 return sizeof(dt3155_read_t); 824 return sizeof(struct dt3155_read);
824} 825}
825 826
826static unsigned int dt3155_poll (struct file * filp, poll_table *wait) 827static unsigned int dt3155_poll (struct file * filp, poll_table *wait)
@@ -835,6 +836,17 @@ static unsigned int dt3155_poll (struct file * filp, poll_table *wait)
835 return 0; 836 return 0;
836} 837}
837 838
839static long
840dt3155_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
841{
842 int ret;
843
844 lock_kernel();
845 ret = dt3155_ioctl(file->f_path.dentry->d_inode, file, cmd, arg);
846 unlock_kernel();
847
848 return ret;
849}
838 850
839/***************************************************** 851/*****************************************************
840 * file operations supported by DT3155 driver 852 * file operations supported by DT3155 driver
@@ -842,12 +854,12 @@ static unsigned int dt3155_poll (struct file * filp, poll_table *wait)
842 * register_chrdev 854 * register_chrdev
843 *****************************************************/ 855 *****************************************************/
844static struct file_operations dt3155_fops = { 856static struct file_operations dt3155_fops = {
845 read: dt3155_read, 857 .read = dt3155_read,
846 ioctl: dt3155_ioctl, 858 .unlocked_ioctl = dt3155_unlocked_ioctl,
847 mmap: dt3155_mmap, 859 .mmap = dt3155_mmap,
848 poll: dt3155_poll, 860 .poll = dt3155_poll,
849 open: dt3155_open, 861 .open = dt3155_open,
850 release: dt3155_close 862 .release = dt3155_close
851}; 863};
852 864
853 865
@@ -889,7 +901,7 @@ static int find_PCI (void)
889 901
890 /* Now, just go out and make sure that this/these device(s) is/are 902 /* Now, just go out and make sure that this/these device(s) is/are
891 actually mapped into the kernel address space */ 903 actually mapped into the kernel address space */
892 if ((error = pci_read_config_dword( pci_dev, PCI_BASE_ADDRESS_0, 904 if ((error = pci_read_config_dword(pci_dev, PCI_BASE_ADDRESS_0,
893 (u32 *) &base))) 905 (u32 *) &base)))
894 { 906 {
895 printk("DT3155: Was not able to find device \n"); 907 printk("DT3155: Was not able to find device \n");
@@ -901,26 +913,26 @@ static int find_PCI (void)
901 913
902 /* Remap the base address to a logical address through which we 914 /* Remap the base address to a logical address through which we
903 * can access it. */ 915 * can access it. */
904 dt3155_lbase[ pci_index - 1 ] = ioremap(base,PCI_PAGE_SIZE); 916 dt3155_lbase[pci_index - 1] = ioremap(base,PCI_PAGE_SIZE);
905 dt3155_status[ pci_index - 1 ].reg_addr = base; 917 dt3155_status[pci_index - 1].reg_addr = base;
906 DT_3155_DEBUG_MSG("DT3155: New logical address is %p \n", 918 DT_3155_DEBUG_MSG("DT3155: New logical address is %p \n",
907 dt3155_lbase[pci_index-1]); 919 dt3155_lbase[pci_index-1]);
908 if ( !dt3155_lbase[pci_index-1] ) 920 if (!dt3155_lbase[pci_index-1])
909 { 921 {
910 printk("DT3155: Unable to remap control registers\n"); 922 printk("DT3155: Unable to remap control registers\n");
911 goto err; 923 goto err;
912 } 924 }
913 925
914 if ( (error = pci_read_config_byte( pci_dev, PCI_INTERRUPT_LINE, &irq)) ) 926 if ((error = pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &irq)))
915 { 927 {
916 printk("DT3155: Was not able to find device \n"); 928 printk("DT3155: Was not able to find device \n");
917 goto err; 929 goto err;
918 } 930 }
919 931
920 DT_3155_DEBUG_MSG("DT3155: IRQ is %d \n",irq); 932 DT_3155_DEBUG_MSG("DT3155: IRQ is %d \n",irq);
921 dt3155_status[ pci_index-1 ].irq = irq; 933 dt3155_status[pci_index-1].irq = irq;
922 /* Set flag: kth device found! */ 934 /* Set flag: kth device found! */
923 dt3155_status[ pci_index-1 ].device_installed = 1; 935 dt3155_status[pci_index-1].device_installed = 1;
924 printk("DT3155: Installing device %d w/irq %d and address %p\n", 936 printk("DT3155: Installing device %d w/irq %d and address %p\n",
925 pci_index, 937 pci_index,
926 dt3155_status[pci_index-1].irq, 938 dt3155_status[pci_index-1].irq,
@@ -945,89 +957,89 @@ int init_module(void)
945{ 957{
946 int index; 958 int index;
947 int rcode = 0; 959 int rcode = 0;
948 char *devname[ MAXBOARDS ]; 960 char *devname[MAXBOARDS];
949 961
950 devname[ 0 ] = "dt3155a"; 962 devname[0] = "dt3155a";
951#if MAXBOARDS == 2 963#if MAXBOARDS == 2
952 devname[ 1 ] = "dt3155b"; 964 devname[1] = "dt3155b";
953#endif 965#endif
954 966
955 printk("DT3155: Loading module...\n"); 967 printk("DT3155: Loading module...\n");
956 968
957 /* Register the device driver */ 969 /* Register the device driver */
958 rcode = register_chrdev( dt3155_major, "dt3155", &dt3155_fops ); 970 rcode = register_chrdev(dt3155_major, "dt3155", &dt3155_fops);
959 if( rcode < 0 ) 971 if(rcode < 0)
960 { 972 {
961 printk( KERN_INFO "DT3155: register_chrdev failed \n"); 973 printk(KERN_INFO "DT3155: register_chrdev failed \n");
962 return rcode; 974 return rcode;
963 } 975 }
964 976
965 if( dt3155_major == 0 ) 977 if(dt3155_major == 0)
966 dt3155_major = rcode; /* dynamic */ 978 dt3155_major = rcode; /* dynamic */
967 979
968 980
969 /* init the status variables. */ 981 /* init the status variables. */
970 /* DMA memory is taken care of in setup_buffers() */ 982 /* DMA memory is taken care of in setup_buffers() */
971 for ( index = 0; index < MAXBOARDS; index++ ) 983 for (index = 0; index < MAXBOARDS; index++)
972 { 984 {
973 dt3155_status[ index ].config.acq_mode = DT3155_MODE_FRAME; 985 dt3155_status[index].config.acq_mode = DT3155_MODE_FRAME;
974 dt3155_status[ index ].config.continuous = DT3155_ACQ; 986 dt3155_status[index].config.continuous = DT3155_ACQ;
975 dt3155_status[ index ].config.cols = DT3155_MAX_COLS; 987 dt3155_status[index].config.cols = DT3155_MAX_COLS;
976 dt3155_status[ index ].config.rows = DT3155_MAX_ROWS; 988 dt3155_status[index].config.rows = DT3155_MAX_ROWS;
977 dt3155_status[ index ].state = DT3155_STATE_IDLE; 989 dt3155_status[index].state = DT3155_STATE_IDLE;
978 990
979 /* find_PCI() will check if devices are installed; */ 991 /* find_PCI() will check if devices are installed; */
980 /* first assume they're not: */ 992 /* first assume they're not: */
981 dt3155_status[ index ].mem_addr = 0; 993 dt3155_status[index].mem_addr = 0;
982 dt3155_status[ index ].mem_size = 0; 994 dt3155_status[index].mem_size = 0;
983 dt3155_status[ index ].state = DT3155_STATE_IDLE; 995 dt3155_status[index].state = DT3155_STATE_IDLE;
984 dt3155_status[ index ].device_installed = 0; 996 dt3155_status[index].device_installed = 0;
985 } 997 }
986 998
987 /* Now let's find the hardware. find_PCI() will set ndevices to the 999 /* Now let's find the hardware. find_PCI() will set ndevices to the
988 * number of cards found in this machine. */ 1000 * number of cards found in this machine. */
989 { 1001 {
990 if ( (rcode = find_PCI()) != DT_3155_SUCCESS ) 1002 if ((rcode = find_PCI()) != DT_3155_SUCCESS)
991 { 1003 {
992 printk("DT3155 error: find_PCI() failed to find dt3155 board(s)\n"); 1004 printk("DT3155 error: find_PCI() failed to find dt3155 board(s)\n");
993 unregister_chrdev( dt3155_major, "dt3155" ); 1005 unregister_chrdev(dt3155_major, "dt3155");
994 return rcode; 1006 return rcode;
995 } 1007 }
996 } 1008 }
997 1009
998 /* Ok, time to setup the frame buffers */ 1010 /* Ok, time to setup the frame buffers */
999 if( (rcode = dt3155_setup_buffers(&allocatorAddr)) < 0 ) 1011 if((rcode = dt3155_setup_buffers(&allocatorAddr)) < 0)
1000 { 1012 {
1001 printk("DT3155: Error: setting up buffer not large enough."); 1013 printk("DT3155: Error: setting up buffer not large enough.");
1002 unregister_chrdev( dt3155_major, "dt3155" ); 1014 unregister_chrdev(dt3155_major, "dt3155");
1003 return rcode; 1015 return rcode;
1004 } 1016 }
1005 1017
1006 /* If we are this far, then there is enough RAM */ 1018 /* If we are this far, then there is enough RAM */
1007 /* for the buffers: Print the configuration. */ 1019 /* for the buffers: Print the configuration. */
1008 for( index = 0; index < ndevices; index++ ) 1020 for( index = 0; index < ndevices; index++)
1009 { 1021 {
1010 printk("DT3155: Device = %d; acq_mode = %d; " 1022 printk("DT3155: Device = %d; acq_mode = %d; "
1011 "continuous = %d; cols = %d; rows = %d;\n", 1023 "continuous = %d; cols = %d; rows = %d;\n",
1012 index , 1024 index ,
1013 dt3155_status[ index ].config.acq_mode, 1025 dt3155_status[index].config.acq_mode,
1014 dt3155_status[ index ].config.continuous, 1026 dt3155_status[index].config.continuous,
1015 dt3155_status[ index ].config.cols, 1027 dt3155_status[index].config.cols,
1016 dt3155_status[ index ].config.rows); 1028 dt3155_status[index].config.rows);
1017 printk("DT3155: m_addr = 0x%x; m_size = %ld; " 1029 printk("DT3155: m_addr = 0x%x; m_size = %ld; "
1018 "state = %d; device_installed = %d\n", 1030 "state = %d; device_installed = %d\n",
1019 dt3155_status[ index ].mem_addr, 1031 dt3155_status[index].mem_addr,
1020 (long int)dt3155_status[ index ].mem_size, 1032 (long int)dt3155_status[index].mem_size,
1021 dt3155_status[ index ].state, 1033 dt3155_status[index].state,
1022 dt3155_status[ index ].device_installed); 1034 dt3155_status[index].device_installed);
1023 } 1035 }
1024 1036
1025 /* Disable ALL interrupts */ 1037 /* Disable ALL interrupts */
1026 int_csr_r.reg = 0; 1038 int_csr_r.reg = 0;
1027 for( index = 0; index < ndevices; index++ ) 1039 for( index = 0; index < ndevices; index++)
1028 { 1040 {
1029 WriteMReg( (dt3155_lbase[ index ] + INT_CSR), int_csr_r.reg ); 1041 WriteMReg((dt3155_lbase[index] + INT_CSR), int_csr_r.reg);
1030 if( dt3155_status[ index ].device_installed ) 1042 if(dt3155_status[index].device_installed)
1031 { 1043 {
1032 /* 1044 /*
1033 * This driver *looks* like it can handle sharing interrupts, 1045 * This driver *looks* like it can handle sharing interrupts,
@@ -1036,14 +1048,14 @@ int init_module(void)
1036 * as a reminder in case any problems arise. (SS) 1048 * as a reminder in case any problems arise. (SS)
1037 */ 1049 */
1038 /* in older kernels flags are: SA_SHIRQ | SA_INTERRUPT */ 1050 /* in older kernels flags are: SA_SHIRQ | SA_INTERRUPT */
1039 rcode = request_irq( dt3155_status[ index ].irq, (void *)dt3155_isr, 1051 rcode = request_irq(dt3155_status[index].irq, (void *)dt3155_isr,
1040 IRQF_SHARED | IRQF_DISABLED, devname[ index ], 1052 IRQF_SHARED | IRQF_DISABLED, devname[index],
1041 (void*) &dt3155_status[index]); 1053 (void*) &dt3155_status[index]);
1042 if( rcode < 0 ) 1054 if(rcode < 0)
1043 { 1055 {
1044 printk("DT3155: minor %d request_irq failed for IRQ %d\n", 1056 printk("DT3155: minor %d request_irq failed for IRQ %d\n",
1045 index, dt3155_status[index].irq); 1057 index, dt3155_status[index].irq);
1046 unregister_chrdev( dt3155_major, "dt3155" ); 1058 unregister_chrdev(dt3155_major, "dt3155");
1047 return rcode; 1059 return rcode;
1048 } 1060 }
1049 } 1061 }
@@ -1072,15 +1084,15 @@ void cleanup_module(void)
1072 allocator_cleanup(); 1084 allocator_cleanup();
1073#endif 1085#endif
1074 1086
1075 unregister_chrdev( dt3155_major, "dt3155" ); 1087 unregister_chrdev(dt3155_major, "dt3155");
1076 1088
1077 for( index = 0; index < ndevices; index++ ) 1089 for(index = 0; index < ndevices; index++)
1078 { 1090 {
1079 if( dt3155_status[ index ].device_installed == 1 ) 1091 if(dt3155_status[index].device_installed == 1)
1080 { 1092 {
1081 printk( "DT3155: Freeing irq %d for device %d\n", 1093 printk("DT3155: Freeing irq %d for device %d\n",
1082 dt3155_status[ index ].irq, index ); 1094 dt3155_status[index].irq, index);
1083 free_irq( dt3155_status[ index ].irq, (void*)&dt3155_status[index] ); 1095 free_irq(dt3155_status[index].irq, (void*)&dt3155_status[index]);
1084 } 1096 }
1085 } 1097 }
1086} 1098}
diff --git a/drivers/staging/dt3155/dt3155_io.c b/drivers/staging/dt3155/dt3155_io.c
index 6b9c68501a61..7792e712d16e 100644
--- a/drivers/staging/dt3155/dt3155_io.c
+++ b/drivers/staging/dt3155/dt3155_io.c
@@ -74,23 +74,22 @@ u8 i2c_pm_lut_data;
74 * wait_ibsyclr() 74 * wait_ibsyclr()
75 * 75 *
76 * This function handles read/write timing and r/w timeout error 76 * This function handles read/write timing and r/w timeout error
77 *
78 * Returns TRUE if NEW_CYCLE clears
79 * Returns FALSE if NEW_CYCLE doesn't clear in roughly 3 msecs, otherwise
80 * returns 0
81 */ 77 */
82static int wait_ibsyclr(u8 *lpReg) 78static int wait_ibsyclr(u8 *lpReg)
83{ 79{
84 /* wait 100 microseconds */ 80 /* wait 100 microseconds */
85 udelay(100L); 81 udelay(100L);
86 /* __delay(loops_per_sec/10000); */ 82 /* __delay(loops_per_sec/10000); */
83
84 ReadMReg(lpReg + IIC_CSR2, iic_csr2_r.reg);
87 if (iic_csr2_r.fld.NEW_CYCLE) { 85 if (iic_csr2_r.fld.NEW_CYCLE) {
88 /* if NEW_CYCLE didn't clear */ 86 /* if NEW_CYCLE didn't clear */
89 /* TIMEOUT ERROR */ 87 /* TIMEOUT ERROR */
90 dt3155_errno = DT_ERR_I2C_TIMEOUT; 88 dt3155_errno = DT_ERR_I2C_TIMEOUT;
91 return FALSE; 89 return -ETIMEDOUT;
92 } else 90 }
93 return TRUE; /* no error */ 91
92 return 0; /* no error */
94} 93}
95 94
96/* 95/*
@@ -101,14 +100,9 @@ static int wait_ibsyclr(u8 *lpReg)
101 * 1st parameter is pointer to 32-bit register base address 100 * 1st parameter is pointer to 32-bit register base address
102 * 2nd parameter is reg. index; 101 * 2nd parameter is reg. index;
103 * 3rd is value to be written 102 * 3rd is value to be written
104 *
105 * Returns TRUE - Successful completion
106 * FALSE - Timeout error - cycle did not complete!
107 */ 103 */
108int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal) 104int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal)
109{ 105{
110 int writestat; /* status for return */
111
112 /* read 32 bit IIC_CSR2 register data into union */ 106 /* read 32 bit IIC_CSR2 register data into union */
113 107
114 ReadMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); 108 ReadMReg((lpReg + IIC_CSR2), iic_csr2_r.reg);
@@ -126,8 +120,7 @@ int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal)
126 WriteMReg((lpReg + IIC_CSR2), iic_csr2_r.reg); 120 WriteMReg((lpReg + IIC_CSR2), iic_csr2_r.reg);
127 121
128 /* wait for IIC cycle to finish */ 122 /* wait for IIC cycle to finish */
129 writestat = wait_ibsyclr(lpReg); 123 return wait_ibsyclr(lpReg);
130 return writestat;
131} 124}
132 125
133/* 126/*
@@ -138,9 +131,6 @@ int WriteI2C(u8 *lpReg, u_short wIregIndex, u8 byVal)
138 * 1st parameter is pointer to 32-bit register base address 131 * 1st parameter is pointer to 32-bit register base address
139 * 2nd parameter is reg. index; 132 * 2nd parameter is reg. index;
140 * 3rd is adrs of value to be read 133 * 3rd is adrs of value to be read
141 *
142 * Returns TRUE - Successful completion
143 * FALSE - Timeout error - cycle did not complete!
144 */ 134 */
145int ReadI2C(u8 *lpReg, u_short wIregIndex, u8 *byVal) 135int ReadI2C(u8 *lpReg, u_short wIregIndex, u8 *byVal)
146{ 136{
diff --git a/drivers/staging/dt3155/dt3155_isr.c b/drivers/staging/dt3155/dt3155_isr.c
index 09d7d9b8272d..33ddc9c057ff 100644
--- a/drivers/staging/dt3155/dt3155_isr.c
+++ b/drivers/staging/dt3155/dt3155_isr.c
@@ -1,7 +1,7 @@
1/* 1/*
2 2
3Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan, 3Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
4 Jason Lapenta, Scott Smedley, Greg Sharp 4 Jason Lapenta, Scott Smedley, Greg Sharp
5 5
6This file is part of the DT3155 Device Driver. 6This file is part of the DT3155 Device Driver.
7 7
@@ -22,7 +22,7 @@ MA 02111-1307 USA
22 22
23 File: dt3155_isr.c 23 File: dt3155_isr.c
24Purpose: Buffer management routines, and other routines for the ISR 24Purpose: Buffer management routines, and other routines for the ISR
25 (the actual isr is in dt3155_drv.c) 25 (the actual isr is in dt3155_drv.c)
26 26
27-- Changes -- 27-- Changes --
28 28
@@ -30,16 +30,16 @@ Purpose: Buffer management routines, and other routines for the ISR
30 ------------------------------------------------------------------- 30 -------------------------------------------------------------------
31 03-Jul-2000 JML n/a 31 03-Jul-2000 JML n/a
32 02-Apr-2002 SS Mods to make work with separate allocator 32 02-Apr-2002 SS Mods to make work with separate allocator
33 module; Merged John Roll's mods to make work with 33 module; Merged John Roll's mods to make work with
34 multiple boards. 34 multiple boards.
35 10-Jul-2002 GCS Complete rewrite of setup_buffers to disallow 35 10-Jul-2002 GCS Complete rewrite of setup_buffers to disallow
36 buffers which span a 4MB boundary. 36 buffers which span a 4MB boundary.
37 24-Jul-2002 SS GPL licence. 37 24-Jul-2002 SS GPL licence.
38 30-Jul-2002 NJC Added support for buffer loop. 38 30-Jul-2002 NJC Added support for buffer loop.
39 31-Jul-2002 NJC Complete rewrite of buffer management 39 31-Jul-2002 NJC Complete rewrite of buffer management
40 02-Aug-2002 NJC Including slab.h instead of malloc.h (no warning). 40 02-Aug-2002 NJC Including slab.h instead of malloc.h (no warning).
41 Also, allocator_init() now returns allocator_max 41 Also, allocator_init() now returns allocator_max
42 so cleaned up allocate_buffers() accordingly. 42 so cleaned up allocate_buffers() accordingly.
43 08-Aug-2005 SS port to 2.6 kernel. 43 08-Aug-2005 SS port to 2.6 kernel.
44 44
45*/ 45*/
@@ -60,7 +60,7 @@ Purpose: Buffer management routines, and other routines for the ISR
60 60
61 61
62/* Pointer into global structure for handling buffers */ 62/* Pointer into global structure for handling buffers */
63struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS] = {NULL 63struct dt3155_fbuffer *dt3155_fbuffer[MAXBOARDS] = {NULL
64#if MAXBOARDS == 2 64#if MAXBOARDS == 2
65 , NULL 65 , NULL
66#endif 66#endif
@@ -77,9 +77,9 @@ struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS] = {NULL
77 * are_empty_buffers 77 * are_empty_buffers
78 * m is minor # of device 78 * m is minor # of device
79 ***************************/ 79 ***************************/
80inline bool are_empty_buffers( int m ) 80bool are_empty_buffers(int m)
81{ 81{
82 return ( dt3155_fbuffer[ m ]->empty_len ); 82 return dt3155_fbuffer[m]->empty_len;
83} 83}
84 84
85/************************** 85/**************************
@@ -92,56 +92,56 @@ inline bool are_empty_buffers( int m )
92 * given by dt3155_fbuffer[m]->empty_buffers[0]. 92 * given by dt3155_fbuffer[m]->empty_buffers[0].
93 * empty_buffers should never fill up, though this is not checked. 93 * empty_buffers should never fill up, though this is not checked.
94 **************************/ 94 **************************/
95inline void push_empty( int index, int m ) 95void push_empty(int index, int m)
96{ 96{
97 dt3155_fbuffer[m]->empty_buffers[ dt3155_fbuffer[m]->empty_len ] = index; 97 dt3155_fbuffer[m]->empty_buffers[dt3155_fbuffer[m]->empty_len] = index;
98 dt3155_fbuffer[m]->empty_len++; 98 dt3155_fbuffer[m]->empty_len++;
99} 99}
100 100
101/************************** 101/**************************
102 * pop_empty( m ) 102 * pop_empty(m)
103 * m is minor # of device 103 * m is minor # of device
104 **************************/ 104 **************************/
105inline int pop_empty( int m ) 105int pop_empty(int m)
106{ 106{
107 dt3155_fbuffer[m]->empty_len--; 107 dt3155_fbuffer[m]->empty_len--;
108 return dt3155_fbuffer[m]->empty_buffers[ dt3155_fbuffer[m]->empty_len ]; 108 return dt3155_fbuffer[m]->empty_buffers[dt3155_fbuffer[m]->empty_len];
109} 109}
110 110
111/************************* 111/*************************
112 * is_ready_buf_empty( m ) 112 * is_ready_buf_empty(m)
113 * m is minor # of device 113 * m is minor # of device
114 *************************/ 114 *************************/
115inline bool is_ready_buf_empty( int m ) 115bool is_ready_buf_empty(int m)
116{ 116{
117 return ((dt3155_fbuffer[ m ]->ready_len) == 0); 117 return ((dt3155_fbuffer[m]->ready_len) == 0);
118} 118}
119 119
120/************************* 120/*************************
121 * is_ready_buf_full( m ) 121 * is_ready_buf_full(m)
122 * m is minor # of device 122 * m is minor # of device
123 * this should *never* be true if there are any active, locked or empty 123 * this should *never* be true if there are any active, locked or empty
124 * buffers, since it corresponds to nbuffers ready buffers!! 124 * buffers, since it corresponds to nbuffers ready buffers!!
125 * 7/31/02: total rewrite. --NJC 125 * 7/31/02: total rewrite. --NJC
126 *************************/ 126 *************************/
127inline bool is_ready_buf_full( int m ) 127bool is_ready_buf_full(int m)
128{ 128{
129 return ( dt3155_fbuffer[ m ]->ready_len == dt3155_fbuffer[ m ]->nbuffers ); 129 return dt3155_fbuffer[m]->ready_len == dt3155_fbuffer[m]->nbuffers;
130} 130}
131 131
132/***************************************************** 132/*****************************************************
133 * push_ready( m, buffer ) 133 * push_ready(m, buffer)
134 * m is minor # of device 134 * m is minor # of device
135 * 135 *
136 *****************************************************/ 136 *****************************************************/
137inline void push_ready( int m, int index ) 137void push_ready(int m, int index)
138{ 138{
139 int head = dt3155_fbuffer[m]->ready_head; 139 int head = dt3155_fbuffer[m]->ready_head;
140 140
141 dt3155_fbuffer[ m ]->ready_que[ head ] = index; 141 dt3155_fbuffer[m]->ready_que[head] = index;
142 dt3155_fbuffer[ m ]->ready_head = ( (head + 1) % 142 dt3155_fbuffer[m]->ready_head = ((head + 1) %
143 (dt3155_fbuffer[ m ]->nbuffers) ); 143 (dt3155_fbuffer[m]->nbuffers));
144 dt3155_fbuffer[ m ]->ready_len++; 144 dt3155_fbuffer[m]->ready_len++;
145 145
146} 146}
147 147
@@ -151,12 +151,12 @@ inline void push_ready( int m, int index )
151 * 151 *
152 * Simply comptutes the tail given the head and the length. 152 * Simply comptutes the tail given the head and the length.
153 *****************************************************/ 153 *****************************************************/
154static inline int get_tail( int m ) 154static int get_tail(int m)
155{ 155{
156 return ((dt3155_fbuffer[ m ]->ready_head - 156 return (dt3155_fbuffer[m]->ready_head -
157 dt3155_fbuffer[ m ]->ready_len + 157 dt3155_fbuffer[m]->ready_len +
158 dt3155_fbuffer[ m ]->nbuffers)% 158 dt3155_fbuffer[m]->nbuffers)%
159 (dt3155_fbuffer[ m ]->nbuffers)); 159 (dt3155_fbuffer[m]->nbuffers);
160} 160}
161 161
162 162
@@ -168,12 +168,12 @@ static inline int get_tail( int m )
168 * This assumes that there is a ready buffer ready... should 168 * This assumes that there is a ready buffer ready... should
169 * be checked (e.g. with is_ready_buf_empty() prior to call. 169 * be checked (e.g. with is_ready_buf_empty() prior to call.
170 *****************************************************/ 170 *****************************************************/
171inline int pop_ready( int m ) 171int pop_ready(int m)
172{ 172{
173 int tail; 173 int tail;
174 tail = get_tail(m); 174 tail = get_tail(m);
175 dt3155_fbuffer[ m ]->ready_len--; 175 dt3155_fbuffer[m]->ready_len--;
176 return dt3155_fbuffer[ m ]->ready_que[ tail ]; 176 return dt3155_fbuffer[m]->ready_que[tail];
177} 177}
178 178
179 179
@@ -181,35 +181,33 @@ inline int pop_ready( int m )
181 * printques 181 * printques
182 * m is minor # of device 182 * m is minor # of device
183 *****************************************************/ 183 *****************************************************/
184inline void printques( int m ) 184void printques(int m)
185{ 185{
186 int head = dt3155_fbuffer[ m ]->ready_head; 186 int head = dt3155_fbuffer[m]->ready_head;
187 int tail; 187 int tail;
188 int num = dt3155_fbuffer[ m ]->nbuffers; 188 int num = dt3155_fbuffer[m]->nbuffers;
189 int frame_index; 189 int frame_index;
190 int index; 190 int index;
191 191
192 tail = get_tail(m); 192 tail = get_tail(m);
193 193
194 printk("\n R:"); 194 printk("\n R:");
195 for ( index = tail; index != head; index++, index = index % (num) ) 195 for (index = tail; index != head; index++, index = index % (num)) {
196 { 196 frame_index = dt3155_fbuffer[m]->ready_que[index];
197 frame_index = dt3155_fbuffer[ m ]->ready_que[ index ]; 197 printk(" %d ", frame_index);
198 printk(" %d ", frame_index );
199 } 198 }
200 199
201 printk("\n E:"); 200 printk("\n E:");
202 for ( index = 0; index < dt3155_fbuffer[ m ]->empty_len; index++ ) 201 for (index = 0; index < dt3155_fbuffer[m]->empty_len; index++) {
203 { 202 frame_index = dt3155_fbuffer[m]->empty_buffers[index];
204 frame_index = dt3155_fbuffer[ m ]->empty_buffers[ index ]; 203 printk(" %d ", frame_index);
205 printk(" %d ", frame_index );
206 } 204 }
207 205
208 frame_index = dt3155_fbuffer[ m ]->active_buf; 206 frame_index = dt3155_fbuffer[m]->active_buf;
209 printk("\n A: %d", frame_index); 207 printk("\n A: %d", frame_index);
210 208
211 frame_index = dt3155_fbuffer[ m ]->locked_buf; 209 frame_index = dt3155_fbuffer[m]->locked_buf;
212 printk("\n L: %d \n", frame_index ); 210 printk("\n L: %d\n", frame_index);
213 211
214} 212}
215 213
@@ -220,11 +218,12 @@ inline void printques( int m )
220 * the start address up to the beginning of the 218 * the start address up to the beginning of the
221 * next 4MB chunk (assuming bufsize < 4MB). 219 * next 4MB chunk (assuming bufsize < 4MB).
222 *****************************************************/ 220 *****************************************************/
223u32 adjust_4MB (u32 buf_addr, u32 bufsize) { 221u32 adjust_4MB(u32 buf_addr, u32 bufsize)
224 if (((buf_addr+bufsize) & UPPER_10_BITS) != (buf_addr & UPPER_10_BITS)) 222{
225 return (buf_addr+bufsize) & UPPER_10_BITS; 223 if (((buf_addr+bufsize) & UPPER_10_BITS) != (buf_addr & UPPER_10_BITS))
226 else 224 return (buf_addr+bufsize) & UPPER_10_BITS;
227 return buf_addr; 225 else
226 return buf_addr;
228} 227}
229 228
230 229
@@ -235,7 +234,7 @@ u32 adjust_4MB (u32 buf_addr, u32 bufsize) {
235 * buffers. If there is not enough free space 234 * buffers. If there is not enough free space
236 * try for less memory. 235 * try for less memory.
237 *****************************************************/ 236 *****************************************************/
238void allocate_buffers (u32 *buf_addr, u32* total_size_kbs, 237void allocate_buffers(u32 *buf_addr, u32* total_size_kbs,
239 u32 bufsize) 238 u32 bufsize)
240{ 239{
241 /* Compute the minimum amount of memory guaranteed to hold all 240 /* Compute the minimum amount of memory guaranteed to hold all
@@ -268,15 +267,15 @@ void allocate_buffers (u32 *buf_addr, u32* total_size_kbs,
268 printk("DT3155: ...but need at least: %d KB\n", min_size_kbs); 267 printk("DT3155: ...but need at least: %d KB\n", min_size_kbs);
269 printk("DT3155: ...the allocator has: %d KB\n", allocator_max); 268 printk("DT3155: ...the allocator has: %d KB\n", allocator_max);
270 size_kbs = (full_size_kbs <= allocator_max ? full_size_kbs : allocator_max); 269 size_kbs = (full_size_kbs <= allocator_max ? full_size_kbs : allocator_max);
271 if (size_kbs > min_size_kbs) { 270 if (size_kbs > min_size_kbs) {
272 if ((*buf_addr = allocator_allocate_dma (size_kbs, GFP_KERNEL)) != 0) { 271 if ((*buf_addr = allocator_allocate_dma(size_kbs, GFP_KERNEL)) != 0) {
273 printk("DT3155: Managed to allocate: %d KB\n", size_kbs); 272 printk("DT3155: Managed to allocate: %d KB\n", size_kbs);
274 *total_size_kbs = size_kbs; 273 *total_size_kbs = size_kbs;
275 return; 274 return;
275 }
276 } 276 }
277 }
278 /* If we got here, the allocation failed */ 277 /* If we got here, the allocation failed */
279 printk ("DT3155: Allocator failed!\n"); 278 printk("DT3155: Allocator failed!\n");
280 *buf_addr = 0; 279 *buf_addr = 0;
281 *total_size_kbs = 0; 280 *total_size_kbs = 0;
282 return; 281 return;
@@ -312,28 +311,26 @@ u32 dt3155_setup_buffers(u32 *allocatorAddr)
312 int m; /* minor # of device, looped for all devs */ 311 int m; /* minor # of device, looped for all devs */
313 312
314 /* zero the fbuffer status and address structure */ 313 /* zero the fbuffer status and address structure */
315 for ( m = 0; m < ndevices; m++) 314 for (m = 0; m < ndevices; m++) {
316 { 315 dt3155_fbuffer[m] = &(dt3155_status[m].fbuffer);
317 dt3155_fbuffer[ m ] = &(dt3155_status[ m ].fbuffer);
318 316
319 /* Make sure the buffering variables are consistent */ 317 /* Make sure the buffering variables are consistent */
320 { 318 {
321 u8 *ptr = (u8 *) dt3155_fbuffer[ m ]; 319 u8 *ptr = (u8 *) dt3155_fbuffer[m];
322 for( index = 0; index < sizeof(struct dt3155_fbuffer_s); index++) 320 for (index = 0; index < sizeof(struct dt3155_fbuffer); index++)
323 *(ptr++)=0; 321 *(ptr++) = 0;
324 } 322 }
325 } 323 }
326 324
327 /* allocate a large contiguous chunk of RAM */ 325 /* allocate a large contiguous chunk of RAM */
328 allocate_buffers (&rambuff_addr, &rambuff_size, bufsize); 326 allocate_buffers(&rambuff_addr, &rambuff_size, bufsize);
329 printk("DT3155: mem info\n"); 327 printk("DT3155: mem info\n");
330 printk(" - rambuf_addr = 0x%x \n", rambuff_addr); 328 printk(" - rambuf_addr = 0x%x\n", rambuff_addr);
331 printk(" - length (kb) = %u \n", rambuff_size); 329 printk(" - length (kb) = %u\n", rambuff_size);
332 if( rambuff_addr == 0 ) 330 if (rambuff_addr == 0) {
333 { 331 printk(KERN_INFO
334 printk( KERN_INFO 332 "DT3155: Error setup_buffers() allocator dma failed\n");
335 "DT3155: Error setup_buffers() allocator dma failed \n" ); 333 return -ENOMEM;
336 return -ENOMEM;
337 } 334 }
338 *allocatorAddr = rambuff_addr; 335 *allocatorAddr = rambuff_addr;
339 rambuff_end = rambuff_addr + 1024 * rambuff_size; 336 rambuff_end = rambuff_addr + 1024 * rambuff_size;
@@ -341,70 +338,68 @@ u32 dt3155_setup_buffers(u32 *allocatorAddr)
341 /* after allocation, we need to count how many useful buffers there 338 /* after allocation, we need to count how many useful buffers there
342 are so we can give an equal number to each device */ 339 are so we can give an equal number to each device */
343 rambuff_acm = rambuff_addr; 340 rambuff_acm = rambuff_addr;
344 for ( index = 0; index < MAXBUFFERS; index++) { 341 for (index = 0; index < MAXBUFFERS; index++) {
345 rambuff_acm = adjust_4MB (rambuff_acm, bufsize);/*avoid spanning 4MB bdry*/ 342 rambuff_acm = adjust_4MB(rambuff_acm, bufsize);/*avoid spanning 4MB bdry*/
346 if (rambuff_acm + bufsize > rambuff_end) 343 if (rambuff_acm + bufsize > rambuff_end)
347 break; 344 break;
348 rambuff_acm += bufsize; 345 rambuff_acm += bufsize;
349 } 346 }
350 /* Following line is OK, will waste buffers if index 347 /* Following line is OK, will waste buffers if index
351 * not evenly divisible by ndevices -NJC*/ 348 * not evenly divisible by ndevices -NJC*/
352 numbufs = index / ndevices; 349 numbufs = index / ndevices;
353 printk(" - numbufs = %u\n", numbufs); 350 printk(" - numbufs = %u\n", numbufs);
354 if (numbufs < 2) { 351 if (numbufs < 2) {
355 printk( KERN_INFO 352 printk(KERN_INFO
356 "DT3155: Error setup_buffers() couldn't allocate 2 bufs/board\n" ); 353 "DT3155: Error setup_buffers() couldn't allocate 2 bufs/board\n");
357 return -ENOMEM; 354 return -ENOMEM;
358 } 355 }
359 356
360 /* now that we have board memory we spit it up */ 357 /* now that we have board memory we spit it up */
361 /* between the boards and the buffers */ 358 /* between the boards and the buffers */
362 rambuff_acm = rambuff_addr; 359 rambuff_acm = rambuff_addr;
363 for ( m = 0; m < ndevices; m ++) 360 for (m = 0; m < ndevices; m++) {
364 { 361 rambuff_acm = adjust_4MB(rambuff_acm, bufsize);
365 rambuff_acm = adjust_4MB (rambuff_acm, bufsize); 362
366 363 /* Save the start of this boards buffer space (for mmap). */
367 /* Save the start of this boards buffer space (for mmap). */ 364 dt3155_status[m].mem_addr = rambuff_acm;
368 dt3155_status[ m ].mem_addr = rambuff_acm; 365
369 366 for (index = 0; index < numbufs; index++) {
370 for (index = 0; index < numbufs; index++) 367 rambuff_acm = adjust_4MB(rambuff_acm, bufsize);
371 { 368 if (rambuff_acm + bufsize > rambuff_end) {
372 rambuff_acm = adjust_4MB (rambuff_acm, bufsize); 369 /* Should never happen */
373 if (rambuff_acm + bufsize > rambuff_end) { 370 printk("DT3155 PROGRAM ERROR (GCS)\n"
374 /* Should never happen */ 371 "Error distributing allocated buffers\n");
375 printk ("DT3155 PROGRAM ERROR (GCS)\n" 372 return -ENOMEM;
376 "Error distributing allocated buffers\n"); 373 }
377 return -ENOMEM; 374
378 } 375 dt3155_fbuffer[m]->frame_info[index].addr = rambuff_acm;
379 376 push_empty(index, m);
380 dt3155_fbuffer[ m ]->frame_info[ index ].addr = rambuff_acm; 377 /* printk(" - Buffer : %lx\n",
381 push_empty( index, m ); 378 * dt3155_fbuffer[m]->frame_info[index].addr);
382 /* printk(" - Buffer : %lx\n", 379 */
383 * dt3155_fbuffer[ m ]->frame_info[ index ].addr ); 380 dt3155_fbuffer[m]->nbuffers += 1;
384 */ 381 rambuff_acm += bufsize;
385 dt3155_fbuffer[ m ]->nbuffers += 1;
386 rambuff_acm += bufsize;
387 } 382 }
388 383
389 /* Make sure there is an active buffer there. */ 384 /* Make sure there is an active buffer there. */
390 dt3155_fbuffer[ m ]->active_buf = pop_empty( m ); 385 dt3155_fbuffer[m]->active_buf = pop_empty(m);
391 dt3155_fbuffer[ m ]->even_happened = 0; 386 dt3155_fbuffer[m]->even_happened = 0;
392 dt3155_fbuffer[ m ]->even_stopped = 0; 387 dt3155_fbuffer[m]->even_stopped = 0;
393 388
394 /* make sure there is no locked_buf JML 2/28/00 */ 389 /* make sure there is no locked_buf JML 2/28/00 */
395 dt3155_fbuffer[ m ]->locked_buf = -1; 390 dt3155_fbuffer[m]->locked_buf = -1;
396 391
397 dt3155_status[ m ].mem_size = 392 dt3155_status[m].mem_size =
398 rambuff_acm - dt3155_status[ m ].mem_addr; 393 rambuff_acm - dt3155_status[m].mem_addr;
399 394
400 /* setup the ready queue */ 395 /* setup the ready queue */
401 dt3155_fbuffer[ m ]->ready_head = 0; 396 dt3155_fbuffer[m]->ready_head = 0;
402 dt3155_fbuffer[ m ]->ready_len = 0; 397 dt3155_fbuffer[m]->ready_len = 0;
403 printk("Available buffers for device %d: %d\n", 398 printk("Available buffers for device %d: %d\n",
404 m, dt3155_fbuffer[ m ]->nbuffers); 399 m, dt3155_fbuffer[m]->nbuffers);
405 } 400 }
406 401
407 return 1; 402 return 1;
408} 403}
409 404
410/***************************************************** 405/*****************************************************
@@ -415,13 +410,12 @@ u32 dt3155_setup_buffers(u32 *allocatorAddr)
415 * 410 *
416 * m is minor number of device 411 * m is minor number of device
417 *****************************************************/ 412 *****************************************************/
418static inline void internal_release_locked_buffer( int m ) 413static void internal_release_locked_buffer(int m)
419{ 414{
420 /* Pointer into global structure for handling buffers */ 415 /* Pointer into global structure for handling buffers */
421 if ( dt3155_fbuffer[ m ]->locked_buf >= 0 ) 416 if (dt3155_fbuffer[m]->locked_buf >= 0) {
422 { 417 push_empty(dt3155_fbuffer[m]->locked_buf, m);
423 push_empty( dt3155_fbuffer[ m ]->locked_buf, m ); 418 dt3155_fbuffer[m]->locked_buf = -1;
424 dt3155_fbuffer[ m ]->locked_buf = -1;
425 } 419 }
426} 420}
427 421
@@ -433,7 +427,7 @@ static inline void internal_release_locked_buffer( int m )
433 * The user function of the above. 427 * The user function of the above.
434 * 428 *
435 *****************************************************/ 429 *****************************************************/
436inline void dt3155_release_locked_buffer( int m ) 430void dt3155_release_locked_buffer(int m)
437{ 431{
438 unsigned long int flags; 432 unsigned long int flags;
439 local_save_flags(flags); 433 local_save_flags(flags);
@@ -448,28 +442,28 @@ inline void dt3155_release_locked_buffer( int m )
448 * m is minor # of device 442 * m is minor # of device
449 * 443 *
450 *****************************************************/ 444 *****************************************************/
451inline int dt3155_flush( int m ) 445int dt3155_flush(int m)
452{ 446{
453 int index; 447 int index;
454 unsigned long int flags; 448 unsigned long int flags;
455 local_save_flags(flags); 449 local_save_flags(flags);
456 local_irq_disable(); 450 local_irq_disable();
457 451
458 internal_release_locked_buffer( m ); 452 internal_release_locked_buffer(m);
459 dt3155_fbuffer[ m ]->empty_len = 0; 453 dt3155_fbuffer[m]->empty_len = 0;
460 454
461 for ( index = 0; index < dt3155_fbuffer[ m ]->nbuffers; index++ ) 455 for (index = 0; index < dt3155_fbuffer[m]->nbuffers; index++)
462 push_empty( index, m ); 456 push_empty(index, m);
463 457
464 /* Make sure there is an active buffer there. */ 458 /* Make sure there is an active buffer there. */
465 dt3155_fbuffer[ m ]->active_buf = pop_empty( m ); 459 dt3155_fbuffer[m]->active_buf = pop_empty(m);
466 460
467 dt3155_fbuffer[ m ]->even_happened = 0; 461 dt3155_fbuffer[m]->even_happened = 0;
468 dt3155_fbuffer[ m ]->even_stopped = 0; 462 dt3155_fbuffer[m]->even_stopped = 0;
469 463
470 /* setup the ready queue */ 464 /* setup the ready queue */
471 dt3155_fbuffer[ m ]->ready_head = 0; 465 dt3155_fbuffer[m]->ready_head = 0;
472 dt3155_fbuffer[ m ]->ready_len = 0; 466 dt3155_fbuffer[m]->ready_len = 0;
473 467
474 local_irq_restore(flags); 468 local_irq_restore(flags);
475 469
@@ -485,7 +479,7 @@ inline int dt3155_flush( int m )
485 * If the user has a buffer locked it will unlock 479 * If the user has a buffer locked it will unlock
486 * that buffer before returning the new one. 480 * that buffer before returning the new one.
487 *****************************************************/ 481 *****************************************************/
488inline int dt3155_get_ready_buffer( int m ) 482int dt3155_get_ready_buffer(int m)
489{ 483{
490 int frame_index; 484 int frame_index;
491 unsigned long int flags; 485 unsigned long int flags;
@@ -493,21 +487,20 @@ inline int dt3155_get_ready_buffer( int m )
493 local_irq_disable(); 487 local_irq_disable();
494 488
495#ifdef DEBUG_QUES_A 489#ifdef DEBUG_QUES_A
496 printques( m ); 490 printques(m);
497#endif 491#endif
498 492
499 internal_release_locked_buffer( m ); 493 internal_release_locked_buffer(m);
500 494
501 if (is_ready_buf_empty( m )) 495 if (is_ready_buf_empty(m))
502 frame_index = -1; 496 frame_index = -1;
503 else 497 else {
504 { 498 frame_index = pop_ready(m);
505 frame_index = pop_ready( m ); 499 dt3155_fbuffer[m]->locked_buf = frame_index;
506 dt3155_fbuffer[ m ]->locked_buf = frame_index;
507 } 500 }
508 501
509#ifdef DEBUG_QUES_B 502#ifdef DEBUG_QUES_B
510 printques( m ); 503 printques(m);
511#endif 504#endif
512 505
513 local_irq_restore(flags); 506 local_irq_restore(flags);
diff --git a/drivers/staging/dt3155/dt3155_isr.h b/drivers/staging/dt3155/dt3155_isr.h
index 7595cb16c988..7d474cf743d8 100644
--- a/drivers/staging/dt3155/dt3155_isr.h
+++ b/drivers/staging/dt3155/dt3155_isr.h
@@ -36,7 +36,7 @@ MA 02111-1307 USA
36#ifndef DT3155_ISR_H 36#ifndef DT3155_ISR_H
37#define DT3155_ISR_H 37#define DT3155_ISR_H
38 38
39extern struct dt3155_fbuffer_s *dt3155_fbuffer[MAXBOARDS]; 39extern struct dt3155_fbuffer *dt3155_fbuffer[MAXBOARDS];
40 40
41/* User functions for buffering */ 41/* User functions for buffering */
42/* Initialize the buffering system. This should */ 42/* Initialize the buffering system. This should */
diff --git a/drivers/staging/dt3155v4l/Kconfig b/drivers/staging/dt3155v4l/Kconfig
new file mode 100644
index 000000000000..5cd5a575b64d
--- /dev/null
+++ b/drivers/staging/dt3155v4l/Kconfig
@@ -0,0 +1,20 @@
1config VIDEO_DT3155
2 tristate "DT3155 frame grabber, Video4Linux interface"
3 depends on PCI && VIDEO_DEV && VIDEO_V4L2
4 select VIDEOBUF_DMA_CONTIG
5 default n
6 ---help---
7 Enables dt3155 device driver for the DataTranslation DT3155 frame grabber.
8 Say Y here if you have this hardware.
9 In doubt, say N.
10
11 To compile this driver as a module, choose M here: the
12 module will be called dt3155v4l.
13
14config DT3155_CCIR
15 bool "Selects CCIR/50Hz vertical refresh"
16 depends on VIDEO_DT3155
17 default y
18 ---help---
19 Select it for CCIR/50Hz (European region),
20 or leave it unselected for RS-170/60Hz (North America).
diff --git a/drivers/staging/dt3155v4l/Makefile b/drivers/staging/dt3155v4l/Makefile
new file mode 100644
index 000000000000..ce7a3ec2faf3
--- /dev/null
+++ b/drivers/staging/dt3155v4l/Makefile
@@ -0,0 +1 @@
obj-$(CONFIG_VIDEO_DT3155) += dt3155v4l.o
diff --git a/drivers/staging/dt3155v4l/dt3155v4l.c b/drivers/staging/dt3155v4l/dt3155v4l.c
new file mode 100644
index 000000000000..6dc3af622848
--- /dev/null
+++ b/drivers/staging/dt3155v4l/dt3155v4l.c
@@ -0,0 +1,1200 @@
1/***************************************************************************
2 * Copyright (C) 2006-2010 by Marin Mitov *
3 * mitov@issp.bas.bg *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21#include <linux/version.h>
22#include <linux/stringify.h>
23#include <linux/delay.h>
24#include <linux/kthread.h>
25#include <media/v4l2-dev.h>
26#include <media/v4l2-ioctl.h>
27#include <media/videobuf-dma-contig.h>
28
29#include "dt3155v4l.h"
30
31#define DT3155_VENDOR_ID 0x8086
32#define DT3155_DEVICE_ID 0x1223
33
34/* DT3155_CHUNK_SIZE is 4M (2^22) 8 full size buffers */
35#define DT3155_CHUNK_SIZE (1U << 22)
36
37#define DT3155_COH_FLAGS (GFP_KERNEL | GFP_DMA32 | __GFP_COLD | __GFP_NOWARN)
38
39#define DT3155_BUF_SIZE (768 * 576)
40
41/* global initializers (for all boards) */
42#ifdef CONFIG_DT3155_CCIR
43static const u8 csr2_init = VT_50HZ;
44#define DT3155_CURRENT_NORM V4L2_STD_625_50
45static const unsigned int img_width = 768;
46static const unsigned int img_height = 576;
47static const unsigned int frames_per_sec = 25;
48static const struct v4l2_fmtdesc frame_std[] = {
49 {
50 .index = 0,
51 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
52 .flags = 0,
53 .description = "CCIR/50Hz 8 bits gray",
54 .pixelformat = V4L2_PIX_FMT_GREY,
55 },
56};
57#else
58static const u8 csr2_init = VT_60HZ;
59#define DT3155_CURRENT_NORM V4L2_STD_525_60
60static const unsigned int img_width = 640;
61static const unsigned int img_height = 480;
62static const unsigned int frames_per_sec = 30;
63static const struct v4l2_fmtdesc frame_std[] = {
64 {
65 .index = 0,
66 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
67 .flags = 0,
68 .description = "RS-170/60Hz 8 bits gray",
69 .pixelformat = V4L2_PIX_FMT_GREY,
70 },
71};
72#endif
73
74#define NUM_OF_FORMATS ARRAY_SIZE(frame_std)
75
76static u8 config_init = ACQ_MODE_EVEN;
77
78/**
79 * read_i2c_reg - reads an internal i2c register
80 *
81 * @addr: dt3155 mmio base address
82 * @index: index (internal address) of register to read
83 * @data: pointer to byte the read data will be placed in
84 *
85 * returns: zero on success or error code
86 *
87 * This function starts reading the specified (by index) register
88 * and busy waits for the process to finish. The result is placed
89 * in a byte pointed by data.
90 */
91static int
92read_i2c_reg(void __iomem *addr, u8 index, u8 *data)
93{
94 u32 tmp = index;
95
96 iowrite32((tmp<<17) | IIC_READ, addr + IIC_CSR2);
97 mmiowb();
98 udelay(45); /* wait at least 43 usec for NEW_CYCLE to clear */
99 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
100 /* error: NEW_CYCLE not cleared */
101 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
102 return -EIO;
103 }
104 tmp = ioread32(addr + IIC_CSR1);
105 if (tmp & DIRECT_ABORT) {
106 /* error: DIRECT_ABORT set */
107 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
108 /* reset DIRECT_ABORT bit */
109 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
110 return -EIO;
111 }
112 *data = tmp>>24;
113 return 0;
114}
115
116/**
117 * write_i2c_reg - writes to an internal i2c register
118 *
119 * @addr: dt3155 mmio base address
120 * @index: index (internal address) of register to read
121 * @data: data to be written
122 *
123 * returns: zero on success or error code
124 *
125 * This function starts writting the specified (by index) register
126 * and busy waits for the process to finish.
127 */
128static int
129write_i2c_reg(void __iomem *addr, u8 index, u8 data)
130{
131 u32 tmp = index;
132
133 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
134 mmiowb();
135 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
136 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
137 /* error: NEW_CYCLE not cleared */
138 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
139 return -EIO;
140 }
141 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
142 /* error: DIRECT_ABORT set */
143 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
144 /* reset DIRECT_ABORT bit */
145 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
146 return -EIO;
147 }
148 return 0;
149}
150
151/**
152 * write_i2c_reg_nowait - writes to an internal i2c register
153 *
154 * @addr: dt3155 mmio base address
155 * @index: index (internal address) of register to read
156 * @data: data to be written
157 *
158 * This function starts writting the specified (by index) register
159 * and then returns.
160 */
161static void write_i2c_reg_nowait(void __iomem *addr, u8 index, u8 data)
162{
163 u32 tmp = index;
164
165 iowrite32((tmp<<17) | IIC_WRITE | data, addr + IIC_CSR2);
166 mmiowb();
167}
168
169/**
170 * wait_i2c_reg - waits the read/write to finish
171 *
172 * @addr: dt3155 mmio base address
173 *
174 * returns: zero on success or error code
175 *
176 * This function waits reading/writting to finish.
177 */
178static int wait_i2c_reg(void __iomem *addr)
179{
180 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE)
181 udelay(65); /* wait at least 63 usec for NEW_CYCLE to clear */
182 if (ioread32(addr + IIC_CSR2) & NEW_CYCLE) {
183 /* error: NEW_CYCLE not cleared */
184 printk(KERN_ERR "dt3155: NEW_CYCLE not cleared\n");
185 return -EIO;
186 }
187 if (ioread32(addr + IIC_CSR1) & DIRECT_ABORT) {
188 /* error: DIRECT_ABORT set */
189 printk(KERN_ERR "dt3155: DIRECT_ABORT set\n");
190 /* reset DIRECT_ABORT bit */
191 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
192 return -EIO;
193 }
194 return 0;
195}
196
197static int
198dt3155_start_acq(struct dt3155_priv *pd)
199{
200 struct videobuf_buffer *vb = pd->curr_buf;
201 dma_addr_t dma_addr;
202
203 dma_addr = videobuf_to_dma_contig(vb);
204 iowrite32(dma_addr, pd->regs + EVEN_DMA_START);
205 iowrite32(dma_addr + vb->width, pd->regs + ODD_DMA_START);
206 iowrite32(vb->width, pd->regs + EVEN_DMA_STRIDE);
207 iowrite32(vb->width, pd->regs + ODD_DMA_STRIDE);
208 /* enable interrupts, clear all irq flags */
209 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
210 FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
211 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
212 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
213 pd->regs + CSR1);
214 wait_i2c_reg(pd->regs);
215 write_i2c_reg(pd->regs, CONFIG, pd->config);
216 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
217 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
218
219 /* start the board */
220 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | BUSY_ODD);
221 return 0; /* success */
222}
223
224static int
225dt3155_stop_acq(struct dt3155_priv *pd)
226{
227 int tmp;
228
229 /* stop the board */
230 wait_i2c_reg(pd->regs);
231 write_i2c_reg(pd->regs, CSR2, pd->csr2);
232
233 /* disable all irqs, clear all irq flags */
234 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
235 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE);
236 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_DONE);
237 tmp = ioread32(pd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
238 if (tmp)
239 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
240 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
241 FLD_DN_ODD | FLD_DN_EVEN | CAP_CONT_EVEN | CAP_CONT_ODD,
242 pd->regs + CSR1);
243 return 0;
244}
245
246/* Locking: Caller holds q->vb_lock */
247static int
248dt3155_buf_setup(struct videobuf_queue *q, unsigned int *count,
249 unsigned int *size)
250{
251 *size = img_width * img_height;
252 return 0;
253}
254
255/* Locking: Caller holds q->vb_lock */
256static int
257dt3155_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
258 enum v4l2_field field)
259{
260 int ret = 0;
261
262 vb->width = img_width;
263 vb->height = img_height;
264 vb->size = img_width * img_height;
265 vb->field = field;
266 if (vb->state == VIDEOBUF_NEEDS_INIT)
267 ret = videobuf_iolock(q, vb, NULL);
268 if (ret) {
269 vb->state = VIDEOBUF_ERROR;
270 printk(KERN_ERR "ERROR: videobuf_iolock() failed\n");
271 videobuf_dma_contig_free(q, vb); /* FIXME: needed? */
272 } else
273 vb->state = VIDEOBUF_PREPARED;
274 return ret;
275}
276
277/* Locking: Caller holds q->vb_lock & q->irqlock */
278static void
279dt3155_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
280{
281 struct dt3155_priv *pd = q->priv_data;
282
283 if (vb->state != VIDEOBUF_NEEDS_INIT) {
284 vb->state = VIDEOBUF_QUEUED;
285 list_add_tail(&vb->queue, &pd->dmaq);
286 wake_up_interruptible_sync(&pd->do_dma);
287 } else
288 vb->state = VIDEOBUF_ERROR;
289}
290
291/* Locking: Caller holds q->vb_lock */
292static void
293dt3155_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
294{
295 if (vb->state == VIDEOBUF_ACTIVE)
296 videobuf_waiton(vb, 0, 0); /* FIXME: cannot be interrupted */
297 videobuf_dma_contig_free(q, vb);
298 vb->state = VIDEOBUF_NEEDS_INIT;
299}
300
301static struct videobuf_queue_ops vbq_ops = {
302 .buf_setup = dt3155_buf_setup,
303 .buf_prepare = dt3155_buf_prepare,
304 .buf_queue = dt3155_buf_queue,
305 .buf_release = dt3155_buf_release,
306};
307
308static irqreturn_t
309dt3155_irq_handler_even(int irq, void *dev_id)
310{
311 struct dt3155_priv *ipd = dev_id;
312 struct videobuf_buffer *ivb;
313 dma_addr_t dma_addr;
314 u32 tmp;
315
316 tmp = ioread32(ipd->regs + INT_CSR) & (FLD_START | FLD_END_ODD);
317 if (!tmp)
318 return IRQ_NONE; /* not our irq */
319 if ((tmp & FLD_START) && !(tmp & FLD_END_ODD)) {
320 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START,
321 ipd->regs + INT_CSR);
322 ipd->field_count++;
323 return IRQ_HANDLED; /* start of field irq */
324 }
325 if ((tmp & FLD_START) && (tmp & FLD_END_ODD)) {
326 if (!ipd->stats.start_before_end++)
327 printk(KERN_ERR "dt3155: irq: START before END\n");
328 }
329 /* check for corrupted fields */
330/* write_i2c_reg(ipd->regs, EVEN_CSR, CSR_ERROR | CSR_DONE); */
331/* write_i2c_reg(ipd->regs, ODD_CSR, CSR_ERROR | CSR_DONE); */
332 tmp = ioread32(ipd->regs + CSR1) & (FLD_CRPT_EVEN | FLD_CRPT_ODD);
333 if (tmp) {
334 if (!ipd->stats.corrupted_fields++)
335 printk(KERN_ERR "dt3155: corrupted field %u\n", tmp);
336 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
337 FLD_DN_ODD | FLD_DN_EVEN |
338 CAP_CONT_EVEN | CAP_CONT_ODD,
339 ipd->regs + CSR1);
340 mmiowb();
341 }
342
343 spin_lock(&ipd->lock);
344 if (ipd->curr_buf && ipd->curr_buf->state == VIDEOBUF_ACTIVE) {
345 if (waitqueue_active(&ipd->curr_buf->done)) {
346 do_gettimeofday(&ipd->curr_buf->ts);
347 ipd->curr_buf->field_count = ipd->field_count;
348 ipd->curr_buf->state = VIDEOBUF_DONE;
349 wake_up(&ipd->curr_buf->done);
350 } else {
351 ivb = ipd->curr_buf;
352 goto load_dma;
353 }
354 } else
355 goto stop_dma;
356 if (list_empty(&ipd->dmaq))
357 goto stop_dma;
358 ivb = list_first_entry(&ipd->dmaq, typeof(*ivb), queue);
359 list_del(&ivb->queue);
360 if (ivb->state == VIDEOBUF_QUEUED) {
361 ivb->state = VIDEOBUF_ACTIVE;
362 ipd->curr_buf = ivb;
363 } else
364 goto stop_dma;
365load_dma:
366 dma_addr = videobuf_to_dma_contig(ivb);
367 iowrite32(dma_addr, ipd->regs + EVEN_DMA_START);
368 iowrite32(dma_addr + ivb->width, ipd->regs + ODD_DMA_START);
369 iowrite32(ivb->width, ipd->regs + EVEN_DMA_STRIDE);
370 iowrite32(ivb->width, ipd->regs + ODD_DMA_STRIDE);
371 mmiowb();
372 /* enable interrupts, clear all irq flags */
373 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
374 FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
375 spin_unlock(&ipd->lock);
376 return IRQ_HANDLED;
377
378stop_dma:
379 ipd->curr_buf = NULL;
380 /* stop the board */
381 write_i2c_reg_nowait(ipd->regs, CSR2, ipd->csr2);
382 /* disable interrupts, clear all irq flags */
383 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, ipd->regs + INT_CSR);
384 spin_unlock(&ipd->lock);
385 return IRQ_HANDLED;
386}
387
388static int
389dt3155_threadfn(void *arg)
390{
391 struct dt3155_priv *pd = arg;
392 struct videobuf_buffer *vb;
393 unsigned long flags;
394
395 while (1) {
396 wait_event_interruptible(pd->do_dma,
397 kthread_should_stop() || !list_empty(&pd->dmaq));
398 if (kthread_should_stop())
399 break;
400
401 spin_lock_irqsave(&pd->lock, flags);
402 if (pd->curr_buf) /* dma is active */
403 goto done;
404 if (list_empty(&pd->dmaq)) /* no empty biffers */
405 goto done;
406 vb = list_first_entry(&pd->dmaq, typeof(*vb), queue);
407 list_del(&vb->queue);
408 if (vb->state == VIDEOBUF_QUEUED) {
409 vb->state = VIDEOBUF_ACTIVE;
410 pd->curr_buf = vb;
411 spin_unlock_irqrestore(&pd->lock, flags);
412 /* start dma */
413 dt3155_start_acq(pd);
414 continue;
415 } else
416 printk(KERN_DEBUG "%s(): This is a BUG\n", __func__);
417done:
418 spin_unlock_irqrestore(&pd->lock, flags);
419 }
420 return 0;
421}
422
423static int
424dt3155_open(struct file *filp)
425{
426 int ret = 0;
427 struct dt3155_priv *pd = video_drvdata(filp);
428
429 printk(KERN_INFO "dt3155: open(): minor: %i\n", pd->vdev->minor);
430
431 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
432 return -ERESTARTSYS;
433 if (!pd->users) {
434 pd->vidq = kzalloc(sizeof(*pd->vidq), GFP_KERNEL);
435 if (!pd->vidq) {
436 printk(KERN_ERR "dt3155: error: alloc queue\n");
437 ret = -ENOMEM;
438 goto err_alloc_queue;
439 }
440 videobuf_queue_dma_contig_init(pd->vidq, &vbq_ops,
441 &pd->pdev->dev, &pd->lock,
442 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE,
443 sizeof(struct videobuf_buffer), pd);
444 /* disable all irqs, clear all irq flags */
445 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD,
446 pd->regs + INT_CSR);
447 pd->irq_handler = dt3155_irq_handler_even;
448 ret = request_irq(pd->pdev->irq, pd->irq_handler,
449 IRQF_SHARED, DT3155_NAME, pd);
450 if (ret) {
451 printk(KERN_ERR "dt3155: error: request_irq\n");
452 goto err_request_irq;
453 }
454 pd->curr_buf = NULL;
455 pd->thread = kthread_run(dt3155_threadfn, pd,
456 "dt3155_thread_%i", pd->vdev->minor);
457 if (IS_ERR(pd->thread)) {
458 printk(KERN_ERR "dt3155: kthread_run() failed\n");
459 ret = PTR_ERR(pd->thread);
460 goto err_thread;
461 }
462 pd->field_count = 0;
463 }
464 pd->users++;
465 goto done;
466err_thread:
467 free_irq(pd->pdev->irq, pd);
468err_request_irq:
469 kfree(pd->vidq);
470 pd->vidq = NULL;
471err_alloc_queue:
472done:
473 mutex_unlock(&pd->mux);
474 return ret;
475}
476
477static int
478dt3155_release(struct file *filp)
479{
480 struct dt3155_priv *pd = video_drvdata(filp);
481 struct videobuf_buffer *tmp;
482 unsigned long flags;
483 int ret = 0;
484
485 printk(KERN_INFO "dt3155: release(): minor: %i\n", pd->vdev->minor);
486
487 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
488 return -ERESTARTSYS;
489 pd->users--;
490 BUG_ON(pd->users < 0);
491 if (pd->acq_fp == filp) {
492 spin_lock_irqsave(&pd->lock, flags);
493 INIT_LIST_HEAD(&pd->dmaq); /* queue is emptied */
494 tmp = pd->curr_buf;
495 spin_unlock_irqrestore(&pd->lock, flags);
496 if (tmp)
497 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
498 dt3155_stop_acq(pd);
499 videobuf_stop(pd->vidq);
500 pd->acq_fp = NULL;
501 pd->streaming = 0;
502 }
503 if (!pd->users) {
504 kthread_stop(pd->thread);
505 free_irq(pd->pdev->irq, pd);
506 kfree(pd->vidq);
507 pd->vidq = NULL;
508 }
509 mutex_unlock(&pd->mux);
510 return ret;
511}
512
513static ssize_t
514dt3155_read(struct file *filp, char __user *user, size_t size, loff_t *loff)
515{
516 struct dt3155_priv *pd = video_drvdata(filp);
517 int ret;
518
519 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
520 return -ERESTARTSYS;
521 if (!pd->acq_fp) {
522 pd->acq_fp = filp;
523 pd->streaming = 0;
524 } else if (pd->acq_fp != filp) {
525 ret = -EBUSY;
526 goto done;
527 } else if (pd->streaming == 1) {
528 ret = -EINVAL;
529 goto done;
530 }
531 ret = videobuf_read_stream(pd->vidq, user, size, loff, 0,
532 filp->f_flags & O_NONBLOCK);
533done:
534 mutex_unlock(&pd->mux);
535 return ret;
536}
537
538static unsigned int
539dt3155_poll(struct file *filp, struct poll_table_struct *polltbl)
540{
541 struct dt3155_priv *pd = video_drvdata(filp);
542
543 return videobuf_poll_stream(filp, pd->vidq, polltbl);
544}
545
546static int
547dt3155_mmap(struct file *filp, struct vm_area_struct *vma)
548{
549 struct dt3155_priv *pd = video_drvdata(filp);
550
551 return videobuf_mmap_mapper(pd->vidq, vma);
552}
553
554static const struct v4l2_file_operations dt3155_fops = {
555 .owner = THIS_MODULE,
556 .open = dt3155_open,
557 .release = dt3155_release,
558 .read = dt3155_read,
559 .poll = dt3155_poll,
560 .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
561 .mmap = dt3155_mmap,
562};
563
564static int
565dt3155_ioc_streamon(struct file *filp, void *p, enum v4l2_buf_type type)
566{
567 struct dt3155_priv *pd = video_drvdata(filp);
568 int ret = -ERESTARTSYS;
569
570 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
571 return ret;
572 if (!pd->acq_fp) {
573 ret = videobuf_streamon(pd->vidq);
574 if (ret)
575 goto unlock;
576 pd->acq_fp = filp;
577 pd->streaming = 1;
578 wake_up_interruptible_sync(&pd->do_dma);
579 } else if (pd->acq_fp == filp) {
580 pd->streaming = 1;
581 ret = videobuf_streamon(pd->vidq);
582 if (!ret)
583 wake_up_interruptible_sync(&pd->do_dma);
584 } else
585 ret = -EBUSY;
586unlock:
587 mutex_unlock(&pd->mux);
588 return ret;
589}
590
591static int
592dt3155_ioc_streamoff(struct file *filp, void *p, enum v4l2_buf_type type)
593{
594 struct dt3155_priv *pd = video_drvdata(filp);
595 struct videobuf_buffer *tmp;
596 unsigned long flags;
597 int ret;
598
599 ret = videobuf_streamoff(pd->vidq);
600 if (ret)
601 return ret;
602 spin_lock_irqsave(&pd->lock, flags);
603 tmp = pd->curr_buf;
604 spin_unlock_irqrestore(&pd->lock, flags);
605 if (tmp)
606 videobuf_waiton(tmp, 0, 1); /* block, interruptible */
607 return ret;
608}
609
610static int
611dt3155_ioc_querycap(struct file *filp, void *p, struct v4l2_capability *cap)
612{
613 struct dt3155_priv *pd = video_drvdata(filp);
614
615 strcpy(cap->driver, DT3155_NAME);
616 strcpy(cap->card, DT3155_NAME " frame grabber");
617 sprintf(cap->bus_info, "PCI:%s", pci_name(pd->pdev));
618 cap->version =
619 KERNEL_VERSION(DT3155_VER_MAJ, DT3155_VER_MIN, DT3155_VER_EXT);
620 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
621 V4L2_CAP_STREAMING |
622 V4L2_CAP_READWRITE;
623 return 0;
624}
625
626static int
627dt3155_ioc_enum_fmt_vid_cap(struct file *filp, void *p, struct v4l2_fmtdesc *f)
628{
629 if (f->index >= NUM_OF_FORMATS)
630 return -EINVAL;
631 *f = frame_std[f->index];
632 return 0;
633}
634
635static int
636dt3155_ioc_g_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
637{
638 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
639 return -EINVAL;
640 f->fmt.pix.width = img_width;
641 f->fmt.pix.height = img_height;
642 f->fmt.pix.pixelformat = V4L2_PIX_FMT_GREY;
643 f->fmt.pix.field = V4L2_FIELD_NONE;
644 f->fmt.pix.bytesperline = f->fmt.pix.width;
645 f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height;
646 f->fmt.pix.colorspace = 0;
647 f->fmt.pix.priv = 0;
648 return 0;
649}
650
651static int
652dt3155_ioc_try_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
653{
654 if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
655 return -EINVAL;
656 if (f->fmt.pix.width == img_width &&
657 f->fmt.pix.height == img_height &&
658 f->fmt.pix.pixelformat == V4L2_PIX_FMT_GREY &&
659 f->fmt.pix.field == V4L2_FIELD_NONE &&
660 f->fmt.pix.bytesperline == f->fmt.pix.width &&
661 f->fmt.pix.sizeimage == f->fmt.pix.width * f->fmt.pix.height)
662 return 0;
663 else
664 return -EINVAL;
665}
666
667static int
668dt3155_ioc_s_fmt_vid_cap(struct file *filp, void *p, struct v4l2_format *f)
669{
670 struct dt3155_priv *pd = video_drvdata(filp);
671 int ret = -ERESTARTSYS;
672
673 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
674 return ret;
675 if (!pd->acq_fp) {
676 pd->acq_fp = filp;
677 pd->streaming = 0;
678 } else if (pd->acq_fp != filp) {
679 ret = -EBUSY;
680 goto done;
681 }
682/* FIXME: we don't change the format for now
683 if (pd->vidq->streaming || pd->vidq->reading || pd->curr_buff) {
684 ret = -EBUSY;
685 goto done;
686 }
687*/
688 ret = dt3155_ioc_g_fmt_vid_cap(filp, p, f);
689done:
690 mutex_unlock(&pd->mux);
691 return ret;
692}
693
694static int
695dt3155_ioc_reqbufs(struct file *filp, void *p, struct v4l2_requestbuffers *b)
696{
697 struct dt3155_priv *pd = video_drvdata(filp);
698 struct videobuf_queue *q = pd->vidq;
699 int ret = -ERESTARTSYS;
700
701 if (b->memory != V4L2_MEMORY_MMAP)
702 return -EINVAL;
703 if (mutex_lock_interruptible(&pd->mux) == -EINTR)
704 return ret;
705 if (!pd->acq_fp)
706 pd->acq_fp = filp;
707 else if (pd->acq_fp != filp) {
708 ret = -EBUSY;
709 goto done;
710 }
711 pd->streaming = 1;
712 ret = 0;
713done:
714 mutex_unlock(&pd->mux);
715 if (ret)
716 return ret;
717 if (b->count)
718 ret = videobuf_reqbufs(q, b);
719 else { /* FIXME: is it necessary? */
720 printk(KERN_DEBUG "dt3155: request to free buffers\n");
721 /* ret = videobuf_mmap_free(q); */
722 ret = dt3155_ioc_streamoff(filp, p,
723 V4L2_BUF_TYPE_VIDEO_CAPTURE);
724 }
725 return ret;
726}
727
728static int
729dt3155_ioc_querybuf(struct file *filp, void *p, struct v4l2_buffer *b)
730{
731 struct dt3155_priv *pd = video_drvdata(filp);
732 struct videobuf_queue *q = pd->vidq;
733
734 return videobuf_querybuf(q, b);
735}
736
737static int
738dt3155_ioc_qbuf(struct file *filp, void *p, struct v4l2_buffer *b)
739{
740 struct dt3155_priv *pd = video_drvdata(filp);
741 struct videobuf_queue *q = pd->vidq;
742 int ret;
743
744 ret = videobuf_qbuf(q, b);
745 if (ret)
746 return ret;
747 return videobuf_querybuf(q, b);
748}
749
750static int
751dt3155_ioc_dqbuf(struct file *filp, void *p, struct v4l2_buffer *b)
752{
753 struct dt3155_priv *pd = video_drvdata(filp);
754 struct videobuf_queue *q = pd->vidq;
755
756 return videobuf_dqbuf(q, b, filp->f_flags & O_NONBLOCK);
757}
758
759static int
760dt3155_ioc_querystd(struct file *filp, void *p, v4l2_std_id *norm)
761{
762 *norm = DT3155_CURRENT_NORM;
763 return 0;
764}
765
766static int
767dt3155_ioc_g_std(struct file *filp, void *p, v4l2_std_id *norm)
768{
769 *norm = DT3155_CURRENT_NORM;
770 return 0;
771}
772
773static int
774dt3155_ioc_s_std(struct file *filp, void *p, v4l2_std_id *norm)
775{
776 if (*norm & DT3155_CURRENT_NORM)
777 return 0;
778 return -EINVAL;
779}
780
781static int
782dt3155_ioc_enum_input(struct file *filp, void *p, struct v4l2_input *input)
783{
784 if (input->index)
785 return -EINVAL;
786 strcpy(input->name, "Coax in");
787 input->type = V4L2_INPUT_TYPE_CAMERA;
788 /*
789 * FIXME: input->std = 0 according to v4l2 API
790 * VIDIOC_G_STD, VIDIOC_S_STD, VIDIOC_QUERYSTD and VIDIOC_ENUMSTD
791 * should return -EINVAL
792 */
793 input->std = DT3155_CURRENT_NORM;
794 input->status = 0;/* FIXME: add sync detection & V4L2_IN_ST_NO_H_LOCK */
795 return 0;
796}
797
798static int
799dt3155_ioc_g_input(struct file *filp, void *p, unsigned int *i)
800{
801 *i = 0;
802 return 0;
803}
804
805static int
806dt3155_ioc_s_input(struct file *filp, void *p, unsigned int i)
807{
808 if (i)
809 return -EINVAL;
810 return 0;
811}
812
813static int
814dt3155_ioc_g_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
815{
816 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
817 return -EINVAL;
818 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
819 parms->parm.capture.capturemode = 0;
820 parms->parm.capture.timeperframe.numerator = 1001;
821 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
822 parms->parm.capture.extendedmode = 0;
823 parms->parm.capture.readbuffers = 1; /* FIXME: 2 buffers? */
824 return 0;
825}
826
827static int
828dt3155_ioc_s_parm(struct file *filp, void *p, struct v4l2_streamparm *parms)
829{
830 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
831 return -EINVAL;
832 parms->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
833 parms->parm.capture.capturemode = 0;
834 parms->parm.capture.timeperframe.numerator = 1001;
835 parms->parm.capture.timeperframe.denominator = frames_per_sec * 1000;
836 parms->parm.capture.extendedmode = 0;
837 parms->parm.capture.readbuffers = 1; /* FIXME: 2 buffers? */
838 return 0;
839}
840
841static const struct v4l2_ioctl_ops dt3155_ioctl_ops = {
842 .vidioc_streamon = dt3155_ioc_streamon,
843 .vidioc_streamoff = dt3155_ioc_streamoff,
844 .vidioc_querycap = dt3155_ioc_querycap,
845/*
846 .vidioc_g_priority = dt3155_ioc_g_priority,
847 .vidioc_s_priority = dt3155_ioc_s_priority,
848*/
849 .vidioc_enum_fmt_vid_cap = dt3155_ioc_enum_fmt_vid_cap,
850 .vidioc_try_fmt_vid_cap = dt3155_ioc_try_fmt_vid_cap,
851 .vidioc_g_fmt_vid_cap = dt3155_ioc_g_fmt_vid_cap,
852 .vidioc_s_fmt_vid_cap = dt3155_ioc_s_fmt_vid_cap,
853 .vidioc_reqbufs = dt3155_ioc_reqbufs,
854 .vidioc_querybuf = dt3155_ioc_querybuf,
855 .vidioc_qbuf = dt3155_ioc_qbuf,
856 .vidioc_dqbuf = dt3155_ioc_dqbuf,
857 .vidioc_querystd = dt3155_ioc_querystd,
858 .vidioc_g_std = dt3155_ioc_g_std,
859 .vidioc_s_std = dt3155_ioc_s_std,
860 .vidioc_enum_input = dt3155_ioc_enum_input,
861 .vidioc_g_input = dt3155_ioc_g_input,
862 .vidioc_s_input = dt3155_ioc_s_input,
863/*
864 .vidioc_queryctrl = dt3155_ioc_queryctrl,
865 .vidioc_g_ctrl = dt3155_ioc_g_ctrl,
866 .vidioc_s_ctrl = dt3155_ioc_s_ctrl,
867 .vidioc_querymenu = dt3155_ioc_querymenu,
868 .vidioc_g_ext_ctrls = dt3155_ioc_g_ext_ctrls,
869 .vidioc_s_ext_ctrls = dt3155_ioc_s_ext_ctrls,
870*/
871 .vidioc_g_parm = dt3155_ioc_g_parm,
872 .vidioc_s_parm = dt3155_ioc_s_parm,
873/*
874 .vidioc_cropcap = dt3155_ioc_cropcap,
875 .vidioc_g_crop = dt3155_ioc_g_crop,
876 .vidioc_s_crop = dt3155_ioc_s_crop,
877 .vidioc_enum_framesizes = dt3155_ioc_enum_framesizes,
878 .vidioc_enum_frameintervals = dt3155_ioc_enum_frameintervals,
879#ifdef CONFIG_VIDEO_V4L1_COMPAT
880 .vidiocgmbuf = iocgmbuf,
881#endif
882*/
883};
884
885static int __devinit
886dt3155_init_board(struct pci_dev *dev)
887{
888 struct dt3155_priv *pd = pci_get_drvdata(dev);
889 void *buf_cpu;
890 dma_addr_t buf_dma;
891 int i;
892 u8 tmp;
893
894 pci_set_master(dev); /* dt3155 needs it */
895
896 /* resetting the adapter */
897 iowrite32(FLD_CRPT_ODD | FLD_CRPT_EVEN | FLD_DN_ODD | FLD_DN_EVEN,
898 pd->regs + CSR1);
899 mmiowb();
900 msleep(10);
901
902 /* initializing adaper registers */
903 iowrite32(FIFO_EN | SRST, pd->regs + CSR1);
904 mmiowb();
905 iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT);
906 iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT);
907 iowrite32(0x00000020, pd->regs + FIFO_TRIGER);
908 iowrite32(0x00000103, pd->regs + XFER_MODE);
909 iowrite32(0, pd->regs + RETRY_WAIT_CNT);
910 iowrite32(0, pd->regs + INT_CSR);
911 iowrite32(1, pd->regs + EVEN_FLD_MASK);
912 iowrite32(1, pd->regs + ODD_FLD_MASK);
913 iowrite32(0, pd->regs + MASK_LENGTH);
914 iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT);
915 iowrite32(0x01010101, pd->regs + IIC_CLK_DUR);
916 mmiowb();
917
918 /* verifying that we have a DT3155 board (not just a SAA7116 chip) */
919 read_i2c_reg(pd->regs, DT_ID, &tmp);
920 if (tmp != DT3155_ID)
921 return -ENODEV;
922
923 /* initialize AD LUT */
924 write_i2c_reg(pd->regs, AD_ADDR, 0);
925 for (i = 0; i < 256; i++)
926 write_i2c_reg(pd->regs, AD_LUT, i);
927
928 /* initialize ADC references */
929 /* FIXME: pos_ref & neg_ref depend on VT_50HZ */
930 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
931 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
932 write_i2c_reg(pd->regs, AD_ADDR, AD_POS_REF);
933 write_i2c_reg(pd->regs, AD_CMD, 34);
934 write_i2c_reg(pd->regs, AD_ADDR, AD_NEG_REF);
935 write_i2c_reg(pd->regs, AD_CMD, 0);
936
937 /* initialize PM LUT */
938 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM);
939 for (i = 0; i < 256; i++) {
940 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
941 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
942 }
943 write_i2c_reg(pd->regs, CONFIG, pd->config | PM_LUT_PGM | PM_LUT_SEL);
944 for (i = 0; i < 256; i++) {
945 write_i2c_reg(pd->regs, PM_LUT_ADDR, i);
946 write_i2c_reg(pd->regs, PM_LUT_DATA, i);
947 }
948 write_i2c_reg(pd->regs, CONFIG, pd->config); /* ACQ_MODE_EVEN */
949
950 /* select chanel 1 for input and set sync level */
951 write_i2c_reg(pd->regs, AD_ADDR, AD_CMD_REG);
952 write_i2c_reg(pd->regs, AD_CMD, VIDEO_CNL_1 | SYNC_CNL_1 | SYNC_LVL_3);
953
954 /* allocate memory, and initialize the DMA machine */
955 buf_cpu = dma_alloc_coherent(&dev->dev, DT3155_BUF_SIZE, &buf_dma,
956 GFP_KERNEL);
957 if (!buf_cpu) {
958 printk(KERN_ERR "dt3155: dma_alloc_coherent "
959 "(in dt3155_init_board) failed\n");
960 return -ENOMEM;
961 }
962 iowrite32(buf_dma, pd->regs + EVEN_DMA_START);
963 iowrite32(buf_dma, pd->regs + ODD_DMA_START);
964 iowrite32(0, pd->regs + EVEN_DMA_STRIDE);
965 iowrite32(0, pd->regs + ODD_DMA_STRIDE);
966
967 /* Perform a pseudo even field acquire */
968 iowrite32(FIFO_EN | SRST | CAP_CONT_ODD, pd->regs + CSR1);
969 write_i2c_reg(pd->regs, CSR2, pd->csr2 | SYNC_SNTL);
970 write_i2c_reg(pd->regs, CONFIG, pd->config);
971 write_i2c_reg(pd->regs, EVEN_CSR, CSR_SNGL);
972 write_i2c_reg(pd->regs, CSR2, pd->csr2 | BUSY_EVEN | SYNC_SNTL);
973 msleep(100);
974 read_i2c_reg(pd->regs, CSR2, &tmp);
975 write_i2c_reg(pd->regs, EVEN_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
976 write_i2c_reg(pd->regs, ODD_CSR, CSR_ERROR | CSR_SNGL | CSR_DONE);
977 write_i2c_reg(pd->regs, CSR2, pd->csr2);
978 iowrite32(FIFO_EN | SRST | FLD_DN_EVEN | FLD_DN_ODD, pd->regs + CSR1);
979
980 /* deallocate memory */
981 dma_free_coherent(&dev->dev, DT3155_BUF_SIZE, buf_cpu, buf_dma);
982 if (tmp & BUSY_EVEN) {
983 printk(KERN_ERR "dt3155: BUSY_EVEN not cleared\n");
984 return -EIO;
985 }
986 return 0;
987}
988
989static struct video_device dt3155_vdev = {
990 .name = DT3155_NAME,
991 .fops = &dt3155_fops,
992 .ioctl_ops = &dt3155_ioctl_ops,
993 .minor = -1,
994 .release = video_device_release,
995 .tvnorms = DT3155_CURRENT_NORM,
996 .current_norm = DT3155_CURRENT_NORM,
997};
998
999/* same as in drivers/base/dma-coherent.c */
1000struct dma_coherent_mem {
1001 void *virt_base;
1002 u32 device_base;
1003 int size;
1004 int flags;
1005 unsigned long *bitmap;
1006};
1007
1008static int __devinit
1009dt3155_alloc_coherent(struct device *dev, size_t size, int flags)
1010{
1011 int pages = size >> PAGE_SHIFT;
1012 int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
1013
1014 if ((flags & DMA_MEMORY_MAP) == 0)
1015 goto out;
1016 if (!size)
1017 goto out;
1018 if (dev->dma_mem)
1019 goto out;
1020
1021 dev->dma_mem = kzalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL);
1022 if (!dev->dma_mem)
1023 goto out;
1024 dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1025 if (!dev->dma_mem->bitmap)
1026 goto err_bitmap;
1027
1028 dev->dma_mem->virt_base = dma_alloc_coherent(dev, size,
1029 &dev->dma_mem->device_base, DT3155_COH_FLAGS);
1030 if (!dev->dma_mem->virt_base)
1031 goto err_coherent;
1032 dev->dma_mem->size = pages;
1033 dev->dma_mem->flags = flags;
1034 return DMA_MEMORY_MAP;
1035
1036err_coherent:
1037 kfree(dev->dma_mem->bitmap);
1038err_bitmap:
1039 kfree(dev->dma_mem);
1040out:
1041 return 0;
1042}
1043
1044static void __devexit
1045dt3155_free_coherent(struct device *dev)
1046{
1047 struct dma_coherent_mem *mem = dev->dma_mem;
1048
1049 if (!mem)
1050 return;
1051 dev->dma_mem = NULL;
1052 dma_free_coherent(dev, mem->size << PAGE_SHIFT,
1053 mem->virt_base, mem->device_base);
1054 kfree(mem->bitmap);
1055 kfree(mem);
1056}
1057
1058static int __devinit
1059dt3155_probe(struct pci_dev *dev, const struct pci_device_id *id)
1060{
1061 int err;
1062 struct dt3155_priv *pd;
1063
1064 printk(KERN_INFO "dt3155: probe()\n");
1065 err = dma_set_mask(&dev->dev, DMA_BIT_MASK(32));
1066 if (err) {
1067 printk(KERN_ERR "dt3155: cannot set dma_mask\n");
1068 return -ENODEV;
1069 }
1070 err = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
1071 if (err) {
1072 printk(KERN_ERR "dt3155: cannot set dma_coherent_mask\n");
1073 return -ENODEV;
1074 }
1075 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
1076 if (!pd) {
1077 printk(KERN_ERR "dt3155: cannot allocate dt3155_priv\n");
1078 return -ENOMEM;
1079 }
1080 pd->vdev = video_device_alloc();
1081 if (!pd->vdev) {
1082 printk(KERN_ERR "dt3155: cannot allocate vdev structure\n");
1083 goto err_video_device_alloc;
1084 }
1085 *pd->vdev = dt3155_vdev;
1086 pci_set_drvdata(dev, pd); /* for use in dt3155_remove() */
1087 video_set_drvdata(pd->vdev, pd); /* for use in video_fops */
1088 pd->users = 0;
1089 pd->acq_fp = NULL;
1090 pd->pdev = dev;
1091 INIT_LIST_HEAD(&pd->dmaq);
1092 init_waitqueue_head(&pd->do_dma);
1093 mutex_init(&pd->mux);
1094 pd->csr2 = csr2_init;
1095 pd->config = config_init;
1096 err = pci_enable_device(pd->pdev);
1097 if (err) {
1098 printk(KERN_ERR "dt3155: pci_dev not enabled\n");
1099 goto err_enable_dev;
1100 }
1101 err = pci_request_region(pd->pdev, 0, pci_name(pd->pdev));
1102 if (err)
1103 goto err_req_region;
1104 pd->regs = pci_iomap(pd->pdev, 0, pci_resource_len(pd->pdev, 0));
1105 if (!pd->regs) {
1106 err = -ENOMEM;
1107 printk(KERN_ERR "dt3155: pci_iomap failed\n");
1108 goto err_pci_iomap;
1109 }
1110 err = dt3155_init_board(pd->pdev);
1111 if (err) {
1112 printk(KERN_ERR "dt3155: dt3155_init_board failed\n");
1113 goto err_init_board;
1114 }
1115 err = video_register_device(pd->vdev, VFL_TYPE_GRABBER, -1);
1116 if (err) {
1117 printk(KERN_ERR "dt3155: Cannot register video device\n");
1118 goto err_init_board;
1119 }
1120 err = dt3155_alloc_coherent(&dev->dev, DT3155_CHUNK_SIZE,
1121 DMA_MEMORY_MAP);
1122 if (err)
1123 printk(KERN_INFO "dt3155: preallocated 8 buffers\n");
1124 printk(KERN_INFO "dt3155: /dev/video%i is ready\n", pd->vdev->minor);
1125 return 0; /* success */
1126
1127err_init_board:
1128 pci_iounmap(pd->pdev, pd->regs);
1129err_pci_iomap:
1130 pci_release_region(pd->pdev, 0);
1131err_req_region:
1132 pci_disable_device(pd->pdev);
1133err_enable_dev:
1134 video_device_release(pd->vdev);
1135err_video_device_alloc:
1136 kfree(pd);
1137 return err;
1138}
1139
1140static void __devexit
1141dt3155_remove(struct pci_dev *dev)
1142{
1143 struct dt3155_priv *pd = pci_get_drvdata(dev);
1144
1145 printk(KERN_INFO "dt3155: remove()\n");
1146 dt3155_free_coherent(&dev->dev);
1147 video_unregister_device(pd->vdev);
1148 pci_iounmap(dev, pd->regs);
1149 pci_release_region(pd->pdev, 0);
1150 pci_disable_device(pd->pdev);
1151 /*
1152 * video_device_release() is invoked automatically
1153 * see: struct video_device dt3155_vdev
1154 */
1155 kfree(pd);
1156}
1157
1158static DEFINE_PCI_DEVICE_TABLE(pci_ids) = {
1159 { PCI_DEVICE(DT3155_VENDOR_ID, DT3155_DEVICE_ID) },
1160 { 0, /* zero marks the end */ },
1161};
1162MODULE_DEVICE_TABLE(pci, pci_ids);
1163
1164static struct pci_driver pci_driver = {
1165 .name = DT3155_NAME,
1166 .id_table = pci_ids,
1167 .probe = dt3155_probe,
1168 .remove = __devexit_p(dt3155_remove),
1169};
1170
1171static int __init
1172dt3155_init_module(void)
1173{
1174 int err;
1175
1176 printk(KERN_INFO "dt3155: ==================\n");
1177 printk(KERN_INFO "dt3155: init()\n");
1178 err = pci_register_driver(&pci_driver);
1179 if (err) {
1180 printk(KERN_ERR "dt3155: cannot register pci_driver\n");
1181 return err;
1182 }
1183 return 0; /* succes */
1184}
1185
1186static void __exit
1187dt3155_exit_module(void)
1188{
1189 pci_unregister_driver(&pci_driver);
1190 printk(KERN_INFO "dt3155: exit()\n");
1191 printk(KERN_INFO "dt3155: ==================\n");
1192}
1193
1194module_init(dt3155_init_module);
1195module_exit(dt3155_exit_module);
1196
1197MODULE_DESCRIPTION("video4linux pci-driver for dt3155 frame grabber");
1198MODULE_AUTHOR("Marin Mitov <mitov@issp.bas.bg>");
1199MODULE_VERSION(DT3155_VERSION);
1200MODULE_LICENSE("GPL");
diff --git a/drivers/staging/dt3155v4l/dt3155v4l.h b/drivers/staging/dt3155v4l/dt3155v4l.h
new file mode 100644
index 000000000000..aa68a6f38aaa
--- /dev/null
+++ b/drivers/staging/dt3155v4l/dt3155v4l.h
@@ -0,0 +1,224 @@
1/***************************************************************************
2 * Copyright (C) 2006-2010 by Marin Mitov *
3 * mitov@issp.bas.bg *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20
21/* DT3155 header file */
22#ifndef _DT3155_H_
23#define _DT3155_H_
24
25#ifdef __KERNEL__
26
27#include <linux/pci.h>
28#include <linux/interrupt.h>
29
30#define DT3155_NAME "dt3155"
31#define DT3155_VER_MAJ 1
32#define DT3155_VER_MIN 1
33#define DT3155_VER_EXT 0
34#define DT3155_VERSION __stringify(DT3155_VER_MAJ) "." \
35 __stringify(DT3155_VER_MIN) "." \
36 __stringify(DT3155_VER_EXT)
37
38/* DT3155 Base Register offsets (memory mapped) */
39#define EVEN_DMA_START 0x00
40#define ODD_DMA_START 0x0C
41#define EVEN_DMA_STRIDE 0x18
42#define ODD_DMA_STRIDE 0x24
43#define EVEN_PIXEL_FMT 0x30
44#define ODD_PIXEL_FMT 0x34
45#define FIFO_TRIGER 0x38
46#define XFER_MODE 0x3C
47#define CSR1 0x40
48#define RETRY_WAIT_CNT 0x44
49#define INT_CSR 0x48
50#define EVEN_FLD_MASK 0x4C
51#define ODD_FLD_MASK 0x50
52#define MASK_LENGTH 0x54
53#define FIFO_FLAG_CNT 0x58
54#define IIC_CLK_DUR 0x5C
55#define IIC_CSR1 0x60
56#define IIC_CSR2 0x64
57
58/* DT3155 Internal Registers indexes (i2c/IIC mapped) */
59#define CSR2 0x10
60#define EVEN_CSR 0x11
61#define ODD_CSR 0x12
62#define CONFIG 0x13
63#define DT_ID 0x1F
64#define X_CLIP_START 0x20
65#define Y_CLIP_START 0x22
66#define X_CLIP_END 0x24
67#define Y_CLIP_END 0x26
68#define AD_ADDR 0x30
69#define AD_LUT 0x31
70#define AD_CMD 0x32
71#define DIG_OUT 0x40
72#define PM_LUT_ADDR 0x50
73#define PM_LUT_DATA 0x51
74
75/* AD command register values */
76#define AD_CMD_REG 0x00
77#define AD_POS_REF 0x01
78#define AD_NEG_REF 0x02
79
80/* CSR1 bit masks */
81#define CRPT_DIS 0x00004000
82#define FLD_CRPT_ODD 0x00000200
83#define FLD_CRPT_EVEN 0x00000100
84#define FIFO_EN 0x00000080
85#define SRST 0x00000040
86#define FLD_DN_ODD 0x00000020
87#define FLD_DN_EVEN 0x00000010
88/* These should not be used.
89 * Use CAP_CONT_ODD/EVEN instead
90#define CAP_SNGL_ODD 0x00000008
91#define CAP_SNGL_EVEN 0x00000004
92*/
93#define CAP_CONT_ODD 0x00000002
94#define CAP_CONT_EVEN 0x00000001
95
96/* INT_CSR bit masks */
97#define FLD_START_EN 0x00000400
98#define FLD_END_ODD_EN 0x00000200
99#define FLD_END_EVEN_EN 0x00000100
100#define FLD_START 0x00000004
101#define FLD_END_ODD 0x00000002
102#define FLD_END_EVEN 0x00000001
103
104/* IIC_CSR1 bit masks */
105#define DIRECT_ABORT 0x00000200
106
107/* IIC_CSR2 bit masks */
108#define NEW_CYCLE 0x01000000
109#define DIR_RD 0x00010000
110#define IIC_READ 0x01010000
111#define IIC_WRITE 0x01000000
112
113/* CSR2 bit masks */
114#define DISP_PASS 0x40
115#define BUSY_ODD 0x20
116#define BUSY_EVEN 0x10
117#define SYNC_PRESENT 0x08
118#define VT_50HZ 0x04
119#define SYNC_SNTL 0x02
120#define CHROM_FILT 0x01
121#define VT_60HZ 0x00
122
123/* CSR_EVEN/ODD bit masks */
124#define CSR_ERROR 0x04
125#define CSR_SNGL 0x02
126#define CSR_DONE 0x01
127
128/* CONFIG bit masks */
129#define PM_LUT_PGM 0x80
130#define PM_LUT_SEL 0x40
131#define CLIP_EN 0x20
132#define HSCALE_EN 0x10
133#define EXT_TRIG_UP 0x0C
134#define EXT_TRIG_DOWN 0x04
135#define ACQ_MODE_NEXT 0x02
136#define ACQ_MODE_ODD 0x01
137#define ACQ_MODE_EVEN 0x00
138
139/* AD_CMD bit masks */
140#define VIDEO_CNL_1 0x00
141#define VIDEO_CNL_2 0x40
142#define VIDEO_CNL_3 0x80
143#define VIDEO_CNL_4 0xC0
144#define SYNC_CNL_1 0x00
145#define SYNC_CNL_2 0x10
146#define SYNC_CNL_3 0x20
147#define SYNC_CNL_4 0x30
148#define SYNC_LVL_1 0x00
149#define SYNC_LVL_2 0x04
150#define SYNC_LVL_3 0x08
151#define SYNC_LVL_4 0x0C
152
153/* DT3155 identificator */
154#define DT3155_ID 0x20
155
156#ifdef CONFIG_DT3155_CCIR
157#define DMA_STRIDE 768
158#else
159#define DMA_STRIDE 640
160#endif
161
162/**
163 * struct dt3155_stats - statistics structure
164 *
165 * @free_bufs_empty: no free image buffers
166 * @corrupted_fields: corrupted fields
167 * @dma_map_failed: dma mapping failed
168 * @start_before_end: new started before old ended
169 */
170struct dt3155_stats {
171 int free_bufs_empty;
172 int corrupted_fields;
173 int dma_map_failed;
174 int start_before_end;
175};
176
177/* per board private data structure */
178/**
179 * struct dt3155_priv - private data structure
180 *
181 * @vdev: pointer to video_device structure
182 * @acq_fp pointer to filp that starts acquisition
183 * @streaming streaming is negotiated
184 * @pdev: pointer to pci_dev structure
185 * @vidq pointer to videobuf_queue structure
186 * @curr_buf: pointer to curren buffer
187 * @thread pointer to worker thraed
188 * @irq_handler: irq handler for the driver
189 * @qt_ops local copy of dma-contig qtype_ops
190 * @dmaq queue for dma buffers
191 * @do_dma wait queue of the kernel thread
192 * @mux: mutex to protect the instance
193 * @lock spinlock for videobuf queues
194 * @field_count fields counter
195 * @stats: statistics structure
196 * @users open count
197 * @regs: local copy of mmio base register
198 * @csr2: local copy of csr2 register
199 * @config: local copy of config register
200 */
201struct dt3155_priv {
202 struct video_device *vdev;
203 struct file *acq_fp;
204 int streaming;
205 struct pci_dev *pdev;
206 struct videobuf_queue *vidq;
207 struct videobuf_buffer *curr_buf;
208 struct task_struct *thread;
209 irq_handler_t irq_handler;
210 struct videobuf_qtype_ops qt_ops;
211 struct list_head dmaq;
212 wait_queue_head_t do_dma;
213 struct mutex mux;
214 spinlock_t lock;
215 unsigned int field_count;
216 struct dt3155_stats stats;
217 void *regs;
218 int users;
219 u8 csr2, config;
220};
221
222#endif /* __KERNEL__ */
223
224#endif /* _DT3155_H_ */
diff --git a/drivers/staging/echo/echo.c b/drivers/staging/echo/echo.c
index 4cc4f2eb7eb7..58c4e907e44d 100644
--- a/drivers/staging/echo/echo.c
+++ b/drivers/staging/echo/echo.c
@@ -603,7 +603,7 @@ int16_t oslec_update(struct oslec_state *ec, int16_t tx, int16_t rx)
603} 603}
604EXPORT_SYMBOL_GPL(oslec_update); 604EXPORT_SYMBOL_GPL(oslec_update);
605 605
606/* This function is seperated from the echo canceller is it is usually called 606/* This function is separated from the echo canceller is it is usually called
607 as part of the tx process. See rx HP (DC blocking) filter above, it's 607 as part of the tx process. See rx HP (DC blocking) filter above, it's
608 the same design. 608 the same design.
609 609
diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h
index ea746ba41faf..e6c8cb3828e9 100644
--- a/drivers/staging/et131x/et1310_address_map.h
+++ b/drivers/staging/et131x/et1310_address_map.h
@@ -117,7 +117,7 @@
117 117
118/* 118/*
119 * Software reset reg at address 0x0028 119 * Software reset reg at address 0x0028
120 * 0: txdma_sw_reset 120 * 0: txdma_sw_reset
121 * 1: rxdma_sw_reset 121 * 1: rxdma_sw_reset
122 * 2: txmac_sw_reset 122 * 2: txmac_sw_reset
123 * 3: rxmac_sw_reset 123 * 3: rxmac_sw_reset
@@ -1052,7 +1052,7 @@ typedef struct _RXMAC_t { /* Location: */
1052 * 4-0: register 1052 * 4-0: register
1053 */ 1053 */
1054 1054
1055#define MII_ADDR(phy,reg) ((phy) << 8 | (reg)) 1055#define MII_ADDR(phy, reg) ((phy) << 8 | (reg))
1056 1056
1057/* 1057/*
1058 * structure for MII Management Control reg in mac address map. 1058 * structure for MII Management Control reg in mac address map.
@@ -1249,8 +1249,7 @@ typedef struct _MAC_t { /* Location: */
1249/* 1249/*
1250 * MAC STATS Module of JAGCore Address Mapping 1250 * MAC STATS Module of JAGCore Address Mapping
1251 */ 1251 */
1252struct macstat_regs 1252struct macstat_regs { /* Location: */
1253{ /* Location: */
1254 u32 pad[32]; /* 0x6000 - 607C */ 1253 u32 pad[32]; /* 0x6000 - 607C */
1255 1254
1256 /* Tx/Rx 0-64 Byte Frame Counter */ 1255 /* Tx/Rx 0-64 Byte Frame Counter */
diff --git a/drivers/staging/et131x/et1310_eeprom.c b/drivers/staging/et131x/et1310_eeprom.c
index e4d095b0b52a..5a8e6b913dab 100644
--- a/drivers/staging/et131x/et1310_eeprom.c
+++ b/drivers/staging/et131x/et1310_eeprom.c
@@ -302,7 +302,7 @@ static int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata)
302 err = eeprom_wait_ready(pdev, NULL); 302 err = eeprom_wait_ready(pdev, NULL);
303 if (err) 303 if (err)
304 return err; 304 return err;
305 /* 305 /*
306 * Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0, 306 * Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0,
307 * and bits 1:0 both =0. Bit 5 should be set according to the type 307 * and bits 1:0 both =0. Bit 5 should be set according to the type
308 * of EEPROM being accessed (1=two byte addressing, 0=one byte 308 * of EEPROM being accessed (1=two byte addressing, 0=one byte
@@ -383,9 +383,9 @@ int et131x_init_eeprom(struct et131x_adapter *etdev)
383 383
384 /* This error could mean that there was an error 384 /* This error could mean that there was an error
385 * reading the eeprom or that the eeprom doesn't exist. 385 * reading the eeprom or that the eeprom doesn't exist.
386 * We will treat each case the same and not try to gather 386 * We will treat each case the same and not try to
387 * additional information that normally would come from the 387 * gather additional information that normally would
388 * eeprom, like MAC Address 388 * come from the eeprom, like MAC Address
389 */ 389 */
390 etdev->has_eeprom = 0; 390 etdev->has_eeprom = 0;
391 return -EIO; 391 return -EIO;
diff --git a/drivers/staging/et131x/et1310_phy.c b/drivers/staging/et131x/et1310_phy.c
index 34cd5d1b586a..a6d9f29ff49c 100644
--- a/drivers/staging/et131x/et1310_phy.c
+++ b/drivers/staging/et131x/et1310_phy.c
@@ -344,7 +344,7 @@ static void ET1310_PhyDuplexMode(struct et131x_adapter *etdev, u16 duplex)
344static void ET1310_PhySpeedSelect(struct et131x_adapter *etdev, u16 speed) 344static void ET1310_PhySpeedSelect(struct et131x_adapter *etdev, u16 speed)
345{ 345{
346 u16 data; 346 u16 data;
347 static const u16 bits[3]={0x0000, 0x2000, 0x0040}; 347 static const u16 bits[3] = {0x0000, 0x2000, 0x0040};
348 348
349 /* Read the PHY control register */ 349 /* Read the PHY control register */
350 MiRead(etdev, PHY_CONTROL, &data); 350 MiRead(etdev, PHY_CONTROL, &data);
diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index 54686e2ace69..8e04bdd8f6b6 100644
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -344,7 +344,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
344 "Cannot alloc memory for Packet Status Ring\n"); 344 "Cannot alloc memory for Packet Status Ring\n");
345 return -ENOMEM; 345 return -ENOMEM;
346 } 346 }
347 printk("PSR %lx\n", (unsigned long) rx_ring->pPSRingPa); 347 printk(KERN_INFO "PSR %lx\n", (unsigned long) rx_ring->pPSRingPa);
348 348
349 /* 349 /*
350 * NOTE : pci_alloc_consistent(), used above to alloc DMA regions, 350 * NOTE : pci_alloc_consistent(), used above to alloc DMA regions,
@@ -363,7 +363,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
363 return -ENOMEM; 363 return -ENOMEM;
364 } 364 }
365 rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD; 365 rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD;
366 printk("PRS %lx\n", (unsigned long)rx_ring->rx_status_bus); 366 printk(KERN_INFO "PRS %lx\n", (unsigned long)rx_ring->rx_status_bus);
367 367
368 /* Recv 368 /* Recv
369 * pci_pool_create initializes a lookaside list. After successful 369 * pci_pool_create initializes a lookaside list. After successful
@@ -445,10 +445,10 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
445 rx_ring->pFbr1RingVa - rx_ring->Fbr1offset); 445 rx_ring->pFbr1RingVa - rx_ring->Fbr1offset);
446 446
447 bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries) 447 bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries)
448 + 0xfff; 448 + 0xfff;
449 449
450 pci_free_consistent(adapter->pdev, bufsize, 450 pci_free_consistent(adapter->pdev, bufsize,
451 rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa); 451 rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa);
452 452
453 rx_ring->pFbr1RingVa = NULL; 453 rx_ring->pFbr1RingVa = NULL;
454 } 454 }
@@ -478,7 +478,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
478 rx_ring->pFbr0RingVa - rx_ring->Fbr0offset); 478 rx_ring->pFbr0RingVa - rx_ring->Fbr0offset);
479 479
480 bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries) 480 bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries)
481 + 0xfff; 481 + 0xfff;
482 482
483 pci_free_consistent(adapter->pdev, 483 pci_free_consistent(adapter->pdev,
484 bufsize, 484 bufsize,
@@ -504,7 +504,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
504 pci_free_consistent(adapter->pdev, 504 pci_free_consistent(adapter->pdev,
505 sizeof(struct rx_status_block), 505 sizeof(struct rx_status_block),
506 rx_ring->rx_status_block, rx_ring->rx_status_bus); 506 rx_ring->rx_status_block, rx_ring->rx_status_bus);
507 rx_ring->rx_status_block = NULL; 507 rx_ring->rx_status_block = NULL;
508 } 508 }
509 509
510 /* Free receive buffer pool */ 510 /* Free receive buffer pool */
@@ -547,7 +547,7 @@ int et131x_init_recv(struct et131x_adapter *adapter)
547 547
548 /* Setup each RFD */ 548 /* Setup each RFD */
549 for (rfdct = 0; rfdct < rx_ring->NumRfd; rfdct++) { 549 for (rfdct = 0; rfdct < rx_ring->NumRfd; rfdct++) {
550 rfd = (MP_RFD *) kmem_cache_alloc(rx_ring->RecvLookaside, 550 rfd = kmem_cache_alloc(rx_ring->RecvLookaside,
551 GFP_ATOMIC | GFP_DMA); 551 GFP_ATOMIC | GFP_DMA);
552 552
553 if (!rfd) { 553 if (!rfd) {
@@ -713,7 +713,7 @@ void SetRxDmaTimer(struct et131x_adapter *etdev)
713 */ 713 */
714void et131x_rx_dma_disable(struct et131x_adapter *etdev) 714void et131x_rx_dma_disable(struct et131x_adapter *etdev)
715{ 715{
716 u32 csr; 716 u32 csr;
717 /* Setup the receive dma configuration register */ 717 /* Setup the receive dma configuration register */
718 writel(0x00002001, &etdev->regs->rxdma.csr); 718 writel(0x00002001, &etdev->regs->rxdma.csr);
719 csr = readl(&etdev->regs->rxdma.csr); 719 csr = readl(&etdev->regs->rxdma.csr);
@@ -743,9 +743,9 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev)
743 else if (etdev->rx_ring.Fbr1BufferSize == 16384) 743 else if (etdev->rx_ring.Fbr1BufferSize == 16384)
744 csr |= 0x1800; 744 csr |= 0x1800;
745#ifdef USE_FBR0 745#ifdef USE_FBR0
746 csr |= 0x0400; /* FBR0 enable */ 746 csr |= 0x0400; /* FBR0 enable */
747 if (etdev->rx_ring.Fbr0BufferSize == 256) 747 if (etdev->rx_ring.Fbr0BufferSize == 256)
748 csr |= 0x0100; 748 csr |= 0x0100;
749 else if (etdev->rx_ring.Fbr0BufferSize == 512) 749 else if (etdev->rx_ring.Fbr0BufferSize == 512)
750 csr |= 0x0200; 750 csr |= 0x0200;
751 else if (etdev->rx_ring.Fbr0BufferSize == 1024) 751 else if (etdev->rx_ring.Fbr0BufferSize == 1024)
@@ -757,7 +757,7 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev)
757 if ((csr & 0x00020000) != 0) { 757 if ((csr & 0x00020000) != 0) {
758 udelay(5); 758 udelay(5);
759 csr = readl(&etdev->regs->rxdma.csr); 759 csr = readl(&etdev->regs->rxdma.csr);
760 if ((csr & 0x00020000) != 0) { 760 if ((csr & 0x00020000) != 0) {
761 dev_err(&etdev->pdev->dev, 761 dev_err(&etdev->pdev->dev,
762 "RX Dma failed to exit halt state. CSR 0x%08x\n", 762 "RX Dma failed to exit halt state. CSR 0x%08x\n",
763 csr); 763 csr);
@@ -841,8 +841,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
841 (rindex == 1 && 841 (rindex == 1 &&
842 bindex > rx_local->Fbr1NumEntries - 1)) 842 bindex > rx_local->Fbr1NumEntries - 1))
843#else 843#else
844 if (rindex != 1 || 844 if (rindex != 1 || bindex > rx_local->Fbr1NumEntries - 1)
845 bindex > rx_local->Fbr1NumEntries - 1)
846#endif 845#endif
847 { 846 {
848 /* Illegal buffer or ring index cannot be used by S/W*/ 847 /* Illegal buffer or ring index cannot be used by S/W*/
@@ -1063,20 +1062,20 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev)
1063 1062
1064static inline u32 bump_fbr(u32 *fbr, u32 limit) 1063static inline u32 bump_fbr(u32 *fbr, u32 limit)
1065{ 1064{
1066 u32 v = *fbr; 1065 u32 v = *fbr;
1067 v++; 1066 v++;
1068 /* This works for all cases where limit < 1024. The 1023 case 1067 /* This works for all cases where limit < 1024. The 1023 case
1069 works because 1023++ is 1024 which means the if condition is not 1068 works because 1023++ is 1024 which means the if condition is not
1070 taken but the carry of the bit into the wrap bit toggles the wrap 1069 taken but the carry of the bit into the wrap bit toggles the wrap
1071 value correctly */ 1070 value correctly */
1072 if ((v & ET_DMA10_MASK) > limit) { 1071 if ((v & ET_DMA10_MASK) > limit) {
1073 v &= ~ET_DMA10_MASK; 1072 v &= ~ET_DMA10_MASK;
1074 v ^= ET_DMA10_WRAP; 1073 v ^= ET_DMA10_WRAP;
1075 } 1074 }
1076 /* For the 1023 case */ 1075 /* For the 1023 case */
1077 v &= (ET_DMA10_MASK|ET_DMA10_WRAP); 1076 v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
1078 *fbr = v; 1077 *fbr = v;
1079 return v; 1078 return v;
1080} 1079}
1081 1080
1082/** 1081/**
@@ -1105,7 +1104,7 @@ void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd)
1105 if (ri == 1) { 1104 if (ri == 1) {
1106 struct fbr_desc *next = 1105 struct fbr_desc *next =
1107 (struct fbr_desc *) (rx_local->pFbr1RingVa) + 1106 (struct fbr_desc *) (rx_local->pFbr1RingVa) +
1108 INDEX10(rx_local->local_Fbr1_full); 1107 INDEX10(rx_local->local_Fbr1_full);
1109 1108
1110 /* Handle the Free Buffer Ring advancement here. Write 1109 /* Handle the Free Buffer Ring advancement here. Write
1111 * the PA / Buffer Index for the returned buffer into 1110 * the PA / Buffer Index for the returned buffer into
diff --git a/drivers/staging/et131x/et1310_rx.h b/drivers/staging/et131x/et1310_rx.h
index ca84a9146d69..e8c653d37a76 100644
--- a/drivers/staging/et131x/et1310_rx.h
+++ b/drivers/staging/et131x/et1310_rx.h
@@ -91,8 +91,7 @@
91#define ALCATEL_BROADCAST_PKT 0x02000000 91#define ALCATEL_BROADCAST_PKT 0x02000000
92 92
93/* typedefs for Free Buffer Descriptors */ 93/* typedefs for Free Buffer Descriptors */
94struct fbr_desc 94struct fbr_desc {
95{
96 u32 addr_lo; 95 u32 addr_lo;
97 u32 addr_hi; 96 u32 addr_hi;
98 u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */ 97 u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */
@@ -117,7 +116,7 @@ struct fbr_desc
117 * 9: jp Jumbo Packet 116 * 9: jp Jumbo Packet
118 * 10: vp VLAN Packet 117 * 10: vp VLAN Packet
119 * 11-15: unused 118 * 11-15: unused
120 * 16: asw_prev_pkt_dropped e.g. IFG too small on previous 119 * 16: asw_prev_pkt_dropped e.g. IFG too small on previous
121 * 17: asw_RX_DV_event short receive event detected 120 * 17: asw_RX_DV_event short receive event detected
122 * 18: asw_false_carrier_event bad carrier since last good packet 121 * 18: asw_false_carrier_event bad carrier since last good packet
123 * 19: asw_code_err one or more nibbles signalled as errors 122 * 19: asw_code_err one or more nibbles signalled as errors
diff --git a/drivers/staging/et131x/et1310_tx.c b/drivers/staging/et131x/et1310_tx.c
index b6ff20f47de4..0f3473d758e4 100644
--- a/drivers/staging/et131x/et1310_tx.c
+++ b/drivers/staging/et131x/et1310_tx.c
@@ -112,7 +112,7 @@ int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter)
112 struct tx_ring *tx_ring = &adapter->tx_ring; 112 struct tx_ring *tx_ring = &adapter->tx_ring;
113 113
114 /* Allocate memory for the TCB's (Transmit Control Block) */ 114 /* Allocate memory for the TCB's (Transmit Control Block) */
115 adapter->tx_ring.tcb_ring = (struct tcb *) 115 adapter->tx_ring.tcb_ring =
116 kcalloc(NUM_TCB, sizeof(struct tcb), GFP_ATOMIC | GFP_DMA); 116 kcalloc(NUM_TCB, sizeof(struct tcb), GFP_ATOMIC | GFP_DMA);
117 if (!adapter->tx_ring.tcb_ring) { 117 if (!adapter->tx_ring.tcb_ring) {
118 dev_err(&adapter->pdev->dev, "Cannot alloc memory for TCBs\n"); 118 dev_err(&adapter->pdev->dev, "Cannot alloc memory for TCBs\n");
diff --git a/drivers/staging/et131x/et131x_initpci.c b/drivers/staging/et131x/et131x_initpci.c
index 1dd5fa5b888b..47baab3e6ea8 100644
--- a/drivers/staging/et131x/et131x_initpci.c
+++ b/drivers/staging/et131x/et131x_initpci.c
@@ -113,7 +113,13 @@
113static u32 et131x_speed_set; 113static u32 et131x_speed_set;
114module_param(et131x_speed_set, uint, 0); 114module_param(et131x_speed_set, uint, 0);
115MODULE_PARM_DESC(et131x_speed_set, 115MODULE_PARM_DESC(et131x_speed_set,
116 "Set Link speed and dublex manually (0-5) [0] \n 1 : 10Mb Half-Duplex \n 2 : 10Mb Full-Duplex \n 3 : 100Mb Half-Duplex \n 4 : 100Mb Full-Duplex \n 5 : 1000Mb Full-Duplex \n 0 : Auto Speed Auto Dublex"); 116 "Set Link speed and dublex manually (0-5) [0]\n \
117 1 : 10Mb Half-Duplex\n \
118 2 : 10Mb Full-Duplex\n \
119 3 : 100Mb Half-Duplex\n \
120 4 : 100Mb Full-Duplex\n \
121 5 : 1000Mb Full-Duplex\n \
122 0 : Auto Speed Auto Dublex");
117 123
118/** 124/**
119 * et131x_hwaddr_init - set up the MAC Address on the ET1310 125 * et131x_hwaddr_init - set up the MAC Address on the ET1310
@@ -558,7 +564,7 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
558 /* Parse configuration parameters into the private adapter struct */ 564 /* Parse configuration parameters into the private adapter struct */
559 if (et131x_speed_set) 565 if (et131x_speed_set)
560 dev_info(&etdev->pdev->dev, 566 dev_info(&etdev->pdev->dev,
561 "Speed set manually to : %d \n", et131x_speed_set); 567 "Speed set manually to : %d\n", et131x_speed_set);
562 568
563 etdev->SpeedDuplex = et131x_speed_set; 569 etdev->SpeedDuplex = et131x_speed_set;
564 etdev->RegistryJumboPacket = 1514; /* 1514-9216 */ 570 etdev->RegistryJumboPacket = 1514; /* 1514-9216 */
@@ -820,7 +826,7 @@ static int __init et131x_init_module(void)
820 if (et131x_speed_set < PARM_SPEED_DUPLEX_MIN || 826 if (et131x_speed_set < PARM_SPEED_DUPLEX_MIN ||
821 et131x_speed_set > PARM_SPEED_DUPLEX_MAX) { 827 et131x_speed_set > PARM_SPEED_DUPLEX_MAX) {
822 printk(KERN_WARNING "et131x: invalid speed setting ignored.\n"); 828 printk(KERN_WARNING "et131x: invalid speed setting ignored.\n");
823 et131x_speed_set = 0; 829 et131x_speed_set = 0;
824 } 830 }
825 return pci_register_driver(&et131x_driver); 831 return pci_register_driver(&et131x_driver);
826} 832}
diff --git a/drivers/staging/et131x/et131x_isr.c b/drivers/staging/et131x/et131x_isr.c
index cb7f6775ce0a..36f68fe3e8c9 100644
--- a/drivers/staging/et131x/et131x_isr.c
+++ b/drivers/staging/et131x/et131x_isr.c
@@ -253,14 +253,12 @@ void et131x_isr_handler(struct work_struct *work)
253 * exit. 253 * exit.
254 */ 254 */
255 /* Handle all the completed Transmit interrupts */ 255 /* Handle all the completed Transmit interrupts */
256 if (status & ET_INTR_TXDMA_ISR) { 256 if (status & ET_INTR_TXDMA_ISR)
257 et131x_handle_send_interrupt(etdev); 257 et131x_handle_send_interrupt(etdev);
258 }
259 258
260 /* Handle all the completed Receives interrupts */ 259 /* Handle all the completed Receives interrupts */
261 if (status & ET_INTR_RXDMA_XFR_DONE) { 260 if (status & ET_INTR_RXDMA_XFR_DONE)
262 et131x_handle_recv_interrupt(etdev); 261 et131x_handle_recv_interrupt(etdev);
263 }
264 262
265 status &= 0xffffffd7; 263 status &= 0xffffffd7;
266 264
diff --git a/drivers/staging/et131x/et131x_netdev.c b/drivers/staging/et131x/et131x_netdev.c
index abc82c3dad21..106d548982c4 100644
--- a/drivers/staging/et131x/et131x_netdev.c
+++ b/drivers/staging/et131x/et131x_netdev.c
@@ -426,26 +426,22 @@ void et131x_multicast(struct net_device *netdev)
426 * accordingly 426 * accordingly
427 */ 427 */
428 428
429 if (netdev->flags & IFF_PROMISC) { 429 if (netdev->flags & IFF_PROMISC)
430 adapter->PacketFilter |= ET131X_PACKET_TYPE_PROMISCUOUS; 430 adapter->PacketFilter |= ET131X_PACKET_TYPE_PROMISCUOUS;
431 } else { 431 else
432 adapter->PacketFilter &= ~ET131X_PACKET_TYPE_PROMISCUOUS; 432 adapter->PacketFilter &= ~ET131X_PACKET_TYPE_PROMISCUOUS;
433 }
434 433
435 if (netdev->flags & IFF_ALLMULTI) { 434 if (netdev->flags & IFF_ALLMULTI)
436 adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST; 435 adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST;
437 }
438 436
439 if (netdev_mc_count(netdev) > NIC_MAX_MCAST_LIST) { 437 if (netdev_mc_count(netdev) > NIC_MAX_MCAST_LIST)
440 adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST; 438 adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST;
441 }
442 439
443 if (netdev_mc_count(netdev) < 1) { 440 if (netdev_mc_count(netdev) < 1) {
444 adapter->PacketFilter &= ~ET131X_PACKET_TYPE_ALL_MULTICAST; 441 adapter->PacketFilter &= ~ET131X_PACKET_TYPE_ALL_MULTICAST;
445 adapter->PacketFilter &= ~ET131X_PACKET_TYPE_MULTICAST; 442 adapter->PacketFilter &= ~ET131X_PACKET_TYPE_MULTICAST;
446 } else { 443 } else
447 adapter->PacketFilter |= ET131X_PACKET_TYPE_MULTICAST; 444 adapter->PacketFilter |= ET131X_PACKET_TYPE_MULTICAST;
448 }
449 445
450 /* Set values in the private adapter struct */ 446 /* Set values in the private adapter struct */
451 i = 0; 447 i = 0;
diff --git a/drivers/staging/frontier/alphatrack.c b/drivers/staging/frontier/alphatrack.c
index a50a21518a8e..4e52105e6070 100644
--- a/drivers/staging/frontier/alphatrack.c
+++ b/drivers/staging/frontier/alphatrack.c
@@ -134,7 +134,7 @@ MODULE_PARM_DESC(min_interrupt_out_interval,
134/* Structure to hold all of our device specific stuff */ 134/* Structure to hold all of our device specific stuff */
135 135
136struct usb_alphatrack { 136struct usb_alphatrack {
137 struct semaphore sem; /* locks this structure */ 137 struct mutex mtx; /* locks this structure */
138 struct usb_interface *intf; /* save off the usb interface pointer */ 138 struct usb_interface *intf; /* save off the usb interface pointer */
139 int open_count; /* number of times this port has been opened */ 139 int open_count; /* number of times this port has been opened */
140 140
@@ -238,7 +238,7 @@ static void usb_alphatrack_interrupt_in_callback(struct urb *urb)
238 if (urb->actual_length != INPUT_CMD_SIZE) { 238 if (urb->actual_length != INPUT_CMD_SIZE) {
239 dev_warn(&dev->intf->dev, 239 dev_warn(&dev->intf->dev,
240 "Urb length was %d bytes!!" 240 "Urb length was %d bytes!!"
241 "Do something intelligent \n", urb->actual_length); 241 "Do something intelligent\n", urb->actual_length);
242 } else { 242 } else {
243 alphatrack_ocmd_info(&dev->intf->dev, 243 alphatrack_ocmd_info(&dev->intf->dev,
244 &(*dev->ring_buffer)[dev->ring_tail].cmd, 244 &(*dev->ring_buffer)[dev->ring_tail].cmd,
@@ -347,7 +347,7 @@ static int usb_alphatrack_open(struct inode *inode, struct file *file)
347 } 347 }
348 348
349 /* lock this device */ 349 /* lock this device */
350 if (down_interruptible(&dev->sem)) { 350 if (mutex_lock_interruptible(&dev->mtx)) {
351 retval = -ERESTARTSYS; 351 retval = -ERESTARTSYS;
352 goto unlock_disconnect_exit; 352 goto unlock_disconnect_exit;
353 } 353 }
@@ -390,7 +390,7 @@ static int usb_alphatrack_open(struct inode *inode, struct file *file)
390 file->private_data = dev; 390 file->private_data = dev;
391 391
392unlock_exit: 392unlock_exit:
393 up(&dev->sem); 393 mutex_unlock(&dev->mtx);
394 394
395unlock_disconnect_exit: 395unlock_disconnect_exit:
396 mutex_unlock(&disconnect_mutex); 396 mutex_unlock(&disconnect_mutex);
@@ -413,7 +413,7 @@ static int usb_alphatrack_release(struct inode *inode, struct file *file)
413 goto exit; 413 goto exit;
414 } 414 }
415 415
416 if (down_interruptible(&dev->sem)) { 416 if (mutex_lock_interruptible(&dev->mtx)) {
417 retval = -ERESTARTSYS; 417 retval = -ERESTARTSYS;
418 goto exit; 418 goto exit;
419 } 419 }
@@ -425,7 +425,7 @@ static int usb_alphatrack_release(struct inode *inode, struct file *file)
425 425
426 if (dev->intf == NULL) { 426 if (dev->intf == NULL) {
427 /* the device was unplugged before the file was released */ 427 /* the device was unplugged before the file was released */
428 up(&dev->sem); 428 mutex_unlock(&dev->mtx);
429 /* unlock here as usb_alphatrack_delete frees dev */ 429 /* unlock here as usb_alphatrack_delete frees dev */
430 usb_alphatrack_delete(dev); 430 usb_alphatrack_delete(dev);
431 retval = -ENODEV; 431 retval = -ENODEV;
@@ -441,7 +441,7 @@ static int usb_alphatrack_release(struct inode *inode, struct file *file)
441 dev->open_count = 0; 441 dev->open_count = 0;
442 442
443unlock_exit: 443unlock_exit:
444 up(&dev->sem); 444 mutex_unlock(&dev->mtx);
445 445
446exit: 446exit:
447 return retval; 447 return retval;
@@ -486,7 +486,7 @@ static ssize_t usb_alphatrack_read(struct file *file, char __user *buffer,
486 goto exit; 486 goto exit;
487 487
488 /* lock this object */ 488 /* lock this object */
489 if (down_interruptible(&dev->sem)) { 489 if (mutex_lock_interruptible(&dev->mtx)) {
490 retval = -ERESTARTSYS; 490 retval = -ERESTARTSYS;
491 goto exit; 491 goto exit;
492 } 492 }
@@ -532,7 +532,7 @@ static ssize_t usb_alphatrack_read(struct file *file, char __user *buffer,
532 532
533unlock_exit: 533unlock_exit:
534 /* unlock the device */ 534 /* unlock the device */
535 up(&dev->sem); 535 mutex_unlock(&dev->mtx);
536 536
537exit: 537exit:
538 return retval; 538 return retval;
@@ -556,7 +556,7 @@ static ssize_t usb_alphatrack_write(struct file *file,
556 goto exit; 556 goto exit;
557 557
558 /* lock this object */ 558 /* lock this object */
559 if (down_interruptible(&dev->sem)) { 559 if (mutex_lock_interruptible(&dev->mtx)) {
560 retval = -ERESTARTSYS; 560 retval = -ERESTARTSYS;
561 goto exit; 561 goto exit;
562 } 562 }
@@ -599,7 +599,7 @@ static ssize_t usb_alphatrack_write(struct file *file,
599 } 599 }
600 600
601 if (dev->interrupt_out_endpoint == NULL) { 601 if (dev->interrupt_out_endpoint == NULL) {
602 err("Endpoint should not be be null! \n"); 602 err("Endpoint should not be be null!\n");
603 goto unlock_exit; 603 goto unlock_exit;
604 } 604 }
605 605
@@ -627,7 +627,7 @@ static ssize_t usb_alphatrack_write(struct file *file,
627 627
628unlock_exit: 628unlock_exit:
629 /* unlock the device */ 629 /* unlock the device */
630 up(&dev->sem); 630 mutex_unlock(&dev->mtx);
631 631
632exit: 632exit:
633 return retval; 633 return retval;
@@ -678,7 +678,7 @@ static int usb_alphatrack_probe(struct usb_interface *intf,
678 dev_err(&intf->dev, "Out of memory\n"); 678 dev_err(&intf->dev, "Out of memory\n");
679 goto exit; 679 goto exit;
680 } 680 }
681 init_MUTEX(&dev->sem); 681 mutex_init(&dev->mtx);
682 dev->intf = intf; 682 dev->intf = intf;
683 init_waitqueue_head(&dev->read_wait); 683 init_waitqueue_head(&dev->read_wait);
684 init_waitqueue_head(&dev->write_wait); 684 init_waitqueue_head(&dev->write_wait);
@@ -771,7 +771,7 @@ static int usb_alphatrack_probe(struct usb_interface *intf,
771 kmalloc(sizeof(struct alphatrack_ocmd) * true_size, GFP_KERNEL); 771 kmalloc(sizeof(struct alphatrack_ocmd) * true_size, GFP_KERNEL);
772 772
773 if (!dev->write_buffer) { 773 if (!dev->write_buffer) {
774 dev_err(&intf->dev, "Couldn't allocate write_buffer \n"); 774 dev_err(&intf->dev, "Couldn't allocate write_buffer\n");
775 goto error; 775 goto error;
776 } 776 }
777 777
@@ -835,7 +835,7 @@ static void usb_alphatrack_disconnect(struct usb_interface *intf)
835 dev = usb_get_intfdata(intf); 835 dev = usb_get_intfdata(intf);
836 usb_set_intfdata(intf, NULL); 836 usb_set_intfdata(intf, NULL);
837 837
838 down(&dev->sem); 838 mutex_lock(&dev->mtx);
839 839
840 minor = intf->minor; 840 minor = intf->minor;
841 841
@@ -844,11 +844,11 @@ static void usb_alphatrack_disconnect(struct usb_interface *intf)
844 844
845 /* if the device is not opened, then we clean up right now */ 845 /* if the device is not opened, then we clean up right now */
846 if (!dev->open_count) { 846 if (!dev->open_count) {
847 up(&dev->sem); 847 mutex_unlock(&dev->mtx);
848 usb_alphatrack_delete(dev); 848 usb_alphatrack_delete(dev);
849 } else { 849 } else {
850 dev->intf = NULL; 850 dev->intf = NULL;
851 up(&dev->sem); 851 mutex_unlock(&dev->mtx);
852 } 852 }
853 853
854 atomic_set(&dev->writes_pending, 0); 854 atomic_set(&dev->writes_pending, 0);
diff --git a/drivers/staging/frontier/tranzport.c b/drivers/staging/frontier/tranzport.c
index 2f03f43f3a2e..eed74f0fe0b6 100644
--- a/drivers/staging/frontier/tranzport.c
+++ b/drivers/staging/frontier/tranzport.c
@@ -123,7 +123,7 @@ struct tranzport_cmd {
123/* Structure to hold all of our device specific stuff */ 123/* Structure to hold all of our device specific stuff */
124 124
125struct usb_tranzport { 125struct usb_tranzport {
126 struct semaphore sem; /* locks this structure */ 126 struct mutex mtx; /* locks this structure */
127 struct usb_interface *intf; /* save off the usb interface pointer */ 127 struct usb_interface *intf; /* save off the usb interface pointer */
128 int open_count; /* number of times this port opened */ 128 int open_count; /* number of times this port opened */
129 struct tranzport_cmd (*ring_buffer)[RING_BUFFER_SIZE]; 129 struct tranzport_cmd (*ring_buffer)[RING_BUFFER_SIZE];
@@ -198,7 +198,9 @@ static void usb_tranzport_abort_transfers(struct usb_tranzport *dev)
198 { \ 198 { \
199 struct usb_interface *intf = to_usb_interface(dev); \ 199 struct usb_interface *intf = to_usb_interface(dev); \
200 struct usb_tranzport *t = usb_get_intfdata(intf); \ 200 struct usb_tranzport *t = usb_get_intfdata(intf); \
201 int temp = simple_strtoul(buf, NULL, 10); \ 201 unsigned long temp; \
202 if (strict_strtoul(buf, 10, &temp)) \
203 return -EINVAL; \
202 t->value = temp; \ 204 t->value = temp; \
203 return count; \ 205 return count; \
204 } \ 206 } \
@@ -255,7 +257,7 @@ static void usb_tranzport_interrupt_in_callback(struct urb *urb)
255 if (urb->actual_length != 8) { 257 if (urb->actual_length != 8) {
256 dev_warn(&dev->intf->dev, 258 dev_warn(&dev->intf->dev,
257 "Urb length was %d bytes!!" 259 "Urb length was %d bytes!!"
258 "Do something intelligent \n", 260 "Do something intelligent\n",
259 urb->actual_length); 261 urb->actual_length);
260 } else { 262 } else {
261 dbg_info(&dev->intf->dev, 263 dbg_info(&dev->intf->dev,
@@ -365,7 +367,7 @@ static int usb_tranzport_open(struct inode *inode, struct file *file)
365 } 367 }
366 368
367 /* lock this device */ 369 /* lock this device */
368 if (down_interruptible(&dev->sem)) { 370 if (mutex_lock_interruptible(&dev->mtx)) {
369 retval = -ERESTARTSYS; 371 retval = -ERESTARTSYS;
370 goto unlock_disconnect_exit; 372 goto unlock_disconnect_exit;
371 } 373 }
@@ -409,7 +411,7 @@ static int usb_tranzport_open(struct inode *inode, struct file *file)
409 file->private_data = dev; 411 file->private_data = dev;
410 412
411unlock_exit: 413unlock_exit:
412 up(&dev->sem); 414 mutex_unlock(&dev->mtx);
413 415
414unlock_disconnect_exit: 416unlock_disconnect_exit:
415 mutex_unlock(&disconnect_mutex); 417 mutex_unlock(&disconnect_mutex);
@@ -432,7 +434,7 @@ static int usb_tranzport_release(struct inode *inode, struct file *file)
432 goto exit; 434 goto exit;
433 } 435 }
434 436
435 if (down_interruptible(&dev->sem)) { 437 if (mutex_lock_interruptible(&dev->mtx)) {
436 retval = -ERESTARTSYS; 438 retval = -ERESTARTSYS;
437 goto exit; 439 goto exit;
438 } 440 }
@@ -444,7 +446,7 @@ static int usb_tranzport_release(struct inode *inode, struct file *file)
444 446
445 if (dev->intf == NULL) { 447 if (dev->intf == NULL) {
446 /* the device was unplugged before the file was released */ 448 /* the device was unplugged before the file was released */
447 up(&dev->sem); 449 mutex_unlock(&dev->mtx);
448 /* unlock here as usb_tranzport_delete frees dev */ 450 /* unlock here as usb_tranzport_delete frees dev */
449 usb_tranzport_delete(dev); 451 usb_tranzport_delete(dev);
450 retval = -ENODEV; 452 retval = -ENODEV;
@@ -460,7 +462,7 @@ static int usb_tranzport_release(struct inode *inode, struct file *file)
460 dev->open_count = 0; 462 dev->open_count = 0;
461 463
462unlock_exit: 464unlock_exit:
463 up(&dev->sem); 465 mutex_unlock(&dev->mtx);
464 466
465exit: 467exit:
466 return retval; 468 return retval;
@@ -510,7 +512,7 @@ static ssize_t usb_tranzport_read(struct file *file, char __user *buffer,
510 goto exit; 512 goto exit;
511 513
512 /* lock this object */ 514 /* lock this object */
513 if (down_interruptible(&dev->sem)) { 515 if (mutex_lock_interruptible(&dev->mtx)) {
514 retval = -ERESTARTSYS; 516 retval = -ERESTARTSYS;
515 goto exit; 517 goto exit;
516 } 518 }
@@ -658,7 +660,7 @@ retval = 8;
658 660
659unlock_exit: 661unlock_exit:
660/* unlock the device */ 662/* unlock the device */
661up(&dev->sem); 663mutex_unlock(&dev->mtx);
662 664
663exit: 665exit:
664return retval; 666return retval;
@@ -682,7 +684,7 @@ static ssize_t usb_tranzport_write(struct file *file,
682 goto exit; 684 goto exit;
683 685
684 /* lock this object */ 686 /* lock this object */
685 if (down_interruptible(&dev->sem)) { 687 if (mutex_lock_interruptible(&dev->mtx)) {
686 retval = -ERESTARTSYS; 688 retval = -ERESTARTSYS;
687 goto exit; 689 goto exit;
688 } 690 }
@@ -724,7 +726,7 @@ static ssize_t usb_tranzport_write(struct file *file,
724 } 726 }
725 727
726 if (dev->interrupt_out_endpoint == NULL) { 728 if (dev->interrupt_out_endpoint == NULL) {
727 err("Endpoint should not be be null! \n"); 729 err("Endpoint should not be be null!\n");
728 goto unlock_exit; 730 goto unlock_exit;
729 } 731 }
730 732
@@ -751,7 +753,7 @@ static ssize_t usb_tranzport_write(struct file *file,
751 753
752unlock_exit: 754unlock_exit:
753 /* unlock the device */ 755 /* unlock the device */
754 up(&dev->sem); 756 mutex_unlock(&dev->mtx);
755 757
756exit: 758exit:
757 return retval; 759 return retval;
@@ -800,7 +802,7 @@ static int usb_tranzport_probe(struct usb_interface *intf,
800 dev_err(&intf->dev, "Out of memory\n"); 802 dev_err(&intf->dev, "Out of memory\n");
801 goto exit; 803 goto exit;
802 } 804 }
803 init_MUTEX(&dev->sem); 805 mutex_init(&dev->mtx);
804 dev->intf = intf; 806 dev->intf = intf;
805 init_waitqueue_head(&dev->read_wait); 807 init_waitqueue_head(&dev->read_wait);
806 init_waitqueue_head(&dev->write_wait); 808 init_waitqueue_head(&dev->write_wait);
@@ -940,18 +942,18 @@ static void usb_tranzport_disconnect(struct usb_interface *intf)
940 mutex_lock(&disconnect_mutex); 942 mutex_lock(&disconnect_mutex);
941 dev = usb_get_intfdata(intf); 943 dev = usb_get_intfdata(intf);
942 usb_set_intfdata(intf, NULL); 944 usb_set_intfdata(intf, NULL);
943 down(&dev->sem); 945 mutex_lock(&dev->mtx);
944 minor = intf->minor; 946 minor = intf->minor;
945 /* give back our minor */ 947 /* give back our minor */
946 usb_deregister_dev(intf, &usb_tranzport_class); 948 usb_deregister_dev(intf, &usb_tranzport_class);
947 949
948 /* if the device is not opened, then we clean up right now */ 950 /* if the device is not opened, then we clean up right now */
949 if (!dev->open_count) { 951 if (!dev->open_count) {
950 up(&dev->sem); 952 mutex_unlock(&dev->mtx);
951 usb_tranzport_delete(dev); 953 usb_tranzport_delete(dev);
952 } else { 954 } else {
953 dev->intf = NULL; 955 dev->intf = NULL;
954 up(&dev->sem); 956 mutex_unlock(&dev->mtx);
955 } 957 }
956 958
957 mutex_unlock(&disconnect_mutex); 959 mutex_unlock(&disconnect_mutex);
diff --git a/drivers/staging/go7007/go7007-fw.c b/drivers/staging/go7007/go7007-fw.c
index ee622ff1707e..c9a6409edfe3 100644
--- a/drivers/staging/go7007/go7007-fw.c
+++ b/drivers/staging/go7007/go7007-fw.c
@@ -380,13 +380,12 @@ static int gen_mjpeghdr_to_package(struct go7007 *go, __le16 *code, int space)
380 unsigned int addr = 0x19; 380 unsigned int addr = 0x19;
381 int size = 0, i, off = 0, chunk; 381 int size = 0, i, off = 0, chunk;
382 382
383 buf = kmalloc(4096, GFP_KERNEL); 383 buf = kzalloc(4096, GFP_KERNEL);
384 if (buf == NULL) { 384 if (buf == NULL) {
385 printk(KERN_ERR "go7007: unable to allocate 4096 bytes for " 385 printk(KERN_ERR "go7007: unable to allocate 4096 bytes for "
386 "firmware construction\n"); 386 "firmware construction\n");
387 return -1; 387 return -1;
388 } 388 }
389 memset(buf, 0, 4096);
390 389
391 for (i = 1; i < 32; ++i) { 390 for (i = 1; i < 32; ++i) {
392 mjpeg_frame_header(go, buf + size, i); 391 mjpeg_frame_header(go, buf + size, i);
@@ -651,13 +650,12 @@ static int gen_mpeg1hdr_to_package(struct go7007 *go,
651 unsigned int addr = 0x19; 650 unsigned int addr = 0x19;
652 int i, off = 0, chunk; 651 int i, off = 0, chunk;
653 652
654 buf = kmalloc(5120, GFP_KERNEL); 653 buf = kzalloc(5120, GFP_KERNEL);
655 if (buf == NULL) { 654 if (buf == NULL) {
656 printk(KERN_ERR "go7007: unable to allocate 5120 bytes for " 655 printk(KERN_ERR "go7007: unable to allocate 5120 bytes for "
657 "firmware construction\n"); 656 "firmware construction\n");
658 return -1; 657 return -1;
659 } 658 }
660 memset(buf, 0, 5120);
661 framelen[0] = mpeg1_frame_header(go, buf, 0, 1, PFRAME); 659 framelen[0] = mpeg1_frame_header(go, buf, 0, 1, PFRAME);
662 if (go->interlace_coding) 660 if (go->interlace_coding)
663 framelen[0] += mpeg1_frame_header(go, buf + framelen[0] / 8, 661 framelen[0] += mpeg1_frame_header(go, buf + framelen[0] / 8,
@@ -839,13 +837,12 @@ static int gen_mpeg4hdr_to_package(struct go7007 *go,
839 unsigned int addr = 0x19; 837 unsigned int addr = 0x19;
840 int i, off = 0, chunk; 838 int i, off = 0, chunk;
841 839
842 buf = kmalloc(5120, GFP_KERNEL); 840 buf = kzalloc(5120, GFP_KERNEL);
843 if (buf == NULL) { 841 if (buf == NULL) {
844 printk(KERN_ERR "go7007: unable to allocate 5120 bytes for " 842 printk(KERN_ERR "go7007: unable to allocate 5120 bytes for "
845 "firmware construction\n"); 843 "firmware construction\n");
846 return -1; 844 return -1;
847 } 845 }
848 memset(buf, 0, 5120);
849 framelen[0] = mpeg4_frame_header(go, buf, 0, PFRAME); 846 framelen[0] = mpeg4_frame_header(go, buf, 0, PFRAME);
850 i = 368; 847 i = 368;
851 framelen[1] = mpeg4_frame_header(go, buf + i, 0, BFRAME_PRE); 848 framelen[1] = mpeg4_frame_header(go, buf + i, 0, BFRAME_PRE);
@@ -1585,13 +1582,12 @@ int go7007_construct_fw_image(struct go7007 *go, u8 **fw, int *fwlen)
1585 go->board_info->firmware); 1582 go->board_info->firmware);
1586 return -1; 1583 return -1;
1587 } 1584 }
1588 code = kmalloc(codespace * 2, GFP_KERNEL); 1585 code = kzalloc(codespace * 2, GFP_KERNEL);
1589 if (code == NULL) { 1586 if (code == NULL) {
1590 printk(KERN_ERR "go7007: unable to allocate %d bytes for " 1587 printk(KERN_ERR "go7007: unable to allocate %d bytes for "
1591 "firmware construction\n", codespace * 2); 1588 "firmware construction\n", codespace * 2);
1592 goto fw_failed; 1589 goto fw_failed;
1593 } 1590 }
1594 memset(code, 0, codespace * 2);
1595 src = (__le16 *)fw_entry->data; 1591 src = (__le16 *)fw_entry->data;
1596 srclen = fw_entry->size / 2; 1592 srclen = fw_entry->size / 2;
1597 while (srclen >= 2) { 1593 while (srclen >= 2) {
diff --git a/drivers/staging/go7007/go7007-usb.c b/drivers/staging/go7007/go7007-usb.c
index ee278f64a16b..20ed930b588c 100644
--- a/drivers/staging/go7007/go7007-usb.c
+++ b/drivers/staging/go7007/go7007-usb.c
@@ -670,10 +670,9 @@ static int go7007_usb_onboard_write_interrupt(struct go7007 *go,
670 "go7007-usb: WriteInterrupt: %04x %04x\n", addr, data); 670 "go7007-usb: WriteInterrupt: %04x %04x\n", addr, data);
671#endif 671#endif
672 672
673 tbuf = kmalloc(8, GFP_KERNEL); 673 tbuf = kzalloc(8, GFP_KERNEL);
674 if (tbuf == NULL) 674 if (tbuf == NULL)
675 return -ENOMEM; 675 return -ENOMEM;
676 memset(tbuf, 0, 8);
677 tbuf[0] = data & 0xff; 676 tbuf[0] = data & 0xff;
678 tbuf[1] = data >> 8; 677 tbuf[1] = data >> 8;
679 tbuf[2] = addr & 0xff; 678 tbuf[2] = addr & 0xff;
diff --git a/drivers/staging/go7007/go7007-v4l2.c b/drivers/staging/go7007/go7007-v4l2.c
index 723c1a64d87f..46b4b9f6855b 100644
--- a/drivers/staging/go7007/go7007-v4l2.c
+++ b/drivers/staging/go7007/go7007-v4l2.c
@@ -720,7 +720,7 @@ static int vidioc_reqbufs(struct file *file, void *priv,
720 if (count > 32) 720 if (count > 32)
721 count = 32; 721 count = 32;
722 722
723 gofh->bufs = kmalloc(count * sizeof(struct go7007_buffer), 723 gofh->bufs = kcalloc(count, sizeof(struct go7007_buffer),
724 GFP_KERNEL); 724 GFP_KERNEL);
725 725
726 if (!gofh->bufs) { 726 if (!gofh->bufs) {
@@ -728,8 +728,6 @@ static int vidioc_reqbufs(struct file *file, void *priv,
728 goto unlock_and_return; 728 goto unlock_and_return;
729 } 729 }
730 730
731 memset(gofh->bufs, 0, count * sizeof(struct go7007_buffer));
732
733 for (i = 0; i < count; ++i) { 731 for (i = 0; i < count; ++i) {
734 gofh->bufs[i].go = go; 732 gofh->bufs[i].go = go;
735 gofh->bufs[i].index = i; 733 gofh->bufs[i].index = i;
diff --git a/drivers/staging/go7007/saa7134-go7007.c b/drivers/staging/go7007/saa7134-go7007.c
index b25d7d2090e1..49f0d31c118a 100644
--- a/drivers/staging/go7007/saa7134-go7007.c
+++ b/drivers/staging/go7007/saa7134-go7007.c
@@ -440,10 +440,9 @@ static int saa7134_go7007_init(struct saa7134_dev *dev)
440 440
441 printk(KERN_DEBUG "saa7134-go7007: probing new SAA713X board\n"); 441 printk(KERN_DEBUG "saa7134-go7007: probing new SAA713X board\n");
442 442
443 saa = kmalloc(sizeof(struct saa7134_go7007), GFP_KERNEL); 443 saa = kzalloc(sizeof(struct saa7134_go7007), GFP_KERNEL);
444 if (saa == NULL) 444 if (saa == NULL)
445 return -ENOMEM; 445 return -ENOMEM;
446 memset(saa, 0, sizeof(struct saa7134_go7007));
447 446
448 /* Allocate a couple pages for receiving the compressed stream */ 447 /* Allocate a couple pages for receiving the compressed stream */
449 saa->top = (u8 *)get_zeroed_page(GFP_KERNEL); 448 saa->top = (u8 *)get_zeroed_page(GFP_KERNEL);
diff --git a/drivers/staging/go7007/wis-saa7113.c b/drivers/staging/go7007/wis-saa7113.c
index 5c12b4d38459..bd925457f8b7 100644
--- a/drivers/staging/go7007/wis-saa7113.c
+++ b/drivers/staging/go7007/wis-saa7113.c
@@ -289,6 +289,7 @@ static int wis_saa7113_probe(struct i2c_client *client,
289 if (write_regs(client, initial_registers) < 0) { 289 if (write_regs(client, initial_registers) < 0) {
290 printk(KERN_ERR 290 printk(KERN_ERR
291 "wis-saa7113: error initializing SAA7113\n"); 291 "wis-saa7113: error initializing SAA7113\n");
292 i2c_set_clientdata(client, NULL);
292 kfree(dec); 293 kfree(dec);
293 return -ENODEV; 294 return -ENODEV;
294 } 295 }
diff --git a/drivers/staging/go7007/wis-saa7115.c b/drivers/staging/go7007/wis-saa7115.c
index 73f2283a8803..b2eb804c1954 100644
--- a/drivers/staging/go7007/wis-saa7115.c
+++ b/drivers/staging/go7007/wis-saa7115.c
@@ -422,6 +422,7 @@ static int wis_saa7115_probe(struct i2c_client *client,
422 if (write_regs(client, initial_registers) < 0) { 422 if (write_regs(client, initial_registers) < 0) {
423 printk(KERN_ERR 423 printk(KERN_ERR
424 "wis-saa7115: error initializing SAA7115\n"); 424 "wis-saa7115: error initializing SAA7115\n");
425 i2c_set_clientdata(client, NULL);
425 kfree(dec); 426 kfree(dec);
426 return -ENODEV; 427 return -ENODEV;
427 } 428 }
diff --git a/drivers/staging/go7007/wis-tw9903.c b/drivers/staging/go7007/wis-tw9903.c
index 3ac6f785c4ad..2afea09091b9 100644
--- a/drivers/staging/go7007/wis-tw9903.c
+++ b/drivers/staging/go7007/wis-tw9903.c
@@ -294,6 +294,7 @@ static int wis_tw9903_probe(struct i2c_client *client,
294 294
295 if (write_regs(client, initial_registers) < 0) { 295 if (write_regs(client, initial_registers) < 0) {
296 printk(KERN_ERR "wis-tw9903: error initializing TW9903\n"); 296 printk(KERN_ERR "wis-tw9903: error initializing TW9903\n");
297 i2c_set_clientdata(client, NULL);
297 kfree(dec); 298 kfree(dec);
298 return -ENODEV; 299 return -ENODEV;
299 } 300 }
diff --git a/drivers/staging/hv/Kconfig b/drivers/staging/hv/Kconfig
index 40447020a790..97480f5c6599 100644
--- a/drivers/staging/hv/Kconfig
+++ b/drivers/staging/hv/Kconfig
@@ -17,7 +17,7 @@ config HYPERV_STORAGE
17 17
18config HYPERV_BLOCK 18config HYPERV_BLOCK
19 tristate "Microsoft Hyper-V virtual block driver" 19 tristate "Microsoft Hyper-V virtual block driver"
20 depends on BLOCK && SCSI 20 depends on BLOCK && SCSI && LBDAF
21 default HYPERV 21 default HYPERV
22 help 22 help
23 Select this option to enable the Hyper-V virtual block driver. 23 Select this option to enable the Hyper-V virtual block driver.
@@ -29,4 +29,10 @@ config HYPERV_NET
29 help 29 help
30 Select this option to enable the Hyper-V virtual network driver. 30 Select this option to enable the Hyper-V virtual network driver.
31 31
32config HYPERV_UTILS
33 tristate "Microsoft Hyper-V Utilities driver"
34 default HYPERV
35 help
36 Select this option to enable the Hyper-V Utilities.
37
32endif 38endif
diff --git a/drivers/staging/hv/Makefile b/drivers/staging/hv/Makefile
index 27ebae8a9185..1866f80a45d3 100644
--- a/drivers/staging/hv/Makefile
+++ b/drivers/staging/hv/Makefile
@@ -2,10 +2,11 @@ obj-$(CONFIG_HYPERV) += hv_vmbus.o
2obj-$(CONFIG_HYPERV_STORAGE) += hv_storvsc.o 2obj-$(CONFIG_HYPERV_STORAGE) += hv_storvsc.o
3obj-$(CONFIG_HYPERV_BLOCK) += hv_blkvsc.o 3obj-$(CONFIG_HYPERV_BLOCK) += hv_blkvsc.o
4obj-$(CONFIG_HYPERV_NET) += hv_netvsc.o 4obj-$(CONFIG_HYPERV_NET) += hv_netvsc.o
5obj-$(CONFIG_HYPERV_UTILS) += hv_utils.o
5 6
6hv_vmbus-objs := vmbus_drv.o osd.o \ 7hv_vmbus-objs := vmbus_drv.o osd.o \
7 Vmbus.o Hv.o Connection.o Channel.o \ 8 vmbus.o hv.o connection.o channel.o \
8 ChannelMgmt.o ChannelInterface.o RingBuffer.o 9 channel_mgmt.o channel_interface.o ring_buffer.o
9hv_storvsc-objs := storvsc_drv.o StorVsc.o 10hv_storvsc-objs := storvsc_drv.o storvsc.o
10hv_blkvsc-objs := blkvsc_drv.o BlkVsc.o 11hv_blkvsc-objs := blkvsc_drv.o blkvsc.o
11hv_netvsc-objs := netvsc_drv.o NetVsc.o RndisFilter.o 12hv_netvsc-objs := netvsc_drv.o netvsc.o rndis_filter.o
diff --git a/drivers/staging/hv/TODO b/drivers/staging/hv/TODO
index dbfbde937a66..66a89c809dd3 100644
--- a/drivers/staging/hv/TODO
+++ b/drivers/staging/hv/TODO
@@ -1,7 +1,5 @@
1TODO: 1TODO:
2 - fix remaining checkpatch warnings and errors 2 - fix remaining checkpatch warnings and errors
3 - use of /** when it is not a kerneldoc header
4 - remove RingBuffer.c to us in-kernel ringbuffer functions instead.
5 - audit the vmbus to verify it is working properly with the 3 - audit the vmbus to verify it is working properly with the
6 driver model 4 driver model
7 - convert vmbus driver interface function pointer tables 5 - convert vmbus driver interface function pointer tables
@@ -9,7 +7,6 @@ TODO:
9 - see if the vmbus can be merged with the other virtual busses 7 - see if the vmbus can be merged with the other virtual busses
10 in the kernel 8 in the kernel
11 - audit the network driver 9 - audit the network driver
12 - use existing net_device_stats struct in network device
13 - checking for carrier inside open is wrong, network device API 10 - checking for carrier inside open is wrong, network device API
14 confusion?? 11 confusion??
15 - audit the block driver 12 - audit the block driver
diff --git a/drivers/staging/hv/BlkVsc.c b/drivers/staging/hv/blkvsc.c
index a48ee3a12646..0daebc472e63 100644
--- a/drivers/staging/hv/BlkVsc.c
+++ b/drivers/staging/hv/blkvsc.c
@@ -23,7 +23,7 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include "osd.h" 25#include "osd.h"
26#include "StorVsc.c" 26#include "storvsc.c"
27 27
28static const char *gBlkDriverName = "blkvsc"; 28static const char *gBlkDriverName = "blkvsc";
29 29
@@ -78,7 +78,7 @@ int BlkVscInitialize(struct hv_driver *Driver)
78 storDriver = (struct storvsc_driver_object *)Driver; 78 storDriver = (struct storvsc_driver_object *)Driver;
79 79
80 /* Make sure we are at least 2 pages since 1 page is used for control */ 80 /* Make sure we are at least 2 pages since 1 page is used for control */
81 ASSERT(storDriver->RingBufferSize >= (PAGE_SIZE << 1)); 81 /* ASSERT(storDriver->RingBufferSize >= (PAGE_SIZE << 1)); */
82 82
83 Driver->name = gBlkDriverName; 83 Driver->name = gBlkDriverName;
84 memcpy(&Driver->deviceType, &gBlkVscDeviceType, sizeof(struct hv_guid)); 84 memcpy(&Driver->deviceType, &gBlkVscDeviceType, sizeof(struct hv_guid));
diff --git a/drivers/staging/hv/blkvsc_drv.c b/drivers/staging/hv/blkvsc_drv.c
index 8f1fda3256ad..61bd0be5fb18 100644
--- a/drivers/staging/hv/blkvsc_drv.c
+++ b/drivers/staging/hv/blkvsc_drv.c
@@ -32,9 +32,9 @@
32#include <scsi/scsi_dbg.h> 32#include <scsi/scsi_dbg.h>
33#include "osd.h" 33#include "osd.h"
34#include "logging.h" 34#include "logging.h"
35#include "VersionInfo.h" 35#include "version_info.h"
36#include "vmbus.h" 36#include "vmbus.h"
37#include "StorVscApi.h" 37#include "storvsc_api.h"
38 38
39 39
40#define BLKVSC_MINORS 64 40#define BLKVSC_MINORS 64
@@ -149,13 +149,14 @@ static int blkvsc_do_flush(struct block_device_context *blkdev);
149static int blkvsc_cancel_pending_reqs(struct block_device_context *blkdev); 149static int blkvsc_cancel_pending_reqs(struct block_device_context *blkdev);
150static int blkvsc_do_pending_reqs(struct block_device_context *blkdev); 150static int blkvsc_do_pending_reqs(struct block_device_context *blkdev);
151 151
152
153static int blkvsc_ringbuffer_size = BLKVSC_RING_BUFFER_SIZE; 152static int blkvsc_ringbuffer_size = BLKVSC_RING_BUFFER_SIZE;
153module_param(blkvsc_ringbuffer_size, int, S_IRUGO);
154MODULE_PARM_DESC(ring_size, "Ring buffer size (in bytes)");
154 155
155/* The one and only one */ 156/* The one and only one */
156static struct blkvsc_driver_context g_blkvsc_drv; 157static struct blkvsc_driver_context g_blkvsc_drv;
157 158
158static struct block_device_operations block_ops = { 159static const struct block_device_operations block_ops = {
159 .owner = THIS_MODULE, 160 .owner = THIS_MODULE,
160 .open = blkvsc_open, 161 .open = blkvsc_open,
161 .release = blkvsc_release, 162 .release = blkvsc_release,
@@ -165,7 +166,7 @@ static struct block_device_operations block_ops = {
165 .ioctl = blkvsc_ioctl, 166 .ioctl = blkvsc_ioctl,
166}; 167};
167 168
168/** 169/*
169 * blkvsc_drv_init - BlkVsc driver initialization. 170 * blkvsc_drv_init - BlkVsc driver initialization.
170 */ 171 */
171static int blkvsc_drv_init(int (*drv_init)(struct hv_driver *drv)) 172static int blkvsc_drv_init(int (*drv_init)(struct hv_driver *drv))
@@ -245,7 +246,7 @@ static void blkvsc_drv_exit(void)
245 return; 246 return;
246} 247}
247 248
248/** 249/*
249 * blkvsc_probe - Add a new device for this driver 250 * blkvsc_probe - Add a new device for this driver
250 */ 251 */
251static int blkvsc_probe(struct device *device) 252static int blkvsc_probe(struct device *device)
@@ -288,8 +289,8 @@ static int blkvsc_probe(struct device *device)
288 /* Initialize what we can here */ 289 /* Initialize what we can here */
289 spin_lock_init(&blkdev->lock); 290 spin_lock_init(&blkdev->lock);
290 291
291 ASSERT(sizeof(struct blkvsc_request_group) <= 292 /* ASSERT(sizeof(struct blkvsc_request_group) <= */
292 sizeof(struct blkvsc_request)); 293 /* sizeof(struct blkvsc_request)); */
293 294
294 blkdev->request_pool = kmem_cache_create(dev_name(&device_ctx->device), 295 blkdev->request_pool = kmem_cache_create(dev_name(&device_ctx->device),
295 sizeof(struct blkvsc_request) + 296 sizeof(struct blkvsc_request) +
@@ -555,7 +556,7 @@ static int blkvsc_do_inquiry(struct block_device_context *blkdev)
555 blkdev->device_type = UNKNOWN_DEV_TYPE; 556 blkdev->device_type = UNKNOWN_DEV_TYPE;
556 } 557 }
557 558
558 DPRINT_DBG(BLKVSC_DRV, "device type %d \n", device_type); 559 DPRINT_DBG(BLKVSC_DRV, "device type %d\n", device_type);
559 560
560 blkdev->device_id_len = buf[7]; 561 blkdev->device_id_len = buf[7];
561 if (blkdev->device_id_len > 64) 562 if (blkdev->device_id_len > 64)
@@ -733,7 +734,7 @@ static int blkvsc_do_read_capacity16(struct block_device_context *blkdev)
733 return 0; 734 return 0;
734} 735}
735 736
736/** 737/*
737 * blkvsc_remove() - Callback when our device is removed 738 * blkvsc_remove() - Callback when our device is removed
738 */ 739 */
739static int blkvsc_remove(struct device *device) 740static int blkvsc_remove(struct device *device)
@@ -808,8 +809,8 @@ static int blkvsc_remove(struct device *device)
808 809
809static void blkvsc_init_rw(struct blkvsc_request *blkvsc_req) 810static void blkvsc_init_rw(struct blkvsc_request *blkvsc_req)
810{ 811{
811 ASSERT(blkvsc_req->req); 812 /* ASSERT(blkvsc_req->req); */
812 ASSERT(blkvsc_req->sector_count <= (MAX_MULTIPAGE_BUFFER_COUNT*8)); 813 /* ASSERT(blkvsc_req->sector_count <= (MAX_MULTIPAGE_BUFFER_COUNT*8)); */
813 814
814 blkvsc_req->cmd_len = 16; 815 blkvsc_req->cmd_len = 16;
815 816
@@ -940,7 +941,7 @@ static int blkvsc_do_request(struct block_device_context *blkdev,
940 int pending = 0; 941 int pending = 0;
941 struct blkvsc_request_group *group = NULL; 942 struct blkvsc_request_group *group = NULL;
942 943
943 DPRINT_DBG(BLKVSC_DRV, "blkdev %p req %p sect %lu \n", blkdev, req, 944 DPRINT_DBG(BLKVSC_DRV, "blkdev %p req %p sect %lu\n", blkdev, req,
944 (unsigned long)blk_rq_pos(req)); 945 (unsigned long)blk_rq_pos(req));
945 946
946 /* Create a group to tie req to list of blkvsc_reqs */ 947 /* Create a group to tie req to list of blkvsc_reqs */
@@ -1116,7 +1117,7 @@ static void blkvsc_request_completion(struct hv_storvsc_request *request)
1116 unsigned long flags; 1117 unsigned long flags;
1117 struct blkvsc_request *comp_req, *tmp; 1118 struct blkvsc_request *comp_req, *tmp;
1118 1119
1119 ASSERT(blkvsc_req->group); 1120 /* ASSERT(blkvsc_req->group); */
1120 1121
1121 DPRINT_DBG(BLKVSC_DRV, "blkdev %p blkvsc_req %p group %p type %s " 1122 DPRINT_DBG(BLKVSC_DRV, "blkdev %p blkvsc_req %p group %p type %s "
1122 "sect_start %lu sect_count %ld len %d group outstd %d " 1123 "sect_start %lu sect_count %ld len %d group outstd %d "
@@ -1144,7 +1145,7 @@ static void blkvsc_request_completion(struct hv_storvsc_request *request)
1144 &blkvsc_req->group->blkvsc_req_list, 1145 &blkvsc_req->group->blkvsc_req_list,
1145 req_entry) { 1146 req_entry) {
1146 DPRINT_DBG(BLKVSC_DRV, "completing blkvsc_req %p " 1147 DPRINT_DBG(BLKVSC_DRV, "completing blkvsc_req %p "
1147 "sect_start %lu sect_count %ld \n", 1148 "sect_start %lu sect_count %ld\n",
1148 comp_req, 1149 comp_req,
1149 (unsigned long)comp_req->sector_start, 1150 (unsigned long)comp_req->sector_start,
1150 comp_req->sector_count); 1151 comp_req->sector_count);
@@ -1198,7 +1199,7 @@ static int blkvsc_cancel_pending_reqs(struct block_device_context *blkdev)
1198 &pend_req->group->blkvsc_req_list, 1199 &pend_req->group->blkvsc_req_list,
1199 req_entry) { 1200 req_entry) {
1200 DPRINT_DBG(BLKVSC_DRV, "completing blkvsc_req %p " 1201 DPRINT_DBG(BLKVSC_DRV, "completing blkvsc_req %p "
1201 "sect_start %lu sect_count %ld \n", 1202 "sect_start %lu sect_count %ld\n",
1202 comp_req, 1203 comp_req,
1203 (unsigned long) comp_req->sector_start, 1204 (unsigned long) comp_req->sector_start,
1204 comp_req->sector_count); 1205 comp_req->sector_count);
@@ -1213,7 +1214,10 @@ static int blkvsc_cancel_pending_reqs(struct block_device_context *blkdev)
1213 (!comp_req->request.Status ? 0 : -EIO), 1214 (!comp_req->request.Status ? 0 : -EIO),
1214 comp_req->sector_count * 1215 comp_req->sector_count *
1215 blkdev->sector_size); 1216 blkdev->sector_size);
1216 ASSERT(ret != 0); 1217
1218 /* FIXME: shouldn't this do more than return? */
1219 if (ret)
1220 goto out;
1217 } 1221 }
1218 1222
1219 kmem_cache_free(blkdev->request_pool, comp_req); 1223 kmem_cache_free(blkdev->request_pool, comp_req);
@@ -1245,6 +1249,7 @@ static int blkvsc_cancel_pending_reqs(struct block_device_context *blkdev)
1245 kmem_cache_free(blkdev->request_pool, pend_req); 1249 kmem_cache_free(blkdev->request_pool, pend_req);
1246 } 1250 }
1247 1251
1252out:
1248 return ret; 1253 return ret;
1249} 1254}
1250 1255
@@ -1276,7 +1281,7 @@ static void blkvsc_request(struct request_queue *queue)
1276 struct request *req; 1281 struct request *req;
1277 int ret = 0; 1282 int ret = 0;
1278 1283
1279 DPRINT_DBG(BLKVSC_DRV, "- enter \n"); 1284 DPRINT_DBG(BLKVSC_DRV, "- enter\n");
1280 while ((req = blk_peek_request(queue)) != NULL) { 1285 while ((req = blk_peek_request(queue)) != NULL) {
1281 DPRINT_DBG(BLKVSC_DRV, "- req %p\n", req); 1286 DPRINT_DBG(BLKVSC_DRV, "- req %p\n", req);
1282 1287
@@ -1485,7 +1490,7 @@ static int __init blkvsc_init(void)
1485{ 1490{
1486 int ret; 1491 int ret;
1487 1492
1488 ASSERT(sizeof(sector_t) == 8); /* Make sure CONFIG_LBD is set */ 1493 BUILD_BUG_ON(sizeof(sector_t) != 8);
1489 1494
1490 DPRINT_ENTER(BLKVSC_DRV); 1495 DPRINT_ENTER(BLKVSC_DRV);
1491 1496
@@ -1507,6 +1512,6 @@ static void __exit blkvsc_exit(void)
1507 1512
1508MODULE_LICENSE("GPL"); 1513MODULE_LICENSE("GPL");
1509MODULE_VERSION(HV_DRV_VERSION); 1514MODULE_VERSION(HV_DRV_VERSION);
1510module_param(blkvsc_ringbuffer_size, int, S_IRUGO); 1515MODULE_DESCRIPTION("Microsoft Hyper-V virtual block driver");
1511module_init(blkvsc_init); 1516module_init(blkvsc_init);
1512module_exit(blkvsc_exit); 1517module_exit(blkvsc_exit);
diff --git a/drivers/staging/hv/Channel.c b/drivers/staging/hv/channel.c
index e69e9ee704ac..f047c5a7f64c 100644
--- a/drivers/staging/hv/Channel.c
+++ b/drivers/staging/hv/channel.c
@@ -21,9 +21,10 @@
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/module.h>
24#include "osd.h" 25#include "osd.h"
25#include "logging.h" 26#include "logging.h"
26#include "VmbusPrivate.h" 27#include "vmbus_private.h"
27 28
28/* Internal routines */ 29/* Internal routines */
29static int VmbusChannelCreateGpadlHeader( 30static int VmbusChannelCreateGpadlHeader(
@@ -65,8 +66,9 @@ static void DumpMonitorPage(struct hv_monitor_page *MonitorPage)
65} 66}
66#endif 67#endif
67 68
68/** 69/*
69 * VmbusChannelSetEvent - Trigger an event notification on the specified channel. 70 * VmbusChannelSetEvent - Trigger an event notification on the specified
71 * channel.
70 */ 72 */
71static void VmbusChannelSetEvent(struct vmbus_channel *Channel) 73static void VmbusChannelSetEvent(struct vmbus_channel *Channel)
72{ 74{
@@ -120,7 +122,7 @@ static void VmbusChannelClearEvent(struct vmbus_channel *channel)
120} 122}
121 123
122#endif 124#endif
123/** 125/*
124 * VmbusChannelGetDebugInfo -Retrieve various channel debug info 126 * VmbusChannelGetDebugInfo -Retrieve various channel debug info
125 */ 127 */
126void VmbusChannelGetDebugInfo(struct vmbus_channel *Channel, 128void VmbusChannelGetDebugInfo(struct vmbus_channel *Channel,
@@ -165,7 +167,7 @@ void VmbusChannelGetDebugInfo(struct vmbus_channel *Channel,
165 RingBufferGetDebugInfo(&Channel->Outbound, &DebugInfo->Outbound); 167 RingBufferGetDebugInfo(&Channel->Outbound, &DebugInfo->Outbound);
166} 168}
167 169
168/** 170/*
169 * VmbusChannelOpen - Open the specified channel. 171 * VmbusChannelOpen - Open the specified channel.
170 */ 172 */
171int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize, 173int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize,
@@ -173,16 +175,16 @@ int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize,
173 void (*OnChannelCallback)(void *context), void *Context) 175 void (*OnChannelCallback)(void *context), void *Context)
174{ 176{
175 struct vmbus_channel_open_channel *openMsg; 177 struct vmbus_channel_open_channel *openMsg;
176 struct vmbus_channel_msginfo *openInfo; 178 struct vmbus_channel_msginfo *openInfo = NULL;
177 void *in, *out; 179 void *in, *out;
178 unsigned long flags; 180 unsigned long flags;
179 int ret; 181 int ret, err = 0;
180 182
181 DPRINT_ENTER(VMBUS); 183 DPRINT_ENTER(VMBUS);
182 184
183 /* Aligned to page size */ 185 /* Aligned to page size */
184 ASSERT(!(SendRingBufferSize & (PAGE_SIZE - 1))); 186 /* ASSERT(!(SendRingBufferSize & (PAGE_SIZE - 1))); */
185 ASSERT(!(RecvRingBufferSize & (PAGE_SIZE - 1))); 187 /* ASSERT(!(RecvRingBufferSize & (PAGE_SIZE - 1))); */
186 188
187 NewChannel->OnChannelCallback = OnChannelCallback; 189 NewChannel->OnChannelCallback = OnChannelCallback;
188 NewChannel->ChannelCallbackContext = Context; 190 NewChannel->ChannelCallbackContext = Context;
@@ -190,8 +192,10 @@ int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize,
190 /* Allocate the ring buffer */ 192 /* Allocate the ring buffer */
191 out = osd_PageAlloc((SendRingBufferSize + RecvRingBufferSize) 193 out = osd_PageAlloc((SendRingBufferSize + RecvRingBufferSize)
192 >> PAGE_SHIFT); 194 >> PAGE_SHIFT);
193 ASSERT(out); 195 if (!out)
194 ASSERT(((unsigned long)out & (PAGE_SIZE-1)) == 0); 196 return -ENOMEM;
197
198 /* ASSERT(((unsigned long)out & (PAGE_SIZE-1)) == 0); */
195 199
196 in = (void *)((unsigned long)out + SendRingBufferSize); 200 in = (void *)((unsigned long)out + SendRingBufferSize);
197 201
@@ -199,9 +203,18 @@ int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize,
199 NewChannel->RingBufferPageCount = (SendRingBufferSize + 203 NewChannel->RingBufferPageCount = (SendRingBufferSize +
200 RecvRingBufferSize) >> PAGE_SHIFT; 204 RecvRingBufferSize) >> PAGE_SHIFT;
201 205
202 RingBufferInit(&NewChannel->Outbound, out, SendRingBufferSize); 206 ret = RingBufferInit(&NewChannel->Outbound, out, SendRingBufferSize);
207 if (ret != 0) {
208 err = ret;
209 goto errorout;
210 }
211
212 ret = RingBufferInit(&NewChannel->Inbound, in, RecvRingBufferSize);
213 if (ret != 0) {
214 err = ret;
215 goto errorout;
216 }
203 217
204 RingBufferInit(&NewChannel->Inbound, in, RecvRingBufferSize);
205 218
206 /* Establish the gpadl for the ring buffer */ 219 /* Establish the gpadl for the ring buffer */
207 DPRINT_DBG(VMBUS, "Establishing ring buffer's gpadl for channel %p...", 220 DPRINT_DBG(VMBUS, "Establishing ring buffer's gpadl for channel %p...",
@@ -215,6 +228,11 @@ int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize,
215 RecvRingBufferSize, 228 RecvRingBufferSize,
216 &NewChannel->RingBufferGpadlHandle); 229 &NewChannel->RingBufferGpadlHandle);
217 230
231 if (ret != 0) {
232 err = ret;
233 goto errorout;
234 }
235
218 DPRINT_DBG(VMBUS, "channel %p <relid %d gpadl 0x%x send ring %p " 236 DPRINT_DBG(VMBUS, "channel %p <relid %d gpadl 0x%x send ring %p "
219 "size %d recv ring %p size %d, downstreamoffset %d>", 237 "size %d recv ring %p size %d, downstreamoffset %d>",
220 NewChannel, NewChannel->OfferMsg.ChildRelId, 238 NewChannel, NewChannel->OfferMsg.ChildRelId,
@@ -229,21 +247,31 @@ int VmbusChannelOpen(struct vmbus_channel *NewChannel, u32 SendRingBufferSize,
229 openInfo = kmalloc(sizeof(*openInfo) + 247 openInfo = kmalloc(sizeof(*openInfo) +
230 sizeof(struct vmbus_channel_open_channel), 248 sizeof(struct vmbus_channel_open_channel),
231 GFP_KERNEL); 249 GFP_KERNEL);
232 ASSERT(openInfo != NULL); 250 if (!openInfo) {
251 err = -ENOMEM;
252 goto errorout;
253 }
233 254
234 openInfo->WaitEvent = osd_WaitEventCreate(); 255 openInfo->WaitEvent = osd_WaitEventCreate();
256 if (!openInfo->WaitEvent) {
257 err = -ENOMEM;
258 goto errorout;
259 }
235 260
236 openMsg = (struct vmbus_channel_open_channel *)openInfo->Msg; 261 openMsg = (struct vmbus_channel_open_channel *)openInfo->Msg;
237 openMsg->Header.MessageType = ChannelMessageOpenChannel; 262 openMsg->Header.MessageType = ChannelMessageOpenChannel;
238 openMsg->OpenId = NewChannel->OfferMsg.ChildRelId; /* FIXME */ 263 openMsg->OpenId = NewChannel->OfferMsg.ChildRelId; /* FIXME */
239 openMsg->ChildRelId = NewChannel->OfferMsg.ChildRelId; 264 openMsg->ChildRelId = NewChannel->OfferMsg.ChildRelId;
240 openMsg->RingBufferGpadlHandle = NewChannel->RingBufferGpadlHandle; 265 openMsg->RingBufferGpadlHandle = NewChannel->RingBufferGpadlHandle;
241 ASSERT(openMsg->RingBufferGpadlHandle);
242 openMsg->DownstreamRingBufferPageOffset = SendRingBufferSize >> 266 openMsg->DownstreamRingBufferPageOffset = SendRingBufferSize >>
243 PAGE_SHIFT; 267 PAGE_SHIFT;
244 openMsg->ServerContextAreaGpadlHandle = 0; /* TODO */ 268 openMsg->ServerContextAreaGpadlHandle = 0; /* TODO */
245 269
246 ASSERT(UserDataLen <= MAX_USER_DEFINED_BYTES); 270 if (UserDataLen > MAX_USER_DEFINED_BYTES) {
271 err = -EINVAL;
272 goto errorout;
273 }
274
247 if (UserDataLen) 275 if (UserDataLen)
248 memcpy(openMsg->UserData, UserData, UserDataLen); 276 memcpy(openMsg->UserData, UserData, UserDataLen);
249 277
@@ -281,10 +309,19 @@ Cleanup:
281 DPRINT_EXIT(VMBUS); 309 DPRINT_EXIT(VMBUS);
282 310
283 return 0; 311 return 0;
312
313errorout:
314 RingBufferCleanup(&NewChannel->Outbound);
315 RingBufferCleanup(&NewChannel->Inbound);
316 osd_PageFree(out, (SendRingBufferSize + RecvRingBufferSize)
317 >> PAGE_SHIFT);
318 kfree(openInfo);
319 return err;
284} 320}
285 321
286/** 322/*
287 * DumpGpadlBody - Dump the gpadl body message to the console for debugging purposes. 323 * DumpGpadlBody - Dump the gpadl body message to the console for
324 * debugging purposes.
288 */ 325 */
289static void DumpGpadlBody(struct vmbus_channel_gpadl_body *Gpadl, u32 Len) 326static void DumpGpadlBody(struct vmbus_channel_gpadl_body *Gpadl, u32 Len)
290{ 327{
@@ -300,8 +337,9 @@ static void DumpGpadlBody(struct vmbus_channel_gpadl_body *Gpadl, u32 Len)
300 i, Gpadl->Pfn[i]); 337 i, Gpadl->Pfn[i]);
301} 338}
302 339
303/** 340/*
304 * DumpGpadlHeader - Dump the gpadl header message to the console for debugging purposes. 341 * DumpGpadlHeader - Dump the gpadl header message to the console for
342 * debugging purposes.
305 */ 343 */
306static void DumpGpadlHeader(struct vmbus_channel_gpadl_header *Gpadl) 344static void DumpGpadlHeader(struct vmbus_channel_gpadl_header *Gpadl)
307{ 345{
@@ -325,7 +363,7 @@ static void DumpGpadlHeader(struct vmbus_channel_gpadl_header *Gpadl)
325 } 363 }
326} 364}
327 365
328/** 366/*
329 * VmbusChannelCreateGpadlHeader - Creates a gpadl for the specified buffer 367 * VmbusChannelCreateGpadlHeader - Creates a gpadl for the specified buffer
330 */ 368 */
331static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size, 369static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size,
@@ -338,13 +376,13 @@ static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size,
338 struct vmbus_channel_gpadl_header *gpaHeader; 376 struct vmbus_channel_gpadl_header *gpaHeader;
339 struct vmbus_channel_gpadl_body *gpadlBody; 377 struct vmbus_channel_gpadl_body *gpadlBody;
340 struct vmbus_channel_msginfo *msgHeader; 378 struct vmbus_channel_msginfo *msgHeader;
341 struct vmbus_channel_msginfo *msgBody; 379 struct vmbus_channel_msginfo *msgBody = NULL;
342 u32 msgSize; 380 u32 msgSize;
343 381
344 int pfnSum, pfnCount, pfnLeft, pfnCurr, pfnSize; 382 int pfnSum, pfnCount, pfnLeft, pfnCurr, pfnSize;
345 383
346 /* ASSERT((kbuffer & (PAGE_SIZE-1)) == 0); */ 384 /* ASSERT((kbuffer & (PAGE_SIZE-1)) == 0); */
347 ASSERT((Size & (PAGE_SIZE-1)) == 0); 385 /* ASSERT((Size & (PAGE_SIZE-1)) == 0); */
348 386
349 pageCount = Size >> PAGE_SHIFT; 387 pageCount = Size >> PAGE_SHIFT;
350 pfn = virt_to_phys(Kbuffer) >> PAGE_SHIFT; 388 pfn = virt_to_phys(Kbuffer) >> PAGE_SHIFT;
@@ -362,6 +400,8 @@ static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size,
362 sizeof(struct vmbus_channel_gpadl_header) + 400 sizeof(struct vmbus_channel_gpadl_header) +
363 sizeof(struct gpa_range) + pfnCount * sizeof(u64); 401 sizeof(struct gpa_range) + pfnCount * sizeof(u64);
364 msgHeader = kzalloc(msgSize, GFP_KERNEL); 402 msgHeader = kzalloc(msgSize, GFP_KERNEL);
403 if (!msgHeader)
404 goto nomem;
365 405
366 INIT_LIST_HEAD(&msgHeader->SubMsgList); 406 INIT_LIST_HEAD(&msgHeader->SubMsgList);
367 msgHeader->MessageSize = msgSize; 407 msgHeader->MessageSize = msgSize;
@@ -396,7 +436,9 @@ static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size,
396 sizeof(struct vmbus_channel_gpadl_body) + 436 sizeof(struct vmbus_channel_gpadl_body) +
397 pfnCurr * sizeof(u64); 437 pfnCurr * sizeof(u64);
398 msgBody = kzalloc(msgSize, GFP_KERNEL); 438 msgBody = kzalloc(msgSize, GFP_KERNEL);
399 ASSERT(msgBody); 439 /* FIXME: we probably need to more if this fails */
440 if (!msgBody)
441 goto nomem;
400 msgBody->MessageSize = msgSize; 442 msgBody->MessageSize = msgSize;
401 (*MessageCount)++; 443 (*MessageCount)++;
402 gpadlBody = 444 gpadlBody =
@@ -439,9 +481,13 @@ static int VmbusChannelCreateGpadlHeader(void *Kbuffer, u32 Size,
439 } 481 }
440 482
441 return 0; 483 return 0;
484nomem:
485 kfree(msgHeader);
486 kfree(msgBody);
487 return -ENOMEM;
442} 488}
443 489
444/** 490/*
445 * VmbusChannelEstablishGpadl - Estabish a GPADL for the specified buffer 491 * VmbusChannelEstablishGpadl - Estabish a GPADL for the specified buffer
446 * 492 *
447 * @Channel: a channel 493 * @Channel: a channel
@@ -455,24 +501,29 @@ int VmbusChannelEstablishGpadl(struct vmbus_channel *Channel, void *Kbuffer,
455 struct vmbus_channel_gpadl_header *gpadlMsg; 501 struct vmbus_channel_gpadl_header *gpadlMsg;
456 struct vmbus_channel_gpadl_body *gpadlBody; 502 struct vmbus_channel_gpadl_body *gpadlBody;
457 /* struct vmbus_channel_gpadl_created *gpadlCreated; */ 503 /* struct vmbus_channel_gpadl_created *gpadlCreated; */
458 struct vmbus_channel_msginfo *msgInfo; 504 struct vmbus_channel_msginfo *msgInfo = NULL;
459 struct vmbus_channel_msginfo *subMsgInfo; 505 struct vmbus_channel_msginfo *subMsgInfo;
460 u32 msgCount; 506 u32 msgCount;
461 struct list_head *curr; 507 struct list_head *curr;
462 u32 nextGpadlHandle; 508 u32 nextGpadlHandle;
463 unsigned long flags; 509 unsigned long flags;
464 int ret; 510 int ret = 0;
465 511
466 DPRINT_ENTER(VMBUS); 512 DPRINT_ENTER(VMBUS);
467 513
468 nextGpadlHandle = atomic_read(&gVmbusConnection.NextGpadlHandle); 514 nextGpadlHandle = atomic_read(&gVmbusConnection.NextGpadlHandle);
469 atomic_inc(&gVmbusConnection.NextGpadlHandle); 515 atomic_inc(&gVmbusConnection.NextGpadlHandle);
470 516
471 VmbusChannelCreateGpadlHeader(Kbuffer, Size, &msgInfo, &msgCount); 517 ret = VmbusChannelCreateGpadlHeader(Kbuffer, Size, &msgInfo, &msgCount);
472 ASSERT(msgInfo != NULL); 518 if (ret)
473 ASSERT(msgCount > 0); 519 return ret;
474 520
475 msgInfo->WaitEvent = osd_WaitEventCreate(); 521 msgInfo->WaitEvent = osd_WaitEventCreate();
522 if (!msgInfo->WaitEvent) {
523 ret = -ENOMEM;
524 goto Cleanup;
525 }
526
476 gpadlMsg = (struct vmbus_channel_gpadl_header *)msgInfo->Msg; 527 gpadlMsg = (struct vmbus_channel_gpadl_header *)msgInfo->Msg;
477 gpadlMsg->Header.MessageType = ChannelMessageGpadlHeader; 528 gpadlMsg->Header.MessageType = ChannelMessageGpadlHeader;
478 gpadlMsg->ChildRelId = Channel->OfferMsg.ChildRelId; 529 gpadlMsg->ChildRelId = Channel->OfferMsg.ChildRelId;
@@ -518,7 +569,9 @@ int VmbusChannelEstablishGpadl(struct vmbus_channel *Channel, void *Kbuffer,
518 ret = VmbusPostMessage(gpadlBody, 569 ret = VmbusPostMessage(gpadlBody,
519 subMsgInfo->MessageSize - 570 subMsgInfo->MessageSize -
520 sizeof(*subMsgInfo)); 571 sizeof(*subMsgInfo));
521 ASSERT(ret == 0); 572 if (ret != 0)
573 goto Cleanup;
574
522 } 575 }
523 } 576 }
524 osd_WaitEventWait(msgInfo->WaitEvent); 577 osd_WaitEventWait(msgInfo->WaitEvent);
@@ -545,7 +598,7 @@ Cleanup:
545 return ret; 598 return ret;
546} 599}
547 600
548/** 601/*
549 * VmbusChannelTeardownGpadl -Teardown the specified GPADL handle 602 * VmbusChannelTeardownGpadl -Teardown the specified GPADL handle
550 */ 603 */
551int VmbusChannelTeardownGpadl(struct vmbus_channel *Channel, u32 GpadlHandle) 604int VmbusChannelTeardownGpadl(struct vmbus_channel *Channel, u32 GpadlHandle)
@@ -557,13 +610,18 @@ int VmbusChannelTeardownGpadl(struct vmbus_channel *Channel, u32 GpadlHandle)
557 610
558 DPRINT_ENTER(VMBUS); 611 DPRINT_ENTER(VMBUS);
559 612
560 ASSERT(GpadlHandle != 0); 613 /* ASSERT(GpadlHandle != 0); */
561 614
562 info = kmalloc(sizeof(*info) + 615 info = kmalloc(sizeof(*info) +
563 sizeof(struct vmbus_channel_gpadl_teardown), GFP_KERNEL); 616 sizeof(struct vmbus_channel_gpadl_teardown), GFP_KERNEL);
564 ASSERT(info != NULL); 617 if (!info)
618 return -ENOMEM;
565 619
566 info->WaitEvent = osd_WaitEventCreate(); 620 info->WaitEvent = osd_WaitEventCreate();
621 if (!info->WaitEvent) {
622 kfree(info);
623 return -ENOMEM;
624 }
567 625
568 msg = (struct vmbus_channel_gpadl_teardown *)info->Msg; 626 msg = (struct vmbus_channel_gpadl_teardown *)info->Msg;
569 627
@@ -598,7 +656,7 @@ int VmbusChannelTeardownGpadl(struct vmbus_channel *Channel, u32 GpadlHandle)
598 return ret; 656 return ret;
599} 657}
600 658
601/** 659/*
602 * VmbusChannelClose - Close the specified channel 660 * VmbusChannelClose - Close the specified channel
603 */ 661 */
604void VmbusChannelClose(struct vmbus_channel *Channel) 662void VmbusChannelClose(struct vmbus_channel *Channel)
@@ -617,7 +675,10 @@ void VmbusChannelClose(struct vmbus_channel *Channel)
617 /* Send a closing message */ 675 /* Send a closing message */
618 info = kmalloc(sizeof(*info) + 676 info = kmalloc(sizeof(*info) +
619 sizeof(struct vmbus_channel_close_channel), GFP_KERNEL); 677 sizeof(struct vmbus_channel_close_channel), GFP_KERNEL);
620 ASSERT(info != NULL); 678 /* FIXME: can't do anything other than return here because the
679 * function is void */
680 if (!info)
681 return;
621 682
622 /* info->waitEvent = osd_WaitEventCreate(); */ 683 /* info->waitEvent = osd_WaitEventCreate(); */
623 684
@@ -664,7 +725,18 @@ void VmbusChannelClose(struct vmbus_channel *Channel)
664} 725}
665 726
666/** 727/**
667 * VmbusChannelSendPacket - Send the specified buffer on the given channel 728 * VmbusChannelSendPacket() - Send the specified buffer on the given channel
729 * @Channel: Pointer to vmbus_channel structure.
730 * @Buffer: Pointer to the buffer you want to receive the data into.
731 * @BufferLen: Maximum size of what the the buffer will hold
732 * @RequestId: Identifier of the request
733 * @vmbus_packet_type: Type of packet that is being send e.g. negotiate, time
734 * packet etc.
735 *
736 * Sends data in @Buffer directly to hyper-v via the vmbus
737 * This will send the data unparsed to hyper-v.
738 *
739 * Mainly used by Hyper-V drivers.
668 */ 740 */
669int VmbusChannelSendPacket(struct vmbus_channel *Channel, const void *Buffer, 741int VmbusChannelSendPacket(struct vmbus_channel *Channel, const void *Buffer,
670 u32 BufferLen, u64 RequestId, 742 u32 BufferLen, u64 RequestId,
@@ -683,7 +755,7 @@ int VmbusChannelSendPacket(struct vmbus_channel *Channel, const void *Buffer,
683 755
684 DumpVmbusChannel(Channel); 756 DumpVmbusChannel(Channel);
685 757
686 ASSERT((packetLenAligned - packetLen) < sizeof(u64)); 758 /* ASSERT((packetLenAligned - packetLen) < sizeof(u64)); */
687 759
688 /* Setup the descriptor */ 760 /* Setup the descriptor */
689 desc.Type = Type; /* VmbusPacketTypeDataInBand; */ 761 desc.Type = Type; /* VmbusPacketTypeDataInBand; */
@@ -708,9 +780,11 @@ int VmbusChannelSendPacket(struct vmbus_channel *Channel, const void *Buffer,
708 780
709 return ret; 781 return ret;
710} 782}
783EXPORT_SYMBOL(VmbusChannelSendPacket);
711 784
712/** 785/*
713 * VmbusChannelSendPacketPageBuffer - Send a range of single-page buffer packets using a GPADL Direct packet type. 786 * VmbusChannelSendPacketPageBuffer - Send a range of single-page buffer
787 * packets using a GPADL Direct packet type.
714 */ 788 */
715int VmbusChannelSendPacketPageBuffer(struct vmbus_channel *Channel, 789int VmbusChannelSendPacketPageBuffer(struct vmbus_channel *Channel,
716 struct hv_page_buffer PageBuffers[], 790 struct hv_page_buffer PageBuffers[],
@@ -728,7 +802,8 @@ int VmbusChannelSendPacketPageBuffer(struct vmbus_channel *Channel,
728 802
729 DPRINT_ENTER(VMBUS); 803 DPRINT_ENTER(VMBUS);
730 804
731 ASSERT(PageCount <= MAX_PAGE_BUFFER_COUNT); 805 if (PageCount > MAX_PAGE_BUFFER_COUNT)
806 return -EINVAL;
732 807
733 DumpVmbusChannel(Channel); 808 DumpVmbusChannel(Channel);
734 809
@@ -742,7 +817,7 @@ int VmbusChannelSendPacketPageBuffer(struct vmbus_channel *Channel,
742 packetLen = descSize + BufferLen; 817 packetLen = descSize + BufferLen;
743 packetLenAligned = ALIGN_UP(packetLen, sizeof(u64)); 818 packetLenAligned = ALIGN_UP(packetLen, sizeof(u64));
744 819
745 ASSERT((packetLenAligned - packetLen) < sizeof(u64)); 820 /* ASSERT((packetLenAligned - packetLen) < sizeof(u64)); */
746 821
747 /* Setup the descriptor */ 822 /* Setup the descriptor */
748 desc.Type = VmbusPacketTypeDataUsingGpaDirect; 823 desc.Type = VmbusPacketTypeDataUsingGpaDirect;
@@ -774,8 +849,9 @@ int VmbusChannelSendPacketPageBuffer(struct vmbus_channel *Channel,
774 return ret; 849 return ret;
775} 850}
776 851
777/** 852/*
778 * VmbusChannelSendPacketMultiPageBuffer - Send a multi-page buffer packet using a GPADL Direct packet type. 853 * VmbusChannelSendPacketMultiPageBuffer - Send a multi-page buffer packet
854 * using a GPADL Direct packet type.
779 */ 855 */
780int VmbusChannelSendPacketMultiPageBuffer(struct vmbus_channel *Channel, 856int VmbusChannelSendPacketMultiPageBuffer(struct vmbus_channel *Channel,
781 struct hv_multipage_buffer *MultiPageBuffer, 857 struct hv_multipage_buffer *MultiPageBuffer,
@@ -798,8 +874,8 @@ int VmbusChannelSendPacketMultiPageBuffer(struct vmbus_channel *Channel,
798 DPRINT_DBG(VMBUS, "data buffer - offset %u len %u pfn count %u", 874 DPRINT_DBG(VMBUS, "data buffer - offset %u len %u pfn count %u",
799 MultiPageBuffer->Offset, MultiPageBuffer->Length, PfnCount); 875 MultiPageBuffer->Offset, MultiPageBuffer->Length, PfnCount);
800 876
801 ASSERT(PfnCount > 0); 877 if ((PfnCount < 0) || (PfnCount > MAX_MULTIPAGE_BUFFER_COUNT))
802 ASSERT(PfnCount <= MAX_MULTIPAGE_BUFFER_COUNT); 878 return -EINVAL;
803 879
804 /* 880 /*
805 * Adjust the size down since VMBUS_CHANNEL_PACKET_MULITPAGE_BUFFER is 881 * Adjust the size down since VMBUS_CHANNEL_PACKET_MULITPAGE_BUFFER is
@@ -811,7 +887,7 @@ int VmbusChannelSendPacketMultiPageBuffer(struct vmbus_channel *Channel,
811 packetLen = descSize + BufferLen; 887 packetLen = descSize + BufferLen;
812 packetLenAligned = ALIGN_UP(packetLen, sizeof(u64)); 888 packetLenAligned = ALIGN_UP(packetLen, sizeof(u64));
813 889
814 ASSERT((packetLenAligned - packetLen) < sizeof(u64)); 890 /* ASSERT((packetLenAligned - packetLen) < sizeof(u64)); */
815 891
816 /* Setup the descriptor */ 892 /* Setup the descriptor */
817 desc.Type = VmbusPacketTypeDataUsingGpaDirect; 893 desc.Type = VmbusPacketTypeDataUsingGpaDirect;
@@ -843,10 +919,20 @@ int VmbusChannelSendPacketMultiPageBuffer(struct vmbus_channel *Channel,
843 return ret; 919 return ret;
844} 920}
845 921
922
846/** 923/**
847 * VmbusChannelRecvPacket - Retrieve the user packet on the specified channel 924 * VmbusChannelRecvPacket() - Retrieve the user packet on the specified channel
925 * @Channel: Pointer to vmbus_channel structure.
926 * @Buffer: Pointer to the buffer you want to receive the data into.
927 * @BufferLen: Maximum size of what the the buffer will hold
928 * @BufferActualLen: The actual size of the data after it was received
929 * @RequestId: Identifier of the request
930 *
931 * Receives directly from the hyper-v vmbus and puts the data it received
932 * into Buffer. This will receive the data unparsed from hyper-v.
933 *
934 * Mainly used by Hyper-V drivers.
848 */ 935 */
849/* TODO: Do we ever receive a gpa direct packet other than the ones we send ? */
850int VmbusChannelRecvPacket(struct vmbus_channel *Channel, void *Buffer, 936int VmbusChannelRecvPacket(struct vmbus_channel *Channel, void *Buffer,
851 u32 BufferLen, u32 *BufferActualLen, u64 *RequestId) 937 u32 BufferLen, u32 *BufferActualLen, u64 *RequestId)
852{ 938{
@@ -908,8 +994,9 @@ int VmbusChannelRecvPacket(struct vmbus_channel *Channel, void *Buffer,
908 994
909 return 0; 995 return 0;
910} 996}
997EXPORT_SYMBOL(VmbusChannelRecvPacket);
911 998
912/** 999/*
913 * VmbusChannelRecvPacketRaw - Retrieve the raw packet on the specified channel 1000 * VmbusChannelRecvPacketRaw - Retrieve the raw packet on the specified channel
914 */ 1001 */
915int VmbusChannelRecvPacketRaw(struct vmbus_channel *Channel, void *Buffer, 1002int VmbusChannelRecvPacketRaw(struct vmbus_channel *Channel, void *Buffer,
@@ -972,20 +1059,20 @@ int VmbusChannelRecvPacketRaw(struct vmbus_channel *Channel, void *Buffer,
972 return 0; 1059 return 0;
973} 1060}
974 1061
975/** 1062/*
976 * VmbusChannelOnChannelEvent - Channel event callback 1063 * VmbusChannelOnChannelEvent - Channel event callback
977 */ 1064 */
978void VmbusChannelOnChannelEvent(struct vmbus_channel *Channel) 1065void VmbusChannelOnChannelEvent(struct vmbus_channel *Channel)
979{ 1066{
980 DumpVmbusChannel(Channel); 1067 DumpVmbusChannel(Channel);
981 ASSERT(Channel->OnChannelCallback); 1068 /* ASSERT(Channel->OnChannelCallback); */
982 1069
983 Channel->OnChannelCallback(Channel->ChannelCallbackContext); 1070 Channel->OnChannelCallback(Channel->ChannelCallbackContext);
984 1071
985 mod_timer(&Channel->poll_timer, jiffies + usecs_to_jiffies(100)); 1072 mod_timer(&Channel->poll_timer, jiffies + usecs_to_jiffies(100));
986} 1073}
987 1074
988/** 1075/*
989 * VmbusChannelOnTimer - Timer event callback 1076 * VmbusChannelOnTimer - Timer event callback
990 */ 1077 */
991void VmbusChannelOnTimer(unsigned long data) 1078void VmbusChannelOnTimer(unsigned long data)
@@ -996,7 +1083,7 @@ void VmbusChannelOnTimer(unsigned long data)
996 channel->OnChannelCallback(channel->ChannelCallbackContext); 1083 channel->OnChannelCallback(channel->ChannelCallbackContext);
997} 1084}
998 1085
999/** 1086/*
1000 * DumpVmbusChannel - Dump vmbus channel info to the console 1087 * DumpVmbusChannel - Dump vmbus channel info to the console
1001 */ 1088 */
1002static void DumpVmbusChannel(struct vmbus_channel *Channel) 1089static void DumpVmbusChannel(struct vmbus_channel *Channel)
diff --git a/drivers/staging/hv/Channel.h b/drivers/staging/hv/channel.h
index 6b283edcae68..acb2c556369b 100644
--- a/drivers/staging/hv/Channel.h
+++ b/drivers/staging/hv/channel.h
@@ -25,7 +25,7 @@
25#ifndef _CHANNEL_H_ 25#ifndef _CHANNEL_H_
26#define _CHANNEL_H_ 26#define _CHANNEL_H_
27 27
28#include "ChannelMgmt.h" 28#include "channel_mgmt.h"
29 29
30/* The format must be the same as struct vmdata_gpa_direct */ 30/* The format must be the same as struct vmdata_gpa_direct */
31struct VMBUS_CHANNEL_PACKET_PAGE_BUFFER { 31struct VMBUS_CHANNEL_PACKET_PAGE_BUFFER {
diff --git a/drivers/staging/hv/ChannelInterface.c b/drivers/staging/hv/channel_interface.c
index 019b064f7cb3..d9f51ac75eaa 100644
--- a/drivers/staging/hv/ChannelInterface.c
+++ b/drivers/staging/hv/channel_interface.c
@@ -23,7 +23,7 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include "osd.h" 25#include "osd.h"
26#include "VmbusPrivate.h" 26#include "vmbus_private.h"
27 27
28static int IVmbusChannelOpen(struct hv_device *device, u32 SendBufferSize, 28static int IVmbusChannelOpen(struct hv_device *device, u32 SendBufferSize,
29 u32 RecvRingBufferSize, void *UserData, 29 u32 RecvRingBufferSize, void *UserData,
diff --git a/drivers/staging/hv/ChannelInterface.h b/drivers/staging/hv/channel_interface.h
index 27b7a253b711..6acaf6ce2c48 100644
--- a/drivers/staging/hv/ChannelInterface.h
+++ b/drivers/staging/hv/channel_interface.h
@@ -25,7 +25,7 @@
25#ifndef _CHANNEL_INTERFACE_H_ 25#ifndef _CHANNEL_INTERFACE_H_
26#define _CHANNEL_INTERFACE_H_ 26#define _CHANNEL_INTERFACE_H_
27 27
28#include "VmbusApi.h" 28#include "vmbus_api.h"
29 29
30void GetChannelInterface(struct vmbus_channel_interface *ChannelInterface); 30void GetChannelInterface(struct vmbus_channel_interface *ChannelInterface);
31 31
diff --git a/drivers/staging/hv/ChannelMgmt.c b/drivers/staging/hv/channel_mgmt.c
index 5f92c2102ab4..3f53b4d1e4cf 100644
--- a/drivers/staging/hv/ChannelMgmt.c
+++ b/drivers/staging/hv/channel_mgmt.c
@@ -22,18 +22,22 @@
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/module.h>
25#include "osd.h" 26#include "osd.h"
26#include "logging.h" 27#include "logging.h"
27#include "VmbusPrivate.h" 28#include "vmbus_private.h"
29#include "utils.h"
28 30
29struct vmbus_channel_message_table_entry { 31struct vmbus_channel_message_table_entry {
30 enum vmbus_channel_message_type messageType; 32 enum vmbus_channel_message_type messageType;
31 void (*messageHandler)(struct vmbus_channel_message_header *msg); 33 void (*messageHandler)(struct vmbus_channel_message_header *msg);
32}; 34};
33 35
34#define MAX_NUM_DEVICE_CLASSES_SUPPORTED 4 36#define MAX_MSG_TYPES 3
37#define MAX_NUM_DEVICE_CLASSES_SUPPORTED 7
38
35static const struct hv_guid 39static const struct hv_guid
36 gSupportedDeviceClasses[MAX_NUM_DEVICE_CLASSES_SUPPORTED] = { 40 gSupportedDeviceClasses[MAX_NUM_DEVICE_CLASSES_SUPPORTED] = {
37 /* {ba6163d9-04a1-4d29-b605-72e2ffb1dc7f} */ 41 /* {ba6163d9-04a1-4d29-b605-72e2ffb1dc7f} */
38 /* Storage - SCSI */ 42 /* Storage - SCSI */
39 { 43 {
@@ -69,9 +73,167 @@ static const struct hv_guid
69 0x9b, 0x5c, 0x50, 0xd1, 0x41, 0x73, 0x54, 0xf5 73 0x9b, 0x5c, 0x50, 0xd1, 0x41, 0x73, 0x54, 0xf5
70 } 74 }
71 }, 75 },
76 /* 0E0B6031-5213-4934-818B-38D90CED39DB */
77 /* Shutdown */
78 {
79 .data = {
80 0x31, 0x60, 0x0B, 0X0E, 0x13, 0x52, 0x34, 0x49,
81 0x81, 0x8B, 0x38, 0XD9, 0x0C, 0xED, 0x39, 0xDB
82 }
83 },
84 /* {9527E630-D0AE-497b-ADCE-E80AB0175CAF} */
85 /* TimeSync */
86 {
87 .data = {
88 0x30, 0xe6, 0x27, 0x95, 0xae, 0xd0, 0x7b, 0x49,
89 0xad, 0xce, 0xe8, 0x0a, 0xb0, 0x17, 0x5c, 0xaf
90 }
91 },
92 /* {57164f39-9115-4e78-ab55-382f3bd5422d} */
93 /* Heartbeat */
94 {
95 .data = {
96 0x39, 0x4f, 0x16, 0x57, 0x15, 0x91, 0x78, 0x4e,
97 0xab, 0x55, 0x38, 0x2f, 0x3b, 0xd5, 0x42, 0x2d
98 }
99 },
72}; 100};
73 101
102
74/** 103/**
104 * prep_negotiate_resp() - Create default response for Hyper-V Negotiate message
105 * @icmsghdrp: Pointer to msg header structure
106 * @icmsg_negotiate: Pointer to negotiate message structure
107 * @buf: Raw buffer channel data
108 *
109 * @icmsghdrp is of type &struct icmsg_hdr.
110 * @negop is of type &struct icmsg_negotiate.
111 * Set up and fill in default negotiate response message. This response can
112 * come from both the vmbus driver and the hv_utils driver. The current api
113 * will respond properly to both Windows 2008 and Windows 2008-R2 operating
114 * systems.
115 *
116 * Mainly used by Hyper-V drivers.
117 */
118void prep_negotiate_resp(struct icmsg_hdr *icmsghdrp,
119 struct icmsg_negotiate *negop,
120 u8 *buf)
121{
122 if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) {
123 icmsghdrp->icmsgsize = 0x10;
124
125 negop = (struct icmsg_negotiate *)&buf[
126 sizeof(struct vmbuspipe_hdr) +
127 sizeof(struct icmsg_hdr)];
128
129 if (negop->icframe_vercnt == 2 &&
130 negop->icversion_data[1].major == 3) {
131 negop->icversion_data[0].major = 3;
132 negop->icversion_data[0].minor = 0;
133 negop->icversion_data[1].major = 3;
134 negop->icversion_data[1].minor = 0;
135 } else {
136 negop->icversion_data[0].major = 1;
137 negop->icversion_data[0].minor = 0;
138 negop->icversion_data[1].major = 1;
139 negop->icversion_data[1].minor = 0;
140 }
141
142 negop->icframe_vercnt = 1;
143 negop->icmsg_vercnt = 1;
144 }
145}
146EXPORT_SYMBOL(prep_negotiate_resp);
147
148/**
149 * chn_cb_negotiate() - Default handler for non IDE/SCSI/NETWORK
150 * Hyper-V requests
151 * @context: Pointer to argument structure.
152 *
153 * Set up the default handler for non device driver specific requests
154 * from Hyper-V. This stub responds to the default negotiate messages
155 * that come in for every non IDE/SCSI/Network request.
156 * This behavior is normally overwritten in the hv_utils driver. That
157 * driver handles requests like gracefull shutdown, heartbeats etc.
158 *
159 * Mainly used by Hyper-V drivers.
160 */
161void chn_cb_negotiate(void *context)
162{
163 struct vmbus_channel *channel = context;
164 u8 *buf;
165 u32 buflen, recvlen;
166 u64 requestid;
167
168 struct icmsg_hdr *icmsghdrp;
169 struct icmsg_negotiate *negop = NULL;
170
171 buflen = PAGE_SIZE;
172 buf = kmalloc(buflen, GFP_ATOMIC);
173
174 VmbusChannelRecvPacket(channel, buf, buflen, &recvlen, &requestid);
175
176 if (recvlen > 0) {
177 icmsghdrp = (struct icmsg_hdr *)&buf[
178 sizeof(struct vmbuspipe_hdr)];
179
180 prep_negotiate_resp(icmsghdrp, negop, buf);
181
182 icmsghdrp->icflags = ICMSGHDRFLAG_TRANSACTION
183 | ICMSGHDRFLAG_RESPONSE;
184
185 VmbusChannelSendPacket(channel, buf,
186 recvlen, requestid,
187 VmbusPacketTypeDataInBand, 0);
188 }
189
190 kfree(buf);
191}
192EXPORT_SYMBOL(chn_cb_negotiate);
193
194/*
195 * Function table used for message responses for non IDE/SCSI/Network type
196 * messages. (Such as KVP/Shutdown etc)
197 */
198struct hyperv_service_callback hv_cb_utils[MAX_MSG_TYPES] = {
199 /* 0E0B6031-5213-4934-818B-38D90CED39DB */
200 /* Shutdown */
201 {
202 .msg_type = HV_SHUTDOWN_MSG,
203 .data = {
204 0x31, 0x60, 0x0B, 0X0E, 0x13, 0x52, 0x34, 0x49,
205 0x81, 0x8B, 0x38, 0XD9, 0x0C, 0xED, 0x39, 0xDB
206 },
207 .callback = chn_cb_negotiate,
208 .log_msg = "Shutdown channel functionality initialized"
209 },
210
211 /* {9527E630-D0AE-497b-ADCE-E80AB0175CAF} */
212 /* TimeSync */
213 {
214 .msg_type = HV_TIMESYNC_MSG,
215 .data = {
216 0x30, 0xe6, 0x27, 0x95, 0xae, 0xd0, 0x7b, 0x49,
217 0xad, 0xce, 0xe8, 0x0a, 0xb0, 0x17, 0x5c, 0xaf
218 },
219 .callback = chn_cb_negotiate,
220 .log_msg = "Timesync channel functionality initialized"
221 },
222 /* {57164f39-9115-4e78-ab55-382f3bd5422d} */
223 /* Heartbeat */
224 {
225 .msg_type = HV_HEARTBEAT_MSG,
226 .data = {
227 0x39, 0x4f, 0x16, 0x57, 0x15, 0x91, 0x78, 0x4e,
228 0xab, 0x55, 0x38, 0x2f, 0x3b, 0xd5, 0x42, 0x2d
229 },
230 .callback = chn_cb_negotiate,
231 .log_msg = "Heartbeat channel functionality initialized"
232 },
233};
234EXPORT_SYMBOL(hv_cb_utils);
235
236/*
75 * AllocVmbusChannel - Allocate and initialize a vmbus channel object 237 * AllocVmbusChannel - Allocate and initialize a vmbus channel object
76 */ 238 */
77struct vmbus_channel *AllocVmbusChannel(void) 239struct vmbus_channel *AllocVmbusChannel(void)
@@ -97,7 +259,7 @@ struct vmbus_channel *AllocVmbusChannel(void)
97 return channel; 259 return channel;
98} 260}
99 261
100/** 262/*
101 * ReleaseVmbusChannel - Release the vmbus channel object itself 263 * ReleaseVmbusChannel - Release the vmbus channel object itself
102 */ 264 */
103static inline void ReleaseVmbusChannel(void *context) 265static inline void ReleaseVmbusChannel(void *context)
@@ -115,7 +277,7 @@ static inline void ReleaseVmbusChannel(void *context)
115 DPRINT_EXIT(VMBUS); 277 DPRINT_EXIT(VMBUS);
116} 278}
117 279
118/** 280/*
119 * FreeVmbusChannel - Release the resources used by the vmbus channel object 281 * FreeVmbusChannel - Release the resources used by the vmbus channel object
120 */ 282 */
121void FreeVmbusChannel(struct vmbus_channel *Channel) 283void FreeVmbusChannel(struct vmbus_channel *Channel)
@@ -131,8 +293,9 @@ void FreeVmbusChannel(struct vmbus_channel *Channel)
131 Channel); 293 Channel);
132} 294}
133 295
134/** 296/*
135 * VmbusChannelProcessOffer - Process the offer by creating a channel/device associated with this offer 297 * VmbusChannelProcessOffer - Process the offer by creating a channel/device
298 * associated with this offer
136 */ 299 */
137static void VmbusChannelProcessOffer(void *context) 300static void VmbusChannelProcessOffer(void *context)
138{ 301{
@@ -140,6 +303,7 @@ static void VmbusChannelProcessOffer(void *context)
140 struct vmbus_channel *channel; 303 struct vmbus_channel *channel;
141 bool fNew = true; 304 bool fNew = true;
142 int ret; 305 int ret;
306 int cnt;
143 unsigned long flags; 307 unsigned long flags;
144 308
145 DPRINT_ENTER(VMBUS); 309 DPRINT_ENTER(VMBUS);
@@ -209,11 +373,28 @@ static void VmbusChannelProcessOffer(void *context)
209 * can cleanup properly 373 * can cleanup properly
210 */ 374 */
211 newChannel->State = CHANNEL_OPEN_STATE; 375 newChannel->State = CHANNEL_OPEN_STATE;
376 cnt = 0;
377
378 while (cnt != MAX_MSG_TYPES) {
379 if (memcmp(&newChannel->OfferMsg.Offer.InterfaceType,
380 &hv_cb_utils[cnt].data,
381 sizeof(struct hv_guid)) == 0) {
382 DPRINT_INFO(VMBUS, "%s",
383 hv_cb_utils[cnt].log_msg);
384
385 if (VmbusChannelOpen(newChannel, 2 * PAGE_SIZE,
386 2 * PAGE_SIZE, NULL, 0,
387 hv_cb_utils[cnt].callback,
388 newChannel) == 0)
389 hv_cb_utils[cnt].channel = newChannel;
390 }
391 cnt++;
392 }
212 } 393 }
213 DPRINT_EXIT(VMBUS); 394 DPRINT_EXIT(VMBUS);
214} 395}
215 396
216/** 397/*
217 * VmbusChannelProcessRescindOffer - Rescind the offer by initiating a device removal 398 * VmbusChannelProcessRescindOffer - Rescind the offer by initiating a device removal
218 */ 399 */
219static void VmbusChannelProcessRescindOffer(void *context) 400static void VmbusChannelProcessRescindOffer(void *context)
@@ -225,7 +406,7 @@ static void VmbusChannelProcessRescindOffer(void *context)
225 DPRINT_EXIT(VMBUS); 406 DPRINT_EXIT(VMBUS);
226} 407}
227 408
228/** 409/*
229 * VmbusChannelOnOffer - Handler for channel offers from vmbus in parent partition. 410 * VmbusChannelOnOffer - Handler for channel offers from vmbus in parent partition.
230 * 411 *
231 * We ignore all offers except network and storage offers. For each network and 412 * We ignore all offers except network and storage offers. For each network and
@@ -308,7 +489,7 @@ static void VmbusChannelOnOffer(struct vmbus_channel_message_header *hdr)
308 DPRINT_EXIT(VMBUS); 489 DPRINT_EXIT(VMBUS);
309} 490}
310 491
311/** 492/*
312 * VmbusChannelOnOfferRescind - Rescind offer handler. 493 * VmbusChannelOnOfferRescind - Rescind offer handler.
313 * 494 *
314 * We queue a work item to process this offer synchronously 495 * We queue a work item to process this offer synchronously
@@ -335,7 +516,7 @@ static void VmbusChannelOnOfferRescind(struct vmbus_channel_message_header *hdr)
335 DPRINT_EXIT(VMBUS); 516 DPRINT_EXIT(VMBUS);
336} 517}
337 518
338/** 519/*
339 * VmbusChannelOnOffersDelivered - This is invoked when all offers have been delivered. 520 * VmbusChannelOnOffersDelivered - This is invoked when all offers have been delivered.
340 * 521 *
341 * Nothing to do here. 522 * Nothing to do here.
@@ -347,7 +528,7 @@ static void VmbusChannelOnOffersDelivered(
347 DPRINT_EXIT(VMBUS); 528 DPRINT_EXIT(VMBUS);
348} 529}
349 530
350/** 531/*
351 * VmbusChannelOnOpenResult - Open result handler. 532 * VmbusChannelOnOpenResult - Open result handler.
352 * 533 *
353 * This is invoked when we received a response to our channel open request. 534 * This is invoked when we received a response to our channel open request.
@@ -395,7 +576,7 @@ static void VmbusChannelOnOpenResult(struct vmbus_channel_message_header *hdr)
395 DPRINT_EXIT(VMBUS); 576 DPRINT_EXIT(VMBUS);
396} 577}
397 578
398/** 579/*
399 * VmbusChannelOnGpadlCreated - GPADL created handler. 580 * VmbusChannelOnGpadlCreated - GPADL created handler.
400 * 581 *
401 * This is invoked when we received a response to our gpadl create request. 582 * This is invoked when we received a response to our gpadl create request.
@@ -447,7 +628,7 @@ static void VmbusChannelOnGpadlCreated(struct vmbus_channel_message_header *hdr)
447 DPRINT_EXIT(VMBUS); 628 DPRINT_EXIT(VMBUS);
448} 629}
449 630
450/** 631/*
451 * VmbusChannelOnGpadlTorndown - GPADL torndown handler. 632 * VmbusChannelOnGpadlTorndown - GPADL torndown handler.
452 * 633 *
453 * This is invoked when we received a response to our gpadl teardown request. 634 * This is invoked when we received a response to our gpadl teardown request.
@@ -495,7 +676,7 @@ static void VmbusChannelOnGpadlTorndown(
495 DPRINT_EXIT(VMBUS); 676 DPRINT_EXIT(VMBUS);
496} 677}
497 678
498/** 679/*
499 * VmbusChannelOnVersionResponse - Version response handler 680 * VmbusChannelOnVersionResponse - Version response handler
500 * 681 *
501 * This is invoked when we received a response to our initiate contact request. 682 * This is invoked when we received a response to our initiate contact request.
@@ -558,7 +739,7 @@ static struct vmbus_channel_message_table_entry
558 {ChannelMessageUnload, NULL}, 739 {ChannelMessageUnload, NULL},
559}; 740};
560 741
561/** 742/*
562 * VmbusOnChannelMessage - Handler for channel protocol messages. 743 * VmbusOnChannelMessage - Handler for channel protocol messages.
563 * 744 *
564 * This is invoked in the vmbus worker thread context. 745 * This is invoked in the vmbus worker thread context.
@@ -597,7 +778,7 @@ void VmbusOnChannelMessage(void *Context)
597 DPRINT_EXIT(VMBUS); 778 DPRINT_EXIT(VMBUS);
598} 779}
599 780
600/** 781/*
601 * VmbusChannelRequestOffers - Send a request to get all our pending offers. 782 * VmbusChannelRequestOffers - Send a request to get all our pending offers.
602 */ 783 */
603int VmbusChannelRequestOffers(void) 784int VmbusChannelRequestOffers(void)
@@ -611,9 +792,15 @@ int VmbusChannelRequestOffers(void)
611 msgInfo = kmalloc(sizeof(*msgInfo) + 792 msgInfo = kmalloc(sizeof(*msgInfo) +
612 sizeof(struct vmbus_channel_message_header), 793 sizeof(struct vmbus_channel_message_header),
613 GFP_KERNEL); 794 GFP_KERNEL);
614 ASSERT(msgInfo != NULL); 795 if (!msgInfo)
796 return -ENOMEM;
615 797
616 msgInfo->WaitEvent = osd_WaitEventCreate(); 798 msgInfo->WaitEvent = osd_WaitEventCreate();
799 if (!msgInfo->WaitEvent) {
800 kfree(msgInfo);
801 return -ENOMEM;
802 }
803
617 msg = (struct vmbus_channel_message_header *)msgInfo->Msg; 804 msg = (struct vmbus_channel_message_header *)msgInfo->Msg;
618 805
619 msg->MessageType = ChannelMessageRequestOffers; 806 msg->MessageType = ChannelMessageRequestOffers;
@@ -651,8 +838,9 @@ Cleanup:
651 return ret; 838 return ret;
652} 839}
653 840
654/** 841/*
655 * VmbusChannelReleaseUnattachedChannels - Release channels that are unattached/unconnected ie (no drivers associated) 842 * VmbusChannelReleaseUnattachedChannels - Release channels that are
843 * unattached/unconnected ie (no drivers associated)
656 */ 844 */
657void VmbusChannelReleaseUnattachedChannels(void) 845void VmbusChannelReleaseUnattachedChannels(void)
658{ 846{
diff --git a/drivers/staging/hv/ChannelMgmt.h b/drivers/staging/hv/channel_mgmt.h
index fa973d86b624..5908b81d3e9c 100644
--- a/drivers/staging/hv/ChannelMgmt.h
+++ b/drivers/staging/hv/channel_mgmt.h
@@ -27,9 +27,9 @@
27 27
28#include <linux/list.h> 28#include <linux/list.h>
29#include <linux/timer.h> 29#include <linux/timer.h>
30#include "RingBuffer.h" 30#include "ring_buffer.h"
31#include "VmbusChannelInterface.h" 31#include "vmbus_channel_interface.h"
32#include "VmbusPacketFormat.h" 32#include "vmbus_packet_format.h"
33 33
34/* Version 1 messages */ 34/* Version 1 messages */
35enum vmbus_channel_message_type { 35enum vmbus_channel_message_type {
diff --git a/drivers/staging/hv/Connection.c b/drivers/staging/hv/connection.c
index e0ea9cf90f03..e8824dadffc3 100644
--- a/drivers/staging/hv/Connection.c
+++ b/drivers/staging/hv/connection.c
@@ -26,7 +26,7 @@
26#include <linux/vmalloc.h> 26#include <linux/vmalloc.h>
27#include "osd.h" 27#include "osd.h"
28#include "logging.h" 28#include "logging.h"
29#include "VmbusPrivate.h" 29#include "vmbus_private.h"
30 30
31 31
32struct VMBUS_CONNECTION gVmbusConnection = { 32struct VMBUS_CONNECTION gVmbusConnection = {
@@ -34,7 +34,7 @@ struct VMBUS_CONNECTION gVmbusConnection = {
34 .NextGpadlHandle = ATOMIC_INIT(0xE1E10), 34 .NextGpadlHandle = ATOMIC_INIT(0xE1E10),
35}; 35};
36 36
37/** 37/*
38 * VmbusConnect - Sends a connect request on the partition service connection 38 * VmbusConnect - Sends a connect request on the partition service connection
39 */ 39 */
40int VmbusConnect(void) 40int VmbusConnect(void)
@@ -93,11 +93,16 @@ int VmbusConnect(void)
93 sizeof(struct vmbus_channel_initiate_contact), 93 sizeof(struct vmbus_channel_initiate_contact),
94 GFP_KERNEL); 94 GFP_KERNEL);
95 if (msgInfo == NULL) { 95 if (msgInfo == NULL) {
96 ret = -1; 96 ret = -ENOMEM;
97 goto Cleanup; 97 goto Cleanup;
98 } 98 }
99 99
100 msgInfo->WaitEvent = osd_WaitEventCreate(); 100 msgInfo->WaitEvent = osd_WaitEventCreate();
101 if (!msgInfo->WaitEvent) {
102 ret = -ENOMEM;
103 goto Cleanup;
104 }
105
101 msg = (struct vmbus_channel_initiate_contact *)msgInfo->Msg; 106 msg = (struct vmbus_channel_initiate_contact *)msgInfo->Msg;
102 107
103 msg->Header.MessageType = ChannelMessageInitiateContact; 108 msg->Header.MessageType = ChannelMessageInitiateContact;
@@ -180,7 +185,7 @@ Cleanup:
180 return ret; 185 return ret;
181} 186}
182 187
183/** 188/*
184 * VmbusDisconnect - Sends a disconnect request on the partition service connection 189 * VmbusDisconnect - Sends a disconnect request on the partition service connection
185 */ 190 */
186int VmbusDisconnect(void) 191int VmbusDisconnect(void)
@@ -195,6 +200,8 @@ int VmbusDisconnect(void)
195 return -1; 200 return -1;
196 201
197 msg = kzalloc(sizeof(struct vmbus_channel_message_header), GFP_KERNEL); 202 msg = kzalloc(sizeof(struct vmbus_channel_message_header), GFP_KERNEL);
203 if (!msg)
204 return -ENOMEM;
198 205
199 msg->MessageType = ChannelMessageUnload; 206 msg->MessageType = ChannelMessageUnload;
200 207
@@ -218,7 +225,7 @@ Cleanup:
218 return ret; 225 return ret;
219} 226}
220 227
221/** 228/*
222 * GetChannelFromRelId - Get the channel object given its child relative id (ie channel id) 229 * GetChannelFromRelId - Get the channel object given its child relative id (ie channel id)
223 */ 230 */
224struct vmbus_channel *GetChannelFromRelId(u32 relId) 231struct vmbus_channel *GetChannelFromRelId(u32 relId)
@@ -239,7 +246,7 @@ struct vmbus_channel *GetChannelFromRelId(u32 relId)
239 return foundChannel; 246 return foundChannel;
240} 247}
241 248
242/** 249/*
243 * VmbusProcessChannelEvent - Process a channel event notification 250 * VmbusProcessChannelEvent - Process a channel event notification
244 */ 251 */
245static void VmbusProcessChannelEvent(void *context) 252static void VmbusProcessChannelEvent(void *context)
@@ -247,7 +254,7 @@ static void VmbusProcessChannelEvent(void *context)
247 struct vmbus_channel *channel; 254 struct vmbus_channel *channel;
248 u32 relId = (u32)(unsigned long)context; 255 u32 relId = (u32)(unsigned long)context;
249 256
250 ASSERT(relId > 0); 257 /* ASSERT(relId > 0); */
251 258
252 /* 259 /*
253 * Find the channel based on this relid and invokes the 260 * Find the channel based on this relid and invokes the
@@ -259,15 +266,15 @@ static void VmbusProcessChannelEvent(void *context)
259 VmbusChannelOnChannelEvent(channel); 266 VmbusChannelOnChannelEvent(channel);
260 /* 267 /*
261 * WorkQueueQueueWorkItem(channel->dataWorkQueue, 268 * WorkQueueQueueWorkItem(channel->dataWorkQueue,
262 * VmbusChannelOnChannelEvent, 269 * VmbusChannelOnChannelEvent,
263 * (void*)channel); 270 * (void*)channel);
264 */ 271 */
265 } else { 272 } else {
266 DPRINT_ERR(VMBUS, "channel not found for relid - %d.", relId); 273 DPRINT_ERR(VMBUS, "channel not found for relid - %d.", relId);
267 } 274 }
268} 275}
269 276
270/** 277/*
271 * VmbusOnEvents - Handler for events 278 * VmbusOnEvents - Handler for events
272 */ 279 */
273void VmbusOnEvents(void) 280void VmbusOnEvents(void)
@@ -308,7 +315,7 @@ void VmbusOnEvents(void)
308 return; 315 return;
309} 316}
310 317
311/** 318/*
312 * VmbusPostMessage - Send a msg on the vmbus's message connection 319 * VmbusPostMessage - Send a msg on the vmbus's message connection
313 */ 320 */
314int VmbusPostMessage(void *buffer, size_t bufferLen) 321int VmbusPostMessage(void *buffer, size_t bufferLen)
@@ -320,7 +327,7 @@ int VmbusPostMessage(void *buffer, size_t bufferLen)
320 return HvPostMessage(connId, 1, buffer, bufferLen); 327 return HvPostMessage(connId, 1, buffer, bufferLen);
321} 328}
322 329
323/** 330/*
324 * VmbusSetEvent - Send an event notification to the parent 331 * VmbusSetEvent - Send an event notification to the parent
325 */ 332 */
326int VmbusSetEvent(u32 childRelId) 333int VmbusSetEvent(u32 childRelId)
diff --git a/drivers/staging/hv/Hv.c b/drivers/staging/hv/hv.c
index 3a1112d29aeb..6c77e64027f0 100644
--- a/drivers/staging/hv/Hv.c
+++ b/drivers/staging/hv/hv.c
@@ -25,7 +25,7 @@
25#include <linux/vmalloc.h> 25#include <linux/vmalloc.h>
26#include "osd.h" 26#include "osd.h"
27#include "logging.h" 27#include "logging.h"
28#include "VmbusPrivate.h" 28#include "vmbus_private.h"
29 29
30/* The one and only */ 30/* The one and only */
31struct hv_context gHvContext = { 31struct hv_context gHvContext = {
@@ -35,7 +35,7 @@ struct hv_context gHvContext = {
35 .SignalEventBuffer = NULL, 35 .SignalEventBuffer = NULL,
36}; 36};
37 37
38/** 38/*
39 * HvQueryHypervisorPresence - Query the cpuid for presense of windows hypervisor 39 * HvQueryHypervisorPresence - Query the cpuid for presense of windows hypervisor
40 */ 40 */
41static int HvQueryHypervisorPresence(void) 41static int HvQueryHypervisorPresence(void)
@@ -56,7 +56,7 @@ static int HvQueryHypervisorPresence(void)
56 return ecx & HV_PRESENT_BIT; 56 return ecx & HV_PRESENT_BIT;
57} 57}
58 58
59/** 59/*
60 * HvQueryHypervisorInfo - Get version info of the windows hypervisor 60 * HvQueryHypervisorInfo - Get version info of the windows hypervisor
61 */ 61 */
62static int HvQueryHypervisorInfo(void) 62static int HvQueryHypervisorInfo(void)
@@ -125,7 +125,7 @@ static int HvQueryHypervisorInfo(void)
125 return maxLeaf; 125 return maxLeaf;
126} 126}
127 127
128/** 128/*
129 * HvDoHypercall - Invoke the specified hypercall 129 * HvDoHypercall - Invoke the specified hypercall
130 */ 130 */
131static u64 HvDoHypercall(u64 Control, void *Input, void *Output) 131static u64 HvDoHypercall(u64 Control, void *Input, void *Output)
@@ -180,7 +180,7 @@ static u64 HvDoHypercall(u64 Control, void *Input, void *Output)
180#endif /* !x86_64 */ 180#endif /* !x86_64 */
181} 181}
182 182
183/** 183/*
184 * HvInit - Main initialization routine. 184 * HvInit - Main initialization routine.
185 * 185 *
186 * This routine must be called before any other routines in here are called 186 * This routine must be called before any other routines in here are called
@@ -294,7 +294,7 @@ Cleanup:
294 return ret; 294 return ret;
295} 295}
296 296
297/** 297/*
298 * HvCleanup - Cleanup routine. 298 * HvCleanup - Cleanup routine.
299 * 299 *
300 * This routine is called normally during driver unloading or exiting. 300 * This routine is called normally during driver unloading or exiting.
@@ -305,11 +305,9 @@ void HvCleanup(void)
305 305
306 DPRINT_ENTER(VMBUS); 306 DPRINT_ENTER(VMBUS);
307 307
308 if (gHvContext.SignalEventBuffer) { 308 kfree(gHvContext.SignalEventBuffer);
309 kfree(gHvContext.SignalEventBuffer); 309 gHvContext.SignalEventBuffer = NULL;
310 gHvContext.SignalEventBuffer = NULL; 310 gHvContext.SignalEventParam = NULL;
311 gHvContext.SignalEventParam = NULL;
312 }
313 311
314 if (gHvContext.HypercallPage) { 312 if (gHvContext.HypercallPage) {
315 hypercallMsr.AsUINT64 = 0; 313 hypercallMsr.AsUINT64 = 0;
@@ -321,7 +319,7 @@ void HvCleanup(void)
321 DPRINT_EXIT(VMBUS); 319 DPRINT_EXIT(VMBUS);
322} 320}
323 321
324/** 322/*
325 * HvPostMessage - Post a message using the hypervisor message IPC. 323 * HvPostMessage - Post a message using the hypervisor message IPC.
326 * 324 *
327 * This involves a hypercall. 325 * This involves a hypercall.
@@ -362,7 +360,7 @@ u16 HvPostMessage(union hv_connection_id connectionId,
362} 360}
363 361
364 362
365/** 363/*
366 * HvSignalEvent - Signal an event on the specified connection using the hypervisor event IPC. 364 * HvSignalEvent - Signal an event on the specified connection using the hypervisor event IPC.
367 * 365 *
368 * This involves a hypercall. 366 * This involves a hypercall.
@@ -376,7 +374,7 @@ u16 HvSignalEvent(void)
376 return status; 374 return status;
377} 375}
378 376
379/** 377/*
380 * HvSynicInit - Initialize the Synthethic Interrupt Controller. 378 * HvSynicInit - Initialize the Synthethic Interrupt Controller.
381 * 379 *
382 * If it is already initialized by another entity (ie x2v shim), we need to 380 * If it is already initialized by another entity (ie x2v shim), we need to
@@ -482,7 +480,7 @@ Cleanup:
482 return; 480 return;
483} 481}
484 482
485/** 483/*
486 * HvSynicCleanup - Cleanup routine for HvSynicInit(). 484 * HvSynicCleanup - Cleanup routine for HvSynicInit().
487 */ 485 */
488void HvSynicCleanup(void *arg) 486void HvSynicCleanup(void *arg)
diff --git a/drivers/staging/hv/Hv.h b/drivers/staging/hv/hv.h
index 41f5ebb86e17..41f5ebb86e17 100644
--- a/drivers/staging/hv/Hv.h
+++ b/drivers/staging/hv/hv.h
diff --git a/drivers/staging/hv/hv_utils.c b/drivers/staging/hv/hv_utils.c
new file mode 100644
index 000000000000..8a49aafea37a
--- /dev/null
+++ b/drivers/staging/hv/hv_utils.c
@@ -0,0 +1,295 @@
1/*
2 * Copyright (c) 2010, Microsoft Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Authors:
18 * Haiyang Zhang <haiyangz@microsoft.com>
19 * Hank Janssen <hjanssen@microsoft.com>
20 */
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/slab.h>
25#include <linux/sysctl.h>
26#include <linux/reboot.h>
27
28#include "logging.h"
29#include "osd.h"
30#include "vmbus.h"
31#include "vmbus_packet_format.h"
32#include "vmbus_channel_interface.h"
33#include "version_info.h"
34#include "channel.h"
35#include "vmbus_private.h"
36#include "vmbus_api.h"
37#include "utils.h"
38
39
40static void shutdown_onchannelcallback(void *context)
41{
42 struct vmbus_channel *channel = context;
43 u8 *buf;
44 u32 buflen, recvlen;
45 u64 requestid;
46 u8 execute_shutdown = false;
47
48 struct shutdown_msg_data *shutdown_msg;
49
50 struct icmsg_hdr *icmsghdrp;
51 struct icmsg_negotiate *negop = NULL;
52
53 DPRINT_ENTER(VMBUS);
54
55 buflen = PAGE_SIZE;
56 buf = kmalloc(buflen, GFP_ATOMIC);
57
58 VmbusChannelRecvPacket(channel, buf, buflen, &recvlen, &requestid);
59
60 if (recvlen > 0) {
61 DPRINT_DBG(VMBUS, "shutdown packet: len=%d, requestid=%lld",
62 recvlen, requestid);
63
64 icmsghdrp = (struct icmsg_hdr *)&buf[
65 sizeof(struct vmbuspipe_hdr)];
66
67 if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) {
68 prep_negotiate_resp(icmsghdrp, negop, buf);
69 } else {
70 shutdown_msg = (struct shutdown_msg_data *)&buf[
71 sizeof(struct vmbuspipe_hdr) +
72 sizeof(struct icmsg_hdr)];
73
74 switch (shutdown_msg->flags) {
75 case 0:
76 case 1:
77 icmsghdrp->status = HV_S_OK;
78 execute_shutdown = true;
79
80 DPRINT_INFO(VMBUS, "Shutdown request received -"
81 " gracefull shutdown initiated");
82 break;
83 default:
84 icmsghdrp->status = HV_E_FAIL;
85 execute_shutdown = false;
86
87 DPRINT_INFO(VMBUS, "Shutdown request received -"
88 " Invalid request");
89 break;
90 };
91 }
92
93 icmsghdrp->icflags = ICMSGHDRFLAG_TRANSACTION
94 | ICMSGHDRFLAG_RESPONSE;
95
96 VmbusChannelSendPacket(channel, buf,
97 recvlen, requestid,
98 VmbusPacketTypeDataInBand, 0);
99 }
100
101 kfree(buf);
102
103 DPRINT_EXIT(VMBUS);
104
105 if (execute_shutdown == true)
106 orderly_poweroff(false);
107}
108
109/*
110 * Set guest time to host UTC time.
111 */
112static inline void do_adj_guesttime(u64 hosttime)
113{
114 s64 host_tns;
115 struct timespec host_ts;
116
117 host_tns = (hosttime - WLTIMEDELTA) * 100;
118 host_ts = ns_to_timespec(host_tns);
119
120 do_settimeofday(&host_ts);
121}
122
123/*
124 * Synchronize time with host after reboot, restore, etc.
125 *
126 * ICTIMESYNCFLAG_SYNC flag bit indicates reboot, restore events of the VM.
127 * After reboot the flag ICTIMESYNCFLAG_SYNC is included in the first time
128 * message after the timesync channel is opened. Since the hv_utils module is
129 * loaded after hv_vmbus, the first message is usually missed. The other
130 * thing is, systime is automatically set to emulated hardware clock which may
131 * not be UTC time or in the same time zone. So, to override these effects, we
132 * use the first 50 time samples for initial system time setting.
133 */
134static inline void adj_guesttime(u64 hosttime, u8 flags)
135{
136 static s32 scnt = 50;
137
138 if ((flags & ICTIMESYNCFLAG_SYNC) != 0) {
139 do_adj_guesttime(hosttime);
140 return;
141 }
142
143 if ((flags & ICTIMESYNCFLAG_SAMPLE) != 0 && scnt > 0) {
144 scnt--;
145 do_adj_guesttime(hosttime);
146 }
147}
148
149/*
150 * Time Sync Channel message handler.
151 */
152static void timesync_onchannelcallback(void *context)
153{
154 struct vmbus_channel *channel = context;
155 u8 *buf;
156 u32 buflen, recvlen;
157 u64 requestid;
158 struct icmsg_hdr *icmsghdrp;
159 struct ictimesync_data *timedatap;
160
161 DPRINT_ENTER(VMBUS);
162
163 buflen = PAGE_SIZE;
164 buf = kmalloc(buflen, GFP_ATOMIC);
165
166 VmbusChannelRecvPacket(channel, buf, buflen, &recvlen, &requestid);
167
168 if (recvlen > 0) {
169 DPRINT_DBG(VMBUS, "timesync packet: recvlen=%d, requestid=%lld",
170 recvlen, requestid);
171
172 icmsghdrp = (struct icmsg_hdr *)&buf[
173 sizeof(struct vmbuspipe_hdr)];
174
175 if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) {
176 prep_negotiate_resp(icmsghdrp, NULL, buf);
177 } else {
178 timedatap = (struct ictimesync_data *)&buf[
179 sizeof(struct vmbuspipe_hdr) +
180 sizeof(struct icmsg_hdr)];
181 adj_guesttime(timedatap->parenttime, timedatap->flags);
182 }
183
184 icmsghdrp->icflags = ICMSGHDRFLAG_TRANSACTION
185 | ICMSGHDRFLAG_RESPONSE;
186
187 VmbusChannelSendPacket(channel, buf,
188 recvlen, requestid,
189 VmbusPacketTypeDataInBand, 0);
190 }
191
192 kfree(buf);
193
194 DPRINT_EXIT(VMBUS);
195}
196
197/*
198 * Heartbeat functionality.
199 * Every two seconds, Hyper-V send us a heartbeat request message.
200 * we respond to this message, and Hyper-V knows we are alive.
201 */
202static void heartbeat_onchannelcallback(void *context)
203{
204 struct vmbus_channel *channel = context;
205 u8 *buf;
206 u32 buflen, recvlen;
207 u64 requestid;
208 struct icmsg_hdr *icmsghdrp;
209 struct heartbeat_msg_data *heartbeat_msg;
210
211 DPRINT_ENTER(VMBUS);
212
213 buflen = PAGE_SIZE;
214 buf = kmalloc(buflen, GFP_ATOMIC);
215
216 VmbusChannelRecvPacket(channel, buf, buflen, &recvlen, &requestid);
217
218 if (recvlen > 0) {
219 DPRINT_DBG(VMBUS, "heartbeat packet: len=%d, requestid=%lld",
220 recvlen, requestid);
221
222 icmsghdrp = (struct icmsg_hdr *)&buf[
223 sizeof(struct vmbuspipe_hdr)];
224
225 icmsghdrp = (struct icmsg_hdr *)&buf[
226 sizeof(struct vmbuspipe_hdr)];
227
228 if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) {
229 prep_negotiate_resp(icmsghdrp, NULL, buf);
230 } else {
231 heartbeat_msg = (struct heartbeat_msg_data *)&buf[
232 sizeof(struct vmbuspipe_hdr) +
233 sizeof(struct icmsg_hdr)];
234
235 DPRINT_DBG(VMBUS, "heartbeat seq = %lld",
236 heartbeat_msg->seq_num);
237
238 heartbeat_msg->seq_num += 1;
239 }
240
241 icmsghdrp->icflags = ICMSGHDRFLAG_TRANSACTION
242 | ICMSGHDRFLAG_RESPONSE;
243
244 VmbusChannelSendPacket(channel, buf,
245 recvlen, requestid,
246 VmbusPacketTypeDataInBand, 0);
247 }
248
249 kfree(buf);
250
251 DPRINT_EXIT(VMBUS);
252}
253
254static int __init init_hyperv_utils(void)
255{
256 printk(KERN_INFO "Registering HyperV Utility Driver\n");
257
258 hv_cb_utils[HV_SHUTDOWN_MSG].channel->OnChannelCallback =
259 &shutdown_onchannelcallback;
260 hv_cb_utils[HV_SHUTDOWN_MSG].callback = &shutdown_onchannelcallback;
261
262 hv_cb_utils[HV_TIMESYNC_MSG].channel->OnChannelCallback =
263 &timesync_onchannelcallback;
264 hv_cb_utils[HV_TIMESYNC_MSG].callback = &timesync_onchannelcallback;
265
266 hv_cb_utils[HV_HEARTBEAT_MSG].channel->OnChannelCallback =
267 &heartbeat_onchannelcallback;
268 hv_cb_utils[HV_HEARTBEAT_MSG].callback = &heartbeat_onchannelcallback;
269
270 return 0;
271}
272
273static void exit_hyperv_utils(void)
274{
275 printk(KERN_INFO "De-Registered HyperV Utility Driver\n");
276
277 hv_cb_utils[HV_SHUTDOWN_MSG].channel->OnChannelCallback =
278 &chn_cb_negotiate;
279 hv_cb_utils[HV_SHUTDOWN_MSG].callback = &chn_cb_negotiate;
280
281 hv_cb_utils[HV_TIMESYNC_MSG].channel->OnChannelCallback =
282 &chn_cb_negotiate;
283 hv_cb_utils[HV_TIMESYNC_MSG].callback = &chn_cb_negotiate;
284
285 hv_cb_utils[HV_HEARTBEAT_MSG].channel->OnChannelCallback =
286 &chn_cb_negotiate;
287 hv_cb_utils[HV_HEARTBEAT_MSG].callback = &chn_cb_negotiate;
288}
289
290module_init(init_hyperv_utils);
291module_exit(exit_hyperv_utils);
292
293MODULE_DESCRIPTION("Hyper-V Utilities");
294MODULE_VERSION(HV_DRV_VERSION);
295MODULE_LICENSE("GPL");
diff --git a/drivers/staging/hv/logging.h b/drivers/staging/hv/logging.h
index 9e55617bd670..ad4cfcfb7b11 100644
--- a/drivers/staging/hv/logging.h
+++ b/drivers/staging/hv/logging.h
@@ -61,13 +61,6 @@
61 61
62extern unsigned int vmbus_loglevel; 62extern unsigned int vmbus_loglevel;
63 63
64#define ASSERT(expr) \
65 if (!(expr)) { \
66 printk(KERN_CRIT "Assertion failed! %s,%s,%s,line=%d\n", \
67 #expr, __FILE__, __func__, __LINE__); \
68 __asm__ __volatile__("int3"); \
69 }
70
71#define DPRINT(mod, lvl, fmt, args...) do {\ 64#define DPRINT(mod, lvl, fmt, args...) do {\
72 if ((mod & (HIWORD(vmbus_loglevel))) && \ 65 if ((mod & (HIWORD(vmbus_loglevel))) && \
73 (lvl <= LOWORD(vmbus_loglevel))) \ 66 (lvl <= LOWORD(vmbus_loglevel))) \
diff --git a/drivers/staging/hv/NetVsc.c b/drivers/staging/hv/netvsc.c
index e4bf82297504..ba15059c45b2 100644
--- a/drivers/staging/hv/NetVsc.c
+++ b/drivers/staging/hv/netvsc.c
@@ -25,8 +25,8 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include "osd.h" 26#include "osd.h"
27#include "logging.h" 27#include "logging.h"
28#include "NetVsc.h" 28#include "netvsc.h"
29#include "RndisFilter.h" 29#include "rndis_filter.h"
30 30
31 31
32/* Globals */ 32/* Globals */
@@ -92,7 +92,7 @@ static struct netvsc_device *AllocNetDevice(struct hv_device *Device)
92 92
93static void FreeNetDevice(struct netvsc_device *Device) 93static void FreeNetDevice(struct netvsc_device *Device)
94{ 94{
95 ASSERT(atomic_read(&Device->RefCount) == 0); 95 WARN_ON(atomic_read(&Device->RefCount) == 0);
96 Device->Device->Extension = NULL; 96 Device->Device->Extension = NULL;
97 kfree(Device); 97 kfree(Device);
98} 98}
@@ -131,7 +131,7 @@ static void PutNetDevice(struct hv_device *Device)
131 struct netvsc_device *netDevice; 131 struct netvsc_device *netDevice;
132 132
133 netDevice = Device->Extension; 133 netDevice = Device->Extension;
134 ASSERT(netDevice); 134 /* ASSERT(netDevice); */
135 135
136 atomic_dec(&netDevice->RefCount); 136 atomic_dec(&netDevice->RefCount);
137} 137}
@@ -167,7 +167,7 @@ static struct netvsc_device *ReleaseInboundNetDevice(struct hv_device *Device)
167 return netDevice; 167 return netDevice;
168} 168}
169 169
170/** 170/*
171 * NetVscInitialize - Main entry point 171 * NetVscInitialize - Main entry point
172 */ 172 */
173int NetVscInitialize(struct hv_driver *drv) 173int NetVscInitialize(struct hv_driver *drv)
@@ -184,14 +184,15 @@ int NetVscInitialize(struct hv_driver *drv)
184 sizeof(struct vmtransfer_page_packet_header)); 184 sizeof(struct vmtransfer_page_packet_header));
185 185
186 /* Make sure we are at least 2 pages since 1 page is used for control */ 186 /* Make sure we are at least 2 pages since 1 page is used for control */
187 ASSERT(driver->RingBufferSize >= (PAGE_SIZE << 1)); 187 /* ASSERT(driver->RingBufferSize >= (PAGE_SIZE << 1)); */
188 188
189 drv->name = gDriverName; 189 drv->name = gDriverName;
190 memcpy(&drv->deviceType, &gNetVscDeviceType, sizeof(struct hv_guid)); 190 memcpy(&drv->deviceType, &gNetVscDeviceType, sizeof(struct hv_guid));
191 191
192 /* Make sure it is set by the caller */ 192 /* Make sure it is set by the caller */
193 ASSERT(driver->OnReceiveCallback); 193 /* FIXME: These probably should still be tested in some way */
194 ASSERT(driver->OnLinkStatusChanged); 194 /* ASSERT(driver->OnReceiveCallback); */
195 /* ASSERT(driver->OnLinkStatusChanged); */
195 196
196 /* Setup the dispatch table */ 197 /* Setup the dispatch table */
197 driver->Base.OnDeviceAdd = NetVscOnDeviceAdd; 198 driver->Base.OnDeviceAdd = NetVscOnDeviceAdd;
@@ -222,9 +223,9 @@ static int NetVscInitializeReceiveBufferWithNetVsp(struct hv_device *Device)
222 DPRINT_EXIT(NETVSC); 223 DPRINT_EXIT(NETVSC);
223 return -1; 224 return -1;
224 } 225 }
225 ASSERT(netDevice->ReceiveBufferSize > 0); 226 /* ASSERT(netDevice->ReceiveBufferSize > 0); */
226 /* page-size grandularity */ 227 /* page-size grandularity */
227 ASSERT((netDevice->ReceiveBufferSize & (PAGE_SIZE - 1)) == 0); 228 /* ASSERT((netDevice->ReceiveBufferSize & (PAGE_SIZE - 1)) == 0); */
228 229
229 netDevice->ReceiveBuffer = 230 netDevice->ReceiveBuffer =
230 osd_PageAlloc(netDevice->ReceiveBufferSize >> PAGE_SHIFT); 231 osd_PageAlloc(netDevice->ReceiveBufferSize >> PAGE_SHIFT);
@@ -236,8 +237,8 @@ static int NetVscInitializeReceiveBufferWithNetVsp(struct hv_device *Device)
236 goto Cleanup; 237 goto Cleanup;
237 } 238 }
238 /* page-aligned buffer */ 239 /* page-aligned buffer */
239 ASSERT(((unsigned long)netDevice->ReceiveBuffer & (PAGE_SIZE - 1)) == 240 /* ASSERT(((unsigned long)netDevice->ReceiveBuffer & (PAGE_SIZE - 1)) == */
240 0); 241 /* 0); */
241 242
242 DPRINT_INFO(NETVSC, "Establishing receive buffer's GPADL..."); 243 DPRINT_INFO(NETVSC, "Establishing receive buffer's GPADL...");
243 244
@@ -294,8 +295,8 @@ static int NetVscInitializeReceiveBufferWithNetVsp(struct hv_device *Device)
294 } 295 }
295 296
296 /* Parse the response */ 297 /* Parse the response */
297 ASSERT(netDevice->ReceiveSectionCount == 0); 298 /* ASSERT(netDevice->ReceiveSectionCount == 0); */
298 ASSERT(netDevice->ReceiveSections == NULL); 299 /* ASSERT(netDevice->ReceiveSections == NULL); */
299 300
300 netDevice->ReceiveSectionCount = initPacket->Messages.Version1Messages.SendReceiveBufferComplete.NumSections; 301 netDevice->ReceiveSectionCount = initPacket->Messages.Version1Messages.SendReceiveBufferComplete.NumSections;
301 302
@@ -353,9 +354,13 @@ static int NetVscInitializeSendBufferWithNetVsp(struct hv_device *Device)
353 DPRINT_EXIT(NETVSC); 354 DPRINT_EXIT(NETVSC);
354 return -1; 355 return -1;
355 } 356 }
356 ASSERT(netDevice->SendBufferSize > 0); 357 if (netDevice->SendBufferSize <= 0) {
358 ret = -EINVAL;
359 goto Cleanup;
360 }
361
357 /* page-size grandularity */ 362 /* page-size grandularity */
358 ASSERT((netDevice->SendBufferSize & (PAGE_SIZE - 1)) == 0); 363 /* ASSERT((netDevice->SendBufferSize & (PAGE_SIZE - 1)) == 0); */
359 364
360 netDevice->SendBuffer = 365 netDevice->SendBuffer =
361 osd_PageAlloc(netDevice->SendBufferSize >> PAGE_SHIFT); 366 osd_PageAlloc(netDevice->SendBufferSize >> PAGE_SHIFT);
@@ -366,7 +371,7 @@ static int NetVscInitializeSendBufferWithNetVsp(struct hv_device *Device)
366 goto Cleanup; 371 goto Cleanup;
367 } 372 }
368 /* page-aligned buffer */ 373 /* page-aligned buffer */
369 ASSERT(((unsigned long)netDevice->SendBuffer & (PAGE_SIZE - 1)) == 0); 374 /* ASSERT(((unsigned long)netDevice->SendBuffer & (PAGE_SIZE - 1)) == 0); */
370 375
371 DPRINT_INFO(NETVSC, "Establishing send buffer's GPADL..."); 376 DPRINT_INFO(NETVSC, "Establishing send buffer's GPADL...");
372 377
@@ -705,7 +710,7 @@ static void NetVscDisconnectFromVsp(struct netvsc_device *NetDevice)
705 DPRINT_EXIT(NETVSC); 710 DPRINT_EXIT(NETVSC);
706} 711}
707 712
708/** 713/*
709 * NetVscOnDeviceAdd - Callback when the device belonging to this driver is added 714 * NetVscOnDeviceAdd - Callback when the device belonging to this driver is added
710 */ 715 */
711static int NetVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo) 716static int NetVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo)
@@ -749,6 +754,10 @@ static int NetVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo)
749 &netDevice->ReceivePacketList); 754 &netDevice->ReceivePacketList);
750 } 755 }
751 netDevice->ChannelInitEvent = osd_WaitEventCreate(); 756 netDevice->ChannelInitEvent = osd_WaitEventCreate();
757 if (!netDevice->ChannelInitEvent) {
758 ret = -ENOMEM;
759 goto Cleanup;
760 }
752 761
753 /* Open the channel */ 762 /* Open the channel */
754 ret = Device->Driver->VmbusChannelInterface.Open(Device, 763 ret = Device->Driver->VmbusChannelInterface.Open(Device,
@@ -807,7 +816,7 @@ Cleanup:
807 return ret; 816 return ret;
808} 817}
809 818
810/** 819/*
811 * NetVscOnDeviceRemove - Callback when the root bus device is removed 820 * NetVscOnDeviceRemove - Callback when the root bus device is removed
812 */ 821 */
813static int NetVscOnDeviceRemove(struct hv_device *Device) 822static int NetVscOnDeviceRemove(struct hv_device *Device)
@@ -864,7 +873,7 @@ static int NetVscOnDeviceRemove(struct hv_device *Device)
864 return 0; 873 return 0;
865} 874}
866 875
867/** 876/*
868 * NetVscOnCleanup - Perform any cleanup when the driver is removed 877 * NetVscOnCleanup - Perform any cleanup when the driver is removed
869 */ 878 */
870static void NetVscOnCleanup(struct hv_driver *drv) 879static void NetVscOnCleanup(struct hv_driver *drv)
@@ -908,7 +917,7 @@ static void NetVscOnSendCompletion(struct hv_device *Device,
908 NvspMessage1TypeSendRNDISPacketComplete) { 917 NvspMessage1TypeSendRNDISPacketComplete) {
909 /* Get the send context */ 918 /* Get the send context */
910 nvscPacket = (struct hv_netvsc_packet *)(unsigned long)Packet->TransactionId; 919 nvscPacket = (struct hv_netvsc_packet *)(unsigned long)Packet->TransactionId;
911 ASSERT(nvscPacket); 920 /* ASSERT(nvscPacket); */
912 921
913 /* Notify the layer above us */ 922 /* Notify the layer above us */
914 nvscPacket->Completion.Send.OnSendCompletion(nvscPacket->Completion.Send.SendCompletionContext); 923 nvscPacket->Completion.Send.OnSendCompletion(nvscPacket->Completion.Send.SendCompletionContext);
@@ -1087,13 +1096,13 @@ static void NetVscOnReceive(struct hv_device *Device,
1087 } 1096 }
1088 1097
1089 /* Remove the 1st packet to represent the xfer page packet itself */ 1098 /* Remove the 1st packet to represent the xfer page packet itself */
1090 xferpagePacket = (struct xferpage_packet*)listHead.next; 1099 xferpagePacket = (struct xferpage_packet *)listHead.next;
1091 list_del(&xferpagePacket->ListEntry); 1100 list_del(&xferpagePacket->ListEntry);
1092 1101
1093 /* This is how much we can satisfy */ 1102 /* This is how much we can satisfy */
1094 xferpagePacket->Count = count - 1; 1103 xferpagePacket->Count = count - 1;
1095 ASSERT(xferpagePacket->Count > 0 && xferpagePacket->Count <= 1104 /* ASSERT(xferpagePacket->Count > 0 && xferpagePacket->Count <= */
1096 vmxferpagePacket->RangeCount); 1105 /* vmxferpagePacket->RangeCount); */
1097 1106
1098 if (xferpagePacket->Count != vmxferpagePacket->RangeCount) { 1107 if (xferpagePacket->Count != vmxferpagePacket->RangeCount) {
1099 DPRINT_INFO(NETVSC, "Needed %d netvsc pkts to satisy this xfer " 1108 DPRINT_INFO(NETVSC, "Needed %d netvsc pkts to satisy this xfer "
@@ -1103,7 +1112,7 @@ static void NetVscOnReceive(struct hv_device *Device,
1103 1112
1104 /* Each range represents 1 RNDIS pkt that contains 1 ethernet frame */ 1113 /* Each range represents 1 RNDIS pkt that contains 1 ethernet frame */
1105 for (i = 0; i < (count - 1); i++) { 1114 for (i = 0; i < (count - 1); i++) {
1106 netvscPacket = (struct hv_netvsc_packet*)listHead.next; 1115 netvscPacket = (struct hv_netvsc_packet *)listHead.next;
1107 list_del(&netvscPacket->ListEntry); 1116 list_del(&netvscPacket->ListEntry);
1108 1117
1109 /* Initialize the netvsc packet */ 1118 /* Initialize the netvsc packet */
@@ -1121,9 +1130,9 @@ static void NetVscOnReceive(struct hv_device *Device,
1121 vmxferpagePacket->Ranges[i].ByteCount; 1130 vmxferpagePacket->Ranges[i].ByteCount;
1122 netvscPacket->PageBufferCount = 1; 1131 netvscPacket->PageBufferCount = 1;
1123 1132
1124 ASSERT(vmxferpagePacket->Ranges[i].ByteOffset + 1133 /* ASSERT(vmxferpagePacket->Ranges[i].ByteOffset + */
1125 vmxferpagePacket->Ranges[i].ByteCount < 1134 /* vmxferpagePacket->Ranges[i].ByteCount < */
1126 netDevice->ReceiveBufferSize); 1135 /* netDevice->ReceiveBufferSize); */
1127 1136
1128 netvscPacket->PageBuffers[0].Length = 1137 netvscPacket->PageBuffers[0].Length =
1129 vmxferpagePacket->Ranges[i].ByteCount; 1138 vmxferpagePacket->Ranges[i].ByteCount;
@@ -1161,7 +1170,7 @@ static void NetVscOnReceive(struct hv_device *Device,
1161 if (bytesRemain == 0) 1170 if (bytesRemain == 0)
1162 break; 1171 break;
1163 } 1172 }
1164 ASSERT(bytesRemain == 0); 1173 /* ASSERT(bytesRemain == 0); */
1165 } 1174 }
1166 DPRINT_DBG(NETVSC, "[%d] - (abs offset %u len %u) => " 1175 DPRINT_DBG(NETVSC, "[%d] - (abs offset %u len %u) => "
1167 "(pfn %llx, offset %u, len %u)", i, 1176 "(pfn %llx, offset %u, len %u)", i,
@@ -1177,7 +1186,7 @@ static void NetVscOnReceive(struct hv_device *Device,
1177 NetVscOnReceiveCompletion(netvscPacket->Completion.Recv.ReceiveCompletionContext); 1186 NetVscOnReceiveCompletion(netvscPacket->Completion.Recv.ReceiveCompletionContext);
1178 } 1187 }
1179 1188
1180 ASSERT(list_empty(&listHead)); 1189 /* ASSERT(list_empty(&listHead)); */
1181 1190
1182 PutNetDevice(Device); 1191 PutNetDevice(Device);
1183 DPRINT_EXIT(NETVSC); 1192 DPRINT_EXIT(NETVSC);
@@ -1241,7 +1250,7 @@ static void NetVscOnReceiveCompletion(void *Context)
1241 1250
1242 DPRINT_ENTER(NETVSC); 1251 DPRINT_ENTER(NETVSC);
1243 1252
1244 ASSERT(packet->XferPagePacket); 1253 /* ASSERT(packet->XferPagePacket); */
1245 1254
1246 /* 1255 /*
1247 * Even though it seems logical to do a GetOutboundNetDevice() here to 1256 * Even though it seems logical to do a GetOutboundNetDevice() here to
@@ -1259,7 +1268,7 @@ static void NetVscOnReceiveCompletion(void *Context)
1259 /* Overloading use of the lock. */ 1268 /* Overloading use of the lock. */
1260 spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags); 1269 spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags);
1261 1270
1262 ASSERT(packet->XferPagePacket->Count > 0); 1271 /* ASSERT(packet->XferPagePacket->Count > 0); */
1263 packet->XferPagePacket->Count--; 1272 packet->XferPagePacket->Count--;
1264 1273
1265 /* 1274 /*
@@ -1286,30 +1295,35 @@ static void NetVscOnReceiveCompletion(void *Context)
1286 DPRINT_EXIT(NETVSC); 1295 DPRINT_EXIT(NETVSC);
1287} 1296}
1288 1297
1289void NetVscOnChannelCallback(void *Context) 1298static void NetVscOnChannelCallback(void *Context)
1290{ 1299{
1291 const int netPacketSize = 2048;
1292 int ret; 1300 int ret;
1293 struct hv_device *device = Context; 1301 struct hv_device *device = Context;
1294 struct netvsc_device *netDevice; 1302 struct netvsc_device *netDevice;
1295 u32 bytesRecvd; 1303 u32 bytesRecvd;
1296 u64 requestId; 1304 u64 requestId;
1297 unsigned char packet[netPacketSize]; 1305 unsigned char *packet;
1298 struct vmpacket_descriptor *desc; 1306 struct vmpacket_descriptor *desc;
1299 unsigned char *buffer = packet; 1307 unsigned char *buffer;
1300 int bufferlen = netPacketSize; 1308 int bufferlen = NETVSC_PACKET_SIZE;
1301 1309
1302 1310
1303 DPRINT_ENTER(NETVSC); 1311 DPRINT_ENTER(NETVSC);
1304 1312
1305 ASSERT(device); 1313 /* ASSERT(device); */
1314
1315 packet = kzalloc(NETVSC_PACKET_SIZE * sizeof(unsigned char),
1316 GFP_KERNEL);
1317 if (!packet)
1318 return;
1319 buffer = packet;
1306 1320
1307 netDevice = GetInboundNetDevice(device); 1321 netDevice = GetInboundNetDevice(device);
1308 if (!netDevice) { 1322 if (!netDevice) {
1309 DPRINT_ERR(NETVSC, "net device (%p) shutting down..." 1323 DPRINT_ERR(NETVSC, "net device (%p) shutting down..."
1310 "ignoring inbound packets", netDevice); 1324 "ignoring inbound packets", netDevice);
1311 DPRINT_EXIT(NETVSC); 1325 DPRINT_EXIT(NETVSC);
1312 return; 1326 goto out;
1313 } 1327 }
1314 1328
1315 do { 1329 do {
@@ -1341,17 +1355,17 @@ void NetVscOnChannelCallback(void *Context)
1341 } 1355 }
1342 1356
1343 /* reset */ 1357 /* reset */
1344 if (bufferlen > netPacketSize) { 1358 if (bufferlen > NETVSC_PACKET_SIZE) {
1345 kfree(buffer); 1359 kfree(buffer);
1346 buffer = packet; 1360 buffer = packet;
1347 bufferlen = netPacketSize; 1361 bufferlen = NETVSC_PACKET_SIZE;
1348 } 1362 }
1349 } else { 1363 } else {
1350 /* reset */ 1364 /* reset */
1351 if (bufferlen > netPacketSize) { 1365 if (bufferlen > NETVSC_PACKET_SIZE) {
1352 kfree(buffer); 1366 kfree(buffer);
1353 buffer = packet; 1367 buffer = packet;
1354 bufferlen = netPacketSize; 1368 bufferlen = NETVSC_PACKET_SIZE;
1355 } 1369 }
1356 1370
1357 break; 1371 break;
@@ -1368,12 +1382,12 @@ void NetVscOnChannelCallback(void *Context)
1368 } 1382 }
1369 1383
1370 bufferlen = bytesRecvd; 1384 bufferlen = bytesRecvd;
1371 } else {
1372 ASSERT(0);
1373 } 1385 }
1374 } while (1); 1386 } while (1);
1375 1387
1376 PutNetDevice(device); 1388 PutNetDevice(device);
1377 DPRINT_EXIT(NETVSC); 1389 DPRINT_EXIT(NETVSC);
1390out:
1391 kfree(buffer);
1378 return; 1392 return;
1379} 1393}
diff --git a/drivers/staging/hv/NetVsc.h b/drivers/staging/hv/netvsc.h
index 6e0e03494126..c71dce5b3f7c 100644
--- a/drivers/staging/hv/NetVsc.h
+++ b/drivers/staging/hv/netvsc.h
@@ -26,9 +26,9 @@
26#define _NETVSC_H_ 26#define _NETVSC_H_
27 27
28#include <linux/list.h> 28#include <linux/list.h>
29#include "VmbusPacketFormat.h" 29#include "vmbus_packet_format.h"
30#include "VmbusChannelInterface.h" 30#include "vmbus_channel_interface.h"
31#include "NetVscApi.h" 31#include "netvsc_api.h"
32 32
33 33
34#define NVSP_INVALID_PROTOCOL_VERSION ((u32)0xFFFFFFFF) 34#define NVSP_INVALID_PROTOCOL_VERSION ((u32)0xFFFFFFFF)
@@ -289,6 +289,7 @@ struct nvsp_message {
289/* Preallocated receive packets */ 289/* Preallocated receive packets */
290#define NETVSC_RECEIVE_PACKETLIST_COUNT 256 290#define NETVSC_RECEIVE_PACKETLIST_COUNT 256
291 291
292#define NETVSC_PACKET_SIZE 2048
292 293
293/* Per netvsc channel-specific */ 294/* Per netvsc channel-specific */
294struct netvsc_device { 295struct netvsc_device {
diff --git a/drivers/staging/hv/NetVscApi.h b/drivers/staging/hv/netvsc_api.h
index 95d7a32b12f2..4b5b3ac458c8 100644
--- a/drivers/staging/hv/NetVscApi.h
+++ b/drivers/staging/hv/netvsc_api.h
@@ -25,11 +25,7 @@
25#ifndef _NETVSC_API_H_ 25#ifndef _NETVSC_API_H_
26#define _NETVSC_API_H_ 26#define _NETVSC_API_H_
27 27
28#include "VmbusApi.h" 28#include "vmbus_api.h"
29
30/* Defines */
31#define NETVSC_DEVICE_RING_BUFFER_SIZE (64*PAGE_SIZE)
32#define HW_MACADDR_LEN 6
33 29
34/* Fwd declaration */ 30/* Fwd declaration */
35struct hv_netvsc_packet; 31struct hv_netvsc_packet;
@@ -93,9 +89,6 @@ struct netvsc_driver {
93 u32 RingBufferSize; 89 u32 RingBufferSize;
94 u32 RequestExtSize; 90 u32 RequestExtSize;
95 91
96 /* Additional num of page buffers to allocate */
97 u32 AdditionalRequestPageBufferCount;
98
99 /* 92 /*
100 * This is set by the caller to allow us to callback when we 93 * This is set by the caller to allow us to callback when we
101 * receive a packet from the "wire" 94 * receive a packet from the "wire"
diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c
index ab27d9a4446d..55b993298ff4 100644
--- a/drivers/staging/hv/netvsc_drv.c
+++ b/drivers/staging/hv/netvsc_drv.c
@@ -30,20 +30,22 @@
30#include <linux/skbuff.h> 30#include <linux/skbuff.h>
31#include <linux/in.h> 31#include <linux/in.h>
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/dmi.h>
34#include <linux/pci.h>
33#include <net/arp.h> 35#include <net/arp.h>
34#include <net/route.h> 36#include <net/route.h>
35#include <net/sock.h> 37#include <net/sock.h>
36#include <net/pkt_sched.h> 38#include <net/pkt_sched.h>
37#include "osd.h" 39#include "osd.h"
38#include "logging.h" 40#include "logging.h"
39#include "VersionInfo.h" 41#include "version_info.h"
40#include "vmbus.h" 42#include "vmbus.h"
41#include "NetVscApi.h" 43#include "netvsc_api.h"
42 44
43struct net_device_context { 45struct net_device_context {
44 /* point back to our device context */ 46 /* point back to our device context */
45 struct vm_device *device_ctx; 47 struct vm_device *device_ctx;
46 struct net_device_stats stats; 48 unsigned long avail;
47}; 49};
48 50
49struct netvsc_driver_context { 51struct netvsc_driver_context {
@@ -53,18 +55,17 @@ struct netvsc_driver_context {
53 struct netvsc_driver drv_obj; 55 struct netvsc_driver drv_obj;
54}; 56};
55 57
56static int netvsc_ringbuffer_size = NETVSC_DEVICE_RING_BUFFER_SIZE; 58#define PACKET_PAGES_LOWATER 8
59/* Need this many pages to handle worst case fragmented packet */
60#define PACKET_PAGES_HIWATER (MAX_SKB_FRAGS + 2)
61
62static int ring_size = roundup_pow_of_two(2*MAX_SKB_FRAGS+1);
63module_param(ring_size, int, S_IRUGO);
64MODULE_PARM_DESC(ring_size, "Ring buffer size (# of pages)");
57 65
58/* The one and only one */ 66/* The one and only one */
59static struct netvsc_driver_context g_netvsc_drv; 67static struct netvsc_driver_context g_netvsc_drv;
60 68
61static struct net_device_stats *netvsc_get_stats(struct net_device *net)
62{
63 struct net_device_context *net_device_ctx = netdev_priv(net);
64
65 return &net_device_ctx->stats;
66}
67
68static void netvsc_set_multicast_list(struct net_device *net) 69static void netvsc_set_multicast_list(struct net_device *net)
69{ 70{
70} 71}
@@ -78,9 +79,6 @@ static int netvsc_open(struct net_device *net)
78 DPRINT_ENTER(NETVSC_DRV); 79 DPRINT_ENTER(NETVSC_DRV);
79 80
80 if (netif_carrier_ok(net)) { 81 if (netif_carrier_ok(net)) {
81 memset(&net_device_ctx->stats, 0,
82 sizeof(struct net_device_stats));
83
84 /* Open up the device */ 82 /* Open up the device */
85 ret = RndisFilterOnOpen(device_obj); 83 ret = RndisFilterOnOpen(device_obj);
86 if (ret != 0) { 84 if (ret != 0) {
@@ -122,22 +120,20 @@ static void netvsc_xmit_completion(void *context)
122 struct hv_netvsc_packet *packet = (struct hv_netvsc_packet *)context; 120 struct hv_netvsc_packet *packet = (struct hv_netvsc_packet *)context;
123 struct sk_buff *skb = (struct sk_buff *) 121 struct sk_buff *skb = (struct sk_buff *)
124 (unsigned long)packet->Completion.Send.SendCompletionTid; 122 (unsigned long)packet->Completion.Send.SendCompletionTid;
125 struct net_device *net;
126 123
127 DPRINT_ENTER(NETVSC_DRV); 124 DPRINT_ENTER(NETVSC_DRV);
128 125
129 kfree(packet); 126 kfree(packet);
130 127
131 if (skb) { 128 if (skb) {
132 net = skb->dev; 129 struct net_device *net = skb->dev;
133 dev_kfree_skb_any(skb); 130 struct net_device_context *net_device_ctx = netdev_priv(net);
131 unsigned int num_pages = skb_shinfo(skb)->nr_frags + 2;
134 132
135 if (netif_queue_stopped(net)) { 133 dev_kfree_skb_any(skb);
136 DPRINT_INFO(NETVSC_DRV, "net device (%p) waking up...",
137 net);
138 134
139 netif_wake_queue(net); 135 if ((net_device_ctx->avail += num_pages) >= PACKET_PAGES_HIWATER)
140 } 136 netif_wake_queue(net);
141 } 137 }
142 138
143 DPRINT_EXIT(NETVSC_DRV); 139 DPRINT_EXIT(NETVSC_DRV);
@@ -152,65 +148,58 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
152 (struct netvsc_driver_context *)driver_ctx; 148 (struct netvsc_driver_context *)driver_ctx;
153 struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj; 149 struct netvsc_driver *net_drv_obj = &net_drv_ctx->drv_obj;
154 struct hv_netvsc_packet *packet; 150 struct hv_netvsc_packet *packet;
155 int i;
156 int ret; 151 int ret;
157 int num_frags; 152 unsigned int i, num_pages;
158 int retries = 0;
159 153
160 DPRINT_ENTER(NETVSC_DRV); 154 DPRINT_ENTER(NETVSC_DRV);
161 155
162 /* Support only 1 chain of frags */
163 ASSERT(skb_shinfo(skb)->frag_list == NULL);
164 ASSERT(skb->dev == net);
165
166 DPRINT_DBG(NETVSC_DRV, "xmit packet - len %d data_len %d", 156 DPRINT_DBG(NETVSC_DRV, "xmit packet - len %d data_len %d",
167 skb->len, skb->data_len); 157 skb->len, skb->data_len);
168 158
169 /* Add 1 for skb->data and any additional ones requested */ 159 /* Add 1 for skb->data and additional one for RNDIS */
170 num_frags = skb_shinfo(skb)->nr_frags + 1 + 160 num_pages = skb_shinfo(skb)->nr_frags + 1 + 1;
171 net_drv_obj->AdditionalRequestPageBufferCount; 161 if (num_pages > net_device_ctx->avail)
162 return NETDEV_TX_BUSY;
172 163
173 /* Allocate a netvsc packet based on # of frags. */ 164 /* Allocate a netvsc packet based on # of frags. */
174 packet = kzalloc(sizeof(struct hv_netvsc_packet) + 165 packet = kzalloc(sizeof(struct hv_netvsc_packet) +
175 (num_frags * sizeof(struct hv_page_buffer)) + 166 (num_pages * sizeof(struct hv_page_buffer)) +
176 net_drv_obj->RequestExtSize, GFP_ATOMIC); 167 net_drv_obj->RequestExtSize, GFP_ATOMIC);
177 if (!packet) { 168 if (!packet) {
169 /* out of memory, silently drop packet */
178 DPRINT_ERR(NETVSC_DRV, "unable to allocate hv_netvsc_packet"); 170 DPRINT_ERR(NETVSC_DRV, "unable to allocate hv_netvsc_packet");
179 return -1; 171
172 dev_kfree_skb(skb);
173 net->stats.tx_dropped++;
174 return NETDEV_TX_OK;
180 } 175 }
181 176
182 packet->Extension = (void *)(unsigned long)packet + 177 packet->Extension = (void *)(unsigned long)packet +
183 sizeof(struct hv_netvsc_packet) + 178 sizeof(struct hv_netvsc_packet) +
184 (num_frags * sizeof(struct hv_page_buffer)); 179 (num_pages * sizeof(struct hv_page_buffer));
185 180
186 /* Setup the rndis header */ 181 /* Setup the rndis header */
187 packet->PageBufferCount = num_frags; 182 packet->PageBufferCount = num_pages;
188 183
189 /* TODO: Flush all write buffers/ memory fence ??? */ 184 /* TODO: Flush all write buffers/ memory fence ??? */
190 /* wmb(); */ 185 /* wmb(); */
191 186
192 /* Initialize it from the skb */ 187 /* Initialize it from the skb */
193 ASSERT(skb->data);
194 packet->TotalDataBufferLength = skb->len; 188 packet->TotalDataBufferLength = skb->len;
195 189
196 /* 190 /* Start filling in the page buffers starting after RNDIS buffer. */
197 * Start filling in the page buffers starting at 191 packet->PageBuffers[1].Pfn = virt_to_phys(skb->data) >> PAGE_SHIFT;
198 * AdditionalRequestPageBufferCount offset 192 packet->PageBuffers[1].Offset
199 */ 193 = (unsigned long)skb->data & (PAGE_SIZE - 1);
200 packet->PageBuffers[net_drv_obj->AdditionalRequestPageBufferCount].Pfn = virt_to_phys(skb->data) >> PAGE_SHIFT; 194 packet->PageBuffers[1].Length = skb_headlen(skb);
201 packet->PageBuffers[net_drv_obj->AdditionalRequestPageBufferCount].Offset = (unsigned long)skb->data & (PAGE_SIZE - 1); 195
202 packet->PageBuffers[net_drv_obj->AdditionalRequestPageBufferCount].Length = skb->len - skb->data_len; 196 /* Additional fragments are after SKB data */
203 197 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
204 ASSERT((skb->len - skb->data_len) <= PAGE_SIZE); 198 skb_frag_t *f = &skb_shinfo(skb)->frags[i];
205 199
206 for (i = net_drv_obj->AdditionalRequestPageBufferCount + 1; 200 packet->PageBuffers[i+2].Pfn = page_to_pfn(f->page);
207 i < num_frags; i++) { 201 packet->PageBuffers[i+2].Offset = f->page_offset;
208 packet->PageBuffers[i].Pfn = 202 packet->PageBuffers[i+2].Length = f->size;
209 page_to_pfn(skb_shinfo(skb)->frags[i-(net_drv_obj->AdditionalRequestPageBufferCount+1)].page);
210 packet->PageBuffers[i].Offset =
211 skb_shinfo(skb)->frags[i-(net_drv_obj->AdditionalRequestPageBufferCount+1)].page_offset;
212 packet->PageBuffers[i].Length =
213 skb_shinfo(skb)->frags[i-(net_drv_obj->AdditionalRequestPageBufferCount+1)].size;
214 } 203 }
215 204
216 /* Set the completion routine */ 205 /* Set the completion routine */
@@ -218,55 +207,29 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
218 packet->Completion.Send.SendCompletionContext = packet; 207 packet->Completion.Send.SendCompletionContext = packet;
219 packet->Completion.Send.SendCompletionTid = (unsigned long)skb; 208 packet->Completion.Send.SendCompletionTid = (unsigned long)skb;
220 209
221retry_send:
222 ret = net_drv_obj->OnSend(&net_device_ctx->device_ctx->device_obj, 210 ret = net_drv_obj->OnSend(&net_device_ctx->device_ctx->device_obj,
223 packet); 211 packet);
224
225 if (ret == 0) { 212 if (ret == 0) {
226 ret = NETDEV_TX_OK; 213 net->stats.tx_bytes += skb->len;
227 net_device_ctx->stats.tx_bytes += skb->len; 214 net->stats.tx_packets++;
228 net_device_ctx->stats.tx_packets++;
229 } else {
230 retries++;
231 if (retries < 4) {
232 DPRINT_ERR(NETVSC_DRV, "unable to send..."
233 "retrying %d...", retries);
234 udelay(100);
235 goto retry_send;
236 }
237
238 /* no more room or we are shutting down */
239 DPRINT_ERR(NETVSC_DRV, "unable to send (%d)..."
240 "marking net device (%p) busy", ret, net);
241 DPRINT_INFO(NETVSC_DRV, "net device (%p) stopping", net);
242 215
243 ret = NETDEV_TX_BUSY; 216 DPRINT_DBG(NETVSC_DRV, "# of xmits %lu total size %lu",
244 net_device_ctx->stats.tx_dropped++; 217 net->stats.tx_packets,
218 net->stats.tx_bytes);
245 219
246 netif_stop_queue(net); 220 if ((net_device_ctx->avail -= num_pages) < PACKET_PAGES_LOWATER)
247 221 netif_stop_queue(net);
248 /* 222 } else {
249 * Null it since the caller will free it instead of the 223 /* we are shutting down or bus overloaded, just drop packet */
250 * completion routine 224 net->stats.tx_dropped++;
251 */ 225 netvsc_xmit_completion(packet);
252 packet->Completion.Send.SendCompletionTid = 0;
253
254 /*
255 * Release the resources since we will not get any send
256 * completion
257 */
258 netvsc_xmit_completion((void *)packet);
259 } 226 }
260 227
261 DPRINT_DBG(NETVSC_DRV, "# of xmits %lu total size %lu",
262 net_device_ctx->stats.tx_packets,
263 net_device_ctx->stats.tx_bytes);
264
265 DPRINT_EXIT(NETVSC_DRV); 228 DPRINT_EXIT(NETVSC_DRV);
266 return ret; 229 return NETDEV_TX_OK;
267} 230}
268 231
269/** 232/*
270 * netvsc_linkstatus_callback - Link up/down notification 233 * netvsc_linkstatus_callback - Link up/down notification
271 */ 234 */
272static void netvsc_linkstatus_callback(struct hv_device *device_obj, 235static void netvsc_linkstatus_callback(struct hv_device *device_obj,
@@ -293,18 +256,17 @@ static void netvsc_linkstatus_callback(struct hv_device *device_obj,
293 DPRINT_EXIT(NETVSC_DRV); 256 DPRINT_EXIT(NETVSC_DRV);
294} 257}
295 258
296/** 259/*
297 * netvsc_recv_callback - Callback when we receive a packet from the "wire" on the specified device. 260 * netvsc_recv_callback - Callback when we receive a packet from the
261 * "wire" on the specified device.
298 */ 262 */
299static int netvsc_recv_callback(struct hv_device *device_obj, 263static int netvsc_recv_callback(struct hv_device *device_obj,
300 struct hv_netvsc_packet *packet) 264 struct hv_netvsc_packet *packet)
301{ 265{
302 struct vm_device *device_ctx = to_vm_device(device_obj); 266 struct vm_device *device_ctx = to_vm_device(device_obj);
303 struct net_device *net = dev_get_drvdata(&device_ctx->device); 267 struct net_device *net = dev_get_drvdata(&device_ctx->device);
304 struct net_device_context *net_device_ctx;
305 struct sk_buff *skb; 268 struct sk_buff *skb;
306 void *data; 269 void *data;
307 int ret;
308 int i; 270 int i;
309 unsigned long flags; 271 unsigned long flags;
310 272
@@ -316,14 +278,12 @@ static int netvsc_recv_callback(struct hv_device *device_obj,
316 return 0; 278 return 0;
317 } 279 }
318 280
319 net_device_ctx = netdev_priv(net); 281 /* Allocate a skb - TODO direct I/O to pages? */
320 282 skb = netdev_alloc_skb_ip_align(net, packet->TotalDataBufferLength);
321 /* Allocate a skb - TODO preallocate this */ 283 if (unlikely(!skb)) {
322 /* Pad 2-bytes to align IP header to 16 bytes */ 284 ++net->stats.rx_dropped;
323 skb = dev_alloc_skb(packet->TotalDataBufferLength + 2); 285 return 0;
324 ASSERT(skb); 286 }
325 skb_reserve(skb, 2);
326 skb->dev = net;
327 287
328 /* for kmap_atomic */ 288 /* for kmap_atomic */
329 local_irq_save(flags); 289 local_irq_save(flags);
@@ -348,39 +308,45 @@ static int netvsc_recv_callback(struct hv_device *device_obj,
348 local_irq_restore(flags); 308 local_irq_restore(flags);
349 309
350 skb->protocol = eth_type_trans(skb, net); 310 skb->protocol = eth_type_trans(skb, net);
351
352 skb->ip_summed = CHECKSUM_NONE; 311 skb->ip_summed = CHECKSUM_NONE;
353 312
313 net->stats.rx_packets++;
314 net->stats.rx_bytes += skb->len;
315
354 /* 316 /*
355 * Pass the skb back up. Network stack will deallocate the skb when it 317 * Pass the skb back up. Network stack will deallocate the skb when it
356 * is done 318 * is done.
319 * TODO - use NAPI?
357 */ 320 */
358 ret = netif_rx(skb); 321 netif_rx(skb);
359
360 switch (ret) {
361 case NET_RX_DROP:
362 net_device_ctx->stats.rx_dropped++;
363 break;
364 default:
365 net_device_ctx->stats.rx_packets++;
366 net_device_ctx->stats.rx_bytes += skb->len;
367 break;
368 322
369 }
370 DPRINT_DBG(NETVSC_DRV, "# of recvs %lu total size %lu", 323 DPRINT_DBG(NETVSC_DRV, "# of recvs %lu total size %lu",
371 net_device_ctx->stats.rx_packets, 324 net->stats.rx_packets, net->stats.rx_bytes);
372 net_device_ctx->stats.rx_bytes);
373 325
374 DPRINT_EXIT(NETVSC_DRV); 326 DPRINT_EXIT(NETVSC_DRV);
375 327
376 return 0; 328 return 0;
377} 329}
378 330
331static void netvsc_get_drvinfo(struct net_device *net,
332 struct ethtool_drvinfo *info)
333{
334 strcpy(info->driver, "hv_netvsc");
335 strcpy(info->version, HV_DRV_VERSION);
336 strcpy(info->fw_version, "N/A");
337}
338
339static const struct ethtool_ops ethtool_ops = {
340 .get_drvinfo = netvsc_get_drvinfo,
341 .get_sg = ethtool_op_get_sg,
342 .set_sg = ethtool_op_set_sg,
343 .get_link = ethtool_op_get_link,
344};
345
379static const struct net_device_ops device_ops = { 346static const struct net_device_ops device_ops = {
380 .ndo_open = netvsc_open, 347 .ndo_open = netvsc_open,
381 .ndo_stop = netvsc_close, 348 .ndo_stop = netvsc_close,
382 .ndo_start_xmit = netvsc_start_xmit, 349 .ndo_start_xmit = netvsc_start_xmit,
383 .ndo_get_stats = netvsc_get_stats,
384 .ndo_set_multicast_list = netvsc_set_multicast_list, 350 .ndo_set_multicast_list = netvsc_set_multicast_list,
385}; 351};
386 352
@@ -413,6 +379,7 @@ static int netvsc_probe(struct device *device)
413 379
414 net_device_ctx = netdev_priv(net); 380 net_device_ctx = netdev_priv(net);
415 net_device_ctx->device_ctx = device_ctx; 381 net_device_ctx->device_ctx = device_ctx;
382 net_device_ctx->avail = ring_size;
416 dev_set_drvdata(device, net); 383 dev_set_drvdata(device, net);
417 384
418 /* Notify the netvsc driver of the new device */ 385 /* Notify the netvsc driver of the new device */
@@ -442,6 +409,10 @@ static int netvsc_probe(struct device *device)
442 409
443 net->netdev_ops = &device_ops; 410 net->netdev_ops = &device_ops;
444 411
412 /* TODO: Add GSO and Checksum offload */
413 net->features = NETIF_F_SG;
414
415 SET_ETHTOOL_OPS(net, &ethtool_ops);
445 SET_NETDEV_DEV(net, device); 416 SET_NETDEV_DEV(net, device);
446 417
447 ret = register_netdev(net); 418 ret = register_netdev(net);
@@ -559,7 +530,7 @@ static int netvsc_drv_init(int (*drv_init)(struct hv_driver *drv))
559 530
560 vmbus_get_interface(&net_drv_obj->Base.VmbusChannelInterface); 531 vmbus_get_interface(&net_drv_obj->Base.VmbusChannelInterface);
561 532
562 net_drv_obj->RingBufferSize = netvsc_ringbuffer_size; 533 net_drv_obj->RingBufferSize = ring_size * PAGE_SIZE;
563 net_drv_obj->OnReceiveCallback = netvsc_recv_callback; 534 net_drv_obj->OnReceiveCallback = netvsc_recv_callback;
564 net_drv_obj->OnLinkStatusChanged = netvsc_linkstatus_callback; 535 net_drv_obj->OnLinkStatusChanged = netvsc_linkstatus_callback;
565 536
@@ -581,6 +552,20 @@ static int netvsc_drv_init(int (*drv_init)(struct hv_driver *drv))
581 return ret; 552 return ret;
582} 553}
583 554
555static const struct dmi_system_id __initconst
556hv_netvsc_dmi_table[] __maybe_unused = {
557 {
558 .ident = "Hyper-V",
559 .matches = {
560 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
561 DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"),
562 DMI_MATCH(DMI_BOARD_NAME, "Virtual Machine"),
563 },
564 },
565 { },
566};
567MODULE_DEVICE_TABLE(dmi, hv_netvsc_dmi_table);
568
584static int __init netvsc_init(void) 569static int __init netvsc_init(void)
585{ 570{
586 int ret; 571 int ret;
@@ -588,6 +573,9 @@ static int __init netvsc_init(void)
588 DPRINT_ENTER(NETVSC_DRV); 573 DPRINT_ENTER(NETVSC_DRV);
589 DPRINT_INFO(NETVSC_DRV, "Netvsc initializing...."); 574 DPRINT_INFO(NETVSC_DRV, "Netvsc initializing....");
590 575
576 if (!dmi_check_system(hv_netvsc_dmi_table))
577 return -ENODEV;
578
591 ret = netvsc_drv_init(NetVscInitialize); 579 ret = netvsc_drv_init(NetVscInitialize);
592 580
593 DPRINT_EXIT(NETVSC_DRV); 581 DPRINT_EXIT(NETVSC_DRV);
@@ -602,9 +590,16 @@ static void __exit netvsc_exit(void)
602 DPRINT_EXIT(NETVSC_DRV); 590 DPRINT_EXIT(NETVSC_DRV);
603} 591}
604 592
593static const struct pci_device_id __initconst
594hv_netvsc_pci_table[] __maybe_unused = {
595 { PCI_DEVICE(0x1414, 0x5353) }, /* VGA compatible controller */
596 { 0 }
597};
598MODULE_DEVICE_TABLE(pci, hv_netvsc_pci_table);
599
605MODULE_LICENSE("GPL"); 600MODULE_LICENSE("GPL");
606MODULE_VERSION(HV_DRV_VERSION); 601MODULE_VERSION(HV_DRV_VERSION);
607module_param(netvsc_ringbuffer_size, int, S_IRUGO); 602MODULE_DESCRIPTION("Microsoft Hyper-V network driver");
608 603
609module_init(netvsc_init); 604module_init(netvsc_init);
610module_exit(netvsc_exit); 605module_exit(netvsc_exit);
diff --git a/drivers/staging/hv/osd.c b/drivers/staging/hv/osd.c
index 9aea31067295..8c3eb278a81f 100644
--- a/drivers/staging/hv/osd.c
+++ b/drivers/staging/hv/osd.c
@@ -59,6 +59,15 @@ void *osd_VirtualAllocExec(unsigned int size)
59#endif 59#endif
60} 60}
61 61
62/**
63 * osd_PageAlloc() - Allocate pages
64 * @count: Total number of Kernel pages you want to allocate
65 *
66 * Tries to allocate @count number of consecutive free kernel pages.
67 * And if successful, it will set the pages to 0 before returning.
68 * If successfull it will return pointer to the @count pages.
69 * Mainly used by Hyper-V drivers.
70 */
62void *osd_PageAlloc(unsigned int count) 71void *osd_PageAlloc(unsigned int count)
63{ 72{
64 void *p; 73 void *p;
@@ -78,6 +87,14 @@ void *osd_PageAlloc(unsigned int count)
78} 87}
79EXPORT_SYMBOL_GPL(osd_PageAlloc); 88EXPORT_SYMBOL_GPL(osd_PageAlloc);
80 89
90/**
91 * osd_PageFree() - Free pages
92 * @page: Pointer to the first page to be freed
93 * @count: Total number of Kernel pages you free
94 *
95 * Frees the pages allocated by osd_PageAlloc()
96 * Mainly used by Hyper-V drivers.
97 */
81void osd_PageFree(void *page, unsigned int count) 98void osd_PageFree(void *page, unsigned int count)
82{ 99{
83 free_pages((unsigned long)page, get_order(count * PAGE_SIZE)); 100 free_pages((unsigned long)page, get_order(count * PAGE_SIZE));
@@ -86,6 +103,17 @@ void osd_PageFree(void *page, unsigned int count)
86} 103}
87EXPORT_SYMBOL_GPL(osd_PageFree); 104EXPORT_SYMBOL_GPL(osd_PageFree);
88 105
106/**
107 * osd_WaitEventCreate() - Create the event queue
108 *
109 * Allocates memory for a &struct osd_waitevent. And then calls
110 * init_waitqueue_head to set up the wait queue for the event.
111 * This structure is usually part of a another structure that contains
112 * the actual Hyper-V device driver structure.
113 *
114 * Returns pointer to &struct osd_waitevent
115 * Mainly used by Hyper-V drivers.
116 */
89struct osd_waitevent *osd_WaitEventCreate(void) 117struct osd_waitevent *osd_WaitEventCreate(void)
90{ 118{
91 struct osd_waitevent *wait = kmalloc(sizeof(struct osd_waitevent), 119 struct osd_waitevent *wait = kmalloc(sizeof(struct osd_waitevent),
@@ -99,6 +127,19 @@ struct osd_waitevent *osd_WaitEventCreate(void)
99} 127}
100EXPORT_SYMBOL_GPL(osd_WaitEventCreate); 128EXPORT_SYMBOL_GPL(osd_WaitEventCreate);
101 129
130
131/**
132 * osd_WaitEventSet() - Wake up the process
133 * @waitEvent: Structure to event to be woken up
134 *
135 * @waitevent is of type &struct osd_waitevent
136 *
137 * Wake up the sleeping process so it can do some work.
138 * And set condition indicator in &struct osd_waitevent to indicate
139 * the process is in a woken state.
140 *
141 * Only used by Network and Storage Hyper-V drivers.
142 */
102void osd_WaitEventSet(struct osd_waitevent *waitEvent) 143void osd_WaitEventSet(struct osd_waitevent *waitEvent)
103{ 144{
104 waitEvent->condition = 1; 145 waitEvent->condition = 1;
@@ -106,6 +147,20 @@ void osd_WaitEventSet(struct osd_waitevent *waitEvent)
106} 147}
107EXPORT_SYMBOL_GPL(osd_WaitEventSet); 148EXPORT_SYMBOL_GPL(osd_WaitEventSet);
108 149
150/**
151 * osd_WaitEventWait() - Wait for event till condition is true
152 * @waitEvent: Structure to event to be put to sleep
153 *
154 * @waitevent is of type &struct osd_waitevent
155 *
156 * Set up the process to sleep until waitEvent->condition get true.
157 * And set condition indicator in &struct osd_waitevent to indicate
158 * the process is in a sleeping state.
159 *
160 * Returns the status of 'wait_event_interruptible()' system call
161 *
162 * Mainly used by Hyper-V drivers.
163 */
109int osd_WaitEventWait(struct osd_waitevent *waitEvent) 164int osd_WaitEventWait(struct osd_waitevent *waitEvent)
110{ 165{
111 int ret = 0; 166 int ret = 0;
@@ -117,6 +172,21 @@ int osd_WaitEventWait(struct osd_waitevent *waitEvent)
117} 172}
118EXPORT_SYMBOL_GPL(osd_WaitEventWait); 173EXPORT_SYMBOL_GPL(osd_WaitEventWait);
119 174
175/**
176 * osd_WaitEventWaitEx() - Wait for event or timeout for process wakeup
177 * @waitEvent: Structure to event to be put to sleep
178 * @TimeoutInMs: Total number of Milliseconds to wait before waking up
179 *
180 * @waitevent is of type &struct osd_waitevent
181 * Set up the process to sleep until @waitEvent->condition get true or
182 * @TimeoutInMs (Time out in Milliseconds) has been reached.
183 * And set condition indicator in &struct osd_waitevent to indicate
184 * the process is in a sleeping state.
185 *
186 * Returns the status of 'wait_event_interruptible_timeout()' system call
187 *
188 * Mainly used by Hyper-V drivers.
189 */
120int osd_WaitEventWaitEx(struct osd_waitevent *waitEvent, u32 TimeoutInMs) 190int osd_WaitEventWaitEx(struct osd_waitevent *waitEvent, u32 TimeoutInMs)
121{ 191{
122 int ret = 0; 192 int ret = 0;
diff --git a/drivers/staging/hv/RingBuffer.c b/drivers/staging/hv/ring_buffer.c
index 80b8a2c7784f..ae2a10e24d92 100644
--- a/drivers/staging/hv/RingBuffer.c
+++ b/drivers/staging/hv/ring_buffer.c
@@ -25,14 +25,14 @@
25#include <linux/mm.h> 25#include <linux/mm.h>
26#include "osd.h" 26#include "osd.h"
27#include "logging.h" 27#include "logging.h"
28#include "RingBuffer.h" 28#include "ring_buffer.h"
29 29
30 30
31/* #defines */ 31/* #defines */
32 32
33 33
34/* Amount of space to write to */ 34/* Amount of space to write to */
35#define BYTES_AVAIL_TO_WRITE(r, w, z) ((w) >= (r))?((z) - ((w) - (r))):((r) - (w)) 35#define BYTES_AVAIL_TO_WRITE(r, w, z) ((w) >= (r)) ? ((z) - ((w) - (r))) : ((r) - (w))
36 36
37 37
38/*++ 38/*++
@@ -72,7 +72,7 @@ GetNextWriteLocation(RING_BUFFER_INFO *RingInfo)
72{ 72{
73 u32 next = RingInfo->RingBuffer->WriteIndex; 73 u32 next = RingInfo->RingBuffer->WriteIndex;
74 74
75 ASSERT(next < RingInfo->RingDataSize); 75 /* ASSERT(next < RingInfo->RingDataSize); */
76 76
77 return next; 77 return next;
78} 78}
@@ -106,7 +106,7 @@ GetNextReadLocation(RING_BUFFER_INFO *RingInfo)
106{ 106{
107 u32 next = RingInfo->RingBuffer->ReadIndex; 107 u32 next = RingInfo->RingBuffer->ReadIndex;
108 108
109 ASSERT(next < RingInfo->RingDataSize); 109 /* ASSERT(next < RingInfo->RingDataSize); */
110 110
111 return next; 111 return next;
112} 112}
@@ -126,7 +126,7 @@ GetNextReadLocationWithOffset(RING_BUFFER_INFO *RingInfo, u32 Offset)
126{ 126{
127 u32 next = RingInfo->RingBuffer->ReadIndex; 127 u32 next = RingInfo->RingBuffer->ReadIndex;
128 128
129 ASSERT(next < RingInfo->RingDataSize); 129 /* ASSERT(next < RingInfo->RingDataSize); */
130 next += Offset; 130 next += Offset;
131 next %= RingInfo->RingDataSize; 131 next %= RingInfo->RingDataSize;
132 132
@@ -301,7 +301,8 @@ Description:
301--*/ 301--*/
302int RingBufferInit(RING_BUFFER_INFO *RingInfo, void *Buffer, u32 BufferLen) 302int RingBufferInit(RING_BUFFER_INFO *RingInfo, void *Buffer, u32 BufferLen)
303{ 303{
304 ASSERT(sizeof(RING_BUFFER) == PAGE_SIZE); 304 if (sizeof(RING_BUFFER) != PAGE_SIZE)
305 return -EINVAL;
305 306
306 memset(RingInfo, 0, sizeof(RING_BUFFER_INFO)); 307 memset(RingInfo, 0, sizeof(RING_BUFFER_INFO));
307 308
@@ -489,7 +490,8 @@ int RingBufferRead(RING_BUFFER_INFO *InRingInfo, void *Buffer,
489 u64 prevIndices = 0; 490 u64 prevIndices = 0;
490 unsigned long flags; 491 unsigned long flags;
491 492
492 ASSERT(BufferLen > 0); 493 if (BufferLen <= 0)
494 return -EINVAL;
493 495
494 spin_lock_irqsave(&InRingInfo->ring_lock, flags); 496 spin_lock_irqsave(&InRingInfo->ring_lock, flags);
495 497
diff --git a/drivers/staging/hv/RingBuffer.h b/drivers/staging/hv/ring_buffer.h
index 6202157e145d..6202157e145d 100644
--- a/drivers/staging/hv/RingBuffer.h
+++ b/drivers/staging/hv/ring_buffer.h
diff --git a/drivers/staging/hv/rndis.h b/drivers/staging/hv/rndis.h
index 7c73277c1f9a..723e1f15b90d 100644
--- a/drivers/staging/hv/rndis.h
+++ b/drivers/staging/hv/rndis.h
@@ -622,7 +622,7 @@ struct rndis_message {
622/* get the size of an RNDIS message. Pass in the message type, */ 622/* get the size of an RNDIS message. Pass in the message type, */
623/* struct rndis_set_request, struct rndis_packet for example */ 623/* struct rndis_set_request, struct rndis_packet for example */
624#define RNDIS_MESSAGE_SIZE(Message) \ 624#define RNDIS_MESSAGE_SIZE(Message) \
625 (sizeof(Message) + (sizeof(struct rndis_message) - \ 625 (sizeof(Message) + (sizeof(struct rndis_message) - \
626 sizeof(union rndis_message_container))) 626 sizeof(union rndis_message_container)))
627 627
628/* get pointer to info buffer with message pointer */ 628/* get pointer to info buffer with message pointer */
diff --git a/drivers/staging/hv/RndisFilter.c b/drivers/staging/hv/rndis_filter.c
index 6704f64c93f0..5edf0853c6af 100644
--- a/drivers/staging/hv/RndisFilter.c
+++ b/drivers/staging/hv/rndis_filter.c
@@ -22,10 +22,12 @@
22#include <linux/highmem.h> 22#include <linux/highmem.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/if_ether.h>
26
25#include "osd.h" 27#include "osd.h"
26#include "logging.h" 28#include "logging.h"
27#include "NetVscApi.h" 29#include "netvsc_api.h"
28#include "RndisFilter.h" 30#include "rndis_filter.h"
29 31
30/* Data types */ 32/* Data types */
31struct rndis_filter_driver_object { 33struct rndis_filter_driver_object {
@@ -50,7 +52,7 @@ struct rndis_device {
50 spinlock_t request_lock; 52 spinlock_t request_lock;
51 struct list_head RequestList; 53 struct list_head RequestList;
52 54
53 unsigned char HwMacAddr[HW_MACADDR_LEN]; 55 unsigned char HwMacAddr[ETH_ALEN];
54}; 56};
55 57
56struct rndis_request { 58struct rndis_request {
@@ -354,8 +356,8 @@ static void RndisFilterReceiveData(struct rndis_device *Device,
354 DPRINT_ENTER(NETVSC); 356 DPRINT_ENTER(NETVSC);
355 357
356 /* empty ethernet frame ?? */ 358 /* empty ethernet frame ?? */
357 ASSERT(Packet->PageBuffers[0].Length > 359 /* ASSERT(Packet->PageBuffers[0].Length > */
358 RNDIS_MESSAGE_SIZE(struct rndis_packet)); 360 /* RNDIS_MESSAGE_SIZE(struct rndis_packet)); */
359 361
360 rndisPacket = &Message->Message.Packet; 362 rndisPacket = &Message->Message.Packet;
361 363
@@ -389,7 +391,9 @@ static int RndisFilterOnReceive(struct hv_device *Device,
389 391
390 DPRINT_ENTER(NETVSC); 392 DPRINT_ENTER(NETVSC);
391 393
392 ASSERT(netDevice); 394 if (!netDevice)
395 return -EINVAL;
396
393 /* Make sure the rndis device state is initialized */ 397 /* Make sure the rndis device state is initialized */
394 if (!netDevice->Extension) { 398 if (!netDevice->Extension) {
395 DPRINT_ERR(NETVSC, "got rndis message but no rndis device..." 399 DPRINT_ERR(NETVSC, "got rndis message but no rndis device..."
@@ -490,7 +494,8 @@ static int RndisFilterQueryDevice(struct rndis_device *Device, u32 Oid,
490 494
491 DPRINT_ENTER(NETVSC); 495 DPRINT_ENTER(NETVSC);
492 496
493 ASSERT(Result); 497 if (!Result)
498 return -EINVAL;
494 499
495 *ResultSize = 0; 500 *ResultSize = 0;
496 request = GetRndisRequest(Device, REMOTE_NDIS_QUERY_MSG, 501 request = GetRndisRequest(Device, REMOTE_NDIS_QUERY_MSG,
@@ -538,7 +543,7 @@ Cleanup:
538 543
539static int RndisFilterQueryDeviceMac(struct rndis_device *Device) 544static int RndisFilterQueryDeviceMac(struct rndis_device *Device)
540{ 545{
541 u32 size = HW_MACADDR_LEN; 546 u32 size = ETH_ALEN;
542 547
543 return RndisFilterQueryDevice(Device, 548 return RndisFilterQueryDevice(Device,
544 RNDIS_OID_802_3_PERMANENT_ADDRESS, 549 RNDIS_OID_802_3_PERMANENT_ADDRESS,
@@ -565,8 +570,8 @@ static int RndisFilterSetPacketFilter(struct rndis_device *Device,
565 570
566 DPRINT_ENTER(NETVSC); 571 DPRINT_ENTER(NETVSC);
567 572
568 ASSERT(RNDIS_MESSAGE_SIZE(struct rndis_set_request) + sizeof(u32) <= 573 /* ASSERT(RNDIS_MESSAGE_SIZE(struct rndis_set_request) + sizeof(u32) <= */
569 sizeof(struct rndis_message)); 574 /* sizeof(struct rndis_message)); */
570 575
571 request = GetRndisRequest(Device, REMOTE_NDIS_SET_MSG, 576 request = GetRndisRequest(Device, REMOTE_NDIS_SET_MSG,
572 RNDIS_MESSAGE_SIZE(struct rndis_set_request) + 577 RNDIS_MESSAGE_SIZE(struct rndis_set_request) +
@@ -622,7 +627,6 @@ int RndisFilterInit(struct netvsc_driver *Driver)
622 sizeof(struct rndis_filter_packet)); 627 sizeof(struct rndis_filter_packet));
623 628
624 Driver->RequestExtSize = sizeof(struct rndis_filter_packet); 629 Driver->RequestExtSize = sizeof(struct rndis_filter_packet);
625 Driver->AdditionalRequestPageBufferCount = 1; /* For rndis header */
626 630
627 /* Driver->Context = rndisDriver; */ 631 /* Driver->Context = rndisDriver; */
628 632
@@ -639,8 +643,8 @@ int RndisFilterInit(struct netvsc_driver *Driver)
639 Driver->Base.OnDeviceRemove; 643 Driver->Base.OnDeviceRemove;
640 gRndisFilter.InnerDriver.Base.OnCleanup = Driver->Base.OnCleanup; 644 gRndisFilter.InnerDriver.Base.OnCleanup = Driver->Base.OnCleanup;
641 645
642 ASSERT(Driver->OnSend); 646 /* ASSERT(Driver->OnSend); */
643 ASSERT(Driver->OnReceiveCallback); 647 /* ASSERT(Driver->OnReceiveCallback); */
644 gRndisFilter.InnerDriver.OnSend = Driver->OnSend; 648 gRndisFilter.InnerDriver.OnSend = Driver->OnSend;
645 gRndisFilter.InnerDriver.OnReceiveCallback = Driver->OnReceiveCallback; 649 gRndisFilter.InnerDriver.OnReceiveCallback = Driver->OnReceiveCallback;
646 gRndisFilter.InnerDriver.OnLinkStatusChanged = 650 gRndisFilter.InnerDriver.OnLinkStatusChanged =
@@ -811,8 +815,8 @@ static int RndisFilterOnDeviceAdd(struct hv_device *Device,
811 815
812 /* Initialize the rndis device */ 816 /* Initialize the rndis device */
813 netDevice = Device->Extension; 817 netDevice = Device->Extension;
814 ASSERT(netDevice); 818 /* ASSERT(netDevice); */
815 ASSERT(netDevice->Device); 819 /* ASSERT(netDevice->Device); */
816 820
817 netDevice->Extension = rndisDevice; 821 netDevice->Extension = rndisDevice;
818 rndisDevice->NetDevice = netDevice; 822 rndisDevice->NetDevice = netDevice;
@@ -834,16 +838,10 @@ static int RndisFilterOnDeviceAdd(struct hv_device *Device,
834 */ 838 */
835 } 839 }
836 840
837 DPRINT_INFO(NETVSC, "Device 0x%p mac addr %02x%02x%02x%02x%02x%02x", 841 DPRINT_INFO(NETVSC, "Device 0x%p mac addr %pM",
838 rndisDevice, 842 rndisDevice, rndisDevice->HwMacAddr);
839 rndisDevice->HwMacAddr[0],
840 rndisDevice->HwMacAddr[1],
841 rndisDevice->HwMacAddr[2],
842 rndisDevice->HwMacAddr[3],
843 rndisDevice->HwMacAddr[4],
844 rndisDevice->HwMacAddr[5]);
845 843
846 memcpy(deviceInfo->MacAddr, rndisDevice->HwMacAddr, HW_MACADDR_LEN); 844 memcpy(deviceInfo->MacAddr, rndisDevice->HwMacAddr, ETH_ALEN);
847 845
848 RndisFilterQueryDeviceLinkStatus(rndisDevice); 846 RndisFilterQueryDeviceLinkStatus(rndisDevice);
849 847
@@ -891,7 +889,9 @@ int RndisFilterOnOpen(struct hv_device *Device)
891 889
892 DPRINT_ENTER(NETVSC); 890 DPRINT_ENTER(NETVSC);
893 891
894 ASSERT(netDevice); 892 if (!netDevice)
893 return -EINVAL;
894
895 ret = RndisFilterOpenDevice(netDevice->Extension); 895 ret = RndisFilterOpenDevice(netDevice->Extension);
896 896
897 DPRINT_EXIT(NETVSC); 897 DPRINT_EXIT(NETVSC);
@@ -906,7 +906,9 @@ int RndisFilterOnClose(struct hv_device *Device)
906 906
907 DPRINT_ENTER(NETVSC); 907 DPRINT_ENTER(NETVSC);
908 908
909 ASSERT(netDevice); 909 if (!netDevice)
910 return -EINVAL;
911
910 ret = RndisFilterCloseDevice(netDevice->Extension); 912 ret = RndisFilterCloseDevice(netDevice->Extension);
911 913
912 DPRINT_EXIT(NETVSC); 914 DPRINT_EXIT(NETVSC);
@@ -927,7 +929,7 @@ static int RndisFilterOnSend(struct hv_device *Device,
927 929
928 /* Add the rndis header */ 930 /* Add the rndis header */
929 filterPacket = (struct rndis_filter_packet *)Packet->Extension; 931 filterPacket = (struct rndis_filter_packet *)Packet->Extension;
930 ASSERT(filterPacket); 932 /* ASSERT(filterPacket); */
931 933
932 memset(filterPacket, 0, sizeof(struct rndis_filter_packet)); 934 memset(filterPacket, 0, sizeof(struct rndis_filter_packet));
933 935
diff --git a/drivers/staging/hv/RndisFilter.h b/drivers/staging/hv/rndis_filter.h
index fa7dd79ddebf..764b9bf3e5dc 100644
--- a/drivers/staging/hv/RndisFilter.h
+++ b/drivers/staging/hv/rndis_filter.h
@@ -27,7 +27,7 @@
27 27
28#define __struct_bcount(x) 28#define __struct_bcount(x)
29 29
30#include "NetVsc.h" 30#include "netvsc.h"
31 31
32#include "rndis.h" 32#include "rndis.h"
33 33
diff --git a/drivers/staging/hv/StorVsc.c b/drivers/staging/hv/storvsc.c
index e426a23ca537..27a276e08ee9 100644
--- a/drivers/staging/hv/StorVsc.c
+++ b/drivers/staging/hv/storvsc.c
@@ -25,8 +25,8 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include "osd.h" 26#include "osd.h"
27#include "logging.h" 27#include "logging.h"
28#include "StorVscApi.h" 28#include "storvsc_api.h"
29#include "VmbusPacketFormat.h" 29#include "vmbus_packet_format.h"
30#include "vstorage.h" 30#include "vstorage.h"
31 31
32 32
@@ -100,7 +100,7 @@ static inline struct storvsc_device *AllocStorDevice(struct hv_device *Device)
100 100
101static inline void FreeStorDevice(struct storvsc_device *Device) 101static inline void FreeStorDevice(struct storvsc_device *Device)
102{ 102{
103 ASSERT(atomic_read(&Device->RefCount) == 0); 103 /* ASSERT(atomic_read(&Device->RefCount) == 0); */
104 kfree(Device); 104 kfree(Device);
105} 105}
106 106
@@ -137,10 +137,10 @@ static inline void PutStorDevice(struct hv_device *Device)
137 struct storvsc_device *storDevice; 137 struct storvsc_device *storDevice;
138 138
139 storDevice = (struct storvsc_device *)Device->Extension; 139 storDevice = (struct storvsc_device *)Device->Extension;
140 ASSERT(storDevice); 140 /* ASSERT(storDevice); */
141 141
142 atomic_dec(&storDevice->RefCount); 142 atomic_dec(&storDevice->RefCount);
143 ASSERT(atomic_read(&storDevice->RefCount)); 143 /* ASSERT(atomic_read(&storDevice->RefCount)); */
144} 144}
145 145
146/* Drop ref count to 1 to effectively disable GetStorDevice() */ 146/* Drop ref count to 1 to effectively disable GetStorDevice() */
@@ -149,7 +149,7 @@ static inline struct storvsc_device *ReleaseStorDevice(struct hv_device *Device)
149 struct storvsc_device *storDevice; 149 struct storvsc_device *storDevice;
150 150
151 storDevice = (struct storvsc_device *)Device->Extension; 151 storDevice = (struct storvsc_device *)Device->Extension;
152 ASSERT(storDevice); 152 /* ASSERT(storDevice); */
153 153
154 /* Busy wait until the ref drop to 2, then set it to 1 */ 154 /* Busy wait until the ref drop to 2, then set it to 1 */
155 while (atomic_cmpxchg(&storDevice->RefCount, 2, 1) != 2) 155 while (atomic_cmpxchg(&storDevice->RefCount, 2, 1) != 2)
@@ -165,7 +165,7 @@ static inline struct storvsc_device *FinalReleaseStorDevice(
165 struct storvsc_device *storDevice; 165 struct storvsc_device *storDevice;
166 166
167 storDevice = (struct storvsc_device *)Device->Extension; 167 storDevice = (struct storvsc_device *)Device->Extension;
168 ASSERT(storDevice); 168 /* ASSERT(storDevice); */
169 169
170 /* Busy wait until the ref drop to 1, then set it to 0 */ 170 /* Busy wait until the ref drop to 1, then set it to 0 */
171 while (atomic_cmpxchg(&storDevice->RefCount, 1, 0) != 1) 171 while (atomic_cmpxchg(&storDevice->RefCount, 1, 0) != 1)
@@ -199,6 +199,10 @@ static int StorVscChannelInit(struct hv_device *Device)
199 */ 199 */
200 memset(request, 0, sizeof(struct storvsc_request_extension)); 200 memset(request, 0, sizeof(struct storvsc_request_extension));
201 request->WaitEvent = osd_WaitEventCreate(); 201 request->WaitEvent = osd_WaitEventCreate();
202 if (!request->WaitEvent) {
203 ret = -ENOMEM;
204 goto nomem;
205 }
202 206
203 vstorPacket->Operation = VStorOperationBeginInitialization; 207 vstorPacket->Operation = VStorOperationBeginInitialization;
204 vstorPacket->Flags = REQUEST_COMPLETION_FLAG; 208 vstorPacket->Flags = REQUEST_COMPLETION_FLAG;
@@ -338,7 +342,7 @@ static int StorVscChannelInit(struct hv_device *Device)
338Cleanup: 342Cleanup:
339 kfree(request->WaitEvent); 343 kfree(request->WaitEvent);
340 request->WaitEvent = NULL; 344 request->WaitEvent = NULL;
341 345nomem:
342 PutStorDevice(Device); 346 PutStorDevice(Device);
343 347
344 DPRINT_EXIT(STORVSC); 348 DPRINT_EXIT(STORVSC);
@@ -366,12 +370,12 @@ static void StorVscOnIOCompletion(struct hv_device *Device,
366 "completed bytes xfer %u", RequestExt, 370 "completed bytes xfer %u", RequestExt,
367 VStorPacket->VmSrb.DataTransferLength); 371 VStorPacket->VmSrb.DataTransferLength);
368 372
369 ASSERT(RequestExt != NULL); 373 /* ASSERT(RequestExt != NULL); */
370 ASSERT(RequestExt->Request != NULL); 374 /* ASSERT(RequestExt->Request != NULL); */
371 375
372 request = RequestExt->Request; 376 request = RequestExt->Request;
373 377
374 ASSERT(request->OnIOCompletion != NULL); 378 /* ASSERT(request->OnIOCompletion != NULL); */
375 379
376 /* Copy over the status...etc */ 380 /* Copy over the status...etc */
377 request->Status = VStorPacket->VmSrb.ScsiStatus; 381 request->Status = VStorPacket->VmSrb.ScsiStatus;
@@ -391,8 +395,8 @@ static void StorVscOnIOCompletion(struct hv_device *Device,
391 "valid - len %d\n", RequestExt, 395 "valid - len %d\n", RequestExt,
392 VStorPacket->VmSrb.SenseInfoLength); 396 VStorPacket->VmSrb.SenseInfoLength);
393 397
394 ASSERT(VStorPacket->VmSrb.SenseInfoLength <= 398 /* ASSERT(VStorPacket->VmSrb.SenseInfoLength <= */
395 request->SenseBufferSize); 399 /* request->SenseBufferSize); */
396 memcpy(request->SenseBuffer, 400 memcpy(request->SenseBuffer,
397 VStorPacket->VmSrb.SenseData, 401 VStorPacket->VmSrb.SenseData,
398 VStorPacket->VmSrb.SenseInfoLength); 402 VStorPacket->VmSrb.SenseInfoLength);
@@ -447,7 +451,7 @@ static void StorVscOnChannelCallback(void *context)
447 451
448 DPRINT_ENTER(STORVSC); 452 DPRINT_ENTER(STORVSC);
449 453
450 ASSERT(device); 454 /* ASSERT(device); */
451 455
452 storDevice = MustGetStorDevice(device); 456 storDevice = MustGetStorDevice(device);
453 if (!storDevice) { 457 if (!storDevice) {
@@ -470,7 +474,7 @@ static void StorVscOnChannelCallback(void *context)
470 474
471 request = (struct storvsc_request_extension *) 475 request = (struct storvsc_request_extension *)
472 (unsigned long)requestId; 476 (unsigned long)requestId;
473 ASSERT(request); 477 /* ASSERT(request);c */
474 478
475 /* if (vstorPacket.Flags & SYNTHETIC_FLAG) */ 479 /* if (vstorPacket.Flags & SYNTHETIC_FLAG) */
476 if ((request == &storDevice->InitRequest) || 480 if ((request == &storDevice->InitRequest) ||
@@ -533,7 +537,7 @@ static int StorVscConnectToVsp(struct hv_device *Device)
533 return ret; 537 return ret;
534} 538}
535 539
536/** 540/*
537 * StorVscOnDeviceAdd - Callback when the device belonging to this driver is added 541 * StorVscOnDeviceAdd - Callback when the device belonging to this driver is added
538 */ 542 */
539static int StorVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo) 543static int StorVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo)
@@ -554,7 +558,7 @@ static int StorVscOnDeviceAdd(struct hv_device *Device, void *AdditionalInfo)
554 558
555 /* Save the channel properties to our storvsc channel */ 559 /* Save the channel properties to our storvsc channel */
556 /* props = (struct vmstorage_channel_properties *) 560 /* props = (struct vmstorage_channel_properties *)
557 * channel->offerMsg.Offer.u.Standard.UserDefined; */ 561 * channel->offerMsg.Offer.u.Standard.UserDefined; */
558 562
559 /* FIXME: */ 563 /* FIXME: */
560 /* 564 /*
@@ -585,7 +589,7 @@ Cleanup:
585 return ret; 589 return ret;
586} 590}
587 591
588/** 592/*
589 * StorVscOnDeviceRemove - Callback when the our device is being removed 593 * StorVscOnDeviceRemove - Callback when the our device is being removed
590 */ 594 */
591static int StorVscOnDeviceRemove(struct hv_device *Device) 595static int StorVscOnDeviceRemove(struct hv_device *Device)
@@ -649,6 +653,10 @@ int StorVscOnHostReset(struct hv_device *Device)
649 vstorPacket = &request->VStorPacket; 653 vstorPacket = &request->VStorPacket;
650 654
651 request->WaitEvent = osd_WaitEventCreate(); 655 request->WaitEvent = osd_WaitEventCreate();
656 if (!request->WaitEvent) {
657 ret = -ENOMEM;
658 goto Cleanup;
659 }
652 660
653 vstorPacket->Operation = VStorOperationResetBus; 661 vstorPacket->Operation = VStorOperationResetBus;
654 vstorPacket->Flags = REQUEST_COMPLETION_FLAG; 662 vstorPacket->Flags = REQUEST_COMPLETION_FLAG;
@@ -683,7 +691,7 @@ Cleanup:
683 return ret; 691 return ret;
684} 692}
685 693
686/** 694/*
687 * StorVscOnIORequest - Callback to initiate an I/O request 695 * StorVscOnIORequest - Callback to initiate an I/O request
688 */ 696 */
689static int StorVscOnIORequest(struct hv_device *Device, 697static int StorVscOnIORequest(struct hv_device *Device,
@@ -717,7 +725,7 @@ static int StorVscOnIORequest(struct hv_device *Device,
717 } 725 }
718 726
719 /* print_hex_dump_bytes("", DUMP_PREFIX_NONE, Request->Cdb, 727 /* print_hex_dump_bytes("", DUMP_PREFIX_NONE, Request->Cdb,
720 * Request->CdbLen); */ 728 * Request->CdbLen); */
721 729
722 requestExtension->Request = Request; 730 requestExtension->Request = Request;
723 requestExtension->Device = Device; 731 requestExtension->Device = Device;
@@ -783,7 +791,7 @@ static int StorVscOnIORequest(struct hv_device *Device,
783 return ret; 791 return ret;
784} 792}
785 793
786/** 794/*
787 * StorVscOnCleanup - Perform any cleanup when the driver is removed 795 * StorVscOnCleanup - Perform any cleanup when the driver is removed
788 */ 796 */
789static void StorVscOnCleanup(struct hv_driver *Driver) 797static void StorVscOnCleanup(struct hv_driver *Driver)
@@ -792,7 +800,7 @@ static void StorVscOnCleanup(struct hv_driver *Driver)
792 DPRINT_EXIT(STORVSC); 800 DPRINT_EXIT(STORVSC);
793} 801}
794 802
795/** 803/*
796 * StorVscInitialize - Main entry point 804 * StorVscInitialize - Main entry point
797 */ 805 */
798int StorVscInitialize(struct hv_driver *Driver) 806int StorVscInitialize(struct hv_driver *Driver)
@@ -813,7 +821,7 @@ int StorVscInitialize(struct hv_driver *Driver)
813 sizeof(struct vmscsi_request)); 821 sizeof(struct vmscsi_request));
814 822
815 /* Make sure we are at least 2 pages since 1 page is used for control */ 823 /* Make sure we are at least 2 pages since 1 page is used for control */
816 ASSERT(storDriver->RingBufferSize >= (PAGE_SIZE << 1)); 824 /* ASSERT(storDriver->RingBufferSize >= (PAGE_SIZE << 1)); */
817 825
818 Driver->name = gDriverName; 826 Driver->name = gDriverName;
819 memcpy(&Driver->deviceType, &gStorVscDeviceType, 827 memcpy(&Driver->deviceType, &gStorVscDeviceType,
diff --git a/drivers/staging/hv/StorVscApi.h b/drivers/staging/hv/storvsc_api.h
index 126a8588edb1..0063bde9a4b2 100644
--- a/drivers/staging/hv/StorVscApi.h
+++ b/drivers/staging/hv/storvsc_api.h
@@ -25,7 +25,7 @@
25#ifndef _STORVSC_API_H_ 25#ifndef _STORVSC_API_H_
26#define _STORVSC_API_H_ 26#define _STORVSC_API_H_
27 27
28#include "VmbusApi.h" 28#include "vmbus_api.h"
29 29
30/* Defines */ 30/* Defines */
31#define STORVSC_RING_BUFFER_SIZE (10*PAGE_SIZE) 31#define STORVSC_RING_BUFFER_SIZE (10*PAGE_SIZE)
diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c
index 8a58272b8039..d22e35f598ba 100644
--- a/drivers/staging/hv/storvsc_drv.c
+++ b/drivers/staging/hv/storvsc_drv.c
@@ -33,9 +33,9 @@
33#include <scsi/scsi_dbg.h> 33#include <scsi/scsi_dbg.h>
34#include "osd.h" 34#include "osd.h"
35#include "logging.h" 35#include "logging.h"
36#include "VersionInfo.h" 36#include "version_info.h"
37#include "vmbus.h" 37#include "vmbus.h"
38#include "StorVscApi.h" 38#include "storvsc_api.h"
39 39
40 40
41struct host_device_context { 41struct host_device_context {
@@ -97,6 +97,8 @@ static int storvsc_get_chs(struct scsi_device *sdev, struct block_device *bdev,
97 97
98 98
99static int storvsc_ringbuffer_size = STORVSC_RING_BUFFER_SIZE; 99static int storvsc_ringbuffer_size = STORVSC_RING_BUFFER_SIZE;
100module_param(storvsc_ringbuffer_size, int, S_IRUGO);
101MODULE_PARM_DESC(storvsc_ringbuffer_size, "Ring buffer size (bytes)");
100 102
101/* The one and only one */ 103/* The one and only one */
102static struct storvsc_driver_context g_storvsc_drv; 104static struct storvsc_driver_context g_storvsc_drv;
@@ -112,7 +114,7 @@ static struct scsi_host_template scsi_driver = {
112 .slave_configure = storvsc_device_configure, 114 .slave_configure = storvsc_device_configure,
113 .cmd_per_lun = 1, 115 .cmd_per_lun = 1,
114 /* 64 max_queue * 1 target */ 116 /* 64 max_queue * 1 target */
115 .can_queue = STORVSC_MAX_IO_REQUESTS*STORVSC_MAX_TARGETS, 117 .can_queue = STORVSC_MAX_IO_REQUESTS*STORVSC_MAX_TARGETS,
116 .this_id = -1, 118 .this_id = -1,
117 /* no use setting to 0 since ll_blk_rw reset it to 1 */ 119 /* no use setting to 0 since ll_blk_rw reset it to 1 */
118 /* currently 32 */ 120 /* currently 32 */
@@ -130,7 +132,7 @@ static struct scsi_host_template scsi_driver = {
130}; 132};
131 133
132 134
133/** 135/*
134 * storvsc_drv_init - StorVsc driver initialization. 136 * storvsc_drv_init - StorVsc driver initialization.
135 */ 137 */
136static int storvsc_drv_init(int (*drv_init)(struct hv_driver *drv)) 138static int storvsc_drv_init(int (*drv_init)(struct hv_driver *drv))
@@ -223,7 +225,7 @@ static void storvsc_drv_exit(void)
223 return; 225 return;
224} 226}
225 227
226/** 228/*
227 * storvsc_probe - Add a new device for this driver 229 * storvsc_probe - Add a new device for this driver
228 */ 230 */
229static int storvsc_probe(struct device *device) 231static int storvsc_probe(struct device *device)
@@ -319,7 +321,7 @@ static int storvsc_probe(struct device *device)
319 return ret; 321 return ret;
320} 322}
321 323
322/** 324/*
323 * storvsc_remove - Callback when our device is removed 325 * storvsc_remove - Callback when our device is removed
324 */ 326 */
325static int storvsc_remove(struct device *device) 327static int storvsc_remove(struct device *device)
@@ -372,7 +374,7 @@ static int storvsc_remove(struct device *device)
372 return ret; 374 return ret;
373} 375}
374 376
375/** 377/*
376 * storvsc_commmand_completion - Command completion processing 378 * storvsc_commmand_completion - Command completion processing
377 */ 379 */
378static void storvsc_commmand_completion(struct hv_storvsc_request *request) 380static void storvsc_commmand_completion(struct hv_storvsc_request *request)
@@ -385,11 +387,11 @@ static void storvsc_commmand_completion(struct hv_storvsc_request *request)
385 void (*scsi_done_fn)(struct scsi_cmnd *); 387 void (*scsi_done_fn)(struct scsi_cmnd *);
386 struct scsi_sense_hdr sense_hdr; 388 struct scsi_sense_hdr sense_hdr;
387 389
388 ASSERT(request == &cmd_request->request); 390 /* ASSERT(request == &cmd_request->request); */
389 ASSERT((unsigned long)scmnd->host_scribble == 391 /* ASSERT(scmnd); */
390 (unsigned long)cmd_request); 392 /* ASSERT((unsigned long)scmnd->host_scribble == */
391 ASSERT(scmnd); 393 /* (unsigned long)cmd_request); */
392 ASSERT(scmnd->scsi_done); 394 /* ASSERT(scmnd->scsi_done); */
393 395
394 DPRINT_ENTER(STORVSC_DRV); 396 DPRINT_ENTER(STORVSC_DRV);
395 397
@@ -413,7 +415,7 @@ static void storvsc_commmand_completion(struct hv_storvsc_request *request)
413 scsi_print_sense_hdr("storvsc", &sense_hdr); 415 scsi_print_sense_hdr("storvsc", &sense_hdr);
414 } 416 }
415 417
416 ASSERT(request->BytesXfer <= request->DataBuffer.Length); 418 /* ASSERT(request->BytesXfer <= request->DataBuffer.Length); */
417 scsi_set_resid(scmnd, request->DataBuffer.Length - request->BytesXfer); 419 scsi_set_resid(scmnd, request->DataBuffer.Length - request->BytesXfer);
418 420
419 scsi_done_fn = scmnd->scsi_done; 421 scsi_done_fn = scmnd->scsi_done;
@@ -522,7 +524,7 @@ static unsigned int copy_to_bounce_buffer(struct scatterlist *orig_sgl,
522 src = src_addr; 524 src = src_addr;
523 srclen = orig_sgl[i].length; 525 srclen = orig_sgl[i].length;
524 526
525 ASSERT(orig_sgl[i].offset + orig_sgl[i].length <= PAGE_SIZE); 527 /* ASSERT(orig_sgl[i].offset + orig_sgl[i].length <= PAGE_SIZE); */
526 528
527 if (j == 0) 529 if (j == 0)
528 bounce_addr = (unsigned long)kmap_atomic(sg_page((&bounce_sgl[j])), KM_IRQ0); 530 bounce_addr = (unsigned long)kmap_atomic(sg_page((&bounce_sgl[j])), KM_IRQ0);
@@ -583,7 +585,7 @@ static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl,
583 KM_IRQ0) + orig_sgl[i].offset; 585 KM_IRQ0) + orig_sgl[i].offset;
584 dest = dest_addr; 586 dest = dest_addr;
585 destlen = orig_sgl[i].length; 587 destlen = orig_sgl[i].length;
586 ASSERT(orig_sgl[i].offset + orig_sgl[i].length <= PAGE_SIZE); 588 /* ASSERT(orig_sgl[i].offset + orig_sgl[i].length <= PAGE_SIZE); */
587 589
588 if (j == 0) 590 if (j == 0)
589 bounce_addr = (unsigned long)kmap_atomic(sg_page((&bounce_sgl[j])), KM_IRQ0); 591 bounce_addr = (unsigned long)kmap_atomic(sg_page((&bounce_sgl[j])), KM_IRQ0);
@@ -623,7 +625,7 @@ static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl,
623 return total_copied; 625 return total_copied;
624} 626}
625 627
626/** 628/*
627 * storvsc_queuecommand - Initiate command processing 629 * storvsc_queuecommand - Initiate command processing
628 */ 630 */
629static int storvsc_queuecommand(struct scsi_cmnd *scmnd, 631static int storvsc_queuecommand(struct scsi_cmnd *scmnd,
@@ -655,7 +657,7 @@ static int storvsc_queuecommand(struct scsi_cmnd *scmnd,
655 657
656 /* If retrying, no need to prep the cmd */ 658 /* If retrying, no need to prep the cmd */
657 if (scmnd->host_scribble) { 659 if (scmnd->host_scribble) {
658 ASSERT(scmnd->scsi_done != NULL); 660 /* ASSERT(scmnd->scsi_done != NULL); */
659 661
660 cmd_request = 662 cmd_request =
661 (struct storvsc_cmd_request *)scmnd->host_scribble; 663 (struct storvsc_cmd_request *)scmnd->host_scribble;
@@ -665,8 +667,8 @@ static int storvsc_queuecommand(struct scsi_cmnd *scmnd,
665 goto retry_request; 667 goto retry_request;
666 } 668 }
667 669
668 ASSERT(scmnd->scsi_done == NULL); 670 /* ASSERT(scmnd->scsi_done == NULL); */
669 ASSERT(scmnd->host_scribble == NULL); 671 /* ASSERT(scmnd->host_scribble == NULL); */
670 672
671 scmnd->scsi_done = done; 673 scmnd->scsi_done = done;
672 674
@@ -717,7 +719,7 @@ static int storvsc_queuecommand(struct scsi_cmnd *scmnd,
717 request->TargetId = scmnd->device->id; 719 request->TargetId = scmnd->device->id;
718 request->LunId = scmnd->device->lun; 720 request->LunId = scmnd->device->lun;
719 721
720 ASSERT(scmnd->cmd_len <= 16); 722 /* ASSERT(scmnd->cmd_len <= 16); */
721 request->CdbLen = scmnd->cmd_len; 723 request->CdbLen = scmnd->cmd_len;
722 request->Cdb = scmnd->cmnd; 724 request->Cdb = scmnd->cmnd;
723 725
@@ -767,19 +769,17 @@ static int storvsc_queuecommand(struct scsi_cmnd *scmnd,
767 request->DataBuffer.Offset = sgl[0].offset; 769 request->DataBuffer.Offset = sgl[0].offset;
768 770
769 for (i = 0; i < scsi_sg_count(scmnd); i++) { 771 for (i = 0; i < scsi_sg_count(scmnd); i++) {
770 DPRINT_DBG(STORVSC_DRV, "sgl[%d] len %d offset %d \n", 772 DPRINT_DBG(STORVSC_DRV, "sgl[%d] len %d offset %d\n",
771 i, sgl[i].length, sgl[i].offset); 773 i, sgl[i].length, sgl[i].offset);
772 request->DataBuffer.PfnArray[i] = 774 request->DataBuffer.PfnArray[i] =
773 page_to_pfn(sg_page((&sgl[i]))); 775 page_to_pfn(sg_page((&sgl[i])));
774 } 776 }
775 } else if (scsi_sglist(scmnd)) { 777 } else if (scsi_sglist(scmnd)) {
776 ASSERT(scsi_bufflen(scmnd) <= PAGE_SIZE); 778 /* ASSERT(scsi_bufflen(scmnd) <= PAGE_SIZE); */
777 request->DataBuffer.Offset = 779 request->DataBuffer.Offset =
778 virt_to_phys(scsi_sglist(scmnd)) & (PAGE_SIZE-1); 780 virt_to_phys(scsi_sglist(scmnd)) & (PAGE_SIZE-1);
779 request->DataBuffer.PfnArray[0] = 781 request->DataBuffer.PfnArray[0] =
780 virt_to_phys(scsi_sglist(scmnd)) >> PAGE_SHIFT; 782 virt_to_phys(scsi_sglist(scmnd)) >> PAGE_SHIFT;
781 } else {
782 ASSERT(scsi_bufflen(scmnd) == 0);
783 } 783 }
784 784
785retry_request: 785retry_request:
@@ -824,7 +824,7 @@ static int storvsc_merge_bvec(struct request_queue *q,
824 return bvec->bv_len; 824 return bvec->bv_len;
825} 825}
826 826
827/** 827/*
828 * storvsc_device_configure - Configure the specified scsi device 828 * storvsc_device_configure - Configure the specified scsi device
829 */ 829 */
830static int storvsc_device_alloc(struct scsi_device *sdevice) 830static int storvsc_device_alloc(struct scsi_device *sdevice)
@@ -863,7 +863,7 @@ static int storvsc_device_configure(struct scsi_device *sdevice)
863 return 0; 863 return 0;
864} 864}
865 865
866/** 866/*
867 * storvsc_host_reset_handler - Reset the scsi HBA 867 * storvsc_host_reset_handler - Reset the scsi HBA
868 */ 868 */
869static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) 869static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd)
@@ -993,6 +993,6 @@ static void __exit storvsc_exit(void)
993 993
994MODULE_LICENSE("GPL"); 994MODULE_LICENSE("GPL");
995MODULE_VERSION(HV_DRV_VERSION); 995MODULE_VERSION(HV_DRV_VERSION);
996module_param(storvsc_ringbuffer_size, int, S_IRUGO); 996MODULE_DESCRIPTION("Microsoft Hyper-V virtual storage driver");
997module_init(storvsc_init); 997module_init(storvsc_init);
998module_exit(storvsc_exit); 998module_exit(storvsc_exit);
diff --git a/drivers/staging/hv/utils.h b/drivers/staging/hv/utils.h
new file mode 100644
index 000000000000..7c0749999a6f
--- /dev/null
+++ b/drivers/staging/hv/utils.h
@@ -0,0 +1,119 @@
1/*
2 * Copyright (c) 2009, Microsoft Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Authors:
18 * Haiyang Zhang <haiyangz@microsoft.com>
19 * Hank Janssen <hjanssen@microsoft.com>
20 */
21#ifndef __HV_UTILS_H_
22#define __HV_UTILS_H_
23
24/*
25 * Common header for Hyper-V ICs
26 */
27#define ICMSGTYPE_NEGOTIATE 0
28#define ICMSGTYPE_HEARTBEAT 1
29#define ICMSGTYPE_KVPEXCHANGE 2
30#define ICMSGTYPE_SHUTDOWN 3
31#define ICMSGTYPE_TIMESYNC 4
32#define ICMSGTYPE_VSS 5
33
34#define ICMSGHDRFLAG_TRANSACTION 1
35#define ICMSGHDRFLAG_REQUEST 2
36#define ICMSGHDRFLAG_RESPONSE 4
37
38#define HV_S_OK 0x00000000
39#define HV_E_FAIL 0x80004005
40#define HV_ERROR_NOT_SUPPORTED 0x80070032
41#define HV_ERROR_MACHINE_LOCKED 0x800704F7
42
43struct vmbuspipe_hdr {
44 u32 flags;
45 u32 msgsize;
46} __attribute__((packed));
47
48struct ic_version {
49 u16 major;
50 u16 minor;
51} __attribute__((packed));
52
53struct icmsg_hdr {
54 struct ic_version icverframe;
55 u16 icmsgtype;
56 struct ic_version icvermsg;
57 u16 icmsgsize;
58 u32 status;
59 u8 ictransaction_id;
60 u8 icflags;
61 u8 reserved[2];
62} __attribute__((packed));
63
64struct icmsg_negotiate {
65 u16 icframe_vercnt;
66 u16 icmsg_vercnt;
67 u32 reserved;
68 struct ic_version icversion_data[1]; /* any size array */
69} __attribute__((packed));
70
71struct shutdown_msg_data {
72 u32 reason_code;
73 u32 timeout_seconds;
74 u32 flags;
75 u8 display_message[2048];
76} __attribute__((packed));
77
78struct heartbeat_msg_data {
79 u64 seq_num;
80 u32 reserved[8];
81} __attribute__((packed));
82
83/* Time Sync IC defs */
84#define ICTIMESYNCFLAG_PROBE 0
85#define ICTIMESYNCFLAG_SYNC 1
86#define ICTIMESYNCFLAG_SAMPLE 2
87
88#ifdef __x86_64__
89#define WLTIMEDELTA 116444736000000000L /* in 100ns unit */
90#else
91#define WLTIMEDELTA 116444736000000000LL
92#endif
93
94struct ictimesync_data{
95 u64 parenttime;
96 u64 childtime;
97 u64 roundtriptime;
98 u8 flags;
99} __attribute__((packed));
100
101/* Index for each IC struct in array hv_cb_utils[] */
102#define HV_SHUTDOWN_MSG 0
103#define HV_TIMESYNC_MSG 1
104#define HV_HEARTBEAT_MSG 2
105
106struct hyperv_service_callback {
107 u8 msg_type;
108 char *log_msg;
109 unsigned char data[16];
110 struct vmbus_channel *channel;
111 void (*callback) (void *context);
112};
113
114extern void prep_negotiate_resp(struct icmsg_hdr *,
115 struct icmsg_negotiate *, u8 *);
116extern void chn_cb_negotiate(void *);
117extern struct hyperv_service_callback hv_cb_utils[];
118
119#endif /* __HV_UTILS_H_ */
diff --git a/drivers/staging/hv/VersionInfo.h b/drivers/staging/hv/version_info.h
index 10d7b19a485f..35178f2c7967 100644
--- a/drivers/staging/hv/VersionInfo.h
+++ b/drivers/staging/hv/version_info.h
@@ -29,19 +29,20 @@
29 * 29 *
30 * Definition of versioning is as follows; 30 * Definition of versioning is as follows;
31 * 31 *
32 * Major Number Changes for these scenarios; 32 * Major Number Changes for these scenarios;
33 * 1. When a new version of Windows Hyper-V 33 * 1. When a new version of Windows Hyper-V
34 * is released. 34 * is released.
35 * 2. A Major change has occurred in the 35 * 2. A Major change has occurred in the
36 * Linux IC's. 36 * Linux IC's.
37 * (For example the merge for the first time 37 * (For example the merge for the first time
38 * into the kernel) Every time the Major Number 38 * into the kernel) Every time the Major Number
39 * changes, the Revision number is reset to 0. 39 * changes, the Revision number is reset to 0.
40 * Minor Number Changes when new functionality is added 40 * Minor Number Changes when new functionality is added
41 * to the Linux IC's that is not a bug fix. 41 * to the Linux IC's that is not a bug fix.
42 * 42 *
43 * 3.1 - Added completed hv_utils driver. Shutdown/Heartbeat/Timesync
43 */ 44 */
44#define HV_DRV_VERSION "3.0" 45#define HV_DRV_VERSION "3.1"
45 46
46 47
47#endif 48#endif
diff --git a/drivers/staging/hv/Vmbus.c b/drivers/staging/hv/vmbus.c
index 2f84bf7c0a9f..007543bdb410 100644
--- a/drivers/staging/hv/Vmbus.c
+++ b/drivers/staging/hv/vmbus.c
@@ -24,8 +24,8 @@
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include "osd.h" 25#include "osd.h"
26#include "logging.h" 26#include "logging.h"
27#include "VersionInfo.h" 27#include "version_info.h"
28#include "VmbusPrivate.h" 28#include "vmbus_private.h"
29 29
30static const char *gDriverName = "vmbus"; 30static const char *gDriverName = "vmbus";
31 31
@@ -52,7 +52,7 @@ static const struct hv_guid gVmbusDeviceId = {
52static struct hv_driver *gDriver; /* vmbus driver object */ 52static struct hv_driver *gDriver; /* vmbus driver object */
53static struct hv_device *gDevice; /* vmbus root device */ 53static struct hv_device *gDevice; /* vmbus root device */
54 54
55/** 55/*
56 * VmbusGetChannelOffers - Retrieve the channel offers from the parent partition 56 * VmbusGetChannelOffers - Retrieve the channel offers from the parent partition
57 */ 57 */
58static void VmbusGetChannelOffers(void) 58static void VmbusGetChannelOffers(void)
@@ -62,7 +62,7 @@ static void VmbusGetChannelOffers(void)
62 DPRINT_EXIT(VMBUS); 62 DPRINT_EXIT(VMBUS);
63} 63}
64 64
65/** 65/*
66 * VmbusGetChannelInterface - Get the channel interface 66 * VmbusGetChannelInterface - Get the channel interface
67 */ 67 */
68static void VmbusGetChannelInterface(struct vmbus_channel_interface *Interface) 68static void VmbusGetChannelInterface(struct vmbus_channel_interface *Interface)
@@ -70,7 +70,7 @@ static void VmbusGetChannelInterface(struct vmbus_channel_interface *Interface)
70 GetChannelInterface(Interface); 70 GetChannelInterface(Interface);
71} 71}
72 72
73/** 73/*
74 * VmbusGetChannelInfo - Get the device info for the specified device object 74 * VmbusGetChannelInfo - Get the device info for the specified device object
75 */ 75 */
76static void VmbusGetChannelInfo(struct hv_device *DeviceObject, 76static void VmbusGetChannelInfo(struct hv_device *DeviceObject,
@@ -79,7 +79,7 @@ static void VmbusGetChannelInfo(struct hv_device *DeviceObject,
79 GetChannelInfo(DeviceObject, DeviceInfo); 79 GetChannelInfo(DeviceObject, DeviceInfo);
80} 80}
81 81
82/** 82/*
83 * VmbusCreateChildDevice - Creates the child device on the bus that represents the channel offer 83 * VmbusCreateChildDevice - Creates the child device on the bus that represents the channel offer
84 */ 84 */
85struct hv_device *VmbusChildDeviceCreate(struct hv_guid *DeviceType, 85struct hv_device *VmbusChildDeviceCreate(struct hv_guid *DeviceType,
@@ -92,7 +92,7 @@ struct hv_device *VmbusChildDeviceCreate(struct hv_guid *DeviceType,
92 Context); 92 Context);
93} 93}
94 94
95/** 95/*
96 * VmbusChildDeviceAdd - Registers the child device with the vmbus 96 * VmbusChildDeviceAdd - Registers the child device with the vmbus
97 */ 97 */
98int VmbusChildDeviceAdd(struct hv_device *ChildDevice) 98int VmbusChildDeviceAdd(struct hv_device *ChildDevice)
@@ -102,7 +102,7 @@ int VmbusChildDeviceAdd(struct hv_device *ChildDevice)
102 return vmbusDriver->OnChildDeviceAdd(gDevice, ChildDevice); 102 return vmbusDriver->OnChildDeviceAdd(gDevice, ChildDevice);
103} 103}
104 104
105/** 105/*
106 * VmbusChildDeviceRemove Unregisters the child device from the vmbus 106 * VmbusChildDeviceRemove Unregisters the child device from the vmbus
107 */ 107 */
108void VmbusChildDeviceRemove(struct hv_device *ChildDevice) 108void VmbusChildDeviceRemove(struct hv_device *ChildDevice)
@@ -112,7 +112,7 @@ void VmbusChildDeviceRemove(struct hv_device *ChildDevice)
112 vmbusDriver->OnChildDeviceRemove(ChildDevice); 112 vmbusDriver->OnChildDeviceRemove(ChildDevice);
113} 113}
114 114
115/** 115/*
116 * VmbusOnDeviceAdd - Callback when the root bus device is added 116 * VmbusOnDeviceAdd - Callback when the root bus device is added
117 */ 117 */
118static int VmbusOnDeviceAdd(struct hv_device *dev, void *AdditionalInfo) 118static int VmbusOnDeviceAdd(struct hv_device *dev, void *AdditionalInfo)
@@ -141,7 +141,7 @@ static int VmbusOnDeviceAdd(struct hv_device *dev, void *AdditionalInfo)
141 return ret; 141 return ret;
142} 142}
143 143
144/** 144/*
145 * VmbusOnDeviceRemove - Callback when the root bus device is removed 145 * VmbusOnDeviceRemove - Callback when the root bus device is removed
146 */ 146 */
147static int VmbusOnDeviceRemove(struct hv_device *dev) 147static int VmbusOnDeviceRemove(struct hv_device *dev)
@@ -157,7 +157,7 @@ static int VmbusOnDeviceRemove(struct hv_device *dev)
157 return ret; 157 return ret;
158} 158}
159 159
160/** 160/*
161 * VmbusOnCleanup - Perform any cleanup when the driver is removed 161 * VmbusOnCleanup - Perform any cleanup when the driver is removed
162 */ 162 */
163static void VmbusOnCleanup(struct hv_driver *drv) 163static void VmbusOnCleanup(struct hv_driver *drv)
@@ -169,7 +169,7 @@ static void VmbusOnCleanup(struct hv_driver *drv)
169 DPRINT_EXIT(VMBUS); 169 DPRINT_EXIT(VMBUS);
170} 170}
171 171
172/** 172/*
173 * VmbusOnMsgDPC - DPC routine to handle messages from the hypervisior 173 * VmbusOnMsgDPC - DPC routine to handle messages from the hypervisior
174 */ 174 */
175static void VmbusOnMsgDPC(struct hv_driver *drv) 175static void VmbusOnMsgDPC(struct hv_driver *drv)
@@ -185,11 +185,10 @@ static void VmbusOnMsgDPC(struct hv_driver *drv)
185 /* no msg */ 185 /* no msg */
186 break; 186 break;
187 } else { 187 } else {
188 copied = kmalloc(sizeof(*copied), GFP_ATOMIC); 188 copied = kmemdup(msg, sizeof(*copied), GFP_ATOMIC);
189 if (copied == NULL) 189 if (copied == NULL)
190 continue; 190 continue;
191 191
192 memcpy(copied, msg, sizeof(*copied));
193 osd_schedule_callback(gVmbusConnection.WorkQueue, 192 osd_schedule_callback(gVmbusConnection.WorkQueue,
194 VmbusOnChannelMessage, 193 VmbusOnChannelMessage,
195 (void *)copied); 194 (void *)copied);
@@ -217,7 +216,7 @@ static void VmbusOnMsgDPC(struct hv_driver *drv)
217 } 216 }
218} 217}
219 218
220/** 219/*
221 * VmbusOnEventDPC - DPC routine to handle events from the hypervisior 220 * VmbusOnEventDPC - DPC routine to handle events from the hypervisior
222 */ 221 */
223static void VmbusOnEventDPC(struct hv_driver *drv) 222static void VmbusOnEventDPC(struct hv_driver *drv)
@@ -226,7 +225,7 @@ static void VmbusOnEventDPC(struct hv_driver *drv)
226 VmbusOnEvents(); 225 VmbusOnEvents();
227} 226}
228 227
229/** 228/*
230 * VmbusOnISR - ISR routine 229 * VmbusOnISR - ISR routine
231 */ 230 */
232static int VmbusOnISR(struct hv_driver *drv) 231static int VmbusOnISR(struct hv_driver *drv)
@@ -264,7 +263,7 @@ static int VmbusOnISR(struct hv_driver *drv)
264 return ret; 263 return ret;
265} 264}
266 265
267/** 266/*
268 * VmbusInitialize - Main entry point 267 * VmbusInitialize - Main entry point
269 */ 268 */
270int VmbusInitialize(struct hv_driver *drv) 269int VmbusInitialize(struct hv_driver *drv)
diff --git a/drivers/staging/hv/vmbus.h b/drivers/staging/hv/vmbus.h
index 6404b8424bef..0c6ee0f487f3 100644
--- a/drivers/staging/hv/vmbus.h
+++ b/drivers/staging/hv/vmbus.h
@@ -26,7 +26,7 @@
26#define _VMBUS_H_ 26#define _VMBUS_H_
27 27
28#include <linux/device.h> 28#include <linux/device.h>
29#include "VmbusApi.h" 29#include "vmbus_api.h"
30 30
31struct driver_context { 31struct driver_context {
32 struct hv_guid class_id; 32 struct hv_guid class_id;
diff --git a/drivers/staging/hv/VmbusApi.h b/drivers/staging/hv/vmbus_api.h
index d089bb193e7d..4275be3292ce 100644
--- a/drivers/staging/hv/VmbusApi.h
+++ b/drivers/staging/hv/vmbus_api.h
@@ -84,6 +84,24 @@ struct hv_device_info {
84 struct hv_dev_port_info Outbound; 84 struct hv_dev_port_info Outbound;
85}; 85};
86 86
87/**
88 * struct vmbus_channel_interface - Contains member functions for vmbus channel
89 * @Open: Open the channel
90 * @Close: Close the channel
91 * @SendPacket: Send a packet over the channel
92 * @SendPacketPageBuffer: Send a single page buffer over the channel
93 * @SendPacketMultiPageBuffer: Send a multiple page buffers
94 * @RecvPacket: Receive packet
95 * @RecvPacketRaw: Receive Raw packet
96 * @EstablishGpadl: Set up GPADL for ringbuffer
97 * @TeardownGpadl: Teardown GPADL for ringbuffer
98 * @GetInfo: Get info about the channel
99 *
100 * This structure contains function pointer to control vmbus channel
101 * behavior. None of these functions is externally callable, but they
102 * are used for normal vmbus channel internal behavior.
103 * Only used by Hyper-V drivers.
104 */
87struct vmbus_channel_interface { 105struct vmbus_channel_interface {
88 int (*Open)(struct hv_device *Device, u32 SendBufferSize, 106 int (*Open)(struct hv_device *Device, u32 SendBufferSize,
89 u32 RecvRingBufferSize, void *UserData, u32 UserDataLen, 107 u32 RecvRingBufferSize, void *UserData, u32 UserDataLen,
diff --git a/drivers/staging/hv/VmbusChannelInterface.h b/drivers/staging/hv/vmbus_channel_interface.h
index 26742823748d..26742823748d 100644
--- a/drivers/staging/hv/VmbusChannelInterface.h
+++ b/drivers/staging/hv/vmbus_channel_interface.h
diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c
index 3397ef08e0aa..c21731a12ca7 100644
--- a/drivers/staging/hv/vmbus_drv.c
+++ b/drivers/staging/hv/vmbus_drv.c
@@ -27,7 +27,7 @@
27#include <linux/pci.h> 27#include <linux/pci.h>
28#include <linux/dmi.h> 28#include <linux/dmi.h>
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include "VersionInfo.h" 30#include "version_info.h"
31#include "osd.h" 31#include "osd.h"
32#include "logging.h" 32#include "logging.h"
33#include "vmbus.h" 33#include "vmbus.h"
@@ -129,7 +129,7 @@ static struct vmbus_driver_context g_vmbus_drv = {
129 .bus.dev_attrs = vmbus_device_attrs, 129 .bus.dev_attrs = vmbus_device_attrs,
130}; 130};
131 131
132/** 132/*
133 * vmbus_show_device_attr - Show the device attribute in sysfs. 133 * vmbus_show_device_attr - Show the device attribute in sysfs.
134 * 134 *
135 * This is invoked when user does a 135 * This is invoked when user does a
@@ -233,17 +233,17 @@ static ssize_t vmbus_show_device_attr(struct device *dev,
233 } 233 }
234} 234}
235 235
236/** 236/*
237 * vmbus_bus_init -Main vmbus driver initialization routine. 237 * vmbus_bus_init -Main vmbus driver initialization routine.
238 * 238 *
239 * Here, we 239 * Here, we
240 * - initialize the vmbus driver context 240 * - initialize the vmbus driver context
241 * - setup various driver entry points 241 * - setup various driver entry points
242 * - invoke the vmbus hv main init routine 242 * - invoke the vmbus hv main init routine
243 * - get the irq resource 243 * - get the irq resource
244 * - invoke the vmbus to add the vmbus root device 244 * - invoke the vmbus to add the vmbus root device
245 * - setup the vmbus root device 245 * - setup the vmbus root device
246 * - retrieve the channel offers 246 * - retrieve the channel offers
247 */ 247 */
248static int vmbus_bus_init(int (*drv_init)(struct hv_driver *drv)) 248static int vmbus_bus_init(int (*drv_init)(struct hv_driver *drv))
249{ 249{
@@ -362,7 +362,7 @@ cleanup:
362 return ret; 362 return ret;
363} 363}
364 364
365/** 365/*
366 * vmbus_bus_exit - Terminate the vmbus driver. 366 * vmbus_bus_exit - Terminate the vmbus driver.
367 * 367 *
368 * This routine is opposite of vmbus_bus_init() 368 * This routine is opposite of vmbus_bus_init()
@@ -398,8 +398,18 @@ static void vmbus_bus_exit(void)
398 return; 398 return;
399} 399}
400 400
401
401/** 402/**
402 * vmbus_child_driver_register - Register a vmbus's child driver 403 * vmbus_child_driver_register() - Register a vmbus's child driver
404 * @driver_ctx: Pointer to driver structure you want to register
405 *
406 * @driver_ctx is of type &struct driver_context
407 *
408 * Registers the given driver with Linux through the 'driver_register()' call
409 * And sets up the hyper-v vmbus handling for this driver.
410 * It will return the state of the 'driver_register()' call.
411 *
412 * Mainly used by Hyper-V drivers.
403 */ 413 */
404int vmbus_child_driver_register(struct driver_context *driver_ctx) 414int vmbus_child_driver_register(struct driver_context *driver_ctx)
405{ 415{
@@ -425,7 +435,15 @@ int vmbus_child_driver_register(struct driver_context *driver_ctx)
425EXPORT_SYMBOL(vmbus_child_driver_register); 435EXPORT_SYMBOL(vmbus_child_driver_register);
426 436
427/** 437/**
428 * vmbus_child_driver_unregister Unregister a vmbus's child driver 438 * vmbus_child_driver_unregister() - Unregister a vmbus's child driver
439 * @driver_ctx: Pointer to driver structure you want to un-register
440 *
441 * @driver_ctx is of type &struct driver_context
442 *
443 * Un-register the given driver with Linux through the 'driver_unregister()'
444 * call. And ungegisters the driver from the Hyper-V vmbus handler.
445 *
446 * Mainly used by Hyper-V drivers.
429 */ 447 */
430void vmbus_child_driver_unregister(struct driver_context *driver_ctx) 448void vmbus_child_driver_unregister(struct driver_context *driver_ctx)
431{ 449{
@@ -443,9 +461,15 @@ void vmbus_child_driver_unregister(struct driver_context *driver_ctx)
443EXPORT_SYMBOL(vmbus_child_driver_unregister); 461EXPORT_SYMBOL(vmbus_child_driver_unregister);
444 462
445/** 463/**
446 * vmbus_get_interface - Get the vmbus channel interface. 464 * vmbus_get_interface() - Get the vmbus channel interface.
465 * @interface: Pointer to channel interface structure
466 *
467 * Get the Hyper-V channel used for the driver.
468 *
469 * @interface is of type &struct vmbus_channel_interface
470 * This is invoked by child/client driver that sits above vmbus.
447 * 471 *
448 * This is invoked by child/client driver that sits above vmbus 472 * Mainly used by Hyper-V drivers.
449 */ 473 */
450void vmbus_get_interface(struct vmbus_channel_interface *interface) 474void vmbus_get_interface(struct vmbus_channel_interface *interface)
451{ 475{
@@ -455,7 +479,7 @@ void vmbus_get_interface(struct vmbus_channel_interface *interface)
455} 479}
456EXPORT_SYMBOL(vmbus_get_interface); 480EXPORT_SYMBOL(vmbus_get_interface);
457 481
458/** 482/*
459 * vmbus_child_device_get_info - Get the vmbus child device info. 483 * vmbus_child_device_get_info - Get the vmbus child device info.
460 * 484 *
461 * This is invoked to display various device attributes in sysfs. 485 * This is invoked to display various device attributes in sysfs.
@@ -468,8 +492,9 @@ static void vmbus_child_device_get_info(struct hv_device *device_obj,
468 vmbus_drv_obj->GetChannelInfo(device_obj, device_info); 492 vmbus_drv_obj->GetChannelInfo(device_obj, device_info);
469} 493}
470 494
471/** 495/*
472 * vmbus_child_device_create - Creates and registers a new child device on the vmbus. 496 * vmbus_child_device_create - Creates and registers a new child device
497 * on the vmbus.
473 */ 498 */
474static struct hv_device *vmbus_child_device_create(struct hv_guid *type, 499static struct hv_device *vmbus_child_device_create(struct hv_guid *type,
475 struct hv_guid *instance, 500 struct hv_guid *instance,
@@ -523,7 +548,7 @@ static struct hv_device *vmbus_child_device_create(struct hv_guid *type,
523 return child_device_obj; 548 return child_device_obj;
524} 549}
525 550
526/** 551/*
527 * vmbus_child_device_register - Register the child device on the specified bus 552 * vmbus_child_device_register - Register the child device on the specified bus
528 */ 553 */
529static int vmbus_child_device_register(struct hv_device *root_device_obj, 554static int vmbus_child_device_register(struct hv_device *root_device_obj,
@@ -571,8 +596,9 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj,
571 return ret; 596 return ret;
572} 597}
573 598
574/** 599/*
575 * vmbus_child_device_unregister - Remove the specified child device from the vmbus. 600 * vmbus_child_device_unregister - Remove the specified child device
601 * from the vmbus.
576 */ 602 */
577static void vmbus_child_device_unregister(struct hv_device *device_obj) 603static void vmbus_child_device_unregister(struct hv_device *device_obj)
578{ 604{
@@ -595,7 +621,7 @@ static void vmbus_child_device_unregister(struct hv_device *device_obj)
595 DPRINT_EXIT(VMBUS_DRV); 621 DPRINT_EXIT(VMBUS_DRV);
596} 622}
597 623
598/** 624/*
599 * vmbus_child_device_destroy - Destroy the specified child device on the vmbus. 625 * vmbus_child_device_destroy - Destroy the specified child device on the vmbus.
600 */ 626 */
601static void vmbus_child_device_destroy(struct hv_device *device_obj) 627static void vmbus_child_device_destroy(struct hv_device *device_obj)
@@ -605,7 +631,7 @@ static void vmbus_child_device_destroy(struct hv_device *device_obj)
605 DPRINT_EXIT(VMBUS_DRV); 631 DPRINT_EXIT(VMBUS_DRV);
606} 632}
607 633
608/** 634/*
609 * vmbus_uevent - add uevent for our device 635 * vmbus_uevent - add uevent for our device
610 * 636 *
611 * This routine is invoked when a device is added or removed on the vmbus to 637 * This routine is invoked when a device is added or removed on the vmbus to
@@ -684,7 +710,7 @@ static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env)
684 return 0; 710 return 0;
685} 711}
686 712
687/** 713/*
688 * vmbus_match - Attempt to match the specified device to the specified driver 714 * vmbus_match - Attempt to match the specified device to the specified driver
689 */ 715 */
690static int vmbus_match(struct device *device, struct device_driver *driver) 716static int vmbus_match(struct device *device, struct device_driver *driver)
@@ -719,7 +745,7 @@ static int vmbus_match(struct device *device, struct device_driver *driver)
719 return match; 745 return match;
720} 746}
721 747
722/** 748/*
723 * vmbus_probe_failed_cb - Callback when a driver probe failed in vmbus_probe() 749 * vmbus_probe_failed_cb - Callback when a driver probe failed in vmbus_probe()
724 * 750 *
725 * We need a callback because we cannot invoked device_unregister() inside 751 * We need a callback because we cannot invoked device_unregister() inside
@@ -742,7 +768,7 @@ static void vmbus_probe_failed_cb(struct work_struct *context)
742 DPRINT_EXIT(VMBUS_DRV); 768 DPRINT_EXIT(VMBUS_DRV);
743} 769}
744 770
745/** 771/*
746 * vmbus_probe - Add the new vmbus's child device 772 * vmbus_probe - Add the new vmbus's child device
747 */ 773 */
748static int vmbus_probe(struct device *child_device) 774static int vmbus_probe(struct device *child_device)
@@ -778,7 +804,7 @@ static int vmbus_probe(struct device *child_device)
778 return ret; 804 return ret;
779} 805}
780 806
781/** 807/*
782 * vmbus_remove - Remove a vmbus device 808 * vmbus_remove - Remove a vmbus device
783 */ 809 */
784static int vmbus_remove(struct device *child_device) 810static int vmbus_remove(struct device *child_device)
@@ -820,7 +846,7 @@ static int vmbus_remove(struct device *child_device)
820 return 0; 846 return 0;
821} 847}
822 848
823/** 849/*
824 * vmbus_shutdown - Shutdown a vmbus device 850 * vmbus_shutdown - Shutdown a vmbus device
825 */ 851 */
826static void vmbus_shutdown(struct device *child_device) 852static void vmbus_shutdown(struct device *child_device)
@@ -856,7 +882,7 @@ static void vmbus_shutdown(struct device *child_device)
856 return; 882 return;
857} 883}
858 884
859/** 885/*
860 * vmbus_bus_release - Final callback release of the vmbus root device 886 * vmbus_bus_release - Final callback release of the vmbus root device
861 */ 887 */
862static void vmbus_bus_release(struct device *device) 888static void vmbus_bus_release(struct device *device)
@@ -870,7 +896,7 @@ static void vmbus_bus_release(struct device *device)
870 DPRINT_EXIT(VMBUS_DRV); 896 DPRINT_EXIT(VMBUS_DRV);
871} 897}
872 898
873/** 899/*
874 * vmbus_device_release - Final callback release of the vmbus child device 900 * vmbus_device_release - Final callback release of the vmbus child device
875 */ 901 */
876static void vmbus_device_release(struct device *device) 902static void vmbus_device_release(struct device *device)
@@ -888,7 +914,7 @@ static void vmbus_device_release(struct device *device)
888 return; 914 return;
889} 915}
890 916
891/** 917/*
892 * vmbus_msg_dpc - Tasklet routine to handle hypervisor messages 918 * vmbus_msg_dpc - Tasklet routine to handle hypervisor messages
893 */ 919 */
894static void vmbus_msg_dpc(unsigned long data) 920static void vmbus_msg_dpc(unsigned long data)
@@ -897,7 +923,7 @@ static void vmbus_msg_dpc(unsigned long data)
897 923
898 DPRINT_ENTER(VMBUS_DRV); 924 DPRINT_ENTER(VMBUS_DRV);
899 925
900 ASSERT(vmbus_drv_obj->OnMsgDpc != NULL); 926 /* ASSERT(vmbus_drv_obj->OnMsgDpc != NULL); */
901 927
902 /* Call to bus driver to handle interrupt */ 928 /* Call to bus driver to handle interrupt */
903 vmbus_drv_obj->OnMsgDpc(&vmbus_drv_obj->Base); 929 vmbus_drv_obj->OnMsgDpc(&vmbus_drv_obj->Base);
@@ -905,7 +931,7 @@ static void vmbus_msg_dpc(unsigned long data)
905 DPRINT_EXIT(VMBUS_DRV); 931 DPRINT_EXIT(VMBUS_DRV);
906} 932}
907 933
908/** 934/*
909 * vmbus_msg_dpc - Tasklet routine to handle hypervisor events 935 * vmbus_msg_dpc - Tasklet routine to handle hypervisor events
910 */ 936 */
911static void vmbus_event_dpc(unsigned long data) 937static void vmbus_event_dpc(unsigned long data)
@@ -914,7 +940,7 @@ static void vmbus_event_dpc(unsigned long data)
914 940
915 DPRINT_ENTER(VMBUS_DRV); 941 DPRINT_ENTER(VMBUS_DRV);
916 942
917 ASSERT(vmbus_drv_obj->OnEventDpc != NULL); 943 /* ASSERT(vmbus_drv_obj->OnEventDpc != NULL); */
918 944
919 /* Call to bus driver to handle interrupt */ 945 /* Call to bus driver to handle interrupt */
920 vmbus_drv_obj->OnEventDpc(&vmbus_drv_obj->Base); 946 vmbus_drv_obj->OnEventDpc(&vmbus_drv_obj->Base);
@@ -929,7 +955,7 @@ static irqreturn_t vmbus_isr(int irq, void *dev_id)
929 955
930 DPRINT_ENTER(VMBUS_DRV); 956 DPRINT_ENTER(VMBUS_DRV);
931 957
932 ASSERT(vmbus_driver_obj->OnIsr != NULL); 958 /* ASSERT(vmbus_driver_obj->OnIsr != NULL); */
933 959
934 /* Call to bus driver to handle interrupt */ 960 /* Call to bus driver to handle interrupt */
935 ret = vmbus_driver_obj->OnIsr(&vmbus_driver_obj->Base); 961 ret = vmbus_driver_obj->OnIsr(&vmbus_driver_obj->Base);
diff --git a/drivers/staging/hv/VmbusPacketFormat.h b/drivers/staging/hv/vmbus_packet_format.h
index 79120bc742dc..f9f6b4bf6fb1 100644
--- a/drivers/staging/hv/VmbusPacketFormat.h
+++ b/drivers/staging/hv/vmbus_packet_format.h
@@ -22,6 +22,7 @@
22 */ 22 */
23 23
24#ifndef _VMBUSPACKETFORMAT_H_ 24#ifndef _VMBUSPACKETFORMAT_H_
25#define _VMBUSPACKETFORMAT_H_
25 26
26struct vmpacket_descriptor { 27struct vmpacket_descriptor {
27 u16 Type; 28 u16 Type;
diff --git a/drivers/staging/hv/VmbusPrivate.h b/drivers/staging/hv/vmbus_private.h
index 05ad2c9380d5..588c667a7f6b 100644
--- a/drivers/staging/hv/VmbusPrivate.h
+++ b/drivers/staging/hv/vmbus_private.h
@@ -25,12 +25,12 @@
25#ifndef _VMBUS_PRIVATE_H_ 25#ifndef _VMBUS_PRIVATE_H_
26#define _VMBUS_PRIVATE_H_ 26#define _VMBUS_PRIVATE_H_
27 27
28#include "Hv.h" 28#include "hv.h"
29#include "VmbusApi.h" 29#include "vmbus_api.h"
30#include "Channel.h" 30#include "channel.h"
31#include "ChannelMgmt.h" 31#include "channel_mgmt.h"
32#include "ChannelInterface.h" 32#include "channel_interface.h"
33#include "RingBuffer.h" 33#include "ring_buffer.h"
34#include <linux/list.h> 34#include <linux/list.h>
35 35
36 36
diff --git a/drivers/staging/hv/vstorage.h b/drivers/staging/hv/vstorage.h
index 6d160a53914e..4ea597d7a7d7 100644
--- a/drivers/staging/hv/vstorage.h
+++ b/drivers/staging/hv/vstorage.h
@@ -28,7 +28,7 @@
28#define REVISION_STRING(REVISION_) #REVISION_ 28#define REVISION_STRING(REVISION_) #REVISION_
29#define FILL_VMSTOR_REVISION(RESULT_LVALUE_) \ 29#define FILL_VMSTOR_REVISION(RESULT_LVALUE_) \
30{ \ 30{ \
31 char *revisionString = REVISION_STRING($Revision: 6 $) + 11; \ 31 char *revisionString = REVISION_STRING($Revision : 6 $) + 11; \
32 RESULT_LVALUE_ = 0; \ 32 RESULT_LVALUE_ = 0; \
33 while (*revisionString >= '0' && *revisionString <= '9') { \ 33 while (*revisionString >= '0' && *revisionString <= '9') { \
34 RESULT_LVALUE_ *= 10; \ 34 RESULT_LVALUE_ *= 10; \
diff --git a/drivers/staging/iio/Documentation/iio_utils.h b/drivers/staging/iio/Documentation/iio_utils.h
index 74d312473378..a4555e6f133f 100644
--- a/drivers/staging/iio/Documentation/iio_utils.h
+++ b/drivers/staging/iio/Documentation/iio_utils.h
@@ -7,111 +7,173 @@
7 * the Free Software Foundation. 7 * the Free Software Foundation.
8 */ 8 */
9 9
10/* Made up value to limit allocation sizes */
11#include <string.h>
12#include <stdlib.h>
13
14#define IIO_MAX_NAME_LENGTH 30
15
10#define IIO_EVENT_CODE_RING_50_FULL 200 16#define IIO_EVENT_CODE_RING_50_FULL 200
11#define IIO_EVENT_CODE_RING_75_FULL 201 17#define IIO_EVENT_CODE_RING_75_FULL 201
12#define IIO_EVENT_CODE_RING_100_FULL 202 18#define IIO_EVENT_CODE_RING_100_FULL 202
13 19
20const char *iio_dir = "/sys/bus/iio/devices/";
21
14struct iio_event_data { 22struct iio_event_data {
15 int id; 23 int id;
16 __s64 timestamp; 24 __s64 timestamp;
17}; 25};
18 26
19 27/**
20inline char *find_ring_subelement(const char *directory, const char *subelement) 28 * find_type_by_name() - function to match top level types by name
21{ 29 * @name: top level type instance name
22 DIR *dp; 30 * @type: the type of top level instance being sort
23 const struct dirent *ent; 31 *
24 int pos; 32 * Typical types this is used for are device and trigger.
25 char temp[100]; 33 **/
26 char *returnstring; 34inline int find_type_by_name(const char *name, const char *type)
27 dp = opendir(directory);
28 if (dp == NULL) {
29 printf("could not directory: %s\n", directory);
30 return NULL;
31 }
32 while (ent = readdir(dp), ent != NULL) {
33 if (strcmp(ent->d_name, ".") != 0 &&
34 strcmp(ent->d_name, "..") != 0) {
35 if (strncmp(ent->d_name, subelement, strlen(subelement)) == 0) {
36 int length = sprintf(temp, "%s%s%s", directory, ent->d_name, "/");
37 returnstring = malloc(length+1);
38 strncpy(returnstring, temp, length+1);
39 return returnstring;
40
41 }
42 }
43 }
44 return 0;
45}
46
47
48char *find_type_by_name(const char *name, const char *type)
49{ 35{
50 const char *iio_dir = "/sys/class/iio/";
51 const struct dirent *ent; 36 const struct dirent *ent;
52 int cnt, pos, pos2; 37 int number, numstrlen;
53 38
54 FILE *nameFile; 39 FILE *nameFile;
55 DIR *dp; 40 DIR *dp;
56 char thisname[100]; 41 char thisname[IIO_MAX_NAME_LENGTH];
57 char temp[100]; 42 char *filename;
58
59 char *returnstring = NULL;
60 struct stat Stat; 43 struct stat Stat;
61 pos = sprintf(temp, "%s", iio_dir); 44
62 dp = opendir(iio_dir); 45 dp = opendir(iio_dir);
63 if (dp == NULL) { 46 if (dp == NULL) {
64 printf("No industrialio devices available"); 47 printf("No industrialio devices available");
65 return NULL; 48 return -ENODEV;
66 } 49 }
50
67 while (ent = readdir(dp), ent != NULL) { 51 while (ent = readdir(dp), ent != NULL) {
68 cnt++;
69 /*reject . and .. */
70 if (strcmp(ent->d_name, ".") != 0 && 52 if (strcmp(ent->d_name, ".") != 0 &&
71 strcmp(ent->d_name, "..") != 0) { 53 strcmp(ent->d_name, "..") != 0 &&
72 /*make sure it isn't a trigger!*/ 54 strlen(ent->d_name) > strlen(type) &&
73 if (strncmp(ent->d_name, type, strlen(type)) == 0) { 55 strncmp(ent->d_name, type, strlen(type)) == 0) {
74 /* build full path to new file */ 56 numstrlen = sscanf(ent->d_name + strlen(type),
75 pos2 = pos + sprintf(temp + pos, "%s/", ent->d_name); 57 "%d",
76 sprintf(temp + pos2, "name"); 58 &number);
77 printf("search location %s\n", temp); 59 /* verify the next character is not a colon */
78 nameFile = fopen(temp, "r"); 60 if (strncmp(ent->d_name + strlen(type) + numstrlen,
79 if (!nameFile) { 61 ":",
80 sprintf(temp + pos2, "modalias", ent->d_name); 62 1) != 0) {
81 nameFile = fopen(temp, "r"); 63 filename = malloc(strlen(iio_dir)
82 if (!nameFile) { 64 + strlen(type)
83 printf("Failed to find a name for device\n"); 65 + 1
84 return NULL; 66 + numstrlen
85 } 67 + 1);
86 } 68 if (filename == NULL)
69 return -ENOMEM;
70 sprintf(filename, "%s%s%d/name",
71 iio_dir,
72 type,
73 number);
74 nameFile = fopen(filename, "r");
75 if (!nameFile)
76 continue;
77 free(filename);
87 fscanf(nameFile, "%s", thisname); 78 fscanf(nameFile, "%s", thisname);
88 if (strcmp(name, thisname) == 0) { 79 if (strcmp(name, thisname) == 0)
89 returnstring = malloc(strlen(temp) + 1); 80 return number;
90 sprintf(temp + pos2, "");
91 strcpy(returnstring, temp);
92 return returnstring;
93 }
94 fclose(nameFile); 81 fclose(nameFile);
95
96 } 82 }
97 } 83 }
98 } 84 }
85 return -ENODEV;
99} 86}
100 87
101int write_sysfs_int(char *filename, char *basedir, int val) 88inline int _write_sysfs_int(char *filename, char *basedir, int val, int verify)
102{ 89{
103 int ret; 90 int ret;
104 FILE *sysfsfp; 91 FILE *sysfsfp;
105 char temp[100]; 92 int test;
106 sprintf(temp, "%s%s", basedir, filename); 93 char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
94 if (temp == NULL)
95 return -ENOMEM;
96 sprintf(temp, "%s/%s", basedir, filename);
107 sysfsfp = fopen(temp, "w"); 97 sysfsfp = fopen(temp, "w");
108 if (sysfsfp == NULL) 98 if (sysfsfp == NULL) {
109 return -1; 99 printf("failed to open %s\n", temp);
100 ret = -errno;
101 goto error_free;
102 }
110 fprintf(sysfsfp, "%d", val); 103 fprintf(sysfsfp, "%d", val);
111 fclose(sysfsfp); 104 fclose(sysfsfp);
112 return 0; 105 if (verify) {
106 sysfsfp = fopen(temp, "r");
107 if (sysfsfp == NULL) {
108 printf("failed to open %s\n", temp);
109 ret = -errno;
110 goto error_free;
111 }
112 fscanf(sysfsfp, "%d", &test);
113 if (test != val) {
114 printf("Possible failure in int write %d to %s%s\n",
115 val,
116 basedir,
117 filename);
118 ret = -1;
119 }
120 }
121error_free:
122 free(temp);
123 return ret;
113} 124}
114 125
126int write_sysfs_int(char *filename, char *basedir, int val)
127{
128 return _write_sysfs_int(filename, basedir, val, 0);
129}
130
131int write_sysfs_int_and_verify(char *filename, char *basedir, int val)
132{
133 return _write_sysfs_int(filename, basedir, val, 1);
134}
135
136int _write_sysfs_string(char *filename, char *basedir, char *val, int verify)
137{
138 int ret;
139 FILE *sysfsfp;
140 char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
141 if (temp == NULL) {
142 printf("Memory allocation failed\n");
143 return -ENOMEM;
144 }
145 sprintf(temp, "%s/%s", basedir, filename);
146 sysfsfp = fopen(temp, "w");
147 if (sysfsfp == NULL) {
148 printf("Could not open %s\n", temp);
149 ret = -errno;
150 goto error_free;
151 }
152 fprintf(sysfsfp, "%s", val);
153 fclose(sysfsfp);
154 if (verify) {
155 sysfsfp = fopen(temp, "r");
156 if (sysfsfp == NULL) {
157 ret = -errno;
158 goto error_free;
159 }
160 fscanf(sysfsfp, "%s", temp);
161 if (strcmp(temp, val) != 0) {
162 printf("Possible failure in string write of %s "
163 "Should be %s "
164 "writen to %s\%s\n",
165 temp,
166 val,
167 basedir,
168 filename);
169 ret = -1;
170 }
171 }
172error_free:
173 free(temp);
174
175 return ret;
176}
115/** 177/**
116 * write_sysfs_string_and_verify() - string write, readback and verify 178 * write_sysfs_string_and_verify() - string write, readback and verify
117 * @filename: name of file to write to 179 * @filename: name of file to write to
@@ -120,40 +182,54 @@ int write_sysfs_int(char *filename, char *basedir, int val)
120 **/ 182 **/
121int write_sysfs_string_and_verify(char *filename, char *basedir, char *val) 183int write_sysfs_string_and_verify(char *filename, char *basedir, char *val)
122{ 184{
123 int ret; 185 return _write_sysfs_string(filename, basedir, val, 1);
124 FILE *sysfsfp; 186}
125 char temp[100];
126 sprintf(temp, "%s%s", basedir, filename);
127 sysfsfp = fopen(temp, "w");
128 if (sysfsfp == NULL)
129 return -1;
130 fprintf(sysfsfp, "%s", val);
131 fclose(sysfsfp);
132 187
133 sysfsfp = fopen(temp, "r"); 188int write_sysfs_string(char *filename, char *basedir, char *val)
134 if (sysfsfp == NULL) 189{
135 return -1; 190 return _write_sysfs_string(filename, basedir, val, 0);
136 fscanf(sysfsfp, "%s", temp);
137 if (strcmp(temp, val) != 0) {
138 printf("Possible failure in string write %s to %s%s \n",
139 val,
140 basedir,
141 filename);
142 return -1;
143 }
144 return 0;
145} 191}
146 192
147int read_sysfs_posint(char *filename, char *basedir) 193int read_sysfs_posint(char *filename, char *basedir)
148{ 194{
149 int ret; 195 int ret;
150 FILE *sysfsfp; 196 FILE *sysfsfp;
151 char temp[100]; 197 char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
152 sprintf(temp, "%s%s", basedir, filename); 198 if (temp == NULL) {
199 printf("Memory allocation failed");
200 return -ENOMEM;
201 }
202 sprintf(temp, "%s/%s", basedir, filename);
153 sysfsfp = fopen(temp, "r"); 203 sysfsfp = fopen(temp, "r");
154 if (sysfsfp == NULL) 204 if (sysfsfp == NULL) {
155 return -1; 205 ret = -errno;
206 goto error_free;
207 }
156 fscanf(sysfsfp, "%d\n", &ret); 208 fscanf(sysfsfp, "%d\n", &ret);
157 fclose(sysfsfp); 209 fclose(sysfsfp);
210error_free:
211 free(temp);
212 return ret;
213}
214
215int read_sysfs_float(char *filename, char *basedir, float *val)
216{
217 float ret = 0;
218 FILE *sysfsfp;
219 char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
220 if (temp == NULL) {
221 printf("Memory allocation failed");
222 return -ENOMEM;
223 }
224 sprintf(temp, "%s/%s", basedir, filename);
225 sysfsfp = fopen(temp, "r");
226 if (sysfsfp == NULL) {
227 ret = -errno;
228 goto error_free;
229 }
230 fscanf(sysfsfp, "%f\n", val);
231 fclose(sysfsfp);
232error_free:
233 free(temp);
158 return ret; 234 return ret;
159} 235}
diff --git a/drivers/staging/iio/Documentation/lis3l02dqbuffersimple.c b/drivers/staging/iio/Documentation/lis3l02dqbuffersimple.c
index 2b5cfc58d78d..3a580284020c 100644
--- a/drivers/staging/iio/Documentation/lis3l02dqbuffersimple.c
+++ b/drivers/staging/iio/Documentation/lis3l02dqbuffersimple.c
@@ -1,4 +1,4 @@
1/* Industrialio test ring buffer with a lis3l02dq acceleromter 1/* Industrialio ring buffer with a lis3l02dq accelerometer
2 * 2 *
3 * Copyright (c) 2008 Jonathan Cameron 3 * Copyright (c) 2008 Jonathan Cameron
4 * 4 *
@@ -6,126 +6,181 @@
6 * under the terms of the GNU General Public License version 2 as published by 6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation. 7 * the Free Software Foundation.
8 * 8 *
9 * Assumes suitable udev rules are used to create the dev nodes as named here. 9 * This program is primarily intended as an example application.
10 */ 10 */
11 11
12#include <dirent.h> 12#include <dirent.h>
13#include <fcntl.h> 13#include <fcntl.h>
14#include <stdio.h> 14#include <stdio.h>
15#include <errno.h> 15#include <errno.h>
16#include <stdint.h>
17#include <sys/types.h>
18#include <sys/stat.h> 16#include <sys/stat.h>
19#include <sys/dir.h> 17#include <sys/dir.h>
20
21#include <linux/types.h> 18#include <linux/types.h>
22#include <dirent.h> 19#include "iio_utils.h"
23#include "iio_util.h"
24 20
25static const char *ring_access = "/dev/iio/lis3l02dq_ring_access"; 21const char *device_name = "lis3l02dq";
26static const char *ring_event = "/dev/iio/lis3l02dq_ring_event"; 22const char *trigger_name_base = "lis3l02dq-dev";
27static const char *device_name = "lis3l02dq"; 23const int num_vals = 3;
28static const char *trigger_name = "lis3l02dq-dev0"; 24const int scan_ts = 1;
29static int NumVals = 3; 25const int buf_len = 128;
30static int scan_ts = 1; 26const int num_loops = 10;
31static int RingLength = 128;
32 27
33/* 28/*
34 * Could get this from ring bps, but only after starting the ring 29 * Could get this from ring bps, but only after starting the ring
35 * which is a bit late for it to be useful 30 * which is a bit late for it to be useful.
31 *
32 * Todo: replace with much more generic version based on scan_elements
33 * directory.
36 */ 34 */
37int size_from_scanmode(int numVals, int timestamp) 35int size_from_scanmode(int num_vals, int timestamp)
38{ 36{
39 if (numVals && timestamp) 37 if (num_vals && timestamp)
40 return 16; 38 return 16;
41 else if (timestamp) 39 else if (timestamp)
42 return 8; 40 return 8;
43 else 41 else
44 return numVals*2; 42 return num_vals*2;
45} 43}
46 44
47int main(int argc, char **argv) 45int main(int argc, char **argv)
48{ 46{
47 int ret;
49 int i, j, k, toread; 48 int i, j, k, toread;
50 FILE *fp_ev; 49 FILE *fp_ev;
51 int fp; 50 int fp;
51
52 char *trigger_name, *dev_dir_name, *buf_dir_name;
52 char *data; 53 char *data;
53 size_t read_size; 54 size_t read_size;
54 struct iio_event_data dat; 55 struct iio_event_data dat;
56 int dev_num, trig_num;
55 57
56 char *BaseDirectoryName, 58 char *buffer_access, *buffer_event;
57 *TriggerDirectoryName, 59 const char *iio_dir = "/sys/bus/iio/devices/";
58 *RingBufferDirectoryName; 60 int scan_size;
61 float gain = 1;
59 62
60 BaseDirectoryName = find_type_by_name(device_name, "device"); 63
61 if (BaseDirectoryName == NULL) { 64 /* Find out which iio device is the accelerometer. */
62 printf("Failed to find the %s \n", device_name); 65 dev_num = find_type_by_name(device_name, "device");
63 return -1; 66 if (dev_num < 0) {
67 printf("Failed to find the %s\n", device_name);
68 ret = -ENODEV;
69 goto error_ret;
70 }
71 printf("iio device number being used is %d\n", dev_num);
72 asprintf(&dev_dir_name, "%sdevice%d", iio_dir, dev_num);
73
74 /*
75 * Build the trigger name.
76 * In this case we want the lis3l02dq's data ready trigger
77 * for this lis3l02dq. The naming is lis3l02dq_dev[n], where
78 * n matches the device number found above.
79 */
80 ret = asprintf(&trigger_name, "%s%d", trigger_name_base, dev_num);
81 if (ret < 0) {
82 ret = -ENOMEM;
83 goto error_free_dev_dir_name;
64 } 84 }
65 TriggerDirectoryName = find_type_by_name(trigger_name, "trigger"); 85
66 if (TriggerDirectoryName == NULL) { 86 /*
87 * Find the trigger by name.
88 * This is techically unecessary here as we only need to
89 * refer to the trigger by name and that name is already
90 * known.
91 */
92 trig_num = find_type_by_name(trigger_name, "trigger");
93 if (trig_num < 0) {
67 printf("Failed to find the %s\n", trigger_name); 94 printf("Failed to find the %s\n", trigger_name);
68 return -1; 95 ret = -ENODEV;
96 goto error_free_triggername;
69 } 97 }
70 RingBufferDirectoryName = find_ring_subelement(BaseDirectoryName, 98 printf("iio trigger number being used is %d\n", trig_num);
71 "ring_buffer"); 99
72 if (RingBufferDirectoryName == NULL) { 100 /*
73 printf("Failed to find ring buffer\n"); 101 * Read in the scale value - in a more generic case, first
74 return -1; 102 * check for accel_scale, then the indivual channel scales
103 */
104 ret = read_sysfs_float("accel_scale", dev_dir_name, &gain);
105 if (ret)
106 goto error_free_triggername;;
107
108 /*
109 * Construct the directory name for the associated buffer.
110 * As we know that the lis3l02dq has only one buffer this may
111 * be built rather than found.
112 */
113 ret = asprintf(&buf_dir_name, "%sdevice%d:buffer0", iio_dir, dev_num);
114 if (ret < 0) {
115 ret = -ENOMEM;
116 goto error_free_triggername;
75 } 117 }
76 118 /* Set the device trigger to be the data rdy trigger found above */
77 if (write_sysfs_string_and_verify("trigger/current_trigger", 119 ret = write_sysfs_string_and_verify("trigger/current_trigger",
78 BaseDirectoryName, 120 dev_dir_name,
79 (char *)trigger_name) < 0) { 121 trigger_name);
80 printf("Failed to write current_trigger file \n"); 122 if (ret < 0) {
81 return -1; 123 printf("Failed to write current_trigger file\n");
124 goto error_free_buf_dir_name;
82 } 125 }
83 126
84 /* Setup ring buffer parameters */ 127 /* Setup ring buffer parameters */
85 if (write_sysfs_int("length", RingBufferDirectoryName, 128 ret = write_sysfs_int("length", buf_dir_name, buf_len);
86 RingLength) < 0) { 129 if (ret < 0)
87 printf("Failed to open the ring buffer length file \n"); 130 goto error_free_buf_dir_name;
88 return -1;
89 }
90 131
91 /* Enable the ring buffer */ 132 /* Enable the buffer */
92 if (write_sysfs_int("ring_enable", RingBufferDirectoryName, 1) < 0) { 133 ret = write_sysfs_int("ring_enable", buf_dir_name, 1);
93 printf("Failed to open the ring buffer control file \n"); 134 if (ret < 0)
94 return -1; 135 goto error_free_buf_dir_name;
95 };
96 136
97 data = malloc(size_from_scanmode(NumVals, scan_ts)*RingLength); 137 data = malloc(size_from_scanmode(num_vals, scan_ts)*buf_len);
98 if (!data) { 138 if (!data) {
99 printf("Could not allocate space for usespace data store\n"); 139 ret = -ENOMEM;
100 return -1; 140 goto error_free_buf_dir_name;
141 }
142
143 ret = asprintf(&buffer_access,
144 "/dev/device%d:buffer0:access0",
145 dev_num);
146 if (ret < 0) {
147 ret = -ENOMEM;
148 goto error_free_data;
101 } 149 }
102 150
151 ret = asprintf(&buffer_event, "/dev/device%d:buffer0:event0", dev_num);
152 if (ret < 0) {
153 ret = -ENOMEM;
154 goto error_free_data;
155 }
103 /* Attempt to open non blocking the access dev */ 156 /* Attempt to open non blocking the access dev */
104 fp = open(ring_access, O_RDONLY | O_NONBLOCK); 157 fp = open(buffer_access, O_RDONLY | O_NONBLOCK);
105 if (fp == -1) { /*If it isn't there make the node */ 158 if (fp == -1) { /*If it isn't there make the node */
106 printf("Failed to open %s\n", ring_access); 159 printf("Failed to open %s\n", buffer_access);
107 return -1; 160 ret = -errno;
161 goto error_free_buffer_event;
108 } 162 }
109 /* Attempt to open the event access dev (blocking this time) */ 163 /* Attempt to open the event access dev (blocking this time) */
110 fp_ev = fopen(ring_event, "rb"); 164 fp_ev = fopen(buffer_event, "rb");
111 if (fp_ev == NULL) { 165 if (fp_ev == NULL) {
112 printf("Failed to open %s\n", ring_event); 166 printf("Failed to open %s\n", buffer_event);
113 return -1; 167 ret = -errno;
168 goto error_close_buffer_access;
114 } 169 }
115 170
116 /* Wait for events 10 times */ 171 /* Wait for events 10 times */
117 for (j = 0; j < 10; j++) { 172 for (j = 0; j < num_loops; j++) {
118 read_size = fread(&dat, 1, sizeof(struct iio_event_data), 173 read_size = fread(&dat, 1, sizeof(struct iio_event_data),
119 fp_ev); 174 fp_ev);
120 switch (dat.id) { 175 switch (dat.id) {
121 case IIO_EVENT_CODE_RING_100_FULL: 176 case IIO_EVENT_CODE_RING_100_FULL:
122 toread = RingLength; 177 toread = buf_len;
123 break; 178 break;
124 case IIO_EVENT_CODE_RING_75_FULL: 179 case IIO_EVENT_CODE_RING_75_FULL:
125 toread = RingLength*3/4; 180 toread = buf_len*3/4;
126 break; 181 break;
127 case IIO_EVENT_CODE_RING_50_FULL: 182 case IIO_EVENT_CODE_RING_50_FULL:
128 toread = RingLength/2; 183 toread = buf_len/2;
129 break; 184 break;
130 default: 185 default:
131 printf("Unexpecteded event code\n"); 186 printf("Unexpecteded event code\n");
@@ -133,39 +188,51 @@ int main(int argc, char **argv)
133 } 188 }
134 read_size = read(fp, 189 read_size = read(fp,
135 data, 190 data,
136 toread*size_from_scanmode(NumVals, scan_ts)); 191 toread*size_from_scanmode(num_vals, scan_ts));
137 if (read_size == -EAGAIN) { 192 if (read_size == -EAGAIN) {
138 printf("nothing available \n"); 193 printf("nothing available\n");
139 continue; 194 continue;
140 } 195 }
141 196 scan_size = size_from_scanmode(num_vals, scan_ts);
142 for (i = 0; 197 for (i = 0; i < read_size/scan_size; i++) {
143 i < read_size/size_from_scanmode(NumVals, scan_ts); 198 for (k = 0; k < num_vals; k++) {
144 i++) { 199 __s16 val = *(__s16 *)(&data[i*scan_size
145 for (k = 0; k < NumVals; k++) {
146 __s16 val = *(__s16 *)(&data[i*size_from_scanmode(NumVals, scan_ts)
147 + (k)*2]); 200 + (k)*2]);
148 printf("%05d ", val); 201 printf("%05f ", (float)val*gain);
149 } 202 }
150 printf(" %lld\n", 203 printf(" %lld\n",
151 *(__s64 *)(&data[(i+1)*size_from_scanmode(NumVals, scan_ts) 204 *(__s64 *)(&data[(i + 1)
205 *size_from_scanmode(num_vals,
206 scan_ts)
152 - sizeof(__s64)])); 207 - sizeof(__s64)]));
153 } 208 }
154 } 209 }
155 210
156 /* Stop the ring buffer */ 211 /* Stop the ring buffer */
157 if (write_sysfs_int("ring_enable", RingBufferDirectoryName, 0) < 0) { 212 ret = write_sysfs_int("ring_enable", buf_dir_name, 0);
158 printf("Failed to open the ring buffer control file \n"); 213 if (ret < 0)
159 return -1; 214 goto error_close_buffer_event;
160 }; 215
161 216 /* Disconnect from the trigger - just write a dummy name.*/
162 /* Disconnect from the trigger - writing something that doesn't exist.*/ 217 write_sysfs_string("trigger/current_trigger",
163 write_sysfs_string_and_verify("trigger/current_trigger", 218 dev_dir_name, "NULL");
164 BaseDirectoryName, "NULL"); 219
165 free(BaseDirectoryName); 220error_close_buffer_event:
166 free(TriggerDirectoryName); 221 fclose(fp_ev);
167 free(RingBufferDirectoryName); 222error_close_buffer_access:
223 close(fp);
224error_free_data:
168 free(data); 225 free(data);
169 226error_free_buffer_access:
170 return 0; 227 free(buffer_access);
228error_free_buffer_event:
229 free(buffer_event);
230error_free_buf_dir_name:
231 free(buf_dir_name);
232error_free_triggername:
233 free(trigger_name);
234error_free_dev_dir_name:
235 free(dev_dir_name);
236error_ret:
237 return ret;
171} 238}
diff --git a/drivers/staging/iio/Documentation/sysfs-class-iio b/drivers/staging/iio/Documentation/sysfs-class-iio
new file mode 100644
index 000000000000..714b4c57c82a
--- /dev/null
+++ b/drivers/staging/iio/Documentation/sysfs-class-iio
@@ -0,0 +1,294 @@
1
2What: /sys/bus/iio/devices/device[n]
3KernelVersion: 2.6.35
4Contact: linux-iio@vger.kernel.org
5Description:
6 Hardware chip or device accessed by on communication port.
7 Corresponds to a grouping of sensor channels.
8
9What: /sys/bus/iio/devices/trigger[n]
10KernelVersion: 2.6.35
11Contact: linux-iio@vger.kernel.org
12Description:
13 An event driven driver of data capture to an in kernel buffer.
14 May be provided by a device driver that also has an IIO device
15 based on hardware generated events (e.g. data ready) or
16 provided by a separate driver for other hardware (e.g.
17 periodic timer, gpio or high resolution timer).
18 Contains trigger type specific elements. These do not
19 generalize well and hence are not documented in this file.
20
21What: /sys/bus/iio/devices/device[n]:buffer
22KernelVersion: 2.6.35
23Contact: linux-iio@vger.kernel.org
24Description:
25 Link to /sys/class/iio/device[n]/device[n]:buffer. n indicates the
26 device with which this buffer buffer is associated.
27
28What: /sys/.../device[n]/name
29KernelVersion: 2.6.35
30Contact: linux-iio@vger.kernel.org
31Description:
32 Description of the physical chip / device. Typically a part
33 number.
34
35What: /sys/.../device[n]/sampling_frequency
36KernelVersion: 2.6.35
37Contact: linux-iio@vger.kernel.org
38Description:
39 Some devices have internal clocks. This parameter sets the
40 resulting sampling frequency. In many devices this
41 parameter has an effect on input filters etc rather than
42 simply controlling when the input is sampled. As this
43 effects datardy triggers, hardware buffers and the sysfs
44 direct access interfaces, it may be found in any of the
45 relevant directories. If it effects all of the above
46 then it is to be found in the base device directory as here.
47
48What: /sys/.../device[n]/sampling_frequency_available
49KernelVersion: 2.6.35
50Contact: linux-iio@vger.kernel.org
51Description:
52 When the internal sampling clock can only take a small
53 discrete set of values, this file lists those availale.
54
55What: /sys/.../device[n]/in[_name][m]_raw
56KernelVersion: 2.6.35
57Contact: linux-iio@vger.kernel.org
58Description:
59 Raw (unscaled no bias removal etc) voltage measurement from
60 channel m. name is used in special cases where this does
61 not correspond to externally available input (e.g. supply
62 voltage monitoring in which case the file is in_supply_raw).
63
64What: /sys/.../device[n]/in[_name][m]_offset
65KernelVersion: 2.6.35
66Contact: linux-iio@vger.kernel.org
67Description:
68 If known for a device, offset to be added to in[m]_raw prior
69 to scaling by in[_name][m]_scale in order to obtain voltage in
70 millivolts. Not present if the offset is always 0 or unknown.
71 If m is not present, then voltage offset applies to all in
72 channels. May be writable if a variable offset is controlled
73 by the device. Note that this is different to calibbias which
74 is for devices that apply offsets to compensate for variation
75 between different instances of the part, typically adjusted by
76 using some hardware supported calibration procedure.
77
78What: /sys/.../device[n]/in[_name][m]_offset_available
79KernelVersion: 2.6.35
80Contact: linux-iio@vger.kernel.org
81Description:
82 If a small number of discrete offset values are available, this
83 will be a space separated list. If these are independant (but
84 options the same) for individual offsets then m should not be
85 present.
86
87What: /sys/.../device[n]/in[_name][m]_offset_[min|max]
88KernelVersion: 2.6.35
89Contact: linux-iio@vger.kernel.org
90Description:
91 If a more or less continuous range of voltage offsets are supported
92 then these specify the minimum and maximum. If shared by all
93 in channels then m is not present.
94
95What: /sys/.../device[n]/in[_name][m]_calibbias
96KernelVersion: 2.6.35
97Contact: linux-iio@vger.kernel.org
98Description:
99 Hardware applied calibration offset. (assumed to fix production
100 inaccuracies)
101
102What /sys/.../device[n]/in[_name][m]_calibscale
103KernelVersion: 2.6.35
104Contact: linux-iio@vger.kernel.org
105Description:
106 Hardware applied calibration scale factor. (assumed to fix production
107 inaccuracies)
108
109What: /sys/.../device[n]/in[_name][m]_scale
110KernelVersion: 2.6.35
111Contact: linux-iio@vger.kernel.org
112Description:
113 If known for a device, scale to be applied to volt[m]_raw post
114 addition of in[_name][m]_offset in order to obtain the measured
115 voltage in millivolts. If shared across all in channels then m is not present.
116
117What: /sys/.../device[n]/in[m]-in[o]_raw
118KernelVersion: 2.6.35
119Contact: linux-iio@vger.kernel.org
120Description:
121 Raw (unscaled) differential voltage measurement equivalent to
122 channel m - channel o where these channel numbers apply to the physically
123 equivalent inputs when non differential readings are separately available.
124 In differential only parts, then all that is required is a consistent
125 labelling.
126
127What: /sys/.../device[n]/accel[_x|_y|_z][m]_raw
128KernelVersion: 2.6.35
129Contact: linux-iio@vger.kernel.org
130Description:
131 Acceleration in direction x, y or z (may be arbitrarily assigned
132 but should match other such assignments on device)
133 channel m (not present if only one accelerometer channel at
134 this orientation). Has all of the equivalent parameters as per in[m].
135 Units after application of scale and offset are m/s^2.
136
137What: /sys/.../device[n]/gyro[_x|_y|_z][m]_raw
138KernelVersion: 2.6.35
139Contact: linux-iio@vger.kernel.org
140Description:
141 Angular velocity about axis x, y or z (may be arbitrarily assigned)
142 channel m (not present if only one gyroscope at this orientation).
143 Data converted by application of offset then scale to
144 radians per second. Has all the equivalent parameters as per in[m].
145
146What: /sys/.../device[n]/incli[_x|_y|_z][m]_raw
147KernelVersion: 2.6.35
148Contact: linux-iio@vger.kernel.org
149Description:
150 Inclination raw reading about axis x, y or z (may be arbitarily
151 assigned) channel m (not present if only one inclinometer at
152 this orientation). Data converted by application of offset
153 and scale to Degrees.
154
155What: /sys/.../device[n]/magn[_x|_y|_z][m]_raw
156KernelVersion: 2.6.35
157Contact: linux-iio@vger.kernel.org
158Description:
159 Magnetic field along axis x, y or z (may be arbitrarily assigned)
160 channel m (not present if only one magnetometer at this orientation).
161 Data converted by application of offset then scale to Gauss
162 Has all the equivalent modifiers as per in[m].
163
164What: /sys/.../device[n]/device[n]:event[m]
165KernelVersion: 2.6.35
166Contact: linux-iio@vger.kernel.org
167Description:
168 Configuration of which hardware generated events are passed up to
169 userspace. Some of these are a bit complex to generalize so this
170 section is a work in progress.
171
172What: /sys/.../device[n]:event[m]/dev
173KernelVersion: 2.6.35
174Contact: linux-iio@vger.kernel.org
175Description:
176 major:minor character device numbers for the event line.
177
178Taking accel_x0 as an example
179
180What: /sys/.../device[n]:event[m]/accel_x0_thresh[_high|_low]_en
181KernelVersion: 2.6.35
182Contact: linux-iio@vger.kernel.org
183Description:
184 Event generated when accel_x0 passes a threshold in correction direction
185 (or stays beyond one). If direction isn't specified, either triggers it.
186 Note driver will assume last p events requested are enabled where p is
187 however many it supports. So if you want to be sure you have
188 set what you think you have, check the contents of these. Drivers
189 may have to buffer any parameters so that they are consistent when a
190 given event type is enabled a future point (and not those for whatever
191 alarm was previously enabled).
192
193What: /sys/.../device[n]:event[m]/accel_x0_roc[_high|_low]_en
194KernelVersion: 2.6.35
195Contact: linux-iio@vger.kernel.org
196Description:
197 Same as above but based on the first differential of the value.
198
199
200What: /sys/.../device[n]:event[m]/accel_x0[_thresh|_roc][_high|_low]_period
201KernelVersion: 2.6.35
202Contact: linux-iio@vger.kernel.org
203Description:
204 A period of time (microsecs) for which the condition must be broken
205 before an interrupt is triggered. Applies to all alarms if type is not
206 specified.
207
208What: /sys/.../device[n]:event[m]/accel_x0[_thresh|_roc][_high|_low]_value
209KernelVersion: 2.6.35
210Contact: linux-iio@vger.kernel.org
211Description:
212 The actual value of the threshold in raw device units obtained by
213 reverse application of scale and offfset to the acceleration in m/s^2.
214
215What: /sys/.../device[n]/scan_elements
216KernelVersion: 2.6.35
217Contact: linux-iio@vger.kernel.org
218Description:
219 Directory containing interfaces for elements that will be captured
220 for a single triggered sample set in the buffer.
221
222What: /sys/.../device[n]/scan_elements/[m]_accel_x0_en
223KernelVersion: 2.6.35
224Contact: linux-iio@vger.kernel.org
225Description:
226 Scan element control for triggered data capture. m implies the
227 ordering within the buffer. Next the type is specified with
228 modifier and channel number as per the sysfs single channel
229 access above.
230
231What: /sys/.../device[n]/scan_elements/accel[_x0]_precision
232KernelVersion: 2.6.35
233Contact: linux-iio@vger.kernel.org
234Description:
235 Scan element precision within the buffer. Note that the
236 data alignment must restrictions must be read from within
237 buffer to work out full data alignment for data read
238 via buffer_access chrdev. _x0 dropped if shared across all
239 acceleration channels.
240
241What: /sys/.../device[n]/scan_elements/accel[_x0]_shift
242KernelVersion: 2.6.35
243Contact: linux-iio@vger.kernel.org
244Description:
245 A bit shift (to right) that must be applied prior to
246 extracting the bits specified by accel[_x0]_precision.
247
248What: /sys/.../device[n]/device[n]:buffer:event/dev
249KernelVersion: 2.6.35
250Contact: linux-iio@vger.kernel.org
251Description:
252 Buffer for device n event character device major:minor numbers.
253
254What: /sys/.../device[n]/device[n]:buffer:access/dev
255KernelVersion: 2.6.35
256Contact: linux-iio@vger.kernel.org
257Description:
258 Buffer for device n access character device o major:minor numbers.
259
260What: /sys/.../device[n]:buffer/trigger
261KernelVersion: 2.6.35
262Contact: linux-iio@vger.kernel.org
263Description:
264 The name of the trigger source being used, as per string given
265 in /sys/class/iio/trigger[n]/name.
266
267What: /sys/.../device[n]:buffer/length
268KernelVersion: 2.6.35
269Contact: linux-iio@vger.kernel.org
270Description:
271 Number of scans contained by the buffer.
272
273What: /sys/.../device[n]:buffer/bps
274KernelVersion: 2.6.35
275Contact: linux-iio@vger.kernel.org
276Description:
277 Bytes per scan. Due to alignment fun, the scan may be larger
278 than implied directly by the scan_element parameters.
279
280What: /sys/.../device[n]:buffer/enable
281KernelVersion: 2.6.35
282Contact: linux-iio@vger.kernel.org
283Description:
284 Actually start the buffer capture up. Will start trigger
285 if first device and appropriate.
286
287What: /sys/.../device[n]:buffer/alignment
288KernelVersion: 2.6.35
289Contact: linux-iio@vger.kernel.org
290Description:
291 Minimum data alignment. Scan elements larger than this are aligned
292 to the nearest power of 2 times this. (may not be true in weird
293 hardware buffers that pack data well)
294
diff --git a/drivers/staging/iio/Documentation/userspace.txt b/drivers/staging/iio/Documentation/userspace.txt
index 661015a0b866..4838818f65ef 100644
--- a/drivers/staging/iio/Documentation/userspace.txt
+++ b/drivers/staging/iio/Documentation/userspace.txt
@@ -56,5 +56,5 @@ KERNEL="ring_event_line*", ID="spi1.0", DRIVER="lis3l02dq", NAME="iio/lis3l02dq_
56KERNEL="event_line*", ID="spi1.0", DRIVER="lis3l02dq", NAME="iio/lis3l02dq_event" 56KERNEL="event_line*", ID="spi1.0", DRIVER="lis3l02dq", NAME="iio/lis3l02dq_event"
57KERNEL="ring_access*", ID="spi1.0", DRIVER="lis3l02dq", NAME="iio/lis3l02dq_ring_access" 57KERNEL="ring_access*", ID="spi1.0", DRIVER="lis3l02dq", NAME="iio/lis3l02dq_ring_access"
58 58
59The files, lis3l02dqbuffersimple.c and iio_util.h in this directory provide an example 59The files, lis3l02dqbuffersimple.c and iio_utils.h in this directory provide an example
60of how to use the ring buffer and event interfaces. 60of how to use the ring buffer and event interfaces.
diff --git a/drivers/staging/iio/Kconfig b/drivers/staging/iio/Kconfig
index ace99f6d1166..b0e62449c621 100644
--- a/drivers/staging/iio/Kconfig
+++ b/drivers/staging/iio/Kconfig
@@ -41,6 +41,8 @@ config IIO_TRIGGER
41 41
42source "drivers/staging/iio/accel/Kconfig" 42source "drivers/staging/iio/accel/Kconfig"
43source "drivers/staging/iio/adc/Kconfig" 43source "drivers/staging/iio/adc/Kconfig"
44source "drivers/staging/iio/gyro/Kconfig"
45source "drivers/staging/iio/imu/Kconfig"
44source "drivers/staging/iio/light/Kconfig" 46source "drivers/staging/iio/light/Kconfig"
45 47
46source "drivers/staging/iio/trigger/Kconfig" 48source "drivers/staging/iio/trigger/Kconfig"
diff --git a/drivers/staging/iio/Makefile b/drivers/staging/iio/Makefile
index 7ec021810a77..3502b39f0847 100644
--- a/drivers/staging/iio/Makefile
+++ b/drivers/staging/iio/Makefile
@@ -11,6 +11,8 @@ obj-$(CONFIG_IIO_SW_RING) += ring_sw.o
11 11
12obj-y += accel/ 12obj-y += accel/
13obj-y += adc/ 13obj-y += adc/
14obj-y += gyro/
15obj-y += imu/
14obj-y += light/ 16obj-y += light/
15 17
16obj-y += trigger/ \ No newline at end of file 18obj-y += trigger/ \ No newline at end of file
diff --git a/drivers/staging/iio/accel/Kconfig b/drivers/staging/iio/accel/Kconfig
index 3d3c3339dbc7..b4e57d1bc87d 100644
--- a/drivers/staging/iio/accel/Kconfig
+++ b/drivers/staging/iio/accel/Kconfig
@@ -3,6 +3,31 @@
3# 3#
4comment "Accelerometers" 4comment "Accelerometers"
5 5
6config ADIS16209
7 tristate "Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer"
8 depends on SPI
9 select IIO_TRIGGER if IIO_RING_BUFFER
10 select IIO_SW_RING if IIO_RING_BUFFER
11 help
12 Say yes here to build support for Analog Devices adis16209 dual-axis digital inclinometer
13 and accelerometer.
14
15config ADIS16220
16 tristate "Analog Devices ADIS16220 Programmable Digital Vibration Sensor driver"
17 depends on SPI
18 help
19 Say yes here to build support for Analog Devices adis16220 programmable
20 digital vibration sensor.
21
22config ADIS16240
23 tristate "Analog Devices ADIS16240 Programmable Impact Sensor and Recorder"
24 depends on SPI
25 select IIO_TRIGGER if IIO_RING_BUFFER
26 select IIO_SW_RING if IIO_RING_BUFFER
27 help
28 Say yes here to build support for Analog Devices adis16240 programmable
29 impact Sensor and recorder.
30
6config KXSD9 31config KXSD9
7 tristate "Kionix KXSD9 Accelerometer Driver" 32 tristate "Kionix KXSD9 Accelerometer Driver"
8 depends on SPI 33 depends on SPI
diff --git a/drivers/staging/iio/accel/Makefile b/drivers/staging/iio/accel/Makefile
index d5335f9094ad..c34b13634c2d 100644
--- a/drivers/staging/iio/accel/Makefile
+++ b/drivers/staging/iio/accel/Makefile
@@ -1,6 +1,17 @@
1# 1#
2# Makefile for industrial I/O accelerometer drivers 2# Makefile for industrial I/O accelerometer drivers
3# 3#
4adis16209-y := adis16209_core.o
5adis16209-$(CONFIG_IIO_RING_BUFFER) += adis16209_ring.o adis16209_trigger.o
6obj-$(CONFIG_ADIS16209) += adis16209.o
7
8adis16220-y := adis16220_core.o
9obj-$(CONFIG_ADIS16220) += adis16220.o
10
11adis16240-y := adis16240_core.o
12adis16240-$(CONFIG_IIO_RING_BUFFER) += adis16240_ring.o adis16240_trigger.o
13obj-$(CONFIG_ADIS16240) += adis16240.o
14
4obj-$(CONFIG_KXSD9) += kxsd9.o 15obj-$(CONFIG_KXSD9) += kxsd9.o
5 16
6lis3l02dq-y := lis3l02dq_core.o 17lis3l02dq-y := lis3l02dq_core.o
diff --git a/drivers/staging/iio/accel/accel.h b/drivers/staging/iio/accel/accel.h
index d7fc7f98348e..1b6e37f76200 100644
--- a/drivers/staging/iio/accel/accel.h
+++ b/drivers/staging/iio/accel/accel.h
@@ -2,6 +2,8 @@
2#include "../sysfs.h" 2#include "../sysfs.h"
3 3
4/* Accelerometer types of attribute */ 4/* Accelerometer types of attribute */
5#define IIO_DEV_ATTR_ACCEL_OFFSET(_mode, _show, _store, _addr) \
6 IIO_DEVICE_ATTR(accel_offset, _mode, _show, _store, _addr)
5 7
6#define IIO_DEV_ATTR_ACCEL_X_OFFSET(_mode, _show, _store, _addr) \ 8#define IIO_DEV_ATTR_ACCEL_X_OFFSET(_mode, _show, _store, _addr) \
7 IIO_DEVICE_ATTR(accel_x_offset, _mode, _show, _store, _addr) 9 IIO_DEVICE_ATTR(accel_x_offset, _mode, _show, _store, _addr)
@@ -21,14 +23,17 @@
21#define IIO_DEV_ATTR_ACCEL_Z_GAIN(_mode, _show, _store, _addr) \ 23#define IIO_DEV_ATTR_ACCEL_Z_GAIN(_mode, _show, _store, _addr) \
22 IIO_DEVICE_ATTR(accel_z_gain, _mode, _show, _store, _addr) 24 IIO_DEVICE_ATTR(accel_z_gain, _mode, _show, _store, _addr)
23 25
26#define IIO_DEV_ATTR_ACCEL(_show, _addr) \
27 IIO_DEVICE_ATTR(accel_raw, S_IRUGO, _show, NULL, _addr)
28
24#define IIO_DEV_ATTR_ACCEL_X(_show, _addr) \ 29#define IIO_DEV_ATTR_ACCEL_X(_show, _addr) \
25 IIO_DEVICE_ATTR(accel_x, S_IRUGO, _show, NULL, _addr) 30 IIO_DEVICE_ATTR(accel_x_raw, S_IRUGO, _show, NULL, _addr)
26 31
27#define IIO_DEV_ATTR_ACCEL_Y(_show, _addr) \ 32#define IIO_DEV_ATTR_ACCEL_Y(_show, _addr) \
28 IIO_DEVICE_ATTR(accel_y, S_IRUGO, _show, NULL, _addr) 33 IIO_DEVICE_ATTR(accel_y_raw, S_IRUGO, _show, NULL, _addr)
29 34
30#define IIO_DEV_ATTR_ACCEL_Z(_show, _addr) \ 35#define IIO_DEV_ATTR_ACCEL_Z(_show, _addr) \
31 IIO_DEVICE_ATTR(accel_z, S_IRUGO, _show, NULL, _addr) 36 IIO_DEVICE_ATTR(accel_z_raw, S_IRUGO, _show, NULL, _addr)
32 37
33/* Thresholds are somewhat chip dependent - may need quite a few defs here */ 38/* Thresholds are somewhat chip dependent - may need quite a few defs here */
34/* For unified thresholds (shared across all directions */ 39/* For unified thresholds (shared across all directions */
@@ -61,7 +66,6 @@
61#define IIO_DEV_ATTR_ACCEL_THRESH_Z(_mode, _show, _store, _addr) \ 66#define IIO_DEV_ATTR_ACCEL_THRESH_Z(_mode, _show, _store, _addr) \
62 IIO_DEVICE_ATTR(thresh_accel_z, _mode, _show, _store, _addr) 67 IIO_DEVICE_ATTR(thresh_accel_z, _mode, _show, _store, _addr)
63 68
64
65/** 69/**
66 * IIO_EVENT_ATTR_ACCEL_X_HIGH: threshold event, x acceleration 70 * IIO_EVENT_ATTR_ACCEL_X_HIGH: threshold event, x acceleration
67 * @_show: read x acceleration high threshold 71 * @_show: read x acceleration high threshold
diff --git a/drivers/staging/iio/accel/adis16209.h b/drivers/staging/iio/accel/adis16209.h
new file mode 100644
index 000000000000..877fd2a48380
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16209.h
@@ -0,0 +1,193 @@
1#ifndef SPI_ADIS16209_H_
2#define SPI_ADIS16209_H_
3
4#define ADIS16209_STARTUP_DELAY 220 /* ms */
5
6#define ADIS16209_READ_REG(a) a
7#define ADIS16209_WRITE_REG(a) ((a) | 0x80)
8
9/* Flash memory write count */
10#define ADIS16209_FLASH_CNT 0x00
11/* Output, power supply */
12#define ADIS16209_SUPPLY_OUT 0x02
13/* Output, x-axis accelerometer */
14#define ADIS16209_XACCL_OUT 0x04
15/* Output, y-axis accelerometer */
16#define ADIS16209_YACCL_OUT 0x06
17/* Output, auxiliary ADC input */
18#define ADIS16209_AUX_ADC 0x08
19/* Output, temperature */
20#define ADIS16209_TEMP_OUT 0x0A
21/* Output, x-axis inclination */
22#define ADIS16209_XINCL_OUT 0x0C
23/* Output, y-axis inclination */
24#define ADIS16209_YINCL_OUT 0x0E
25/* Output, +/-180 vertical rotational position */
26#define ADIS16209_ROT_OUT 0x10
27/* Calibration, x-axis acceleration offset null */
28#define ADIS16209_XACCL_NULL 0x12
29/* Calibration, y-axis acceleration offset null */
30#define ADIS16209_YACCL_NULL 0x14
31/* Calibration, x-axis inclination offset null */
32#define ADIS16209_XINCL_NULL 0x16
33/* Calibration, y-axis inclination offset null */
34#define ADIS16209_YINCL_NULL 0x18
35/* Calibration, vertical rotation offset null */
36#define ADIS16209_ROT_NULL 0x1A
37/* Alarm 1 amplitude threshold */
38#define ADIS16209_ALM_MAG1 0x20
39/* Alarm 2 amplitude threshold */
40#define ADIS16209_ALM_MAG2 0x22
41/* Alarm 1, sample period */
42#define ADIS16209_ALM_SMPL1 0x24
43/* Alarm 2, sample period */
44#define ADIS16209_ALM_SMPL2 0x26
45/* Alarm control */
46#define ADIS16209_ALM_CTRL 0x28
47/* Auxiliary DAC data */
48#define ADIS16209_AUX_DAC 0x30
49/* General-purpose digital input/output control */
50#define ADIS16209_GPIO_CTRL 0x32
51/* Miscellaneous control */
52#define ADIS16209_MSC_CTRL 0x34
53/* Internal sample period (rate) control */
54#define ADIS16209_SMPL_PRD 0x36
55/* Operation, filter configuration */
56#define ADIS16209_AVG_CNT 0x38
57/* Operation, sleep mode control */
58#define ADIS16209_SLP_CNT 0x3A
59/* Diagnostics, system status register */
60#define ADIS16209_DIAG_STAT 0x3C
61/* Operation, system command register */
62#define ADIS16209_GLOB_CMD 0x3E
63
64#define ADIS16209_OUTPUTS 8
65
66/* MSC_CTRL */
67/* Self-test at power-on: 1 = disabled, 0 = enabled */
68#define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST (1 << 10)
69/* Self-test enable */
70#define ADIS16209_MSC_CTRL_SELF_TEST_EN (1 << 8)
71/* Data-ready enable: 1 = enabled, 0 = disabled */
72#define ADIS16209_MSC_CTRL_DATA_RDY_EN (1 << 2)
73/* Data-ready polarity: 1 = active high, 0 = active low */
74#define ADIS16209_MSC_CTRL_ACTIVE_HIGH (1 << 1)
75/* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
76#define ADIS16209_MSC_CTRL_DATA_RDY_DIO2 (1 << 0)
77
78/* DIAG_STAT */
79/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
80#define ADIS16209_DIAG_STAT_ALARM2 (1<<9)
81/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
82#define ADIS16209_DIAG_STAT_ALARM1 (1<<8)
83/* Self-test diagnostic error flag: 1 = error condition, 0 = normal operation */
84#define ADIS16209_DIAG_STAT_SELFTEST_FAIL (1<<5)
85/* SPI communications failure */
86#define ADIS16209_DIAG_STAT_SPI_FAIL (1<<3)
87/* Flash update failure */
88#define ADIS16209_DIAG_STAT_FLASH_UPT (1<<2)
89/* Power supply above 3.625 V */
90#define ADIS16209_DIAG_STAT_POWER_HIGH (1<<1)
91/* Power supply below 3.15 V */
92#define ADIS16209_DIAG_STAT_POWER_LOW (1<<0)
93
94/* GLOB_CMD */
95#define ADIS16209_GLOB_CMD_SW_RESET (1<<7)
96#define ADIS16209_GLOB_CMD_CLEAR_STAT (1<<4)
97#define ADIS16209_GLOB_CMD_FACTORY_CAL (1<<1)
98
99#define ADIS16209_MAX_TX 24
100#define ADIS16209_MAX_RX 24
101
102#define ADIS16209_ERROR_ACTIVE (1<<14)
103
104/**
105 * struct adis16209_state - device instance specific data
106 * @us: actual spi_device
107 * @work_trigger_to_ring: bh for triggered event handling
108 * @work_cont_thresh: CLEAN
109 * @inter: used to check if new interrupt has been triggered
110 * @last_timestamp: passing timestamp from th to bh of interrupt handler
111 * @indio_dev: industrial I/O device structure
112 * @trig: data ready trigger registered with iio
113 * @tx: transmit buffer
114 * @rx: recieve buffer
115 * @buf_lock: mutex to protect tx and rx
116 **/
117struct adis16209_state {
118 struct spi_device *us;
119 struct work_struct work_trigger_to_ring;
120 struct iio_work_cont work_cont_thresh;
121 s64 last_timestamp;
122 struct iio_dev *indio_dev;
123 struct iio_trigger *trig;
124 u8 *tx;
125 u8 *rx;
126 struct mutex buf_lock;
127};
128
129int adis16209_set_irq(struct device *dev, bool enable);
130
131#ifdef CONFIG_IIO_RING_BUFFER
132enum adis16209_scan {
133 ADIS16209_SCAN_SUPPLY,
134 ADIS16209_SCAN_ACC_X,
135 ADIS16209_SCAN_ACC_Y,
136 ADIS16209_SCAN_AUX_ADC,
137 ADIS16209_SCAN_TEMP,
138 ADIS16209_SCAN_INCLI_X,
139 ADIS16209_SCAN_INCLI_Y,
140 ADIS16209_SCAN_ROT,
141};
142
143void adis16209_remove_trigger(struct iio_dev *indio_dev);
144int adis16209_probe_trigger(struct iio_dev *indio_dev);
145
146ssize_t adis16209_read_data_from_ring(struct device *dev,
147 struct device_attribute *attr,
148 char *buf);
149
150int adis16209_configure_ring(struct iio_dev *indio_dev);
151void adis16209_unconfigure_ring(struct iio_dev *indio_dev);
152
153int adis16209_initialize_ring(struct iio_ring_buffer *ring);
154void adis16209_uninitialize_ring(struct iio_ring_buffer *ring);
155#else /* CONFIG_IIO_RING_BUFFER */
156
157static inline void adis16209_remove_trigger(struct iio_dev *indio_dev)
158{
159}
160
161static inline int adis16209_probe_trigger(struct iio_dev *indio_dev)
162{
163 return 0;
164}
165
166static inline ssize_t
167adis16209_read_data_from_ring(struct device *dev,
168 struct device_attribute *attr,
169 char *buf)
170{
171 return 0;
172}
173
174static int adis16209_configure_ring(struct iio_dev *indio_dev)
175{
176 return 0;
177}
178
179static inline void adis16209_unconfigure_ring(struct iio_dev *indio_dev)
180{
181}
182
183static inline int adis16209_initialize_ring(struct iio_ring_buffer *ring)
184{
185 return 0;
186}
187
188static inline void adis16209_uninitialize_ring(struct iio_ring_buffer *ring)
189{
190}
191
192#endif /* CONFIG_IIO_RING_BUFFER */
193#endif /* SPI_ADIS16209_H_ */
diff --git a/drivers/staging/iio/accel/adis16209_core.c b/drivers/staging/iio/accel/adis16209_core.c
new file mode 100644
index 000000000000..ac375c50f56f
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16209_core.c
@@ -0,0 +1,615 @@
1/*
2 * ADIS16209 Programmable Digital Vibration Sensor driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/gpio.h>
12#include <linux/delay.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/spi/spi.h>
17
18#include <linux/sysfs.h>
19#include <linux/list.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "accel.h"
24#include "inclinometer.h"
25#include "../gyro/gyro.h"
26#include "../adc/adc.h"
27
28#include "adis16209.h"
29
30#define DRIVER_NAME "adis16209"
31
32static int adis16209_check_status(struct device *dev);
33
34/**
35 * adis16209_spi_write_reg_8() - write single byte to a register
36 * @dev: device associated with child of actual device (iio_dev or iio_trig)
37 * @reg_address: the address of the register to be written
38 * @val: the value to write
39 **/
40static int adis16209_spi_write_reg_8(struct device *dev,
41 u8 reg_address,
42 u8 val)
43{
44 int ret;
45 struct iio_dev *indio_dev = dev_get_drvdata(dev);
46 struct adis16209_state *st = iio_dev_get_devdata(indio_dev);
47
48 mutex_lock(&st->buf_lock);
49 st->tx[0] = ADIS16209_WRITE_REG(reg_address);
50 st->tx[1] = val;
51
52 ret = spi_write(st->us, st->tx, 2);
53 mutex_unlock(&st->buf_lock);
54
55 return ret;
56}
57
58/**
59 * adis16209_spi_write_reg_16() - write 2 bytes to a pair of registers
60 * @dev: device associated with child of actual device (iio_dev or iio_trig)
61 * @reg_address: the address of the lower of the two registers. Second register
62 * is assumed to have address one greater.
63 * @val: value to be written
64 **/
65static int adis16209_spi_write_reg_16(struct device *dev,
66 u8 lower_reg_address,
67 u16 value)
68{
69 int ret;
70 struct spi_message msg;
71 struct iio_dev *indio_dev = dev_get_drvdata(dev);
72 struct adis16209_state *st = iio_dev_get_devdata(indio_dev);
73 struct spi_transfer xfers[] = {
74 {
75 .tx_buf = st->tx,
76 .bits_per_word = 8,
77 .len = 2,
78 .cs_change = 1,
79 }, {
80 .tx_buf = st->tx + 2,
81 .bits_per_word = 8,
82 .len = 2,
83 .cs_change = 1,
84 },
85 };
86
87 mutex_lock(&st->buf_lock);
88 st->tx[0] = ADIS16209_WRITE_REG(lower_reg_address);
89 st->tx[1] = value & 0xFF;
90 st->tx[2] = ADIS16209_WRITE_REG(lower_reg_address + 1);
91 st->tx[3] = (value >> 8) & 0xFF;
92
93 spi_message_init(&msg);
94 spi_message_add_tail(&xfers[0], &msg);
95 spi_message_add_tail(&xfers[1], &msg);
96 ret = spi_sync(st->us, &msg);
97 mutex_unlock(&st->buf_lock);
98
99 return ret;
100}
101
102/**
103 * adis16209_spi_read_reg_16() - read 2 bytes from a 16-bit register
104 * @dev: device associated with child of actual device (iio_dev or iio_trig)
105 * @reg_address: the address of the lower of the two registers. Second register
106 * is assumed to have address one greater.
107 * @val: somewhere to pass back the value read
108 **/
109static int adis16209_spi_read_reg_16(struct device *dev,
110 u8 lower_reg_address,
111 u16 *val)
112{
113 struct spi_message msg;
114 struct iio_dev *indio_dev = dev_get_drvdata(dev);
115 struct adis16209_state *st = iio_dev_get_devdata(indio_dev);
116 int ret;
117 struct spi_transfer xfers[] = {
118 {
119 .tx_buf = st->tx,
120 .bits_per_word = 8,
121 .len = 2,
122 .cs_change = 1,
123 .delay_usecs = 20,
124 }, {
125 .rx_buf = st->rx,
126 .bits_per_word = 8,
127 .len = 2,
128 .cs_change = 1,
129 .delay_usecs = 20,
130 },
131 };
132
133 mutex_lock(&st->buf_lock);
134 st->tx[0] = ADIS16209_READ_REG(lower_reg_address);
135 st->tx[1] = 0;
136
137 spi_message_init(&msg);
138 spi_message_add_tail(&xfers[0], &msg);
139 spi_message_add_tail(&xfers[1], &msg);
140 ret = spi_sync(st->us, &msg);
141 if (ret) {
142 dev_err(&st->us->dev,
143 "problem when reading 16 bit register 0x%02X",
144 lower_reg_address);
145 goto error_ret;
146 }
147 *val = (st->rx[0] << 8) | st->rx[1];
148
149error_ret:
150 mutex_unlock(&st->buf_lock);
151 return ret;
152}
153
154static ssize_t adis16209_read_12bit_unsigned(struct device *dev,
155 struct device_attribute *attr,
156 char *buf)
157{
158 int ret;
159 u16 val = 0;
160 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
161
162 ret = adis16209_spi_read_reg_16(dev, this_attr->address, &val);
163 if (ret)
164 return ret;
165
166 if (val & ADIS16209_ERROR_ACTIVE)
167 adis16209_check_status(dev);
168
169 return sprintf(buf, "%u\n", val & 0x0FFF);
170}
171
172static ssize_t adis16209_read_14bit_unsigned(struct device *dev,
173 struct device_attribute *attr,
174 char *buf)
175{
176 int ret;
177 u16 val = 0;
178 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
179
180 ret = adis16209_spi_read_reg_16(dev, this_attr->address, &val);
181 if (ret)
182 return ret;
183
184 if (val & ADIS16209_ERROR_ACTIVE)
185 adis16209_check_status(dev);
186
187 return sprintf(buf, "%u\n", val & 0x3FFF);
188}
189
190static ssize_t adis16209_read_temp(struct device *dev,
191 struct device_attribute *attr,
192 char *buf)
193{
194 struct iio_dev *indio_dev = dev_get_drvdata(dev);
195 ssize_t ret;
196 u16 val;
197
198 /* Take the iio_dev status lock */
199 mutex_lock(&indio_dev->mlock);
200
201 ret = adis16209_spi_read_reg_16(dev, ADIS16209_TEMP_OUT, (u16 *)&val);
202 if (ret)
203 goto error_ret;
204
205 if (val & ADIS16209_ERROR_ACTIVE)
206 adis16209_check_status(dev);
207
208 val &= 0xFFF;
209 ret = sprintf(buf, "%d\n", val);
210
211error_ret:
212 mutex_unlock(&indio_dev->mlock);
213 return ret;
214}
215
216static ssize_t adis16209_read_14bit_signed(struct device *dev,
217 struct device_attribute *attr,
218 char *buf)
219{
220 struct iio_dev *indio_dev = dev_get_drvdata(dev);
221 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
222 s16 val = 0;
223 ssize_t ret;
224
225 mutex_lock(&indio_dev->mlock);
226
227 ret = adis16209_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
228 if (!ret) {
229 if (val & ADIS16209_ERROR_ACTIVE)
230 adis16209_check_status(dev);
231
232 val = ((s16)(val << 2) >> 2);
233 ret = sprintf(buf, "%d\n", val);
234 }
235
236 mutex_unlock(&indio_dev->mlock);
237
238 return ret;
239}
240
241static ssize_t adis16209_write_16bit(struct device *dev,
242 struct device_attribute *attr,
243 const char *buf,
244 size_t len)
245{
246 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
247 int ret;
248 long val;
249
250 ret = strict_strtol(buf, 10, &val);
251 if (ret)
252 goto error_ret;
253 ret = adis16209_spi_write_reg_16(dev, this_attr->address, val);
254
255error_ret:
256 return ret ? ret : len;
257}
258
259static int adis16209_reset(struct device *dev)
260{
261 int ret;
262 ret = adis16209_spi_write_reg_8(dev,
263 ADIS16209_GLOB_CMD,
264 ADIS16209_GLOB_CMD_SW_RESET);
265 if (ret)
266 dev_err(dev, "problem resetting device");
267
268 return ret;
269}
270
271static ssize_t adis16209_write_reset(struct device *dev,
272 struct device_attribute *attr,
273 const char *buf, size_t len)
274{
275 if (len < 1)
276 return -EINVAL;
277 switch (buf[0]) {
278 case '1':
279 case 'y':
280 case 'Y':
281 return adis16209_reset(dev);
282 }
283 return -EINVAL;
284}
285
286int adis16209_set_irq(struct device *dev, bool enable)
287{
288 int ret = 0;
289 u16 msc;
290
291 ret = adis16209_spi_read_reg_16(dev, ADIS16209_MSC_CTRL, &msc);
292 if (ret)
293 goto error_ret;
294
295 msc |= ADIS16209_MSC_CTRL_ACTIVE_HIGH;
296 msc &= ~ADIS16209_MSC_CTRL_DATA_RDY_DIO2;
297 if (enable)
298 msc |= ADIS16209_MSC_CTRL_DATA_RDY_EN;
299 else
300 msc &= ~ADIS16209_MSC_CTRL_DATA_RDY_EN;
301
302 ret = adis16209_spi_write_reg_16(dev, ADIS16209_MSC_CTRL, msc);
303
304error_ret:
305 return ret;
306}
307
308static int adis16209_check_status(struct device *dev)
309{
310 u16 status;
311 int ret;
312
313 ret = adis16209_spi_read_reg_16(dev, ADIS16209_DIAG_STAT, &status);
314 if (ret < 0) {
315 dev_err(dev, "Reading status failed\n");
316 goto error_ret;
317 }
318 ret = status & 0x1F;
319
320 if (status & ADIS16209_DIAG_STAT_SELFTEST_FAIL)
321 dev_err(dev, "Self test failure\n");
322 if (status & ADIS16209_DIAG_STAT_SPI_FAIL)
323 dev_err(dev, "SPI failure\n");
324 if (status & ADIS16209_DIAG_STAT_FLASH_UPT)
325 dev_err(dev, "Flash update failed\n");
326 if (status & ADIS16209_DIAG_STAT_POWER_HIGH)
327 dev_err(dev, "Power supply above 3.625V\n");
328 if (status & ADIS16209_DIAG_STAT_POWER_LOW)
329 dev_err(dev, "Power supply below 3.15V\n");
330
331error_ret:
332 return ret;
333}
334
335static int adis16209_self_test(struct device *dev)
336{
337 int ret;
338 ret = adis16209_spi_write_reg_16(dev,
339 ADIS16209_MSC_CTRL,
340 ADIS16209_MSC_CTRL_SELF_TEST_EN);
341 if (ret) {
342 dev_err(dev, "problem starting self test");
343 goto err_ret;
344 }
345
346 adis16209_check_status(dev);
347
348err_ret:
349 return ret;
350}
351
352static int adis16209_initial_setup(struct adis16209_state *st)
353{
354 int ret;
355 struct device *dev = &st->indio_dev->dev;
356
357 /* Disable IRQ */
358 ret = adis16209_set_irq(dev, false);
359 if (ret) {
360 dev_err(dev, "disable irq failed");
361 goto err_ret;
362 }
363
364 /* Do self test */
365 ret = adis16209_self_test(dev);
366 if (ret) {
367 dev_err(dev, "self test failure");
368 goto err_ret;
369 }
370
371 /* Read status register to check the result */
372 ret = adis16209_check_status(dev);
373 if (ret) {
374 adis16209_reset(dev);
375 dev_err(dev, "device not playing ball -> reset");
376 msleep(ADIS16209_STARTUP_DELAY);
377 ret = adis16209_check_status(dev);
378 if (ret) {
379 dev_err(dev, "giving up");
380 goto err_ret;
381 }
382 }
383
384 printk(KERN_INFO DRIVER_NAME ": at CS%d (irq %d)\n",
385 st->us->chip_select, st->us->irq);
386
387err_ret:
388 return ret;
389}
390
391static IIO_DEV_ATTR_IN_NAMED_RAW(supply, adis16209_read_14bit_unsigned,
392 ADIS16209_SUPPLY_OUT);
393static IIO_CONST_ATTR(in_supply_scale, "0.30518");
394static IIO_DEV_ATTR_IN_RAW(0, adis16209_read_12bit_unsigned,
395 ADIS16209_AUX_ADC);
396static IIO_CONST_ATTR(in0_scale, "0.6105");
397
398static IIO_DEV_ATTR_ACCEL_X(adis16209_read_14bit_signed,
399 ADIS16209_XACCL_OUT);
400static IIO_DEV_ATTR_ACCEL_Y(adis16209_read_14bit_signed,
401 ADIS16209_YACCL_OUT);
402static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO,
403 adis16209_read_14bit_signed,
404 adis16209_write_16bit,
405 ADIS16209_XACCL_NULL);
406static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO,
407 adis16209_read_14bit_signed,
408 adis16209_write_16bit,
409 ADIS16209_YACCL_NULL);
410static IIO_CONST_ATTR(accel_scale, "0.24414");
411
412static IIO_DEV_ATTR_INCLI_X(adis16209_read_14bit_signed,
413 ADIS16209_XINCL_OUT);
414static IIO_DEV_ATTR_INCLI_Y(adis16209_read_14bit_signed,
415 ADIS16209_YINCL_OUT);
416static IIO_DEV_ATTR_INCLI_X_OFFSET(S_IWUSR | S_IRUGO,
417 adis16209_read_14bit_signed,
418 adis16209_write_16bit,
419 ADIS16209_XACCL_NULL);
420static IIO_DEV_ATTR_INCLI_Y_OFFSET(S_IWUSR | S_IRUGO,
421 adis16209_read_14bit_signed,
422 adis16209_write_16bit,
423 ADIS16209_YACCL_NULL);
424static IIO_CONST_ATTR(incli_scale, "0.025");
425
426static IIO_DEVICE_ATTR(rot_raw, S_IRUGO, adis16209_read_14bit_signed,
427 NULL, ADIS16209_ROT_OUT);
428
429static IIO_DEV_ATTR_TEMP(adis16209_read_temp);
430static IIO_CONST_ATTR(temp_offset, "25");
431static IIO_CONST_ATTR(temp_scale, "-0.47");
432
433static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16209_write_reset, 0);
434
435static IIO_CONST_ATTR(name, "adis16209");
436
437static struct attribute *adis16209_event_attributes[] = {
438 NULL
439};
440
441static struct attribute_group adis16209_event_attribute_group = {
442 .attrs = adis16209_event_attributes,
443};
444
445static struct attribute *adis16209_attributes[] = {
446 &iio_dev_attr_in_supply_raw.dev_attr.attr,
447 &iio_const_attr_in_supply_scale.dev_attr.attr,
448 &iio_dev_attr_temp.dev_attr.attr,
449 &iio_const_attr_temp_offset.dev_attr.attr,
450 &iio_const_attr_temp_scale.dev_attr.attr,
451 &iio_dev_attr_reset.dev_attr.attr,
452 &iio_const_attr_name.dev_attr.attr,
453 &iio_dev_attr_in0_raw.dev_attr.attr,
454 &iio_const_attr_in0_scale.dev_attr.attr,
455 &iio_dev_attr_accel_x_raw.dev_attr.attr,
456 &iio_dev_attr_accel_y_raw.dev_attr.attr,
457 &iio_dev_attr_accel_x_offset.dev_attr.attr,
458 &iio_dev_attr_accel_y_offset.dev_attr.attr,
459 &iio_const_attr_accel_scale.dev_attr.attr,
460 &iio_dev_attr_incli_x_raw.dev_attr.attr,
461 &iio_dev_attr_incli_y_raw.dev_attr.attr,
462 &iio_dev_attr_incli_x_offset.dev_attr.attr,
463 &iio_dev_attr_incli_y_offset.dev_attr.attr,
464 &iio_const_attr_incli_scale.dev_attr.attr,
465 &iio_dev_attr_rot_raw.dev_attr.attr,
466 NULL
467};
468
469static const struct attribute_group adis16209_attribute_group = {
470 .attrs = adis16209_attributes,
471};
472
473static int __devinit adis16209_probe(struct spi_device *spi)
474{
475 int ret, regdone = 0;
476 struct adis16209_state *st = kzalloc(sizeof *st, GFP_KERNEL);
477 if (!st) {
478 ret = -ENOMEM;
479 goto error_ret;
480 }
481 /* this is only used for removal purposes */
482 spi_set_drvdata(spi, st);
483
484 /* Allocate the comms buffers */
485 st->rx = kzalloc(sizeof(*st->rx)*ADIS16209_MAX_RX, GFP_KERNEL);
486 if (st->rx == NULL) {
487 ret = -ENOMEM;
488 goto error_free_st;
489 }
490 st->tx = kzalloc(sizeof(*st->tx)*ADIS16209_MAX_TX, GFP_KERNEL);
491 if (st->tx == NULL) {
492 ret = -ENOMEM;
493 goto error_free_rx;
494 }
495 st->us = spi;
496 mutex_init(&st->buf_lock);
497 /* setup the industrialio driver allocated elements */
498 st->indio_dev = iio_allocate_device();
499 if (st->indio_dev == NULL) {
500 ret = -ENOMEM;
501 goto error_free_tx;
502 }
503
504 st->indio_dev->dev.parent = &spi->dev;
505 st->indio_dev->num_interrupt_lines = 1;
506 st->indio_dev->event_attrs = &adis16209_event_attribute_group;
507 st->indio_dev->attrs = &adis16209_attribute_group;
508 st->indio_dev->dev_data = (void *)(st);
509 st->indio_dev->driver_module = THIS_MODULE;
510 st->indio_dev->modes = INDIO_DIRECT_MODE;
511
512 ret = adis16209_configure_ring(st->indio_dev);
513 if (ret)
514 goto error_free_dev;
515
516 ret = iio_device_register(st->indio_dev);
517 if (ret)
518 goto error_unreg_ring_funcs;
519 regdone = 1;
520
521 ret = adis16209_initialize_ring(st->indio_dev->ring);
522 if (ret) {
523 printk(KERN_ERR "failed to initialize the ring\n");
524 goto error_unreg_ring_funcs;
525 }
526
527 if (spi->irq) {
528 ret = iio_register_interrupt_line(spi->irq,
529 st->indio_dev,
530 0,
531 IRQF_TRIGGER_RISING,
532 "adis16209");
533 if (ret)
534 goto error_uninitialize_ring;
535
536 ret = adis16209_probe_trigger(st->indio_dev);
537 if (ret)
538 goto error_unregister_line;
539 }
540
541 /* Get the device into a sane initial state */
542 ret = adis16209_initial_setup(st);
543 if (ret)
544 goto error_remove_trigger;
545 return 0;
546
547error_remove_trigger:
548 adis16209_remove_trigger(st->indio_dev);
549error_unregister_line:
550 if (spi->irq)
551 iio_unregister_interrupt_line(st->indio_dev, 0);
552error_uninitialize_ring:
553 adis16209_uninitialize_ring(st->indio_dev->ring);
554error_unreg_ring_funcs:
555 adis16209_unconfigure_ring(st->indio_dev);
556error_free_dev:
557 if (regdone)
558 iio_device_unregister(st->indio_dev);
559 else
560 iio_free_device(st->indio_dev);
561error_free_tx:
562 kfree(st->tx);
563error_free_rx:
564 kfree(st->rx);
565error_free_st:
566 kfree(st);
567error_ret:
568 return ret;
569}
570
571static int adis16209_remove(struct spi_device *spi)
572{
573 struct adis16209_state *st = spi_get_drvdata(spi);
574 struct iio_dev *indio_dev = st->indio_dev;
575
576 flush_scheduled_work();
577
578 adis16209_remove_trigger(indio_dev);
579 if (spi->irq)
580 iio_unregister_interrupt_line(indio_dev, 0);
581
582 adis16209_uninitialize_ring(indio_dev->ring);
583 iio_device_unregister(indio_dev);
584 adis16209_unconfigure_ring(indio_dev);
585 kfree(st->tx);
586 kfree(st->rx);
587 kfree(st);
588
589 return 0;
590}
591
592static struct spi_driver adis16209_driver = {
593 .driver = {
594 .name = "adis16209",
595 .owner = THIS_MODULE,
596 },
597 .probe = adis16209_probe,
598 .remove = __devexit_p(adis16209_remove),
599};
600
601static __init int adis16209_init(void)
602{
603 return spi_register_driver(&adis16209_driver);
604}
605module_init(adis16209_init);
606
607static __exit void adis16209_exit(void)
608{
609 spi_unregister_driver(&adis16209_driver);
610}
611module_exit(adis16209_exit);
612
613MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
614MODULE_DESCRIPTION("Analog Devices ADIS16209 Digital Vibration Sensor driver");
615MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/accel/adis16209_ring.c b/drivers/staging/iio/accel/adis16209_ring.c
new file mode 100644
index 000000000000..533e28574910
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16209_ring.c
@@ -0,0 +1,266 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/gpio.h>
4#include <linux/workqueue.h>
5#include <linux/mutex.h>
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/spi/spi.h>
9#include <linux/sysfs.h>
10#include <linux/list.h>
11
12#include "../iio.h"
13#include "../sysfs.h"
14#include "../ring_sw.h"
15#include "accel.h"
16#include "../trigger.h"
17#include "adis16209.h"
18
19/**
20 * combine_8_to_16() utility function to munge to u8s into u16
21 **/
22static inline u16 combine_8_to_16(u8 lower, u8 upper)
23{
24 u16 _lower = lower;
25 u16 _upper = upper;
26 return _lower | (_upper << 8);
27}
28
29static IIO_SCAN_EL_C(supply, ADIS16209_SCAN_SUPPLY, IIO_UNSIGNED(14),
30 ADIS16209_SUPPLY_OUT, NULL);
31static IIO_SCAN_EL_C(accel_x, ADIS16209_SCAN_ACC_X, IIO_SIGNED(14),
32 ADIS16209_XACCL_OUT, NULL);
33static IIO_SCAN_EL_C(accel_y, ADIS16209_SCAN_ACC_Y, IIO_SIGNED(14),
34 ADIS16209_YACCL_OUT, NULL);
35static IIO_SCAN_EL_C(aux_adc, ADIS16209_SCAN_AUX_ADC, IIO_UNSIGNED(12),
36 ADIS16209_AUX_ADC, NULL);
37static IIO_SCAN_EL_C(temp, ADIS16209_SCAN_TEMP, IIO_UNSIGNED(12),
38 ADIS16209_TEMP_OUT, NULL);
39static IIO_SCAN_EL_C(incli_x, ADIS16209_SCAN_INCLI_X, IIO_SIGNED(14),
40 ADIS16209_XINCL_OUT, NULL);
41static IIO_SCAN_EL_C(incli_y, ADIS16209_SCAN_INCLI_Y, IIO_SIGNED(14),
42 ADIS16209_YINCL_OUT, NULL);
43static IIO_SCAN_EL_C(rot, ADIS16209_SCAN_ROT, IIO_SIGNED(14),
44 ADIS16209_ROT_OUT, NULL);
45
46static IIO_SCAN_EL_TIMESTAMP(8);
47
48static struct attribute *adis16209_scan_el_attrs[] = {
49 &iio_scan_el_supply.dev_attr.attr,
50 &iio_scan_el_accel_x.dev_attr.attr,
51 &iio_scan_el_accel_y.dev_attr.attr,
52 &iio_scan_el_aux_adc.dev_attr.attr,
53 &iio_scan_el_temp.dev_attr.attr,
54 &iio_scan_el_incli_x.dev_attr.attr,
55 &iio_scan_el_incli_y.dev_attr.attr,
56 &iio_scan_el_rot.dev_attr.attr,
57 &iio_scan_el_timestamp.dev_attr.attr,
58 NULL,
59};
60
61static struct attribute_group adis16209_scan_el_group = {
62 .attrs = adis16209_scan_el_attrs,
63 .name = "scan_elements",
64};
65
66/**
67 * adis16209_poll_func_th() top half interrupt handler called by trigger
68 * @private_data: iio_dev
69 **/
70static void adis16209_poll_func_th(struct iio_dev *indio_dev)
71{
72 struct adis16209_state *st = iio_dev_get_devdata(indio_dev);
73 st->last_timestamp = indio_dev->trig->timestamp;
74 schedule_work(&st->work_trigger_to_ring);
75}
76
77/**
78 * adis16209_read_ring_data() read data registers which will be placed into ring
79 * @dev: device associated with child of actual device (iio_dev or iio_trig)
80 * @rx: somewhere to pass back the value read
81 **/
82static int adis16209_read_ring_data(struct device *dev, u8 *rx)
83{
84 struct spi_message msg;
85 struct iio_dev *indio_dev = dev_get_drvdata(dev);
86 struct adis16209_state *st = iio_dev_get_devdata(indio_dev);
87 struct spi_transfer xfers[ADIS16209_OUTPUTS + 1];
88 int ret;
89 int i;
90
91 mutex_lock(&st->buf_lock);
92
93 spi_message_init(&msg);
94
95 memset(xfers, 0, sizeof(xfers));
96 for (i = 0; i <= ADIS16209_OUTPUTS; i++) {
97 xfers[i].bits_per_word = 8;
98 xfers[i].cs_change = 1;
99 xfers[i].len = 2;
100 xfers[i].delay_usecs = 20;
101 xfers[i].tx_buf = st->tx + 2 * i;
102 st->tx[2 * i]
103 = ADIS16209_READ_REG(ADIS16209_SUPPLY_OUT + 2 * i);
104 st->tx[2 * i + 1] = 0;
105 if (i >= 1)
106 xfers[i].rx_buf = rx + 2 * (i - 1);
107 spi_message_add_tail(&xfers[i], &msg);
108 }
109
110 ret = spi_sync(st->us, &msg);
111 if (ret)
112 dev_err(&st->us->dev, "problem when burst reading");
113
114 mutex_unlock(&st->buf_lock);
115
116 return ret;
117}
118
119/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
120 * specific to be rolled into the core.
121 */
122static void adis16209_trigger_bh_to_ring(struct work_struct *work_s)
123{
124 struct adis16209_state *st
125 = container_of(work_s, struct adis16209_state,
126 work_trigger_to_ring);
127
128 int i = 0;
129 s16 *data;
130 size_t datasize = st->indio_dev
131 ->ring->access.get_bpd(st->indio_dev->ring);
132
133 data = kmalloc(datasize , GFP_KERNEL);
134 if (data == NULL) {
135 dev_err(&st->us->dev, "memory alloc failed in ring bh");
136 return;
137 }
138
139 if (st->indio_dev->scan_count)
140 if (adis16209_read_ring_data(&st->indio_dev->dev, st->rx) >= 0)
141 for (; i < st->indio_dev->scan_count; i++) {
142 data[i] = combine_8_to_16(st->rx[i*2+1],
143 st->rx[i*2]);
144 }
145
146 /* Guaranteed to be aligned with 8 byte boundary */
147 if (st->indio_dev->scan_timestamp)
148 *((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
149
150 st->indio_dev->ring->access.store_to(st->indio_dev->ring,
151 (u8 *)data,
152 st->last_timestamp);
153
154 iio_trigger_notify_done(st->indio_dev->trig);
155 kfree(data);
156
157 return;
158}
159
160/* in these circumstances is it better to go with unaligned packing and
161 * deal with the cost?*/
162static int adis16209_data_rdy_ring_preenable(struct iio_dev *indio_dev)
163{
164 size_t size;
165 dev_dbg(&indio_dev->dev, "%s\n", __func__);
166 /* Check if there are any scan elements enabled, if not fail*/
167 if (!(indio_dev->scan_count || indio_dev->scan_timestamp))
168 return -EINVAL;
169
170 if (indio_dev->ring->access.set_bpd) {
171 if (indio_dev->scan_timestamp)
172 if (indio_dev->scan_count)
173 /* Timestamp (aligned to s64) and data */
174 size = (((indio_dev->scan_count * sizeof(s16))
175 + sizeof(s64) - 1)
176 & ~(sizeof(s64) - 1))
177 + sizeof(s64);
178 else /* Timestamp only */
179 size = sizeof(s64);
180 else /* Data only */
181 size = indio_dev->scan_count*sizeof(s16);
182 indio_dev->ring->access.set_bpd(indio_dev->ring, size);
183 }
184
185 return 0;
186}
187
188static int adis16209_data_rdy_ring_postenable(struct iio_dev *indio_dev)
189{
190 return indio_dev->trig
191 ? iio_trigger_attach_poll_func(indio_dev->trig,
192 indio_dev->pollfunc)
193 : 0;
194}
195
196static int adis16209_data_rdy_ring_predisable(struct iio_dev *indio_dev)
197{
198 return indio_dev->trig
199 ? iio_trigger_dettach_poll_func(indio_dev->trig,
200 indio_dev->pollfunc)
201 : 0;
202}
203
204void adis16209_unconfigure_ring(struct iio_dev *indio_dev)
205{
206 kfree(indio_dev->pollfunc);
207 iio_sw_rb_free(indio_dev->ring);
208}
209
210int adis16209_configure_ring(struct iio_dev *indio_dev)
211{
212 int ret = 0;
213 struct adis16209_state *st = indio_dev->dev_data;
214 struct iio_ring_buffer *ring;
215 INIT_WORK(&st->work_trigger_to_ring, adis16209_trigger_bh_to_ring);
216 /* Set default scan mode */
217
218 iio_scan_mask_set(indio_dev, iio_scan_el_supply.number);
219 iio_scan_mask_set(indio_dev, iio_scan_el_rot.number);
220 iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
221 iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
222 iio_scan_mask_set(indio_dev, iio_scan_el_temp.number);
223 iio_scan_mask_set(indio_dev, iio_scan_el_aux_adc.number);
224 iio_scan_mask_set(indio_dev, iio_scan_el_incli_x.number);
225 iio_scan_mask_set(indio_dev, iio_scan_el_incli_y.number);
226 indio_dev->scan_timestamp = true;
227
228 indio_dev->scan_el_attrs = &adis16209_scan_el_group;
229
230 ring = iio_sw_rb_allocate(indio_dev);
231 if (!ring) {
232 ret = -ENOMEM;
233 return ret;
234 }
235 indio_dev->ring = ring;
236 /* Effectively select the ring buffer implementation */
237 iio_ring_sw_register_funcs(&ring->access);
238 ring->preenable = &adis16209_data_rdy_ring_preenable;
239 ring->postenable = &adis16209_data_rdy_ring_postenable;
240 ring->predisable = &adis16209_data_rdy_ring_predisable;
241 ring->owner = THIS_MODULE;
242
243 indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
244 if (indio_dev->pollfunc == NULL) {
245 ret = -ENOMEM;
246 goto error_iio_sw_rb_free;;
247 }
248 indio_dev->pollfunc->poll_func_main = &adis16209_poll_func_th;
249 indio_dev->pollfunc->private_data = indio_dev;
250 indio_dev->modes |= INDIO_RING_TRIGGERED;
251 return 0;
252
253error_iio_sw_rb_free:
254 iio_sw_rb_free(indio_dev->ring);
255 return ret;
256}
257
258int adis16209_initialize_ring(struct iio_ring_buffer *ring)
259{
260 return iio_ring_buffer_register(ring, 0);
261}
262
263void adis16209_uninitialize_ring(struct iio_ring_buffer *ring)
264{
265 iio_ring_buffer_unregister(ring);
266}
diff --git a/drivers/staging/iio/accel/adis16209_trigger.c b/drivers/staging/iio/accel/adis16209_trigger.c
new file mode 100644
index 000000000000..4a0507c9a13b
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16209_trigger.c
@@ -0,0 +1,124 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/mutex.h>
4#include <linux/device.h>
5#include <linux/kernel.h>
6#include <linux/sysfs.h>
7#include <linux/list.h>
8#include <linux/spi/spi.h>
9
10#include "../iio.h"
11#include "../sysfs.h"
12#include "../trigger.h"
13#include "adis16209.h"
14
15/**
16 * adis16209_data_rdy_trig_poll() the event handler for the data rdy trig
17 **/
18static int adis16209_data_rdy_trig_poll(struct iio_dev *dev_info,
19 int index,
20 s64 timestamp,
21 int no_test)
22{
23 struct adis16209_state *st = iio_dev_get_devdata(dev_info);
24 struct iio_trigger *trig = st->trig;
25
26 trig->timestamp = timestamp;
27 iio_trigger_poll(trig);
28
29 return IRQ_HANDLED;
30}
31
32IIO_EVENT_SH(data_rdy_trig, &adis16209_data_rdy_trig_poll);
33
34static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
35
36static struct attribute *adis16209_trigger_attrs[] = {
37 &dev_attr_name.attr,
38 NULL,
39};
40
41static const struct attribute_group adis16209_trigger_attr_group = {
42 .attrs = adis16209_trigger_attrs,
43};
44
45/**
46 * adis16209_data_rdy_trigger_set_state() set datardy interrupt state
47 **/
48static int adis16209_data_rdy_trigger_set_state(struct iio_trigger *trig,
49 bool state)
50{
51 struct adis16209_state *st = trig->private_data;
52 struct iio_dev *indio_dev = st->indio_dev;
53 int ret = 0;
54
55 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
56 ret = adis16209_set_irq(&st->indio_dev->dev, state);
57 if (state == false) {
58 iio_remove_event_from_list(&iio_event_data_rdy_trig,
59 &indio_dev->interrupts[0]
60 ->ev_list);
61 flush_scheduled_work();
62 } else {
63 iio_add_event_to_list(&iio_event_data_rdy_trig,
64 &indio_dev->interrupts[0]->ev_list);
65 }
66 return ret;
67}
68
69/**
70 * adis16209_trig_try_reen() try renabling irq for data rdy trigger
71 * @trig: the datardy trigger
72 **/
73static int adis16209_trig_try_reen(struct iio_trigger *trig)
74{
75 struct adis16209_state *st = trig->private_data;
76 enable_irq(st->us->irq);
77 return 0;
78}
79
80int adis16209_probe_trigger(struct iio_dev *indio_dev)
81{
82 int ret;
83 struct adis16209_state *st = indio_dev->dev_data;
84
85 st->trig = iio_allocate_trigger();
86 st->trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
87 if (!st->trig->name) {
88 ret = -ENOMEM;
89 goto error_free_trig;
90 }
91 snprintf((char *)st->trig->name,
92 IIO_TRIGGER_NAME_LENGTH,
93 "adis16209-dev%d", indio_dev->id);
94 st->trig->dev.parent = &st->us->dev;
95 st->trig->owner = THIS_MODULE;
96 st->trig->private_data = st;
97 st->trig->set_trigger_state = &adis16209_data_rdy_trigger_set_state;
98 st->trig->try_reenable = &adis16209_trig_try_reen;
99 st->trig->control_attrs = &adis16209_trigger_attr_group;
100 ret = iio_trigger_register(st->trig);
101
102 /* select default trigger */
103 indio_dev->trig = st->trig;
104 if (ret)
105 goto error_free_trig_name;
106
107 return 0;
108
109error_free_trig_name:
110 kfree(st->trig->name);
111error_free_trig:
112 iio_free_trigger(st->trig);
113
114 return ret;
115}
116
117void adis16209_remove_trigger(struct iio_dev *indio_dev)
118{
119 struct adis16209_state *state = indio_dev->dev_data;
120
121 iio_trigger_unregister(state->trig);
122 kfree(state->trig->name);
123 iio_free_trigger(state->trig);
124}
diff --git a/drivers/staging/iio/accel/adis16220.h b/drivers/staging/iio/accel/adis16220.h
new file mode 100644
index 000000000000..2abf4850b373
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16220.h
@@ -0,0 +1,147 @@
1#ifndef SPI_ADIS16220_H_
2#define SPI_ADIS16220_H_
3
4#define ADIS16220_STARTUP_DELAY 220 /* ms */
5
6#define ADIS16220_READ_REG(a) a
7#define ADIS16220_WRITE_REG(a) ((a) | 0x80)
8
9/* Flash memory write count */
10#define ADIS16220_FLASH_CNT 0x00
11/* Control, acceleration offset adjustment control */
12#define ADIS16220_ACCL_NULL 0x02
13/* Control, AIN1 offset adjustment control */
14#define ADIS16220_AIN1_NULL 0x04
15/* Control, AIN2 offset adjustment control */
16#define ADIS16220_AIN2_NULL 0x06
17/* Output, power supply during capture */
18#define ADIS16220_CAPT_SUPPLY 0x0A
19/* Output, temperature during capture */
20#define ADIS16220_CAPT_TEMP 0x0C
21/* Output, peak acceleration during capture */
22#define ADIS16220_CAPT_PEAKA 0x0E
23/* Output, peak AIN1 level during capture */
24#define ADIS16220_CAPT_PEAK1 0x10
25/* Output, peak AIN2 level during capture */
26#define ADIS16220_CAPT_PEAK2 0x12
27/* Output, capture buffer for acceleration */
28#define ADIS16220_CAPT_BUFA 0x14
29/* Output, capture buffer for AIN1 */
30#define ADIS16220_CAPT_BUF1 0x16
31/* Output, capture buffer for AIN2 */
32#define ADIS16220_CAPT_BUF2 0x18
33/* Control, capture buffer address pointer */
34#define ADIS16220_CAPT_PNTR 0x1A
35/* Control, capture control register */
36#define ADIS16220_CAPT_CTRL 0x1C
37/* Control, capture period (automatic mode) */
38#define ADIS16220_CAPT_PRD 0x1E
39/* Control, Alarm A, acceleration peak threshold */
40#define ADIS16220_ALM_MAGA 0x20
41/* Control, Alarm 1, AIN1 peak threshold */
42#define ADIS16220_ALM_MAG1 0x22
43/* Control, Alarm 2, AIN2 peak threshold */
44#define ADIS16220_ALM_MAG2 0x24
45/* Control, Alarm S, peak threshold */
46#define ADIS16220_ALM_MAGS 0x26
47/* Control, alarm configuration register */
48#define ADIS16220_ALM_CTRL 0x28
49/* Control, general I/O configuration */
50#define ADIS16220_GPIO_CTRL 0x32
51/* Control, self-test control, AIN configuration */
52#define ADIS16220_MSC_CTRL 0x34
53/* Control, digital I/O configuration */
54#define ADIS16220_DIO_CTRL 0x36
55/* Control, filter configuration */
56#define ADIS16220_AVG_CNT 0x38
57/* Status, system status */
58#define ADIS16220_DIAG_STAT 0x3C
59/* Control, system commands */
60#define ADIS16220_GLOB_CMD 0x3E
61/* Status, self-test response */
62#define ADIS16220_ST_DELTA 0x40
63/* Lot Identification Code 1 */
64#define ADIS16220_LOT_ID1 0x52
65/* Lot Identification Code 2 */
66#define ADIS16220_LOT_ID2 0x54
67/* Product identifier; convert to decimal = 16220 */
68#define ADIS16220_PROD_ID 0x56
69/* Serial number */
70#define ADIS16220_SERIAL_NUM 0x58
71
72#define ADIS16220_CAPTURE_SIZE 2048
73
74/* MSC_CTRL */
75#define ADIS16220_MSC_CTRL_SELF_TEST_EN (1 << 8)
76#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN1 (1 << 1)
77#define ADIS16220_MSC_CTRL_POWER_SUP_COM_AIN2 (1 << 0)
78
79/* DIO_CTRL */
80#define ADIS16220_MSC_CTRL_DIO2_BUSY_IND (3<<4)
81#define ADIS16220_MSC_CTRL_DIO1_BUSY_IND (3<<2)
82#define ADIS16220_MSC_CTRL_DIO2_ACT_HIGH (1<<1)
83#define ADIS16220_MSC_CTRL_DIO1_ACT_HIGH (1<<0)
84
85/* DIAG_STAT */
86/* AIN2 sample > ALM_MAG2 */
87#define ADIS16220_DIAG_STAT_ALM_MAG2 (1<<14)
88/* AIN1 sample > ALM_MAG1 */
89#define ADIS16220_DIAG_STAT_ALM_MAG1 (1<<13)
90/* Acceleration sample > ALM_MAGA */
91#define ADIS16220_DIAG_STAT_ALM_MAGA (1<<12)
92/* Error condition programmed into ALM_MAGS[11:0] and ALM_CTRL[5:4] is true */
93#define ADIS16220_DIAG_STAT_ALM_MAGS (1<<11)
94/* |Peak value in AIN2 data capture| > ALM_MAG2 */
95#define ADIS16220_DIAG_STAT_PEAK_AIN2 (1<<10)
96/* |Peak value in AIN1 data capture| > ALM_MAG1 */
97#define ADIS16220_DIAG_STAT_PEAK_AIN1 (1<<9)
98/* |Peak value in acceleration data capture| > ALM_MAGA */
99#define ADIS16220_DIAG_STAT_PEAK_ACCEL (1<<8)
100/* Data ready, capture complete */
101#define ADIS16220_DIAG_STAT_DATA_RDY (1<<7)
102#define ADIS16220_DIAG_STAT_FLASH_CHK (1<<6)
103#define ADIS16220_DIAG_STAT_SELF_TEST (1<<5)
104/* Capture period violation/interruption */
105#define ADIS16220_DIAG_STAT_VIOLATION (1<<4)
106/* SPI communications failure */
107#define ADIS16220_DIAG_STAT_SPI_FAIL (1<<3)
108/* Flash update failure */
109#define ADIS16220_DIAG_STAT_FLASH_UPT (1<<2)
110/* Power supply above 3.625 V */
111#define ADIS16220_DIAG_STAT_POWER_HIGH (1<<1)
112/* Power supply below 3.15 V */
113#define ADIS16220_DIAG_STAT_POWER_LOW (1<<0)
114
115/* GLOB_CMD */
116#define ADIS16220_GLOB_CMD_SW_RESET (1<<7)
117#define ADIS16220_GLOB_CMD_SELF_TEST (1<<2)
118#define ADIS16220_GLOB_CMD_PWR_DOWN (1<<1)
119
120#define ADIS16220_MAX_TX 2048
121#define ADIS16220_MAX_RX 2048
122
123#define ADIS16220_SPI_BURST (u32)(1000 * 1000)
124#define ADIS16220_SPI_FAST (u32)(2000 * 1000)
125
126/**
127 * struct adis16220_state - device instance specific data
128 * @us: actual spi_device
129 * @work_trigger_to_ring: bh for triggered event handling
130 * @work_cont_thresh: CLEAN
131 * @inter: used to check if new interrupt has been triggered
132 * @last_timestamp: passing timestamp from th to bh of interrupt handler
133 * @indio_dev: industrial I/O device structure
134 * @trig: data ready trigger registered with iio
135 * @tx: transmit buffer
136 * @rx: recieve buffer
137 * @buf_lock: mutex to protect tx and rx
138 **/
139struct adis16220_state {
140 struct spi_device *us;
141 struct iio_dev *indio_dev;
142 u8 *tx;
143 u8 *rx;
144 struct mutex buf_lock;
145};
146
147#endif /* SPI_ADIS16220_H_ */
diff --git a/drivers/staging/iio/accel/adis16220_core.c b/drivers/staging/iio/accel/adis16220_core.c
new file mode 100644
index 000000000000..6de439fd1675
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16220_core.c
@@ -0,0 +1,670 @@
1/*
2 * ADIS16220 Programmable Digital Vibration Sensor driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/gpio.h>
12#include <linux/delay.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/spi/spi.h>
17
18#include <linux/sysfs.h>
19#include <linux/list.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "accel.h"
24#include "../adc/adc.h"
25
26#include "adis16220.h"
27
28#define DRIVER_NAME "adis16220"
29
30/**
31 * adis16220_spi_write_reg_8() - write single byte to a register
32 * @dev: device associated with child of actual device (iio_dev or iio_trig)
33 * @reg_address: the address of the register to be written
34 * @val: the value to write
35 **/
36static int adis16220_spi_write_reg_8(struct device *dev,
37 u8 reg_address,
38 u8 val)
39{
40 int ret;
41 struct iio_dev *indio_dev = dev_get_drvdata(dev);
42 struct adis16220_state *st = iio_dev_get_devdata(indio_dev);
43
44 mutex_lock(&st->buf_lock);
45 st->tx[0] = ADIS16220_WRITE_REG(reg_address);
46 st->tx[1] = val;
47
48 ret = spi_write(st->us, st->tx, 2);
49 mutex_unlock(&st->buf_lock);
50
51 return ret;
52}
53
54/**
55 * adis16220_spi_write_reg_16() - write 2 bytes to a pair of registers
56 * @dev: device associated with child of actual device (iio_dev or iio_trig)
57 * @reg_address: the address of the lower of the two registers. Second register
58 * is assumed to have address one greater.
59 * @val: value to be written
60 **/
61static int adis16220_spi_write_reg_16(struct device *dev,
62 u8 lower_reg_address,
63 u16 value)
64{
65 int ret;
66 struct spi_message msg;
67 struct iio_dev *indio_dev = dev_get_drvdata(dev);
68 struct adis16220_state *st = iio_dev_get_devdata(indio_dev);
69 struct spi_transfer xfers[] = {
70 {
71 .tx_buf = st->tx,
72 .bits_per_word = 8,
73 .len = 2,
74 .cs_change = 1,
75 .delay_usecs = 25,
76 }, {
77 .tx_buf = st->tx + 2,
78 .bits_per_word = 8,
79 .len = 2,
80 .cs_change = 1,
81 .delay_usecs = 25,
82 },
83 };
84
85 mutex_lock(&st->buf_lock);
86 st->tx[0] = ADIS16220_WRITE_REG(lower_reg_address);
87 st->tx[1] = value & 0xFF;
88 st->tx[2] = ADIS16220_WRITE_REG(lower_reg_address + 1);
89 st->tx[3] = (value >> 8) & 0xFF;
90
91 spi_message_init(&msg);
92 spi_message_add_tail(&xfers[0], &msg);
93 spi_message_add_tail(&xfers[1], &msg);
94 ret = spi_sync(st->us, &msg);
95 mutex_unlock(&st->buf_lock);
96
97 return ret;
98}
99
100/**
101 * adis16220_spi_read_reg_16() - read 2 bytes from a 16-bit register
102 * @dev: device associated with child of actual device (iio_dev or iio_trig)
103 * @reg_address: the address of the lower of the two registers. Second register
104 * is assumed to have address one greater.
105 * @val: somewhere to pass back the value read
106 **/
107static int adis16220_spi_read_reg_16(struct device *dev,
108 u8 lower_reg_address,
109 u16 *val)
110{
111 struct spi_message msg;
112 struct iio_dev *indio_dev = dev_get_drvdata(dev);
113 struct adis16220_state *st = iio_dev_get_devdata(indio_dev);
114 int ret;
115 struct spi_transfer xfers[] = {
116 {
117 .tx_buf = st->tx,
118 .bits_per_word = 8,
119 .len = 2,
120 .cs_change = 1,
121 .delay_usecs = 25,
122 }, {
123 .rx_buf = st->rx,
124 .bits_per_word = 8,
125 .len = 2,
126 .cs_change = 1,
127 .delay_usecs = 25,
128 },
129 };
130
131 mutex_lock(&st->buf_lock);
132 st->tx[0] = ADIS16220_READ_REG(lower_reg_address);
133 st->tx[1] = 0;
134
135 spi_message_init(&msg);
136 spi_message_add_tail(&xfers[0], &msg);
137 spi_message_add_tail(&xfers[1], &msg);
138 ret = spi_sync(st->us, &msg);
139 if (ret) {
140 dev_err(&st->us->dev,
141 "problem when reading 16 bit register 0x%02X",
142 lower_reg_address);
143 goto error_ret;
144 }
145 *val = (st->rx[0] << 8) | st->rx[1];
146
147error_ret:
148 mutex_unlock(&st->buf_lock);
149 return ret;
150}
151
152static ssize_t adis16220_spi_read_signed(struct device *dev,
153 struct device_attribute *attr,
154 char *buf,
155 unsigned bits)
156{
157 int ret;
158 s16 val = 0;
159 unsigned shift = 16 - bits;
160 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
161
162 ret = adis16220_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
163 if (ret)
164 return ret;
165
166 val = ((s16)(val << shift) >> shift);
167 return sprintf(buf, "%d\n", val);
168}
169
170static ssize_t adis16220_read_12bit_unsigned(struct device *dev,
171 struct device_attribute *attr,
172 char *buf)
173{
174 int ret;
175 u16 val = 0;
176 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
177
178 ret = adis16220_spi_read_reg_16(dev, this_attr->address, &val);
179 if (ret)
180 return ret;
181
182 return sprintf(buf, "%u\n", val & 0x0FFF);
183}
184
185static ssize_t adis16220_read_16bit(struct device *dev,
186 struct device_attribute *attr,
187 char *buf)
188{
189 struct iio_dev *indio_dev = dev_get_drvdata(dev);
190 ssize_t ret;
191
192 /* Take the iio_dev status lock */
193 mutex_lock(&indio_dev->mlock);
194 ret = adis16220_spi_read_signed(dev, attr, buf, 16);
195 mutex_unlock(&indio_dev->mlock);
196
197 return ret;
198}
199
200static ssize_t adis16220_write_16bit(struct device *dev,
201 struct device_attribute *attr,
202 const char *buf,
203 size_t len)
204{
205 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
206 int ret;
207 long val;
208
209 ret = strict_strtol(buf, 10, &val);
210 if (ret)
211 goto error_ret;
212 ret = adis16220_spi_write_reg_16(dev, this_attr->address, val);
213
214error_ret:
215 return ret ? ret : len;
216}
217
218static int adis16220_capture(struct device *dev)
219{
220 int ret;
221 ret = adis16220_spi_write_reg_16(dev,
222 ADIS16220_GLOB_CMD,
223 0xBF08); /* initiates a manual data capture */
224 if (ret)
225 dev_err(dev, "problem beginning capture");
226
227 msleep(10); /* delay for capture to finish */
228
229 return ret;
230}
231
232static int adis16220_reset(struct device *dev)
233{
234 int ret;
235 ret = adis16220_spi_write_reg_8(dev,
236 ADIS16220_GLOB_CMD,
237 ADIS16220_GLOB_CMD_SW_RESET);
238 if (ret)
239 dev_err(dev, "problem resetting device");
240
241 return ret;
242}
243
244static ssize_t adis16220_write_reset(struct device *dev,
245 struct device_attribute *attr,
246 const char *buf, size_t len)
247{
248 if (len < 1)
249 return -1;
250 switch (buf[0]) {
251 case '1':
252 case 'y':
253 case 'Y':
254 return adis16220_reset(dev) == 0 ? len : -EIO;
255 }
256 return -1;
257}
258
259static ssize_t adis16220_write_capture(struct device *dev,
260 struct device_attribute *attr,
261 const char *buf, size_t len)
262{
263 if (len < 1)
264 return -1;
265 switch (buf[0]) {
266 case '1':
267 case 'y':
268 case 'Y':
269 return adis16220_capture(dev) == 0 ? len : -EIO;
270 }
271 return -1;
272}
273
274static int adis16220_check_status(struct device *dev)
275{
276 u16 status;
277 int ret;
278
279 ret = adis16220_spi_read_reg_16(dev, ADIS16220_DIAG_STAT, &status);
280
281 if (ret < 0) {
282 dev_err(dev, "Reading status failed\n");
283 goto error_ret;
284 }
285 ret = status & 0x7F;
286
287 if (status & ADIS16220_DIAG_STAT_VIOLATION)
288 dev_err(dev, "Capture period violation/interruption\n");
289 if (status & ADIS16220_DIAG_STAT_SPI_FAIL)
290 dev_err(dev, "SPI failure\n");
291 if (status & ADIS16220_DIAG_STAT_FLASH_UPT)
292 dev_err(dev, "Flash update failed\n");
293 if (status & ADIS16220_DIAG_STAT_POWER_HIGH)
294 dev_err(dev, "Power supply above 5.25V\n");
295 if (status & ADIS16220_DIAG_STAT_POWER_LOW)
296 dev_err(dev, "Power supply below 4.75V\n");
297
298error_ret:
299 return ret;
300}
301
302static int adis16220_self_test(struct device *dev)
303{
304 int ret;
305 ret = adis16220_spi_write_reg_16(dev,
306 ADIS16220_MSC_CTRL,
307 ADIS16220_MSC_CTRL_SELF_TEST_EN);
308 if (ret) {
309 dev_err(dev, "problem starting self test");
310 goto err_ret;
311 }
312
313 adis16220_check_status(dev);
314
315err_ret:
316 return ret;
317}
318
319static int adis16220_initial_setup(struct adis16220_state *st)
320{
321 int ret;
322 struct device *dev = &st->indio_dev->dev;
323
324 /* Do self test */
325 ret = adis16220_self_test(dev);
326 if (ret) {
327 dev_err(dev, "self test failure");
328 goto err_ret;
329 }
330
331 /* Read status register to check the result */
332 ret = adis16220_check_status(dev);
333 if (ret) {
334 adis16220_reset(dev);
335 dev_err(dev, "device not playing ball -> reset");
336 msleep(ADIS16220_STARTUP_DELAY);
337 ret = adis16220_check_status(dev);
338 if (ret) {
339 dev_err(dev, "giving up");
340 goto err_ret;
341 }
342 }
343
344 printk(KERN_INFO DRIVER_NAME ": at CS%d (irq %d)\n",
345 st->us->chip_select, st->us->irq);
346
347err_ret:
348 return ret;
349}
350
351static ssize_t adis16220_capture_buffer_read(struct adis16220_state *st,
352 char *buf,
353 loff_t off,
354 size_t count,
355 int addr)
356{
357 struct spi_message msg;
358 struct spi_transfer xfers[] = {
359 {
360 .tx_buf = st->tx,
361 .bits_per_word = 8,
362 .len = 2,
363 .cs_change = 1,
364 .delay_usecs = 25,
365 }, {
366 .tx_buf = st->tx,
367 .rx_buf = st->rx,
368 .bits_per_word = 8,
369 .cs_change = 1,
370 .delay_usecs = 25,
371 },
372 };
373 int ret;
374 int i;
375
376 if (unlikely(!count))
377 return count;
378
379 if ((off >= ADIS16220_CAPTURE_SIZE) || (count & 1) || (off & 1))
380 return -EINVAL;
381
382 if (off + count > ADIS16220_CAPTURE_SIZE)
383 count = ADIS16220_CAPTURE_SIZE - off;
384
385 /* write the begin position of capture buffer */
386 ret = adis16220_spi_write_reg_16(&st->indio_dev->dev,
387 ADIS16220_CAPT_PNTR,
388 off > 1);
389 if (ret)
390 return -EIO;
391
392 /* read count/2 values from capture buffer */
393 mutex_lock(&st->buf_lock);
394
395 for (i = 0; i < count; i += 2) {
396 st->tx[i] = ADIS16220_READ_REG(addr);
397 st->tx[i + 1] = 0;
398 }
399 xfers[1].len = count;
400
401 spi_message_init(&msg);
402 spi_message_add_tail(&xfers[0], &msg);
403 spi_message_add_tail(&xfers[1], &msg);
404 ret = spi_sync(st->us, &msg);
405 if (ret) {
406
407 mutex_unlock(&st->buf_lock);
408 return -EIO;
409 }
410
411 memcpy(buf, st->rx, count);
412
413 mutex_unlock(&st->buf_lock);
414 return count;
415}
416
417static ssize_t adis16220_accel_bin_read(struct kobject *kobj,
418 struct bin_attribute *attr,
419 char *buf,
420 loff_t off,
421 size_t count)
422{
423 struct device *dev = container_of(kobj, struct device, kobj);
424 struct iio_dev *indio_dev = dev_get_drvdata(dev);
425 struct adis16220_state *st = iio_dev_get_devdata(indio_dev);
426
427 return adis16220_capture_buffer_read(st, buf,
428 off, count,
429 ADIS16220_CAPT_BUFA);
430}
431
432static struct bin_attribute accel_bin = {
433 .attr = {
434 .name = "accel_bin",
435 .mode = S_IRUGO,
436 },
437 .read = adis16220_accel_bin_read,
438 .size = ADIS16220_CAPTURE_SIZE,
439};
440
441static ssize_t adis16220_adc1_bin_read(struct kobject *kobj,
442 struct bin_attribute *attr,
443 char *buf, loff_t off,
444 size_t count)
445{
446 struct device *dev = container_of(kobj, struct device, kobj);
447 struct iio_dev *indio_dev = dev_get_drvdata(dev);
448 struct adis16220_state *st = iio_dev_get_devdata(indio_dev);
449
450 return adis16220_capture_buffer_read(st, buf,
451 off, count,
452 ADIS16220_CAPT_BUF1);
453}
454
455static struct bin_attribute adc1_bin = {
456 .attr = {
457 .name = "in0_bin",
458 .mode = S_IRUGO,
459 },
460 .read = adis16220_adc1_bin_read,
461 .size = ADIS16220_CAPTURE_SIZE,
462};
463
464static ssize_t adis16220_adc2_bin_read(struct kobject *kobj,
465 struct bin_attribute *attr,
466 char *buf, loff_t off,
467 size_t count)
468{
469 struct device *dev = container_of(kobj, struct device, kobj);
470 struct iio_dev *indio_dev = dev_get_drvdata(dev);
471 struct adis16220_state *st = iio_dev_get_devdata(indio_dev);
472
473 return adis16220_capture_buffer_read(st, buf,
474 off, count,
475 ADIS16220_CAPT_BUF2);
476}
477
478
479static struct bin_attribute adc2_bin = {
480 .attr = {
481 .name = "in1_bin",
482 .mode = S_IRUGO,
483 },
484 .read = adis16220_adc2_bin_read,
485 .size = ADIS16220_CAPTURE_SIZE,
486};
487
488static IIO_DEV_ATTR_IN_NAMED_RAW(supply, adis16220_read_12bit_unsigned,
489 ADIS16220_CAPT_SUPPLY);
490static IIO_CONST_ATTR(in_supply_scale, "0.0012207");
491static IIO_DEV_ATTR_ACCEL(adis16220_read_16bit, ADIS16220_CAPT_BUFA);
492static IIO_DEVICE_ATTR(accel_peak_raw, S_IRUGO, adis16220_read_16bit,
493 NULL, ADIS16220_CAPT_PEAKA);
494static IIO_DEV_ATTR_ACCEL_OFFSET(S_IWUSR | S_IRUGO,
495 adis16220_read_16bit,
496 adis16220_write_16bit,
497 ADIS16220_ACCL_NULL);
498static IIO_DEV_ATTR_TEMP_RAW(adis16220_read_12bit_unsigned);
499static IIO_CONST_ATTR(temp_offset, "25");
500static IIO_CONST_ATTR(temp_scale, "-0.47");
501
502static IIO_DEV_ATTR_IN_RAW(0, adis16220_read_16bit, ADIS16220_CAPT_BUF1);
503static IIO_DEV_ATTR_IN_RAW(1, adis16220_read_16bit, ADIS16220_CAPT_BUF2);
504
505static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL,
506 adis16220_write_reset, 0);
507
508#define IIO_DEV_ATTR_CAPTURE(_store) \
509 IIO_DEVICE_ATTR(capture, S_IWUGO, NULL, _store, 0)
510
511static IIO_DEV_ATTR_CAPTURE(adis16220_write_capture);
512
513#define IIO_DEV_ATTR_CAPTURE_COUNT(_mode, _show, _store, _addr) \
514 IIO_DEVICE_ATTR(capture_count, _mode, _show, _store, _addr)
515
516static IIO_DEV_ATTR_CAPTURE_COUNT(S_IWUSR | S_IRUGO,
517 adis16220_read_16bit,
518 adis16220_write_16bit,
519 ADIS16220_CAPT_PNTR);
520
521static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("100200");
522
523static IIO_CONST_ATTR(name, "adis16220");
524
525static struct attribute *adis16220_attributes[] = {
526 &iio_dev_attr_in_supply_raw.dev_attr.attr,
527 &iio_const_attr_in_supply_scale.dev_attr.attr,
528 &iio_dev_attr_accel_raw.dev_attr.attr,
529 &iio_dev_attr_accel_offset.dev_attr.attr,
530 &iio_dev_attr_accel_peak_raw.dev_attr.attr,
531 &iio_dev_attr_temp_raw.dev_attr.attr,
532 &iio_dev_attr_in0_raw.dev_attr.attr,
533 &iio_dev_attr_in1_raw.dev_attr.attr,
534 &iio_const_attr_temp_offset.dev_attr.attr,
535 &iio_const_attr_temp_scale.dev_attr.attr,
536 &iio_const_attr_available_sampling_frequency.dev_attr.attr,
537 &iio_dev_attr_reset.dev_attr.attr,
538 &iio_dev_attr_capture.dev_attr.attr,
539 &iio_dev_attr_capture_count.dev_attr.attr,
540 &iio_const_attr_name.dev_attr.attr,
541 NULL
542};
543
544static const struct attribute_group adis16220_attribute_group = {
545 .attrs = adis16220_attributes,
546};
547
548static int __devinit adis16220_probe(struct spi_device *spi)
549{
550 int ret, regdone = 0;
551 struct adis16220_state *st = kzalloc(sizeof *st, GFP_KERNEL);
552 if (!st) {
553 ret = -ENOMEM;
554 goto error_ret;
555 }
556 /* this is only used for removal purposes */
557 spi_set_drvdata(spi, st);
558
559 /* Allocate the comms buffers */
560 st->rx = kzalloc(sizeof(*st->rx)*ADIS16220_MAX_RX, GFP_KERNEL);
561 if (st->rx == NULL) {
562 ret = -ENOMEM;
563 goto error_free_st;
564 }
565 st->tx = kzalloc(sizeof(*st->tx)*ADIS16220_MAX_TX, GFP_KERNEL);
566 if (st->tx == NULL) {
567 ret = -ENOMEM;
568 goto error_free_rx;
569 }
570 st->us = spi;
571 mutex_init(&st->buf_lock);
572 /* setup the industrialio driver allocated elements */
573 st->indio_dev = iio_allocate_device();
574 if (st->indio_dev == NULL) {
575 ret = -ENOMEM;
576 goto error_free_tx;
577 }
578
579 st->indio_dev->dev.parent = &spi->dev;
580 st->indio_dev->attrs = &adis16220_attribute_group;
581 st->indio_dev->dev_data = (void *)(st);
582 st->indio_dev->driver_module = THIS_MODULE;
583 st->indio_dev->modes = INDIO_DIRECT_MODE;
584
585 ret = iio_device_register(st->indio_dev);
586 if (ret)
587 goto error_free_dev;
588 regdone = 1;
589
590 ret = sysfs_create_bin_file(&st->indio_dev->dev.kobj, &accel_bin);
591 if (ret)
592 goto error_free_dev;
593
594 ret = sysfs_create_bin_file(&st->indio_dev->dev.kobj, &adc1_bin);
595 if (ret)
596 goto error_rm_accel_bin;
597
598 ret = sysfs_create_bin_file(&st->indio_dev->dev.kobj, &adc2_bin);
599 if (ret)
600 goto error_rm_adc1_bin;
601
602 /* Get the device into a sane initial state */
603 ret = adis16220_initial_setup(st);
604 if (ret)
605 goto error_rm_adc2_bin;
606 return 0;
607
608error_rm_adc2_bin:
609 sysfs_remove_bin_file(&st->indio_dev->dev.kobj, &adc2_bin);
610error_rm_adc1_bin:
611 sysfs_remove_bin_file(&st->indio_dev->dev.kobj, &adc1_bin);
612error_rm_accel_bin:
613 sysfs_remove_bin_file(&st->indio_dev->dev.kobj, &accel_bin);
614error_free_dev:
615 if (regdone)
616 iio_device_unregister(st->indio_dev);
617 else
618 iio_free_device(st->indio_dev);
619error_free_tx:
620 kfree(st->tx);
621error_free_rx:
622 kfree(st->rx);
623error_free_st:
624 kfree(st);
625error_ret:
626 return ret;
627}
628
629static int adis16220_remove(struct spi_device *spi)
630{
631 struct adis16220_state *st = spi_get_drvdata(spi);
632 struct iio_dev *indio_dev = st->indio_dev;
633
634 flush_scheduled_work();
635
636 sysfs_remove_bin_file(&st->indio_dev->dev.kobj, &adc2_bin);
637 sysfs_remove_bin_file(&st->indio_dev->dev.kobj, &adc1_bin);
638 sysfs_remove_bin_file(&st->indio_dev->dev.kobj, &accel_bin);
639 iio_device_unregister(indio_dev);
640 kfree(st->tx);
641 kfree(st->rx);
642 kfree(st);
643
644 return 0;
645}
646
647static struct spi_driver adis16220_driver = {
648 .driver = {
649 .name = "adis16220",
650 .owner = THIS_MODULE,
651 },
652 .probe = adis16220_probe,
653 .remove = __devexit_p(adis16220_remove),
654};
655
656static __init int adis16220_init(void)
657{
658 return spi_register_driver(&adis16220_driver);
659}
660module_init(adis16220_init);
661
662static __exit void adis16220_exit(void)
663{
664 spi_unregister_driver(&adis16220_driver);
665}
666module_exit(adis16220_exit);
667
668MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
669MODULE_DESCRIPTION("Analog Devices ADIS16220 Digital Vibration Sensor");
670MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/accel/adis16240.h b/drivers/staging/iio/accel/adis16240.h
new file mode 100644
index 000000000000..dcff43c75235
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16240.h
@@ -0,0 +1,218 @@
1#ifndef SPI_ADIS16240_H_
2#define SPI_ADIS16240_H_
3
4#define ADIS16240_STARTUP_DELAY 220 /* ms */
5
6#define ADIS16240_READ_REG(a) a
7#define ADIS16240_WRITE_REG(a) ((a) | 0x80)
8
9/* Flash memory write count */
10#define ADIS16240_FLASH_CNT 0x00
11/* Output, power supply */
12#define ADIS16240_SUPPLY_OUT 0x02
13/* Output, x-axis accelerometer */
14#define ADIS16240_XACCL_OUT 0x04
15/* Output, y-axis accelerometer */
16#define ADIS16240_YACCL_OUT 0x06
17/* Output, z-axis accelerometer */
18#define ADIS16240_ZACCL_OUT 0x08
19/* Output, auxiliary ADC input */
20#define ADIS16240_AUX_ADC 0x0A
21/* Output, temperature */
22#define ADIS16240_TEMP_OUT 0x0C
23/* Output, x-axis acceleration peak */
24#define ADIS16240_XPEAK_OUT 0x0E
25/* Output, y-axis acceleration peak */
26#define ADIS16240_YPEAK_OUT 0x10
27/* Output, z-axis acceleration peak */
28#define ADIS16240_ZPEAK_OUT 0x12
29/* Output, sum-of-squares acceleration peak */
30#define ADIS16240_XYZPEAK_OUT 0x14
31/* Output, Capture Buffer 1, X and Y acceleration */
32#define ADIS16240_CAPT_BUF1 0x16
33/* Output, Capture Buffer 2, Z acceleration */
34#define ADIS16240_CAPT_BUF2 0x18
35/* Diagnostic, error flags */
36#define ADIS16240_DIAG_STAT 0x1A
37/* Diagnostic, event counter */
38#define ADIS16240_EVNT_CNTR 0x1C
39/* Diagnostic, check sum value from firmware test */
40#define ADIS16240_CHK_SUM 0x1E
41/* Calibration, x-axis acceleration offset adjustment */
42#define ADIS16240_XACCL_OFF 0x20
43/* Calibration, y-axis acceleration offset adjustment */
44#define ADIS16240_YACCL_OFF 0x22
45/* Calibration, z-axis acceleration offset adjustment */
46#define ADIS16240_ZACCL_OFF 0x24
47/* Clock, hour and minute */
48#define ADIS16240_CLK_TIME 0x2E
49/* Clock, month and day */
50#define ADIS16240_CLK_DATE 0x30
51/* Clock, year */
52#define ADIS16240_CLK_YEAR 0x32
53/* Wake-up setting, hour and minute */
54#define ADIS16240_WAKE_TIME 0x34
55/* Wake-up setting, month and day */
56#define ADIS16240_WAKE_DATE 0x36
57/* Alarm 1 amplitude threshold */
58#define ADIS16240_ALM_MAG1 0x38
59/* Alarm 2 amplitude threshold */
60#define ADIS16240_ALM_MAG2 0x3A
61/* Alarm control */
62#define ADIS16240_ALM_CTRL 0x3C
63/* Capture, external trigger control */
64#define ADIS16240_XTRIG_CTRL 0x3E
65/* Capture, address pointer */
66#define ADIS16240_CAPT_PNTR 0x40
67/* Capture, configuration and control */
68#define ADIS16240_CAPT_CTRL 0x42
69/* General-purpose digital input/output control */
70#define ADIS16240_GPIO_CTRL 0x44
71/* Miscellaneous control */
72#define ADIS16240_MSC_CTRL 0x46
73/* Internal sample period (rate) control */
74#define ADIS16240_SMPL_PRD 0x48
75/* System command */
76#define ADIS16240_GLOB_CMD 0x4A
77
78#define ADIS16240_OUTPUTS 6
79
80/* MSC_CTRL */
81/* Enables sum-of-squares output (XYZPEAK_OUT) */
82#define ADIS16240_MSC_CTRL_XYZPEAK_OUT_EN (1 << 15)
83/* Enables peak tracking output (XPEAK_OUT, YPEAK_OUT, and ZPEAK_OUT) */
84#define ADIS16240_MSC_CTRL_X_Y_ZPEAK_OUT_EN (1 << 14)
85/* Self-test enable: 1 = apply electrostatic force, 0 = disabled */
86#define ADIS16240_MSC_CTRL_SELF_TEST_EN (1 << 8)
87/* Data-ready enable: 1 = enabled, 0 = disabled */
88#define ADIS16240_MSC_CTRL_DATA_RDY_EN (1 << 2)
89/* Data-ready polarity: 1 = active high, 0 = active low */
90#define ADIS16240_MSC_CTRL_ACTIVE_HIGH (1 << 1)
91/* Data-ready line selection: 1 = DIO2, 0 = DIO1 */
92#define ADIS16240_MSC_CTRL_DATA_RDY_DIO2 (1 << 0)
93
94/* DIAG_STAT */
95/* Alarm 2 status: 1 = alarm active, 0 = alarm inactive */
96#define ADIS16240_DIAG_STAT_ALARM2 (1<<9)
97/* Alarm 1 status: 1 = alarm active, 0 = alarm inactive */
98#define ADIS16240_DIAG_STAT_ALARM1 (1<<8)
99/* Capture buffer full: 1 = capture buffer is full */
100#define ADIS16240_DIAG_STAT_CPT_BUF_FUL (1<<7)
101/* Flash test, checksum flag: 1 = mismatch, 0 = match */
102#define ADIS16240_DIAG_STAT_CHKSUM (1<<6)
103/* Power-on, self-test flag: 1 = failure, 0 = pass */
104#define ADIS16240_DIAG_STAT_PWRON_FAIL (1<<5)
105/* Power-on self-test: 1 = in-progress, 0 = complete */
106#define ADIS16240_DIAG_STAT_PWRON_BUSY (1<<4)
107/* SPI communications failure */
108#define ADIS16240_DIAG_STAT_SPI_FAIL (1<<3)
109/* Flash update failure */
110#define ADIS16240_DIAG_STAT_FLASH_UPT (1<<2)
111/* Power supply above 3.625 V */
112#define ADIS16240_DIAG_STAT_POWER_HIGH (1<<1)
113 /* Power supply below 3.15 V */
114#define ADIS16240_DIAG_STAT_POWER_LOW (1<<0)
115
116/* GLOB_CMD */
117#define ADIS16240_GLOB_CMD_RESUME (1<<8)
118#define ADIS16240_GLOB_CMD_SW_RESET (1<<7)
119#define ADIS16240_GLOB_CMD_STANDBY (1<<2)
120
121#define ADIS16240_ERROR_ACTIVE (1<<14)
122
123#define ADIS16240_MAX_TX 24
124#define ADIS16240_MAX_RX 24
125
126/**
127 * struct adis16240_state - device instance specific data
128 * @us: actual spi_device
129 * @work_trigger_to_ring: bh for triggered event handling
130 * @work_cont_thresh: CLEAN
131 * @inter: used to check if new interrupt has been triggered
132 * @last_timestamp: passing timestamp from th to bh of interrupt handler
133 * @indio_dev: industrial I/O device structure
134 * @trig: data ready trigger registered with iio
135 * @tx: transmit buffer
136 * @rx: recieve buffer
137 * @buf_lock: mutex to protect tx and rx
138 **/
139struct adis16240_state {
140 struct spi_device *us;
141 struct work_struct work_trigger_to_ring;
142 struct iio_work_cont work_cont_thresh;
143 s64 last_timestamp;
144 struct iio_dev *indio_dev;
145 struct iio_trigger *trig;
146 u8 *tx;
147 u8 *rx;
148 struct mutex buf_lock;
149};
150
151int adis16240_set_irq(struct device *dev, bool enable);
152
153#ifdef CONFIG_IIO_RING_BUFFER
154/* At the moment triggers are only used for ring buffer
155 * filling. This may change!
156 */
157
158enum adis16240_scan {
159 ADIS16240_SCAN_SUPPLY,
160 ADIS16240_SCAN_ACC_X,
161 ADIS16240_SCAN_ACC_Y,
162 ADIS16240_SCAN_ACC_Z,
163 ADIS16240_SCAN_AUX_ADC,
164 ADIS16240_SCAN_TEMP,
165};
166
167void adis16240_remove_trigger(struct iio_dev *indio_dev);
168int adis16240_probe_trigger(struct iio_dev *indio_dev);
169
170ssize_t adis16240_read_data_from_ring(struct device *dev,
171 struct device_attribute *attr,
172 char *buf);
173
174
175int adis16240_configure_ring(struct iio_dev *indio_dev);
176void adis16240_unconfigure_ring(struct iio_dev *indio_dev);
177
178int adis16240_initialize_ring(struct iio_ring_buffer *ring);
179void adis16240_uninitialize_ring(struct iio_ring_buffer *ring);
180#else /* CONFIG_IIO_RING_BUFFER */
181
182static inline void adis16240_remove_trigger(struct iio_dev *indio_dev)
183{
184}
185
186static inline int adis16240_probe_trigger(struct iio_dev *indio_dev)
187{
188 return 0;
189}
190
191static inline ssize_t
192adis16240_read_data_from_ring(struct device *dev,
193 struct device_attribute *attr,
194 char *buf)
195{
196 return 0;
197}
198
199static int adis16240_configure_ring(struct iio_dev *indio_dev)
200{
201 return 0;
202}
203
204static inline void adis16240_unconfigure_ring(struct iio_dev *indio_dev)
205{
206}
207
208static inline int adis16240_initialize_ring(struct iio_ring_buffer *ring)
209{
210 return 0;
211}
212
213static inline void adis16240_uninitialize_ring(struct iio_ring_buffer *ring)
214{
215}
216
217#endif /* CONFIG_IIO_RING_BUFFER */
218#endif /* SPI_ADIS16240_H_ */
diff --git a/drivers/staging/iio/accel/adis16240_core.c b/drivers/staging/iio/accel/adis16240_core.c
new file mode 100644
index 000000000000..54fd6d77412f
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16240_core.c
@@ -0,0 +1,599 @@
1/*
2 * ADIS16240 Programmable Impact Sensor and Recorder driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/gpio.h>
12#include <linux/delay.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/spi/spi.h>
17
18#include <linux/sysfs.h>
19#include <linux/list.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "accel.h"
24#include "../adc/adc.h"
25
26#include "adis16240.h"
27
28#define DRIVER_NAME "adis16240"
29
30static int adis16240_check_status(struct device *dev);
31
32/**
33 * adis16240_spi_write_reg_8() - write single byte to a register
34 * @dev: device associated with child of actual device (iio_dev or iio_trig)
35 * @reg_address: the address of the register to be written
36 * @val: the value to write
37 **/
38static int adis16240_spi_write_reg_8(struct device *dev,
39 u8 reg_address,
40 u8 val)
41{
42 int ret;
43 struct iio_dev *indio_dev = dev_get_drvdata(dev);
44 struct adis16240_state *st = iio_dev_get_devdata(indio_dev);
45
46 mutex_lock(&st->buf_lock);
47 st->tx[0] = ADIS16240_WRITE_REG(reg_address);
48 st->tx[1] = val;
49
50 ret = spi_write(st->us, st->tx, 2);
51 mutex_unlock(&st->buf_lock);
52
53 return ret;
54}
55
56/**
57 * adis16240_spi_write_reg_16() - write 2 bytes to a pair of registers
58 * @dev: device associated with child of actual device (iio_dev or iio_trig)
59 * @reg_address: the address of the lower of the two registers. Second register
60 * is assumed to have address one greater.
61 * @val: value to be written
62 **/
63static int adis16240_spi_write_reg_16(struct device *dev,
64 u8 lower_reg_address,
65 u16 value)
66{
67 int ret;
68 struct spi_message msg;
69 struct iio_dev *indio_dev = dev_get_drvdata(dev);
70 struct adis16240_state *st = iio_dev_get_devdata(indio_dev);
71 struct spi_transfer xfers[] = {
72 {
73 .tx_buf = st->tx,
74 .bits_per_word = 8,
75 .len = 2,
76 .cs_change = 1,
77 .delay_usecs = 25,
78 }, {
79 .tx_buf = st->tx + 2,
80 .bits_per_word = 8,
81 .len = 2,
82 .cs_change = 1,
83 .delay_usecs = 25,
84 },
85 };
86
87 mutex_lock(&st->buf_lock);
88 st->tx[0] = ADIS16240_WRITE_REG(lower_reg_address);
89 st->tx[1] = value & 0xFF;
90 st->tx[2] = ADIS16240_WRITE_REG(lower_reg_address + 1);
91 st->tx[3] = (value >> 8) & 0xFF;
92
93 spi_message_init(&msg);
94 spi_message_add_tail(&xfers[0], &msg);
95 spi_message_add_tail(&xfers[1], &msg);
96 ret = spi_sync(st->us, &msg);
97 mutex_unlock(&st->buf_lock);
98
99 return ret;
100}
101
102/**
103 * adis16240_spi_read_reg_16() - read 2 bytes from a 16-bit register
104 * @dev: device associated with child of actual device (iio_dev or iio_trig)
105 * @reg_address: the address of the lower of the two registers. Second register
106 * is assumed to have address one greater.
107 * @val: somewhere to pass back the value read
108 **/
109static int adis16240_spi_read_reg_16(struct device *dev,
110 u8 lower_reg_address,
111 u16 *val)
112{
113 struct spi_message msg;
114 struct iio_dev *indio_dev = dev_get_drvdata(dev);
115 struct adis16240_state *st = iio_dev_get_devdata(indio_dev);
116 int ret;
117 struct spi_transfer xfers[] = {
118 {
119 .tx_buf = st->tx,
120 .bits_per_word = 8,
121 .len = 2,
122 .cs_change = 1,
123 .delay_usecs = 25,
124 }, {
125 .rx_buf = st->rx,
126 .bits_per_word = 8,
127 .len = 2,
128 .cs_change = 1,
129 .delay_usecs = 25,
130 },
131 };
132
133 mutex_lock(&st->buf_lock);
134 st->tx[0] = ADIS16240_READ_REG(lower_reg_address);
135 st->tx[1] = 0;
136 st->tx[2] = 0;
137 st->tx[3] = 0;
138
139 spi_message_init(&msg);
140 spi_message_add_tail(&xfers[0], &msg);
141 spi_message_add_tail(&xfers[1], &msg);
142 ret = spi_sync(st->us, &msg);
143 if (ret) {
144 dev_err(&st->us->dev,
145 "problem when reading 16 bit register 0x%02X",
146 lower_reg_address);
147 goto error_ret;
148 }
149 *val = (st->rx[0] << 8) | st->rx[1];
150
151error_ret:
152 mutex_unlock(&st->buf_lock);
153 return ret;
154}
155
156static ssize_t adis16240_spi_read_signed(struct device *dev,
157 struct device_attribute *attr,
158 char *buf,
159 unsigned bits)
160{
161 int ret;
162 s16 val = 0;
163 unsigned shift = 16 - bits;
164 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
165
166 ret = adis16240_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
167 if (ret)
168 return ret;
169
170 if (val & ADIS16240_ERROR_ACTIVE)
171 adis16240_check_status(dev);
172
173 val = ((s16)(val << shift) >> shift);
174 return sprintf(buf, "%d\n", val);
175}
176
177static ssize_t adis16240_read_10bit_unsigned(struct device *dev,
178 struct device_attribute *attr,
179 char *buf)
180{
181 int ret;
182 u16 val = 0;
183 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
184
185 ret = adis16240_spi_read_reg_16(dev, this_attr->address, &val);
186 if (ret)
187 return ret;
188
189 if (val & ADIS16240_ERROR_ACTIVE)
190 adis16240_check_status(dev);
191
192 return sprintf(buf, "%u\n", val & 0x03FF);
193}
194
195static ssize_t adis16240_read_10bit_signed(struct device *dev,
196 struct device_attribute *attr,
197 char *buf)
198{
199 struct iio_dev *indio_dev = dev_get_drvdata(dev);
200 ssize_t ret;
201
202 /* Take the iio_dev status lock */
203 mutex_lock(&indio_dev->mlock);
204 ret = adis16240_spi_read_signed(dev, attr, buf, 10);
205 mutex_unlock(&indio_dev->mlock);
206
207 return ret;
208}
209
210static ssize_t adis16240_read_12bit_signed(struct device *dev,
211 struct device_attribute *attr,
212 char *buf)
213{
214 struct iio_dev *indio_dev = dev_get_drvdata(dev);
215 ssize_t ret;
216
217 /* Take the iio_dev status lock */
218 mutex_lock(&indio_dev->mlock);
219 ret = adis16240_spi_read_signed(dev, attr, buf, 12);
220 mutex_unlock(&indio_dev->mlock);
221
222 return ret;
223}
224
225static ssize_t adis16240_write_16bit(struct device *dev,
226 struct device_attribute *attr,
227 const char *buf,
228 size_t len)
229{
230 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
231 int ret;
232 long val;
233
234 ret = strict_strtol(buf, 10, &val);
235 if (ret)
236 goto error_ret;
237 ret = adis16240_spi_write_reg_16(dev, this_attr->address, val);
238
239error_ret:
240 return ret ? ret : len;
241}
242
243static int adis16240_reset(struct device *dev)
244{
245 int ret;
246 ret = adis16240_spi_write_reg_8(dev,
247 ADIS16240_GLOB_CMD,
248 ADIS16240_GLOB_CMD_SW_RESET);
249 if (ret)
250 dev_err(dev, "problem resetting device");
251
252 return ret;
253}
254
255static ssize_t adis16240_write_reset(struct device *dev,
256 struct device_attribute *attr,
257 const char *buf, size_t len)
258{
259 if (len < 1)
260 return -EINVAL;
261 switch (buf[0]) {
262 case '1':
263 case 'y':
264 case 'Y':
265 return adis16240_reset(dev);
266 }
267 return -EINVAL;
268}
269
270int adis16240_set_irq(struct device *dev, bool enable)
271{
272 int ret = 0;
273 u16 msc;
274
275 ret = adis16240_spi_read_reg_16(dev, ADIS16240_MSC_CTRL, &msc);
276 if (ret)
277 goto error_ret;
278
279 msc |= ADIS16240_MSC_CTRL_ACTIVE_HIGH;
280 msc &= ~ADIS16240_MSC_CTRL_DATA_RDY_DIO2;
281 if (enable)
282 msc |= ADIS16240_MSC_CTRL_DATA_RDY_EN;
283 else
284 msc &= ~ADIS16240_MSC_CTRL_DATA_RDY_EN;
285
286 ret = adis16240_spi_write_reg_16(dev, ADIS16240_MSC_CTRL, msc);
287
288error_ret:
289 return ret;
290}
291
292static int adis16240_self_test(struct device *dev)
293{
294 int ret;
295 ret = adis16240_spi_write_reg_16(dev,
296 ADIS16240_MSC_CTRL,
297 ADIS16240_MSC_CTRL_SELF_TEST_EN);
298 if (ret) {
299 dev_err(dev, "problem starting self test");
300 goto err_ret;
301 }
302
303 msleep(ADIS16240_STARTUP_DELAY);
304
305 adis16240_check_status(dev);
306
307err_ret:
308 return ret;
309}
310
311static int adis16240_check_status(struct device *dev)
312{
313 u16 status;
314 int ret;
315
316 ret = adis16240_spi_read_reg_16(dev, ADIS16240_DIAG_STAT, &status);
317
318 if (ret < 0) {
319 dev_err(dev, "Reading status failed\n");
320 goto error_ret;
321 }
322
323 ret = status & 0x2F;
324 if (status & ADIS16240_DIAG_STAT_PWRON_FAIL)
325 dev_err(dev, "Power-on, self-test fail\n");
326 if (status & ADIS16240_DIAG_STAT_SPI_FAIL)
327 dev_err(dev, "SPI failure\n");
328 if (status & ADIS16240_DIAG_STAT_FLASH_UPT)
329 dev_err(dev, "Flash update failed\n");
330 if (status & ADIS16240_DIAG_STAT_POWER_HIGH)
331 dev_err(dev, "Power supply above 3.625V\n");
332 if (status & ADIS16240_DIAG_STAT_POWER_LOW)
333 dev_err(dev, "Power supply below 2.225V\n");
334
335error_ret:
336 return ret;
337}
338
339static int adis16240_initial_setup(struct adis16240_state *st)
340{
341 int ret;
342 struct device *dev = &st->indio_dev->dev;
343
344 /* Disable IRQ */
345 ret = adis16240_set_irq(dev, false);
346 if (ret) {
347 dev_err(dev, "disable irq failed");
348 goto err_ret;
349 }
350
351 /* Do self test */
352 ret = adis16240_self_test(dev);
353 if (ret) {
354 dev_err(dev, "self test failure");
355 goto err_ret;
356 }
357
358 /* Read status register to check the result */
359 ret = adis16240_check_status(dev);
360 if (ret) {
361 adis16240_reset(dev);
362 dev_err(dev, "device not playing ball -> reset");
363 msleep(ADIS16240_STARTUP_DELAY);
364 ret = adis16240_check_status(dev);
365 if (ret) {
366 dev_err(dev, "giving up");
367 goto err_ret;
368 }
369 }
370
371 printk(KERN_INFO DRIVER_NAME ": at CS%d (irq %d)\n",
372 st->us->chip_select, st->us->irq);
373
374err_ret:
375 return ret;
376}
377
378static IIO_DEV_ATTR_IN_NAMED_RAW(supply, adis16240_read_10bit_unsigned,
379 ADIS16240_SUPPLY_OUT);
380static IIO_DEV_ATTR_IN_RAW(0, adis16240_read_10bit_signed,
381 ADIS16240_AUX_ADC);
382static IIO_CONST_ATTR(in_supply_scale, "0.00488");
383static IIO_DEV_ATTR_ACCEL_X(adis16240_read_10bit_signed,
384 ADIS16240_XACCL_OUT);
385static IIO_DEVICE_ATTR(accel_x_peak_raw, S_IRUGO,
386 adis16240_read_10bit_signed, NULL,
387 ADIS16240_XPEAK_OUT);
388static IIO_DEV_ATTR_ACCEL_Y(adis16240_read_10bit_signed,
389 ADIS16240_YACCL_OUT);
390static IIO_DEVICE_ATTR(accel_y_peak_raw, S_IRUGO,
391 adis16240_read_10bit_signed, NULL,
392 ADIS16240_YPEAK_OUT);
393static IIO_DEV_ATTR_ACCEL_Z(adis16240_read_10bit_signed,
394 ADIS16240_ZACCL_OUT);
395static IIO_DEVICE_ATTR(accel_z_peak_raw, S_IRUGO,
396 adis16240_read_10bit_signed, NULL,
397 ADIS16240_ZPEAK_OUT);
398
399static IIO_DEVICE_ATTR(accel_xyz_squared_peak_raw, S_IRUGO,
400 adis16240_read_12bit_signed, NULL,
401 ADIS16240_XYZPEAK_OUT);
402static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO,
403 adis16240_read_10bit_signed,
404 adis16240_write_16bit,
405 ADIS16240_XACCL_OFF);
406static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO,
407 adis16240_read_10bit_signed,
408 adis16240_write_16bit,
409 ADIS16240_YACCL_OFF);
410static IIO_DEV_ATTR_ACCEL_Z_OFFSET(S_IWUSR | S_IRUGO,
411 adis16240_read_10bit_signed,
412 adis16240_write_16bit,
413 ADIS16240_ZACCL_OFF);
414static IIO_DEV_ATTR_TEMP_RAW(adis16240_read_10bit_unsigned);
415static IIO_CONST_ATTR(temp_scale, "0.244");
416
417static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16240_write_reset, 0);
418
419static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("4096");
420
421static IIO_CONST_ATTR(name, "adis16240");
422
423static struct attribute *adis16240_event_attributes[] = {
424 NULL
425};
426
427static struct attribute_group adis16240_event_attribute_group = {
428 .attrs = adis16240_event_attributes,
429};
430
431static struct attribute *adis16240_attributes[] = {
432 &iio_dev_attr_in_supply_raw.dev_attr.attr,
433 &iio_const_attr_in_supply_scale.dev_attr.attr,
434 &iio_dev_attr_in0_raw.dev_attr.attr,
435 &iio_dev_attr_accel_x_raw.dev_attr.attr,
436 &iio_dev_attr_accel_x_offset.dev_attr.attr,
437 &iio_dev_attr_accel_x_peak_raw.dev_attr.attr,
438 &iio_dev_attr_accel_y_raw.dev_attr.attr,
439 &iio_dev_attr_accel_y_offset.dev_attr.attr,
440 &iio_dev_attr_accel_y_peak_raw.dev_attr.attr,
441 &iio_dev_attr_accel_z_raw.dev_attr.attr,
442 &iio_dev_attr_accel_z_offset.dev_attr.attr,
443 &iio_dev_attr_accel_z_peak_raw.dev_attr.attr,
444 &iio_dev_attr_accel_xyz_squared_peak_raw.dev_attr.attr,
445 &iio_dev_attr_temp_raw.dev_attr.attr,
446 &iio_const_attr_temp_scale.dev_attr.attr,
447 &iio_const_attr_available_sampling_frequency.dev_attr.attr,
448 &iio_dev_attr_reset.dev_attr.attr,
449 &iio_const_attr_name.dev_attr.attr,
450 NULL
451};
452
453static const struct attribute_group adis16240_attribute_group = {
454 .attrs = adis16240_attributes,
455};
456
457static int __devinit adis16240_probe(struct spi_device *spi)
458{
459 int ret, regdone = 0;
460 struct adis16240_state *st = kzalloc(sizeof *st, GFP_KERNEL);
461 if (!st) {
462 ret = -ENOMEM;
463 goto error_ret;
464 }
465 /* this is only used for removal purposes */
466 spi_set_drvdata(spi, st);
467
468 /* Allocate the comms buffers */
469 st->rx = kzalloc(sizeof(*st->rx)*ADIS16240_MAX_RX, GFP_KERNEL);
470 if (st->rx == NULL) {
471 ret = -ENOMEM;
472 goto error_free_st;
473 }
474 st->tx = kzalloc(sizeof(*st->tx)*ADIS16240_MAX_TX, GFP_KERNEL);
475 if (st->tx == NULL) {
476 ret = -ENOMEM;
477 goto error_free_rx;
478 }
479 st->us = spi;
480 mutex_init(&st->buf_lock);
481 /* setup the industrialio driver allocated elements */
482 st->indio_dev = iio_allocate_device();
483 if (st->indio_dev == NULL) {
484 ret = -ENOMEM;
485 goto error_free_tx;
486 }
487
488 st->indio_dev->dev.parent = &spi->dev;
489 st->indio_dev->num_interrupt_lines = 1;
490 st->indio_dev->event_attrs = &adis16240_event_attribute_group;
491 st->indio_dev->attrs = &adis16240_attribute_group;
492 st->indio_dev->dev_data = (void *)(st);
493 st->indio_dev->driver_module = THIS_MODULE;
494 st->indio_dev->modes = INDIO_DIRECT_MODE;
495
496 ret = adis16240_configure_ring(st->indio_dev);
497 if (ret)
498 goto error_free_dev;
499
500 ret = iio_device_register(st->indio_dev);
501 if (ret)
502 goto error_unreg_ring_funcs;
503 regdone = 1;
504
505 ret = adis16240_initialize_ring(st->indio_dev->ring);
506 if (ret) {
507 printk(KERN_ERR "failed to initialize the ring\n");
508 goto error_unreg_ring_funcs;
509 }
510
511 if (spi->irq) {
512 ret = iio_register_interrupt_line(spi->irq,
513 st->indio_dev,
514 0,
515 IRQF_TRIGGER_RISING,
516 "adis16240");
517 if (ret)
518 goto error_uninitialize_ring;
519
520 ret = adis16240_probe_trigger(st->indio_dev);
521 if (ret)
522 goto error_unregister_line;
523 }
524
525 /* Get the device into a sane initial state */
526 ret = adis16240_initial_setup(st);
527 if (ret)
528 goto error_remove_trigger;
529 return 0;
530
531error_remove_trigger:
532 adis16240_remove_trigger(st->indio_dev);
533error_unregister_line:
534 if (spi->irq)
535 iio_unregister_interrupt_line(st->indio_dev, 0);
536error_uninitialize_ring:
537 adis16240_uninitialize_ring(st->indio_dev->ring);
538error_unreg_ring_funcs:
539 adis16240_unconfigure_ring(st->indio_dev);
540error_free_dev:
541 if (regdone)
542 iio_device_unregister(st->indio_dev);
543 else
544 iio_free_device(st->indio_dev);
545error_free_tx:
546 kfree(st->tx);
547error_free_rx:
548 kfree(st->rx);
549error_free_st:
550 kfree(st);
551error_ret:
552 return ret;
553}
554
555static int adis16240_remove(struct spi_device *spi)
556{
557 struct adis16240_state *st = spi_get_drvdata(spi);
558 struct iio_dev *indio_dev = st->indio_dev;
559
560 flush_scheduled_work();
561
562 adis16240_remove_trigger(indio_dev);
563 if (spi->irq)
564 iio_unregister_interrupt_line(indio_dev, 0);
565
566 adis16240_uninitialize_ring(indio_dev->ring);
567 iio_device_unregister(indio_dev);
568 adis16240_unconfigure_ring(indio_dev);
569 kfree(st->tx);
570 kfree(st->rx);
571 kfree(st);
572
573 return 0;
574}
575
576static struct spi_driver adis16240_driver = {
577 .driver = {
578 .name = "adis16240",
579 .owner = THIS_MODULE,
580 },
581 .probe = adis16240_probe,
582 .remove = __devexit_p(adis16240_remove),
583};
584
585static __init int adis16240_init(void)
586{
587 return spi_register_driver(&adis16240_driver);
588}
589module_init(adis16240_init);
590
591static __exit void adis16240_exit(void)
592{
593 spi_unregister_driver(&adis16240_driver);
594}
595module_exit(adis16240_exit);
596
597MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
598MODULE_DESCRIPTION("Analog Devices Programmable Impact Sensor and Recorder");
599MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/accel/adis16240_ring.c b/drivers/staging/iio/accel/adis16240_ring.c
new file mode 100644
index 000000000000..26b677bd84c0
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16240_ring.c
@@ -0,0 +1,254 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/gpio.h>
4#include <linux/workqueue.h>
5#include <linux/mutex.h>
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/spi/spi.h>
9#include <linux/sysfs.h>
10#include <linux/list.h>
11
12#include "../iio.h"
13#include "../sysfs.h"
14#include "../ring_sw.h"
15#include "accel.h"
16#include "../trigger.h"
17#include "adis16240.h"
18
19/**
20 * combine_8_to_16() utility function to munge to u8s into u16
21 **/
22static inline u16 combine_8_to_16(u8 lower, u8 upper)
23{
24 u16 _lower = lower;
25 u16 _upper = upper;
26 return _lower | (_upper << 8);
27}
28
29static IIO_SCAN_EL_C(supply, ADIS16240_SCAN_SUPPLY, IIO_UNSIGNED(10),
30 ADIS16240_SUPPLY_OUT, NULL);
31static IIO_SCAN_EL_C(accel_x, ADIS16240_SCAN_ACC_X, IIO_SIGNED(10),
32 ADIS16240_XACCL_OUT, NULL);
33static IIO_SCAN_EL_C(accel_y, ADIS16240_SCAN_ACC_Y, IIO_SIGNED(10),
34 ADIS16240_YACCL_OUT, NULL);
35static IIO_SCAN_EL_C(accel_z, ADIS16240_SCAN_ACC_Z, IIO_SIGNED(10),
36 ADIS16240_ZACCL_OUT, NULL);
37static IIO_SCAN_EL_C(aux_adc, ADIS16240_SCAN_AUX_ADC, IIO_UNSIGNED(10),
38 ADIS16240_AUX_ADC, NULL);
39static IIO_SCAN_EL_C(temp, ADIS16240_SCAN_TEMP, IIO_UNSIGNED(10),
40 ADIS16240_TEMP_OUT, NULL);
41
42static IIO_SCAN_EL_TIMESTAMP(6);
43
44static struct attribute *adis16240_scan_el_attrs[] = {
45 &iio_scan_el_supply.dev_attr.attr,
46 &iio_scan_el_accel_x.dev_attr.attr,
47 &iio_scan_el_accel_y.dev_attr.attr,
48 &iio_scan_el_accel_z.dev_attr.attr,
49 &iio_scan_el_aux_adc.dev_attr.attr,
50 &iio_scan_el_temp.dev_attr.attr,
51 &iio_scan_el_timestamp.dev_attr.attr,
52 NULL,
53};
54
55static struct attribute_group adis16240_scan_el_group = {
56 .attrs = adis16240_scan_el_attrs,
57 .name = "scan_elements",
58};
59
60/**
61 * adis16240_poll_func_th() top half interrupt handler called by trigger
62 * @private_data: iio_dev
63 **/
64static void adis16240_poll_func_th(struct iio_dev *indio_dev)
65{
66 struct adis16240_state *st = iio_dev_get_devdata(indio_dev);
67 st->last_timestamp = indio_dev->trig->timestamp;
68 schedule_work(&st->work_trigger_to_ring);
69}
70
71/**
72 * adis16240_read_ring_data() read data registers which will be placed into ring
73 * @dev: device associated with child of actual device (iio_dev or iio_trig)
74 * @rx: somewhere to pass back the value read
75 **/
76static int adis16240_read_ring_data(struct device *dev, u8 *rx)
77{
78 struct spi_message msg;
79 struct iio_dev *indio_dev = dev_get_drvdata(dev);
80 struct adis16240_state *st = iio_dev_get_devdata(indio_dev);
81 struct spi_transfer xfers[ADIS16240_OUTPUTS + 1];
82 int ret;
83 int i;
84
85 mutex_lock(&st->buf_lock);
86
87 spi_message_init(&msg);
88
89 memset(xfers, 0, sizeof(xfers));
90 for (i = 0; i <= ADIS16240_OUTPUTS; i++) {
91 xfers[i].bits_per_word = 8;
92 xfers[i].cs_change = 1;
93 xfers[i].len = 2;
94 xfers[i].delay_usecs = 30;
95 xfers[i].tx_buf = st->tx + 2 * i;
96 st->tx[2 * i]
97 = ADIS16240_READ_REG(ADIS16240_SUPPLY_OUT + 2 * i);
98 st->tx[2 * i + 1] = 0;
99 if (i >= 1)
100 xfers[i].rx_buf = rx + 2 * (i - 1);
101 spi_message_add_tail(&xfers[i], &msg);
102 }
103
104 ret = spi_sync(st->us, &msg);
105 if (ret)
106 dev_err(&st->us->dev, "problem when burst reading");
107
108 mutex_unlock(&st->buf_lock);
109
110 return ret;
111}
112
113
114static void adis16240_trigger_bh_to_ring(struct work_struct *work_s)
115{
116 struct adis16240_state *st
117 = container_of(work_s, struct adis16240_state,
118 work_trigger_to_ring);
119
120 int i = 0;
121 s16 *data;
122 size_t datasize = st->indio_dev
123 ->ring->access.get_bpd(st->indio_dev->ring);
124
125 data = kmalloc(datasize , GFP_KERNEL);
126 if (data == NULL) {
127 dev_err(&st->us->dev, "memory alloc failed in ring bh");
128 return;
129 }
130
131 if (st->indio_dev->scan_count)
132 if (adis16240_read_ring_data(&st->indio_dev->dev, st->rx) >= 0)
133 for (; i < st->indio_dev->scan_count; i++) {
134 data[i] = combine_8_to_16(st->rx[i*2+1],
135 st->rx[i*2]);
136 }
137
138 /* Guaranteed to be aligned with 8 byte boundary */
139 if (st->indio_dev->scan_timestamp)
140 *((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
141
142 st->indio_dev->ring->access.store_to(st->indio_dev->ring,
143 (u8 *)data,
144 st->last_timestamp);
145
146 iio_trigger_notify_done(st->indio_dev->trig);
147 kfree(data);
148
149 return;
150}
151
152static int adis16240_data_rdy_ring_preenable(struct iio_dev *indio_dev)
153{
154 size_t size;
155 dev_dbg(&indio_dev->dev, "%s\n", __func__);
156 /* Check if there are any scan elements enabled, if not fail*/
157 if (!(indio_dev->scan_count || indio_dev->scan_timestamp))
158 return -EINVAL;
159
160 if (indio_dev->ring->access.set_bpd) {
161 if (indio_dev->scan_timestamp)
162 if (indio_dev->scan_count)
163 /* Timestamp (aligned sizeof(s64) and data */
164 size = (((indio_dev->scan_count * sizeof(s16))
165 + sizeof(s64) - 1)
166 & ~(sizeof(s64) - 1))
167 + sizeof(s64);
168 else /* Timestamp only */
169 size = sizeof(s64);
170 else /* Data only */
171 size = indio_dev->scan_count*sizeof(s16);
172 indio_dev->ring->access.set_bpd(indio_dev->ring, size);
173 }
174
175 return 0;
176}
177
178static int adis16240_data_rdy_ring_postenable(struct iio_dev *indio_dev)
179{
180 return indio_dev->trig
181 ? iio_trigger_attach_poll_func(indio_dev->trig,
182 indio_dev->pollfunc)
183 : 0;
184}
185
186static int adis16240_data_rdy_ring_predisable(struct iio_dev *indio_dev)
187{
188 return indio_dev->trig
189 ? iio_trigger_dettach_poll_func(indio_dev->trig,
190 indio_dev->pollfunc)
191 : 0;
192}
193
194void adis16240_unconfigure_ring(struct iio_dev *indio_dev)
195{
196 kfree(indio_dev->pollfunc);
197 iio_sw_rb_free(indio_dev->ring);
198}
199
200int adis16240_configure_ring(struct iio_dev *indio_dev)
201{
202 int ret = 0;
203 struct adis16240_state *st = indio_dev->dev_data;
204 struct iio_ring_buffer *ring;
205 INIT_WORK(&st->work_trigger_to_ring, adis16240_trigger_bh_to_ring);
206 /* Set default scan mode */
207
208 iio_scan_mask_set(indio_dev, iio_scan_el_supply.number);
209 iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
210 iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
211 iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
212 iio_scan_mask_set(indio_dev, iio_scan_el_temp.number);
213 iio_scan_mask_set(indio_dev, iio_scan_el_aux_adc.number);
214 indio_dev->scan_timestamp = true;
215
216 indio_dev->scan_el_attrs = &adis16240_scan_el_group;
217
218 ring = iio_sw_rb_allocate(indio_dev);
219 if (!ring) {
220 ret = -ENOMEM;
221 return ret;
222 }
223 indio_dev->ring = ring;
224 /* Effectively select the ring buffer implementation */
225 iio_ring_sw_register_funcs(&ring->access);
226 ring->preenable = &adis16240_data_rdy_ring_preenable;
227 ring->postenable = &adis16240_data_rdy_ring_postenable;
228 ring->predisable = &adis16240_data_rdy_ring_predisable;
229 ring->owner = THIS_MODULE;
230
231 indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
232 if (indio_dev->pollfunc == NULL) {
233 ret = -ENOMEM;
234 goto error_iio_sw_rb_free;;
235 }
236 indio_dev->pollfunc->poll_func_main = &adis16240_poll_func_th;
237 indio_dev->pollfunc->private_data = indio_dev;
238 indio_dev->modes |= INDIO_RING_TRIGGERED;
239 return 0;
240
241error_iio_sw_rb_free:
242 iio_sw_rb_free(indio_dev->ring);
243 return ret;
244}
245
246int adis16240_initialize_ring(struct iio_ring_buffer *ring)
247{
248 return iio_ring_buffer_register(ring, 0);
249}
250
251void adis16240_uninitialize_ring(struct iio_ring_buffer *ring)
252{
253 iio_ring_buffer_unregister(ring);
254}
diff --git a/drivers/staging/iio/accel/adis16240_trigger.c b/drivers/staging/iio/accel/adis16240_trigger.c
new file mode 100644
index 000000000000..df1312e17f4b
--- /dev/null
+++ b/drivers/staging/iio/accel/adis16240_trigger.c
@@ -0,0 +1,124 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/mutex.h>
4#include <linux/device.h>
5#include <linux/kernel.h>
6#include <linux/sysfs.h>
7#include <linux/list.h>
8#include <linux/spi/spi.h>
9
10#include "../iio.h"
11#include "../sysfs.h"
12#include "../trigger.h"
13#include "adis16240.h"
14
15/**
16 * adis16240_data_rdy_trig_poll() the event handler for the data rdy trig
17 **/
18static int adis16240_data_rdy_trig_poll(struct iio_dev *dev_info,
19 int index,
20 s64 timestamp,
21 int no_test)
22{
23 struct adis16240_state *st = iio_dev_get_devdata(dev_info);
24 struct iio_trigger *trig = st->trig;
25
26 trig->timestamp = timestamp;
27 iio_trigger_poll(trig);
28
29 return IRQ_HANDLED;
30}
31
32IIO_EVENT_SH(data_rdy_trig, &adis16240_data_rdy_trig_poll);
33
34static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
35
36static struct attribute *adis16240_trigger_attrs[] = {
37 &dev_attr_name.attr,
38 NULL,
39};
40
41static const struct attribute_group adis16240_trigger_attr_group = {
42 .attrs = adis16240_trigger_attrs,
43};
44
45/**
46 * adis16240_data_rdy_trigger_set_state() set datardy interrupt state
47 **/
48static int adis16240_data_rdy_trigger_set_state(struct iio_trigger *trig,
49 bool state)
50{
51 struct adis16240_state *st = trig->private_data;
52 struct iio_dev *indio_dev = st->indio_dev;
53 int ret = 0;
54
55 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
56 ret = adis16240_set_irq(&st->indio_dev->dev, state);
57 if (state == false) {
58 iio_remove_event_from_list(&iio_event_data_rdy_trig,
59 &indio_dev->interrupts[0]
60 ->ev_list);
61 flush_scheduled_work();
62 } else {
63 iio_add_event_to_list(&iio_event_data_rdy_trig,
64 &indio_dev->interrupts[0]->ev_list);
65 }
66 return ret;
67}
68
69/**
70 * adis16240_trig_try_reen() try renabling irq for data rdy trigger
71 * @trig: the datardy trigger
72 **/
73static int adis16240_trig_try_reen(struct iio_trigger *trig)
74{
75 struct adis16240_state *st = trig->private_data;
76 enable_irq(st->us->irq);
77 return 0;
78}
79
80int adis16240_probe_trigger(struct iio_dev *indio_dev)
81{
82 int ret;
83 struct adis16240_state *st = indio_dev->dev_data;
84
85 st->trig = iio_allocate_trigger();
86 st->trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
87 if (!st->trig->name) {
88 ret = -ENOMEM;
89 goto error_free_trig;
90 }
91 snprintf((char *)st->trig->name,
92 IIO_TRIGGER_NAME_LENGTH,
93 "adis16240-dev%d", indio_dev->id);
94 st->trig->dev.parent = &st->us->dev;
95 st->trig->owner = THIS_MODULE;
96 st->trig->private_data = st;
97 st->trig->set_trigger_state = &adis16240_data_rdy_trigger_set_state;
98 st->trig->try_reenable = &adis16240_trig_try_reen;
99 st->trig->control_attrs = &adis16240_trigger_attr_group;
100 ret = iio_trigger_register(st->trig);
101
102 /* select default trigger */
103 indio_dev->trig = st->trig;
104 if (ret)
105 goto error_free_trig_name;
106
107 return 0;
108
109error_free_trig_name:
110 kfree(st->trig->name);
111error_free_trig:
112 iio_free_trigger(st->trig);
113
114 return ret;
115}
116
117void adis16240_remove_trigger(struct iio_dev *indio_dev)
118{
119 struct adis16240_state *state = indio_dev->dev_data;
120
121 iio_trigger_unregister(state->trig);
122 kfree(state->trig->name);
123 iio_free_trigger(state->trig);
124}
diff --git a/drivers/staging/iio/accel/inclinometer.h b/drivers/staging/iio/accel/inclinometer.h
new file mode 100644
index 000000000000..5b49f835eac5
--- /dev/null
+++ b/drivers/staging/iio/accel/inclinometer.h
@@ -0,0 +1,23 @@
1/*
2 * Inclinometer related attributes
3 */
4#include "../sysfs.h"
5
6#define IIO_DEV_ATTR_INCLI_X(_show, _addr) \
7 IIO_DEVICE_ATTR(incli_x_raw, S_IRUGO, _show, NULL, _addr)
8
9#define IIO_DEV_ATTR_INCLI_Y(_show, _addr) \
10 IIO_DEVICE_ATTR(incli_y_raw, S_IRUGO, _show, NULL, _addr)
11
12#define IIO_DEV_ATTR_INCLI_Z(_show, _addr) \
13 IIO_DEVICE_ATTR(incli_z_raw, S_IRUGO, _show, NULL, _addr)
14
15#define IIO_DEV_ATTR_INCLI_X_OFFSET(_mode, _show, _store, _addr) \
16 IIO_DEVICE_ATTR(incli_x_offset, _mode, _show, _store, _addr)
17
18#define IIO_DEV_ATTR_INCLI_Y_OFFSET(_mode, _show, _store, _addr) \
19 IIO_DEVICE_ATTR(incli_y_offset, _mode, _show, _store, _addr)
20
21#define IIO_DEV_ATTR_INCLI_Z_OFFSET(_mode, _show, _store, _addr) \
22 IIO_DEVICE_ATTR(incli_z_offset, _mode, _show, _store, _addr)
23
diff --git a/drivers/staging/iio/accel/kxsd9.c b/drivers/staging/iio/accel/kxsd9.c
index db2dd537ffb0..ae7ffe114fc5 100644
--- a/drivers/staging/iio/accel/kxsd9.c
+++ b/drivers/staging/iio/accel/kxsd9.c
@@ -26,6 +26,7 @@
26#include <linux/rtc.h> 26#include <linux/rtc.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29#include <linux/string.h>
29 30
30#include "../iio.h" 31#include "../iio.h"
31#include "../sysfs.h" 32#include "../sysfs.h"
@@ -51,8 +52,10 @@
51#define KXSD9_READ(a) (0x80 | (a)) 52#define KXSD9_READ(a) (0x80 | (a))
52#define KXSD9_WRITE(a) (a) 53#define KXSD9_WRITE(a) (a)
53 54
54#define IIO_DEV_ATTR_ACCEL_SET_RANGE(_mode, _show, _store) \ 55#define KXSD9_SCALE_2G "0.011978"
55 IIO_DEVICE_ATTR(accel_range, _mode, _show, _store, 0) 56#define KXSD9_SCALE_4G "0.023927"
57#define KXSD9_SCALE_6G "0.035934"
58#define KXSD9_SCALE_8G "0.047853"
56 59
57#define KXSD9_STATE_RX_SIZE 2 60#define KXSD9_STATE_RX_SIZE 2
58#define KXSD9_STATE_TX_SIZE 4 61#define KXSD9_STATE_TX_SIZE 4
@@ -73,9 +76,9 @@ struct kxsd9_state {
73}; 76};
74 77
75/* This may want to move to mili g to allow for non integer ranges */ 78/* This may want to move to mili g to allow for non integer ranges */
76static ssize_t kxsd9_read_accel_range(struct device *dev, 79static ssize_t kxsd9_read_scale(struct device *dev,
77 struct device_attribute *attr, 80 struct device_attribute *attr,
78 char *buf) 81 char *buf)
79{ 82{
80 int ret; 83 int ret;
81 ssize_t len = 0; 84 ssize_t len = 0;
@@ -101,16 +104,16 @@ static ssize_t kxsd9_read_accel_range(struct device *dev,
101 104
102 switch (st->rx[1] & KXSD9_FS_MASK) { 105 switch (st->rx[1] & KXSD9_FS_MASK) {
103 case KXSD9_FS_8: 106 case KXSD9_FS_8:
104 len += sprintf(buf, "8\n"); 107 len += sprintf(buf, "%s\n", KXSD9_SCALE_8G);
105 break; 108 break;
106 case KXSD9_FS_6: 109 case KXSD9_FS_6:
107 len += sprintf(buf, "6\n"); 110 len += sprintf(buf, "%s\n", KXSD9_SCALE_6G);
108 break; 111 break;
109 case KXSD9_FS_4: 112 case KXSD9_FS_4:
110 len += sprintf(buf, "4\n"); 113 len += sprintf(buf, "%s\n", KXSD9_SCALE_4G);
111 break; 114 break;
112 case KXSD9_FS_2: 115 case KXSD9_FS_2:
113 len += sprintf(buf, "2\n"); 116 len += sprintf(buf, "%s\n", KXSD9_SCALE_2G);
114 break; 117 break;
115 } 118 }
116 119
@@ -119,12 +122,12 @@ error_ret:
119 122
120 return ret ? ret : len; 123 return ret ? ret : len;
121} 124}
122static ssize_t kxsd9_write_accel_range(struct device *dev, 125static ssize_t kxsd9_write_scale(struct device *dev,
123 struct device_attribute *attr, 126 struct device_attribute *attr,
124 const char *buf, 127 const char *buf,
125 size_t len) 128 size_t len)
126{ 129{
127 long readin; 130
128 struct spi_message msg; 131 struct spi_message msg;
129 int ret; 132 int ret;
130 struct iio_dev *indio_dev = dev_get_drvdata(dev); 133 struct iio_dev *indio_dev = dev_get_drvdata(dev);
@@ -145,25 +148,25 @@ static ssize_t kxsd9_write_accel_range(struct device *dev,
145 }, 148 },
146 }; 149 };
147 150
148 ret = strict_strtol(buf, 10, &readin); 151 if (!strncmp(buf, KXSD9_SCALE_8G,
149 if (ret) 152 strlen(buf) < strlen(KXSD9_SCALE_8G)
150 return ret; 153 ? strlen(buf) : strlen(KXSD9_SCALE_8G)))
151 switch (readin) {
152 case 8:
153 val = KXSD9_FS_8; 154 val = KXSD9_FS_8;
154 break; 155 else if (!strncmp(buf, KXSD9_SCALE_6G,
155 case 6: 156 strlen(buf) < strlen(KXSD9_SCALE_6G)
157 ? strlen(buf) : strlen(KXSD9_SCALE_6G)))
156 val = KXSD9_FS_6; 158 val = KXSD9_FS_6;
157 break; 159 else if (!strncmp(buf, KXSD9_SCALE_4G,
158 case 4: 160 strlen(buf) < strlen(KXSD9_SCALE_4G)
161 ? strlen(buf) : strlen(KXSD9_SCALE_4G)))
159 val = KXSD9_FS_4; 162 val = KXSD9_FS_4;
160 break; 163 else if (!strncmp(buf, KXSD9_SCALE_2G,
161 case 2: 164 strlen(buf) < strlen(KXSD9_SCALE_2G)
165 ? strlen(buf) : strlen(KXSD9_SCALE_2G)))
162 val = KXSD9_FS_2; 166 val = KXSD9_FS_2;
163 break; 167 else
164 default:
165 return -EINVAL; 168 return -EINVAL;
166 } 169
167 mutex_lock(&st->buf_lock); 170 mutex_lock(&st->buf_lock);
168 st->tx[0] = KXSD9_READ(KXSD9_REG_CTRL_C); 171 st->tx[0] = KXSD9_READ(KXSD9_REG_CTRL_C);
169 st->tx[1] = 0; 172 st->tx[1] = 0;
@@ -182,6 +185,7 @@ error_ret:
182 mutex_unlock(&st->buf_lock); 185 mutex_unlock(&st->buf_lock);
183 return ret ? ret : len; 186 return ret ? ret : len;
184} 187}
188
185static ssize_t kxsd9_read_accel(struct device *dev, 189static ssize_t kxsd9_read_accel(struct device *dev,
186 struct device_attribute *attr, 190 struct device_attribute *attr,
187 char *buf) 191 char *buf)
@@ -227,17 +231,27 @@ error_ret:
227static IIO_DEV_ATTR_ACCEL_X(kxsd9_read_accel, KXSD9_REG_X); 231static IIO_DEV_ATTR_ACCEL_X(kxsd9_read_accel, KXSD9_REG_X);
228static IIO_DEV_ATTR_ACCEL_Y(kxsd9_read_accel, KXSD9_REG_Y); 232static IIO_DEV_ATTR_ACCEL_Y(kxsd9_read_accel, KXSD9_REG_Y);
229static IIO_DEV_ATTR_ACCEL_Z(kxsd9_read_accel, KXSD9_REG_Z); 233static IIO_DEV_ATTR_ACCEL_Z(kxsd9_read_accel, KXSD9_REG_Z);
230static IIO_DEV_ATTR_ADC(0, kxsd9_read_accel, KXSD9_REG_AUX); 234static IIO_DEV_ATTR_IN_RAW(0, kxsd9_read_accel, KXSD9_REG_AUX);
231static IIO_DEV_ATTR_ACCEL_SET_RANGE(S_IRUGO | S_IWUSR, 235
232 kxsd9_read_accel_range, 236static IIO_DEVICE_ATTR(accel_scale,
233 kxsd9_write_accel_range); 237 S_IRUGO | S_IWUSR,
238 kxsd9_read_scale,
239 kxsd9_write_scale,
240 0);
241
242static IIO_CONST_ATTR(accel_scale_available,
243 KXSD9_SCALE_2G " "
244 KXSD9_SCALE_4G " "
245 KXSD9_SCALE_6G " "
246 KXSD9_SCALE_8G);
234 247
235static struct attribute *kxsd9_attributes[] = { 248static struct attribute *kxsd9_attributes[] = {
236 &iio_dev_attr_accel_x.dev_attr.attr, 249 &iio_dev_attr_accel_x_raw.dev_attr.attr,
237 &iio_dev_attr_accel_y.dev_attr.attr, 250 &iio_dev_attr_accel_y_raw.dev_attr.attr,
238 &iio_dev_attr_accel_z.dev_attr.attr, 251 &iio_dev_attr_accel_z_raw.dev_attr.attr,
239 &iio_dev_attr_adc_0.dev_attr.attr, 252 &iio_dev_attr_in0_raw.dev_attr.attr,
240 &iio_dev_attr_accel_range.dev_attr.attr, 253 &iio_dev_attr_accel_scale.dev_attr.attr,
254 &iio_const_attr_accel_scale_available.dev_attr.attr,
241 NULL, 255 NULL,
242}; 256};
243 257
diff --git a/drivers/staging/iio/accel/lis3l02dq.h b/drivers/staging/iio/accel/lis3l02dq.h
index 91a5375408c2..e76a97937a36 100644
--- a/drivers/staging/iio/accel/lis3l02dq.h
+++ b/drivers/staging/iio/accel/lis3l02dq.h
@@ -179,10 +179,6 @@ int lis3l02dq_spi_read_reg_8(struct device *dev,
179int lis3l02dq_spi_write_reg_8(struct device *dev, 179int lis3l02dq_spi_write_reg_8(struct device *dev,
180 u8 reg_address, 180 u8 reg_address,
181 u8 *val); 181 u8 *val);
182#define LIS3L02DQ_SCAN_ACC_X 0
183#define LIS3L02DQ_SCAN_ACC_Y 1
184#define LIS3L02DQ_SCAN_ACC_Z 2
185
186 182
187#ifdef CONFIG_IIO_RING_BUFFER 183#ifdef CONFIG_IIO_RING_BUFFER
188/* At the moment triggers are only used for ring buffer 184/* At the moment triggers are only used for ring buffer
diff --git a/drivers/staging/iio/accel/lis3l02dq_core.c b/drivers/staging/iio/accel/lis3l02dq_core.c
index 82e43588e8a5..6b5577d7d8de 100644
--- a/drivers/staging/iio/accel/lis3l02dq_core.c
+++ b/drivers/staging/iio/accel/lis3l02dq_core.c
@@ -458,41 +458,39 @@ err_ret:
458 return ret; 458 return ret;
459} 459}
460 460
461static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO, 461#define LIS3L02DQ_SIGNED_ATTR(name, reg) \
462 lis3l02dq_read_signed, 462 IIO_DEVICE_ATTR(name, \
463 lis3l02dq_write_signed, 463 S_IWUSR | S_IRUGO, \
464 LIS3L02DQ_REG_OFFSET_X_ADDR); 464 lis3l02dq_read_signed, \
465 465 lis3l02dq_write_signed, \
466static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO, 466 reg);
467 lis3l02dq_read_signed, 467
468 lis3l02dq_write_signed, 468#define LIS3L02DQ_UNSIGNED_ATTR(name, reg) \
469 LIS3L02DQ_REG_OFFSET_Y_ADDR); 469 IIO_DEVICE_ATTR(name, \
470 470 S_IWUSR | S_IRUGO, \
471static IIO_DEV_ATTR_ACCEL_Z_OFFSET(S_IWUSR | S_IRUGO, 471 lis3l02dq_read_unsigned, \
472 lis3l02dq_read_signed, 472 lis3l02dq_write_unsigned, \
473 lis3l02dq_write_signed, 473 reg);
474 LIS3L02DQ_REG_OFFSET_Z_ADDR); 474
475 475static LIS3L02DQ_SIGNED_ATTR(accel_x_calibbias,
476static IIO_DEV_ATTR_ACCEL_X_GAIN(S_IWUSR | S_IRUGO, 476 LIS3L02DQ_REG_OFFSET_X_ADDR);
477 lis3l02dq_read_unsigned, 477static LIS3L02DQ_SIGNED_ATTR(accel_y_calibbias,
478 lis3l02dq_write_unsigned, 478 LIS3L02DQ_REG_OFFSET_Y_ADDR);
479 LIS3L02DQ_REG_GAIN_X_ADDR); 479static LIS3L02DQ_SIGNED_ATTR(accel_z_calibbias,
480 480 LIS3L02DQ_REG_OFFSET_Z_ADDR);
481static IIO_DEV_ATTR_ACCEL_Y_GAIN(S_IWUSR | S_IRUGO, 481
482 lis3l02dq_read_unsigned, 482static LIS3L02DQ_UNSIGNED_ATTR(accel_x_calibscale,
483 lis3l02dq_write_unsigned, 483 LIS3L02DQ_REG_GAIN_X_ADDR);
484 LIS3L02DQ_REG_GAIN_Y_ADDR); 484static LIS3L02DQ_UNSIGNED_ATTR(accel_y_calibscale,
485 485 LIS3L02DQ_REG_GAIN_Y_ADDR);
486static IIO_DEV_ATTR_ACCEL_Z_GAIN(S_IWUSR | S_IRUGO, 486static LIS3L02DQ_UNSIGNED_ATTR(accel_z_calibscale,
487 lis3l02dq_read_unsigned, 487 LIS3L02DQ_REG_GAIN_Z_ADDR);
488 lis3l02dq_write_unsigned, 488
489 LIS3L02DQ_REG_GAIN_Z_ADDR); 489static IIO_DEVICE_ATTR(accel_mag_either_rising_value,
490 490 S_IWUSR | S_IRUGO,
491static IIO_DEV_ATTR_ACCEL_THRESH(S_IWUSR | S_IRUGO, 491 lis3l02dq_read_16bit_signed,
492 lis3l02dq_read_16bit_signed, 492 lis3l02dq_write_16bit_signed,
493 lis3l02dq_write_16bit_signed, 493 LIS3L02DQ_REG_THS_L_ADDR);
494 LIS3L02DQ_REG_THS_L_ADDR);
495
496/* RFC The reading method for these will change depending on whether 494/* RFC The reading method for these will change depending on whether
497 * ring buffer capture is in use. Is it worth making these take two 495 * ring buffer capture is in use. Is it worth making these take two
498 * functions and let the core handle which to call, or leave as in this 496 * functions and let the core handle which to call, or leave as in this
@@ -512,7 +510,7 @@ static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
512 lis3l02dq_read_frequency, 510 lis3l02dq_read_frequency,
513 lis3l02dq_write_frequency); 511 lis3l02dq_write_frequency);
514 512
515static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("280 560 1120 4480"); 513static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("280 560 1120 4480");
516 514
517static ssize_t lis3l02dq_read_interrupt_config(struct device *dev, 515static ssize_t lis3l02dq_read_interrupt_config(struct device *dev,
518 struct device_attribute *attr, 516 struct device_attribute *attr,
@@ -522,7 +520,7 @@ static ssize_t lis3l02dq_read_interrupt_config(struct device *dev,
522 s8 val; 520 s8 val;
523 struct iio_event_attr *this_attr = to_iio_event_attr(attr); 521 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
524 522
525 ret = lis3l02dq_spi_read_reg_8(dev, 523 ret = lis3l02dq_spi_read_reg_8(dev->parent,
526 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR, 524 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
527 (u8 *)&val); 525 (u8 *)&val);
528 526
@@ -545,7 +543,7 @@ static ssize_t lis3l02dq_write_interrupt_config(struct device *dev,
545 543
546 mutex_lock(&indio_dev->mlock); 544 mutex_lock(&indio_dev->mlock);
547 /* read current value */ 545 /* read current value */
548 ret = lis3l02dq_spi_read_reg_8(dev, 546 ret = lis3l02dq_spi_read_reg_8(dev->parent,
549 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR, 547 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
550 &valold); 548 &valold);
551 if (ret) 549 if (ret)
@@ -668,43 +666,51 @@ static void lis3l02dq_thresh_handler_bh_no_check(struct work_struct *work_s)
668/* A shared handler for a number of threshold types */ 666/* A shared handler for a number of threshold types */
669IIO_EVENT_SH(threshold, &lis3l02dq_thresh_handler_th); 667IIO_EVENT_SH(threshold, &lis3l02dq_thresh_handler_th);
670 668
671IIO_EVENT_ATTR_ACCEL_X_HIGH_SH(iio_event_threshold, 669IIO_EVENT_ATTR_SH(accel_x_mag_pos_rising_en,
672 lis3l02dq_read_interrupt_config, 670 iio_event_threshold,
673 lis3l02dq_write_interrupt_config, 671 lis3l02dq_read_interrupt_config,
674 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_HIGH); 672 lis3l02dq_write_interrupt_config,
675 673 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_HIGH);
676IIO_EVENT_ATTR_ACCEL_Y_HIGH_SH(iio_event_threshold, 674
677 lis3l02dq_read_interrupt_config, 675IIO_EVENT_ATTR_SH(accel_y_mag_pos_rising_en,
678 lis3l02dq_write_interrupt_config, 676 iio_event_threshold,
679 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_HIGH); 677 lis3l02dq_read_interrupt_config,
680 678 lis3l02dq_write_interrupt_config,
681IIO_EVENT_ATTR_ACCEL_Z_HIGH_SH(iio_event_threshold, 679 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_HIGH);
682 lis3l02dq_read_interrupt_config, 680
683 lis3l02dq_write_interrupt_config, 681IIO_EVENT_ATTR_SH(accel_z_mag_pos_rising_en,
684 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_HIGH); 682 iio_event_threshold,
685 683 lis3l02dq_read_interrupt_config,
686IIO_EVENT_ATTR_ACCEL_X_LOW_SH(iio_event_threshold, 684 lis3l02dq_write_interrupt_config,
687 lis3l02dq_read_interrupt_config, 685 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_HIGH);
688 lis3l02dq_write_interrupt_config, 686
689 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_LOW); 687IIO_EVENT_ATTR_SH(accel_x_mag_neg_rising_en,
690 688 iio_event_threshold,
691IIO_EVENT_ATTR_ACCEL_Y_LOW_SH(iio_event_threshold, 689 lis3l02dq_read_interrupt_config,
692 lis3l02dq_read_interrupt_config, 690 lis3l02dq_write_interrupt_config,
693 lis3l02dq_write_interrupt_config, 691 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_X_LOW);
694 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_LOW); 692
693IIO_EVENT_ATTR_SH(accel_y_mag_neg_rising_en,
694 iio_event_threshold,
695 lis3l02dq_read_interrupt_config,
696 lis3l02dq_write_interrupt_config,
697 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Y_LOW);
698
699IIO_EVENT_ATTR_SH(accel_z_mag_neg_rising_en,
700 iio_event_threshold,
701 lis3l02dq_read_interrupt_config,
702 lis3l02dq_write_interrupt_config,
703 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_LOW);
695 704
696IIO_EVENT_ATTR_ACCEL_Z_LOW_SH(iio_event_threshold,
697 lis3l02dq_read_interrupt_config,
698 lis3l02dq_write_interrupt_config,
699 LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_LOW);
700 705
701static struct attribute *lis3l02dq_event_attributes[] = { 706static struct attribute *lis3l02dq_event_attributes[] = {
702 &iio_event_attr_accel_x_high.dev_attr.attr, 707 &iio_event_attr_accel_x_mag_pos_rising_en.dev_attr.attr,
703 &iio_event_attr_accel_y_high.dev_attr.attr, 708 &iio_event_attr_accel_y_mag_pos_rising_en.dev_attr.attr,
704 &iio_event_attr_accel_z_high.dev_attr.attr, 709 &iio_event_attr_accel_z_mag_pos_rising_en.dev_attr.attr,
705 &iio_event_attr_accel_x_low.dev_attr.attr, 710 &iio_event_attr_accel_x_mag_neg_rising_en.dev_attr.attr,
706 &iio_event_attr_accel_y_low.dev_attr.attr, 711 &iio_event_attr_accel_y_mag_neg_rising_en.dev_attr.attr,
707 &iio_event_attr_accel_z_low.dev_attr.attr, 712 &iio_event_attr_accel_z_mag_neg_rising_en.dev_attr.attr,
713 &iio_dev_attr_accel_mag_either_rising_value.dev_attr.attr,
708 NULL 714 NULL
709}; 715};
710 716
@@ -713,20 +719,21 @@ static struct attribute_group lis3l02dq_event_attribute_group = {
713}; 719};
714 720
715static IIO_CONST_ATTR(name, "lis3l02dq"); 721static IIO_CONST_ATTR(name, "lis3l02dq");
722static IIO_CONST_ATTR(accel_scale, "0.00958");
716 723
717static struct attribute *lis3l02dq_attributes[] = { 724static struct attribute *lis3l02dq_attributes[] = {
718 &iio_dev_attr_accel_x_offset.dev_attr.attr, 725 &iio_dev_attr_accel_x_calibbias.dev_attr.attr,
719 &iio_dev_attr_accel_y_offset.dev_attr.attr, 726 &iio_dev_attr_accel_y_calibbias.dev_attr.attr,
720 &iio_dev_attr_accel_z_offset.dev_attr.attr, 727 &iio_dev_attr_accel_z_calibbias.dev_attr.attr,
721 &iio_dev_attr_accel_x_gain.dev_attr.attr, 728 &iio_dev_attr_accel_x_calibscale.dev_attr.attr,
722 &iio_dev_attr_accel_y_gain.dev_attr.attr, 729 &iio_dev_attr_accel_y_calibscale.dev_attr.attr,
723 &iio_dev_attr_accel_z_gain.dev_attr.attr, 730 &iio_dev_attr_accel_z_calibscale.dev_attr.attr,
724 &iio_dev_attr_thresh.dev_attr.attr, 731 &iio_const_attr_accel_scale.dev_attr.attr,
725 &iio_dev_attr_accel_x.dev_attr.attr, 732 &iio_dev_attr_accel_x_raw.dev_attr.attr,
726 &iio_dev_attr_accel_y.dev_attr.attr, 733 &iio_dev_attr_accel_y_raw.dev_attr.attr,
727 &iio_dev_attr_accel_z.dev_attr.attr, 734 &iio_dev_attr_accel_z_raw.dev_attr.attr,
728 &iio_dev_attr_sampling_frequency.dev_attr.attr, 735 &iio_dev_attr_sampling_frequency.dev_attr.attr,
729 &iio_const_attr_available_sampling_frequency.dev_attr.attr, 736 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
730 &iio_const_attr_name.dev_attr.attr, 737 &iio_const_attr_name.dev_attr.attr,
731 NULL 738 NULL
732}; 739};
diff --git a/drivers/staging/iio/accel/lis3l02dq_ring.c b/drivers/staging/iio/accel/lis3l02dq_ring.c
index a4d97ea0df3d..e4e202e6cb3a 100644
--- a/drivers/staging/iio/accel/lis3l02dq_ring.c
+++ b/drivers/staging/iio/accel/lis3l02dq_ring.c
@@ -75,16 +75,16 @@ error_ret:
75 return ret; 75 return ret;
76 76
77} 77}
78static IIO_SCAN_EL_C(accel_x, LIS3L02DQ_SCAN_ACC_X, IIO_SIGNED(16), 78static IIO_SCAN_EL_C(accel_x, 0, IIO_SIGNED(16),
79 LIS3L02DQ_REG_OUT_X_L_ADDR, 79 LIS3L02DQ_REG_OUT_X_L_ADDR,
80 &lis3l02dq_scan_el_set_state); 80 &lis3l02dq_scan_el_set_state);
81static IIO_SCAN_EL_C(accel_y, LIS3L02DQ_SCAN_ACC_Y, IIO_SIGNED(16), 81static IIO_SCAN_EL_C(accel_y, 1, IIO_SIGNED(16),
82 LIS3L02DQ_REG_OUT_Y_L_ADDR, 82 LIS3L02DQ_REG_OUT_Y_L_ADDR,
83 &lis3l02dq_scan_el_set_state); 83 &lis3l02dq_scan_el_set_state);
84static IIO_SCAN_EL_C(accel_z, LIS3L02DQ_SCAN_ACC_Z, IIO_SIGNED(16), 84static IIO_SCAN_EL_C(accel_z, 2, IIO_SIGNED(16),
85 LIS3L02DQ_REG_OUT_Z_L_ADDR, 85 LIS3L02DQ_REG_OUT_Z_L_ADDR,
86 &lis3l02dq_scan_el_set_state); 86 &lis3l02dq_scan_el_set_state);
87static IIO_SCAN_EL_TIMESTAMP; 87static IIO_SCAN_EL_TIMESTAMP(3);
88 88
89static struct attribute *lis3l02dq_scan_el_attrs[] = { 89static struct attribute *lis3l02dq_scan_el_attrs[] = {
90 &iio_scan_el_accel_x.dev_attr.attr, 90 &iio_scan_el_accel_x.dev_attr.attr,
@@ -192,8 +192,7 @@ error_ret:
192 192
193} 193}
194 194
195static const u8 read_all_tx_array[] = 195static const u8 read_all_tx_array[] = {
196{
197 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0, 196 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0,
198 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0, 197 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0,
199 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_L_ADDR), 0, 198 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_L_ADDR), 0,
@@ -208,7 +207,7 @@ static const u8 read_all_tx_array[] =
208 * @rx_array: (dma capable) recieve array, must be at least 207 * @rx_array: (dma capable) recieve array, must be at least
209 * 4*number of channels 208 * 4*number of channels
210 **/ 209 **/
211int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array) 210static int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
212{ 211{
213 struct spi_transfer *xfers; 212 struct spi_transfer *xfers;
214 struct spi_message msg; 213 struct spi_message msg;
@@ -358,10 +357,10 @@ static int lis3l02dq_data_rdy_ring_predisable(struct iio_dev *indio_dev)
358 357
359 358
360/* Caller responsible for locking as necessary. */ 359/* Caller responsible for locking as necessary. */
361static int __lis3l02dq_write_data_ready_config(struct device *dev, 360static int
362 struct 361__lis3l02dq_write_data_ready_config(struct device *dev,
363 iio_event_handler_list *list, 362 struct iio_event_handler_list *list,
364 bool state) 363 bool state)
365{ 364{
366 int ret; 365 int ret;
367 u8 valold; 366 u8 valold;
@@ -584,7 +583,7 @@ error_iio_sw_rb_free:
584 583
585int lis3l02dq_initialize_ring(struct iio_ring_buffer *ring) 584int lis3l02dq_initialize_ring(struct iio_ring_buffer *ring)
586{ 585{
587 return iio_ring_buffer_register(ring); 586 return iio_ring_buffer_register(ring, 0);
588} 587}
589 588
590void lis3l02dq_uninitialize_ring(struct iio_ring_buffer *ring) 589void lis3l02dq_uninitialize_ring(struct iio_ring_buffer *ring)
@@ -592,7 +591,6 @@ void lis3l02dq_uninitialize_ring(struct iio_ring_buffer *ring)
592 iio_ring_buffer_unregister(ring); 591 iio_ring_buffer_unregister(ring);
593} 592}
594 593
595
596int lis3l02dq_set_ring_length(struct iio_dev *indio_dev, int length) 594int lis3l02dq_set_ring_length(struct iio_dev *indio_dev, int length)
597{ 595{
598 /* Set sensible defaults for the ring buffer */ 596 /* Set sensible defaults for the ring buffer */
diff --git a/drivers/staging/iio/accel/sca3000.h b/drivers/staging/iio/accel/sca3000.h
index da7d3cb5ae71..e5321999b263 100644
--- a/drivers/staging/iio/accel/sca3000.h
+++ b/drivers/staging/iio/accel/sca3000.h
@@ -187,6 +187,7 @@ struct sca3000_state {
187/** 187/**
188 * struct sca3000_chip_info - model dependant parameters 188 * struct sca3000_chip_info - model dependant parameters
189 * @name: model identification 189 * @name: model identification
190 * @scale: string containing floating point scale factor
190 * @temp_output: some devices have temperature sensors. 191 * @temp_output: some devices have temperature sensors.
191 * @measurement_mode_freq: normal mode sampling frequency 192 * @measurement_mode_freq: normal mode sampling frequency
192 * @option_mode_1: first optional mode. Not all models have one 193 * @option_mode_1: first optional mode. Not all models have one
@@ -199,6 +200,7 @@ struct sca3000_state {
199 **/ 200 **/
200struct sca3000_chip_info { 201struct sca3000_chip_info {
201 const char *name; 202 const char *name;
203 const char *scale;
202 bool temp_output; 204 bool temp_output;
203 int measurement_mode_freq; 205 int measurement_mode_freq;
204 int option_mode_1; 206 int option_mode_1;
diff --git a/drivers/staging/iio/accel/sca3000_core.c b/drivers/staging/iio/accel/sca3000_core.c
index 1c229869a22d..d4f82c39f335 100644
--- a/drivers/staging/iio/accel/sca3000_core.c
+++ b/drivers/staging/iio/accel/sca3000_core.c
@@ -27,11 +27,9 @@
27 27
28enum sca3000_variant { 28enum sca3000_variant {
29 d01, 29 d01,
30 d03,
31 e02, 30 e02,
32 e04, 31 e04,
33 e05, 32 e05,
34 l01,
35}; 33};
36 34
37/* Note where option modes are not defined, the chip simply does not 35/* Note where option modes are not defined, the chip simply does not
@@ -44,21 +42,20 @@ enum sca3000_variant {
44static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = { 42static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = {
45 { 43 {
46 .name = "sca3000-d01", 44 .name = "sca3000-d01",
45 .scale = " 0.0073575",
47 .temp_output = true, 46 .temp_output = true,
48 .measurement_mode_freq = 250, 47 .measurement_mode_freq = 250,
49 .option_mode_1 = SCA3000_OP_MODE_BYPASS, 48 .option_mode_1 = SCA3000_OP_MODE_BYPASS,
50 .option_mode_1_freq = 250, 49 .option_mode_1_freq = 250,
51 }, { 50 }, {
52 /* No data sheet available - may be the same as the 3100-d03?*/
53 .name = "sca3000-d03",
54 .temp_output = true,
55 }, {
56 .name = "sca3000-e02", 51 .name = "sca3000-e02",
52 .scale = "0.00981",
57 .measurement_mode_freq = 125, 53 .measurement_mode_freq = 125,
58 .option_mode_1 = SCA3000_OP_MODE_NARROW, 54 .option_mode_1 = SCA3000_OP_MODE_NARROW,
59 .option_mode_1_freq = 63, 55 .option_mode_1_freq = 63,
60 }, { 56 }, {
61 .name = "sca3000-e04", 57 .name = "sca3000-e04",
58 .scale = "0.01962",
62 .measurement_mode_freq = 100, 59 .measurement_mode_freq = 100,
63 .option_mode_1 = SCA3000_OP_MODE_NARROW, 60 .option_mode_1 = SCA3000_OP_MODE_NARROW,
64 .option_mode_1_freq = 50, 61 .option_mode_1_freq = 50,
@@ -66,18 +63,12 @@ static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = {
66 .option_mode_2_freq = 400, 63 .option_mode_2_freq = 400,
67 }, { 64 }, {
68 .name = "sca3000-e05", 65 .name = "sca3000-e05",
66 .scale = "0.0613125",
69 .measurement_mode_freq = 200, 67 .measurement_mode_freq = 200,
70 .option_mode_1 = SCA3000_OP_MODE_NARROW, 68 .option_mode_1 = SCA3000_OP_MODE_NARROW,
71 .option_mode_1_freq = 50, 69 .option_mode_1_freq = 50,
72 .option_mode_2 = SCA3000_OP_MODE_WIDE, 70 .option_mode_2 = SCA3000_OP_MODE_WIDE,
73 .option_mode_2_freq = 400, 71 .option_mode_2_freq = 400,
74 }, {
75 /* No data sheet available.
76 * Frequencies are unknown.
77 */
78 .name = "sca3000-l01",
79 .temp_output = true,
80 .option_mode_1 = SCA3000_OP_MODE_BYPASS,
81 }, 72 },
82}; 73};
83 74
@@ -286,7 +277,7 @@ static int sca3000_check_status(struct device *dev)
286 if (ret < 0) 277 if (ret < 0)
287 goto error_ret; 278 goto error_ret;
288 if (rx[1] & SCA3000_EEPROM_CS_ERROR) 279 if (rx[1] & SCA3000_EEPROM_CS_ERROR)
289 dev_err(dev, "eeprom error \n"); 280 dev_err(dev, "eeprom error\n");
290 if (rx[1] & SCA3000_SPI_FRAME_ERROR) 281 if (rx[1] & SCA3000_SPI_FRAME_ERROR)
291 dev_err(dev, "Previous SPI Frame was corrupt\n"); 282 dev_err(dev, "Previous SPI Frame was corrupt\n");
292 kfree(rx); 283 kfree(rx);
@@ -327,6 +318,14 @@ error_ret:
327 return ret ? ret : len; 318 return ret ? ret : len;
328} 319}
329 320
321static ssize_t sca3000_show_scale(struct device *dev,
322 struct device_attribute *attr,
323 char *buf)
324{
325 struct iio_dev *dev_info = dev_get_drvdata(dev);
326 struct sca3000_state *st = dev_info->dev_data;
327 return sprintf(buf, "%s\n", st->info->scale);
328}
330 329
331static ssize_t sca3000_show_name(struct device *dev, 330static ssize_t sca3000_show_name(struct device *dev,
332 struct device_attribute *attr, 331 struct device_attribute *attr,
@@ -395,7 +394,7 @@ sca3000_show_available_measurement_modes(struct device *dev,
395 break; 394 break;
396 } 395 }
397 /* always supported */ 396 /* always supported */
398 len += sprintf(buf + len, " 3 - motion detection \n"); 397 len += sprintf(buf + len, " 3 - motion detection\n");
399 398
400 return len; 399 return len;
401} 400}
@@ -495,7 +494,7 @@ error_ret:
495/* Not even vaguely standard attributes so defined here rather than 494/* Not even vaguely standard attributes so defined here rather than
496 * in the relevant IIO core headers 495 * in the relevant IIO core headers
497 */ 496 */
498static IIO_DEVICE_ATTR(available_measurement_modes, S_IRUGO, 497static IIO_DEVICE_ATTR(measurement_mode_available, S_IRUGO,
499 sca3000_show_available_measurement_modes, 498 sca3000_show_available_measurement_modes,
500 NULL, 0); 499 NULL, 0);
501 500
@@ -508,6 +507,8 @@ static IIO_DEVICE_ATTR(measurement_mode, S_IRUGO | S_IWUSR,
508 507
509static IIO_DEV_ATTR_NAME(sca3000_show_name); 508static IIO_DEV_ATTR_NAME(sca3000_show_name);
510static IIO_DEV_ATTR_REV(sca3000_show_rev); 509static IIO_DEV_ATTR_REV(sca3000_show_rev);
510static IIO_DEVICE_ATTR(accel_scale, S_IRUGO, sca3000_show_scale,
511 NULL, 0);
511 512
512static IIO_DEV_ATTR_ACCEL_X(sca3000_read_13bit_signed, 513static IIO_DEV_ATTR_ACCEL_X(sca3000_read_13bit_signed,
513 SCA3000_REG_ADDR_X_MSB); 514 SCA3000_REG_ADDR_X_MSB);
@@ -683,7 +684,7 @@ error_free_lock:
683/* Should only really be registered if ring buffer support is compiled in. 684/* Should only really be registered if ring buffer support is compiled in.
684 * Does no harm however and doing it right would add a fair bit of complexity 685 * Does no harm however and doing it right would add a fair bit of complexity
685 */ 686 */
686static IIO_DEV_ATTR_AVAIL_SAMP_FREQ(sca3000_read_av_freq); 687static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq);
687 688
688static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 689static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
689 sca3000_read_frequency, 690 sca3000_read_frequency,
@@ -718,7 +719,10 @@ static ssize_t sca3000_read_temp(struct device *dev,
718error_ret: 719error_ret:
719 return ret; 720 return ret;
720} 721}
721static IIO_DEV_ATTR_TEMP(sca3000_read_temp); 722static IIO_DEV_ATTR_TEMP_RAW(sca3000_read_temp);
723
724static IIO_CONST_ATTR(temp_scale, "0.555556");
725static IIO_CONST_ATTR(temp_offset, "-214.6");
722 726
723/** 727/**
724 * sca3000_show_thresh() sysfs query of a threshold 728 * sca3000_show_thresh() sysfs query of a threshold
@@ -770,31 +774,34 @@ static ssize_t sca3000_write_thresh(struct device *dev,
770 return ret ? ret : len; 774 return ret ? ret : len;
771} 775}
772 776
773static IIO_DEV_ATTR_ACCEL_THRESH_X(S_IRUGO | S_IWUSR, 777static IIO_DEVICE_ATTR(accel_x_mag_either_rising_value,
774 sca3000_show_thresh, 778 S_IRUGO | S_IWUSR,
775 sca3000_write_thresh, 779 sca3000_show_thresh,
776 SCA3000_REG_CTRL_SEL_MD_X_TH); 780 sca3000_write_thresh,
777static IIO_DEV_ATTR_ACCEL_THRESH_Y(S_IRUGO | S_IWUSR, 781 SCA3000_REG_CTRL_SEL_MD_X_TH);
778 sca3000_show_thresh, 782
779 sca3000_write_thresh, 783static IIO_DEVICE_ATTR(accel_y_mag_either_rising_value,
780 SCA3000_REG_CTRL_SEL_MD_Y_TH); 784 S_IRUGO | S_IWUSR,
781static IIO_DEV_ATTR_ACCEL_THRESH_Z(S_IRUGO | S_IWUSR, 785 sca3000_show_thresh,
782 sca3000_show_thresh, 786 sca3000_write_thresh,
783 sca3000_write_thresh, 787 SCA3000_REG_CTRL_SEL_MD_Y_TH);
784 SCA3000_REG_CTRL_SEL_MD_Z_TH); 788
789static IIO_DEVICE_ATTR(accel_z_mag_either_rising_value,
790 S_IRUGO | S_IWUSR,
791 sca3000_show_thresh,
792 sca3000_write_thresh,
793 SCA3000_REG_CTRL_SEL_MD_Z_TH);
785 794
786static struct attribute *sca3000_attributes[] = { 795static struct attribute *sca3000_attributes[] = {
787 &iio_dev_attr_name.dev_attr.attr, 796 &iio_dev_attr_name.dev_attr.attr,
788 &iio_dev_attr_revision.dev_attr.attr, 797 &iio_dev_attr_revision.dev_attr.attr,
789 &iio_dev_attr_accel_x.dev_attr.attr, 798 &iio_dev_attr_accel_scale.dev_attr.attr,
790 &iio_dev_attr_accel_y.dev_attr.attr, 799 &iio_dev_attr_accel_x_raw.dev_attr.attr,
791 &iio_dev_attr_accel_z.dev_attr.attr, 800 &iio_dev_attr_accel_y_raw.dev_attr.attr,
792 &iio_dev_attr_thresh_accel_x.dev_attr.attr, 801 &iio_dev_attr_accel_z_raw.dev_attr.attr,
793 &iio_dev_attr_thresh_accel_y.dev_attr.attr, 802 &iio_dev_attr_measurement_mode_available.dev_attr.attr,
794 &iio_dev_attr_thresh_accel_z.dev_attr.attr,
795 &iio_dev_attr_available_measurement_modes.dev_attr.attr,
796 &iio_dev_attr_measurement_mode.dev_attr.attr, 803 &iio_dev_attr_measurement_mode.dev_attr.attr,
797 &iio_dev_attr_available_sampling_frequency.dev_attr.attr, 804 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
798 &iio_dev_attr_sampling_frequency.dev_attr.attr, 805 &iio_dev_attr_sampling_frequency.dev_attr.attr,
799 NULL, 806 NULL,
800}; 807};
@@ -802,18 +809,18 @@ static struct attribute *sca3000_attributes[] = {
802static struct attribute *sca3000_attributes_with_temp[] = { 809static struct attribute *sca3000_attributes_with_temp[] = {
803 &iio_dev_attr_name.dev_attr.attr, 810 &iio_dev_attr_name.dev_attr.attr,
804 &iio_dev_attr_revision.dev_attr.attr, 811 &iio_dev_attr_revision.dev_attr.attr,
805 &iio_dev_attr_accel_x.dev_attr.attr, 812 &iio_dev_attr_accel_scale.dev_attr.attr,
806 &iio_dev_attr_accel_y.dev_attr.attr, 813 &iio_dev_attr_accel_x_raw.dev_attr.attr,
807 &iio_dev_attr_accel_z.dev_attr.attr, 814 &iio_dev_attr_accel_y_raw.dev_attr.attr,
808 &iio_dev_attr_thresh_accel_x.dev_attr.attr, 815 &iio_dev_attr_accel_z_raw.dev_attr.attr,
809 &iio_dev_attr_thresh_accel_y.dev_attr.attr, 816 &iio_dev_attr_measurement_mode_available.dev_attr.attr,
810 &iio_dev_attr_thresh_accel_z.dev_attr.attr,
811 &iio_dev_attr_available_measurement_modes.dev_attr.attr,
812 &iio_dev_attr_measurement_mode.dev_attr.attr, 817 &iio_dev_attr_measurement_mode.dev_attr.attr,
813 &iio_dev_attr_available_sampling_frequency.dev_attr.attr, 818 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
814 &iio_dev_attr_sampling_frequency.dev_attr.attr, 819 &iio_dev_attr_sampling_frequency.dev_attr.attr,
815 /* Only present if temp sensor is */ 820 /* Only present if temp sensor is */
816 &iio_dev_attr_temp.dev_attr.attr, 821 &iio_dev_attr_temp_raw.dev_attr.attr,
822 &iio_const_attr_temp_offset.dev_attr.attr,
823 &iio_const_attr_temp_scale.dev_attr.attr,
817 NULL, 824 NULL,
818}; 825};
819 826
@@ -910,7 +917,7 @@ static ssize_t sca3000_query_mo_det(struct device *dev,
910 struct device_attribute *attr, 917 struct device_attribute *attr,
911 char *buf) 918 char *buf)
912{ 919{
913 struct iio_dev *indio_dev = dev_get_drvdata(dev); 920 struct iio_dev *indio_dev = dev_get_drvdata(dev->parent);
914 struct sca3000_state *st = indio_dev->dev_data; 921 struct sca3000_state *st = indio_dev->dev_data;
915 struct iio_event_attr *this_attr = to_iio_event_attr(attr); 922 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
916 int ret, len = 0; 923 int ret, len = 0;
@@ -975,7 +982,7 @@ static ssize_t sca3000_query_ring_int(struct device *dev,
975 struct iio_event_attr *this_attr = to_iio_event_attr(attr); 982 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
976 int ret, len; 983 int ret, len;
977 u8 *rx; 984 u8 *rx;
978 struct iio_dev *indio_dev = dev_get_drvdata(dev); 985 struct iio_dev *indio_dev = dev_get_drvdata(dev->parent);
979 struct sca3000_state *st = indio_dev->dev_data; 986 struct sca3000_state *st = indio_dev->dev_data;
980 mutex_lock(&st->lock); 987 mutex_lock(&st->lock);
981 ret = sca3000_read_data(st, SCA3000_REG_ADDR_INT_MASK, &rx, 1); 988 ret = sca3000_read_data(st, SCA3000_REG_ADDR_INT_MASK, &rx, 1);
@@ -995,7 +1002,7 @@ static ssize_t sca3000_set_ring_int(struct device *dev,
995 const char *buf, 1002 const char *buf,
996 size_t len) 1003 size_t len)
997{ 1004{
998 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1005 struct iio_dev *indio_dev = dev_get_drvdata(dev->parent);
999 struct sca3000_state *st = indio_dev->dev_data; 1006 struct sca3000_state *st = indio_dev->dev_data;
1000 struct iio_event_attr *this_attr = to_iio_event_attr(attr); 1007 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
1001 1008
@@ -1085,7 +1092,7 @@ static ssize_t sca3000_set_mo_det(struct device *dev,
1085 const char *buf, 1092 const char *buf,
1086 size_t len) 1093 size_t len)
1087{ 1094{
1088 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1095 struct iio_dev *indio_dev = dev_get_drvdata(dev->parent);
1089 struct sca3000_state *st = indio_dev->dev_data; 1096 struct sca3000_state *st = indio_dev->dev_data;
1090 struct iio_event_attr *this_attr = to_iio_event_attr(attr); 1097 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
1091 long val; 1098 long val;
@@ -1155,20 +1162,23 @@ IIO_EVENT_ATTR_FREE_FALL_DETECT_SH(iio_event_all,
1155 0) 1162 0)
1156 1163
1157/* Motion detector related event attributes */ 1164/* Motion detector related event attributes */
1158IIO_EVENT_ATTR_ACCEL_X_HIGH_SH(iio_event_all, 1165IIO_EVENT_ATTR_SH(accel_x_mag_either_rising_en,
1159 sca3000_query_mo_det, 1166 iio_event_all,
1160 sca3000_set_mo_det, 1167 sca3000_query_mo_det,
1161 SCA3000_MD_CTRL_OR_X); 1168 sca3000_set_mo_det,
1162 1169 SCA3000_MD_CTRL_OR_X);
1163IIO_EVENT_ATTR_ACCEL_Y_HIGH_SH(iio_event_all, 1170
1164 sca3000_query_mo_det, 1171IIO_EVENT_ATTR_SH(accel_y_mag_either_rising_en,
1165 sca3000_set_mo_det, 1172 iio_event_all,
1166 SCA3000_MD_CTRL_OR_Y); 1173 sca3000_query_mo_det,
1167 1174 sca3000_set_mo_det,
1168IIO_EVENT_ATTR_ACCEL_Z_HIGH_SH(iio_event_all, 1175 SCA3000_MD_CTRL_OR_Y);
1169 sca3000_query_mo_det, 1176
1170 sca3000_set_mo_det, 1177IIO_EVENT_ATTR_SH(accel_z_mag_either_rising_en,
1171 SCA3000_MD_CTRL_OR_Z); 1178 iio_event_all,
1179 sca3000_query_mo_det,
1180 sca3000_set_mo_det,
1181 SCA3000_MD_CTRL_OR_Z);
1172 1182
1173/* Hardware ring buffer related event attributes */ 1183/* Hardware ring buffer related event attributes */
1174IIO_EVENT_ATTR_RING_50_FULL_SH(iio_event_all, 1184IIO_EVENT_ATTR_RING_50_FULL_SH(iio_event_all,
@@ -1183,11 +1193,14 @@ IIO_EVENT_ATTR_RING_75_FULL_SH(iio_event_all,
1183 1193
1184static struct attribute *sca3000_event_attributes[] = { 1194static struct attribute *sca3000_event_attributes[] = {
1185 &iio_event_attr_free_fall.dev_attr.attr, 1195 &iio_event_attr_free_fall.dev_attr.attr,
1186 &iio_event_attr_accel_x_high.dev_attr.attr, 1196 &iio_event_attr_accel_x_mag_either_rising_en.dev_attr.attr,
1187 &iio_event_attr_accel_y_high.dev_attr.attr, 1197 &iio_event_attr_accel_y_mag_either_rising_en.dev_attr.attr,
1188 &iio_event_attr_accel_z_high.dev_attr.attr, 1198 &iio_event_attr_accel_z_mag_either_rising_en.dev_attr.attr,
1189 &iio_event_attr_ring_50_full.dev_attr.attr, 1199 &iio_event_attr_ring_50_full.dev_attr.attr,
1190 &iio_event_attr_ring_75_full.dev_attr.attr, 1200 &iio_event_attr_ring_75_full.dev_attr.attr,
1201 &iio_dev_attr_accel_x_mag_either_rising_value.dev_attr.attr,
1202 &iio_dev_attr_accel_y_mag_either_rising_value.dev_attr.attr,
1203 &iio_dev_attr_accel_z_mag_either_rising_value.dev_attr.attr,
1191 NULL, 1204 NULL,
1192}; 1205};
1193 1206
@@ -1325,7 +1338,7 @@ static int __devinit __sca3000_probe(struct spi_device *spi,
1325 if (ret < 0) 1338 if (ret < 0)
1326 goto error_free_dev; 1339 goto error_free_dev;
1327 regdone = 1; 1340 regdone = 1;
1328 ret = iio_ring_buffer_register(st->indio_dev->ring); 1341 ret = iio_ring_buffer_register(st->indio_dev->ring, 0);
1329 if (ret < 0) 1342 if (ret < 0)
1330 goto error_unregister_dev; 1343 goto error_unregister_dev;
1331 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) { 1344 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) {
@@ -1344,9 +1357,10 @@ static int __devinit __sca3000_probe(struct spi_device *spi,
1344 * is overkill. At very least a simpler registration method 1357 * is overkill. At very least a simpler registration method
1345 * might be worthwhile. 1358 * might be worthwhile.
1346 */ 1359 */
1347 iio_add_event_to_list(iio_event_attr_accel_z_high.listel, 1360 iio_add_event_to_list(
1348 &st->indio_dev 1361 iio_event_attr_accel_z_mag_either_rising_en.listel,
1349 ->interrupts[0]->ev_list); 1362 &st->indio_dev
1363 ->interrupts[0]->ev_list);
1350 } 1364 }
1351 sca3000_register_ring_funcs(st->indio_dev); 1365 sca3000_register_ring_funcs(st->indio_dev);
1352 ret = sca3000_clean_setup(st); 1366 ret = sca3000_clean_setup(st);
@@ -1437,9 +1451,6 @@ static int sca3000_remove(struct spi_device *spi)
1437SCA3000_VARIANT_PROBE(d01); 1451SCA3000_VARIANT_PROBE(d01);
1438static SCA3000_VARIANT_SPI_DRIVER(d01); 1452static SCA3000_VARIANT_SPI_DRIVER(d01);
1439 1453
1440SCA3000_VARIANT_PROBE(d03);
1441static SCA3000_VARIANT_SPI_DRIVER(d03);
1442
1443SCA3000_VARIANT_PROBE(e02); 1454SCA3000_VARIANT_PROBE(e02);
1444static SCA3000_VARIANT_SPI_DRIVER(e02); 1455static SCA3000_VARIANT_SPI_DRIVER(e02);
1445 1456
@@ -1449,9 +1460,6 @@ static SCA3000_VARIANT_SPI_DRIVER(e04);
1449SCA3000_VARIANT_PROBE(e05); 1460SCA3000_VARIANT_PROBE(e05);
1450static SCA3000_VARIANT_SPI_DRIVER(e05); 1461static SCA3000_VARIANT_SPI_DRIVER(e05);
1451 1462
1452SCA3000_VARIANT_PROBE(l01);
1453static SCA3000_VARIANT_SPI_DRIVER(l01);
1454
1455static __init int sca3000_init(void) 1463static __init int sca3000_init(void)
1456{ 1464{
1457 int ret; 1465 int ret;
@@ -1459,32 +1467,22 @@ static __init int sca3000_init(void)
1459 ret = spi_register_driver(&sca3000_d01_driver); 1467 ret = spi_register_driver(&sca3000_d01_driver);
1460 if (ret) 1468 if (ret)
1461 goto error_ret; 1469 goto error_ret;
1462 ret = spi_register_driver(&sca3000_d03_driver);
1463 if (ret)
1464 goto error_unreg_d01;
1465 ret = spi_register_driver(&sca3000_e02_driver); 1470 ret = spi_register_driver(&sca3000_e02_driver);
1466 if (ret) 1471 if (ret)
1467 goto error_unreg_d03; 1472 goto error_unreg_d01;
1468 ret = spi_register_driver(&sca3000_e04_driver); 1473 ret = spi_register_driver(&sca3000_e04_driver);
1469 if (ret) 1474 if (ret)
1470 goto error_unreg_e02; 1475 goto error_unreg_e02;
1471 ret = spi_register_driver(&sca3000_e05_driver); 1476 ret = spi_register_driver(&sca3000_e05_driver);
1472 if (ret) 1477 if (ret)
1473 goto error_unreg_e04; 1478 goto error_unreg_e04;
1474 ret = spi_register_driver(&sca3000_l01_driver);
1475 if (ret)
1476 goto error_unreg_e05;
1477 1479
1478 return 0; 1480 return 0;
1479 1481
1480error_unreg_e05:
1481 spi_unregister_driver(&sca3000_e05_driver);
1482error_unreg_e04: 1482error_unreg_e04:
1483 spi_unregister_driver(&sca3000_e04_driver); 1483 spi_unregister_driver(&sca3000_e04_driver);
1484error_unreg_e02: 1484error_unreg_e02:
1485 spi_unregister_driver(&sca3000_e02_driver); 1485 spi_unregister_driver(&sca3000_e02_driver);
1486error_unreg_d03:
1487 spi_unregister_driver(&sca3000_d03_driver);
1488error_unreg_d01: 1486error_unreg_d01:
1489 spi_unregister_driver(&sca3000_d01_driver); 1487 spi_unregister_driver(&sca3000_d01_driver);
1490error_ret: 1488error_ret:
@@ -1494,11 +1492,9 @@ error_ret:
1494 1492
1495static __exit void sca3000_exit(void) 1493static __exit void sca3000_exit(void)
1496{ 1494{
1497 spi_unregister_driver(&sca3000_l01_driver);
1498 spi_unregister_driver(&sca3000_e05_driver); 1495 spi_unregister_driver(&sca3000_e05_driver);
1499 spi_unregister_driver(&sca3000_e04_driver); 1496 spi_unregister_driver(&sca3000_e04_driver);
1500 spi_unregister_driver(&sca3000_e02_driver); 1497 spi_unregister_driver(&sca3000_e02_driver);
1501 spi_unregister_driver(&sca3000_d03_driver);
1502 spi_unregister_driver(&sca3000_d01_driver); 1498 spi_unregister_driver(&sca3000_d01_driver);
1503} 1499}
1504 1500
diff --git a/drivers/staging/iio/accel/sca3000_ring.c b/drivers/staging/iio/accel/sca3000_ring.c
index 40cbab2a6592..8e8c068d401b 100644
--- a/drivers/staging/iio/accel/sca3000_ring.c
+++ b/drivers/staging/iio/accel/sca3000_ring.c
@@ -186,11 +186,29 @@ static ssize_t sca3000_store_ring_bpse(struct device *dev,
186 return ret ? ret : len; 186 return ret ? ret : len;
187} 187}
188 188
189static IIO_CONST_ATTR(bpse_available, "8 11"); 189static IIO_SCAN_EL_C(accel_x, 0, 0, 0, NULL);
190static IIO_SCAN_EL_C(accel_y, 1, 0, 0, NULL);
191static IIO_SCAN_EL_C(accel_z, 2, 0, 0, NULL);
192static IIO_CONST_ATTR(accel_precision_available, "8 11");
193static IIO_DEVICE_ATTR(accel_precision,
194 S_IRUGO | S_IWUSR,
195 sca3000_show_ring_bpse,
196 sca3000_store_ring_bpse,
197 0);
198
199static struct attribute *sca3000_scan_el_attrs[] = {
200 &iio_scan_el_accel_x.dev_attr.attr,
201 &iio_scan_el_accel_y.dev_attr.attr,
202 &iio_scan_el_accel_z.dev_attr.attr,
203 &iio_const_attr_accel_precision_available.dev_attr.attr,
204 &iio_dev_attr_accel_precision.dev_attr.attr,
205 NULL
206};
190 207
191static IIO_DEV_ATTR_BPSE(S_IRUGO | S_IWUSR, 208static struct attribute_group sca3000_scan_el_group = {
192 sca3000_show_ring_bpse, 209 .attrs = sca3000_scan_el_attrs,
193 sca3000_store_ring_bpse); 210 .name = "scan_elements",
211};
194 212
195/* 213/*
196 * Ring buffer attributes 214 * Ring buffer attributes
@@ -198,17 +216,15 @@ static IIO_DEV_ATTR_BPSE(S_IRUGO | S_IWUSR,
198 * only apply to the ring buffer. At all times full rate and accuracy 216 * only apply to the ring buffer. At all times full rate and accuracy
199 * is available via direct reading from registers. 217 * is available via direct reading from registers.
200 */ 218 */
201static struct attribute *iio_ring_attributes[] = { 219static struct attribute *sca3000_ring_attributes[] = {
202 &dev_attr_length.attr, 220 &dev_attr_length.attr,
203 &dev_attr_bps.attr, 221 &dev_attr_bps.attr,
204 &dev_attr_ring_enable.attr, 222 &dev_attr_ring_enable.attr,
205 &iio_dev_attr_bpse.dev_attr.attr,
206 &iio_const_attr_bpse_available.dev_attr.attr,
207 NULL, 223 NULL,
208}; 224};
209 225
210static struct attribute_group sca3000_ring_attr = { 226static struct attribute_group sca3000_ring_attr = {
211 .attrs = iio_ring_attributes, 227 .attrs = sca3000_ring_attributes,
212}; 228};
213 229
214static const struct attribute_group *sca3000_ring_attr_groups[] = { 230static const struct attribute_group *sca3000_ring_attr_groups[] = {
@@ -228,7 +244,7 @@ static struct iio_ring_buffer *sca3000_rb_allocate(struct iio_dev *indio_dev)
228 244
229 ring = kzalloc(sizeof *ring, GFP_KERNEL); 245 ring = kzalloc(sizeof *ring, GFP_KERNEL);
230 if (!ring) 246 if (!ring)
231 return 0; 247 return NULL;
232 ring->private = indio_dev; 248 ring->private = indio_dev;
233 buf = &ring->buf; 249 buf = &ring->buf;
234 iio_ring_buffer_init(buf, indio_dev); 250 iio_ring_buffer_init(buf, indio_dev);
@@ -248,6 +264,7 @@ static inline void sca3000_rb_free(struct iio_ring_buffer *r)
248 264
249int sca3000_configure_ring(struct iio_dev *indio_dev) 265int sca3000_configure_ring(struct iio_dev *indio_dev)
250{ 266{
267 indio_dev->scan_el_attrs = &sca3000_scan_el_group;
251 indio_dev->ring = sca3000_rb_allocate(indio_dev); 268 indio_dev->ring = sca3000_rb_allocate(indio_dev);
252 if (indio_dev->ring == NULL) 269 if (indio_dev->ring == NULL)
253 return -ENOMEM; 270 return -ENOMEM;
diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig
index 3989c0ca0e0d..0835fbc86c2a 100644
--- a/drivers/staging/iio/adc/Kconfig
+++ b/drivers/staging/iio/adc/Kconfig
@@ -7,11 +7,16 @@ config MAX1363
7 tristate "MAXIM max1363 ADC driver" 7 tristate "MAXIM max1363 ADC driver"
8 depends on I2C 8 depends on I2C
9 select IIO_TRIGGER if IIO_RING_BUFFER 9 select IIO_TRIGGER if IIO_RING_BUFFER
10 select MAX1363_RING_BUFFER
10 help 11 help
11 Say yes here to build support for many MAXIM i2c analog to digital 12 Say yes here to build support for many MAXIM i2c analog to digital
12 convertors (ADC). (max1361, max1362, max1363, max1364, max1136, 13 convertors (ADC). (max1361, max1362, max1363, max1364, max1036,
13 max1136, max1137, max1138, max1139, max1236, max1237, max11238, 14 max1037, max1038, max1039, max1136, max1136, max1137, max1138,
14 max1239) Provides direct access via sysfs. 15 max1139, max1236, max1237, max11238, max1239, max11600, max11601,
16 max11602, max11603, max11604, max11605, max11606, max11607,
17 max11608, max11609, max11610, max11611, max11612, max11613,
18 max11614, max11615, max11616, max11617) Provides direct access
19 via sysfs.
15 20
16config MAX1363_RING_BUFFER 21config MAX1363_RING_BUFFER
17 bool "MAXIM max1363: use ring buffer" 22 bool "MAXIM max1363: use ring buffer"
diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile
index 08cee5c22b92..18c9376ecbb2 100644
--- a/drivers/staging/iio/adc/Makefile
+++ b/drivers/staging/iio/adc/Makefile
@@ -3,6 +3,6 @@
3# 3#
4 4
5max1363-y := max1363_core.o 5max1363-y := max1363_core.o
6max1363-$(CONFIG_MAX1363_RING_BUFFER) += max1363_ring.o 6max1363-y += max1363_ring.o
7 7
8obj-$(CONFIG_MAX1363) += max1363.o 8obj-$(CONFIG_MAX1363) += max1363.o
diff --git a/drivers/staging/iio/adc/adc.h b/drivers/staging/iio/adc/adc.h
index d925b2c5e38e..04eb16fd0a95 100644
--- a/drivers/staging/iio/adc/adc.h
+++ b/drivers/staging/iio/adc/adc.h
@@ -9,5 +9,20 @@
9 * 9 *
10 */ 10 */
11 11
12/* Deprecated */
12#define IIO_DEV_ATTR_ADC(_num, _show, _addr) \ 13#define IIO_DEV_ATTR_ADC(_num, _show, _addr) \
13 IIO_DEVICE_ATTR(adc_##_num, S_IRUGO, _show, NULL, _addr) 14 IIO_DEVICE_ATTR(adc_##_num, S_IRUGO, _show, NULL, _addr)
15
16#define IIO_DEV_ATTR_IN_RAW(_num, _show, _addr) \
17 IIO_DEVICE_ATTR(in##_num##_raw, S_IRUGO, _show, NULL, _addr)
18
19#define IIO_DEV_ATTR_IN_NAMED_RAW(_name, _show, _addr) \
20 IIO_DEVICE_ATTR(in_##_name##_raw, S_IRUGO, _show, NULL, _addr)
21
22#define IIO_DEV_ATTR_IN_DIFF_RAW(_nump, _numn, _show, _addr) \
23 IIO_DEVICE_ATTR_NAMED(in##_nump##min##_numn##_raw, \
24 in##_nump-in##_numn##_raw, \
25 S_IRUGO, \
26 _show, \
27 NULL, \
28 _addr)
diff --git a/drivers/staging/iio/adc/max1363.h b/drivers/staging/iio/adc/max1363.h
index c112fbef2705..72cf36709368 100644
--- a/drivers/staging/iio/adc/max1363.h
+++ b/drivers/staging/iio/adc/max1363.h
@@ -72,77 +72,54 @@
72 * @numvals: The number of values returned by a single scan 72 * @numvals: The number of values returned by a single scan
73 */ 73 */
74struct max1363_mode { 74struct max1363_mode {
75 const char *name;
76 int8_t conf; 75 int8_t conf;
77 int numvals; 76 long modemask;
78}; 77};
79 78
80#define MAX1363_MODE_SINGLE(_num) { \ 79#define MAX1363_MODE_SINGLE(_num, _mask) { \
81 .name = #_num, \ 80 .conf = MAX1363_CHANNEL_SEL(_num) \
82 .conf = MAX1363_CHANNEL_SEL(_num) \
83 | MAX1363_CONFIG_SCAN_SINGLE_1 \ 81 | MAX1363_CONFIG_SCAN_SINGLE_1 \
84 | MAX1363_CONFIG_SE, \ 82 | MAX1363_CONFIG_SE, \
85 .numvals = 1, \ 83 .modemask = _mask, \
86 } 84 }
87 85
88#define MAX1363_MODE_SINGLE_TIMES_8(_num) { \ 86#define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \
89 .name = #_num"x8", \ 87 .conf = MAX1363_CHANNEL_SEL(_num) \
90 .conf = MAX1363_CHANNEL_SEL(_num) \
91 | MAX1363_CONFIG_SCAN_SINGLE_8 \
92 | MAX1363_CONFIG_SE, \
93 .numvals = 8, \
94 }
95
96#define MAX1363_MODE_SCAN_TO_CHANNEL(_num) { \
97 .name = "0..."#_num, \
98 .conf = MAX1363_CHANNEL_SEL(_num) \
99 | MAX1363_CONFIG_SCAN_TO_CS \ 88 | MAX1363_CONFIG_SCAN_TO_CS \
100 | MAX1363_CONFIG_SE, \ 89 | MAX1363_CONFIG_SE, \
101 .numvals = _num + 1, \ 90 .modemask = _mask, \
102 } 91 }
103 92
104 93
105/* note not available for max1363 hence naming */ 94/* note not available for max1363 hence naming */
106#define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num) { \ 95#define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \
107 .name = #_mid"..."#_num, \ 96 .conf = MAX1363_CHANNEL_SEL(_num) \
108 .conf = MAX1363_CHANNEL_SEL(_num) \
109 | MAX1236_SCAN_MID_TO_CHANNEL \ 97 | MAX1236_SCAN_MID_TO_CHANNEL \
110 | MAX1363_CONFIG_SE, \ 98 | MAX1363_CONFIG_SE, \
111 .numvals = _num - _mid + 1 \ 99 .modemask = _mask \
112} 100}
113 101
114#define MAX1363_MODE_DIFF_SINGLE(_nump, _numm) { \ 102#define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \
115 .name = #_nump"-"#_numm, \ 103 .conf = MAX1363_CHANNEL_SEL(_nump) \
116 .conf = MAX1363_CHANNEL_SEL(_nump) \
117 | MAX1363_CONFIG_SCAN_SINGLE_1 \ 104 | MAX1363_CONFIG_SCAN_SINGLE_1 \
118 | MAX1363_CONFIG_DE, \ 105 | MAX1363_CONFIG_DE, \
119 .numvals = 1, \ 106 .modemask = _mask \
120 }
121
122#define MAX1363_MODE_DIFF_SINGLE_TIMES_8(_nump, _numm) { \
123 .name = #_nump"-"#_numm, \
124 .conf = MAX1363_CHANNEL_SEL(_nump) \
125 | MAX1363_CONFIG_SCAN_SINGLE_8 \
126 | MAX1363_CONFIG_DE, \
127 .numvals = 1, \
128 } 107 }
129 108
130/* Can't think how to automate naming so specify for now */ 109/* Can't think how to automate naming so specify for now */
131#define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(_name, _num, _numvals) { \ 110#define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \
132 .name = #_name, \ 111 .conf = MAX1363_CHANNEL_SEL(_num) \
133 .conf = MAX1363_CHANNEL_SEL(_num) \
134 | MAX1363_CONFIG_SCAN_TO_CS \ 112 | MAX1363_CONFIG_SCAN_TO_CS \
135 | MAX1363_CONFIG_DE, \ 113 | MAX1363_CONFIG_DE, \
136 .numvals = _numvals, \ 114 .modemask = _mask \
137 } 115 }
138 116
139/* note only available for max1363 hence naming */ 117/* note only available for max1363 hence naming */
140#define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL_NAMED(_name, _num, _numvals) { \ 118#define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) { \
141 .name = #_name, \ 119 .conf = MAX1363_CHANNEL_SEL(_num) \
142 .conf = MAX1363_CHANNEL_SEL(_num) \
143 | MAX1236_SCAN_MID_TO_CHANNEL \ 120 | MAX1236_SCAN_MID_TO_CHANNEL \
144 | MAX1363_CONFIG_SE, \ 121 | MAX1363_CONFIG_SE, \
145 .numvals = _numvals, \ 122 .modemask = _mask \
146} 123}
147 124
148/* Not currently handled */ 125/* Not currently handled */
@@ -158,35 +135,43 @@ struct max1363_mode {
158 * clear what all the various options actually do. Alternative suggestions 135 * clear what all the various options actually do. Alternative suggestions
159 * that don't require user to have intimate knowledge of the chip welcomed. 136 * that don't require user to have intimate knowledge of the chip welcomed.
160 */ 137 */
138enum max1363_channels {
139 max1363_in0, max1363_in1, max1363_in2, max1363_in3,
140 max1363_in4, max1363_in5, max1363_in6, max1363_in7,
141 max1363_in8, max1363_in9, max1363_in10, max1363_in11,
142
143 max1363_in0min1, max1363_in2min3,
144 max1363_in4min5, max1363_in6min7,
145 max1363_in8min9, max1363_in10min11,
146
147 max1363_in1min0, max1363_in3min2,
148 max1363_in5min4, max1363_in7min6,
149 max1363_in9min8, max1363_in11min10,
150 };
161 151
162/* This must be maintained along side the max1363_mode_table in max1363_core */ 152/* This must be maintained along side the max1363_mode_table in max1363_core */
163enum max1363_modes { 153enum max1363_modes {
164 /* Single read of a single channel */ 154 /* Single read of a single channel */
165 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11, 155 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
166 /* Eight reads of a single channel */
167 se0, se1, se2, se3, se4, se5, se6, se7, se8, se9, se10, se11,
168 /* Scan to channel */
169 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
170 s0to7, s0to8, s0to9, s0to10, s0to11,
171 /* Differential single read */ 156 /* Differential single read */
172 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11, 157 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
173 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10, 158 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
174 /* Differential single read 8 times */ 159 /* Scan to channel and mid to channel where overlapping */
175 de0m1, de2m3, de4m5, de6m7, de8m9, de10m11, 160 s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,
176 de1m0, de3m2, de5m4, de7m6, de9m8, de11m10, 161 s6to7, s0to7, s6to8, s0to8, s6to9,
177 /* Differential scan to channel */ 162 s0to9, s6to10, s0to10, s6to11, s0to11,
178 d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11, 163 /* Differential scan to channel and mid to channel where overlapping */
179 d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10, 164 d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,
180 /* Scan mid to channel max123{6-9} only */ 165 d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,
181 s2to3, s6to7, s6to8, s6to9, s6to10, s6to11, 166 d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,
182 /* Differential scan mid to channel */ 167 d7m6to11m10, d1m0to11m10,
183 s6m7to8m9, s6m7to10m11, s7m6to9m8, s7m6to11m10,
184}; 168};
185 169
186/** 170/**
187 * struct max1363_chip_info - chip specifc information 171 * struct max1363_chip_info - chip specifc information
188 * @name: indentification string for chip 172 * @name: indentification string for chip
189 * @num_inputs: number of physical inputs on chip 173 * @num_inputs: number of physical inputs on chip
174 * @bits: accuracy of the adc in bits
190 * @int_vref_mv: the internal reference voltage 175 * @int_vref_mv: the internal reference voltage
191 * @monitor_mode: whether the chip supports monitor interrupts 176 * @monitor_mode: whether the chip supports monitor interrupts
192 * @mode_list: array of available scan modes 177 * @mode_list: array of available scan modes
@@ -196,11 +181,14 @@ enum max1363_modes {
196struct max1363_chip_info { 181struct max1363_chip_info {
197 const char *name; 182 const char *name;
198 u8 num_inputs; 183 u8 num_inputs;
184 u8 bits;
199 u16 int_vref_mv; 185 u16 int_vref_mv;
200 bool monitor_mode; 186 bool monitor_mode;
201 const enum max1363_modes *mode_list; 187 const enum max1363_modes *mode_list;
202 int num_modes; 188 int num_modes;
203 enum max1363_modes default_mode; 189 enum max1363_modes default_mode;
190 struct attribute_group *dev_attrs;
191 struct attribute_group *scan_attrs;
204}; 192};
205 193
206 194
@@ -212,6 +200,7 @@ struct max1363_chip_info {
212 * @configbyte: cache of current device config byte 200 * @configbyte: cache of current device config byte
213 * @chip_info: chip model specific constants, available modes etc 201 * @chip_info: chip model specific constants, available modes etc
214 * @current_mode: the scan mode of this chip 202 * @current_mode: the scan mode of this chip
203 * @requestedmask: a valid requested set of channels
215 * @poll_work: bottom half of polling interrupt handler 204 * @poll_work: bottom half of polling interrupt handler
216 * @protect_ring: used to ensure only one polling bh running at a time 205 * @protect_ring: used to ensure only one polling bh running at a time
217 * @reg: supply regulator 206 * @reg: supply regulator
@@ -223,16 +212,21 @@ struct max1363_state {
223 char configbyte; 212 char configbyte;
224 const struct max1363_chip_info *chip_info; 213 const struct max1363_chip_info *chip_info;
225 const struct max1363_mode *current_mode; 214 const struct max1363_mode *current_mode;
215 u32 requestedmask;
226 struct work_struct poll_work; 216 struct work_struct poll_work;
227 atomic_t protect_ring; 217 atomic_t protect_ring;
228 struct iio_trigger *trig; 218 struct iio_trigger *trig;
229 struct regulator *reg; 219 struct regulator *reg;
230}; 220};
221
222const struct max1363_mode
223*max1363_match_mode(u32 mask, const struct max1363_chip_info *ci);
224
225int max1363_set_scan_mode(struct max1363_state *st);
226
231#ifdef CONFIG_MAX1363_RING_BUFFER 227#ifdef CONFIG_MAX1363_RING_BUFFER
232 228
233ssize_t max1363_scan_from_ring(struct device *dev, 229int max1363_single_channel_from_ring(long mask, struct max1363_state *st);
234 struct device_attribute *attr,
235 char *buf);
236int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev); 230int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev);
237void max1363_ring_cleanup(struct iio_dev *indio_dev); 231void max1363_ring_cleanup(struct iio_dev *indio_dev);
238 232
@@ -250,14 +244,12 @@ static inline int max1363_initialize_ring(struct iio_ring_buffer *ring)
250 return 0; 244 return 0;
251}; 245};
252 246
253 247int max1363_single_channel_from_ring(long mask, struct max1363_state *st)
254static inline ssize_t max1363_scan_from_ring(struct device *dev,
255 struct device_attribute *attr,
256 char *buf)
257{ 248{
258 return 0; 249 return -EINVAL;
259}; 250};
260 251
252
261static inline int 253static inline int
262max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev) 254max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev)
263{ 255{
diff --git a/drivers/staging/iio/adc/max1363_core.c b/drivers/staging/iio/adc/max1363_core.c
index 773f1d1d9c6e..20e267448d1f 100644
--- a/drivers/staging/iio/adc/max1363_core.c
+++ b/drivers/staging/iio/adc/max1363_core.c
@@ -1,27 +1,26 @@
1 /* 1 /*
2 * linux/drivers/industrialio/adc/max1363.c 2 * iio/adc/max1363.c
3 * Copyright (C) 2008 Jonathan Cameron 3 * Copyright (C) 2008-2010 Jonathan Cameron
4 * 4 *
5 * based on linux/drivers/i2c/chips/max123x 5 * based on linux/drivers/i2c/chips/max123x
6 * Copyright (C) 2002-2004 Stefan Eletzhofer 6 * Copyright (C) 2002-2004 Stefan Eletzhofer
7 * 7 *
8 * based on linux/drivers/acron/char/pcf8583.c 8 * based on linux/drivers/acron/char/pcf8583.c
9 * Copyright (C) 2000 Russell King 9 * Copyright (C) 2000 Russell King
10 * 10 *
11 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 * 14 *
15 * max1363.c 15 * max1363.c
16 * 16 *
17 * Partial support for max1363 and similar chips. 17 * Partial support for max1363 and similar chips.
18 * 18 *
19 * Not currently implemented. 19 * Not currently implemented.
20 * 20 *
21 * - Monitor interrrupt generation. 21 * - Monitor interrrupt generation.
22 * - Control of internal reference. 22 * - Control of internal reference.
23 * - Sysfs scan interface currently assumes unipolar mode. 23 */
24 */
25 24
26#include <linux/interrupt.h> 25#include <linux/interrupt.h>
27#include <linux/gpio.h> 26#include <linux/gpio.h>
@@ -38,118 +37,328 @@
38#include "../iio.h" 37#include "../iio.h"
39#include "../sysfs.h" 38#include "../sysfs.h"
40 39
40#include "../ring_generic.h"
41#include "adc.h"
41#include "max1363.h" 42#include "max1363.h"
42 43
43/* Available scan modes. 44/* Here we claim all are 16 bits. This currently does no harm and saves
44 * Awkwardly the associated enum is in the header so it is available to 45 * us a lot of scan element listings */
45 * the ring buffer code. 46
46 */ 47#define MAX1363_SCAN_EL(number) \
47static const struct max1363_mode max1363_mode_table[] = { 48 IIO_SCAN_EL_C(in##number, number, IIO_UNSIGNED(16), 0, NULL);
48 MAX1363_MODE_SINGLE(0), 49#define MAX1363_SCAN_EL_D(p, n, number) \
49 MAX1363_MODE_SINGLE(1), 50 IIO_SCAN_NAMED_EL_C(in##p##m##in##n, in##p-in##n, \
50 MAX1363_MODE_SINGLE(2), 51 number, IIO_SIGNED(16), 0 , NULL);
51 MAX1363_MODE_SINGLE(3), 52
52 MAX1363_MODE_SINGLE(4), 53static MAX1363_SCAN_EL(0);
53 MAX1363_MODE_SINGLE(5), 54static MAX1363_SCAN_EL(1);
54 MAX1363_MODE_SINGLE(6), 55static MAX1363_SCAN_EL(2);
55 MAX1363_MODE_SINGLE(7), 56static MAX1363_SCAN_EL(3);
56 MAX1363_MODE_SINGLE(8), 57static MAX1363_SCAN_EL(4);
57 MAX1363_MODE_SINGLE(9), 58static MAX1363_SCAN_EL(5);
58 MAX1363_MODE_SINGLE(10), 59static MAX1363_SCAN_EL(6);
59 MAX1363_MODE_SINGLE(11), 60static MAX1363_SCAN_EL(7);
60 61static MAX1363_SCAN_EL(8);
61 MAX1363_MODE_SINGLE_TIMES_8(0), 62static MAX1363_SCAN_EL(9);
62 MAX1363_MODE_SINGLE_TIMES_8(1), 63static MAX1363_SCAN_EL(10);
63 MAX1363_MODE_SINGLE_TIMES_8(2), 64static MAX1363_SCAN_EL(11);
64 MAX1363_MODE_SINGLE_TIMES_8(3), 65static MAX1363_SCAN_EL_D(0, 1, 12);
65 MAX1363_MODE_SINGLE_TIMES_8(4), 66static MAX1363_SCAN_EL_D(2, 3, 13);
66 MAX1363_MODE_SINGLE_TIMES_8(5), 67static MAX1363_SCAN_EL_D(4, 5, 14);
67 MAX1363_MODE_SINGLE_TIMES_8(6), 68static MAX1363_SCAN_EL_D(6, 7, 15);
68 MAX1363_MODE_SINGLE_TIMES_8(7), 69static MAX1363_SCAN_EL_D(8, 9, 16);
69 MAX1363_MODE_SINGLE_TIMES_8(8), 70static MAX1363_SCAN_EL_D(10, 11, 17);
70 MAX1363_MODE_SINGLE_TIMES_8(9), 71static MAX1363_SCAN_EL_D(1, 0, 18);
71 MAX1363_MODE_SINGLE_TIMES_8(10), 72static MAX1363_SCAN_EL_D(3, 2, 19);
72 MAX1363_MODE_SINGLE_TIMES_8(11), 73static MAX1363_SCAN_EL_D(5, 4, 20);
73 74static MAX1363_SCAN_EL_D(7, 6, 21);
74 MAX1363_MODE_SCAN_TO_CHANNEL(1), 75static MAX1363_SCAN_EL_D(9, 8, 22);
75 MAX1363_MODE_SCAN_TO_CHANNEL(2), 76static MAX1363_SCAN_EL_D(11, 10, 23);
76 MAX1363_MODE_SCAN_TO_CHANNEL(3), 77
77 MAX1363_MODE_SCAN_TO_CHANNEL(4), 78static const struct max1363_mode max1363_mode_table[] = {
78 MAX1363_MODE_SCAN_TO_CHANNEL(5), 79 /* All of the single channel options first */
79 MAX1363_MODE_SCAN_TO_CHANNEL(6), 80 MAX1363_MODE_SINGLE(0, 1 << 0),
80 MAX1363_MODE_SCAN_TO_CHANNEL(7), 81 MAX1363_MODE_SINGLE(1, 1 << 1),
81 MAX1363_MODE_SCAN_TO_CHANNEL(8), 82 MAX1363_MODE_SINGLE(2, 1 << 2),
82 MAX1363_MODE_SCAN_TO_CHANNEL(9), 83 MAX1363_MODE_SINGLE(3, 1 << 3),
83 MAX1363_MODE_SCAN_TO_CHANNEL(10), 84 MAX1363_MODE_SINGLE(4, 1 << 4),
84 MAX1363_MODE_SCAN_TO_CHANNEL(11), 85 MAX1363_MODE_SINGLE(5, 1 << 5),
85 86 MAX1363_MODE_SINGLE(6, 1 << 6),
86 MAX1363_MODE_DIFF_SINGLE(0, 1), 87 MAX1363_MODE_SINGLE(7, 1 << 7),
87 MAX1363_MODE_DIFF_SINGLE(2, 3), 88 MAX1363_MODE_SINGLE(8, 1 << 8),
88 MAX1363_MODE_DIFF_SINGLE(4, 5), 89 MAX1363_MODE_SINGLE(9, 1 << 9),
89 MAX1363_MODE_DIFF_SINGLE(6, 7), 90 MAX1363_MODE_SINGLE(10, 1 << 10),
90 MAX1363_MODE_DIFF_SINGLE(8, 9), 91 MAX1363_MODE_SINGLE(11, 1 << 11),
91 MAX1363_MODE_DIFF_SINGLE(10, 11), 92
92 MAX1363_MODE_DIFF_SINGLE(1, 0), 93 MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),
93 MAX1363_MODE_DIFF_SINGLE(3, 2), 94 MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),
94 MAX1363_MODE_DIFF_SINGLE(5, 4), 95 MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),
95 MAX1363_MODE_DIFF_SINGLE(7, 6), 96 MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),
96 MAX1363_MODE_DIFF_SINGLE(9, 8), 97 MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),
97 MAX1363_MODE_DIFF_SINGLE(11, 10), 98 MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
98 99 MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),
99 MAX1363_MODE_DIFF_SINGLE_TIMES_8(0, 1), 100 MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),
100 MAX1363_MODE_DIFF_SINGLE_TIMES_8(2, 3), 101 MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),
101 MAX1363_MODE_DIFF_SINGLE_TIMES_8(4, 5), 102 MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),
102 MAX1363_MODE_DIFF_SINGLE_TIMES_8(6, 7), 103 MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),
103 MAX1363_MODE_DIFF_SINGLE_TIMES_8(8, 9), 104 MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
104 MAX1363_MODE_DIFF_SINGLE_TIMES_8(10, 11), 105
105 MAX1363_MODE_DIFF_SINGLE_TIMES_8(1, 0), 106 /* The multichannel scans next */
106 MAX1363_MODE_DIFF_SINGLE_TIMES_8(3, 2), 107 MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),
107 MAX1363_MODE_DIFF_SINGLE_TIMES_8(5, 4), 108 MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),
108 MAX1363_MODE_DIFF_SINGLE_TIMES_8(7, 6), 109 MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),
109 MAX1363_MODE_DIFF_SINGLE_TIMES_8(9, 8), 110 MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),
110 MAX1363_MODE_DIFF_SINGLE_TIMES_8(11, 10), 111 MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),
111 112 MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),
112 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(0-1...2-3, 2, 2), 113 MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),
113 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(0-1...4-5, 4, 3), 114 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),
114 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(0-1...6-7, 6, 4), 115 MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),
115 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(0-1...8-9, 8, 5), 116 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),
116 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(0-1...10-11, 10, 6), 117 MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),
117 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(1-0...3-2, 3, 2), 118 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),
118 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(1-0...5-4, 5, 3), 119 MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),
119 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(1-0...7-6, 7, 4), 120 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
120 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(1-0...9-8, 9, 5), 121 MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
121 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL_NAMED(1-0...11-10, 11, 6), 122 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),
122 123 MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),
123 MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3), 124
124 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7), 125 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),
125 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8), 126 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),
126 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9), 127 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),
127 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10), 128 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),
128 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11), 129 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),
129 130 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
130 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL_NAMED(6-7...8-9, 8, 2), 131 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
131 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL_NAMED(6-7...10-11, 10, 3), 132 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),
132 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL_NAMED(7-6...9-8, 9, 2), 133 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),
133 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL_NAMED(7-6...11-10, 11, 3), 134 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),
135 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),
136 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),
137 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),
138 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
134}; 139};
135 140
141const struct max1363_mode
142*max1363_match_mode(u32 mask, const struct max1363_chip_info *ci)
143{
144 int i;
145 if (mask)
146 for (i = 0; i < ci->num_modes; i++)
147 if (!((~max1363_mode_table[ci->mode_list[i]].modemask) &
148 mask))
149 return &max1363_mode_table[ci->mode_list[i]];
150 return NULL;
151};
152
153static ssize_t max1363_show_precision(struct device *dev,
154 struct device_attribute *attr,
155 char *buf)
156{
157 struct iio_dev *dev_info = dev_get_drvdata(dev);
158 struct max1363_state *st = iio_dev_get_devdata(dev_info);
159 return sprintf(buf, "%d\n", st->chip_info->bits);
160}
161
162static IIO_DEVICE_ATTR(in_precision, S_IRUGO, max1363_show_precision,
163 NULL, 0);
164
165static int max1363_write_basic_config(struct i2c_client *client,
166 unsigned char d1,
167 unsigned char d2)
168{
169 int ret;
170 u8 *tx_buf = kmalloc(2 , GFP_KERNEL);
171
172 if (!tx_buf)
173 return -ENOMEM;
174 tx_buf[0] = d1;
175 tx_buf[1] = d2;
176
177 ret = i2c_master_send(client, tx_buf, 2);
178 kfree(tx_buf);
179
180 return (ret > 0) ? 0 : ret;
181}
182
183int max1363_set_scan_mode(struct max1363_state *st)
184{
185 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
186 | MAX1363_SCAN_MASK
187 | MAX1363_SE_DE_MASK);
188 st->configbyte |= st->current_mode->conf;
189
190 return max1363_write_basic_config(st->client,
191 st->setupbyte,
192 st->configbyte);
193}
194
195static ssize_t max1363_read_single_channel(struct device *dev,
196 struct device_attribute *attr,
197 char *buf)
198{
199 struct iio_dev *dev_info = dev_get_drvdata(dev);
200 struct max1363_state *st = iio_dev_get_devdata(dev_info);
201 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
202 struct i2c_client *client = st->client;
203 int ret = 0, len = 0;
204 s32 data ;
205 char rxbuf[2];
206 long mask;
207
208 mutex_lock(&dev_info->mlock);
209 /* If ring buffer capture is occuring, query the buffer */
210 if (iio_ring_enabled(dev_info)) {
211 mask = max1363_mode_table[this_attr->address].modemask;
212 data = max1363_single_channel_from_ring(mask, st);
213 if (data < 0) {
214 ret = data;
215 goto error_ret;
216 }
217 } else {
218 /* Check to see if current scan mode is correct */
219 if (st->current_mode !=
220 &max1363_mode_table[this_attr->address]) {
221 /* Update scan mode if needed */
222 st->current_mode
223 = &max1363_mode_table[this_attr->address];
224 ret = max1363_set_scan_mode(st);
225 if (ret)
226 goto error_ret;
227 }
228 if (st->chip_info->bits != 8) {
229 /* Get reading */
230 data = i2c_master_recv(client, rxbuf, 2);
231 if (data < 0) {
232 ret = data;
233 goto error_ret;
234 }
235
236 data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8;
237 } else {
238 /* Get reading */
239 data = i2c_master_recv(client, rxbuf, 1);
240 if (data < 0) {
241 ret = data;
242 goto error_ret;
243 }
244 data = rxbuf[0];
245 }
246 }
247 /* Pretty print the result */
248 len = sprintf(buf, "%u\n", data);
249
250error_ret:
251 mutex_unlock(&dev_info->mlock);
252 return ret ? ret : len;
253}
254
255/* Direct read attribtues */
256static IIO_DEV_ATTR_IN_RAW(0, max1363_read_single_channel, _s0);
257static IIO_DEV_ATTR_IN_RAW(1, max1363_read_single_channel, _s1);
258static IIO_DEV_ATTR_IN_RAW(2, max1363_read_single_channel, _s2);
259static IIO_DEV_ATTR_IN_RAW(3, max1363_read_single_channel, _s3);
260static IIO_DEV_ATTR_IN_RAW(4, max1363_read_single_channel, _s4);
261static IIO_DEV_ATTR_IN_RAW(5, max1363_read_single_channel, _s5);
262static IIO_DEV_ATTR_IN_RAW(6, max1363_read_single_channel, _s6);
263static IIO_DEV_ATTR_IN_RAW(7, max1363_read_single_channel, _s7);
264static IIO_DEV_ATTR_IN_RAW(8, max1363_read_single_channel, _s8);
265static IIO_DEV_ATTR_IN_RAW(9, max1363_read_single_channel, _s9);
266static IIO_DEV_ATTR_IN_RAW(10, max1363_read_single_channel, _s10);
267static IIO_DEV_ATTR_IN_RAW(11, max1363_read_single_channel, _s11);
268
269static IIO_DEV_ATTR_IN_DIFF_RAW(0, 1, max1363_read_single_channel, d0m1);
270static IIO_DEV_ATTR_IN_DIFF_RAW(2, 3, max1363_read_single_channel, d2m3);
271static IIO_DEV_ATTR_IN_DIFF_RAW(4, 5, max1363_read_single_channel, d4m5);
272static IIO_DEV_ATTR_IN_DIFF_RAW(6, 7, max1363_read_single_channel, d6m7);
273static IIO_DEV_ATTR_IN_DIFF_RAW(8, 9, max1363_read_single_channel, d8m9);
274static IIO_DEV_ATTR_IN_DIFF_RAW(10, 11, max1363_read_single_channel, d10m11);
275static IIO_DEV_ATTR_IN_DIFF_RAW(1, 0, max1363_read_single_channel, d1m0);
276static IIO_DEV_ATTR_IN_DIFF_RAW(3, 2, max1363_read_single_channel, d3m2);
277static IIO_DEV_ATTR_IN_DIFF_RAW(5, 4, max1363_read_single_channel, d5m4);
278static IIO_DEV_ATTR_IN_DIFF_RAW(7, 6, max1363_read_single_channel, d7m6);
279static IIO_DEV_ATTR_IN_DIFF_RAW(9, 8, max1363_read_single_channel, d9m8);
280static IIO_DEV_ATTR_IN_DIFF_RAW(11, 10, max1363_read_single_channel, d11m10);
281
282
283static ssize_t max1363_show_scale(struct device *dev,
284 struct device_attribute *attr,
285 char *buf)
286{
287 /* Driver currently only support internal vref */
288 struct iio_dev *dev_info = dev_get_drvdata(dev);
289 struct max1363_state *st = iio_dev_get_devdata(dev_info);
290 /* Corresponds to Vref / 2^(bits) */
291
292 if ((1 << (st->chip_info->bits + 1))
293 > st->chip_info->int_vref_mv)
294 return sprintf(buf, "0.5\n");
295 else
296 return sprintf(buf, "%d\n",
297 st->chip_info->int_vref_mv >> st->chip_info->bits);
298}
299
300static IIO_DEVICE_ATTR(in_scale, S_IRUGO, max1363_show_scale, NULL, 0);
301
302static ssize_t max1363_show_name(struct device *dev,
303 struct device_attribute *attr,
304 char *buf)
305{
306 struct iio_dev *dev_info = dev_get_drvdata(dev);
307 struct max1363_state *st = iio_dev_get_devdata(dev_info);
308 return sprintf(buf, "%s\n", st->chip_info->name);
309}
310
311static IIO_DEVICE_ATTR(name, S_IRUGO, max1363_show_name, NULL, 0);
312
136/* Applies to max1363 */ 313/* Applies to max1363 */
137static const enum max1363_modes max1363_mode_list[] = { 314static const enum max1363_modes max1363_mode_list[] = {
138 _s0, _s1, _s2, _s3, 315 _s0, _s1, _s2, _s3,
139 se0, se1, se2, se3,
140 s0to1, s0to2, s0to3, 316 s0to1, s0to2, s0to3,
141 d0m1, d2m3, d1m0, d3m2, 317 d0m1, d2m3, d1m0, d3m2,
142 de0m1, de2m3, de1m0, de3m2,
143 d0m1to2m3, d1m0to3m2, 318 d0m1to2m3, d1m0to3m2,
144}; 319};
145 320
321static struct attribute *max1363_device_attrs[] = {
322 &iio_dev_attr_in0_raw.dev_attr.attr,
323 &iio_dev_attr_in1_raw.dev_attr.attr,
324 &iio_dev_attr_in2_raw.dev_attr.attr,
325 &iio_dev_attr_in3_raw.dev_attr.attr,
326 &iio_dev_attr_in0min1_raw.dev_attr.attr,
327 &iio_dev_attr_in2min3_raw.dev_attr.attr,
328 &iio_dev_attr_in1min0_raw.dev_attr.attr,
329 &iio_dev_attr_in3min2_raw.dev_attr.attr,
330 &iio_dev_attr_name.dev_attr.attr,
331 &iio_dev_attr_in_scale.dev_attr.attr,
332 NULL
333};
334
335static struct attribute_group max1363_dev_attr_group = {
336 .attrs = max1363_device_attrs,
337};
338
339static struct attribute *max1363_scan_el_attrs[] = {
340 &iio_scan_el_in0.dev_attr.attr,
341 &iio_scan_el_in1.dev_attr.attr,
342 &iio_scan_el_in2.dev_attr.attr,
343 &iio_scan_el_in3.dev_attr.attr,
344 &iio_scan_el_in0min1.dev_attr.attr,
345 &iio_scan_el_in2min3.dev_attr.attr,
346 &iio_scan_el_in1min0.dev_attr.attr,
347 &iio_scan_el_in3min2.dev_attr.attr,
348 &iio_dev_attr_in_precision.dev_attr.attr,
349 NULL,
350};
351
352static struct attribute_group max1363_scan_el_group = {
353 .name = "scan_elements",
354 .attrs = max1363_scan_el_attrs,
355};
356
146/* Appies to max1236, max1237 */ 357/* Appies to max1236, max1237 */
147static const enum max1363_modes max1236_mode_list[] = { 358static const enum max1363_modes max1236_mode_list[] = {
148 _s0, _s1, _s2, _s3, 359 _s0, _s1, _s2, _s3,
149 se0, se1, se2, se3,
150 s0to1, s0to2, s0to3, 360 s0to1, s0to2, s0to3,
151 d0m1, d2m3, d1m0, d3m2, 361 d0m1, d2m3, d1m0, d3m2,
152 de0m1, de2m3, de1m0, de3m2,
153 d0m1to2m3, d1m0to3m2, 362 d0m1to2m3, d1m0to3m2,
154 s2to3, 363 s2to3,
155}; 364};
@@ -157,24 +366,162 @@ static const enum max1363_modes max1236_mode_list[] = {
157/* Applies to max1238, max1239 */ 366/* Applies to max1238, max1239 */
158static const enum max1363_modes max1238_mode_list[] = { 367static const enum max1363_modes max1238_mode_list[] = {
159 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11, 368 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
160 se0, se1, se2, se3, se4, se5, se6, se7, se8, se9, se10, se11,
161 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, 369 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
162 s0to7, s0to8, s0to9, s0to10, s0to11, 370 s0to7, s0to8, s0to9, s0to10, s0to11,
163 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11, 371 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
164 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10, 372 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
165 de0m1, de2m3, de4m5, de6m7, de8m9, de10m11,
166 de1m0, de3m2, de5m4, de7m6, de9m8, de11m10,
167 d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11, 373 d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,
168 d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10, 374 d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,
169 s6to7, s6to8, s6to9, s6to10, s6to11, 375 s6to7, s6to8, s6to9, s6to10, s6to11,
170 s6m7to8m9, s6m7to10m11, s7m6to9m8, s7m6to11m10, 376 d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,
377};
378
379static struct attribute *max1238_device_attrs[] = {
380 &iio_dev_attr_in0_raw.dev_attr.attr,
381 &iio_dev_attr_in1_raw.dev_attr.attr,
382 &iio_dev_attr_in2_raw.dev_attr.attr,
383 &iio_dev_attr_in3_raw.dev_attr.attr,
384 &iio_dev_attr_in4_raw.dev_attr.attr,
385 &iio_dev_attr_in5_raw.dev_attr.attr,
386 &iio_dev_attr_in6_raw.dev_attr.attr,
387 &iio_dev_attr_in7_raw.dev_attr.attr,
388 &iio_dev_attr_in8_raw.dev_attr.attr,
389 &iio_dev_attr_in9_raw.dev_attr.attr,
390 &iio_dev_attr_in10_raw.dev_attr.attr,
391 &iio_dev_attr_in11_raw.dev_attr.attr,
392 &iio_dev_attr_in0min1_raw.dev_attr.attr,
393 &iio_dev_attr_in2min3_raw.dev_attr.attr,
394 &iio_dev_attr_in4min5_raw.dev_attr.attr,
395 &iio_dev_attr_in6min7_raw.dev_attr.attr,
396 &iio_dev_attr_in8min9_raw.dev_attr.attr,
397 &iio_dev_attr_in10min11_raw.dev_attr.attr,
398 &iio_dev_attr_in1min0_raw.dev_attr.attr,
399 &iio_dev_attr_in3min2_raw.dev_attr.attr,
400 &iio_dev_attr_in5min4_raw.dev_attr.attr,
401 &iio_dev_attr_in7min6_raw.dev_attr.attr,
402 &iio_dev_attr_in9min8_raw.dev_attr.attr,
403 &iio_dev_attr_in11min10_raw.dev_attr.attr,
404 &iio_dev_attr_name.dev_attr.attr,
405 &iio_dev_attr_in_scale.dev_attr.attr,
406 NULL
407};
408
409static struct attribute_group max1238_dev_attr_group = {
410 .attrs = max1238_device_attrs,
411};
412
413static struct attribute *max1238_scan_el_attrs[] = {
414 &iio_scan_el_in0.dev_attr.attr,
415 &iio_scan_el_in1.dev_attr.attr,
416 &iio_scan_el_in2.dev_attr.attr,
417 &iio_scan_el_in3.dev_attr.attr,
418 &iio_scan_el_in4.dev_attr.attr,
419 &iio_scan_el_in5.dev_attr.attr,
420 &iio_scan_el_in6.dev_attr.attr,
421 &iio_scan_el_in7.dev_attr.attr,
422 &iio_scan_el_in8.dev_attr.attr,
423 &iio_scan_el_in9.dev_attr.attr,
424 &iio_scan_el_in10.dev_attr.attr,
425 &iio_scan_el_in11.dev_attr.attr,
426 &iio_scan_el_in0min1.dev_attr.attr,
427 &iio_scan_el_in2min3.dev_attr.attr,
428 &iio_scan_el_in4min5.dev_attr.attr,
429 &iio_scan_el_in6min7.dev_attr.attr,
430 &iio_scan_el_in8min9.dev_attr.attr,
431 &iio_scan_el_in10min11.dev_attr.attr,
432 &iio_scan_el_in1min0.dev_attr.attr,
433 &iio_scan_el_in3min2.dev_attr.attr,
434 &iio_scan_el_in5min4.dev_attr.attr,
435 &iio_scan_el_in7min6.dev_attr.attr,
436 &iio_scan_el_in9min8.dev_attr.attr,
437 &iio_scan_el_in11min10.dev_attr.attr,
438 &iio_dev_attr_in_precision.dev_attr.attr,
439 NULL,
440};
441
442static struct attribute_group max1238_scan_el_group = {
443 .name = "scan_elements",
444 .attrs = max1238_scan_el_attrs,
171}; 445};
172 446
173 447
448static const enum max1363_modes max11607_mode_list[] = {
449 _s0, _s1, _s2, _s3,
450 s0to1, s0to2, s0to3,
451 s2to3,
452 d0m1, d2m3, d1m0, d3m2,
453 d0m1to2m3, d1m0to3m2,
454};
455
456static const enum max1363_modes max11608_mode_list[] = {
457 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,
458 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,
459 s6to7,
460 d0m1, d2m3, d4m5, d6m7,
461 d1m0, d3m2, d5m4, d7m6,
462 d0m1to2m3, d0m1to4m5, d0m1to6m7,
463 d1m0to3m2, d1m0to5m4, d1m0to7m6,
464};
465
466static struct attribute *max11608_device_attrs[] = {
467 &iio_dev_attr_in0_raw.dev_attr.attr,
468 &iio_dev_attr_in1_raw.dev_attr.attr,
469 &iio_dev_attr_in2_raw.dev_attr.attr,
470 &iio_dev_attr_in3_raw.dev_attr.attr,
471 &iio_dev_attr_in4_raw.dev_attr.attr,
472 &iio_dev_attr_in5_raw.dev_attr.attr,
473 &iio_dev_attr_in6_raw.dev_attr.attr,
474 &iio_dev_attr_in7_raw.dev_attr.attr,
475 &iio_dev_attr_in0min1_raw.dev_attr.attr,
476 &iio_dev_attr_in2min3_raw.dev_attr.attr,
477 &iio_dev_attr_in4min5_raw.dev_attr.attr,
478 &iio_dev_attr_in6min7_raw.dev_attr.attr,
479 &iio_dev_attr_in1min0_raw.dev_attr.attr,
480 &iio_dev_attr_in3min2_raw.dev_attr.attr,
481 &iio_dev_attr_in5min4_raw.dev_attr.attr,
482 &iio_dev_attr_in7min6_raw.dev_attr.attr,
483 &iio_dev_attr_name.dev_attr.attr,
484 &iio_dev_attr_in_scale.dev_attr.attr,
485 NULL
486};
487
488static struct attribute_group max11608_dev_attr_group = {
489 .attrs = max11608_device_attrs,
490};
491
492static struct attribute *max11608_scan_el_attrs[] = {
493 &iio_scan_el_in0.dev_attr.attr,
494 &iio_scan_el_in1.dev_attr.attr,
495 &iio_scan_el_in2.dev_attr.attr,
496 &iio_scan_el_in3.dev_attr.attr,
497 &iio_scan_el_in4.dev_attr.attr,
498 &iio_scan_el_in5.dev_attr.attr,
499 &iio_scan_el_in6.dev_attr.attr,
500 &iio_scan_el_in7.dev_attr.attr,
501 &iio_scan_el_in0min1.dev_attr.attr,
502 &iio_scan_el_in2min3.dev_attr.attr,
503 &iio_scan_el_in4min5.dev_attr.attr,
504 &iio_scan_el_in6min7.dev_attr.attr,
505 &iio_scan_el_in1min0.dev_attr.attr,
506 &iio_scan_el_in3min2.dev_attr.attr,
507 &iio_scan_el_in5min4.dev_attr.attr,
508 &iio_scan_el_in7min6.dev_attr.attr,
509 &iio_dev_attr_in_precision.dev_attr.attr,
510};
511
512static struct attribute_group max11608_scan_el_group = {
513 .name = "scan_elements",
514 .attrs = max11608_scan_el_attrs,
515};
516
174enum { max1361, 517enum { max1361,
175 max1362, 518 max1362,
176 max1363, 519 max1363,
177 max1364, 520 max1364,
521 max1036,
522 max1037,
523 max1038,
524 max1039,
178 max1136, 525 max1136,
179 max1137, 526 max1137,
180 max1138, 527 max1138,
@@ -183,6 +530,24 @@ enum { max1361,
183 max1237, 530 max1237,
184 max1238, 531 max1238,
185 max1239, 532 max1239,
533 max11600,
534 max11601,
535 max11602,
536 max11603,
537 max11604,
538 max11605,
539 max11606,
540 max11607,
541 max11608,
542 max11609,
543 max11610,
544 max11611,
545 max11612,
546 max11613,
547 max11614,
548 max11615,
549 max11616,
550 max11617,
186}; 551};
187 552
188/* max1363 and max1368 tested - rest from data sheet */ 553/* max1363 and max1368 tested - rest from data sheet */
@@ -190,118 +555,350 @@ static const struct max1363_chip_info max1363_chip_info_tbl[] = {
190 { 555 {
191 .name = "max1361", 556 .name = "max1361",
192 .num_inputs = 4, 557 .num_inputs = 4,
558 .bits = 10,
559 .int_vref_mv = 2048,
193 .monitor_mode = 1, 560 .monitor_mode = 1,
194 .mode_list = max1363_mode_list, 561 .mode_list = max1363_mode_list,
195 .num_modes = ARRAY_SIZE(max1363_mode_list), 562 .num_modes = ARRAY_SIZE(max1363_mode_list),
196 .default_mode = s0to3, 563 .default_mode = s0to3,
564 .dev_attrs = &max1363_dev_attr_group,
565 .scan_attrs = &max1363_scan_el_group,
197 }, { 566 }, {
198 .name = "max1362", 567 .name = "max1362",
199 .num_inputs = 4, 568 .num_inputs = 4,
569 .bits = 10,
570 .int_vref_mv = 4096,
200 .monitor_mode = 1, 571 .monitor_mode = 1,
201 .mode_list = max1363_mode_list, 572 .mode_list = max1363_mode_list,
202 .num_modes = ARRAY_SIZE(max1363_mode_list), 573 .num_modes = ARRAY_SIZE(max1363_mode_list),
203 .default_mode = s0to3, 574 .default_mode = s0to3,
575 .dev_attrs = &max1363_dev_attr_group,
576 .scan_attrs = &max1363_scan_el_group,
204 }, { 577 }, {
205 .name = "max1363", 578 .name = "max1363",
206 .num_inputs = 4, 579 .num_inputs = 4,
580 .bits = 12,
581 .int_vref_mv = 2048,
207 .monitor_mode = 1, 582 .monitor_mode = 1,
208 .mode_list = max1363_mode_list, 583 .mode_list = max1363_mode_list,
209 .num_modes = ARRAY_SIZE(max1363_mode_list), 584 .num_modes = ARRAY_SIZE(max1363_mode_list),
210 .default_mode = s0to3, 585 .default_mode = s0to3,
586 .dev_attrs = &max1363_dev_attr_group,
587 .scan_attrs = &max1363_scan_el_group,
211 }, { 588 }, {
212 .name = "max1364", 589 .name = "max1364",
213 .num_inputs = 4, 590 .num_inputs = 4,
591 .bits = 12,
592 .int_vref_mv = 4096,
214 .monitor_mode = 1, 593 .monitor_mode = 1,
215 .mode_list = max1363_mode_list, 594 .mode_list = max1363_mode_list,
216 .num_modes = ARRAY_SIZE(max1363_mode_list), 595 .num_modes = ARRAY_SIZE(max1363_mode_list),
217 .default_mode = s0to3, 596 .default_mode = s0to3,
597 .dev_attrs = &max1363_dev_attr_group,
598 .scan_attrs = &max1363_scan_el_group,
599 }, {
600 .name = "max1036",
601 .num_inputs = 4,
602 .bits = 8,
603 .int_vref_mv = 4096,
604 .mode_list = max1236_mode_list,
605 .num_modes = ARRAY_SIZE(max1236_mode_list),
606 .default_mode = s0to3,
607 .dev_attrs = &max1363_dev_attr_group,
608 .scan_attrs = &max1363_scan_el_group,
609 }, {
610 .name = "max1037",
611 .num_inputs = 4,
612 .bits = 8,
613 .int_vref_mv = 2048,
614 .mode_list = max1236_mode_list,
615 .num_modes = ARRAY_SIZE(max1236_mode_list),
616 .default_mode = s0to3,
617 .dev_attrs = &max1363_dev_attr_group,
618 .scan_attrs = &max1363_scan_el_group,
619 }, {
620 .name = "max1038",
621 .num_inputs = 12,
622 .bits = 8,
623 .int_vref_mv = 4096,
624 .mode_list = max1238_mode_list,
625 .num_modes = ARRAY_SIZE(max1238_mode_list),
626 .default_mode = s0to11,
627 .dev_attrs = &max1238_dev_attr_group,
628 .scan_attrs = &max1238_scan_el_group,
629 }, {
630 .name = "max1039",
631 .num_inputs = 12,
632 .bits = 8,
633 .int_vref_mv = 2048,
634 .mode_list = max1238_mode_list,
635 .num_modes = ARRAY_SIZE(max1238_mode_list),
636 .default_mode = s0to11,
637 .dev_attrs = &max1238_dev_attr_group,
638 .scan_attrs = &max1238_scan_el_group,
218 }, { 639 }, {
219 .name = "max1136", 640 .name = "max1136",
220 .num_inputs = 4, 641 .num_inputs = 4,
642 .bits = 10,
221 .int_vref_mv = 4096, 643 .int_vref_mv = 4096,
222 .mode_list = max1236_mode_list, 644 .mode_list = max1236_mode_list,
223 .num_modes = ARRAY_SIZE(max1236_mode_list), 645 .num_modes = ARRAY_SIZE(max1236_mode_list),
224 .default_mode = s0to3, 646 .default_mode = s0to3,
647 .dev_attrs = &max1363_dev_attr_group,
648 .scan_attrs = &max1363_scan_el_group,
225 }, { 649 }, {
226 .name = "max1137", 650 .name = "max1137",
227 .num_inputs = 4, 651 .num_inputs = 4,
652 .bits = 10,
228 .int_vref_mv = 2048, 653 .int_vref_mv = 2048,
229 .mode_list = max1236_mode_list, 654 .mode_list = max1236_mode_list,
230 .num_modes = ARRAY_SIZE(max1236_mode_list), 655 .num_modes = ARRAY_SIZE(max1236_mode_list),
231 .default_mode = s0to3, 656 .default_mode = s0to3,
657 .dev_attrs = &max1363_dev_attr_group,
658 .scan_attrs = &max1363_scan_el_group,
232 }, { 659 }, {
233 .name = "max1138", 660 .name = "max1138",
234 .num_inputs = 12, 661 .num_inputs = 12,
662 .bits = 10,
235 .int_vref_mv = 4096, 663 .int_vref_mv = 4096,
236 .mode_list = max1238_mode_list, 664 .mode_list = max1238_mode_list,
237 .num_modes = ARRAY_SIZE(max1238_mode_list), 665 .num_modes = ARRAY_SIZE(max1238_mode_list),
238 .default_mode = s0to11, 666 .default_mode = s0to11,
667 .dev_attrs = &max1238_dev_attr_group,
668 .scan_attrs = &max1238_scan_el_group,
239 }, { 669 }, {
240 .name = "max1139", 670 .name = "max1139",
241 .num_inputs = 12, 671 .num_inputs = 12,
672 .bits = 10,
242 .int_vref_mv = 2048, 673 .int_vref_mv = 2048,
243 .mode_list = max1238_mode_list, 674 .mode_list = max1238_mode_list,
244 .num_modes = ARRAY_SIZE(max1238_mode_list), 675 .num_modes = ARRAY_SIZE(max1238_mode_list),
245 .default_mode = s0to11, 676 .default_mode = s0to11,
677 .dev_attrs = &max1238_dev_attr_group,
678 .scan_attrs = &max1238_scan_el_group,
246 }, { 679 }, {
247 .name = "max1236", 680 .name = "max1236",
248 .num_inputs = 4, 681 .num_inputs = 4,
682 .bits = 12,
249 .int_vref_mv = 4096, 683 .int_vref_mv = 4096,
250 .mode_list = max1236_mode_list, 684 .mode_list = max1236_mode_list,
251 .num_modes = ARRAY_SIZE(max1236_mode_list), 685 .num_modes = ARRAY_SIZE(max1236_mode_list),
252 .default_mode = s0to3, 686 .default_mode = s0to3,
687 .dev_attrs = &max1363_dev_attr_group,
688 .scan_attrs = &max1363_scan_el_group,
253 }, { 689 }, {
254 .name = "max1237", 690 .name = "max1237",
255 .num_inputs = 4, 691 .num_inputs = 4,
692 .bits = 12,
256 .int_vref_mv = 2048, 693 .int_vref_mv = 2048,
257 .mode_list = max1236_mode_list, 694 .mode_list = max1236_mode_list,
258 .num_modes = ARRAY_SIZE(max1236_mode_list), 695 .num_modes = ARRAY_SIZE(max1236_mode_list),
259 .default_mode = s0to3, 696 .default_mode = s0to3,
697 .dev_attrs = &max1363_dev_attr_group,
698 .scan_attrs = &max1363_scan_el_group,
260 }, { 699 }, {
261 .name = "max1238", 700 .name = "max1238",
262 .num_inputs = 12, 701 .num_inputs = 12,
702 .bits = 12,
263 .int_vref_mv = 4096, 703 .int_vref_mv = 4096,
264 .mode_list = max1238_mode_list, 704 .mode_list = max1238_mode_list,
265 .num_modes = ARRAY_SIZE(max1238_mode_list), 705 .num_modes = ARRAY_SIZE(max1238_mode_list),
266 .default_mode = s0to11, 706 .default_mode = s0to11,
707 .dev_attrs = &max1238_dev_attr_group,
708 .scan_attrs = &max1238_scan_el_group,
267 }, { 709 }, {
268 .name = "max1239", 710 .name = "max1239",
269 .num_inputs = 12, 711 .num_inputs = 12,
712 .bits = 12,
270 .int_vref_mv = 2048, 713 .int_vref_mv = 2048,
271 .mode_list = max1238_mode_list, 714 .mode_list = max1238_mode_list,
272 .num_modes = ARRAY_SIZE(max1238_mode_list), 715 .num_modes = ARRAY_SIZE(max1238_mode_list),
273 .default_mode = s0to11, 716 .default_mode = s0to11,
274 }, 717 .dev_attrs = &max1238_dev_attr_group,
718 .scan_attrs = &max1238_scan_el_group,
719 }, {
720 .name = "max11600",
721 .num_inputs = 4,
722 .bits = 8,
723 .int_vref_mv = 4096,
724 .mode_list = max11607_mode_list,
725 .num_modes = ARRAY_SIZE(max11607_mode_list),
726 .default_mode = s0to3,
727 .dev_attrs = &max1363_dev_attr_group,
728 .scan_attrs = &max1363_scan_el_group,
729 }, {
730 .name = "max11601",
731 .num_inputs = 4,
732 .bits = 8,
733 .int_vref_mv = 2048,
734 .mode_list = max11607_mode_list,
735 .num_modes = ARRAY_SIZE(max11607_mode_list),
736 .default_mode = s0to3,
737 .dev_attrs = &max1363_dev_attr_group,
738 .scan_attrs = &max1363_scan_el_group,
739 }, {
740 .name = "max11602",
741 .num_inputs = 8,
742 .bits = 8,
743 .int_vref_mv = 4096,
744 .mode_list = max11608_mode_list,
745 .num_modes = ARRAY_SIZE(max11608_mode_list),
746 .default_mode = s0to7,
747 .dev_attrs = &max11608_dev_attr_group,
748 .scan_attrs = &max11608_scan_el_group,
749 }, {
750 .name = "max11603",
751 .num_inputs = 8,
752 .bits = 8,
753 .int_vref_mv = 2048,
754 .mode_list = max11608_mode_list,
755 .num_modes = ARRAY_SIZE(max11608_mode_list),
756 .default_mode = s0to7,
757 .dev_attrs = &max11608_dev_attr_group,
758 .scan_attrs = &max11608_scan_el_group,
759 }, {
760 .name = "max11604",
761 .num_inputs = 12,
762 .bits = 8,
763 .int_vref_mv = 4098,
764 .mode_list = max1238_mode_list,
765 .num_modes = ARRAY_SIZE(max1238_mode_list),
766 .default_mode = s0to11,
767 .dev_attrs = &max1238_dev_attr_group,
768 .scan_attrs = &max1238_scan_el_group,
769 }, {
770 .name = "max11605",
771 .num_inputs = 12,
772 .bits = 8,
773 .int_vref_mv = 2048,
774 .mode_list = max1238_mode_list,
775 .num_modes = ARRAY_SIZE(max1238_mode_list),
776 .default_mode = s0to11,
777 .dev_attrs = &max1238_dev_attr_group,
778 .scan_attrs = &max1238_scan_el_group,
779 }, {
780 .name = "max11606",
781 .num_inputs = 4,
782 .bits = 10,
783 .int_vref_mv = 4096,
784 .mode_list = max11607_mode_list,
785 .num_modes = ARRAY_SIZE(max11607_mode_list),
786 .default_mode = s0to3,
787 .dev_attrs = &max1363_dev_attr_group,
788 .scan_attrs = &max1363_scan_el_group,
789 }, {
790 .name = "max11607",
791 .num_inputs = 4,
792 .bits = 10,
793 .int_vref_mv = 2048,
794 .mode_list = max11607_mode_list,
795 .num_modes = ARRAY_SIZE(max11607_mode_list),
796 .default_mode = s0to3,
797 .dev_attrs = &max1363_dev_attr_group,
798 .scan_attrs = &max1363_scan_el_group,
799 }, {
800 .name = "max11608",
801 .num_inputs = 8,
802 .bits = 10,
803 .int_vref_mv = 4096,
804 .mode_list = max11608_mode_list,
805 .num_modes = ARRAY_SIZE(max11608_mode_list),
806 .default_mode = s0to7,
807 .dev_attrs = &max11608_dev_attr_group,
808 .scan_attrs = &max11608_scan_el_group,
809 }, {
810 .name = "max11609",
811 .num_inputs = 8,
812 .bits = 10,
813 .int_vref_mv = 2048,
814 .mode_list = max11608_mode_list,
815 .num_modes = ARRAY_SIZE(max11608_mode_list),
816 .default_mode = s0to7,
817 .dev_attrs = &max11608_dev_attr_group,
818 .scan_attrs = &max11608_scan_el_group,
819 }, {
820 .name = "max11610",
821 .num_inputs = 12,
822 .bits = 10,
823 .int_vref_mv = 4098,
824 .mode_list = max1238_mode_list,
825 .num_modes = ARRAY_SIZE(max1238_mode_list),
826 .default_mode = s0to11,
827 .dev_attrs = &max1238_dev_attr_group,
828 .scan_attrs = &max1238_scan_el_group,
829 }, {
830 .name = "max11611",
831 .num_inputs = 12,
832 .bits = 10,
833 .int_vref_mv = 2048,
834 .mode_list = max1238_mode_list,
835 .num_modes = ARRAY_SIZE(max1238_mode_list),
836 .default_mode = s0to11,
837 .dev_attrs = &max1238_dev_attr_group,
838 .scan_attrs = &max1238_scan_el_group,
839 }, {
840 .name = "max11612",
841 .num_inputs = 4,
842 .bits = 12,
843 .int_vref_mv = 4096,
844 .mode_list = max11607_mode_list,
845 .num_modes = ARRAY_SIZE(max11607_mode_list),
846 .default_mode = s0to3,
847 .dev_attrs = &max1363_dev_attr_group,
848 .scan_attrs = &max1363_scan_el_group,
849 }, {
850 .name = "max11613",
851 .num_inputs = 4,
852 .bits = 12,
853 .int_vref_mv = 2048,
854 .mode_list = max11607_mode_list,
855 .num_modes = ARRAY_SIZE(max11607_mode_list),
856 .default_mode = s0to3,
857 .dev_attrs = &max1363_dev_attr_group,
858 .scan_attrs = &max1363_scan_el_group,
859 }, {
860 .name = "max11614",
861 .num_inputs = 8,
862 .bits = 12,
863 .int_vref_mv = 4096,
864 .mode_list = max11608_mode_list,
865 .num_modes = ARRAY_SIZE(max11608_mode_list),
866 .default_mode = s0to7,
867 .dev_attrs = &max11608_dev_attr_group,
868 .scan_attrs = &max11608_scan_el_group,
869 }, {
870 .name = "max11615",
871 .num_inputs = 8,
872 .bits = 12,
873 .int_vref_mv = 2048,
874 .mode_list = max11608_mode_list,
875 .num_modes = ARRAY_SIZE(max11608_mode_list),
876 .default_mode = s0to7,
877 .dev_attrs = &max11608_dev_attr_group,
878 .scan_attrs = &max11608_scan_el_group,
879 }, {
880 .name = "max11616",
881 .num_inputs = 12,
882 .bits = 12,
883 .int_vref_mv = 4098,
884 .mode_list = max1238_mode_list,
885 .num_modes = ARRAY_SIZE(max1238_mode_list),
886 .default_mode = s0to11,
887 .dev_attrs = &max1238_dev_attr_group,
888 .scan_attrs = &max1238_scan_el_group,
889 }, {
890 .name = "max11617",
891 .num_inputs = 12,
892 .bits = 12,
893 .int_vref_mv = 2048,
894 .mode_list = max1238_mode_list,
895 .num_modes = ARRAY_SIZE(max1238_mode_list),
896 .default_mode = s0to11,
897 .dev_attrs = &max1238_dev_attr_group,
898 .scan_attrs = &max1238_scan_el_group,
899 }
275}; 900};
276 901
277static int max1363_write_basic_config(struct i2c_client *client,
278 unsigned char d1,
279 unsigned char d2)
280{
281 int ret;
282 u8 *tx_buf = kmalloc(2 , GFP_KERNEL);
283 if (!tx_buf)
284 return -ENOMEM;
285 tx_buf[0] = d1;
286 tx_buf[1] = d2;
287
288 ret = i2c_master_send(client, tx_buf, 2);
289 kfree(tx_buf);
290 return (ret > 0) ? 0 : ret;
291}
292
293static int max1363_set_scan_mode(struct max1363_state *st)
294{
295 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
296 | MAX1363_SCAN_MASK
297 | MAX1363_SE_DE_MASK);
298 st->configbyte |= st->current_mode->conf;
299
300 return max1363_write_basic_config(st->client,
301 st->setupbyte,
302 st->configbyte);
303}
304
305static int max1363_initial_setup(struct max1363_state *st) 902static int max1363_initial_setup(struct max1363_state *st)
306{ 903{
307 st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 904 st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD
@@ -318,167 +915,6 @@ static int max1363_initial_setup(struct max1363_state *st)
318 return max1363_set_scan_mode(st); 915 return max1363_set_scan_mode(st);
319} 916}
320 917
321static ssize_t max1363_show_av_scan_modes(struct device *dev,
322 struct device_attribute *attr,
323 char *buf)
324{
325 struct iio_dev *dev_info = dev_get_drvdata(dev);
326 struct max1363_state *st = dev_info->dev_data;
327 int i, len = 0;
328
329 for (i = 0; i < st->chip_info->num_modes; i++)
330 len += sprintf(buf + len, "%s ",
331 max1363_mode_table[st->chip_info
332 ->mode_list[i]].name);
333 len += sprintf(buf + len, "\n");
334
335 return len;
336}
337
338
339/* The dev here is the sysfs related one, not the underlying i2c one */
340static ssize_t max1363_scan_direct(struct device *dev,
341 struct device_attribute *attr,
342 char *buf)
343{
344 struct iio_dev *dev_info = dev_get_drvdata(dev);
345 struct max1363_state *st = dev_info->dev_data;
346 int len = 0, ret, i;
347 struct i2c_client *client = st->client;
348 char *rxbuf;
349
350 if (st->current_mode->numvals == 0)
351 return 0;
352 rxbuf = kmalloc(st->current_mode->numvals*2, GFP_KERNEL);
353 if (rxbuf == NULL)
354 return -ENOMEM;
355
356 /* Interpretation depends on whether these are signed or not!*/
357 /* Assume not for now */
358 ret = i2c_master_recv(client, rxbuf, st->current_mode->numvals*2);
359
360 if (ret < 0)
361 return ret;
362 for (i = 0; i < st->current_mode->numvals; i++)
363 len += sprintf(buf+len, "%d ",
364 ((int)(rxbuf[i*2+0]&0x0F) << 8)
365 + ((int)(rxbuf[i*2+1])));
366 kfree(rxbuf);
367 len += sprintf(buf + len, "\n");
368
369 return len;
370}
371
372static ssize_t max1363_scan(struct device *dev,
373 struct device_attribute *attr,
374 char *buf)
375{
376 struct iio_dev *dev_info = dev_get_drvdata(dev);
377 int ret;
378
379 mutex_lock(&dev_info->mlock);
380 if (dev_info->currentmode == INDIO_RING_TRIGGERED)
381 ret = max1363_scan_from_ring(dev, attr, buf);
382 else
383 ret = max1363_scan_direct(dev, attr, buf);
384 mutex_unlock(&dev_info->mlock);
385
386 return ret;
387}
388
389/* Cannot query the device, so use local copy of state */
390static ssize_t max1363_show_scan_mode(struct device *dev,
391 struct device_attribute *attr,
392 char *buf)
393{
394 struct iio_dev *dev_info = dev_get_drvdata(dev);
395 struct max1363_state *st = dev_info->dev_data;
396
397 return sprintf(buf, "%s\n", st->current_mode->name);
398}
399
400static const struct max1363_mode
401*__max1363_find_mode_in_ci(const struct max1363_chip_info *info,
402 const char *buf)
403{
404 int i;
405 for (i = 0; i < info->num_modes; i++)
406 if (strcmp(max1363_mode_table[info->mode_list[i]].name, buf)
407 == 0)
408 return &max1363_mode_table[info->mode_list[i]];
409 return NULL;
410}
411
412static ssize_t max1363_store_scan_mode(struct device *dev,
413 struct device_attribute *attr,
414 const char *buf,
415 size_t len)
416{
417 struct iio_dev *dev_info = dev_get_drvdata(dev);
418 struct max1363_state *st = dev_info->dev_data;
419 const struct max1363_mode *new_mode;
420 int ret;
421
422 mutex_lock(&dev_info->mlock);
423 new_mode = NULL;
424 /* Avoid state changes if a ring buffer is enabled */
425 if (!iio_ring_enabled(dev_info)) {
426 new_mode
427 = __max1363_find_mode_in_ci(st->chip_info, buf);
428 if (!new_mode) {
429 ret = -EINVAL;
430 goto error_ret;
431 }
432 st->current_mode = new_mode;
433 ret = max1363_set_scan_mode(st);
434 if (ret)
435 goto error_ret;
436 } else {
437 ret = -EBUSY;
438 goto error_ret;
439 }
440 mutex_unlock(&dev_info->mlock);
441
442 return len;
443
444error_ret:
445 mutex_unlock(&dev_info->mlock);
446
447 return ret;
448}
449
450IIO_DEV_ATTR_AVAIL_SCAN_MODES(max1363_show_av_scan_modes);
451IIO_DEV_ATTR_SCAN_MODE(S_IRUGO | S_IWUSR,
452 max1363_show_scan_mode,
453 max1363_store_scan_mode);
454
455IIO_DEV_ATTR_SCAN(max1363_scan);
456
457static ssize_t max1363_show_name(struct device *dev,
458 struct device_attribute *attr,
459 char *buf)
460{
461 struct iio_dev *dev_info = dev_get_drvdata(dev);
462 struct max1363_state *st = dev_info->dev_data;
463 return sprintf(buf, "%s\n", st->chip_info->name);
464}
465
466IIO_DEVICE_ATTR(name, S_IRUGO, max1363_show_name, NULL, 0);
467
468/*name export */
469
470static struct attribute *max1363_attributes[] = {
471 &iio_dev_attr_available_scan_modes.dev_attr.attr,
472 &iio_dev_attr_scan_mode.dev_attr.attr,
473 &iio_dev_attr_scan.dev_attr.attr,
474 &iio_dev_attr_name.dev_attr.attr,
475 NULL,
476};
477
478static const struct attribute_group max1363_attribute_group = {
479 .attrs = max1363_attributes,
480};
481
482static int __devinit max1363_probe(struct i2c_client *client, 918static int __devinit max1363_probe(struct i2c_client *client,
483 const struct i2c_device_id *id) 919 const struct i2c_device_id *id)
484{ 920{
@@ -506,6 +942,7 @@ static int __devinit max1363_probe(struct i2c_client *client,
506 ret = -ENODEV; 942 ret = -ENODEV;
507 goto error_free_st; 943 goto error_free_st;
508 } 944 }
945
509 st->reg = regulator_get(&client->dev, "vcc"); 946 st->reg = regulator_get(&client->dev, "vcc");
510 if (!IS_ERR(st->reg)) { 947 if (!IS_ERR(st->reg)) {
511 ret = regulator_enable(st->reg); 948 ret = regulator_enable(st->reg);
@@ -520,20 +957,35 @@ static int __devinit max1363_probe(struct i2c_client *client,
520 goto error_disable_reg; 957 goto error_disable_reg;
521 } 958 }
522 959
960 st->indio_dev->available_scan_masks
961 = kzalloc(sizeof(*st->indio_dev->available_scan_masks)*
962 (st->chip_info->num_modes + 1), GFP_KERNEL);
963 if (!st->indio_dev->available_scan_masks) {
964 ret = -ENOMEM;
965 goto error_free_device;
966 }
967
968 for (i = 0; i < st->chip_info->num_modes; i++)
969 st->indio_dev->available_scan_masks[i] =
970 max1363_mode_table[st->chip_info->mode_list[i]]
971 .modemask;
523 /* Estabilish that the iio_dev is a child of the i2c device */ 972 /* Estabilish that the iio_dev is a child of the i2c device */
524 st->indio_dev->dev.parent = &client->dev; 973 st->indio_dev->dev.parent = &client->dev;
525 st->indio_dev->attrs = &max1363_attribute_group; 974 st->indio_dev->attrs = st->chip_info->dev_attrs;
975
976 /* Todo: this shouldn't be here. */
977 st->indio_dev->scan_el_attrs = st->chip_info->scan_attrs;
526 st->indio_dev->dev_data = (void *)(st); 978 st->indio_dev->dev_data = (void *)(st);
527 st->indio_dev->driver_module = THIS_MODULE; 979 st->indio_dev->driver_module = THIS_MODULE;
528 st->indio_dev->modes = INDIO_DIRECT_MODE; 980 st->indio_dev->modes = INDIO_DIRECT_MODE;
529 981
530 ret = max1363_initial_setup(st); 982 ret = max1363_initial_setup(st);
531 if (ret) 983 if (ret)
532 goto error_free_device; 984 goto error_free_available_scan_masks;
533 985
534 ret = max1363_register_ring_funcs_and_init(st->indio_dev); 986 ret = max1363_register_ring_funcs_and_init(st->indio_dev);
535 if (ret) 987 if (ret)
536 goto error_free_device; 988 goto error_free_available_scan_masks;
537 989
538 ret = iio_device_register(st->indio_dev); 990 ret = iio_device_register(st->indio_dev);
539 if (ret) 991 if (ret)
@@ -545,6 +997,8 @@ static int __devinit max1363_probe(struct i2c_client *client,
545 return 0; 997 return 0;
546error_cleanup_ring: 998error_cleanup_ring:
547 max1363_ring_cleanup(st->indio_dev); 999 max1363_ring_cleanup(st->indio_dev);
1000error_free_available_scan_masks:
1001 kfree(st->indio_dev->available_scan_masks);
548error_free_device: 1002error_free_device:
549 if (!regdone) 1003 if (!regdone)
550 iio_free_device(st->indio_dev); 1004 iio_free_device(st->indio_dev);
@@ -570,6 +1024,7 @@ static int max1363_remove(struct i2c_client *client)
570 struct iio_dev *indio_dev = st->indio_dev; 1024 struct iio_dev *indio_dev = st->indio_dev;
571 max1363_uninitialize_ring(indio_dev->ring); 1025 max1363_uninitialize_ring(indio_dev->ring);
572 max1363_ring_cleanup(indio_dev); 1026 max1363_ring_cleanup(indio_dev);
1027 kfree(st->indio_dev->available_scan_masks);
573 iio_device_unregister(indio_dev); 1028 iio_device_unregister(indio_dev);
574 if (!IS_ERR(st->reg)) { 1029 if (!IS_ERR(st->reg)) {
575 regulator_disable(st->reg); 1030 regulator_disable(st->reg);
@@ -586,6 +1041,10 @@ static const struct i2c_device_id max1363_id[] = {
586 { "max1362", max1362 }, 1041 { "max1362", max1362 },
587 { "max1363", max1363 }, 1042 { "max1363", max1363 },
588 { "max1364", max1364 }, 1043 { "max1364", max1364 },
1044 { "max1036", max1036 },
1045 { "max1037", max1037 },
1046 { "max1038", max1038 },
1047 { "max1039", max1039 },
589 { "max1136", max1136 }, 1048 { "max1136", max1136 },
590 { "max1137", max1137 }, 1049 { "max1137", max1137 },
591 { "max1138", max1138 }, 1050 { "max1138", max1138 },
@@ -594,6 +1053,24 @@ static const struct i2c_device_id max1363_id[] = {
594 { "max1237", max1237 }, 1053 { "max1237", max1237 },
595 { "max1238", max1238 }, 1054 { "max1238", max1238 },
596 { "max1239", max1239 }, 1055 { "max1239", max1239 },
1056 { "max11600", max11600 },
1057 { "max11601", max11601 },
1058 { "max11602", max11602 },
1059 { "max11603", max11603 },
1060 { "max11604", max11604 },
1061 { "max11605", max11605 },
1062 { "max11606", max11606 },
1063 { "max11607", max11607 },
1064 { "max11608", max11608 },
1065 { "max11609", max11609 },
1066 { "max11610", max11610 },
1067 { "max11611", max11611 },
1068 { "max11612", max11612 },
1069 { "max11613", max11613 },
1070 { "max11614", max11614 },
1071 { "max11615", max11615 },
1072 { "max11616", max11616 },
1073 { "max11617", max11617 },
597 {} 1074 {}
598}; 1075};
599 1076
diff --git a/drivers/staging/iio/adc/max1363_ring.c b/drivers/staging/iio/adc/max1363_ring.c
index f94fe2d38a97..56688dc9c92f 100644
--- a/drivers/staging/iio/adc/max1363_ring.c
+++ b/drivers/staging/iio/adc/max1363_ring.c
@@ -17,6 +17,7 @@
17#include <linux/sysfs.h> 17#include <linux/sysfs.h>
18#include <linux/list.h> 18#include <linux/list.h>
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/bitops.h>
20 21
21#include "../iio.h" 22#include "../iio.h"
22#include "../ring_generic.h" 23#include "../ring_generic.h"
@@ -26,32 +27,39 @@
26 27
27#include "max1363.h" 28#include "max1363.h"
28 29
29ssize_t max1363_scan_from_ring(struct device *dev, 30/* Todo: test this */
30 struct device_attribute *attr, 31int max1363_single_channel_from_ring(long mask, struct max1363_state *st)
31 char *buf)
32{ 32{
33 struct iio_dev *dev_info = dev_get_drvdata(dev); 33 unsigned long numvals;
34 struct max1363_state *info = dev_info->dev_data; 34 int count = 0, ret;
35 int i, ret, len = 0; 35 u8 *ring_data;
36 char *ring_data; 36 if (!(st->current_mode->modemask & mask)) {
37 ret = -EBUSY;
38 goto error_ret;
39 }
40 numvals = hweight_long(st->current_mode->modemask);
37 41
38 ring_data = kmalloc(info->current_mode->numvals*2, GFP_KERNEL); 42 ring_data = kmalloc(numvals*2, GFP_KERNEL);
39 if (ring_data == NULL) { 43 if (ring_data == NULL) {
40 ret = -ENOMEM; 44 ret = -ENOMEM;
41 goto error_ret; 45 goto error_ret;
42 } 46 }
43 ret = dev_info->ring->access.read_last(dev_info->ring, ring_data); 47 ret = st->indio_dev->ring->access.read_last(st->indio_dev->ring,
48 ring_data);
44 if (ret) 49 if (ret)
45 goto error_free_ring_data; 50 goto error_free_ring_data;
46 len += sprintf(buf+len, "ring "); 51 /* Need a count of channels prior to this one */
47 for (i = 0; i < info->current_mode->numvals; i++) 52 mask >>= 1;
48 len += sprintf(buf + len, "%d ", 53 while (mask) {
49 ((int)(ring_data[i*2 + 0] & 0x0F) << 8) 54 if (mask & st->current_mode->modemask)
50 + ((int)(ring_data[i*2 + 1]))); 55 count++;
51 len += sprintf(buf + len, "\n"); 56 mask >>= 1;
52 kfree(ring_data); 57 }
53 58 if (st->chip_info->bits != 8)
54 return len; 59 ret = ((int)(ring_data[count*2 + 0] & 0x0F) << 8)
60 + (int)(ring_data[count*2 + 1]);
61 else
62 ret = ring_data[count];
55 63
56error_free_ring_data: 64error_free_ring_data:
57 kfree(ring_data); 65 kfree(ring_data);
@@ -70,9 +78,25 @@ static int max1363_ring_preenable(struct iio_dev *indio_dev)
70{ 78{
71 struct max1363_state *st = indio_dev->dev_data; 79 struct max1363_state *st = indio_dev->dev_data;
72 size_t d_size; 80 size_t d_size;
81 unsigned long numvals;
73 82
83 /*
84 * Need to figure out the current mode based upon the requested
85 * scan mask in iio_dev
86 */
87 st->current_mode = max1363_match_mode(st->indio_dev->scan_mask,
88 st->chip_info);
89 if (!st->current_mode)
90 return -EINVAL;
91
92 max1363_set_scan_mode(st);
93
94 numvals = hweight_long(st->current_mode->modemask);
74 if (indio_dev->ring->access.set_bpd) { 95 if (indio_dev->ring->access.set_bpd) {
75 d_size = st->current_mode->numvals*2 + sizeof(s64); 96 if (st->chip_info->bits != 8)
97 d_size = numvals*2 + sizeof(s64);
98 else
99 d_size = numvals + sizeof(s64);
76 if (d_size % 8) 100 if (d_size % 8)
77 d_size += 8 - (d_size % 8); 101 d_size += 8 - (d_size % 8);
78 indio_dev->ring->access.set_bpd(indio_dev->ring, d_size); 102 indio_dev->ring->access.set_bpd(indio_dev->ring, d_size);
@@ -118,7 +142,7 @@ static int max1363_ring_predisable(struct iio_dev *indio_dev)
118 * then. Some triggers will generate their own time stamp. Currently 142 * then. Some triggers will generate their own time stamp. Currently
119 * there is no way of notifying them when no one cares. 143 * there is no way of notifying them when no one cares.
120 **/ 144 **/
121void max1363_poll_func_th(struct iio_dev *indio_dev) 145static void max1363_poll_func_th(struct iio_dev *indio_dev)
122{ 146{
123 struct max1363_state *st = indio_dev->dev_data; 147 struct max1363_state *st = indio_dev->dev_data;
124 148
@@ -145,9 +169,13 @@ static void max1363_poll_bh_to_ring(struct work_struct *work_s)
145 __u8 *rxbuf; 169 __u8 *rxbuf;
146 int b_sent; 170 int b_sent;
147 size_t d_size; 171 size_t d_size;
172 unsigned long numvals = hweight_long(st->current_mode->modemask);
148 173
149 /* Ensure the timestamp is 8 byte aligned */ 174 /* Ensure the timestamp is 8 byte aligned */
150 d_size = st->current_mode->numvals*2 + sizeof(s64); 175 if (st->chip_info->bits != 8)
176 d_size = numvals*2 + sizeof(s64);
177 else
178 d_size = numvals + sizeof(s64);
151 if (d_size % sizeof(s64)) 179 if (d_size % sizeof(s64))
152 d_size += sizeof(s64) - (d_size % sizeof(s64)); 180 d_size += sizeof(s64) - (d_size % sizeof(s64));
153 181
@@ -159,16 +187,16 @@ static void max1363_poll_bh_to_ring(struct work_struct *work_s)
159 * might as well have this test in here in the meantime as it does 187 * might as well have this test in here in the meantime as it does
160 * no harm. 188 * no harm.
161 */ 189 */
162 if (st->current_mode->numvals == 0) 190 if (numvals == 0)
163 return; 191 return;
164 192
165 rxbuf = kmalloc(d_size, GFP_KERNEL); 193 rxbuf = kmalloc(d_size, GFP_KERNEL);
166 if (rxbuf == NULL) 194 if (rxbuf == NULL)
167 return; 195 return;
168 196 if (st->chip_info->bits != 8)
169 b_sent = i2c_master_recv(st->client, 197 b_sent = i2c_master_recv(st->client, rxbuf, numvals*2);
170 rxbuf, 198 else
171 st->current_mode->numvals*2); 199 b_sent = i2c_master_recv(st->client, rxbuf, numvals);
172 if (b_sent < 0) 200 if (b_sent < 0)
173 goto done; 201 goto done;
174 202
@@ -238,5 +266,5 @@ void max1363_uninitialize_ring(struct iio_ring_buffer *ring)
238 266
239int max1363_initialize_ring(struct iio_ring_buffer *ring) 267int max1363_initialize_ring(struct iio_ring_buffer *ring)
240{ 268{
241 return iio_ring_buffer_register(ring); 269 return iio_ring_buffer_register(ring, 0);
242}; 270};
diff --git a/drivers/staging/iio/chrdev.h b/drivers/staging/iio/chrdev.h
index f42bafb3a894..3f96f8696a41 100644
--- a/drivers/staging/iio/chrdev.h
+++ b/drivers/staging/iio/chrdev.h
@@ -94,7 +94,7 @@ struct iio_event_interface {
94 struct iio_chrdev_minor_attr attr; 94 struct iio_chrdev_minor_attr attr;
95 struct module *owner; 95 struct module *owner;
96 void *private; 96 void *private;
97 char _name[20]; 97 char _name[35];
98 char _attrname[20]; 98 char _attrname[20];
99}; 99};
100 100
diff --git a/drivers/staging/iio/gyro/Kconfig b/drivers/staging/iio/gyro/Kconfig
new file mode 100644
index 000000000000..c4043610c0df
--- /dev/null
+++ b/drivers/staging/iio/gyro/Kconfig
@@ -0,0 +1,13 @@
1#
2# IIO Digital Gyroscope Sensor drivers configuration
3#
4comment "Digital gyroscope sensors"
5
6config ADIS16260
7 tristate "Analog Devices ADIS16260/5 Digital Gyroscope Sensor SPI driver"
8 depends on SPI
9 select IIO_TRIGGER if IIO_RING_BUFFER
10 select IIO_SW_RING if IIO_RING_BUFFER
11 help
12 Say yes here to build support for Analog Devices adis16260/5
13 programmable digital gyroscope sensor.
diff --git a/drivers/staging/iio/gyro/Makefile b/drivers/staging/iio/gyro/Makefile
new file mode 100644
index 000000000000..6d2c547686cb
--- /dev/null
+++ b/drivers/staging/iio/gyro/Makefile
@@ -0,0 +1,7 @@
1
2# Makefile for digital gyroscope sensor drivers
3#
4
5adis16260-y := adis16260_core.o
6adis16260-$(CONFIG_IIO_RING_BUFFER) += adis16260_ring.o adis16260_trigger.o
7obj-$(CONFIG_ADIS16260) += adis16260.o
diff --git a/drivers/staging/iio/gyro/adis16260.h b/drivers/staging/iio/gyro/adis16260.h
new file mode 100644
index 000000000000..f19efb4c91ce
--- /dev/null
+++ b/drivers/staging/iio/gyro/adis16260.h
@@ -0,0 +1,175 @@
1#ifndef SPI_ADIS16260_H_
2#define SPI_ADIS16260_H_
3
4#define ADIS16260_STARTUP_DELAY 220 /* ms */
5
6#define ADIS16260_READ_REG(a) a
7#define ADIS16260_WRITE_REG(a) ((a) | 0x80)
8
9#define ADIS16260_FLASH_CNT 0x00 /* Flash memory write count */
10#define ADIS16260_SUPPLY_OUT 0x02 /* Power supply measurement */
11#define ADIS16260_GYRO_OUT 0x04 /* X-axis gyroscope output */
12#define ADIS16260_AUX_ADC 0x0A /* analog input channel measurement */
13#define ADIS16260_TEMP_OUT 0x0C /* internal temperature measurement */
14#define ADIS16260_ANGL_OUT 0x0E /* angle displacement */
15#define ADIS16260_GYRO_OFF 0x14 /* Calibration, offset/bias adjustment */
16#define ADIS16260_GYRO_SCALE 0x16 /* Calibration, scale adjustment */
17#define ADIS16260_ALM_MAG1 0x20 /* Alarm 1 magnitude/polarity setting */
18#define ADIS16260_ALM_MAG2 0x22 /* Alarm 2 magnitude/polarity setting */
19#define ADIS16260_ALM_SMPL1 0x24 /* Alarm 1 dynamic rate of change setting */
20#define ADIS16260_ALM_SMPL2 0x26 /* Alarm 2 dynamic rate of change setting */
21#define ADIS16260_ALM_CTRL 0x28 /* Alarm control */
22#define ADIS16260_AUX_DAC 0x30 /* Auxiliary DAC data */
23#define ADIS16260_GPIO_CTRL 0x32 /* Control, digital I/O line */
24#define ADIS16260_MSC_CTRL 0x34 /* Control, data ready, self-test settings */
25#define ADIS16260_SMPL_PRD 0x36 /* Control, internal sample rate */
26#define ADIS16260_SENS_AVG 0x38 /* Control, dynamic range, filtering */
27#define ADIS16260_SLP_CNT 0x3A /* Control, sleep mode initiation */
28#define ADIS16260_DIAG_STAT 0x3C /* Diagnostic, error flags */
29#define ADIS16260_GLOB_CMD 0x3E /* Control, global commands */
30#define ADIS16260_LOT_ID1 0x52 /* Lot Identification Code 1 */
31#define ADIS16260_LOT_ID2 0x54 /* Lot Identification Code 2 */
32#define ADIS16260_PROD_ID 0x56 /* Product identifier;
33 * convert to decimal = 16,265/16,260 */
34#define ADIS16260_SERIAL_NUM 0x58 /* Serial number */
35
36#define ADIS16260_OUTPUTS 5
37
38#define ADIS16260_ERROR_ACTIVE (1<<14)
39#define ADIS16260_NEW_DATA (1<<15)
40
41/* MSC_CTRL */
42#define ADIS16260_MSC_CTRL_MEM_TEST (1<<11)
43/* Internal self-test enable */
44#define ADIS16260_MSC_CTRL_INT_SELF_TEST (1<<10)
45#define ADIS16260_MSC_CTRL_NEG_SELF_TEST (1<<9)
46#define ADIS16260_MSC_CTRL_POS_SELF_TEST (1<<8)
47#define ADIS16260_MSC_CTRL_DATA_RDY_EN (1<<2)
48#define ADIS16260_MSC_CTRL_DATA_RDY_POL_HIGH (1<<1)
49#define ADIS16260_MSC_CTRL_DATA_RDY_DIO2 (1<<0)
50
51/* SMPL_PRD */
52/* Time base (tB): 0 = 1.953 ms, 1 = 60.54 ms */
53#define ADIS16260_SMPL_PRD_TIME_BASE (1<<7)
54#define ADIS16260_SMPL_PRD_DIV_MASK 0x7F
55
56/* SLP_CNT */
57#define ADIS16260_SLP_CNT_POWER_OFF 0x80
58
59/* DIAG_STAT */
60#define ADIS16260_DIAG_STAT_ALARM2 (1<<9)
61#define ADIS16260_DIAG_STAT_ALARM1 (1<<8)
62#define ADIS16260_DIAG_STAT_FLASH_CHK (1<<6)
63#define ADIS16260_DIAG_STAT_SELF_TEST (1<<5)
64#define ADIS16260_DIAG_STAT_OVERFLOW (1<<4)
65#define ADIS16260_DIAG_STAT_SPI_FAIL (1<<3)
66#define ADIS16260_DIAG_STAT_FLASH_UPT (1<<2)
67#define ADIS16260_DIAG_STAT_POWER_HIGH (1<<1)
68#define ADIS16260_DIAG_STAT_POWER_LOW (1<<0)
69
70/* GLOB_CMD */
71#define ADIS16260_GLOB_CMD_SW_RESET (1<<7)
72#define ADIS16260_GLOB_CMD_FLASH_UPD (1<<3)
73#define ADIS16260_GLOB_CMD_DAC_LATCH (1<<2)
74#define ADIS16260_GLOB_CMD_FAC_CALIB (1<<1)
75#define ADIS16260_GLOB_CMD_AUTO_NULL (1<<0)
76
77#define ADIS16260_MAX_TX 24
78#define ADIS16260_MAX_RX 24
79
80#define ADIS16260_SPI_SLOW (u32)(300 * 1000)
81#define ADIS16260_SPI_BURST (u32)(1000 * 1000)
82#define ADIS16260_SPI_FAST (u32)(2000 * 1000)
83
84/**
85 * struct adis16260_state - device instance specific data
86 * @us: actual spi_device
87 * @work_trigger_to_ring: bh for triggered event handling
88 * @work_cont_thresh: CLEAN
89 * @inter: used to check if new interrupt has been triggered
90 * @last_timestamp: passing timestamp from th to bh of interrupt handler
91 * @indio_dev: industrial I/O device structure
92 * @trig: data ready trigger registered with iio
93 * @tx: transmit buffer
94 * @rx: recieve buffer
95 * @buf_lock: mutex to protect tx and rx
96 **/
97struct adis16260_state {
98 struct spi_device *us;
99 struct work_struct work_trigger_to_ring;
100 struct iio_work_cont work_cont_thresh;
101 s64 last_timestamp;
102 struct iio_dev *indio_dev;
103 struct iio_trigger *trig;
104 u8 *tx;
105 u8 *rx;
106 struct mutex buf_lock;
107};
108
109int adis16260_set_irq(struct device *dev, bool enable);
110
111#ifdef CONFIG_IIO_RING_BUFFER
112/* At the moment triggers are only used for ring buffer
113 * filling. This may change!
114 */
115
116enum adis16260_scan {
117 ADIS16260_SCAN_SUPPLY,
118 ADIS16260_SCAN_GYRO,
119 ADIS16260_SCAN_AUX_ADC,
120 ADIS16260_SCAN_TEMP,
121 ADIS16260_SCAN_ANGL,
122};
123
124void adis16260_remove_trigger(struct iio_dev *indio_dev);
125int adis16260_probe_trigger(struct iio_dev *indio_dev);
126
127ssize_t adis16260_read_data_from_ring(struct device *dev,
128 struct device_attribute *attr,
129 char *buf);
130
131
132int adis16260_configure_ring(struct iio_dev *indio_dev);
133void adis16260_unconfigure_ring(struct iio_dev *indio_dev);
134
135int adis16260_initialize_ring(struct iio_ring_buffer *ring);
136void adis16260_uninitialize_ring(struct iio_ring_buffer *ring);
137#else /* CONFIG_IIO_RING_BUFFER */
138
139static inline void adis16260_remove_trigger(struct iio_dev *indio_dev)
140{
141}
142
143static inline int adis16260_probe_trigger(struct iio_dev *indio_dev)
144{
145 return 0;
146}
147
148static inline ssize_t
149adis16260_read_data_from_ring(struct device *dev,
150 struct device_attribute *attr,
151 char *buf)
152{
153 return 0;
154}
155
156static int adis16260_configure_ring(struct iio_dev *indio_dev)
157{
158 return 0;
159}
160
161static inline void adis16260_unconfigure_ring(struct iio_dev *indio_dev)
162{
163}
164
165static inline int adis16260_initialize_ring(struct iio_ring_buffer *ring)
166{
167 return 0;
168}
169
170static inline void adis16260_uninitialize_ring(struct iio_ring_buffer *ring)
171{
172}
173
174#endif /* CONFIG_IIO_RING_BUFFER */
175#endif /* SPI_ADIS16260_H_ */
diff --git a/drivers/staging/iio/gyro/adis16260_core.c b/drivers/staging/iio/gyro/adis16260_core.c
new file mode 100644
index 000000000000..c93f4d580fce
--- /dev/null
+++ b/drivers/staging/iio/gyro/adis16260_core.c
@@ -0,0 +1,661 @@
1/*
2 * ADIS16260 Programmable Digital Gyroscope Sensor Driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/gpio.h>
12#include <linux/delay.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/spi/spi.h>
17
18#include <linux/sysfs.h>
19#include <linux/list.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "../adc/adc.h"
24#include "gyro.h"
25
26#include "adis16260.h"
27
28#define DRIVER_NAME "adis16260"
29
30static int adis16260_check_status(struct device *dev);
31
32/**
33 * adis16260_spi_write_reg_8() - write single byte to a register
34 * @dev: device associated with child of actual device (iio_dev or iio_trig)
35 * @reg_address: the address of the register to be written
36 * @val: the value to write
37 **/
38static int adis16260_spi_write_reg_8(struct device *dev,
39 u8 reg_address,
40 u8 val)
41{
42 int ret;
43 struct iio_dev *indio_dev = dev_get_drvdata(dev);
44 struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
45
46 mutex_lock(&st->buf_lock);
47 st->tx[0] = ADIS16260_WRITE_REG(reg_address);
48 st->tx[1] = val;
49
50 ret = spi_write(st->us, st->tx, 2);
51 mutex_unlock(&st->buf_lock);
52
53 return ret;
54}
55
56/**
57 * adis16260_spi_write_reg_16() - write 2 bytes to a pair of registers
58 * @dev: device associated with child of actual device (iio_dev or iio_trig)
59 * @reg_address: the address of the lower of the two registers. Second register
60 * is assumed to have address one greater.
61 * @val: value to be written
62 **/
63static int adis16260_spi_write_reg_16(struct device *dev,
64 u8 lower_reg_address,
65 u16 value)
66{
67 int ret;
68 struct spi_message msg;
69 struct iio_dev *indio_dev = dev_get_drvdata(dev);
70 struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
71 struct spi_transfer xfers[] = {
72 {
73 .tx_buf = st->tx,
74 .bits_per_word = 8,
75 .len = 2,
76 .cs_change = 1,
77 .delay_usecs = 20,
78 }, {
79 .tx_buf = st->tx + 2,
80 .bits_per_word = 8,
81 .len = 2,
82 .cs_change = 1,
83 .delay_usecs = 20,
84 },
85 };
86
87 mutex_lock(&st->buf_lock);
88 st->tx[0] = ADIS16260_WRITE_REG(lower_reg_address);
89 st->tx[1] = value & 0xFF;
90 st->tx[2] = ADIS16260_WRITE_REG(lower_reg_address + 1);
91 st->tx[3] = (value >> 8) & 0xFF;
92
93 spi_message_init(&msg);
94 spi_message_add_tail(&xfers[0], &msg);
95 spi_message_add_tail(&xfers[1], &msg);
96 ret = spi_sync(st->us, &msg);
97 mutex_unlock(&st->buf_lock);
98
99 return ret;
100}
101
102/**
103 * adis16260_spi_read_reg_16() - read 2 bytes from a 16-bit register
104 * @dev: device associated with child of actual device (iio_dev or iio_trig)
105 * @reg_address: the address of the lower of the two registers. Second register
106 * is assumed to have address one greater.
107 * @val: somewhere to pass back the value read
108 **/
109static int adis16260_spi_read_reg_16(struct device *dev,
110 u8 lower_reg_address,
111 u16 *val)
112{
113 struct spi_message msg;
114 struct iio_dev *indio_dev = dev_get_drvdata(dev);
115 struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
116 int ret;
117 struct spi_transfer xfers[] = {
118 {
119 .tx_buf = st->tx,
120 .bits_per_word = 8,
121 .len = 2,
122 .cs_change = 1,
123 .delay_usecs = 30,
124 }, {
125 .rx_buf = st->rx,
126 .bits_per_word = 8,
127 .len = 2,
128 .cs_change = 1,
129 .delay_usecs = 30,
130 },
131 };
132
133 mutex_lock(&st->buf_lock);
134 st->tx[0] = ADIS16260_READ_REG(lower_reg_address);
135 st->tx[1] = 0;
136 st->tx[2] = 0;
137 st->tx[3] = 0;
138
139 spi_message_init(&msg);
140 spi_message_add_tail(&xfers[0], &msg);
141 spi_message_add_tail(&xfers[1], &msg);
142 ret = spi_sync(st->us, &msg);
143 if (ret) {
144 dev_err(&st->us->dev,
145 "problem when reading 16 bit register 0x%02X",
146 lower_reg_address);
147 goto error_ret;
148 }
149 *val = (st->rx[0] << 8) | st->rx[1];
150
151error_ret:
152 mutex_unlock(&st->buf_lock);
153 return ret;
154}
155
156static ssize_t adis16260_spi_read_signed(struct device *dev,
157 struct device_attribute *attr,
158 char *buf,
159 unsigned bits)
160{
161 int ret;
162 s16 val = 0;
163 unsigned shift = 16 - bits;
164 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
165
166 ret = adis16260_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
167 if (ret)
168 return ret;
169
170 if (val & ADIS16260_ERROR_ACTIVE)
171 adis16260_check_status(dev);
172 val = ((s16)(val << shift) >> shift);
173 return sprintf(buf, "%d\n", val);
174}
175
176static ssize_t adis16260_read_12bit_unsigned(struct device *dev,
177 struct device_attribute *attr,
178 char *buf)
179{
180 int ret;
181 u16 val = 0;
182 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
183
184 ret = adis16260_spi_read_reg_16(dev, this_attr->address, &val);
185 if (ret)
186 return ret;
187
188 if (val & ADIS16260_ERROR_ACTIVE)
189 adis16260_check_status(dev);
190
191 return sprintf(buf, "%u\n", val & 0x0FFF);
192}
193
194static ssize_t adis16260_read_12bit_signed(struct device *dev,
195 struct device_attribute *attr,
196 char *buf)
197{
198 struct iio_dev *indio_dev = dev_get_drvdata(dev);
199 ssize_t ret;
200
201 /* Take the iio_dev status lock */
202 mutex_lock(&indio_dev->mlock);
203 ret = adis16260_spi_read_signed(dev, attr, buf, 12);
204 mutex_unlock(&indio_dev->mlock);
205
206 return ret;
207}
208
209static ssize_t adis16260_read_14bit_signed(struct device *dev,
210 struct device_attribute *attr,
211 char *buf)
212{
213 struct iio_dev *indio_dev = dev_get_drvdata(dev);
214 ssize_t ret;
215
216 /* Take the iio_dev status lock */
217 mutex_lock(&indio_dev->mlock);
218 ret = adis16260_spi_read_signed(dev, attr, buf, 14);
219 mutex_unlock(&indio_dev->mlock);
220
221 return ret;
222}
223
224static ssize_t adis16260_write_16bit(struct device *dev,
225 struct device_attribute *attr,
226 const char *buf,
227 size_t len)
228{
229 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
230 int ret;
231 long val;
232
233 ret = strict_strtol(buf, 10, &val);
234 if (ret)
235 goto error_ret;
236 ret = adis16260_spi_write_reg_16(dev, this_attr->address, val);
237
238error_ret:
239 return ret ? ret : len;
240}
241
242static ssize_t adis16260_read_frequency(struct device *dev,
243 struct device_attribute *attr,
244 char *buf)
245{
246 int ret, len = 0;
247 u16 t;
248 int sps;
249 ret = adis16260_spi_read_reg_16(dev,
250 ADIS16260_SMPL_PRD,
251 &t);
252 if (ret)
253 return ret;
254 sps = (t & ADIS16260_SMPL_PRD_TIME_BASE) ? 66 : 2048;
255 sps /= (t & ADIS16260_SMPL_PRD_DIV_MASK) + 1;
256 len = sprintf(buf, "%d SPS\n", sps);
257 return len;
258}
259
260static ssize_t adis16260_write_frequency(struct device *dev,
261 struct device_attribute *attr,
262 const char *buf,
263 size_t len)
264{
265 struct iio_dev *indio_dev = dev_get_drvdata(dev);
266 struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
267 long val;
268 int ret;
269 u8 t;
270
271 ret = strict_strtol(buf, 10, &val);
272 if (ret)
273 return ret;
274
275 mutex_lock(&indio_dev->mlock);
276
277 t = (2048 / val);
278 if (t > 0)
279 t--;
280 t &= ADIS16260_SMPL_PRD_DIV_MASK;
281 if ((t & ADIS16260_SMPL_PRD_DIV_MASK) >= 0x0A)
282 st->us->max_speed_hz = ADIS16260_SPI_SLOW;
283 else
284 st->us->max_speed_hz = ADIS16260_SPI_FAST;
285
286 ret = adis16260_spi_write_reg_8(dev,
287 ADIS16260_SMPL_PRD,
288 t);
289
290 mutex_unlock(&indio_dev->mlock);
291
292 return ret ? ret : len;
293}
294
295static int adis16260_reset(struct device *dev)
296{
297 int ret;
298 ret = adis16260_spi_write_reg_8(dev,
299 ADIS16260_GLOB_CMD,
300 ADIS16260_GLOB_CMD_SW_RESET);
301 if (ret)
302 dev_err(dev, "problem resetting device");
303
304 return ret;
305}
306
307static ssize_t adis16260_write_reset(struct device *dev,
308 struct device_attribute *attr,
309 const char *buf, size_t len)
310{
311 if (len < 1)
312 return -EINVAL;
313 switch (buf[0]) {
314 case '1':
315 case 'y':
316 case 'Y':
317 return adis16260_reset(dev);
318 }
319 return -EINVAL;
320}
321
322int adis16260_set_irq(struct device *dev, bool enable)
323{
324 int ret;
325 u16 msc;
326 ret = adis16260_spi_read_reg_16(dev, ADIS16260_MSC_CTRL, &msc);
327 if (ret)
328 goto error_ret;
329
330 msc |= ADIS16260_MSC_CTRL_DATA_RDY_POL_HIGH;
331 if (enable)
332 msc |= ADIS16260_MSC_CTRL_DATA_RDY_EN;
333 else
334 msc &= ~ADIS16260_MSC_CTRL_DATA_RDY_EN;
335
336 ret = adis16260_spi_write_reg_16(dev, ADIS16260_MSC_CTRL, msc);
337 if (ret)
338 goto error_ret;
339
340error_ret:
341 return ret;
342}
343
344/* Power down the device */
345static int adis16260_stop_device(struct device *dev)
346{
347 int ret;
348 u16 val = ADIS16260_SLP_CNT_POWER_OFF;
349
350 ret = adis16260_spi_write_reg_16(dev, ADIS16260_SLP_CNT, val);
351 if (ret)
352 dev_err(dev, "problem with turning device off: SLP_CNT");
353
354 return ret;
355}
356
357static int adis16260_self_test(struct device *dev)
358{
359 int ret;
360 ret = adis16260_spi_write_reg_16(dev,
361 ADIS16260_MSC_CTRL,
362 ADIS16260_MSC_CTRL_MEM_TEST);
363 if (ret) {
364 dev_err(dev, "problem starting self test");
365 goto err_ret;
366 }
367
368 adis16260_check_status(dev);
369
370err_ret:
371 return ret;
372}
373
374static int adis16260_check_status(struct device *dev)
375{
376 u16 status;
377 int ret;
378
379 ret = adis16260_spi_read_reg_16(dev, ADIS16260_DIAG_STAT, &status);
380
381 if (ret < 0) {
382 dev_err(dev, "Reading status failed\n");
383 goto error_ret;
384 }
385 ret = status & 0x7F;
386 if (status & ADIS16260_DIAG_STAT_FLASH_CHK)
387 dev_err(dev, "Flash checksum error\n");
388 if (status & ADIS16260_DIAG_STAT_SELF_TEST)
389 dev_err(dev, "Self test error\n");
390 if (status & ADIS16260_DIAG_STAT_OVERFLOW)
391 dev_err(dev, "Sensor overrange\n");
392 if (status & ADIS16260_DIAG_STAT_SPI_FAIL)
393 dev_err(dev, "SPI failure\n");
394 if (status & ADIS16260_DIAG_STAT_FLASH_UPT)
395 dev_err(dev, "Flash update failed\n");
396 if (status & ADIS16260_DIAG_STAT_POWER_HIGH)
397 dev_err(dev, "Power supply above 5.25V\n");
398 if (status & ADIS16260_DIAG_STAT_POWER_LOW)
399 dev_err(dev, "Power supply below 4.75V\n");
400
401error_ret:
402 return ret;
403}
404
405static int adis16260_initial_setup(struct adis16260_state *st)
406{
407 int ret;
408 struct device *dev = &st->indio_dev->dev;
409
410 /* Disable IRQ */
411 ret = adis16260_set_irq(dev, false);
412 if (ret) {
413 dev_err(dev, "disable irq failed");
414 goto err_ret;
415 }
416
417 /* Do self test */
418 ret = adis16260_self_test(dev);
419 if (ret) {
420 dev_err(dev, "self test failure");
421 goto err_ret;
422 }
423
424 /* Read status register to check the result */
425 ret = adis16260_check_status(dev);
426 if (ret) {
427 adis16260_reset(dev);
428 dev_err(dev, "device not playing ball -> reset");
429 msleep(ADIS16260_STARTUP_DELAY);
430 ret = adis16260_check_status(dev);
431 if (ret) {
432 dev_err(dev, "giving up");
433 goto err_ret;
434 }
435 }
436
437 printk(KERN_INFO DRIVER_NAME ": at CS%d (irq %d)\n",
438 st->us->chip_select, st->us->irq);
439
440err_ret:
441 return ret;
442}
443
444static IIO_DEV_ATTR_IN_NAMED_RAW(supply,
445 adis16260_read_12bit_unsigned,
446 ADIS16260_SUPPLY_OUT);
447static IIO_CONST_ATTR(in_supply_scale, "0.0018315");
448
449static IIO_DEV_ATTR_GYRO(adis16260_read_14bit_signed,
450 ADIS16260_GYRO_OUT);
451static IIO_DEV_ATTR_GYRO_SCALE(S_IWUSR | S_IRUGO,
452 adis16260_read_14bit_signed,
453 adis16260_write_16bit,
454 ADIS16260_GYRO_SCALE);
455static IIO_DEV_ATTR_GYRO_OFFSET(S_IWUSR | S_IRUGO,
456 adis16260_read_12bit_signed,
457 adis16260_write_16bit,
458 ADIS16260_GYRO_OFF);
459
460static IIO_DEV_ATTR_TEMP_RAW(adis16260_read_12bit_unsigned);
461static IIO_CONST_ATTR(temp_offset, "25");
462static IIO_CONST_ATTR(temp_scale, "0.1453");
463
464static IIO_DEV_ATTR_IN_RAW(0, adis16260_read_12bit_unsigned,
465 ADIS16260_AUX_ADC);
466static IIO_CONST_ATTR(in0_scale, "0.0006105");
467
468static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
469 adis16260_read_frequency,
470 adis16260_write_frequency);
471static IIO_DEV_ATTR_ANGL(adis16260_read_14bit_signed,
472 ADIS16260_ANGL_OUT);
473
474static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16260_write_reset, 0);
475
476static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("256 2048");
477
478static IIO_CONST_ATTR(name, "adis16260");
479
480static struct attribute *adis16260_event_attributes[] = {
481 NULL
482};
483
484static struct attribute_group adis16260_event_attribute_group = {
485 .attrs = adis16260_event_attributes,
486};
487
488static struct attribute *adis16260_attributes[] = {
489 &iio_dev_attr_in_supply_raw.dev_attr.attr,
490 &iio_const_attr_in_supply_scale.dev_attr.attr,
491 &iio_dev_attr_gyro_raw.dev_attr.attr,
492 &iio_dev_attr_gyro_scale.dev_attr.attr,
493 &iio_dev_attr_gyro_offset.dev_attr.attr,
494 &iio_dev_attr_angl_raw.dev_attr.attr,
495 &iio_dev_attr_temp_raw.dev_attr.attr,
496 &iio_const_attr_temp_offset.dev_attr.attr,
497 &iio_const_attr_temp_scale.dev_attr.attr,
498 &iio_dev_attr_in0_raw.dev_attr.attr,
499 &iio_const_attr_in0_scale.dev_attr.attr,
500 &iio_dev_attr_sampling_frequency.dev_attr.attr,
501 &iio_const_attr_available_sampling_frequency.dev_attr.attr,
502 &iio_dev_attr_reset.dev_attr.attr,
503 &iio_const_attr_name.dev_attr.attr,
504 NULL
505};
506
507static const struct attribute_group adis16260_attribute_group = {
508 .attrs = adis16260_attributes,
509};
510
511static int __devinit adis16260_probe(struct spi_device *spi)
512{
513 int ret, regdone = 0;
514 struct adis16260_state *st = kzalloc(sizeof *st, GFP_KERNEL);
515 if (!st) {
516 ret = -ENOMEM;
517 goto error_ret;
518 }
519 /* this is only used for removal purposes */
520 spi_set_drvdata(spi, st);
521
522 /* Allocate the comms buffers */
523 st->rx = kzalloc(sizeof(*st->rx)*ADIS16260_MAX_RX, GFP_KERNEL);
524 if (st->rx == NULL) {
525 ret = -ENOMEM;
526 goto error_free_st;
527 }
528 st->tx = kzalloc(sizeof(*st->tx)*ADIS16260_MAX_TX, GFP_KERNEL);
529 if (st->tx == NULL) {
530 ret = -ENOMEM;
531 goto error_free_rx;
532 }
533 st->us = spi;
534 mutex_init(&st->buf_lock);
535 /* setup the industrialio driver allocated elements */
536 st->indio_dev = iio_allocate_device();
537 if (st->indio_dev == NULL) {
538 ret = -ENOMEM;
539 goto error_free_tx;
540 }
541
542 st->indio_dev->dev.parent = &spi->dev;
543 st->indio_dev->num_interrupt_lines = 1;
544 st->indio_dev->event_attrs = &adis16260_event_attribute_group;
545 st->indio_dev->attrs = &adis16260_attribute_group;
546 st->indio_dev->dev_data = (void *)(st);
547 st->indio_dev->driver_module = THIS_MODULE;
548 st->indio_dev->modes = INDIO_DIRECT_MODE;
549
550 ret = adis16260_configure_ring(st->indio_dev);
551 if (ret)
552 goto error_free_dev;
553
554 ret = iio_device_register(st->indio_dev);
555 if (ret)
556 goto error_unreg_ring_funcs;
557 regdone = 1;
558
559 ret = adis16260_initialize_ring(st->indio_dev->ring);
560 if (ret) {
561 printk(KERN_ERR "failed to initialize the ring\n");
562 goto error_unreg_ring_funcs;
563 }
564
565 if (spi->irq) {
566 ret = iio_register_interrupt_line(spi->irq,
567 st->indio_dev,
568 0,
569 IRQF_TRIGGER_RISING,
570 "adis16260");
571 if (ret)
572 goto error_uninitialize_ring;
573
574 ret = adis16260_probe_trigger(st->indio_dev);
575 if (ret)
576 goto error_unregister_line;
577 }
578
579 /* Get the device into a sane initial state */
580 ret = adis16260_initial_setup(st);
581 if (ret)
582 goto error_remove_trigger;
583 return 0;
584
585error_remove_trigger:
586 adis16260_remove_trigger(st->indio_dev);
587error_unregister_line:
588 if (spi->irq)
589 iio_unregister_interrupt_line(st->indio_dev, 0);
590error_uninitialize_ring:
591 adis16260_uninitialize_ring(st->indio_dev->ring);
592error_unreg_ring_funcs:
593 adis16260_unconfigure_ring(st->indio_dev);
594error_free_dev:
595 if (regdone)
596 iio_device_unregister(st->indio_dev);
597 else
598 iio_free_device(st->indio_dev);
599error_free_tx:
600 kfree(st->tx);
601error_free_rx:
602 kfree(st->rx);
603error_free_st:
604 kfree(st);
605error_ret:
606 return ret;
607}
608
609static int adis16260_remove(struct spi_device *spi)
610{
611 int ret;
612 struct adis16260_state *st = spi_get_drvdata(spi);
613 struct iio_dev *indio_dev = st->indio_dev;
614
615 ret = adis16260_stop_device(&(indio_dev->dev));
616 if (ret)
617 goto err_ret;
618
619 flush_scheduled_work();
620
621 adis16260_remove_trigger(indio_dev);
622 if (spi->irq)
623 iio_unregister_interrupt_line(indio_dev, 0);
624
625 adis16260_uninitialize_ring(indio_dev->ring);
626 iio_device_unregister(indio_dev);
627 adis16260_unconfigure_ring(indio_dev);
628 kfree(st->tx);
629 kfree(st->rx);
630 kfree(st);
631
632 return 0;
633
634err_ret:
635 return ret;
636}
637
638static struct spi_driver adis16260_driver = {
639 .driver = {
640 .name = "adis16260",
641 .owner = THIS_MODULE,
642 },
643 .probe = adis16260_probe,
644 .remove = __devexit_p(adis16260_remove),
645};
646
647static __init int adis16260_init(void)
648{
649 return spi_register_driver(&adis16260_driver);
650}
651module_init(adis16260_init);
652
653static __exit void adis16260_exit(void)
654{
655 spi_unregister_driver(&adis16260_driver);
656}
657module_exit(adis16260_exit);
658
659MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
660MODULE_DESCRIPTION("Analog Devices ADIS16260/5 Digital Gyroscope Sensor");
661MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/gyro/adis16260_ring.c b/drivers/staging/iio/gyro/adis16260_ring.c
new file mode 100644
index 000000000000..4c4390ca6d73
--- /dev/null
+++ b/drivers/staging/iio/gyro/adis16260_ring.c
@@ -0,0 +1,256 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/gpio.h>
4#include <linux/workqueue.h>
5#include <linux/mutex.h>
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/spi/spi.h>
9#include <linux/sysfs.h>
10#include <linux/list.h>
11
12#include "../iio.h"
13#include "../sysfs.h"
14#include "../ring_sw.h"
15#include "../accel/accel.h"
16#include "../trigger.h"
17#include "adis16260.h"
18
19/**
20 * combine_8_to_16() utility function to munge to u8s into u16
21 **/
22static inline u16 combine_8_to_16(u8 lower, u8 upper)
23{
24 u16 _lower = lower;
25 u16 _upper = upper;
26 return _lower | (_upper << 8);
27}
28
29static IIO_SCAN_EL_C(supply, ADIS16260_SCAN_SUPPLY, IIO_UNSIGNED(12),
30 ADIS16260_SUPPLY_OUT, NULL);
31static IIO_SCAN_EL_C(gyro, ADIS16260_SCAN_GYRO, IIO_SIGNED(14),
32 ADIS16260_GYRO_OUT, NULL);
33static IIO_SCAN_EL_C(aux_adc, ADIS16260_SCAN_AUX_ADC, IIO_SIGNED(14),
34 ADIS16260_AUX_ADC, NULL);
35static IIO_SCAN_EL_C(temp, ADIS16260_SCAN_TEMP, IIO_UNSIGNED(12),
36 ADIS16260_TEMP_OUT, NULL);
37static IIO_SCAN_EL_C(angl, ADIS16260_SCAN_ANGL, IIO_UNSIGNED(12),
38 ADIS16260_ANGL_OUT, NULL);
39
40static IIO_SCAN_EL_TIMESTAMP(5);
41
42static struct attribute *adis16260_scan_el_attrs[] = {
43 &iio_scan_el_supply.dev_attr.attr,
44 &iio_scan_el_gyro.dev_attr.attr,
45 &iio_scan_el_aux_adc.dev_attr.attr,
46 &iio_scan_el_temp.dev_attr.attr,
47 &iio_scan_el_angl.dev_attr.attr,
48 &iio_scan_el_timestamp.dev_attr.attr,
49 NULL,
50};
51
52static struct attribute_group adis16260_scan_el_group = {
53 .attrs = adis16260_scan_el_attrs,
54 .name = "scan_elements",
55};
56
57/**
58 * adis16260_poll_func_th() top half interrupt handler called by trigger
59 * @private_data: iio_dev
60 **/
61static void adis16260_poll_func_th(struct iio_dev *indio_dev)
62{
63 struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
64 st->last_timestamp = indio_dev->trig->timestamp;
65 schedule_work(&st->work_trigger_to_ring);
66}
67
68/**
69 * adis16260_read_ring_data() read data registers which will be placed into ring
70 * @dev: device associated with child of actual device (iio_dev or iio_trig)
71 * @rx: somewhere to pass back the value read
72 **/
73static int adis16260_read_ring_data(struct device *dev, u8 *rx)
74{
75 struct spi_message msg;
76 struct iio_dev *indio_dev = dev_get_drvdata(dev);
77 struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
78 struct spi_transfer xfers[ADIS16260_OUTPUTS + 1];
79 int ret;
80 int i;
81
82 mutex_lock(&st->buf_lock);
83
84 spi_message_init(&msg);
85
86 memset(xfers, 0, sizeof(xfers));
87 for (i = 0; i <= ADIS16260_OUTPUTS; i++) {
88 xfers[i].bits_per_word = 8;
89 xfers[i].cs_change = 1;
90 xfers[i].len = 2;
91 xfers[i].delay_usecs = 30;
92 xfers[i].tx_buf = st->tx + 2 * i;
93 if (i < 2) /* SUPPLY_OUT:0x02 GYRO_OUT:0x04 */
94 st->tx[2 * i]
95 = ADIS16260_READ_REG(ADIS16260_SUPPLY_OUT
96 + 2 * i);
97 else /* 0x06 to 0x09 is reserved */
98 st->tx[2 * i]
99 = ADIS16260_READ_REG(ADIS16260_SUPPLY_OUT
100 + 2 * i + 4);
101 st->tx[2 * i + 1] = 0;
102 if (i >= 1)
103 xfers[i].rx_buf = rx + 2 * (i - 1);
104 spi_message_add_tail(&xfers[i], &msg);
105 }
106
107 ret = spi_sync(st->us, &msg);
108 if (ret)
109 dev_err(&st->us->dev, "problem when burst reading");
110
111 mutex_unlock(&st->buf_lock);
112
113 return ret;
114}
115
116
117static void adis16260_trigger_bh_to_ring(struct work_struct *work_s)
118{
119 struct adis16260_state *st
120 = container_of(work_s, struct adis16260_state,
121 work_trigger_to_ring);
122
123 int i = 0;
124 s16 *data;
125 size_t datasize = st->indio_dev
126 ->ring->access.get_bpd(st->indio_dev->ring);
127
128 data = kmalloc(datasize , GFP_KERNEL);
129 if (data == NULL) {
130 dev_err(&st->us->dev, "memory alloc failed in ring bh");
131 return;
132 }
133
134 if (st->indio_dev->scan_count)
135 if (adis16260_read_ring_data(&st->indio_dev->dev, st->rx) >= 0)
136 for (; i < st->indio_dev->scan_count; i++) {
137 data[i] = combine_8_to_16(st->rx[i*2+1],
138 st->rx[i*2]);
139 }
140
141 /* Guaranteed to be aligned with 8 byte boundary */
142 if (st->indio_dev->scan_timestamp)
143 *((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
144
145 st->indio_dev->ring->access.store_to(st->indio_dev->ring,
146 (u8 *)data,
147 st->last_timestamp);
148
149 iio_trigger_notify_done(st->indio_dev->trig);
150 kfree(data);
151
152 return;
153}
154
155static int adis16260_data_rdy_ring_preenable(struct iio_dev *indio_dev)
156{
157 size_t size;
158 dev_dbg(&indio_dev->dev, "%s\n", __func__);
159 /* Check if there are any scan elements enabled, if not fail*/
160 if (!(indio_dev->scan_count || indio_dev->scan_timestamp))
161 return -EINVAL;
162
163 if (indio_dev->ring->access.set_bpd) {
164 if (indio_dev->scan_timestamp)
165 if (indio_dev->scan_count)
166 /* Timestamp (aligned s64) and data */
167 size = (((indio_dev->scan_count * sizeof(s16))
168 + sizeof(s64) - 1)
169 & ~(sizeof(s64) - 1))
170 + sizeof(s64);
171 else /* Timestamp only */
172 size = sizeof(s64);
173 else /* Data only */
174 size = indio_dev->scan_count*sizeof(s16);
175 indio_dev->ring->access.set_bpd(indio_dev->ring, size);
176 }
177
178 return 0;
179}
180
181static int adis16260_data_rdy_ring_postenable(struct iio_dev *indio_dev)
182{
183 return indio_dev->trig
184 ? iio_trigger_attach_poll_func(indio_dev->trig,
185 indio_dev->pollfunc)
186 : 0;
187}
188
189static int adis16260_data_rdy_ring_predisable(struct iio_dev *indio_dev)
190{
191 return indio_dev->trig
192 ? iio_trigger_dettach_poll_func(indio_dev->trig,
193 indio_dev->pollfunc)
194 : 0;
195}
196
197void adis16260_unconfigure_ring(struct iio_dev *indio_dev)
198{
199 kfree(indio_dev->pollfunc);
200 iio_sw_rb_free(indio_dev->ring);
201}
202
203int adis16260_configure_ring(struct iio_dev *indio_dev)
204{
205 int ret = 0;
206 struct adis16260_state *st = indio_dev->dev_data;
207 struct iio_ring_buffer *ring;
208 INIT_WORK(&st->work_trigger_to_ring, adis16260_trigger_bh_to_ring);
209 /* Set default scan mode */
210
211 iio_scan_mask_set(indio_dev, iio_scan_el_supply.number);
212 iio_scan_mask_set(indio_dev, iio_scan_el_gyro.number);
213 iio_scan_mask_set(indio_dev, iio_scan_el_aux_adc.number);
214 iio_scan_mask_set(indio_dev, iio_scan_el_temp.number);
215 iio_scan_mask_set(indio_dev, iio_scan_el_angl.number);
216 indio_dev->scan_timestamp = true;
217
218 indio_dev->scan_el_attrs = &adis16260_scan_el_group;
219
220 ring = iio_sw_rb_allocate(indio_dev);
221 if (!ring) {
222 ret = -ENOMEM;
223 return ret;
224 }
225 indio_dev->ring = ring;
226 /* Effectively select the ring buffer implementation */
227 iio_ring_sw_register_funcs(&ring->access);
228 ring->preenable = &adis16260_data_rdy_ring_preenable;
229 ring->postenable = &adis16260_data_rdy_ring_postenable;
230 ring->predisable = &adis16260_data_rdy_ring_predisable;
231 ring->owner = THIS_MODULE;
232
233 indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
234 if (indio_dev->pollfunc == NULL) {
235 ret = -ENOMEM;
236 goto error_iio_sw_rb_free;;
237 }
238 indio_dev->pollfunc->poll_func_main = &adis16260_poll_func_th;
239 indio_dev->pollfunc->private_data = indio_dev;
240 indio_dev->modes |= INDIO_RING_TRIGGERED;
241 return 0;
242
243error_iio_sw_rb_free:
244 iio_sw_rb_free(indio_dev->ring);
245 return ret;
246}
247
248int adis16260_initialize_ring(struct iio_ring_buffer *ring)
249{
250 return iio_ring_buffer_register(ring, 0);
251}
252
253void adis16260_uninitialize_ring(struct iio_ring_buffer *ring)
254{
255 iio_ring_buffer_unregister(ring);
256}
diff --git a/drivers/staging/iio/gyro/adis16260_trigger.c b/drivers/staging/iio/gyro/adis16260_trigger.c
new file mode 100644
index 000000000000..b3c565942b8d
--- /dev/null
+++ b/drivers/staging/iio/gyro/adis16260_trigger.c
@@ -0,0 +1,124 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/mutex.h>
4#include <linux/device.h>
5#include <linux/kernel.h>
6#include <linux/sysfs.h>
7#include <linux/list.h>
8#include <linux/spi/spi.h>
9
10#include "../iio.h"
11#include "../sysfs.h"
12#include "../trigger.h"
13#include "adis16260.h"
14
15/**
16 * adis16260_data_rdy_trig_poll() the event handler for the data rdy trig
17 **/
18static int adis16260_data_rdy_trig_poll(struct iio_dev *dev_info,
19 int index,
20 s64 timestamp,
21 int no_test)
22{
23 struct adis16260_state *st = iio_dev_get_devdata(dev_info);
24 struct iio_trigger *trig = st->trig;
25
26 trig->timestamp = timestamp;
27 iio_trigger_poll(trig);
28
29 return IRQ_HANDLED;
30}
31
32IIO_EVENT_SH(data_rdy_trig, &adis16260_data_rdy_trig_poll);
33
34static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
35
36static struct attribute *adis16260_trigger_attrs[] = {
37 &dev_attr_name.attr,
38 NULL,
39};
40
41static const struct attribute_group adis16260_trigger_attr_group = {
42 .attrs = adis16260_trigger_attrs,
43};
44
45/**
46 * adis16260_data_rdy_trigger_set_state() set datardy interrupt state
47 **/
48static int adis16260_data_rdy_trigger_set_state(struct iio_trigger *trig,
49 bool state)
50{
51 struct adis16260_state *st = trig->private_data;
52 struct iio_dev *indio_dev = st->indio_dev;
53 int ret = 0;
54
55 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
56 ret = adis16260_set_irq(&st->indio_dev->dev, state);
57 if (state == false) {
58 iio_remove_event_from_list(&iio_event_data_rdy_trig,
59 &indio_dev->interrupts[0]
60 ->ev_list);
61 flush_scheduled_work();
62 } else {
63 iio_add_event_to_list(&iio_event_data_rdy_trig,
64 &indio_dev->interrupts[0]->ev_list);
65 }
66 return ret;
67}
68
69/**
70 * adis16260_trig_try_reen() try renabling irq for data rdy trigger
71 * @trig: the datardy trigger
72 **/
73static int adis16260_trig_try_reen(struct iio_trigger *trig)
74{
75 struct adis16260_state *st = trig->private_data;
76 enable_irq(st->us->irq);
77 return 0;
78}
79
80int adis16260_probe_trigger(struct iio_dev *indio_dev)
81{
82 int ret;
83 struct adis16260_state *st = indio_dev->dev_data;
84
85 st->trig = iio_allocate_trigger();
86 st->trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
87 if (!st->trig->name) {
88 ret = -ENOMEM;
89 goto error_free_trig;
90 }
91 snprintf((char *)st->trig->name,
92 IIO_TRIGGER_NAME_LENGTH,
93 "adis16260-dev%d", indio_dev->id);
94 st->trig->dev.parent = &st->us->dev;
95 st->trig->owner = THIS_MODULE;
96 st->trig->private_data = st;
97 st->trig->set_trigger_state = &adis16260_data_rdy_trigger_set_state;
98 st->trig->try_reenable = &adis16260_trig_try_reen;
99 st->trig->control_attrs = &adis16260_trigger_attr_group;
100 ret = iio_trigger_register(st->trig);
101
102 /* select default trigger */
103 indio_dev->trig = st->trig;
104 if (ret)
105 goto error_free_trig_name;
106
107 return 0;
108
109error_free_trig_name:
110 kfree(st->trig->name);
111error_free_trig:
112 iio_free_trigger(st->trig);
113
114 return ret;
115}
116
117void adis16260_remove_trigger(struct iio_dev *indio_dev)
118{
119 struct adis16260_state *state = indio_dev->dev_data;
120
121 iio_trigger_unregister(state->trig);
122 kfree(state->trig->name);
123 iio_free_trigger(state->trig);
124}
diff --git a/drivers/staging/iio/gyro/gyro.h b/drivers/staging/iio/gyro/gyro.h
new file mode 100644
index 000000000000..f68edab8f30d
--- /dev/null
+++ b/drivers/staging/iio/gyro/gyro.h
@@ -0,0 +1,43 @@
1
2#include "../sysfs.h"
3
4/* Gyroscope types of attribute */
5
6#define IIO_DEV_ATTR_GYRO_OFFSET(_mode, _show, _store, _addr) \
7 IIO_DEVICE_ATTR(gyro_offset, _mode, _show, _store, _addr)
8
9#define IIO_DEV_ATTR_GYRO_X_OFFSET(_mode, _show, _store, _addr) \
10 IIO_DEVICE_ATTR(gyro_x_offset, _mode, _show, _store, _addr)
11
12#define IIO_DEV_ATTR_GYRO_Y_OFFSET(_mode, _show, _store, _addr) \
13 IIO_DEVICE_ATTR(gyro_y_offset, _mode, _show, _store, _addr)
14
15#define IIO_DEV_ATTR_GYRO_Z_OFFSET(_mode, _show, _store, _addr) \
16 IIO_DEVICE_ATTR(gyro_z_offset, _mode, _show, _store, _addr)
17
18#define IIO_DEV_ATTR_GYRO_X_GAIN(_mode, _show, _store, _addr) \
19 IIO_DEVICE_ATTR(gyro_x_gain, _mode, _show, _store, _addr)
20
21#define IIO_DEV_ATTR_GYRO_Y_GAIN(_mode, _show, _store, _addr) \
22 IIO_DEVICE_ATTR(gyro_y_gain, _mode, _show, _store, _addr)
23
24#define IIO_DEV_ATTR_GYRO_Z_GAIN(_mode, _show, _store, _addr) \
25 IIO_DEVICE_ATTR(gyro_z_gain, _mode, _show, _store, _addr)
26
27#define IIO_DEV_ATTR_GYRO_SCALE(_mode, _show, _store, _addr) \
28 IIO_DEVICE_ATTR(gyro_scale, S_IRUGO, _show, _store, _addr)
29
30#define IIO_DEV_ATTR_GYRO(_show, _addr) \
31 IIO_DEVICE_ATTR(gyro_raw, S_IRUGO, _show, NULL, _addr)
32
33#define IIO_DEV_ATTR_GYRO_X(_show, _addr) \
34 IIO_DEVICE_ATTR(gyro_x_raw, S_IRUGO, _show, NULL, _addr)
35
36#define IIO_DEV_ATTR_GYRO_Y(_show, _addr) \
37 IIO_DEVICE_ATTR(gyro_y_raw, S_IRUGO, _show, NULL, _addr)
38
39#define IIO_DEV_ATTR_GYRO_Z(_show, _addr) \
40 IIO_DEVICE_ATTR(gyro_z_raw, S_IRUGO, _show, NULL, _addr)
41
42#define IIO_DEV_ATTR_ANGL(_show, _addr) \
43 IIO_DEVICE_ATTR(angl_raw, S_IRUGO, _show, NULL, _addr)
diff --git a/drivers/staging/iio/iio.h b/drivers/staging/iio/iio.h
index 71dbfe12b579..fcee47cbe894 100644
--- a/drivers/staging/iio/iio.h
+++ b/drivers/staging/iio/iio.h
@@ -96,6 +96,7 @@ void iio_remove_event_from_list(struct iio_event_handler_list *el,
96 * control method is used 96 * control method is used
97 * @scan_count: [INTERN] the number of elements in the current scan mode 97 * @scan_count: [INTERN] the number of elements in the current scan mode
98 * @scan_mask: [INTERN] bitmask used in masking scan mode elements 98 * @scan_mask: [INTERN] bitmask used in masking scan mode elements
99 * @available_scan_masks: [DRIVER] optional array of allowed bitmasks
99 * @scan_timestamp: [INTERN] does the scan mode include a timestamp 100 * @scan_timestamp: [INTERN] does the scan mode include a timestamp
100 * @trig: [INTERN] current device trigger (ring buffer modes) 101 * @trig: [INTERN] current device trigger (ring buffer modes)
101 * @pollfunc: [DRIVER] function run on trigger being recieved 102 * @pollfunc: [DRIVER] function run on trigger being recieved
@@ -122,7 +123,8 @@ struct iio_dev {
122 struct attribute_group *scan_el_attrs; 123 struct attribute_group *scan_el_attrs;
123 int scan_count; 124 int scan_count;
124 125
125 u16 scan_mask; 126 u32 scan_mask;
127 u32 *available_scan_masks;
126 bool scan_timestamp; 128 bool scan_timestamp;
127 struct iio_trigger *trig; 129 struct iio_trigger *trig;
128 struct iio_poll_func *pollfunc; 130 struct iio_poll_func *pollfunc;
@@ -132,22 +134,57 @@ struct iio_dev {
132 * These are mainly provided to allow for a change of implementation if a device 134 * These are mainly provided to allow for a change of implementation if a device
133 * has a large number of scan elements 135 * has a large number of scan elements
134 */ 136 */
135#define IIO_MAX_SCAN_LENGTH 15 137#define IIO_MAX_SCAN_LENGTH 31
138
139/* note 0 used as error indicator as it doesn't make sense. */
140static inline u32 iio_scan_mask_match(u32 *av_masks, u32 mask)
141{
142 while (*av_masks) {
143 if (!(~*av_masks & mask))
144 return *av_masks;
145 av_masks++;
146 }
147 return 0;
148}
136 149
137static inline int iio_scan_mask_query(struct iio_dev *dev_info, int bit) 150static inline int iio_scan_mask_query(struct iio_dev *dev_info, int bit)
138{ 151{
152 u32 mask;
153
139 if (bit > IIO_MAX_SCAN_LENGTH) 154 if (bit > IIO_MAX_SCAN_LENGTH)
140 return -EINVAL; 155 return -EINVAL;
156
157 if (!dev_info->scan_mask)
158 return 0;
159
160 if (dev_info->available_scan_masks)
161 mask = iio_scan_mask_match(dev_info->available_scan_masks,
162 dev_info->scan_mask);
141 else 163 else
142 return !!(dev_info->scan_mask & (1 << bit)); 164 mask = dev_info->scan_mask;
165
166 if (!mask)
167 return -EINVAL;
168
169 return !!(mask & (1 << bit));
143}; 170};
144 171
145static inline int iio_scan_mask_set(struct iio_dev *dev_info, int bit) 172static inline int iio_scan_mask_set(struct iio_dev *dev_info, int bit)
146{ 173{
174 u32 mask;
175 u32 trialmask = dev_info->scan_mask | (1 << bit);
176
147 if (bit > IIO_MAX_SCAN_LENGTH) 177 if (bit > IIO_MAX_SCAN_LENGTH)
148 return -EINVAL; 178 return -EINVAL;
149 dev_info->scan_mask |= (1 << bit); 179 if (dev_info->available_scan_masks) {
180 mask = iio_scan_mask_match(dev_info->available_scan_masks,
181 trialmask);
182 if (!mask)
183 return -EINVAL;
184 }
185 dev_info->scan_mask = trialmask;
150 dev_info->scan_count++; 186 dev_info->scan_count++;
187
151 return 0; 188 return 0;
152}; 189};
153 190
@@ -340,7 +377,7 @@ void iio_deallocate_chrdev(struct iio_handler *handler);
340#define IIO_UNSIGNED(a) (a) 377#define IIO_UNSIGNED(a) (a)
341 378
342extern dev_t iio_devt; 379extern dev_t iio_devt;
343extern struct class iio_class; 380extern struct bus_type iio_bus_type;
344 381
345/** 382/**
346 * iio_put_device() - reference counted deallocation of struct device 383 * iio_put_device() - reference counted deallocation of struct device
diff --git a/drivers/staging/iio/imu/Kconfig b/drivers/staging/iio/imu/Kconfig
new file mode 100644
index 000000000000..6308d6faad57
--- /dev/null
+++ b/drivers/staging/iio/imu/Kconfig
@@ -0,0 +1,33 @@
1#
2# IIO imu drivers configuration
3#
4comment "Inertial measurement units"
5
6config ADIS16300
7 tristate "Analog Devices ADIS16300 IMU SPI driver"
8 depends on SPI
9 select IIO_SW_RING
10 select IIO_RING_BUFFER
11 select IIO_TRIGGER
12 help
13 Say yes here to build support for Analog Devices adis16300 four degrees
14 of freedom inertial sensor.
15
16config ADIS16350
17 tristate "Analog Devices ADIS16350/54/55/60/62/64/65 IMU SPI driver"
18 depends on SPI
19 select IIO_TRIGGER if IIO_RING_BUFFER
20 select IIO_SW_RING if IIO_RING_BUFFER
21 help
22 Say yes here to build support for Analog Devices adis16350/54/55/60/62/64/65
23 high precision tri-axis inertial sensor.
24
25config ADIS16400
26 tristate "Analog Devices ADIS16400/5 IMU SPI driver"
27 depends on SPI
28 select IIO_SW_RING
29 select IIO_RING_BUFFER
30 select IIO_TRIGGER
31 help
32 Say yes here to build support for Analog Devices adis16400/5 triaxial
33 inertial sensor with Magnetometer. \ No newline at end of file
diff --git a/drivers/staging/iio/imu/Makefile b/drivers/staging/iio/imu/Makefile
new file mode 100644
index 000000000000..31df7359e20f
--- /dev/null
+++ b/drivers/staging/iio/imu/Makefile
@@ -0,0 +1,14 @@
1#
2# Makefile for Inertial Measurement Units
3#
4adis16300-y := adis16300_core.o
5adis16300-$(CONFIG_IIO_RING_BUFFER) += adis16300_ring.o adis16300_trigger.o
6obj-$(CONFIG_ADIS16300) += adis16300.o
7
8adis16350-y := adis16350_core.o
9adis16350-$(CONFIG_IIO_RING_BUFFER) += adis16350_ring.o adis16350_trigger.o
10obj-$(CONFIG_ADIS16350) += adis16350.o
11
12adis16400-y := adis16400_core.o
13adis16400-$(CONFIG_IIO_RING_BUFFER) += adis16400_ring.o adis16400_trigger.o
14obj-$(CONFIG_ADIS16400) += adis16400.o \ No newline at end of file
diff --git a/drivers/staging/iio/imu/adis16300.h b/drivers/staging/iio/imu/adis16300.h
new file mode 100644
index 000000000000..1c7ea5c840ef
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16300.h
@@ -0,0 +1,194 @@
1#ifndef SPI_ADIS16300_H_
2#define SPI_ADIS16300_H_
3
4#define ADIS16300_STARTUP_DELAY 220 /* ms */
5
6#define ADIS16300_READ_REG(a) a
7#define ADIS16300_WRITE_REG(a) ((a) | 0x80)
8
9#define ADIS16300_FLASH_CNT 0x00 /* Flash memory write count */
10#define ADIS16300_SUPPLY_OUT 0x02 /* Power supply measurement */
11#define ADIS16300_XGYRO_OUT 0x04 /* X-axis gyroscope output */
12#define ADIS16300_XACCL_OUT 0x0A /* X-axis accelerometer output */
13#define ADIS16300_YACCL_OUT 0x0C /* Y-axis accelerometer output */
14#define ADIS16300_ZACCL_OUT 0x0E /* Z-axis accelerometer output */
15#define ADIS16300_TEMP_OUT 0x10 /* Temperature output */
16#define ADIS16300_XINCLI_OUT 0x12 /* X-axis inclinometer output measurement */
17#define ADIS16300_YINCLI_OUT 0x14 /* Y-axis inclinometer output measurement */
18#define ADIS16300_AUX_ADC 0x16 /* Auxiliary ADC measurement */
19
20/* Calibration parameters */
21#define ADIS16300_XGYRO_OFF 0x1A /* X-axis gyroscope bias offset factor */
22#define ADIS16300_XACCL_OFF 0x20 /* X-axis acceleration bias offset factor */
23#define ADIS16300_YACCL_OFF 0x22 /* Y-axis acceleration bias offset factor */
24#define ADIS16300_ZACCL_OFF 0x24 /* Z-axis acceleration bias offset factor */
25
26#define ADIS16300_GPIO_CTRL 0x32 /* Auxiliary digital input/output control */
27#define ADIS16300_MSC_CTRL 0x34 /* Miscellaneous control */
28#define ADIS16300_SMPL_PRD 0x36 /* Internal sample period (rate) control */
29#define ADIS16300_SENS_AVG 0x38 /* Dynamic range and digital filter control */
30#define ADIS16300_SLP_CNT 0x3A /* Sleep mode control */
31#define ADIS16300_DIAG_STAT 0x3C /* System status */
32
33/* Alarm functions */
34#define ADIS16300_GLOB_CMD 0x3E /* System command */
35#define ADIS16300_ALM_MAG1 0x26 /* Alarm 1 amplitude threshold */
36#define ADIS16300_ALM_MAG2 0x28 /* Alarm 2 amplitude threshold */
37#define ADIS16300_ALM_SMPL1 0x2A /* Alarm 1 sample size */
38#define ADIS16300_ALM_SMPL2 0x2C /* Alarm 2 sample size */
39#define ADIS16300_ALM_CTRL 0x2E /* Alarm control */
40#define ADIS16300_AUX_DAC 0x30 /* Auxiliary DAC data */
41
42#define ADIS16300_ERROR_ACTIVE (1<<14)
43#define ADIS16300_NEW_DATA (1<<15)
44
45/* MSC_CTRL */
46#define ADIS16300_MSC_CTRL_MEM_TEST (1<<11)
47#define ADIS16300_MSC_CTRL_INT_SELF_TEST (1<<10)
48#define ADIS16300_MSC_CTRL_NEG_SELF_TEST (1<<9)
49#define ADIS16300_MSC_CTRL_POS_SELF_TEST (1<<8)
50#define ADIS16300_MSC_CTRL_GYRO_BIAS (1<<7)
51#define ADIS16300_MSC_CTRL_ACCL_ALIGN (1<<6)
52#define ADIS16300_MSC_CTRL_DATA_RDY_EN (1<<2)
53#define ADIS16300_MSC_CTRL_DATA_RDY_POL_HIGH (1<<1)
54#define ADIS16300_MSC_CTRL_DATA_RDY_DIO2 (1<<0)
55
56/* SMPL_PRD */
57#define ADIS16300_SMPL_PRD_TIME_BASE (1<<7)
58#define ADIS16300_SMPL_PRD_DIV_MASK 0x7F
59
60/* DIAG_STAT */
61#define ADIS16300_DIAG_STAT_ZACCL_FAIL (1<<15)
62#define ADIS16300_DIAG_STAT_YACCL_FAIL (1<<14)
63#define ADIS16300_DIAG_STAT_XACCL_FAIL (1<<13)
64#define ADIS16300_DIAG_STAT_XGYRO_FAIL (1<<10)
65#define ADIS16300_DIAG_STAT_ALARM2 (1<<9)
66#define ADIS16300_DIAG_STAT_ALARM1 (1<<8)
67#define ADIS16300_DIAG_STAT_FLASH_CHK (1<<6)
68#define ADIS16300_DIAG_STAT_SELF_TEST (1<<5)
69#define ADIS16300_DIAG_STAT_OVERFLOW (1<<4)
70#define ADIS16300_DIAG_STAT_SPI_FAIL (1<<3)
71#define ADIS16300_DIAG_STAT_FLASH_UPT (1<<2)
72#define ADIS16300_DIAG_STAT_POWER_HIGH (1<<1)
73#define ADIS16300_DIAG_STAT_POWER_LOW (1<<0)
74
75/* GLOB_CMD */
76#define ADIS16300_GLOB_CMD_SW_RESET (1<<7)
77#define ADIS16300_GLOB_CMD_P_AUTO_NULL (1<<4)
78#define ADIS16300_GLOB_CMD_FLASH_UPD (1<<3)
79#define ADIS16300_GLOB_CMD_DAC_LATCH (1<<2)
80#define ADIS16300_GLOB_CMD_FAC_CALIB (1<<1)
81#define ADIS16300_GLOB_CMD_AUTO_NULL (1<<0)
82
83/* SLP_CNT */
84#define ADIS16300_SLP_CNT_POWER_OFF (1<<8)
85
86#define ADIS16300_MAX_TX 18
87#define ADIS16300_MAX_RX 18
88
89#define ADIS16300_SPI_SLOW (u32)(300 * 1000)
90#define ADIS16300_SPI_BURST (u32)(1000 * 1000)
91#define ADIS16300_SPI_FAST (u32)(2000 * 1000)
92
93/**
94 * struct adis16300_state - device instance specific data
95 * @us: actual spi_device
96 * @work_trigger_to_ring: bh for triggered event handling
97 * @work_cont_thresh: CLEAN
98 * @inter: used to check if new interrupt has been triggered
99 * @last_timestamp: passing timestamp from th to bh of interrupt handler
100 * @indio_dev: industrial I/O device structure
101 * @trig: data ready trigger registered with iio
102 * @tx: transmit buffer
103 * @rx: recieve buffer
104 * @buf_lock: mutex to protect tx and rx
105 **/
106struct adis16300_state {
107 struct spi_device *us;
108 struct work_struct work_trigger_to_ring;
109 struct iio_work_cont work_cont_thresh;
110 s64 last_timestamp;
111 struct iio_dev *indio_dev;
112 struct iio_trigger *trig;
113 u8 *tx;
114 u8 *rx;
115 struct mutex buf_lock;
116};
117
118int adis16300_spi_read_burst(struct device *dev, u8 *rx);
119
120int adis16300_set_irq(struct device *dev, bool enable);
121
122int adis16300_reset(struct device *dev);
123
124int adis16300_check_status(struct device *dev);
125
126#ifdef CONFIG_IIO_RING_BUFFER
127/* At the moment triggers are only used for ring buffer
128 * filling. This may change!
129 */
130
131enum adis16300_scan {
132 ADIS16300_SCAN_SUPPLY,
133 ADIS16300_SCAN_GYRO_X,
134 ADIS16300_SCAN_ACC_X,
135 ADIS16300_SCAN_ACC_Y,
136 ADIS16300_SCAN_ACC_Z,
137 ADIS16300_SCAN_TEMP,
138 ADIS16300_SCAN_ADC_0,
139 ADIS16300_SCAN_INCLI_X,
140 ADIS16300_SCAN_INCLI_Y,
141};
142
143void adis16300_remove_trigger(struct iio_dev *indio_dev);
144int adis16300_probe_trigger(struct iio_dev *indio_dev);
145
146ssize_t adis16300_read_data_from_ring(struct device *dev,
147 struct device_attribute *attr,
148 char *buf);
149
150
151int adis16300_configure_ring(struct iio_dev *indio_dev);
152void adis16300_unconfigure_ring(struct iio_dev *indio_dev);
153
154int adis16300_initialize_ring(struct iio_ring_buffer *ring);
155void adis16300_uninitialize_ring(struct iio_ring_buffer *ring);
156#else /* CONFIG_IIO_RING_BUFFER */
157
158static inline void adis16300_remove_trigger(struct iio_dev *indio_dev)
159{
160}
161
162static inline int adis16300_probe_trigger(struct iio_dev *indio_dev)
163{
164 return 0;
165}
166
167static inline ssize_t
168adis16300_read_data_from_ring(struct device *dev,
169 struct device_attribute *attr,
170 char *buf)
171{
172 return 0;
173}
174
175static int adis16300_configure_ring(struct iio_dev *indio_dev)
176{
177 return 0;
178}
179
180static inline void adis16300_unconfigure_ring(struct iio_dev *indio_dev)
181{
182}
183
184static inline int adis16300_initialize_ring(struct iio_ring_buffer *ring)
185{
186 return 0;
187}
188
189static inline void adis16300_uninitialize_ring(struct iio_ring_buffer *ring)
190{
191}
192
193#endif /* CONFIG_IIO_RING_BUFFER */
194#endif /* SPI_ADIS16300_H_ */
diff --git a/drivers/staging/iio/imu/adis16300_core.c b/drivers/staging/iio/imu/adis16300_core.c
new file mode 100644
index 000000000000..5a7e5ef9bc5d
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16300_core.c
@@ -0,0 +1,768 @@
1/*
2 * ADIS16300 Four Degrees of Freedom Inertial Sensor Driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/gpio.h>
12#include <linux/delay.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/spi/spi.h>
17
18#include <linux/sysfs.h>
19#include <linux/list.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "../accel/accel.h"
24#include "../accel/inclinometer.h"
25#include "../gyro/gyro.h"
26#include "../adc/adc.h"
27
28#include "adis16300.h"
29
30#define DRIVER_NAME "adis16300"
31
32/* At the moment the spi framework doesn't allow global setting of cs_change.
33 * It's in the likely to be added comment at the top of spi.h.
34 * This means that use cannot be made of spi_write etc.
35 */
36
37/**
38 * adis16300_spi_write_reg_8() - write single byte to a register
39 * @dev: device associated with child of actual device (iio_dev or iio_trig)
40 * @reg_address: the address of the register to be written
41 * @val: the value to write
42 **/
43static int adis16300_spi_write_reg_8(struct device *dev,
44 u8 reg_address,
45 u8 val)
46{
47 int ret;
48 struct iio_dev *indio_dev = dev_get_drvdata(dev);
49 struct adis16300_state *st = iio_dev_get_devdata(indio_dev);
50
51 mutex_lock(&st->buf_lock);
52 st->tx[0] = ADIS16300_WRITE_REG(reg_address);
53 st->tx[1] = val;
54
55 ret = spi_write(st->us, st->tx, 2);
56 mutex_unlock(&st->buf_lock);
57
58 return ret;
59}
60
61/**
62 * adis16300_spi_write_reg_16() - write 2 bytes to a pair of registers
63 * @dev: device associated with child of actual device (iio_dev or iio_trig)
64 * @reg_address: the address of the lower of the two registers. Second register
65 * is assumed to have address one greater.
66 * @val: value to be written
67 **/
68static int adis16300_spi_write_reg_16(struct device *dev,
69 u8 lower_reg_address,
70 u16 value)
71{
72 int ret;
73 struct spi_message msg;
74 struct iio_dev *indio_dev = dev_get_drvdata(dev);
75 struct adis16300_state *st = iio_dev_get_devdata(indio_dev);
76 struct spi_transfer xfers[] = {
77 {
78 .tx_buf = st->tx,
79 .bits_per_word = 8,
80 .len = 2,
81 .cs_change = 1,
82 }, {
83 .tx_buf = st->tx + 2,
84 .bits_per_word = 8,
85 .len = 2,
86 .cs_change = 1,
87 },
88 };
89
90 mutex_lock(&st->buf_lock);
91 st->tx[0] = ADIS16300_WRITE_REG(lower_reg_address);
92 st->tx[1] = value & 0xFF;
93 st->tx[2] = ADIS16300_WRITE_REG(lower_reg_address + 1);
94 st->tx[3] = (value >> 8) & 0xFF;
95
96 spi_message_init(&msg);
97 spi_message_add_tail(&xfers[0], &msg);
98 spi_message_add_tail(&xfers[1], &msg);
99 ret = spi_sync(st->us, &msg);
100 mutex_unlock(&st->buf_lock);
101
102 return ret;
103}
104
105/**
106 * adis16300_spi_read_reg_16() - read 2 bytes from a 16-bit register
107 * @dev: device associated with child of actual device (iio_dev or iio_trig)
108 * @reg_address: the address of the lower of the two registers. Second register
109 * is assumed to have address one greater.
110 * @val: somewhere to pass back the value read
111 **/
112static int adis16300_spi_read_reg_16(struct device *dev,
113 u8 lower_reg_address,
114 u16 *val)
115{
116 struct spi_message msg;
117 struct iio_dev *indio_dev = dev_get_drvdata(dev);
118 struct adis16300_state *st = iio_dev_get_devdata(indio_dev);
119 int ret;
120 struct spi_transfer xfers[] = {
121 {
122 .tx_buf = st->tx,
123 .bits_per_word = 8,
124 .len = 2,
125 .cs_change = 0,
126 }, {
127 .rx_buf = st->rx,
128 .bits_per_word = 8,
129 .len = 2,
130 .cs_change = 0,
131 },
132 };
133
134 mutex_lock(&st->buf_lock);
135 st->tx[0] = ADIS16300_READ_REG(lower_reg_address);
136 st->tx[1] = 0;
137 st->tx[2] = 0;
138 st->tx[3] = 0;
139
140 spi_message_init(&msg);
141 spi_message_add_tail(&xfers[0], &msg);
142 spi_message_add_tail(&xfers[1], &msg);
143 ret = spi_sync(st->us, &msg);
144 if (ret) {
145 dev_err(&st->us->dev,
146 "problem when reading 16 bit register 0x%02X",
147 lower_reg_address);
148 goto error_ret;
149 }
150 *val = (st->rx[0] << 8) | st->rx[1];
151
152error_ret:
153 mutex_unlock(&st->buf_lock);
154 return ret;
155}
156
157/**
158 * adis16300_spi_read_burst() - read all data registers
159 * @dev: device associated with child of actual device (iio_dev or iio_trig)
160 * @rx: somewhere to pass back the value read (min size is 24 bytes)
161 **/
162int adis16300_spi_read_burst(struct device *dev, u8 *rx)
163{
164 struct spi_message msg;
165 struct iio_dev *indio_dev = dev_get_drvdata(dev);
166 struct adis16300_state *st = iio_dev_get_devdata(indio_dev);
167 u32 old_speed_hz = st->us->max_speed_hz;
168 int ret;
169
170 struct spi_transfer xfers[] = {
171 {
172 .tx_buf = st->tx,
173 .bits_per_word = 8,
174 .len = 2,
175 .cs_change = 0,
176 }, {
177 .rx_buf = rx,
178 .bits_per_word = 8,
179 .len = 18,
180 .cs_change = 0,
181 },
182 };
183
184 mutex_lock(&st->buf_lock);
185 st->tx[0] = ADIS16300_READ_REG(ADIS16300_GLOB_CMD);
186 st->tx[1] = 0;
187
188 spi_message_init(&msg);
189 spi_message_add_tail(&xfers[0], &msg);
190 spi_message_add_tail(&xfers[1], &msg);
191
192 st->us->max_speed_hz = min(ADIS16300_SPI_BURST, old_speed_hz);
193 spi_setup(st->us);
194
195 ret = spi_sync(st->us, &msg);
196 if (ret)
197 dev_err(&st->us->dev, "problem when burst reading");
198
199 st->us->max_speed_hz = old_speed_hz;
200 spi_setup(st->us);
201 mutex_unlock(&st->buf_lock);
202 return ret;
203}
204
205static ssize_t adis16300_spi_read_signed(struct device *dev,
206 struct device_attribute *attr,
207 char *buf,
208 unsigned bits)
209{
210 int ret;
211 s16 val = 0;
212 unsigned shift = 16 - bits;
213 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
214
215 ret = adis16300_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
216 if (ret)
217 return ret;
218
219 if (val & ADIS16300_ERROR_ACTIVE)
220 adis16300_check_status(dev);
221 val = ((s16)(val << shift) >> shift);
222 return sprintf(buf, "%d\n", val);
223}
224
225static ssize_t adis16300_read_12bit_unsigned(struct device *dev,
226 struct device_attribute *attr,
227 char *buf)
228{
229 int ret;
230 u16 val = 0;
231 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
232
233 ret = adis16300_spi_read_reg_16(dev, this_attr->address, &val);
234 if (ret)
235 return ret;
236
237 if (val & ADIS16300_ERROR_ACTIVE)
238 adis16300_check_status(dev);
239
240 return sprintf(buf, "%u\n", val & 0x0FFF);
241}
242
243static ssize_t adis16300_read_14bit_signed(struct device *dev,
244 struct device_attribute *attr,
245 char *buf)
246{
247 struct iio_dev *indio_dev = dev_get_drvdata(dev);
248 ssize_t ret;
249
250 /* Take the iio_dev status lock */
251 mutex_lock(&indio_dev->mlock);
252 ret = adis16300_spi_read_signed(dev, attr, buf, 14);
253 mutex_unlock(&indio_dev->mlock);
254
255 return ret;
256}
257
258static ssize_t adis16300_read_12bit_signed(struct device *dev,
259 struct device_attribute *attr,
260 char *buf)
261{
262 struct iio_dev *indio_dev = dev_get_drvdata(dev);
263 ssize_t ret;
264
265 /* Take the iio_dev status lock */
266 mutex_lock(&indio_dev->mlock);
267 ret = adis16300_spi_read_signed(dev, attr, buf, 12);
268 mutex_unlock(&indio_dev->mlock);
269
270 return ret;
271}
272
273static ssize_t adis16300_read_13bit_signed(struct device *dev,
274 struct device_attribute *attr,
275 char *buf)
276{
277 struct iio_dev *indio_dev = dev_get_drvdata(dev);
278 ssize_t ret;
279
280 /* Take the iio_dev status lock */
281 mutex_lock(&indio_dev->mlock);
282 ret = adis16300_spi_read_signed(dev, attr, buf, 13);
283 mutex_unlock(&indio_dev->mlock);
284
285 return ret;
286}
287
288static ssize_t adis16300_write_16bit(struct device *dev,
289 struct device_attribute *attr,
290 const char *buf,
291 size_t len)
292{
293 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
294 int ret;
295 long val;
296
297 ret = strict_strtol(buf, 10, &val);
298 if (ret)
299 goto error_ret;
300 ret = adis16300_spi_write_reg_16(dev, this_attr->address, val);
301
302error_ret:
303 return ret ? ret : len;
304}
305
306static ssize_t adis16300_read_frequency(struct device *dev,
307 struct device_attribute *attr,
308 char *buf)
309{
310 int ret, len = 0;
311 u16 t;
312 int sps;
313 ret = adis16300_spi_read_reg_16(dev,
314 ADIS16300_SMPL_PRD,
315 &t);
316 if (ret)
317 return ret;
318 sps = (t & ADIS16300_SMPL_PRD_TIME_BASE) ? 53 : 1638;
319 sps /= (t & ADIS16300_SMPL_PRD_DIV_MASK) + 1;
320 len = sprintf(buf, "%d SPS\n", sps);
321 return len;
322}
323
324static ssize_t adis16300_write_frequency(struct device *dev,
325 struct device_attribute *attr,
326 const char *buf,
327 size_t len)
328{
329 struct iio_dev *indio_dev = dev_get_drvdata(dev);
330 struct adis16300_state *st = iio_dev_get_devdata(indio_dev);
331 long val;
332 int ret;
333 u8 t;
334
335 ret = strict_strtol(buf, 10, &val);
336 if (ret)
337 return ret;
338
339 mutex_lock(&indio_dev->mlock);
340
341 t = (1638 / val);
342 if (t > 0)
343 t--;
344 t &= ADIS16300_SMPL_PRD_DIV_MASK;
345 if ((t & ADIS16300_SMPL_PRD_DIV_MASK) >= 0x0A)
346 st->us->max_speed_hz = ADIS16300_SPI_SLOW;
347 else
348 st->us->max_speed_hz = ADIS16300_SPI_FAST;
349
350 ret = adis16300_spi_write_reg_8(dev,
351 ADIS16300_SMPL_PRD,
352 t);
353
354 mutex_unlock(&indio_dev->mlock);
355
356 return ret ? ret : len;
357}
358
359static ssize_t adis16300_write_reset(struct device *dev,
360 struct device_attribute *attr,
361 const char *buf, size_t len)
362{
363 if (len < 1)
364 return -1;
365 switch (buf[0]) {
366 case '1':
367 case 'y':
368 case 'Y':
369 return adis16300_reset(dev);
370 }
371 return -1;
372}
373
374
375
376int adis16300_set_irq(struct device *dev, bool enable)
377{
378 int ret;
379 u16 msc;
380 ret = adis16300_spi_read_reg_16(dev, ADIS16300_MSC_CTRL, &msc);
381 if (ret)
382 goto error_ret;
383
384 msc |= ADIS16300_MSC_CTRL_DATA_RDY_POL_HIGH;
385 msc &= ~ADIS16300_MSC_CTRL_DATA_RDY_DIO2;
386 if (enable)
387 msc |= ADIS16300_MSC_CTRL_DATA_RDY_EN;
388 else
389 msc &= ~ADIS16300_MSC_CTRL_DATA_RDY_EN;
390
391 ret = adis16300_spi_write_reg_16(dev, ADIS16300_MSC_CTRL, msc);
392 if (ret)
393 goto error_ret;
394
395error_ret:
396 return ret;
397}
398
399int adis16300_reset(struct device *dev)
400{
401 int ret;
402 ret = adis16300_spi_write_reg_8(dev,
403 ADIS16300_GLOB_CMD,
404 ADIS16300_GLOB_CMD_SW_RESET);
405 if (ret)
406 dev_err(dev, "problem resetting device");
407
408 return ret;
409}
410
411/* Power down the device */
412static int adis16300_stop_device(struct device *dev)
413{
414 int ret;
415 u16 val = ADIS16300_SLP_CNT_POWER_OFF;
416
417 ret = adis16300_spi_write_reg_16(dev, ADIS16300_SLP_CNT, val);
418 if (ret)
419 dev_err(dev, "problem with turning device off: SLP_CNT");
420
421 return ret;
422}
423
424int adis16300_check_status(struct device *dev)
425{
426 u16 status;
427 int ret;
428
429 ret = adis16300_spi_read_reg_16(dev, ADIS16300_DIAG_STAT, &status);
430
431 if (ret < 0) {
432 dev_err(dev, "Reading status failed\n");
433 goto error_ret;
434 }
435 ret = status;
436 if (status & ADIS16300_DIAG_STAT_ZACCL_FAIL)
437 dev_err(dev, "Z-axis accelerometer self-test failure\n");
438 if (status & ADIS16300_DIAG_STAT_YACCL_FAIL)
439 dev_err(dev, "Y-axis accelerometer self-test failure\n");
440 if (status & ADIS16300_DIAG_STAT_XACCL_FAIL)
441 dev_err(dev, "X-axis accelerometer self-test failure\n");
442 if (status & ADIS16300_DIAG_STAT_XGYRO_FAIL)
443 dev_err(dev, "X-axis gyroscope self-test failure\n");
444 if (status & ADIS16300_DIAG_STAT_ALARM2)
445 dev_err(dev, "Alarm 2 active\n");
446 if (status & ADIS16300_DIAG_STAT_ALARM1)
447 dev_err(dev, "Alarm 1 active\n");
448 if (status & ADIS16300_DIAG_STAT_FLASH_CHK)
449 dev_err(dev, "Flash checksum error\n");
450 if (status & ADIS16300_DIAG_STAT_SELF_TEST)
451 dev_err(dev, "Self test error\n");
452 if (status & ADIS16300_DIAG_STAT_OVERFLOW)
453 dev_err(dev, "Sensor overrange\n");
454 if (status & ADIS16300_DIAG_STAT_SPI_FAIL)
455 dev_err(dev, "SPI failure\n");
456 if (status & ADIS16300_DIAG_STAT_FLASH_UPT)
457 dev_err(dev, "Flash update failed\n");
458 if (status & ADIS16300_DIAG_STAT_POWER_HIGH)
459 dev_err(dev, "Power supply above 5.25V\n");
460 if (status & ADIS16300_DIAG_STAT_POWER_LOW)
461 dev_err(dev, "Power supply below 4.75V\n");
462
463error_ret:
464 return ret;
465}
466
467static int adis16300_initial_setup(struct adis16300_state *st)
468{
469 int ret;
470 u16 smp_prd;
471 struct device *dev = &st->indio_dev->dev;
472
473 /* use low spi speed for init */
474 st->us->max_speed_hz = ADIS16300_SPI_SLOW;
475 st->us->mode = SPI_MODE_3;
476 spi_setup(st->us);
477
478 /* Disable IRQ */
479 ret = adis16300_set_irq(dev, false);
480 if (ret) {
481 dev_err(dev, "disable irq failed");
482 goto err_ret;
483 }
484
485 /* Do self test */
486
487 /* Read status register to check the result */
488 ret = adis16300_check_status(dev);
489 if (ret) {
490 adis16300_reset(dev);
491 dev_err(dev, "device not playing ball -> reset");
492 msleep(ADIS16300_STARTUP_DELAY);
493 ret = adis16300_check_status(dev);
494 if (ret) {
495 dev_err(dev, "giving up");
496 goto err_ret;
497 }
498 }
499
500 printk(KERN_INFO DRIVER_NAME ": at CS%d (irq %d)\n",
501 st->us->chip_select, st->us->irq);
502
503 /* use high spi speed if possible */
504 ret = adis16300_spi_read_reg_16(dev, ADIS16300_SMPL_PRD, &smp_prd);
505 if (!ret && (smp_prd & ADIS16300_SMPL_PRD_DIV_MASK) < 0x0A) {
506 st->us->max_speed_hz = ADIS16300_SPI_SLOW;
507 spi_setup(st->us);
508 }
509
510err_ret:
511 return ret;
512}
513
514static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO,
515 adis16300_read_12bit_signed,
516 adis16300_write_16bit,
517 ADIS16300_XACCL_OFF);
518
519static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO,
520 adis16300_read_12bit_signed,
521 adis16300_write_16bit,
522 ADIS16300_YACCL_OFF);
523
524static IIO_DEV_ATTR_ACCEL_Z_OFFSET(S_IWUSR | S_IRUGO,
525 adis16300_read_12bit_signed,
526 adis16300_write_16bit,
527 ADIS16300_ZACCL_OFF);
528
529static IIO_DEV_ATTR_IN_NAMED_RAW(supply, adis16300_read_14bit_signed,
530 ADIS16300_SUPPLY_OUT);
531static IIO_CONST_ATTR(in_supply_scale, "0.00242");
532
533static IIO_DEV_ATTR_GYRO_X(adis16300_read_14bit_signed,
534 ADIS16300_XGYRO_OUT);
535static IIO_CONST_ATTR(gyro_scale, "0.05 deg/s");
536
537static IIO_DEV_ATTR_ACCEL_X(adis16300_read_14bit_signed,
538 ADIS16300_XACCL_OUT);
539static IIO_DEV_ATTR_ACCEL_Y(adis16300_read_14bit_signed,
540 ADIS16300_YACCL_OUT);
541static IIO_DEV_ATTR_ACCEL_Z(adis16300_read_14bit_signed,
542 ADIS16300_ZACCL_OUT);
543static IIO_CONST_ATTR(accel_scale, "0.0006 g");
544
545static IIO_DEV_ATTR_INCLI_X(adis16300_read_13bit_signed,
546 ADIS16300_XINCLI_OUT);
547static IIO_DEV_ATTR_INCLI_Y(adis16300_read_13bit_signed,
548 ADIS16300_YINCLI_OUT);
549static IIO_CONST_ATTR(incli_scale, "0.044 d");
550
551static IIO_DEV_ATTR_TEMP_RAW(adis16300_read_12bit_signed);
552static IIO_CONST_ATTR(temp_offset, "198.16 K");
553static IIO_CONST_ATTR(temp_scale, "0.14 K");
554
555static IIO_DEV_ATTR_IN_RAW(0, adis16300_read_12bit_unsigned,
556 ADIS16300_AUX_ADC);
557static IIO_CONST_ATTR(in0_scale, "0.000806");
558
559static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
560 adis16300_read_frequency,
561 adis16300_write_frequency);
562
563static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16300_write_reset, 0);
564
565static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("409 546 819 1638");
566
567static IIO_CONST_ATTR(name, "adis16300");
568
569static struct attribute *adis16300_event_attributes[] = {
570 NULL
571};
572
573static struct attribute_group adis16300_event_attribute_group = {
574 .attrs = adis16300_event_attributes,
575};
576
577static struct attribute *adis16300_attributes[] = {
578 &iio_dev_attr_accel_x_offset.dev_attr.attr,
579 &iio_dev_attr_accel_y_offset.dev_attr.attr,
580 &iio_dev_attr_accel_z_offset.dev_attr.attr,
581 &iio_dev_attr_in_supply_raw.dev_attr.attr,
582 &iio_const_attr_in_supply_scale.dev_attr.attr,
583 &iio_dev_attr_gyro_x_raw.dev_attr.attr,
584 &iio_const_attr_gyro_scale.dev_attr.attr,
585 &iio_dev_attr_accel_x_raw.dev_attr.attr,
586 &iio_dev_attr_accel_y_raw.dev_attr.attr,
587 &iio_dev_attr_accel_z_raw.dev_attr.attr,
588 &iio_const_attr_accel_scale.dev_attr.attr,
589 &iio_dev_attr_incli_x_raw.dev_attr.attr,
590 &iio_dev_attr_incli_y_raw.dev_attr.attr,
591 &iio_const_attr_incli_scale.dev_attr.attr,
592 &iio_dev_attr_temp_raw.dev_attr.attr,
593 &iio_const_attr_temp_offset.dev_attr.attr,
594 &iio_const_attr_temp_scale.dev_attr.attr,
595 &iio_dev_attr_in0_raw.dev_attr.attr,
596 &iio_const_attr_in0_scale.dev_attr.attr,
597 &iio_dev_attr_sampling_frequency.dev_attr.attr,
598 &iio_const_attr_available_sampling_frequency.dev_attr.attr,
599 &iio_dev_attr_reset.dev_attr.attr,
600 &iio_const_attr_name.dev_attr.attr,
601 NULL
602};
603
604static const struct attribute_group adis16300_attribute_group = {
605 .attrs = adis16300_attributes,
606};
607
608static int __devinit adis16300_probe(struct spi_device *spi)
609{
610 int ret, regdone = 0;
611 struct adis16300_state *st = kzalloc(sizeof *st, GFP_KERNEL);
612 if (!st) {
613 ret = -ENOMEM;
614 goto error_ret;
615 }
616 /* this is only used for removal purposes */
617 spi_set_drvdata(spi, st);
618
619 /* Allocate the comms buffers */
620 st->rx = kzalloc(sizeof(*st->rx)*ADIS16300_MAX_RX, GFP_KERNEL);
621 if (st->rx == NULL) {
622 ret = -ENOMEM;
623 goto error_free_st;
624 }
625 st->tx = kzalloc(sizeof(*st->tx)*ADIS16300_MAX_TX, GFP_KERNEL);
626 if (st->tx == NULL) {
627 ret = -ENOMEM;
628 goto error_free_rx;
629 }
630 st->us = spi;
631 mutex_init(&st->buf_lock);
632 /* setup the industrialio driver allocated elements */
633 st->indio_dev = iio_allocate_device();
634 if (st->indio_dev == NULL) {
635 ret = -ENOMEM;
636 goto error_free_tx;
637 }
638
639 st->indio_dev->dev.parent = &spi->dev;
640 st->indio_dev->num_interrupt_lines = 1;
641 st->indio_dev->event_attrs = &adis16300_event_attribute_group;
642 st->indio_dev->attrs = &adis16300_attribute_group;
643 st->indio_dev->dev_data = (void *)(st);
644 st->indio_dev->driver_module = THIS_MODULE;
645 st->indio_dev->modes = INDIO_DIRECT_MODE;
646
647 ret = adis16300_configure_ring(st->indio_dev);
648 if (ret)
649 goto error_free_dev;
650
651 ret = iio_device_register(st->indio_dev);
652 if (ret)
653 goto error_unreg_ring_funcs;
654 regdone = 1;
655
656 ret = adis16300_initialize_ring(st->indio_dev->ring);
657 if (ret) {
658 printk(KERN_ERR "failed to initialize the ring\n");
659 goto error_unreg_ring_funcs;
660 }
661
662 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) {
663#if 0 /* fixme: here we should support */
664 iio_init_work_cont(&st->work_cont_thresh,
665 NULL,
666 adis16300_thresh_handler_bh_no_check,
667 0,
668 0,
669 st);
670#endif
671 ret = iio_register_interrupt_line(spi->irq,
672 st->indio_dev,
673 0,
674 IRQF_TRIGGER_RISING,
675 "adis16300");
676 if (ret)
677 goto error_uninitialize_ring;
678
679 ret = adis16300_probe_trigger(st->indio_dev);
680 if (ret)
681 goto error_unregister_line;
682 }
683
684 /* Get the device into a sane initial state */
685 ret = adis16300_initial_setup(st);
686 if (ret)
687 goto error_remove_trigger;
688 return 0;
689
690error_remove_trigger:
691 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
692 adis16300_remove_trigger(st->indio_dev);
693error_unregister_line:
694 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
695 iio_unregister_interrupt_line(st->indio_dev, 0);
696error_uninitialize_ring:
697 adis16300_uninitialize_ring(st->indio_dev->ring);
698error_unreg_ring_funcs:
699 adis16300_unconfigure_ring(st->indio_dev);
700error_free_dev:
701 if (regdone)
702 iio_device_unregister(st->indio_dev);
703 else
704 iio_free_device(st->indio_dev);
705error_free_tx:
706 kfree(st->tx);
707error_free_rx:
708 kfree(st->rx);
709error_free_st:
710 kfree(st);
711error_ret:
712 return ret;
713}
714
715/* fixme, confirm ordering in this function */
716static int adis16300_remove(struct spi_device *spi)
717{
718 int ret;
719 struct adis16300_state *st = spi_get_drvdata(spi);
720 struct iio_dev *indio_dev = st->indio_dev;
721
722 ret = adis16300_stop_device(&(indio_dev->dev));
723 if (ret)
724 goto err_ret;
725
726 flush_scheduled_work();
727
728 adis16300_remove_trigger(indio_dev);
729 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0)
730 iio_unregister_interrupt_line(indio_dev, 0);
731
732 adis16300_uninitialize_ring(indio_dev->ring);
733 adis16300_unconfigure_ring(indio_dev);
734 iio_device_unregister(indio_dev);
735 kfree(st->tx);
736 kfree(st->rx);
737 kfree(st);
738
739 return 0;
740
741err_ret:
742 return ret;
743}
744
745static struct spi_driver adis16300_driver = {
746 .driver = {
747 .name = "adis16300",
748 .owner = THIS_MODULE,
749 },
750 .probe = adis16300_probe,
751 .remove = __devexit_p(adis16300_remove),
752};
753
754static __init int adis16300_init(void)
755{
756 return spi_register_driver(&adis16300_driver);
757}
758module_init(adis16300_init);
759
760static __exit void adis16300_exit(void)
761{
762 spi_unregister_driver(&adis16300_driver);
763}
764module_exit(adis16300_exit);
765
766MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
767MODULE_DESCRIPTION("Analog Devices ADIS16300 IMU SPI driver");
768MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/imu/adis16300_ring.c b/drivers/staging/iio/imu/adis16300_ring.c
new file mode 100644
index 000000000000..76cf8a6f3c3f
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16300_ring.c
@@ -0,0 +1,233 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/gpio.h>
4#include <linux/workqueue.h>
5#include <linux/mutex.h>
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/spi/spi.h>
9#include <linux/sysfs.h>
10#include <linux/list.h>
11
12#include "../iio.h"
13#include "../sysfs.h"
14#include "../ring_sw.h"
15#include "../accel/accel.h"
16#include "../trigger.h"
17#include "adis16300.h"
18
19/**
20 * combine_8_to_16() utility function to munge to u8s into u16
21 **/
22static inline u16 combine_8_to_16(u8 lower, u8 upper)
23{
24 u16 _lower = lower;
25 u16 _upper = upper;
26 return _lower | (_upper << 8);
27}
28
29static IIO_SCAN_EL_C(supply, ADIS16300_SCAN_SUPPLY, IIO_SIGNED(14),
30 ADIS16300_SUPPLY_OUT, NULL);
31
32static IIO_SCAN_EL_C(gyro_x, ADIS16300_SCAN_GYRO_X, IIO_SIGNED(14),
33 ADIS16300_XGYRO_OUT, NULL);
34
35static IIO_SCAN_EL_C(accel_x, ADIS16300_SCAN_ACC_X, IIO_SIGNED(14),
36 ADIS16300_XACCL_OUT, NULL);
37static IIO_SCAN_EL_C(accel_y, ADIS16300_SCAN_ACC_Y, IIO_SIGNED(14),
38 ADIS16300_YACCL_OUT, NULL);
39static IIO_SCAN_EL_C(accel_z, ADIS16300_SCAN_ACC_Z, IIO_SIGNED(14),
40 ADIS16300_ZACCL_OUT, NULL);
41
42static IIO_SCAN_EL_C(temp, ADIS16300_SCAN_TEMP, IIO_SIGNED(12),
43 ADIS16300_TEMP_OUT, NULL);
44static IIO_SCAN_EL_C(adc_0, ADIS16300_SCAN_ADC_0, IIO_SIGNED(12),
45 ADIS16300_AUX_ADC, NULL);
46
47static IIO_SCAN_EL_C(incli_x, ADIS16300_SCAN_INCLI_X, IIO_SIGNED(12),
48 ADIS16300_XINCLI_OUT, NULL);
49static IIO_SCAN_EL_C(incli_y, ADIS16300_SCAN_INCLI_Y, IIO_SIGNED(12),
50 ADIS16300_YINCLI_OUT, NULL);
51
52static IIO_SCAN_EL_TIMESTAMP(9);
53
54static struct attribute *adis16300_scan_el_attrs[] = {
55 &iio_scan_el_supply.dev_attr.attr,
56 &iio_scan_el_gyro_x.dev_attr.attr,
57 &iio_scan_el_temp.dev_attr.attr,
58 &iio_scan_el_accel_x.dev_attr.attr,
59 &iio_scan_el_accel_y.dev_attr.attr,
60 &iio_scan_el_accel_z.dev_attr.attr,
61 &iio_scan_el_incli_x.dev_attr.attr,
62 &iio_scan_el_incli_y.dev_attr.attr,
63 &iio_scan_el_adc_0.dev_attr.attr,
64 &iio_scan_el_timestamp.dev_attr.attr,
65 NULL,
66};
67
68static struct attribute_group adis16300_scan_el_group = {
69 .attrs = adis16300_scan_el_attrs,
70 .name = "scan_elements",
71};
72
73/**
74 * adis16300_poll_func_th() top half interrupt handler called by trigger
75 * @private_data: iio_dev
76 **/
77static void adis16300_poll_func_th(struct iio_dev *indio_dev)
78{
79 struct adis16300_state *st = iio_dev_get_devdata(indio_dev);
80 st->last_timestamp = indio_dev->trig->timestamp;
81 schedule_work(&st->work_trigger_to_ring);
82 /* Indicate that this interrupt is being handled */
83
84 /* Technically this is trigger related, but without this
85 * handler running there is currently no way for the interrupt
86 * to clear.
87 */
88}
89
90/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
91 * specific to be rolled into the core.
92 */
93static void adis16300_trigger_bh_to_ring(struct work_struct *work_s)
94{
95 struct adis16300_state *st
96 = container_of(work_s, struct adis16300_state,
97 work_trigger_to_ring);
98
99 int i = 0;
100 s16 *data;
101 size_t datasize = st->indio_dev
102 ->ring->access.get_bpd(st->indio_dev->ring);
103
104 data = kmalloc(datasize , GFP_KERNEL);
105 if (data == NULL) {
106 dev_err(&st->us->dev, "memory alloc failed in ring bh");
107 return;
108 }
109
110 if (st->indio_dev->scan_count)
111 if (adis16300_spi_read_burst(&st->indio_dev->dev, st->rx) >= 0)
112 for (; i < st->indio_dev->scan_count; i++) {
113 data[i] = combine_8_to_16(st->rx[i*2+1],
114 st->rx[i*2]);
115 }
116
117 /* Guaranteed to be aligned with 8 byte boundary */
118 if (st->indio_dev->scan_timestamp)
119 *((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
120
121 st->indio_dev->ring->access.store_to(st->indio_dev->ring,
122 (u8 *)data,
123 st->last_timestamp);
124
125 iio_trigger_notify_done(st->indio_dev->trig);
126 kfree(data);
127
128 return;
129}
130/* in these circumstances is it better to go with unaligned packing and
131 * deal with the cost?*/
132static int adis16300_data_rdy_ring_preenable(struct iio_dev *indio_dev)
133{
134 size_t size;
135 dev_dbg(&indio_dev->dev, "%s\n", __func__);
136 /* Check if there are any scan elements enabled, if not fail*/
137 if (!(indio_dev->scan_count || indio_dev->scan_timestamp))
138 return -EINVAL;
139
140 if (indio_dev->ring->access.set_bpd) {
141 if (indio_dev->scan_timestamp)
142 if (indio_dev->scan_count) /* Timestamp and data */
143 size = 4*sizeof(s64);
144 else /* Timestamp only */
145 size = sizeof(s64);
146 else /* Data only */
147 size = indio_dev->scan_count*sizeof(s16);
148 indio_dev->ring->access.set_bpd(indio_dev->ring, size);
149 }
150
151 return 0;
152}
153
154static int adis16300_data_rdy_ring_postenable(struct iio_dev *indio_dev)
155{
156 return indio_dev->trig
157 ? iio_trigger_attach_poll_func(indio_dev->trig,
158 indio_dev->pollfunc)
159 : 0;
160}
161
162static int adis16300_data_rdy_ring_predisable(struct iio_dev *indio_dev)
163{
164 return indio_dev->trig
165 ? iio_trigger_dettach_poll_func(indio_dev->trig,
166 indio_dev->pollfunc)
167 : 0;
168}
169
170void adis16300_unconfigure_ring(struct iio_dev *indio_dev)
171{
172 kfree(indio_dev->pollfunc);
173 iio_sw_rb_free(indio_dev->ring);
174}
175
176int adis16300_configure_ring(struct iio_dev *indio_dev)
177{
178 int ret = 0;
179 struct adis16300_state *st = indio_dev->dev_data;
180 struct iio_ring_buffer *ring;
181 INIT_WORK(&st->work_trigger_to_ring, adis16300_trigger_bh_to_ring);
182 /* Set default scan mode */
183
184 iio_scan_mask_set(indio_dev, iio_scan_el_supply.number);
185 iio_scan_mask_set(indio_dev, iio_scan_el_gyro_x.number);
186 iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
187 iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
188 iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
189 iio_scan_mask_set(indio_dev, iio_scan_el_temp.number);
190 iio_scan_mask_set(indio_dev, iio_scan_el_adc_0.number);
191 iio_scan_mask_set(indio_dev, iio_scan_el_incli_x.number);
192 iio_scan_mask_set(indio_dev, iio_scan_el_incli_y.number);
193 indio_dev->scan_timestamp = true;
194
195 indio_dev->scan_el_attrs = &adis16300_scan_el_group;
196
197 ring = iio_sw_rb_allocate(indio_dev);
198 if (!ring) {
199 ret = -ENOMEM;
200 return ret;
201 }
202 indio_dev->ring = ring;
203 /* Effectively select the ring buffer implementation */
204 iio_ring_sw_register_funcs(&ring->access);
205 ring->preenable = &adis16300_data_rdy_ring_preenable;
206 ring->postenable = &adis16300_data_rdy_ring_postenable;
207 ring->predisable = &adis16300_data_rdy_ring_predisable;
208 ring->owner = THIS_MODULE;
209
210 indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
211 if (indio_dev->pollfunc == NULL) {
212 ret = -ENOMEM;
213 goto error_iio_sw_rb_free;;
214 }
215 indio_dev->pollfunc->poll_func_main = &adis16300_poll_func_th;
216 indio_dev->pollfunc->private_data = indio_dev;
217 indio_dev->modes |= INDIO_RING_TRIGGERED;
218 return 0;
219
220error_iio_sw_rb_free:
221 iio_sw_rb_free(indio_dev->ring);
222 return ret;
223}
224
225int adis16300_initialize_ring(struct iio_ring_buffer *ring)
226{
227 return iio_ring_buffer_register(ring, 0);
228}
229
230void adis16300_uninitialize_ring(struct iio_ring_buffer *ring)
231{
232 iio_ring_buffer_unregister(ring);
233}
diff --git a/drivers/staging/iio/imu/adis16300_trigger.c b/drivers/staging/iio/imu/adis16300_trigger.c
new file mode 100644
index 000000000000..54edb20bf119
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16300_trigger.c
@@ -0,0 +1,127 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/mutex.h>
4#include <linux/device.h>
5#include <linux/kernel.h>
6#include <linux/sysfs.h>
7#include <linux/list.h>
8#include <linux/spi/spi.h>
9
10#include "../iio.h"
11#include "../sysfs.h"
12#include "../trigger.h"
13#include "adis16300.h"
14
15/**
16 * adis16300_data_rdy_trig_poll() the event handler for the data rdy trig
17 **/
18static int adis16300_data_rdy_trig_poll(struct iio_dev *dev_info,
19 int index,
20 s64 timestamp,
21 int no_test)
22{
23 struct adis16300_state *st = iio_dev_get_devdata(dev_info);
24 struct iio_trigger *trig = st->trig;
25
26 trig->timestamp = timestamp;
27 iio_trigger_poll(trig);
28
29 return IRQ_HANDLED;
30}
31
32IIO_EVENT_SH(data_rdy_trig, &adis16300_data_rdy_trig_poll);
33
34static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
35
36static struct attribute *adis16300_trigger_attrs[] = {
37 &dev_attr_name.attr,
38 NULL,
39};
40
41static const struct attribute_group adis16300_trigger_attr_group = {
42 .attrs = adis16300_trigger_attrs,
43};
44
45/**
46 * adis16300_data_rdy_trigger_set_state() set datardy interrupt state
47 **/
48static int adis16300_data_rdy_trigger_set_state(struct iio_trigger *trig,
49 bool state)
50{
51 struct adis16300_state *st = trig->private_data;
52 struct iio_dev *indio_dev = st->indio_dev;
53 int ret = 0;
54
55 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
56 ret = adis16300_set_irq(&st->indio_dev->dev, state);
57 if (state == false) {
58 iio_remove_event_from_list(&iio_event_data_rdy_trig,
59 &indio_dev->interrupts[0]
60 ->ev_list);
61 /* possible quirk with handler currently worked around
62 by ensuring the work queue is empty */
63 flush_scheduled_work();
64 } else {
65 iio_add_event_to_list(&iio_event_data_rdy_trig,
66 &indio_dev->interrupts[0]->ev_list);
67 }
68 return ret;
69}
70
71/**
72 * adis16300_trig_try_reen() try renabling irq for data rdy trigger
73 * @trig: the datardy trigger
74 **/
75static int adis16300_trig_try_reen(struct iio_trigger *trig)
76{
77 struct adis16300_state *st = trig->private_data;
78 enable_irq(st->us->irq);
79 /* irq reenabled so success! */
80 return 0;
81}
82
83int adis16300_probe_trigger(struct iio_dev *indio_dev)
84{
85 int ret;
86 struct adis16300_state *st = indio_dev->dev_data;
87
88 st->trig = iio_allocate_trigger();
89 st->trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
90 if (!st->trig->name) {
91 ret = -ENOMEM;
92 goto error_free_trig;
93 }
94 snprintf((char *)st->trig->name,
95 IIO_TRIGGER_NAME_LENGTH,
96 "adis16300-dev%d", indio_dev->id);
97 st->trig->dev.parent = &st->us->dev;
98 st->trig->owner = THIS_MODULE;
99 st->trig->private_data = st;
100 st->trig->set_trigger_state = &adis16300_data_rdy_trigger_set_state;
101 st->trig->try_reenable = &adis16300_trig_try_reen;
102 st->trig->control_attrs = &adis16300_trigger_attr_group;
103 ret = iio_trigger_register(st->trig);
104
105 /* select default trigger */
106 indio_dev->trig = st->trig;
107 if (ret)
108 goto error_free_trig_name;
109
110 return 0;
111
112error_free_trig_name:
113 kfree(st->trig->name);
114error_free_trig:
115 iio_free_trigger(st->trig);
116
117 return ret;
118}
119
120void adis16300_remove_trigger(struct iio_dev *indio_dev)
121{
122 struct adis16300_state *state = indio_dev->dev_data;
123
124 iio_trigger_unregister(state->trig);
125 kfree(state->trig->name);
126 iio_free_trigger(state->trig);
127}
diff --git a/drivers/staging/iio/imu/adis16350.h b/drivers/staging/iio/imu/adis16350.h
new file mode 100644
index 000000000000..334b18ace38e
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16350.h
@@ -0,0 +1,193 @@
1#ifndef SPI_ADIS16350_H_
2#define SPI_ADIS16350_H_
3
4#define ADIS16350_STARTUP_DELAY 220 /* ms */
5
6#define ADIS16350_READ_REG(a) a
7#define ADIS16350_WRITE_REG(a) ((a) | 0x80)
8
9#define ADIS16350_FLASH_CNT 0x00 /* Flash memory write count */
10#define ADIS16350_SUPPLY_OUT 0x02 /* Power supply measurement */
11#define ADIS16350_XGYRO_OUT 0x04 /* X-axis gyroscope output */
12#define ADIS16350_YGYRO_OUT 0x06 /* Y-axis gyroscope output */
13#define ADIS16350_ZGYRO_OUT 0x08 /* Z-axis gyroscope output */
14#define ADIS16350_XACCL_OUT 0x0A /* X-axis accelerometer output */
15#define ADIS16350_YACCL_OUT 0x0C /* Y-axis accelerometer output */
16#define ADIS16350_ZACCL_OUT 0x0E /* Z-axis accelerometer output */
17#define ADIS16350_XTEMP_OUT 0x10 /* X-axis gyroscope temperature measurement */
18#define ADIS16350_YTEMP_OUT 0x12 /* Y-axis gyroscope temperature measurement */
19#define ADIS16350_ZTEMP_OUT 0x14 /* Z-axis gyroscope temperature measurement */
20#define ADIS16350_AUX_ADC 0x16 /* Auxiliary ADC measurement */
21
22/* Calibration parameters */
23#define ADIS16350_XGYRO_OFF 0x1A /* X-axis gyroscope bias offset factor */
24#define ADIS16350_YGYRO_OFF 0x1C /* Y-axis gyroscope bias offset factor */
25#define ADIS16350_ZGYRO_OFF 0x1E /* Z-axis gyroscope bias offset factor */
26#define ADIS16350_XACCL_OFF 0x20 /* X-axis acceleration bias offset factor */
27#define ADIS16350_YACCL_OFF 0x22 /* Y-axis acceleration bias offset factor */
28#define ADIS16350_ZACCL_OFF 0x24 /* Z-axis acceleration bias offset factor */
29
30#define ADIS16350_GPIO_CTRL 0x32 /* Auxiliary digital input/output control */
31#define ADIS16350_MSC_CTRL 0x34 /* Miscellaneous control */
32#define ADIS16350_SMPL_PRD 0x36 /* Internal sample period (rate) control */
33#define ADIS16350_SENS_AVG 0x38 /* Dynamic range and digital filter control */
34#define ADIS16350_SLP_CNT 0x3A /* Sleep mode control */
35#define ADIS16350_DIAG_STAT 0x3C /* System status */
36
37/* Alarm functions */
38#define ADIS16350_GLOB_CMD 0x3E /* System command */
39#define ADIS16350_ALM_MAG1 0x26 /* Alarm 1 amplitude threshold */
40#define ADIS16350_ALM_MAG2 0x28 /* Alarm 2 amplitude threshold */
41#define ADIS16350_ALM_SMPL1 0x2A /* Alarm 1 sample size */
42#define ADIS16350_ALM_SMPL2 0x2C /* Alarm 2 sample size */
43#define ADIS16350_ALM_CTRL 0x2E /* Alarm control */
44#define ADIS16350_AUX_DAC 0x30 /* Auxiliary DAC data */
45
46#define ADIS16350_ERROR_ACTIVE (1<<14)
47#define ADIS16350_NEW_DATA (1<<15)
48
49/* MSC_CTRL */
50#define ADIS16350_MSC_CTRL_MEM_TEST (1<<11)
51#define ADIS16350_MSC_CTRL_INT_SELF_TEST (1<<10)
52#define ADIS16350_MSC_CTRL_NEG_SELF_TEST (1<<9)
53#define ADIS16350_MSC_CTRL_POS_SELF_TEST (1<<8)
54#define ADIS16350_MSC_CTRL_GYRO_BIAS (1<<7)
55#define ADIS16350_MSC_CTRL_ACCL_ALIGN (1<<6)
56#define ADIS16350_MSC_CTRL_DATA_RDY_EN (1<<2)
57#define ADIS16350_MSC_CTRL_DATA_RDY_POL_HIGH (1<<1)
58#define ADIS16350_MSC_CTRL_DATA_RDY_DIO2 (1<<0)
59
60/* SMPL_PRD */
61#define ADIS16350_SMPL_PRD_TIME_BASE (1<<7)
62#define ADIS16350_SMPL_PRD_DIV_MASK 0x7F
63
64/* DIAG_STAT */
65#define ADIS16350_DIAG_STAT_ZACCL_FAIL (1<<15)
66#define ADIS16350_DIAG_STAT_YACCL_FAIL (1<<14)
67#define ADIS16350_DIAG_STAT_XACCL_FAIL (1<<13)
68#define ADIS16350_DIAG_STAT_XGYRO_FAIL (1<<12)
69#define ADIS16350_DIAG_STAT_YGYRO_FAIL (1<<11)
70#define ADIS16350_DIAG_STAT_ZGYRO_FAIL (1<<10)
71#define ADIS16350_DIAG_STAT_ALARM2 (1<<9)
72#define ADIS16350_DIAG_STAT_ALARM1 (1<<8)
73#define ADIS16350_DIAG_STAT_FLASH_CHK (1<<6)
74#define ADIS16350_DIAG_STAT_SELF_TEST (1<<5)
75#define ADIS16350_DIAG_STAT_OVERFLOW (1<<4)
76#define ADIS16350_DIAG_STAT_SPI_FAIL (1<<3)
77#define ADIS16350_DIAG_STAT_FLASH_UPT (1<<2)
78#define ADIS16350_DIAG_STAT_POWER_HIGH (1<<1)
79#define ADIS16350_DIAG_STAT_POWER_LOW (1<<0)
80
81/* GLOB_CMD */
82#define ADIS16350_GLOB_CMD_SW_RESET (1<<7)
83#define ADIS16350_GLOB_CMD_P_AUTO_NULL (1<<4)
84#define ADIS16350_GLOB_CMD_FLASH_UPD (1<<3)
85#define ADIS16350_GLOB_CMD_DAC_LATCH (1<<2)
86#define ADIS16350_GLOB_CMD_FAC_CALIB (1<<1)
87#define ADIS16350_GLOB_CMD_AUTO_NULL (1<<0)
88
89/* SLP_CNT */
90#define ADIS16350_SLP_CNT_POWER_OFF (1<<8)
91
92#define ADIS16350_MAX_TX 24
93#define ADIS16350_MAX_RX 24
94
95#define ADIS16350_SPI_SLOW (u32)(300 * 1000)
96#define ADIS16350_SPI_BURST (u32)(1000 * 1000)
97#define ADIS16350_SPI_FAST (u32)(2000 * 1000)
98
99/**
100 * struct adis16350_state - device instance specific data
101 * @us: actual spi_device
102 * @work_trigger_to_ring: bh for triggered event handling
103 * @work_cont_thresh: CLEAN
104 * @inter: used to check if new interrupt has been triggered
105 * @last_timestamp: passing timestamp from th to bh of interrupt handler
106 * @indio_dev: industrial I/O device structure
107 * @trig: data ready trigger registered with iio
108 * @tx: transmit buffer
109 * @rx: recieve buffer
110 * @buf_lock: mutex to protect tx and rx
111 **/
112struct adis16350_state {
113 struct spi_device *us;
114 struct work_struct work_trigger_to_ring;
115 struct iio_work_cont work_cont_data_rdy;
116 s64 last_timestamp;
117 struct iio_dev *indio_dev;
118 struct iio_trigger *trig;
119 u8 *tx;
120 u8 *rx;
121 struct mutex buf_lock;
122};
123
124int adis16350_set_irq(struct device *dev, bool enable);
125
126#ifdef CONFIG_IIO_RING_BUFFER
127
128enum adis16350_scan {
129 ADIS16350_SCAN_SUPPLY,
130 ADIS16350_SCAN_GYRO_X,
131 ADIS16350_SCAN_GYRO_Y,
132 ADIS16350_SCAN_GYRO_Z,
133 ADIS16350_SCAN_ACC_X,
134 ADIS16350_SCAN_ACC_Y,
135 ADIS16350_SCAN_ACC_Z,
136 ADIS16350_SCAN_TEMP_X,
137 ADIS16350_SCAN_TEMP_Y,
138 ADIS16350_SCAN_TEMP_Z,
139 ADIS16350_SCAN_ADC_0
140};
141
142void adis16350_remove_trigger(struct iio_dev *indio_dev);
143int adis16350_probe_trigger(struct iio_dev *indio_dev);
144
145ssize_t adis16350_read_data_from_ring(struct device *dev,
146 struct device_attribute *attr,
147 char *buf);
148
149
150int adis16350_configure_ring(struct iio_dev *indio_dev);
151void adis16350_unconfigure_ring(struct iio_dev *indio_dev);
152
153int adis16350_initialize_ring(struct iio_ring_buffer *ring);
154void adis16350_uninitialize_ring(struct iio_ring_buffer *ring);
155#else /* CONFIG_IIO_RING_BUFFER */
156
157static inline void adis16350_remove_trigger(struct iio_dev *indio_dev)
158{
159}
160
161static inline int adis16350_probe_trigger(struct iio_dev *indio_dev)
162{
163 return 0;
164}
165
166static inline ssize_t
167adis16350_read_data_from_ring(struct device *dev,
168 struct device_attribute *attr,
169 char *buf)
170{
171 return 0;
172}
173
174static int adis16350_configure_ring(struct iio_dev *indio_dev)
175{
176 return 0;
177}
178
179static inline void adis16350_unconfigure_ring(struct iio_dev *indio_dev)
180{
181}
182
183static inline int adis16350_initialize_ring(struct iio_ring_buffer *ring)
184{
185 return 0;
186}
187
188static inline void adis16350_uninitialize_ring(struct iio_ring_buffer *ring)
189{
190}
191
192#endif /* CONFIG_IIO_RING_BUFFER */
193#endif /* SPI_ADIS16350_H_ */
diff --git a/drivers/staging/iio/imu/adis16350_core.c b/drivers/staging/iio/imu/adis16350_core.c
new file mode 100644
index 000000000000..0edde73ce5c2
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16350_core.c
@@ -0,0 +1,736 @@
1/*
2 * ADIS16350/54/55/60/62/64/65 high precision tri-axis inertial sensor
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/gpio.h>
12#include <linux/delay.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/spi/spi.h>
17
18#include <linux/sysfs.h>
19#include <linux/list.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "../accel/accel.h"
24#include "../adc/adc.h"
25#include "../gyro/gyro.h"
26
27#include "adis16350.h"
28
29#define DRIVER_NAME "adis16350"
30
31static int adis16350_check_status(struct device *dev);
32
33/**
34 * adis16350_spi_write_reg_8() - write single byte to a register
35 * @dev: device associated with child of actual device (iio_dev or iio_trig)
36 * @reg_address: the address of the register to be written
37 * @val: the value to write
38 **/
39static int adis16350_spi_write_reg_8(struct device *dev,
40 u8 reg_address,
41 u8 val)
42{
43 int ret;
44 struct iio_dev *indio_dev = dev_get_drvdata(dev);
45 struct adis16350_state *st = iio_dev_get_devdata(indio_dev);
46
47 mutex_lock(&st->buf_lock);
48 st->tx[0] = ADIS16350_WRITE_REG(reg_address);
49 st->tx[1] = val;
50
51 ret = spi_write(st->us, st->tx, 2);
52 mutex_unlock(&st->buf_lock);
53
54 return ret;
55}
56
57/**
58 * adis16350_spi_write_reg_16() - write 2 bytes to a pair of registers
59 * @dev: device associated with child of actual device (iio_dev or iio_trig)
60 * @reg_address: the address of the lower of the two registers. Second register
61 * is assumed to have address one greater.
62 * @val: value to be written
63 **/
64static int adis16350_spi_write_reg_16(struct device *dev,
65 u8 lower_reg_address,
66 u16 value)
67{
68 int ret;
69 struct spi_message msg;
70 struct iio_dev *indio_dev = dev_get_drvdata(dev);
71 struct adis16350_state *st = iio_dev_get_devdata(indio_dev);
72 struct spi_transfer xfers[] = {
73 {
74 .tx_buf = st->tx,
75 .bits_per_word = 8,
76 .len = 2,
77 .cs_change = 1,
78 .delay_usecs = 25,
79 }, {
80 .tx_buf = st->tx + 2,
81 .bits_per_word = 8,
82 .len = 2,
83 .cs_change = 1,
84 .delay_usecs = 25,
85 },
86 };
87
88 mutex_lock(&st->buf_lock);
89 st->tx[0] = ADIS16350_WRITE_REG(lower_reg_address);
90 st->tx[1] = value & 0xFF;
91 st->tx[2] = ADIS16350_WRITE_REG(lower_reg_address + 1);
92 st->tx[3] = (value >> 8) & 0xFF;
93
94 spi_message_init(&msg);
95 spi_message_add_tail(&xfers[0], &msg);
96 spi_message_add_tail(&xfers[1], &msg);
97 ret = spi_sync(st->us, &msg);
98 mutex_unlock(&st->buf_lock);
99
100 return ret;
101}
102
103/**
104 * adis16350_spi_read_reg_16() - read 2 bytes from a 16-bit register
105 * @dev: device associated with child of actual device (iio_dev or iio_trig)
106 * @reg_address: the address of the lower of the two registers. Second register
107 * is assumed to have address one greater.
108 * @val: somewhere to pass back the value read
109 **/
110static int adis16350_spi_read_reg_16(struct device *dev,
111 u8 lower_reg_address,
112 u16 *val)
113{
114 struct spi_message msg;
115 struct iio_dev *indio_dev = dev_get_drvdata(dev);
116 struct adis16350_state *st = iio_dev_get_devdata(indio_dev);
117 int ret;
118 struct spi_transfer xfers[] = {
119 {
120 .tx_buf = st->tx,
121 .bits_per_word = 8,
122 .len = 2,
123 .cs_change = 1,
124 .delay_usecs = 25,
125 }, {
126 .rx_buf = st->rx,
127 .bits_per_word = 8,
128 .len = 2,
129 .cs_change = 1,
130 .delay_usecs = 25,
131 },
132 };
133
134 mutex_lock(&st->buf_lock);
135 st->tx[0] = ADIS16350_READ_REG(lower_reg_address);
136 st->tx[1] = 0;
137 st->tx[2] = 0;
138 st->tx[3] = 0;
139
140 spi_message_init(&msg);
141 spi_message_add_tail(&xfers[0], &msg);
142 spi_message_add_tail(&xfers[1], &msg);
143 ret = spi_sync(st->us, &msg);
144 if (ret) {
145 dev_err(&st->us->dev,
146 "problem when reading 16 bit register 0x%02X",
147 lower_reg_address);
148 goto error_ret;
149 }
150 *val = (st->rx[0] << 8) | st->rx[1];
151
152error_ret:
153 mutex_unlock(&st->buf_lock);
154 return ret;
155}
156
157
158static ssize_t adis16350_spi_read_signed(struct device *dev,
159 struct device_attribute *attr,
160 char *buf,
161 unsigned bits)
162{
163 int ret;
164 s16 val = 0;
165 unsigned shift = 16 - bits;
166 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
167
168 ret = adis16350_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
169 if (ret)
170 return ret;
171
172 if (val & ADIS16350_ERROR_ACTIVE)
173 adis16350_check_status(dev);
174 val = ((s16)(val << shift) >> shift);
175 return sprintf(buf, "%d\n", val);
176}
177
178static ssize_t adis16350_read_12bit_unsigned(struct device *dev,
179 struct device_attribute *attr,
180 char *buf)
181{
182 int ret;
183 u16 val = 0;
184 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
185
186 ret = adis16350_spi_read_reg_16(dev, this_attr->address, &val);
187 if (ret)
188 return ret;
189
190 if (val & ADIS16350_ERROR_ACTIVE)
191 adis16350_check_status(dev);
192
193 return sprintf(buf, "%u\n", val & 0x0FFF);
194}
195
196static ssize_t adis16350_read_14bit_signed(struct device *dev,
197 struct device_attribute *attr,
198 char *buf)
199{
200 struct iio_dev *indio_dev = dev_get_drvdata(dev);
201 ssize_t ret;
202
203 /* Take the iio_dev status lock */
204 mutex_lock(&indio_dev->mlock);
205 ret = adis16350_spi_read_signed(dev, attr, buf, 14);
206 mutex_unlock(&indio_dev->mlock);
207
208 return ret;
209}
210
211static ssize_t adis16350_read_12bit_signed(struct device *dev,
212 struct device_attribute *attr,
213 char *buf)
214{
215 struct iio_dev *indio_dev = dev_get_drvdata(dev);
216 ssize_t ret;
217
218 /* Take the iio_dev status lock */
219 mutex_lock(&indio_dev->mlock);
220 ret = adis16350_spi_read_signed(dev, attr, buf, 12);
221 mutex_unlock(&indio_dev->mlock);
222
223 return ret;
224}
225
226static ssize_t adis16350_write_16bit(struct device *dev,
227 struct device_attribute *attr,
228 const char *buf,
229 size_t len)
230{
231 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
232 int ret;
233 long val;
234
235 ret = strict_strtol(buf, 10, &val);
236 if (ret)
237 goto error_ret;
238 ret = adis16350_spi_write_reg_16(dev, this_attr->address, val);
239
240error_ret:
241 return ret ? ret : len;
242}
243
244static ssize_t adis16350_read_frequency(struct device *dev,
245 struct device_attribute *attr,
246 char *buf)
247{
248 int ret, len = 0;
249 u16 t;
250 int sps;
251 ret = adis16350_spi_read_reg_16(dev,
252 ADIS16350_SMPL_PRD,
253 &t);
254 if (ret)
255 return ret;
256 sps = (t & ADIS16350_SMPL_PRD_TIME_BASE) ? 53 : 1638;
257 sps /= (t & ADIS16350_SMPL_PRD_DIV_MASK) + 1;
258 len = sprintf(buf, "%d SPS\n", sps);
259 return len;
260}
261
262static ssize_t adis16350_write_frequency(struct device *dev,
263 struct device_attribute *attr,
264 const char *buf,
265 size_t len)
266{
267 struct iio_dev *indio_dev = dev_get_drvdata(dev);
268 struct adis16350_state *st = iio_dev_get_devdata(indio_dev);
269 long val;
270 int ret;
271 u8 t;
272
273 ret = strict_strtol(buf, 10, &val);
274 if (ret)
275 return ret;
276
277 mutex_lock(&indio_dev->mlock);
278
279 t = (1638 / val);
280 if (t > 0)
281 t--;
282 t &= ADIS16350_SMPL_PRD_DIV_MASK;
283 if ((t & ADIS16350_SMPL_PRD_DIV_MASK) >= 0x0A)
284 st->us->max_speed_hz = ADIS16350_SPI_SLOW;
285 else
286 st->us->max_speed_hz = ADIS16350_SPI_FAST;
287
288 ret = adis16350_spi_write_reg_8(dev,
289 ADIS16350_SMPL_PRD,
290 t);
291
292 mutex_unlock(&indio_dev->mlock);
293
294 return ret ? ret : len;
295}
296
297static int adis16350_reset(struct device *dev)
298{
299 int ret;
300 ret = adis16350_spi_write_reg_8(dev,
301 ADIS16350_GLOB_CMD,
302 ADIS16350_GLOB_CMD_SW_RESET);
303 if (ret)
304 dev_err(dev, "problem resetting device");
305
306 return ret;
307}
308
309static ssize_t adis16350_write_reset(struct device *dev,
310 struct device_attribute *attr,
311 const char *buf, size_t len)
312{
313 if (len < 1)
314 return -1;
315 switch (buf[0]) {
316 case '1':
317 case 'y':
318 case 'Y':
319 return adis16350_reset(dev);
320 }
321 return -1;
322}
323
324int adis16350_set_irq(struct device *dev, bool enable)
325{
326 int ret;
327 u16 msc;
328 ret = adis16350_spi_read_reg_16(dev, ADIS16350_MSC_CTRL, &msc);
329 if (ret)
330 goto error_ret;
331
332 msc |= ADIS16350_MSC_CTRL_DATA_RDY_POL_HIGH;
333 msc &= ~ADIS16350_MSC_CTRL_DATA_RDY_DIO2;
334
335 if (enable)
336 msc |= ADIS16350_MSC_CTRL_DATA_RDY_EN;
337 else
338 msc &= ~ADIS16350_MSC_CTRL_DATA_RDY_EN;
339
340 ret = adis16350_spi_write_reg_16(dev, ADIS16350_MSC_CTRL, msc);
341 if (ret)
342 goto error_ret;
343
344error_ret:
345 return ret;
346}
347
348/* Power down the device */
349static int adis16350_stop_device(struct device *dev)
350{
351 int ret;
352 u16 val = ADIS16350_SLP_CNT_POWER_OFF;
353
354 ret = adis16350_spi_write_reg_16(dev, ADIS16350_SLP_CNT, val);
355 if (ret)
356 dev_err(dev, "problem with turning device off: SLP_CNT");
357
358 return ret;
359}
360
361static int adis16350_self_test(struct device *dev)
362{
363 int ret;
364 ret = adis16350_spi_write_reg_16(dev,
365 ADIS16350_MSC_CTRL,
366 ADIS16350_MSC_CTRL_MEM_TEST);
367 if (ret) {
368 dev_err(dev, "problem starting self test");
369 goto err_ret;
370 }
371
372 adis16350_check_status(dev);
373
374err_ret:
375 return ret;
376}
377
378static int adis16350_check_status(struct device *dev)
379{
380 u16 status;
381 int ret;
382
383 ret = adis16350_spi_read_reg_16(dev, ADIS16350_DIAG_STAT, &status);
384
385 if (ret < 0) {
386 dev_err(dev, "Reading status failed\n");
387 goto error_ret;
388 }
389 ret = status;
390 if (status & ADIS16350_DIAG_STAT_ZACCL_FAIL)
391 dev_err(dev, "Z-axis accelerometer self-test failure\n");
392 if (status & ADIS16350_DIAG_STAT_YACCL_FAIL)
393 dev_err(dev, "Y-axis accelerometer self-test failure\n");
394 if (status & ADIS16350_DIAG_STAT_XACCL_FAIL)
395 dev_err(dev, "X-axis accelerometer self-test failure\n");
396 if (status & ADIS16350_DIAG_STAT_XGYRO_FAIL)
397 dev_err(dev, "X-axis gyroscope self-test failure\n");
398 if (status & ADIS16350_DIAG_STAT_YGYRO_FAIL)
399 dev_err(dev, "Y-axis gyroscope self-test failure\n");
400 if (status & ADIS16350_DIAG_STAT_ZGYRO_FAIL)
401 dev_err(dev, "Z-axis gyroscope self-test failure\n");
402 if (status & ADIS16350_DIAG_STAT_ALARM2)
403 dev_err(dev, "Alarm 2 active\n");
404 if (status & ADIS16350_DIAG_STAT_ALARM1)
405 dev_err(dev, "Alarm 1 active\n");
406 if (status & ADIS16350_DIAG_STAT_FLASH_CHK)
407 dev_err(dev, "Flash checksum error\n");
408 if (status & ADIS16350_DIAG_STAT_SELF_TEST)
409 dev_err(dev, "Self test error\n");
410 if (status & ADIS16350_DIAG_STAT_OVERFLOW)
411 dev_err(dev, "Sensor overrange\n");
412 if (status & ADIS16350_DIAG_STAT_SPI_FAIL)
413 dev_err(dev, "SPI failure\n");
414 if (status & ADIS16350_DIAG_STAT_FLASH_UPT)
415 dev_err(dev, "Flash update failed\n");
416 if (status & ADIS16350_DIAG_STAT_POWER_HIGH)
417 dev_err(dev, "Power supply above 5.25V\n");
418 if (status & ADIS16350_DIAG_STAT_POWER_LOW)
419 dev_err(dev, "Power supply below 4.75V\n");
420
421error_ret:
422 return ret;
423}
424
425static int adis16350_initial_setup(struct adis16350_state *st)
426{
427 int ret;
428 u16 smp_prd;
429 struct device *dev = &st->indio_dev->dev;
430
431 /* use low spi speed for init */
432 st->us->max_speed_hz = ADIS16350_SPI_SLOW;
433 st->us->mode = SPI_MODE_3;
434 spi_setup(st->us);
435
436 /* Disable IRQ */
437 ret = adis16350_set_irq(dev, false);
438 if (ret) {
439 dev_err(dev, "disable irq failed");
440 goto err_ret;
441 }
442
443 /* Do self test */
444 ret = adis16350_self_test(dev);
445 if (ret) {
446 dev_err(dev, "self test failure");
447 goto err_ret;
448 }
449
450 /* Read status register to check the result */
451 ret = adis16350_check_status(dev);
452 if (ret) {
453 adis16350_reset(dev);
454 dev_err(dev, "device not playing ball -> reset");
455 msleep(ADIS16350_STARTUP_DELAY);
456 ret = adis16350_check_status(dev);
457 if (ret) {
458 dev_err(dev, "giving up");
459 goto err_ret;
460 }
461 }
462
463 printk(KERN_INFO DRIVER_NAME ": at CS%d (irq %d)\n",
464 st->us->chip_select, st->us->irq);
465
466 /* use high spi speed if possible */
467 ret = adis16350_spi_read_reg_16(dev, ADIS16350_SMPL_PRD, &smp_prd);
468 if (!ret && (smp_prd & ADIS16350_SMPL_PRD_DIV_MASK) < 0x0A) {
469 st->us->max_speed_hz = ADIS16350_SPI_SLOW;
470 spi_setup(st->us);
471 }
472
473err_ret:
474 return ret;
475}
476
477static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO,
478 adis16350_read_12bit_signed,
479 adis16350_write_16bit,
480 ADIS16350_XACCL_OFF);
481
482static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO,
483 adis16350_read_12bit_signed,
484 adis16350_write_16bit,
485 ADIS16350_YACCL_OFF);
486
487static IIO_DEV_ATTR_ACCEL_Z_OFFSET(S_IWUSR | S_IRUGO,
488 adis16350_read_12bit_signed,
489 adis16350_write_16bit,
490 ADIS16350_ZACCL_OFF);
491
492static IIO_DEV_ATTR_IN_NAMED_RAW(supply, adis16350_read_12bit_unsigned,
493 ADIS16350_SUPPLY_OUT);
494static IIO_CONST_ATTR(in_supply_scale, "0.002418");
495
496static IIO_DEV_ATTR_GYRO_X(adis16350_read_14bit_signed,
497 ADIS16350_XGYRO_OUT);
498static IIO_DEV_ATTR_GYRO_Y(adis16350_read_14bit_signed,
499 ADIS16350_YGYRO_OUT);
500static IIO_DEV_ATTR_GYRO_Z(adis16350_read_14bit_signed,
501 ADIS16350_ZGYRO_OUT);
502static IIO_CONST_ATTR(gyro_scale, "0.05");
503
504static IIO_DEV_ATTR_ACCEL_X(adis16350_read_14bit_signed,
505 ADIS16350_XACCL_OUT);
506static IIO_DEV_ATTR_ACCEL_Y(adis16350_read_14bit_signed,
507 ADIS16350_YACCL_OUT);
508static IIO_DEV_ATTR_ACCEL_Z(adis16350_read_14bit_signed,
509 ADIS16350_ZACCL_OUT);
510static IIO_CONST_ATTR(accel_scale, "0.00333");
511
512static IIO_DEVICE_ATTR(temp_x_raw, S_IRUGO, adis16350_read_12bit_signed,
513 NULL, ADIS16350_XTEMP_OUT);
514static IIO_DEVICE_ATTR(temp_y_raw, S_IRUGO, adis16350_read_12bit_signed,
515 NULL, ADIS16350_YTEMP_OUT);
516static IIO_DEVICE_ATTR(temp_z_raw, S_IRUGO, adis16350_read_12bit_signed,
517 NULL, ADIS16350_ZTEMP_OUT);
518static IIO_CONST_ATTR(temp_scale, "0.0005");
519
520static IIO_DEV_ATTR_IN_RAW(0, adis16350_read_12bit_unsigned,
521 ADIS16350_AUX_ADC);
522static IIO_CONST_ATTR(in0_scale, "0.000806");
523
524static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
525 adis16350_read_frequency,
526 adis16350_write_frequency);
527
528static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL,
529 adis16350_write_reset, 0);
530
531static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("409 546 819 1638");
532
533static IIO_CONST_ATTR(name, "adis16350");
534
535static struct attribute *adis16350_attributes[] = {
536 &iio_dev_attr_accel_x_offset.dev_attr.attr,
537 &iio_dev_attr_accel_y_offset.dev_attr.attr,
538 &iio_dev_attr_accel_z_offset.dev_attr.attr,
539 &iio_dev_attr_in_supply_raw.dev_attr.attr,
540 &iio_const_attr_in_supply_scale.dev_attr.attr,
541 &iio_dev_attr_gyro_x_raw.dev_attr.attr,
542 &iio_dev_attr_gyro_y_raw.dev_attr.attr,
543 &iio_dev_attr_gyro_z_raw.dev_attr.attr,
544 &iio_const_attr_gyro_scale.dev_attr.attr,
545 &iio_dev_attr_accel_x_raw.dev_attr.attr,
546 &iio_dev_attr_accel_y_raw.dev_attr.attr,
547 &iio_dev_attr_accel_z_raw.dev_attr.attr,
548 &iio_const_attr_accel_scale.dev_attr.attr,
549 &iio_dev_attr_temp_x_raw.dev_attr.attr,
550 &iio_dev_attr_temp_y_raw.dev_attr.attr,
551 &iio_dev_attr_temp_z_raw.dev_attr.attr,
552 &iio_const_attr_temp_scale.dev_attr.attr,
553 &iio_dev_attr_in0_raw.dev_attr.attr,
554 &iio_const_attr_in0_scale.dev_attr.attr,
555 &iio_dev_attr_sampling_frequency.dev_attr.attr,
556 &iio_const_attr_available_sampling_frequency.dev_attr.attr,
557 &iio_dev_attr_reset.dev_attr.attr,
558 &iio_const_attr_name.dev_attr.attr,
559 NULL
560};
561
562static const struct attribute_group adis16350_attribute_group = {
563 .attrs = adis16350_attributes,
564};
565
566static struct attribute *adis16350_event_attributes[] = {
567 NULL,
568};
569
570static struct attribute_group adis16350_event_attribute_group = {
571 .attrs = adis16350_event_attributes,
572};
573
574static int __devinit adis16350_probe(struct spi_device *spi)
575{
576 int ret, regdone = 0;
577 struct adis16350_state *st = kzalloc(sizeof *st, GFP_KERNEL);
578 if (!st) {
579 ret = -ENOMEM;
580 goto error_ret;
581 }
582 /* this is only used for removal purposes */
583 spi_set_drvdata(spi, st);
584
585 /* Allocate the comms buffers */
586 st->rx = kzalloc(sizeof(*st->rx)*ADIS16350_MAX_RX, GFP_KERNEL);
587 if (st->rx == NULL) {
588 ret = -ENOMEM;
589 goto error_free_st;
590 }
591 st->tx = kzalloc(sizeof(*st->tx)*ADIS16350_MAX_TX, GFP_KERNEL);
592 if (st->tx == NULL) {
593 ret = -ENOMEM;
594 goto error_free_rx;
595 }
596 st->us = spi;
597 mutex_init(&st->buf_lock);
598 /* setup the industrialio driver allocated elements */
599 st->indio_dev = iio_allocate_device();
600 if (st->indio_dev == NULL) {
601 ret = -ENOMEM;
602 goto error_free_tx;
603 }
604
605 st->indio_dev->dev.parent = &spi->dev;
606 st->indio_dev->num_interrupt_lines = 1;
607 st->indio_dev->event_attrs = &adis16350_event_attribute_group;
608 st->indio_dev->attrs = &adis16350_attribute_group;
609 st->indio_dev->dev_data = (void *)(st);
610 st->indio_dev->driver_module = THIS_MODULE;
611 st->indio_dev->modes = INDIO_DIRECT_MODE;
612
613 ret = adis16350_configure_ring(st->indio_dev);
614 if (ret)
615 goto error_free_dev;
616
617 ret = iio_device_register(st->indio_dev);
618 if (ret)
619 goto error_unreg_ring_funcs;
620 regdone = 1;
621
622 ret = adis16350_initialize_ring(st->indio_dev->ring);
623 if (ret) {
624 printk(KERN_ERR "failed to initialize the ring\n");
625 goto error_unreg_ring_funcs;
626 }
627
628 if (spi->irq) {
629 ret = iio_register_interrupt_line(spi->irq,
630 st->indio_dev,
631 0,
632 IRQF_TRIGGER_RISING,
633 "adis16350");
634 if (ret)
635 goto error_uninitialize_ring;
636
637 ret = adis16350_probe_trigger(st->indio_dev);
638 if (ret)
639 goto error_unregister_line;
640 }
641
642 /* Get the device into a sane initial state */
643 ret = adis16350_initial_setup(st);
644 if (ret)
645 goto error_remove_trigger;
646 return 0;
647
648error_remove_trigger:
649 adis16350_remove_trigger(st->indio_dev);
650error_unregister_line:
651 if (spi->irq)
652 iio_unregister_interrupt_line(st->indio_dev, 0);
653error_uninitialize_ring:
654 adis16350_uninitialize_ring(st->indio_dev->ring);
655error_unreg_ring_funcs:
656 adis16350_unconfigure_ring(st->indio_dev);
657error_free_dev:
658 if (regdone)
659 iio_device_unregister(st->indio_dev);
660 else
661 iio_free_device(st->indio_dev);
662error_free_tx:
663 kfree(st->tx);
664error_free_rx:
665 kfree(st->rx);
666error_free_st:
667 kfree(st);
668error_ret:
669 return ret;
670}
671
672static int adis16350_remove(struct spi_device *spi)
673{
674 int ret;
675 struct adis16350_state *st = spi_get_drvdata(spi);
676 struct iio_dev *indio_dev = st->indio_dev;
677
678 ret = adis16350_stop_device(&(indio_dev->dev));
679 if (ret)
680 goto err_ret;
681
682 flush_scheduled_work();
683
684 adis16350_remove_trigger(indio_dev);
685 if (spi->irq)
686 iio_unregister_interrupt_line(indio_dev, 0);
687
688 adis16350_uninitialize_ring(indio_dev->ring);
689 iio_device_unregister(indio_dev);
690 adis16350_unconfigure_ring(indio_dev);
691 kfree(st->tx);
692 kfree(st->rx);
693 kfree(st);
694
695 return 0;
696
697err_ret:
698 return ret;
699}
700
701static const struct spi_device_id adis16350_id[] = {
702 {"adis16350", 0},
703 {"adis16354", 0},
704 {"adis16355", 0},
705 {"adis16360", 0},
706 {"adis16362", 0},
707 {"adis16364", 0},
708 {"adis16365", 0},
709 {}
710};
711
712static struct spi_driver adis16350_driver = {
713 .driver = {
714 .name = "adis16350",
715 .owner = THIS_MODULE,
716 },
717 .probe = adis16350_probe,
718 .remove = __devexit_p(adis16350_remove),
719 .id_table = adis16350_id,
720};
721
722static __init int adis16350_init(void)
723{
724 return spi_register_driver(&adis16350_driver);
725}
726module_init(adis16350_init);
727
728static __exit void adis16350_exit(void)
729{
730 spi_unregister_driver(&adis16350_driver);
731}
732module_exit(adis16350_exit);
733
734MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
735MODULE_DESCRIPTION("Analog Devices ADIS16350/54/55/60/62/64/65 IMU SPI driver");
736MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/imu/adis16350_ring.c b/drivers/staging/iio/imu/adis16350_ring.c
new file mode 100644
index 000000000000..5e9716ea7c77
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16350_ring.c
@@ -0,0 +1,286 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/gpio.h>
4#include <linux/workqueue.h>
5#include <linux/mutex.h>
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/spi/spi.h>
9#include <linux/sysfs.h>
10#include <linux/list.h>
11
12#include "../iio.h"
13#include "../sysfs.h"
14#include "../ring_sw.h"
15#include "../accel/accel.h"
16#include "../trigger.h"
17#include "adis16350.h"
18
19/**
20 * combine_8_to_16() utility function to munge to u8s into u16
21 **/
22static inline u16 combine_8_to_16(u8 lower, u8 upper)
23{
24 u16 _lower = lower;
25 u16 _upper = upper;
26 return _lower | (_upper << 8);
27}
28
29static IIO_SCAN_EL_C(supply, ADIS16350_SCAN_SUPPLY, IIO_UNSIGNED(12),
30 ADIS16350_SUPPLY_OUT, NULL);
31
32static IIO_SCAN_EL_C(gyro_x, ADIS16350_SCAN_GYRO_X, IIO_SIGNED(14),
33 ADIS16350_XGYRO_OUT, NULL);
34static IIO_SCAN_EL_C(gyro_y, ADIS16350_SCAN_GYRO_Y, IIO_SIGNED(14),
35 ADIS16350_YGYRO_OUT, NULL);
36static IIO_SCAN_EL_C(gyro_z, ADIS16350_SCAN_GYRO_Z, IIO_SIGNED(14),
37 ADIS16350_ZGYRO_OUT, NULL);
38
39static IIO_SCAN_EL_C(accel_x, ADIS16350_SCAN_ACC_X, IIO_SIGNED(14),
40 ADIS16350_XACCL_OUT, NULL);
41static IIO_SCAN_EL_C(accel_y, ADIS16350_SCAN_ACC_Y, IIO_SIGNED(14),
42 ADIS16350_YACCL_OUT, NULL);
43static IIO_SCAN_EL_C(accel_z, ADIS16350_SCAN_ACC_Z, IIO_SIGNED(14),
44 ADIS16350_ZACCL_OUT, NULL);
45
46static IIO_SCAN_EL_C(temp_x, ADIS16350_SCAN_TEMP_X, IIO_SIGNED(12),
47 ADIS16350_XTEMP_OUT, NULL);
48static IIO_SCAN_EL_C(temp_y, ADIS16350_SCAN_TEMP_Y, IIO_SIGNED(12),
49 ADIS16350_YTEMP_OUT, NULL);
50static IIO_SCAN_EL_C(temp_z, ADIS16350_SCAN_TEMP_Z, IIO_SIGNED(12),
51 ADIS16350_ZTEMP_OUT, NULL);
52
53static IIO_SCAN_EL_C(adc_0, ADIS16350_SCAN_ADC_0, IIO_UNSIGNED(12),
54 ADIS16350_AUX_ADC, NULL);
55
56static IIO_SCAN_EL_TIMESTAMP(11);
57
58static struct attribute *adis16350_scan_el_attrs[] = {
59 &iio_scan_el_supply.dev_attr.attr,
60 &iio_scan_el_gyro_x.dev_attr.attr,
61 &iio_scan_el_gyro_y.dev_attr.attr,
62 &iio_scan_el_gyro_z.dev_attr.attr,
63 &iio_scan_el_accel_x.dev_attr.attr,
64 &iio_scan_el_accel_y.dev_attr.attr,
65 &iio_scan_el_accel_z.dev_attr.attr,
66 &iio_scan_el_temp_x.dev_attr.attr,
67 &iio_scan_el_temp_y.dev_attr.attr,
68 &iio_scan_el_temp_z.dev_attr.attr,
69 &iio_scan_el_adc_0.dev_attr.attr,
70 &iio_scan_el_timestamp.dev_attr.attr,
71 NULL,
72};
73
74static struct attribute_group adis16350_scan_el_group = {
75 .attrs = adis16350_scan_el_attrs,
76 .name = "scan_elements",
77};
78
79/**
80 * adis16350_poll_func_th() top half interrupt handler called by trigger
81 * @private_data: iio_dev
82 **/
83static void adis16350_poll_func_th(struct iio_dev *indio_dev)
84{
85 struct adis16350_state *st = iio_dev_get_devdata(indio_dev);
86 st->last_timestamp = indio_dev->trig->timestamp;
87 schedule_work(&st->work_trigger_to_ring);
88}
89
90/**
91 * adis16350_spi_read_burst() - read all data registers
92 * @dev: device associated with child of actual device (iio_dev or iio_trig)
93 * @rx: somewhere to pass back the value read (min size is 24 bytes)
94 **/
95static int adis16350_spi_read_burst(struct device *dev, u8 *rx)
96{
97 struct spi_message msg;
98 struct iio_dev *indio_dev = dev_get_drvdata(dev);
99 struct adis16350_state *st = iio_dev_get_devdata(indio_dev);
100 u32 old_speed_hz = st->us->max_speed_hz;
101 int ret;
102
103 struct spi_transfer xfers[] = {
104 {
105 .tx_buf = st->tx,
106 .bits_per_word = 8,
107 .len = 2,
108 .cs_change = 0,
109 }, {
110 .rx_buf = rx,
111 .bits_per_word = 8,
112 .len = 22,
113 .cs_change = 0,
114 },
115 };
116
117 mutex_lock(&st->buf_lock);
118 st->tx[0] = ADIS16350_READ_REG(ADIS16350_GLOB_CMD);
119 st->tx[1] = 0;
120
121 spi_message_init(&msg);
122 spi_message_add_tail(&xfers[0], &msg);
123 spi_message_add_tail(&xfers[1], &msg);
124
125 st->us->max_speed_hz = ADIS16350_SPI_BURST;
126 spi_setup(st->us);
127
128 ret = spi_sync(st->us, &msg);
129 if (ret)
130 dev_err(&st->us->dev, "problem when burst reading");
131
132 st->us->max_speed_hz = old_speed_hz;
133 spi_setup(st->us);
134 mutex_unlock(&st->buf_lock);
135 return ret;
136}
137
138/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
139 * specific to be rolled into the core.
140 */
141static void adis16350_trigger_bh_to_ring(struct work_struct *work_s)
142{
143 struct adis16350_state *st
144 = container_of(work_s, struct adis16350_state,
145 work_trigger_to_ring);
146
147 int i = 0;
148 s16 *data;
149 size_t datasize = st->indio_dev
150 ->ring->access.get_bpd(st->indio_dev->ring);
151
152 data = kmalloc(datasize , GFP_KERNEL);
153 if (data == NULL) {
154 dev_err(&st->us->dev, "memory alloc failed in ring bh");
155 return;
156 }
157
158 if (st->indio_dev->scan_count)
159 if (adis16350_spi_read_burst(&st->indio_dev->dev, st->rx) >= 0)
160 for (; i < st->indio_dev->scan_count; i++) {
161 data[i] = combine_8_to_16(st->rx[i*2+1],
162 st->rx[i*2]);
163 }
164
165 /* Guaranteed to be aligned with 8 byte boundary */
166 if (st->indio_dev->scan_timestamp)
167 *((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
168
169 st->indio_dev->ring->access.store_to(st->indio_dev->ring,
170 (u8 *)data,
171 st->last_timestamp);
172
173 iio_trigger_notify_done(st->indio_dev->trig);
174 kfree(data);
175
176 return;
177}
178
179static int adis16350_data_rdy_ring_preenable(struct iio_dev *indio_dev)
180{
181 size_t size;
182 dev_dbg(&indio_dev->dev, "%s\n", __func__);
183 /* Check if there are any scan elements enabled, if not fail*/
184 if (!(indio_dev->scan_count || indio_dev->scan_timestamp))
185 return -EINVAL;
186
187 if (indio_dev->ring->access.set_bpd) {
188 if (indio_dev->scan_timestamp)
189 if (indio_dev->scan_count)
190 /* Timestamp (aligned sizeof(s64) and data */
191 size = (((indio_dev->scan_count * sizeof(s16))
192 + sizeof(s64) - 1)
193 & ~(sizeof(s64) - 1))
194 + sizeof(s64);
195 else /* Timestamp only */
196 size = sizeof(s64);
197 else /* Data only */
198 size = indio_dev->scan_count*sizeof(s16);
199 indio_dev->ring->access.set_bpd(indio_dev->ring, size);
200 }
201
202 return 0;
203}
204
205static int adis16350_data_rdy_ring_postenable(struct iio_dev *indio_dev)
206{
207 return indio_dev->trig
208 ? iio_trigger_attach_poll_func(indio_dev->trig,
209 indio_dev->pollfunc)
210 : 0;
211}
212
213static int adis16350_data_rdy_ring_predisable(struct iio_dev *indio_dev)
214{
215 return indio_dev->trig
216 ? iio_trigger_dettach_poll_func(indio_dev->trig,
217 indio_dev->pollfunc)
218 : 0;
219}
220
221void adis16350_unconfigure_ring(struct iio_dev *indio_dev)
222{
223 kfree(indio_dev->pollfunc);
224 iio_sw_rb_free(indio_dev->ring);
225}
226
227int adis16350_configure_ring(struct iio_dev *indio_dev)
228{
229 int ret = 0;
230 struct adis16350_state *st = indio_dev->dev_data;
231 struct iio_ring_buffer *ring;
232 INIT_WORK(&st->work_trigger_to_ring, adis16350_trigger_bh_to_ring);
233 /* Set default scan mode */
234
235 iio_scan_mask_set(indio_dev, iio_scan_el_supply.number);
236 iio_scan_mask_set(indio_dev, iio_scan_el_gyro_x.number);
237 iio_scan_mask_set(indio_dev, iio_scan_el_gyro_y.number);
238 iio_scan_mask_set(indio_dev, iio_scan_el_gyro_z.number);
239 iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
240 iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
241 iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
242 iio_scan_mask_set(indio_dev, iio_scan_el_temp_x.number);
243 iio_scan_mask_set(indio_dev, iio_scan_el_temp_y.number);
244 iio_scan_mask_set(indio_dev, iio_scan_el_temp_z.number);
245 iio_scan_mask_set(indio_dev, iio_scan_el_adc_0.number);
246 indio_dev->scan_timestamp = true;
247
248 indio_dev->scan_el_attrs = &adis16350_scan_el_group;
249
250 ring = iio_sw_rb_allocate(indio_dev);
251 if (!ring) {
252 ret = -ENOMEM;
253 return ret;
254 }
255 indio_dev->ring = ring;
256 /* Effectively select the ring buffer implementation */
257 iio_ring_sw_register_funcs(&ring->access);
258 ring->preenable = &adis16350_data_rdy_ring_preenable;
259 ring->postenable = &adis16350_data_rdy_ring_postenable;
260 ring->predisable = &adis16350_data_rdy_ring_predisable;
261 ring->owner = THIS_MODULE;
262
263 indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
264 if (indio_dev->pollfunc == NULL) {
265 ret = -ENOMEM;
266 goto error_iio_sw_rb_free;;
267 }
268 indio_dev->pollfunc->poll_func_main = &adis16350_poll_func_th;
269 indio_dev->pollfunc->private_data = indio_dev;
270 indio_dev->modes |= INDIO_RING_TRIGGERED;
271 return 0;
272
273error_iio_sw_rb_free:
274 iio_sw_rb_free(indio_dev->ring);
275 return ret;
276}
277
278int adis16350_initialize_ring(struct iio_ring_buffer *ring)
279{
280 return iio_ring_buffer_register(ring, 0);
281}
282
283void adis16350_uninitialize_ring(struct iio_ring_buffer *ring)
284{
285 iio_ring_buffer_unregister(ring);
286}
diff --git a/drivers/staging/iio/imu/adis16350_trigger.c b/drivers/staging/iio/imu/adis16350_trigger.c
new file mode 100644
index 000000000000..1ffa75d05fac
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16350_trigger.c
@@ -0,0 +1,127 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/mutex.h>
4#include <linux/device.h>
5#include <linux/kernel.h>
6#include <linux/sysfs.h>
7#include <linux/list.h>
8#include <linux/spi/spi.h>
9
10#include "../iio.h"
11#include "../sysfs.h"
12#include "../trigger.h"
13#include "adis16350.h"
14
15/**
16 * adis16350_data_rdy_trig_poll() the event handler for the data rdy trig
17 **/
18static int adis16350_data_rdy_trig_poll(struct iio_dev *dev_info,
19 int index,
20 s64 timestamp,
21 int no_test)
22{
23 struct adis16350_state *st = iio_dev_get_devdata(dev_info);
24 struct iio_trigger *trig = st->trig;
25
26 trig->timestamp = timestamp;
27 iio_trigger_poll(trig);
28
29 return IRQ_HANDLED;
30}
31
32IIO_EVENT_SH(data_rdy_trig, &adis16350_data_rdy_trig_poll);
33
34static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
35
36static struct attribute *adis16350_trigger_attrs[] = {
37 &dev_attr_name.attr,
38 NULL,
39};
40
41static const struct attribute_group adis16350_trigger_attr_group = {
42 .attrs = adis16350_trigger_attrs,
43};
44
45/**
46 * adis16350_data_rdy_trigger_set_state() set datardy interrupt state
47 **/
48static int adis16350_data_rdy_trigger_set_state(struct iio_trigger *trig,
49 bool state)
50{
51 struct adis16350_state *st = trig->private_data;
52 struct iio_dev *indio_dev = st->indio_dev;
53 int ret = 0;
54
55 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
56 ret = adis16350_set_irq(&st->indio_dev->dev, state);
57 if (state == false) {
58 iio_remove_event_from_list(&iio_event_data_rdy_trig,
59 &indio_dev->interrupts[0]
60 ->ev_list);
61 /* possible quirk with handler currently worked around
62 by ensuring the work queue is empty */
63 flush_scheduled_work();
64 } else {
65 iio_add_event_to_list(&iio_event_data_rdy_trig,
66 &indio_dev->interrupts[0]->ev_list);
67 }
68 return ret;
69}
70
71/**
72 * adis16350_trig_try_reen() try renabling irq for data rdy trigger
73 * @trig: the datardy trigger
74 **/
75static int adis16350_trig_try_reen(struct iio_trigger *trig)
76{
77 struct adis16350_state *st = trig->private_data;
78 enable_irq(st->us->irq);
79 /* irq reenabled so success! */
80 return 0;
81}
82
83int adis16350_probe_trigger(struct iio_dev *indio_dev)
84{
85 int ret;
86 struct adis16350_state *st = indio_dev->dev_data;
87
88 st->trig = iio_allocate_trigger();
89 st->trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
90 if (!st->trig->name) {
91 ret = -ENOMEM;
92 goto error_free_trig;
93 }
94 snprintf((char *)st->trig->name,
95 IIO_TRIGGER_NAME_LENGTH,
96 "adis16350-dev%d", indio_dev->id);
97 st->trig->dev.parent = &st->us->dev;
98 st->trig->owner = THIS_MODULE;
99 st->trig->private_data = st;
100 st->trig->set_trigger_state = &adis16350_data_rdy_trigger_set_state;
101 st->trig->try_reenable = &adis16350_trig_try_reen;
102 st->trig->control_attrs = &adis16350_trigger_attr_group;
103 ret = iio_trigger_register(st->trig);
104
105 /* select default trigger */
106 indio_dev->trig = st->trig;
107 if (ret)
108 goto error_free_trig_name;
109
110 return 0;
111
112error_free_trig_name:
113 kfree(st->trig->name);
114error_free_trig:
115 iio_free_trigger(st->trig);
116
117 return ret;
118}
119
120void adis16350_remove_trigger(struct iio_dev *indio_dev)
121{
122 struct adis16350_state *state = indio_dev->dev_data;
123
124 iio_trigger_unregister(state->trig);
125 kfree(state->trig->name);
126 iio_free_trigger(state->trig);
127}
diff --git a/drivers/staging/iio/imu/adis16400.h b/drivers/staging/iio/imu/adis16400.h
new file mode 100644
index 000000000000..5a69a7ab91ce
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16400.h
@@ -0,0 +1,229 @@
1/*
2 * adis16400.h support Analog Devices ADIS16400
3 * 3d 18g accelerometers,
4 * 3d gyroscopes,
5 * 3d 2.5gauss magnetometers via SPI
6 *
7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk>
9 *
10 * Loosely based upon lis3l02dq.h
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#ifndef SPI_ADIS16400_H_
18#define SPI_ADIS16400_H_
19
20#define ADIS16400_STARTUP_DELAY 220 /* ms */
21
22#define ADIS16400_READ_REG(a) a
23#define ADIS16400_WRITE_REG(a) ((a) | 0x80)
24
25#define ADIS16400_FLASH_CNT 0x00 /* Flash memory write count */
26#define ADIS16400_SUPPLY_OUT 0x02 /* Power supply measurement */
27#define ADIS16400_XGYRO_OUT 0x04 /* X-axis gyroscope output */
28#define ADIS16400_YGYRO_OUT 0x06 /* Y-axis gyroscope output */
29#define ADIS16400_ZGYRO_OUT 0x08 /* Z-axis gyroscope output */
30#define ADIS16400_XACCL_OUT 0x0A /* X-axis accelerometer output */
31#define ADIS16400_YACCL_OUT 0x0C /* Y-axis accelerometer output */
32#define ADIS16400_ZACCL_OUT 0x0E /* Z-axis accelerometer output */
33#define ADIS16400_XMAGN_OUT 0x10 /* X-axis magnetometer measurement */
34#define ADIS16400_YMAGN_OUT 0x12 /* Y-axis magnetometer measurement */
35#define ADIS16400_ZMAGN_OUT 0x14 /* Z-axis magnetometer measurement */
36#define ADIS16400_TEMP_OUT 0x16 /* Temperature output */
37#define ADIS16400_AUX_ADC 0x18 /* Auxiliary ADC measurement */
38
39/* Calibration parameters */
40#define ADIS16400_XGYRO_OFF 0x1A /* X-axis gyroscope bias offset factor */
41#define ADIS16400_YGYRO_OFF 0x1C /* Y-axis gyroscope bias offset factor */
42#define ADIS16400_ZGYRO_OFF 0x1E /* Z-axis gyroscope bias offset factor */
43#define ADIS16400_XACCL_OFF 0x20 /* X-axis acceleration bias offset factor */
44#define ADIS16400_YACCL_OFF 0x22 /* Y-axis acceleration bias offset factor */
45#define ADIS16400_ZACCL_OFF 0x24 /* Z-axis acceleration bias offset factor */
46#define ADIS16400_XMAGN_HIF 0x26 /* X-axis magnetometer, hard-iron factor */
47#define ADIS16400_YMAGN_HIF 0x28 /* Y-axis magnetometer, hard-iron factor */
48#define ADIS16400_ZMAGN_HIF 0x2A /* Z-axis magnetometer, hard-iron factor */
49#define ADIS16400_XMAGN_SIF 0x2C /* X-axis magnetometer, soft-iron factor */
50#define ADIS16400_YMAGN_SIF 0x2E /* Y-axis magnetometer, soft-iron factor */
51#define ADIS16400_ZMAGN_SIF 0x30 /* Z-axis magnetometer, soft-iron factor */
52
53#define ADIS16400_GPIO_CTRL 0x32 /* Auxiliary digital input/output control */
54#define ADIS16400_MSC_CTRL 0x34 /* Miscellaneous control */
55#define ADIS16400_SMPL_PRD 0x36 /* Internal sample period (rate) control */
56#define ADIS16400_SENS_AVG 0x38 /* Dynamic range and digital filter control */
57#define ADIS16400_SLP_CNT 0x3A /* Sleep mode control */
58#define ADIS16400_DIAG_STAT 0x3C /* System status */
59
60/* Alarm functions */
61#define ADIS16400_GLOB_CMD 0x3E /* System command */
62#define ADIS16400_ALM_MAG1 0x40 /* Alarm 1 amplitude threshold */
63#define ADIS16400_ALM_MAG2 0x42 /* Alarm 2 amplitude threshold */
64#define ADIS16400_ALM_SMPL1 0x44 /* Alarm 1 sample size */
65#define ADIS16400_ALM_SMPL2 0x46 /* Alarm 2 sample size */
66#define ADIS16400_ALM_CTRL 0x48 /* Alarm control */
67#define ADIS16400_AUX_DAC 0x4A /* Auxiliary DAC data */
68
69#define ADIS16400_PRODUCT_ID 0x56 /* Product identifier */
70#define ADIS16400_PRODUCT_ID_DEFAULT 0x4015 /* Datasheet says 0x4105, I get 0x4015 */
71
72#define ADIS16400_ERROR_ACTIVE (1<<14)
73#define ADIS16400_NEW_DATA (1<<14)
74
75/* MSC_CTRL */
76#define ADIS16400_MSC_CTRL_MEM_TEST (1<<11)
77#define ADIS16400_MSC_CTRL_INT_SELF_TEST (1<<10)
78#define ADIS16400_MSC_CTRL_NEG_SELF_TEST (1<<9)
79#define ADIS16400_MSC_CTRL_POS_SELF_TEST (1<<8)
80#define ADIS16400_MSC_CTRL_GYRO_BIAS (1<<7)
81#define ADIS16400_MSC_CTRL_ACCL_ALIGN (1<<6)
82#define ADIS16400_MSC_CTRL_DATA_RDY_EN (1<<2)
83#define ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH (1<<1)
84#define ADIS16400_MSC_CTRL_DATA_RDY_DIO2 (1<<0)
85
86/* SMPL_PRD */
87#define ADIS16400_SMPL_PRD_TIME_BASE (1<<7)
88#define ADIS16400_SMPL_PRD_DIV_MASK 0x7F
89
90/* DIAG_STAT */
91#define ADIS16400_DIAG_STAT_ZACCL_FAIL (1<<15)
92#define ADIS16400_DIAG_STAT_YACCL_FAIL (1<<14)
93#define ADIS16400_DIAG_STAT_XACCL_FAIL (1<<13)
94#define ADIS16400_DIAG_STAT_XGYRO_FAIL (1<<12)
95#define ADIS16400_DIAG_STAT_YGYRO_FAIL (1<<11)
96#define ADIS16400_DIAG_STAT_ZGYRO_FAIL (1<<10)
97#define ADIS16400_DIAG_STAT_ALARM2 (1<<9)
98#define ADIS16400_DIAG_STAT_ALARM1 (1<<8)
99#define ADIS16400_DIAG_STAT_FLASH_CHK (1<<6)
100#define ADIS16400_DIAG_STAT_SELF_TEST (1<<5)
101#define ADIS16400_DIAG_STAT_OVERFLOW (1<<4)
102#define ADIS16400_DIAG_STAT_SPI_FAIL (1<<3)
103#define ADIS16400_DIAG_STAT_FLASH_UPT (1<<2)
104#define ADIS16400_DIAG_STAT_POWER_HIGH (1<<1)
105#define ADIS16400_DIAG_STAT_POWER_LOW (1<<0)
106
107/* GLOB_CMD */
108#define ADIS16400_GLOB_CMD_SW_RESET (1<<7)
109#define ADIS16400_GLOB_CMD_P_AUTO_NULL (1<<4)
110#define ADIS16400_GLOB_CMD_FLASH_UPD (1<<3)
111#define ADIS16400_GLOB_CMD_DAC_LATCH (1<<2)
112#define ADIS16400_GLOB_CMD_FAC_CALIB (1<<1)
113#define ADIS16400_GLOB_CMD_AUTO_NULL (1<<0)
114
115/* SLP_CNT */
116#define ADIS16400_SLP_CNT_POWER_OFF (1<<8)
117
118#define ADIS16400_MAX_TX 24
119#define ADIS16400_MAX_RX 24
120
121#define ADIS16400_SPI_SLOW (u32)(300 * 1000)
122#define ADIS16400_SPI_BURST (u32)(1000 * 1000)
123#define ADIS16400_SPI_FAST (u32)(2000 * 1000)
124
125/**
126 * struct adis16400_state - device instance specific data
127 * @us: actual spi_device
128 * @work_trigger_to_ring: bh for triggered event handling
129 * @work_cont_thresh: CLEAN
130 * @inter: used to check if new interrupt has been triggered
131 * @last_timestamp: passing timestamp from th to bh of interrupt handler
132 * @indio_dev: industrial I/O device structure
133 * @trig: data ready trigger registered with iio
134 * @tx: transmit buffer
135 * @rx: recieve buffer
136 * @buf_lock: mutex to protect tx and rx
137 **/
138struct adis16400_state {
139 struct spi_device *us;
140 struct work_struct work_trigger_to_ring;
141 struct iio_work_cont work_cont_thresh;
142 s64 last_timestamp;
143 struct iio_dev *indio_dev;
144 struct iio_trigger *trig;
145 u8 *tx;
146 u8 *rx;
147 struct mutex buf_lock;
148};
149
150int adis16400_spi_read_burst(struct device *dev, u8 *rx);
151
152int adis16400_set_irq(struct device *dev, bool enable);
153
154int adis16400_reset(struct device *dev);
155
156int adis16400_check_status(struct device *dev);
157
158#ifdef CONFIG_IIO_RING_BUFFER
159/* At the moment triggers are only used for ring buffer
160 * filling. This may change!
161 */
162
163enum adis16400_scan {
164 ADIS16400_SCAN_SUPPLY,
165 ADIS16400_SCAN_GYRO_X,
166 ADIS16400_SCAN_GYRO_Y,
167 ADIS16400_SCAN_GYRO_Z,
168 ADIS16400_SCAN_ACC_X,
169 ADIS16400_SCAN_ACC_Y,
170 ADIS16400_SCAN_ACC_Z,
171 ADIS16400_SCAN_MAGN_X,
172 ADIS16400_SCAN_MAGN_Y,
173 ADIS16400_SCAN_MAGN_Z,
174 ADIS16400_SCAN_TEMP,
175 ADIS16400_SCAN_ADC_0
176};
177
178void adis16400_remove_trigger(struct iio_dev *indio_dev);
179int adis16400_probe_trigger(struct iio_dev *indio_dev);
180
181ssize_t adis16400_read_data_from_ring(struct device *dev,
182 struct device_attribute *attr,
183 char *buf);
184
185
186int adis16400_configure_ring(struct iio_dev *indio_dev);
187void adis16400_unconfigure_ring(struct iio_dev *indio_dev);
188
189int adis16400_initialize_ring(struct iio_ring_buffer *ring);
190void adis16400_uninitialize_ring(struct iio_ring_buffer *ring);
191#else /* CONFIG_IIO_RING_BUFFER */
192
193static inline void adis16400_remove_trigger(struct iio_dev *indio_dev)
194{
195}
196
197static inline int adis16400_probe_trigger(struct iio_dev *indio_dev)
198{
199 return 0;
200}
201
202static inline ssize_t
203adis16400_read_data_from_ring(struct device *dev,
204 struct device_attribute *attr,
205 char *buf)
206{
207 return 0;
208}
209
210static int adis16400_configure_ring(struct iio_dev *indio_dev)
211{
212 return 0;
213}
214
215static inline void adis16400_unconfigure_ring(struct iio_dev *indio_dev)
216{
217}
218
219static inline int adis16400_initialize_ring(struct iio_ring_buffer *ring)
220{
221 return 0;
222}
223
224static inline void adis16400_uninitialize_ring(struct iio_ring_buffer *ring)
225{
226}
227
228#endif /* CONFIG_IIO_RING_BUFFER */
229#endif /* SPI_ADIS16400_H_ */
diff --git a/drivers/staging/iio/imu/adis16400_core.c b/drivers/staging/iio/imu/adis16400_core.c
new file mode 100644
index 000000000000..e69e2ce47da3
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16400_core.c
@@ -0,0 +1,800 @@
1/*
2 * adis16400.c support Analog Devices ADIS16400/5
3 * 3d 2g Linear Accelerometers,
4 * 3d Gyroscopes,
5 * 3d Magnetometers via SPI
6 *
7 * Copyright (c) 2009 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/gpio.h>
19#include <linux/delay.h>
20#include <linux/mutex.h>
21#include <linux/device.h>
22#include <linux/kernel.h>
23#include <linux/spi/spi.h>
24
25#include <linux/sysfs.h>
26#include <linux/list.h>
27
28#include "../iio.h"
29#include "../sysfs.h"
30#include "../accel/accel.h"
31#include "../adc/adc.h"
32#include "../gyro/gyro.h"
33#include "../magnetometer/magnet.h"
34
35#include "adis16400.h"
36
37#define DRIVER_NAME "adis16400"
38
39/* At the moment the spi framework doesn't allow global setting of cs_change.
40 * It's in the likely to be added comment at the top of spi.h.
41 * This means that use cannot be made of spi_write etc.
42 */
43
44/**
45 * adis16400_spi_write_reg_8() - write single byte to a register
46 * @dev: device associated with child of actual device (iio_dev or iio_trig)
47 * @reg_address: the address of the register to be written
48 * @val: the value to write
49 **/
50static int adis16400_spi_write_reg_8(struct device *dev,
51 u8 reg_address,
52 u8 val)
53{
54 int ret;
55 struct iio_dev *indio_dev = dev_get_drvdata(dev);
56 struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
57
58 mutex_lock(&st->buf_lock);
59 st->tx[0] = ADIS16400_WRITE_REG(reg_address);
60 st->tx[1] = val;
61
62 ret = spi_write(st->us, st->tx, 2);
63 mutex_unlock(&st->buf_lock);
64
65 return ret;
66}
67
68/**
69 * adis16400_spi_write_reg_16() - write 2 bytes to a pair of registers
70 * @dev: device associated with child of actual device (iio_dev or iio_trig)
71 * @reg_address: the address of the lower of the two registers. Second register
72 * is assumed to have address one greater.
73 * @val: value to be written
74 **/
75static int adis16400_spi_write_reg_16(struct device *dev,
76 u8 lower_reg_address,
77 u16 value)
78{
79 int ret;
80 struct spi_message msg;
81 struct iio_dev *indio_dev = dev_get_drvdata(dev);
82 struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
83 struct spi_transfer xfers[] = {
84 {
85 .tx_buf = st->tx,
86 .bits_per_word = 8,
87 .len = 2,
88 .cs_change = 1,
89 }, {
90 .tx_buf = st->tx + 2,
91 .bits_per_word = 8,
92 .len = 2,
93 .cs_change = 1,
94 },
95 };
96
97 mutex_lock(&st->buf_lock);
98 st->tx[0] = ADIS16400_WRITE_REG(lower_reg_address);
99 st->tx[1] = value & 0xFF;
100 st->tx[2] = ADIS16400_WRITE_REG(lower_reg_address + 1);
101 st->tx[3] = (value >> 8) & 0xFF;
102
103 spi_message_init(&msg);
104 spi_message_add_tail(&xfers[0], &msg);
105 spi_message_add_tail(&xfers[1], &msg);
106 ret = spi_sync(st->us, &msg);
107 mutex_unlock(&st->buf_lock);
108
109 return ret;
110}
111
112/**
113 * adis16400_spi_read_reg_16() - read 2 bytes from a 16-bit register
114 * @dev: device associated with child of actual device (iio_dev or iio_trig)
115 * @reg_address: the address of the lower of the two registers. Second register
116 * is assumed to have address one greater.
117 * @val: somewhere to pass back the value read
118 **/
119static int adis16400_spi_read_reg_16(struct device *dev,
120 u8 lower_reg_address,
121 u16 *val)
122{
123 struct spi_message msg;
124 struct iio_dev *indio_dev = dev_get_drvdata(dev);
125 struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
126 int ret;
127 struct spi_transfer xfers[] = {
128 {
129 .tx_buf = st->tx,
130 .bits_per_word = 8,
131 .len = 2,
132 .cs_change = 1,
133 }, {
134 .rx_buf = st->rx,
135 .bits_per_word = 8,
136 .len = 2,
137 .cs_change = 1,
138 },
139 };
140
141 mutex_lock(&st->buf_lock);
142 st->tx[0] = ADIS16400_READ_REG(lower_reg_address);
143 st->tx[1] = 0;
144 st->tx[2] = 0;
145 st->tx[3] = 0;
146
147 spi_message_init(&msg);
148 spi_message_add_tail(&xfers[0], &msg);
149 spi_message_add_tail(&xfers[1], &msg);
150 ret = spi_sync(st->us, &msg);
151 if (ret) {
152 dev_err(&st->us->dev,
153 "problem when reading 16 bit register 0x%02X",
154 lower_reg_address);
155 goto error_ret;
156 }
157 *val = (st->rx[0] << 8) | st->rx[1];
158
159error_ret:
160 mutex_unlock(&st->buf_lock);
161 return ret;
162}
163
164/**
165 * adis16400_spi_read_burst() - read all data registers
166 * @dev: device associated with child of actual device (iio_dev or iio_trig)
167 * @rx: somewhere to pass back the value read (min size is 24 bytes)
168 **/
169int adis16400_spi_read_burst(struct device *dev, u8 *rx)
170{
171 struct spi_message msg;
172 struct iio_dev *indio_dev = dev_get_drvdata(dev);
173 struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
174 u32 old_speed_hz = st->us->max_speed_hz;
175 int ret;
176
177 struct spi_transfer xfers[] = {
178 {
179 .tx_buf = st->tx,
180 .bits_per_word = 8,
181 .len = 2,
182 .cs_change = 0,
183 }, {
184 .rx_buf = rx,
185 .bits_per_word = 8,
186 .len = 24,
187 .cs_change = 1,
188 },
189 };
190
191 mutex_lock(&st->buf_lock);
192 st->tx[0] = ADIS16400_READ_REG(ADIS16400_GLOB_CMD);
193 st->tx[1] = 0;
194
195 spi_message_init(&msg);
196 spi_message_add_tail(&xfers[0], &msg);
197 spi_message_add_tail(&xfers[1], &msg);
198
199 st->us->max_speed_hz = min(ADIS16400_SPI_BURST, old_speed_hz);
200 spi_setup(st->us);
201
202 ret = spi_sync(st->us, &msg);
203 if (ret)
204 dev_err(&st->us->dev, "problem when burst reading");
205
206 st->us->max_speed_hz = old_speed_hz;
207 spi_setup(st->us);
208 mutex_unlock(&st->buf_lock);
209 return ret;
210}
211
212static ssize_t adis16400_spi_read_signed(struct device *dev,
213 struct device_attribute *attr,
214 char *buf,
215 unsigned bits)
216{
217 int ret;
218 s16 val = 0;
219 unsigned shift = 16 - bits;
220 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
221
222 ret = adis16400_spi_read_reg_16(dev, this_attr->address, (u16 *)&val);
223 if (ret)
224 return ret;
225
226 if (val & ADIS16400_ERROR_ACTIVE)
227 adis16400_check_status(dev);
228 val = ((s16)(val << shift) >> shift);
229 return sprintf(buf, "%d\n", val);
230}
231
232static ssize_t adis16400_read_12bit_unsigned(struct device *dev,
233 struct device_attribute *attr,
234 char *buf)
235{
236 int ret;
237 u16 val = 0;
238 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
239
240 ret = adis16400_spi_read_reg_16(dev, this_attr->address, &val);
241 if (ret)
242 return ret;
243
244 if (val & ADIS16400_ERROR_ACTIVE)
245 adis16400_check_status(dev);
246
247 return sprintf(buf, "%u\n", val & 0x0FFF);
248}
249
250static ssize_t adis16400_read_14bit_signed(struct device *dev,
251 struct device_attribute *attr,
252 char *buf)
253{
254 struct iio_dev *indio_dev = dev_get_drvdata(dev);
255 ssize_t ret;
256
257 /* Take the iio_dev status lock */
258 mutex_lock(&indio_dev->mlock);
259 ret = adis16400_spi_read_signed(dev, attr, buf, 14);
260 mutex_unlock(&indio_dev->mlock);
261
262 return ret;
263}
264
265static ssize_t adis16400_read_12bit_signed(struct device *dev,
266 struct device_attribute *attr,
267 char *buf)
268{
269 struct iio_dev *indio_dev = dev_get_drvdata(dev);
270 ssize_t ret;
271
272 /* Take the iio_dev status lock */
273 mutex_lock(&indio_dev->mlock);
274 ret = adis16400_spi_read_signed(dev, attr, buf, 12);
275 mutex_unlock(&indio_dev->mlock);
276
277 return ret;
278}
279
280
281static ssize_t adis16400_write_16bit(struct device *dev,
282 struct device_attribute *attr,
283 const char *buf,
284 size_t len)
285{
286 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
287 int ret;
288 long val;
289
290 ret = strict_strtol(buf, 10, &val);
291 if (ret)
292 goto error_ret;
293 ret = adis16400_spi_write_reg_16(dev, this_attr->address, val);
294
295error_ret:
296 return ret ? ret : len;
297}
298
299static ssize_t adis16400_read_frequency(struct device *dev,
300 struct device_attribute *attr,
301 char *buf)
302{
303 int ret, len = 0;
304 u16 t;
305 int sps;
306 ret = adis16400_spi_read_reg_16(dev,
307 ADIS16400_SMPL_PRD,
308 &t);
309 if (ret)
310 return ret;
311 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638;
312 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
313 len = sprintf(buf, "%d SPS\n", sps);
314 return len;
315}
316
317static ssize_t adis16400_write_frequency(struct device *dev,
318 struct device_attribute *attr,
319 const char *buf,
320 size_t len)
321{
322 struct iio_dev *indio_dev = dev_get_drvdata(dev);
323 struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
324 long val;
325 int ret;
326 u8 t;
327
328 ret = strict_strtol(buf, 10, &val);
329 if (ret)
330 return ret;
331
332 mutex_lock(&indio_dev->mlock);
333
334 t = (1638 / val);
335 if (t > 0)
336 t--;
337 t &= ADIS16400_SMPL_PRD_DIV_MASK;
338 if ((t & ADIS16400_SMPL_PRD_DIV_MASK) >= 0x0A)
339 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
340 else
341 st->us->max_speed_hz = ADIS16400_SPI_FAST;
342
343 ret = adis16400_spi_write_reg_8(dev,
344 ADIS16400_SMPL_PRD,
345 t);
346
347 mutex_unlock(&indio_dev->mlock);
348
349 return ret ? ret : len;
350}
351
352static ssize_t adis16400_write_reset(struct device *dev,
353 struct device_attribute *attr,
354 const char *buf, size_t len)
355{
356 if (len < 1)
357 return -1;
358 switch (buf[0]) {
359 case '1':
360 case 'y':
361 case 'Y':
362 return adis16400_reset(dev);
363 }
364 return -1;
365}
366
367
368
369int adis16400_set_irq(struct device *dev, bool enable)
370{
371 int ret;
372 u16 msc;
373 ret = adis16400_spi_read_reg_16(dev, ADIS16400_MSC_CTRL, &msc);
374 if (ret)
375 goto error_ret;
376
377 msc |= ADIS16400_MSC_CTRL_DATA_RDY_POL_HIGH;
378 if (enable)
379 msc |= ADIS16400_MSC_CTRL_DATA_RDY_EN;
380 else
381 msc &= ~ADIS16400_MSC_CTRL_DATA_RDY_EN;
382
383 ret = adis16400_spi_write_reg_16(dev, ADIS16400_MSC_CTRL, msc);
384 if (ret)
385 goto error_ret;
386
387error_ret:
388 return ret;
389}
390
391int adis16400_reset(struct device *dev)
392{
393 int ret;
394 ret = adis16400_spi_write_reg_8(dev,
395 ADIS16400_GLOB_CMD,
396 ADIS16400_GLOB_CMD_SW_RESET);
397 if (ret)
398 dev_err(dev, "problem resetting device");
399
400 return ret;
401}
402
403/* Power down the device */
404static int adis16400_stop_device(struct device *dev)
405{
406 int ret;
407 u16 val = ADIS16400_SLP_CNT_POWER_OFF;
408
409 ret = adis16400_spi_write_reg_16(dev, ADIS16400_SLP_CNT, val);
410 if (ret)
411 dev_err(dev, "problem with turning device off: SLP_CNT");
412
413 return ret;
414}
415
416static int adis16400_self_test(struct device *dev)
417{
418 int ret;
419 ret = adis16400_spi_write_reg_16(dev,
420 ADIS16400_MSC_CTRL,
421 ADIS16400_MSC_CTRL_MEM_TEST);
422 if (ret) {
423 dev_err(dev, "problem starting self test");
424 goto err_ret;
425 }
426
427 adis16400_check_status(dev);
428
429err_ret:
430 return ret;
431}
432
433int adis16400_check_status(struct device *dev)
434{
435 u16 status;
436 int ret;
437
438 ret = adis16400_spi_read_reg_16(dev, ADIS16400_DIAG_STAT, &status);
439
440 if (ret < 0) {
441 dev_err(dev, "Reading status failed\n");
442 goto error_ret;
443 }
444 ret = status;
445 if (status & ADIS16400_DIAG_STAT_ZACCL_FAIL)
446 dev_err(dev, "Z-axis accelerometer self-test failure\n");
447 if (status & ADIS16400_DIAG_STAT_YACCL_FAIL)
448 dev_err(dev, "Y-axis accelerometer self-test failure\n");
449 if (status & ADIS16400_DIAG_STAT_XACCL_FAIL)
450 dev_err(dev, "X-axis accelerometer self-test failure\n");
451 if (status & ADIS16400_DIAG_STAT_XGYRO_FAIL)
452 dev_err(dev, "X-axis gyroscope self-test failure\n");
453 if (status & ADIS16400_DIAG_STAT_YGYRO_FAIL)
454 dev_err(dev, "Y-axis gyroscope self-test failure\n");
455 if (status & ADIS16400_DIAG_STAT_ZGYRO_FAIL)
456 dev_err(dev, "Z-axis gyroscope self-test failure\n");
457 if (status & ADIS16400_DIAG_STAT_ALARM2)
458 dev_err(dev, "Alarm 2 active\n");
459 if (status & ADIS16400_DIAG_STAT_ALARM1)
460 dev_err(dev, "Alarm 1 active\n");
461 if (status & ADIS16400_DIAG_STAT_FLASH_CHK)
462 dev_err(dev, "Flash checksum error\n");
463 if (status & ADIS16400_DIAG_STAT_SELF_TEST)
464 dev_err(dev, "Self test error\n");
465 if (status & ADIS16400_DIAG_STAT_OVERFLOW)
466 dev_err(dev, "Sensor overrange\n");
467 if (status & ADIS16400_DIAG_STAT_SPI_FAIL)
468 dev_err(dev, "SPI failure\n");
469 if (status & ADIS16400_DIAG_STAT_FLASH_UPT)
470 dev_err(dev, "Flash update failed\n");
471 if (status & ADIS16400_DIAG_STAT_POWER_HIGH)
472 dev_err(dev, "Power supply above 5.25V\n");
473 if (status & ADIS16400_DIAG_STAT_POWER_LOW)
474 dev_err(dev, "Power supply below 4.75V\n");
475
476error_ret:
477 return ret;
478}
479
480static int adis16400_initial_setup(struct adis16400_state *st)
481{
482 int ret;
483 u16 prod_id, smp_prd;
484 struct device *dev = &st->indio_dev->dev;
485
486 /* use low spi speed for init */
487 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
488 st->us->mode = SPI_MODE_3;
489 spi_setup(st->us);
490
491 /* Disable IRQ */
492 ret = adis16400_set_irq(dev, false);
493 if (ret) {
494 dev_err(dev, "disable irq failed");
495 goto err_ret;
496 }
497
498 /* Do self test */
499
500 /* Read status register to check the result */
501 ret = adis16400_check_status(dev);
502 if (ret) {
503 adis16400_reset(dev);
504 dev_err(dev, "device not playing ball -> reset");
505 msleep(ADIS16400_STARTUP_DELAY);
506 ret = adis16400_check_status(dev);
507 if (ret) {
508 dev_err(dev, "giving up");
509 goto err_ret;
510 }
511 }
512
513 ret = adis16400_spi_read_reg_16(dev, ADIS16400_PRODUCT_ID, &prod_id);
514 if (ret)
515 goto err_ret;
516
517 if (prod_id != ADIS16400_PRODUCT_ID_DEFAULT)
518 dev_warn(dev, "unknown product id");
519
520 printk(KERN_INFO DRIVER_NAME ": prod_id 0x%04x at CS%d (irq %d)\n",
521 prod_id, st->us->chip_select, st->us->irq);
522
523 /* use high spi speed if possible */
524 ret = adis16400_spi_read_reg_16(dev, ADIS16400_SMPL_PRD, &smp_prd);
525 if (!ret && (smp_prd & ADIS16400_SMPL_PRD_DIV_MASK) < 0x0A) {
526 st->us->max_speed_hz = ADIS16400_SPI_SLOW;
527 spi_setup(st->us);
528 }
529
530
531err_ret:
532
533 return ret;
534}
535
536static IIO_DEV_ATTR_ACCEL_X_OFFSET(S_IWUSR | S_IRUGO,
537 adis16400_read_12bit_signed,
538 adis16400_write_16bit,
539 ADIS16400_XACCL_OFF);
540
541static IIO_DEV_ATTR_ACCEL_Y_OFFSET(S_IWUSR | S_IRUGO,
542 adis16400_read_12bit_signed,
543 adis16400_write_16bit,
544 ADIS16400_YACCL_OFF);
545
546static IIO_DEV_ATTR_ACCEL_Z_OFFSET(S_IWUSR | S_IRUGO,
547 adis16400_read_12bit_signed,
548 adis16400_write_16bit,
549 ADIS16400_ZACCL_OFF);
550
551static IIO_DEV_ATTR_IN_NAMED_RAW(supply, adis16400_read_14bit_signed,
552 ADIS16400_SUPPLY_OUT);
553static IIO_CONST_ATTR(in_supply_scale, "0.002418");
554
555static IIO_DEV_ATTR_GYRO_X(adis16400_read_14bit_signed,
556 ADIS16400_XGYRO_OUT);
557static IIO_DEV_ATTR_GYRO_Y(adis16400_read_14bit_signed,
558 ADIS16400_YGYRO_OUT);
559static IIO_DEV_ATTR_GYRO_Z(adis16400_read_14bit_signed,
560 ADIS16400_ZGYRO_OUT);
561static IIO_CONST_ATTR(gyro_scale, "0.05 deg/s");
562
563static IIO_DEV_ATTR_ACCEL_X(adis16400_read_14bit_signed,
564 ADIS16400_XACCL_OUT);
565static IIO_DEV_ATTR_ACCEL_Y(adis16400_read_14bit_signed,
566 ADIS16400_YACCL_OUT);
567static IIO_DEV_ATTR_ACCEL_Z(adis16400_read_14bit_signed,
568 ADIS16400_ZACCL_OUT);
569static IIO_CONST_ATTR(accel_scale, "0.00333 g");
570
571static IIO_DEV_ATTR_MAGN_X(adis16400_read_14bit_signed,
572 ADIS16400_XMAGN_OUT);
573static IIO_DEV_ATTR_MAGN_Y(adis16400_read_14bit_signed,
574 ADIS16400_YMAGN_OUT);
575static IIO_DEV_ATTR_MAGN_Z(adis16400_read_14bit_signed,
576 ADIS16400_ZMAGN_OUT);
577static IIO_CONST_ATTR(magn_scale, "0.0005 Gs");
578
579
580static IIO_DEV_ATTR_TEMP_RAW(adis16400_read_12bit_signed);
581static IIO_CONST_ATTR(temp_offset, "198.16 K");
582static IIO_CONST_ATTR(temp_scale, "0.14 K");
583
584static IIO_DEV_ATTR_IN_RAW(0, adis16400_read_12bit_unsigned,
585 ADIS16400_AUX_ADC);
586static IIO_CONST_ATTR(in0_scale, "0.000806");
587
588static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
589 adis16400_read_frequency,
590 adis16400_write_frequency);
591
592static IIO_DEVICE_ATTR(reset, S_IWUSR, NULL, adis16400_write_reset, 0);
593
594static IIO_CONST_ATTR_AVAIL_SAMP_FREQ("409 546 819 1638");
595
596static IIO_CONST_ATTR(name, "adis16400");
597
598static struct attribute *adis16400_event_attributes[] = {
599 NULL
600};
601
602static struct attribute_group adis16400_event_attribute_group = {
603 .attrs = adis16400_event_attributes,
604};
605
606static struct attribute *adis16400_attributes[] = {
607 &iio_dev_attr_accel_x_offset.dev_attr.attr,
608 &iio_dev_attr_accel_y_offset.dev_attr.attr,
609 &iio_dev_attr_accel_z_offset.dev_attr.attr,
610 &iio_dev_attr_in_supply_raw.dev_attr.attr,
611 &iio_const_attr_in_supply_scale.dev_attr.attr,
612 &iio_dev_attr_gyro_x_raw.dev_attr.attr,
613 &iio_dev_attr_gyro_y_raw.dev_attr.attr,
614 &iio_dev_attr_gyro_z_raw.dev_attr.attr,
615 &iio_const_attr_gyro_scale.dev_attr.attr,
616 &iio_dev_attr_accel_x_raw.dev_attr.attr,
617 &iio_dev_attr_accel_y_raw.dev_attr.attr,
618 &iio_dev_attr_accel_z_raw.dev_attr.attr,
619 &iio_const_attr_accel_scale.dev_attr.attr,
620 &iio_dev_attr_magn_x_raw.dev_attr.attr,
621 &iio_dev_attr_magn_y_raw.dev_attr.attr,
622 &iio_dev_attr_magn_z_raw.dev_attr.attr,
623 &iio_const_attr_magn_scale.dev_attr.attr,
624 &iio_dev_attr_temp_raw.dev_attr.attr,
625 &iio_const_attr_temp_offset.dev_attr.attr,
626 &iio_const_attr_temp_scale.dev_attr.attr,
627 &iio_dev_attr_in0_raw.dev_attr.attr,
628 &iio_const_attr_in0_scale.dev_attr.attr,
629 &iio_dev_attr_sampling_frequency.dev_attr.attr,
630 &iio_const_attr_available_sampling_frequency.dev_attr.attr,
631 &iio_dev_attr_reset.dev_attr.attr,
632 &iio_const_attr_name.dev_attr.attr,
633 NULL
634};
635
636static const struct attribute_group adis16400_attribute_group = {
637 .attrs = adis16400_attributes,
638};
639
640static int __devinit adis16400_probe(struct spi_device *spi)
641{
642 int ret, regdone = 0;
643 struct adis16400_state *st = kzalloc(sizeof *st, GFP_KERNEL);
644 if (!st) {
645 ret = -ENOMEM;
646 goto error_ret;
647 }
648 /* this is only used for removal purposes */
649 spi_set_drvdata(spi, st);
650
651 /* Allocate the comms buffers */
652 st->rx = kzalloc(sizeof(*st->rx)*ADIS16400_MAX_RX, GFP_KERNEL);
653 if (st->rx == NULL) {
654 ret = -ENOMEM;
655 goto error_free_st;
656 }
657 st->tx = kzalloc(sizeof(*st->tx)*ADIS16400_MAX_TX, GFP_KERNEL);
658 if (st->tx == NULL) {
659 ret = -ENOMEM;
660 goto error_free_rx;
661 }
662 st->us = spi;
663 mutex_init(&st->buf_lock);
664 /* setup the industrialio driver allocated elements */
665 st->indio_dev = iio_allocate_device();
666 if (st->indio_dev == NULL) {
667 ret = -ENOMEM;
668 goto error_free_tx;
669 }
670
671 st->indio_dev->dev.parent = &spi->dev;
672 st->indio_dev->num_interrupt_lines = 1;
673 st->indio_dev->event_attrs = &adis16400_event_attribute_group;
674 st->indio_dev->attrs = &adis16400_attribute_group;
675 st->indio_dev->dev_data = (void *)(st);
676 st->indio_dev->driver_module = THIS_MODULE;
677 st->indio_dev->modes = INDIO_DIRECT_MODE;
678
679 ret = adis16400_configure_ring(st->indio_dev);
680 if (ret)
681 goto error_free_dev;
682
683 ret = iio_device_register(st->indio_dev);
684 if (ret)
685 goto error_unreg_ring_funcs;
686 regdone = 1;
687
688 ret = adis16400_initialize_ring(st->indio_dev->ring);
689 if (ret) {
690 printk(KERN_ERR "failed to initialize the ring\n");
691 goto error_unreg_ring_funcs;
692 }
693
694 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) {
695#if 0 /* fixme: here we should support */
696 iio_init_work_cont(&st->work_cont_thresh,
697 NULL,
698 adis16400_thresh_handler_bh_no_check,
699 0,
700 0,
701 st);
702#endif
703 ret = iio_register_interrupt_line(spi->irq,
704 st->indio_dev,
705 0,
706 IRQF_TRIGGER_RISING,
707 "adis16400");
708 if (ret)
709 goto error_uninitialize_ring;
710
711 ret = adis16400_probe_trigger(st->indio_dev);
712 if (ret)
713 goto error_unregister_line;
714 }
715
716 /* Get the device into a sane initial state */
717 ret = adis16400_initial_setup(st);
718 if (ret)
719 goto error_remove_trigger;
720 return 0;
721
722error_remove_trigger:
723 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
724 adis16400_remove_trigger(st->indio_dev);
725error_unregister_line:
726 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
727 iio_unregister_interrupt_line(st->indio_dev, 0);
728error_uninitialize_ring:
729 adis16400_uninitialize_ring(st->indio_dev->ring);
730error_unreg_ring_funcs:
731 adis16400_unconfigure_ring(st->indio_dev);
732error_free_dev:
733 if (regdone)
734 iio_device_unregister(st->indio_dev);
735 else
736 iio_free_device(st->indio_dev);
737error_free_tx:
738 kfree(st->tx);
739error_free_rx:
740 kfree(st->rx);
741error_free_st:
742 kfree(st);
743error_ret:
744 return ret;
745}
746
747/* fixme, confirm ordering in this function */
748static int adis16400_remove(struct spi_device *spi)
749{
750 int ret;
751 struct adis16400_state *st = spi_get_drvdata(spi);
752 struct iio_dev *indio_dev = st->indio_dev;
753
754 ret = adis16400_stop_device(&(indio_dev->dev));
755 if (ret)
756 goto err_ret;
757
758 flush_scheduled_work();
759
760 adis16400_remove_trigger(indio_dev);
761 if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0)
762 iio_unregister_interrupt_line(indio_dev, 0);
763
764 adis16400_uninitialize_ring(indio_dev->ring);
765 adis16400_unconfigure_ring(indio_dev);
766 iio_device_unregister(indio_dev);
767 kfree(st->tx);
768 kfree(st->rx);
769 kfree(st);
770
771 return 0;
772
773err_ret:
774 return ret;
775}
776
777static struct spi_driver adis16400_driver = {
778 .driver = {
779 .name = "adis16400",
780 .owner = THIS_MODULE,
781 },
782 .probe = adis16400_probe,
783 .remove = __devexit_p(adis16400_remove),
784};
785
786static __init int adis16400_init(void)
787{
788 return spi_register_driver(&adis16400_driver);
789}
790module_init(adis16400_init);
791
792static __exit void adis16400_exit(void)
793{
794 spi_unregister_driver(&adis16400_driver);
795}
796module_exit(adis16400_exit);
797
798MODULE_AUTHOR("Manuel Stahl <manuel.stahl@iis.fraunhofer.de>");
799MODULE_DESCRIPTION("Analog Devices ADIS16400/5 IMU SPI driver");
800MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/imu/adis16400_ring.c b/drivers/staging/iio/imu/adis16400_ring.c
new file mode 100644
index 000000000000..5529b32bd2e3
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16400_ring.c
@@ -0,0 +1,245 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/gpio.h>
4#include <linux/workqueue.h>
5#include <linux/mutex.h>
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/spi/spi.h>
9#include <linux/sysfs.h>
10#include <linux/list.h>
11
12#include "../iio.h"
13#include "../sysfs.h"
14#include "../ring_sw.h"
15#include "../accel/accel.h"
16#include "../trigger.h"
17#include "adis16400.h"
18
19/**
20 * combine_8_to_16() utility function to munge to u8s into u16
21 **/
22static inline u16 combine_8_to_16(u8 lower, u8 upper)
23{
24 u16 _lower = lower;
25 u16 _upper = upper;
26 return _lower | (_upper << 8);
27}
28
29static IIO_SCAN_EL_C(supply, ADIS16400_SCAN_SUPPLY, IIO_SIGNED(14),
30 ADIS16400_SUPPLY_OUT, NULL);
31
32static IIO_SCAN_EL_C(gyro_x, ADIS16400_SCAN_GYRO_X, IIO_SIGNED(14),
33 ADIS16400_XGYRO_OUT, NULL);
34static IIO_SCAN_EL_C(gyro_y, ADIS16400_SCAN_GYRO_Y, IIO_SIGNED(14),
35 ADIS16400_YGYRO_OUT, NULL);
36static IIO_SCAN_EL_C(gyro_z, ADIS16400_SCAN_GYRO_Z, IIO_SIGNED(14),
37 ADIS16400_ZGYRO_OUT, NULL);
38
39static IIO_SCAN_EL_C(accel_x, ADIS16400_SCAN_ACC_X, IIO_SIGNED(14),
40 ADIS16400_XACCL_OUT, NULL);
41static IIO_SCAN_EL_C(accel_y, ADIS16400_SCAN_ACC_Y, IIO_SIGNED(14),
42 ADIS16400_YACCL_OUT, NULL);
43static IIO_SCAN_EL_C(accel_z, ADIS16400_SCAN_ACC_Z, IIO_SIGNED(14),
44 ADIS16400_ZACCL_OUT, NULL);
45
46static IIO_SCAN_EL_C(magn_x, ADIS16400_SCAN_MAGN_X, IIO_SIGNED(14),
47 ADIS16400_XMAGN_OUT, NULL);
48static IIO_SCAN_EL_C(magn_y, ADIS16400_SCAN_MAGN_Y, IIO_SIGNED(14),
49 ADIS16400_YMAGN_OUT, NULL);
50static IIO_SCAN_EL_C(magn_z, ADIS16400_SCAN_MAGN_Z, IIO_SIGNED(14),
51 ADIS16400_ZMAGN_OUT, NULL);
52
53static IIO_SCAN_EL_C(temp, ADIS16400_SCAN_TEMP, IIO_SIGNED(12),
54 ADIS16400_TEMP_OUT, NULL);
55static IIO_SCAN_EL_C(adc_0, ADIS16400_SCAN_ADC_0, IIO_SIGNED(12),
56 ADIS16400_AUX_ADC, NULL);
57
58static IIO_SCAN_EL_TIMESTAMP(12);
59
60static struct attribute *adis16400_scan_el_attrs[] = {
61 &iio_scan_el_supply.dev_attr.attr,
62 &iio_scan_el_gyro_x.dev_attr.attr,
63 &iio_scan_el_gyro_y.dev_attr.attr,
64 &iio_scan_el_gyro_z.dev_attr.attr,
65 &iio_scan_el_accel_x.dev_attr.attr,
66 &iio_scan_el_accel_y.dev_attr.attr,
67 &iio_scan_el_accel_z.dev_attr.attr,
68 &iio_scan_el_magn_x.dev_attr.attr,
69 &iio_scan_el_magn_y.dev_attr.attr,
70 &iio_scan_el_magn_z.dev_attr.attr,
71 &iio_scan_el_temp.dev_attr.attr,
72 &iio_scan_el_adc_0.dev_attr.attr,
73 &iio_scan_el_timestamp.dev_attr.attr,
74 NULL,
75};
76
77static struct attribute_group adis16400_scan_el_group = {
78 .attrs = adis16400_scan_el_attrs,
79 .name = "scan_elements",
80};
81
82/**
83 * adis16400_poll_func_th() top half interrupt handler called by trigger
84 * @private_data: iio_dev
85 **/
86static void adis16400_poll_func_th(struct iio_dev *indio_dev)
87{
88 struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
89 st->last_timestamp = indio_dev->trig->timestamp;
90 schedule_work(&st->work_trigger_to_ring);
91 /* Indicate that this interrupt is being handled */
92
93 /* Technically this is trigger related, but without this
94 * handler running there is currently no way for the interrupt
95 * to clear.
96 */
97}
98
99/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
100 * specific to be rolled into the core.
101 */
102static void adis16400_trigger_bh_to_ring(struct work_struct *work_s)
103{
104 struct adis16400_state *st
105 = container_of(work_s, struct adis16400_state,
106 work_trigger_to_ring);
107
108 int i = 0;
109 s16 *data;
110 size_t datasize = st->indio_dev
111 ->ring->access.get_bpd(st->indio_dev->ring);
112
113 data = kmalloc(datasize , GFP_KERNEL);
114 if (data == NULL) {
115 dev_err(&st->us->dev, "memory alloc failed in ring bh");
116 return;
117 }
118
119 if (st->indio_dev->scan_count)
120 if (adis16400_spi_read_burst(&st->indio_dev->dev, st->rx) >= 0)
121 for (; i < st->indio_dev->scan_count; i++) {
122 data[i] = combine_8_to_16(st->rx[i*2+1],
123 st->rx[i*2]);
124 }
125
126 /* Guaranteed to be aligned with 8 byte boundary */
127 if (st->indio_dev->scan_timestamp)
128 *((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
129
130 st->indio_dev->ring->access.store_to(st->indio_dev->ring,
131 (u8 *)data,
132 st->last_timestamp);
133
134 iio_trigger_notify_done(st->indio_dev->trig);
135 kfree(data);
136
137 return;
138}
139/* in these circumstances is it better to go with unaligned packing and
140 * deal with the cost?*/
141static int adis16400_data_rdy_ring_preenable(struct iio_dev *indio_dev)
142{
143 size_t size;
144 dev_dbg(&indio_dev->dev, "%s\n", __func__);
145 /* Check if there are any scan elements enabled, if not fail*/
146 if (!(indio_dev->scan_count || indio_dev->scan_timestamp))
147 return -EINVAL;
148
149 if (indio_dev->ring->access.set_bpd) {
150 if (indio_dev->scan_timestamp)
151 if (indio_dev->scan_count) /* Timestamp and data */
152 size = 6*sizeof(s64);
153 else /* Timestamp only */
154 size = sizeof(s64);
155 else /* Data only */
156 size = indio_dev->scan_count*sizeof(s16);
157 indio_dev->ring->access.set_bpd(indio_dev->ring, size);
158 }
159
160 return 0;
161}
162
163static int adis16400_data_rdy_ring_postenable(struct iio_dev *indio_dev)
164{
165 return indio_dev->trig
166 ? iio_trigger_attach_poll_func(indio_dev->trig,
167 indio_dev->pollfunc)
168 : 0;
169}
170
171static int adis16400_data_rdy_ring_predisable(struct iio_dev *indio_dev)
172{
173 return indio_dev->trig
174 ? iio_trigger_dettach_poll_func(indio_dev->trig,
175 indio_dev->pollfunc)
176 : 0;
177}
178
179void adis16400_unconfigure_ring(struct iio_dev *indio_dev)
180{
181 kfree(indio_dev->pollfunc);
182 iio_sw_rb_free(indio_dev->ring);
183}
184
185int adis16400_configure_ring(struct iio_dev *indio_dev)
186{
187 int ret = 0;
188 struct adis16400_state *st = indio_dev->dev_data;
189 struct iio_ring_buffer *ring;
190 INIT_WORK(&st->work_trigger_to_ring, adis16400_trigger_bh_to_ring);
191 /* Set default scan mode */
192
193 iio_scan_mask_set(indio_dev, iio_scan_el_supply.number);
194 iio_scan_mask_set(indio_dev, iio_scan_el_gyro_x.number);
195 iio_scan_mask_set(indio_dev, iio_scan_el_gyro_y.number);
196 iio_scan_mask_set(indio_dev, iio_scan_el_gyro_z.number);
197 iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
198 iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
199 iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
200 iio_scan_mask_set(indio_dev, iio_scan_el_magn_x.number);
201 iio_scan_mask_set(indio_dev, iio_scan_el_magn_y.number);
202 iio_scan_mask_set(indio_dev, iio_scan_el_magn_z.number);
203 iio_scan_mask_set(indio_dev, iio_scan_el_temp.number);
204 iio_scan_mask_set(indio_dev, iio_scan_el_adc_0.number);
205 indio_dev->scan_timestamp = true;
206
207 indio_dev->scan_el_attrs = &adis16400_scan_el_group;
208
209 ring = iio_sw_rb_allocate(indio_dev);
210 if (!ring) {
211 ret = -ENOMEM;
212 return ret;
213 }
214 indio_dev->ring = ring;
215 /* Effectively select the ring buffer implementation */
216 iio_ring_sw_register_funcs(&ring->access);
217 ring->preenable = &adis16400_data_rdy_ring_preenable;
218 ring->postenable = &adis16400_data_rdy_ring_postenable;
219 ring->predisable = &adis16400_data_rdy_ring_predisable;
220 ring->owner = THIS_MODULE;
221
222 indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
223 if (indio_dev->pollfunc == NULL) {
224 ret = -ENOMEM;
225 goto error_iio_sw_rb_free;;
226 }
227 indio_dev->pollfunc->poll_func_main = &adis16400_poll_func_th;
228 indio_dev->pollfunc->private_data = indio_dev;
229 indio_dev->modes |= INDIO_RING_TRIGGERED;
230 return 0;
231
232error_iio_sw_rb_free:
233 iio_sw_rb_free(indio_dev->ring);
234 return ret;
235}
236
237int adis16400_initialize_ring(struct iio_ring_buffer *ring)
238{
239 return iio_ring_buffer_register(ring, 0);
240}
241
242void adis16400_uninitialize_ring(struct iio_ring_buffer *ring)
243{
244 iio_ring_buffer_unregister(ring);
245}
diff --git a/drivers/staging/iio/imu/adis16400_trigger.c b/drivers/staging/iio/imu/adis16400_trigger.c
new file mode 100644
index 000000000000..3b3250ac7680
--- /dev/null
+++ b/drivers/staging/iio/imu/adis16400_trigger.c
@@ -0,0 +1,127 @@
1#include <linux/interrupt.h>
2#include <linux/irq.h>
3#include <linux/mutex.h>
4#include <linux/device.h>
5#include <linux/kernel.h>
6#include <linux/sysfs.h>
7#include <linux/list.h>
8#include <linux/spi/spi.h>
9
10#include "../iio.h"
11#include "../sysfs.h"
12#include "../trigger.h"
13#include "adis16400.h"
14
15/**
16 * adis16400_data_rdy_trig_poll() the event handler for the data rdy trig
17 **/
18static int adis16400_data_rdy_trig_poll(struct iio_dev *dev_info,
19 int index,
20 s64 timestamp,
21 int no_test)
22{
23 struct adis16400_state *st = iio_dev_get_devdata(dev_info);
24 struct iio_trigger *trig = st->trig;
25
26 trig->timestamp = timestamp;
27 iio_trigger_poll(trig);
28
29 return IRQ_HANDLED;
30}
31
32IIO_EVENT_SH(data_rdy_trig, &adis16400_data_rdy_trig_poll);
33
34static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
35
36static struct attribute *adis16400_trigger_attrs[] = {
37 &dev_attr_name.attr,
38 NULL,
39};
40
41static const struct attribute_group adis16400_trigger_attr_group = {
42 .attrs = adis16400_trigger_attrs,
43};
44
45/**
46 * adis16400_data_rdy_trigger_set_state() set datardy interrupt state
47 **/
48static int adis16400_data_rdy_trigger_set_state(struct iio_trigger *trig,
49 bool state)
50{
51 struct adis16400_state *st = trig->private_data;
52 struct iio_dev *indio_dev = st->indio_dev;
53 int ret = 0;
54
55 dev_dbg(&indio_dev->dev, "%s (%d)\n", __func__, state);
56 ret = adis16400_set_irq(&st->indio_dev->dev, state);
57 if (state == false) {
58 iio_remove_event_from_list(&iio_event_data_rdy_trig,
59 &indio_dev->interrupts[0]
60 ->ev_list);
61 /* possible quirk with handler currently worked around
62 by ensuring the work queue is empty */
63 flush_scheduled_work();
64 } else {
65 iio_add_event_to_list(&iio_event_data_rdy_trig,
66 &indio_dev->interrupts[0]->ev_list);
67 }
68 return ret;
69}
70
71/**
72 * adis16400_trig_try_reen() try renabling irq for data rdy trigger
73 * @trig: the datardy trigger
74 **/
75static int adis16400_trig_try_reen(struct iio_trigger *trig)
76{
77 struct adis16400_state *st = trig->private_data;
78 enable_irq(st->us->irq);
79 /* irq reenabled so success! */
80 return 0;
81}
82
83int adis16400_probe_trigger(struct iio_dev *indio_dev)
84{
85 int ret;
86 struct adis16400_state *st = indio_dev->dev_data;
87
88 st->trig = iio_allocate_trigger();
89 st->trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
90 if (!st->trig->name) {
91 ret = -ENOMEM;
92 goto error_free_trig;
93 }
94 snprintf((char *)st->trig->name,
95 IIO_TRIGGER_NAME_LENGTH,
96 "adis16400-dev%d", indio_dev->id);
97 st->trig->dev.parent = &st->us->dev;
98 st->trig->owner = THIS_MODULE;
99 st->trig->private_data = st;
100 st->trig->set_trigger_state = &adis16400_data_rdy_trigger_set_state;
101 st->trig->try_reenable = &adis16400_trig_try_reen;
102 st->trig->control_attrs = &adis16400_trigger_attr_group;
103 ret = iio_trigger_register(st->trig);
104
105 /* select default trigger */
106 indio_dev->trig = st->trig;
107 if (ret)
108 goto error_free_trig_name;
109
110 return 0;
111
112error_free_trig_name:
113 kfree(st->trig->name);
114error_free_trig:
115 iio_free_trigger(st->trig);
116
117 return ret;
118}
119
120void adis16400_remove_trigger(struct iio_dev *indio_dev)
121{
122 struct adis16400_state *state = indio_dev->dev_data;
123
124 iio_trigger_unregister(state->trig);
125 kfree(state->trig->name);
126 iio_free_trigger(state->trig);
127}
diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c
index 1d77082c8531..01030684ef28 100644
--- a/drivers/staging/iio/industrialio-core.c
+++ b/drivers/staging/iio/industrialio-core.c
@@ -42,16 +42,10 @@ dev_t iio_devt;
42EXPORT_SYMBOL(iio_devt); 42EXPORT_SYMBOL(iio_devt);
43 43
44#define IIO_DEV_MAX 256 44#define IIO_DEV_MAX 256
45static char *iio_devnode(struct device *dev, mode_t *mode) 45struct bus_type iio_bus_type = {
46{
47 return kasprintf(GFP_KERNEL, "iio/%s", dev_name(dev));
48}
49
50struct class iio_class = {
51 .name = "iio", 46 .name = "iio",
52 .devnode = iio_devnode,
53}; 47};
54EXPORT_SYMBOL(iio_class); 48EXPORT_SYMBOL(iio_bus_type);
55 49
56void __iio_change_event(struct iio_detected_event_list *ev, 50void __iio_change_event(struct iio_detected_event_list *ev,
57 int ev_code, 51 int ev_code,
@@ -405,7 +399,7 @@ int iio_setup_ev_int(struct iio_event_interface *ev_int,
405{ 399{
406 int ret, minor; 400 int ret, minor;
407 401
408 ev_int->dev.class = &iio_class; 402 ev_int->dev.bus = &iio_bus_type;
409 ev_int->dev.parent = dev; 403 ev_int->dev.parent = dev;
410 ev_int->dev.type = &iio_event_type; 404 ev_int->dev.type = &iio_event_type;
411 device_initialize(&ev_int->dev); 405 device_initialize(&ev_int->dev);
@@ -478,23 +472,23 @@ static int __init iio_init(void)
478{ 472{
479 int ret; 473 int ret;
480 474
481 /* Create sysfs class */ 475 /* Register sysfs bus */
482 ret = class_register(&iio_class); 476 ret = bus_register(&iio_bus_type);
483 if (ret < 0) { 477 if (ret < 0) {
484 printk(KERN_ERR 478 printk(KERN_ERR
485 "%s could not create sysfs class\n", 479 "%s could not register bus type\n",
486 __FILE__); 480 __FILE__);
487 goto error_nothing; 481 goto error_nothing;
488 } 482 }
489 483
490 ret = iio_dev_init(); 484 ret = iio_dev_init();
491 if (ret < 0) 485 if (ret < 0)
492 goto error_unregister_class; 486 goto error_unregister_bus_type;
493 487
494 return 0; 488 return 0;
495 489
496error_unregister_class: 490error_unregister_bus_type:
497 class_unregister(&iio_class); 491 bus_unregister(&iio_bus_type);
498error_nothing: 492error_nothing:
499 return ret; 493 return ret;
500} 494}
@@ -502,7 +496,7 @@ error_nothing:
502static void __exit iio_exit(void) 496static void __exit iio_exit(void)
503{ 497{
504 iio_dev_exit(); 498 iio_dev_exit();
505 class_unregister(&iio_class); 499 bus_unregister(&iio_bus_type);
506} 500}
507 501
508static int iio_device_register_sysfs(struct iio_dev *dev_info) 502static int iio_device_register_sysfs(struct iio_dev *dev_info)
@@ -667,8 +661,9 @@ static int iio_device_register_eventset(struct iio_dev *dev_info)
667 dev_info->event_interfaces[i].id = ret; 661 dev_info->event_interfaces[i].id = ret;
668 662
669 snprintf(dev_info->event_interfaces[i]._name, 20, 663 snprintf(dev_info->event_interfaces[i]._name, 20,
670 "event_line%d", 664 "%s:event%d",
671 dev_info->event_interfaces[i].id); 665 dev_name(&dev_info->dev),
666 dev_info->event_interfaces[i].id);
672 667
673 ret = iio_setup_ev_int(&dev_info->event_interfaces[i], 668 ret = iio_setup_ev_int(&dev_info->event_interfaces[i],
674 (const char *)(dev_info 669 (const char *)(dev_info
@@ -683,16 +678,14 @@ static int iio_device_register_eventset(struct iio_dev *dev_info)
683 dev_info->event_interfaces[i].id); 678 dev_info->event_interfaces[i].id);
684 goto error_free_setup_ev_ints; 679 goto error_free_setup_ev_ints;
685 } 680 }
686 }
687 681
688 for (i = 0; i < dev_info->num_interrupt_lines; i++) { 682 dev_set_drvdata(&dev_info->event_interfaces[i].dev,
689 snprintf(dev_info->event_interfaces[i]._attrname, 20, 683 (void *)dev_info);
690 "event_line%d_sources", i); 684 ret = sysfs_create_group(&dev_info
691 dev_info->event_attrs[i].name 685 ->event_interfaces[i]
692 = (const char *) 686 .dev.kobj,
693 (dev_info->event_interfaces[i]._attrname); 687 &dev_info->event_attrs[i]);
694 ret = sysfs_create_group(&dev_info->dev.kobj, 688
695 &dev_info->event_attrs[i]);
696 if (ret) { 689 if (ret) {
697 dev_err(&dev_info->dev, 690 dev_err(&dev_info->dev,
698 "Failed to register sysfs for event attrs"); 691 "Failed to register sysfs for event attrs");
@@ -714,13 +707,13 @@ error_unregister_config_attrs:
714 i = dev_info->num_interrupt_lines - 1; 707 i = dev_info->num_interrupt_lines - 1;
715error_remove_sysfs_interfaces: 708error_remove_sysfs_interfaces:
716 for (j = 0; j < i; j++) 709 for (j = 0; j < i; j++)
717 sysfs_remove_group(&dev_info->dev.kobj, 710 sysfs_remove_group(&dev_info
711 ->event_interfaces[j].dev.kobj,
718 &dev_info->event_attrs[j]); 712 &dev_info->event_attrs[j]);
719 i = dev_info->num_interrupt_lines - 1;
720error_free_setup_ev_ints: 713error_free_setup_ev_ints:
721 for (j = 0; j < i; j++) { 714 for (j = 0; j < i; j++) {
722 iio_free_idr_val(&iio_event_idr, 715 iio_free_idr_val(&iio_event_idr,
723 dev_info->event_interfaces[i].id); 716 dev_info->event_interfaces[j].id);
724 iio_free_ev_int(&dev_info->event_interfaces[j]); 717 iio_free_ev_int(&dev_info->event_interfaces[j]);
725 } 718 }
726 kfree(dev_info->interrupts); 719 kfree(dev_info->interrupts);
@@ -738,7 +731,8 @@ static void iio_device_unregister_eventset(struct iio_dev *dev_info)
738 if (dev_info->num_interrupt_lines == 0) 731 if (dev_info->num_interrupt_lines == 0)
739 return; 732 return;
740 for (i = 0; i < dev_info->num_interrupt_lines; i++) 733 for (i = 0; i < dev_info->num_interrupt_lines; i++)
741 sysfs_remove_group(&dev_info->dev.kobj, 734 sysfs_remove_group(&dev_info
735 ->event_interfaces[i].dev.kobj,
742 &dev_info->event_attrs[i]); 736 &dev_info->event_attrs[i]);
743 737
744 for (i = 0; i < dev_info->num_interrupt_lines; i++) { 738 for (i = 0; i < dev_info->num_interrupt_lines; i++) {
@@ -769,7 +763,7 @@ struct iio_dev *iio_allocate_device(void)
769 763
770 if (dev) { 764 if (dev) {
771 dev->dev.type = &iio_dev_type; 765 dev->dev.type = &iio_dev_type;
772 dev->dev.class = &iio_class; 766 dev->dev.bus = &iio_bus_type;
773 device_initialize(&dev->dev); 767 device_initialize(&dev->dev);
774 dev_set_drvdata(&dev->dev, (void *)dev); 768 dev_set_drvdata(&dev->dev, (void *)dev);
775 mutex_init(&dev->mlock); 769 mutex_init(&dev->mlock);
@@ -810,7 +804,7 @@ int iio_device_register(struct iio_dev *dev_info)
810 ret = iio_device_register_eventset(dev_info); 804 ret = iio_device_register_eventset(dev_info);
811 if (ret) { 805 if (ret) {
812 dev_err(dev_info->dev.parent, 806 dev_err(dev_info->dev.parent,
813 "Failed to register event set \n"); 807 "Failed to register event set\n");
814 goto error_free_sysfs; 808 goto error_free_sysfs;
815 } 809 }
816 if (dev_info->modes & INDIO_RING_TRIGGERED) 810 if (dev_info->modes & INDIO_RING_TRIGGERED)
diff --git a/drivers/staging/iio/industrialio-ring.c b/drivers/staging/iio/industrialio-ring.c
index e53e214bfeb0..ada159bbb1f7 100644
--- a/drivers/staging/iio/industrialio-ring.c
+++ b/drivers/staging/iio/industrialio-ring.c
@@ -20,19 +20,11 @@
20#include <linux/poll.h> 20#include <linux/poll.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/cdev.h> 22#include <linux/cdev.h>
23#include <linux/idr.h>
24#include <linux/slab.h> 23#include <linux/slab.h>
25 24
26#include "iio.h" 25#include "iio.h"
27#include "ring_generic.h" 26#include "ring_generic.h"
28 27
29/* IDR for ring buffer identifier */
30static DEFINE_IDR(iio_ring_idr);
31/* IDR for ring event identifier */
32static DEFINE_IDR(iio_ring_event_idr);
33/* IDR for ring access identifier */
34static DEFINE_IDR(iio_ring_access_idr);
35
36int iio_push_ring_event(struct iio_ring_buffer *ring_buf, 28int iio_push_ring_event(struct iio_ring_buffer *ring_buf,
37 int event_code, 29 int event_code,
38 s64 timestamp) 30 s64 timestamp)
@@ -66,7 +58,7 @@ EXPORT_SYMBOL(iio_push_or_escallate_ring_event);
66 * This function relies on all ring buffer implementations having an 58 * This function relies on all ring buffer implementations having an
67 * iio_ring_buffer as their first element. 59 * iio_ring_buffer as their first element.
68 **/ 60 **/
69int iio_ring_open(struct inode *inode, struct file *filp) 61static int iio_ring_open(struct inode *inode, struct file *filp)
70{ 62{
71 struct iio_handler *hand 63 struct iio_handler *hand
72 = container_of(inode->i_cdev, struct iio_handler, chrdev); 64 = container_of(inode->i_cdev, struct iio_handler, chrdev);
@@ -85,7 +77,7 @@ int iio_ring_open(struct inode *inode, struct file *filp)
85 * This function relies on all ring buffer implementations having an 77 * This function relies on all ring buffer implementations having an
86 * iio_ring_buffer as their first element. 78 * iio_ring_buffer as their first element.
87 **/ 79 **/
88int iio_ring_release(struct inode *inode, struct file *filp) 80static int iio_ring_release(struct inode *inode, struct file *filp)
89{ 81{
90 struct cdev *cd = inode->i_cdev; 82 struct cdev *cd = inode->i_cdev;
91 struct iio_handler *hand = iio_cdev_to_handler(cd); 83 struct iio_handler *hand = iio_cdev_to_handler(cd);
@@ -104,10 +96,8 @@ int iio_ring_release(struct inode *inode, struct file *filp)
104 * This function relies on all ring buffer implementations having an 96 * This function relies on all ring buffer implementations having an
105 * iio_ring _bufer as their first element. 97 * iio_ring _bufer as their first element.
106 **/ 98 **/
107ssize_t iio_ring_rip_outer(struct file *filp, 99static ssize_t iio_ring_rip_outer(struct file *filp, char __user *buf,
108 char *buf, 100 size_t count, loff_t *f_ps)
109 size_t count,
110 loff_t *f_ps)
111{ 101{
112 struct iio_ring_buffer *rb = filp->private_data; 102 struct iio_ring_buffer *rb = filp->private_data;
113 int ret, dead_offset, copied; 103 int ret, dead_offset, copied;
@@ -158,25 +148,21 @@ __iio_request_ring_buffer_event_chrdev(struct iio_ring_buffer *buf,
158 struct device *dev) 148 struct device *dev)
159{ 149{
160 int ret; 150 int ret;
161 ret = iio_get_new_idr_val(&iio_ring_event_idr);
162 if (ret < 0)
163 goto error_ret;
164 else
165 buf->ev_int.id = ret;
166 151
167 snprintf(buf->ev_int._name, 20, 152 buf->ev_int.id = id;
168 "ring_event_line%d", 153
154 snprintf(buf->ev_int._name, sizeof(buf->ev_int._name),
155 "%s:event%d",
156 dev_name(&buf->dev),
169 buf->ev_int.id); 157 buf->ev_int.id);
170 ret = iio_setup_ev_int(&(buf->ev_int), 158 ret = iio_setup_ev_int(&(buf->ev_int),
171 buf->ev_int._name, 159 buf->ev_int._name,
172 owner, 160 owner,
173 dev); 161 dev);
174 if (ret) 162 if (ret)
175 goto error_free_id; 163 goto error_ret;
176 return 0; 164 return 0;
177 165
178error_free_id:
179 iio_free_idr_val(&iio_ring_event_idr, buf->ev_int.id);
180error_ret: 166error_ret:
181 return ret; 167 return ret;
182} 168}
@@ -185,7 +171,6 @@ static inline void
185__iio_free_ring_buffer_event_chrdev(struct iio_ring_buffer *buf) 171__iio_free_ring_buffer_event_chrdev(struct iio_ring_buffer *buf)
186{ 172{
187 iio_free_ev_int(&(buf->ev_int)); 173 iio_free_ev_int(&(buf->ev_int));
188 iio_free_idr_val(&iio_ring_event_idr, buf->ev_int.id);
189} 174}
190 175
191static void iio_ring_access_release(struct device *dev) 176static void iio_ring_access_release(struct device *dev)
@@ -210,7 +195,7 @@ __iio_request_ring_buffer_access_chrdev(struct iio_ring_buffer *buf,
210 buf->access_handler.flags = 0; 195 buf->access_handler.flags = 0;
211 196
212 buf->access_dev.parent = &buf->dev; 197 buf->access_dev.parent = &buf->dev;
213 buf->access_dev.class = &iio_class; 198 buf->access_dev.bus = &iio_bus_type;
214 buf->access_dev.type = &iio_ring_access_type; 199 buf->access_dev.type = &iio_ring_access_type;
215 device_initialize(&buf->access_dev); 200 device_initialize(&buf->access_dev);
216 201
@@ -221,16 +206,16 @@ __iio_request_ring_buffer_access_chrdev(struct iio_ring_buffer *buf,
221 } 206 }
222 buf->access_dev.devt = MKDEV(MAJOR(iio_devt), minor); 207 buf->access_dev.devt = MKDEV(MAJOR(iio_devt), minor);
223 208
224 ret = iio_get_new_idr_val(&iio_ring_access_idr); 209
225 if (ret < 0) 210 buf->access_id = id;
226 goto error_device_put; 211
227 else 212 dev_set_name(&buf->access_dev, "%s:access%d",
228 buf->access_id = ret; 213 dev_name(&buf->dev),
229 dev_set_name(&buf->access_dev, "ring_access%d", buf->access_id); 214 buf->access_id);
230 ret = device_add(&buf->access_dev); 215 ret = device_add(&buf->access_dev);
231 if (ret < 0) { 216 if (ret < 0) {
232 printk(KERN_ERR "failed to add the ring access dev\n"); 217 printk(KERN_ERR "failed to add the ring access dev\n");
233 goto error_free_idr; 218 goto error_device_put;
234 } 219 }
235 220
236 cdev_init(&buf->access_handler.chrdev, &iio_ring_fileops); 221 cdev_init(&buf->access_handler.chrdev, &iio_ring_fileops);
@@ -242,10 +227,9 @@ __iio_request_ring_buffer_access_chrdev(struct iio_ring_buffer *buf,
242 goto error_device_unregister; 227 goto error_device_unregister;
243 } 228 }
244 return 0; 229 return 0;
230
245error_device_unregister: 231error_device_unregister:
246 device_unregister(&buf->access_dev); 232 device_unregister(&buf->access_dev);
247error_free_idr:
248 iio_free_idr_val(&iio_ring_access_idr, buf->access_id);
249error_device_put: 233error_device_put:
250 put_device(&buf->access_dev); 234 put_device(&buf->access_dev);
251 235
@@ -254,7 +238,6 @@ error_device_put:
254 238
255static void __iio_free_ring_buffer_access_chrdev(struct iio_ring_buffer *buf) 239static void __iio_free_ring_buffer_access_chrdev(struct iio_ring_buffer *buf)
256{ 240{
257 iio_free_idr_val(&iio_ring_access_idr, buf->access_id);
258 device_unregister(&buf->access_dev); 241 device_unregister(&buf->access_dev);
259} 242}
260 243
@@ -266,22 +249,23 @@ void iio_ring_buffer_init(struct iio_ring_buffer *ring,
266 ring->indio_dev = dev_info; 249 ring->indio_dev = dev_info;
267 ring->ev_int.private = ring; 250 ring->ev_int.private = ring;
268 ring->access_handler.private = ring; 251 ring->access_handler.private = ring;
252 ring->shared_ev_pointer.ev_p = NULL;
253 spin_lock_init(&ring->shared_ev_pointer.lock);
269} 254}
270EXPORT_SYMBOL(iio_ring_buffer_init); 255EXPORT_SYMBOL(iio_ring_buffer_init);
271 256
272int iio_ring_buffer_register(struct iio_ring_buffer *ring) 257int iio_ring_buffer_register(struct iio_ring_buffer *ring, int id)
273{ 258{
274 int ret; 259 int ret;
275 ret = iio_get_new_idr_val(&iio_ring_idr);
276 if (ret < 0)
277 goto error_ret;
278 else
279 ring->id = ret;
280 260
281 dev_set_name(&ring->dev, "ring_buffer%d", ring->id); 261 ring->id = id;
262
263 dev_set_name(&ring->dev, "%s:buffer%d",
264 dev_name(ring->dev.parent),
265 ring->id);
282 ret = device_add(&ring->dev); 266 ret = device_add(&ring->dev);
283 if (ret) 267 if (ret)
284 goto error_free_id; 268 goto error_ret;
285 269
286 ret = __iio_request_ring_buffer_event_chrdev(ring, 270 ret = __iio_request_ring_buffer_event_chrdev(ring,
287 0, 271 0,
@@ -302,8 +286,6 @@ error_free_ring_buffer_event_chrdev:
302 __iio_free_ring_buffer_event_chrdev(ring); 286 __iio_free_ring_buffer_event_chrdev(ring);
303error_remove_device: 287error_remove_device:
304 device_del(&ring->dev); 288 device_del(&ring->dev);
305error_free_id:
306 iio_free_idr_val(&iio_ring_idr, ring->id);
307error_ret: 289error_ret:
308 return ret; 290 return ret;
309} 291}
@@ -314,7 +296,6 @@ void iio_ring_buffer_unregister(struct iio_ring_buffer *ring)
314 __iio_free_ring_buffer_access_chrdev(ring); 296 __iio_free_ring_buffer_access_chrdev(ring);
315 __iio_free_ring_buffer_event_chrdev(ring); 297 __iio_free_ring_buffer_event_chrdev(ring);
316 device_del(&ring->dev); 298 device_del(&ring->dev);
317 iio_free_idr_val(&iio_ring_idr, ring->id);
318} 299}
319EXPORT_SYMBOL(iio_ring_buffer_unregister); 300EXPORT_SYMBOL(iio_ring_buffer_unregister);
320 301
diff --git a/drivers/staging/iio/industrialio-trigger.c b/drivers/staging/iio/industrialio-trigger.c
index 35ec80ba444f..5682e61600f6 100644
--- a/drivers/staging/iio/industrialio-trigger.c
+++ b/drivers/staging/iio/industrialio-trigger.c
@@ -18,6 +18,7 @@
18 18
19#include "iio.h" 19#include "iio.h"
20#include "trigger.h" 20#include "trigger.h"
21#include "trigger_consumer.h"
21 22
22/* RFC - Question of approach 23/* RFC - Question of approach
23 * Make the common case (single sensor single trigger) 24 * Make the common case (single sensor single trigger)
@@ -92,9 +93,9 @@ idr_again:
92 **/ 93 **/
93static void iio_trigger_unregister_id(struct iio_trigger *trig_info) 94static void iio_trigger_unregister_id(struct iio_trigger *trig_info)
94{ 95{
95 spin_lock(&iio_trigger_idr_lock); 96 spin_lock(&iio_trigger_idr_lock);
96 idr_remove(&iio_trigger_idr, trig_info->id); 97 idr_remove(&iio_trigger_idr, trig_info->id);
97 spin_unlock(&iio_trigger_idr_lock); 98 spin_unlock(&iio_trigger_idr_lock);
98} 99}
99 100
100int iio_trigger_register(struct iio_trigger *trig_info) 101int iio_trigger_register(struct iio_trigger *trig_info)
@@ -156,6 +157,9 @@ struct iio_trigger *iio_trigger_find_by_name(const char *name, size_t len)
156 struct iio_trigger *trig; 157 struct iio_trigger *trig;
157 bool found = false; 158 bool found = false;
158 159
160 if (len && name[len - 1] == '\n')
161 len--;
162
159 mutex_lock(&iio_trigger_list_lock); 163 mutex_lock(&iio_trigger_list_lock);
160 list_for_each_entry(trig, &iio_trigger_list, list) { 164 list_for_each_entry(trig, &iio_trigger_list, list) {
161 if (strncmp(trig->name, name, len) == 0) { 165 if (strncmp(trig->name, name, len) == 0) {
@@ -166,7 +170,7 @@ struct iio_trigger *iio_trigger_find_by_name(const char *name, size_t len)
166 mutex_unlock(&iio_trigger_list_lock); 170 mutex_unlock(&iio_trigger_list_lock);
167 171
168 return found ? trig : NULL; 172 return found ? trig : NULL;
169}; 173}
170EXPORT_SYMBOL(iio_trigger_find_by_name); 174EXPORT_SYMBOL(iio_trigger_find_by_name);
171 175
172void iio_trigger_poll(struct iio_trigger *trig) 176void iio_trigger_poll(struct iio_trigger *trig)
@@ -331,9 +335,9 @@ static ssize_t iio_trigger_write_current(struct device *dev,
331 return len; 335 return len;
332} 336}
333 337
334DEVICE_ATTR(current_trigger, S_IRUGO | S_IWUSR, 338static DEVICE_ATTR(current_trigger, S_IRUGO | S_IWUSR,
335 iio_trigger_read_current, 339 iio_trigger_read_current,
336 iio_trigger_write_current); 340 iio_trigger_write_current);
337 341
338static struct attribute *iio_trigger_consumer_attrs[] = { 342static struct attribute *iio_trigger_consumer_attrs[] = {
339 &dev_attr_current_trigger.attr, 343 &dev_attr_current_trigger.attr,
@@ -362,7 +366,7 @@ struct iio_trigger *iio_allocate_trigger(void)
362 trig = kzalloc(sizeof *trig, GFP_KERNEL); 366 trig = kzalloc(sizeof *trig, GFP_KERNEL);
363 if (trig) { 367 if (trig) {
364 trig->dev.type = &iio_trig_type; 368 trig->dev.type = &iio_trig_type;
365 trig->dev.class = &iio_class; 369 trig->dev.bus = &iio_bus_type;
366 device_initialize(&trig->dev); 370 device_initialize(&trig->dev);
367 dev_set_drvdata(&trig->dev, (void *)trig); 371 dev_set_drvdata(&trig->dev, (void *)trig);
368 spin_lock_init(&trig->pollfunc_list_lock); 372 spin_lock_init(&trig->pollfunc_list_lock);
diff --git a/drivers/staging/iio/light/tsl2563.c b/drivers/staging/iio/light/tsl2563.c
index 8770a00e3652..43aaacff4e74 100644
--- a/drivers/staging/iio/light/tsl2563.c
+++ b/drivers/staging/iio/light/tsl2563.c
@@ -592,18 +592,30 @@ static ssize_t tsl2563_calib1_store(struct device *dev,
592 * once I understand what they mean */ 592 * once I understand what they mean */
593static DEVICE_ATTR(adc0, S_IRUGO, tsl2563_adc0_show, NULL); 593static DEVICE_ATTR(adc0, S_IRUGO, tsl2563_adc0_show, NULL);
594static DEVICE_ATTR(adc1, S_IRUGO, tsl2563_adc1_show, NULL); 594static DEVICE_ATTR(adc1, S_IRUGO, tsl2563_adc1_show, NULL);
595static DEVICE_ATTR(lux, S_IRUGO, tsl2563_lux_show, NULL); 595static DEVICE_ATTR(illuminance0_input, S_IRUGO, tsl2563_lux_show, NULL);
596static DEVICE_ATTR(calib0, S_IRUGO | S_IWUSR, 596static DEVICE_ATTR(calib0, S_IRUGO | S_IWUSR,
597 tsl2563_calib0_show, tsl2563_calib0_store); 597 tsl2563_calib0_show, tsl2563_calib0_store);
598static DEVICE_ATTR(calib1, S_IRUGO | S_IWUSR, 598static DEVICE_ATTR(calib1, S_IRUGO | S_IWUSR,
599 tsl2563_calib1_show, tsl2563_calib1_store); 599 tsl2563_calib1_show, tsl2563_calib1_store);
600 600
601static ssize_t tsl2563_show_name(struct device *dev,
602 struct device_attribute *attr,
603 char *buf)
604{
605 struct iio_dev *indio_dev = dev_get_drvdata(dev);
606 struct tsl2563_chip *chip = indio_dev->dev_data;
607 return sprintf(buf, "%s\n", chip->client->name);
608}
609
610static DEVICE_ATTR(name, S_IRUGO, tsl2563_show_name, NULL);
611
601static struct attribute *tsl2563_attributes[] = { 612static struct attribute *tsl2563_attributes[] = {
602 &dev_attr_adc0.attr, 613 &dev_attr_adc0.attr,
603 &dev_attr_adc1.attr, 614 &dev_attr_adc1.attr,
604 &dev_attr_lux.attr, 615 &dev_attr_illuminance0_input.attr,
605 &dev_attr_calib0.attr, 616 &dev_attr_calib0.attr,
606 &dev_attr_calib1.attr, 617 &dev_attr_calib1.attr,
618 &dev_attr_name.attr,
607 NULL 619 NULL
608}; 620};
609 621
@@ -634,7 +646,7 @@ static int __devinit tsl2563_probe(struct i2c_client *client,
634 646
635 err = tsl2563_detect(chip); 647 err = tsl2563_detect(chip);
636 if (err) { 648 if (err) {
637 dev_err(&client->dev, "device not found, error %d \n", -err); 649 dev_err(&client->dev, "device not found, error %d\n", -err);
638 goto fail1; 650 goto fail1;
639 } 651 }
640 652
diff --git a/drivers/staging/iio/magnetometer/magnet.h b/drivers/staging/iio/magnetometer/magnet.h
new file mode 100644
index 000000000000..64338301f8df
--- /dev/null
+++ b/drivers/staging/iio/magnetometer/magnet.h
@@ -0,0 +1,31 @@
1
2#include "../sysfs.h"
3
4/* Magnetometer types of attribute */
5
6#define IIO_DEV_ATTR_MAGN_X_OFFSET(_mode, _show, _store, _addr) \
7 IIO_DEVICE_ATTR(magn_x_offset, _mode, _show, _store, _addr)
8
9#define IIO_DEV_ATTR_MAGN_Y_OFFSET(_mode, _show, _store, _addr) \
10 IIO_DEVICE_ATTR(magn_y_offset, _mode, _show, _store, _addr)
11
12#define IIO_DEV_ATTR_MAGN_Z_OFFSET(_mode, _show, _store, _addr) \
13 IIO_DEVICE_ATTR(magn_z_offset, _mode, _show, _store, _addr)
14
15#define IIO_DEV_ATTR_MAGN_X_GAIN(_mode, _show, _store, _addr) \
16 IIO_DEVICE_ATTR(magn_x_gain, _mode, _show, _store, _addr)
17
18#define IIO_DEV_ATTR_MAGN_Y_GAIN(_mode, _show, _store, _addr) \
19 IIO_DEVICE_ATTR(magn_y_gain, _mode, _show, _store, _addr)
20
21#define IIO_DEV_ATTR_MAGN_Z_GAIN(_mode, _show, _store, _addr) \
22 IIO_DEVICE_ATTR(magn_z_gain, _mode, _show, _store, _addr)
23
24#define IIO_DEV_ATTR_MAGN_X(_show, _addr) \
25 IIO_DEVICE_ATTR(magn_x_raw, S_IRUGO, _show, NULL, _addr)
26
27#define IIO_DEV_ATTR_MAGN_Y(_show, _addr) \
28 IIO_DEVICE_ATTR(magn_y_raw, S_IRUGO, _show, NULL, _addr)
29
30#define IIO_DEV_ATTR_MAGN_Z(_show, _addr) \
31 IIO_DEVICE_ATTR(magn_z_raw, S_IRUGO, _show, NULL, _addr)
diff --git a/drivers/staging/iio/ring_generic.h b/drivers/staging/iio/ring_generic.h
index 09044adf7327..0e443757b029 100644
--- a/drivers/staging/iio/ring_generic.h
+++ b/drivers/staging/iio/ring_generic.h
@@ -134,19 +134,17 @@ void iio_ring_buffer_init(struct iio_ring_buffer *ring,
134 struct iio_dev *dev_info); 134 struct iio_dev *dev_info);
135 135
136/** 136/**
137 * __iio_init_ring_buffer() - initialize common elements of ring buffers 137 * __iio_update_ring_buffer() - update common elements of ring buffers
138 * @ring: ring buffer that is the event source 138 * @ring: ring buffer that is the event source
139 * @bytes_per_datum: size of individual datum including timestamp 139 * @bytes_per_datum: size of individual datum including timestamp
140 * @length: number of datums in ring 140 * @length: number of datums in ring
141 **/ 141 **/
142static inline void __iio_init_ring_buffer(struct iio_ring_buffer *ring, 142static inline void __iio_update_ring_buffer(struct iio_ring_buffer *ring,
143 int bytes_per_datum, int length) 143 int bytes_per_datum, int length)
144{ 144{
145 ring->bpd = bytes_per_datum; 145 ring->bpd = bytes_per_datum;
146 ring->length = length; 146 ring->length = length;
147 ring->loopcount = 0; 147 ring->loopcount = 0;
148 ring->shared_ev_pointer.ev_p = 0;
149 spin_lock_init(&ring->shared_ev_pointer.lock);
150} 148}
151 149
152/** 150/**
@@ -198,25 +196,6 @@ ssize_t iio_scan_el_store(struct device *dev, struct device_attribute *attr,
198 **/ 196 **/
199ssize_t iio_scan_el_show(struct device *dev, struct device_attribute *attr, 197ssize_t iio_scan_el_show(struct device *dev, struct device_attribute *attr,
200 char *buf); 198 char *buf);
201/**
202 * IIO_SCAN_EL - declare and initialize a scan element without control func
203 * @_name: identifying name. Resulting struct is iio_scan_el_##_name,
204 * sysfs element, scan_en_##_name.
205 * @_number: unique id number for the scan element.
206 * @_bits: number of bits in the scan element result (used in mixed bit
207 * length devices).
208 * @_label: indentification variable used by drivers. Often a reg address.
209 **/
210#define IIO_SCAN_EL(_name, _number, _bits, _label) \
211 struct iio_scan_el iio_scan_el_##_name = { \
212 .dev_attr = __ATTR(scan_en_##_name, \
213 S_IRUGO | S_IWUSR, \
214 iio_scan_el_show, \
215 iio_scan_el_store), \
216 .mask = (1 << _number), \
217 .bit_count = _bits, \
218 .label = _label, \
219 }
220 199
221ssize_t iio_scan_el_ts_store(struct device *dev, struct device_attribute *attr, 200ssize_t iio_scan_el_ts_store(struct device *dev, struct device_attribute *attr,
222 const char *buf, size_t len); 201 const char *buf, size_t len);
@@ -227,7 +206,7 @@ ssize_t iio_scan_el_ts_show(struct device *dev, struct device_attribute *attr,
227 * IIO_SCAN_EL_C - declare and initialize a scan element with a control func 206 * IIO_SCAN_EL_C - declare and initialize a scan element with a control func
228 * 207 *
229 * @_name: identifying name. Resulting struct is iio_scan_el_##_name, 208 * @_name: identifying name. Resulting struct is iio_scan_el_##_name,
230 * sysfs element, scan_en_##_name. 209 * sysfs element, _name##_en.
231 * @_number: unique id number for the scan element. 210 * @_number: unique id number for the scan element.
232 * @_bits: number of bits in the scan element result (used in mixed bit 211 * @_bits: number of bits in the scan element result (used in mixed bit
233 * length devices). 212 * length devices).
@@ -236,7 +215,7 @@ ssize_t iio_scan_el_ts_show(struct device *dev, struct device_attribute *attr,
236 **/ 215 **/
237#define IIO_SCAN_EL_C(_name, _number, _bits, _label, _controlfunc) \ 216#define IIO_SCAN_EL_C(_name, _number, _bits, _label, _controlfunc) \
238 struct iio_scan_el iio_scan_el_##_name = { \ 217 struct iio_scan_el iio_scan_el_##_name = { \
239 .dev_attr = __ATTR(scan_en_##_name, \ 218 .dev_attr = __ATTR(_number##_##_name##_en, \
240 S_IRUGO | S_IWUSR, \ 219 S_IRUGO | S_IWUSR, \
241 iio_scan_el_show, \ 220 iio_scan_el_show, \
242 iio_scan_el_store), \ 221 iio_scan_el_store), \
@@ -245,14 +224,27 @@ ssize_t iio_scan_el_ts_show(struct device *dev, struct device_attribute *attr,
245 .label = _label, \ 224 .label = _label, \
246 .set_state = _controlfunc, \ 225 .set_state = _controlfunc, \
247 } 226 }
227
228#define IIO_SCAN_NAMED_EL_C(_name, _string, _number, _bits, _label, _cf) \
229 struct iio_scan_el iio_scan_el_##_name = { \
230 .dev_attr = __ATTR(_number##_##_string##_en, \
231 S_IRUGO | S_IWUSR, \
232 iio_scan_el_show, \
233 iio_scan_el_store), \
234 .number = _number, \
235 .bit_count = _bits, \
236 .label = _label, \
237 .set_state = _cf, \
238 }
239
248/** 240/**
249 * IIO_SCAN_EL_TIMESTAMP - declare a special scan element for timestamps 241 * IIO_SCAN_EL_TIMESTAMP - declare a special scan element for timestamps
250 * 242 *
251 * Odd one out. Handled slightly differently from other scan elements. 243 * Odd one out. Handled slightly differently from other scan elements.
252 **/ 244 **/
253#define IIO_SCAN_EL_TIMESTAMP \ 245#define IIO_SCAN_EL_TIMESTAMP(number) \
254 struct iio_scan_el iio_scan_el_timestamp = { \ 246 struct iio_scan_el iio_scan_el_timestamp = { \
255 .dev_attr = __ATTR(scan_en_timestamp, \ 247 .dev_attr = __ATTR(number##_timestamp_en, \
256 S_IRUGO | S_IWUSR, \ 248 S_IRUGO | S_IWUSR, \
257 iio_scan_el_ts_show, \ 249 iio_scan_el_ts_show, \
258 iio_scan_el_ts_store), \ 250 iio_scan_el_ts_store), \
@@ -267,7 +259,7 @@ static inline void iio_put_ring_buffer(struct iio_ring_buffer *ring)
267 container_of(d, struct iio_ring_buffer, dev) 259 container_of(d, struct iio_ring_buffer, dev)
268#define access_dev_to_iio_ring_buffer(d) \ 260#define access_dev_to_iio_ring_buffer(d) \
269 container_of(d, struct iio_ring_buffer, access_dev) 261 container_of(d, struct iio_ring_buffer, access_dev)
270int iio_ring_buffer_register(struct iio_ring_buffer *ring); 262int iio_ring_buffer_register(struct iio_ring_buffer *ring, int id);
271void iio_ring_buffer_unregister(struct iio_ring_buffer *ring); 263void iio_ring_buffer_unregister(struct iio_ring_buffer *ring);
272 264
273ssize_t iio_read_ring_length(struct device *dev, 265ssize_t iio_read_ring_length(struct device *dev,
diff --git a/drivers/staging/iio/ring_sw.c b/drivers/staging/iio/ring_sw.c
index cf22c091668c..1f14cd4770e7 100644
--- a/drivers/staging/iio/ring_sw.c
+++ b/drivers/staging/iio/ring_sw.c
@@ -14,22 +14,25 @@
14#include <linux/workqueue.h> 14#include <linux/workqueue.h>
15#include "ring_sw.h" 15#include "ring_sw.h"
16 16
17static inline int __iio_init_sw_ring_buffer(struct iio_sw_ring_buffer *ring, 17static inline int __iio_allocate_sw_ring_buffer(struct iio_sw_ring_buffer *ring,
18 int bytes_per_datum, int length) 18 int bytes_per_datum, int length)
19{ 19{
20 if ((length == 0) || (bytes_per_datum == 0)) 20 if ((length == 0) || (bytes_per_datum == 0))
21 return -EINVAL; 21 return -EINVAL;
22 22 __iio_update_ring_buffer(&ring->buf, bytes_per_datum, length);
23 __iio_init_ring_buffer(&ring->buf, bytes_per_datum, length);
24 spin_lock_init(&ring->use_lock);
25 ring->data = kmalloc(length*ring->buf.bpd, GFP_KERNEL); 23 ring->data = kmalloc(length*ring->buf.bpd, GFP_KERNEL);
26 ring->read_p = 0; 24 ring->read_p = NULL;
27 ring->write_p = 0; 25 ring->write_p = NULL;
28 ring->last_written_p = 0; 26 ring->last_written_p = NULL;
29 ring->half_p = 0; 27 ring->half_p = NULL;
30 return ring->data ? 0 : -ENOMEM; 28 return ring->data ? 0 : -ENOMEM;
31} 29}
32 30
31static inline void __iio_init_sw_ring_buffer(struct iio_sw_ring_buffer *ring)
32{
33 spin_lock_init(&ring->use_lock);
34}
35
33static inline void __iio_free_sw_ring_buffer(struct iio_sw_ring_buffer *ring) 36static inline void __iio_free_sw_ring_buffer(struct iio_sw_ring_buffer *ring)
34{ 37{
35 kfree(ring->data); 38 kfree(ring->data);
@@ -59,16 +62,15 @@ EXPORT_SYMBOL(iio_unmark_sw_rb_in_use);
59 * in the device driver */ 62 * in the device driver */
60/* Lock always held if their is a chance this may be called */ 63/* Lock always held if their is a chance this may be called */
61/* Only one of these per ring may run concurrently - enforced by drivers */ 64/* Only one of these per ring may run concurrently - enforced by drivers */
62int iio_store_to_sw_ring(struct iio_sw_ring_buffer *ring, 65static int iio_store_to_sw_ring(struct iio_sw_ring_buffer *ring,
63 unsigned char *data, 66 unsigned char *data, s64 timestamp)
64 s64 timestamp)
65{ 67{
66 int ret = 0; 68 int ret = 0;
67 int code; 69 int code;
68 unsigned char *temp_ptr, *change_test_ptr; 70 unsigned char *temp_ptr, *change_test_ptr;
69 71
70 /* initial store */ 72 /* initial store */
71 if (unlikely(ring->write_p == 0)) { 73 if (unlikely(ring->write_p == NULL)) {
72 ring->write_p = ring->data; 74 ring->write_p = ring->data;
73 /* Doesn't actually matter if this is out of the set 75 /* Doesn't actually matter if this is out of the set
74 * as long as the read pointer is valid before this 76 * as long as the read pointer is valid before this
@@ -99,7 +101,7 @@ int iio_store_to_sw_ring(struct iio_sw_ring_buffer *ring,
99 */ 101 */
100 ring->write_p = temp_ptr; 102 ring->write_p = temp_ptr;
101 103
102 if (ring->read_p == 0) 104 if (ring->read_p == NULL)
103 ring->read_p = ring->data; 105 ring->read_p = ring->data;
104 /* Buffer full - move the read pointer and create / escalate 106 /* Buffer full - move the read pointer and create / escalate
105 * ring event */ 107 * ring event */
@@ -123,8 +125,7 @@ int iio_store_to_sw_ring(struct iio_sw_ring_buffer *ring,
123 spin_lock(&ring->buf.shared_ev_pointer.lock); 125 spin_lock(&ring->buf.shared_ev_pointer.lock);
124 126
125 ret = iio_push_or_escallate_ring_event(&ring->buf, 127 ret = iio_push_or_escallate_ring_event(&ring->buf,
126 IIO_EVENT_CODE_RING_100_FULL, 128 IIO_EVENT_CODE_RING_100_FULL, timestamp);
127 timestamp);
128 spin_unlock(&ring->buf.shared_ev_pointer.lock); 129 spin_unlock(&ring->buf.shared_ev_pointer.lock);
129 if (ret) 130 if (ret)
130 goto error_ret; 131 goto error_ret;
@@ -180,7 +181,7 @@ int iio_rip_sw_rb(struct iio_ring_buffer *r,
180 181
181 /* build local copy */ 182 /* build local copy */
182 initial_read_p = ring->read_p; 183 initial_read_p = ring->read_p;
183 if (unlikely(initial_read_p == 0)) { /* No data here as yet */ 184 if (unlikely(initial_read_p == NULL)) { /* No data here as yet */
184 ret = 0; 185 ret = 0;
185 goto error_free_data_cpy; 186 goto error_free_data_cpy;
186 } 187 }
@@ -278,8 +279,8 @@ int iio_store_to_sw_rb(struct iio_ring_buffer *r, u8 *data, s64 timestamp)
278} 279}
279EXPORT_SYMBOL(iio_store_to_sw_rb); 280EXPORT_SYMBOL(iio_store_to_sw_rb);
280 281
281int iio_read_last_from_sw_ring(struct iio_sw_ring_buffer *ring, 282static int iio_read_last_from_sw_ring(struct iio_sw_ring_buffer *ring,
282 unsigned char *data) 283 unsigned char *data)
283{ 284{
284 unsigned char *last_written_p_copy; 285 unsigned char *last_written_p_copy;
285 286
@@ -289,7 +290,7 @@ again:
289 last_written_p_copy = ring->last_written_p; 290 last_written_p_copy = ring->last_written_p;
290 barrier(); /*unnessecary? */ 291 barrier(); /*unnessecary? */
291 /* Check there is anything here */ 292 /* Check there is anything here */
292 if (last_written_p_copy == 0) 293 if (last_written_p_copy == NULL)
293 return -EAGAIN; 294 return -EAGAIN;
294 memcpy(data, last_written_p_copy, ring->buf.bpd); 295 memcpy(data, last_written_p_copy, ring->buf.bpd);
295 296
@@ -320,7 +321,8 @@ int iio_request_update_sw_rb(struct iio_ring_buffer *r)
320 goto error_ret; 321 goto error_ret;
321 } 322 }
322 __iio_free_sw_ring_buffer(ring); 323 __iio_free_sw_ring_buffer(ring);
323 ret = __iio_init_sw_ring_buffer(ring, ring->buf.bpd, ring->buf.length); 324 ret = __iio_allocate_sw_ring_buffer(ring, ring->buf.bpd,
325 ring->buf.length);
324error_ret: 326error_ret:
325 spin_unlock(&ring->use_lock); 327 spin_unlock(&ring->use_lock);
326 return ret; 328 return ret;
@@ -409,14 +411,14 @@ struct iio_ring_buffer *iio_sw_rb_allocate(struct iio_dev *indio_dev)
409 411
410 ring = kzalloc(sizeof *ring, GFP_KERNEL); 412 ring = kzalloc(sizeof *ring, GFP_KERNEL);
411 if (!ring) 413 if (!ring)
412 return 0; 414 return NULL;
413 buf = &ring->buf; 415 buf = &ring->buf;
414
415 iio_ring_buffer_init(buf, indio_dev); 416 iio_ring_buffer_init(buf, indio_dev);
417 __iio_init_sw_ring_buffer(ring);
416 buf->dev.type = &iio_sw_ring_type; 418 buf->dev.type = &iio_sw_ring_type;
417 device_initialize(&buf->dev); 419 device_initialize(&buf->dev);
418 buf->dev.parent = &indio_dev->dev; 420 buf->dev.parent = &indio_dev->dev;
419 buf->dev.class = &iio_class; 421 buf->dev.bus = &iio_bus_type;
420 dev_set_drvdata(&buf->dev, (void *)buf); 422 dev_set_drvdata(&buf->dev, (void *)buf);
421 423
422 return buf; 424 return buf;
diff --git a/drivers/staging/iio/sysfs.h b/drivers/staging/iio/sysfs.h
index e501e1338e11..afcf5ab85f48 100644
--- a/drivers/staging/iio/sysfs.h
+++ b/drivers/staging/iio/sysfs.h
@@ -98,6 +98,9 @@ struct iio_const_attr {
98 struct iio_dev_attr iio_dev_attr_##_name \ 98 struct iio_dev_attr iio_dev_attr_##_name \
99 = IIO_ATTR(_name, _mode, _show, _store, _addr) 99 = IIO_ATTR(_name, _mode, _show, _store, _addr)
100 100
101#define IIO_DEVICE_ATTR_NAMED(_vname, _name, _mode, _show, _store, _addr) \
102 struct iio_dev_attr iio_dev_attr_##_vname \
103 = IIO_ATTR(_name, _mode, _show, _store, _addr)
101 104
102#define IIO_DEVICE_ATTR_2(_name, _mode, _show, _store, _addr, _val2) \ 105#define IIO_DEVICE_ATTR_2(_name, _mode, _show, _store, _addr, _val2) \
103 struct iio_dev_attr iio_dev_attr_##_name \ 106 struct iio_dev_attr iio_dev_attr_##_name \
@@ -141,18 +144,25 @@ struct iio_const_attr {
141 * 144 *
142 * May be mode dependent on some devices 145 * May be mode dependent on some devices
143 **/ 146 **/
147/* Deprecated */
144#define IIO_DEV_ATTR_AVAIL_SAMP_FREQ(_show) \ 148#define IIO_DEV_ATTR_AVAIL_SAMP_FREQ(_show) \
145 IIO_DEVICE_ATTR(available_sampling_frequency, S_IRUGO, _show, NULL, 0) 149 IIO_DEVICE_ATTR(available_sampling_frequency, S_IRUGO, _show, NULL, 0)
146 150
151#define IIO_DEV_ATTR_SAMP_FREQ_AVAIL(_show) \
152 IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO, _show, NULL, 0)
147/** 153/**
148 * IIO_CONST_ATTR_AVAIL_SAMP_FREQ - list available sampling frequencies 154 * IIO_CONST_ATTR_AVAIL_SAMP_FREQ - list available sampling frequencies
149 * @_string: frequency string for the attribute 155 * @_string: frequency string for the attribute
150 * 156 *
151 * Constant version 157 * Constant version
152 **/ 158 **/
153#define IIO_CONST_ATTR_AVAIL_SAMP_FREQ(_string) \ 159/* Deprecated */
160#define IIO_CONST_ATTR_AVAIL_SAMP_FREQ(_string) \
154 IIO_CONST_ATTR(available_sampling_frequency, _string) 161 IIO_CONST_ATTR(available_sampling_frequency, _string)
155 162
163#define IIO_CONST_ATTR_SAMP_FREQ_AVAIL(_string) \
164 IIO_CONST_ATTR(sampling_frequency_available, _string)
165
156/** 166/**
157 * IIO_DEV_ATTR_SCAN_MODE - select a scan mode 167 * IIO_DEV_ATTR_SCAN_MODE - select a scan mode
158 * @_mode: sysfs file mode/permissions 168 * @_mode: sysfs file mode/permissions
@@ -231,6 +241,9 @@ struct iio_const_attr {
231#define IIO_DEV_ATTR_TEMP(_show) \ 241#define IIO_DEV_ATTR_TEMP(_show) \
232 IIO_DEVICE_ATTR(temp, S_IRUGO, _show, NULL, 0) 242 IIO_DEVICE_ATTR(temp, S_IRUGO, _show, NULL, 0)
233 243
244#define IIO_DEV_ATTR_TEMP_RAW(_show) \
245 IIO_DEVICE_ATTR(temp_raw, S_IRUGO, _show, NULL, 0)
246
234/** 247/**
235 * IIO_EVENT_SH - generic shared event handler 248 * IIO_EVENT_SH - generic shared event handler
236 * @_name: event name 249 * @_name: event name
diff --git a/drivers/staging/iio/trigger/iio-trig-gpio.c b/drivers/staging/iio/trigger/iio-trig-gpio.c
index 0c3bad3187f5..1da285d28632 100644
--- a/drivers/staging/iio/trigger/iio-trig-gpio.c
+++ b/drivers/staging/iio/trigger/iio-trig-gpio.c
@@ -13,7 +13,6 @@
13 * TODO: 13 * TODO:
14 * 14 *
15 * Add board config elements to allow specification of startup settings. 15 * Add board config elements to allow specification of startup settings.
16 * Add configuration settings (irq type etc)
17 */ 16 */
18 17
19#include <linux/kernel.h> 18#include <linux/kernel.h>
@@ -26,12 +25,12 @@
26#include "../iio.h" 25#include "../iio.h"
27#include "../trigger.h" 26#include "../trigger.h"
28 27
29LIST_HEAD(iio_gpio_trigger_list); 28static LIST_HEAD(iio_gpio_trigger_list);
30DEFINE_MUTEX(iio_gpio_trigger_list_lock); 29static DEFINE_MUTEX(iio_gpio_trigger_list_lock);
31 30
32struct iio_gpio_trigger_info { 31struct iio_gpio_trigger_info {
33 struct mutex in_use; 32 struct mutex in_use;
34 int gpio; 33 unsigned int irq;
35}; 34};
36/* 35/*
37 * Need to reference count these triggers and only enable gpio interrupts 36 * Need to reference count these triggers and only enable gpio interrupts
@@ -58,78 +57,77 @@ static const struct attribute_group iio_gpio_trigger_attr_group = {
58 .attrs = iio_gpio_trigger_attrs, 57 .attrs = iio_gpio_trigger_attrs,
59}; 58};
60 59
61static int iio_gpio_trigger_probe(struct platform_device *dev) 60static int iio_gpio_trigger_probe(struct platform_device *pdev)
62{ 61{
63 int *pdata = dev->dev.platform_data;
64 struct iio_gpio_trigger_info *trig_info; 62 struct iio_gpio_trigger_info *trig_info;
65 struct iio_trigger *trig, *trig2; 63 struct iio_trigger *trig, *trig2;
66 int i, irq, ret = 0; 64 unsigned long irqflags;
67 if (!pdata) { 65 struct resource *irq_res;
68 printk(KERN_ERR "No IIO gpio trigger platform data found\n"); 66 int irq, ret = 0, irq_res_cnt = 0;
69 goto error_ret;
70 }
71 for (i = 0;; i++) {
72 if (!gpio_is_valid(pdata[i]))
73 break;
74 trig = iio_allocate_trigger();
75 if (!trig) {
76 ret = -ENOMEM;
77 goto error_free_completed_registrations;
78 }
79 67
80 trig_info = kzalloc(sizeof(*trig_info), GFP_KERNEL); 68 do {
81 if (!trig_info) { 69 irq_res = platform_get_resource(pdev,
82 ret = -ENOMEM; 70 IORESOURCE_IRQ, irq_res_cnt);
83 goto error_put_trigger; 71
84 } 72 if (irq_res == NULL) {
85 trig->control_attrs = &iio_gpio_trigger_attr_group; 73 if (irq_res_cnt == 0)
86 trig->private_data = trig_info; 74 dev_err(&pdev->dev, "No GPIO IRQs specified");
87 trig_info->gpio = pdata[i]; 75 break;
88 trig->owner = THIS_MODULE;
89 trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
90 if (!trig->name) {
91 ret = -ENOMEM;
92 goto error_free_trig_info;
93 } 76 }
94 snprintf((char *)trig->name, 77 irqflags = (irq_res->flags & IRQF_TRIGGER_MASK) | IRQF_SHARED;
95 IIO_TRIGGER_NAME_LENGTH, 78
96 "gpiotrig%d", 79 for (irq = irq_res->start; irq <= irq_res->end; irq++) {
97 pdata[i]); 80
98 ret = gpio_request(trig_info->gpio, trig->name); 81 trig = iio_allocate_trigger();
99 if (ret) 82 if (!trig) {
100 goto error_free_name; 83 ret = -ENOMEM;
101 84 goto error_free_completed_registrations;
102 ret = gpio_direction_input(trig_info->gpio); 85 }
103 if (ret) 86
104 goto error_release_gpio; 87 trig_info = kzalloc(sizeof(*trig_info), GFP_KERNEL);
105 88 if (!trig_info) {
106 irq = gpio_to_irq(trig_info->gpio); 89 ret = -ENOMEM;
107 if (irq < 0) { 90 goto error_put_trigger;
108 ret = irq; 91 }
109 goto error_release_gpio; 92 trig->control_attrs = &iio_gpio_trigger_attr_group;
93 trig->private_data = trig_info;
94 trig_info->irq = irq;
95 trig->owner = THIS_MODULE;
96 trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH,
97 GFP_KERNEL);
98 if (!trig->name) {
99 ret = -ENOMEM;
100 goto error_free_trig_info;
101 }
102 snprintf((char *)trig->name,
103 IIO_TRIGGER_NAME_LENGTH,
104 "irqtrig%d", irq);
105
106 ret = request_irq(irq, iio_gpio_trigger_poll,
107 irqflags, trig->name, trig);
108 if (ret) {
109 dev_err(&pdev->dev,
110 "request IRQ-%d failed", irq);
111 goto error_free_name;
112 }
113
114 ret = iio_trigger_register(trig);
115 if (ret)
116 goto error_release_irq;
117
118 list_add_tail(&trig->alloc_list,
119 &iio_gpio_trigger_list);
110 } 120 }
111 121
112 ret = request_irq(irq, iio_gpio_trigger_poll, 122 irq_res_cnt++;
113 IRQF_TRIGGER_RISING, 123 } while (irq_res != NULL);
114 trig->name,
115 trig);
116 if (ret)
117 goto error_release_gpio;
118 124
119 ret = iio_trigger_register(trig);
120 if (ret)
121 goto error_release_irq;
122 125
123 list_add_tail(&trig->alloc_list, &iio_gpio_trigger_list);
124
125 }
126 return 0; 126 return 0;
127 127
128/* First clean up the partly allocated trigger */ 128/* First clean up the partly allocated trigger */
129error_release_irq: 129error_release_irq:
130 free_irq(irq, trig); 130 free_irq(irq, trig);
131error_release_gpio:
132 gpio_free(trig_info->gpio);
133error_free_name: 131error_free_name:
134 kfree(trig->name); 132 kfree(trig->name);
135error_free_trig_info: 133error_free_trig_info:
@@ -143,18 +141,16 @@ error_free_completed_registrations:
143 &iio_gpio_trigger_list, 141 &iio_gpio_trigger_list,
144 alloc_list) { 142 alloc_list) {
145 trig_info = trig->private_data; 143 trig_info = trig->private_data;
146 free_irq(gpio_to_irq(trig_info->gpio), trig); 144 free_irq(gpio_to_irq(trig_info->irq), trig);
147 gpio_free(trig_info->gpio);
148 kfree(trig->name); 145 kfree(trig->name);
149 kfree(trig_info); 146 kfree(trig_info);
150 iio_trigger_unregister(trig); 147 iio_trigger_unregister(trig);
151 } 148 }
152 149
153error_ret:
154 return ret; 150 return ret;
155} 151}
156 152
157static int iio_gpio_trigger_remove(struct platform_device *dev) 153static int iio_gpio_trigger_remove(struct platform_device *pdev)
158{ 154{
159 struct iio_trigger *trig, *trig2; 155 struct iio_trigger *trig, *trig2;
160 struct iio_gpio_trigger_info *trig_info; 156 struct iio_gpio_trigger_info *trig_info;
@@ -166,8 +162,7 @@ static int iio_gpio_trigger_remove(struct platform_device *dev)
166 alloc_list) { 162 alloc_list) {
167 trig_info = trig->private_data; 163 trig_info = trig->private_data;
168 iio_trigger_unregister(trig); 164 iio_trigger_unregister(trig);
169 free_irq(gpio_to_irq(trig_info->gpio), trig); 165 free_irq(trig_info->irq, trig);
170 gpio_free(trig_info->gpio);
171 kfree(trig->name); 166 kfree(trig->name);
172 kfree(trig_info); 167 kfree(trig_info);
173 iio_put_trigger(trig); 168 iio_put_trigger(trig);
diff --git a/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c b/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
index 4295bbc7b50d..4ee3ae1ef892 100644
--- a/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
+++ b/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
@@ -19,8 +19,8 @@
19#include "../iio.h" 19#include "../iio.h"
20#include "../trigger.h" 20#include "../trigger.h"
21 21
22LIST_HEAD(iio_prtc_trigger_list); 22static LIST_HEAD(iio_prtc_trigger_list);
23DEFINE_MUTEX(iio_prtc_trigger_list_lock); 23static DEFINE_MUTEX(iio_prtc_trigger_list_lock);
24 24
25struct iio_prtc_trigger_info { 25struct iio_prtc_trigger_info {
26 struct rtc_device *rtc; 26 struct rtc_device *rtc;
diff --git a/drivers/staging/line6/control.h b/drivers/staging/line6/control.h
index 2f19665d95a9..47e18ab6d5b0 100644
--- a/drivers/staging/line6/control.h
+++ b/drivers/staging/line6/control.h
@@ -22,24 +22,44 @@
22enum { 22enum {
23 POD_tweak = 1, 23 POD_tweak = 1,
24 POD_wah_position = 4, 24 POD_wah_position = 4,
25 POD_compression_gain = 5, /* device: LINE6_BITS_PODXTALL */ 25
26 /* device: LINE6_BITS_PODXTALL */
27 POD_compression_gain = 5,
28
26 POD_vol_pedal_position = 7, 29 POD_vol_pedal_position = 7,
27 POD_compression_threshold = 9, 30 POD_compression_threshold = 9,
28 POD_pan = 10, 31 POD_pan = 10,
29 POD_amp_model_setup = 11, 32 POD_amp_model_setup = 11,
30 POD_amp_model = 12, /* firmware: 2.0 */ 33 POD_amp_model = 12, /* firmware: 2.0 */
31 POD_drive = 13, 34 POD_drive = 13,
32 POD_bass = 14, 35 POD_bass = 14,
33 POD_mid = 15, /* device: LINE6_BITS_PODXTALL */ 36
34 POD_lowmid = 15, /* device: LINE6_BITS_BASSPODXTALL */ 37 /* device: LINE6_BITS_PODXTALL */
35 POD_treble = 16, /* device: LINE6_BITS_PODXTALL */ 38 POD_mid = 15,
36 POD_highmid = 16, /* device: LINE6_BITS_BASSPODXTALL */ 39
40 /* device: LINE6_BITS_BASSPODXTALL */
41 POD_lowmid = 15,
42
43 /* device: LINE6_BITS_PODXTALL */
44 POD_treble = 16,
45
46 /* device: LINE6_BITS_BASSPODXTALL */
47 POD_highmid = 16,
48
37 POD_chan_vol = 17, 49 POD_chan_vol = 17,
38 POD_reverb_mix = 18, /* device: LINE6_BITS_PODXTALL */ 50
51 /* device: LINE6_BITS_PODXTALL */
52 POD_reverb_mix = 18,
53
39 POD_effect_setup = 19, 54 POD_effect_setup = 19,
40 POD_band_1_frequency = 20, /* firmware: 2.0 */ 55 POD_band_1_frequency = 20, /* firmware: 2.0 */
41 POD_presence = 21, /* device: LINE6_BITS_PODXTALL */ 56
42 POD_treble__bass = 21, /* device: LINE6_BITS_BASSPODXTALL */ 57 /* device: LINE6_BITS_PODXTALL */
58 POD_presence = 21,
59
60 /* device: LINE6_BITS_BASSPODXTALL */
61 POD_treble__bass = 21,
62
43 POD_noise_gate_enable = 22, 63 POD_noise_gate_enable = 22,
44 POD_gate_threshold = 23, 64 POD_gate_threshold = 23,
45 POD_gate_decay_time = 24, 65 POD_gate_decay_time = 24,
@@ -50,78 +70,137 @@ enum {
50 POD_mod_param_1 = 29, 70 POD_mod_param_1 = 29,
51 POD_delay_param_1 = 30, 71 POD_delay_param_1 = 30,
52 POD_delay_param_1_note_value = 31, 72 POD_delay_param_1_note_value = 31,
53 POD_band_2_frequency__bass = 32, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 73
74 /* device: LINE6_BITS_BASSPODXTALL */
75 POD_band_2_frequency__bass = 32, /* firmware: 2.0 */
76
54 POD_delay_param_2 = 33, 77 POD_delay_param_2 = 33,
55 POD_delay_volume_mix = 34, 78 POD_delay_volume_mix = 34,
56 POD_delay_param_3 = 35, 79 POD_delay_param_3 = 35,
57 POD_reverb_enable = 36, /* device: LINE6_BITS_PODXTALL */ 80
58 POD_reverb_type = 37, /* device: LINE6_BITS_PODXTALL */ 81 /* device: LINE6_BITS_PODXTALL */
59 POD_reverb_decay = 38, /* device: LINE6_BITS_PODXTALL */ 82 POD_reverb_enable = 36,
60 POD_reverb_tone = 39, /* device: LINE6_BITS_PODXTALL */ 83 POD_reverb_type = 37,
61 POD_reverb_pre_delay = 40, /* device: LINE6_BITS_PODXTALL */ 84 POD_reverb_decay = 38,
62 POD_reverb_pre_post = 41, /* device: LINE6_BITS_PODXTALL */ 85 POD_reverb_tone = 39,
63 POD_band_2_frequency = 42, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */ 86 POD_reverb_pre_delay = 40,
64 POD_band_3_frequency__bass = 42, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 87 POD_reverb_pre_post = 41,
88 POD_band_2_frequency = 42,
89
90 /* device: LINE6_BITS_BASSPODXTALL */
91 POD_band_3_frequency__bass = 42, /* firmware: 2.0 */
92
65 POD_wah_enable = 43, 93 POD_wah_enable = 43,
66 POD_modulation_lo_cut = 44, /* device: LINE6_BITS_BASSPODXTALL */ 94
67 POD_delay_reverb_lo_cut = 45, /* device: LINE6_BITS_BASSPODXTALL */ 95 /* device: LINE6_BITS_BASSPODXTALL */
68 POD_volume_pedal_minimum = 46, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */ 96 POD_modulation_lo_cut = 44,
69 POD_eq_pre_post = 46, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 97 POD_delay_reverb_lo_cut = 45,
98
99 /* device: LINE6_BITS_PODXTALL */
100 POD_volume_pedal_minimum = 46, /* firmware: 2.0 */
101
102 /* device: LINE6_BITS_BASSPODXTALL */
103 POD_eq_pre_post = 46, /* firmware: 2.0 */
104
70 POD_volume_pre_post = 47, 105 POD_volume_pre_post = 47,
71 POD_di_model = 48, /* device: LINE6_BITS_BASSPODXTALL */ 106
72 POD_di_delay = 49, /* device: LINE6_BITS_BASSPODXTALL */ 107 /* device: LINE6_BITS_BASSPODXTALL */
108 POD_di_model = 48,
109 POD_di_delay = 49,
110
73 POD_mod_enable = 50, 111 POD_mod_enable = 50,
74 POD_mod_param_1_note_value = 51, 112 POD_mod_param_1_note_value = 51,
75 POD_mod_param_2 = 52, 113 POD_mod_param_2 = 52,
76 POD_mod_param_3 = 53, 114 POD_mod_param_3 = 53,
77 POD_mod_param_4 = 54, 115 POD_mod_param_4 = 54,
78 POD_mod_param_5 = 55, /* device: LINE6_BITS_BASSPODXTALL */ 116
117 /* device: LINE6_BITS_BASSPODXTALL */
118 POD_mod_param_5 = 55,
119
79 POD_mod_volume_mix = 56, 120 POD_mod_volume_mix = 56,
80 POD_mod_pre_post = 57, 121 POD_mod_pre_post = 57,
81 POD_modulation_model = 58, 122 POD_modulation_model = 58,
82 POD_band_3_frequency = 60, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */ 123
83 POD_band_4_frequency__bass = 60, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 124 /* device: LINE6_BITS_PODXTALL */
125 POD_band_3_frequency = 60, /* firmware: 2.0 */
126
127 /* device: LINE6_BITS_BASSPODXTALL */
128 POD_band_4_frequency__bass = 60, /* firmware: 2.0 */
129
84 POD_mod_param_1_double_precision = 61, 130 POD_mod_param_1_double_precision = 61,
85 POD_delay_param_1_double_precision = 62, 131 POD_delay_param_1_double_precision = 62,
86 POD_eq_enable = 63, /* firmware: 2.0 */ 132 POD_eq_enable = 63, /* firmware: 2.0 */
87 POD_tap = 64, 133 POD_tap = 64,
88 POD_volume_tweak_pedal_assign = 65, 134 POD_volume_tweak_pedal_assign = 65,
89 POD_band_5_frequency = 68, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 135
136 /* device: LINE6_BITS_BASSPODXTALL */
137 POD_band_5_frequency = 68, /* firmware: 2.0 */
138
90 POD_tuner = 69, 139 POD_tuner = 69,
91 POD_mic_selection = 70, 140 POD_mic_selection = 70,
92 POD_cabinet_model = 71, 141 POD_cabinet_model = 71,
93 POD_stomp_model = 75, 142 POD_stomp_model = 75,
94 POD_roomlevel = 76, 143 POD_roomlevel = 76,
95 POD_band_4_frequency = 77, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */ 144
96 POD_band_6_frequency = 77, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 145 /* device: LINE6_BITS_PODXTALL */
146 POD_band_4_frequency = 77, /* firmware: 2.0 */
147
148 /* device: LINE6_BITS_BASSPODXTALL */
149 POD_band_6_frequency = 77, /* firmware: 2.0 */
150
97 POD_stomp_param_1_note_value = 78, 151 POD_stomp_param_1_note_value = 78,
98 POD_stomp_param_2 = 79, 152 POD_stomp_param_2 = 79,
99 POD_stomp_param_3 = 80, 153 POD_stomp_param_3 = 80,
100 POD_stomp_param_4 = 81, 154 POD_stomp_param_4 = 81,
101 POD_stomp_param_5 = 82, 155 POD_stomp_param_5 = 82,
102 POD_stomp_param_6 = 83, 156 POD_stomp_param_6 = 83,
103 POD_amp_switch_select = 84, /* device: LINE6_BITS_LIVE */ 157
158 /* device: LINE6_BITS_LIVE */
159 POD_amp_switch_select = 84,
160
104 POD_delay_param_4 = 85, 161 POD_delay_param_4 = 85,
105 POD_delay_param_5 = 86, 162 POD_delay_param_5 = 86,
106 POD_delay_pre_post = 87, 163 POD_delay_pre_post = 87,
107 POD_delay_model = 88, /* device: LINE6_BITS_PODXTALL */ 164
108 POD_delay_verb_model = 88, /* device: LINE6_BITS_BASSPODXTALL */ 165 /* device: LINE6_BITS_PODXTALL */
166 POD_delay_model = 88,
167
168 /* device: LINE6_BITS_BASSPODXTALL */
169 POD_delay_verb_model = 88,
170
109 POD_tempo_msb = 89, 171 POD_tempo_msb = 89,
110 POD_tempo_lsb = 90, 172 POD_tempo_lsb = 90,
111 POD_wah_model = 91, /* firmware: 3.0 */ 173 POD_wah_model = 91, /* firmware: 3.0 */
112 POD_bypass_volume = 105, /* firmware: 2.14 */ 174 POD_bypass_volume = 105, /* firmware: 2.14 */
113 POD_fx_loop_on_off = 107, /* device: LINE6_BITS_PRO */ 175
176 /* device: LINE6_BITS_PRO */
177 POD_fx_loop_on_off = 107,
178
114 POD_tweak_param_select = 108, 179 POD_tweak_param_select = 108,
115 POD_amp1_engage = 111, 180 POD_amp1_engage = 111,
116 POD_band_1_gain = 114, /* firmware: 2.0 */ 181 POD_band_1_gain = 114, /* firmware: 2.0 */
117 POD_band_2_gain__bass = 115, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 182
118 POD_band_2_gain = 116, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */ 183 /* device: LINE6_BITS_BASSPODXTALL */
119 POD_band_3_gain__bass = 116, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 184 POD_band_2_gain__bass = 115, /* firmware: 2.0 */
120 POD_band_3_gain = 117, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */ 185
121 POD_band_4_gain__bass = 117, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 186 /* device: LINE6_BITS_PODXTALL */
122 POD_band_5_gain__bass = 118, /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 187 POD_band_2_gain = 116, /* firmware: 2.0 */
123 POD_band_4_gain = 119, /* device: LINE6_BITS_PODXTALL */ /* firmware: 2.0 */ 188
124 POD_band_6_gain__bass = 119 /* device: LINE6_BITS_BASSPODXTALL */ /* firmware: 2.0 */ 189 /* device: LINE6_BITS_BASSPODXTALL */
190 POD_band_3_gain__bass = 116, /* firmware: 2.0 */
191
192 /* device: LINE6_BITS_PODXTALL */
193 POD_band_3_gain = 117, /* firmware: 2.0 */
194
195 /* device: LINE6_BITS_BASSPODXTALL */
196 POD_band_4_gain__bass = 117, /* firmware: 2.0 */
197 POD_band_5_gain__bass = 118, /* firmware: 2.0 */
198
199 /* device: LINE6_BITS_PODXTALL */
200 POD_band_4_gain = 119, /* firmware: 2.0 */
201
202 /* device: LINE6_BITS_BASSPODXTALL */
203 POD_band_6_gain__bass = 119 /* firmware: 2.0 */
125}; 204};
126 205
127/** 206/**
@@ -139,7 +218,8 @@ enum {
139 VARIAX_pickup2_position = 23, /* type: 24 bit float */ 218 VARIAX_pickup2_position = 23, /* type: 24 bit float */
140 VARIAX_pickup2_angle = 26, /* type: 24 bit float */ 219 VARIAX_pickup2_angle = 26, /* type: 24 bit float */
141 VARIAX_pickup2_level = 29, /* type: 24 bit float */ 220 VARIAX_pickup2_level = 29, /* type: 24 bit float */
142 VARIAX_pickup_phase = 32, /* 0: in phase, 1: out of phase */ 221 VARIAX_pickup_phase = 32, /* 0: in phase,
222 1: out of phase */
143 VARIAX_capacitance = 33, /* type: 24 bit float */ 223 VARIAX_capacitance = 33, /* type: 24 bit float */
144 VARIAX_tone_resistance = 36, /* type: 24 bit float */ 224 VARIAX_tone_resistance = 36, /* type: 24 bit float */
145 VARIAX_volume_resistance = 39, /* type: 24 bit float */ 225 VARIAX_volume_resistance = 39, /* type: 24 bit float */
diff --git a/drivers/staging/line6/driver.c b/drivers/staging/line6/driver.c
index 258555417bc7..1d5a47302763 100644
--- a/drivers/staging/line6/driver.c
+++ b/drivers/staging/line6/driver.c
@@ -399,7 +399,7 @@ static void line6_data_received(struct urb *urb)
399static int line6_send(struct usb_line6 *line6, unsigned char *buf, size_t len) 399static int line6_send(struct usb_line6 *line6, unsigned char *buf, size_t len)
400{ 400{
401 int retval; 401 int retval;
402 unsigned int partial; 402 int partial;
403 403
404#if DO_DUMP_URB_SEND 404#if DO_DUMP_URB_SEND
405 line6_write_hexdump(line6, 'S', buf, len); 405 line6_write_hexdump(line6, 'S', buf, len);
@@ -684,11 +684,11 @@ static int line6_probe(struct usb_interface *interface, const struct usb_device_
684 684
685 /* check vendor and product id */ 685 /* check vendor and product id */
686 for (devtype = ARRAY_SIZE(line6_id_table) - 1; devtype--;) { 686 for (devtype = ARRAY_SIZE(line6_id_table) - 1; devtype--;) {
687 u16 vendor = le16_to_cpu(usbdev->descriptor.idVendor); 687 u16 idVendor = le16_to_cpu(usbdev->descriptor.idVendor);
688 u16 product = le16_to_cpu(usbdev->descriptor.idProduct); 688 u16 idProduct = le16_to_cpu(usbdev->descriptor.idProduct);
689 689
690 if (vendor == line6_id_table[devtype].idVendor 690 if (idVendor == line6_id_table[devtype].idVendor
691 && product == line6_id_table[devtype].idProduct) 691 && idProduct == line6_id_table[devtype].idProduct)
692 break; 692 break;
693 } 693 }
694 694
diff --git a/drivers/staging/line6/dumprequest.c b/drivers/staging/line6/dumprequest.c
index bb8c9da5803f..cd468c39da5c 100644
--- a/drivers/staging/line6/dumprequest.c
+++ b/drivers/staging/line6/dumprequest.c
@@ -105,10 +105,9 @@ int line6_wait_dump(struct line6_dump_request *l6dr, int nonblock)
105int line6_dumpreq_initbuf(struct line6_dump_request *l6dr, const void *buf, 105int line6_dumpreq_initbuf(struct line6_dump_request *l6dr, const void *buf,
106 size_t len, int num) 106 size_t len, int num)
107{ 107{
108 l6dr->reqbufs[num].buffer = kmalloc(len, GFP_KERNEL); 108 l6dr->reqbufs[num].buffer = kmemdup(buf, len, GFP_KERNEL);
109 if (l6dr->reqbufs[num].buffer == NULL) 109 if (l6dr->reqbufs[num].buffer == NULL)
110 return -ENOMEM; 110 return -ENOMEM;
111 memcpy(l6dr->reqbufs[num].buffer, buf, len);
112 l6dr->reqbufs[num].length = len; 111 l6dr->reqbufs[num].length = len;
113 return 0; 112 return 0;
114} 113}
diff --git a/drivers/staging/line6/pod.c b/drivers/staging/line6/pod.c
index 4983f2b51cf2..28f514611abc 100644
--- a/drivers/staging/line6/pod.c
+++ b/drivers/staging/line6/pod.c
@@ -1074,7 +1074,8 @@ int pod_init(struct usb_interface *interface, struct usb_line6_pod *pod)
1074 return -ENOMEM; 1074 return -ENOMEM;
1075 } 1075 }
1076 1076
1077 pod->buffer_versionreq = kmalloc(sizeof(pod_request_version), 1077 pod->buffer_versionreq = kmemdup(pod_request_version,
1078 sizeof(pod_request_version),
1078 GFP_KERNEL); 1079 GFP_KERNEL);
1079 1080
1080 if (pod->buffer_versionreq == NULL) { 1081 if (pod->buffer_versionreq == NULL) {
@@ -1083,9 +1084,6 @@ int pod_init(struct usb_interface *interface, struct usb_line6_pod *pod)
1083 return -ENOMEM; 1084 return -ENOMEM;
1084 } 1085 }
1085 1086
1086 memcpy(pod->buffer_versionreq, pod_request_version,
1087 sizeof(pod_request_version));
1088
1089 /* create sysfs entries: */ 1087 /* create sysfs entries: */
1090 err = pod_create_files2(&interface->dev); 1088 err = pod_create_files2(&interface->dev);
1091 if (err < 0) { 1089 if (err < 0) {
diff --git a/drivers/staging/line6/variax.c b/drivers/staging/line6/variax.c
index 28eb89983f36..58ddbe6393ff 100644
--- a/drivers/staging/line6/variax.c
+++ b/drivers/staging/line6/variax.c
@@ -486,7 +486,8 @@ int variax_init(struct usb_interface *interface,
486 return err; 486 return err;
487 } 487 }
488 488
489 variax->buffer_activate = kmalloc(sizeof(variax_activate), GFP_KERNEL); 489 variax->buffer_activate = kmemdup(variax_activate,
490 sizeof(variax_activate), GFP_KERNEL);
490 491
491 if (variax->buffer_activate == NULL) { 492 if (variax->buffer_activate == NULL) {
492 dev_err(&interface->dev, "Out of memory\n"); 493 dev_err(&interface->dev, "Out of memory\n");
@@ -494,8 +495,6 @@ int variax_init(struct usb_interface *interface,
494 return -ENOMEM; 495 return -ENOMEM;
495 } 496 }
496 497
497 memcpy(variax->buffer_activate, variax_activate,
498 sizeof(variax_activate));
499 init_timer(&variax->activate_timer); 498 init_timer(&variax->activate_timer);
500 499
501 /* create sysfs entries: */ 500 /* create sysfs entries: */
diff --git a/drivers/staging/memrar/Kconfig b/drivers/staging/memrar/Kconfig
new file mode 100644
index 000000000000..cbeebc550904
--- /dev/null
+++ b/drivers/staging/memrar/Kconfig
@@ -0,0 +1,15 @@
1config MRST_RAR_HANDLER
2 tristate "RAR handler driver for Intel Moorestown platform"
3 depends on RAR_REGISTER
4 ---help---
5 This driver provides a memory management interface to
6 restricted access regions (RAR) available on the Intel
7 Moorestown platform.
8
9 Once locked down, restricted access regions are only
10 accessible by specific hardware on the platform. The x86
11 CPU is typically not one of those platforms. As such this
12 driver does not access RAR, and only provides a buffer
13 allocation/bookkeeping mechanism.
14
15 If unsure, say N.
diff --git a/drivers/staging/memrar/Makefile b/drivers/staging/memrar/Makefile
new file mode 100644
index 000000000000..a3336c00cc5f
--- /dev/null
+++ b/drivers/staging/memrar/Makefile
@@ -0,0 +1,2 @@
1obj-$(CONFIG_MRST_RAR_HANDLER) += memrar.o
2memrar-y := memrar_allocator.o memrar_handler.o
diff --git a/drivers/staging/memrar/TODO b/drivers/staging/memrar/TODO
new file mode 100644
index 000000000000..0087447d5034
--- /dev/null
+++ b/drivers/staging/memrar/TODO
@@ -0,0 +1,43 @@
1RAR Handler (memrar) Driver TODO Items
2======================================
3
4Maintainer: Ossama Othman <ossama.othman@intel.com>
5
6memrar.h
7--------
81. This header exposes the driver's user space and kernel space
9 interfaces. It should be moved to <linux/rar/memrar.h>, or
10 something along those lines, when this memrar driver is moved out
11 of `staging'.
12 a. It would be ideal if staging/rar_register/rar_register.h was
13 moved to the same directory.
14
15memrar_allocator.[ch]
16---------------------
171. Address potential fragmentation issues with the memrar_allocator.
18
192. Hide struct memrar_allocator details/fields. They need not be
20 exposed to the user.
21 a. Forward declare struct memrar_allocator.
22 b. Move all three struct definitions to `memrar_allocator.c'
23 source file.
24 c. Add a memrar_allocator_largest_free_area() function, or
25 something like that to get access to the value of the struct
26 memrar_allocator "largest_free_area" field. This allows the
27 struct memrar_allocator fields to be completely hidden from
28 the user. The memrar_handler code really only needs this for
29 statistic gathering on-demand.
30 d. Do the same for the "capacity" field as the
31 "largest_free_area" field.
32
333. Move memrar_allocator.* to kernel `lib' directory since it is HW
34 neutral.
35 a. Alternatively, use lib/genalloc.c instead.
36 b. A kernel port of Doug Lea's malloc() implementation may also
37 be an option.
38
39memrar_handler.c
40----------------
411. Split user space interface (ioctl code) from core/kernel code,
42 e.g.:
43 memrar_handler.c -> memrar_core.c, memrar_user.c
diff --git a/drivers/staging/memrar/memrar-abi b/drivers/staging/memrar/memrar-abi
new file mode 100644
index 000000000000..98a6bb158baf
--- /dev/null
+++ b/drivers/staging/memrar/memrar-abi
@@ -0,0 +1,89 @@
1What: /dev/memrar
2Date: March 2010
3KernelVersion: Kernel version this feature first showed up in.
4Contact: Ossama Othman <ossama.othman@intel.com>
5Description: The Intel Moorestown Restricted Access Region (RAR)
6 Handler driver exposes an ioctl() based interface that
7 allows a user to reserve and release blocks of RAR
8 memory.
9
10 Note: A sysfs based one was not appropriate for the
11 RAR handler's usage model.
12
13 =========================================================
14 ioctl() Requests
15 =========================================================
16 RAR_HANDLER_RESERVE
17 -------------------
18 Description: Reserve RAR block.
19 Type: struct RAR_block_info
20 Direction: in/out
21 Errors: EINVAL (invalid RAR type or size)
22 ENOMEM (not enough RAR memory)
23
24 RAR_HANDLER_STAT
25 ----------------
26 Description: Get RAR statistics.
27 Type: struct RAR_stat
28 Direction: in/out
29 Errors: EINVAL (invalid RAR type)
30
31 RAR_HANDLER_RELEASE
32 -------------------
33 Description: Release previously reserved RAR block.
34 Type: 32 bit unsigned integer
35 (e.g. uint32_t), i.e the RAR "handle".
36 Direction: in
37 Errors: EINVAL (invalid RAR handle)
38
39
40 =========================================================
41 ioctl() Request Parameter Types
42 =========================================================
43 The structures referred to above are defined as
44 follows:
45
46 /**
47 * struct RAR_block_info - user space struct that
48 * describes RAR buffer
49 * @type: Type of RAR memory (e.g.,
50 * RAR_TYPE_VIDEO or RAR_TYPE_AUDIO) [in]
51 * @size: Requested size of a block in bytes to
52 * be reserved in RAR. [in]
53 * @handle: Handle that can be used to refer to
54 * reserved block. [out]
55 *
56 * This is the basic structure exposed to the user
57 * space that describes a given RAR buffer. It used
58 * as the parameter for the RAR_HANDLER_RESERVE ioctl.
59 * The buffer's underlying bus address is not exposed
60 * to the user. User space code refers to the buffer
61 * entirely by "handle".
62 */
63 struct RAR_block_info {
64 __u32 type;
65 __u32 size;
66 __u32 handle;
67 };
68
69 /**
70 * struct RAR_stat - RAR statistics structure
71 * @type: Type of RAR memory (e.g.,
72 * RAR_TYPE_VIDEO or
73 * RAR_TYPE_AUDIO) [in]
74 * @capacity: Total size of RAR memory
75 * region. [out]
76 * @largest_block_size: Size of the largest reservable
77 * block. [out]
78 *
79 * This structure is used for RAR_HANDLER_STAT ioctl.
80 */
81 struct RAR_stat {
82 __u32 type;
83 __u32 capacity;
84 __u32 largest_block_size;
85 };
86
87 Lastly, the RAR_HANDLER_RELEASE ioctl expects a
88 "handle" to the RAR block of memory. It is a 32 bit
89 unsigned integer.
diff --git a/drivers/staging/memrar/memrar.h b/drivers/staging/memrar/memrar.h
new file mode 100644
index 000000000000..0b735b827c09
--- /dev/null
+++ b/drivers/staging/memrar/memrar.h
@@ -0,0 +1,155 @@
1/*
2 * RAR Handler (/dev/memrar) internal driver API.
3 * Copyright (C) 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of version 2 of the GNU General
7 * Public License as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be
10 * useful, but WITHOUT ANY WARRANTY; without even the implied
11 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
12 * PURPOSE. See the GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public
14 * License along with this program; if not, write to the Free
15 * Software Foundation, Inc., 59 Temple Place - Suite 330,
16 * Boston, MA 02111-1307, USA.
17 * The full GNU General Public License is included in this
18 * distribution in the file called COPYING.
19 */
20
21
22#ifndef _MEMRAR_H
23#define _MEMRAR_H
24
25#include <linux/ioctl.h>
26#include <linux/types.h>
27
28
29/**
30 * struct RAR_stat - RAR statistics structure
31 * @type: Type of RAR memory (e.g., audio vs. video)
32 * @capacity: Total size of RAR memory region.
33 * @largest_block_size: Size of the largest reservable block.
34 *
35 * This structure is used for RAR_HANDLER_STAT ioctl and for the
36 * RAR_get_stat() user space wrapper function.
37 */
38struct RAR_stat {
39 __u32 type;
40 __u32 capacity;
41 __u32 largest_block_size;
42};
43
44
45/**
46 * struct RAR_block_info - user space struct that describes RAR buffer
47 * @type: Type of RAR memory (e.g., audio vs. video)
48 * @size: Requested size of a block to be reserved in RAR.
49 * @handle: Handle that can be used to refer to reserved block.
50 *
51 * This is the basic structure exposed to the user space that
52 * describes a given RAR buffer. The buffer's underlying bus address
53 * is not exposed to the user. User space code refers to the buffer
54 * entirely by "handle".
55 */
56struct RAR_block_info {
57 __u32 type;
58 __u32 size;
59 __u32 handle;
60};
61
62
63#define RAR_IOCTL_BASE 0xE0
64
65/* Reserve RAR block. */
66#define RAR_HANDLER_RESERVE _IOWR(RAR_IOCTL_BASE, 0x00, struct RAR_block_info)
67
68/* Release previously reserved RAR block. */
69#define RAR_HANDLER_RELEASE _IOW(RAR_IOCTL_BASE, 0x01, __u32)
70
71/* Get RAR stats. */
72#define RAR_HANDLER_STAT _IOWR(RAR_IOCTL_BASE, 0x02, struct RAR_stat)
73
74
75#ifdef __KERNEL__
76
77/* -------------------------------------------------------------- */
78/* Kernel Side RAR Handler Interface */
79/* -------------------------------------------------------------- */
80
81/**
82 * struct RAR_buffer - kernel space struct that describes RAR buffer
83 * @info: structure containing base RAR buffer information
84 * @bus_address: buffer bus address
85 *
86 * Structure that contains all information related to a given block of
87 * memory in RAR. It is generally only used when retrieving RAR
88 * related bus addresses.
89 *
90 * Note: This structure is used only by RAR-enabled drivers, and is
91 * not intended to be exposed to the user space.
92 */
93struct RAR_buffer {
94 struct RAR_block_info info;
95 dma_addr_t bus_address;
96};
97
98/**
99 * rar_reserve() - reserve RAR buffers
100 * @buffers: array of RAR_buffers where type and size of buffers to
101 * reserve are passed in, handle and bus address are
102 * passed out
103 * @count: number of RAR_buffers in the "buffers" array
104 *
105 * This function will reserve buffers in the restricted access regions
106 * of given types.
107 *
108 * It returns the number of successfully reserved buffers. Successful
109 * buffer reservations will have the corresponding bus_address field
110 * set to a non-zero value in the given buffers vector.
111 */
112extern size_t rar_reserve(struct RAR_buffer *buffers,
113 size_t count);
114
115/**
116 * rar_release() - release RAR buffers
117 * @buffers: array of RAR_buffers where handles to buffers to be
118 * released are passed in
119 * @count: number of RAR_buffers in the "buffers" array
120 *
121 * This function will release RAR buffers that were retrieved through
122 * a call to rar_reserve() or rar_handle_to_bus() by decrementing the
123 * reference count. The RAR buffer will be reclaimed when the
124 * reference count drops to zero.
125 *
126 * It returns the number of successfully released buffers. Successful
127 * releases will have their handle field set to zero in the given
128 * buffers vector.
129 */
130extern size_t rar_release(struct RAR_buffer *buffers,
131 size_t count);
132
133/**
134 * rar_handle_to_bus() - convert a vector of RAR handles to bus addresses
135 * @buffers: array of RAR_buffers containing handles to be
136 * converted to bus_addresses
137 * @count: number of RAR_buffers in the "buffers" array
138
139 * This function will retrieve the RAR buffer bus addresses, type and
140 * size corresponding to the RAR handles provided in the buffers
141 * vector.
142 *
143 * It returns the number of successfully converted buffers. The bus
144 * address will be set to 0 for unrecognized handles.
145 *
146 * The reference count for each corresponding buffer in RAR will be
147 * incremented. Call rar_release() when done with the buffers.
148 */
149extern size_t rar_handle_to_bus(struct RAR_buffer *buffers,
150 size_t count);
151
152
153#endif /* __KERNEL__ */
154
155#endif /* _MEMRAR_H */
diff --git a/drivers/staging/memrar/memrar_allocator.c b/drivers/staging/memrar/memrar_allocator.c
new file mode 100644
index 000000000000..a4f8c5846a00
--- /dev/null
+++ b/drivers/staging/memrar/memrar_allocator.c
@@ -0,0 +1,432 @@
1/*
2 * memrar_allocator 1.0: An allocator for Intel RAR.
3 *
4 * Copyright (C) 2010 Intel Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of version 2 of the GNU General
8 * Public License as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be
11 * useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public
15 * License along with this program; if not, write to the Free
16 * Software Foundation, Inc., 59 Temple Place - Suite 330,
17 * Boston, MA 02111-1307, USA.
18 * The full GNU General Public License is included in this
19 * distribution in the file called COPYING.
20 *
21 *
22 * ------------------------------------------------------------------
23 *
24 * This simple allocator implementation provides a
25 * malloc()/free()-like interface for reserving space within a
26 * previously reserved block of memory. It is not specific to
27 * any hardware, nor is it coupled with the lower level paging
28 * mechanism.
29 *
30 * The primary goal of this implementation is to provide a means
31 * to partition an arbitrary block of memory without actually
32 * accessing the memory or incurring any hardware side-effects
33 * (e.g. paging). It is, in effect, a bookkeeping mechanism for
34 * buffers.
35 */
36
37
38#include "memrar_allocator.h"
39#include <linux/slab.h>
40#include <linux/bug.h>
41#include <linux/kernel.h>
42
43
44struct memrar_allocator *memrar_create_allocator(unsigned long base,
45 size_t capacity,
46 size_t block_size)
47{
48 struct memrar_allocator *allocator = NULL;
49 struct memrar_address_ranges *first_node = NULL;
50
51 /*
52 * Make sure the base address is aligned on a block_size
53 * boundary.
54 *
55 * @todo Is this necessary?
56 */
57 /* base = ALIGN(base, block_size); */
58
59 /* Validate parameters.
60 *
61 * Make sure we can allocate the entire memory space. Zero
62 * capacity or block size are obviously invalid.
63 */
64 if (base == 0
65 || capacity == 0
66 || block_size == 0
67 || ULONG_MAX - capacity < base
68 || capacity < block_size)
69 return allocator;
70
71 /*
72 * There isn't much point in creating a memory allocator that
73 * is only capable of holding one block but we'll allow it,
74 * and issue a diagnostic.
75 */
76 WARN(capacity < block_size * 2,
77 "memrar: Only one block available to allocator.\n");
78
79 allocator = kmalloc(sizeof(*allocator), GFP_KERNEL);
80
81 if (allocator == NULL)
82 return allocator;
83
84 mutex_init(&allocator->lock);
85 allocator->base = base;
86
87 /* Round the capacity down to a multiple of block_size. */
88 allocator->capacity = (capacity / block_size) * block_size;
89
90 allocator->block_size = block_size;
91
92 allocator->largest_free_area = allocator->capacity;
93
94 /* Initialize the handle and free lists. */
95 INIT_LIST_HEAD(&allocator->allocated_list.list);
96 INIT_LIST_HEAD(&allocator->free_list.list);
97
98 first_node = kmalloc(sizeof(*first_node), GFP_KERNEL);
99 if (first_node == NULL) {
100 kfree(allocator);
101 allocator = NULL;
102 } else {
103 /* Full range of blocks is available. */
104 first_node->range.begin = base;
105 first_node->range.end = base + allocator->capacity;
106 list_add(&first_node->list,
107 &allocator->free_list.list);
108 }
109
110 return allocator;
111}
112
113void memrar_destroy_allocator(struct memrar_allocator *allocator)
114{
115 /*
116 * Assume that the memory allocator lock isn't held at this
117 * point in time. Caller must ensure that.
118 */
119
120 struct memrar_address_ranges *pos = NULL;
121 struct memrar_address_ranges *n = NULL;
122
123 if (allocator == NULL)
124 return;
125
126 mutex_lock(&allocator->lock);
127
128 /* Reclaim free list resources. */
129 list_for_each_entry_safe(pos,
130 n,
131 &allocator->free_list.list,
132 list) {
133 list_del(&pos->list);
134 kfree(pos);
135 }
136
137 mutex_unlock(&allocator->lock);
138
139 kfree(allocator);
140}
141
142unsigned long memrar_allocator_alloc(struct memrar_allocator *allocator,
143 size_t size)
144{
145 struct memrar_address_ranges *pos = NULL;
146
147 size_t num_blocks;
148 unsigned long reserved_bytes;
149
150 /*
151 * Address of allocated buffer. We assume that zero is not a
152 * valid address.
153 */
154 unsigned long addr = 0;
155
156 if (allocator == NULL || size == 0)
157 return addr;
158
159 /* Reserve enough blocks to hold the amount of bytes requested. */
160 num_blocks = DIV_ROUND_UP(size, allocator->block_size);
161
162 reserved_bytes = num_blocks * allocator->block_size;
163
164 mutex_lock(&allocator->lock);
165
166 if (reserved_bytes > allocator->largest_free_area) {
167 mutex_unlock(&allocator->lock);
168 return addr;
169 }
170
171 /*
172 * Iterate through the free list to find a suitably sized
173 * range of free contiguous memory blocks.
174 *
175 * We also take the opportunity to reset the size of the
176 * largest free area size statistic.
177 */
178 list_for_each_entry(pos, &allocator->free_list.list, list) {
179 struct memrar_address_range * const fr = &pos->range;
180 size_t const curr_size = fr->end - fr->begin;
181
182 if (curr_size >= reserved_bytes && addr == 0) {
183 struct memrar_address_range *range = NULL;
184 struct memrar_address_ranges * const new_node =
185 kmalloc(sizeof(*new_node), GFP_KERNEL);
186
187 if (new_node == NULL)
188 break;
189
190 list_add(&new_node->list,
191 &allocator->allocated_list.list);
192
193 /*
194 * Carve out area of memory from end of free
195 * range.
196 */
197 range = &new_node->range;
198 range->end = fr->end;
199 fr->end -= reserved_bytes;
200 range->begin = fr->end;
201 addr = range->begin;
202
203 /*
204 * Check if largest area has decreased in
205 * size. We'll need to continue scanning for
206 * the next largest area if it has.
207 */
208 if (curr_size == allocator->largest_free_area)
209 allocator->largest_free_area -=
210 reserved_bytes;
211 else
212 break;
213 }
214
215 /*
216 * Reset largest free area size statistic as needed,
217 * but only if we've actually allocated memory.
218 */
219 if (addr != 0
220 && curr_size > allocator->largest_free_area) {
221 allocator->largest_free_area = curr_size;
222 break;
223 }
224 }
225
226 mutex_unlock(&allocator->lock);
227
228 return addr;
229}
230
231long memrar_allocator_free(struct memrar_allocator *allocator,
232 unsigned long addr)
233{
234 struct list_head *pos = NULL;
235 struct list_head *tmp = NULL;
236 struct list_head *dst = NULL;
237
238 struct memrar_address_ranges *allocated = NULL;
239 struct memrar_address_range const *handle = NULL;
240
241 unsigned long old_end = 0;
242 unsigned long new_chunk_size = 0;
243
244 if (allocator == NULL)
245 return -EINVAL;
246
247 if (addr == 0)
248 return 0; /* Ignore "free(0)". */
249
250 mutex_lock(&allocator->lock);
251
252 /* Find the corresponding handle. */
253 list_for_each_entry(allocated,
254 &allocator->allocated_list.list,
255 list) {
256 if (allocated->range.begin == addr) {
257 handle = &allocated->range;
258 break;
259 }
260 }
261
262 /* No such buffer created by this allocator. */
263 if (handle == NULL) {
264 mutex_unlock(&allocator->lock);
265 return -EFAULT;
266 }
267
268 /*
269 * Coalesce adjacent chunks of memory if possible.
270 *
271 * @note This isn't full blown coalescing since we're only
272 * coalescing at most three chunks of memory.
273 */
274 list_for_each_safe(pos, tmp, &allocator->free_list.list) {
275 /* @todo O(n) performance. Optimize. */
276
277 struct memrar_address_range * const chunk =
278 &list_entry(pos,
279 struct memrar_address_ranges,
280 list)->range;
281
282 /* Extend size of existing free adjacent chunk. */
283 if (chunk->end == handle->begin) {
284 /*
285 * Chunk "less than" than the one we're
286 * freeing is adjacent.
287 *
288 * Before:
289 *
290 * +-----+------+
291 * |chunk|handle|
292 * +-----+------+
293 *
294 * After:
295 *
296 * +------------+
297 * | chunk |
298 * +------------+
299 */
300
301 struct memrar_address_ranges const * const next =
302 list_entry(pos->next,
303 struct memrar_address_ranges,
304 list);
305
306 chunk->end = handle->end;
307
308 /*
309 * Now check if next free chunk is adjacent to
310 * the current extended free chunk.
311 *
312 * Before:
313 *
314 * +------------+----+
315 * | chunk |next|
316 * +------------+----+
317 *
318 * After:
319 *
320 * +-----------------+
321 * | chunk |
322 * +-----------------+
323 */
324 if (!list_is_singular(pos)
325 && chunk->end == next->range.begin) {
326 chunk->end = next->range.end;
327 list_del(pos->next);
328 kfree(next);
329 }
330
331 list_del(&allocated->list);
332
333 new_chunk_size = chunk->end - chunk->begin;
334
335 goto exit_memrar_free;
336
337 } else if (handle->end == chunk->begin) {
338 /*
339 * Chunk "greater than" than the one we're
340 * freeing is adjacent.
341 *
342 * +------+-----+
343 * |handle|chunk|
344 * +------+-----+
345 *
346 * After:
347 *
348 * +------------+
349 * | chunk |
350 * +------------+
351 */
352
353 struct memrar_address_ranges const * const prev =
354 list_entry(pos->prev,
355 struct memrar_address_ranges,
356 list);
357
358 chunk->begin = handle->begin;
359
360 /*
361 * Now check if previous free chunk is
362 * adjacent to the current extended free
363 * chunk.
364 *
365 *
366 * Before:
367 *
368 * +----+------------+
369 * |prev| chunk |
370 * +----+------------+
371 *
372 * After:
373 *
374 * +-----------------+
375 * | chunk |
376 * +-----------------+
377 */
378 if (!list_is_singular(pos)
379 && prev->range.end == chunk->begin) {
380 chunk->begin = prev->range.begin;
381 list_del(pos->prev);
382 kfree(prev);
383 }
384
385 list_del(&allocated->list);
386
387 new_chunk_size = chunk->end - chunk->begin;
388
389 goto exit_memrar_free;
390
391 } else if (chunk->end < handle->begin
392 && chunk->end > old_end) {
393 /* Keep track of where the entry could be
394 * potentially moved from the "allocated" list
395 * to the "free" list if coalescing doesn't
396 * occur, making sure the "free" list remains
397 * sorted.
398 */
399 old_end = chunk->end;
400 dst = pos;
401 }
402 }
403
404 /*
405 * Nothing to coalesce.
406 *
407 * Move the entry from the "allocated" list to the "free"
408 * list.
409 */
410 list_move(&allocated->list, dst);
411 new_chunk_size = handle->end - handle->begin;
412 allocated = NULL;
413
414exit_memrar_free:
415
416 if (new_chunk_size > allocator->largest_free_area)
417 allocator->largest_free_area = new_chunk_size;
418
419 mutex_unlock(&allocator->lock);
420
421 kfree(allocated);
422
423 return 0;
424}
425
426
427
428/*
429 Local Variables:
430 c-file-style: "linux"
431 End:
432*/
diff --git a/drivers/staging/memrar/memrar_allocator.h b/drivers/staging/memrar/memrar_allocator.h
new file mode 100644
index 000000000000..0b80dead710f
--- /dev/null
+++ b/drivers/staging/memrar/memrar_allocator.h
@@ -0,0 +1,149 @@
1/*
2 * Copyright (C) 2010 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of version 2 of the GNU General
6 * Public License as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be
9 * useful, but WITHOUT ANY WARRANTY; without even the implied
10 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
11 * PURPOSE. See the GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public
13 * License along with this program; if not, write to the Free
14 * Software Foundation, Inc., 59 Temple Place - Suite 330,
15 * Boston, MA 02111-1307, USA.
16 * The full GNU General Public License is included in this
17 * distribution in the file called COPYING.
18 */
19
20#ifndef MEMRAR_ALLOCATOR_H
21#define MEMRAR_ALLOCATOR_H
22
23
24#include <linux/mutex.h>
25#include <linux/list.h>
26#include <linux/types.h>
27#include <linux/kernel.h>
28
29
30/**
31 * struct memrar_address_range - struct that describes a memory range
32 * @begin: Beginning of available address range.
33 * @end: End of available address range, one past the end,
34 * i.e. [begin, end).
35 */
36struct memrar_address_range {
37/* private: internal use only */
38 unsigned long begin;
39 unsigned long end;
40};
41
42/**
43 * struct memrar_address_ranges - list of areas of memory.
44 * @list: Linked list of address ranges.
45 * @range: Memory address range corresponding to given list node.
46 */
47struct memrar_address_ranges {
48/* private: internal use only */
49 struct list_head list;
50 struct memrar_address_range range;
51};
52
53/**
54 * struct memrar_allocator - encapsulation of the memory allocator state
55 * @lock: Lock used to synchronize access to the memory
56 * allocator state.
57 * @base: Base (start) address of the allocator memory
58 * space.
59 * @capacity: Size of the allocator memory space in bytes.
60 * @block_size: The size in bytes of individual blocks within
61 * the allocator memory space.
62 * @largest_free_area: Largest free area of memory in the allocator
63 * in bytes.
64 * @allocated_list: List of allocated memory block address
65 * ranges.
66 * @free_list: List of free address ranges.
67 *
68 * This structure contains all memory allocator state, including the
69 * base address, capacity, free list, lock, etc.
70 */
71struct memrar_allocator {
72/* private: internal use only */
73 struct mutex lock;
74 unsigned long base;
75 size_t capacity;
76 size_t block_size;
77 size_t largest_free_area;
78 struct memrar_address_ranges allocated_list;
79 struct memrar_address_ranges free_list;
80};
81
82/**
83 * memrar_create_allocator() - create a memory allocator
84 * @base: Address at which the memory allocator begins.
85 * @capacity: Desired size of the memory allocator. This value must
86 * be larger than the block_size, ideally more than twice
87 * as large since there wouldn't be much point in using a
88 * memory allocator otherwise.
89 * @block_size: The size of individual blocks within the memory
90 * allocator. This value must smaller than the
91 * capacity.
92 *
93 * Create a memory allocator with the given capacity and block size.
94 * The capacity will be reduced to be a multiple of the block size, if
95 * necessary.
96 *
97 * Returns an instance of the memory allocator, if creation succeeds,
98 * otherwise zero if creation fails. Failure may occur if not enough
99 * kernel memory exists to create the memrar_allocator instance
100 * itself, or if the capacity and block_size arguments are not
101 * compatible or make sense.
102 */
103struct memrar_allocator *memrar_create_allocator(unsigned long base,
104 size_t capacity,
105 size_t block_size);
106
107/**
108 * memrar_destroy_allocator() - destroy allocator
109 * @allocator: The allocator being destroyed.
110 *
111 * Reclaim resources held by the memory allocator. The caller must
112 * explicitly free all memory reserved by memrar_allocator_alloc()
113 * prior to calling this function. Otherwise leaks will occur.
114 */
115void memrar_destroy_allocator(struct memrar_allocator *allocator);
116
117/**
118 * memrar_allocator_alloc() - reserve an area of memory of given size
119 * @allocator: The allocator instance being used to reserve buffer.
120 * @size: The size in bytes of the buffer to allocate.
121 *
122 * This functions reserves an area of memory managed by the given
123 * allocator. It returns zero if allocation was not possible.
124 * Failure may occur if the allocator no longer has space available.
125 */
126unsigned long memrar_allocator_alloc(struct memrar_allocator *allocator,
127 size_t size);
128
129/**
130 * memrar_allocator_free() - release buffer starting at given address
131 * @allocator: The allocator instance being used to release the buffer.
132 * @address: The address of the buffer being released.
133 *
134 * Release an area of memory starting at the given address. Failure
135 * could occur if the given address is not in the address space
136 * managed by the allocator. Returns zero on success or an errno
137 * (negative value) on failure.
138 */
139long memrar_allocator_free(struct memrar_allocator *allocator,
140 unsigned long address);
141
142#endif /* MEMRAR_ALLOCATOR_H */
143
144
145/*
146 Local Variables:
147 c-file-style: "linux"
148 End:
149*/
diff --git a/drivers/staging/memrar/memrar_handler.c b/drivers/staging/memrar/memrar_handler.c
new file mode 100644
index 000000000000..efa7fd62d390
--- /dev/null
+++ b/drivers/staging/memrar/memrar_handler.c
@@ -0,0 +1,996 @@
1/*
2 * memrar_handler 1.0: An Intel restricted access region handler device
3 *
4 * Copyright (C) 2010 Intel Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of version 2 of the GNU General
8 * Public License as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be
11 * useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public
15 * License along with this program; if not, write to the Free
16 * Software Foundation, Inc., 59 Temple Place - Suite 330,
17 * Boston, MA 02111-1307, USA.
18 * The full GNU General Public License is included in this
19 * distribution in the file called COPYING.
20 *
21 * -------------------------------------------------------------------
22 *
23 * Moorestown restricted access regions (RAR) provide isolated
24 * areas of main memory that are only acceessible by authorized
25 * devices.
26 *
27 * The Intel Moorestown RAR handler module exposes a kernel space
28 * RAR memory management mechanism. It is essentially a
29 * RAR-specific allocator.
30 *
31 * Besides providing RAR buffer management, the RAR handler also
32 * behaves in many ways like an OS virtual memory manager. For
33 * example, the RAR "handles" created by the RAR handler are
34 * analogous to user space virtual addresses.
35 *
36 * RAR memory itself is never accessed directly by the RAR
37 * handler.
38 */
39
40#include <linux/miscdevice.h>
41#include <linux/fs.h>
42#include <linux/slab.h>
43#include <linux/kref.h>
44#include <linux/mutex.h>
45#include <linux/kernel.h>
46#include <linux/uaccess.h>
47#include <linux/mm.h>
48#include <linux/ioport.h>
49#include <linux/io.h>
50
51#include "../rar_register/rar_register.h"
52
53#include "memrar.h"
54#include "memrar_allocator.h"
55
56
57#define MEMRAR_VER "1.0"
58
59/*
60 * Moorestown supports three restricted access regions.
61 *
62 * We only care about the first two, video and audio. The third,
63 * reserved for Chaabi and the P-unit, will be handled by their
64 * respective drivers.
65 */
66#define MRST_NUM_RAR 2
67
68/* ---------------- -------------------- ------------------- */
69
70/**
71 * struct memrar_buffer_info - struct that keeps track of all RAR buffers
72 * @list: Linked list of memrar_buffer_info objects.
73 * @buffer: Core RAR buffer information.
74 * @refcount: Reference count.
75 * @owner: File handle corresponding to process that reserved the
76 * block of memory in RAR. This will be zero for buffers
77 * allocated by other drivers instead of by a user space
78 * process.
79 *
80 * This structure encapsulates a link list of RAR buffers, as well as
81 * other characteristics specific to a given list node, such as the
82 * reference count on the corresponding RAR buffer.
83 */
84struct memrar_buffer_info {
85 struct list_head list;
86 struct RAR_buffer buffer;
87 struct kref refcount;
88 struct file *owner;
89};
90
91/**
92 * struct memrar_rar_info - characteristics of a given RAR
93 * @base: Base bus address of the RAR.
94 * @length: Length of the RAR.
95 * @iobase: Virtual address of RAR mapped into kernel.
96 * @allocator: Allocator associated with the RAR. Note the allocator
97 * "capacity" may be smaller than the RAR length if the
98 * length is not a multiple of the configured allocator
99 * block size.
100 * @buffers: Table that keeps track of all reserved RAR buffers.
101 * @lock: Lock used to synchronize access to RAR-specific data
102 * structures.
103 *
104 * Each RAR has an associated memrar_rar_info structure that describes
105 * where in memory the RAR is located, how large it is, and a list of
106 * reserved RAR buffers inside that RAR. Each RAR also has a mutex
107 * associated with it to reduce lock contention when operations on
108 * multiple RARs are performed in parallel.
109 */
110struct memrar_rar_info {
111 dma_addr_t base;
112 unsigned long length;
113 void __iomem *iobase;
114 struct memrar_allocator *allocator;
115 struct memrar_buffer_info buffers;
116 struct mutex lock;
117 int allocated; /* True if we own this RAR */
118};
119
120/*
121 * Array of RAR characteristics.
122 */
123static struct memrar_rar_info memrars[MRST_NUM_RAR];
124
125/* ---------------- -------------------- ------------------- */
126
127/* Validate RAR type. */
128static inline int memrar_is_valid_rar_type(u32 type)
129{
130 return type == RAR_TYPE_VIDEO || type == RAR_TYPE_AUDIO;
131}
132
133/* Check if an address/handle falls with the given RAR memory range. */
134static inline int memrar_handle_in_range(struct memrar_rar_info *rar,
135 u32 vaddr)
136{
137 unsigned long const iobase = (unsigned long) (rar->iobase);
138 return (vaddr >= iobase && vaddr < iobase + rar->length);
139}
140
141/* Retrieve RAR information associated with the given handle. */
142static struct memrar_rar_info *memrar_get_rar_info(u32 vaddr)
143{
144 int i;
145 for (i = 0; i < MRST_NUM_RAR; ++i) {
146 struct memrar_rar_info * const rar = &memrars[i];
147 if (memrar_handle_in_range(rar, vaddr))
148 return rar;
149 }
150
151 return NULL;
152}
153
154/**
155 * memrar_get_bus address - handle to bus address
156 *
157 * Retrieve bus address from given handle.
158 *
159 * Returns address corresponding to given handle. Zero if handle is
160 * invalid.
161 */
162static dma_addr_t memrar_get_bus_address(
163 struct memrar_rar_info *rar,
164 u32 vaddr)
165{
166 unsigned long const iobase = (unsigned long) (rar->iobase);
167
168 if (!memrar_handle_in_range(rar, vaddr))
169 return 0;
170
171 /*
172 * An assumption is made that the virtual address offset is
173 * the same as the bus address offset, at least based on the
174 * way this driver is implemented. For example, vaddr + 2 ==
175 * baddr + 2.
176 *
177 * @todo Is that a valid assumption?
178 */
179 return rar->base + (vaddr - iobase);
180}
181
182/**
183 * memrar_get_physical_address - handle to physical address
184 *
185 * Retrieve physical address from given handle.
186 *
187 * Returns address corresponding to given handle. Zero if handle is
188 * invalid.
189 */
190static dma_addr_t memrar_get_physical_address(
191 struct memrar_rar_info *rar,
192 u32 vaddr)
193{
194 /*
195 * @todo This assumes that the bus address and physical
196 * address are the same. That is true for Moorestown
197 * but not necessarily on other platforms. This
198 * deficiency should be addressed at some point.
199 */
200 return memrar_get_bus_address(rar, vaddr);
201}
202
203/**
204 * memrar_release_block - release a block to the pool
205 * @kref: kref of block
206 *
207 * Core block release code. A node has hit zero references so can
208 * be released and the lists must be updated.
209 *
210 * Note: This code removes the node from a list. Make sure any list
211 * iteration is performed using list_for_each_safe().
212 */
213static void memrar_release_block_i(struct kref *ref)
214{
215 /*
216 * Last reference is being released. Remove from the table,
217 * and reclaim resources.
218 */
219
220 struct memrar_buffer_info * const node =
221 container_of(ref, struct memrar_buffer_info, refcount);
222
223 struct RAR_block_info * const user_info =
224 &node->buffer.info;
225
226 struct memrar_allocator * const allocator =
227 memrars[user_info->type].allocator;
228
229 list_del(&node->list);
230
231 memrar_allocator_free(allocator, user_info->handle);
232
233 kfree(node);
234}
235
236/**
237 * memrar_init_rar_resources - configure a RAR
238 * @rarnum: rar that has been allocated
239 * @devname: name of our device
240 *
241 * Initialize RAR parameters, such as bus addresses, etc and make
242 * the resource accessible.
243 */
244static int memrar_init_rar_resources(int rarnum, char const *devname)
245{
246 /* ---- Sanity Checks ----
247 * 1. RAR bus addresses in both Lincroft and Langwell RAR
248 * registers should be the same.
249 * a. There's no way we can do this through IA.
250 *
251 * 2. Secure device ID in Langwell RAR registers should be set
252 * appropriately, e.g. only LPE DMA for the audio RAR, and
253 * security for the other Langwell based RAR registers.
254 * a. There's no way we can do this through IA.
255 *
256 * 3. Audio and video RAR registers and RAR access should be
257 * locked down. If not, enable RAR access control. Except
258 * for debugging purposes, there is no reason for them to
259 * be unlocked.
260 * a. We can only do this for the Lincroft (IA) side.
261 *
262 * @todo Should the RAR handler driver even be aware of audio
263 * and video RAR settings?
264 */
265
266 /*
267 * RAR buffer block size.
268 *
269 * We choose it to be the size of a page to simplify the
270 * /dev/memrar mmap() implementation and usage. Otherwise
271 * paging is not involved once an RAR is locked down.
272 */
273 static size_t const RAR_BLOCK_SIZE = PAGE_SIZE;
274
275 dma_addr_t low, high;
276 struct memrar_rar_info * const rar = &memrars[rarnum];
277
278 BUG_ON(MRST_NUM_RAR != ARRAY_SIZE(memrars));
279 BUG_ON(!memrar_is_valid_rar_type(rarnum));
280 BUG_ON(rar->allocated);
281
282 mutex_init(&rar->lock);
283
284 /*
285 * Initialize the process table before we reach any
286 * code that exit on failure since the finalization
287 * code requires an initialized list.
288 */
289 INIT_LIST_HEAD(&rar->buffers.list);
290
291 if (rar_get_address(rarnum, &low, &high) != 0)
292 /* No RAR is available. */
293 return -ENODEV;
294
295 if (low == 0 || high == 0) {
296 rar->base = 0;
297 rar->length = 0;
298 rar->iobase = NULL;
299 rar->allocator = NULL;
300 return -ENOSPC;
301 }
302
303 /*
304 * @todo Verify that LNC and LNW RAR register contents
305 * addresses, security, etc are compatible and
306 * consistent).
307 */
308
309 rar->length = high - low + 1;
310
311 /* Claim RAR memory as our own. */
312 if (request_mem_region(low, rar->length, devname) == NULL) {
313 rar->length = 0;
314 pr_err("%s: Unable to claim RAR[%d] memory.\n", devname, rarnum);
315 pr_err("%s: RAR[%d] disabled.\n", devname, rarnum);
316 return -EBUSY;
317 }
318
319 rar->base = low;
320
321 /*
322 * Now map it into the kernel address space.
323 *
324 * Note that the RAR memory may only be accessed by IA
325 * when debugging. Otherwise attempts to access the
326 * RAR memory when it is locked down will result in
327 * behavior similar to writing to /dev/null and
328 * reading from /dev/zero. This behavior is enforced
329 * by the hardware. Even if we don't access the
330 * memory, mapping it into the kernel provides us with
331 * a convenient RAR handle to bus address mapping.
332 */
333 rar->iobase = ioremap_nocache(rar->base, rar->length);
334 if (rar->iobase == NULL) {
335 pr_err("%s: Unable to map RAR memory.\n", devname);
336 release_mem_region(low, rar->length);
337 return -ENOMEM;
338 }
339
340 /* Initialize corresponding memory allocator. */
341 rar->allocator = memrar_create_allocator((unsigned long) rar->iobase,
342 rar->length, RAR_BLOCK_SIZE);
343 if (rar->allocator == NULL) {
344 iounmap(rar->iobase);
345 release_mem_region(low, rar->length);
346 return -ENOMEM;
347 }
348
349 pr_info("%s: BRAR[%d] bus address range = [0x%lx, 0x%lx]\n",
350 devname, rarnum, (unsigned long) low, (unsigned long) high);
351
352 pr_info("%s: BRAR[%d] size = %zu KiB\n",
353 devname, rarnum, rar->allocator->capacity / 1024);
354
355 rar->allocated = 1;
356 return 0;
357}
358
359/**
360 * memrar_fini_rar_resources - free up RAR resources
361 *
362 * Finalize RAR resources. Free up the resource tables, hand the memory
363 * back to the kernel, unmap the device and release the address space.
364 */
365static void memrar_fini_rar_resources(void)
366{
367 int z;
368 struct memrar_buffer_info *pos;
369 struct memrar_buffer_info *tmp;
370
371 /*
372 * @todo Do we need to hold a lock at this point in time?
373 * (module initialization failure or exit?)
374 */
375
376 for (z = MRST_NUM_RAR; z-- != 0; ) {
377 struct memrar_rar_info * const rar = &memrars[z];
378
379 if (!rar->allocated)
380 continue;
381
382 /* Clean up remaining resources. */
383
384 list_for_each_entry_safe(pos,
385 tmp,
386 &rar->buffers.list,
387 list) {
388 kref_put(&pos->refcount, memrar_release_block_i);
389 }
390
391 memrar_destroy_allocator(rar->allocator);
392 rar->allocator = NULL;
393
394 iounmap(rar->iobase);
395 release_mem_region(rar->base, rar->length);
396
397 rar->iobase = NULL;
398 rar->base = 0;
399 rar->length = 0;
400
401 unregister_rar(z);
402 }
403}
404
405/**
406 * memrar_reserve_block - handle an allocation request
407 * @request: block being requested
408 * @filp: owner it is tied to
409 *
410 * Allocate a block of the requested RAR. If successful return the
411 * request object filled in and zero, if not report an error code
412 */
413
414static long memrar_reserve_block(struct RAR_buffer *request,
415 struct file *filp)
416{
417 struct RAR_block_info * const rinfo = &request->info;
418 struct RAR_buffer *buffer;
419 struct memrar_buffer_info *buffer_info;
420 u32 handle;
421 struct memrar_rar_info *rar = NULL;
422
423 /* Prevent array overflow. */
424 if (!memrar_is_valid_rar_type(rinfo->type))
425 return -EINVAL;
426
427 rar = &memrars[rinfo->type];
428 if (!rar->allocated)
429 return -ENODEV;
430
431 /* Reserve memory in RAR. */
432 handle = memrar_allocator_alloc(rar->allocator, rinfo->size);
433 if (handle == 0)
434 return -ENOMEM;
435
436 buffer_info = kmalloc(sizeof(*buffer_info), GFP_KERNEL);
437
438 if (buffer_info == NULL) {
439 memrar_allocator_free(rar->allocator, handle);
440 return -ENOMEM;
441 }
442
443 buffer = &buffer_info->buffer;
444 buffer->info.type = rinfo->type;
445 buffer->info.size = rinfo->size;
446
447 /* Memory handle corresponding to the bus address. */
448 buffer->info.handle = handle;
449 buffer->bus_address = memrar_get_bus_address(rar, handle);
450
451 /*
452 * Keep track of owner so that we can later cleanup if
453 * necessary.
454 */
455 buffer_info->owner = filp;
456
457 kref_init(&buffer_info->refcount);
458
459 mutex_lock(&rar->lock);
460 list_add(&buffer_info->list, &rar->buffers.list);
461 mutex_unlock(&rar->lock);
462
463 rinfo->handle = buffer->info.handle;
464 request->bus_address = buffer->bus_address;
465
466 return 0;
467}
468
469/**
470 * memrar_release_block - release a RAR block
471 * @addr: address in RAR space
472 *
473 * Release a previously allocated block. Releases act on complete
474 * blocks, partially freeing a block is not supported
475 */
476
477static long memrar_release_block(u32 addr)
478{
479 struct memrar_buffer_info *pos;
480 struct memrar_buffer_info *tmp;
481 struct memrar_rar_info * const rar = memrar_get_rar_info(addr);
482 long result = -EINVAL;
483
484 if (rar == NULL)
485 return -ENOENT;
486
487 mutex_lock(&rar->lock);
488
489 /*
490 * Iterate through the buffer list to find the corresponding
491 * buffer to be released.
492 */
493 list_for_each_entry_safe(pos,
494 tmp,
495 &rar->buffers.list,
496 list) {
497 struct RAR_block_info * const info =
498 &pos->buffer.info;
499
500 /*
501 * Take into account handle offsets that may have been
502 * added to the base handle, such as in the following
503 * scenario:
504 *
505 * u32 handle = base + offset;
506 * rar_handle_to_bus(handle);
507 * rar_release(handle);
508 */
509 if (addr >= info->handle
510 && addr < (info->handle + info->size)
511 && memrar_is_valid_rar_type(info->type)) {
512 kref_put(&pos->refcount, memrar_release_block_i);
513 result = 0;
514 break;
515 }
516 }
517
518 mutex_unlock(&rar->lock);
519
520 return result;
521}
522
523/**
524 * memrar_get_stats - read statistics for a RAR
525 * @r: statistics to be filled in
526 *
527 * Returns the statistics data for the RAR, or an error code if
528 * the request cannot be completed
529 */
530static long memrar_get_stat(struct RAR_stat *r)
531{
532 struct memrar_allocator *allocator;
533
534 if (!memrar_is_valid_rar_type(r->type))
535 return -EINVAL;
536
537 if (!memrars[r->type].allocated)
538 return -ENODEV;
539
540 allocator = memrars[r->type].allocator;
541
542 BUG_ON(allocator == NULL);
543
544 /*
545 * Allocator capacity doesn't change over time. No
546 * need to synchronize.
547 */
548 r->capacity = allocator->capacity;
549
550 mutex_lock(&allocator->lock);
551 r->largest_block_size = allocator->largest_free_area;
552 mutex_unlock(&allocator->lock);
553 return 0;
554}
555
556/**
557 * memrar_ioctl - ioctl callback
558 * @filp: file issuing the request
559 * @cmd: command
560 * @arg: pointer to control information
561 *
562 * Perform one of the ioctls supported by the memrar device
563 */
564
565static long memrar_ioctl(struct file *filp,
566 unsigned int cmd,
567 unsigned long arg)
568{
569 void __user *argp = (void __user *)arg;
570 long result = 0;
571
572 struct RAR_buffer buffer;
573 struct RAR_block_info * const request = &buffer.info;
574 struct RAR_stat rar_info;
575 u32 rar_handle;
576
577 switch (cmd) {
578 case RAR_HANDLER_RESERVE:
579 if (copy_from_user(request,
580 argp,
581 sizeof(*request)))
582 return -EFAULT;
583
584 result = memrar_reserve_block(&buffer, filp);
585 if (result != 0)
586 return result;
587
588 return copy_to_user(argp, request, sizeof(*request));
589
590 case RAR_HANDLER_RELEASE:
591 if (copy_from_user(&rar_handle,
592 argp,
593 sizeof(rar_handle)))
594 return -EFAULT;
595
596 return memrar_release_block(rar_handle);
597
598 case RAR_HANDLER_STAT:
599 if (copy_from_user(&rar_info,
600 argp,
601 sizeof(rar_info)))
602 return -EFAULT;
603
604 /*
605 * Populate the RAR_stat structure based on the RAR
606 * type given by the user
607 */
608 if (memrar_get_stat(&rar_info) != 0)
609 return -EINVAL;
610
611 /*
612 * @todo Do we need to verify destination pointer
613 * "argp" is non-zero? Is that already done by
614 * copy_to_user()?
615 */
616 return copy_to_user(argp,
617 &rar_info,
618 sizeof(rar_info)) ? -EFAULT : 0;
619
620 default:
621 return -ENOTTY;
622 }
623
624 return 0;
625}
626
627/**
628 * memrar_mmap - mmap helper for deubgging
629 * @filp: handle doing the mapping
630 * @vma: memory area
631 *
632 * Support the mmap operation on the RAR space for debugging systems
633 * when the memory is not locked down.
634 */
635
636static int memrar_mmap(struct file *filp, struct vm_area_struct *vma)
637{
638 /*
639 * This mmap() implementation is predominantly useful for
640 * debugging since the CPU will be prevented from accessing
641 * RAR memory by the hardware when RAR is properly locked
642 * down.
643 *
644 * In order for this implementation to be useful RAR memory
645 * must be not be locked down. However, we only want to do
646 * that when debugging. DO NOT leave RAR memory unlocked in a
647 * deployed device that utilizes RAR.
648 */
649
650 size_t const size = vma->vm_end - vma->vm_start;
651
652 /* Users pass the RAR handle as the mmap() offset parameter. */
653 unsigned long const handle = vma->vm_pgoff << PAGE_SHIFT;
654
655 struct memrar_rar_info * const rar = memrar_get_rar_info(handle);
656 unsigned long pfn;
657
658 /* Only allow priviledged apps to go poking around this way */
659 if (!capable(CAP_SYS_RAWIO))
660 return -EPERM;
661
662 /* Invalid RAR handle or size passed to mmap(). */
663 if (rar == NULL
664 || handle == 0
665 || size > (handle - (unsigned long) rar->iobase))
666 return -EINVAL;
667
668 /*
669 * Retrieve physical address corresponding to the RAR handle,
670 * and convert it to a page frame.
671 */
672 pfn = memrar_get_physical_address(rar, handle) >> PAGE_SHIFT;
673
674
675 pr_debug("memrar: mapping RAR range [0x%lx, 0x%lx) into user space.\n",
676 handle,
677 handle + size);
678
679 /*
680 * Map RAR memory into user space. This is really only useful
681 * for debugging purposes since the memory won't be
682 * accessible, i.e. reads return zero and writes are ignored,
683 * when RAR access control is enabled.
684 */
685 if (remap_pfn_range(vma,
686 vma->vm_start,
687 pfn,
688 size,
689 vma->vm_page_prot))
690 return -EAGAIN;
691
692 /* vma->vm_ops = &memrar_mem_ops; */
693
694 return 0;
695}
696
697/**
698 * memrar_open - device open method
699 * @inode: inode to open
700 * @filp: file handle
701 *
702 * As we support multiple arbitary opens there is no work to be done
703 * really.
704 */
705
706static int memrar_open(struct inode *inode, struct file *filp)
707{
708 nonseekable_open(inode, filp);
709 return 0;
710}
711
712/**
713 * memrar_release - close method for miscev
714 * @inode: inode of device
715 * @filp: handle that is going away
716 *
717 * Free up all the regions that belong to this file handle. We use
718 * the handle as a natural Linux style 'lifetime' indicator and to
719 * ensure resources are not leaked when their owner explodes in an
720 * unplanned fashion.
721 */
722
723static int memrar_release(struct inode *inode, struct file *filp)
724{
725 /* Free all regions associated with the given file handle. */
726
727 struct memrar_buffer_info *pos;
728 struct memrar_buffer_info *tmp;
729 int z;
730
731 for (z = 0; z != MRST_NUM_RAR; ++z) {
732 struct memrar_rar_info * const rar = &memrars[z];
733
734 mutex_lock(&rar->lock);
735
736 list_for_each_entry_safe(pos,
737 tmp,
738 &rar->buffers.list,
739 list) {
740 if (filp == pos->owner)
741 kref_put(&pos->refcount,
742 memrar_release_block_i);
743 }
744
745 mutex_unlock(&rar->lock);
746 }
747
748 return 0;
749}
750
751/**
752 * rar_reserve - reserve RAR memory
753 * @buffers: buffers to reserve
754 * @count: number wanted
755 *
756 * Reserve a series of buffers in the RAR space. Returns the number of
757 * buffers successfully allocated
758 */
759
760size_t rar_reserve(struct RAR_buffer *buffers, size_t count)
761{
762 struct RAR_buffer * const end =
763 (buffers == NULL ? buffers : buffers + count);
764 struct RAR_buffer *i;
765
766 size_t reserve_count = 0;
767
768 for (i = buffers; i != end; ++i) {
769 if (memrar_reserve_block(i, NULL) == 0)
770 ++reserve_count;
771 else
772 i->bus_address = 0;
773 }
774
775 return reserve_count;
776}
777EXPORT_SYMBOL(rar_reserve);
778
779/**
780 * rar_release - return RAR buffers
781 * @buffers: buffers to release
782 * @size: size of released block
783 *
784 * Return a set of buffers to the RAR pool
785 */
786
787size_t rar_release(struct RAR_buffer *buffers, size_t count)
788{
789 struct RAR_buffer * const end =
790 (buffers == NULL ? buffers : buffers + count);
791 struct RAR_buffer *i;
792
793 size_t release_count = 0;
794
795 for (i = buffers; i != end; ++i) {
796 u32 * const handle = &i->info.handle;
797 if (memrar_release_block(*handle) == 0) {
798 /*
799 * @todo We assume we should do this each time
800 * the ref count is decremented. Should
801 * we instead only do this when the ref
802 * count has dropped to zero, and the
803 * buffer has been completely
804 * released/unmapped?
805 */
806 *handle = 0;
807 ++release_count;
808 }
809 }
810
811 return release_count;
812}
813EXPORT_SYMBOL(rar_release);
814
815/**
816 * rar_handle_to_bus - RAR to bus address
817 * @buffers: RAR buffer structure
818 * @count: number of buffers to convert
819 *
820 * Turn a list of RAR handle mappings into actual bus addresses. Note
821 * that when the device is locked down the bus addresses in question
822 * are not CPU accessible.
823 */
824
825size_t rar_handle_to_bus(struct RAR_buffer *buffers, size_t count)
826{
827 struct RAR_buffer * const end =
828 (buffers == NULL ? buffers : buffers + count);
829 struct RAR_buffer *i;
830 struct memrar_buffer_info *pos;
831
832 size_t conversion_count = 0;
833
834 /*
835 * Find all bus addresses corresponding to the given handles.
836 *
837 * @todo Not liking this nested loop. Optimize.
838 */
839 for (i = buffers; i != end; ++i) {
840 struct memrar_rar_info * const rar =
841 memrar_get_rar_info(i->info.handle);
842
843 /*
844 * Check if we have a bogus handle, and then continue
845 * with remaining buffers.
846 */
847 if (rar == NULL) {
848 i->bus_address = 0;
849 continue;
850 }
851
852 mutex_lock(&rar->lock);
853
854 list_for_each_entry(pos, &rar->buffers.list, list) {
855 struct RAR_block_info * const user_info =
856 &pos->buffer.info;
857
858 /*
859 * Take into account handle offsets that may
860 * have been added to the base handle, such as
861 * in the following scenario:
862 *
863 * u32 handle = base + offset;
864 * rar_handle_to_bus(handle);
865 */
866
867 if (i->info.handle >= user_info->handle
868 && i->info.handle < (user_info->handle
869 + user_info->size)) {
870 u32 const offset =
871 i->info.handle - user_info->handle;
872
873 i->info.type = user_info->type;
874 i->info.size = user_info->size - offset;
875 i->bus_address =
876 pos->buffer.bus_address
877 + offset;
878
879 /* Increment the reference count. */
880 kref_get(&pos->refcount);
881
882 ++conversion_count;
883 break;
884 } else {
885 i->bus_address = 0;
886 }
887 }
888
889 mutex_unlock(&rar->lock);
890 }
891
892 return conversion_count;
893}
894EXPORT_SYMBOL(rar_handle_to_bus);
895
896static const struct file_operations memrar_fops = {
897 .owner = THIS_MODULE,
898 .unlocked_ioctl = memrar_ioctl,
899 .mmap = memrar_mmap,
900 .open = memrar_open,
901 .release = memrar_release,
902};
903
904static struct miscdevice memrar_miscdev = {
905 .minor = MISC_DYNAMIC_MINOR, /* dynamic allocation */
906 .name = "memrar", /* /dev/memrar */
907 .fops = &memrar_fops
908};
909
910static char const banner[] __initdata =
911 KERN_INFO
912 "Intel RAR Handler: " MEMRAR_VER " initialized.\n";
913
914/**
915 * memrar_registration_callback - RAR obtained
916 * @rar: RAR number
917 *
918 * We have been granted ownership of the RAR. Add it to our memory
919 * management tables
920 */
921
922static int memrar_registration_callback(unsigned long rar)
923{
924 /*
925 * We initialize the RAR parameters early on so that we can
926 * discontinue memrar device initialization and registration
927 * if suitably configured RARs are not available.
928 */
929 return memrar_init_rar_resources(rar, memrar_miscdev.name);
930}
931
932/**
933 * memrar_init - initialise RAR support
934 *
935 * Initialise support for RAR handlers. This may get loaded before
936 * the RAR support is activated, but the callbacks on the registration
937 * will handle that situation for us anyway.
938 */
939
940static int __init memrar_init(void)
941{
942 int err;
943
944 printk(banner);
945
946 err = misc_register(&memrar_miscdev);
947 if (err)
948 return err;
949
950 /* Now claim the two RARs we want */
951 err = register_rar(0, memrar_registration_callback, 0);
952 if (err)
953 goto fail;
954
955 err = register_rar(1, memrar_registration_callback, 1);
956 if (err == 0)
957 return 0;
958
959 /* It is possible rar 0 registered and allocated resources then rar 1
960 failed so do a full resource free */
961 memrar_fini_rar_resources();
962fail:
963 misc_deregister(&memrar_miscdev);
964 return err;
965}
966
967/**
968 * memrar_exit - unregister and unload
969 *
970 * Unregister the device and then unload any mappings and release
971 * the RAR resources
972 */
973
974static void __exit memrar_exit(void)
975{
976 misc_deregister(&memrar_miscdev);
977 memrar_fini_rar_resources();
978}
979
980
981module_init(memrar_init);
982module_exit(memrar_exit);
983
984
985MODULE_AUTHOR("Ossama Othman <ossama.othman@intel.com>");
986MODULE_DESCRIPTION("Intel Restricted Access Region Handler");
987MODULE_LICENSE("GPL");
988MODULE_VERSION(MEMRAR_VER);
989
990
991
992/*
993 Local Variables:
994 c-file-style: "linux"
995 End:
996*/
diff --git a/drivers/staging/netwave/Kconfig b/drivers/staging/netwave/Kconfig
deleted file mode 100644
index 8033e8171f9e..000000000000
--- a/drivers/staging/netwave/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
1config PCMCIA_NETWAVE
2 tristate "Xircom Netwave AirSurfer Pcmcia wireless support"
3 depends on PCMCIA && WLAN
4 select WIRELESS_EXT
5 select WEXT_PRIV
6 help
7 Say Y here if you intend to attach this type of PCMCIA (PC-card)
8 wireless Ethernet networking card to your computer.
9
10 To compile this driver as a module, choose M here: the module will be
11 called netwave_cs. If unsure, say N.
diff --git a/drivers/staging/netwave/Makefile b/drivers/staging/netwave/Makefile
deleted file mode 100644
index 2ab89de59b9b..000000000000
--- a/drivers/staging/netwave/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-$(CONFIG_PCMCIA_NETWAVE) += netwave_cs.o
diff --git a/drivers/staging/netwave/TODO b/drivers/staging/netwave/TODO
deleted file mode 100644
index 9bd15a2f6d9e..000000000000
--- a/drivers/staging/netwave/TODO
+++ /dev/null
@@ -1,7 +0,0 @@
1TODO:
2 - step up and maintain this driver to ensure that it continues
3 to work. Having the hardware for this is pretty much a
4 requirement. If this does not happen, the will be removed in
5 the 2.6.35 kernel release.
6
7Please send patches to Greg Kroah-Hartman <greg@kroah.com>.
diff --git a/drivers/staging/netwave/netwave_cs.c b/drivers/staging/netwave/netwave_cs.c
deleted file mode 100644
index f1ee2cbc8407..000000000000
--- a/drivers/staging/netwave/netwave_cs.c
+++ /dev/null
@@ -1,1364 +0,0 @@
1/*********************************************************************
2 *
3 * Filename: netwave_cs.c
4 * Version: 0.4.1
5 * Description: Netwave AirSurfer Wireless LAN PC Card driver
6 * Status: Experimental.
7 * Authors: John Markus Bjørndalen <johnm@cs.uit.no>
8 * Dag Brattli <dagb@cs.uit.no>
9 * David Hinds <dahinds@users.sourceforge.net>
10 * Created at: A long time ago!
11 * Modified at: Mon Nov 10 11:54:37 1997
12 * Modified by: Dag Brattli <dagb@cs.uit.no>
13 *
14 * Copyright (c) 1997 University of Tromsø, Norway
15 *
16 * Revision History:
17 *
18 * 08-Nov-97 15:14:47 John Markus Bjørndalen <johnm@cs.uit.no>
19 * - Fixed some bugs in netwave_rx and cleaned it up a bit.
20 * (One of the bugs would have destroyed packets when receiving
21 * multiple packets per interrupt).
22 * - Cleaned up parts of newave_hw_xmit.
23 * - A few general cleanups.
24 * 24-Oct-97 13:17:36 Dag Brattli <dagb@cs.uit.no>
25 * - Fixed netwave_rx receive function (got updated docs)
26 * Others:
27 * - Changed name from xircnw to netwave, take a look at
28 * http://www.netwave-wireless.com
29 * - Some reorganizing of the code
30 * - Removed possible race condition between interrupt handler and transmit
31 * function
32 * - Started to add wireless extensions, but still needs some coding
33 * - Added watchdog for better handling of transmission timeouts
34 * (hopefully this works better)
35 ********************************************************************/
36
37/* To have statistics (just packets sent) define this */
38#undef NETWAVE_STATS
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/types.h>
44#include <linux/fcntl.h>
45#include <linux/interrupt.h>
46#include <linux/ptrace.h>
47#include <linux/ioport.h>
48#include <linux/in.h>
49#include <linux/string.h>
50#include <linux/timer.h>
51#include <linux/errno.h>
52#include <linux/netdevice.h>
53#include <linux/etherdevice.h>
54#include <linux/skbuff.h>
55#include <linux/bitops.h>
56#include <linux/wireless.h>
57#include <net/iw_handler.h>
58
59#include <pcmcia/cs_types.h>
60#include <pcmcia/cs.h>
61#include <pcmcia/cistpl.h>
62#include <pcmcia/cisreg.h>
63#include <pcmcia/ds.h>
64
65#include <asm/system.h>
66#include <asm/io.h>
67#include <asm/dma.h>
68
69#define NETWAVE_REGOFF 0x8000
70/* The Netwave IO registers, offsets to iobase */
71#define NETWAVE_REG_COR 0x0
72#define NETWAVE_REG_CCSR 0x2
73#define NETWAVE_REG_ASR 0x4
74#define NETWAVE_REG_IMR 0xa
75#define NETWAVE_REG_PMR 0xc
76#define NETWAVE_REG_IOLOW 0x6
77#define NETWAVE_REG_IOHI 0x7
78#define NETWAVE_REG_IOCONTROL 0x8
79#define NETWAVE_REG_DATA 0xf
80/* The Netwave Extended IO registers, offsets to RamBase */
81#define NETWAVE_EREG_ASCC 0x114
82#define NETWAVE_EREG_RSER 0x120
83#define NETWAVE_EREG_RSERW 0x124
84#define NETWAVE_EREG_TSER 0x130
85#define NETWAVE_EREG_TSERW 0x134
86#define NETWAVE_EREG_CB 0x100
87#define NETWAVE_EREG_SPCQ 0x154
88#define NETWAVE_EREG_SPU 0x155
89#define NETWAVE_EREG_LIF 0x14e
90#define NETWAVE_EREG_ISPLQ 0x156
91#define NETWAVE_EREG_HHC 0x158
92#define NETWAVE_EREG_NI 0x16e
93#define NETWAVE_EREG_MHS 0x16b
94#define NETWAVE_EREG_TDP 0x140
95#define NETWAVE_EREG_RDP 0x150
96#define NETWAVE_EREG_PA 0x160
97#define NETWAVE_EREG_EC 0x180
98#define NETWAVE_EREG_CRBP 0x17a
99#define NETWAVE_EREG_ARW 0x166
100
101/*
102 * Commands used in the extended command buffer
103 * NETWAVE_EREG_CB (0x100-0x10F)
104 */
105#define NETWAVE_CMD_NOP 0x00
106#define NETWAVE_CMD_SRC 0x01
107#define NETWAVE_CMD_STC 0x02
108#define NETWAVE_CMD_AMA 0x03
109#define NETWAVE_CMD_DMA 0x04
110#define NETWAVE_CMD_SAMA 0x05
111#define NETWAVE_CMD_ER 0x06
112#define NETWAVE_CMD_DR 0x07
113#define NETWAVE_CMD_TL 0x08
114#define NETWAVE_CMD_SRP 0x09
115#define NETWAVE_CMD_SSK 0x0a
116#define NETWAVE_CMD_SMD 0x0b
117#define NETWAVE_CMD_SAPD 0x0c
118#define NETWAVE_CMD_SSS 0x11
119/* End of Command marker */
120#define NETWAVE_CMD_EOC 0x00
121
122/* ASR register bits */
123#define NETWAVE_ASR_RXRDY 0x80
124#define NETWAVE_ASR_TXBA 0x01
125
126#define TX_TIMEOUT ((32*HZ)/100)
127
128static const unsigned int imrConfRFU1 = 0x10; /* RFU interrupt mask, keep high */
129static const unsigned int imrConfIENA = 0x02; /* Interrupt enable */
130
131static const unsigned int corConfIENA = 0x01; /* Interrupt enable */
132static const unsigned int corConfLVLREQ = 0x40; /* Keep high */
133
134static const unsigned int rxConfRxEna = 0x80; /* Receive Enable */
135static const unsigned int rxConfMAC = 0x20; /* MAC host receive mode*/
136static const unsigned int rxConfPro = 0x10; /* Promiscuous */
137static const unsigned int rxConfAMP = 0x08; /* Accept Multicast Packets */
138static const unsigned int rxConfBcast = 0x04; /* Accept Broadcast Packets */
139
140static const unsigned int txConfTxEna = 0x80; /* Transmit Enable */
141static const unsigned int txConfMAC = 0x20; /* Host sends MAC mode */
142static const unsigned int txConfEUD = 0x10; /* Enable Uni-Data packets */
143static const unsigned int txConfKey = 0x02; /* Scramble data packets */
144static const unsigned int txConfLoop = 0x01; /* Loopback mode */
145
146
147/*====================================================================*/
148
149/* Parameters that can be set with 'insmod' */
150
151/* Choose the domain, default is 0x100 */
152static u_int domain = 0x100;
153
154/* Scramble key, range from 0x0 to 0xffff.
155 * 0x0 is no scrambling.
156 */
157static u_int scramble_key = 0x0;
158
159/* Shared memory speed, in ns. The documentation states that
160 * the card should not be read faster than every 400ns.
161 * This timing should be provided by the HBA. If it becomes a
162 * problem, try setting mem_speed to 400.
163 */
164static int mem_speed;
165
166module_param(domain, int, 0);
167module_param(scramble_key, int, 0);
168module_param(mem_speed, int, 0);
169
170/*====================================================================*/
171
172/* PCMCIA (Card Services) related functions */
173static void netwave_release(struct pcmcia_device *link); /* Card removal */
174static int netwave_pcmcia_config(struct pcmcia_device *arg); /* Runs after card
175 insertion */
176static void netwave_detach(struct pcmcia_device *p_dev); /* Destroy instance */
177
178/* Hardware configuration */
179static void netwave_doreset(unsigned int iobase, u_char __iomem *ramBase);
180static void netwave_reset(struct net_device *dev);
181
182/* Misc device stuff */
183static int netwave_open(struct net_device *dev); /* Open the device */
184static int netwave_close(struct net_device *dev); /* Close the device */
185
186/* Packet transmission and Packet reception */
187static netdev_tx_t netwave_start_xmit( struct sk_buff *skb,
188 struct net_device *dev);
189static int netwave_rx( struct net_device *dev);
190
191/* Interrupt routines */
192static irqreturn_t netwave_interrupt(int irq, void *dev_id);
193static void netwave_watchdog(struct net_device *);
194
195/* Wireless extensions */
196static struct iw_statistics* netwave_get_wireless_stats(struct net_device *dev);
197
198static void set_multicast_list(struct net_device *dev);
199
200/*
201 A struct pcmcia_device structure has fields for most things that are needed
202 to keep track of a socket, but there will usually be some device
203 specific information that also needs to be kept track of. The
204 'priv' pointer in a struct pcmcia_device structure can be used to point to
205 a device-specific private data structure, like this.
206
207 A driver needs to provide a dev_node_t structure for each device
208 on a card. In some cases, there is only one device per card (for
209 example, ethernet cards, modems). In other cases, there may be
210 many actual or logical devices (SCSI adapters, memory cards with
211 multiple partitions). The dev_node_t structures need to be kept
212 in a linked list starting at the 'dev' field of a struct pcmcia_device
213 structure. We allocate them in the card's private data structure,
214 because they generally can't be allocated dynamically.
215*/
216
217static const struct iw_handler_def netwave_handler_def;
218
219#define SIOCGIPSNAP SIOCIWFIRSTPRIV + 1 /* Site Survey Snapshot */
220
221#define MAX_ESA 10
222
223typedef struct net_addr {
224 u_char addr48[6];
225} net_addr;
226
227struct site_survey {
228 u_short length;
229 u_char struct_revision;
230 u_char roaming_state;
231
232 u_char sp_existsFlag;
233 u_char sp_link_quality;
234 u_char sp_max_link_quality;
235 u_char linkQualityGoodFairBoundary;
236 u_char linkQualityFairPoorBoundary;
237 u_char sp_utilization;
238 u_char sp_goodness;
239 u_char sp_hotheadcount;
240 u_char roaming_condition;
241
242 net_addr sp;
243 u_char numAPs;
244 net_addr nearByAccessPoints[MAX_ESA];
245};
246
247typedef struct netwave_private {
248 struct pcmcia_device *p_dev;
249 spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
250 dev_node_t node;
251 u_char __iomem *ramBase;
252 int timeoutCounter;
253 int lastExec;
254 struct timer_list watchdog; /* To avoid blocking state */
255 struct site_survey nss;
256 struct iw_statistics iw_stats; /* Wireless stats */
257} netwave_private;
258
259/*
260 * The Netwave card is little-endian, so won't work for big endian
261 * systems.
262 */
263static inline unsigned short get_uint16(u_char __iomem *staddr)
264{
265 return readw(staddr); /* Return only 16 bits */
266}
267
268static inline short get_int16(u_char __iomem * staddr)
269{
270 return readw(staddr);
271}
272
273/*
274 * Wait until the WOC (Write Operation Complete) bit in the
275 * ASR (Adapter Status Register) is asserted.
276 * This should have aborted if it takes too long time.
277 */
278static inline void wait_WOC(unsigned int iobase)
279{
280 /* Spin lock */
281 while ((inb(iobase + NETWAVE_REG_ASR) & 0x8) != 0x8) ;
282}
283
284static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase,
285 unsigned int iobase) {
286 u_short resultBuffer;
287
288 /* if time since last snapshot is > 1 sec. (100 jiffies?) then take
289 * new snapshot, else return cached data. This is the recommended rate.
290 */
291 if ( jiffies - priv->lastExec > 100) {
292 /* Take site survey snapshot */
293 /*printk( KERN_DEBUG "Taking new snapshot. %ld\n", jiffies -
294 priv->lastExec); */
295 wait_WOC(iobase);
296 writeb(NETWAVE_CMD_SSS, ramBase + NETWAVE_EREG_CB + 0);
297 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
298 wait_WOC(iobase);
299
300 /* Get result and copy to cach */
301 resultBuffer = readw(ramBase + NETWAVE_EREG_CRBP);
302 copy_from_pc( &priv->nss, ramBase+resultBuffer,
303 sizeof(struct site_survey));
304 }
305}
306
307/*
308 * Function netwave_get_wireless_stats (dev)
309 *
310 * Wireless extensions statistics
311 *
312 */
313static struct iw_statistics *netwave_get_wireless_stats(struct net_device *dev)
314{
315 unsigned long flags;
316 unsigned int iobase = dev->base_addr;
317 netwave_private *priv = netdev_priv(dev);
318 u_char __iomem *ramBase = priv->ramBase;
319 struct iw_statistics* wstats;
320
321 wstats = &priv->iw_stats;
322
323 spin_lock_irqsave(&priv->spinlock, flags);
324
325 netwave_snapshot( priv, ramBase, iobase);
326
327 wstats->status = priv->nss.roaming_state;
328 wstats->qual.qual = readb( ramBase + NETWAVE_EREG_SPCQ);
329 wstats->qual.level = readb( ramBase + NETWAVE_EREG_ISPLQ);
330 wstats->qual.noise = readb( ramBase + NETWAVE_EREG_SPU) & 0x3f;
331 wstats->discard.nwid = 0L;
332 wstats->discard.code = 0L;
333 wstats->discard.misc = 0L;
334
335 spin_unlock_irqrestore(&priv->spinlock, flags);
336
337 return &priv->iw_stats;
338}
339
340static const struct net_device_ops netwave_netdev_ops = {
341 .ndo_open = netwave_open,
342 .ndo_stop = netwave_close,
343 .ndo_start_xmit = netwave_start_xmit,
344 .ndo_set_multicast_list = set_multicast_list,
345 .ndo_tx_timeout = netwave_watchdog,
346 .ndo_change_mtu = eth_change_mtu,
347 .ndo_set_mac_address = eth_mac_addr,
348 .ndo_validate_addr = eth_validate_addr,
349};
350
351/*
352 * Function netwave_attach (void)
353 *
354 * Creates an "instance" of the driver, allocating local data
355 * structures for one device. The device is registered with Card
356 * Services.
357 *
358 * The dev_link structure is initialized, but we don't actually
359 * configure the card at this point -- we wait until we receive a
360 * card insertion event.
361 */
362static int netwave_probe(struct pcmcia_device *link)
363{
364 struct net_device *dev;
365 netwave_private *priv;
366
367 dev_dbg(&link->dev, "netwave_attach()\n");
368
369 /* Initialize the struct pcmcia_device structure */
370 dev = alloc_etherdev(sizeof(netwave_private));
371 if (!dev)
372 return -ENOMEM;
373 priv = netdev_priv(dev);
374 priv->p_dev = link;
375 link->priv = dev;
376
377 /* The io structure describes IO port mapping */
378 link->io.NumPorts1 = 16;
379 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
380 /* link->io.NumPorts2 = 16;
381 link->io.Attributes2 = IO_DATA_PATH_WIDTH_16; */
382 link->io.IOAddrLines = 5;
383
384 /* General socket configuration */
385 link->conf.Attributes = CONF_ENABLE_IRQ;
386 link->conf.IntType = INT_MEMORY_AND_IO;
387 link->conf.ConfigIndex = 1;
388
389 /* Netwave private struct init. link/dev/node already taken care of,
390 * other stuff zero'd - Jean II */
391 spin_lock_init(&priv->spinlock);
392
393 /* Netwave specific entries in the device structure */
394 dev->netdev_ops = &netwave_netdev_ops;
395 /* wireless extensions */
396 dev->wireless_handlers = &netwave_handler_def;
397
398 dev->watchdog_timeo = TX_TIMEOUT;
399
400 return netwave_pcmcia_config( link);
401} /* netwave_attach */
402
403/*
404 * Function netwave_detach (link)
405 *
406 * This deletes a driver "instance". The device is de-registered
407 * with Card Services. If it has been released, all local data
408 * structures are freed. Otherwise, the structures will be freed
409 * when the device is released.
410 */
411static void netwave_detach(struct pcmcia_device *link)
412{
413 struct net_device *dev = link->priv;
414
415 dev_dbg(&link->dev, "netwave_detach\n");
416
417 netwave_release(link);
418
419 if (link->dev_node)
420 unregister_netdev(dev);
421
422 free_netdev(dev);
423} /* netwave_detach */
424
425/*
426 * Wireless Handler : get protocol name
427 */
428static int netwave_get_name(struct net_device *dev,
429 struct iw_request_info *info,
430 union iwreq_data *wrqu,
431 char *extra)
432{
433 strcpy(wrqu->name, "Netwave");
434 return 0;
435}
436
437/*
438 * Wireless Handler : set Network ID
439 */
440static int netwave_set_nwid(struct net_device *dev,
441 struct iw_request_info *info,
442 union iwreq_data *wrqu,
443 char *extra)
444{
445 unsigned long flags;
446 unsigned int iobase = dev->base_addr;
447 netwave_private *priv = netdev_priv(dev);
448 u_char __iomem *ramBase = priv->ramBase;
449
450 /* Disable interrupts & save flags */
451 spin_lock_irqsave(&priv->spinlock, flags);
452
453 if(!wrqu->nwid.disabled) {
454 domain = wrqu->nwid.value;
455 printk( KERN_DEBUG "Setting domain to 0x%x%02x\n",
456 (domain >> 8) & 0x01, domain & 0xff);
457 wait_WOC(iobase);
458 writeb(NETWAVE_CMD_SMD, ramBase + NETWAVE_EREG_CB + 0);
459 writeb( domain & 0xff, ramBase + NETWAVE_EREG_CB + 1);
460 writeb((domain >>8 ) & 0x01,ramBase + NETWAVE_EREG_CB+2);
461 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
462 }
463
464 /* ReEnable interrupts & restore flags */
465 spin_unlock_irqrestore(&priv->spinlock, flags);
466
467 return 0;
468}
469
470/*
471 * Wireless Handler : get Network ID
472 */
473static int netwave_get_nwid(struct net_device *dev,
474 struct iw_request_info *info,
475 union iwreq_data *wrqu,
476 char *extra)
477{
478 wrqu->nwid.value = domain;
479 wrqu->nwid.disabled = 0;
480 wrqu->nwid.fixed = 1;
481 return 0;
482}
483
484/*
485 * Wireless Handler : set scramble key
486 */
487static int netwave_set_scramble(struct net_device *dev,
488 struct iw_request_info *info,
489 union iwreq_data *wrqu,
490 char *key)
491{
492 unsigned long flags;
493 unsigned int iobase = dev->base_addr;
494 netwave_private *priv = netdev_priv(dev);
495 u_char __iomem *ramBase = priv->ramBase;
496
497 /* Disable interrupts & save flags */
498 spin_lock_irqsave(&priv->spinlock, flags);
499
500 scramble_key = (key[0] << 8) | key[1];
501 wait_WOC(iobase);
502 writeb(NETWAVE_CMD_SSK, ramBase + NETWAVE_EREG_CB + 0);
503 writeb(scramble_key & 0xff, ramBase + NETWAVE_EREG_CB + 1);
504 writeb((scramble_key>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
505 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
506
507 /* ReEnable interrupts & restore flags */
508 spin_unlock_irqrestore(&priv->spinlock, flags);
509
510 return 0;
511}
512
513/*
514 * Wireless Handler : get scramble key
515 */
516static int netwave_get_scramble(struct net_device *dev,
517 struct iw_request_info *info,
518 union iwreq_data *wrqu,
519 char *key)
520{
521 key[1] = scramble_key & 0xff;
522 key[0] = (scramble_key>>8) & 0xff;
523 wrqu->encoding.flags = IW_ENCODE_ENABLED;
524 wrqu->encoding.length = 2;
525 return 0;
526}
527
528/*
529 * Wireless Handler : get mode
530 */
531static int netwave_get_mode(struct net_device *dev,
532 struct iw_request_info *info,
533 union iwreq_data *wrqu,
534 char *extra)
535{
536 if(domain & 0x100)
537 wrqu->mode = IW_MODE_INFRA;
538 else
539 wrqu->mode = IW_MODE_ADHOC;
540
541 return 0;
542}
543
544/*
545 * Wireless Handler : get range info
546 */
547static int netwave_get_range(struct net_device *dev,
548 struct iw_request_info *info,
549 union iwreq_data *wrqu,
550 char *extra)
551{
552 struct iw_range *range = (struct iw_range *) extra;
553 int ret = 0;
554
555 /* Set the length (very important for backward compatibility) */
556 wrqu->data.length = sizeof(struct iw_range);
557
558 /* Set all the info we don't care or don't know about to zero */
559 memset(range, 0, sizeof(struct iw_range));
560
561 /* Set the Wireless Extension versions */
562 range->we_version_compiled = WIRELESS_EXT;
563 range->we_version_source = 9; /* Nothing for us in v10 and v11 */
564
565 /* Set information in the range struct */
566 range->throughput = 450 * 1000; /* don't argue on this ! */
567 range->min_nwid = 0x0000;
568 range->max_nwid = 0x01FF;
569
570 range->num_channels = range->num_frequency = 0;
571
572 range->sensitivity = 0x3F;
573 range->max_qual.qual = 255;
574 range->max_qual.level = 255;
575 range->max_qual.noise = 0;
576
577 range->num_bitrates = 1;
578 range->bitrate[0] = 1000000; /* 1 Mb/s */
579
580 range->encoding_size[0] = 2; /* 16 bits scrambling */
581 range->num_encoding_sizes = 1;
582 range->max_encoding_tokens = 1; /* Only one key possible */
583
584 return ret;
585}
586
587/*
588 * Wireless Private Handler : get snapshot
589 */
590static int netwave_get_snap(struct net_device *dev,
591 struct iw_request_info *info,
592 union iwreq_data *wrqu,
593 char *extra)
594{
595 unsigned long flags;
596 unsigned int iobase = dev->base_addr;
597 netwave_private *priv = netdev_priv(dev);
598 u_char __iomem *ramBase = priv->ramBase;
599
600 /* Disable interrupts & save flags */
601 spin_lock_irqsave(&priv->spinlock, flags);
602
603 /* Take snapshot of environment */
604 netwave_snapshot( priv, ramBase, iobase);
605 wrqu->data.length = priv->nss.length;
606 memcpy(extra, (u_char *) &priv->nss, sizeof( struct site_survey));
607
608 priv->lastExec = jiffies;
609
610 /* ReEnable interrupts & restore flags */
611 spin_unlock_irqrestore(&priv->spinlock, flags);
612
613 return(0);
614}
615
616/*
617 * Structures to export the Wireless Handlers
618 * This is the stuff that are treated the wireless extensions (iwconfig)
619 */
620
621static const struct iw_priv_args netwave_private_args[] = {
622/*{ cmd, set_args, get_args, name } */
623 { SIOCGIPSNAP, 0,
624 IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | sizeof(struct site_survey),
625 "getsitesurvey" },
626};
627
628static const iw_handler netwave_handler[] =
629{
630 NULL, /* SIOCSIWNAME */
631 netwave_get_name, /* SIOCGIWNAME */
632 netwave_set_nwid, /* SIOCSIWNWID */
633 netwave_get_nwid, /* SIOCGIWNWID */
634 NULL, /* SIOCSIWFREQ */
635 NULL, /* SIOCGIWFREQ */
636 NULL, /* SIOCSIWMODE */
637 netwave_get_mode, /* SIOCGIWMODE */
638 NULL, /* SIOCSIWSENS */
639 NULL, /* SIOCGIWSENS */
640 NULL, /* SIOCSIWRANGE */
641 netwave_get_range, /* SIOCGIWRANGE */
642 NULL, /* SIOCSIWPRIV */
643 NULL, /* SIOCGIWPRIV */
644 NULL, /* SIOCSIWSTATS */
645 NULL, /* SIOCGIWSTATS */
646 NULL, /* SIOCSIWSPY */
647 NULL, /* SIOCGIWSPY */
648 NULL, /* -- hole -- */
649 NULL, /* -- hole -- */
650 NULL, /* SIOCSIWAP */
651 NULL, /* SIOCGIWAP */
652 NULL, /* -- hole -- */
653 NULL, /* SIOCGIWAPLIST */
654 NULL, /* -- hole -- */
655 NULL, /* -- hole -- */
656 NULL, /* SIOCSIWESSID */
657 NULL, /* SIOCGIWESSID */
658 NULL, /* SIOCSIWNICKN */
659 NULL, /* SIOCGIWNICKN */
660 NULL, /* -- hole -- */
661 NULL, /* -- hole -- */
662 NULL, /* SIOCSIWRATE */
663 NULL, /* SIOCGIWRATE */
664 NULL, /* SIOCSIWRTS */
665 NULL, /* SIOCGIWRTS */
666 NULL, /* SIOCSIWFRAG */
667 NULL, /* SIOCGIWFRAG */
668 NULL, /* SIOCSIWTXPOW */
669 NULL, /* SIOCGIWTXPOW */
670 NULL, /* SIOCSIWRETRY */
671 NULL, /* SIOCGIWRETRY */
672 netwave_set_scramble, /* SIOCSIWENCODE */
673 netwave_get_scramble, /* SIOCGIWENCODE */
674};
675
676static const iw_handler netwave_private_handler[] =
677{
678 NULL, /* SIOCIWFIRSTPRIV */
679 netwave_get_snap, /* SIOCIWFIRSTPRIV + 1 */
680};
681
682static const struct iw_handler_def netwave_handler_def =
683{
684 .num_standard = ARRAY_SIZE(netwave_handler),
685 .num_private = ARRAY_SIZE(netwave_private_handler),
686 .num_private_args = ARRAY_SIZE(netwave_private_args),
687 .standard = (iw_handler *) netwave_handler,
688 .private = (iw_handler *) netwave_private_handler,
689 .private_args = (struct iw_priv_args *) netwave_private_args,
690 .get_wireless_stats = netwave_get_wireless_stats,
691};
692
693/*
694 * Function netwave_pcmcia_config (link)
695 *
696 * netwave_pcmcia_config() is scheduled to run after a CARD_INSERTION
697 * event is received, to configure the PCMCIA socket, and to make the
698 * device available to the system.
699 *
700 */
701
702static int netwave_pcmcia_config(struct pcmcia_device *link) {
703 struct net_device *dev = link->priv;
704 netwave_private *priv = netdev_priv(dev);
705 int i, j, ret;
706 win_req_t req;
707 memreq_t mem;
708 u_char __iomem *ramBase = NULL;
709
710 dev_dbg(&link->dev, "netwave_pcmcia_config\n");
711
712 /*
713 * Try allocating IO ports. This tries a few fixed addresses.
714 * If you want, you can also read the card's config table to
715 * pick addresses -- see the serial driver for an example.
716 */
717 for (i = j = 0x0; j < 0x400; j += 0x20) {
718 link->io.BasePort1 = j ^ 0x300;
719 i = pcmcia_request_io(link, &link->io);
720 if (i == 0)
721 break;
722 }
723 if (i != 0)
724 goto failed;
725
726 /*
727 * Now allocate an interrupt line. Note that this does not
728 * actually assign a handler to the interrupt.
729 */
730 ret = pcmcia_request_irq(link, netwave_interrupt);
731 if (ret)
732 goto failed;
733
734 /*
735 * This actually configures the PCMCIA socket -- setting up
736 * the I/O windows and the interrupt mapping.
737 */
738 ret = pcmcia_request_configuration(link, &link->conf);
739 if (ret)
740 goto failed;
741
742 /*
743 * Allocate a 32K memory window. Note that the struct pcmcia_device
744 * structure provides space for one window handle -- if your
745 * device needs several windows, you'll need to keep track of
746 * the handles in your private data structure, dev->priv.
747 */
748 dev_dbg(&link->dev, "Setting mem speed of %d\n", mem_speed);
749
750 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_CM|WIN_ENABLE;
751 req.Base = 0; req.Size = 0x8000;
752 req.AccessSpeed = mem_speed;
753 ret = pcmcia_request_window(link, &req, &link->win);
754 if (ret)
755 goto failed;
756 mem.CardOffset = 0x20000; mem.Page = 0;
757 ret = pcmcia_map_mem_page(link, link->win, &mem);
758 if (ret)
759 goto failed;
760
761 /* Store base address of the common window frame */
762 ramBase = ioremap(req.Base, 0x8000);
763 priv->ramBase = ramBase;
764
765 dev->irq = link->irq;
766 dev->base_addr = link->io.BasePort1;
767 SET_NETDEV_DEV(dev, &link->dev);
768
769 if (register_netdev(dev) != 0) {
770 printk(KERN_DEBUG "netwave_cs: register_netdev() failed\n");
771 goto failed;
772 }
773
774 strcpy(priv->node.dev_name, dev->name);
775 link->dev_node = &priv->node;
776
777 /* Reset card before reading physical address */
778 netwave_doreset(dev->base_addr, ramBase);
779
780 /* Read the ethernet address and fill in the Netwave registers. */
781 for (i = 0; i < 6; i++)
782 dev->dev_addr[i] = readb(ramBase + NETWAVE_EREG_PA + i);
783
784 printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx, "
785 "id %c%c, hw_addr %pM\n",
786 dev->name, dev->base_addr, dev->irq,
787 (u_long) ramBase,
788 (int) readb(ramBase+NETWAVE_EREG_NI),
789 (int) readb(ramBase+NETWAVE_EREG_NI+1),
790 dev->dev_addr);
791
792 /* get revision words */
793 printk(KERN_DEBUG "Netwave_reset: revision %04x %04x\n",
794 get_uint16(ramBase + NETWAVE_EREG_ARW),
795 get_uint16(ramBase + NETWAVE_EREG_ARW+2));
796 return 0;
797
798failed:
799 netwave_release(link);
800 return -ENODEV;
801} /* netwave_pcmcia_config */
802
803/*
804 * Function netwave_release (arg)
805 *
806 * After a card is removed, netwave_release() will unregister the net
807 * device, and release the PCMCIA configuration. If the device is
808 * still open, this will be postponed until it is closed.
809 */
810static void netwave_release(struct pcmcia_device *link)
811{
812 struct net_device *dev = link->priv;
813 netwave_private *priv = netdev_priv(dev);
814
815 dev_dbg(&link->dev, "netwave_release\n");
816
817 pcmcia_disable_device(link);
818 if (link->win)
819 iounmap(priv->ramBase);
820}
821
822static int netwave_suspend(struct pcmcia_device *link)
823{
824 struct net_device *dev = link->priv;
825
826 if (link->open)
827 netif_device_detach(dev);
828
829 return 0;
830}
831
832static int netwave_resume(struct pcmcia_device *link)
833{
834 struct net_device *dev = link->priv;
835
836 if (link->open) {
837 netwave_reset(dev);
838 netif_device_attach(dev);
839 }
840
841 return 0;
842}
843
844
845/*
846 * Function netwave_doreset (ioBase, ramBase)
847 *
848 * Proper hardware reset of the card.
849 */
850static void netwave_doreset(unsigned int ioBase, u_char __iomem *ramBase)
851{
852 /* Reset card */
853 wait_WOC(ioBase);
854 outb(0x80, ioBase + NETWAVE_REG_PMR);
855 writeb(0x08, ramBase + NETWAVE_EREG_ASCC); /* Bit 3 is WOC */
856 outb(0x0, ioBase + NETWAVE_REG_PMR); /* release reset */
857}
858
859/*
860 * Function netwave_reset (dev)
861 *
862 * Reset and restore all of the netwave registers
863 */
864static void netwave_reset(struct net_device *dev) {
865 /* u_char state; */
866 netwave_private *priv = netdev_priv(dev);
867 u_char __iomem *ramBase = priv->ramBase;
868 unsigned int iobase = dev->base_addr;
869
870 pr_debug("netwave_reset: Done with hardware reset\n");
871
872 priv->timeoutCounter = 0;
873
874 /* Reset card */
875 netwave_doreset(iobase, ramBase);
876 printk(KERN_DEBUG "netwave_reset: Done with hardware reset\n");
877
878 /* Write a NOP to check the card */
879 wait_WOC(iobase);
880 writeb(NETWAVE_CMD_NOP, ramBase + NETWAVE_EREG_CB + 0);
881 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
882
883 /* Set receive conf */
884 wait_WOC(iobase);
885 writeb(NETWAVE_CMD_SRC, ramBase + NETWAVE_EREG_CB + 0);
886 writeb(rxConfRxEna + rxConfBcast, ramBase + NETWAVE_EREG_CB + 1);
887 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
888
889 /* Set transmit conf */
890 wait_WOC(iobase);
891 writeb(NETWAVE_CMD_STC, ramBase + NETWAVE_EREG_CB + 0);
892 writeb(txConfTxEna, ramBase + NETWAVE_EREG_CB + 1);
893 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
894
895 /* Now set the MU Domain */
896 printk(KERN_DEBUG "Setting domain to 0x%x%02x\n", (domain >> 8) & 0x01, domain & 0xff);
897 wait_WOC(iobase);
898 writeb(NETWAVE_CMD_SMD, ramBase + NETWAVE_EREG_CB + 0);
899 writeb(domain & 0xff, ramBase + NETWAVE_EREG_CB + 1);
900 writeb((domain>>8) & 0x01, ramBase + NETWAVE_EREG_CB + 2);
901 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
902
903 /* Set scramble key */
904 printk(KERN_DEBUG "Setting scramble key to 0x%x\n", scramble_key);
905 wait_WOC(iobase);
906 writeb(NETWAVE_CMD_SSK, ramBase + NETWAVE_EREG_CB + 0);
907 writeb(scramble_key & 0xff, ramBase + NETWAVE_EREG_CB + 1);
908 writeb((scramble_key>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
909 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
910
911 /* Enable interrupts, bit 4 high to keep unused
912 * source from interrupting us, bit 2 high to
913 * set interrupt enable, 567 to enable TxDN,
914 * RxErr and RxRdy
915 */
916 wait_WOC(iobase);
917 outb(imrConfIENA+imrConfRFU1, iobase + NETWAVE_REG_IMR);
918
919 /* Hent 4 bytes fra 0x170. Skal vaere 0a,29,88,36
920 * waitWOC
921 * skriv 80 til d000:3688
922 * sjekk om det ble 80
923 */
924
925 /* Enable Receiver */
926 wait_WOC(iobase);
927 writeb(NETWAVE_CMD_ER, ramBase + NETWAVE_EREG_CB + 0);
928 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
929
930 /* Set the IENA bit in COR */
931 wait_WOC(iobase);
932 outb(corConfIENA + corConfLVLREQ, iobase + NETWAVE_REG_COR);
933}
934
935/*
936 * Function netwave_hw_xmit (data, len, dev)
937 */
938static int netwave_hw_xmit(unsigned char* data, int len,
939 struct net_device* dev) {
940 unsigned long flags;
941 unsigned int TxFreeList,
942 curBuff,
943 MaxData,
944 DataOffset;
945 int tmpcount;
946
947 netwave_private *priv = netdev_priv(dev);
948 u_char __iomem * ramBase = priv->ramBase;
949 unsigned int iobase = dev->base_addr;
950
951 /* Disable interrupts & save flags */
952 spin_lock_irqsave(&priv->spinlock, flags);
953
954 /* Check if there are transmit buffers available */
955 wait_WOC(iobase);
956 if ((inb(iobase+NETWAVE_REG_ASR) & NETWAVE_ASR_TXBA) == 0) {
957 /* No buffers available */
958 printk(KERN_DEBUG "netwave_hw_xmit: %s - no xmit buffers available.\n",
959 dev->name);
960 spin_unlock_irqrestore(&priv->spinlock, flags);
961 return 1;
962 }
963
964 dev->stats.tx_bytes += len;
965
966 pr_debug("Transmitting with SPCQ %x SPU %x LIF %x ISPLQ %x\n",
967 readb(ramBase + NETWAVE_EREG_SPCQ),
968 readb(ramBase + NETWAVE_EREG_SPU),
969 readb(ramBase + NETWAVE_EREG_LIF),
970 readb(ramBase + NETWAVE_EREG_ISPLQ));
971
972 /* Now try to insert it into the adapters free memory */
973 wait_WOC(iobase);
974 TxFreeList = get_uint16(ramBase + NETWAVE_EREG_TDP);
975 MaxData = get_uint16(ramBase + NETWAVE_EREG_TDP+2);
976 DataOffset = get_uint16(ramBase + NETWAVE_EREG_TDP+4);
977
978 pr_debug("TxFreeList %x, MaxData %x, DataOffset %x\n",
979 TxFreeList, MaxData, DataOffset);
980
981 /* Copy packet to the adapter fragment buffers */
982 curBuff = TxFreeList;
983 tmpcount = 0;
984 while (tmpcount < len) {
985 int tmplen = len - tmpcount;
986 copy_to_pc(ramBase + curBuff + DataOffset, data + tmpcount,
987 (tmplen < MaxData) ? tmplen : MaxData);
988 tmpcount += MaxData;
989
990 /* Advance to next buffer */
991 curBuff = get_uint16(ramBase + curBuff);
992 }
993
994 /* Now issue transmit list */
995 wait_WOC(iobase);
996 writeb(NETWAVE_CMD_TL, ramBase + NETWAVE_EREG_CB + 0);
997 writeb(len & 0xff, ramBase + NETWAVE_EREG_CB + 1);
998 writeb((len>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
999 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
1000
1001 spin_unlock_irqrestore(&priv->spinlock, flags);
1002 return 0;
1003}
1004
1005static netdev_tx_t netwave_start_xmit(struct sk_buff *skb,
1006 struct net_device *dev) {
1007 /* This flag indicate that the hardware can't perform a transmission.
1008 * Theoritically, NET3 check it before sending a packet to the driver,
1009 * but in fact it never do that and pool continuously.
1010 * As the watchdog will abort too long transmissions, we are quite safe...
1011 */
1012
1013 netif_stop_queue(dev);
1014
1015 {
1016 short length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1017 unsigned char* buf = skb->data;
1018
1019 if (netwave_hw_xmit( buf, length, dev) == 1) {
1020 /* Some error, let's make them call us another time? */
1021 netif_start_queue(dev);
1022 }
1023 dev->trans_start = jiffies;
1024 }
1025 dev_kfree_skb(skb);
1026
1027 return NETDEV_TX_OK;
1028} /* netwave_start_xmit */
1029
1030/*
1031 * Function netwave_interrupt (irq, dev_id)
1032 *
1033 * This function is the interrupt handler for the Netwave card. This
1034 * routine will be called whenever:
1035 * 1. A packet is received.
1036 * 2. A packet has successfully been transferred and the unit is
1037 * ready to transmit another packet.
1038 * 3. A command has completed execution.
1039 */
1040static irqreturn_t netwave_interrupt(int irq, void* dev_id)
1041{
1042 unsigned int iobase;
1043 u_char __iomem *ramBase;
1044 struct net_device *dev = (struct net_device *)dev_id;
1045 struct netwave_private *priv = netdev_priv(dev);
1046 struct pcmcia_device *link = priv->p_dev;
1047 int i;
1048
1049 if (!netif_device_present(dev))
1050 return IRQ_NONE;
1051
1052 iobase = dev->base_addr;
1053 ramBase = priv->ramBase;
1054
1055 /* Now find what caused the interrupt, check while interrupts ready */
1056 for (i = 0; i < 10; i++) {
1057 u_char status;
1058
1059 wait_WOC(iobase);
1060 if (!(inb(iobase+NETWAVE_REG_CCSR) & 0x02))
1061 break; /* None of the interrupt sources asserted (normal exit) */
1062
1063 status = inb(iobase + NETWAVE_REG_ASR);
1064
1065 if (!pcmcia_dev_present(link)) {
1066 pr_debug("netwave_interrupt: Interrupt with status 0x%x "
1067 "from removed or suspended card!\n", status);
1068 break;
1069 }
1070
1071 /* RxRdy */
1072 if (status & 0x80) {
1073 netwave_rx(dev);
1074 /* wait_WOC(iobase); */
1075 /* RxRdy cannot be reset directly by the host */
1076 }
1077 /* RxErr */
1078 if (status & 0x40) {
1079 u_char rser;
1080
1081 rser = readb(ramBase + NETWAVE_EREG_RSER);
1082
1083 if (rser & 0x04) {
1084 ++dev->stats.rx_dropped;
1085 ++dev->stats.rx_crc_errors;
1086 }
1087 if (rser & 0x02)
1088 ++dev->stats.rx_frame_errors;
1089
1090 /* Clear the RxErr bit in RSER. RSER+4 is the
1091 * write part. Also clear the RxCRC (0x04) and
1092 * RxBig (0x02) bits if present */
1093 wait_WOC(iobase);
1094 writeb(0x40 | (rser & 0x06), ramBase + NETWAVE_EREG_RSER + 4);
1095
1096 /* Write bit 6 high to ASCC to clear RxErr in ASR,
1097 * WOC must be set first!
1098 */
1099 wait_WOC(iobase);
1100 writeb(0x40, ramBase + NETWAVE_EREG_ASCC);
1101
1102 /* Remember to count up dev->stats on error packets */
1103 ++dev->stats.rx_errors;
1104 }
1105 /* TxDN */
1106 if (status & 0x20) {
1107 int txStatus;
1108
1109 txStatus = readb(ramBase + NETWAVE_EREG_TSER);
1110 pr_debug("Transmit done. TSER = %x id %x\n",
1111 txStatus, readb(ramBase + NETWAVE_EREG_TSER + 1));
1112
1113 if (txStatus & 0x20) {
1114 /* Transmitting was okay, clear bits */
1115 wait_WOC(iobase);
1116 writeb(0x2f, ramBase + NETWAVE_EREG_TSER + 4);
1117 ++dev->stats.tx_packets;
1118 }
1119
1120 if (txStatus & 0xd0) {
1121 if (txStatus & 0x80) {
1122 ++dev->stats.collisions; /* Because of /proc/net/dev*/
1123 /* ++dev->stats.tx_aborted_errors; */
1124 /* printk("Collision. %ld\n", jiffies - dev->trans_start); */
1125 }
1126 if (txStatus & 0x40)
1127 ++dev->stats.tx_carrier_errors;
1128 /* 0x80 TxGU Transmit giveup - nine times and no luck
1129 * 0x40 TxNOAP No access point. Discarded packet.
1130 * 0x10 TxErr Transmit error. Always set when
1131 * TxGU and TxNOAP is set. (Those are the only ones
1132 * to set TxErr).
1133 */
1134 pr_debug("netwave_interrupt: TxDN with error status %x\n",
1135 txStatus);
1136
1137 /* Clear out TxGU, TxNOAP, TxErr and TxTrys */
1138 wait_WOC(iobase);
1139 writeb(0xdf & txStatus, ramBase+NETWAVE_EREG_TSER+4);
1140 ++dev->stats.tx_errors;
1141 }
1142 pr_debug("New status is TSER %x ASR %x\n",
1143 readb(ramBase + NETWAVE_EREG_TSER),
1144 inb(iobase + NETWAVE_REG_ASR));
1145
1146 netif_wake_queue(dev);
1147 }
1148 /* TxBA, this would trigger on all error packets received */
1149 /* if (status & 0x01) {
1150 pr_debug("Transmit buffers available, %x\n", status);
1151 }
1152 */
1153 }
1154 /* Handled if we looped at least one time - Jean II */
1155 return IRQ_RETVAL(i);
1156} /* netwave_interrupt */
1157
1158/*
1159 * Function netwave_watchdog (a)
1160 *
1161 * Watchdog : when we start a transmission, we set a timer in the
1162 * kernel. If the transmission complete, this timer is disabled. If
1163 * it expire, we reset the card.
1164 *
1165 */
1166static void netwave_watchdog(struct net_device *dev) {
1167
1168 pr_debug("%s: netwave_watchdog: watchdog timer expired\n", dev->name);
1169 netwave_reset(dev);
1170 dev->trans_start = jiffies;
1171 netif_wake_queue(dev);
1172} /* netwave_watchdog */
1173
1174static int netwave_rx(struct net_device *dev)
1175{
1176 netwave_private *priv = netdev_priv(dev);
1177 u_char __iomem *ramBase = priv->ramBase;
1178 unsigned int iobase = dev->base_addr;
1179 u_char rxStatus;
1180 struct sk_buff *skb = NULL;
1181 unsigned int curBuffer,
1182 rcvList;
1183 int rcvLen;
1184 int tmpcount = 0;
1185 int dataCount, dataOffset;
1186 int i;
1187 u_char *ptr;
1188
1189 pr_debug("xinw_rx: Receiving ... \n");
1190
1191 /* Receive max 10 packets for now. */
1192 for (i = 0; i < 10; i++) {
1193 /* Any packets? */
1194 wait_WOC(iobase);
1195 rxStatus = readb(ramBase + NETWAVE_EREG_RSER);
1196 if ( !( rxStatus & 0x80)) /* No more packets */
1197 break;
1198
1199 /* Check if multicast/broadcast or other */
1200 /* multicast = (rxStatus & 0x20); */
1201
1202 /* The receive list pointer and length of the packet */
1203 wait_WOC(iobase);
1204 rcvLen = get_int16( ramBase + NETWAVE_EREG_RDP);
1205 rcvList = get_uint16( ramBase + NETWAVE_EREG_RDP + 2);
1206
1207 if (rcvLen < 0) {
1208 printk(KERN_DEBUG "netwave_rx: Receive packet with len %d\n",
1209 rcvLen);
1210 return 0;
1211 }
1212
1213 skb = dev_alloc_skb(rcvLen+5);
1214 if (skb == NULL) {
1215 pr_debug("netwave_rx: Could not allocate an sk_buff of "
1216 "length %d\n", rcvLen);
1217 ++dev->stats.rx_dropped;
1218 /* Tell the adapter to skip the packet */
1219 wait_WOC(iobase);
1220 writeb(NETWAVE_CMD_SRP, ramBase + NETWAVE_EREG_CB + 0);
1221 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
1222 return 0;
1223 }
1224
1225 skb_reserve( skb, 2); /* Align IP on 16 byte */
1226 skb_put( skb, rcvLen);
1227
1228 /* Copy packet fragments to the skb data area */
1229 ptr = (u_char*) skb->data;
1230 curBuffer = rcvList;
1231 tmpcount = 0;
1232 while ( tmpcount < rcvLen) {
1233 /* Get length and offset of current buffer */
1234 dataCount = get_uint16( ramBase+curBuffer+2);
1235 dataOffset = get_uint16( ramBase+curBuffer+4);
1236
1237 copy_from_pc( ptr + tmpcount,
1238 ramBase+curBuffer+dataOffset, dataCount);
1239
1240 tmpcount += dataCount;
1241
1242 /* Point to next buffer */
1243 curBuffer = get_uint16(ramBase + curBuffer);
1244 }
1245
1246 skb->protocol = eth_type_trans(skb,dev);
1247 /* Queue packet for network layer */
1248 netif_rx(skb);
1249
1250 dev->stats.rx_packets++;
1251 dev->stats.rx_bytes += rcvLen;
1252
1253 /* Got the packet, tell the adapter to skip it */
1254 wait_WOC(iobase);
1255 writeb(NETWAVE_CMD_SRP, ramBase + NETWAVE_EREG_CB + 0);
1256 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
1257 pr_debug("Packet reception ok\n");
1258 }
1259 return 0;
1260}
1261
1262static int netwave_open(struct net_device *dev) {
1263 netwave_private *priv = netdev_priv(dev);
1264 struct pcmcia_device *link = priv->p_dev;
1265
1266 dev_dbg(&link->dev, "netwave_open: starting.\n");
1267
1268 if (!pcmcia_dev_present(link))
1269 return -ENODEV;
1270
1271 link->open++;
1272
1273 netif_start_queue(dev);
1274 netwave_reset(dev);
1275
1276 return 0;
1277}
1278
1279static int netwave_close(struct net_device *dev) {
1280 netwave_private *priv = netdev_priv(dev);
1281 struct pcmcia_device *link = priv->p_dev;
1282
1283 dev_dbg(&link->dev, "netwave_close: finishing.\n");
1284
1285 link->open--;
1286 netif_stop_queue(dev);
1287
1288 return 0;
1289}
1290
1291static struct pcmcia_device_id netwave_ids[] = {
1292 PCMCIA_DEVICE_PROD_ID12("Xircom", "CreditCard Netwave", 0x2e3ee845, 0x54e28a28),
1293 PCMCIA_DEVICE_NULL,
1294};
1295MODULE_DEVICE_TABLE(pcmcia, netwave_ids);
1296
1297static struct pcmcia_driver netwave_driver = {
1298 .owner = THIS_MODULE,
1299 .drv = {
1300 .name = "netwave_cs",
1301 },
1302 .probe = netwave_probe,
1303 .remove = netwave_detach,
1304 .id_table = netwave_ids,
1305 .suspend = netwave_suspend,
1306 .resume = netwave_resume,
1307};
1308
1309static int __init init_netwave_cs(void)
1310{
1311 return pcmcia_register_driver(&netwave_driver);
1312}
1313
1314static void __exit exit_netwave_cs(void)
1315{
1316 pcmcia_unregister_driver(&netwave_driver);
1317}
1318
1319module_init(init_netwave_cs);
1320module_exit(exit_netwave_cs);
1321
1322/* Set or clear the multicast filter for this adaptor.
1323 num_addrs == -1 Promiscuous mode, receive all packets
1324 num_addrs == 0 Normal mode, clear multicast list
1325 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1326 best-effort filtering.
1327 */
1328static void set_multicast_list(struct net_device *dev)
1329{
1330 unsigned int iobase = dev->base_addr;
1331 netwave_private *priv = netdev_priv(dev);
1332 u_char __iomem * ramBase = priv->ramBase;
1333 u_char rcvMode = 0;
1334
1335#ifdef PCMCIA_DEBUG
1336 {
1337 xstatic int old;
1338 if (old != netdev_mc_count(dev)) {
1339 old = netdev_mc_count(dev);
1340 pr_debug("%s: setting Rx mode to %d addresses.\n",
1341 dev->name, netdev_mc_count(dev));
1342 }
1343 }
1344#endif
1345
1346 if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI)) {
1347 /* Multicast Mode */
1348 rcvMode = rxConfRxEna + rxConfAMP + rxConfBcast;
1349 } else if (dev->flags & IFF_PROMISC) {
1350 /* Promiscous mode */
1351 rcvMode = rxConfRxEna + rxConfPro + rxConfAMP + rxConfBcast;
1352 } else {
1353 /* Normal mode */
1354 rcvMode = rxConfRxEna + rxConfBcast;
1355 }
1356
1357 /* printk("netwave set_multicast_list: rcvMode to %x\n", rcvMode);*/
1358 /* Now set receive mode */
1359 wait_WOC(iobase);
1360 writeb(NETWAVE_CMD_SRC, ramBase + NETWAVE_EREG_CB + 0);
1361 writeb(rcvMode, ramBase + NETWAVE_EREG_CB + 1);
1362 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
1363}
1364MODULE_LICENSE("GPL");
diff --git a/drivers/staging/otus/80211core/cagg.c b/drivers/staging/otus/80211core/cagg.c
index f9514c06c14c..c3cef1a02aa4 100644
--- a/drivers/staging/otus/80211core/cagg.c
+++ b/drivers/staging/otus/80211core/cagg.c
@@ -2485,7 +2485,7 @@ void zfAggTxRetransmit(zdev_t* dev, struct bufInfo *buf_info, struct aggControl
2485 BAW->insert(dev, buf_info->buf, tid_tx->bar_ssn >> 4, aggControl->tid_baw, buf_info->baw_retransmit, &header_r); 2485 BAW->insert(dev, buf_info->buf, tid_tx->bar_ssn >> 4, aggControl->tid_baw, buf_info->baw_retransmit, &header_r);
2486 }*/ 2486 }*/
2487 2487
2488 if ((err = zfHpSend(dev, 2488 err = zfHpSend(dev,
2489 buf_info->baw_header->header, 2489 buf_info->baw_header->header,
2490 buf_info->baw_header->headerLen, 2490 buf_info->baw_header->headerLen,
2491 buf_info->baw_header->snap, 2491 buf_info->baw_header->snap,
@@ -2496,7 +2496,8 @@ void zfAggTxRetransmit(zdev_t* dev, struct bufInfo *buf_info, struct aggControl
2496 buf_info->baw_header->removeLen, 2496 buf_info->baw_header->removeLen,
2497 ZM_EXTERNAL_ALLOC_BUF, 2497 ZM_EXTERNAL_ALLOC_BUF,
2498 (u8_t)tid_tx->ac, 2498 (u8_t)tid_tx->ac,
2499 buf_info->baw_header->keyIdx)) != ZM_SUCCESS) 2499 buf_info->baw_header->keyIdx);
2500 if (err != ZM_SUCCESS)
2500 { 2501 {
2501 goto zlError; 2502 goto zlError;
2502 } 2503 }
@@ -2797,9 +2798,10 @@ u16_t zfAggTxSendEth(zdev_t* dev, zbuf_t* buf, u16_t port, u16_t bufType, u8_t f
2797 BAW->insert(dev, buf, tid_tx->bar_ssn >> 4, aggControl->tid_baw, 0, &header_r); 2798 BAW->insert(dev, buf, tid_tx->bar_ssn >> 4, aggControl->tid_baw, 0, &header_r);
2798 }*/ 2799 }*/
2799 2800
2800 if ((err = zfHpSend(dev, header, headerLen, snap, snapLen, 2801 err = zfHpSend(dev, header, headerLen, snap, snapLen,
2801 mic, micLen, frag.buf[i], removeLen, 2802 mic, micLen, frag.buf[i], removeLen,
2802 frag.bufType[i], zcUpToAc[up&0x7], keyIdx)) != ZM_SUCCESS) 2803 frag.bufType[i], zcUpToAc[up&0x7], keyIdx);
2804 if (err != ZM_SUCCESS)
2803 { 2805 {
2804 goto zlError; 2806 goto zlError;
2805 } 2807 }
@@ -2849,7 +2851,8 @@ u16_t zfAggSendAddbaRequest(zdev_t* dev, u16_t *dst, u16_t ac, u16_t up)
2849 /* 2851 /*
2850 * TBD : Maximum size of management frame 2852 * TBD : Maximum size of management frame
2851 */ 2853 */
2852 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 2854 buf = zfwBufAllocate(dev, 1024);
2855 if (buf == NULL)
2853 { 2856 {
2854 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!"); 2857 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!");
2855 return ZM_SUCCESS; 2858 return ZM_SUCCESS;
@@ -2892,8 +2895,9 @@ u16_t zfAggSendAddbaRequest(zdev_t* dev, u16_t *dst, u16_t ac, u16_t up)
2892 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data); 2895 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data);
2893 2896
2894 #if 0 2897 #if 0
2895 if ((err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0, 2898 err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0,
2896 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 2899 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
2900 if (err != ZM_SUCCESS)
2897 { 2901 {
2898 goto zlError; 2902 goto zlError;
2899 } 2903 }
@@ -3290,7 +3294,8 @@ u16_t zfAggSendAddbaResponse(zdev_t* dev, struct aggBaFrameParameter *bf)
3290 /* 3294 /*
3291 * TBD : Maximum size of management frame 3295 * TBD : Maximum size of management frame
3292 */ 3296 */
3293 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 3297 buf = zfwBufAllocate(dev, 1024);
3298 if (buf == NULL)
3294 { 3299 {
3295 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!"); 3300 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!");
3296 return ZM_SUCCESS; 3301 return ZM_SUCCESS;
@@ -3337,8 +3342,9 @@ u16_t zfAggSendAddbaResponse(zdev_t* dev, struct aggBaFrameParameter *bf)
3337 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data); 3342 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data);
3338 3343
3339 #if 0 3344 #if 0
3340 if ((err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0, 3345 err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0,
3341 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 3346 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
3347 if (err != ZM_SUCCESS)
3342 { 3348 {
3343 goto zlError; 3349 goto zlError;
3344 } 3350 }
@@ -3443,7 +3449,8 @@ u16_t zfAggSendBar(zdev_t* dev, TID_TX tid_tx, struct aggBarControl *aggBarCon
3443 /* 3449 /*
3444 * TBD : Maximum size of management frame 3450 * TBD : Maximum size of management frame
3445 */ 3451 */
3446 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 3452 buf = zfwBufAllocate(dev, 1024);
3453 if (buf == NULL)
3447 { 3454 {
3448 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!"); 3455 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!");
3449 return ZM_SUCCESS; 3456 return ZM_SUCCESS;
@@ -3486,8 +3493,9 @@ u16_t zfAggSendBar(zdev_t* dev, TID_TX tid_tx, struct aggBarControl *aggBarCon
3486 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data); 3493 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data);
3487 3494
3488 #if 0 3495 #if 0
3489 if ((err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0, 3496 err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0,
3490 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 3497 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
3498 if (err != ZM_SUCCESS)
3491 { 3499 {
3492 goto zlError; 3500 goto zlError;
3493 } 3501 }
diff --git a/drivers/staging/otus/80211core/ccmd.c b/drivers/staging/otus/80211core/ccmd.c
index 3e3d9b500f65..ab300df02014 100644
--- a/drivers/staging/otus/80211core/ccmd.c
+++ b/drivers/staging/otus/80211core/ccmd.c
@@ -1436,7 +1436,8 @@ u16_t zfiWlanDeauth(zdev_t *dev, u16_t *macAddr, u16_t reason)
1436 */ 1436 */
1437 1437
1438 /* 1438 /*
1439 if ((id = zfApFindSta(dev, macAddr)) != 0xffff) 1439 id = zfApFindSta(dev, macAddr);
1440 if (id != 0xffff)
1440 { 1441 {
1441 u32_t key[8]; 1442 u32_t key[8];
1442 u16_t nullAddr[3] = { 0x0, 0x0, 0x0 }; 1443 u16_t nullAddr[3] = { 0x0, 0x0, 0x0 };
diff --git a/drivers/staging/otus/80211core/cfunc.c b/drivers/staging/otus/80211core/cfunc.c
index e0a9f383c755..3b9341b13c02 100644
--- a/drivers/staging/otus/80211core/cfunc.c
+++ b/drivers/staging/otus/80211core/cfunc.c
@@ -1072,7 +1072,8 @@ u16_t zfFindCleanFrequency(zdev_t* dev, u32_t adhocMode)
1072 1072
1073 zmw_get_wlan_dev(dev); 1073 zmw_get_wlan_dev(dev);
1074 1074
1075 if ((pBssInfo = wd->sta.bssList.head) == NULL) 1075 pBssInfo = wd->sta.bssList.head;
1076 if (pBssInfo == NULL)
1076 { 1077 {
1077 if( adhocMode == ZM_ADHOCBAND_B || adhocMode == ZM_ADHOCBAND_G || 1078 if( adhocMode == ZM_ADHOCBAND_B || adhocMode == ZM_ADHOCBAND_G ||
1078 adhocMode == ZM_ADHOCBAND_BG || adhocMode == ZM_ADHOCBAND_ABG ) 1079 adhocMode == ZM_ADHOCBAND_BG || adhocMode == ZM_ADHOCBAND_ABG )
diff --git a/drivers/staging/otus/80211core/cic.c b/drivers/staging/otus/80211core/cic.c
index c84f079e3d84..53c09a0935fc 100644
--- a/drivers/staging/otus/80211core/cic.c
+++ b/drivers/staging/otus/80211core/cic.c
@@ -329,7 +329,8 @@ void zfCoreEvent(zdev_t* dev, u16_t event, u8_t* rsp)
329 if (wd->wlanMode == ZM_MODE_AP) 329 if (wd->wlanMode == ZM_MODE_AP)
330 { 330 {
331 zmw_enter_critical_section(dev); 331 zmw_enter_critical_section(dev);
332 if ((i=zfApFindSta(dev, (u16_t*)rsp)) != 0xffff) 332 i = zfApFindSta(dev, (u16_t*)rsp);
333 if (i != 0xffff)
333 { 334 {
334 zfRateCtrlTxFailEvent(dev, &wd->ap.staTable[i].rcCell, 0,(u32_t)zfPhyCtrlToRate(retryRate)); 335 zfRateCtrlTxFailEvent(dev, &wd->ap.staTable[i].rcCell, 0,(u32_t)zfPhyCtrlToRate(retryRate));
335 } 336 }
@@ -357,7 +358,8 @@ void zfCoreEvent(zdev_t* dev, u16_t event, u8_t* rsp)
357 if (wd->wlanMode == ZM_MODE_AP) 358 if (wd->wlanMode == ZM_MODE_AP)
358 { 359 {
359 zmw_enter_critical_section(dev); 360 zmw_enter_critical_section(dev);
360 if ((i=zfApFindSta(dev, (u16_t*)rsp)) != 0xffff) 361 i = zfApFindSta(dev, (u16_t*)rsp);
362 if (i != 0xffff)
361 { 363 {
362 zfRateCtrlTxFailEvent(dev, &wd->ap.staTable[i].rcCell, 0,(u32_t)zfPhyCtrlToRate(retryRate)); 364 zfRateCtrlTxFailEvent(dev, &wd->ap.staTable[i].rcCell, 0,(u32_t)zfPhyCtrlToRate(retryRate));
363 } 365 }
@@ -387,7 +389,8 @@ void zfCoreEvent(zdev_t* dev, u16_t event, u8_t* rsp)
387 if (wd->wlanMode == ZM_MODE_AP) 389 if (wd->wlanMode == ZM_MODE_AP)
388 { 390 {
389 zmw_enter_critical_section(dev); 391 zmw_enter_critical_section(dev);
390 if ((i=zfApFindSta(dev, (u16_t*)rsp)) != 0xffff) 392 i = zfApFindSta(dev, (u16_t*)rsp);
393 if (i != 0xffff)
391 { 394 {
392 zfRateCtrlTxSuccessEvent(dev, &wd->ap.staTable[i].rcCell, zfPhyCtrlToRate(retryRate)); 395 zfRateCtrlTxSuccessEvent(dev, &wd->ap.staTable[i].rcCell, zfPhyCtrlToRate(retryRate));
393 } 396 }
diff --git a/drivers/staging/otus/80211core/cinit.c b/drivers/staging/otus/80211core/cinit.c
index 5f853ce79309..11823311e9ce 100644
--- a/drivers/staging/otus/80211core/cinit.c
+++ b/drivers/staging/otus/80211core/cinit.c
@@ -622,7 +622,8 @@ u16_t zfTxGenWlanHeader(zdev_t* dev, zbuf_t* buf, u16_t* header, u16_t seq,
622 phyCtrl = 0xc0001; //PHY control L 622 phyCtrl = 0xc0001; //PHY control L
623 623
624 /* WDS port checking */ 624 /* WDS port checking */
625 if ((wdsPort = (port - 0x20)) >= ZM_MAX_WDS_SUPPORT) 625 wdsPort = port - 0x20;
626 if (wdsPort >= ZM_MAX_WDS_SUPPORT)
626 { 627 {
627 wdsPort = 0; 628 wdsPort = 0;
628 } 629 }
diff --git a/drivers/staging/otus/80211core/cmm.c b/drivers/staging/otus/80211core/cmm.c
index 484e753df358..007ef3b606a5 100644
--- a/drivers/staging/otus/80211core/cmm.c
+++ b/drivers/staging/otus/80211core/cmm.c
@@ -83,7 +83,8 @@ u16_t zfFindElement(zdev_t* dev, zbuf_t* buf, u8_t eid)
83 83
84 /* Get offset of first element */ 84 /* Get offset of first element */
85 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 85 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
86 if ((offset = zgElementOffsetTable[subType]) == 0xff) 86 offset = zgElementOffsetTable[subType];
87 if (offset == 0xff)
87 { 88 {
88 zm_assert(0); 89 zm_assert(0);
89 } 90 }
@@ -107,10 +108,12 @@ u16_t zfFindElement(zdev_t* dev, zbuf_t* buf, u8_t eid)
107 while ((offset+2)<bufLen) // including element ID and length (2bytes) 108 while ((offset+2)<bufLen) // including element ID and length (2bytes)
108 { 109 {
109 /* Search target element */ 110 /* Search target element */
110 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == eid) 111 id = zmw_rx_buf_readb(dev, buf, offset);
112 if (id == eid)
111 { 113 {
112 /* Bingo */ 114 /* Bingo */
113 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 115 elen = zmw_rx_buf_readb(dev, buf, offset+1);
116 if (elen > bufLen - offset)
114 { 117 {
115 /* Element length error */ 118 /* Element length error */
116 return 0xffff; 119 return 0xffff;
@@ -151,7 +154,8 @@ u16_t zfFindElement(zdev_t* dev, zbuf_t* buf, u8_t eid)
151 #if 1 154 #if 1
152 elen = zmw_rx_buf_readb(dev, buf, offset+1); 155 elen = zmw_rx_buf_readb(dev, buf, offset+1);
153 #else 156 #else
154 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 157 elen = zmw_rx_buf_readb(dev, buf, offset+1);
158 if (elen == 0)
155 { 159 {
156 return 0xffff; 160 return 0xffff;
157 } 161 }
@@ -194,7 +198,8 @@ u16_t zfFindWifiElement(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
194 /* Get offset of first element */ 198 /* Get offset of first element */
195 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 199 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
196 200
197 if ((offset = zgElementOffsetTable[subType]) == 0xff) 201 offset = zgElementOffsetTable[subType];
202 if (offset == 0xff)
198 { 203 {
199 zm_assert(0); 204 zm_assert(0);
200 } 205 }
@@ -207,10 +212,12 @@ u16_t zfFindWifiElement(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
207 while ((offset+2)<bufLen) // including element ID and length (2bytes) 212 while ((offset+2)<bufLen) // including element ID and length (2bytes)
208 { 213 {
209 /* Search target element */ 214 /* Search target element */
210 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == ZM_WLAN_EID_WIFI_IE) 215 id = zmw_rx_buf_readb(dev, buf, offset);
216 if (id == ZM_WLAN_EID_WIFI_IE)
211 { 217 {
212 /* Bingo */ 218 /* Bingo */
213 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 219 elen = zmw_rx_buf_readb(dev, buf, offset+1);
220 if (elen > bufLen - offset)
214 { 221 {
215 /* Element length error */ 222 /* Element length error */
216 return 0xffff; 223 return 0xffff;
@@ -229,7 +236,8 @@ u16_t zfFindWifiElement(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
229 { 236 {
230 if ( subtype != 0xff ) 237 if ( subtype != 0xff )
231 { 238 {
232 if ( (tmp = zmw_rx_buf_readb(dev, buf, offset+6)) == subtype ) 239 tmp = zmw_rx_buf_readb(dev, buf, offset+6);
240 if (tmp == subtype)
233 { 241 {
234 return offset; 242 return offset;
235 } 243 }
@@ -241,7 +249,8 @@ u16_t zfFindWifiElement(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
241 } 249 }
242 } 250 }
243 /* Advance to next element */ 251 /* Advance to next element */
244 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 252 elen = zmw_rx_buf_readb(dev, buf, offset+1);
253 if (elen == 0)
245 { 254 {
246 return 0xffff; 255 return 0xffff;
247 } 256 }
@@ -348,7 +357,8 @@ u16_t zfFindSuperGElement(zdev_t* dev, zbuf_t* buf, u8_t type)
348 357
349 /* Get offset of first element */ 358 /* Get offset of first element */
350 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 359 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
351 if ((offset = zgElementOffsetTable[subType]) == 0xff) 360 offset = zgElementOffsetTable[subType];
361 if (offset == 0xff)
352 { 362 {
353 zm_assert(0); 363 zm_assert(0);
354 } 364 }
@@ -361,10 +371,12 @@ u16_t zfFindSuperGElement(zdev_t* dev, zbuf_t* buf, u8_t type)
361 while ((offset+2)<bufLen) // including element ID and length (2bytes) 371 while ((offset+2)<bufLen) // including element ID and length (2bytes)
362 { 372 {
363 /* Search target element */ 373 /* Search target element */
364 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == ZM_WLAN_EID_VENDOR_PRIVATE) 374 id = zmw_rx_buf_readb(dev, buf, offset);
375 if (id == ZM_WLAN_EID_VENDOR_PRIVATE)
365 { 376 {
366 /* Bingo */ 377 /* Bingo */
367 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 378 elen = zmw_rx_buf_readb(dev, buf, offset+1);
379 if (elen > bufLen - offset)
368 { 380 {
369 /* Element length error */ 381 /* Element length error */
370 return 0xffff; 382 return 0xffff;
@@ -389,7 +401,8 @@ u16_t zfFindSuperGElement(zdev_t* dev, zbuf_t* buf, u8_t type)
389 #if 1 401 #if 1
390 elen = zmw_rx_buf_readb(dev, buf, offset+1); 402 elen = zmw_rx_buf_readb(dev, buf, offset+1);
391 #else 403 #else
392 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 404 elen = zmw_rx_buf_readb(dev, buf, offset+1);
405 if (elen == 0)
393 { 406 {
394 return 0xffff; 407 return 0xffff;
395 } 408 }
@@ -411,7 +424,8 @@ u16_t zfFindXRElement(zdev_t* dev, zbuf_t* buf, u8_t type)
411 424
412 /* Get offset of first element */ 425 /* Get offset of first element */
413 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 426 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
414 if ((offset = zgElementOffsetTable[subType]) == 0xff) 427 offset = zgElementOffsetTable[subType];
428 if (offset == 0xff)
415 { 429 {
416 zm_assert(0); 430 zm_assert(0);
417 } 431 }
@@ -424,10 +438,12 @@ u16_t zfFindXRElement(zdev_t* dev, zbuf_t* buf, u8_t type)
424 while ((offset+2)<bufLen) // including element ID and length (2bytes) 438 while ((offset+2)<bufLen) // including element ID and length (2bytes)
425 { 439 {
426 /* Search target element */ 440 /* Search target element */
427 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == ZM_WLAN_EID_VENDOR_PRIVATE) 441 id = zmw_rx_buf_readb(dev, buf, offset);
442 if (id == ZM_WLAN_EID_VENDOR_PRIVATE)
428 { 443 {
429 /* Bingo */ 444 /* Bingo */
430 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 445 elen = zmw_rx_buf_readb(dev, buf, offset+1);
446 if (elen > bufLen - offset)
431 { 447 {
432 /* Element length error */ 448 /* Element length error */
433 return 0xffff; 449 return 0xffff;
@@ -447,7 +463,8 @@ u16_t zfFindXRElement(zdev_t* dev, zbuf_t* buf, u8_t type)
447 #if 1 463 #if 1
448 elen = zmw_rx_buf_readb(dev, buf, offset+1); 464 elen = zmw_rx_buf_readb(dev, buf, offset+1);
449 #else 465 #else
450 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 466 elen = zmw_rx_buf_readb(dev, buf, offset+1);
467 if (elen == 0)
451 { 468 {
452 return 0xffff; 469 return 0xffff;
453 } 470 }
@@ -868,7 +885,8 @@ void zfSendMmFrame(zdev_t* dev, u8_t frameType, u16_t* dst,
868 885
869 zm_msg2_mm(ZM_LV_2, "Send mm frame, type=", frameType); 886 zm_msg2_mm(ZM_LV_2, "Send mm frame, type=", frameType);
870 /* TBD : Maximum size of management frame */ 887 /* TBD : Maximum size of management frame */
871 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 888 buf = zfwBufAllocate(dev, 1024);
889 if (buf == NULL)
872 { 890 {
873 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!"); 891 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!");
874 return; 892 return;
@@ -1257,7 +1275,8 @@ void zfSendMmFrame(zdev_t* dev, u8_t frameType, u16_t* dst,
1257 { 1275 {
1258 vap = (u16_t) p3; 1276 vap = (u16_t) p3;
1259 1277
1260 if ((aid = zfApFindSta(dev, dst)) != 0xffff) 1278 aid = zfApFindSta(dev, dst);
1279 if (aid != 0xffff)
1261 { 1280 {
1262 zmw_enter_critical_section(dev); 1281 zmw_enter_critical_section(dev);
1263 /* Clear STA table */ 1282 /* Clear STA table */
@@ -1303,8 +1322,9 @@ void zfSendMmFrame(zdev_t* dev, u8_t frameType, u16_t* dst,
1303 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data); 1322 //zm_msg2_mm(ZM_LV_2, "buf->data=", buf->data);
1304 1323
1305 #if 0 1324 #if 0
1306 if ((err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0, 1325 err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0,
1307 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 1326 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
1327 if (err != ZM_SUCCESS)
1308 { 1328 {
1309 goto zlError; 1329 goto zlError;
1310 } 1330 }
@@ -1366,7 +1386,8 @@ void zfProcessManagement(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* AddInf
1366 if ((ra[0] & 0x1) != 1) 1386 if ((ra[0] & 0x1) != 1)
1367 { 1387 {
1368 /* AP : Find virtual AP */ 1388 /* AP : Find virtual AP */
1369 if ((index = zfApFindSta(dev, ta)) != 0xffff) 1389 index = zfApFindSta(dev, ta);
1390 if (index != 0xffff)
1370 { 1391 {
1371 vap = wd->ap.staTable[index].vap; 1392 vap = wd->ap.staTable[index].vap;
1372 } 1393 }
@@ -1534,7 +1555,8 @@ void zfProcessProbeReq(zdev_t* dev, zbuf_t* buf, u16_t* src)
1534 } 1555 }
1535 1556
1536 /* check SSID */ 1557 /* check SSID */
1537 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID)) == 0xffff) 1558 offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID);
1559 if (offset == 0xffff)
1538 { 1560 {
1539 zm_msg0_mm(ZM_LV_3, "probe req SSID not found"); 1561 zm_msg0_mm(ZM_LV_3, "probe req SSID not found");
1540 return; 1562 return;
@@ -1561,8 +1583,8 @@ void zfProcessProbeReq(zdev_t* dev, zbuf_t* buf, u16_t* src)
1561 { 1583 {
1562 for (j=0; j<len; j++) 1584 for (j=0; j<len; j++)
1563 { 1585 {
1564 if ((ch = zmw_rx_buf_readb(dev, buf, offset+2+j)) 1586 ch = zmw_rx_buf_readb(dev, buf, offset+2+j);
1565 != wd->ap.ssid[i][j]) 1587 if (ch != wd->ap.ssid[i][j])
1566 { 1588 {
1567 break; 1589 break;
1568 } 1590 }
@@ -1814,7 +1836,8 @@ u16_t zfFindATHExtCap(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
1814 /* Get offset of first element */ 1836 /* Get offset of first element */
1815 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 1837 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
1816 1838
1817 if ((offset = zgElementOffsetTable[subType]) == 0xff) 1839 offset = zgElementOffsetTable[subType];
1840 if (offset == 0xff)
1818 { 1841 {
1819 zm_assert(0); 1842 zm_assert(0);
1820 } 1843 }
@@ -1828,10 +1851,12 @@ u16_t zfFindATHExtCap(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
1828 while ((offset+2)<bufLen) // including element ID and length (2bytes) 1851 while ((offset+2)<bufLen) // including element ID and length (2bytes)
1829 { 1852 {
1830 /* Search target element */ 1853 /* Search target element */
1831 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == ZM_WLAN_EID_WIFI_IE) 1854 id = zmw_rx_buf_readb(dev, buf, offset);
1855 if (id == ZM_WLAN_EID_WIFI_IE)
1832 { 1856 {
1833 /* Bingo */ 1857 /* Bingo */
1834 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 1858 elen = zmw_rx_buf_readb(dev, buf, offset+1);
1859 if (elen > bufLen - offset)
1835 { 1860 {
1836 /* Element length error */ 1861 /* Element length error */
1837 return 0xffff; 1862 return 0xffff;
@@ -1850,7 +1875,8 @@ u16_t zfFindATHExtCap(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
1850 { 1875 {
1851 if ( subtype != 0xff ) 1876 if ( subtype != 0xff )
1852 { 1877 {
1853 if ( (tmp = zmw_rx_buf_readb(dev, buf, offset+6)) == subtype ) 1878 tmp = zmw_rx_buf_readb(dev, buf, offset+6);
1879 if (tmp == subtype )
1854 { 1880 {
1855 return offset; 1881 return offset;
1856 } 1882 }
@@ -1863,7 +1889,8 @@ u16_t zfFindATHExtCap(zdev_t* dev, zbuf_t* buf, u8_t type, u8_t subtype)
1863 } 1889 }
1864 1890
1865 /* Advance to next element */ 1891 /* Advance to next element */
1866 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 1892 elen = zmw_rx_buf_readb(dev, buf, offset+1);
1893 if (elen == 0)
1867 { 1894 {
1868 return 0xffff; 1895 return 0xffff;
1869 } 1896 }
@@ -1884,7 +1911,8 @@ u16_t zfFindBrdcmMrvlRlnkExtCap(zdev_t* dev, zbuf_t* buf)
1884 /* Get offset of first element */ 1911 /* Get offset of first element */
1885 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 1912 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
1886 1913
1887 if ((offset = zgElementOffsetTable[subType]) == 0xff) 1914 offset = zgElementOffsetTable[subType];
1915 if (offset == 0xff)
1888 { 1916 {
1889 zm_assert(0); 1917 zm_assert(0);
1890 } 1918 }
@@ -1898,10 +1926,12 @@ u16_t zfFindBrdcmMrvlRlnkExtCap(zdev_t* dev, zbuf_t* buf)
1898 while ((offset+2)<bufLen) // including element ID and length (2bytes) 1926 while ((offset+2)<bufLen) // including element ID and length (2bytes)
1899 { 1927 {
1900 /* Search target element */ 1928 /* Search target element */
1901 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == ZM_WLAN_EID_WIFI_IE) 1929 id = zmw_rx_buf_readb(dev, buf, offset);
1930 if (id == ZM_WLAN_EID_WIFI_IE)
1902 { 1931 {
1903 /* Bingo */ 1932 /* Bingo */
1904 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 1933 elen = zmw_rx_buf_readb(dev, buf, offset+1);
1934 if (elen > bufLen - offset)
1905 { 1935 {
1906 /* Element length error */ 1936 /* Element length error */
1907 return 0xffff; 1937 return 0xffff;
@@ -1930,7 +1960,8 @@ u16_t zfFindBrdcmMrvlRlnkExtCap(zdev_t* dev, zbuf_t* buf)
1930 else if ((id = zmw_rx_buf_readb(dev, buf, offset)) == 0x7F) 1960 else if ((id = zmw_rx_buf_readb(dev, buf, offset)) == 0x7F)
1931 { 1961 {
1932 /* Bingo */ 1962 /* Bingo */
1933 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 1963 elen = zmw_rx_buf_readb(dev, buf, offset+1);
1964 if (elen > bufLen - offset)
1934 { 1965 {
1935 /* Element length error */ 1966 /* Element length error */
1936 return 0xffff; 1967 return 0xffff;
@@ -1941,7 +1972,8 @@ u16_t zfFindBrdcmMrvlRlnkExtCap(zdev_t* dev, zbuf_t* buf)
1941 return 0xffff; 1972 return 0xffff;
1942 } 1973 }
1943 1974
1944 if ((tmp = zmw_rx_buf_readb(dev, buf, offset+2)) == 0x01) 1975 tmp = zmw_rx_buf_readb(dev, buf, offset+2);
1976 if (tmp == 0x01)
1945 1977
1946 { 1978 {
1947 return offset; 1979 return offset;
@@ -1949,7 +1981,8 @@ u16_t zfFindBrdcmMrvlRlnkExtCap(zdev_t* dev, zbuf_t* buf)
1949 } 1981 }
1950 1982
1951 /* Advance to next element */ 1983 /* Advance to next element */
1952 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 1984 elen = zmw_rx_buf_readb(dev, buf, offset+1);
1985 if (elen == 0)
1953 { 1986 {
1954 return 0xffff; 1987 return 0xffff;
1955 } 1988 }
@@ -1970,7 +2003,8 @@ u16_t zfFindMarvelExtCap(zdev_t* dev, zbuf_t* buf)
1970 /* Get offset of first element */ 2003 /* Get offset of first element */
1971 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 2004 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
1972 2005
1973 if ((offset = zgElementOffsetTable[subType]) == 0xff) 2006 offset = zgElementOffsetTable[subType];
2007 if (offset == 0xff)
1974 { 2008 {
1975 zm_assert(0); 2009 zm_assert(0);
1976 } 2010 }
@@ -1984,10 +2018,12 @@ u16_t zfFindMarvelExtCap(zdev_t* dev, zbuf_t* buf)
1984 while ((offset+2)<bufLen) // including element ID and length (2bytes) 2018 while ((offset+2)<bufLen) // including element ID and length (2bytes)
1985 { 2019 {
1986 /* Search target element */ 2020 /* Search target element */
1987 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == ZM_WLAN_EID_WIFI_IE) 2021 id = zmw_rx_buf_readb(dev, buf, offset);
2022 if (id == ZM_WLAN_EID_WIFI_IE)
1988 { 2023 {
1989 /* Bingo */ 2024 /* Bingo */
1990 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1))>(bufLen - offset)) 2025 elen = zmw_rx_buf_readb(dev, buf, offset+1);
2026 if (elen>(bufLen - offset))
1991 { 2027 {
1992 /* Element length error */ 2028 /* Element length error */
1993 return 0xffff; 2029 return 0xffff;
@@ -2008,7 +2044,8 @@ u16_t zfFindMarvelExtCap(zdev_t* dev, zbuf_t* buf)
2008 } 2044 }
2009 2045
2010 /* Advance to next element */ 2046 /* Advance to next element */
2011 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 2047 elen = zmw_rx_buf_readb(dev, buf, offset+1);
2048 if (elen == 0)
2012 { 2049 {
2013 return 0xffff; 2050 return 0xffff;
2014 } 2051 }
@@ -2029,7 +2066,8 @@ u16_t zfFindBroadcomExtCap(zdev_t* dev, zbuf_t* buf)
2029 /* Get offset of first element */ 2066 /* Get offset of first element */
2030 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 2067 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
2031 2068
2032 if ((offset = zgElementOffsetTable[subType]) == 0xff) 2069 offset = zgElementOffsetTable[subType];
2070 if (offset == 0xff)
2033 { 2071 {
2034 zm_assert(0); 2072 zm_assert(0);
2035 } 2073 }
@@ -2043,10 +2081,12 @@ u16_t zfFindBroadcomExtCap(zdev_t* dev, zbuf_t* buf)
2043 while((offset+2) < bufLen) // including element ID and length (2bytes) 2081 while((offset+2) < bufLen) // including element ID and length (2bytes)
2044 { 2082 {
2045 /* Search target element */ 2083 /* Search target element */
2046 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == ZM_WLAN_EID_WIFI_IE) 2084 id = zmw_rx_buf_readb(dev, buf, offset);
2085 if (id == ZM_WLAN_EID_WIFI_IE)
2047 { 2086 {
2048 /* Bingo */ 2087 /* Bingo */
2049 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) > (bufLen - offset)) 2088 elen = zmw_rx_buf_readb(dev, buf, offset+1);
2089 if (elen > (bufLen - offset))
2050 { 2090 {
2051 /* Element length error */ 2091 /* Element length error */
2052 return 0xffff; 2092 return 0xffff;
@@ -2066,7 +2106,8 @@ u16_t zfFindBroadcomExtCap(zdev_t* dev, zbuf_t* buf)
2066 } 2106 }
2067 2107
2068 /* Advance to next element */ 2108 /* Advance to next element */
2069 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 2109 elen = zmw_rx_buf_readb(dev, buf, offset+1);
2110 if (elen == 0)
2070 { 2111 {
2071 return 0xffff; 2112 return 0xffff;
2072 } 2113 }
@@ -2089,7 +2130,8 @@ u16_t zfFindRlnkExtCap(zdev_t* dev, zbuf_t* buf)
2089 /* Get offset of first element */ 2130 /* Get offset of first element */
2090 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4); 2131 subType = (zmw_rx_buf_readb(dev, buf, 0) >> 4);
2091 2132
2092 if ((offset = zgElementOffsetTable[subType]) == 0xff) 2133 offset = zgElementOffsetTable[subType];
2134 if (offset == 0xff)
2093 { 2135 {
2094 zm_assert(0); 2136 zm_assert(0);
2095 } 2137 }
@@ -2103,10 +2145,12 @@ u16_t zfFindRlnkExtCap(zdev_t* dev, zbuf_t* buf)
2103 while((offset+2) < bufLen) // including element ID and length (2bytes) 2145 while((offset+2) < bufLen) // including element ID and length (2bytes)
2104 { 2146 {
2105 /* Search target element */ 2147 /* Search target element */
2106 if ((id = zmw_rx_buf_readb(dev, buf, offset)) == 0x7F) 2148 id = zmw_rx_buf_readb(dev, buf, offset);
2149 if (id == 0x7F)
2107 { 2150 {
2108 /* Bingo */ 2151 /* Bingo */
2109 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) > (bufLen - offset)) 2152 elen = zmw_rx_buf_readb(dev, buf, offset+1);
2153 if (elen > bufLen - offset)
2110 { 2154 {
2111 /* Element length error */ 2155 /* Element length error */
2112 return 0xffff; 2156 return 0xffff;
@@ -2117,7 +2161,8 @@ u16_t zfFindRlnkExtCap(zdev_t* dev, zbuf_t* buf)
2117 return 0xffff; 2161 return 0xffff;
2118 } 2162 }
2119 2163
2120 if ((tmp = zmw_rx_buf_readb(dev, buf, offset+2)) == 0x01) 2164 tmp = zmw_rx_buf_readb(dev, buf, offset+2);
2165 if (tmp == 0x01)
2121 2166
2122 { 2167 {
2123 return offset; 2168 return offset;
@@ -2125,7 +2170,8 @@ u16_t zfFindRlnkExtCap(zdev_t* dev, zbuf_t* buf)
2125 } 2170 }
2126 2171
2127 /* Advance to next element */ 2172 /* Advance to next element */
2128 if ((elen = zmw_rx_buf_readb(dev, buf, offset+1)) == 0) 2173 elen = zmw_rx_buf_readb(dev, buf, offset+1);
2174 if (elen == 0)
2129 { 2175 {
2130 return 0xffff; 2176 return 0xffff;
2131 } 2177 }
diff --git a/drivers/staging/otus/80211core/cmmap.c b/drivers/staging/otus/80211core/cmmap.c
index 7f09fded459e..8ec3830e8439 100644
--- a/drivers/staging/otus/80211core/cmmap.c
+++ b/drivers/staging/otus/80211core/cmmap.c
@@ -141,7 +141,8 @@ u16_t zfApGetSTAInfo(zdev_t* dev, u16_t* addr, u16_t* state, u8_t* vap)
141 141
142 zmw_enter_critical_section(dev); 142 zmw_enter_critical_section(dev);
143 143
144 if ((id = zfApFindSta(dev, addr)) != 0xffff) 144 id = zfApFindSta(dev, addr);
145 if (id != 0xffff)
145 { 146 {
146 *vap = wd->ap.staTable[id].vap; 147 *vap = wd->ap.staTable[id].vap;
147 *state = wd->ap.staTable[id++].state; 148 *state = wd->ap.staTable[id++].state;
@@ -163,7 +164,8 @@ void zfApGetStaQosType(zdev_t* dev, u16_t* addr, u8_t* qosType)
163 164
164 zmw_enter_critical_section(dev); 165 zmw_enter_critical_section(dev);
165 166
166 if ((id = zfApFindSta(dev, addr)) != 0xffff) 167 id = zfApFindSta(dev, addr);
168 if (id != 0xffff)
167 { 169 {
168 *qosType = wd->ap.staTable[id].qosType; 170 *qosType = wd->ap.staTable[id].qosType;
169 } 171 }
@@ -189,7 +191,8 @@ void zfApGetStaTxRateAndQosType(zdev_t* dev, u16_t* addr, u32_t* phyCtrl,
189 191
190 zmw_enter_critical_section(dev); 192 zmw_enter_critical_section(dev);
191 193
192 if ((id = zfApFindSta(dev, addr)) != 0xffff) 194 id = zfApFindSta(dev, addr);
195 if (id != 0xffff)
193 { 196 {
194 rate = (u8_t)zfRateCtrlGetTxRate(dev, &wd->ap.staTable[id].rcCell, rcProbingFlag); 197 rate = (u8_t)zfRateCtrlGetTxRate(dev, &wd->ap.staTable[id].rcCell, rcProbingFlag);
195#ifdef ZM_AP_DEBUG 198#ifdef ZM_AP_DEBUG
@@ -234,7 +237,8 @@ void zfApGetStaEncryType(zdev_t* dev, u16_t* addr, u8_t* encryType)
234 237
235 zmw_enter_critical_section(dev); 238 zmw_enter_critical_section(dev);
236 239
237 if ((id = zfApFindSta(dev, addr)) != 0xffff) 240 id = zfApFindSta(dev, addr);
241 if (id != 0xffff)
238 { 242 {
239 *encryType = wd->ap.staTable[id].encryMode; 243 *encryType = wd->ap.staTable[id].encryMode;
240 } 244 }
@@ -260,7 +264,8 @@ void zfApGetStaWpaIv(zdev_t* dev, u16_t* addr, u16_t* iv16, u32_t* iv32)
260 264
261 zmw_enter_critical_section(dev); 265 zmw_enter_critical_section(dev);
262 266
263 if ((id = zfApFindSta(dev, addr)) != 0xffff) 267 id = zfApFindSta(dev, addr);
268 if (id != 0xffff)
264 { 269 {
265 *iv16 = wd->ap.staTable[id].iv16; 270 *iv16 = wd->ap.staTable[id].iv16;
266 *iv32 = wd->ap.staTable[id].iv32; 271 *iv32 = wd->ap.staTable[id].iv32;
@@ -289,7 +294,8 @@ void zfApSetStaWpaIv(zdev_t* dev, u16_t* addr, u16_t iv16, u32_t iv32)
289 294
290 zmw_enter_critical_section(dev); 295 zmw_enter_critical_section(dev);
291 296
292 if ((id = zfApFindSta(dev, addr)) != 0xffff) 297 id = zfApFindSta(dev, addr);
298 if (id != 0xffff)
293 { 299 {
294 wd->ap.staTable[id].iv16 = iv16; 300 wd->ap.staTable[id].iv16 = iv16;
295 wd->ap.staTable[id].iv32 = iv32; 301 wd->ap.staTable[id].iv32 = iv32;
@@ -321,7 +327,8 @@ void zfApClearStaKey(zdev_t* dev, u16_t* addr)
321 327
322 zmw_enter_critical_section(dev); 328 zmw_enter_critical_section(dev);
323 329
324 if ((id = zfApFindSta(dev, addr)) != 0xffff) 330 id = zfApFindSta(dev, addr);
331 if (id != 0xffff)
325 { 332 {
326 /* Turn off STA's key information */ 333 /* Turn off STA's key information */
327 zfHpRemoveKey(dev, id+1); 334 zfHpRemoveKey(dev, id+1);
@@ -348,7 +355,8 @@ void zfApGetStaCencIvAndKeyIdx(zdev_t* dev, u16_t* addr, u32_t *iv, u8_t *keyIdx
348 355
349 zmw_enter_critical_section(dev); 356 zmw_enter_critical_section(dev);
350 357
351 if ((id = zfApFindSta(dev, addr)) != 0xffff) 358 id = zfApFindSta(dev, addr);
359 if (id != 0xffff)
352 { 360 {
353 *iv++ = wd->ap.staTable[id].txiv[0]; 361 *iv++ = wd->ap.staTable[id].txiv[0];
354 *iv++ = wd->ap.staTable[id].txiv[1]; 362 *iv++ = wd->ap.staTable[id].txiv[1];
@@ -379,7 +387,8 @@ void zfApSetStaCencIv(zdev_t* dev, u16_t* addr, u32_t *iv)
379 387
380 zmw_enter_critical_section(dev); 388 zmw_enter_critical_section(dev);
381 389
382 if ((id = zfApFindSta(dev, addr)) != 0xffff) 390 id = zfApFindSta(dev, addr);
391 if (id != 0xffff)
383 { 392 {
384 wd->ap.staTable[id].txiv[0] = *iv++; 393 wd->ap.staTable[id].txiv[0] = *iv++;
385 wd->ap.staTable[id].txiv[1] = *iv++; 394 wd->ap.staTable[id].txiv[1] = *iv++;
@@ -539,7 +548,8 @@ u16_t zfApBufferPsFrame(zdev_t* dev, zbuf_t* buf, u16_t port)
539 { 548 {
540 zmw_enter_critical_section(dev); 549 zmw_enter_critical_section(dev);
541 550
542 if ((id = zfApFindSta(dev, addr)) != 0xffff) 551 id = zfApFindSta(dev, addr);
552 if (id != 0xffff)
543 { 553 {
544 if (wd->ap.staTable[id].psMode == 1) 554 if (wd->ap.staTable[id].psMode == 1)
545 { 555 {
@@ -603,7 +613,8 @@ u16_t zfApGetSTAInfoAndUpdatePs(zdev_t* dev, u16_t* addr, u16_t* state,
603 //psMode=0; 613 //psMode=0;
604#endif 614#endif
605 615
606 if ((id = zfApFindSta(dev, addr)) != 0xffff) 616 id = zfApFindSta(dev, addr);
617 if (id != 0xffff)
607 { 618 {
608 if (psMode != 0) 619 if (psMode != 0)
609 { 620 {
@@ -648,7 +659,8 @@ u16_t zfApGetSTAInfoAndUpdatePs(zdev_t* dev, u16_t* addr, u16_t* state,
648 659
649 while (1) 660 while (1)
650 { 661 {
651 if ((psBuf = zfQueueGetWithMac(dev, wd->ap.uapsdQ, (u8_t*)addr, &mb)) != NULL) 662 psBuf = zfQueueGetWithMac(dev, wd->ap.uapsdQ, (u8_t*)addr, &mb);
663 if (psBuf != NULL)
652 { 664 {
653 zfTxSendEth(dev, psBuf, 0, ZM_EXTERNAL_ALLOC_BUF, 0); 665 zfTxSendEth(dev, psBuf, 0, ZM_EXTERNAL_ALLOC_BUF, 0);
654 } 666 }
@@ -730,7 +742,8 @@ u16_t zfApAddSta(zdev_t* dev, u16_t* addr, u16_t state, u16_t apId, u8_t type,
730 742
731 zmw_enter_critical_section(dev); 743 zmw_enter_critical_section(dev);
732 744
733 if ((index = zfApFindSta(dev, addr)) != 0xffff) 745 index = zfApFindSta(dev, addr);
746 if (index != 0xffff)
734 { 747 {
735 zm_msg0_mm(ZM_LV_2, "found"); 748 zm_msg0_mm(ZM_LV_2, "found");
736 /* Update STA state */ 749 /* Update STA state */
@@ -963,7 +976,8 @@ void zfApProcessBeacon(zdev_t* dev, zbuf_t* buf)
963 zm_msg0_mm(ZM_LV_3, "Rx beacon"); 976 zm_msg0_mm(ZM_LV_3, "Rx beacon");
964 977
965 /* update Non-ERP flag(wd->ap.nonErpObss) */ 978 /* update Non-ERP flag(wd->ap.nonErpObss) */
966 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_ERP)) == 0xffff) 979 offset = zfFindElement(dev, buf, ZM_WLAN_EID_ERP);
980 if (offset == 0xffff)
967 { 981 {
968 /* 11b OBSS */ 982 /* 11b OBSS */
969 wd->ap.protectedObss++; 983 wd->ap.protectedObss++;
@@ -1046,7 +1060,8 @@ void zfApProcessAuth(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1046 if (seq == 1) 1060 if (seq == 1)
1047 { 1061 {
1048 /* AP : update STA to auth */ 1062 /* AP : update STA to auth */
1049 if ((ret = zfApAddSta(dev, src, ZM_STATE_AUTH, apId, 0, 0, 0)) != 0xffff) 1063 ret = zfApAddSta(dev, src, ZM_STATE_AUTH, apId, 0, 0, 0);
1064 if (ret != 0xffff)
1050 { 1065 {
1051 /* AP : call zfwAuthNotify() for host to judge */ 1066 /* AP : call zfwAuthNotify() for host to judge */
1052 //zfwAuthNotify(dev, src); 1067 //zfwAuthNotify(dev, src);
@@ -1177,12 +1192,14 @@ void zfApProcessAsocReq(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1177 1192
1178 zmw_get_wlan_dev(dev); 1193 zmw_get_wlan_dev(dev);
1179 /* AP : check SSID */ 1194 /* AP : check SSID */
1180 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID)) != 0xffff) 1195 offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID);
1196 if (offset != 0xffff)
1181 { 1197 {
1182 k = 0; 1198 k = 0;
1183 for (j = 0; j < wd->ap.vapNumber; j++) 1199 for (j = 0; j < wd->ap.vapNumber; j++)
1184 { 1200 {
1185 if ((tmp = zmw_buf_readb(dev, buf, offset+1)) 1201 tmp = zmw_buf_readb(dev, buf, offset+1);
1202 if (tmp
1186 != wd->ap.ssidLen[j]) 1203 != wd->ap.ssidLen[j])
1187 { 1204 {
1188 k++; 1205 k++;
@@ -1198,7 +1215,8 @@ void zfApProcessAsocReq(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1198 { 1215 {
1199 for (i=0; i<wd->ap.ssidLen[j]; i++) 1216 for (i=0; i<wd->ap.ssidLen[j]; i++)
1200 { 1217 {
1201 if ((tmp = zmw_buf_readb(dev, buf, offset+2+i)) 1218 tmp = zmw_buf_readb(dev, buf, offset+2+i);
1219 if (tmp
1202 != wd->ap.ssid[j][i]) 1220 != wd->ap.ssid[j][i])
1203 { 1221 {
1204 break; 1222 break;
@@ -1222,13 +1240,15 @@ void zfApProcessAsocReq(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1222 /* TODO : check capability */ 1240 /* TODO : check capability */
1223 1241
1224 /* AP : check support rate */ 1242 /* AP : check support rate */
1225 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_RATE)) != 0xffff) 1243 offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_RATE);
1244 if (offset != 0xffff)
1226 { 1245 {
1227 /* 11g STA */ 1246 /* 11g STA */
1228 staType = 1; 1247 staType = 1;
1229 } 1248 }
1230 //CWYang(+) 1249 //CWYang(+)
1231 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY)) != 0xffff) 1250 offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY);
1251 if (offset != 0xffff)
1232 { 1252 {
1233 /* 11n STA */ 1253 /* 11n STA */
1234 staType = 2; 1254 staType = 2;
@@ -1251,7 +1271,8 @@ void zfApProcessAsocReq(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1251 /* AP : check 11h */ 1271 /* AP : check 11h */
1252 1272
1253 /* AP : check WME */ 1273 /* AP : check WME */
1254 if ((offset = zfFindWifiElement(dev, buf, 2, 0)) != 0xffff) 1274 offset = zfFindWifiElement(dev, buf, 2, 0);
1275 if (offset != 0xffff)
1255 { 1276 {
1256 /* WME STA */ 1277 /* WME STA */
1257 qosType = 1; 1278 qosType = 1;
@@ -1265,7 +1286,8 @@ void zfApProcessAsocReq(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1265 1286
1266 if (wd->ap.wpaSupport[apId] == 1) 1287 if (wd->ap.wpaSupport[apId] == 1)
1267 { 1288 {
1268 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_WPA_IE)) != 0xffff ) 1289 offset = zfFindElement(dev, buf, ZM_WLAN_EID_WPA_IE);
1290 if (offset != 0xffff)
1269 { 1291 {
1270 /* get WPA IE */ 1292 /* get WPA IE */
1271 u8_t length = zmw_rx_buf_readb(dev, buf, offset+1); 1293 u8_t length = zmw_rx_buf_readb(dev, buf, offset+1);
@@ -1406,12 +1428,14 @@ void zfApStoreAsocReqIe(zdev_t* dev, zbuf_t* buf, u16_t aid)
1406 offset = 28; 1428 offset = 28;
1407 1429
1408 /* supported rates */ 1430 /* supported rates */
1409 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_SUPPORT_RATE)) == 0xffff) 1431 offset = zfFindElement(dev, buf, ZM_WLAN_EID_SUPPORT_RATE);
1432 if (offset == 0xffff)
1410 return; 1433 return;
1411 length = zmw_rx_buf_readb(dev, buf, offset + 1); 1434 length = zmw_rx_buf_readb(dev, buf, offset + 1);
1412 1435
1413 /* extended supported rates */ 1436 /* extended supported rates */
1414 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_RATE)) == 0xffff) 1437 offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_RATE);
1438 if (offset == 0xffff)
1415 return; 1439 return;
1416 length = zmw_rx_buf_readb(dev, buf, offset + 1); 1440 length = zmw_rx_buf_readb(dev, buf, offset + 1);
1417 1441
@@ -1426,7 +1450,8 @@ void zfApStoreAsocReqIe(zdev_t* dev, zbuf_t* buf, u16_t aid)
1426 /* QoS */ 1450 /* QoS */
1427 1451
1428 /* HT capabilities: 28 octets */ 1452 /* HT capabilities: 28 octets */
1429 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY)) != 0xffff) { 1453 offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY);
1454 if (offset != 0xffff) {
1430 /* atheros pre n */ 1455 /* atheros pre n */
1431 htcap = (u8_t *)&wd->ap.ie[aid].HtCap; 1456 htcap = (u8_t *)&wd->ap.ie[aid].HtCap;
1432 htcap[0] = zmw_rx_buf_readb(dev, buf, offset); 1457 htcap[0] = zmw_rx_buf_readb(dev, buf, offset);
@@ -1479,7 +1504,8 @@ void zfApProcessDeauth(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1479 1504
1480 zmw_enter_critical_section(dev); 1505 zmw_enter_critical_section(dev);
1481 /* AP : if SA=associated STA then deauthenticate STA */ 1506 /* AP : if SA=associated STA then deauthenticate STA */
1482 if ((aid = zfApFindSta(dev, src)) != 0xffff) 1507 aid = zfApFindSta(dev, src);
1508 if (aid != 0xffff)
1483 { 1509 {
1484 /* Clear STA table */ 1510 /* Clear STA table */
1485 wd->ap.staTable[aid].valid = 0; 1511 wd->ap.staTable[aid].valid = 0;
@@ -1500,7 +1526,8 @@ void zfApProcessDisasoc(zdev_t* dev, zbuf_t* buf, u16_t* src, u16_t apId)
1500 1526
1501 zmw_enter_critical_section(dev); 1527 zmw_enter_critical_section(dev);
1502 /* AP : if SA=associated STA then deauthenticate STA */ 1528 /* AP : if SA=associated STA then deauthenticate STA */
1503 if ((aid = zfApFindSta(dev, src)) != 0xffff) 1529 aid = zfApFindSta(dev, src);
1530 if (aid != 0xffff)
1504 { 1531 {
1505 /* Clear STA table */ 1532 /* Clear STA table */
1506 wd->ap.staTable[aid].valid = 0; 1533 wd->ap.staTable[aid].valid = 0;
@@ -1674,7 +1701,8 @@ u16_t zfApAddIeTim(zdev_t* dev, zbuf_t* buf, u16_t offset, u16_t vap)
1674 dst[0] = zmw_tx_buf_readh(dev, psBuf, 0); 1701 dst[0] = zmw_tx_buf_readh(dev, psBuf, 0);
1675 dst[1] = zmw_tx_buf_readh(dev, psBuf, 2); 1702 dst[1] = zmw_tx_buf_readh(dev, psBuf, 2);
1676 dst[2] = zmw_tx_buf_readh(dev, psBuf, 4); 1703 dst[2] = zmw_tx_buf_readh(dev, psBuf, 4);
1677 if ((aid = zfApFindSta(dev, dst)) != 0xffff) 1704 aid = zfApFindSta(dev, dst);
1705 if (aid != 0xffff)
1678 { 1706 {
1679 if (wd->ap.staTable[aid].psMode != 0) 1707 if (wd->ap.staTable[aid].psMode != 0)
1680 { 1708 {
@@ -1896,7 +1924,8 @@ void zfApSendBeacon(zdev_t* dev)
1896 zm_msg1_mm(ZM_LV_2, "Send beacon, vap=", vap); 1924 zm_msg1_mm(ZM_LV_2, "Send beacon, vap=", vap);
1897 1925
1898 /* TBD : Maximum size of beacon */ 1926 /* TBD : Maximum size of beacon */
1899 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 1927 buf = zfwBufAllocate(dev, 1024);
1928 if (buf == NULL)
1900 { 1929 {
1901 zm_msg0_mm(ZM_LV_0, "Alloc beacon buf Fail!"); 1930 zm_msg0_mm(ZM_LV_0, "Alloc beacon buf Fail!");
1902 return; 1931 return;
@@ -2101,8 +2130,8 @@ u16_t zfIntrabssForward(zdev_t* dev, zbuf_t* buf, u8_t srcVap)
2101 if ((asocFlag == 1) || ((dst[0]&0x1) == 0x1)) 2130 if ((asocFlag == 1) || ((dst[0]&0x1) == 0x1))
2102 { 2131 {
2103 /* Allocate frame */ 2132 /* Allocate frame */
2104 if ((txBuf = zfwBufAllocate(dev, ZM_RX_FRAME_SIZE)) 2133 txBuf = zfwBufAllocate(dev, ZM_RX_FRAME_SIZE);
2105 == NULL) 2134 if (txBuf == NULL)
2106 { 2135 {
2107 zm_msg0_rx(ZM_LV_1, "Alloc intra-bss buf Fail!"); 2136 zm_msg0_rx(ZM_LV_1, "Alloc intra-bss buf Fail!");
2108 goto zlAllocError; 2137 goto zlAllocError;
@@ -2133,7 +2162,8 @@ u16_t zfIntrabssForward(zdev_t* dev, zbuf_t* buf, u8_t srcVap)
2133 2162
2134 /* Transmit frame */ 2163 /* Transmit frame */
2135 /* Return error if port is disabled */ 2164 /* Return error if port is disabled */
2136 if ((err = zfTxPortControl(dev, txBuf, vap)) == ZM_PORT_DISABLED) 2165 err = zfTxPortControl(dev, txBuf, vap);
2166 if (err == ZM_PORT_DISABLED)
2137 { 2167 {
2138 err = ZM_ERR_TX_PORT_DISABLED; 2168 err = ZM_ERR_TX_PORT_DISABLED;
2139 goto zlTxError; 2169 goto zlTxError;
@@ -2141,7 +2171,8 @@ u16_t zfIntrabssForward(zdev_t* dev, zbuf_t* buf, u8_t srcVap)
2141 2171
2142#if 1 2172#if 1
2143 /* AP : Buffer frame for power saving STA */ 2173 /* AP : Buffer frame for power saving STA */
2144 if ((ret = zfApBufferPsFrame(dev, txBuf, vap)) == 0) 2174 ret = zfApBufferPsFrame(dev, txBuf, vap);
2175 if (ret == 0)
2145 { 2176 {
2146 /* forward frame if not been buffered */ 2177 /* forward frame if not been buffered */
2147 #if 1 2178 #if 1
@@ -2177,7 +2208,8 @@ struct zsMicVar* zfApGetRxMicKey(zdev_t* dev, zbuf_t* buf)
2177 macAddr[1] = sa[2] + (sa[3] << 8); 2208 macAddr[1] = sa[2] + (sa[3] << 8);
2178 macAddr[2] = sa[4] + (sa[5] << 8); 2209 macAddr[2] = sa[4] + (sa[5] << 8);
2179 2210
2180 if ((id = zfApFindSta(dev, macAddr)) != 0xffff) 2211 id = zfApFindSta(dev, macAddr);
2212 if (id != 0xffff)
2181 return (&wd->ap.staTable[id].rxMicKey); 2213 return (&wd->ap.staTable[id].rxMicKey);
2182 2214
2183 return NULL; 2215 return NULL;
@@ -2369,7 +2401,8 @@ void zfApSendFailure(zdev_t* dev, u8_t* addr)
2369 staAddr[1] = addr[2] + (((u16_t)addr[3])<<8); 2401 staAddr[1] = addr[2] + (((u16_t)addr[3])<<8);
2370 staAddr[2] = addr[4] + (((u16_t)addr[5])<<8); 2402 staAddr[2] = addr[4] + (((u16_t)addr[5])<<8);
2371 zmw_enter_critical_section(dev); 2403 zmw_enter_critical_section(dev);
2372 if ((id = zfApFindSta(dev, staAddr)) != 0xffff) 2404 id = zfApFindSta(dev, staAddr);
2405 if (id != 0xffff)
2373 { 2406 {
2374 /* Send failture : Add 3 minutes to inactive time that will */ 2407 /* Send failture : Add 3 minutes to inactive time that will */
2375 /* will make STA been kicked out soon */ 2408 /* will make STA been kicked out soon */
diff --git a/drivers/staging/otus/80211core/cmmsta.c b/drivers/staging/otus/80211core/cmmsta.c
index c3fd47529c14..0fda30d05ed2 100644
--- a/drivers/staging/otus/80211core/cmmsta.c
+++ b/drivers/staging/otus/80211core/cmmsta.c
@@ -602,7 +602,8 @@ void zfStaProtErpMonitor(zdev_t* dev, zbuf_t* buf)
602 602
603 if (zfRxBufferEqualToStr(dev, buf, bssid, ZM_WLAN_HEADER_A2_OFFSET, 6)) 603 if (zfRxBufferEqualToStr(dev, buf, bssid, ZM_WLAN_HEADER_A2_OFFSET, 6))
604 { 604 {
605 if ( (offset=zfFindElement(dev, buf, ZM_WLAN_EID_ERP)) != 0xffff ) 605 offset = zfFindElement(dev, buf, ZM_WLAN_EID_ERP);
606 if (offset != 0xffff)
606 { 607 {
607 erp = zmw_rx_buf_readb(dev, buf, offset+2); 608 erp = zmw_rx_buf_readb(dev, buf, offset+2);
608 609
@@ -628,7 +629,8 @@ void zfStaProtErpMonitor(zdev_t* dev, zbuf_t* buf)
628 } 629 }
629 //Check the existence of Non-N AP 630 //Check the existence of Non-N AP
630 //Follow the check the "pBssInfo->EnableHT" 631 //Follow the check the "pBssInfo->EnableHT"
631 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY)) != 0xffff) 632 offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY);
633 if (offset != 0xffff)
632 {} 634 {}
633 else if ((offset = zfFindElement(dev, buf, ZM_WLAN_PREN2_EID_HTCAPABILITY)) != 0xffff) 635 else if ((offset = zfFindElement(dev, buf, ZM_WLAN_PREN2_EID_HTCAPABILITY)) != 0xffff)
634 {} 636 {}
@@ -658,9 +660,11 @@ void zfStaUpdateWmeParameter(zdev_t* dev, zbuf_t* buf)
658 if (wd->sta.wmeConnected != 0) 660 if (wd->sta.wmeConnected != 0)
659 { 661 {
660 /* Find WME parameter element */ 662 /* Find WME parameter element */
661 if ((offset = zfFindWifiElement(dev, buf, 2, 1)) != 0xffff) 663 offset = zfFindWifiElement(dev, buf, 2, 1);
664 if (offset != 0xffff)
662 { 665 {
663 if ((len = zmw_rx_buf_readb(dev, buf, offset+1)) >= 7) 666 len = zmw_rx_buf_readb(dev, buf, offset+1);
667 if (len >= 7)
664 { 668 {
665 rxWmeParameterSetCount=zmw_rx_buf_readb(dev, buf, offset+8); 669 rxWmeParameterSetCount=zmw_rx_buf_readb(dev, buf, offset+8);
666 if (rxWmeParameterSetCount != wd->sta.wmeParameterSetCount) 670 if (rxWmeParameterSetCount != wd->sta.wmeParameterSetCount)
@@ -741,7 +745,8 @@ void zfStaUpdateDot11HDFS(zdev_t* dev, zbuf_t* buf)
741 */ 745 */
742 746
743 /* get EID(Channel Switch Announcement) */ 747 /* get EID(Channel Switch Announcement) */
744 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_CHANNEL_SWITCH_ANNOUNCE)) == 0xffff ) 748 offset = zfFindElement(dev, buf, ZM_WLAN_EID_CHANNEL_SWITCH_ANNOUNCE);
749 if (offset == 0xffff)
745 { 750 {
746 //zm_debug_msg0("EID(Channel Switch Announcement) not found"); 751 //zm_debug_msg0("EID(Channel Switch Announcement) not found");
747 return; 752 return;
@@ -1216,7 +1221,8 @@ void zfStaSendBeacon(zdev_t* dev)
1216 //zm_debug_msg0("\n"); 1221 //zm_debug_msg0("\n");
1217 1222
1218 /* TBD : Maximum size of beacon */ 1223 /* TBD : Maximum size of beacon */
1219 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 1224 buf = zfwBufAllocate(dev, 1024);
1225 if (buf == NULL)
1220 { 1226 {
1221 zm_debug_msg0("Allocate beacon buffer failed"); 1227 zm_debug_msg0("Allocate beacon buffer failed");
1222 return; 1228 return;
@@ -1370,7 +1376,8 @@ struct zsBssInfo* zfStaFindBssInfo(zdev_t* dev, zbuf_t* buf, struct zsWlanProbeR
1370 1376
1371 zmw_get_wlan_dev(dev); 1377 zmw_get_wlan_dev(dev);
1372 1378
1373 if ((pBssInfo = wd->sta.bssList.head) == NULL) 1379 pBssInfo = wd->sta.bssList.head;
1380 if (pBssInfo == NULL)
1374 { 1381 {
1375 return NULL; 1382 return NULL;
1376 } 1383 }
@@ -1420,8 +1427,10 @@ struct zsBssInfo* zfStaFindBssInfo(zdev_t* dev, zbuf_t* buf, struct zsWlanProbeR
1420 /* Check channel */ 1427 /* Check channel */
1421 /* Add check channel to solve the bug #31222 */ 1428 /* Add check channel to solve the bug #31222 */
1422 if (isMatched) { 1429 if (isMatched) {
1423 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_DS)) != 0xffff) { 1430 offset = zfFindElement(dev, buf, ZM_WLAN_EID_DS);
1424 if ((length = zmw_rx_buf_readb(dev, buf, offset+1)) == 1) { 1431 if (offset != 0xffff) {
1432 length = zmw_rx_buf_readb(dev, buf, offset+1);
1433 if (length == 1) {
1425 channel = zmw_rx_buf_readb(dev, buf, offset+2); 1434 channel = zmw_rx_buf_readb(dev, buf, offset+2);
1426 if (zfHpIsAllowedChannel(dev, zfChNumToFreq(dev, channel, 0)) == 0) { 1435 if (zfHpIsAllowedChannel(dev, zfChNumToFreq(dev, channel, 0)) == 0) {
1427 frequency = 0; 1436 frequency = 0;
@@ -1473,7 +1482,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1473 } 1482 }
1474 1483
1475 /* get SSID */ 1484 /* get SSID */
1476 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID)) == 0xffff ) 1485 offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID);
1486 if (offset == 0xffff)
1477 { 1487 {
1478 zm_debug_msg0("EID(SSID) not found"); 1488 zm_debug_msg0("EID(SSID) not found");
1479 goto zlError; 1489 goto zlError;
@@ -1506,7 +1516,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1506 zfCopyFromRxBuffer(dev, buf, pBssInfo->ssid, offset, length+2); 1516 zfCopyFromRxBuffer(dev, buf, pBssInfo->ssid, offset, length+2);
1507 1517
1508 /* get DS parameter */ 1518 /* get DS parameter */
1509 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_DS)) != 0xffff ) 1519 offset = zfFindElement(dev, buf, ZM_WLAN_EID_DS);
1520 if (offset != 0xffff)
1510 { 1521 {
1511 length = zmw_rx_buf_readb(dev, buf, offset+1); 1522 length = zmw_rx_buf_readb(dev, buf, offset+1);
1512 if ( length != 1 ) 1523 if ( length != 1 )
@@ -1590,7 +1601,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1590 pBssInfo->frameBodysize = accumulateLen; 1601 pBssInfo->frameBodysize = accumulateLen;
1591 1602
1592 /* get supported rates */ 1603 /* get supported rates */
1593 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_SUPPORT_RATE)) == 0xffff ) 1604 offset = zfFindElement(dev, buf, ZM_WLAN_EID_SUPPORT_RATE);
1605 if (offset == 0xffff)
1594 { 1606 {
1595 zm_debug_msg0("EID(supported rates) not found"); 1607 zm_debug_msg0("EID(supported rates) not found");
1596 goto zlError; 1608 goto zlError;
@@ -1607,7 +1619,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1607 1619
1608 1620
1609 /* get Country information */ 1621 /* get Country information */
1610 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_COUNTRY)) != 0xffff ) 1622 offset = zfFindElement(dev, buf, ZM_WLAN_EID_COUNTRY);
1623 if (offset != 0xffff)
1611 { 1624 {
1612 length = zmw_rx_buf_readb(dev, buf, offset+1); 1625 length = zmw_rx_buf_readb(dev, buf, offset+1);
1613 if (length > ZM_MAX_COUNTRY_INFO_SIZE) 1626 if (length > ZM_MAX_COUNTRY_INFO_SIZE)
@@ -1625,13 +1638,15 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1625 } 1638 }
1626 1639
1627 /* get ERP information */ 1640 /* get ERP information */
1628 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_ERP)) != 0xffff ) 1641 offset = zfFindElement(dev, buf, ZM_WLAN_EID_ERP);
1642 if (offset != 0xffff)
1629 { 1643 {
1630 pBssInfo->erp = zmw_rx_buf_readb(dev, buf, offset+2); 1644 pBssInfo->erp = zmw_rx_buf_readb(dev, buf, offset+2);
1631 } 1645 }
1632 1646
1633 /* get extended supported rates */ 1647 /* get extended supported rates */
1634 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_RATE)) != 0xffff ) 1648 offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_RATE);
1649 if (offset != 0xffff)
1635 { 1650 {
1636 length = zmw_rx_buf_readb(dev, buf, offset+1); 1651 length = zmw_rx_buf_readb(dev, buf, offset+1);
1637 if (length > ZM_MAX_SUPP_RATES_IE_SIZE) 1652 if (length > ZM_MAX_SUPP_RATES_IE_SIZE)
@@ -1648,7 +1663,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1648 } 1663 }
1649 1664
1650 /* get WPA IE */ 1665 /* get WPA IE */
1651 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_WPA_IE)) != 0xffff ) 1666 offset = zfFindElement(dev, buf, ZM_WLAN_EID_WPA_IE);
1667 if (offset != 0xffff)
1652 { 1668 {
1653 length = zmw_rx_buf_readb(dev, buf, offset+1); 1669 length = zmw_rx_buf_readb(dev, buf, offset+1);
1654 if (length > ZM_MAX_IE_SIZE) 1670 if (length > ZM_MAX_IE_SIZE)
@@ -1664,7 +1680,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1664 } 1680 }
1665 1681
1666 /* get WPS IE */ 1682 /* get WPS IE */
1667 if ((offset = zfFindWifiElement(dev, buf, 4, 0xff)) != 0xffff) 1683 offset = zfFindWifiElement(dev, buf, 4, 0xff);
1684 if (offset != 0xffff)
1668 { 1685 {
1669 length = zmw_rx_buf_readb(dev, buf, offset+1); 1686 length = zmw_rx_buf_readb(dev, buf, offset+1);
1670 if (length > ZM_MAX_WPS_IE_SIZE ) 1687 if (length > ZM_MAX_WPS_IE_SIZE )
@@ -1679,19 +1696,22 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1679 } 1696 }
1680 1697
1681 /* get SuperG IE */ 1698 /* get SuperG IE */
1682 if ((offset = zfFindSuperGElement(dev, buf, ZM_WLAN_EID_VENDOR_PRIVATE)) != 0xffff) 1699 offset = zfFindSuperGElement(dev, buf, ZM_WLAN_EID_VENDOR_PRIVATE);
1700 if (offset != 0xffff)
1683 { 1701 {
1684 pBssInfo->apCap |= ZM_SuperG_AP; 1702 pBssInfo->apCap |= ZM_SuperG_AP;
1685 } 1703 }
1686 1704
1687 /* get XR IE */ 1705 /* get XR IE */
1688 if ((offset = zfFindXRElement(dev, buf, ZM_WLAN_EID_VENDOR_PRIVATE)) != 0xffff) 1706 offset = zfFindXRElement(dev, buf, ZM_WLAN_EID_VENDOR_PRIVATE);
1707 if (offset != 0xffff)
1689 { 1708 {
1690 pBssInfo->apCap |= ZM_XR_AP; 1709 pBssInfo->apCap |= ZM_XR_AP;
1691 } 1710 }
1692 1711
1693 /* get RSN IE */ 1712 /* get RSN IE */
1694 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_RSN_IE)) != 0xffff ) 1713 offset = zfFindElement(dev, buf, ZM_WLAN_EID_RSN_IE);
1714 if (offset != 0xffff)
1695 { 1715 {
1696 length = zmw_rx_buf_readb(dev, buf, offset+1); 1716 length = zmw_rx_buf_readb(dev, buf, offset+1);
1697 if (length > ZM_MAX_IE_SIZE) 1717 if (length > ZM_MAX_IE_SIZE)
@@ -1707,7 +1727,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1707 } 1727 }
1708#ifdef ZM_ENABLE_CENC 1728#ifdef ZM_ENABLE_CENC
1709 /* get CENC IE */ 1729 /* get CENC IE */
1710 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_CENC_IE)) != 0xffff ) 1730 offset = zfFindElement(dev, buf, ZM_WLAN_EID_CENC_IE);
1731 if (offset != 0xffff)
1711 { 1732 {
1712 length = zmw_rx_buf_readb(dev, buf, offset+1); 1733 length = zmw_rx_buf_readb(dev, buf, offset+1);
1713 if (length > ZM_MAX_IE_SIZE ) 1734 if (length > ZM_MAX_IE_SIZE )
@@ -1726,7 +1747,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1726 /* get WME Parameter IE, probe rsp may contain WME parameter element */ 1747 /* get WME Parameter IE, probe rsp may contain WME parameter element */
1727 //if ( wd->bQoSEnable ) 1748 //if ( wd->bQoSEnable )
1728 { 1749 {
1729 if ((offset = zfFindWifiElement(dev, buf, 2, 1)) != 0xffff) 1750 offset = zfFindWifiElement(dev, buf, 2, 1);
1751 if (offset != 0xffff)
1730 { 1752 {
1731 apQosInfo = zmw_rx_buf_readb(dev, buf, offset+8) & 0x80; 1753 apQosInfo = zmw_rx_buf_readb(dev, buf, offset+8) & 0x80;
1732 pBssInfo->wmeSupport = 1 | apQosInfo; 1754 pBssInfo->wmeSupport = 1 | apQosInfo;
@@ -1742,7 +1764,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1742 } 1764 }
1743 } 1765 }
1744 //CWYang(+) 1766 //CWYang(+)
1745 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY)) != 0xffff) 1767 offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY);
1768 if (offset != 0xffff)
1746 { 1769 {
1747 /* 11n AP */ 1770 /* 11n AP */
1748 pBssInfo->EnableHT = 1; 1771 pBssInfo->EnableHT = 1;
@@ -1792,7 +1815,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1792 pBssInfo->EnableHT = 0; 1815 pBssInfo->EnableHT = 0;
1793 } 1816 }
1794 /* HT information */ 1817 /* HT information */
1795 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_HT_CAPABILITY)) != 0xffff) 1818 offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_HT_CAPABILITY);
1819 if (offset != 0xffff)
1796 { 1820 {
1797 /* atheros pre n */ 1821 /* atheros pre n */
1798 pBssInfo->extChOffset = zmw_rx_buf_readb(dev, buf, offset+2) & 0x03; 1822 pBssInfo->extChOffset = zmw_rx_buf_readb(dev, buf, offset+2) & 0x03;
@@ -1848,7 +1872,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1848 } 1872 }
1849 1873
1850 /* get Marvel Extended Capability */ 1874 /* get Marvel Extended Capability */
1851 if ((offset = zfFindMarvelExtCap(dev, buf)) != 0xffff) 1875 offset = zfFindMarvelExtCap(dev, buf);
1876 if (offset != 0xffff)
1852 { 1877 {
1853 pBssInfo->marvelAp = 1; 1878 pBssInfo->marvelAp = 1;
1854 } 1879 }
@@ -1858,7 +1883,8 @@ u8_t zfStaInitBssInfo(zdev_t* dev, zbuf_t* buf,
1858 } 1883 }
1859 1884
1860 /* get ATIM window */ 1885 /* get ATIM window */
1861 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_IBSS)) != 0xffff ) 1886 offset = zfFindElement(dev, buf, ZM_WLAN_EID_IBSS);
1887 if (offset != 0xffff )
1862 { 1888 {
1863 pBssInfo->atimWindow = zmw_rx_buf_readh(dev, buf,offset+2); 1889 pBssInfo->atimWindow = zmw_rx_buf_readh(dev, buf,offset+2);
1864 } 1890 }
@@ -2017,7 +2043,8 @@ zlUpdateRssi:
2017 pBssInfo->tick = wd->tick; 2043 pBssInfo->tick = wd->tick;
2018 2044
2019 /* Update ERP information */ 2045 /* Update ERP information */
2020 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_ERP)) != 0xffff ) 2046 offset = zfFindElement(dev, buf, ZM_WLAN_EID_ERP);
2047 if (offset != 0xffff)
2021 { 2048 {
2022 pBssInfo->erp = zmw_rx_buf_readb(dev, buf, offset+2); 2049 pBssInfo->erp = zmw_rx_buf_readb(dev, buf, offset+2);
2023 } 2050 }
@@ -2116,7 +2143,8 @@ void zfStaProcessBeacon(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* AddInfo
2116#if 0 2143#if 0
2117 else if ( wd->sta.oppositeCount == 0 ) 2144 else if ( wd->sta.oppositeCount == 0 )
2118 { /* IBSS merge if SSID matched */ 2145 { /* IBSS merge if SSID matched */
2119 if ( (offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID)) != 0xffff ) 2146 offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID);
2147 if (offset != 0xffff)
2120 { 2148 {
2121 if ( (wd->sta.ssidLen == zmw_buf_readb(dev, buf, offset+1))&& 2149 if ( (wd->sta.ssidLen == zmw_buf_readb(dev, buf, offset+1))&&
2122 (zfRxBufferEqualToStr(dev, buf, wd->sta.ssid, 2150 (zfRxBufferEqualToStr(dev, buf, wd->sta.ssid,
@@ -2410,7 +2438,8 @@ void zfStaProcessAsocRsp(zdev_t* dev, zbuf_t* buf)
2410 if ((wd->sta.wmeEnabled & ZM_STA_WME_ENABLE_BIT) != 0) //WME enabled 2438 if ((wd->sta.wmeEnabled & ZM_STA_WME_ENABLE_BIT) != 0) //WME enabled
2411 { 2439 {
2412 /* Asoc rsp may contain WME parameter element */ 2440 /* Asoc rsp may contain WME parameter element */
2413 if ((offset = zfFindWifiElement(dev, buf, 2, 1)) != 0xffff) 2441 offset = zfFindWifiElement(dev, buf, 2, 1);
2442 if (offset != 0xffff)
2414 { 2443 {
2415 zm_debug_msg0("WME enable"); 2444 zm_debug_msg0("WME enable");
2416 wd->sta.wmeConnected = 1; 2445 wd->sta.wmeConnected = 1;
@@ -2605,7 +2634,8 @@ void zfStaStoreAsocRspIe(zdev_t* dev, zbuf_t* buf)
2605 return; 2634 return;
2606 } 2635 }
2607 2636
2608 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY)) != 0xffff) 2637 offset = zfFindElement(dev, buf, ZM_WLAN_EID_HT_CAPABILITY);
2638 if (offset != 0xffff)
2609 { 2639 {
2610 /* atheros pre n */ 2640 /* atheros pre n */
2611 zm_debug_msg0("atheros pre n"); 2641 zm_debug_msg0("atheros pre n");
@@ -2645,7 +2675,8 @@ void zfStaStoreAsocRspIe(zdev_t* dev, zbuf_t* buf)
2645 asocBw40 = (u8_t)((wd->sta.ie.HtCap.HtCapInfo & HTCAP_SupChannelWidthSet) >> 1); 2675 asocBw40 = (u8_t)((wd->sta.ie.HtCap.HtCapInfo & HTCAP_SupChannelWidthSet) >> 1);
2646 2676
2647 /* HT information */ 2677 /* HT information */
2648 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_HT_CAPABILITY)) != 0xffff) 2678 offset = zfFindElement(dev, buf, ZM_WLAN_EID_EXTENDED_HT_CAPABILITY);
2679 if (offset != 0xffff)
2649 { 2680 {
2650 /* atheros pre n */ 2681 /* atheros pre n */
2651 zm_debug_msg0("atheros pre n HTINFO"); 2682 zm_debug_msg0("atheros pre n HTINFO");
@@ -2815,7 +2846,8 @@ void zfStaProcessProbeReq(zdev_t* dev, zbuf_t* buf, u16_t* src)
2815 } 2846 }
2816 2847
2817 /* check SSID */ 2848 /* check SSID */
2818 if ((offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID)) == 0xffff) 2849 offset = zfFindElement(dev, buf, ZM_WLAN_EID_SSID);
2850 if (offset == 0xffff)
2819 { 2851 {
2820 zm_msg0_mm(ZM_LV_3, "probe req SSID not found"); 2852 zm_msg0_mm(ZM_LV_3, "probe req SSID not found");
2821 return; 2853 return;
@@ -3774,7 +3806,8 @@ static struct zsBssInfo* zfInfraFindAPToConnect(zdev_t* dev,
3774 } 3806 }
3775 3807
3776 /* Skip if AP in blocking list */ 3808 /* Skip if AP in blocking list */
3777 if ((ret = zfStaIsApInBlockingList(dev, pBssInfo->bssid)) == TRUE) 3809 ret = zfStaIsApInBlockingList(dev, pBssInfo->bssid);
3810 if (ret == TRUE)
3778 { 3811 {
3779 zm_msg0_mm(ZM_LV_0, "Candidate AP in blocking List, skip if there's stilla choice!"); 3812 zm_msg0_mm(ZM_LV_0, "Candidate AP in blocking List, skip if there's stilla choice!");
3780 pNowBssInfo = pBssInfo; 3813 pNowBssInfo = pBssInfo;
@@ -5007,7 +5040,8 @@ void zfSendNullData(zdev_t* dev, u8_t type)
5007 5040
5008 zmw_get_wlan_dev(dev); 5041 zmw_get_wlan_dev(dev);
5009 5042
5010 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 5043 buf = zfwBufAllocate(dev, 1024);
5044 if (buf == NULL)
5011 { 5045 {
5012 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!"); 5046 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!");
5013 return; 5047 return;
@@ -5056,8 +5090,9 @@ void zfSendNullData(zdev_t* dev, u8_t type)
5056 /*increase unicast frame counter*/ 5090 /*increase unicast frame counter*/
5057 wd->commTally.txUnicastFrm++; 5091 wd->commTally.txUnicastFrm++;
5058 5092
5059 if ((err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0, 5093 err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0,
5060 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 5094 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
5095 if (err != ZM_SUCCESS)
5061 { 5096 {
5062 goto zlError; 5097 goto zlError;
5063 } 5098 }
@@ -5083,7 +5118,8 @@ void zfSendPSPoll(zdev_t* dev)
5083 5118
5084 zmw_get_wlan_dev(dev); 5119 zmw_get_wlan_dev(dev);
5085 5120
5086 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 5121 buf = zfwBufAllocate(dev, 1024);
5122 if (buf == NULL)
5087 { 5123 {
5088 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!"); 5124 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!");
5089 return; 5125 return;
@@ -5107,8 +5143,9 @@ void zfSendPSPoll(zdev_t* dev)
5107 // goto zlError; 5143 // goto zlError;
5108 //} 5144 //}
5109 5145
5110 if ((err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0, 5146 err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0,
5111 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 5147 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
5148 if (err != ZM_SUCCESS)
5112 { 5149 {
5113 goto zlError; 5150 goto zlError;
5114 } 5151 }
@@ -5134,7 +5171,8 @@ void zfSendBA(zdev_t* dev, u16_t start_seq, u8_t *bitmap)
5134 5171
5135 zmw_get_wlan_dev(dev); 5172 zmw_get_wlan_dev(dev);
5136 5173
5137 if ((buf = zfwBufAllocate(dev, 1024)) == NULL) 5174 buf = zfwBufAllocate(dev, 1024);
5175 if (buf == NULL)
5138 { 5176 {
5139 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!"); 5177 zm_msg0_mm(ZM_LV_0, "Alloc mm buf Fail!");
5140 return; 5178 return;
@@ -5166,8 +5204,9 @@ void zfSendBA(zdev_t* dev, u16_t start_seq, u8_t *bitmap)
5166 offset++; 5204 offset++;
5167 } 5205 }
5168 5206
5169 if ((err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0, 5207 err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0,
5170 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 5208 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
5209 if (err != ZM_SUCCESS)
5171 { 5210 {
5172 goto zlError; 5211 goto zlError;
5173 } 5212 }
diff --git a/drivers/staging/otus/80211core/coid.c b/drivers/staging/otus/80211core/coid.c
index 0524e1f36f0d..229aed8f889e 100644
--- a/drivers/staging/otus/80211core/coid.c
+++ b/drivers/staging/otus/80211core/coid.c
@@ -553,7 +553,8 @@ u8_t zfiWlanSetKey(zdev_t* dev, struct zsKeyInfo keyInfo)
553 if (keyInfo.flag & ZM_KEY_FLAG_PK) 553 if (keyInfo.flag & ZM_KEY_FLAG_PK)
554 { 554 {
555 /* Find STA's information */ 555 /* Find STA's information */
556 if ((id = zfApFindSta(dev, keyInfo.macAddr)) == 0xffff) 556 id = zfApFindSta(dev, keyInfo.macAddr);
557 if (id == 0xffff)
557 { 558 {
558 /* Can't STA in the staTable */ 559 /* Can't STA in the staTable */
559 return ZM_STATUS_FAILURE; 560 return ZM_STATUS_FAILURE;
diff --git a/drivers/staging/otus/80211core/cpsmgr.c b/drivers/staging/otus/80211core/cpsmgr.c
index 98e1f0cc0727..32313beba78d 100644
--- a/drivers/staging/otus/80211core/cpsmgr.c
+++ b/drivers/staging/otus/80211core/cpsmgr.c
@@ -602,7 +602,8 @@ void zfPowerSavingMgrProcessBeacon(zdev_t* dev, zbuf_t* buf)
602 602
603 wd->sta.psMgr.isSleepAllowed = 1; 603 wd->sta.psMgr.isSleepAllowed = 1;
604 604
605 if ( (offset=zfFindElement(dev, buf, ZM_WLAN_EID_TIM)) != 0xffff ) 605 offset = zfFindElement(dev, buf, ZM_WLAN_EID_TIM);
606 if (offset != 0xffff)
606 { 607 {
607 length = zmw_rx_buf_readb(dev, buf, offset+1); 608 length = zmw_rx_buf_readb(dev, buf, offset+1);
608 609
diff --git a/drivers/staging/otus/80211core/ctxrx.c b/drivers/staging/otus/80211core/ctxrx.c
index 4e7f4bd86f47..a127196260e6 100644
--- a/drivers/staging/otus/80211core/ctxrx.c
+++ b/drivers/staging/otus/80211core/ctxrx.c
@@ -109,7 +109,8 @@ void zfGetRxIvIcvLength(zdev_t* dev, zbuf_t* buf, u8_t vap, u16_t* pIvLen,
109 addr[2] = zmw_rx_buf_readh(dev, buf, ZM_WLAN_HEADER_A2_OFFSET+4); 109 addr[2] = zmw_rx_buf_readh(dev, buf, ZM_WLAN_HEADER_A2_OFFSET+4);
110 110
111 /* Find STA's information */ 111 /* Find STA's information */
112 if ((id = zfApFindSta(dev, addr)) != 0xffff) 112 id = zfApFindSta(dev, addr);
113 if (id != 0xffff)
113 { 114 {
114 if (wd->ap.staTable[id].encryMode == ZM_TKIP) 115 if (wd->ap.staTable[id].encryMode == ZM_TKIP)
115 { 116 {
@@ -132,7 +133,8 @@ void zfGetRxIvIcvLength(zdev_t* dev, zbuf_t* buf, u8_t vap, u16_t* pIvLen,
132 } 133 }
133 } 134 }
134 /* WDS port checking */ 135 /* WDS port checking */
135 if ((wdsPort = vap - 0x20) >= ZM_MAX_WDS_SUPPORT) 136 wdsPort = vap - 0x20;
137 if (wdsPort >= ZM_MAX_WDS_SUPPORT)
136 { 138 {
137 wdsPort = 0; 139 wdsPort = 0;
138 } 140 }
@@ -741,8 +743,9 @@ u16_t zfiTxSend80211Mgmt(zdev_t* dev, zbuf_t* buf, u16_t port)
741 743
742 zfwBufRemoveHead(dev, buf, 24); 744 zfwBufRemoveHead(dev, buf, 24);
743 745
744 if ((err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0, 746 err = zfHpSend(dev, header, hlen, NULL, 0, NULL, 0, buf, 0,
745 ZM_EXTERNAL_ALLOC_BUF, 0, 0)) != ZM_SUCCESS) 747 ZM_EXTERNAL_ALLOC_BUF, 0, 0);
748 if (err != ZM_SUCCESS)
746 { 749 {
747 goto zlError; 750 goto zlError;
748 } 751 }
@@ -799,7 +802,8 @@ u16_t zfiTxSendEth(zdev_t* dev, zbuf_t* buf, u16_t port)
799 ZM_PERFORMANCE_TX_MSDU(dev, wd->tick); 802 ZM_PERFORMANCE_TX_MSDU(dev, wd->tick);
800 zm_msg1_tx(ZM_LV_2, "zfiTxSendEth(), port=", port); 803 zm_msg1_tx(ZM_LV_2, "zfiTxSendEth(), port=", port);
801 /* Return error if port is disabled */ 804 /* Return error if port is disabled */
802 if ((err = zfTxPortControl(dev, buf, port)) == ZM_PORT_DISABLED) 805 err = zfTxPortControl(dev, buf, port);
806 if (err == ZM_PORT_DISABLED)
803 { 807 {
804 err = ZM_ERR_TX_PORT_DISABLED; 808 err = ZM_ERR_TX_PORT_DISABLED;
805 goto zlError; 809 goto zlError;
@@ -809,7 +813,8 @@ u16_t zfiTxSendEth(zdev_t* dev, zbuf_t* buf, u16_t port)
809 if ((wd->wlanMode == ZM_MODE_AP) && (port < 0x20)) 813 if ((wd->wlanMode == ZM_MODE_AP) && (port < 0x20))
810 { 814 {
811 /* AP : Buffer frame for power saving STA */ 815 /* AP : Buffer frame for power saving STA */
812 if ((ret = zfApBufferPsFrame(dev, buf, port)) == 1) 816 ret = zfApBufferPsFrame(dev, buf, port);
817 if (ret == 1)
813 { 818 {
814 return ZM_SUCCESS; 819 return ZM_SUCCESS;
815 } 820 }
@@ -1119,7 +1124,8 @@ u16_t zfTxSendEth(zdev_t* dev, zbuf_t* buf, u16_t port, u16_t bufType, u16_t fla
1119 i = 0; 1124 i = 0;
1120 while( frameLen > 0 ) 1125 while( frameLen > 0 )
1121 { 1126 {
1122 if ((frag.buf[i] = zfwBufAllocate(dev, fragLen+32)) != NULL) 1127 frag.buf[i] = zfwBufAllocate(dev, fragLen+32);
1128 if (frag.buf[i] != NULL)
1123 { 1129 {
1124 frag.bufType[i] = ZM_INTERNAL_ALLOC_BUF; 1130 frag.bufType[i] = ZM_INTERNAL_ALLOC_BUF;
1125 frag.seq[i] = frag.seq[0] + i; 1131 frag.seq[i] = frag.seq[0] + i;
@@ -1276,7 +1282,8 @@ void zfCoreRecv(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* addInfo)
1276 bssid[2] = zmw_buf_readh(dev, buf, 20); 1282 bssid[2] = zmw_buf_readh(dev, buf, 20);
1277 1283
1278 /* Validate Rx frame */ 1284 /* Validate Rx frame */
1279 if ((ret = zfWlanRxValidate(dev, buf)) != ZM_SUCCESS) 1285 ret = zfWlanRxValidate(dev, buf);
1286 if (ret != ZM_SUCCESS)
1280 { 1287 {
1281 zm_msg1_rx(ZM_LV_1, "Rx invalid:", ret); 1288 zm_msg1_rx(ZM_LV_1, "Rx invalid:", ret);
1282 goto zlError; 1289 goto zlError;
@@ -1301,7 +1308,8 @@ void zfCoreRecv(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* addInfo)
1301#endif 1308#endif
1302 1309
1303 /* Filter Rx frame */ 1310 /* Filter Rx frame */
1304 if ((ret = zfWlanRxFilter(dev, buf)) != ZM_SUCCESS) 1311 ret = zfWlanRxFilter(dev, buf);
1312 if (ret != ZM_SUCCESS)
1305 { 1313 {
1306 zm_msg1_rx(ZM_LV_1, "Rx duplicated:", ret); 1314 zm_msg1_rx(ZM_LV_1, "Rx duplicated:", ret);
1307 goto zlError; 1315 goto zlError;
@@ -2086,7 +2094,8 @@ void zfiRecv80211(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* addInfo)
2086 //zm_msg0_rx(ZM_LV_0, "Rx data"); 2094 //zm_msg0_rx(ZM_LV_0, "Rx data");
2087 if (wd->wlanMode == ZM_MODE_AP) 2095 if (wd->wlanMode == ZM_MODE_AP)
2088 { 2096 {
2089 if ((ret = zfApUpdatePsBit(dev, buf, &vap, &uapsdTrig)) != ZM_SUCCESS) 2097 ret = zfApUpdatePsBit(dev, buf, &vap, &uapsdTrig);
2098 if (ret != ZM_SUCCESS)
2090 { 2099 {
2091 zfwBufFree(dev, buf, 0); 2100 zfwBufFree(dev, buf, 0);
2092 return; 2101 return;
@@ -2115,7 +2124,8 @@ void zfiRecv80211(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* addInfo)
2115 for (ii=0; ii<pktNum; ii++) 2124 for (ii=0; ii<pktNum; ii++)
2116 { 2125 {
2117 //if ((psBuf = zfQueueGet(dev, wd->ap.uapsdQ)) != NULL) 2126 //if ((psBuf = zfQueueGet(dev, wd->ap.uapsdQ)) != NULL)
2118 if ((psBuf = zfQueueGetWithMac(dev, wd->ap.uapsdQ, src, &mb)) != NULL) 2127 psBuf = zfQueueGetWithMac(dev, wd->ap.uapsdQ, src, &mb);
2128 if (psBuf != NULL)
2119 { 2129 {
2120 if ((ii+1) == pktNum) 2130 if ((ii+1) == pktNum)
2121 { 2131 {
@@ -2232,7 +2242,8 @@ void zfiRecv80211(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* addInfo)
2232 } 2242 }
2233 else 2243 else
2234 { 2244 {
2235 if ( (buf = zfDefragment(dev, buf, &bIsDefrag, addInfo)) == NULL ) 2245 buf = zfDefragment(dev, buf, &bIsDefrag, addInfo);
2246 if (buf == NULL)
2236 { 2247 {
2237 /* In this case, the buffer has been freed in zfDefragment */ 2248 /* In this case, the buffer has been freed in zfDefragment */
2238 return; 2249 return;
@@ -2836,7 +2847,8 @@ void zfiRecv80211(zdev_t* dev, zbuf_t* buf, struct zsAdditionInfo* addInfo)
2836 zfwBufRemoveHead(dev, buf, 18+offset); 2847 zfwBufRemoveHead(dev, buf, 18+offset);
2837#endif // ZM_ENABLE_NATIVE_WIFI 2848#endif // ZM_ENABLE_NATIVE_WIFI
2838 #if 1 2849 #if 1
2839 if ((ret = zfIntrabssForward(dev, buf, vap)) == 1) 2850 ret = zfIntrabssForward(dev, buf, vap);
2851 if (ret == 1)
2840 { 2852 {
2841 /* Free Rx buffer if intra-BSS unicast frame */ 2853 /* Free Rx buffer if intra-BSS unicast frame */
2842 zm_msg0_rx(ZM_LV_2, "Free intra-BSS unicast frame"); 2854 zm_msg0_rx(ZM_LV_2, "Free intra-BSS unicast frame");
@@ -3037,7 +3049,8 @@ u16_t zfWlanRxValidate(zdev_t* dev, zbuf_t* buf)
3037 } 3049 }
3038 else if ( wd->wlanMode != ZM_MODE_PSEUDO ) 3050 else if ( wd->wlanMode != ZM_MODE_PSEUDO )
3039 { 3051 {
3040 if ( (ret=zfStaRxValidateFrame(dev, buf))!=ZM_SUCCESS ) 3052 ret = zfStaRxValidateFrame(dev, buf);
3053 if (ret != ZM_SUCCESS)
3041 { 3054 {
3042 //zm_debug_msg1("discard frame, code = ", ret); 3055 //zm_debug_msg1("discard frame, code = ", ret);
3043 return ret; 3056 return ret;
@@ -3787,12 +3800,14 @@ void zfPushVtxq(zdev_t* dev)
3787 /* 2006.12.20, Serve Management queue */ 3800 /* 2006.12.20, Serve Management queue */
3788 while( zfHpGetFreeTxdCount(dev) > 0 ) 3801 while( zfHpGetFreeTxdCount(dev) > 0 )
3789 { 3802 {
3790 if ((buf = zfGetVmmq(dev)) != 0) 3803 buf = zfGetVmmq(dev);
3804 if (buf != 0)
3791 { 3805 {
3792 txed = 1; 3806 txed = 1;
3793 //zm_debug_msg2("send buf = ", buf); 3807 //zm_debug_msg2("send buf = ", buf);
3794 if ((err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0, 3808 err = zfHpSend(dev, NULL, 0, NULL, 0, NULL, 0, buf, 0,
3795 ZM_INTERNAL_ALLOC_BUF, 0, 0xff)) != ZM_SUCCESS) 3809 ZM_INTERNAL_ALLOC_BUF, 0, 0xff);
3810 if (err != ZM_SUCCESS)
3796 { 3811 {
3797 zfwBufFree(dev, buf, 0); 3812 zfwBufFree(dev, buf, 0);
3798 } 3813 }
@@ -3831,9 +3846,11 @@ void zfPushVtxq(zdev_t* dev)
3831 /* Service VTxQ[3] */ 3846 /* Service VTxQ[3] */
3832 for (i=0; i<4; i++) 3847 for (i=0; i<4; i++)
3833 { 3848 {
3834 if ((freeTxd = zfHpGetFreeTxdCount(dev)) >= 3) 3849 freeTxd = zfHpGetFreeTxdCount(dev);
3850 if (freeTxd >= 3)
3835 { 3851 {
3836 if ((buf = zfGetVtxq(dev, 3)) != 0) 3852 buf = zfGetVtxq(dev, 3);
3853 if (buf != 0)
3837 { 3854 {
3838 txed = 1; 3855 txed = 1;
3839 //zm_debug_msg2("send buf = ", buf); 3856 //zm_debug_msg2("send buf = ", buf);
@@ -3850,9 +3867,11 @@ void zfPushVtxq(zdev_t* dev)
3850 /* Service VTxQ[2] */ 3867 /* Service VTxQ[2] */
3851 for (i=0; i<3; i++) 3868 for (i=0; i<3; i++)
3852 { 3869 {
3853 if ((freeTxd = zfHpGetFreeTxdCount(dev)) >= (zfHpGetMaxTxdCount(dev)*1/4)) 3870 freeTxd = zfHpGetFreeTxdCount(dev);
3871 if (freeTxd >= (zfHpGetMaxTxdCount(dev)*1/4))
3854 { 3872 {
3855 if ((buf = zfGetVtxq(dev, 2)) != 0) 3873 buf = zfGetVtxq(dev, 2);
3874 if (buf != 0)
3856 { 3875 {
3857 txed = 1; 3876 txed = 1;
3858 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0); 3877 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0);
@@ -3860,7 +3879,8 @@ void zfPushVtxq(zdev_t* dev)
3860 } 3879 }
3861 if (wd->sta.ac0PriorityHigherThanAc2 == 1) 3880 if (wd->sta.ac0PriorityHigherThanAc2 == 1)
3862 { 3881 {
3863 if ((buf = zfGetVtxq(dev, 0)) != 0) 3882 buf = zfGetVtxq(dev, 0);
3883 if (buf != 0)
3864 { 3884 {
3865 txed = 1; 3885 txed = 1;
3866 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0); 3886 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0);
@@ -3877,9 +3897,11 @@ void zfPushVtxq(zdev_t* dev)
3877 /* Service VTxQ[0] */ 3897 /* Service VTxQ[0] */
3878 for (i=0; i<2; i++) 3898 for (i=0; i<2; i++)
3879 { 3899 {
3880 if ((freeTxd = zfHpGetFreeTxdCount(dev)) >= (zfHpGetMaxTxdCount(dev)*2/4)) 3900 freeTxd = zfHpGetFreeTxdCount(dev);
3901 if (freeTxd >= (zfHpGetMaxTxdCount(dev)*2/4))
3881 { 3902 {
3882 if ((buf = zfGetVtxq(dev, 0)) != 0) 3903 buf = zfGetVtxq(dev, 0);
3904 if (buf != 0)
3883 { 3905 {
3884 txed = 1; 3906 txed = 1;
3885 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0); 3907 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0);
@@ -3894,9 +3916,11 @@ void zfPushVtxq(zdev_t* dev)
3894 } 3916 }
3895 3917
3896 /* Service VTxQ[1] */ 3918 /* Service VTxQ[1] */
3897 if ((freeTxd = zfHpGetFreeTxdCount(dev)) >= (zfHpGetMaxTxdCount(dev)*3/4)) 3919 freeTxd = zfHpGetFreeTxdCount(dev);
3920 if (freeTxd >= (zfHpGetMaxTxdCount(dev)*3/4))
3898 { 3921 {
3899 if ((buf = zfGetVtxq(dev, 1)) != 0) 3922 buf = zfGetVtxq(dev, 1);
3923 if (buf != 0)
3900 { 3924 {
3901 txed = 1; 3925 txed = 1;
3902 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0); 3926 zfTxSendEth(dev, buf, 0, ZM_EXTERNAL_ALLOC_BUF, 0);
@@ -3983,9 +4007,10 @@ void zf80211FrameSend(zdev_t* dev, zbuf_t* buf, u16_t* header, u16_t snapLen,
3983 } 4007 }
3984 wd->ledStruct.txTraffic++; 4008 wd->ledStruct.txTraffic++;
3985 4009
3986 if ((err = zfHpSend(dev, header, headerLen, snap, snapLen, 4010 err = zfHpSend(dev, header, headerLen, snap, snapLen,
3987 tail, tailLen, buf, offset, 4011 tail, tailLen, buf, offset,
3988 bufType, ac, keyIdx)) != ZM_SUCCESS) 4012 bufType, ac, keyIdx);
4013 if (err != ZM_SUCCESS)
3989 { 4014 {
3990 if (bufType == ZM_EXTERNAL_ALLOC_BUF) 4015 if (bufType == ZM_EXTERNAL_ALLOC_BUF)
3991 { 4016 {
diff --git a/drivers/staging/otus/80211core/queue.c b/drivers/staging/otus/80211core/queue.c
index d294831b5c36..29be4bdb40a4 100644
--- a/drivers/staging/otus/80211core/queue.c
+++ b/drivers/staging/otus/80211core/queue.c
@@ -31,8 +31,9 @@ struct zsQueue* zfQueueCreate(zdev_t* dev, u16_t size)
31{ 31{
32 struct zsQueue* q; 32 struct zsQueue* q;
33 33
34 if ((q = (struct zsQueue*)zfwMemAllocate(dev, sizeof(struct zsQueue) 34 q = (struct zsQueue*)zfwMemAllocate(dev, sizeof(struct zsQueue)
35 + (sizeof(struct zsQueueCell)*(size-1)))) != NULL) 35 + (sizeof(struct zsQueueCell)*(size-1)));
36 if (q != NULL)
36 { 37 {
37 q->size = size; 38 q->size = size;
38 q->sizeMask = size-1; 39 q->sizeMask = size-1;
diff --git a/drivers/staging/otus/80211core/ratectrl.c b/drivers/staging/otus/80211core/ratectrl.c
index a43104cd7f51..a1abe2f4f342 100644
--- a/drivers/staging/otus/80211core/ratectrl.c
+++ b/drivers/staging/otus/80211core/ratectrl.c
@@ -538,7 +538,8 @@ u16_t zfRateCtrlGetTxRate(zdev_t* dev, struct zsRcCell* rcCell, u16_t* probing)
538 ((rcCell->currentRate <= 16) && 538 ((rcCell->currentRate <= 16) &&
539 ((wd->PER[rcCell->currentRate]/2) <= ZM_RATE_PROBING_THRESHOLD))) 539 ((wd->PER[rcCell->currentRate]/2) <= ZM_RATE_PROBING_THRESHOLD)))
540 { 540 {
541 if ((newRate=zfRateCtrlGetHigherRate(rcCell)) != rcCell->currentRate) 541 newRate = zfRateCtrlGetHigherRate(rcCell);
542 if (newRate != rcCell->currentRate)
542 { 543 {
543 *probing = 1; 544 *probing = 1;
544 wd->probeCount++; 545 wd->probeCount++;
diff --git a/drivers/staging/otus/hal/hpani.c b/drivers/staging/otus/hal/hpani.c
index 0afecd8c2de4..f53e483b394d 100644
--- a/drivers/staging/otus/hal/hpani.c
+++ b/drivers/staging/otus/hal/hpani.c
@@ -18,8 +18,8 @@
18#include "hpusb.h" 18#include "hpusb.h"
19 19
20 20
21extern u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val); 21extern u16_t zfDelayWriteInternalReg(zdev_t *dev, u32_t addr, u32_t val);
22extern u16_t zfFlushDelayWrite(zdev_t* dev); 22extern u16_t zfFlushDelayWrite(zdev_t *dev);
23 23
24/* 24/*
25 * Anti noise immunity support. We track phy errors and react 25 * Anti noise immunity support. We track phy errors and react
@@ -52,13 +52,13 @@ extern u16_t zfFlushDelayWrite(zdev_t* dev);
52#define ZM_HAL_EP_RND(x, mul) \ 52#define ZM_HAL_EP_RND(x, mul) \
53 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) 53 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
54 54
55s32_t BEACON_RSSI(zdev_t* dev) 55s32_t BEACON_RSSI(zdev_t *dev)
56{ 56{
57 s32_t rssi; 57 s32_t rssi;
58 struct zsHpPriv *HpPriv; 58 struct zsHpPriv *HpPriv;
59 59
60 zmw_get_wlan_dev(dev); 60 zmw_get_wlan_dev(dev);
61 HpPriv = (struct zsHpPriv*)wd->hpPrivate; 61 HpPriv = (struct zsHpPriv *)wd->hpPrivate;
62 62
63 rssi = ZM_HAL_EP_RND(HpPriv->stats.ast_nodestats.ns_avgbrssi, ZM_HAL_RSSI_EP_MULTIPLIER); 63 rssi = ZM_HAL_EP_RND(HpPriv->stats.ast_nodestats.ns_avgbrssi, ZM_HAL_RSSI_EP_MULTIPLIER);
64 64
@@ -70,7 +70,7 @@ s32_t BEACON_RSSI(zdev_t* dev)
70 * resets the channel statistics 70 * resets the channel statistics
71 */ 71 */
72 72
73void zfHpAniAttach(zdev_t* dev) 73void zfHpAniAttach(zdev_t *dev)
74{ 74{
75#define N(a) (sizeof(a) / sizeof(a[0])) 75#define N(a) (sizeof(a) / sizeof(a[0]))
76 u32_t i; 76 u32_t i;
@@ -82,11 +82,10 @@ void zfHpAniAttach(zdev_t* dev)
82 const int firpwr[] = { -78, -78, -78, -78, -80 }; 82 const int firpwr[] = { -78, -78, -78, -78, -80 };
83 83
84 zmw_get_wlan_dev(dev); 84 zmw_get_wlan_dev(dev);
85 HpPriv = (struct zsHpPriv*)wd->hpPrivate; 85 HpPriv = (struct zsHpPriv *)wd->hpPrivate;
86 86
87 for (i = 0; i < 5; i++) 87 for (i = 0; i < 5; i++) {
88 { 88 HpPriv->totalSizeDesired[i] = totalSizeDesired[i];
89 HpPriv->totalSizeDesired[i] = totalSizeDesired[i];
90 HpPriv->coarseHigh[i] = coarseHigh[i]; 89 HpPriv->coarseHigh[i] = coarseHigh[i];
91 HpPriv->coarseLow[i] = coarseLow[i]; 90 HpPriv->coarseLow[i] = coarseLow[i];
92 HpPriv->firpwr[i] = firpwr[i]; 91 HpPriv->firpwr[i] = firpwr[i];
@@ -96,8 +95,7 @@ void zfHpAniAttach(zdev_t* dev)
96 HpPriv->hasHwPhyCounters = 1; 95 HpPriv->hasHwPhyCounters = 1;
97 96
98 memset((char *)&HpPriv->ani, 0, sizeof(HpPriv->ani)); 97 memset((char *)&HpPriv->ani, 0, sizeof(HpPriv->ani));
99 for (i = 0; i < N(wd->regulationTable.allowChannel); i++) 98 for (i = 0; i < ARRAY_SIZE(HpPriv->ani); i++) {
100 {
101 /* New ANI stuff */ 99 /* New ANI stuff */
102 HpPriv->ani[i].ofdmTrigHigh = ZM_HAL_ANI_OFDM_TRIG_HIGH; 100 HpPriv->ani[i].ofdmTrigHigh = ZM_HAL_ANI_OFDM_TRIG_HIGH;
103 HpPriv->ani[i].ofdmTrigLow = ZM_HAL_ANI_OFDM_TRIG_LOW; 101 HpPriv->ani[i].ofdmTrigLow = ZM_HAL_ANI_OFDM_TRIG_LOW;
@@ -109,14 +107,12 @@ void zfHpAniAttach(zdev_t* dev)
109 HpPriv->ani[i].cckWeakSigThreshold = ZM_HAL_ANI_CCK_WEAK_SIG_THR; 107 HpPriv->ani[i].cckWeakSigThreshold = ZM_HAL_ANI_CCK_WEAK_SIG_THR;
110 HpPriv->ani[i].spurImmunityLevel = ZM_HAL_ANI_SPUR_IMMUNE_LVL; 108 HpPriv->ani[i].spurImmunityLevel = ZM_HAL_ANI_SPUR_IMMUNE_LVL;
111 HpPriv->ani[i].firstepLevel = ZM_HAL_ANI_FIRSTEP_LVL; 109 HpPriv->ani[i].firstepLevel = ZM_HAL_ANI_FIRSTEP_LVL;
112 if (HpPriv->hasHwPhyCounters) 110 if (HpPriv->hasHwPhyCounters) {
113 {
114 HpPriv->ani[i].ofdmPhyErrBase = 0;//AR_PHY_COUNTMAX - ZM_HAL_ANI_OFDM_TRIG_HIGH; 111 HpPriv->ani[i].ofdmPhyErrBase = 0;//AR_PHY_COUNTMAX - ZM_HAL_ANI_OFDM_TRIG_HIGH;
115 HpPriv->ani[i].cckPhyErrBase = 0;//AR_PHY_COUNTMAX - ZM_HAL_ANI_CCK_TRIG_HIGH; 112 HpPriv->ani[i].cckPhyErrBase = 0;//AR_PHY_COUNTMAX - ZM_HAL_ANI_CCK_TRIG_HIGH;
116 } 113 }
117 } 114 }
118 if (HpPriv->hasHwPhyCounters) 115 if (HpPriv->hasHwPhyCounters) {
119 {
120 //zm_debug_msg2("Setting OfdmErrBase = 0x", HpPriv->ani[0].ofdmPhyErrBase); 116 //zm_debug_msg2("Setting OfdmErrBase = 0x", HpPriv->ani[0].ofdmPhyErrBase);
121 //zm_debug_msg2("Setting cckErrBase = 0x", HpPriv->ani[0].cckPhyErrBase); 117 //zm_debug_msg2("Setting cckErrBase = 0x", HpPriv->ani[0].cckPhyErrBase);
122 //OS_REG_WRITE(ah, AR_PHY_ERR_1, HpPriv->ani[0].ofdmPhyErrBase); 118 //OS_REG_WRITE(ah, AR_PHY_ERR_1, HpPriv->ani[0].ofdmPhyErrBase);
@@ -135,7 +131,7 @@ void zfHpAniAttach(zdev_t* dev)
135/* 131/*
136 * Control Adaptive Noise Immunity Parameters 132 * Control Adaptive Noise Immunity Parameters
137 */ 133 */
138u8_t zfHpAniControl(zdev_t* dev, ZM_HAL_ANI_CMD cmd, int param) 134u8_t zfHpAniControl(zdev_t *dev, ZM_HAL_ANI_CMD cmd, int param)
139{ 135{
140#define N(a) (sizeof(a)/sizeof(a[0])) 136#define N(a) (sizeof(a)/sizeof(a[0]))
141 typedef s32_t TABLE[]; 137 typedef s32_t TABLE[];
@@ -143,7 +139,7 @@ u8_t zfHpAniControl(zdev_t* dev, ZM_HAL_ANI_CMD cmd, int param)
143 struct zsAniState *aniState; 139 struct zsAniState *aniState;
144 140
145 zmw_get_wlan_dev(dev); 141 zmw_get_wlan_dev(dev);
146 HpPriv = (struct zsHpPriv*)wd->hpPrivate; 142 HpPriv = (struct zsHpPriv *)wd->hpPrivate;
147 aniState = HpPriv->curani; 143 aniState = HpPriv->curani;
148 144
149 switch (cmd) 145 switch (cmd)
@@ -152,8 +148,7 @@ u8_t zfHpAniControl(zdev_t* dev, ZM_HAL_ANI_CMD cmd, int param)
152 { 148 {
153 u32_t level = param; 149 u32_t level = param;
154 150
155 if (level >= N(HpPriv->totalSizeDesired)) 151 if (level >= N(HpPriv->totalSizeDesired)) {
156 {
157 zm_debug_msg1("level out of range, desired level : ", level); 152 zm_debug_msg1("level out of range, desired level : ", level);
158 zm_debug_msg1("max level : ", N(HpPriv->totalSizeDesired)); 153 zm_debug_msg1("max level : ", N(HpPriv->totalSizeDesired));
159 return FALSE; 154 return FALSE;
diff --git a/drivers/staging/otus/hal/hpani.h b/drivers/staging/otus/hal/hpani.h
index 96e69af3c685..b89241371ab1 100644
--- a/drivers/staging/otus/hal/hpani.h
+++ b/drivers/staging/otus/hal/hpani.h
@@ -99,8 +99,8 @@ typedef enum {
99 ZM_HAL_ANI_PHYERR_RESET, /* reset phy error stats */ 99 ZM_HAL_ANI_PHYERR_RESET, /* reset phy error stats */
100} ZM_HAL_ANI_CMD; 100} ZM_HAL_ANI_CMD;
101 101
102#define AR_PHY_COUNTMAX (3 << 22) // Max counted before intr 102#define AR_PHY_COUNTMAX (3 << 22) /* Max counted before intr */
103#define ZM_HAL_PROCESS_ANI 0x00000001 /* ANI state setup */ 103#define ZM_HAL_PROCESS_ANI 0x00000001 /* ANI state setup */
104#define ZM_RSSI_DUMMY_MARKER 0x127 104#define ZM_RSSI_DUMMY_MARKER 0x127
105 105
106/* PHY registers in ar5416, related base and register offsets 106/* PHY registers in ar5416, related base and register offsets
@@ -353,7 +353,7 @@ typedef enum {
353#define AR_PHY_CCK_DETECT 0x1C6208 353#define AR_PHY_CCK_DETECT 0x1C6208
354#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F 354#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F
355#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S 0 355#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK_S 0
356#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0 // [12:6] settling time for antenna switch 356#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME 0x00001FC0 /* [12:6] settling time for antenna switch */
357#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S 6 357#define AR_PHY_CCK_DETECT_ANT_SWITCH_TIME_S 6
358#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV 0x2000 358#define AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV 0x2000
359 359
@@ -392,7 +392,6 @@ typedef enum {
392#define AR_PHY_TPCRG1_PD_GAIN_2_S 18 392#define AR_PHY_TPCRG1_PD_GAIN_2_S 18
393#define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000 393#define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000
394#define AR_PHY_TPCRG1_PD_GAIN_3_S 20 394#define AR_PHY_TPCRG1_PD_GAIN_3_S 20
395//
396 395
397#define AR_PHY_ANALOG_SWAP 0xa268 396#define AR_PHY_ANALOG_SWAP 0xa268
398#define AR_PHY_SWAP_ALT_CHAIN 0x00000040 397#define AR_PHY_SWAP_ALT_CHAIN 0x00000040
diff --git a/drivers/staging/otus/hal/hpfw2.c b/drivers/staging/otus/hal/hpfw2.c
index baceb0299765..17f405b5db17 100644
--- a/drivers/staging/otus/hal/hpfw2.c
+++ b/drivers/staging/otus/hal/hpfw2.c
@@ -1015,4 +1015,4 @@ const u32_t zcP2FwImage[] = {
10150x00000000, 0x00000000, 0x00000000, 0x00000000, 10150x00000000, 0x00000000, 0x00000000, 0x00000000,
10160x00000000, 0x00000000, 0x00000000, }; 10160x00000000, 0x00000000, 0x00000000, };
1017 1017
1018const u32_t zcP2FwImageSize=15964; 1018const u32_t zcP2FwImageSize = 15964;
diff --git a/drivers/staging/otus/hal/hpfwu.c b/drivers/staging/otus/hal/hpfwu.c
index 2b77cbacc6d6..68fabef180af 100644
--- a/drivers/staging/otus/hal/hpfwu.c
+++ b/drivers/staging/otus/hal/hpfwu.c
@@ -1014,4 +1014,4 @@ const u32_t zcFwImage[] = {
10140x00000000, 0x00000000, 0x00000000, 0x00000000, 10140x00000000, 0x00000000, 0x00000000, 0x00000000,
1015}; 1015};
1016 1016
1017const u32_t zcFwImageSize=15936; 1017const u32_t zcFwImageSize = 15936;
diff --git a/drivers/staging/otus/hal/hpfwu_2k.c b/drivers/staging/otus/hal/hpfwu_2k.c
index 94e2caca5369..b675d6d556b2 100644
--- a/drivers/staging/otus/hal/hpfwu_2k.c
+++ b/drivers/staging/otus/hal/hpfwu_2k.c
@@ -1013,4 +1013,4 @@ const u32_t zcFwImage[] = {
10130x00000000, 0x00000000, 0x00000000, 0x00000000, 10130x00000000, 0x00000000, 0x00000000, 0x00000000,
10140x00000000, 0x00000000, }; 10140x00000000, 0x00000000, };
1015 1015
1016const u32_t zcFwImageSize=15928; 1016const u32_t zcFwImageSize = 15928;
diff --git a/drivers/staging/otus/hal/hpfwu_BA.c b/drivers/staging/otus/hal/hpfwu_BA.c
index 0c741571f2b5..f89419b37431 100644
--- a/drivers/staging/otus/hal/hpfwu_BA.c
+++ b/drivers/staging/otus/hal/hpfwu_BA.c
@@ -871,4 +871,4 @@ const u32_t zcFwImage[] = {
8710x00000000, 0x00000000, 0x00000000, 0x00000000, 8710x00000000, 0x00000000, 0x00000000, 0x00000000,
8720x00000000, 0x00000000, }; 8720x00000000, 0x00000000, };
873 873
874const u32_t zcFwImageSize=13656; 874const u32_t zcFwImageSize = 13656;
diff --git a/drivers/staging/otus/hal/hpfwu_OTUS_RC.c b/drivers/staging/otus/hal/hpfwu_OTUS_RC.c
index 089d3e0ad853..accbec4369f7 100644
--- a/drivers/staging/otus/hal/hpfwu_OTUS_RC.c
+++ b/drivers/staging/otus/hal/hpfwu_OTUS_RC.c
@@ -712,4 +712,4 @@ const u32_t zcFwImage[] = {
7120x00000000, 0x00000000, 0x00000000, 0x00000000, 7120x00000000, 0x00000000, 0x00000000, 0x00000000,
713}; 713};
714 714
715const u32_t zcFwImageSize=11104; 715const u32_t zcFwImageSize = 11104;
diff --git a/drivers/staging/otus/hal/hpfwuinit.c b/drivers/staging/otus/hal/hpfwuinit.c
index ed80ffafaffc..5d0dccca080c 100644
--- a/drivers/staging/otus/hal/hpfwuinit.c
+++ b/drivers/staging/otus/hal/hpfwuinit.c
@@ -237,4 +237,4 @@ const u32_t zcFwImage[] = {
2370x45485441, 0x38731652, 0x89ACFF91, 0xEE55D178, 2370x45485441, 0x38731652, 0x89ACFF91, 0xEE55D178,
2380xEE000D0A, }; 2380xEE000D0A, };
239 239
240const u32_t zcFwImageSize=3508; 240const u32_t zcFwImageSize = 3508;
diff --git a/drivers/staging/otus/hal/hpmain.c b/drivers/staging/otus/hal/hpmain.c
index 8dff5b97dfe3..5f412e020457 100644
--- a/drivers/staging/otus/hal/hpmain.c
+++ b/drivers/staging/otus/hal/hpmain.c
@@ -142,8 +142,9 @@ u16_t zfHpInit(zdev_t* dev, u32_t frequency)
142 if (wd->modeMDKEnable) 142 if (wd->modeMDKEnable)
143 { 143 {
144 /* download the MDK firmware */ 144 /* download the MDK firmware */
145 if ((ret = zfFirmwareDownload(dev, (u32_t*)zcDKFwImage, 145 ret = zfFirmwareDownload(dev, (u32_t*)zcDKFwImage,
146 (u32_t)zcDKFwImageSize, ZM_FIRMWARE_WLAN_ADDR)) != ZM_SUCCESS) 146 (u32_t)zcDKFwImageSize, ZM_FIRMWARE_WLAN_ADDR);
147 if (ret != ZM_SUCCESS)
147 { 148 {
148 /* TODO : exception handling */ 149 /* TODO : exception handling */
149 //return 1; 150 //return 1;
@@ -153,8 +154,9 @@ u16_t zfHpInit(zdev_t* dev, u32_t frequency)
153 { 154 {
154 #ifndef ZM_OTUS_LINUX_PHASE_2 155 #ifndef ZM_OTUS_LINUX_PHASE_2
155 /* download the normal firmware */ 156 /* download the normal firmware */
156 if ((ret = zfFirmwareDownload(dev, (u32_t*)zcFwImage, 157 ret = zfFirmwareDownload(dev, (u32_t*)zcFwImage,
157 (u32_t)zcFwImageSize, ZM_FIRMWARE_WLAN_ADDR)) != ZM_SUCCESS) 158 (u32_t)zcFwImageSize, ZM_FIRMWARE_WLAN_ADDR);
159 if (ret != ZM_SUCCESS)
158 { 160 {
159 /* TODO : exception handling */ 161 /* TODO : exception handling */
160 //return 1; 162 //return 1;
@@ -162,16 +164,18 @@ u16_t zfHpInit(zdev_t* dev, u32_t frequency)
162 #else 164 #else
163 165
164 // 1-PH fw: ReadMac() store some global variable 166 // 1-PH fw: ReadMac() store some global variable
165 if ((ret = zfFirmwareDownloadNotJump(dev, (u32_t*)zcFwBufImage, 167 ret = zfFirmwareDownloadNotJump(dev, (u32_t*)zcFwBufImage,
166 (u32_t)zcFwBufImageSize, 0x102800)) != ZM_SUCCESS) 168 (u32_t)zcFwBufImageSize, 0x102800);
169 if (ret != ZM_SUCCESS)
167 { 170 {
168 DbgPrint("Dl zcFwBufImage failed!"); 171 DbgPrint("Dl zcFwBufImage failed!");
169 } 172 }
170 173
171 zfwSleep(dev, 1000); 174 zfwSleep(dev, 1000);
172 175
173 if ((ret = zfFirmwareDownload(dev, (u32_t*)zcFwImage, 176 ret = zfFirmwareDownload(dev, (u32_t*)zcFwImage,
174 (u32_t)zcFwImageSize, ZM_FIRMWARE_WLAN_ADDR)) != ZM_SUCCESS) 177 (u32_t)zcFwImageSize, ZM_FIRMWARE_WLAN_ADDR);
178 if (ret != ZM_SUCCESS)
175 { 179 {
176 DbgPrint("Dl zcFwBufImage failed!"); 180 DbgPrint("Dl zcFwBufImage failed!");
177 } 181 }
@@ -249,15 +253,17 @@ u16_t zfHpReinit(zdev_t* dev, u32_t frequency)
249 253
250 #ifndef ZM_OTUS_LINUX_PHASE_2 254 #ifndef ZM_OTUS_LINUX_PHASE_2
251 /* Download firmware */ 255 /* Download firmware */
252 if ((ret = zfFirmwareDownload(dev, (u32_t*)zcFwImage, 256 ret = zfFirmwareDownload(dev, (u32_t*)zcFwImage,
253 (u32_t)zcFwImageSize, ZM_FIRMWARE_WLAN_ADDR)) != ZM_SUCCESS) 257 (u32_t)zcFwImageSize, ZM_FIRMWARE_WLAN_ADDR);
258 if (ret != ZM_SUCCESS)
254 { 259 {
255 /* TODO : exception handling */ 260 /* TODO : exception handling */
256 //return 1; 261 //return 1;
257 } 262 }
258 #else 263 #else
259 if ((ret = zfFirmwareDownload(dev, (u32_t*)zcP2FwImage, 264 ret = zfFirmwareDownload(dev, (u32_t*)zcP2FwImage,
260 (u32_t)zcP2FwImageSize, ZM_FIRMWARE_WLAN_ADDR)) != ZM_SUCCESS) 265 (u32_t)zcP2FwImageSize, ZM_FIRMWARE_WLAN_ADDR);
266 if (ret != ZM_SUCCESS)
261 { 267 {
262 /* TODO : exception handling */ 268 /* TODO : exception handling */
263 //return 1; 269 //return 1;
diff --git a/drivers/staging/otus/hal/hpreg.c b/drivers/staging/otus/hal/hpreg.c
index 178777c09dbd..da3b77433874 100644
--- a/drivers/staging/otus/hal/hpreg.c
+++ b/drivers/staging/otus/hal/hpreg.c
@@ -30,7 +30,7 @@
30#include "hpusb.h" 30#include "hpusb.h"
31 31
32/* used throughout this file... */ 32/* used throughout this file... */
33#define N(a) (sizeof (a) / sizeof (a[0])) 33#define N(a) (sizeof(a) / sizeof(a[0]))
34 34
35#define HAL_MODE_11A_TURBO HAL_MODE_108A 35#define HAL_MODE_11A_TURBO HAL_MODE_108A
36#define HAL_MODE_11G_TURBO HAL_MODE_108G 36#define HAL_MODE_11G_TURBO HAL_MODE_108G
@@ -78,7 +78,7 @@ enum {
78}; 78};
79 79
80#define MKK5GHZ_FLAG1 (DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS) 80#define MKK5GHZ_FLAG1 (DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS)
81#define MKK5GHZ_FLAG2 (DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC| LIMIT_FRAME_4MS) 81#define MKK5GHZ_FLAG2 (DISALLOW_ADHOC_11A | DISALLOW_ADHOC_11A_TURB | NEED_NFC | LIMIT_FRAME_4MS)
82 82
83typedef enum { 83typedef enum {
84 DFS_UNINIT_DOMAIN = 0, /* Uninitialized dfs domain */ 84 DFS_UNINIT_DOMAIN = 0, /* Uninitialized dfs domain */
@@ -272,7 +272,7 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = {
272 /* MKK4 */ 272 /* MKK4 */
273 {MKK4_MKKB, MKK4, MKKA, MKK5GHZ_FLAG2, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN10 }, 273 {MKK4_MKKB, MKK4, MKKA, MKK5GHZ_FLAG2, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA | PSCAN_MKKA_G, CTRY_JAPAN10 },
274 {MKK4_MKKA1, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN28 }, 274 {MKK4_MKKA1, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN28 },
275 {MKK4_MKKA2, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 |PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11 }, 275 {MKK4_MKKA2, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN11 },
276 {MKK4_MKKC, MKK4, MKKC, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3, CTRY_JAPAN12 }, 276 {MKK4_MKKC, MKK4, MKKC, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3, CTRY_JAPAN12 },
277 {MKK4_FCCA, MKK4, FCCA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN29 }, 277 {MKK4_FCCA, MKK4, FCCA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN29 },
278 {MKK4_MKKA, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA, CTRY_JAPAN36 }, 278 {MKK4_MKKA, MKK4, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK3 | PSCAN_MKKA, CTRY_JAPAN36 },
@@ -301,7 +301,7 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = {
301 {MKK8_MKKA2, MKK8, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN23 }, 301 {MKK8_MKKA2, MKK8, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 | PSCAN_MKKA2 | PSCAN_MKKA2_G, CTRY_JAPAN23 },
302 {MKK8_MKKC, MKK8, MKKC, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 , CTRY_JAPAN24 }, 302 {MKK8_MKKC, MKK8, MKKC, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKK1 | PSCAN_MKK3 , CTRY_JAPAN24 },
303 303
304 /* MKK9 */ 304 /* MKK9 */
305 {MKK9_MKKA, MKK9, MKKA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN34 }, 305 {MKK9_MKKA, MKK9, MKKA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN34 },
306 {MKK9_FCCA, MKK9, FCCA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN37 }, 306 {MKK9_FCCA, MKK9, FCCA, MKK5GHZ_FLAG1, NEED_NFC, NO_PSCAN, CTRY_JAPAN37 },
307 {MKK9_MKKA1, MKK9, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN38 }, 307 {MKK9_MKKA1, MKK9, MKKA, MKK5GHZ_FLAG1, NEED_NFC, PSCAN_MKKA1 | PSCAN_MKKA1_G, CTRY_JAPAN38 },
@@ -359,7 +359,7 @@ static REG_DMN_PAIR_MAPPING regDomainPairs[] = {
359#define COUNTRY_CODE_MASK 0x03ff 359#define COUNTRY_CODE_MASK 0x03ff
360#define CF_INTERFERENCE (CHANNEL_CW_INT | CHANNEL_RADAR_INT) 360#define CF_INTERFERENCE (CHANNEL_CW_INT | CHANNEL_RADAR_INT)
361#define CHANNEL_14 (2484) /* 802.11g operation is not permitted on channel 14 */ 361#define CHANNEL_14 (2484) /* 802.11g operation is not permitted on channel 14 */
362#define IS_11G_CH14(_ch,_cf) \ 362#define IS_11G_CH14(_ch, _cf) \
363 (((_ch) == CHANNEL_14) && ((_cf) == CHANNEL_G)) 363 (((_ch) == CHANNEL_14) && ((_cf) == CHANNEL_G))
364 364
365#define YES TRUE 365#define YES TRUE
@@ -373,183 +373,183 @@ enum {
373typedef struct { 373typedef struct {
374 HAL_CTRY_CODE countryCode; 374 HAL_CTRY_CODE countryCode;
375 HAL_REG_DOMAIN regDmnEnum; 375 HAL_REG_DOMAIN regDmnEnum;
376 const char* isoName; 376 const char *isoName;
377 const char* name; 377 const char *name;
378 HAL_BOOL allow11g; 378 HAL_BOOL allow11g;
379 HAL_BOOL allow11aTurbo; 379 HAL_BOOL allow11aTurbo;
380 HAL_BOOL allow11gTurbo; 380 HAL_BOOL allow11gTurbo;
381 HAL_BOOL allow11na; /* HT-40 allowed in 5GHz? */ 381 HAL_BOOL allow11na; /* HT-40 allowed in 5GHz? */
382 HAL_BOOL allow11ng; /* HT-40 allowed in 2GHz? */ 382 HAL_BOOL allow11ng; /* HT-40 allowed in 2GHz? */
383 u16_t outdoorChanStart; 383 u16_t outdoorChanStart;
384} COUNTRY_CODE_TO_ENUM_RD; 384} COUNTRY_CODE_TO_ENUM_RD;
385 385
386static COUNTRY_CODE_TO_ENUM_RD allCountries[] = { 386static COUNTRY_CODE_TO_ENUM_RD allCountries[] = {
387 {CTRY_DEBUG, NO_ENUMRD, "DB", "DEBUG", YES, YES, YES, YES, YES, 7000 }, 387 {CTRY_DEBUG, NO_ENUMRD, "DB", "DEBUG", YES, YES, YES, YES, YES, 7000 },
388 {CTRY_DEFAULT, DEF_REGDMN, "NA", "NO_COUNTRY_SET", YES, YES, YES, YES, YES, 7000 }, 388 {CTRY_DEFAULT, DEF_REGDMN, "NA", "NO_COUNTRY_SET", YES, YES, YES, YES, YES, 7000 },
389 {CTRY_ALBANIA, NULL1_WORLD, "AL", "ALBANIA", YES, NO, YES, NO, YES, 7000 }, 389 {CTRY_ALBANIA, NULL1_WORLD, "AL", "ALBANIA", YES, NO, YES, NO, YES, 7000 },
390 {CTRY_ALGERIA, NULL1_WORLD, "DZ", "ALGERIA", YES, NO, YES, NO, YES, 7000 }, 390 {CTRY_ALGERIA, NULL1_WORLD, "DZ", "ALGERIA", YES, NO, YES, NO, YES, 7000 },
391 {CTRY_ARGENTINA, APL3_WORLD, "AR", "ARGENTINA", YES, NO, NO, NO, NO, 7000 }, 391 {CTRY_ARGENTINA, APL3_WORLD, "AR", "ARGENTINA", YES, NO, NO, NO, NO, 7000 },
392 {CTRY_ARMENIA, ETSI4_WORLD, "AM", "ARMENIA", YES, NO, YES, NO, YES, 7000 }, 392 {CTRY_ARMENIA, ETSI4_WORLD, "AM", "ARMENIA", YES, NO, YES, NO, YES, 7000 },
393 {CTRY_AUSTRALIA, FCC6_WORLD, "AU", "AUSTRALIA", YES, YES, YES, YES, YES, 7000 }, 393 {CTRY_AUSTRALIA, FCC6_WORLD, "AU", "AUSTRALIA", YES, YES, YES, YES, YES, 7000 },
394 {CTRY_AUSTRIA, ETSI2_WORLD, "AT", "AUSTRIA", YES, NO, YES, YES, YES, 7000 }, 394 {CTRY_AUSTRIA, ETSI2_WORLD, "AT", "AUSTRIA", YES, NO, YES, YES, YES, 7000 },
395 {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ", "AZERBAIJAN", YES, YES, YES, YES, YES, 7000 }, 395 {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ", "AZERBAIJAN", YES, YES, YES, YES, YES, 7000 },
396 {CTRY_BAHRAIN, APL6_WORLD, "BH", "BAHRAIN", YES, NO, YES, NO, YES, 7000 }, 396 {CTRY_BAHRAIN, APL6_WORLD, "BH", "BAHRAIN", YES, NO, YES, NO, YES, 7000 },
397 {CTRY_BELARUS, ETSI1_WORLD, "BY", "BELARUS", YES, NO, YES, YES, YES, 7000 }, 397 {CTRY_BELARUS, ETSI1_WORLD, "BY", "BELARUS", YES, NO, YES, YES, YES, 7000 },
398 {CTRY_BELGIUM, ETSI1_WORLD, "BE", "BELGIUM", YES, NO, YES, YES, YES, 7000 }, 398 {CTRY_BELGIUM, ETSI1_WORLD, "BE", "BELGIUM", YES, NO, YES, YES, YES, 7000 },
399 {CTRY_BELIZE, APL1_ETSIC, "BZ", "BELIZE", YES, YES, YES, YES, YES, 7000 }, 399 {CTRY_BELIZE, APL1_ETSIC, "BZ", "BELIZE", YES, YES, YES, YES, YES, 7000 },
400 {CTRY_BOLIVIA, APL1_ETSIC, "BO", "BOLVIA", YES, YES, YES, YES, YES, 7000 }, 400 {CTRY_BOLIVIA, APL1_ETSIC, "BO", "BOLVIA", YES, YES, YES, YES, YES, 7000 },
401 {CTRY_BRAZIL, FCC3_WORLD, "BR", "BRAZIL", NO, NO, NO, NO, NO, 7000 }, 401 {CTRY_BRAZIL, FCC3_WORLD, "BR", "BRAZIL", NO, NO, NO, NO, NO, 7000 },
402 {CTRY_BRUNEI_DARUSSALAM,APL1_WORLD,"BN", "BRUNEI DARUSSALAM", YES, YES, YES, YES, YES, 7000 }, 402 {CTRY_BRUNEI_DARUSSALAM, APL1_WORLD, "BN", "BRUNEI DARUSSALAM", YES, YES, YES, YES, YES, 7000 },
403 {CTRY_BULGARIA, ETSI6_WORLD, "BG", "BULGARIA", YES, NO, YES, YES, YES, 7000 }, 403 {CTRY_BULGARIA, ETSI6_WORLD, "BG", "BULGARIA", YES, NO, YES, YES, YES, 7000 },
404 {CTRY_CANADA, FCC6_FCCA, "CA", "CANADA", YES, YES, YES, YES, YES, 7000 }, 404 {CTRY_CANADA, FCC6_FCCA, "CA", "CANADA", YES, YES, YES, YES, YES, 7000 },
405 {CTRY_CHILE, APL6_WORLD, "CL", "CHILE", YES, YES, YES, YES, YES, 7000 }, 405 {CTRY_CHILE, APL6_WORLD, "CL", "CHILE", YES, YES, YES, YES, YES, 7000 },
406 {CTRY_CHINA, APL1_WORLD, "CN", "CHINA", YES, YES, YES, YES, YES, 7000 }, 406 {CTRY_CHINA, APL1_WORLD, "CN", "CHINA", YES, YES, YES, YES, YES, 7000 },
407 {CTRY_COLOMBIA, FCC1_FCCA, "CO", "COLOMBIA", YES, NO, YES, NO, YES, 7000 }, 407 {CTRY_COLOMBIA, FCC1_FCCA, "CO", "COLOMBIA", YES, NO, YES, NO, YES, 7000 },
408 {CTRY_COSTA_RICA, FCC1_WORLD, "CR", "COSTA RICA", YES, NO, YES, NO, YES, 7000 }, 408 {CTRY_COSTA_RICA, FCC1_WORLD, "CR", "COSTA RICA", YES, NO, YES, NO, YES, 7000 },
409 {CTRY_CROATIA, ETSI3_WORLD, "HR", "CROATIA", YES, NO, YES, NO, YES, 7000 }, 409 {CTRY_CROATIA, ETSI3_WORLD, "HR", "CROATIA", YES, NO, YES, NO, YES, 7000 },
410 {CTRY_CYPRUS, ETSI3_WORLD, "CY", "CYPRUS", YES, YES, YES, YES, YES, 7000 }, 410 {CTRY_CYPRUS, ETSI3_WORLD, "CY", "CYPRUS", YES, YES, YES, YES, YES, 7000 },
411 {CTRY_CZECH, ETSI3_WORLD, "CZ", "CZECH REPUBLIC", YES, NO, YES, YES, YES, 7000 }, 411 {CTRY_CZECH, ETSI3_WORLD, "CZ", "CZECH REPUBLIC", YES, NO, YES, YES, YES, 7000 },
412 {CTRY_DENMARK, ETSI1_WORLD, "DK", "DENMARK", YES, NO, YES, YES, YES, 7000 }, 412 {CTRY_DENMARK, ETSI1_WORLD, "DK", "DENMARK", YES, NO, YES, YES, YES, 7000 },
413 {CTRY_DOMINICAN_REPUBLIC,FCC1_FCCA,"DO", "DOMINICAN REPUBLIC", YES, YES, YES, YES, YES, 7000 }, 413 {CTRY_DOMINICAN_REPUBLIC, FCC1_FCCA, "DO", "DOMINICAN REPUBLIC", YES, YES, YES, YES, YES, 7000 },
414 {CTRY_ECUADOR, FCC1_WORLD, "EC", "ECUADOR", YES, NO, NO, NO, YES, 7000 }, 414 {CTRY_ECUADOR, FCC1_WORLD, "EC", "ECUADOR", YES, NO, NO, NO, YES, 7000 },
415 {CTRY_EGYPT, ETSI3_WORLD, "EG", "EGYPT", YES, NO, YES, NO, YES, 7000 }, 415 {CTRY_EGYPT, ETSI3_WORLD, "EG", "EGYPT", YES, NO, YES, NO, YES, 7000 },
416 {CTRY_EL_SALVADOR, FCC1_WORLD, "SV", "EL SALVADOR", YES, NO, YES, NO, YES, 7000 }, 416 {CTRY_EL_SALVADOR, FCC1_WORLD, "SV", "EL SALVADOR", YES, NO, YES, NO, YES, 7000 },
417 {CTRY_ESTONIA, ETSI1_WORLD, "EE", "ESTONIA", YES, NO, YES, YES, YES, 7000 }, 417 {CTRY_ESTONIA, ETSI1_WORLD, "EE", "ESTONIA", YES, NO, YES, YES, YES, 7000 },
418 {CTRY_FINLAND, ETSI1_WORLD, "FI", "FINLAND", YES, NO, YES, YES, YES, 7000 }, 418 {CTRY_FINLAND, ETSI1_WORLD, "FI", "FINLAND", YES, NO, YES, YES, YES, 7000 },
419 {CTRY_FRANCE, ETSI1_WORLD, "FR", "FRANCE", YES, NO, YES, YES, YES, 7000 }, 419 {CTRY_FRANCE, ETSI1_WORLD, "FR", "FRANCE", YES, NO, YES, YES, YES, 7000 },
420 {CTRY_FRANCE2, ETSI3_WORLD, "F2", "FRANCE_RES", YES, NO, YES, YES, YES, 7000 }, 420 {CTRY_FRANCE2, ETSI3_WORLD, "F2", "FRANCE_RES", YES, NO, YES, YES, YES, 7000 },
421 {CTRY_GEORGIA, ETSI4_WORLD, "GE", "GEORGIA", YES, YES, YES, YES, YES, 7000 }, 421 {CTRY_GEORGIA, ETSI4_WORLD, "GE", "GEORGIA", YES, YES, YES, YES, YES, 7000 },
422 {CTRY_GERMANY, ETSI1_WORLD, "DE", "GERMANY", YES, NO, YES, YES, YES, 7000 }, 422 {CTRY_GERMANY, ETSI1_WORLD, "DE", "GERMANY", YES, NO, YES, YES, YES, 7000 },
423 {CTRY_GREECE, ETSI1_WORLD, "GR", "GREECE", YES, NO, YES, YES, YES, 7000 }, 423 {CTRY_GREECE, ETSI1_WORLD, "GR", "GREECE", YES, NO, YES, YES, YES, 7000 },
424 {CTRY_GUATEMALA, FCC1_FCCA, "GT", "GUATEMALA", YES, YES, YES, YES, YES, 7000 }, 424 {CTRY_GUATEMALA, FCC1_FCCA, "GT", "GUATEMALA", YES, YES, YES, YES, YES, 7000 },
425 {CTRY_HONDURAS, NULL1_WORLD, "HN", "HONDURAS", YES, NO, YES, NO, YES, 7000 }, 425 {CTRY_HONDURAS, NULL1_WORLD, "HN", "HONDURAS", YES, NO, YES, NO, YES, 7000 },
426 {CTRY_HONG_KONG, FCC2_WORLD, "HK", "HONG KONG", YES, YES, YES, YES, YES, 7000 }, 426 {CTRY_HONG_KONG, FCC2_WORLD, "HK", "HONG KONG", YES, YES, YES, YES, YES, 7000 },
427 {CTRY_HUNGARY, ETSI4_WORLD, "HU", "HUNGARY", YES, NO, YES, YES, YES, 7000 }, 427 {CTRY_HUNGARY, ETSI4_WORLD, "HU", "HUNGARY", YES, NO, YES, YES, YES, 7000 },
428 {CTRY_ICELAND, ETSI1_WORLD, "IS", "ICELAND", YES, NO, YES, YES, YES, 7000 }, 428 {CTRY_ICELAND, ETSI1_WORLD, "IS", "ICELAND", YES, NO, YES, YES, YES, 7000 },
429 {CTRY_INDIA, APL6_WORLD, "IN", "INDIA", YES, NO, YES, NO, YES, 7000 }, 429 {CTRY_INDIA, APL6_WORLD, "IN", "INDIA", YES, NO, YES, NO, YES, 7000 },
430 {CTRY_INDONESIA, APL1_WORLD, "ID", "INDONESIA", YES, NO, YES, NO, YES, 7000 }, 430 {CTRY_INDONESIA, APL1_WORLD, "ID", "INDONESIA", YES, NO, YES, NO, YES, 7000 },
431 {CTRY_IRAN, APL1_WORLD, "IR", "IRAN", YES, YES, YES, YES, YES, 7000 }, 431 {CTRY_IRAN, APL1_WORLD, "IR", "IRAN", YES, YES, YES, YES, YES, 7000 },
432 {CTRY_IRELAND, ETSI1_WORLD, "IE", "IRELAND", YES, NO, YES, YES, YES, 7000 }, 432 {CTRY_IRELAND, ETSI1_WORLD, "IE", "IRELAND", YES, NO, YES, YES, YES, 7000 },
433 {CTRY_ISRAEL, ETSI3_WORLD, "IL", "ISRAEL", YES, NO, YES, NO, YES, 7000 }, 433 {CTRY_ISRAEL, ETSI3_WORLD, "IL", "ISRAEL", YES, NO, YES, NO, YES, 7000 },
434 {CTRY_ISRAEL2, NULL1_ETSIB, "ISR","ISRAEL_RES", YES, NO, YES, NO, YES, 7000 }, 434 {CTRY_ISRAEL2, NULL1_ETSIB, "ISR", "ISRAEL_RES", YES, NO, YES, NO, YES, 7000 },
435 {CTRY_ITALY, ETSI1_WORLD, "IT", "ITALY", YES, NO, YES, YES, YES, 7000 }, 435 {CTRY_ITALY, ETSI1_WORLD, "IT", "ITALY", YES, NO, YES, YES, YES, 7000 },
436 {CTRY_JAMAICA, ETSI1_WORLD, "JM", "JAMAICA", YES, NO, YES, YES, YES, 7000 }, 436 {CTRY_JAMAICA, ETSI1_WORLD, "JM", "JAMAICA", YES, NO, YES, YES, YES, 7000 },
437 {CTRY_JAPAN, MKK1_MKKA, "JP", "JAPAN", YES, NO, NO, NO, NO, 7000 }, 437 {CTRY_JAPAN, MKK1_MKKA, "JP", "JAPAN", YES, NO, NO, NO, NO, 7000 },
438 {CTRY_JAPAN1, MKK1_MKKB, "J1", "JAPAN1", YES, NO, NO, NO, NO, 7000 }, 438 {CTRY_JAPAN1, MKK1_MKKB, "J1", "JAPAN1", YES, NO, NO, NO, NO, 7000 },
439 {CTRY_JAPAN2, MKK1_FCCA, "J2", "JAPAN2", YES, NO, NO, NO, NO, 7000 }, 439 {CTRY_JAPAN2, MKK1_FCCA, "J2", "JAPAN2", YES, NO, NO, NO, NO, 7000 },
440 {CTRY_JAPAN3, MKK2_MKKA, "J3", "JAPAN3", YES, NO, NO, NO, NO, 7000 }, 440 {CTRY_JAPAN3, MKK2_MKKA, "J3", "JAPAN3", YES, NO, NO, NO, NO, 7000 },
441 {CTRY_JAPAN4, MKK1_MKKA1, "J4", "JAPAN4", YES, NO, NO, NO, NO, 7000 }, 441 {CTRY_JAPAN4, MKK1_MKKA1, "J4", "JAPAN4", YES, NO, NO, NO, NO, 7000 },
442 {CTRY_JAPAN5, MKK1_MKKA2, "J5", "JAPAN5", YES, NO, NO, NO, NO, 7000 }, 442 {CTRY_JAPAN5, MKK1_MKKA2, "J5", "JAPAN5", YES, NO, NO, NO, NO, 7000 },
443 {CTRY_JAPAN6, MKK1_MKKC, "J6", "JAPAN6", YES, NO, NO, NO, NO, 7000 }, 443 {CTRY_JAPAN6, MKK1_MKKC, "J6", "JAPAN6", YES, NO, NO, NO, NO, 7000 },
444 {CTRY_JAPAN7, MKK3_MKKB, "J7", "JAPAN7", YES, NO, NO, NO, NO, 7000 }, 444 {CTRY_JAPAN7, MKK3_MKKB, "J7", "JAPAN7", YES, NO, NO, NO, NO, 7000 },
445 {CTRY_JAPAN8, MKK3_MKKA2, "J8", "JAPAN8", YES, NO, NO, NO, NO, 7000 }, 445 {CTRY_JAPAN8, MKK3_MKKA2, "J8", "JAPAN8", YES, NO, NO, NO, NO, 7000 },
446 {CTRY_JAPAN9, MKK3_MKKC, "J9", "JAPAN9", YES, NO, NO, NO, NO, 7000 }, 446 {CTRY_JAPAN9, MKK3_MKKC, "J9", "JAPAN9", YES, NO, NO, NO, NO, 7000 },
447 {CTRY_JAPAN10, MKK4_MKKB, "J10", "JAPAN10", YES, NO, NO, NO, NO, 7000 }, 447 {CTRY_JAPAN10, MKK4_MKKB, "J10", "JAPAN10", YES, NO, NO, NO, NO, 7000 },
448 {CTRY_JAPAN11, MKK4_MKKA2, "J11", "JAPAN11", YES, NO, NO, NO, NO, 7000 }, 448 {CTRY_JAPAN11, MKK4_MKKA2, "J11", "JAPAN11", YES, NO, NO, NO, NO, 7000 },
449 {CTRY_JAPAN12, MKK4_MKKC, "J12", "JAPAN12", YES, NO, NO, NO, NO, 7000 }, 449 {CTRY_JAPAN12, MKK4_MKKC, "J12", "JAPAN12", YES, NO, NO, NO, NO, 7000 },
450 {CTRY_JAPAN13, MKK5_MKKB, "J13", "JAPAN13", YES, NO, NO, NO, NO, 7000 }, 450 {CTRY_JAPAN13, MKK5_MKKB, "J13", "JAPAN13", YES, NO, NO, NO, NO, 7000 },
451 {CTRY_JAPAN14, MKK5_MKKA2, "J14", "JAPAN14", YES, NO, NO, NO, NO, 7000 }, 451 {CTRY_JAPAN14, MKK5_MKKA2, "J14", "JAPAN14", YES, NO, NO, NO, NO, 7000 },
452 {CTRY_JAPAN15, MKK5_MKKC, "J15", "JAPAN15", YES, NO, NO, NO, NO, 7000 }, 452 {CTRY_JAPAN15, MKK5_MKKC, "J15", "JAPAN15", YES, NO, NO, NO, NO, 7000 },
453 {CTRY_JAPAN16, MKK6_MKKB, "J16", "JAPAN16", YES, NO, NO, NO, NO, 7000 }, 453 {CTRY_JAPAN16, MKK6_MKKB, "J16", "JAPAN16", YES, NO, NO, NO, NO, 7000 },
454 {CTRY_JAPAN17, MKK6_MKKA2, "J17", "JAPAN17", YES, NO, NO, NO, NO, 7000 }, 454 {CTRY_JAPAN17, MKK6_MKKA2, "J17", "JAPAN17", YES, NO, NO, NO, NO, 7000 },
455 {CTRY_JAPAN18, MKK6_MKKC, "J18", "JAPAN18", YES, NO, NO, NO, NO, 7000 }, 455 {CTRY_JAPAN18, MKK6_MKKC, "J18", "JAPAN18", YES, NO, NO, NO, NO, 7000 },
456 {CTRY_JAPAN19, MKK7_MKKB, "J19", "JAPAN19", YES, NO, NO, NO, NO, 7000 }, 456 {CTRY_JAPAN19, MKK7_MKKB, "J19", "JAPAN19", YES, NO, NO, NO, NO, 7000 },
457 {CTRY_JAPAN20, MKK7_MKKA, "J20", "JAPAN20", YES, NO, NO, NO, NO, 7000 }, 457 {CTRY_JAPAN20, MKK7_MKKA, "J20", "JAPAN20", YES, NO, NO, NO, NO, 7000 },
458 {CTRY_JAPAN21, MKK7_MKKC, "J21", "JAPAN21", YES, NO, NO, NO, NO, 7000 }, 458 {CTRY_JAPAN21, MKK7_MKKC, "J21", "JAPAN21", YES, NO, NO, NO, NO, 7000 },
459 {CTRY_JAPAN22, MKK8_MKKB, "J22", "JAPAN22", YES, NO, NO, NO, NO, 7000 }, 459 {CTRY_JAPAN22, MKK8_MKKB, "J22", "JAPAN22", YES, NO, NO, NO, NO, 7000 },
460 {CTRY_JAPAN23, MKK8_MKKA2, "J23", "JAPAN23", YES, NO, NO, NO, NO, 7000 }, 460 {CTRY_JAPAN23, MKK8_MKKA2, "J23", "JAPAN23", YES, NO, NO, NO, NO, 7000 },
461 {CTRY_JAPAN24, MKK8_MKKC, "J24", "JAPAN24", YES, NO, NO, NO, NO, 7000 }, 461 {CTRY_JAPAN24, MKK8_MKKC, "J24", "JAPAN24", YES, NO, NO, NO, NO, 7000 },
462 {CTRY_JAPAN25, MKK3_MKKA, "J25", "JAPAN25", YES, NO, NO, NO, NO, 7000 }, 462 {CTRY_JAPAN25, MKK3_MKKA, "J25", "JAPAN25", YES, NO, NO, NO, NO, 7000 },
463 {CTRY_JAPAN26, MKK3_MKKA1, "J26", "JAPAN26", YES, NO, NO, NO, NO, 7000 }, 463 {CTRY_JAPAN26, MKK3_MKKA1, "J26", "JAPAN26", YES, NO, NO, NO, NO, 7000 },
464 {CTRY_JAPAN27, MKK3_FCCA, "J27", "JAPAN27", YES, NO, NO, NO, NO, 7000 }, 464 {CTRY_JAPAN27, MKK3_FCCA, "J27", "JAPAN27", YES, NO, NO, NO, NO, 7000 },
465 {CTRY_JAPAN28, MKK4_MKKA1, "J28", "JAPAN28", YES, NO, NO, NO, NO, 7000 }, 465 {CTRY_JAPAN28, MKK4_MKKA1, "J28", "JAPAN28", YES, NO, NO, NO, NO, 7000 },
466 {CTRY_JAPAN29, MKK4_FCCA, "J29", "JAPAN29", YES, NO, NO, NO, NO, 7000 }, 466 {CTRY_JAPAN29, MKK4_FCCA, "J29", "JAPAN29", YES, NO, NO, NO, NO, 7000 },
467 {CTRY_JAPAN30, MKK6_MKKA1, "J30", "JAPAN30", YES, NO, NO, NO, NO, 7000 }, 467 {CTRY_JAPAN30, MKK6_MKKA1, "J30", "JAPAN30", YES, NO, NO, NO, NO, 7000 },
468 {CTRY_JAPAN31, MKK6_FCCA, "J31", "JAPAN31", YES, NO, NO, NO, NO, 7000 }, 468 {CTRY_JAPAN31, MKK6_FCCA, "J31", "JAPAN31", YES, NO, NO, NO, NO, 7000 },
469 {CTRY_JAPAN32, MKK7_MKKA1, "J32", "JAPAN32", YES, NO, NO, NO, NO, 7000 }, 469 {CTRY_JAPAN32, MKK7_MKKA1, "J32", "JAPAN32", YES, NO, NO, NO, NO, 7000 },
470 {CTRY_JAPAN33, MKK7_FCCA, "J33", "JAPAN33", YES, NO, NO, NO, NO, 7000 }, 470 {CTRY_JAPAN33, MKK7_FCCA, "J33", "JAPAN33", YES, NO, NO, NO, NO, 7000 },
471 {CTRY_JAPAN34, MKK9_MKKA, "J34", "JAPAN34", YES, NO, NO, NO, NO, 7000 }, 471 {CTRY_JAPAN34, MKK9_MKKA, "J34", "JAPAN34", YES, NO, NO, NO, NO, 7000 },
472 {CTRY_JAPAN35, MKK10_MKKA, "J35", "JAPAN35", YES, NO, NO, NO, NO, 7000 }, 472 {CTRY_JAPAN35, MKK10_MKKA, "J35", "JAPAN35", YES, NO, NO, NO, NO, 7000 },
473 {CTRY_JAPAN36, MKK4_MKKA, "J36", "JAPAN36", YES, NO, NO, NO, NO, 7000 }, 473 {CTRY_JAPAN36, MKK4_MKKA, "J36", "JAPAN36", YES, NO, NO, NO, NO, 7000 },
474 {CTRY_JAPAN37, MKK9_FCCA, "J37", "JAPAN37", YES, NO, NO, NO, NO, 7000 }, 474 {CTRY_JAPAN37, MKK9_FCCA, "J37", "JAPAN37", YES, NO, NO, NO, NO, 7000 },
475 {CTRY_JAPAN38, MKK9_MKKA1, "J38", "JAPAN38", YES, NO, NO, NO, NO, 7000 }, 475 {CTRY_JAPAN38, MKK9_MKKA1, "J38", "JAPAN38", YES, NO, NO, NO, NO, 7000 },
476 {CTRY_JAPAN39, MKK9_MKKC, "J39", "JAPAN39", YES, NO, NO, NO, NO, 7000 }, 476 {CTRY_JAPAN39, MKK9_MKKC, "J39", "JAPAN39", YES, NO, NO, NO, NO, 7000 },
477 {CTRY_JAPAN40, MKK10_MKKA2, "J40", "JAPAN40", YES, NO, NO, NO, NO, 7000 }, 477 {CTRY_JAPAN40, MKK10_MKKA2, "J40", "JAPAN40", YES, NO, NO, NO, NO, 7000 },
478 {CTRY_JAPAN41, MKK10_FCCA, "J41", "JAPAN41", YES, NO, NO, NO, NO, 7000 }, 478 {CTRY_JAPAN41, MKK10_FCCA, "J41", "JAPAN41", YES, NO, NO, NO, NO, 7000 },
479 {CTRY_JAPAN42, MKK10_MKKA1, "J42", "JAPAN42", YES, NO, NO, NO, NO, 7000 }, 479 {CTRY_JAPAN42, MKK10_MKKA1, "J42", "JAPAN42", YES, NO, NO, NO, NO, 7000 },
480 {CTRY_JAPAN43, MKK10_MKKC, "J43", "JAPAN43", YES, NO, NO, NO, NO, 7000 }, 480 {CTRY_JAPAN43, MKK10_MKKC, "J43", "JAPAN43", YES, NO, NO, NO, NO, 7000 },
481 {CTRY_JAPAN44, MKK10_MKKA2, "J44", "JAPAN44", YES, NO, NO, NO, NO, 7000 }, 481 {CTRY_JAPAN44, MKK10_MKKA2, "J44", "JAPAN44", YES, NO, NO, NO, NO, 7000 },
482 {CTRY_JAPAN45, MKK11_MKKA, "J45", "JAPAN45", YES, NO, NO, NO, NO, 7000 }, 482 {CTRY_JAPAN45, MKK11_MKKA, "J45", "JAPAN45", YES, NO, NO, NO, NO, 7000 },
483 {CTRY_JAPAN46, MKK11_FCCA, "J46", "JAPAN46", YES, NO, NO, NO, NO, 7000 }, 483 {CTRY_JAPAN46, MKK11_FCCA, "J46", "JAPAN46", YES, NO, NO, NO, NO, 7000 },
484 {CTRY_JAPAN47, MKK11_MKKA1, "J47", "JAPAN47", YES, NO, NO, NO, NO, 7000 }, 484 {CTRY_JAPAN47, MKK11_MKKA1, "J47", "JAPAN47", YES, NO, NO, NO, NO, 7000 },
485 {CTRY_JAPAN48, MKK11_MKKC, "J48", "JAPAN48", YES, NO, NO, NO, NO, 7000 }, 485 {CTRY_JAPAN48, MKK11_MKKC, "J48", "JAPAN48", YES, NO, NO, NO, NO, 7000 },
486 {CTRY_JAPAN49, MKK11_MKKA2, "J49", "JAPAN49", YES, NO, NO, NO, NO, 7000 }, 486 {CTRY_JAPAN49, MKK11_MKKA2, "J49", "JAPAN49", YES, NO, NO, NO, NO, 7000 },
487 {CTRY_JAPAN50, MKK12_MKKA, "J50", "JAPAN50", YES, NO, NO, NO, NO, 7000 }, 487 {CTRY_JAPAN50, MKK12_MKKA, "J50", "JAPAN50", YES, NO, NO, NO, NO, 7000 },
488 {CTRY_JAPAN51, MKK12_FCCA, "J51", "JAPAN51", YES, NO, NO, NO, NO, 7000 }, 488 {CTRY_JAPAN51, MKK12_FCCA, "J51", "JAPAN51", YES, NO, NO, NO, NO, 7000 },
489 {CTRY_JAPAN52, MKK12_MKKA1, "J52", "JAPAN52", YES, NO, NO, NO, NO, 7000 }, 489 {CTRY_JAPAN52, MKK12_MKKA1, "J52", "JAPAN52", YES, NO, NO, NO, NO, 7000 },
490 {CTRY_JAPAN53, MKK12_MKKC, "J53", "JAPAN53", YES, NO, NO, NO, NO, 7000 }, 490 {CTRY_JAPAN53, MKK12_MKKC, "J53", "JAPAN53", YES, NO, NO, NO, NO, 7000 },
491 {CTRY_JAPAN54, MKK12_MKKA2, "J54", "JAPAN54", YES, NO, NO, NO, NO, 7000 }, 491 {CTRY_JAPAN54, MKK12_MKKA2, "J54", "JAPAN54", YES, NO, NO, NO, NO, 7000 },
492 {CTRY_JORDAN, ETSI2_WORLD, "JO", "JORDAN", YES, NO, YES, NO, YES, 7000 }, 492 {CTRY_JORDAN, ETSI2_WORLD, "JO", "JORDAN", YES, NO, YES, NO, YES, 7000 },
493 {CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ", "KAZAKHSTAN", YES, NO, YES, NO, YES, 7000 }, 493 {CTRY_KAZAKHSTAN, NULL1_WORLD, "KZ", "KAZAKHSTAN", YES, NO, YES, NO, YES, 7000 },
494 {CTRY_KOREA_NORTH, APL9_WORLD, "KP", "NORTH KOREA", YES, NO, NO, YES, YES, 7000 }, 494 {CTRY_KOREA_NORTH, APL9_WORLD, "KP", "NORTH KOREA", YES, NO, NO, YES, YES, 7000 },
495 {CTRY_KOREA_ROC, APL9_WORLD, "KR", "KOREA REPUBLIC", YES, NO, NO, NO, NO, 7000 }, 495 {CTRY_KOREA_ROC, APL9_WORLD, "KR", "KOREA REPUBLIC", YES, NO, NO, NO, NO, 7000 },
496 {CTRY_KOREA_ROC2, APL2_APLD, "K2", "KOREA REPUBLIC2",YES, NO, NO, NO, NO, 7000 }, 496 {CTRY_KOREA_ROC2, APL2_APLD, "K2", "KOREA REPUBLIC2", YES, NO, NO, NO, NO, 7000 },
497 {CTRY_KOREA_ROC3, APL9_WORLD, "K3", "KOREA REPUBLIC3",YES, NO, NO, NO, NO, 7000 }, 497 {CTRY_KOREA_ROC3, APL9_WORLD, "K3", "KOREA REPUBLIC3", YES, NO, NO, NO, NO, 7000 },
498 {CTRY_KUWAIT, NULL1_WORLD, "KW", "KUWAIT", YES, NO, YES, NO, YES, 7000 }, 498 {CTRY_KUWAIT, NULL1_WORLD, "KW", "KUWAIT", YES, NO, YES, NO, YES, 7000 },
499 {CTRY_LATVIA, ETSI1_WORLD, "LV", "LATVIA", YES, NO, YES, YES, YES, 7000 }, 499 {CTRY_LATVIA, ETSI1_WORLD, "LV", "LATVIA", YES, NO, YES, YES, YES, 7000 },
500 {CTRY_LEBANON, NULL1_WORLD, "LB", "LEBANON", YES, NO, YES, NO, YES, 7000 }, 500 {CTRY_LEBANON, NULL1_WORLD, "LB", "LEBANON", YES, NO, YES, NO, YES, 7000 },
501 {CTRY_LIECHTENSTEIN,ETSI1_WORLD, "LI", "LIECHTENSTEIN", YES, NO, YES, YES, YES, 7000 }, 501 {CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI", "LIECHTENSTEIN", YES, NO, YES, YES, YES, 7000 },
502 {CTRY_LITHUANIA, ETSI1_WORLD, "LT", "LITHUANIA", YES, NO, YES, YES, YES, 7000 }, 502 {CTRY_LITHUANIA, ETSI1_WORLD, "LT", "LITHUANIA", YES, NO, YES, YES, YES, 7000 },
503 {CTRY_LUXEMBOURG, ETSI1_WORLD, "LU", "LUXEMBOURG", YES, NO, YES, YES, YES, 7000 }, 503 {CTRY_LUXEMBOURG, ETSI1_WORLD, "LU", "LUXEMBOURG", YES, NO, YES, YES, YES, 7000 },
504 {CTRY_MACAU, FCC2_WORLD, "MO", "MACAU", YES, YES, YES, YES, YES, 7000 }, 504 {CTRY_MACAU, FCC2_WORLD, "MO", "MACAU", YES, YES, YES, YES, YES, 7000 },
505 {CTRY_MACEDONIA, NULL1_WORLD, "MK", "MACEDONIA", YES, NO, YES, NO, YES, 7000 }, 505 {CTRY_MACEDONIA, NULL1_WORLD, "MK", "MACEDONIA", YES, NO, YES, NO, YES, 7000 },
506 {CTRY_MALAYSIA, APL8_WORLD, "MY", "MALAYSIA", NO, NO, NO, NO, NO, 7000 }, 506 {CTRY_MALAYSIA, APL8_WORLD, "MY", "MALAYSIA", NO, NO, NO, NO, NO, 7000 },
507 {CTRY_MALTA, ETSI1_WORLD, "MT", "MALTA", YES, NO, YES, YES, YES, 7000 }, 507 {CTRY_MALTA, ETSI1_WORLD, "MT", "MALTA", YES, NO, YES, YES, YES, 7000 },
508 {CTRY_MEXICO, FCC1_FCCA, "MX", "MEXICO", YES, YES, YES, YES, YES, 7000 }, 508 {CTRY_MEXICO, FCC1_FCCA, "MX", "MEXICO", YES, YES, YES, YES, YES, 7000 },
509 {CTRY_MONACO, ETSI4_WORLD, "MC", "MONACO", YES, YES, YES, YES, YES, 7000 }, 509 {CTRY_MONACO, ETSI4_WORLD, "MC", "MONACO", YES, YES, YES, YES, YES, 7000 },
510 {CTRY_MOROCCO, NULL1_WORLD, "MA", "MOROCCO", YES, NO, YES, NO, YES, 7000 }, 510 {CTRY_MOROCCO, NULL1_WORLD, "MA", "MOROCCO", YES, NO, YES, NO, YES, 7000 },
511 {CTRY_NETHERLANDS, ETSI1_WORLD, "NL", "NETHERLANDS", YES, NO, YES, YES, YES, 7000 }, 511 {CTRY_NETHERLANDS, ETSI1_WORLD, "NL", "NETHERLANDS", YES, NO, YES, YES, YES, 7000 },
512 {CTRY_NETHERLANDS_ANT, ETSI1_WORLD, "AN", "NETHERLANDS-ANTILLES", YES, NO, YES, YES, YES, 7000 }, 512 {CTRY_NETHERLANDS_ANT, ETSI1_WORLD, "AN", "NETHERLANDS-ANTILLES", YES, NO, YES, YES, YES, 7000 },
513 {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ", "NEW ZEALAND", YES, NO, YES, NO, YES, 7000 }, 513 {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ", "NEW ZEALAND", YES, NO, YES, NO, YES, 7000 },
514 {CTRY_NORWAY, ETSI1_WORLD, "NO", "NORWAY", YES, NO, YES, YES, YES, 7000 }, 514 {CTRY_NORWAY, ETSI1_WORLD, "NO", "NORWAY", YES, NO, YES, YES, YES, 7000 },
515 {CTRY_OMAN, APL6_WORLD, "OM", "OMAN", YES, NO, YES, NO, YES, 7000 }, 515 {CTRY_OMAN, APL6_WORLD, "OM", "OMAN", YES, NO, YES, NO, YES, 7000 },
516 {CTRY_PAKISTAN, NULL1_WORLD, "PK", "PAKISTAN", YES, NO, YES, NO, YES, 7000 }, 516 {CTRY_PAKISTAN, NULL1_WORLD, "PK", "PAKISTAN", YES, NO, YES, NO, YES, 7000 },
517 {CTRY_PANAMA, FCC1_FCCA, "PA", "PANAMA", YES, YES, YES, YES, YES, 7000 }, 517 {CTRY_PANAMA, FCC1_FCCA, "PA", "PANAMA", YES, YES, YES, YES, YES, 7000 },
518 {CTRY_PERU, APL1_WORLD, "PE", "PERU", YES, NO, YES, NO, YES, 7000 }, 518 {CTRY_PERU, APL1_WORLD, "PE", "PERU", YES, NO, YES, NO, YES, 7000 },
519 {CTRY_PHILIPPINES, APL1_WORLD, "PH", "PHILIPPINES", YES, YES, YES, YES, YES, 7000 }, 519 {CTRY_PHILIPPINES, APL1_WORLD, "PH", "PHILIPPINES", YES, YES, YES, YES, YES, 7000 },
520 {CTRY_POLAND, ETSI1_WORLD, "PL", "POLAND", YES, NO, YES, YES, YES, 7000 }, 520 {CTRY_POLAND, ETSI1_WORLD, "PL", "POLAND", YES, NO, YES, YES, YES, 7000 },
521 {CTRY_PORTUGAL, ETSI1_WORLD, "PT", "PORTUGAL", YES, NO, YES, YES, YES, 7000 }, 521 {CTRY_PORTUGAL, ETSI1_WORLD, "PT", "PORTUGAL", YES, NO, YES, YES, YES, 7000 },
522 {CTRY_PUERTO_RICO, FCC1_FCCA, "PR", "PUERTO RICO", YES, YES, YES, YES, YES, 7000 }, 522 {CTRY_PUERTO_RICO, FCC1_FCCA, "PR", "PUERTO RICO", YES, YES, YES, YES, YES, 7000 },
523 {CTRY_QATAR, NULL1_WORLD, "QA", "QATAR", YES, NO, YES, NO, YES, 7000 }, 523 {CTRY_QATAR, NULL1_WORLD, "QA", "QATAR", YES, NO, YES, NO, YES, 7000 },
524 {CTRY_ROMANIA, NULL1_WORLD, "RO", "ROMANIA", YES, NO, YES, NO, YES, 7000 }, 524 {CTRY_ROMANIA, NULL1_WORLD, "RO", "ROMANIA", YES, NO, YES, NO, YES, 7000 },
525 {CTRY_RUSSIA, NULL1_WORLD, "RU", "RUSSIA", YES, NO, YES, NO, YES, 7000 }, 525 {CTRY_RUSSIA, NULL1_WORLD, "RU", "RUSSIA", YES, NO, YES, NO, YES, 7000 },
526 {CTRY_SAUDI_ARABIA,NULL1_WORLD, "SA", "SAUDI ARABIA", YES, NO, YES, NO, YES, 7000 }, 526 {CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA", "SAUDI ARABIA", YES, NO, YES, NO, YES, 7000 },
527 {CTRY_SERBIA_MONT, ETSI1_WORLD, "CS", "SERBIA & MONTENEGRO", YES, NO, YES, YES, YES, 7000 }, 527 {CTRY_SERBIA_MONT, ETSI1_WORLD, "CS", "SERBIA & MONTENEGRO", YES, NO, YES, YES, YES, 7000 },
528 {CTRY_SINGAPORE, APL6_WORLD, "SG", "SINGAPORE", YES, YES, YES, YES, YES, 7000 }, 528 {CTRY_SINGAPORE, APL6_WORLD, "SG", "SINGAPORE", YES, YES, YES, YES, YES, 7000 },
529 {CTRY_SLOVAKIA, ETSI1_WORLD, "SK", "SLOVAK REPUBLIC",YES, NO, YES, YES, YES, 7000 }, 529 {CTRY_SLOVAKIA, ETSI1_WORLD, "SK", "SLOVAK REPUBLIC", YES, NO, YES, YES, YES, 7000 },
530 {CTRY_SLOVENIA, ETSI1_WORLD, "SI", "SLOVENIA", YES, NO, YES, YES, YES, 7000 }, 530 {CTRY_SLOVENIA, ETSI1_WORLD, "SI", "SLOVENIA", YES, NO, YES, YES, YES, 7000 },
531 {CTRY_SOUTH_AFRICA,FCC3_WORLD, "ZA", "SOUTH AFRICA", YES, NO, YES, NO, YES, 7000 }, 531 {CTRY_SOUTH_AFRICA, FCC3_WORLD, "ZA", "SOUTH AFRICA", YES, NO, YES, NO, YES, 7000 },
532 {CTRY_SPAIN, ETSI1_WORLD, "ES", "SPAIN", YES, NO, YES, YES, YES, 7000 }, 532 {CTRY_SPAIN, ETSI1_WORLD, "ES", "SPAIN", YES, NO, YES, YES, YES, 7000 },
533 {CTRY_SRILANKA, FCC3_WORLD, "LK", "SRI LANKA", YES, NO, YES, NO, YES, 7000 }, 533 {CTRY_SRILANKA, FCC3_WORLD, "LK", "SRI LANKA", YES, NO, YES, NO, YES, 7000 },
534 {CTRY_SWEDEN, ETSI1_WORLD, "SE", "SWEDEN", YES, NO, YES, YES, YES, 7000 }, 534 {CTRY_SWEDEN, ETSI1_WORLD, "SE", "SWEDEN", YES, NO, YES, YES, YES, 7000 },
535 {CTRY_SWITZERLAND, ETSI1_WORLD, "CH", "SWITZERLAND", YES, NO, YES, YES, YES, 7000 }, 535 {CTRY_SWITZERLAND, ETSI1_WORLD, "CH", "SWITZERLAND", YES, NO, YES, YES, YES, 7000 },
536 {CTRY_SYRIA, NULL1_WORLD, "SY", "SYRIA", YES, NO, YES, NO, YES, 7000 }, 536 {CTRY_SYRIA, NULL1_WORLD, "SY", "SYRIA", YES, NO, YES, NO, YES, 7000 },
537 {CTRY_TAIWAN, APL3_FCCA, "TW", "TAIWAN", YES, YES, YES, YES, YES, 7000 }, 537 {CTRY_TAIWAN, APL3_FCCA, "TW", "TAIWAN", YES, YES, YES, YES, YES, 7000 },
538 {CTRY_THAILAND, NULL1_WORLD, "TH", "THAILAND", YES, NO, YES, NO, YES, 7000 }, 538 {CTRY_THAILAND, NULL1_WORLD, "TH", "THAILAND", YES, NO, YES, NO, YES, 7000 },
539 {CTRY_TRINIDAD_Y_TOBAGO,ETSI4_WORLD,"TT", "TRINIDAD & TOBAGO", YES, NO, YES, NO, YES, 7000 }, 539 {CTRY_TRINIDAD_Y_TOBAGO, ETSI4_WORLD, "TT", "TRINIDAD & TOBAGO", YES, NO, YES, NO, YES, 7000 },
540 {CTRY_TUNISIA, ETSI3_WORLD, "TN", "TUNISIA", YES, NO, YES, NO, YES, 7000 }, 540 {CTRY_TUNISIA, ETSI3_WORLD, "TN", "TUNISIA", YES, NO, YES, NO, YES, 7000 },
541 {CTRY_TURKEY, ETSI3_WORLD, "TR", "TURKEY", YES, NO, YES, NO, YES, 7000 }, 541 {CTRY_TURKEY, ETSI3_WORLD, "TR", "TURKEY", YES, NO, YES, NO, YES, 7000 },
542 {CTRY_UKRAINE, NULL1_WORLD, "UA", "UKRAINE", YES, NO, YES, NO, YES, 7000 }, 542 {CTRY_UKRAINE, NULL1_WORLD, "UA", "UKRAINE", YES, NO, YES, NO, YES, 7000 },
543 {CTRY_UAE, NULL1_WORLD, "AE", "UNITED ARAB EMIRATES", YES, NO, YES, NO, YES, 7000 }, 543 {CTRY_UAE, NULL1_WORLD, "AE", "UNITED ARAB EMIRATES", YES, NO, YES, NO, YES, 7000 },
544 {CTRY_UNITED_KINGDOM, ETSI1_WORLD,"GB", "UNITED KINGDOM", YES, NO, YES, NO, YES, 7000 }, 544 {CTRY_UNITED_KINGDOM, ETSI1_WORLD, "GB", "UNITED KINGDOM", YES, NO, YES, NO, YES, 7000 },
545 {CTRY_UNITED_STATES, FCC3_FCCA, "US", "UNITED STATES", YES, YES, YES, YES, YES, 5825 }, 545 {CTRY_UNITED_STATES, FCC3_FCCA, "US", "UNITED STATES", YES, YES, YES, YES, YES, 5825 },
546 {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS", "UNITED STATES (PUBLIC SAFETY)", YES, YES, YES, YES, YES, 7000 }, 546 {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS", "UNITED STATES (PUBLIC SAFETY)", YES, YES, YES, YES, YES, 7000 },
547 {CTRY_URUGUAY, FCC1_WORLD, "UY", "URUGUAY", YES, NO, YES, NO, YES, 7000 }, 547 {CTRY_URUGUAY, FCC1_WORLD, "UY", "URUGUAY", YES, NO, YES, NO, YES, 7000 },
548 {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ", "UZBEKISTAN", YES, YES, YES, YES, YES, 7000 }, 548 {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ", "UZBEKISTAN", YES, YES, YES, YES, YES, 7000 },
549 {CTRY_VENEZUELA, APL2_ETSIC, "VE", "VENEZUELA", YES, NO, YES, NO, YES, 7000 }, 549 {CTRY_VENEZUELA, APL2_ETSIC, "VE", "VENEZUELA", YES, NO, YES, NO, YES, 7000 },
550 {CTRY_VIET_NAM, NULL1_WORLD, "VN", "VIET NAM", YES, NO, YES, NO, YES, 7000 }, 550 {CTRY_VIET_NAM, NULL1_WORLD, "VN", "VIET NAM", YES, NO, YES, NO, YES, 7000 },
551 {CTRY_YEMEN, NULL1_WORLD, "YE", "YEMEN", YES, NO, YES, NO, YES, 7000 }, 551 {CTRY_YEMEN, NULL1_WORLD, "YE", "YEMEN", YES, NO, YES, NO, YES, 7000 },
552 {CTRY_ZIMBABWE, NULL1_WORLD, "ZW", "ZIMBABWE", YES, NO, YES, NO, YES, 7000 } 552 {CTRY_ZIMBABWE, NULL1_WORLD, "ZW", "ZIMBABWE", YES, NO, YES, NO, YES, 7000 }
553}; 553};
554 554
555typedef struct RegDmnFreqBand { 555typedef struct RegDmnFreqBand {
@@ -660,7 +660,7 @@ enum {
660 W1_5745_5825, 660 W1_5745_5825,
661 W1_5500_5700, 661 W1_5500_5700,
662 W2_5260_5320, 662 W2_5260_5320,
663 W2_5180_5240, 663 W2_5180_5240,
664 W2_5825_5825, 664 W2_5825_5825,
665}; 665};
666 666
@@ -1332,8 +1332,8 @@ static REG_DOMAIN regDomains[] = {
1332 BMZERO, 1332 BMZERO,
1333 BMZERO, 1333 BMZERO,
1334 BMZERO, 1334 BMZERO,
1335 BM(F2_2312_2372,F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1335 BM(F2_2312_2372, F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1336 BM(G2_2312_2372,G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1336 BM(G2_2312_2372, G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1337 BMZERO, 1337 BMZERO,
1338 BMZERO, 1338 BMZERO,
1339 BMZERO}, 1339 BMZERO},
@@ -1342,9 +1342,9 @@ static REG_DOMAIN regDomains[] = {
1342 BMZERO, 1342 BMZERO,
1343 BMZERO, 1343 BMZERO,
1344 BMZERO, 1344 BMZERO,
1345 BM(F1_2457_2472,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1345 BM(F1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1346 BM(G1_2457_2472,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1346 BM(G1_2457_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1347 BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1347 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1348 BMZERO, 1348 BMZERO,
1349 BMZERO}, 1349 BMZERO},
1350 1350
@@ -1352,9 +1352,9 @@ static REG_DOMAIN regDomains[] = {
1352 BMZERO, 1352 BMZERO,
1353 BMZERO, 1353 BMZERO,
1354 BMZERO, 1354 BMZERO,
1355 BM(F1_2432_2442,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1355 BM(F1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1356 BM(G1_2432_2442,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1356 BM(G1_2432_2442, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1357 BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1357 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1358 BMZERO, 1358 BMZERO,
1359 BMZERO}, 1359 BMZERO},
1360 1360
@@ -1362,9 +1362,9 @@ static REG_DOMAIN regDomains[] = {
1362 BMZERO, 1362 BMZERO,
1363 BMZERO, 1363 BMZERO,
1364 BMZERO, 1364 BMZERO,
1365 BM(F3_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1365 BM(F3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1366 BM(G3_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1366 BM(G3_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1367 BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1367 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1368 BMZERO, 1368 BMZERO,
1369 BMZERO}, 1369 BMZERO},
1370 1370
@@ -1372,10 +1372,10 @@ static REG_DOMAIN regDomains[] = {
1372 BMZERO, 1372 BMZERO,
1373 BMZERO, 1373 BMZERO,
1374 BMZERO, 1374 BMZERO,
1375 BM(F1_2412_2462,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1375 BM(F1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1376 BM(G1_2412_2462,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1376 BM(G1_2412_2462, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1377 BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1377 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1378 BM(NG2_2422_2452,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1378 BM(NG2_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1379 BMZERO}, 1379 BMZERO},
1380 1380
1381 {MKKA, MKK, NO_DFS, PSCAN_MKKA | PSCAN_MKKA_G | PSCAN_MKKA1 | PSCAN_MKKA1_G | PSCAN_MKKA2 | PSCAN_MKKA2_G, DISALLOW_ADHOC_11A_TURB, 1381 {MKKA, MKK, NO_DFS, PSCAN_MKKA | PSCAN_MKKA_G | PSCAN_MKKA1 | PSCAN_MKKA1_G | PSCAN_MKKA2 | PSCAN_MKKA2_G, DISALLOW_ADHOC_11A_TURB,
@@ -1384,36 +1384,36 @@ static REG_DOMAIN regDomains[] = {
1384 BMZERO, 1384 BMZERO,
1385 BM(F2_2412_2462, F1_2467_2472, F2_2484_2484, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1385 BM(F2_2412_2462, F1_2467_2472, F2_2484_2484, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1386 BM(G2_2412_2462, G1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1386 BM(G2_2412_2462, G1_2467_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1387 BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1387 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1388 BM(NG1_2422_2452,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1388 BM(NG1_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1389 BMZERO}, 1389 BMZERO},
1390 1390
1391 {MKKC, MKK, NO_DFS, NO_PSCAN, NO_REQ, 1391 {MKKC, MKK, NO_DFS, NO_PSCAN, NO_REQ,
1392 BMZERO, 1392 BMZERO,
1393 BMZERO, 1393 BMZERO,
1394 BMZERO, 1394 BMZERO,
1395 BM(F2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1395 BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1396 BM(G2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1396 BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1397 BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1397 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1398 BM(NG1_2422_2452,-1,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1398 BM(NG1_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1399 BMZERO}, 1399 BMZERO},
1400 1400
1401 {WORLD, ETSI, NO_DFS, NO_PSCAN, NO_REQ, 1401 {WORLD, ETSI, NO_DFS, NO_PSCAN, NO_REQ,
1402 BMZERO, 1402 BMZERO,
1403 BMZERO, 1403 BMZERO,
1404 BMZERO, 1404 BMZERO,
1405 BM(F2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1405 BM(F2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1406 BM(G2_2412_2472,-1,-1,-1,-1,-1,-1,-1, -1, -1, -1, -1), 1406 BM(G2_2412_2472, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1407 BM(T2_2437_2437,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1407 BM(T2_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1408 BM(NG1_2422_2452,-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1408 BM(NG1_2422_2452, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1409 BMZERO}, 1409 BMZERO},
1410 1410
1411 {WOR0_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, 1411 {WOR0_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
1412 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1412 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
1413 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1413 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1414 BMZERO, 1414 BMZERO,
1415 BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), 1415 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1),
1416 BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467, -1, -1, -1, -1, -1), 1416 BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1),
1417 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1417 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1418 BMZERO, 1418 BMZERO,
1419 BMZERO}, 1419 BMZERO},
@@ -1429,21 +1429,21 @@ static REG_DOMAIN regDomains[] = {
1429 BMZERO}, 1429 BMZERO},
1430 1430
1431 {WOR02_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, 1431 {WOR02_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
1432 BM(W1_5260_5320, W1_5180_5240,W1_5170_5230,W1_5745_5825,W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1432 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
1433 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1433 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1434 BMZERO, 1434 BMZERO,
1435 BM(W1_2412_2412,W1_2437_2442,W1_2462_2462, W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), 1435 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
1436 BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462, WG1_2472_2472,WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1), 1436 BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1),
1437 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1437 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1438 BMZERO, 1438 BMZERO,
1439 BMZERO}, 1439 BMZERO},
1440 1440
1441 {EU1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D, 1441 {EU1_WORLD, NO_CTL, DFS_FCC3 | DFS_ETSI, PSCAN_WWR, ADHOC_PER_11D,
1442 BM(W1_5260_5320, W1_5180_5240,W1_5170_5230,W1_5745_5825,W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1442 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
1443 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1443 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1444 BMZERO, 1444 BMZERO,
1445 BM(W1_2412_2412,W1_2437_2442,W1_2462_2462, W2_2472_2472,W1_2417_2432, W1_2447_2457, W2_2467_2467, -1, -1, -1, -1, -1), 1445 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W2_2472_2472, W1_2417_2432, W1_2447_2457, W2_2467_2467, -1, -1, -1, -1, -1),
1446 BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462, WG2_2472_2472,WG1_2417_2432, WG1_2447_2457, WG2_2467_2467, -1, -1, -1, -1, -1), 1446 BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG2_2472_2472, WG1_2417_2432, WG1_2447_2457, WG2_2467_2467, -1, -1, -1, -1, -1),
1447 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1447 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1448 BMZERO, 1448 BMZERO,
1449 BMZERO}, 1449 BMZERO},
@@ -1452,8 +1452,8 @@ static REG_DOMAIN regDomains[] = {
1452 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1452 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
1453 BMZERO, 1453 BMZERO,
1454 BMZERO, 1454 BMZERO,
1455 BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), 1455 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1),
1456 BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467, -1, -1, -1, -1, -1), 1456 BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1),
1457 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1457 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1458 BMZERO, 1458 BMZERO,
1459 BMZERO}, 1459 BMZERO},
@@ -1462,8 +1462,8 @@ static REG_DOMAIN regDomains[] = {
1462 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1), 1462 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, W1_5500_5700, -1, -1, -1, -1, -1, -1, -1),
1463 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1463 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1464 BMZERO, 1464 BMZERO,
1465 BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1), 1465 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, W1_2484_2484, -1, -1, -1, -1),
1466 BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467, -1, -1, -1, -1, -1), 1466 BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1),
1467 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1467 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1468 BMZERO, 1468 BMZERO,
1469 BMZERO}, 1469 BMZERO},
@@ -1472,8 +1472,8 @@ static REG_DOMAIN regDomains[] = {
1472 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1), 1472 BM(W1_5260_5320, W1_5180_5240, W1_5170_5230, W1_5745_5825, -1, -1, -1, -1, -1, -1, -1, -1),
1473 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1473 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1474 BMZERO, 1474 BMZERO,
1475 BM(W1_2412_2412,W1_2437_2442,W1_2462_2462,W1_2472_2472,W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1), 1475 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2472_2472, W1_2417_2432, W1_2447_2457, W1_2467_2467, -1, -1, -1, -1, -1),
1476 BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462,WG1_2472_2472,WG1_2417_2432,WG1_2447_2457,WG1_2467_2467,-1, -1, -1, -1, -1), 1476 BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2472_2472, WG1_2417_2432, WG1_2447_2457, WG1_2467_2467, -1, -1, -1, -1, -1),
1477 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1477 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1478 BMZERO, 1478 BMZERO,
1479 BMZERO}, 1479 BMZERO},
@@ -1482,8 +1482,8 @@ static REG_DOMAIN regDomains[] = {
1482 BM(W2_5260_5320, W2_5180_5240, F2_5745_5805, W2_5825_5825, -1, -1, -1, -1, -1, -1, -1, -1), 1482 BM(W2_5260_5320, W2_5180_5240, F2_5745_5805, W2_5825_5825, -1, -1, -1, -1, -1, -1, -1, -1),
1483 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1483 BM(WT1_5210_5250, WT1_5290_5290, WT1_5760_5800, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1484 BMZERO, 1484 BMZERO,
1485 BM(W1_2412_2412,W1_2437_2442,W1_2462_2462, W1_2417_2432,W1_2447_2457,-1, -1, -1, -1, -1, -1, -1), 1485 BM(W1_2412_2412, W1_2437_2442, W1_2462_2462, W1_2417_2432, W1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
1486 BM(WG1_2412_2412,WG1_2437_2442,WG1_2462_2462, WG1_2417_2432,WG1_2447_2457,-1, -1, -1, -1, -1, -1, -1), 1486 BM(WG1_2412_2412, WG1_2437_2442, WG1_2462_2462, WG1_2417_2432, WG1_2447_2457, -1, -1, -1, -1, -1, -1, -1),
1487 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1), 1487 BM(T3_2437_2437, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1),
1488 BMZERO, 1488 BMZERO,
1489 BMZERO}, 1489 BMZERO},
@@ -1554,30 +1554,24 @@ static const struct cmode modes[] = {
1554u8_t GetWmRD(u16_t regionCode, u16_t channelFlag, REG_DOMAIN *rd) 1554u8_t GetWmRD(u16_t regionCode, u16_t channelFlag, REG_DOMAIN *rd)
1555{ 1555{
1556 s16_t i, found, regDmn; 1556 s16_t i, found, regDmn;
1557 u64_t flags=NO_REQ; 1557 u64_t flags = NO_REQ;
1558 REG_DMN_PAIR_MAPPING *regPair=NULL; 1558 REG_DMN_PAIR_MAPPING *regPair = NULL;
1559 1559
1560 for (i=0, found=0; (i<N(regDomainPairs))&&(!found); i++) 1560 for (i = 0, found = 0; (i < N(regDomainPairs)) && (!found); i++) {
1561 { 1561 if (regDomainPairs[i].regDmnEnum == regionCode) {
1562 if (regDomainPairs[i].regDmnEnum == regionCode)
1563 {
1564 regPair = &regDomainPairs[i]; 1562 regPair = &regDomainPairs[i];
1565 found = 1; 1563 found = 1;
1566 } 1564 }
1567 } 1565 }
1568 if (!found) 1566 if (!found) {
1569 {
1570 zm_debug_msg1("Failed to find reg domain pair ", regionCode); 1567 zm_debug_msg1("Failed to find reg domain pair ", regionCode);
1571 return FALSE; 1568 return FALSE;
1572 } 1569 }
1573 1570
1574 if (channelFlag & ZM_REG_FLAG_CHANNEL_2GHZ) 1571 if (channelFlag & ZM_REG_FLAG_CHANNEL_2GHZ) {
1575 {
1576 regDmn = regPair->regDmn2GHz; 1572 regDmn = regPair->regDmn2GHz;
1577 flags = regPair->flags2GHz; 1573 flags = regPair->flags2GHz;
1578 } 1574 } else {
1579 else
1580 {
1581 regDmn = regPair->regDmn5GHz; 1575 regDmn = regPair->regDmn5GHz;
1582 flags = regPair->flags5GHz; 1576 flags = regPair->flags5GHz;
1583 } 1577 }
@@ -1587,19 +1581,16 @@ u8_t GetWmRD(u16_t regionCode, u16_t channelFlag, REG_DOMAIN *rd)
1587 * unitary reg domain of the pair 1581 * unitary reg domain of the pair
1588 */ 1582 */
1589 1583
1590 for (i=0;i<N(regDomains); i++) 1584 for (i = 0 ; i < N(regDomains) ; i++) {
1591 { 1585 if (regDomains[i].regDmnEnum == regDmn) {
1592 if (regDomains[i].regDmnEnum == regDmn) 1586 if (rd != NULL) {
1593 { 1587 zfMemoryCopy((u8_t *)rd, (u8_t *)&regDomains[i],
1594 if (rd != NULL) 1588 sizeof(REG_DOMAIN));
1595 {
1596 zfMemoryCopy((u8_t *)rd, (u8_t *)&regDomains[i],
1597 sizeof(REG_DOMAIN));
1598 } 1589 }
1599 } 1590 }
1600 } 1591 }
1601 rd->pscan &= regPair->pscanMask; 1592 rd->pscan &= regPair->pscanMask;
1602 rd->flags = (u32_t)flags; 1593 rd->flags = (u32_t)flags;
1603 return TRUE; 1594 return TRUE;
1604} 1595}
1605 1596
@@ -1610,7 +1601,7 @@ u8_t isChanBitMaskZero(u64_t *bitmask)
1610{ 1601{
1611 u16_t i; 1602 u16_t i;
1612 1603
1613 for (i=0; i<BMLEN; i++) { 1604 for (i = 0; i < BMLEN; i++) {
1614 if (bitmask[i] != 0) 1605 if (bitmask[i] != 0)
1615 return FALSE; 1606 return FALSE;
1616 } 1607 }
@@ -1632,384 +1623,344 @@ u8_t IS_BIT_SET(u32_t bit, u64_t *bitmask)
1632} 1623}
1633 1624
1634 1625
1635void zfHpGetRegulationTable(zdev_t* dev, u16_t regionCode, u16_t c_lo, u16_t c_hi) 1626void zfHpGetRegulationTable(zdev_t *dev, u16_t regionCode, u16_t c_lo, u16_t c_hi)
1636{ 1627{
1637 REG_DOMAIN rd5GHz, rd2GHz; 1628 REG_DOMAIN rd5GHz, rd2GHz;
1638 const struct cmode *cm; 1629 const struct cmode *cm;
1639 s16_t next=0,b; 1630 s16_t next = 0, b;
1640 struct zsHpPriv* hpPriv; 1631 struct zsHpPriv *hpPriv;
1641 1632
1642 zmw_get_wlan_dev(dev); 1633 zmw_get_wlan_dev(dev);
1643 hpPriv=wd->hpPrivate; 1634 hpPriv = wd->hpPrivate;
1644 1635
1645 zmw_declare_for_critical_section(); 1636 zmw_declare_for_critical_section();
1646 1637
1647 if (!GetWmRD(regionCode, ~ZM_REG_FLAG_CHANNEL_2GHZ, &rd5GHz)) 1638 if (!GetWmRD(regionCode, ~ZM_REG_FLAG_CHANNEL_2GHZ, &rd5GHz)) {
1648 { 1639 zm_debug_msg1("couldn't find unitary 5GHz reg domain for Region Code ", regionCode);
1649 zm_debug_msg1("couldn't find unitary 5GHz reg domain for Region Code ", regionCode);
1650 return; 1640 return;
1651 } 1641 }
1652 if (!GetWmRD(regionCode, ZM_REG_FLAG_CHANNEL_2GHZ, &rd2GHz)) 1642 if (!GetWmRD(regionCode, ZM_REG_FLAG_CHANNEL_2GHZ, &rd2GHz)) {
1653 { 1643 zm_debug_msg1("couldn't find unitary 2GHz reg domain for Region Code ", regionCode);
1654 zm_debug_msg1("couldn't find unitary 2GHz reg domain for Region Code ", regionCode);
1655 return; 1644 return;
1656 } 1645 }
1657 if (wd->regulationTable.regionCode == regionCode) 1646 if (wd->regulationTable.regionCode == regionCode) {
1658 { 1647 zm_debug_msg1("current region code is the same with Region Code ", regionCode);
1659 zm_debug_msg1("current region code is the same with Region Code ", regionCode); 1648 return;
1660 return; 1649 } else
1661 } 1650 wd->regulationTable.regionCode = regionCode;
1662 else
1663 {
1664 wd->regulationTable.regionCode = regionCode;
1665 }
1666 1651
1667 next = 0; 1652 next = 0;
1668 1653
1669 zmw_enter_critical_section(dev); 1654 zmw_enter_critical_section(dev);
1670 1655
1671 for (cm = modes; cm < &modes[N(modes)]; cm++) 1656 for (cm = modes; cm < &modes[N(modes)]; cm++) {
1672 {
1673 u16_t c; 1657 u16_t c;
1674 u64_t *channelBM=NULL; 1658 u64_t *channelBM = NULL;
1675 REG_DOMAIN *rd=NULL; 1659 REG_DOMAIN *rd = NULL;
1676 REG_DMN_FREQ_BAND *fband=NULL,*freqs=NULL; 1660 REG_DMN_FREQ_BAND *fband = NULL, *freqs = NULL;
1677 1661
1678 switch (cm->mode) 1662 switch (cm->mode) {
1679 {
1680 case HAL_MODE_TURBO: 1663 case HAL_MODE_TURBO:
1681 //we don't have turbo mode so we disable it 1664 /* we don't have turbo mode so we disable it
1682 //zm_debug_msg0("CWY - HAL_MODE_TURBO"); 1665 //zm_debug_msg0("CWY - HAL_MODE_TURBO"); */
1683 channelBM = NULL; 1666 channelBM = NULL;
1684 //rd = &rd5GHz; 1667 /* rd = &rd5GHz;
1685 //channelBM = rd->chan11a_turbo; 1668 channelBM = rd->chan11a_turbo;
1686 //freqs = &regDmn5GhzTurboFreq[0]; 1669 freqs = &regDmn5GhzTurboFreq[0];
1687 //ctl = rd->conformanceTestLimit | CTL_TURBO; 1670 ctl = rd->conformanceTestLimit | CTL_TURBO; */
1688 break; 1671 break;
1689 case HAL_MODE_11A: 1672 case HAL_MODE_11A:
1690 if ((hpPriv->OpFlags & 0x1) != 0) 1673 if ((hpPriv->OpFlags & 0x1) != 0) {
1691 { 1674 rd = &rd5GHz;
1692 rd = &rd5GHz; 1675 channelBM = rd->chan11a;
1693 channelBM = rd->chan11a; 1676 freqs = &regDmn5GhzFreq[0];
1694 freqs = &regDmn5GhzFreq[0]; 1677 c_lo = 4920; /* from channel 184 */
1695 c_lo = 4920; //from channel 184 1678 c_hi = 5825; /* to channel 165 */
1696 c_hi = 5825; //to channel 165 1679 /* ctl = rd->conformanceTestLimit;
1697 //ctl = rd->conformanceTestLimit; 1680 zm_debug_msg2("CWY - HAL_MODE_11A, channelBM = 0x", *channelBM); */
1698 //zm_debug_msg2("CWY - HAL_MODE_11A, channelBM = 0x", *channelBM); 1681 }
1699 } 1682 /* else
1700 //else 1683 channelBM = NULL;
1701 { 1684 */
1702 //channelBM = NULL;
1703 }
1704 break; 1685 break;
1705 case HAL_MODE_11B: 1686 case HAL_MODE_11B:
1706 //Disable 11B mode because it only has difference with 11G in PowerDFS Data, 1687 /* Disable 11B mode because it only has difference with 11G in PowerDFS Data,
1707 //and we don't use this now. 1688 and we don't use this now.
1708 //zm_debug_msg0("CWY - HAL_MODE_11B"); 1689 zm_debug_msg0("CWY - HAL_MODE_11B"); */
1709 channelBM = NULL; 1690 channelBM = NULL;
1710 //rd = &rd2GHz; 1691 /* rd = &rd2GHz;
1711 //channelBM = rd->chan11b; 1692 channelBM = rd->chan11b;
1712 //freqs = &regDmn2GhzFreq[0]; 1693 freqs = &regDmn2GhzFreq[0];
1713 //ctl = rd->conformanceTestLimit | CTL_11B; 1694 ctl = rd->conformanceTestLimit | CTL_11B;
1714 //zm_debug_msg2("CWY - HAL_MODE_11B, channelBM = 0x", *channelBM); 1695 zm_debug_msg2("CWY - HAL_MODE_11B, channelBM = 0x", *channelBM); */
1715 break; 1696 break;
1716 case HAL_MODE_11G: 1697 case HAL_MODE_11G:
1717 if ((hpPriv->OpFlags & 0x2) != 0) 1698 if ((hpPriv->OpFlags & 0x2) != 0) {
1718 { 1699 rd = &rd2GHz;
1719 rd = &rd2GHz; 1700 channelBM = rd->chan11g;
1720 channelBM = rd->chan11g; 1701 freqs = &regDmn2Ghz11gFreq[0];
1721 freqs = &regDmn2Ghz11gFreq[0]; 1702 c_lo = 2412; /* from channel 1 */
1722 c_lo = 2412; //from channel 1 1703 /* c_hi = 2462; to channel 11 */
1723 //c_hi = 2462; //to channel 11 1704 c_hi = 2472; /* to channel 13 */
1724 c_hi = 2472; //to channel 13 1705 /* ctl = rd->conformanceTestLimit | CTL_11G; */
1725 //ctl = rd->conformanceTestLimit | CTL_11G; 1706 /* zm_debug_msg2("CWY - HAL_MODE_11G, channelBM = 0x", *channelBM); */
1726 //zm_debug_msg2("CWY - HAL_MODE_11G, channelBM = 0x", *channelBM); 1707 }
1727 } 1708 /* else
1728 //else 1709 channelBM = NULL;
1729 { 1710 */
1730 //channelBM = NULL;
1731 }
1732 break; 1711 break;
1733 case HAL_MODE_11G_TURBO: 1712 case HAL_MODE_11G_TURBO:
1734 //we don't have turbo mode so we disable it 1713 /* we don't have turbo mode so we disable it
1735 //zm_debug_msg0("CWY - HAL_MODE_11G_TURBO"); 1714 zm_debug_msg0("CWY - HAL_MODE_11G_TURBO"); */
1736 channelBM = NULL; 1715 channelBM = NULL;
1737 //rd = &rd2GHz; 1716 /* rd = &rd2GHz;
1738 //channelBM = rd->chan11g_turbo; 1717 channelBM = rd->chan11g_turbo;
1739 //freqs = &regDmn2Ghz11gTurboFreq[0]; 1718 freqs = &regDmn2Ghz11gTurboFreq[0];
1740 //ctl = rd->conformanceTestLimit | CTL_108G; 1719 ctl = rd->conformanceTestLimit | CTL_108G; */
1741 break; 1720 break;
1742 case HAL_MODE_11A_TURBO: 1721 case HAL_MODE_11A_TURBO:
1743 //we don't have turbo mode so we disable it 1722 /* we don't have turbo mode so we disable it
1744 //zm_debug_msg0("CWY - HAL_MODE_11A_TURBO"); 1723 zm_debug_msg0("CWY - HAL_MODE_11A_TURBO"); */
1745 channelBM = NULL; 1724 channelBM = NULL;
1746 //rd = &rd5GHz; 1725 /* rd = &rd5GHz;
1747 //channelBM = rd->chan11a_dyn_turbo; 1726 channelBM = rd->chan11a_dyn_turbo;
1748 //freqs = &regDmn5GhzTurboFreq[0]; 1727 freqs = &regDmn5GhzTurboFreq[0];
1749 //ctl = rd->conformanceTestLimit | CTL_108G; 1728 ctl = rd->conformanceTestLimit | CTL_108G; */
1750 break; 1729 break;
1751 default: 1730 default:
1752 zm_debug_msg1("Unkonwn HAL mode ", cm->mode); 1731 zm_debug_msg1("Unkonwn HAL mode ", cm->mode);
1753 continue; 1732 continue;
1754 } 1733 }
1755 if (channelBM == NULL) 1734
1756 { 1735 if (channelBM == NULL) {
1757 //zm_debug_msg0("CWY - channelBM is NULL"); 1736 /* zm_debug_msg0("CWY - channelBM is NULL"); */
1758 continue; 1737 continue;
1759 } 1738 }
1760 if (isChanBitMaskZero(channelBM)) 1739
1761 { 1740 if (isChanBitMaskZero(channelBM)) {
1762 //zm_debug_msg0("CWY - BitMask is Zero"); 1741 /* zm_debug_msg0("CWY - BitMask is Zero"); */
1763 continue; 1742 continue;
1764 } 1743 }
1765 1744
1766 // RAY:Is it ok?? 1745 /* RAY:Is it ok?? */
1767 if (freqs == NULL ) 1746 if (freqs == NULL)
1768 { 1747 continue;
1769 continue; 1748
1770 } 1749 for (b = 0 ; b < 64*BMLEN ; b++) {
1771 1750 if (IS_BIT_SET(b, channelBM)) {
1772 for (b=0;b<64*BMLEN; b++)
1773 {
1774 if (IS_BIT_SET(b,channelBM))
1775 {
1776 fband = &freqs[b]; 1751 fband = &freqs[b];
1777 1752
1778 //zm_debug_msg1("CWY - lowChannel = ", fband->lowChannel); 1753 /* zm_debug_msg1("CWY - lowChannel = ", fband->lowChannel);
1779 //zm_debug_msg1("CWY - highChannel = ", fband->highChannel); 1754 zm_debug_msg1("CWY - highChannel = ", fband->highChannel);
1780 //zm_debug_msg1("CWY - channelSep = ", fband->channelSep); 1755 zm_debug_msg1("CWY - channelSep = ", fband->channelSep); */
1781 for (c=fband->lowChannel; c <= fband->highChannel; 1756 for (c = fband->lowChannel; c <= fband->highChannel;
1782 c += fband->channelSep) 1757 c += fband->channelSep) {
1783 {
1784 ZM_HAL_CHANNEL icv; 1758 ZM_HAL_CHANNEL icv;
1785 1759
1786 //Disable all DFS channel 1760 /* Disable all DFS channel */
1787 if ((hpPriv->disableDfsCh==0) || (!(fband->useDfs & rd->dfsMask))) 1761 if ((hpPriv->disableDfsCh == 0) || (!(fband->useDfs & rd->dfsMask))) {
1788 { 1762 if (fband->channelBW < 20) {
1789 if( fband->channelBW < 20 ) 1763 /**************************************************************/
1790 { 1764 /* */
1791 /**************************************************************/ 1765 /* Temporary discard channel that BW < 20MHz (5 or 10MHz) */
1792 /* */ 1766 /* Our architecture does not implemnt it !!! */
1793 /* Temporary discard channel that BW < 20MHz (5 or 10MHz) */ 1767 /* */
1794 /* Our architecture does not implemnt it !!! */ 1768 /**************************************************************/
1795 /* */ 1769 continue;
1796 /**************************************************************/ 1770 }
1797 continue; 1771 if ((c >= c_lo) && (c <= c_hi)) {
1798 } 1772 icv.channel = c;
1799 if ((c >= c_lo) && (c <= c_hi)) 1773 icv.channelFlags = cm->flags;
1800 { 1774 icv.maxRegTxPower = fband->powerDfs;
1801 icv.channel = c; 1775 if (fband->usePassScan & rd->pscan)
1802 icv.channelFlags = cm->flags; 1776 icv.channelFlags |= ZM_REG_FLAG_CHANNEL_PASSIVE;
1803 icv.maxRegTxPower = fband->powerDfs; 1777 else
1804 if (fband->usePassScan & rd->pscan) 1778 icv.channelFlags &= ~ZM_REG_FLAG_CHANNEL_PASSIVE;
1805 icv.channelFlags |= ZM_REG_FLAG_CHANNEL_PASSIVE; 1779 if (fband->useDfs & rd->dfsMask)
1806 else 1780 icv.privFlags = ZM_REG_FLAG_CHANNEL_DFS;
1807 icv.channelFlags &= ~ZM_REG_FLAG_CHANNEL_PASSIVE; 1781 else
1808 if (fband->useDfs & rd->dfsMask) 1782 icv.privFlags = 0;
1809 icv.privFlags = ZM_REG_FLAG_CHANNEL_DFS; 1783
1810 else 1784 /* For now disable radar for FCC3 */
1811 icv.privFlags = 0; 1785 if (fband->useDfs & rd->dfsMask & DFS_FCC3) {
1812 1786 icv.privFlags &= ~ZM_REG_FLAG_CHANNEL_DFS;
1813 /* For now disable radar for FCC3 */ 1787 icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR;
1814 if (fband->useDfs & rd->dfsMask & DFS_FCC3) 1788 }
1815 { 1789
1816 icv.privFlags &= ~ZM_REG_FLAG_CHANNEL_DFS; 1790 if (rd->flags & LIMIT_FRAME_4MS)
1817 icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR; 1791 icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR;
1818 } 1792
1819 1793 icv.minTxPower = 0;
1820 if(rd->flags & LIMIT_FRAME_4MS) 1794 icv.maxTxPower = 0;
1821 icv.privFlags |= ZM_REG_FLAG_CHANNEL_DFS_CLEAR; 1795
1822 1796 zm_assert(next < 60);
1823 icv.minTxPower = 0; 1797
1824 icv.maxTxPower = 0; 1798 wd->regulationTable.allowChannel[next++] = icv;
1825 1799 }
1826 zm_assert(next < 60); 1800 }
1827
1828 wd->regulationTable.allowChannel[next++] = icv;
1829 }
1830 } 1801 }
1831 } 1802 }
1832 } 1803 }
1833 } 1804 }
1834 }
1835 wd->regulationTable.allowChannelCnt = next; 1805 wd->regulationTable.allowChannelCnt = next;
1836 1806
1837 #if 0 1807 #if 0
1838 { 1808 {
1839 /* debug print */ 1809 /* debug print */
1840 u32_t i; 1810 u32_t i;
1841 DbgPrint("\n-------------------------------------------\n"); 1811 DbgPrint("\n-------------------------------------------\n");
1842 DbgPrint("zfHpGetRegulationTable print all channel info regincode = 0x%x\n", wd->regulationTable.regionCode); 1812 DbgPrint("zfHpGetRegulationTable print all channel info regincode = 0x%x\n", wd->regulationTable.regionCode);
1843 DbgPrint("index channel channelFlags maxRegTxPower privFlags useDFS\n"); 1813 DbgPrint("index channel channelFlags maxRegTxPower privFlags useDFS\n");
1844 1814
1845 for (i=0; i<wd->regulationTable.allowChannelCnt; i++) 1815 for (i = 0 ; i < wd->regulationTable.allowChannelCnt ; i++) {
1846 { 1816 DbgPrint("%02d %d %04x %02d %x %x\n", i,
1847 DbgPrint("%02d %d %04x %02d %x %x\n", 1817 wd->regulationTable.allowChannel[i].channel,
1848 i, 1818 wd->regulationTable.allowChannel[i].channelFlags,
1849 wd->regulationTable.allowChannel[i].channel, 1819 wd->regulationTable.allowChannel[i].maxRegTxPower,
1850 wd->regulationTable.allowChannel[i].channelFlags, 1820 wd->regulationTable.allowChannel[i].privFlags,
1851 wd->regulationTable.allowChannel[i].maxRegTxPower, 1821 wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS);
1852 wd->regulationTable.allowChannel[i].privFlags, 1822 }
1853 wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS); 1823 }
1854 } 1824 #endif
1855 } 1825
1856 #endif 1826 zmw_leave_critical_section(dev);
1857
1858 zmw_leave_critical_section(dev);
1859} 1827}
1860 1828
1861void zfHpGetRegulationTablefromRegionCode(zdev_t* dev, u16_t regionCode) 1829void zfHpGetRegulationTablefromRegionCode(zdev_t *dev, u16_t regionCode)
1862{ 1830{
1863 u16_t c_lo = 2000, c_hi = 6000; //default channel is all enable 1831 u16_t c_lo = 2000, c_hi = 6000; /* default channel is all enable */
1864 u8_t isoName[3] = {'N', 'A', 0}; 1832 u8_t isoName[3] = {'N', 'A', 0};
1865 1833
1866 zfCoreSetIsoName(dev, isoName); 1834 zfCoreSetIsoName(dev, isoName);
1867 1835
1868 zfHpGetRegulationTable(dev, regionCode, c_lo, c_hi); 1836 zfHpGetRegulationTable(dev, regionCode, c_lo, c_hi);
1869} 1837}
1870 1838
1871void zfHpGetRegulationTablefromCountry(zdev_t* dev, u16_t CountryCode) 1839void zfHpGetRegulationTablefromCountry(zdev_t *dev, u16_t CountryCode)
1872{ 1840{
1873 u16_t i; 1841 u16_t i;
1874 u16_t c_lo = 2000, c_hi = 6000; //default channel is all enable 1842 u16_t c_lo = 2000, c_hi = 6000; /* default channel is all enable */
1875 u16_t RegDomain; 1843 u16_t RegDomain;
1876
1877 zmw_get_wlan_dev(dev);
1878 1844
1879 zmw_declare_for_critical_section(); 1845 zmw_get_wlan_dev(dev);
1880 1846
1881 for (i = 0; i < N(allCountries); i++) 1847 zmw_declare_for_critical_section();
1882 {
1883 if (CountryCode == allCountries[i].countryCode)
1884 {
1885 RegDomain = allCountries[i].regDmnEnum;
1886 1848
1887 // read the ACU country code from EEPROM 1849 for (i = 0; i < N(allCountries); i++) {
1888 zfCoreSetIsoName(dev, (u8_t*)allCountries[i].isoName); 1850 if (CountryCode == allCountries[i].countryCode) {
1851 RegDomain = allCountries[i].regDmnEnum;
1889 1852
1890 //zm_debug_msg_s("CWY - Country Name = ", allCountries[i].name); 1853 /* read the ACU country code from EEPROM */
1854 zfCoreSetIsoName(dev, (u8_t *)allCountries[i].isoName);
1891 1855
1892 if (wd->regulationTable.regionCode != RegDomain) 1856 /* zm_debug_msg_s("CWY - Country Name = ", allCountries[i].name); */
1893 {
1894 //zm_debug_msg0("CWY - Change regulatory table");
1895 1857
1896 zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); 1858 if (wd->regulationTable.regionCode != RegDomain) {
1897 } 1859 /* zm_debug_msg0("CWY - Change regulatory table"); */
1898 return; 1860 zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi);
1899 } 1861 }
1900 } 1862 return;
1901 zm_debug_msg1("Invalid CountryCode = ", CountryCode); 1863 }
1864 }
1865 zm_debug_msg1("Invalid CountryCode = ", CountryCode);
1902} 1866}
1903 1867
1904u8_t zfHpGetRegulationTablefromISO(zdev_t* dev, u8_t *countryInfo, u8_t length) 1868u8_t zfHpGetRegulationTablefromISO(zdev_t *dev, u8_t *countryInfo, u8_t length)
1905{ 1869{
1906 u16_t i; 1870 u16_t i;
1907 u16_t RegDomain; 1871 u16_t RegDomain;
1908 u16_t c_lo = 2000, c_hi = 6000; //default channel is all enable 1872 u16_t c_lo = 2000, c_hi = 6000; /* default channel is all enable */
1909 //u8_t strLen = 2; 1873 /* u8_t strLen = 2; */
1910 1874
1911 zmw_get_wlan_dev(dev); 1875 zmw_get_wlan_dev(dev);
1912 1876
1913 zmw_declare_for_critical_section(); 1877 zmw_declare_for_critical_section();
1914 1878
1915 if (countryInfo[4] != 0x20) 1879 if (countryInfo[4] != 0x20) {
1916 { // with (I)ndoor/(O)utdoor info 1880 /* with (I)ndoor/(O)utdoor info
1917 //strLen = 3; 1881 strLen = 3; */
1918 } 1882 }
1919 //zm_debug_msg_s("Desired iso name = ", isoName); 1883 /* zm_debug_msg_s("Desired iso name = ", isoName); */
1920 for (i = 0; i < N(allCountries); i++) 1884 for (i = 0; i < N(allCountries); i++) {
1921 { 1885 /* zm_debug_msg_s("Current iso name = ", allCountries[i].isoName); */
1922 //zm_debug_msg_s("Current iso name = ", allCountries[i].isoName); 1886 if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, (u8_t *)&countryInfo[2], length-1)) {
1923 if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, (u8_t *)&countryInfo[2], length-1)) 1887 /* DbgPrint("Set current iso name = %s\n", allCountries[i].isoName); */
1924 { 1888 /* zm_debug_msg0("iso name hit!!"); */
1925 //DbgPrint("Set current iso name = %s\n", allCountries[i].isoName); 1889
1926 //zm_debug_msg0("iso name hit!!"); 1890 RegDomain = allCountries[i].regDmnEnum;
1927 1891
1928 RegDomain = allCountries[i].regDmnEnum; 1892 if (wd->regulationTable.regionCode != RegDomain)
1929 1893 zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi);
1930 if (wd->regulationTable.regionCode != RegDomain) 1894 /*
1931 { 1895 while (index < (countryInfo[1]+2)) {
1932 zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); 1896 if (countryInfo[index] <= 14) {
1933 } 1897 // calculate 2.4GHz low boundary channel frequency
1934 1898 ch = countryInfo[index];
1935 //while (index < (countryInfo[1]+2)) 1899 if ( ch == 14 )
1936 //{ 1900 c_lo = ZM_CH_G_14;
1937 // if (countryInfo[index] <= 14) 1901 else
1938 // { 1902 c_lo = ZM_CH_G_1 + (ch - 1) * 5;
1939 // /* calculate 2.4GHz low boundary channel frequency */ 1903 // calculate 2.4GHz high boundary channel frequency
1940 // ch = countryInfo[index]; 1904 ch = countryInfo[index] + countryInfo[index + 1] - 1;
1941 // if ( ch == 14 ) 1905 if ( ch == 14 )
1942 // c_lo = ZM_CH_G_14; 1906 c_hi = ZM_CH_G_14;
1943 // else 1907 else
1944 // c_lo = ZM_CH_G_1 + (ch - 1) * 5; 1908 c_hi = ZM_CH_G_1 + (ch - 1) * 5;
1945 // /* calculate 2.4GHz high boundary channel frequency */ 1909 } else {
1946 // ch = countryInfo[index] + countryInfo[index + 1] - 1; 1910 // calculate 5GHz low boundary channel frequency
1947 // if ( ch == 14 ) 1911 ch = countryInfo[index];
1948 // c_hi = ZM_CH_G_14; 1912 if ( (ch >= 184)&&(ch <= 196) )
1949 // else 1913 c_lo = 4000 + ch*5;
1950 // c_hi = ZM_CH_G_1 + (ch - 1) * 5; 1914 else
1951 // } 1915 c_lo = 5000 + ch*5;
1952 // else 1916 // calculate 5GHz high boundary channel frequency
1953 // { 1917 ch = countryInfo[index] + countryInfo[index + 1] - 1;
1954 // /* calculate 5GHz low boundary channel frequency */ 1918 if ( (ch >= 184)&&(ch <= 196) )
1955 // ch = countryInfo[index]; 1919 c_hi = 4000 + ch*5;
1956 // if ( (ch >= 184)&&(ch <= 196) ) 1920 else
1957 // c_lo = 4000 + ch*5; 1921 c_hi = 5000 + ch*5;
1958 // else 1922 }
1959 // c_lo = 5000 + ch*5; 1923
1960 // /* calculate 5GHz high boundary channel frequency */ 1924 zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi);
1961 // ch = countryInfo[index] + countryInfo[index + 1] - 1; 1925
1962 // if ( (ch >= 184)&&(ch <= 196) ) 1926 index+=3;
1963 // c_hi = 4000 + ch*5; 1927 }
1964 // else 1928 */
1965 // c_hi = 5000 + ch*5; 1929 return 0;
1966 // } 1930 }
1967 // 1931 }
1968 // zfHpGetRegulationTable(dev, RegDomain, c_lo, c_hi); 1932 /* zm_debug_msg_s("Invalid iso name = ", &countryInfo[2]); */
1969 // 1933 return 1;
1970 // index+=3;
1971 //}
1972
1973 return 0;
1974 }
1975 }
1976 //zm_debug_msg_s("Invalid iso name = ", &countryInfo[2]);
1977 return 1;
1978} 1934}
1979 1935
1980const char* zfHpGetisoNamefromregionCode(zdev_t* dev, u16_t regionCode) 1936const char *zfHpGetisoNamefromregionCode(zdev_t *dev, u16_t regionCode)
1981{ 1937{
1982 u16_t i; 1938 u16_t i;
1983 1939
1984 for (i = 0; i < N(allCountries); i++) 1940 for (i = 0; i < N(allCountries); i++) {
1985 { 1941 if (allCountries[i].regDmnEnum == regionCode)
1986 if (allCountries[i].regDmnEnum == regionCode) 1942 return allCountries[i].isoName;
1987 { 1943 }
1988 return allCountries[i].isoName; 1944 /* no matching item, return default */
1989 } 1945 return allCountries[0].isoName;
1990 }
1991 /* no matching item, return default */
1992 return allCountries[0].isoName;
1993} 1946}
1994 1947
1995u16_t zfHpGetRegionCodeFromIsoName(zdev_t* dev, u8_t *countryIsoName) 1948u16_t zfHpGetRegionCodeFromIsoName(zdev_t *dev, u8_t *countryIsoName)
1996{ 1949{
1997 u16_t i; 1950 u16_t i;
1998 u16_t regionCode; 1951 u16_t regionCode;
1999 1952
2000 /* if no matching item, return default */ 1953 /* if no matching item, return default */
2001 regionCode = DEF_REGDMN; 1954 regionCode = DEF_REGDMN;
2002 1955
2003 for (i = 0; i < N(allCountries); i++) 1956 for (i = 0; i < N(allCountries); i++) {
2004 { 1957 if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, countryIsoName, 2)) {
2005 if (zfMemoryIsEqual((u8_t *)allCountries[i].isoName, countryIsoName, 2)) 1958 regionCode = allCountries[i].regDmnEnum;
2006 { 1959 break;
2007 regionCode = allCountries[i].regDmnEnum; 1960 }
2008 break; 1961 }
2009 } 1962
2010 } 1963 return regionCode;
2011
2012 return regionCode;
2013} 1964}
2014 1965
2015/************************************************************************/ 1966/************************************************************************/
@@ -2029,323 +1980,294 @@ u16_t zfHpGetRegionCodeFromIsoName(zdev_t* dev, u8_t *countryIsoName)
2029/* Chao-Wen Yang ZyDAS Technology Corporation 2007.3 */ 1980/* Chao-Wen Yang ZyDAS Technology Corporation 2007.3 */
2030/* */ 1981/* */
2031/************************************************************************/ 1982/************************************************************************/
2032u16_t zfHpDeleteAllowChannel(zdev_t* dev, u16_t freq) 1983u16_t zfHpDeleteAllowChannel(zdev_t *dev, u16_t freq)
2033{ 1984{
2034 u16_t i, bandIndex = 0; 1985 u16_t i, bandIndex = 0;
2035 u16_t dfs5GBand[][2] = {{5150, 5240}, {5260, 5350}, {5450, 5700}, {5725, 5825}}; 1986 u16_t dfs5GBand[][2] = { {5150, 5240}, {5260, 5350}, {5450, 5700}, {5725, 5825} };
2036 1987
2037 zmw_get_wlan_dev(dev); 1988 zmw_get_wlan_dev(dev);
2038 /* Find which band does this frequency belong */ 1989 /* Find which band does this frequency belong */
2039 for (i = 0; i < 4; i++) 1990 for (i = 0; i < 4; i++) {
2040 { 1991 if ((freq >= dfs5GBand[i][0]) && (freq <= dfs5GBand[i][1]))
2041 if ((freq >= dfs5GBand[i][0]) && (freq <= dfs5GBand[i][1])) 1992 bandIndex = i + 1;
2042 bandIndex = i + 1; 1993 }
2043 } 1994
2044 1995 if (bandIndex == 0) {
2045 if (bandIndex == 0) 1996 /* 2.4G, don't care */
2046 { 1997 return 0;
2047 /* 2.4G, don't care */ 1998 } else
2048 return 0; 1999 bandIndex--;
2049 } 2000 /* Set all channels in this band to passive scan */
2050 else 2001 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) {
2051 { 2002 if ((wd->regulationTable.allowChannel[i].channel >= dfs5GBand[bandIndex][0]) &&
2052 bandIndex--; 2003 (wd->regulationTable.allowChannel[i].channel <= dfs5GBand[bandIndex][1])) {
2053 } 2004 /* if channel is not passive, set it to be passive and mark it */
2054 /* Set all channels in this band to passive scan */ 2005 if ((wd->regulationTable.allowChannel[i].channelFlags &
2055 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) 2006 ZM_REG_FLAG_CHANNEL_PASSIVE) == 0) {
2056 { 2007 wd->regulationTable.allowChannel[i].channelFlags |=
2057 if ((wd->regulationTable.allowChannel[i].channel >= dfs5GBand[bandIndex][0]) && 2008 (ZM_REG_FLAG_CHANNEL_PASSIVE | ZM_REG_FLAG_CHANNEL_CSA);
2058 (wd->regulationTable.allowChannel[i].channel <= dfs5GBand[bandIndex][1])) 2009 }
2059 { 2010 }
2060 /* if channel is not passive, set it to be passive and mark it */ 2011 }
2061 if ((wd->regulationTable.allowChannel[i].channelFlags & 2012
2062 ZM_REG_FLAG_CHANNEL_PASSIVE) == 0) 2013 return 0;
2063 {
2064 wd->regulationTable.allowChannel[i].channelFlags |=
2065 (ZM_REG_FLAG_CHANNEL_PASSIVE | ZM_REG_FLAG_CHANNEL_CSA);
2066 }
2067 }
2068 }
2069
2070 return 0;
2071} 2014}
2072 2015
2073u16_t zfHpAddAllowChannel(zdev_t* dev, u16_t freq) 2016u16_t zfHpAddAllowChannel(zdev_t *dev, u16_t freq)
2074{ 2017{
2075 u16_t i, j, arrayIndex; 2018 u16_t i, j, arrayIndex;
2076 2019
2077 zmw_get_wlan_dev(dev); 2020 zmw_get_wlan_dev(dev);
2078 2021
2079 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) 2022 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) {
2080 { 2023 if (wd->regulationTable.allowChannel[i].channel == freq)
2081 if (wd->regulationTable.allowChannel[i].channel == freq) 2024 break;
2082 break; 2025 }
2083 }
2084 2026
2085 if ( i == wd->regulationTable.allowChannelCnt) 2027 if (i == wd->regulationTable.allowChannelCnt) {
2086 { 2028 for (j = 0; j < wd->regulationTable.allowChannelCnt; j++) {
2087 for (j = 0; j < wd->regulationTable.allowChannelCnt; j++) 2029 if (wd->regulationTable.allowChannel[j].channel > freq)
2088 { 2030 break;
2089 if (wd->regulationTable.allowChannel[j].channel > freq) 2031 }
2090 break;
2091 }
2092 2032
2093 //zm_debug_msg1("CWY - add frequency = ", freq); 2033 /* zm_debug_msg1("CWY - add frequency = ", freq);
2094 //zm_debug_msg1("CWY - channel array index = ", j); 2034 zm_debug_msg1("CWY - channel array index = ", j); */
2095 2035
2096 arrayIndex = j; 2036 arrayIndex = j;
2097 2037
2098 if (arrayIndex < wd->regulationTable.allowChannelCnt) 2038 if (arrayIndex < wd->regulationTable.allowChannelCnt) {
2099 { 2039 for (j = wd->regulationTable.allowChannelCnt; j > arrayIndex; j--)
2100 for (j = wd->regulationTable.allowChannelCnt; j > arrayIndex; j--) 2040 wd->regulationTable.allowChannel[j] = wd->regulationTable.allowChannel[j - 1];
2101 wd->regulationTable.allowChannel[j] = wd->regulationTable.allowChannel[j - 1]; 2041 }
2102 } 2042 wd->regulationTable.allowChannel[arrayIndex].channel = freq;
2103 wd->regulationTable.allowChannel[arrayIndex].channel = freq;
2104 2043
2105 wd->regulationTable.allowChannelCnt++; 2044 wd->regulationTable.allowChannelCnt++;
2106 } 2045 }
2107 2046
2108 return 0; 2047 return 0;
2109} 2048}
2110 2049
2111u16_t zfHpIsDfsChannelNCS(zdev_t* dev, u16_t freq) 2050u16_t zfHpIsDfsChannelNCS(zdev_t *dev, u16_t freq)
2112{ 2051{
2113 u8_t flag = ZM_REG_FLAG_CHANNEL_DFS; 2052 u8_t flag = ZM_REG_FLAG_CHANNEL_DFS;
2114 u16_t i; 2053 u16_t i;
2115 zmw_get_wlan_dev(dev); 2054 zmw_get_wlan_dev(dev);
2116 2055
2117 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) 2056 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) {
2118 { 2057 /* DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); */
2119 //DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); 2058 if (wd->regulationTable.allowChannel[i].channel == freq) {
2120 if (wd->regulationTable.allowChannel[i].channel == freq) 2059 flag = wd->regulationTable.allowChannel[i].privFlags;
2121 { 2060 break; }
2122 flag = wd->regulationTable.allowChannel[i].privFlags; 2061 }
2123 break; 2062
2124 } 2063 return flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR);
2125 }
2126
2127 return (flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR));
2128} 2064}
2129 2065
2130u16_t zfHpIsDfsChannel(zdev_t* dev, u16_t freq) 2066u16_t zfHpIsDfsChannel(zdev_t *dev, u16_t freq)
2131{ 2067{
2132 u8_t flag = ZM_REG_FLAG_CHANNEL_DFS; 2068 u8_t flag = ZM_REG_FLAG_CHANNEL_DFS;
2133 u16_t i; 2069 u16_t i;
2134 zmw_get_wlan_dev(dev); 2070 zmw_get_wlan_dev(dev);
2135 2071
2136 zmw_declare_for_critical_section(); 2072 zmw_declare_for_critical_section();
2137 2073
2138 zmw_enter_critical_section(dev); 2074 zmw_enter_critical_section(dev);
2139 2075
2140 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) 2076 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) {
2141 { 2077 /* DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); */
2142 //DbgPrint("DFS:freq=%d, chan=%d", freq, wd->regulationTable.allowChannel[i].channel); 2078 if (wd->regulationTable.allowChannel[i].channel == freq) {
2143 if (wd->regulationTable.allowChannel[i].channel == freq) 2079 flag = wd->regulationTable.allowChannel[i].privFlags;
2144 { 2080 break;
2145 flag = wd->regulationTable.allowChannel[i].privFlags; 2081 }
2146 break; 2082 }
2147 }
2148 }
2149 2083
2150 zmw_leave_critical_section(dev); 2084 zmw_leave_critical_section(dev);
2151 2085
2152 return (flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR)); 2086 return flag & (ZM_REG_FLAG_CHANNEL_DFS|ZM_REG_FLAG_CHANNEL_DFS_CLEAR);
2153} 2087}
2154 2088
2155u16_t zfHpIsAllowedChannel(zdev_t* dev, u16_t freq) 2089u16_t zfHpIsAllowedChannel(zdev_t *dev, u16_t freq)
2156{ 2090{
2157 u16_t i; 2091 u16_t i;
2158 zmw_get_wlan_dev(dev); 2092 zmw_get_wlan_dev(dev);
2159 2093
2160 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) 2094 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) {
2161 { 2095 if (wd->regulationTable.allowChannel[i].channel == freq)
2162 if (wd->regulationTable.allowChannel[i].channel == freq) 2096 return 1;
2163 { 2097 }
2164 return 1; 2098
2165 } 2099 return 0;
2166 }
2167
2168 return 0;
2169} 2100}
2170 2101
2171u16_t zfHpFindFirstNonDfsChannel(zdev_t* dev, u16_t aBand) 2102u16_t zfHpFindFirstNonDfsChannel(zdev_t *dev, u16_t aBand)
2172{ 2103{
2173 u16_t chan = 2412; 2104 u16_t chan = 2412;
2174 u16_t i; 2105 u16_t i;
2175 zmw_get_wlan_dev(dev); 2106 zmw_get_wlan_dev(dev);
2176 2107
2177 zmw_declare_for_critical_section(); 2108 zmw_declare_for_critical_section();
2178 2109
2179 zmw_enter_critical_section(dev); 2110 zmw_enter_critical_section(dev);
2180 2111
2181 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) 2112 for (i = 0; i < wd->regulationTable.allowChannelCnt; i++) {
2182 { 2113 if ((wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS) != 0) {
2183 if ((wd->regulationTable.allowChannel[i].privFlags & ZM_REG_FLAG_CHANNEL_DFS) != 0) 2114 if (aBand) {
2184 { 2115 if (wd->regulationTable.allowChannel[i].channel > 3000) {
2185 if (aBand) 2116 chan = wd->regulationTable.allowChannel[i].channel;
2186 { 2117 break;
2187 if (wd->regulationTable.allowChannel[i].channel > 3000) 2118 }
2188 { 2119 } else {
2189 chan = wd->regulationTable.allowChannel[i].channel; 2120 if (wd->regulationTable.allowChannel[i].channel < 3000) {
2190 break; 2121 chan = wd->regulationTable.allowChannel[i].channel;
2191 } 2122 break;
2192 } 2123 }
2193 else 2124 }
2194 { 2125 }
2195 if (wd->regulationTable.allowChannel[i].channel < 3000) 2126 }
2196 { 2127
2197 chan = wd->regulationTable.allowChannel[i].channel; 2128 zmw_leave_critical_section(dev);
2198 break; 2129
2199 } 2130 return chan;
2200 }
2201 }
2202 }
2203
2204 zmw_leave_critical_section(dev);
2205
2206 return chan;
2207} 2131}
2208 2132
2209 2133
2210/* porting from ACU */ 2134/* porting from ACU */
2211/* save RegulatoryDomain in hpriv */ 2135/* save RegulatoryDomain in hpriv */
2212u8_t zfHpGetRegulatoryDomain(zdev_t* dev) 2136u8_t zfHpGetRegulatoryDomain(zdev_t *dev)
2213{ 2137{
2214 zmw_get_wlan_dev(dev); 2138 zmw_get_wlan_dev(dev);
2215 2139
2216 switch (wd->regulationTable.regionCode) 2140 switch (wd->regulationTable.regionCode) {
2217 { 2141 case NO_ENUMRD:
2218 case NO_ENUMRD: 2142 return 0;
2219 return 0; 2143 break;
2220 break; 2144 case FCC1_FCCA:
2221 case FCC1_FCCA: 2145 case FCC1_WORLD:
2222 case FCC1_WORLD: 2146 case FCC4_FCCA:
2223 case FCC4_FCCA: 2147 case FCC5_FCCA:
2224 case FCC5_FCCA: 2148 case FCC2_WORLD:
2225 case FCC2_WORLD: 2149 case FCC2_ETSIC:
2226 case FCC2_ETSIC: 2150 case FCC3_FCCA:
2227 case FCC3_FCCA: 2151 case FCC3_WORLD:
2228 case FCC3_WORLD: 2152 case FCC1:
2229 case FCC1: 2153 case FCC2:
2230 case FCC2: 2154 case FCC3:
2231 case FCC3: 2155 case FCC4:
2232 case FCC4: 2156 case FCC5:
2233 case FCC5: 2157 case FCCA:
2234 case FCCA: 2158 return 0x10;/* WG_AMERICAS DOT11_REG_DOMAIN_FCC United States */
2235 return 0x10;//WG_AMERICAS DOT11_REG_DOMAIN_FCC United States 2159 break;
2236 break; 2160
2237 2161 case FCC2_FCCA:
2238 case FCC2_FCCA: 2162 return 0x20;/* DOT11_REG_DOMAIN_DOC Canada */
2239 return 0x20;//DOT11_REG_DOMAIN_DOC Canada 2163 break;
2240 break; 2164
2241 2165 case ETSI1_WORLD:
2242 case ETSI1_WORLD: 2166 case ETSI3_ETSIA:
2243 case ETSI3_ETSIA: 2167 case ETSI2_WORLD:
2244 case ETSI2_WORLD: 2168 case ETSI3_WORLD:
2245 case ETSI3_WORLD: 2169 case ETSI4_WORLD:
2246 case ETSI4_WORLD: 2170 case ETSI4_ETSIC:
2247 case ETSI4_ETSIC: 2171 case ETSI5_WORLD:
2248 case ETSI5_WORLD: 2172 case ETSI6_WORLD:
2249 case ETSI6_WORLD: 2173 case ETSI_RESERVED:
2250 case ETSI_RESERVED: 2174 case ETSI1:
2251 case ETSI1: 2175 case ETSI2:
2252 case ETSI2: 2176 case ETSI3:
2253 case ETSI3: 2177 case ETSI4:
2254 case ETSI4: 2178 case ETSI5:
2255 case ETSI5: 2179 case ETSI6:
2256 case ETSI6: 2180 case ETSIA:
2257 case ETSIA: 2181 case ETSIB:
2258 case ETSIB: 2182 case ETSIC:
2259 case ETSIC: 2183 return 0x30;/* WG_EMEA DOT11_REG_DOMAIN_ETSI Most of Europe */
2260 return 0x30;//WG_EMEA DOT11_REG_DOMAIN_ETSI Most of Europe 2184 break;
2261 break; 2185
2262 2186 case MKK1_MKKA:
2263 case MKK1_MKKA: 2187 case MKK1_MKKB:
2264 case MKK1_MKKB: 2188 case MKK2_MKKA:
2265 case MKK2_MKKA: 2189 case MKK1_FCCA:
2266 case MKK1_FCCA: 2190 case MKK1_MKKA1:
2267 case MKK1_MKKA1: 2191 case MKK1_MKKA2:
2268 case MKK1_MKKA2: 2192 case MKK1_MKKC:
2269 case MKK1_MKKC: 2193 case MKK3_MKKB:
2270 case MKK3_MKKB: 2194 case MKK3_MKKA2:
2271 case MKK3_MKKA2: 2195 case MKK3_MKKC:
2272 case MKK3_MKKC: 2196 case MKK4_MKKB:
2273 case MKK4_MKKB: 2197 case MKK4_MKKA2:
2274 case MKK4_MKKA2: 2198 case MKK4_MKKC:
2275 case MKK4_MKKC: 2199 case MKK5_MKKB:
2276 case MKK5_MKKB: 2200 case MKK5_MKKA2:
2277 case MKK5_MKKA2: 2201 case MKK5_MKKC:
2278 case MKK5_MKKC: 2202 case MKK6_MKKB:
2279 case MKK6_MKKB: 2203 case MKK6_MKKA2:
2280 case MKK6_MKKA2: 2204 case MKK6_MKKC:
2281 case MKK6_MKKC: 2205 case MKK7_MKKB:
2282 case MKK7_MKKB: 2206 case MKK7_MKKA:
2283 case MKK7_MKKA: 2207 case MKK7_MKKC:
2284 case MKK7_MKKC: 2208 case MKK8_MKKB:
2285 case MKK8_MKKB: 2209 case MKK8_MKKA2:
2286 case MKK8_MKKA2: 2210 case MKK8_MKKC:
2287 case MKK8_MKKC: 2211 case MKK6_MKKA1:
2288 case MKK6_MKKA1: 2212 case MKK6_FCCA:
2289 case MKK6_FCCA: 2213 case MKK7_MKKA1:
2290 case MKK7_MKKA1: 2214 case MKK7_FCCA:
2291 case MKK7_FCCA: 2215 case MKK9_FCCA:
2292 case MKK9_FCCA: 2216 case MKK9_MKKA1:
2293 case MKK9_MKKA1: 2217 case MKK9_MKKC:
2294 case MKK9_MKKC: 2218 case MKK9_MKKA2:
2295 case MKK9_MKKA2: 2219 case MKK10_FCCA:
2296 case MKK10_FCCA: 2220 case MKK10_MKKA1:
2297 case MKK10_MKKA1: 2221 case MKK10_MKKC:
2298 case MKK10_MKKC: 2222 case MKK10_MKKA2:
2299 case MKK10_MKKA2: 2223 case MKK11_MKKA:
2300 case MKK11_MKKA: 2224 case MKK11_FCCA:
2301 case MKK11_FCCA: 2225 case MKK11_MKKA1:
2302 case MKK11_MKKA1: 2226 case MKK11_MKKC:
2303 case MKK11_MKKC: 2227 case MKK11_MKKA2:
2304 case MKK11_MKKA2: 2228 case MKK12_MKKA:
2305 case MKK12_MKKA: 2229 case MKK12_FCCA:
2306 case MKK12_FCCA: 2230 case MKK12_MKKA1:
2307 case MKK12_MKKA1: 2231 case MKK12_MKKC:
2308 case MKK12_MKKC: 2232 case MKK12_MKKA2:
2309 case MKK12_MKKA2: 2233 case MKK3_MKKA:
2310 case MKK3_MKKA: 2234 case MKK3_MKKA1:
2311 case MKK3_MKKA1: 2235 case MKK3_FCCA:
2312 case MKK3_FCCA: 2236 case MKK4_MKKA:
2313 case MKK4_MKKA: 2237 case MKK4_MKKA1:
2314 case MKK4_MKKA1: 2238 case MKK4_FCCA:
2315 case MKK4_FCCA: 2239 case MKK9_MKKA:
2316 case MKK9_MKKA: 2240 case MKK10_MKKA:
2317 case MKK10_MKKA: 2241 case MKK1:
2318 case MKK1: 2242 case MKK2:
2319 case MKK2: 2243 case MKK3:
2320 case MKK3: 2244 case MKK4:
2321 case MKK4: 2245 case MKK5:
2322 case MKK5: 2246 case MKK6:
2323 case MKK6: 2247 case MKK7:
2324 case MKK7: 2248 case MKK8:
2325 case MKK8: 2249 case MKK9:
2326 case MKK9: 2250 case MKK10:
2327 case MKK10: 2251 case MKK11:
2328 case MKK11: 2252 case MKK12:
2329 case MKK12: 2253 case MKKA:
2330 case MKKA: 2254 case MKKC:
2331 case MKKC: 2255 return 0x40;/* WG_JAPAN DOT11_REG_DOMAIN_MKK Japan */
2332 return 0x40;//WG_JAPAN DOT11_REG_DOMAIN_MKK Japan 2256 break;
2333 break; 2257
2334 2258 default:
2335 default: 2259 break;
2336 break; 2260 }
2337 }
2338 return 0xFF;// Didn't input RegDmn by mean to distinguish by customer
2339 2261
2262 return 0xFF; /* Didn't input RegDmn by mean to distinguish by customer */
2340} 2263}
2341 2264
2342 2265void zfHpDisableDfsChannel(zdev_t *dev, u8_t disableFlag)
2343void zfHpDisableDfsChannel(zdev_t* dev, u8_t disableFlag)
2344{ 2266{
2345 struct zsHpPriv* hpPriv; 2267 struct zsHpPriv *hpPriv;
2346 2268
2347 zmw_get_wlan_dev(dev); 2269 zmw_get_wlan_dev(dev);
2348 hpPriv=wd->hpPrivate; 2270 hpPriv = wd->hpPrivate;
2349 hpPriv->disableDfsCh = disableFlag; 2271 hpPriv->disableDfsCh = disableFlag;
2350 return; 2272 return;
2351} 2273}
diff --git a/drivers/staging/otus/ioctl.c b/drivers/staging/otus/ioctl.c
index 84be4b2cd692..a48c8e4a9ea7 100644
--- a/drivers/staging/otus/ioctl.c
+++ b/drivers/staging/otus/ioctl.c
@@ -30,34 +30,34 @@
30 30
31#include "usbdrv.h" 31#include "usbdrv.h"
32 32
33#define ZD_IOCTL_WPA (SIOCDEVPRIVATE + 1) 33#define ZD_IOCTL_WPA (SIOCDEVPRIVATE + 1)
34#define ZD_IOCTL_PARAM (SIOCDEVPRIVATE + 2) 34#define ZD_IOCTL_PARAM (SIOCDEVPRIVATE + 2)
35#define ZD_IOCTL_GETWPAIE (SIOCDEVPRIVATE + 3) 35#define ZD_IOCTL_GETWPAIE (SIOCDEVPRIVATE + 3)
36#ifdef ZM_ENABLE_CENC 36#ifdef ZM_ENABLE_CENC
37#define ZM_IOCTL_CENC (SIOCDEVPRIVATE + 4) 37#define ZM_IOCTL_CENC (SIOCDEVPRIVATE + 4)
38#endif /* ZM_ENABLE_CENC */ 38#endif /* ZM_ENABLE_CENC */
39#define ZD_PARAM_ROAMING 0x0001 39#define ZD_PARAM_ROAMING 0x0001
40#define ZD_PARAM_PRIVACY 0x0002 40#define ZD_PARAM_PRIVACY 0x0002
41#define ZD_PARAM_WPA 0x0003 41#define ZD_PARAM_WPA 0x0003
42#define ZD_PARAM_COUNTERMEASURES 0x0004 42#define ZD_PARAM_COUNTERMEASURES 0x0004
43#define ZD_PARAM_DROPUNENCRYPTED 0x0005 43#define ZD_PARAM_DROPUNENCRYPTED 0x0005
44#define ZD_PARAM_AUTH_ALGS 0x0006 44#define ZD_PARAM_AUTH_ALGS 0x0006
45#define ZD_PARAM_WPS_FILTER 0x0007 45#define ZD_PARAM_WPS_FILTER 0x0007
46 46
47#ifdef ZM_ENABLE_CENC 47#ifdef ZM_ENABLE_CENC
48#define P80211_PACKET_CENCFLAG 0x0001 48#define P80211_PACKET_CENCFLAG 0x0001
49#endif /* ZM_ENABLE_CENC */ 49#endif /* ZM_ENABLE_CENC */
50#define P80211_PACKET_SETKEY 0x0003 50#define P80211_PACKET_SETKEY 0x0003
51 51
52#define ZD_CMD_SET_ENCRYPT_KEY 0x0001 52#define ZD_CMD_SET_ENCRYPT_KEY 0x0001
53#define ZD_CMD_SET_MLME 0x0002 53#define ZD_CMD_SET_MLME 0x0002
54#define ZD_CMD_SCAN_REQ 0x0003 54#define ZD_CMD_SCAN_REQ 0x0003
55#define ZD_CMD_SET_GENERIC_ELEMENT 0x0004 55#define ZD_CMD_SET_GENERIC_ELEMENT 0x0004
56#define ZD_CMD_GET_TSC 0x0005 56#define ZD_CMD_GET_TSC 0x0005
57 57
58#define ZD_CRYPT_ALG_NAME_LEN 16 58#define ZD_CRYPT_ALG_NAME_LEN 16
59#define ZD_MAX_KEY_SIZE 32 59#define ZD_MAX_KEY_SIZE 32
60#define ZD_MAX_GENERIC_SIZE 64 60#define ZD_MAX_GENERIC_SIZE 64
61 61
62#include <net/iw_handler.h> 62#include <net/iw_handler.h>
63 63
@@ -867,6 +867,7 @@ int usbdrvwext_giwscan(struct net_device *dev,
867 char *current_ev = extra; 867 char *current_ev = extra;
868 char *end_buf; 868 char *end_buf;
869 int i; 869 int i;
870 struct zsBssListV1 *pBssList;
870 /* BssList = wd->sta.pBssList; */ 871 /* BssList = wd->sta.pBssList; */
871 /* zmw_get_wlan_dev(dev); */ 872 /* zmw_get_wlan_dev(dev); */
872 873
@@ -874,8 +875,10 @@ int usbdrvwext_giwscan(struct net_device *dev,
874 return 0; 875 return 0;
875 876
876 /* struct zsBssList BssList; */ 877 /* struct zsBssList BssList; */
877 struct zsBssListV1 *pBssList = kmalloc(sizeof(struct zsBssListV1), 878 pBssList = kmalloc(sizeof(struct zsBssListV1), GFP_KERNEL);
878 GFP_KERNEL); 879 if (pBssList == NULL)
880 return -ENOMEM;
881
879 if (data->length == 0) 882 if (data->length == 0)
880 end_buf = extra + IW_SCAN_MAX_DATA; 883 end_buf = extra + IW_SCAN_MAX_DATA;
881 else 884 else
diff --git a/drivers/staging/otus/usbdrv.c b/drivers/staging/otus/usbdrv.c
index 0ce65b5b9456..165a82b9ab85 100644
--- a/drivers/staging/otus/usbdrv.c
+++ b/drivers/staging/otus/usbdrv.c
@@ -350,7 +350,8 @@ int usbdrv_open(struct net_device *dev)
350 } 350 }
351 351
352 size = zfiGlobalDataSize(dev); 352 size = zfiGlobalDataSize(dev);
353 if ((mem = kmalloc(size, GFP_KERNEL)) == NULL) 353 mem = kmalloc(size, GFP_KERNEL);
354 if (mem == NULL)
354 { 355 {
355 rc = -EBUSY; 356 rc = -EBUSY;
356 goto exit; 357 goto exit;
@@ -698,7 +699,8 @@ void usbdrv_remove1(struct pci_dev *pcid)
698 struct net_device *dev; 699 struct net_device *dev;
699 struct usbdrv_private *macp; 700 struct usbdrv_private *macp;
700 701
701 if (!(dev = (struct net_device *) pci_get_drvdata(pcid))) 702 dev = (struct net_device *)pci_get_drvdata(pcid);
703 if (!dev)
702 return; 704 return;
703 705
704 macp = dev->ml_priv; 706 macp = dev->ml_priv;
diff --git a/drivers/staging/otus/wwrap.c b/drivers/staging/otus/wwrap.c
index a74f7eea56e4..b02eb42cd796 100644
--- a/drivers/staging/otus/wwrap.c
+++ b/drivers/staging/otus/wwrap.c
@@ -956,7 +956,6 @@ int zfLnxCencSendMsg(struct sock *netlink_sk, u_int8_t *msg, int len)
956 /*ÌîдÊý¾Ý±¨Ïà¹ØÐÅÏ¢*/ 956 /*ÌîдÊý¾Ý±¨Ïà¹ØÐÅÏ¢*/
957 nlh = NLMSG_PUT(skb, 0, 0, WAI_K_MSG, size-sizeof(*nlh)); 957 nlh = NLMSG_PUT(skb, 0, 0, WAI_K_MSG, size-sizeof(*nlh));
958 pos = NLMSG_DATA(nlh); 958 pos = NLMSG_DATA(nlh);
959 memset(pos, 0, len);
960 959
961 /*´«Êäµ½Óû§¿Õ¼äµÄÊý¾Ý*/ 960 /*´«Êäµ½Óû§¿Õ¼äµÄÊý¾Ý*/
962 memcpy(pos, msg, len); 961 memcpy(pos, msg, len);
diff --git a/drivers/staging/otus/zdusb.c b/drivers/staging/otus/zdusb.c
index bb89d85a4c7c..2c799a250294 100644
--- a/drivers/staging/otus/zdusb.c
+++ b/drivers/staging/otus/zdusb.c
@@ -95,16 +95,14 @@ static int zfLnxProbe(struct usb_interface *interface,
95 printk(KERN_NOTICE "USB 1.1 Host\n"); 95 printk(KERN_NOTICE "USB 1.1 Host\n");
96#endif 96#endif
97 97
98 if (!(macp = kmalloc(sizeof(struct usbdrv_private), GFP_KERNEL))) 98 macp = kzalloc(sizeof(struct usbdrv_private), GFP_KERNEL);
99 if (!macp)
99 { 100 {
100 printk(KERN_ERR "out of memory allocating device structure\n"); 101 printk(KERN_ERR "out of memory allocating device structure\n");
101 result = -ENOMEM; 102 result = -ENOMEM;
102 goto fail; 103 goto fail;
103 } 104 }
104 105
105 /* Zero the memory */
106 memset(macp, 0, sizeof(struct usbdrv_private));
107
108 net = alloc_etherdev(0); 106 net = alloc_etherdev(0);
109 107
110 if (net == NULL) 108 if (net == NULL)
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c
index 377884f3480d..9ca0e9e2a961 100644
--- a/drivers/staging/panel/panel.c
+++ b/drivers/staging/panel/panel.c
@@ -57,7 +57,7 @@
57#include <generated/utsrelease.h> 57#include <generated/utsrelease.h>
58 58
59#include <linux/io.h> 59#include <linux/io.h>
60#include <asm/uaccess.h> 60#include <linux/uaccess.h>
61#include <asm/system.h> 61#include <asm/system.h>
62 62
63#define LCD_MINOR 156 63#define LCD_MINOR 156
@@ -1906,12 +1906,11 @@ static struct logical_input *panel_bind_key(char *name, char *press,
1906{ 1906{
1907 struct logical_input *key; 1907 struct logical_input *key;
1908 1908
1909 key = kmalloc(sizeof(struct logical_input), GFP_KERNEL); 1909 key = kzalloc(sizeof(struct logical_input), GFP_KERNEL);
1910 if (!key) { 1910 if (!key) {
1911 printk(KERN_ERR "panel: not enough memory\n"); 1911 printk(KERN_ERR "panel: not enough memory\n");
1912 return NULL; 1912 return NULL;
1913 } 1913 }
1914 memset(key, 0, sizeof(struct logical_input));
1915 if (!input_name2mask(name, &key->mask, &key->value, &scan_mask_i, 1914 if (!input_name2mask(name, &key->mask, &key->value, &scan_mask_i,
1916 &scan_mask_o)) 1915 &scan_mask_o))
1917 return NULL; 1916 return NULL;
diff --git a/drivers/staging/phison/phison.c b/drivers/staging/phison/phison.c
index 0c495eacb75b..42783d7367e3 100644
--- a/drivers/staging/phison/phison.c
+++ b/drivers/staging/phison/phison.c
@@ -23,7 +23,7 @@
23#define PHISON_DEBUG 23#define PHISON_DEBUG
24 24
25#define DRV_NAME "phison_e-box" /* #0003 */ 25#define DRV_NAME "phison_e-box" /* #0003 */
26#define DRV_VERSION "0.91" /* #0003 */ 26#define DRV_VERSION "0.91" /* #0003 */
27 27
28#define PCI_VENDOR_ID_PHISON 0x1987 28#define PCI_VENDOR_ID_PHISON 0x1987
29#define PCI_DEVICE_ID_PS5000 0x5000 29#define PCI_DEVICE_ID_PS5000 0x5000
@@ -56,7 +56,7 @@ static int phison_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
56 56
57 .pio_mask = 0x1f, 57 .pio_mask = 0x1f,
58 .mwdma_mask = 0x07, 58 .mwdma_mask = 0x07,
59 .udma_mask = ATA_UDMA5, 59 .udma_mask = ATA_UDMA5,
60 60
61 .port_ops = &phison_ops, 61 .port_ops = &phison_ops,
62 }; 62 };
diff --git a/drivers/staging/poch/Kconfig b/drivers/staging/poch/Kconfig
deleted file mode 100644
index b3b33b984a57..000000000000
--- a/drivers/staging/poch/Kconfig
+++ /dev/null
@@ -1,6 +0,0 @@
1config POCH
2 tristate "Redrapids Pocket Change CardBus support"
3 depends on PCI && UIO
4 default N
5 ---help---
6 Enable support for Redrapids Pocket Change CardBus devices.
diff --git a/drivers/staging/poch/Makefile b/drivers/staging/poch/Makefile
deleted file mode 100644
index d2b96805cb9e..000000000000
--- a/drivers/staging/poch/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-$(CONFIG_POCH) += poch.o
diff --git a/drivers/staging/poch/README b/drivers/staging/poch/README
deleted file mode 100644
index ac76ff969a2f..000000000000
--- a/drivers/staging/poch/README
+++ /dev/null
@@ -1,136 +0,0 @@
1TODO:
2 - Rx block size is limited to < 2048, hardware bug?
3 - Group size is limited to < page size, kernel alloc/mmap API issues
4 - test whether Tx is transmitting data from provided buffers
5 - handle device unplug case
6 - handle temperature above threshold
7 - use bus address instead of physical address for DMA
8 - support for snapshot mode
9 - audit userspace interfaces
10 - get reserved major/minor if needed
11
12Sample Code:
13
14#include <sys/types.h>
15#include <sys/stat.h>
16#include <sys/mman.h>
17#include <sys/ioctl.h>
18#include <poll.h>
19#include <stdio.h>
20#include <error.h>
21#include <errno.h>
22#include <fcntl.h>
23#include <stdint.h>
24
25#include <sysfs/libsysfs.h>
26
27#include <poch.h>
28
29struct pconsume {
30 uint32_t * offsets;
31 uint32_t nfetch;
32 uint32_t nflush;
33};
34
35uint32_t offsets[10];
36
37void process_group(unsigned char *buf, uint32_t size)
38{
39 uint16_t *buf16 = (uint16_t *)buf;
40
41 printf("RX: %p %u %04x %04x %04x %04x %04x %04x\n", buf, size,
42 buf16[0], buf16[1], buf16[2], buf16[3], buf16[4], buf16[5]);
43}
44
45int main()
46{
47 struct sysfs_attribute *attr;
48 char *path;
49 int ret;
50 unsigned long mmap_size;
51 int fd;
52 unsigned char *cbuf;
53
54 uint32_t nflush;
55 struct pollfd poll_fds;
56 int count = 0;
57 int i;
58
59 path = "/sys/class/pocketchange/poch0/ch0/block_size";
60 attr = sysfs_open_attribute(path);
61 ret = sysfs_write_attribute(attr, "256", strlen("256"));
62 if (ret == -1)
63 error(1, errno, "error writing attribute %s", path);
64 sysfs_close_attribute(attr);
65
66 path = "/sys/class/pocketchange/poch0/ch0/group_size";
67 attr = sysfs_open_attribute(path);
68 ret = sysfs_write_attribute(attr, "4096", strlen("4096"));
69 if (ret == -1)
70 error(1, errno, "error writing attribute %s", path);
71 sysfs_close_attribute(attr);
72
73 path = "/sys/class/pocketchange/poch0/ch0/group_count";
74 attr = sysfs_open_attribute(path);
75 ret = sysfs_write_attribute(attr, "64", strlen("64"));
76 if (ret == -1)
77 error(1, errno, "error writing attribute %s", path);
78 sysfs_close_attribute(attr);
79
80 fd = open("/dev/ch0", O_RDWR);
81 if (fd == -1)
82 error(1, errno, "error opening device node");
83
84 path = "/sys/class/pocketchange/poch0/ch0/mmap_size";
85 attr = sysfs_open_attribute(path);
86 ret = sysfs_read_attribute(attr);
87 if (ret == -1)
88 error(1, errno, "error reading attribute %s", path);
89 printf("%s", attr->value);
90 sscanf(attr->value, "%lu", &mmap_size);
91 sysfs_close_attribute(attr);
92
93 cbuf = mmap(NULL, mmap_size, PROT_READ | PROT_WRITE,
94 MAP_PRIVATE, fd, 0);
95 if (cbuf == MAP_FAILED)
96 error(1, errno, "error mapping DMA buffers");
97
98 ret = ioctl(fd, POCH_IOC_TRANSFER_START, 0);
99 if (ret == -1)
100 error(1, errno, "error starting transfer");
101
102 nflush = 0;
103 while (1) {
104 struct pconsume consume;
105
106 consume.offsets = offsets;
107 consume.nfetch = 10;
108 consume.nflush = nflush;
109
110 ret = ioctl(fd, POCH_IOC_CONSUME, &consume);
111 if (ret == -1)
112 error(1, errno, "error consuming groups");
113
114 nflush = consume.nfetch;
115
116 for (i = 0; i < nflush; i++) {
117 process_group(cbuf + consume.offsets[i], 4096);
118
119 count++;
120 if (count == 1000)
121 break;
122 }
123
124 if (count == 1000)
125 break;
126 }
127
128 ret = ioctl(fd, POCH_IOC_TRANSFER_STOP, 0);
129 if (ret == -1)
130 error(1, errno, "error starting transfer");
131
132 return 0;
133}
134
135Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
136Vijay Kumar <vijaykumar@bravegnu.org> and Jaya Kumar <jayakumar.lkml@gmail.com>
diff --git a/drivers/staging/poch/poch.c b/drivers/staging/poch/poch.c
deleted file mode 100644
index f940a34c1a0c..000000000000
--- a/drivers/staging/poch/poch.c
+++ /dev/null
@@ -1,1443 +0,0 @@
1/*
2 * User-space DMA and UIO based Redrapids Pocket Change CardBus driver
3 *
4 * Copyright 2008 Vijay Kumar <vijaykumar@bravegnu.org>
5 *
6 * Licensed under GPL version 2 only.
7 */
8
9#include <linux/device.h>
10#include <linux/module.h>
11#include <linux/pci.h>
12#include <linux/uio_driver.h>
13#include <linux/spinlock.h>
14#include <linux/cdev.h>
15#include <linux/delay.h>
16#include <linux/sysfs.h>
17#include <linux/poll.h>
18#include <linux/idr.h>
19#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/ioctl.h>
22#include <linux/io.h>
23#include <linux/sched.h>
24#include <linux/slab.h>
25
26#include "poch.h"
27
28#include <asm/cacheflush.h>
29
30#ifndef PCI_VENDOR_ID_RRAPIDS
31#define PCI_VENDOR_ID_RRAPIDS 0x17D2
32#endif
33
34#ifndef PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE
35#define PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE 0x0351
36#endif
37
38#define POCH_NCHANNELS 2
39
40#define MAX_POCH_CARDS 8
41#define MAX_POCH_DEVICES (MAX_POCH_CARDS * POCH_NCHANNELS)
42
43#define DRV_NAME "poch"
44#define PFX DRV_NAME ": "
45
46/*
47 * BAR0 Bridge Register Definitions
48 */
49
50#define BRIDGE_REV_REG 0x0
51#define BRIDGE_INT_MASK_REG 0x4
52#define BRIDGE_INT_STAT_REG 0x8
53
54#define BRIDGE_INT_ACTIVE (0x1 << 31)
55#define BRIDGE_INT_FPGA (0x1 << 2)
56#define BRIDGE_INT_TEMP_FAIL (0x1 << 1)
57#define BRIDGE_INT_TEMP_WARN (0x1 << 0)
58
59#define BRIDGE_FPGA_RESET_REG 0xC
60
61#define BRIDGE_CARD_POWER_REG 0x10
62#define BRIDGE_CARD_POWER_EN (0x1 << 0)
63#define BRIDGE_CARD_POWER_PROG_DONE (0x1 << 31)
64
65#define BRIDGE_JTAG_REG 0x14
66#define BRIDGE_DMA_GO_REG 0x18
67#define BRIDGE_STAT_0_REG 0x1C
68#define BRIDGE_STAT_1_REG 0x20
69#define BRIDGE_STAT_2_REG 0x24
70#define BRIDGE_STAT_3_REG 0x28
71#define BRIDGE_TEMP_STAT_REG 0x2C
72#define BRIDGE_TEMP_THRESH_REG 0x30
73#define BRIDGE_EEPROM_REVSEL_REG 0x34
74#define BRIDGE_CIS_STRUCT_REG 0x100
75#define BRIDGE_BOARDREV_REG 0x124
76
77/*
78 * BAR1 FPGA Register Definitions
79 */
80
81#define FPGA_IFACE_REV_REG 0x0
82#define FPGA_RX_BLOCK_SIZE_REG 0x8
83#define FPGA_TX_BLOCK_SIZE_REG 0xC
84#define FPGA_RX_BLOCK_COUNT_REG 0x10
85#define FPGA_TX_BLOCK_COUNT_REG 0x14
86#define FPGA_RX_CURR_DMA_BLOCK_REG 0x18
87#define FPGA_TX_CURR_DMA_BLOCK_REG 0x1C
88#define FPGA_RX_GROUP_COUNT_REG 0x20
89#define FPGA_TX_GROUP_COUNT_REG 0x24
90#define FPGA_RX_CURR_GROUP_REG 0x28
91#define FPGA_TX_CURR_GROUP_REG 0x2C
92#define FPGA_RX_CURR_PCI_REG 0x38
93#define FPGA_TX_CURR_PCI_REG 0x3C
94#define FPGA_RX_GROUP0_START_REG 0x40
95#define FPGA_TX_GROUP0_START_REG 0xC0
96#define FPGA_DMA_DESC_1_REG 0x140
97#define FPGA_DMA_DESC_2_REG 0x144
98#define FPGA_DMA_DESC_3_REG 0x148
99#define FPGA_DMA_DESC_4_REG 0x14C
100
101#define FPGA_DMA_INT_STAT_REG 0x150
102#define FPGA_DMA_INT_MASK_REG 0x154
103#define FPGA_DMA_INT_RX (1 << 0)
104#define FPGA_DMA_INT_TX (1 << 1)
105
106#define FPGA_RX_GROUPS_PER_INT_REG 0x158
107#define FPGA_TX_GROUPS_PER_INT_REG 0x15C
108#define FPGA_DMA_ADR_PAGE_REG 0x160
109#define FPGA_FPGA_REV_REG 0x200
110
111#define FPGA_ADC_CLOCK_CTL_REG 0x204
112#define FPGA_ADC_CLOCK_CTL_OSC_EN (0x1 << 3)
113#define FPGA_ADC_CLOCK_LOCAL_CLK (0x1 | FPGA_ADC_CLOCK_CTL_OSC_EN)
114#define FPGA_ADC_CLOCK_EXT_SAMP_CLK 0X0
115
116#define FPGA_ADC_DAC_EN_REG 0x208
117#define FPGA_ADC_DAC_EN_DAC_OFF (0x1 << 1)
118#define FPGA_ADC_DAC_EN_ADC_OFF (0x1 << 0)
119
120#define FPGA_INT_STAT_REG 0x20C
121#define FPGA_INT_MASK_REG 0x210
122#define FPGA_INT_PLL_UNLOCKED (0x1 << 9)
123#define FPGA_INT_DMA_CORE (0x1 << 8)
124#define FPGA_INT_TX_FF_EMPTY (0x1 << 7)
125#define FPGA_INT_RX_FF_EMPTY (0x1 << 6)
126#define FPGA_INT_TX_FF_OVRFLW (0x1 << 3)
127#define FPGA_INT_RX_FF_OVRFLW (0x1 << 2)
128#define FPGA_INT_TX_ACQ_DONE (0x1 << 1)
129#define FPGA_INT_RX_ACQ_DONE (0x1)
130
131#define FPGA_RX_CTL_REG 0x214
132#define FPGA_RX_CTL_FIFO_FLUSH (0x1 << 9)
133#define FPGA_RX_CTL_SYNTH_DATA (0x1 << 8)
134#define FPGA_RX_CTL_CONT_CAP (0x0 << 1)
135#define FPGA_RX_CTL_SNAP_CAP (0x1 << 1)
136
137#define FPGA_RX_ARM_REG 0x21C
138
139#define FPGA_DOM_REG 0x224
140#define FPGA_DOM_DCM_RESET (0x1 << 5)
141#define FPGA_DOM_SOFT_RESET (0x1 << 4)
142#define FPGA_DOM_DUAL_M_SG_DMA (0x0)
143#define FPGA_DOM_TARGET_ACCESS (0x1)
144
145#define FPGA_TX_CTL_REG 0x228
146#define FPGA_TX_CTL_FIFO_FLUSH (0x1 << 9)
147#define FPGA_TX_CTL_OUTPUT_ZERO (0x0 << 2)
148#define FPGA_TX_CTL_OUTPUT_CARDBUS (0x1 << 2)
149#define FPGA_TX_CTL_OUTPUT_ADC (0x2 << 2)
150#define FPGA_TX_CTL_OUTPUT_SNAPSHOT (0x3 << 2)
151#define FPGA_TX_CTL_LOOPBACK (0x1 << 0)
152
153#define FPGA_ENDIAN_MODE_REG 0x22C
154#define FPGA_RX_FIFO_COUNT_REG 0x28C
155#define FPGA_TX_ENABLE_REG 0x298
156#define FPGA_TX_TRIGGER_REG 0x29C
157#define FPGA_TX_DATAMEM_COUNT_REG 0x2A8
158#define FPGA_CAP_FIFO_REG 0x300
159#define FPGA_TX_SNAPSHOT_REG 0x8000
160
161/*
162 * Channel Index Definitions
163 */
164
165enum {
166 CHNO_RX_CHANNEL,
167 CHNO_TX_CHANNEL,
168};
169
170struct poch_dev;
171
172enum channel_dir {
173 CHANNEL_DIR_RX,
174 CHANNEL_DIR_TX,
175};
176
177struct poch_group_info {
178 struct page *pg;
179 dma_addr_t dma_addr;
180 unsigned long user_offset;
181};
182
183struct channel_info {
184 unsigned int chno;
185
186 atomic_t sys_block_size;
187 atomic_t sys_group_size;
188 atomic_t sys_group_count;
189
190 enum channel_dir dir;
191
192 unsigned long block_size;
193 unsigned long group_size;
194 unsigned long group_count;
195
196 /* Contains the DMA address and VM offset of each group. */
197 struct poch_group_info *groups;
198
199 /* Contains the header and circular buffer exported to userspace. */
200 spinlock_t group_offsets_lock;
201
202 /* Last group consumed by user space. */
203 unsigned int consumed;
204 /* Last group indicated as 'complete' to user space. */
205 unsigned int transfer;
206
207 wait_queue_head_t wq;
208
209 union {
210 unsigned int data_available;
211 unsigned int space_available;
212 };
213
214 void __iomem *bridge_iomem;
215 void __iomem *fpga_iomem;
216 spinlock_t *iomem_lock;
217
218 atomic_t free;
219 atomic_t inited;
220
221 /* Error counters */
222 struct poch_counters counters;
223 spinlock_t counters_lock;
224
225 struct device *dev;
226};
227
228struct poch_dev {
229 struct uio_info uio;
230 struct pci_dev *pci_dev;
231 unsigned int nchannels;
232 struct channel_info channels[POCH_NCHANNELS];
233 struct cdev cdev;
234
235 /* Counts the no. of channels that have been opened. On first
236 * open, the card is powered on. On last channel close, the
237 * card is powered off.
238 */
239 atomic_t usage;
240
241 void __iomem *bridge_iomem;
242 void __iomem *fpga_iomem;
243 spinlock_t iomem_lock;
244
245 struct device *dev;
246};
247
248static int synth_rx;
249module_param(synth_rx, bool, 0600);
250MODULE_PARM_DESC(synth_rx,
251 "Synthesize received values using a counter. Default: No");
252
253static int loopback;
254module_param(loopback, bool, 0600);
255MODULE_PARM_DESC(loopback,
256 "Enable hardware loopback of trasnmitted data. Default: No");
257
258static dev_t poch_first_dev;
259static struct class *poch_cls;
260static DEFINE_IDR(poch_ids);
261
262static ssize_t store_block_size(struct device *dev,
263 struct device_attribute *attr,
264 const char *buf, size_t count)
265{
266 struct channel_info *channel = dev_get_drvdata(dev);
267 unsigned long block_size;
268
269 sscanf(buf, "%lu", &block_size);
270 atomic_set(&channel->sys_block_size, block_size);
271
272 return count;
273}
274static DEVICE_ATTR(block_size, S_IWUSR|S_IWGRP, NULL, store_block_size);
275
276static ssize_t store_group_size(struct device *dev,
277 struct device_attribute *attr,
278 const char *buf, size_t count)
279{
280 struct channel_info *channel = dev_get_drvdata(dev);
281 unsigned long group_size;
282
283 sscanf(buf, "%lu", &group_size);
284 atomic_set(&channel->sys_group_size, group_size);
285
286 return count;
287}
288static DEVICE_ATTR(group_size, S_IWUSR|S_IWGRP, NULL, store_group_size);
289
290static ssize_t store_group_count(struct device *dev,
291 struct device_attribute *attr,
292 const char *buf, size_t count)
293{
294 struct channel_info *channel = dev_get_drvdata(dev);
295 unsigned long group_count;
296
297 sscanf(buf, "%lu", &group_count);
298 atomic_set(&channel->sys_group_count, group_count);
299
300 return count;
301}
302static DEVICE_ATTR(group_count, S_IWUSR|S_IWGRP, NULL, store_group_count);
303
304static ssize_t show_direction(struct device *dev,
305 struct device_attribute *attr, char *buf)
306{
307 struct channel_info *channel = dev_get_drvdata(dev);
308 int len;
309
310 len = sprintf(buf, "%s\n", (channel->dir ? "tx" : "rx"));
311 return len;
312}
313static DEVICE_ATTR(dir, S_IRUSR|S_IRGRP, show_direction, NULL);
314
315static unsigned long npages(unsigned long bytes)
316{
317 if (bytes % PAGE_SIZE == 0)
318 return bytes / PAGE_SIZE;
319 else
320 return (bytes / PAGE_SIZE) + 1;
321}
322
323static ssize_t show_mmap_size(struct device *dev,
324 struct device_attribute *attr, char *buf)
325{
326 struct channel_info *channel = dev_get_drvdata(dev);
327 int len;
328 unsigned long mmap_size;
329 unsigned long group_pages;
330 unsigned long total_group_pages;
331
332 group_pages = npages(channel->group_size);
333 total_group_pages = group_pages * channel->group_count;
334
335 mmap_size = total_group_pages * PAGE_SIZE;
336 len = sprintf(buf, "%lu\n", mmap_size);
337 return len;
338}
339static DEVICE_ATTR(mmap_size, S_IRUSR|S_IRGRP, show_mmap_size, NULL);
340
341static struct device_attribute *poch_class_attrs[] = {
342 &dev_attr_block_size,
343 &dev_attr_group_size,
344 &dev_attr_group_count,
345 &dev_attr_dir,
346 &dev_attr_mmap_size,
347};
348
349static void poch_channel_free_groups(struct channel_info *channel)
350{
351 unsigned long i;
352
353 for (i = 0; i < channel->group_count; i++) {
354 struct poch_group_info *group;
355 unsigned int order;
356
357 group = &channel->groups[i];
358 order = get_order(channel->group_size);
359 if (group->pg)
360 __free_pages(group->pg, order);
361 }
362}
363
364static int poch_channel_alloc_groups(struct channel_info *channel)
365{
366 unsigned long i;
367 unsigned long group_pages;
368
369 group_pages = npages(channel->group_size);
370
371 for (i = 0; i < channel->group_count; i++) {
372 struct poch_group_info *group;
373 unsigned int order;
374 gfp_t gfp_mask;
375
376 group = &channel->groups[i];
377 order = get_order(channel->group_size);
378
379 /*
380 * __GFP_COMP is required here since we are going to
381 * perform non-linear mapping to userspace. For more
382 * information read the vm_insert_page() function
383 * comments.
384 */
385
386 gfp_mask = GFP_KERNEL | GFP_DMA32 | __GFP_ZERO;
387 group->pg = alloc_pages(gfp_mask, order);
388 if (!group->pg) {
389 poch_channel_free_groups(channel);
390 return -ENOMEM;
391 }
392
393 /* FIXME: This is the physical address not the bus
394 * address! This won't work in architectures that
395 * have an IOMMU. Can we use pci_map_single() for
396 * this?
397 */
398 group->dma_addr = page_to_pfn(group->pg) * PAGE_SIZE;
399 group->user_offset = (i * group_pages) * PAGE_SIZE;
400
401 printk(KERN_INFO PFX "%ld: user_offset: 0x%lx\n", i,
402 group->user_offset);
403 }
404
405 return 0;
406}
407
408static int channel_latch_attr(struct channel_info *channel)
409{
410 channel->group_count = atomic_read(&channel->sys_group_count);
411 channel->group_size = atomic_read(&channel->sys_group_size);
412 channel->block_size = atomic_read(&channel->sys_block_size);
413
414 if (channel->group_count == 0) {
415 printk(KERN_ERR PFX "invalid group count %lu",
416 channel->group_count);
417 return -EINVAL;
418 }
419
420 if (channel->group_size == 0 ||
421 channel->group_size < channel->block_size) {
422 printk(KERN_ERR PFX "invalid group size %lu",
423 channel->group_size);
424 return -EINVAL;
425 }
426
427 if (channel->block_size == 0 || (channel->block_size % 8) != 0) {
428 printk(KERN_ERR PFX "invalid block size %lu",
429 channel->block_size);
430 return -EINVAL;
431 }
432
433 if (channel->group_size % channel->block_size != 0) {
434 printk(KERN_ERR PFX
435 "group size should be multiple of block size");
436 return -EINVAL;
437 }
438
439 return 0;
440}
441
442/*
443 * Configure DMA group registers
444 */
445static void channel_dma_init(struct channel_info *channel)
446{
447 void __iomem *fpga = channel->fpga_iomem;
448 u32 group_regs_base;
449 u32 group_reg;
450 unsigned int page;
451 unsigned int group_in_page;
452 unsigned long i;
453 u32 block_size_reg;
454 u32 block_count_reg;
455 u32 group_count_reg;
456 u32 groups_per_int_reg;
457 u32 curr_pci_reg;
458
459 if (channel->chno == CHNO_RX_CHANNEL) {
460 group_regs_base = FPGA_RX_GROUP0_START_REG;
461 block_size_reg = FPGA_RX_BLOCK_SIZE_REG;
462 block_count_reg = FPGA_RX_BLOCK_COUNT_REG;
463 group_count_reg = FPGA_RX_GROUP_COUNT_REG;
464 groups_per_int_reg = FPGA_RX_GROUPS_PER_INT_REG;
465 curr_pci_reg = FPGA_RX_CURR_PCI_REG;
466 } else {
467 group_regs_base = FPGA_TX_GROUP0_START_REG;
468 block_size_reg = FPGA_TX_BLOCK_SIZE_REG;
469 block_count_reg = FPGA_TX_BLOCK_COUNT_REG;
470 group_count_reg = FPGA_TX_GROUP_COUNT_REG;
471 groups_per_int_reg = FPGA_TX_GROUPS_PER_INT_REG;
472 curr_pci_reg = FPGA_TX_CURR_PCI_REG;
473 }
474
475 printk(KERN_WARNING "block_size, group_size, group_count\n");
476 /*
477 * Block size is represented in no. of 64 bit transfers.
478 */
479 iowrite32(channel->block_size / 8, fpga + block_size_reg);
480 iowrite32(channel->group_size / channel->block_size,
481 fpga + block_count_reg);
482 iowrite32(channel->group_count, fpga + group_count_reg);
483 /* FIXME: Hardcoded groups per int. Get it from sysfs? */
484 iowrite32(16, fpga + groups_per_int_reg);
485
486 /* Unlock PCI address? Not defined in the data sheet, but used
487 * in the reference code by Redrapids.
488 */
489 iowrite32(0x1, fpga + curr_pci_reg);
490
491 /* The DMA address page register is shared between the RX and
492 * TX channels, so acquire lock.
493 */
494 for (i = 0; i < channel->group_count; i++) {
495 page = i / 32;
496 group_in_page = i % 32;
497
498 group_reg = group_regs_base + (group_in_page * 4);
499
500 spin_lock(channel->iomem_lock);
501 iowrite32(page, fpga + FPGA_DMA_ADR_PAGE_REG);
502 iowrite32(channel->groups[i].dma_addr, fpga + group_reg);
503 spin_unlock(channel->iomem_lock);
504 }
505
506 for (i = 0; i < channel->group_count; i++) {
507 page = i / 32;
508 group_in_page = i % 32;
509
510 group_reg = group_regs_base + (group_in_page * 4);
511
512 spin_lock(channel->iomem_lock);
513 iowrite32(page, fpga + FPGA_DMA_ADR_PAGE_REG);
514 printk(KERN_INFO PFX "%ld: read dma_addr: 0x%x\n", i,
515 ioread32(fpga + group_reg));
516 spin_unlock(channel->iomem_lock);
517 }
518
519}
520
521static void __poch_channel_clear_counters(struct channel_info *channel)
522{
523 channel->counters.pll_unlock = 0;
524 channel->counters.fifo_empty = 0;
525 channel->counters.fifo_overflow = 0;
526}
527
528static int poch_channel_init(struct channel_info *channel,
529 struct poch_dev *poch_dev)
530{
531 struct pci_dev *pdev = poch_dev->pci_dev;
532 struct device *dev = &pdev->dev;
533 unsigned long alloc_size;
534 int ret;
535
536 printk(KERN_WARNING "channel_latch_attr\n");
537
538 ret = channel_latch_attr(channel);
539 if (ret != 0)
540 goto out;
541
542 channel->consumed = 0;
543 channel->transfer = 0;
544
545 /* Allocate memory to hold group information. */
546 alloc_size = channel->group_count * sizeof(struct poch_group_info);
547 channel->groups = kzalloc(alloc_size, GFP_KERNEL);
548 if (!channel->groups) {
549 dev_err(dev, "error allocating memory for group info\n");
550 ret = -ENOMEM;
551 goto out;
552 }
553
554 printk(KERN_WARNING "poch_channel_alloc_groups\n");
555
556 ret = poch_channel_alloc_groups(channel);
557 if (ret) {
558 dev_err(dev, "error allocating groups of order %d\n",
559 get_order(channel->group_size));
560 goto out_free_group_info;
561 }
562
563 channel->fpga_iomem = poch_dev->fpga_iomem;
564 channel->bridge_iomem = poch_dev->bridge_iomem;
565 channel->iomem_lock = &poch_dev->iomem_lock;
566 spin_lock_init(&channel->counters_lock);
567
568 __poch_channel_clear_counters(channel);
569
570 return 0;
571
572 out_free_group_info:
573 kfree(channel->groups);
574 out:
575 return ret;
576}
577
578static int poch_wait_fpga_prog(void __iomem *bridge)
579{
580 unsigned long total_wait;
581 const unsigned long wait_period = 100;
582 /* FIXME: Get the actual timeout */
583 const unsigned long prog_timeo = 10000; /* 10 Seconds */
584 u32 card_power;
585
586 printk(KERN_WARNING "poch_wait_fpg_prog\n");
587
588 printk(KERN_INFO PFX "programming fpga ...\n");
589 total_wait = 0;
590 while (1) {
591 msleep(wait_period);
592 total_wait += wait_period;
593
594 card_power = ioread32(bridge + BRIDGE_CARD_POWER_REG);
595 if (card_power & BRIDGE_CARD_POWER_PROG_DONE) {
596 printk(KERN_INFO PFX "programming done\n");
597 return 0;
598 }
599 if (total_wait > prog_timeo) {
600 printk(KERN_ERR PFX
601 "timed out while programming FPGA\n");
602 return -EIO;
603 }
604 }
605}
606
607static void poch_card_power_off(struct poch_dev *poch_dev)
608{
609 void __iomem *bridge = poch_dev->bridge_iomem;
610 u32 card_power;
611
612 iowrite32(0, bridge + BRIDGE_INT_MASK_REG);
613 iowrite32(0, bridge + BRIDGE_DMA_GO_REG);
614
615 card_power = ioread32(bridge + BRIDGE_CARD_POWER_REG);
616 iowrite32(card_power & ~BRIDGE_CARD_POWER_EN,
617 bridge + BRIDGE_CARD_POWER_REG);
618}
619
620enum clk_src {
621 CLK_SRC_ON_BOARD,
622 CLK_SRC_EXTERNAL
623};
624
625static void poch_card_clock_on(void __iomem *fpga)
626{
627 /* FIXME: Get this data through sysfs? */
628 enum clk_src clk_src = CLK_SRC_ON_BOARD;
629
630 if (clk_src == CLK_SRC_ON_BOARD) {
631 iowrite32(FPGA_ADC_CLOCK_LOCAL_CLK | FPGA_ADC_CLOCK_CTL_OSC_EN,
632 fpga + FPGA_ADC_CLOCK_CTL_REG);
633 } else if (clk_src == CLK_SRC_EXTERNAL) {
634 iowrite32(FPGA_ADC_CLOCK_EXT_SAMP_CLK,
635 fpga + FPGA_ADC_CLOCK_CTL_REG);
636 }
637}
638
639static int poch_card_power_on(struct poch_dev *poch_dev)
640{
641 void __iomem *bridge = poch_dev->bridge_iomem;
642 void __iomem *fpga = poch_dev->fpga_iomem;
643
644 iowrite32(BRIDGE_CARD_POWER_EN, bridge + BRIDGE_CARD_POWER_REG);
645
646 if (poch_wait_fpga_prog(bridge) != 0) {
647 poch_card_power_off(poch_dev);
648 return -EIO;
649 }
650
651 poch_card_clock_on(fpga);
652
653 /* Sync to new clock, reset state machines, set DMA mode. */
654 iowrite32(FPGA_DOM_DCM_RESET | FPGA_DOM_SOFT_RESET
655 | FPGA_DOM_DUAL_M_SG_DMA, fpga + FPGA_DOM_REG);
656
657 /* FIXME: The time required for sync. needs to be tuned. */
658 msleep(1000);
659
660 return 0;
661}
662
663static void poch_channel_analog_on(struct channel_info *channel)
664{
665 void __iomem *fpga = channel->fpga_iomem;
666 u32 adc_dac_en;
667
668 spin_lock(channel->iomem_lock);
669 adc_dac_en = ioread32(fpga + FPGA_ADC_DAC_EN_REG);
670 switch (channel->chno) {
671 case CHNO_RX_CHANNEL:
672 iowrite32(adc_dac_en & ~FPGA_ADC_DAC_EN_ADC_OFF,
673 fpga + FPGA_ADC_DAC_EN_REG);
674 break;
675 case CHNO_TX_CHANNEL:
676 iowrite32(adc_dac_en & ~FPGA_ADC_DAC_EN_DAC_OFF,
677 fpga + FPGA_ADC_DAC_EN_REG);
678 break;
679 }
680 spin_unlock(channel->iomem_lock);
681}
682
683static int poch_open(struct inode *inode, struct file *filp)
684{
685 struct poch_dev *poch_dev;
686 struct channel_info *channel;
687 void __iomem *bridge;
688 void __iomem *fpga;
689 int chno;
690 int usage;
691 int ret;
692
693 poch_dev = container_of(inode->i_cdev, struct poch_dev, cdev);
694 bridge = poch_dev->bridge_iomem;
695 fpga = poch_dev->fpga_iomem;
696
697 chno = iminor(inode) % poch_dev->nchannels;
698 channel = &poch_dev->channels[chno];
699
700 if (!atomic_dec_and_test(&channel->free)) {
701 atomic_inc(&channel->free);
702 ret = -EBUSY;
703 goto out;
704 }
705
706 usage = atomic_inc_return(&poch_dev->usage);
707
708 printk(KERN_WARNING "poch_card_power_on\n");
709
710 if (usage == 1) {
711 ret = poch_card_power_on(poch_dev);
712 if (ret)
713 goto out_dec_usage;
714 }
715
716 printk(KERN_INFO "CardBus Bridge Revision: %x\n",
717 ioread32(bridge + BRIDGE_REV_REG));
718 printk(KERN_INFO "CardBus Interface Revision: %x\n",
719 ioread32(fpga + FPGA_IFACE_REV_REG));
720
721 channel->chno = chno;
722 filp->private_data = channel;
723
724 printk(KERN_WARNING "poch_channel_init\n");
725
726 ret = poch_channel_init(channel, poch_dev);
727 if (ret)
728 goto out_power_off;
729
730 poch_channel_analog_on(channel);
731
732 printk(KERN_WARNING "channel_dma_init\n");
733
734 channel_dma_init(channel);
735
736 printk(KERN_WARNING "poch_channel_analog_on\n");
737
738 if (usage == 1) {
739 printk(KERN_WARNING "setting up DMA\n");
740
741 /* Initialize DMA Controller. */
742 iowrite32(FPGA_CAP_FIFO_REG, bridge + BRIDGE_STAT_2_REG);
743 iowrite32(FPGA_DMA_DESC_1_REG, bridge + BRIDGE_STAT_3_REG);
744
745 ioread32(fpga + FPGA_DMA_INT_STAT_REG);
746 ioread32(fpga + FPGA_INT_STAT_REG);
747 ioread32(bridge + BRIDGE_INT_STAT_REG);
748
749 /* Initialize Interrupts. FIXME: Enable temperature
750 * handling We are enabling both Tx and Rx channel
751 * interrupts here. Do we need to enable interrupts
752 * only for the current channel? Anyways we won't get
753 * the interrupt unless the DMA is activated.
754 */
755 iowrite32(BRIDGE_INT_FPGA, bridge + BRIDGE_INT_MASK_REG);
756 iowrite32(FPGA_INT_DMA_CORE
757 | FPGA_INT_PLL_UNLOCKED
758 | FPGA_INT_TX_FF_EMPTY
759 | FPGA_INT_RX_FF_EMPTY
760 | FPGA_INT_TX_FF_OVRFLW
761 | FPGA_INT_RX_FF_OVRFLW,
762 fpga + FPGA_INT_MASK_REG);
763 iowrite32(FPGA_DMA_INT_RX | FPGA_DMA_INT_TX,
764 fpga + FPGA_DMA_INT_MASK_REG);
765 }
766
767 if (channel->dir == CHANNEL_DIR_TX) {
768 /* Flush TX FIFO and output data from cardbus. */
769 u32 ctl_val = 0;
770
771 ctl_val |= FPGA_TX_CTL_FIFO_FLUSH;
772 ctl_val |= FPGA_TX_CTL_OUTPUT_CARDBUS;
773 if (loopback)
774 ctl_val |= FPGA_TX_CTL_LOOPBACK;
775
776 iowrite32(ctl_val, fpga + FPGA_TX_CTL_REG);
777 } else {
778 /* Flush RX FIFO and output data to cardbus. */
779 u32 ctl_val = FPGA_RX_CTL_CONT_CAP | FPGA_RX_CTL_FIFO_FLUSH;
780 if (synth_rx)
781 ctl_val |= FPGA_RX_CTL_SYNTH_DATA;
782
783 iowrite32(ctl_val, fpga + FPGA_RX_CTL_REG);
784 }
785
786 atomic_inc(&channel->inited);
787
788 return 0;
789
790 out_power_off:
791 if (usage == 1)
792 poch_card_power_off(poch_dev);
793 out_dec_usage:
794 atomic_dec(&poch_dev->usage);
795 atomic_inc(&channel->free);
796 out:
797 return ret;
798}
799
800static int poch_release(struct inode *inode, struct file *filp)
801{
802 struct channel_info *channel = filp->private_data;
803 struct poch_dev *poch_dev;
804 int usage;
805
806 poch_dev = container_of(inode->i_cdev, struct poch_dev, cdev);
807
808 usage = atomic_dec_return(&poch_dev->usage);
809 if (usage == 0) {
810 printk(KERN_WARNING "poch_card_power_off\n");
811 poch_card_power_off(poch_dev);
812 }
813
814 atomic_dec(&channel->inited);
815 poch_channel_free_groups(channel);
816 kfree(channel->groups);
817 atomic_inc(&channel->free);
818
819 return 0;
820}
821
822/*
823 * Map the the group buffers, to user space.
824 */
825static int poch_mmap(struct file *filp, struct vm_area_struct *vma)
826{
827 struct channel_info *channel = filp->private_data;
828
829 unsigned long start;
830 unsigned long size;
831
832 unsigned long group_pages;
833 unsigned long total_group_pages;
834
835 int pg_num;
836 struct page *pg;
837
838 int i;
839 int ret;
840
841 printk(KERN_WARNING "poch_mmap\n");
842
843 if (vma->vm_pgoff) {
844 printk(KERN_WARNING PFX "page offset: %lu\n", vma->vm_pgoff);
845 return -EINVAL;
846 }
847
848 group_pages = npages(channel->group_size);
849 total_group_pages = group_pages * channel->group_count;
850
851 size = vma->vm_end - vma->vm_start;
852 if (size != total_group_pages * PAGE_SIZE) {
853 printk(KERN_WARNING PFX "required %lu bytes\n", size);
854 return -EINVAL;
855 }
856
857 start = vma->vm_start;
858
859 for (i = 0; i < channel->group_count; i++) {
860 pg = channel->groups[i].pg;
861 for (pg_num = 0; pg_num < group_pages; pg_num++, pg++) {
862 printk(KERN_DEBUG PFX "%d: group %d: 0x%lx\n",
863 pg_num, i, start);
864 ret = vm_insert_page(vma, start, pg);
865 if (ret) {
866 printk(KERN_DEBUG PFX
867 "vm_insert 2 failed at %d\n", pg_num);
868 return ret;
869 }
870 start += PAGE_SIZE;
871 }
872 }
873
874 return 0;
875}
876
877/*
878 * Check whether there is some group that the user space has not
879 * consumed yet. When the user space consumes a group, it sets it to
880 * -1. Cosuming could be reading data in case of RX and filling a
881 * buffer in case of TX.
882 */
883static int poch_channel_available(struct channel_info *channel)
884{
885 int available = 0;
886
887 spin_lock_irq(&channel->group_offsets_lock);
888
889 if (channel->consumed != channel->transfer)
890 available = 1;
891
892 spin_unlock_irq(&channel->group_offsets_lock);
893
894 return available;
895}
896
897static unsigned int poch_poll(struct file *filp, poll_table *pt)
898{
899 struct channel_info *channel = filp->private_data;
900 unsigned int ret = 0;
901
902 poll_wait(filp, &channel->wq, pt);
903
904 if (poch_channel_available(channel)) {
905 if (channel->dir == CHANNEL_DIR_RX)
906 ret = POLLIN | POLLRDNORM;
907 else
908 ret = POLLOUT | POLLWRNORM;
909 }
910
911 return ret;
912}
913
914static int poch_ioctl(struct inode *inode, struct file *filp,
915 unsigned int cmd, unsigned long arg)
916{
917 struct channel_info *channel = filp->private_data;
918 void __iomem *fpga = channel->fpga_iomem;
919 void __iomem *bridge = channel->bridge_iomem;
920 void __user *argp = (void __user *)arg;
921 struct vm_area_struct *vms;
922 struct poch_counters counters;
923 int ret;
924
925 switch (cmd) {
926 case POCH_IOC_TRANSFER_START:
927 switch (channel->chno) {
928 case CHNO_TX_CHANNEL:
929 printk(KERN_INFO PFX "ioctl: Tx start\n");
930 iowrite32(0x1, fpga + FPGA_TX_TRIGGER_REG);
931 iowrite32(0x1, fpga + FPGA_TX_ENABLE_REG);
932
933 /* FIXME: Does it make sense to do a DMA GO
934 * twice, once in Tx and once in Rx.
935 */
936 iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG);
937 break;
938 case CHNO_RX_CHANNEL:
939 printk(KERN_INFO PFX "ioctl: Rx start\n");
940 iowrite32(0x1, fpga + FPGA_RX_ARM_REG);
941 iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG);
942 break;
943 }
944 break;
945 case POCH_IOC_TRANSFER_STOP:
946 switch (channel->chno) {
947 case CHNO_TX_CHANNEL:
948 printk(KERN_INFO PFX "ioctl: Tx stop\n");
949 iowrite32(0x0, fpga + FPGA_TX_ENABLE_REG);
950 iowrite32(0x0, fpga + FPGA_TX_TRIGGER_REG);
951 iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG);
952 break;
953 case CHNO_RX_CHANNEL:
954 printk(KERN_INFO PFX "ioctl: Rx stop\n");
955 iowrite32(0x0, fpga + FPGA_RX_ARM_REG);
956 iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG);
957 break;
958 }
959 break;
960 case POCH_IOC_CONSUME:
961 {
962 int available;
963 int nfetch;
964 unsigned int from;
965 unsigned int count;
966 unsigned int i, j;
967 struct poch_consume consume;
968 struct poch_consume *uconsume;
969
970 uconsume = argp;
971 ret = copy_from_user(&consume, uconsume, sizeof(consume));
972 if (ret)
973 return ret;
974
975 spin_lock_irq(&channel->group_offsets_lock);
976
977 channel->consumed += consume.nflush;
978 channel->consumed %= channel->group_count;
979
980 available = channel->transfer - channel->consumed;
981 if (available < 0)
982 available += channel->group_count;
983
984 from = channel->consumed;
985
986 spin_unlock_irq(&channel->group_offsets_lock);
987
988 nfetch = consume.nfetch;
989 count = min(available, nfetch);
990
991 for (i = 0; i < count; i++) {
992 j = (from + i) % channel->group_count;
993 ret = put_user(channel->groups[j].user_offset,
994 &consume.offsets[i]);
995 if (ret)
996 return -EFAULT;
997 }
998
999 ret = put_user(count, &uconsume->nfetch);
1000 if (ret)
1001 return -EFAULT;
1002
1003 break;
1004 }
1005 case POCH_IOC_GET_COUNTERS:
1006 if (!access_ok(VERIFY_WRITE, argp, sizeof(struct poch_counters)))
1007 return -EFAULT;
1008
1009 spin_lock_irq(&channel->counters_lock);
1010 counters = channel->counters;
1011 __poch_channel_clear_counters(channel);
1012 spin_unlock_irq(&channel->counters_lock);
1013
1014 ret = copy_to_user(argp, &counters,
1015 sizeof(struct poch_counters));
1016 if (ret)
1017 return ret;
1018
1019 break;
1020 case POCH_IOC_SYNC_GROUP_FOR_USER:
1021 case POCH_IOC_SYNC_GROUP_FOR_DEVICE:
1022 vms = find_vma(current->mm, arg);
1023 if (!vms)
1024 /* Address not mapped. */
1025 return -EINVAL;
1026 if (vms->vm_file != filp)
1027 /* Address mapped from different device/file. */
1028 return -EINVAL;
1029
1030 flush_cache_range(vms, arg, arg + channel->group_size);
1031 break;
1032 }
1033 return 0;
1034}
1035
1036static struct file_operations poch_fops = {
1037 .owner = THIS_MODULE,
1038 .open = poch_open,
1039 .release = poch_release,
1040 .ioctl = poch_ioctl,
1041 .poll = poch_poll,
1042 .mmap = poch_mmap
1043};
1044
1045static void poch_irq_dma(struct channel_info *channel)
1046{
1047 u32 prev_transfer;
1048 u32 curr_transfer;
1049 long groups_done;
1050 unsigned long i, j;
1051 struct poch_group_info *groups;
1052 u32 curr_group_reg;
1053
1054 if (!atomic_read(&channel->inited))
1055 return;
1056
1057 prev_transfer = channel->transfer;
1058
1059 if (channel->chno == CHNO_RX_CHANNEL)
1060 curr_group_reg = FPGA_RX_CURR_GROUP_REG;
1061 else
1062 curr_group_reg = FPGA_TX_CURR_GROUP_REG;
1063
1064 curr_transfer = ioread32(channel->fpga_iomem + curr_group_reg);
1065
1066 groups_done = curr_transfer - prev_transfer;
1067 /* Check wrap over, and handle it. */
1068 if (groups_done <= 0)
1069 groups_done += channel->group_count;
1070
1071 groups = channel->groups;
1072
1073 spin_lock(&channel->group_offsets_lock);
1074
1075 for (i = 0; i < groups_done; i++) {
1076 j = (prev_transfer + i) % channel->group_count;
1077
1078 channel->transfer += 1;
1079 channel->transfer %= channel->group_count;
1080
1081 if (channel->transfer == channel->consumed) {
1082 channel->consumed += 1;
1083 channel->consumed %= channel->group_count;
1084 }
1085 }
1086
1087 spin_unlock(&channel->group_offsets_lock);
1088
1089 wake_up_interruptible(&channel->wq);
1090}
1091
1092static irqreturn_t poch_irq_handler(int irq, void *p)
1093{
1094 struct poch_dev *poch_dev = p;
1095 void __iomem *bridge = poch_dev->bridge_iomem;
1096 void __iomem *fpga = poch_dev->fpga_iomem;
1097 struct channel_info *channel_rx = &poch_dev->channels[CHNO_RX_CHANNEL];
1098 struct channel_info *channel_tx = &poch_dev->channels[CHNO_TX_CHANNEL];
1099 u32 bridge_stat;
1100 u32 fpga_stat;
1101 u32 dma_stat;
1102
1103 bridge_stat = ioread32(bridge + BRIDGE_INT_STAT_REG);
1104 fpga_stat = ioread32(fpga + FPGA_INT_STAT_REG);
1105 dma_stat = ioread32(fpga + FPGA_DMA_INT_STAT_REG);
1106
1107 ioread32(fpga + FPGA_DMA_INT_STAT_REG);
1108 ioread32(fpga + FPGA_INT_STAT_REG);
1109 ioread32(bridge + BRIDGE_INT_STAT_REG);
1110
1111 if (bridge_stat & BRIDGE_INT_FPGA) {
1112 if (fpga_stat & FPGA_INT_DMA_CORE) {
1113 if (dma_stat & FPGA_DMA_INT_RX)
1114 poch_irq_dma(channel_rx);
1115 if (dma_stat & FPGA_DMA_INT_TX)
1116 poch_irq_dma(channel_tx);
1117 }
1118 if (fpga_stat & FPGA_INT_PLL_UNLOCKED) {
1119 channel_tx->counters.pll_unlock++;
1120 channel_rx->counters.pll_unlock++;
1121 if (printk_ratelimit())
1122 printk(KERN_WARNING PFX "PLL unlocked\n");
1123 }
1124 if (fpga_stat & FPGA_INT_TX_FF_EMPTY)
1125 channel_tx->counters.fifo_empty++;
1126 if (fpga_stat & FPGA_INT_TX_FF_OVRFLW)
1127 channel_tx->counters.fifo_overflow++;
1128 if (fpga_stat & FPGA_INT_RX_FF_EMPTY)
1129 channel_rx->counters.fifo_empty++;
1130 if (fpga_stat & FPGA_INT_RX_FF_OVRFLW)
1131 channel_rx->counters.fifo_overflow++;
1132
1133 /*
1134 * FIXME: These errors should be notified through the
1135 * poll interface as POLLERR.
1136 */
1137
1138 /* Re-enable interrupts. */
1139 iowrite32(BRIDGE_INT_FPGA, bridge + BRIDGE_INT_MASK_REG);
1140
1141 return IRQ_HANDLED;
1142 }
1143
1144 return IRQ_NONE;
1145}
1146
1147static void poch_class_dev_unregister(struct poch_dev *poch_dev, int id)
1148{
1149 int i, j;
1150 int nattrs;
1151 struct channel_info *channel;
1152 dev_t devno;
1153
1154 if (poch_dev->dev == NULL)
1155 return;
1156
1157 for (i = 0; i < poch_dev->nchannels; i++) {
1158 channel = &poch_dev->channels[i];
1159 devno = poch_first_dev + (id * poch_dev->nchannels) + i;
1160
1161 if (!channel->dev)
1162 continue;
1163
1164 nattrs = sizeof(poch_class_attrs)/sizeof(poch_class_attrs[0]);
1165 for (j = 0; j < nattrs; j++)
1166 device_remove_file(channel->dev, poch_class_attrs[j]);
1167
1168 device_unregister(channel->dev);
1169 }
1170
1171 device_unregister(poch_dev->dev);
1172}
1173
1174static int __devinit poch_class_dev_register(struct poch_dev *poch_dev,
1175 int id)
1176{
1177 struct device *dev = &poch_dev->pci_dev->dev;
1178 int i, j;
1179 int nattrs;
1180 int ret;
1181 struct channel_info *channel;
1182 dev_t devno;
1183
1184 poch_dev->dev = device_create(poch_cls, &poch_dev->pci_dev->dev,
1185 MKDEV(0, 0), NULL, "poch%d", id);
1186 if (IS_ERR(poch_dev->dev)) {
1187 dev_err(dev, "error creating parent class device");
1188 ret = PTR_ERR(poch_dev->dev);
1189 poch_dev->dev = NULL;
1190 return ret;
1191 }
1192
1193 for (i = 0; i < poch_dev->nchannels; i++) {
1194 channel = &poch_dev->channels[i];
1195
1196 devno = poch_first_dev + (id * poch_dev->nchannels) + i;
1197 channel->dev = device_create(poch_cls, poch_dev->dev, devno,
1198 NULL, "ch%d", i);
1199 if (IS_ERR(channel->dev)) {
1200 dev_err(dev, "error creating channel class device");
1201 ret = PTR_ERR(channel->dev);
1202 channel->dev = NULL;
1203 poch_class_dev_unregister(poch_dev, id);
1204 return ret;
1205 }
1206
1207 dev_set_drvdata(channel->dev, channel);
1208 nattrs = sizeof(poch_class_attrs)/sizeof(poch_class_attrs[0]);
1209 for (j = 0; j < nattrs; j++) {
1210 ret = device_create_file(channel->dev,
1211 poch_class_attrs[j]);
1212 if (ret) {
1213 dev_err(dev, "error creating attribute file");
1214 poch_class_dev_unregister(poch_dev, id);
1215 return ret;
1216 }
1217 }
1218 }
1219
1220 return 0;
1221}
1222
1223static int __devinit poch_pci_probe(struct pci_dev *pdev,
1224 const struct pci_device_id *pci_id)
1225{
1226 struct device *dev = &pdev->dev;
1227 struct poch_dev *poch_dev;
1228 struct uio_info *uio;
1229 int ret;
1230 int id;
1231 int i;
1232
1233 poch_dev = kzalloc(sizeof(struct poch_dev), GFP_KERNEL);
1234 if (!poch_dev) {
1235 dev_err(dev, "error allocating priv. data memory\n");
1236 return -ENOMEM;
1237 }
1238
1239 poch_dev->pci_dev = pdev;
1240 uio = &poch_dev->uio;
1241
1242 pci_set_drvdata(pdev, poch_dev);
1243
1244 spin_lock_init(&poch_dev->iomem_lock);
1245
1246 poch_dev->nchannels = POCH_NCHANNELS;
1247 poch_dev->channels[CHNO_RX_CHANNEL].dir = CHANNEL_DIR_RX;
1248 poch_dev->channels[CHNO_TX_CHANNEL].dir = CHANNEL_DIR_TX;
1249
1250 for (i = 0; i < poch_dev->nchannels; i++) {
1251 init_waitqueue_head(&poch_dev->channels[i].wq);
1252 atomic_set(&poch_dev->channels[i].free, 1);
1253 atomic_set(&poch_dev->channels[i].inited, 0);
1254 }
1255
1256 ret = pci_enable_device(pdev);
1257 if (ret) {
1258 dev_err(dev, "error enabling device\n");
1259 goto out_free;
1260 }
1261
1262 ret = pci_request_regions(pdev, "poch");
1263 if (ret) {
1264 dev_err(dev, "error requesting resources\n");
1265 goto out_disable;
1266 }
1267
1268 uio->mem[0].addr = pci_resource_start(pdev, 1);
1269 if (!uio->mem[0].addr) {
1270 dev_err(dev, "invalid BAR1\n");
1271 ret = -ENODEV;
1272 goto out_release;
1273 }
1274
1275 uio->mem[0].size = pci_resource_len(pdev, 1);
1276 uio->mem[0].memtype = UIO_MEM_PHYS;
1277
1278 uio->name = "poch";
1279 uio->version = "0.0.1";
1280 uio->irq = -1;
1281 ret = uio_register_device(dev, uio);
1282 if (ret) {
1283 dev_err(dev, "error register UIO device: %d\n", ret);
1284 goto out_release;
1285 }
1286
1287 poch_dev->bridge_iomem = ioremap(pci_resource_start(pdev, 0),
1288 pci_resource_len(pdev, 0));
1289 if (poch_dev->bridge_iomem == NULL) {
1290 dev_err(dev, "error mapping bridge (bar0) registers\n");
1291 ret = -ENOMEM;
1292 goto out_uio_unreg;
1293 }
1294
1295 poch_dev->fpga_iomem = ioremap(pci_resource_start(pdev, 1),
1296 pci_resource_len(pdev, 1));
1297 if (poch_dev->fpga_iomem == NULL) {
1298 dev_err(dev, "error mapping fpga (bar1) registers\n");
1299 ret = -ENOMEM;
1300 goto out_bar0_unmap;
1301 }
1302
1303 ret = request_irq(pdev->irq, poch_irq_handler, IRQF_SHARED,
1304 dev_name(dev), poch_dev);
1305 if (ret) {
1306 dev_err(dev, "error requesting IRQ %u\n", pdev->irq);
1307 ret = -ENOMEM;
1308 goto out_bar1_unmap;
1309 }
1310
1311 if (!idr_pre_get(&poch_ids, GFP_KERNEL)) {
1312 dev_err(dev, "error allocating memory ids\n");
1313 ret = -ENOMEM;
1314 goto out_free_irq;
1315 }
1316
1317 idr_get_new(&poch_ids, poch_dev, &id);
1318 if (id >= MAX_POCH_CARDS) {
1319 dev_err(dev, "minors exhausted\n");
1320 ret = -EBUSY;
1321 goto out_free_irq;
1322 }
1323
1324 cdev_init(&poch_dev->cdev, &poch_fops);
1325 poch_dev->cdev.owner = THIS_MODULE;
1326 ret = cdev_add(&poch_dev->cdev,
1327 poch_first_dev + (id * poch_dev->nchannels),
1328 poch_dev->nchannels);
1329 if (ret) {
1330 dev_err(dev, "error register character device\n");
1331 goto out_idr_remove;
1332 }
1333
1334 ret = poch_class_dev_register(poch_dev, id);
1335 if (ret)
1336 goto out_cdev_del;
1337
1338 return 0;
1339
1340 out_cdev_del:
1341 cdev_del(&poch_dev->cdev);
1342 out_idr_remove:
1343 idr_remove(&poch_ids, id);
1344 out_free_irq:
1345 free_irq(pdev->irq, poch_dev);
1346 out_bar1_unmap:
1347 iounmap(poch_dev->fpga_iomem);
1348 out_bar0_unmap:
1349 iounmap(poch_dev->bridge_iomem);
1350 out_uio_unreg:
1351 uio_unregister_device(uio);
1352 out_release:
1353 pci_release_regions(pdev);
1354 out_disable:
1355 pci_disable_device(pdev);
1356 out_free:
1357 kfree(poch_dev);
1358 return ret;
1359}
1360
1361/*
1362 * FIXME: We are yet to handle the hot unplug case.
1363 */
1364static void poch_pci_remove(struct pci_dev *pdev)
1365{
1366 struct poch_dev *poch_dev = pci_get_drvdata(pdev);
1367 struct uio_info *uio = &poch_dev->uio;
1368 unsigned int minor = MINOR(poch_dev->cdev.dev);
1369 unsigned int id = minor / poch_dev->nchannels;
1370
1371 poch_class_dev_unregister(poch_dev, id);
1372 cdev_del(&poch_dev->cdev);
1373 idr_remove(&poch_ids, id);
1374 free_irq(pdev->irq, poch_dev);
1375 iounmap(poch_dev->fpga_iomem);
1376 iounmap(poch_dev->bridge_iomem);
1377 uio_unregister_device(uio);
1378 pci_release_regions(pdev);
1379 pci_disable_device(pdev);
1380 pci_set_drvdata(pdev, NULL);
1381 iounmap(uio->mem[0].internal_addr);
1382
1383 kfree(poch_dev);
1384}
1385
1386static const struct pci_device_id poch_pci_ids[] /* __devinitconst */ = {
1387 { PCI_DEVICE(PCI_VENDOR_ID_RRAPIDS,
1388 PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE) },
1389 { 0, }
1390};
1391
1392static struct pci_driver poch_pci_driver = {
1393 .name = DRV_NAME,
1394 .id_table = poch_pci_ids,
1395 .probe = poch_pci_probe,
1396 .remove = poch_pci_remove,
1397};
1398
1399static int __init poch_init_module(void)
1400{
1401 int ret = 0;
1402
1403 ret = alloc_chrdev_region(&poch_first_dev, 0,
1404 MAX_POCH_DEVICES, DRV_NAME);
1405 if (ret) {
1406 printk(KERN_ERR PFX "error allocating device no.");
1407 return ret;
1408 }
1409
1410 poch_cls = class_create(THIS_MODULE, "pocketchange");
1411 if (IS_ERR(poch_cls)) {
1412 ret = PTR_ERR(poch_cls);
1413 goto out_unreg_chrdev;
1414 }
1415
1416 ret = pci_register_driver(&poch_pci_driver);
1417 if (ret) {
1418 printk(KERN_ERR PFX "error register PCI device");
1419 goto out_class_destroy;
1420 }
1421
1422 return 0;
1423
1424 out_class_destroy:
1425 class_destroy(poch_cls);
1426
1427 out_unreg_chrdev:
1428 unregister_chrdev_region(poch_first_dev, MAX_POCH_DEVICES);
1429
1430 return ret;
1431}
1432
1433static void __exit poch_exit_module(void)
1434{
1435 pci_unregister_driver(&poch_pci_driver);
1436 class_destroy(poch_cls);
1437 unregister_chrdev_region(poch_first_dev, MAX_POCH_DEVICES);
1438}
1439
1440module_init(poch_init_module);
1441module_exit(poch_exit_module);
1442
1443MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/poch/poch.h b/drivers/staging/poch/poch.h
deleted file mode 100644
index 8b08385861fd..000000000000
--- a/drivers/staging/poch/poch.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * User-space DMA and UIO based Redrapids Pocket Change CardBus driver
3 *
4 * Copyright 2008 Vijay Kumar <vijaykumar@bravegnu.org>
5 *
6 * Part of userspace API. Should be moved to a header file in
7 * include/linux for final version.
8 *
9 */
10
11#include <linux/types.h>
12
13struct poch_counters {
14 __u32 fifo_empty;
15 __u32 fifo_overflow;
16 __u32 pll_unlock;
17};
18
19struct poch_consume {
20 __u32 __user *offsets;
21 __u32 nfetch;
22 __u32 nflush;
23};
24
25#define POCH_IOC_NUM '9'
26
27#define POCH_IOC_TRANSFER_START _IO(POCH_IOC_NUM, 0)
28#define POCH_IOC_TRANSFER_STOP _IO(POCH_IOC_NUM, 1)
29#define POCH_IOC_GET_COUNTERS _IOR(POCH_IOC_NUM, 2, \
30 struct poch_counters)
31#define POCH_IOC_SYNC_GROUP_FOR_USER _IO(POCH_IOC_NUM, 3)
32#define POCH_IOC_SYNC_GROUP_FOR_DEVICE _IO(POCH_IOC_NUM, 4)
33
34#define POCH_IOC_CONSUME _IOWR(POCH_IOC_NUM, 5, \
35 struct poch_consume)
diff --git a/drivers/staging/pohmelfs/config.c b/drivers/staging/pohmelfs/config.c
index eed0e5545a55..8c8d1c282e7e 100644
--- a/drivers/staging/pohmelfs/config.c
+++ b/drivers/staging/pohmelfs/config.c
@@ -204,18 +204,18 @@ int pohmelfs_copy_crypto(struct pohmelfs_sb *psb)
204 } 204 }
205 205
206 if (g->hash_keysize) { 206 if (g->hash_keysize) {
207 psb->hash_key = kmalloc(g->hash_keysize, GFP_KERNEL); 207 psb->hash_key = kmemdup(g->hash_key, g->hash_keysize,
208 GFP_KERNEL);
208 if (!psb->hash_key) 209 if (!psb->hash_key)
209 goto err_out_free_cipher_string; 210 goto err_out_free_cipher_string;
210 memcpy(psb->hash_key, g->hash_key, g->hash_keysize);
211 psb->hash_keysize = g->hash_keysize; 211 psb->hash_keysize = g->hash_keysize;
212 } 212 }
213 213
214 if (g->cipher_keysize) { 214 if (g->cipher_keysize) {
215 psb->cipher_key = kmalloc(g->cipher_keysize, GFP_KERNEL); 215 psb->cipher_key = kmemdup(g->cipher_key, g->cipher_keysize,
216 GFP_KERNEL);
216 if (!psb->cipher_key) 217 if (!psb->cipher_key)
217 goto err_out_free_hash; 218 goto err_out_free_hash;
218 memcpy(psb->cipher_key, g->cipher_key, g->cipher_keysize);
219 psb->cipher_keysize = g->cipher_keysize; 219 psb->cipher_keysize = g->cipher_keysize;
220 } 220 }
221 221
@@ -238,11 +238,10 @@ static int pohmelfs_send_reply(int err, int msg_num, int action, struct cn_msg *
238{ 238{
239 struct pohmelfs_cn_ack *ack; 239 struct pohmelfs_cn_ack *ack;
240 240
241 ack = kmalloc(sizeof(struct pohmelfs_cn_ack), GFP_KERNEL); 241 ack = kzalloc(sizeof(struct pohmelfs_cn_ack), GFP_KERNEL);
242 if (!ack) 242 if (!ack)
243 return -ENOMEM; 243 return -ENOMEM;
244 244
245 memset(ack, 0, sizeof(struct pohmelfs_cn_ack));
246 memcpy(&ack->msg, msg, sizeof(struct cn_msg)); 245 memcpy(&ack->msg, msg, sizeof(struct cn_msg));
247 246
248 if (action == POHMELFS_CTLINFO_ACK) 247 if (action == POHMELFS_CTLINFO_ACK)
@@ -455,14 +454,12 @@ static int pohmelfs_crypto_hash_init(struct pohmelfs_config_group *g, struct poh
455 g->hash_strlen = c->strlen; 454 g->hash_strlen = c->strlen;
456 g->hash_keysize = c->keysize; 455 g->hash_keysize = c->keysize;
457 456
458 g->hash_key = kmalloc(c->keysize, GFP_KERNEL); 457 g->hash_key = kmemdup(key, c->keysize, GFP_KERNEL);
459 if (!g->hash_key) { 458 if (!g->hash_key) {
460 kfree(g->hash_string); 459 kfree(g->hash_string);
461 return -ENOMEM; 460 return -ENOMEM;
462 } 461 }
463 462
464 memcpy(g->hash_key, key, c->keysize);
465
466 return 0; 463 return 0;
467} 464}
468 465
@@ -480,14 +477,12 @@ static int pohmelfs_crypto_cipher_init(struct pohmelfs_config_group *g, struct p
480 g->cipher_strlen = c->strlen; 477 g->cipher_strlen = c->strlen;
481 g->cipher_keysize = c->keysize; 478 g->cipher_keysize = c->keysize;
482 479
483 g->cipher_key = kmalloc(c->keysize, GFP_KERNEL); 480 g->cipher_key = kmemdup(key, c->keysize, GFP_KERNEL);
484 if (!g->cipher_key) { 481 if (!g->cipher_key) {
485 kfree(g->cipher_string); 482 kfree(g->cipher_string);
486 return -ENOMEM; 483 return -ENOMEM;
487 } 484 }
488 485
489 memcpy(g->cipher_key, key, c->keysize);
490
491 return 0; 486 return 0;
492} 487}
493 488
@@ -509,13 +504,13 @@ static int pohmelfs_cn_crypto(struct cn_msg *msg)
509 } 504 }
510 505
511 switch (crypto->type) { 506 switch (crypto->type) {
512 case POHMELFS_CRYPTO_HASH: 507 case POHMELFS_CRYPTO_HASH:
513 err = pohmelfs_crypto_hash_init(g, crypto); 508 err = pohmelfs_crypto_hash_init(g, crypto);
514 break; 509 break;
515 case POHMELFS_CRYPTO_CIPHER: 510 case POHMELFS_CRYPTO_CIPHER:
516 err = pohmelfs_crypto_cipher_init(g, crypto); 511 err = pohmelfs_crypto_cipher_init(g, crypto);
517 break; 512 break;
518 default: 513 default:
519 err = -ENOTSUPP; 514 err = -ENOTSUPP;
520 break; 515 break;
521 } 516 }
@@ -536,24 +531,24 @@ static void pohmelfs_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *n
536 return; 531 return;
537 532
538 switch (msg->flags) { 533 switch (msg->flags) {
539 case POHMELFS_FLAGS_ADD: 534 case POHMELFS_FLAGS_ADD:
540 case POHMELFS_FLAGS_DEL: 535 case POHMELFS_FLAGS_DEL:
541 case POHMELFS_FLAGS_MODIFY: 536 case POHMELFS_FLAGS_MODIFY:
542 err = pohmelfs_cn_ctl(msg, msg->flags); 537 err = pohmelfs_cn_ctl(msg, msg->flags);
543 break; 538 break;
544 case POHMELFS_FLAGS_FLUSH: 539 case POHMELFS_FLAGS_FLUSH:
545 err = pohmelfs_cn_flush(msg); 540 err = pohmelfs_cn_flush(msg);
546 break; 541 break;
547 case POHMELFS_FLAGS_SHOW: 542 case POHMELFS_FLAGS_SHOW:
548 err = pohmelfs_cn_disp(msg); 543 err = pohmelfs_cn_disp(msg);
549 break; 544 break;
550 case POHMELFS_FLAGS_DUMP: 545 case POHMELFS_FLAGS_DUMP:
551 err = pohmelfs_cn_dump(msg); 546 err = pohmelfs_cn_dump(msg);
552 break; 547 break;
553 case POHMELFS_FLAGS_CRYPTO: 548 case POHMELFS_FLAGS_CRYPTO:
554 err = pohmelfs_cn_crypto(msg); 549 err = pohmelfs_cn_crypto(msg);
555 break; 550 break;
556 default: 551 default:
557 err = -ENOSYS; 552 err = -ENOSYS;
558 break; 553 break;
559 } 554 }
diff --git a/drivers/staging/pohmelfs/crypto.c b/drivers/staging/pohmelfs/crypto.c
index 884183c0913a..2fdb3e01460d 100644
--- a/drivers/staging/pohmelfs/crypto.c
+++ b/drivers/staging/pohmelfs/crypto.c
@@ -170,17 +170,17 @@ static int pohmelfs_crypto_process(struct ablkcipher_request *req,
170 err = crypto_ablkcipher_decrypt(req); 170 err = crypto_ablkcipher_decrypt(req);
171 171
172 switch (err) { 172 switch (err) {
173 case -EINPROGRESS: 173 case -EINPROGRESS:
174 case -EBUSY: 174 case -EBUSY:
175 err = wait_for_completion_interruptible_timeout(&complete.complete, 175 err = wait_for_completion_interruptible_timeout(&complete.complete,
176 timeout); 176 timeout);
177 if (!err) 177 if (!err)
178 err = -ETIMEDOUT; 178 err = -ETIMEDOUT;
179 else if (err > 0) 179 else if (err > 0)
180 err = complete.error; 180 err = complete.error;
181 break; 181 break;
182 default: 182 default:
183 break; 183 break;
184 } 184 }
185 185
186 return err; 186 return err;
@@ -196,7 +196,7 @@ int pohmelfs_crypto_process_input_data(struct pohmelfs_crypto_engine *e, u64 cmd
196 return 0; 196 return 0;
197 197
198 dprintk("%s: eng: %p, iv: %llx, data: %p, page: %p/%lu, size: %u.\n", 198 dprintk("%s: eng: %p, iv: %llx, data: %p, page: %p/%lu, size: %u.\n",
199 __func__, e, cmd_iv, data, page, (page)?page->index:0, size); 199 __func__, e, cmd_iv, data, page, (page) ? page->index : 0, size);
200 200
201 if (data) { 201 if (data) {
202 sg_init_one(&sg, data, size); 202 sg_init_one(&sg, data, size);
@@ -247,7 +247,7 @@ int pohmelfs_crypto_process_input_data(struct pohmelfs_crypto_engine *e, u64 cmd
247 247
248 dprintk("%s: eng: %p, hash: %p, cipher: %p: iv : %llx, hash mismatch (recv/calc): ", 248 dprintk("%s: eng: %p, hash: %p, cipher: %p: iv : %llx, hash mismatch (recv/calc): ",
249 __func__, e, e->hash, e->cipher, cmd_iv); 249 __func__, e, e->hash, e->cipher, cmd_iv);
250 for (i=0; i<crypto_hash_digestsize(e->hash); ++i) { 250 for (i = 0; i < crypto_hash_digestsize(e->hash); ++i) {
251#if 0 251#if 0
252 dprintka("%02x ", recv[i]); 252 dprintka("%02x ", recv[i]);
253 if (recv[i] != calc[i]) { 253 if (recv[i] != calc[i]) {
@@ -279,7 +279,7 @@ err_out_exit:
279} 279}
280 280
281static int pohmelfs_trans_iter(struct netfs_trans *t, struct pohmelfs_crypto_engine *e, 281static int pohmelfs_trans_iter(struct netfs_trans *t, struct pohmelfs_crypto_engine *e,
282 int (* iterator) (struct pohmelfs_crypto_engine *e, 282 int (*iterator) (struct pohmelfs_crypto_engine *e,
283 struct scatterlist *dst, 283 struct scatterlist *dst,
284 struct scatterlist *src)) 284 struct scatterlist *src))
285{ 285{
@@ -319,7 +319,7 @@ static int pohmelfs_trans_iter(struct netfs_trans *t, struct pohmelfs_crypto_eng
319 return 0; 319 return 0;
320 320
321 dpage_idx = 0; 321 dpage_idx = 0;
322 for (i=0; i<t->page_num; ++i) { 322 for (i = 0; i < t->page_num; ++i) {
323 struct page *page = t->pages[i]; 323 struct page *page = t->pages[i];
324 struct page *dpage = e->pages[dpage_idx]; 324 struct page *dpage = e->pages[dpage_idx];
325 325
@@ -402,7 +402,7 @@ static int pohmelfs_hash(struct pohmelfs_crypto_thread *tc)
402 { 402 {
403 unsigned int i; 403 unsigned int i;
404 dprintk("%s: ", __func__); 404 dprintk("%s: ", __func__);
405 for (i=0; i<tc->psb->crypto_attached_size; ++i) 405 for (i = 0; i < tc->psb->crypto_attached_size; ++i)
406 dprintka("%02x ", dst[i]); 406 dprintka("%02x ", dst[i]);
407 dprintka("\n"); 407 dprintka("\n");
408 } 408 }
@@ -414,7 +414,7 @@ static void pohmelfs_crypto_pages_free(struct pohmelfs_crypto_engine *e)
414{ 414{
415 unsigned int i; 415 unsigned int i;
416 416
417 for (i=0; i<e->page_num; ++i) 417 for (i = 0; i < e->page_num; ++i)
418 __free_page(e->pages[i]); 418 __free_page(e->pages[i]);
419 kfree(e->pages); 419 kfree(e->pages);
420} 420}
@@ -427,7 +427,7 @@ static int pohmelfs_crypto_pages_alloc(struct pohmelfs_crypto_engine *e, struct
427 if (!e->pages) 427 if (!e->pages)
428 return -ENOMEM; 428 return -ENOMEM;
429 429
430 for (i=0; i<psb->trans_max_pages; ++i) { 430 for (i = 0; i < psb->trans_max_pages; ++i) {
431 e->pages[i] = alloc_page(GFP_KERNEL); 431 e->pages[i] = alloc_page(GFP_KERNEL);
432 if (!e->pages[i]) 432 if (!e->pages[i])
433 break; 433 break;
@@ -612,7 +612,7 @@ static int pohmelfs_sys_crypto_init(struct pohmelfs_sb *psb)
612 __func__, st, &st->eng, &st->eng.hash, &st->eng.cipher); 612 __func__, st, &st->eng, &st->eng.hash, &st->eng.cipher);
613 } 613 }
614 614
615 for (i=0; i<psb->crypto_thread_num; ++i) { 615 for (i = 0; i < psb->crypto_thread_num; ++i) {
616 err = -ENOMEM; 616 err = -ENOMEM;
617 t = kzalloc(sizeof(struct pohmelfs_crypto_thread), GFP_KERNEL); 617 t = kzalloc(sizeof(struct pohmelfs_crypto_thread), GFP_KERNEL);
618 if (!t) 618 if (!t)
@@ -780,7 +780,7 @@ int pohmelfs_crypto_init(struct pohmelfs_sb *psb)
780} 780}
781 781
782static int pohmelfs_crypto_thread_get(struct pohmelfs_sb *psb, 782static int pohmelfs_crypto_thread_get(struct pohmelfs_sb *psb,
783 int (* action)(struct pohmelfs_crypto_thread *t, void *data), void *data) 783 int (*action)(struct pohmelfs_crypto_thread *t, void *data), void *data)
784{ 784{
785 struct pohmelfs_crypto_thread *t = NULL; 785 struct pohmelfs_crypto_thread *t = NULL;
786 int err; 786 int err;
diff --git a/drivers/staging/pohmelfs/dir.c b/drivers/staging/pohmelfs/dir.c
index 79819f07bfb9..059e9d2ddf6b 100644
--- a/drivers/staging/pohmelfs/dir.c
+++ b/drivers/staging/pohmelfs/dir.c
@@ -105,7 +105,7 @@ static struct pohmelfs_name *pohmelfs_insert_hash(struct pohmelfs_inode *pi,
105 105
106 if (ret) { 106 if (ret) {
107 printk("%s: exist: parent: %llu, ino: %llu, hash: %x, len: %u, data: '%s', " 107 printk("%s: exist: parent: %llu, ino: %llu, hash: %x, len: %u, data: '%s', "
108 "new: ino: %llu, hash: %x, len: %u, data: '%s'.\n", 108 "new: ino: %llu, hash: %x, len: %u, data: '%s'.\n",
109 __func__, pi->ino, 109 __func__, pi->ino,
110 ret->ino, ret->hash, ret->len, ret->data, 110 ret->ino, ret->hash, ret->len, ret->data,
111 new->ino, new->hash, new->len, new->data); 111 new->ino, new->hash, new->len, new->data);
@@ -234,7 +234,7 @@ struct pohmelfs_inode *pohmelfs_new_inode(struct pohmelfs_sb *psb,
234 int err = -EEXIST; 234 int err = -EEXIST;
235 235
236 dprintk("%s: creating inode: parent: %llu, ino: %llu, str: %p.\n", 236 dprintk("%s: creating inode: parent: %llu, ino: %llu, str: %p.\n",
237 __func__, (parent)?parent->ino:0, info->ino, str); 237 __func__, (parent) ? parent->ino : 0, info->ino, str);
238 238
239 err = -ENOMEM; 239 err = -ENOMEM;
240 new = iget_locked(psb->sb, info->ino); 240 new = iget_locked(psb->sb, info->ino);
@@ -265,8 +265,8 @@ struct pohmelfs_inode *pohmelfs_new_inode(struct pohmelfs_sb *psb,
265 s.len = 2; 265 s.len = 2;
266 s.hash = jhash(s.name, s.len, 0); 266 s.hash = jhash(s.name, s.len, 0);
267 267
268 err = pohmelfs_add_dir(psb, npi, (parent)?parent:npi, &s, 268 err = pohmelfs_add_dir(psb, npi, (parent) ? parent : npi, &s,
269 (parent)?parent->vfs_inode.i_mode:npi->vfs_inode.i_mode, 0); 269 (parent) ? parent->vfs_inode.i_mode : npi->vfs_inode.i_mode, 0);
270 if (err) 270 if (err)
271 goto err_out_put; 271 goto err_out_put;
272 } 272 }
@@ -277,7 +277,7 @@ struct pohmelfs_inode *pohmelfs_new_inode(struct pohmelfs_sb *psb,
277 err = pohmelfs_add_dir(psb, parent, npi, str, info->mode, link); 277 err = pohmelfs_add_dir(psb, parent, npi, str, info->mode, link);
278 278
279 dprintk("%s: %s inserted name: '%s', new_offset: %llu, ino: %llu, parent: %llu.\n", 279 dprintk("%s: %s inserted name: '%s', new_offset: %llu, ino: %llu, parent: %llu.\n",
280 __func__, (err)?"unsuccessfully":"successfully", 280 __func__, (err) ? "unsuccessfully" : "successfully",
281 str->name, parent->total_len, info->ino, parent->ino); 281 str->name, parent->total_len, info->ino, parent->ino);
282 282
283 if (err && err != -EEXIST) 283 if (err && err != -EEXIST)
@@ -605,7 +605,7 @@ struct pohmelfs_inode *pohmelfs_create_entry_local(struct pohmelfs_sb *psb,
605 if (!start) 605 if (!start)
606 info.ino = pohmelfs_new_ino(psb); 606 info.ino = pohmelfs_new_ino(psb);
607 607
608 info.nlink = S_ISDIR(mode)?2:1; 608 info.nlink = S_ISDIR(mode) ? 2 : 1;
609 info.uid = current_fsuid(); 609 info.uid = current_fsuid();
610 info.gid = current_fsgid(); 610 info.gid = current_fsgid();
611 info.size = 0; 611 info.size = 0;
@@ -849,7 +849,7 @@ static int pohmelfs_create_link(struct pohmelfs_inode *parent, struct qstr *obj,
849 } 849 }
850 850
851 dprintk("%s: parent: %llu, obj: '%s', target_inode: %llu, target_str: '%s', full: '%s'.\n", 851 dprintk("%s: parent: %llu, obj: '%s', target_inode: %llu, target_str: '%s', full: '%s'.\n",
852 __func__, parent->ino, obj->name, (target)?target->ino:0, (tstr)?tstr->name:NULL, 852 __func__, parent->ino, obj->name, (target) ? target->ino : 0, (tstr) ? tstr->name : NULL,
853 (char *)data); 853 (char *)data);
854 854
855 cmd->cmd = NETFS_LINK; 855 cmd->cmd = NETFS_LINK;
diff --git a/drivers/staging/pohmelfs/inode.c b/drivers/staging/pohmelfs/inode.c
index 63275529ff55..9286e863b0e7 100644
--- a/drivers/staging/pohmelfs/inode.c
+++ b/drivers/staging/pohmelfs/inode.c
@@ -685,7 +685,7 @@ static int pohmelfs_readpages_trans_complete(struct page **__pages, unsigned int
685 goto err_out_free; 685 goto err_out_free;
686 } 686 }
687 687
688 for (i=0; i<num; ++i) { 688 for (i = 0; i < num; ++i) {
689 page = pages[i]; 689 page = pages[i];
690 690
691 if (err) 691 if (err)
@@ -1431,35 +1431,35 @@ static int pohmelfs_parse_options(char *options, struct pohmelfs_sb *psb, int re
1431 continue; 1431 continue;
1432 1432
1433 switch (token) { 1433 switch (token) {
1434 case pohmelfs_opt_idx: 1434 case pohmelfs_opt_idx:
1435 psb->idx = option; 1435 psb->idx = option;
1436 break; 1436 break;
1437 case pohmelfs_opt_trans_scan_timeout: 1437 case pohmelfs_opt_trans_scan_timeout:
1438 psb->trans_scan_timeout = msecs_to_jiffies(option); 1438 psb->trans_scan_timeout = msecs_to_jiffies(option);
1439 break; 1439 break;
1440 case pohmelfs_opt_drop_scan_timeout: 1440 case pohmelfs_opt_drop_scan_timeout:
1441 psb->drop_scan_timeout = msecs_to_jiffies(option); 1441 psb->drop_scan_timeout = msecs_to_jiffies(option);
1442 break; 1442 break;
1443 case pohmelfs_opt_wait_on_page_timeout: 1443 case pohmelfs_opt_wait_on_page_timeout:
1444 psb->wait_on_page_timeout = msecs_to_jiffies(option); 1444 psb->wait_on_page_timeout = msecs_to_jiffies(option);
1445 break; 1445 break;
1446 case pohmelfs_opt_mcache_timeout: 1446 case pohmelfs_opt_mcache_timeout:
1447 psb->mcache_timeout = msecs_to_jiffies(option); 1447 psb->mcache_timeout = msecs_to_jiffies(option);
1448 break; 1448 break;
1449 case pohmelfs_opt_trans_retries: 1449 case pohmelfs_opt_trans_retries:
1450 psb->trans_retries = option; 1450 psb->trans_retries = option;
1451 break; 1451 break;
1452 case pohmelfs_opt_crypto_thread_num: 1452 case pohmelfs_opt_crypto_thread_num:
1453 psb->crypto_thread_num = option; 1453 psb->crypto_thread_num = option;
1454 break; 1454 break;
1455 case pohmelfs_opt_trans_max_pages: 1455 case pohmelfs_opt_trans_max_pages:
1456 psb->trans_max_pages = option; 1456 psb->trans_max_pages = option;
1457 break; 1457 break;
1458 case pohmelfs_opt_crypto_fail_unsupported: 1458 case pohmelfs_opt_crypto_fail_unsupported:
1459 psb->crypto_fail_unsupported = 1; 1459 psb->crypto_fail_unsupported = 1;
1460 break; 1460 break;
1461 default: 1461 default:
1462 return -EINVAL; 1462 return -EINVAL;
1463 } 1463 }
1464 } 1464 }
1465 1465
@@ -1777,7 +1777,7 @@ static int pohmelfs_show_stats(struct seq_file *m, struct vfsmount *mnt)
1777 seq_printf(m, "%pi6:%u", &sin->sin6_addr, ntohs(sin->sin6_port)); 1777 seq_printf(m, "%pi6:%u", &sin->sin6_addr, ntohs(sin->sin6_port));
1778 } else { 1778 } else {
1779 unsigned int i; 1779 unsigned int i;
1780 for (i=0; i<ctl->addrlen; ++i) 1780 for (i = 0; i < ctl->addrlen; ++i)
1781 seq_printf(m, "%02x.", ctl->addr.addr[i]); 1781 seq_printf(m, "%02x.", ctl->addr.addr[i]);
1782 } 1782 }
1783 1783
@@ -2035,7 +2035,7 @@ err_out_exit:
2035 2035
2036static void __exit exit_pohmel_fs(void) 2036static void __exit exit_pohmel_fs(void)
2037{ 2037{
2038 unregister_filesystem(&pohmel_fs_type); 2038 unregister_filesystem(&pohmel_fs_type);
2039 pohmelfs_destroy_inodecache(); 2039 pohmelfs_destroy_inodecache();
2040 pohmelfs_mcache_exit(); 2040 pohmelfs_mcache_exit();
2041 pohmelfs_config_exit(); 2041 pohmelfs_config_exit();
diff --git a/drivers/staging/pohmelfs/net.c b/drivers/staging/pohmelfs/net.c
index 4a86f0b1ea88..9279897ff161 100644
--- a/drivers/staging/pohmelfs/net.c
+++ b/drivers/staging/pohmelfs/net.c
@@ -713,8 +713,8 @@ static int pohmelfs_crypto_cap_response(struct netfs_state *st)
713 713
714 dprintk("%s: cipher '%s': %s, hash: '%s': %s.\n", 714 dprintk("%s: cipher '%s': %s, hash: '%s': %s.\n",
715 __func__, 715 __func__,
716 psb->cipher_string, (cap->cipher_strlen)?"SUPPORTED":"NOT SUPPORTED", 716 psb->cipher_string, (cap->cipher_strlen) ? "SUPPORTED" : "NOT SUPPORTED",
717 psb->hash_string, (cap->hash_strlen)?"SUPPORTED":"NOT SUPPORTED"); 717 psb->hash_string, (cap->hash_strlen) ? "SUPPORTED" : "NOT SUPPORTED");
718 718
719 if (!cap->hash_strlen) { 719 if (!cap->hash_strlen) {
720 if (psb->hash_strlen && psb->crypto_fail_unsupported) 720 if (psb->hash_strlen && psb->crypto_fail_unsupported)
@@ -748,11 +748,11 @@ static int pohmelfs_capabilities_response(struct netfs_state *st)
748 return err; 748 return err;
749 749
750 switch (cmd->id) { 750 switch (cmd->id) {
751 case POHMELFS_CRYPTO_CAPABILITIES: 751 case POHMELFS_CRYPTO_CAPABILITIES:
752 return pohmelfs_crypto_cap_response(st); 752 return pohmelfs_crypto_cap_response(st);
753 case POHMELFS_ROOT_CAPABILITIES: 753 case POHMELFS_ROOT_CAPABILITIES:
754 return pohmelfs_root_cap_response(st); 754 return pohmelfs_root_cap_response(st);
755 default: 755 default:
756 break; 756 break;
757 } 757 }
758 return -EINVAL; 758 return -EINVAL;
@@ -774,7 +774,7 @@ static int pohmelfs_getxattr_response(struct netfs_state *st)
774 m = pohmelfs_mcache_search(psb, cmd->id); 774 m = pohmelfs_mcache_search(psb, cmd->id);
775 775
776 dprintk("%s: id: %llu, gen: %llu, err: %d.\n", 776 dprintk("%s: id: %llu, gen: %llu, err: %d.\n",
777 __func__, cmd->id, (m)?m->gen:0, error); 777 __func__, cmd->id, (m) ? m->gen : 0, error);
778 778
779 if (!m) { 779 if (!m) {
780 printk("%s: failed to find getxattr cache entry: id: %llu.\n", __func__, cmd->id); 780 printk("%s: failed to find getxattr cache entry: id: %llu.\n", __func__, cmd->id);
@@ -824,7 +824,7 @@ int pohmelfs_data_lock_response(struct netfs_state *st)
824 m = pohmelfs_mcache_search(psb, id); 824 m = pohmelfs_mcache_search(psb, id);
825 825
826 dprintk("%s: id: %llu, gen: %llu, err: %d.\n", 826 dprintk("%s: id: %llu, gen: %llu, err: %d.\n",
827 __func__, cmd->id, (m)?m->gen:0, err); 827 __func__, cmd->id, (m) ? m->gen : 0, err);
828 828
829 if (!m) { 829 if (!m) {
830 pohmelfs_data_recv(st, st->data, cmd->size); 830 pohmelfs_data_recv(st, st->data, cmd->size);
@@ -915,7 +915,7 @@ static int pohmelfs_recv(void *data)
915 unsigned char *hash = e->data; 915 unsigned char *hash = e->data;
916 916
917 dprintk("%s: received hash: ", __func__); 917 dprintk("%s: received hash: ", __func__);
918 for (i=0; i<cmd->csize; ++i) 918 for (i = 0; i < cmd->csize; ++i)
919 printk("%02x ", hash[i]); 919 printk("%02x ", hash[i]);
920 920
921 printk("\n"); 921 printk("\n");
@@ -933,37 +933,37 @@ static int pohmelfs_recv(void *data)
933 } 933 }
934 934
935 switch (cmd->cmd) { 935 switch (cmd->cmd) {
936 case NETFS_READ_PAGE: 936 case NETFS_READ_PAGE:
937 err = pohmelfs_read_page_response(st); 937 err = pohmelfs_read_page_response(st);
938 break; 938 break;
939 case NETFS_READDIR: 939 case NETFS_READDIR:
940 err = pohmelfs_readdir_response(st); 940 err = pohmelfs_readdir_response(st);
941 break; 941 break;
942 case NETFS_LOOKUP: 942 case NETFS_LOOKUP:
943 err = pohmelfs_lookup_response(st); 943 err = pohmelfs_lookup_response(st);
944 break; 944 break;
945 case NETFS_CREATE: 945 case NETFS_CREATE:
946 err = pohmelfs_create_response(st); 946 err = pohmelfs_create_response(st);
947 break; 947 break;
948 case NETFS_REMOVE: 948 case NETFS_REMOVE:
949 err = pohmelfs_remove_response(st); 949 err = pohmelfs_remove_response(st);
950 break; 950 break;
951 case NETFS_TRANS: 951 case NETFS_TRANS:
952 err = pohmelfs_transaction_response(st); 952 err = pohmelfs_transaction_response(st);
953 break; 953 break;
954 case NETFS_PAGE_CACHE: 954 case NETFS_PAGE_CACHE:
955 err = pohmelfs_page_cache_response(st); 955 err = pohmelfs_page_cache_response(st);
956 break; 956 break;
957 case NETFS_CAPABILITIES: 957 case NETFS_CAPABILITIES:
958 err = pohmelfs_capabilities_response(st); 958 err = pohmelfs_capabilities_response(st);
959 break; 959 break;
960 case NETFS_LOCK: 960 case NETFS_LOCK:
961 err = pohmelfs_data_lock_response(st); 961 err = pohmelfs_data_lock_response(st);
962 break; 962 break;
963 case NETFS_XATTR_GET: 963 case NETFS_XATTR_GET:
964 err = pohmelfs_getxattr_response(st); 964 err = pohmelfs_getxattr_response(st);
965 break; 965 break;
966 default: 966 default:
967 printk("%s: wrong cmd: %u, id: %llu, start: %llu, size: %u, ext: %u.\n", 967 printk("%s: wrong cmd: %u, id: %llu, start: %llu, size: %u, ext: %u.\n",
968 __func__, cmd->cmd, cmd->id, cmd->start, cmd->size, cmd->ext); 968 __func__, cmd->cmd, cmd->id, cmd->start, cmd->size, cmd->ext);
969 netfs_state_reset(st); 969 netfs_state_reset(st);
diff --git a/drivers/staging/pohmelfs/netfs.h b/drivers/staging/pohmelfs/netfs.h
index 01cba006e07a..63391d2c25a4 100644
--- a/drivers/staging/pohmelfs/netfs.h
+++ b/drivers/staging/pohmelfs/netfs.h
@@ -305,7 +305,7 @@ struct pohmelfs_inode {
305}; 305};
306 306
307struct netfs_trans; 307struct netfs_trans;
308typedef int (* netfs_trans_complete_t)(struct page **pages, unsigned int page_num, 308typedef int (*netfs_trans_complete_t)(struct page **pages, unsigned int page_num,
309 void *private, int err); 309 void *private, int err);
310 310
311struct netfs_state; 311struct netfs_state;
@@ -489,7 +489,7 @@ void pohmelfs_crypto_thread_make_ready(struct pohmelfs_crypto_thread *th);
489struct netfs_state { 489struct netfs_state {
490 struct mutex __state_lock; /* Can not allow to use the same socket simultaneously */ 490 struct mutex __state_lock; /* Can not allow to use the same socket simultaneously */
491 struct mutex __state_send_lock; 491 struct mutex __state_send_lock;
492 struct netfs_cmd cmd; /* Cached command */ 492 struct netfs_cmd cmd; /* Cached command */
493 struct netfs_inode_info info; /* Cached inode info */ 493 struct netfs_inode_info info; /* Cached inode info */
494 494
495 void *data; /* Cached some data */ 495 void *data; /* Cached some data */
@@ -500,9 +500,9 @@ struct netfs_state {
500 struct task_struct *thread; /* Async receiving thread */ 500 struct task_struct *thread; /* Async receiving thread */
501 501
502 /* Waiting/polling machinery */ 502 /* Waiting/polling machinery */
503 wait_queue_t wait; 503 wait_queue_t wait;
504 wait_queue_head_t *whead; 504 wait_queue_head_t *whead;
505 wait_queue_head_t thread_wait; 505 wait_queue_head_t thread_wait;
506 506
507 struct mutex trans_lock; 507 struct mutex trans_lock;
508 struct rb_root trans_root; 508 struct rb_root trans_root;
@@ -620,8 +620,8 @@ struct pohmelfs_sb {
620 /* 620 /*
621 * Timed checks: stale transactions, inodes to be freed and so on. 621 * Timed checks: stale transactions, inodes to be freed and so on.
622 */ 622 */
623 struct delayed_work dwork; 623 struct delayed_work dwork;
624 struct delayed_work drop_dwork; 624 struct delayed_work drop_dwork;
625 625
626 struct super_block *sb; 626 struct super_block *sb;
627 627
@@ -911,7 +911,8 @@ static inline void pohmelfs_mcache_put(struct pohmelfs_sb *psb,
911 pohmelfs_mcache_free(psb, m); 911 pohmelfs_mcache_free(psb, m);
912} 912}
913 913
914//#define POHMELFS_TRUNCATE_ON_INODE_FLUSH 914/*#define POHMELFS_TRUNCATE_ON_INODE_FLUSH
915 */
915 916
916#endif /* __KERNEL__*/ 917#endif /* __KERNEL__*/
917 918
diff --git a/drivers/staging/quatech_usb2/quatech_usb2.c b/drivers/staging/quatech_usb2/quatech_usb2.c
index 1561f74a413b..ecd73135b319 100644
--- a/drivers/staging/quatech_usb2/quatech_usb2.c
+++ b/drivers/staging/quatech_usb2/quatech_usb2.c
@@ -57,7 +57,7 @@ static int debug;
57#define QT2_HW_FLOW_CONTROL_MASK 0xc5 57#define QT2_HW_FLOW_CONTROL_MASK 0xc5
58#define QT2_SW_FLOW_CONTROL_MASK 0xc6 58#define QT2_SW_FLOW_CONTROL_MASK 0xc6
59#define QT2_SW_FLOW_CONTROL_DISABLE 0xc7 59#define QT2_SW_FLOW_CONTROL_DISABLE 0xc7
60#define QT2_BREAK_CONTROL 0xc8 60#define QT2_BREAK_CONTROL 0xc8
61#define QT2_STOP_RECEIVE 0xe0 61#define QT2_STOP_RECEIVE 0xe0
62#define QT2_FLUSH_DEVICE 0xc4 62#define QT2_FLUSH_DEVICE 0xc4
63#define QT2_GET_SET_QMCR 0xe1 63#define QT2_GET_SET_QMCR 0xe1
@@ -207,7 +207,7 @@ struct quatech2_dev {
207 bool ReadBulkStopped; 207 bool ReadBulkStopped;
208 char open_ports; 208 char open_ports;
209 struct usb_serial_port *current_port; 209 struct usb_serial_port *current_port;
210 int buffer_size; 210 int buffer_size;
211}; 211};
212 212
213/* structure which holds line and modem status flags */ 213/* structure which holds line and modem status flags */
@@ -1648,10 +1648,10 @@ __func__);
1648 } /*endif*/ 1648 } /*endif*/
1649 if (tty_st && urb->actual_length) { 1649 if (tty_st && urb->actual_length) {
1650 tty_buffer_request_room(tty_st, 1); 1650 tty_buffer_request_room(tty_st, 1);
1651 tty_insert_flip_string(tty_st, 1651 tty_insert_flip_string(tty_st, &(
1652 &((unsigned char *)(urb->transfer_buffer) 1652 (unsigned char *)
1653 )[i], 1653 (urb->transfer_buffer)
1654 1); 1654 )[i], 1);
1655 } 1655 }
1656 } /*endfor*/ 1656 } /*endfor*/
1657 tty_flip_buffer_push(tty_st); 1657 tty_flip_buffer_push(tty_st);
diff --git a/drivers/staging/ramzswap/TODO b/drivers/staging/ramzswap/TODO
deleted file mode 100644
index 8d64e28fac0e..000000000000
--- a/drivers/staging/ramzswap/TODO
+++ /dev/null
@@ -1,5 +0,0 @@
1TODO:
2 - Add support for swap notifiers
3
4Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
5Nitin Gupta <ngupta@vflare.org>
diff --git a/drivers/staging/ramzswap/ramzswap_drv.c b/drivers/staging/ramzswap/ramzswap_drv.c
index ee5eb12b9285..d14bf9129e36 100644
--- a/drivers/staging/ramzswap/ramzswap_drv.c
+++ b/drivers/staging/ramzswap/ramzswap_drv.c
@@ -36,13 +36,6 @@
36static int ramzswap_major; 36static int ramzswap_major;
37static struct ramzswap *devices; 37static struct ramzswap *devices;
38 38
39/*
40 * Pages that compress to larger than this size are
41 * forwarded to backing swap, if present or stored
42 * uncompressed in memory otherwise.
43 */
44static unsigned int max_zpage_size;
45
46/* Module params (documentation at end) */ 39/* Module params (documentation at end) */
47static unsigned int num_devices; 40static unsigned int num_devices;
48 41
@@ -79,52 +72,6 @@ static int page_zero_filled(void *ptr)
79 return 1; 72 return 1;
80} 73}
81 74
82/*
83 * memlimit cannot be greater than backing disk size.
84 */
85static void ramzswap_set_memlimit(struct ramzswap *rzs, size_t totalram_bytes)
86{
87 int memlimit_valid = 1;
88
89 if (!rzs->memlimit) {
90 pr_info("Memory limit not set.\n");
91 memlimit_valid = 0;
92 }
93
94 if (rzs->memlimit > rzs->disksize) {
95 pr_info("Memory limit cannot be greater than "
96 "disksize: limit=%zu, disksize=%zu\n",
97 rzs->memlimit, rzs->disksize);
98 memlimit_valid = 0;
99 }
100
101 if (!memlimit_valid) {
102 size_t mempart, disksize;
103 pr_info("Using default: smaller of (%u%% of RAM) and "
104 "(backing disk size).\n",
105 default_memlimit_perc_ram);
106 mempart = default_memlimit_perc_ram * (totalram_bytes / 100);
107 disksize = rzs->disksize;
108 rzs->memlimit = mempart > disksize ? disksize : mempart;
109 }
110
111 if (rzs->memlimit > totalram_bytes / 2) {
112 pr_info(
113 "Its not advisable setting limit more than half of "
114 "size of memory since we expect a 2:1 compression ratio. "
115 "Limit represents amount of *compressed* data we can keep "
116 "in memory!\n"
117 "\tMemory Size: %zu kB\n"
118 "\tLimit you selected: %zu kB\n"
119 "Continuing anyway ...\n",
120 totalram_bytes >> 10, rzs->memlimit >> 10
121 );
122 }
123
124 rzs->memlimit &= PAGE_MASK;
125 BUG_ON(!rzs->memlimit);
126}
127
128static void ramzswap_set_disksize(struct ramzswap *rzs, size_t totalram_bytes) 75static void ramzswap_set_disksize(struct ramzswap *rzs, size_t totalram_bytes)
129{ 76{
130 if (!rzs->disksize) { 77 if (!rzs->disksize) {
@@ -156,80 +103,22 @@ static void ramzswap_set_disksize(struct ramzswap *rzs, size_t totalram_bytes)
156 103
157/* 104/*
158 * Swap header (1st page of swap device) contains information 105 * Swap header (1st page of swap device) contains information
159 * to indentify it as a swap partition. Prepare such a header 106 * about a swap file/partition. Prepare such a header for the
160 * for ramzswap device (ramzswap0) so that swapon can identify 107 * given ramzswap device so that swapon can identify it as a
161 * it as swap partition. In case backing swap device is provided, 108 * swap partition.
162 * copy its swap header.
163 */ 109 */
164static int setup_swap_header(struct ramzswap *rzs, union swap_header *s) 110static void setup_swap_header(struct ramzswap *rzs, union swap_header *s)
165{ 111{
166 int ret = 0; 112 s->info.version = 1;
167 struct page *page;
168 struct address_space *mapping;
169 union swap_header *backing_swap_header;
170
171 /*
172 * There is no backing swap device. Create a swap header
173 * that is acceptable by swapon.
174 */
175 if (!rzs->backing_swap) {
176 s->info.version = 1;
177 s->info.last_page = (rzs->disksize >> PAGE_SHIFT) - 1;
178 s->info.nr_badpages = 0;
179 memcpy(s->magic.magic, "SWAPSPACE2", 10);
180 return 0;
181 }
182
183 /*
184 * We have a backing swap device. Copy its swap header
185 * to ramzswap device header. If this header contains
186 * invalid information (backing device not a swap
187 * partition, etc.), swapon will fail for ramzswap
188 * which is correct behavior - we don't want to swap
189 * over filesystem partition!
190 */
191
192 /* Read the backing swap header (code from sys_swapon) */
193 mapping = rzs->swap_file->f_mapping;
194 if (!mapping->a_ops->readpage) {
195 ret = -EINVAL;
196 goto out;
197 }
198
199 page = read_mapping_page(mapping, 0, rzs->swap_file);
200 if (IS_ERR(page)) {
201 ret = PTR_ERR(page);
202 goto out;
203 }
204
205 backing_swap_header = kmap(page);
206 memcpy(s, backing_swap_header, sizeof(*s));
207 if (s->info.nr_badpages) {
208 pr_info("Cannot use backing swap with bad pages (%u)\n",
209 s->info.nr_badpages);
210 ret = -EINVAL;
211 }
212 /*
213 * ramzswap disksize equals number of usable pages in backing
214 * swap. Set last_page in swap header to match this disksize
215 * ('last_page' means 0-based index of last usable swap page).
216 */
217 s->info.last_page = (rzs->disksize >> PAGE_SHIFT) - 1; 113 s->info.last_page = (rzs->disksize >> PAGE_SHIFT) - 1;
218 kunmap(page); 114 s->info.nr_badpages = 0;
219 115 memcpy(s->magic.magic, "SWAPSPACE2", 10);
220out:
221 return ret;
222} 116}
223 117
224static void ramzswap_ioctl_get_stats(struct ramzswap *rzs, 118static void ramzswap_ioctl_get_stats(struct ramzswap *rzs,
225 struct ramzswap_ioctl_stats *s) 119 struct ramzswap_ioctl_stats *s)
226{ 120{
227 strncpy(s->backing_swap_name, rzs->backing_swap_name,
228 MAX_SWAP_NAME_LEN - 1);
229 s->backing_swap_name[MAX_SWAP_NAME_LEN - 1] = '\0';
230
231 s->disksize = rzs->disksize; 121 s->disksize = rzs->disksize;
232 s->memlimit = rzs->memlimit;
233 122
234#if defined(CONFIG_RAMZSWAP_STATS) 123#if defined(CONFIG_RAMZSWAP_STATS)
235 { 124 {
@@ -265,333 +154,10 @@ static void ramzswap_ioctl_get_stats(struct ramzswap *rzs,
265 s->orig_data_size = rs->pages_stored << PAGE_SHIFT; 154 s->orig_data_size = rs->pages_stored << PAGE_SHIFT;
266 s->compr_data_size = rs->compr_size; 155 s->compr_data_size = rs->compr_size;
267 s->mem_used_total = mem_used; 156 s->mem_used_total = mem_used;
268
269 s->bdev_num_reads = rzs_stat64_read(rzs, &rs->bdev_num_reads);
270 s->bdev_num_writes = rzs_stat64_read(rzs, &rs->bdev_num_writes);
271 } 157 }
272#endif /* CONFIG_RAMZSWAP_STATS */ 158#endif /* CONFIG_RAMZSWAP_STATS */
273} 159}
274 160
275static int add_backing_swap_extent(struct ramzswap *rzs,
276 pgoff_t phy_pagenum,
277 pgoff_t num_pages)
278{
279 unsigned int idx;
280 struct list_head *head;
281 struct page *curr_page, *new_page;
282 unsigned int extents_per_page = PAGE_SIZE /
283 sizeof(struct ramzswap_backing_extent);
284
285 idx = rzs->num_extents % extents_per_page;
286 if (!idx) {
287 new_page = alloc_page(__GFP_ZERO);
288 if (!new_page)
289 return -ENOMEM;
290
291 if (rzs->num_extents) {
292 curr_page = virt_to_page(rzs->curr_extent);
293 head = &curr_page->lru;
294 } else {
295 head = &rzs->backing_swap_extent_list;
296 }
297
298 list_add(&new_page->lru, head);
299 rzs->curr_extent = page_address(new_page);
300 }
301
302 rzs->curr_extent->phy_pagenum = phy_pagenum;
303 rzs->curr_extent->num_pages = num_pages;
304
305 pr_debug("add_extent: idx=%u, phy_pgnum=%lu, num_pgs=%lu, "
306 "pg_last=%lu, curr_ext=%p\n", idx, phy_pagenum, num_pages,
307 phy_pagenum + num_pages - 1, rzs->curr_extent);
308
309 if (idx != extents_per_page - 1)
310 rzs->curr_extent++;
311
312 return 0;
313}
314
315static int setup_backing_swap_extents(struct ramzswap *rzs,
316 struct inode *inode, unsigned long *num_pages)
317{
318 int ret = 0;
319 unsigned blkbits;
320 unsigned blocks_per_page;
321 pgoff_t contig_pages = 0, total_pages = 0;
322 pgoff_t pagenum = 0, prev_pagenum = 0;
323 sector_t probe_block = 0;
324 sector_t last_block;
325
326 blkbits = inode->i_blkbits;
327 blocks_per_page = PAGE_SIZE >> blkbits;
328
329 last_block = i_size_read(inode) >> blkbits;
330 while (probe_block + blocks_per_page <= last_block) {
331 unsigned block_in_page;
332 sector_t first_block;
333
334 first_block = bmap(inode, probe_block);
335 if (first_block == 0)
336 goto bad_bmap;
337
338 /* It must be PAGE_SIZE aligned on-disk */
339 if (first_block & (blocks_per_page - 1)) {
340 probe_block++;
341 goto probe_next;
342 }
343
344 /* All blocks within this page must be contiguous on disk */
345 for (block_in_page = 1; block_in_page < blocks_per_page;
346 block_in_page++) {
347 sector_t block;
348
349 block = bmap(inode, probe_block + block_in_page);
350 if (block == 0)
351 goto bad_bmap;
352 if (block != first_block + block_in_page) {
353 /* Discontiguity */
354 probe_block++;
355 goto probe_next;
356 }
357 }
358
359 /*
360 * We found a PAGE_SIZE length, PAGE_SIZE aligned
361 * run of blocks.
362 */
363 pagenum = first_block >> (PAGE_SHIFT - blkbits);
364
365 if (total_pages && (pagenum != prev_pagenum + 1)) {
366 ret = add_backing_swap_extent(rzs, prev_pagenum -
367 (contig_pages - 1), contig_pages);
368 if (ret < 0)
369 goto out;
370 rzs->num_extents++;
371 contig_pages = 0;
372 }
373 total_pages++;
374 contig_pages++;
375 prev_pagenum = pagenum;
376 probe_block += blocks_per_page;
377
378probe_next:
379 continue;
380 }
381
382 if (contig_pages) {
383 pr_debug("adding last extent: pagenum=%lu, "
384 "contig_pages=%lu\n", pagenum, contig_pages);
385 ret = add_backing_swap_extent(rzs,
386 prev_pagenum - (contig_pages - 1), contig_pages);
387 if (ret < 0)
388 goto out;
389 rzs->num_extents++;
390 }
391 if (!rzs->num_extents) {
392 pr_err("No swap extents found!\n");
393 ret = -EINVAL;
394 }
395
396 if (!ret) {
397 *num_pages = total_pages;
398 pr_info("Found %lu extents containing %luk\n",
399 rzs->num_extents, *num_pages << (PAGE_SHIFT - 10));
400 }
401 goto out;
402
403bad_bmap:
404 pr_err("Backing swapfile has holes\n");
405 ret = -EINVAL;
406out:
407 while (ret && !list_empty(&rzs->backing_swap_extent_list)) {
408 struct page *page;
409 struct list_head *entry = rzs->backing_swap_extent_list.next;
410 page = list_entry(entry, struct page, lru);
411 list_del(entry);
412 __free_page(page);
413 }
414 return ret;
415}
416
417static void map_backing_swap_extents(struct ramzswap *rzs)
418{
419 struct ramzswap_backing_extent *se;
420 struct page *table_page, *se_page;
421 unsigned long num_pages, num_table_pages, entry;
422 unsigned long se_idx, span;
423 unsigned entries_per_page = PAGE_SIZE / sizeof(*rzs->table);
424 unsigned extents_per_page = PAGE_SIZE / sizeof(*se);
425
426 /* True for block device */
427 if (!rzs->num_extents)
428 return;
429
430 se_page = list_entry(rzs->backing_swap_extent_list.next,
431 struct page, lru);
432 se = page_address(se_page);
433 span = se->num_pages;
434 num_pages = rzs->disksize >> PAGE_SHIFT;
435 num_table_pages = DIV_ROUND_UP(num_pages * sizeof(*rzs->table),
436 PAGE_SIZE);
437
438 entry = 0;
439 se_idx = 0;
440 while (num_table_pages--) {
441 table_page = vmalloc_to_page(&rzs->table[entry]);
442 while (span <= entry) {
443 se_idx++;
444 if (se_idx == rzs->num_extents)
445 BUG();
446
447 if (!(se_idx % extents_per_page)) {
448 se_page = list_entry(se_page->lru.next,
449 struct page, lru);
450 se = page_address(se_page);
451 } else
452 se++;
453
454 span += se->num_pages;
455 }
456 table_page->mapping = (struct address_space *)se;
457 table_page->private = se->num_pages - (span - entry);
458 pr_debug("map_table: entry=%lu, span=%lu, map=%p, priv=%lu\n",
459 entry, span, table_page->mapping, table_page->private);
460 entry += entries_per_page;
461 }
462}
463
464/*
465 * Check if value of backing_swap module param is sane.
466 * Claim this device and set ramzswap size equal to
467 * size of this block device.
468 */
469static int setup_backing_swap(struct ramzswap *rzs)
470{
471 int ret = 0;
472 size_t disksize;
473 unsigned long num_pages = 0;
474 struct inode *inode;
475 struct file *swap_file;
476 struct address_space *mapping;
477 struct block_device *bdev = NULL;
478
479 if (!rzs->backing_swap_name[0]) {
480 pr_debug("backing_swap param not given\n");
481 goto out;
482 }
483
484 pr_info("Using backing swap device: %s\n", rzs->backing_swap_name);
485
486 swap_file = filp_open(rzs->backing_swap_name,
487 O_RDWR | O_LARGEFILE, 0);
488 if (IS_ERR(swap_file)) {
489 pr_err("Error opening backing device: %s\n",
490 rzs->backing_swap_name);
491 ret = -EINVAL;
492 goto out;
493 }
494
495 mapping = swap_file->f_mapping;
496 inode = mapping->host;
497
498 if (S_ISBLK(inode->i_mode)) {
499 bdev = I_BDEV(inode);
500 ret = bd_claim(bdev, setup_backing_swap);
501 if (ret < 0) {
502 bdev = NULL;
503 goto bad_param;
504 }
505 disksize = i_size_read(inode);
506 /*
507 * Can happen if user gives an extended partition as
508 * backing swap or simply a bad disk.
509 */
510 if (!disksize) {
511 pr_err("Error reading backing swap size.\n");
512 goto bad_param;
513 }
514 } else if (S_ISREG(inode->i_mode)) {
515 bdev = inode->i_sb->s_bdev;
516 if (IS_SWAPFILE(inode)) {
517 ret = -EBUSY;
518 goto bad_param;
519 }
520 ret = setup_backing_swap_extents(rzs, inode, &num_pages);
521 if (ret < 0)
522 goto bad_param;
523 disksize = num_pages << PAGE_SHIFT;
524 } else {
525 goto bad_param;
526 }
527
528 rzs->swap_file = swap_file;
529 rzs->backing_swap = bdev;
530 rzs->disksize = disksize;
531
532 return 0;
533
534bad_param:
535 if (bdev)
536 bd_release(bdev);
537 filp_close(swap_file, NULL);
538
539out:
540 rzs->backing_swap = NULL;
541 return ret;
542}
543
544/*
545 * Map logical page number 'pagenum' to physical page number
546 * on backing swap device. For block device, this is a nop.
547 */
548static u32 map_backing_swap_page(struct ramzswap *rzs, u32 pagenum)
549{
550 u32 skip_pages, entries_per_page;
551 size_t delta, se_offset, skipped;
552 struct page *table_page, *se_page;
553 struct ramzswap_backing_extent *se;
554
555 if (!rzs->num_extents)
556 return pagenum;
557
558 entries_per_page = PAGE_SIZE / sizeof(*rzs->table);
559
560 table_page = vmalloc_to_page(&rzs->table[pagenum]);
561 se = (struct ramzswap_backing_extent *)table_page->mapping;
562 se_page = virt_to_page(se);
563
564 skip_pages = pagenum - (pagenum / entries_per_page * entries_per_page);
565 se_offset = table_page->private + skip_pages;
566
567 if (se_offset < se->num_pages)
568 return se->phy_pagenum + se_offset;
569
570 skipped = se->num_pages - table_page->private;
571 do {
572 struct ramzswap_backing_extent *se_base;
573 u32 se_entries_per_page = PAGE_SIZE / sizeof(*se);
574
575 /* Get next swap extent */
576 se_base = (struct ramzswap_backing_extent *)
577 page_address(se_page);
578 if (se - se_base == se_entries_per_page - 1) {
579 se_page = list_entry(se_page->lru.next,
580 struct page, lru);
581 se = page_address(se_page);
582 } else {
583 se++;
584 }
585
586 skipped += se->num_pages;
587 } while (skipped < skip_pages);
588
589 delta = skipped - skip_pages;
590 se_offset = se->num_pages - delta;
591
592 return se->phy_pagenum + se_offset;
593}
594
595static void ramzswap_free_page(struct ramzswap *rzs, size_t index) 161static void ramzswap_free_page(struct ramzswap *rzs, size_t index)
596{ 162{
597 u32 clen; 163 u32 clen;
@@ -678,38 +244,12 @@ static int handle_uncompressed_page(struct ramzswap *rzs, struct bio *bio)
678 244
679/* 245/*
680 * Called when request page is not present in ramzswap. 246 * Called when request page is not present in ramzswap.
681 * Its either in backing swap device (if present) or 247 * This is an attempt to read before any previous write
682 * this is an attempt to read before any previous write
683 * to this location - this happens due to readahead when 248 * to this location - this happens due to readahead when
684 * swap device is read from user-space (e.g. during swapon) 249 * swap device is read from user-space (e.g. during swapon)
685 */ 250 */
686static int handle_ramzswap_fault(struct ramzswap *rzs, struct bio *bio) 251static int handle_ramzswap_fault(struct ramzswap *rzs, struct bio *bio)
687{ 252{
688 /*
689 * Always forward such requests to backing swap
690 * device (if present)
691 */
692 if (rzs->backing_swap) {
693 u32 pagenum;
694 rzs_stat64_dec(rzs, &rzs->stats.num_reads);
695 rzs_stat64_inc(rzs, &rzs->stats.bdev_num_reads);
696 bio->bi_bdev = rzs->backing_swap;
697
698 /*
699 * In case backing swap is a file, find the right offset within
700 * the file corresponding to logical position 'index'. For block
701 * device, this is a nop.
702 */
703 pagenum = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT;
704 bio->bi_sector = map_backing_swap_page(rzs, pagenum)
705 << SECTORS_PER_PAGE_SHIFT;
706 return 1;
707 }
708
709 /*
710 * Its unlikely event in case backing dev is
711 * not present
712 */
713 pr_debug("Read before write on swap device: " 253 pr_debug("Read before write on swap device: "
714 "sector=%lu, size=%u, offset=%u\n", 254 "sector=%lu, size=%u, offset=%u\n",
715 (ulong)(bio->bi_sector), bio->bi_size, 255 (ulong)(bio->bi_sector), bio->bi_size,
@@ -781,7 +321,7 @@ out:
781 321
782static int ramzswap_write(struct ramzswap *rzs, struct bio *bio) 322static int ramzswap_write(struct ramzswap *rzs, struct bio *bio)
783{ 323{
784 int ret, fwd_write_request = 0; 324 int ret;
785 u32 offset, index; 325 u32 offset, index;
786 size_t clen; 326 size_t clen;
787 struct zobj_header *zheader; 327 struct zobj_header *zheader;
@@ -795,14 +335,6 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio)
795 335
796 src = rzs->compress_buffer; 336 src = rzs->compress_buffer;
797 337
798 /*
799 * System swaps to same sector again when the stored page
800 * is no longer referenced by any process. So, its now safe
801 * to free the memory that was allocated for this page.
802 */
803 if (rzs->table[index].page || rzs_test_flag(rzs, index, RZS_ZERO))
804 ramzswap_free_page(rzs, index);
805
806 mutex_lock(&rzs->lock); 338 mutex_lock(&rzs->lock);
807 339
808 user_mem = kmap_atomic(page, KM_USER0); 340 user_mem = kmap_atomic(page, KM_USER0);
@@ -817,14 +349,6 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio)
817 return 0; 349 return 0;
818 } 350 }
819 351
820 if (rzs->backing_swap &&
821 (rzs->stats.compr_size > rzs->memlimit - PAGE_SIZE)) {
822 kunmap_atomic(user_mem, KM_USER0);
823 mutex_unlock(&rzs->lock);
824 fwd_write_request = 1;
825 goto out;
826 }
827
828 ret = lzo1x_1_compress(user_mem, PAGE_SIZE, src, &clen, 352 ret = lzo1x_1_compress(user_mem, PAGE_SIZE, src, &clen,
829 rzs->compress_workmem); 353 rzs->compress_workmem);
830 354
@@ -838,18 +362,11 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio)
838 } 362 }
839 363
840 /* 364 /*
841 * Page is incompressible. Forward it to backing swap 365 * Page is incompressible. Store it as-is (uncompressed)
842 * if present. Otherwise, store it as-is (uncompressed)
843 * since we do not want to return too many swap write 366 * since we do not want to return too many swap write
844 * errors which has side effect of hanging the system. 367 * errors which has side effect of hanging the system.
845 */ 368 */
846 if (unlikely(clen > max_zpage_size)) { 369 if (unlikely(clen > max_zpage_size)) {
847 if (rzs->backing_swap) {
848 mutex_unlock(&rzs->lock);
849 fwd_write_request = 1;
850 goto out;
851 }
852
853 clen = PAGE_SIZE; 370 clen = PAGE_SIZE;
854 page_store = alloc_page(GFP_NOIO | __GFP_HIGHMEM); 371 page_store = alloc_page(GFP_NOIO | __GFP_HIGHMEM);
855 if (unlikely(!page_store)) { 372 if (unlikely(!page_store)) {
@@ -875,8 +392,6 @@ static int ramzswap_write(struct ramzswap *rzs, struct bio *bio)
875 pr_info("Error allocating memory for compressed " 392 pr_info("Error allocating memory for compressed "
876 "page: %u, size=%zu\n", index, clen); 393 "page: %u, size=%zu\n", index, clen);
877 rzs_stat64_inc(rzs, &rzs->stats.failed_writes); 394 rzs_stat64_inc(rzs, &rzs->stats.failed_writes);
878 if (rzs->backing_swap)
879 fwd_write_request = 1;
880 goto out; 395 goto out;
881 } 396 }
882 397
@@ -914,31 +429,6 @@ memstore:
914 return 0; 429 return 0;
915 430
916out: 431out:
917 if (fwd_write_request) {
918 rzs_stat64_inc(rzs, &rzs->stats.bdev_num_writes);
919 bio->bi_bdev = rzs->backing_swap;
920#if 0
921 /*
922 * TODO: We currently have linear mapping of ramzswap and
923 * backing swap sectors. This is not desired since we want
924 * to optimize writes to backing swap to minimize disk seeks
925 * or have effective wear leveling (for SSDs). Also, a
926 * non-linear mapping is required to implement compressed
927 * on-disk swapping.
928 */
929 bio->bi_sector = get_backing_swap_page()
930 << SECTORS_PER_PAGE_SHIFT;
931#endif
932 /*
933 * In case backing swap is a file, find the right offset within
934 * the file corresponding to logical position 'index'. For block
935 * device, this is a nop.
936 */
937 bio->bi_sector = map_backing_swap_page(rzs, index)
938 << SECTORS_PER_PAGE_SHIFT;
939 return 1;
940 }
941
942 bio_io_error(bio); 432 bio_io_error(bio);
943 return 0; 433 return 0;
944} 434}
@@ -996,19 +486,11 @@ static int ramzswap_make_request(struct request_queue *queue, struct bio *bio)
996 486
997static void reset_device(struct ramzswap *rzs) 487static void reset_device(struct ramzswap *rzs)
998{ 488{
999 int is_backing_blkdev = 0; 489 size_t index;
1000 size_t index, num_pages;
1001 unsigned entries_per_page;
1002 unsigned long num_table_pages, entry = 0;
1003 490
1004 /* Do not accept any new I/O request */ 491 /* Do not accept any new I/O request */
1005 rzs->init_done = 0; 492 rzs->init_done = 0;
1006 493
1007 if (rzs->backing_swap && !rzs->num_extents)
1008 is_backing_blkdev = 1;
1009
1010 num_pages = rzs->disksize >> PAGE_SHIFT;
1011
1012 /* Free various per-device buffers */ 494 /* Free various per-device buffers */
1013 kfree(rzs->compress_workmem); 495 kfree(rzs->compress_workmem);
1014 free_pages((unsigned long)rzs->compress_buffer, 1); 496 free_pages((unsigned long)rzs->compress_buffer, 1);
@@ -1017,7 +499,7 @@ static void reset_device(struct ramzswap *rzs)
1017 rzs->compress_buffer = NULL; 499 rzs->compress_buffer = NULL;
1018 500
1019 /* Free all pages that are still in this ramzswap device */ 501 /* Free all pages that are still in this ramzswap device */
1020 for (index = 0; index < num_pages; index++) { 502 for (index = 0; index < rzs->disksize >> PAGE_SHIFT; index++) {
1021 struct page *page; 503 struct page *page;
1022 u16 offset; 504 u16 offset;
1023 505
@@ -1033,51 +515,16 @@ static void reset_device(struct ramzswap *rzs)
1033 xv_free(rzs->mem_pool, page, offset); 515 xv_free(rzs->mem_pool, page, offset);
1034 } 516 }
1035 517
1036 entries_per_page = PAGE_SIZE / sizeof(*rzs->table);
1037 num_table_pages = DIV_ROUND_UP(num_pages * sizeof(*rzs->table),
1038 PAGE_SIZE);
1039 /*
1040 * Set page->mapping to NULL for every table page.
1041 * Otherwise, we will hit bad_page() during free.
1042 */
1043 while (rzs->num_extents && num_table_pages--) {
1044 struct page *page;
1045 page = vmalloc_to_page(&rzs->table[entry]);
1046 page->mapping = NULL;
1047 entry += entries_per_page;
1048 }
1049 vfree(rzs->table); 518 vfree(rzs->table);
1050 rzs->table = NULL; 519 rzs->table = NULL;
1051 520
1052 xv_destroy_pool(rzs->mem_pool); 521 xv_destroy_pool(rzs->mem_pool);
1053 rzs->mem_pool = NULL; 522 rzs->mem_pool = NULL;
1054 523
1055 /* Free all swap extent pages */
1056 while (!list_empty(&rzs->backing_swap_extent_list)) {
1057 struct page *page;
1058 struct list_head *entry;
1059 entry = rzs->backing_swap_extent_list.next;
1060 page = list_entry(entry, struct page, lru);
1061 list_del(entry);
1062 __free_page(page);
1063 }
1064 INIT_LIST_HEAD(&rzs->backing_swap_extent_list);
1065 rzs->num_extents = 0;
1066
1067 /* Close backing swap device, if present */
1068 if (rzs->backing_swap) {
1069 if (is_backing_blkdev)
1070 bd_release(rzs->backing_swap);
1071 filp_close(rzs->swap_file, NULL);
1072 rzs->backing_swap = NULL;
1073 memset(rzs->backing_swap_name, 0, MAX_SWAP_NAME_LEN);
1074 }
1075
1076 /* Reset stats */ 524 /* Reset stats */
1077 memset(&rzs->stats, 0, sizeof(rzs->stats)); 525 memset(&rzs->stats, 0, sizeof(rzs->stats));
1078 526
1079 rzs->disksize = 0; 527 rzs->disksize = 0;
1080 rzs->memlimit = 0;
1081} 528}
1082 529
1083static int ramzswap_ioctl_init_device(struct ramzswap *rzs) 530static int ramzswap_ioctl_init_device(struct ramzswap *rzs)
@@ -1092,14 +539,7 @@ static int ramzswap_ioctl_init_device(struct ramzswap *rzs)
1092 return -EBUSY; 539 return -EBUSY;
1093 } 540 }
1094 541
1095 ret = setup_backing_swap(rzs); 542 ramzswap_set_disksize(rzs, totalram_pages << PAGE_SHIFT);
1096 if (ret)
1097 goto fail;
1098
1099 if (rzs->backing_swap)
1100 ramzswap_set_memlimit(rzs, totalram_pages << PAGE_SHIFT);
1101 else
1102 ramzswap_set_disksize(rzs, totalram_pages << PAGE_SHIFT);
1103 543
1104 rzs->compress_workmem = kzalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL); 544 rzs->compress_workmem = kzalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
1105 if (!rzs->compress_workmem) { 545 if (!rzs->compress_workmem) {
@@ -1126,8 +566,6 @@ static int ramzswap_ioctl_init_device(struct ramzswap *rzs)
1126 } 566 }
1127 memset(rzs->table, 0, num_pages * sizeof(*rzs->table)); 567 memset(rzs->table, 0, num_pages * sizeof(*rzs->table));
1128 568
1129 map_backing_swap_extents(rzs);
1130
1131 page = alloc_page(__GFP_ZERO); 569 page = alloc_page(__GFP_ZERO);
1132 if (!page) { 570 if (!page) {
1133 pr_err("Error allocating swap header page\n"); 571 pr_err("Error allocating swap header page\n");
@@ -1138,23 +576,13 @@ static int ramzswap_ioctl_init_device(struct ramzswap *rzs)
1138 rzs_set_flag(rzs, 0, RZS_UNCOMPRESSED); 576 rzs_set_flag(rzs, 0, RZS_UNCOMPRESSED);
1139 577
1140 swap_header = kmap(page); 578 swap_header = kmap(page);
1141 ret = setup_swap_header(rzs, swap_header); 579 setup_swap_header(rzs, swap_header);
1142 kunmap(page); 580 kunmap(page);
1143 if (ret) {
1144 pr_err("Error setting swap header\n");
1145 goto fail;
1146 }
1147 581
1148 set_capacity(rzs->disk, rzs->disksize >> SECTOR_SHIFT); 582 set_capacity(rzs->disk, rzs->disksize >> SECTOR_SHIFT);
1149 583
1150 /* 584 /* ramzswap devices sort of resembles non-rotational disks */
1151 * We have ident mapping of sectors for ramzswap and 585 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, rzs->disk->queue);
1152 * and the backing swap device. So, this queue flag
1153 * should be according to backing dev.
1154 */
1155 if (!rzs->backing_swap ||
1156 blk_queue_nonrot(rzs->backing_swap->bd_disk->queue))
1157 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, rzs->disk->queue);
1158 586
1159 rzs->mem_pool = xv_create_pool(); 587 rzs->mem_pool = xv_create_pool();
1160 if (!rzs->mem_pool) { 588 if (!rzs->mem_pool) {
@@ -1163,17 +591,6 @@ static int ramzswap_ioctl_init_device(struct ramzswap *rzs)
1163 goto fail; 591 goto fail;
1164 } 592 }
1165 593
1166 /*
1167 * Pages that compress to size greater than this are forwarded
1168 * to physical swap disk (if backing dev is provided)
1169 * TODO: make this configurable
1170 */
1171 if (rzs->backing_swap)
1172 max_zpage_size = max_zpage_size_bdev;
1173 else
1174 max_zpage_size = max_zpage_size_nobdev;
1175 pr_debug("Max compressed page size: %u bytes\n", max_zpage_size);
1176
1177 rzs->init_done = 1; 594 rzs->init_done = 1;
1178 595
1179 pr_debug("Initialization done!\n"); 596 pr_debug("Initialization done!\n");
@@ -1198,7 +615,7 @@ static int ramzswap_ioctl(struct block_device *bdev, fmode_t mode,
1198 unsigned int cmd, unsigned long arg) 615 unsigned int cmd, unsigned long arg)
1199{ 616{
1200 int ret = 0; 617 int ret = 0;
1201 size_t disksize_kb, memlimit_kb; 618 size_t disksize_kb;
1202 619
1203 struct ramzswap *rzs = bdev->bd_disk->private_data; 620 struct ramzswap *rzs = bdev->bd_disk->private_data;
1204 621
@@ -1217,36 +634,6 @@ static int ramzswap_ioctl(struct block_device *bdev, fmode_t mode,
1217 pr_info("Disk size set to %zu kB\n", disksize_kb); 634 pr_info("Disk size set to %zu kB\n", disksize_kb);
1218 break; 635 break;
1219 636
1220 case RZSIO_SET_MEMLIMIT_KB:
1221 if (rzs->init_done) {
1222 /* TODO: allow changing memlimit */
1223 ret = -EBUSY;
1224 goto out;
1225 }
1226 if (copy_from_user(&memlimit_kb, (void *)arg,
1227 _IOC_SIZE(cmd))) {
1228 ret = -EFAULT;
1229 goto out;
1230 }
1231 rzs->memlimit = memlimit_kb << 10;
1232 pr_info("Memory limit set to %zu kB\n", memlimit_kb);
1233 break;
1234
1235 case RZSIO_SET_BACKING_SWAP:
1236 if (rzs->init_done) {
1237 ret = -EBUSY;
1238 goto out;
1239 }
1240
1241 if (copy_from_user(&rzs->backing_swap_name, (void *)arg,
1242 _IOC_SIZE(cmd))) {
1243 ret = -EFAULT;
1244 goto out;
1245 }
1246 rzs->backing_swap_name[MAX_SWAP_NAME_LEN - 1] = '\0';
1247 pr_info("Backing swap set to %s\n", rzs->backing_swap_name);
1248 break;
1249
1250 case RZSIO_GET_STATS: 637 case RZSIO_GET_STATS:
1251 { 638 {
1252 struct ramzswap_ioctl_stats *stats; 639 struct ramzswap_ioctl_stats *stats;
@@ -1295,9 +682,21 @@ out:
1295 return ret; 682 return ret;
1296} 683}
1297 684
685void ramzswap_slot_free_notify(struct block_device *bdev, unsigned long index)
686{
687 struct ramzswap *rzs;
688
689 rzs = bdev->bd_disk->private_data;
690 ramzswap_free_page(rzs, index);
691 rzs_stat64_inc(rzs, &rzs->stats.notify_free);
692
693 return;
694}
695
1298static struct block_device_operations ramzswap_devops = { 696static struct block_device_operations ramzswap_devops = {
1299 .ioctl = ramzswap_ioctl, 697 .ioctl = ramzswap_ioctl,
1300 .owner = THIS_MODULE, 698 .swap_slot_free_notify = ramzswap_slot_free_notify,
699 .owner = THIS_MODULE
1301}; 700};
1302 701
1303static int create_device(struct ramzswap *rzs, int device_id) 702static int create_device(struct ramzswap *rzs, int device_id)
@@ -1306,7 +705,6 @@ static int create_device(struct ramzswap *rzs, int device_id)
1306 705
1307 mutex_init(&rzs->lock); 706 mutex_init(&rzs->lock);
1308 spin_lock_init(&rzs->stat64_lock); 707 spin_lock_init(&rzs->stat64_lock);
1309 INIT_LIST_HEAD(&rzs->backing_swap_extent_list);
1310 708
1311 rzs->queue = blk_alloc_queue(GFP_KERNEL); 709 rzs->queue = blk_alloc_queue(GFP_KERNEL);
1312 if (!rzs->queue) { 710 if (!rzs->queue) {
@@ -1336,10 +734,7 @@ static int create_device(struct ramzswap *rzs, int device_id)
1336 rzs->disk->private_data = rzs; 734 rzs->disk->private_data = rzs;
1337 snprintf(rzs->disk->disk_name, 16, "ramzswap%d", device_id); 735 snprintf(rzs->disk->disk_name, 16, "ramzswap%d", device_id);
1338 736
1339 /* 737 /* Actual capacity set using RZSIO_SET_DISKSIZE_KB ioctl */
1340 * Actual capacity set using RZSIO_SET_DISKSIZE_KB ioctl
1341 * or set equal to backing swap device (if provided)
1342 */
1343 set_capacity(rzs->disk, 0); 738 set_capacity(rzs->disk, 0);
1344 739
1345 blk_queue_physical_block_size(rzs->disk->queue, PAGE_SIZE); 740 blk_queue_physical_block_size(rzs->disk->queue, PAGE_SIZE);
diff --git a/drivers/staging/ramzswap/ramzswap_drv.h b/drivers/staging/ramzswap/ramzswap_drv.h
index c7e0e767c223..63c30420df21 100644
--- a/drivers/staging/ramzswap/ramzswap_drv.h
+++ b/drivers/staging/ramzswap/ramzswap_drv.h
@@ -31,8 +31,7 @@ static const unsigned max_num_devices = 32;
31 * Stored at beginning of each compressed object. 31 * Stored at beginning of each compressed object.
32 * 32 *
33 * It stores back-reference to table entry which points to this 33 * It stores back-reference to table entry which points to this
34 * object. This is required to support memory defragmentation or 34 * object. This is required to support memory defragmentation.
35 * migrating compressed pages to backing swap disk.
36 */ 35 */
37struct zobj_header { 36struct zobj_header {
38#if 0 37#if 0
@@ -44,27 +43,17 @@ struct zobj_header {
44 43
45/* Default ramzswap disk size: 25% of total RAM */ 44/* Default ramzswap disk size: 25% of total RAM */
46static const unsigned default_disksize_perc_ram = 25; 45static const unsigned default_disksize_perc_ram = 25;
47static const unsigned default_memlimit_perc_ram = 15;
48 46
49/* 47/*
50 * Max compressed page size when backing device is provided.
51 * Pages that compress to size greater than this are sent to
52 * physical swap disk.
53 */
54static const unsigned max_zpage_size_bdev = PAGE_SIZE / 2;
55
56/*
57 * Max compressed page size when there is no backing dev.
58 * Pages that compress to size greater than this are stored 48 * Pages that compress to size greater than this are stored
59 * uncompressed in memory. 49 * uncompressed in memory.
60 */ 50 */
61static const unsigned max_zpage_size_nobdev = PAGE_SIZE / 4 * 3; 51static const unsigned max_zpage_size = PAGE_SIZE / 4 * 3;
62 52
63/* 53/*
64 * NOTE: max_zpage_size_{bdev,nobdev} sizes must be 54 * NOTE: max_zpage_size must be less than or equal to:
65 * less than or equal to:
66 * XV_MAX_ALLOC_SIZE - sizeof(struct zobj_header) 55 * XV_MAX_ALLOC_SIZE - sizeof(struct zobj_header)
67 * since otherwise xv_malloc would always return failure. 56 * otherwise, xv_malloc() would always return failure.
68 */ 57 */
69 58
70/*-- End of configurable params */ 59/*-- End of configurable params */
@@ -98,15 +87,6 @@ struct table {
98 u8 flags; 87 u8 flags;
99} __attribute__((aligned(4))); 88} __attribute__((aligned(4)));
100 89
101/*
102 * Swap extent information in case backing swap is a regular
103 * file. These extent entries must fit exactly in a page.
104 */
105struct ramzswap_backing_extent {
106 pgoff_t phy_pagenum;
107 pgoff_t num_pages;
108} __attribute__((aligned(4)));
109
110struct ramzswap_stats { 90struct ramzswap_stats {
111 /* basic stats */ 91 /* basic stats */
112 size_t compr_size; /* compressed size of pages stored - 92 size_t compr_size; /* compressed size of pages stored -
@@ -123,8 +103,6 @@ struct ramzswap_stats {
123 u32 pages_stored; /* no. of pages currently stored */ 103 u32 pages_stored; /* no. of pages currently stored */
124 u32 good_compress; /* % of pages with compression ratio<=50% */ 104 u32 good_compress; /* % of pages with compression ratio<=50% */
125 u32 pages_expand; /* % of incompressible pages */ 105 u32 pages_expand; /* % of incompressible pages */
126 u64 bdev_num_reads; /* no. of reads on backing dev */
127 u64 bdev_num_writes; /* no. of writes on backing dev */
128#endif 106#endif
129}; 107};
130 108
@@ -139,11 +117,6 @@ struct ramzswap {
139 struct gendisk *disk; 117 struct gendisk *disk;
140 int init_done; 118 int init_done;
141 /* 119 /*
142 * This is limit on compressed data size (stats.compr_size)
143 * Its applicable only when backing swap device is present.
144 */
145 size_t memlimit; /* bytes */
146 /*
147 * This is limit on amount of *uncompressed* worth of data 120 * This is limit on amount of *uncompressed* worth of data
148 * we can hold. When backing swap device is provided, it is 121 * we can hold. When backing swap device is provided, it is
149 * set equal to device size. 122 * set equal to device size.
@@ -151,14 +124,6 @@ struct ramzswap {
151 size_t disksize; /* bytes */ 124 size_t disksize; /* bytes */
152 125
153 struct ramzswap_stats stats; 126 struct ramzswap_stats stats;
154
155 /* backing swap device info */
156 struct ramzswap_backing_extent *curr_extent;
157 struct list_head backing_swap_extent_list;
158 unsigned long num_extents;
159 char backing_swap_name[MAX_SWAP_NAME_LEN];
160 struct block_device *backing_swap;
161 struct file *swap_file;
162}; 127};
163 128
164/*-- */ 129/*-- */
@@ -182,13 +147,6 @@ static void rzs_stat64_inc(struct ramzswap *rzs, u64 *v)
182 spin_unlock(&rzs->stat64_lock); 147 spin_unlock(&rzs->stat64_lock);
183} 148}
184 149
185static void rzs_stat64_dec(struct ramzswap *rzs, u64 *v)
186{
187 spin_lock(&rzs->stat64_lock);
188 *v = *v - 1;
189 spin_unlock(&rzs->stat64_lock);
190}
191
192static u64 rzs_stat64_read(struct ramzswap *rzs, u64 *v) 150static u64 rzs_stat64_read(struct ramzswap *rzs, u64 *v)
193{ 151{
194 u64 val; 152 u64 val;
@@ -203,7 +161,6 @@ static u64 rzs_stat64_read(struct ramzswap *rzs, u64 *v)
203#define rzs_stat_inc(v) 161#define rzs_stat_inc(v)
204#define rzs_stat_dec(v) 162#define rzs_stat_dec(v)
205#define rzs_stat64_inc(r, v) 163#define rzs_stat64_inc(r, v)
206#define rzs_stat64_dec(r, v)
207#define rzs_stat64_read(r, v) 164#define rzs_stat64_read(r, v)
208#endif /* CONFIG_RAMZSWAP_STATS */ 165#endif /* CONFIG_RAMZSWAP_STATS */
209 166
diff --git a/drivers/staging/ramzswap/ramzswap_ioctl.h b/drivers/staging/ramzswap/ramzswap_ioctl.h
index d26076d41bde..db94bcb42967 100644
--- a/drivers/staging/ramzswap/ramzswap_ioctl.h
+++ b/drivers/staging/ramzswap/ramzswap_ioctl.h
@@ -15,11 +15,7 @@
15#ifndef _RAMZSWAP_IOCTL_H_ 15#ifndef _RAMZSWAP_IOCTL_H_
16#define _RAMZSWAP_IOCTL_H_ 16#define _RAMZSWAP_IOCTL_H_
17 17
18#define MAX_SWAP_NAME_LEN 128
19
20struct ramzswap_ioctl_stats { 18struct ramzswap_ioctl_stats {
21 char backing_swap_name[MAX_SWAP_NAME_LEN];
22 u64 memlimit; /* only applicable if backing swap present */
23 u64 disksize; /* user specified or equal to backing swap 19 u64 disksize; /* user specified or equal to backing swap
24 * size (if present) */ 20 * size (if present) */
25 u64 num_reads; /* failed + successful */ 21 u64 num_reads; /* failed + successful */
@@ -36,15 +32,11 @@ struct ramzswap_ioctl_stats {
36 u64 orig_data_size; 32 u64 orig_data_size;
37 u64 compr_data_size; 33 u64 compr_data_size;
38 u64 mem_used_total; 34 u64 mem_used_total;
39 u64 bdev_num_reads; /* no. of reads on backing dev */
40 u64 bdev_num_writes; /* no. of writes on backing dev */
41} __attribute__ ((packed, aligned(4))); 35} __attribute__ ((packed, aligned(4)));
42 36
43#define RZSIO_SET_DISKSIZE_KB _IOW('z', 0, size_t) 37#define RZSIO_SET_DISKSIZE_KB _IOW('z', 0, size_t)
44#define RZSIO_SET_MEMLIMIT_KB _IOW('z', 1, size_t) 38#define RZSIO_GET_STATS _IOR('z', 1, struct ramzswap_ioctl_stats)
45#define RZSIO_SET_BACKING_SWAP _IOW('z', 2, unsigned char[MAX_SWAP_NAME_LEN]) 39#define RZSIO_INIT _IO('z', 2)
46#define RZSIO_GET_STATS _IOR('z', 3, struct ramzswap_ioctl_stats) 40#define RZSIO_RESET _IO('z', 3)
47#define RZSIO_INIT _IO('z', 4)
48#define RZSIO_RESET _IO('z', 5)
49 41
50#endif 42#endif
diff --git a/drivers/staging/rar_register/Kconfig b/drivers/staging/rar_register/Kconfig
index 3f73839643e9..e9c27738199b 100644
--- a/drivers/staging/rar_register/Kconfig
+++ b/drivers/staging/rar_register/Kconfig
@@ -8,23 +8,23 @@ menu "RAR Register Driver"
8# 8#
9config RAR_REGISTER 9config RAR_REGISTER
10 tristate "Restricted Access Region Register Driver" 10 tristate "Restricted Access Region Register Driver"
11 depends on PCI
11 default n 12 default n
12 ---help--- 13 ---help---
13 This driver allows other kernel drivers access to the 14 This driver allows other kernel drivers access to the
14 contents of the restricted access region control 15 contents of the restricted access region control registers.
15 registers.
16 16
17 The restricted access region control registers 17 The restricted access region control registers
18 (rar_registers) are used to pass address and 18 (rar_registers) are used to pass address and
19 locking information on restricted access regions 19 locking information on restricted access regions
20 to other drivers that use restricted access regions 20 to other drivers that use restricted access regions.
21 21
22 The restricted access regions are regions of memory 22 The restricted access regions are regions of memory
23 on the Intel MID Platform that are not accessible to 23 on the Intel MID Platform that are not accessible to
24 the x86 processor, but are accessible to dedicated 24 the x86 processor, but are accessible to dedicated
25 processors on board peripheral devices. 25 processors on board peripheral devices.
26 26
27 The purpose of the restricted access regions is to 27 The purpose of the restricted access regions is to
28 protect sensitive data from compromise by unauthorized 28 protect sensitive data from compromise by unauthorized
29 programs running on the x86 processor. 29 programs running on the x86 processor.
30endmenu 30endmenu
diff --git a/drivers/staging/rar_register/rar_register.c b/drivers/staging/rar_register/rar_register.c
index bfc0e31f1a6f..618503f422ef 100644
--- a/drivers/staging/rar_register/rar_register.c
+++ b/drivers/staging/rar_register/rar_register.c
@@ -51,98 +51,159 @@
51#include <linux/kernel.h> 51#include <linux/kernel.h>
52 52
53/* === Lincroft Message Bus Interface === */ 53/* === Lincroft Message Bus Interface === */
54/* Message Control Register */ 54#define LNC_MCR_OFFSET 0xD0 /* Message Control Register */
55#define LNC_MCR_OFFSET 0xD0 55#define LNC_MDR_OFFSET 0xD4 /* Message Data Register */
56
57/* Maximum number of clients (other drivers using this driver) */
58#define MAX_RAR_CLIENTS 10
59
60/* Message Data Register */
61#define LNC_MDR_OFFSET 0xD4
62 56
63/* Message Opcodes */ 57/* Message Opcodes */
64#define LNC_MESSAGE_READ_OPCODE 0xD0 58#define LNC_MESSAGE_READ_OPCODE 0xD0
65#define LNC_MESSAGE_WRITE_OPCODE 0xE0 59#define LNC_MESSAGE_WRITE_OPCODE 0xE0
66 60
67/* Message Write Byte Enables */ 61/* Message Write Byte Enables */
68#define LNC_MESSAGE_BYTE_WRITE_ENABLES 0xF 62#define LNC_MESSAGE_BYTE_WRITE_ENABLES 0xF
69 63
70/* B-unit Port */ 64/* B-unit Port */
71#define LNC_BUNIT_PORT 0x3 65#define LNC_BUNIT_PORT 0x3
72 66
73/* === Lincroft B-Unit Registers - Programmed by IA32 firmware === */ 67/* === Lincroft B-Unit Registers - Programmed by IA32 firmware === */
74#define LNC_BRAR0L 0x10 68#define LNC_BRAR0L 0x10
75#define LNC_BRAR0H 0x11 69#define LNC_BRAR0H 0x11
76#define LNC_BRAR1L 0x12 70#define LNC_BRAR1L 0x12
77#define LNC_BRAR1H 0x13 71#define LNC_BRAR1H 0x13
78
79/* Reserved for SeP */ 72/* Reserved for SeP */
80#define LNC_BRAR2L 0x14 73#define LNC_BRAR2L 0x14
81#define LNC_BRAR2H 0x15 74#define LNC_BRAR2H 0x15
82 75
83/* Moorestown supports three restricted access regions. */ 76/* Moorestown supports three restricted access regions. */
84#define MRST_NUM_RAR 3 77#define MRST_NUM_RAR 3
85 78
86
87/* RAR Bus Address Range */ 79/* RAR Bus Address Range */
88struct RAR_address_range { 80struct rar_addr {
89 dma_addr_t low; 81 dma_addr_t low;
90 dma_addr_t high; 82 dma_addr_t high;
91}; 83};
92 84
93/* Structure containing low and high RAR register offsets. */ 85/*
94struct RAR_offsets { 86 * We create one of these for each RAR
95 u32 low; /* Register offset for low RAR bus address. */ 87 */
96 u32 high; /* Register offset for high RAR bus address. */
97};
98
99struct client { 88struct client {
100 int (*client_callback)(void *client_data); 89 int (*callback)(unsigned long data);
101 void *customer_data; 90 unsigned long driver_priv;
102 int client_called; 91 bool busy;
103 }; 92};
104 93
105static DEFINE_MUTEX(rar_mutex); 94static DEFINE_MUTEX(rar_mutex);
106static DEFINE_MUTEX(lnc_reg_mutex); 95static DEFINE_MUTEX(lnc_reg_mutex);
107 96
108struct RAR_device { 97/*
109 struct RAR_offsets const rar_offsets[MRST_NUM_RAR]; 98 * One per RAR device (currently only one device)
110 struct RAR_address_range rar_addr[MRST_NUM_RAR]; 99 */
100struct rar_device {
101 struct rar_addr rar_addr[MRST_NUM_RAR];
111 struct pci_dev *rar_dev; 102 struct pci_dev *rar_dev;
112 bool registered; 103 bool registered;
113 }; 104 bool allocated;
114 105 struct client client[MRST_NUM_RAR];
115/* this platform has only one rar_device for 3 rar regions */
116static struct RAR_device my_rar_device = {
117 .rar_offsets = {
118 [0].low = LNC_BRAR0L,
119 [0].high = LNC_BRAR0H,
120 [1].low = LNC_BRAR1L,
121 [1].high = LNC_BRAR1H,
122 [2].low = LNC_BRAR2L,
123 [2].high = LNC_BRAR2H
124 }
125}; 106};
126 107
127/* this data is for handling requests from other drivers which arrive 108/* Current platforms have only one rar_device for 3 rar regions */
128 * prior to this driver initializing 109static struct rar_device my_rar_device;
110
111/*
112 * Abstract out multiple device support. Current platforms only
113 * have a single RAR device.
129 */ 114 */
130 115
131static struct client clients[MAX_RAR_CLIENTS]; 116/**
132static int num_clients; 117 * alloc_rar_device - return a new RAR structure
118 *
119 * Return a new (but not yet ready) RAR device object
120 */
121static struct rar_device *alloc_rar_device(void)
122{
123 if (my_rar_device.allocated)
124 return NULL;
125 my_rar_device.allocated = 1;
126 return &my_rar_device;
127}
133 128
134/* 129/**
135 * This function is used to retrieved RAR info using the Lincroft 130 * free_rar_device - free a RAR object
136 * message bus interface. 131 * @rar: the RAR device being freed
132 *
133 * Release a RAR object and any attached resources
137 */ 134 */
138static int retrieve_rar_addr(struct pci_dev *pdev, 135static void free_rar_device(struct rar_device *rar)
139 int offset, 136{
140 dma_addr_t *addr) 137 pci_dev_put(rar->rar_dev);
138 rar->allocated = 0;
139}
140
141/**
142 * _rar_to_device - return the device handling this RAR
143 * @rar: RAR number
144 * @off: returned offset
145 *
146 * Internal helper for looking up RAR devices. This and alloc are the
147 * two functions that need touching to go to multiple RAR devices.
148 */
149static struct rar_device *_rar_to_device(int rar, int *off)
150{
151 if (rar >= 0 && rar <= 3) {
152 *off = rar;
153 return &my_rar_device;
154 }
155 return NULL;
156}
157
158
159/**
160 * rar_to_device - return the device handling this RAR
161 * @rar: RAR number
162 * @off: returned offset
163 *
164 * Return the device this RAR maps to if one is present, otherwise
165 * returns NULL. Reports the offset relative to the base of this
166 * RAR device in off.
167 */
168static struct rar_device *rar_to_device(int rar, int *off)
169{
170 struct rar_device *rar_dev = _rar_to_device(rar, off);
171 if (rar_dev == NULL || !rar_dev->registered)
172 return NULL;
173 return rar_dev;
174}
175
176/**
177 * rar_to_client - return the client handling this RAR
178 * @rar: RAR number
179 *
180 * Return the client this RAR maps to if a mapping is known, otherwise
181 * returns NULL.
182 */
183static struct client *rar_to_client(int rar)
184{
185 int idx;
186 struct rar_device *r = _rar_to_device(rar, &idx);
187 if (r != NULL)
188 return &r->client[idx];
189 return NULL;
190}
191
192/**
193 * rar_read_addr - retrieve a RAR mapping
194 * @pdev: PCI device for the RAR
195 * @offset: offset for message
196 * @addr: returned address
197 *
198 * Reads the address of a given RAR register. Returns 0 on success
199 * or an error code on failure.
200 */
201static int rar_read_addr(struct pci_dev *pdev, int offset, dma_addr_t *addr)
141{ 202{
142 /* 203 /*
143 * ======== The Lincroft Message Bus Interface ======== 204 * ======== The Lincroft Message Bus Interface ========
144 * Lincroft registers may be obtained from the PCI 205 * Lincroft registers may be obtained via PCI from
145 * (the Host Bridge) using the Lincroft Message Bus 206 * the host bridge using the Lincroft Message Bus
146 * Interface. That message bus interface is generally 207 * Interface. That message bus interface is generally
147 * comprised of two registers: a control register (MCR, 0xDO) 208 * comprised of two registers: a control register (MCR, 0xDO)
148 * and a data register (MDR, 0xD4). 209 * and a data register (MDR, 0xD4).
@@ -182,6 +243,7 @@ static int retrieve_rar_addr(struct pci_dev *pdev,
182 */ 243 */
183 244
184 int result; 245 int result;
246 u32 addr32;
185 247
186 /* Construct control message */ 248 /* Construct control message */
187 u32 const message = 249 u32 const message =
@@ -192,11 +254,6 @@ static int retrieve_rar_addr(struct pci_dev *pdev,
192 254
193 dev_dbg(&pdev->dev, "Offset for 'get' LNC MSG is %x\n", offset); 255 dev_dbg(&pdev->dev, "Offset for 'get' LNC MSG is %x\n", offset);
194 256
195 if (addr == 0) {
196 WARN_ON(1);
197 return -EINVAL;
198 }
199
200 /* 257 /*
201 * We synchronize access to the Lincroft MCR and MDR registers 258 * We synchronize access to the Lincroft MCR and MDR registers
202 * until BOTH the command is issued through the MCR register 259 * until BOTH the command is issued through the MCR register
@@ -209,26 +266,25 @@ static int retrieve_rar_addr(struct pci_dev *pdev,
209 266
210 /* Send the control message */ 267 /* Send the control message */
211 result = pci_write_config_dword(pdev, LNC_MCR_OFFSET, message); 268 result = pci_write_config_dword(pdev, LNC_MCR_OFFSET, message);
212
213 dev_dbg(&pdev->dev, "Result from send ctl register is %x\n", result);
214
215 if (!result) { 269 if (!result) {
216 result = pci_read_config_dword(pdev, LNC_MDR_OFFSET, 270 /* Read back the address as a 32bit value */
217 (u32 *)addr); 271 result = pci_read_config_dword(pdev, LNC_MDR_OFFSET, &addr32);
218 dev_dbg(&pdev->dev, 272 *addr = (dma_addr_t)addr32;
219 "Result from read data register is %x\n", result);
220
221 dev_dbg(&pdev->dev,
222 "Value read from data register is %lx\n",
223 (unsigned long)*addr);
224 } 273 }
225
226 mutex_unlock(&lnc_reg_mutex); 274 mutex_unlock(&lnc_reg_mutex);
227
228 return result; 275 return result;
229} 276}
230 277
231static int set_rar_address(struct pci_dev *pdev, 278/**
279 * rar_set_addr - Set a RAR mapping
280 * @pdev: PCI device for the RAR
281 * @offset: offset for message
282 * @addr: address to set
283 *
284 * Sets the address of a given RAR register. Returns 0 on success
285 * or an error code on failure.
286 */
287static int rar_set_addr(struct pci_dev *pdev,
232 int offset, 288 int offset,
233 dma_addr_t addr) 289 dma_addr_t addr)
234{ 290{
@@ -236,11 +292,11 @@ static int set_rar_address(struct pci_dev *pdev,
236 * Data being written to this register must be written before 292 * Data being written to this register must be written before
237 * writing the appropriate control message to the MCR 293 * writing the appropriate control message to the MCR
238 * register. 294 * register.
239 * @note See rar_get_address() for a description of the 295 * See rar_get_addrs() for a description of the
240 * message bus interface being used here. 296 * message bus interface being used here.
241 */ 297 */
242 298
243 int result = 0; 299 int result;
244 300
245 /* Construct control message */ 301 /* Construct control message */
246 u32 const message = (LNC_MESSAGE_WRITE_OPCODE << 24) 302 u32 const message = (LNC_MESSAGE_WRITE_OPCODE << 24)
@@ -248,13 +304,6 @@ static int set_rar_address(struct pci_dev *pdev,
248 | (offset << 8) 304 | (offset << 8)
249 | (LNC_MESSAGE_BYTE_WRITE_ENABLES << 4); 305 | (LNC_MESSAGE_BYTE_WRITE_ENABLES << 4);
250 306
251 if (addr == 0) {
252 WARN_ON(1);
253 return -EINVAL;
254 }
255
256 dev_dbg(&pdev->dev, "Offset for 'set' LNC MSG is %x\n", offset);
257
258 /* 307 /*
259 * We synchronize access to the Lincroft MCR and MDR registers 308 * We synchronize access to the Lincroft MCR and MDR registers
260 * until BOTH the command is issued through the MCR register 309 * until BOTH the command is issued through the MCR register
@@ -267,32 +316,27 @@ static int set_rar_address(struct pci_dev *pdev,
267 316
268 /* Send the control message */ 317 /* Send the control message */
269 result = pci_write_config_dword(pdev, LNC_MDR_OFFSET, addr); 318 result = pci_write_config_dword(pdev, LNC_MDR_OFFSET, addr);
270 319 if (!result)
271 dev_dbg(&pdev->dev, "Result from write data register is %x\n", result); 320 /* And address */
272
273 if (!result) {
274 dev_dbg(&pdev->dev,
275 "Value written to data register is %lx\n",
276 (unsigned long)addr);
277
278 result = pci_write_config_dword(pdev, LNC_MCR_OFFSET, message); 321 result = pci_write_config_dword(pdev, LNC_MCR_OFFSET, message);
279 322
280 dev_dbg(&pdev->dev, "Result from send ctl register is %x\n",
281 result);
282 }
283
284 mutex_unlock(&lnc_reg_mutex); 323 mutex_unlock(&lnc_reg_mutex);
285
286 return result; 324 return result;
287} 325}
288 326
289/* 327/*
290* Initialize RAR parameters, such as bus addresses, etc. 328 * rar_init_params - Initialize RAR parameters
291*/ 329 * @rar: RAR device to initialise
292static int init_rar_params(struct pci_dev *pdev) 330 *
331 * Initialize RAR parameters, such as bus addresses, etc. Returns 0
332 * on success, or an error code on failure.
333 */
334static int init_rar_params(struct rar_device *rar)
293{ 335{
336 struct pci_dev *pdev = rar->rar_dev;
294 unsigned int i; 337 unsigned int i;
295 int result = 0; 338 int result = 0;
339 int offset = 0x10; /* RAR 0 to 2 in order low/high/low/high/... */
296 340
297 /* Retrieve RAR start and end bus addresses. 341 /* Retrieve RAR start and end bus addresses.
298 * Access the RAR registers through the Lincroft Message Bus 342 * Access the RAR registers through the Lincroft Message Bus
@@ -300,15 +344,16 @@ static int init_rar_params(struct pci_dev *pdev)
300 */ 344 */
301 345
302 for (i = 0; i < MRST_NUM_RAR; ++i) { 346 for (i = 0; i < MRST_NUM_RAR; ++i) {
303 struct RAR_offsets const *offset = 347 struct rar_addr *addr = &rar->rar_addr[i];
304 &my_rar_device.rar_offsets[i]; 348
305 struct RAR_address_range *addr = &my_rar_device.rar_addr[i]; 349 result = rar_read_addr(pdev, offset++, &addr->low);
306 350 if (result != 0)
307 if ((retrieve_rar_addr(pdev, offset->low, &addr->low) != 0) 351 return result;
308 || (retrieve_rar_addr(pdev, offset->high, &addr->high) != 0)) { 352
309 result = -1; 353 result = rar_read_addr(pdev, offset++, &addr->high);
310 break; 354 if (result != 0)
311 } 355 return result;
356
312 357
313 /* 358 /*
314 * Only the upper 22 bits of the RAR addresses are 359 * Only the upper 22 bits of the RAR addresses are
@@ -336,201 +381,237 @@ static int init_rar_params(struct pci_dev *pdev)
336 /* Done accessing the device. */ 381 /* Done accessing the device. */
337 382
338 if (result == 0) { 383 if (result == 0) {
339 int z; 384 for (i = 0; i != MRST_NUM_RAR; ++i) {
340 for (z = 0; z != MRST_NUM_RAR; ++z) {
341 /* 385 /*
342 * "BRAR" refers to the RAR registers in the 386 * "BRAR" refers to the RAR registers in the
343 * Lincroft B-unit. 387 * Lincroft B-unit.
344 */ 388 */
345 dev_info(&pdev->dev, "BRAR[%u] bus address range = " 389 dev_info(&pdev->dev, "BRAR[%u] bus address range = "
346 "[%lx, %lx]\n", z, 390 "[%lx, %lx]\n", i,
347 (unsigned long)my_rar_device.rar_addr[z].low, 391 (unsigned long)rar->rar_addr[i].low,
348 (unsigned long)my_rar_device.rar_addr[z].high); 392 (unsigned long)rar->rar_addr[i].high);
349 } 393 }
350 } 394 }
351
352 return result; 395 return result;
353} 396}
354 397
355/* 398/**
356 * The rar_get_address function is used by other device drivers 399 * rar_get_address - get the bus address in a RAR
357 * to obtain RAR address information on a RAR. It takes three 400 * @start: return value of start address of block
358 * parameters: 401 * @end: return value of end address of block
359 * 402 *
360 * int rar_index 403 * The rar_get_address function is used by other device drivers
361 * The rar_index is an index to the rar for which you wish to retrieve 404 * to obtain RAR address information on a RAR. It takes three
362 * the address information. 405 * parameters:
363 * Values can be 0,1, or 2.
364 * 406 *
365 * The function returns a 0 upon success or a -1 if there is no RAR 407 * The function returns a 0 upon success or an error if there is no RAR
366 * facility on this system. 408 * facility on this system.
367 */ 409 */
368int rar_get_address(int rar_index, 410int rar_get_address(int rar_index, dma_addr_t *start, dma_addr_t *end)
369 dma_addr_t *start_address,
370 dma_addr_t *end_address)
371{ 411{
372 int result = -ENODEV; 412 int idx;
373 413 struct rar_device *rar = rar_to_device(rar_index, &idx);
374 if (my_rar_device.registered) { 414
375 if (start_address == 0 || end_address == 0 415 if (rar == NULL) {
376 || rar_index >= MRST_NUM_RAR || rar_index < 0) { 416 WARN_ON(1);
377 result = -EINVAL; 417 return -ENODEV;
378 } else {
379 *start_address =
380 my_rar_device.rar_addr[rar_index].low;
381 *end_address =
382 my_rar_device.rar_addr[rar_index].high;
383
384 result = 0;
385 }
386 } 418 }
387 419
388 return result; 420 *start = rar->rar_addr[idx].low;
421 *end = rar->rar_addr[idx].high;
422 return 0;
389} 423}
390EXPORT_SYMBOL(rar_get_address); 424EXPORT_SYMBOL(rar_get_address);
391 425
392/* 426/**
393 * The rar_lock function is ued by other device drivers to lock an RAR. 427 * rar_lock - lock a RAR register
394 * once an RAR is locked, it stays locked until the next system reboot. 428 * @rar_index: RAR to lock (0-2)
395 * The function takes one parameter:
396 * 429 *
397 * int rar_index 430 * The rar_lock function is ued by other device drivers to lock an RAR.
398 * The rar_index is an index to the rar that you want to lock. 431 * once a RAR is locked, it stays locked until the next system reboot.
399 * Values can be 0,1, or 2.
400 * 432 *
401 * The function returns a 0 upon success or a -1 if there is no RAR 433 * The function returns a 0 upon success or an error if there is no RAR
402 * facility on this system. 434 * facility on this system, or the locking fails
403 */ 435 */
404int rar_lock(int rar_index) 436int rar_lock(int rar_index)
405{ 437{
406 int result = -ENODEV; 438 struct rar_device *rar;
407 439 int result;
408 if (rar_index >= MRST_NUM_RAR || rar_index < 0) { 440 int idx;
409 result = -EINVAL; 441 dma_addr_t low, high;
410 return result;
411 }
412
413 dev_dbg(&my_rar_device.rar_dev->dev, "rar_lock mutex locking\n");
414 mutex_lock(&rar_mutex);
415 442
416 if (my_rar_device.registered) { 443 rar = rar_to_device(rar_index, &idx);
417 444
418 dma_addr_t low = my_rar_device.rar_addr[rar_index].low & 445 if (rar == NULL) {
419 0xfffffc00u; 446 WARN_ON(1);
447 return -EINVAL;
448 }
420 449
421 dma_addr_t high = my_rar_device.rar_addr[rar_index].high & 450 low = rar->rar_addr[idx].low & 0xfffffc00u;
422 0xfffffc00u; 451 high = rar->rar_addr[idx].high & 0xfffffc00u;
423 452
424 /* 453 /*
425 * Only allow I/O from the graphics and Langwell; 454 * Only allow I/O from the graphics and Langwell;
426 * Not from the x96 processor 455 * not from the x86 processor
427 */ 456 */
428 if (rar_index == (int)RAR_TYPE_VIDEO) {
429 low |= 0x00000009;
430 high |= 0x00000015;
431 }
432 457
433 else if (rar_index == (int)RAR_TYPE_AUDIO) { 458 if (rar_index == RAR_TYPE_VIDEO) {
434 /* Only allow I/O from Langwell; nothing from x86 */ 459 low |= 0x00000009;
435 low |= 0x00000008; 460 high |= 0x00000015;
436 high |= 0x00000018; 461 } else if (rar_index == RAR_TYPE_AUDIO) {
437 } 462 /* Only allow I/O from Langwell; nothing from x86 */
463 low |= 0x00000008;
464 high |= 0x00000018;
465 } else
466 /* Read-only from all agents */
467 high |= 0x00000018;
438 468
439 else 469 /*
440 /* Read-only from all agents */ 470 * Now program the register using the Lincroft message
441 high |= 0x00000018; 471 * bus interface.
472 */
473 result = rar_set_addr(rar->rar_dev,
474 2 * idx, low);
442 475
443 /* 476 if (result == 0)
444 * Now program the register using the Lincroft message 477 result = rar_set_addr(rar->rar_dev,
445 * bus interface. 478 2 * idx + 1, high);
446 */
447 result = set_rar_address(my_rar_device.rar_dev,
448 my_rar_device.rar_offsets[rar_index].low,
449 low);
450
451 if (result == 0)
452 result = set_rar_address(
453 my_rar_device.rar_dev,
454 my_rar_device.rar_offsets[rar_index].high,
455 high);
456 }
457 479
458 dev_dbg(&my_rar_device.rar_dev->dev, "rar_lock mutex unlocking\n");
459 mutex_unlock(&rar_mutex);
460 return result; 480 return result;
461} 481}
462EXPORT_SYMBOL(rar_lock); 482EXPORT_SYMBOL(rar_lock);
463 483
464/* The register_rar function is to used by other device drivers 484/**
465 * to ensure that this driver is ready. As we cannot be sure of 485 * register_rar - register a RAR handler
466 * the compile/execute order of dirvers in ther kernel, it is 486 * @num: RAR we wish to register for
467 * best to give this driver a callback function to call when 487 * @callback: function to call when RAR support is available
468 * it is ready to give out addresses. The callback function 488 * @data: data to pass to this function
469 * would have those steps that continue the initialization of 489 *
470 * a driver that do require a valid RAR address. One of those 490 * The register_rar function is to used by other device drivers
471 * steps would be to call rar_get_address() 491 * to ensure that this driver is ready. As we cannot be sure of
472 * This function return 0 on success an -1 on failure. 492 * the compile/execute order of drivers in ther kernel, it is
473*/ 493 * best to give this driver a callback function to call when
474int register_rar(int (*callback)(void *yourparameter), void *yourparameter) 494 * it is ready to give out addresses. The callback function
495 * would have those steps that continue the initialization of
496 * a driver that do require a valid RAR address. One of those
497 * steps would be to call rar_get_address()
498 *
499 * This function return 0 on success an error code on failure.
500 */
501int register_rar(int num, int (*callback)(unsigned long data),
502 unsigned long data)
475{ 503{
476 504 /* For now we hardcode a single RAR device */
477 int result = -ENODEV; 505 struct rar_device *rar;
478 506 struct client *c;
479 if (callback == NULL) 507 int idx;
480 return -EINVAL; 508 int retval = 0;
481 509
482 mutex_lock(&rar_mutex); 510 mutex_lock(&rar_mutex);
483 511
484 if (my_rar_device.registered) { 512 /* Do we have a client mapping for this RAR number ? */
513 c = rar_to_client(num);
514 if (c == NULL) {
515 retval = -ERANGE;
516 goto done;
517 }
518 /* Is it claimed ? */
519 if (c->busy) {
520 retval = -EBUSY;
521 goto done;
522 }
523 c->busy = 1;
524
525 /* See if we have a handler for this RAR yet, if we do then fire it */
526 rar = rar_to_device(num, &idx);
485 527
486 mutex_unlock(&rar_mutex); 528 if (rar) {
487 /* 529 /*
488 * if the driver already registered, then we can simply 530 * if the driver already registered, then we can simply
489 * call the callback right now 531 * call the callback right now
490 */ 532 */
491 533 (*callback)(data);
492 return (*callback)(yourparameter); 534 goto done;
493 }
494
495 if (num_clients < MRST_NUM_RAR) {
496
497 clients[num_clients].client_callback = callback;
498 clients[num_clients].customer_data = yourparameter;
499 num_clients += 1;
500 result = 0;
501 } 535 }
502 536
537 /* Arrange to be called back when the hardware is found */
538 c->callback = callback;
539 c->driver_priv = data;
540done:
503 mutex_unlock(&rar_mutex); 541 mutex_unlock(&rar_mutex);
504 return result; 542 return retval;
505
506} 543}
507EXPORT_SYMBOL(register_rar); 544EXPORT_SYMBOL(register_rar);
508 545
509/* Suspend - returns -ENOSYS */ 546/**
510static int rar_suspend(struct pci_dev *dev, pm_message_t state) 547 * unregister_rar - release a RAR allocation
548 * @num: RAR number
549 *
550 * Releases a RAR allocation, or pending allocation. If a callback is
551 * pending then this function will either complete before the unregister
552 * returns or not at all.
553 */
554
555void unregister_rar(int num)
511{ 556{
512 return -ENOSYS; 557 struct client *c;
558
559 mutex_lock(&rar_mutex);
560 c = rar_to_client(num);
561 if (c == NULL || !c->busy)
562 WARN_ON(1);
563 else
564 c->busy = 0;
565 mutex_unlock(&rar_mutex);
513} 566}
567EXPORT_SYMBOL(unregister_rar);
514 568
515static int rar_resume(struct pci_dev *dev) 569/**
570 * rar_callback - Process callbacks
571 * @rar: new RAR device
572 *
573 * Process the callbacks for a newly found RAR device.
574 */
575
576static void rar_callback(struct rar_device *rar)
516{ 577{
517 return -ENOSYS; 578 struct client *c = &rar->client[0];
579 int i;
580
581 mutex_lock(&rar_mutex);
582
583 rar->registered = 1; /* Ensure no more callbacks queue */
584
585 for (i = 0; i < MRST_NUM_RAR; i++) {
586 if (c->callback && c->busy) {
587 c->callback(c->driver_priv);
588 c->callback = NULL;
589 }
590 c++;
591 }
592 mutex_unlock(&rar_mutex);
518} 593}
519 594
520/* 595/**
521 * This function registers the driver with the device subsystem ( 596 * rar_probe - PCI probe callback
522 * either PCI, USB, etc). 597 * @dev: PCI device
523 * Function that is activaed on the succesful probe of the RAR device 598 * @id: matching entry in the match table
524 * (Moorestown host controller). 599 *
600 * A RAR device has been discovered. Initialise it and if successful
601 * process any pending callbacks that can now be completed.
525 */ 602 */
526static int rar_probe(struct pci_dev *dev, const struct pci_device_id *id) 603static int rar_probe(struct pci_dev *dev, const struct pci_device_id *id)
527{ 604{
528 int error; 605 int error;
529 int counter; 606 struct rar_device *rar;
530 607
531 dev_dbg(&dev->dev, "PCI probe starting\n"); 608 dev_dbg(&dev->dev, "PCI probe starting\n");
532 609
533 /* enable the device */ 610 rar = alloc_rar_device();
611 if (rar == NULL)
612 return -EBUSY;
613
614 /* Enable the device */
534 error = pci_enable_device(dev); 615 error = pci_enable_device(dev);
535 if (error) { 616 if (error) {
536 dev_err(&dev->dev, 617 dev_err(&dev->dev,
@@ -538,50 +619,30 @@ static int rar_probe(struct pci_dev *dev, const struct pci_device_id *id)
538 goto end_function; 619 goto end_function;
539 } 620 }
540 621
541 /* we have only one device; fill in the rar_device structure */ 622 /* Fill in the rar_device structure */
542 my_rar_device.rar_dev = dev; 623 rar->rar_dev = pci_dev_get(dev);
624 pci_set_drvdata(dev, rar);
543 625
544 /* 626 /*
545 * Initialize the RAR parameters, which have to be retrieved 627 * Initialize the RAR parameters, which have to be retrieved
546 * via the message bus interface. 628 * via the message bus interface.
547 */ 629 */
548 error = init_rar_params(dev); 630 error = init_rar_params(rar);
549 if (error) { 631 if (error) {
550 pci_disable_device(dev); 632 pci_disable_device(dev);
551 633 dev_err(&dev->dev, "Error retrieving RAR addresses\n");
552 dev_err(&dev->dev,
553 "Error retrieving RAR addresses\n");
554
555 goto end_function; 634 goto end_function;
556 } 635 }
557
558 dev_dbg(&dev->dev, "PCI probe locking\n");
559 mutex_lock(&rar_mutex);
560 my_rar_device.registered = 1;
561
562 /* now call anyone who has registered (using callbacks) */ 636 /* now call anyone who has registered (using callbacks) */
563 for (counter = 0; counter < num_clients; counter += 1) { 637 rar_callback(rar);
564 if (clients[counter].client_callback) { 638 return 0;
565 error = (*clients[counter].client_callback)(
566 clients[counter].customer_data);
567 /* set callback to NULL to indicate it has been done */
568 clients[counter].client_callback = NULL;
569 dev_dbg(&my_rar_device.rar_dev->dev,
570 "Callback called for %d\n",
571 counter);
572 }
573 }
574
575 dev_dbg(&dev->dev, "PCI probe unlocking\n");
576 mutex_unlock(&rar_mutex);
577
578end_function: 639end_function:
579 640 free_rar_device(rar);
580 return error; 641 return error;
581} 642}
582 643
583const struct pci_device_id rar_pci_id_tbl[] = { 644const struct pci_device_id rar_pci_id_tbl[] = {
584 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_RAR_DEVICE_ID) }, 645 { PCI_VDEVICE(INTEL, 0x4110) },
585 { 0 } 646 { 0 }
586}; 647};
587 648
@@ -594,8 +655,7 @@ static struct pci_driver rar_pci_driver = {
594 .name = "rar_register_driver", 655 .name = "rar_register_driver",
595 .id_table = rar_pci_id_tbl, 656 .id_table = rar_pci_id_tbl,
596 .probe = rar_probe, 657 .probe = rar_probe,
597 .suspend = rar_suspend, 658 /* Cannot be unplugged - no remove */
598 .resume = rar_resume
599}; 659};
600 660
601static int __init rar_init_handler(void) 661static int __init rar_init_handler(void)
diff --git a/drivers/staging/rar_register/rar_register.h b/drivers/staging/rar_register/rar_register.h
index 29ade0f361d2..ffa805780f85 100644
--- a/drivers/staging/rar_register/rar_register.h
+++ b/drivers/staging/rar_register/rar_register.h
@@ -21,63 +21,23 @@
21#ifndef _RAR_REGISTER_H 21#ifndef _RAR_REGISTER_H
22#define _RAR_REGISTER_H 22#define _RAR_REGISTER_H
23 23
24# include <linux/types.h> 24#include <linux/types.h>
25 25
26/* following are used both in drivers as well as user space apps */ 26/* following are used both in drivers as well as user space apps */
27enum RAR_type {
28 RAR_TYPE_VIDEO = 0,
29 RAR_TYPE_AUDIO,
30 RAR_TYPE_IMAGE,
31 RAR_TYPE_DATA
32};
33 27
34#ifdef __KERNEL__ 28#define RAR_TYPE_VIDEO 0
29#define RAR_TYPE_AUDIO 1
30#define RAR_TYPE_IMAGE 2
31#define RAR_TYPE_DATA 3
35 32
36/* PCI device id for controller */ 33#ifdef __KERNEL__
37#define PCI_RAR_DEVICE_ID 0x4110
38 34
39/* The register_rar function is to used by other device drivers 35struct rar_device;
40 * to ensure that this driver is ready. As we cannot be sure of
41 * the compile/execute order of dirvers in ther kernel, it is
42 * best to give this driver a callback function to call when
43 * it is ready to give out addresses. The callback function
44 * would have those steps that continue the initialization of
45 * a driver that do require a valid RAR address. One of those
46 * steps would be to call get_rar_address()
47 * This function return 0 on success an -1 on failure.
48 */
49int register_rar(int (*callback)(void *yourparameter), void *yourparameter);
50 36
51/* The get_rar_address function is used by other device drivers 37int register_rar(int num,
52 * to obtain RAR address information on a RAR. It takes two 38 int (*callback)(unsigned long data), unsigned long data);
53 * parameter: 39void unregister_rar(int num);
54 * 40int rar_get_address(int rar_index, dma_addr_t *start, dma_addr_t *end);
55 * int rar_index
56 * The rar_index is an index to the rar for which you wish to retrieve
57 * the address information.
58 * Values can be 0,1, or 2.
59 *
60 * struct RAR_address_struct is a pointer to a place to which the function
61 * can return the address structure for the RAR.
62 *
63 * The function returns a 0 upon success or a -1 if there is no RAR
64 * facility on this system.
65 */
66int rar_get_address(int rar_index,
67 dma_addr_t *start_address,
68 dma_addr_t *end_address);
69
70/* The lock_rar function is ued by other device drivers to lock an RAR.
71 * once an RAR is locked, it stays locked until the next system reboot.
72 * The function takes one parameter:
73 *
74 * int rar_index
75 * The rar_index is an index to the rar that you want to lock.
76 * Values can be 0,1, or 2.
77 *
78 * The function returns a 0 upon success or a -1 if there is no RAR
79 * facility on this system.
80 */
81int rar_lock(int rar_index); 41int rar_lock(int rar_index);
82 42
83#endif /* __KERNEL__ */ 43#endif /* __KERNEL__ */
diff --git a/drivers/staging/rt2860/chip/mac_pci.h b/drivers/staging/rt2860/chip/mac_pci.h
index bc704acaa3d7..9f25ef047f59 100644
--- a/drivers/staging/rt2860/chip/mac_pci.h
+++ b/drivers/staging/rt2860/chip/mac_pci.h
@@ -147,13 +147,12 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
147 147
148/* ----------------- Frimware Related MACRO ----------------- */ 148/* ----------------- Frimware Related MACRO ----------------- */
149#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \ 149#define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
150 do{ \ 150 do { \
151 unsigned long _i, _firm; \ 151 unsigned long _i, _firm; \
152 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x10000); \ 152 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x10000); \
153 \ 153 \
154 for(_i=0; _i<_FwLen; _i+=4) \ 154 for (_i = 0; _i < _FwLen; _i += 4) { \
155 { \ 155 _firm = _pFwImage[_i] + \
156 _firm = _pFwImage[_i] + \
157 (_pFwImage[_i+3] << 24) + \ 156 (_pFwImage[_i+3] << 24) + \
158 (_pFwImage[_i+2] << 16) + \ 157 (_pFwImage[_i+2] << 16) + \
159 (_pFwImage[_i+1] << 8); \ 158 (_pFwImage[_i+1] << 8); \
@@ -165,19 +164,19 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
165 /* initialize BBP R/W access agent */ \ 164 /* initialize BBP R/W access agent */ \
166 RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, 0); \ 165 RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, 0); \
167 RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \ 166 RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \
168 }while(0) 167 } while (0)
169 168
170/* ----------------- TX Related MACRO ----------------- */ 169/* ----------------- TX Related MACRO ----------------- */
171#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0) 170#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) do {} while (0)
172#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0) 171#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do {} while (0)
173 172
174#define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \ 173#define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
175 ((freeNum) >= (unsigned long)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */ 174 ((freeNum) >= (unsigned long)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */
176#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \ 175#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) do {} while (0)
177 do{}while(0)
178 176
179#define NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, freeNum, _TxFrameType) \ 177#define NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, freeNum, _TxFrameType) \
180 (((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3)) 178 (((freeNum != (TX_RING_SIZE-1)) && \
179 (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum < 3))
181 180
182#define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \ 181#define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \
183 RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) 182 RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
@@ -185,19 +184,19 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
185#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \ 184#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
186 /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) */ 185 /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) */
187 186
188#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \ 187#define HAL_WriteTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
189 RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) 188 RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
190 189
191#define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \ 190#define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
192 RtmpPCI_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) 191 RtmpPCI_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
193 192
194#define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber) \ 193#define HAL_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber) \
195 RtmpPCI_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber) 194 RtmpPCI_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber)
196 195
197#define HAL_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) \ 196#define HAL_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) \
198 RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) 197 RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)
199 198
200#define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \ 199#define HAL_LastTxIdx(_pAd, _QueIdx, _LastTxIdx) \
201 /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx) */ 200 /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx) */
202 201
203#define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \ 202#define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \
@@ -259,24 +258,24 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
259 258
260/* Insert the BA bitmap to ASIC for the Wcid entry */ 259/* Insert the BA bitmap to ASIC for the Wcid entry */
261#define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \ 260#define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
262 do{ \ 261 do { \
263 u32 _Value = 0, _Offset; \ 262 u32 _Value = 0, _Offset; \
264 _Offset = MAC_WCID_BASE + (_Aid) * HW_WCID_ENTRY_SIZE + 4; \ 263 _Offset = MAC_WCID_BASE + (_Aid) * HW_WCID_ENTRY_SIZE + 4; \
265 RTMP_IO_READ32((_pAd), _Offset, &_Value);\ 264 RTMP_IO_READ32((_pAd), _Offset, &_Value);\
266 _Value |= (0x10000<<(_TID)); \ 265 _Value |= (0x10000<<(_TID)); \
267 RTMP_IO_WRITE32((_pAd), _Offset, _Value);\ 266 RTMP_IO_WRITE32((_pAd), _Offset, _Value);\
268 }while(0) 267 } while (0)
269 268
270/* Remove the BA bitmap from ASIC for the Wcid entry */ 269/* Remove the BA bitmap from ASIC for the Wcid entry */
271/* bitmap field starts at 0x10000 in ASIC WCID table */ 270/* bitmap field starts at 0x10000 in ASIC WCID table */
272#define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \ 271#define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
273 do{ \ 272 do { \
274 u32 _Value = 0, _Offset; \ 273 u32 _Value = 0, _Offset; \
275 _Offset = MAC_WCID_BASE + (_Wcid) * HW_WCID_ENTRY_SIZE + 4; \ 274 _Offset = MAC_WCID_BASE + (_Wcid) * HW_WCID_ENTRY_SIZE + 4; \
276 RTMP_IO_READ32((_pAd), _Offset, &_Value); \ 275 RTMP_IO_READ32((_pAd), _Offset, &_Value); \
277 _Value &= (~(0x10000 << (_TID))); \ 276 _Value &= (~(0x10000 << (_TID))); \
278 RTMP_IO_WRITE32((_pAd), _Offset, _Value); \ 277 RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
279 }while(0) 278 } while (0)
280 279
281/* ----------------- Interface Related MACRO ----------------- */ 280/* ----------------- Interface Related MACRO ----------------- */
282 281
@@ -285,16 +284,16 @@ typedef union _TX_ATTENUATION_CTRL_STRUC {
285/* Since it use ADAPTER structure, it have to be put after structure definition. */ 284/* Since it use ADAPTER structure, it have to be put after structure definition. */
286/* */ 285/* */
287#define RTMP_ASIC_INTERRUPT_DISABLE(_pAd) \ 286#define RTMP_ASIC_INTERRUPT_DISABLE(_pAd) \
288 do{ \ 287 do { \
289 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, 0x0); /* 0: disable */ \ 288 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, 0x0); /* 0: disable */ \
290 RTMP_CLEAR_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \ 289 RTMP_CLEAR_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \
291 }while(0) 290 } while (0)
292 291
293#define RTMP_ASIC_INTERRUPT_ENABLE(_pAd)\ 292#define RTMP_ASIC_INTERRUPT_ENABLE(_pAd)\
294 do{ \ 293 do { \
295 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, (_pAd)->int_enable_reg /*DELAYINTMASK*/); /* 1:enable */ \ 294 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, (_pAd)->int_enable_reg /*DELAYINTMASK*/); /* 1:enable */ \
296 RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \ 295 RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \
297 }while(0) 296 } while (0)
298 297
299#define RTMP_IRQ_INIT(pAd) \ 298#define RTMP_IRQ_INIT(pAd) \
300 { pAd->int_enable_reg = ((DELAYINTMASK) | \ 299 { pAd->int_enable_reg = ((DELAYINTMASK) | \
diff --git a/drivers/staging/rt2860/chip/mac_usb.h b/drivers/staging/rt2860/chip/mac_usb.h
index 0b67c0b1de03..ed0c0b43b05e 100644
--- a/drivers/staging/rt2860/chip/mac_usb.h
+++ b/drivers/staging/rt2860/chip/mac_usb.h
@@ -25,7 +25,7 @@
25 ************************************************************************* 25 *************************************************************************
26 26
27 Module Name: 27 Module Name:
28 mac_usb.h 28 mac_usb.h
29 29
30 Abstract: 30 Abstract:
31 31
@@ -46,7 +46,7 @@
46#define USB_CYC_CFG 0x02a4 46#define USB_CYC_CFG 0x02a4
47 47
48#define BEACON_RING_SIZE 2 48#define BEACON_RING_SIZE 2
49#define MGMTPIPEIDX 0 /* EP6 is highest priority */ 49#define MGMTPIPEIDX 0 /* EP6 is highest priority */
50 50
51#define RTMP_PKT_TAIL_PADDING 11 /* 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding) */ 51#define RTMP_PKT_TAIL_PADDING 11 /* 3(max 4 byte padding) + 4 (last packet padding) + 4 (MaxBulkOutsize align padding) */
52 52
@@ -220,53 +220,51 @@ struct rt_rx_context {
220 220
221******************************************************************************/ 221******************************************************************************/
222#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) \ 222#define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) \
223 do{ \ 223 do { \
224 RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \ 224 RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \
225 if (pAd->DeQueueRunning[QueIdx]) \ 225 if (pAd->DeQueueRunning[QueIdx]) { \
226 { \ 226 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \
227 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);\
228 DBGPRINT(RT_DEBUG_OFF, ("DeQueueRunning[%d]= TRUE!\n", QueIdx)); \ 227 DBGPRINT(RT_DEBUG_OFF, ("DeQueueRunning[%d]= TRUE!\n", QueIdx)); \
229 continue; \ 228 continue; \
230 } \ 229 } else { \
231 else \
232 { \
233 pAd->DeQueueRunning[QueIdx] = TRUE; \ 230 pAd->DeQueueRunning[QueIdx] = TRUE; \
234 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);\ 231 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags);\
235 } \ 232 } \
236 }while(0) 233 } while (0)
237 234
238#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) \ 235#define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) \
239 do{ \ 236 do { \
240 RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \ 237 RTMP_IRQ_LOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \
241 pAd->DeQueueRunning[QueIdx] = FALSE; \ 238 pAd->DeQueueRunning[QueIdx] = FALSE; \
242 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \ 239 RTMP_IRQ_UNLOCK(&pAd->DeQueueLock[QueIdx], irqFlags); \
243 }while(0) 240 } while (0)
244 241
245#define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \ 242#define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
246 (RTUSBFreeDescriptorRequest(pAd, pTxBlk->QueIdx, (pTxBlk->TotalFrameLen + GET_OS_PKT_LEN(pPacket))) == NDIS_STATUS_SUCCESS) 243 (RTUSBFreeDescriptorRequest(pAd, pTxBlk->QueIdx, (pTxBlk->TotalFrameLen + GET_OS_PKT_LEN(pPacket))) == NDIS_STATUS_SUCCESS)
247 244
248#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \ 245#define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
249 do{}while(0) 246 do {} while (0)
250 247
251#define NEED_QUEUE_BACK_FOR_AGG(_pAd, _QueIdx, _freeNum, _TxFrameType) \ 248#define NEED_QUEUE_BACK_FOR_AGG(_pAd, _QueIdx, _freeNum, _TxFrameType) \
252 ((_TxFrameType == TX_RALINK_FRAME) && (RTUSBNeedQueueBackForAgg(_pAd, _QueIdx))) 249 ((_TxFrameType == TX_RALINK_FRAME) && \
250 (RTUSBNeedQueueBackForAgg(_pAd, _QueIdx)))
253 251
254#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \ 252#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
255 RtmpUSB_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) 253 RtmpUSB_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
256 254
257#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \ 255#define HAL_WriteTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
258 RtmpUSB_WriteSingleTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) 256 RtmpUSB_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
259 257
260#define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \ 258#define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
261 RtmpUSB_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) 259 RtmpUSB_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
262 260
263#define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber) \ 261#define HAL_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber) \
264 RtmpUSB_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber) 262 RtmpUSB_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber)
265 263
266#define HAL_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx) \ 264#define HAL_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx) \
267 RtmpUSB_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx) 265 RtmpUSB_FinalWriteTxResource(pAd, pTxBlk, totalMPDUSize, TxIdx)
268 266
269#define HAL_LastTxIdx(pAd, QueIdx,TxIdx) \ 267#define HAL_LastTxIdx(pAd, QueIdx, TxIdx) \
270 /*RtmpUSBDataLastTxIdx(pAd, QueIdx,TxIdx) */ 268 /*RtmpUSBDataLastTxIdx(pAd, QueIdx,TxIdx) */
271 269
272#define HAL_KickOutTx(pAd, pTxBlk, QueIdx) \ 270#define HAL_KickOutTx(pAd, pTxBlk, QueIdx) \
@@ -286,8 +284,8 @@ struct rt_rx_context {
286/* 284/*
287 * Device Hardware Interface Related MACRO 285 * Device Hardware Interface Related MACRO
288 */ 286 */
289#define RTMP_IRQ_INIT(pAd) do{}while(0) 287#define RTMP_IRQ_INIT(pAd) do {} while (0)
290#define RTMP_IRQ_ENABLE(pAd) do{}while(0) 288#define RTMP_IRQ_ENABLE(pAd) do {} while (0)
291 289
292/* 290/*
293 * MLME Related MACRO 291 * MLME Related MACRO
@@ -305,8 +303,8 @@ struct rt_rx_context {
305 RTUSBMlmeUp(pAd); } 303 RTUSBMlmeUp(pAd); }
306 304
307#define RTMP_MLME_RESET_STATE_MACHINE(pAd) \ 305#define RTMP_MLME_RESET_STATE_MACHINE(pAd) \
308 MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_RESET_CONF, 0, NULL); \ 306 { MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_RESET_CONF, 0, NULL); \
309 RTUSBMlmeUp(pAd); 307 RTUSBMlmeUp(pAd); }
310 308
311#define RTMP_HANDLE_COUNTER_MEASURE(_pAd, _pEntry) \ 309#define RTMP_HANDLE_COUNTER_MEASURE(_pAd, _pEntry) \
312 { RTUSBEnqueueInternalCmd(_pAd, CMDTHREAD_802_11_COUNTER_MEASURE, _pEntry, sizeof(struct rt_mac_table_entry)); \ 310 { RTUSBEnqueueInternalCmd(_pAd, CMDTHREAD_802_11_COUNTER_MEASURE, _pEntry, sizeof(struct rt_mac_table_entry)); \
@@ -330,12 +328,11 @@ struct rt_rx_context {
330 {\ 328 {\
331 if ((_pAd)->StaCfg.WindowsPowerMode == Ndis802_11PowerModeFast_PSP) \ 329 if ((_pAd)->StaCfg.WindowsPowerMode == Ndis802_11PowerModeFast_PSP) \
332 MlmeSetPsmBit(_pAd, _val);\ 330 MlmeSetPsmBit(_pAd, _val);\
333 else \ 331 else { \
334 { \
335 u16 _psm_val; \ 332 u16 _psm_val; \
336 _psm_val = _val; \ 333 _psm_val = _val; \
337 RTUSBEnqueueInternalCmd(_pAd, CMDTHREAD_SET_PSM_BIT, &(_psm_val), sizeof(u16)); \ 334 RTUSBEnqueueInternalCmd(_pAd, CMDTHREAD_SET_PSM_BIT, &(_psm_val), sizeof(u16)); \
338 }\ 335 } \
339 } 336 }
340 337
341#define RTMP_MLME_RADIO_ON(pAd) \ 338#define RTMP_MLME_RADIO_ON(pAd) \
diff --git a/drivers/staging/rt2860/chip/rtmp_mac.h b/drivers/staging/rt2860/chip/rtmp_mac.h
index f6a72581d3bd..e8f7172ce42a 100644
--- a/drivers/staging/rt2860/chip/rtmp_mac.h
+++ b/drivers/staging/rt2860/chip/rtmp_mac.h
@@ -154,7 +154,7 @@ typedef union _INT_SOURCE_CSR_STRUC {
154 u32 GPTimer:1; 154 u32 GPTimer:1;
155 u32 RxCoherent:1; /*bit16 */ 155 u32 RxCoherent:1; /*bit16 */
156 u32 TxCoherent:1; 156 u32 TxCoherent:1;
157 u32 : 14; 157 u32: 14;
158 } field; 158 } field;
159 u32 word; 159 u32 word;
160} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC; 160} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC;
@@ -175,7 +175,7 @@ typedef union _INT_MASK_CSR_STRUC {
175 u32 HccaDmaDone:1; 175 u32 HccaDmaDone:1;
176 u32 MgmtDmaDone:1; 176 u32 MgmtDmaDone:1;
177 u32 MCUCommandINT:1; 177 u32 MCUCommandINT:1;
178 u32 : 20; 178 u32: 20;
179 u32 RxCoherent:1; 179 u32 RxCoherent:1;
180 u32 TxCoherent:1; 180 u32 TxCoherent:1;
181 } field; 181 } field;
@@ -209,7 +209,7 @@ typedef union _WPDMA_RST_IDX_STRUC {
209 u32 RST_DTX_IDX5:1; 209 u32 RST_DTX_IDX5:1;
210 u32 rsv:10; 210 u32 rsv:10;
211 u32 RST_DRX_IDX0:1; 211 u32 RST_DRX_IDX0:1;
212 u32 : 15; 212 u32: 15;
213 } field; 213 } field;
214 u32 word; 214 u32 word;
215} WPDMA_RST_IDX_STRUC, *PWPDMA_RST_IDX_STRUC; 215} WPDMA_RST_IDX_STRUC, *PWPDMA_RST_IDX_STRUC;
@@ -448,7 +448,7 @@ typedef union _BBP_CSR_CFG_STRUC {
448 u32 Busy:1; /* 1: ASIC is busy execute BBP programming. */ 448 u32 Busy:1; /* 1: ASIC is busy execute BBP programming. */
449 u32 BBP_PAR_DUR:1; /* 0: 4 MAC clock cycles 1: 8 MAC clock cycles */ 449 u32 BBP_PAR_DUR:1; /* 0: 4 MAC clock cycles 1: 8 MAC clock cycles */
450 u32 BBP_RW_MODE:1; /* 0: use serial mode 1:parallel */ 450 u32 BBP_RW_MODE:1; /* 0: use serial mode 1:parallel */
451 u32 : 12; 451 u32: 12;
452 } field; 452 } field;
453 u32 word; 453 u32 word;
454} BBP_CSR_CFG_STRUC, *PBBP_CSR_CFG_STRUC; 454} BBP_CSR_CFG_STRUC, *PBBP_CSR_CFG_STRUC;
@@ -494,7 +494,7 @@ typedef union _LED_CFG_STRUC {
494 u32 GLedMode:2; /* green Led Mode */ 494 u32 GLedMode:2; /* green Led Mode */
495 u32 YLedMode:2; /* yellow Led Mode */ 495 u32 YLedMode:2; /* yellow Led Mode */
496 u32 LedPolar:1; /* Led Polarity. 0: active low1: active high */ 496 u32 LedPolar:1; /* Led Polarity. 0: active low1: active high */
497 u32 : 1; 497 u32: 1;
498 } field; 498 } field;
499 u32 word; 499 u32 word;
500} LED_CFG_STRUC, *PLED_CFG_STRUC; 500} LED_CFG_STRUC, *PLED_CFG_STRUC;
@@ -533,7 +533,7 @@ typedef union _BCN_TIME_CFG_STRUC {
533 u32 TsfSyncMode:2; /* Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode */ 533 u32 TsfSyncMode:2; /* Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode */
534 u32 bTBTTEnable:1; 534 u32 bTBTTEnable:1;
535 u32 bBeaconGen:1; /* Enable beacon generator */ 535 u32 bBeaconGen:1; /* Enable beacon generator */
536 u32 : 3; 536 u32: 3;
537 u32 TxTimestampCompensate:8; 537 u32 TxTimestampCompensate:8;
538 } field; 538 } field;
539 u32 word; 539 u32 word;
@@ -560,7 +560,7 @@ typedef union _AUTO_WAKEUP_STRUC {
560 u32 AutoLeadTime:8; 560 u32 AutoLeadTime:8;
561 u32 NumofSleepingTbtt:7; /* ForceWake has high privilege than PutToSleep when both set */ 561 u32 NumofSleepingTbtt:7; /* ForceWake has high privilege than PutToSleep when both set */
562 u32 EnableAutoWakeup:1; /* 0:sleep, 1:awake */ 562 u32 EnableAutoWakeup:1; /* 0:sleep, 1:awake */
563 u32 : 16; 563 u32: 16;
564 } field; 564 } field;
565 u32 word; 565 u32 word;
566} AUTO_WAKEUP_STRUC, *PAUTO_WAKEUP_STRUC; 566} AUTO_WAKEUP_STRUC, *PAUTO_WAKEUP_STRUC;
@@ -578,7 +578,7 @@ typedef union _EDCA_AC_CFG_STRUC {
578 u32 Aifsn:4; /* # of slot time */ 578 u32 Aifsn:4; /* # of slot time */
579 u32 Cwmin:4; /* */ 579 u32 Cwmin:4; /* */
580 u32 Cwmax:4; /*unit power of 2 */ 580 u32 Cwmax:4; /*unit power of 2 */
581 u32 : 12; /* */ 581 u32: 12; /* */
582 } field; 582 } field;
583 u32 word; 583 u32 word;
584} EDCA_AC_CFG_STRUC, *PEDCA_AC_CFG_STRUC; 584} EDCA_AC_CFG_STRUC, *PEDCA_AC_CFG_STRUC;
@@ -751,7 +751,7 @@ typedef union _AUTO_RSP_CFG_STRUC {
751 u32 rsv:1; /* Power bit value in conrtrol frame */ 751 u32 rsv:1; /* Power bit value in conrtrol frame */
752 u32 DualCTSEn:1; /* Power bit value in conrtrol frame */ 752 u32 DualCTSEn:1; /* Power bit value in conrtrol frame */
753 u32 AckCtsPsmBit:1; /* Power bit value in conrtrol frame */ 753 u32 AckCtsPsmBit:1; /* Power bit value in conrtrol frame */
754 u32 : 24; 754 u32: 24;
755 } field; 755 } field;
756 u32 word; 756 u32 word;
757} AUTO_RSP_CFG_STRUC, *PAUTO_RSP_CFG_STRUC; 757} AUTO_RSP_CFG_STRUC, *PAUTO_RSP_CFG_STRUC;
@@ -981,21 +981,21 @@ typedef union _MPDU_DEN_CNT_STRUC {
981typedef union _SHAREDKEY_MODE_STRUC { 981typedef union _SHAREDKEY_MODE_STRUC {
982 struct { 982 struct {
983 u32 Bss0Key0CipherAlg:3; 983 u32 Bss0Key0CipherAlg:3;
984 u32 : 1; 984 u32: 1;
985 u32 Bss0Key1CipherAlg:3; 985 u32 Bss0Key1CipherAlg:3;
986 u32 : 1; 986 u32: 1;
987 u32 Bss0Key2CipherAlg:3; 987 u32 Bss0Key2CipherAlg:3;
988 u32 : 1; 988 u32: 1;
989 u32 Bss0Key3CipherAlg:3; 989 u32 Bss0Key3CipherAlg:3;
990 u32 : 1; 990 u32: 1;
991 u32 Bss1Key0CipherAlg:3; 991 u32 Bss1Key0CipherAlg:3;
992 u32 : 1; 992 u32: 1;
993 u32 Bss1Key1CipherAlg:3; 993 u32 Bss1Key1CipherAlg:3;
994 u32 : 1; 994 u32: 1;
995 u32 Bss1Key2CipherAlg:3; 995 u32 Bss1Key2CipherAlg:3;
996 u32 : 1; 996 u32: 1;
997 u32 Bss1Key3CipherAlg:3; 997 u32 Bss1Key3CipherAlg:3;
998 u32 : 1; 998 u32: 1;
999 } field; 999 } field;
1000 u32 word; 1000 u32 word;
1001} SHAREDKEY_MODE_STRUC, *PSHAREDKEY_MODE_STRUC; 1001} SHAREDKEY_MODE_STRUC, *PSHAREDKEY_MODE_STRUC;
@@ -1103,7 +1103,7 @@ typedef union _RX_FILTR_CFG_STRUC {
1103 u32 DropBAR:1; /* */ 1103 u32 DropBAR:1; /* */
1104 1104
1105 u32 DropRsvCntlType:1; 1105 u32 DropRsvCntlType:1;
1106 u32 : 15; 1106 u32: 15;
1107 } field; 1107 } field;
1108 u32 word; 1108 u32 word;
1109} RX_FILTR_CFG_STRUC, *PRX_FILTR_CFG_STRUC; 1109} RX_FILTR_CFG_STRUC, *PRX_FILTR_CFG_STRUC;
@@ -1128,21 +1128,21 @@ typedef union _PHY_CSR4_STRUC {
1128typedef union _SEC_CSR5_STRUC { 1128typedef union _SEC_CSR5_STRUC {
1129 struct { 1129 struct {
1130 u32 Bss2Key0CipherAlg:3; 1130 u32 Bss2Key0CipherAlg:3;
1131 u32 : 1; 1131 u32: 1;
1132 u32 Bss2Key1CipherAlg:3; 1132 u32 Bss2Key1CipherAlg:3;
1133 u32 : 1; 1133 u32: 1;
1134 u32 Bss2Key2CipherAlg:3; 1134 u32 Bss2Key2CipherAlg:3;
1135 u32 : 1; 1135 u32: 1;
1136 u32 Bss2Key3CipherAlg:3; 1136 u32 Bss2Key3CipherAlg:3;
1137 u32 : 1; 1137 u32: 1;
1138 u32 Bss3Key0CipherAlg:3; 1138 u32 Bss3Key0CipherAlg:3;
1139 u32 : 1; 1139 u32: 1;
1140 u32 Bss3Key1CipherAlg:3; 1140 u32 Bss3Key1CipherAlg:3;
1141 u32 : 1; 1141 u32: 1;
1142 u32 Bss3Key2CipherAlg:3; 1142 u32 Bss3Key2CipherAlg:3;
1143 u32 : 1; 1143 u32: 1;
1144 u32 Bss3Key3CipherAlg:3; 1144 u32 Bss3Key3CipherAlg:3;
1145 u32 : 1; 1145 u32: 1;
1146 } field; 1146 } field;
1147 u32 word; 1147 u32 word;
1148} SEC_CSR5_STRUC, *PSEC_CSR5_STRUC; 1148} SEC_CSR5_STRUC, *PSEC_CSR5_STRUC;
diff --git a/drivers/staging/rt2860/chip/rtmp_phy.h b/drivers/staging/rt2860/chip/rtmp_phy.h
index 8b8b0f47f03b..9f924ea6ca35 100644
--- a/drivers/staging/rt2860/chip/rtmp_phy.h
+++ b/drivers/staging/rt2860/chip/rtmp_phy.h
@@ -177,8 +177,7 @@
177#ifdef RTMP_MAC_PCI 177#ifdef RTMP_MAC_PCI
178#define RTMP_RF_IO_WRITE32(_A, _V) \ 178#define RTMP_RF_IO_WRITE32(_A, _V) \
179{ \ 179{ \
180 if ((_A)->bPCIclkOff == FALSE) \ 180 if ((_A)->bPCIclkOff == FALSE) { \
181 { \
182 PHY_CSR4_STRUC _value; \ 181 PHY_CSR4_STRUC _value; \
183 unsigned long _busyCnt = 0; \ 182 unsigned long _busyCnt = 0; \
184 \ 183 \
@@ -187,9 +186,8 @@
187 if (_value.field.Busy == IDLE) \ 186 if (_value.field.Busy == IDLE) \
188 break; \ 187 break; \
189 _busyCnt++; \ 188 _busyCnt++; \
190 }while (_busyCnt < MAX_BUSY_COUNT); \ 189 } while (_busyCnt < MAX_BUSY_COUNT); \
191 if(_busyCnt < MAX_BUSY_COUNT) \ 190 if (_busyCnt < MAX_BUSY_COUNT) { \
192 { \
193 RTMP_IO_WRITE32((_A), RF_CSR_CFG0, (_V)); \ 191 RTMP_IO_WRITE32((_A), RF_CSR_CFG0, (_V)); \
194 } \ 192 } \
195 } \ 193 } \
@@ -218,52 +216,46 @@
218 _bViaMCU: if we need access the bbp via the MCU. 216 _bViaMCU: if we need access the bbp via the MCU.
219*/ 217*/
220#define RTMP_BBP_IO_READ8(_pAd, _bbpID, _pV, _bViaMCU) \ 218#define RTMP_BBP_IO_READ8(_pAd, _bbpID, _pV, _bViaMCU) \
221 do{ \ 219 do { \
222 BBP_CSR_CFG_STRUC BbpCsr; \ 220 BBP_CSR_CFG_STRUC BbpCsr; \
223 int _busyCnt, _secCnt, _regID; \ 221 int _busyCnt, _secCnt, _regID; \
224 \ 222 \
225 _regID = ((_bViaMCU) == TRUE ? H2M_BBP_AGENT : BBP_CSR_CFG); \ 223 _regID = ((_bViaMCU) == TRUE ? H2M_BBP_AGENT : BBP_CSR_CFG); \
226 for (_busyCnt=0; _busyCnt<MAX_BUSY_COUNT; _busyCnt++) \ 224 for (_busyCnt = 0; _busyCnt < MAX_BUSY_COUNT; _busyCnt++) { \
227 { \ 225 RTMP_IO_READ32(_pAd, _regID, &BbpCsr.word); \
228 RTMP_IO_READ32(_pAd, _regID, &BbpCsr.word); \
229 if (BbpCsr.field.Busy == BUSY) \ 226 if (BbpCsr.field.Busy == BUSY) \
230 continue; \ 227 continue; \
231 BbpCsr.word = 0; \ 228 BbpCsr.word = 0; \
232 BbpCsr.field.fRead = 1; \ 229 BbpCsr.field.fRead = 1; \
233 BbpCsr.field.BBP_RW_MODE = 1; \ 230 BbpCsr.field.BBP_RW_MODE = 1; \
234 BbpCsr.field.Busy = 1; \ 231 BbpCsr.field.Busy = 1; \
235 BbpCsr.field.RegNum = _bbpID; \ 232 BbpCsr.field.RegNum = _bbpID; \
236 RTMP_IO_WRITE32(_pAd, _regID, BbpCsr.word); \ 233 RTMP_IO_WRITE32(_pAd, _regID, BbpCsr.word); \
237 if ((_bViaMCU) == TRUE) \ 234 if ((_bViaMCU) == TRUE) { \
238 { \ 235 AsicSendCommandToMcu(_pAd, 0x80, 0xff, 0x0, 0x0); \
239 AsicSendCommandToMcu(_pAd, 0x80, 0xff, 0x0, 0x0); \ 236 RTMPusecDelay(1000); \
240 RTMPusecDelay(1000); \ 237 } \
241 } \ 238 for (_secCnt = 0; _secCnt < MAX_BUSY_COUNT; _secCnt++) { \
242 for (_secCnt=0; _secCnt<MAX_BUSY_COUNT; _secCnt++) \
243 { \
244 RTMP_IO_READ32(_pAd, _regID, &BbpCsr.word); \ 239 RTMP_IO_READ32(_pAd, _regID, &BbpCsr.word); \
245 if (BbpCsr.field.Busy == IDLE) \ 240 if (BbpCsr.field.Busy == IDLE) \
246 break; \ 241 break; \
247 } \ 242 } \
248 if ((BbpCsr.field.Busy == IDLE) && \ 243 if ((BbpCsr.field.Busy == IDLE) && \
249 (BbpCsr.field.RegNum == _bbpID)) \ 244 (BbpCsr.field.RegNum == _bbpID)) { \
250 { \ 245 *(_pV) = (u8)BbpCsr.field.Value; \
251 *(_pV) = (u8)BbpCsr.field.Value; \ 246 break; \
252 break; \ 247 } \
253 } \ 248 } \
254 } \ 249 if (BbpCsr.field.Busy == BUSY) { \
255 if (BbpCsr.field.Busy == BUSY) \ 250 DBGPRINT_ERR(("BBP(viaMCU=%d) read R%d fail\n", (_bViaMCU), _bbpID)); \
256 { \
257 DBGPRINT_ERR(("BBP(viaMCU=%d) read R%d fail\n", (_bViaMCU), _bbpID)); \
258 *(_pV) = (_pAd)->BbpWriteLatch[_bbpID]; \ 251 *(_pV) = (_pAd)->BbpWriteLatch[_bbpID]; \
259 if ((_bViaMCU) == TRUE) \ 252 if ((_bViaMCU) == TRUE) { \
260 { \
261 RTMP_IO_READ32(_pAd, _regID, &BbpCsr.word); \ 253 RTMP_IO_READ32(_pAd, _regID, &BbpCsr.word); \
262 BbpCsr.field.Busy = 0; \ 254 BbpCsr.field.Busy = 0; \
263 RTMP_IO_WRITE32(_pAd, _regID, BbpCsr.word); \ 255 RTMP_IO_WRITE32(_pAd, _regID, BbpCsr.word); \
264 } \ 256 } \
265 } \ 257 } \
266 }while(0) 258 } while (0)
267 259
268/* 260/*
269 This marco used for the BBP read operation which didn't need via MCU. 261 This marco used for the BBP read operation which didn't need via MCU.
@@ -283,42 +275,35 @@
283 int i, k; \ 275 int i, k; \
284 BOOLEAN brc; \ 276 BOOLEAN brc; \
285 BbpCsr.field.Busy = IDLE; \ 277 BbpCsr.field.Busy = IDLE; \
286 if ((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ 278 if ((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) \
279 && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \
287 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE) \ 280 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE) \
288 && ((_A)->bPCIclkOff == FALSE) \ 281 && ((_A)->bPCIclkOff == FALSE) \
289 && ((_A)->brt30xxBanMcuCmd == FALSE)) \ 282 && ((_A)->brt30xxBanMcuCmd == FALSE)) { \
290 { \ 283 for (i = 0; i < MAX_BUSY_COUNT; i++) { \
291 for (i=0; i<MAX_BUSY_COUNT; i++) \ 284 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \
292 { \ 285 if (BbpCsr.field.Busy == BUSY) { \
293 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ 286 continue; \
294 if (BbpCsr.field.Busy == BUSY) \ 287 } \
295 { \ 288 BbpCsr.word = 0; \
296 continue; \ 289 BbpCsr.field.fRead = 1; \
297 } \ 290 BbpCsr.field.BBP_RW_MODE = 1; \
298 BbpCsr.word = 0; \ 291 BbpCsr.field.Busy = 1; \
299 BbpCsr.field.fRead = 1; \ 292 BbpCsr.field.RegNum = _I; \
300 BbpCsr.field.BBP_RW_MODE = 1; \ 293 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \
301 BbpCsr.field.Busy = 1; \ 294 brc = AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \
302 BbpCsr.field.RegNum = _I; \ 295 if (brc == TRUE) { \
303 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ 296 for (k = 0; k < MAX_BUSY_COUNT; k++) { \
304 brc = AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \ 297 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \
305 if (brc == TRUE) \ 298 if (BbpCsr.field.Busy == IDLE) \
306 { \ 299 break; \
307 for (k=0; k<MAX_BUSY_COUNT; k++) \ 300 } \
308 { \ 301 if ((BbpCsr.field.Busy == IDLE) && \
309 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ 302 (BbpCsr.field.RegNum == _I)) { \
310 if (BbpCsr.field.Busy == IDLE) \ 303 *(_pV) = (u8)BbpCsr.field.Value; \
311 break; \ 304 break; \
312 } \ 305 } \
313 if ((BbpCsr.field.Busy == IDLE) && \ 306 } else { \
314 (BbpCsr.field.RegNum == _I)) \
315 { \
316 *(_pV) = (u8)BbpCsr.field.Value; \
317 break; \
318 } \
319 } \
320 else \
321 { \
322 BbpCsr.field.Busy = 0; \ 307 BbpCsr.field.Busy = 0; \
323 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ 308 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \
324 } \ 309 } \
@@ -326,46 +311,38 @@
326 } \ 311 } \
327 else if (!((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ 312 else if (!((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \
328 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE)) \ 313 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE)) \
329 && ((_A)->bPCIclkOff == FALSE)) \ 314 && ((_A)->bPCIclkOff == FALSE)) { \
330 { \ 315 for (i = 0; i < MAX_BUSY_COUNT; i++) { \
331 for (i=0; i<MAX_BUSY_COUNT; i++) \ 316 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \
332 { \ 317 if (BbpCsr.field.Busy == BUSY) { \
333 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ 318 continue; \
334 if (BbpCsr.field.Busy == BUSY) \ 319 } \
335 { \ 320 BbpCsr.word = 0; \
336 continue; \ 321 BbpCsr.field.fRead = 1; \
337 } \ 322 BbpCsr.field.BBP_RW_MODE = 1; \
338 BbpCsr.word = 0; \ 323 BbpCsr.field.Busy = 1; \
339 BbpCsr.field.fRead = 1; \ 324 BbpCsr.field.RegNum = _I; \
340 BbpCsr.field.BBP_RW_MODE = 1; \ 325 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \
341 BbpCsr.field.Busy = 1; \ 326 AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \
342 BbpCsr.field.RegNum = _I; \ 327 for (k = 0; k < MAX_BUSY_COUNT; k++) { \
343 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ 328 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \
344 AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \ 329 if (BbpCsr.field.Busy == IDLE) \
345 for (k=0; k<MAX_BUSY_COUNT; k++) \ 330 break; \
346 { \ 331 } \
347 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ 332 if ((BbpCsr.field.Busy == IDLE) && \
348 if (BbpCsr.field.Busy == IDLE) \ 333 (BbpCsr.field.RegNum == _I)) { \
349 break; \ 334 *(_pV) = (u8)BbpCsr.field.Value; \
350 } \ 335 break; \
351 if ((BbpCsr.field.Busy == IDLE) && \ 336 } \
352 (BbpCsr.field.RegNum == _I)) \ 337 } \
353 { \ 338 } else { \
354 *(_pV) = (u8)BbpCsr.field.Value; \
355 break; \
356 } \
357 } \
358 } \
359 else \
360 { \
361 DBGPRINT_ERR((" , brt30xxBanMcuCmd = %d, Read BBP %d \n", (_A)->brt30xxBanMcuCmd, (_I))); \ 339 DBGPRINT_ERR((" , brt30xxBanMcuCmd = %d, Read BBP %d \n", (_A)->brt30xxBanMcuCmd, (_I))); \
362 *(_pV) = (_A)->BbpWriteLatch[_I]; \ 340 *(_pV) = (_A)->BbpWriteLatch[_I]; \
363 } \ 341 } \
364 if ((BbpCsr.field.Busy == BUSY) || ((_A)->bPCIclkOff == TRUE)) \ 342 if ((BbpCsr.field.Busy == BUSY) || ((_A)->bPCIclkOff == TRUE)) { \
365 { \ 343 DBGPRINT_ERR(("BBP read R%d=0x%x fail\n", _I, BbpCsr.word)); \
366 DBGPRINT_ERR(("BBP read R%d=0x%x fail\n", _I, BbpCsr.word)); \ 344 *(_pV) = (_A)->BbpWriteLatch[_I]; \
367 *(_pV) = (_A)->BbpWriteLatch[_I]; \ 345 } \
368 } \
369} 346}
370 347
371/* 348/*
@@ -376,43 +353,39 @@
376 _bViaMCU: if we need access the bbp via the MCU. 353 _bViaMCU: if we need access the bbp via the MCU.
377*/ 354*/
378#define RTMP_BBP_IO_WRITE8(_pAd, _bbpID, _pV, _bViaMCU) \ 355#define RTMP_BBP_IO_WRITE8(_pAd, _bbpID, _pV, _bViaMCU) \
379 do{ \ 356 do { \
380 BBP_CSR_CFG_STRUC BbpCsr; \ 357 BBP_CSR_CFG_STRUC BbpCsr; \
381 int _busyCnt, _regID; \ 358 int _busyCnt, _regID; \
382 \ 359 \
383 _regID = ((_bViaMCU) == TRUE ? H2M_BBP_AGENT : BBP_CSR_CFG); \ 360 _regID = ((_bViaMCU) == TRUE ? H2M_BBP_AGENT : BBP_CSR_CFG); \
384 for (_busyCnt=0; _busyCnt<MAX_BUSY_COUNT; _busyCnt++) \ 361 for (_busyCnt = 0; _busyCnt < MAX_BUSY_COUNT; _busyCnt++) { \
385 { \
386 RTMP_IO_READ32((_pAd), BBP_CSR_CFG, &BbpCsr.word); \ 362 RTMP_IO_READ32((_pAd), BBP_CSR_CFG, &BbpCsr.word); \
387 if (BbpCsr.field.Busy == BUSY) \ 363 if (BbpCsr.field.Busy == BUSY) \
388 continue; \ 364 continue; \
389 BbpCsr.word = 0; \ 365 BbpCsr.word = 0; \
390 BbpCsr.field.fRead = 0; \ 366 BbpCsr.field.fRead = 0; \
391 BbpCsr.field.BBP_RW_MODE = 1; \ 367 BbpCsr.field.BBP_RW_MODE = 1; \
392 BbpCsr.field.Busy = 1; \ 368 BbpCsr.field.Busy = 1; \
393 BbpCsr.field.Value = _pV; \ 369 BbpCsr.field.Value = _pV; \
394 BbpCsr.field.RegNum = _bbpID; \ 370 BbpCsr.field.RegNum = _bbpID; \
395 RTMP_IO_WRITE32((_pAd), BBP_CSR_CFG, BbpCsr.word); \ 371 RTMP_IO_WRITE32((_pAd), BBP_CSR_CFG, BbpCsr.word); \
396 if ((_bViaMCU) == TRUE) \ 372 if ((_bViaMCU) == TRUE) { \
397 { \ 373 AsicSendCommandToMcu(_pAd, 0x80, 0xff, 0x0, 0x0); \
398 AsicSendCommandToMcu(_pAd, 0x80, 0xff, 0x0, 0x0); \ 374 if ((_pAd)->OpMode == OPMODE_AP) \
399 if ((_pAd)->OpMode == OPMODE_AP) \ 375 RTMPusecDelay(1000); \
400 RTMPusecDelay(1000); \ 376 } \
401 } \ 377 (_pAd)->BbpWriteLatch[_bbpID] = _pV; \
402 (_pAd)->BbpWriteLatch[_bbpID] = _pV; \ 378 break; \
403 break; \ 379 } \
404 } \ 380 if (_busyCnt == MAX_BUSY_COUNT) { \
405 if (_busyCnt == MAX_BUSY_COUNT) \ 381 DBGPRINT_ERR(("BBP write R%d fail\n", _bbpID)); \
406 { \ 382 if ((_bViaMCU) == TRUE) { \
407 DBGPRINT_ERR(("BBP write R%d fail\n", _bbpID)); \
408 if((_bViaMCU) == TRUE) \
409 { \
410 RTMP_IO_READ32(_pAd, H2M_BBP_AGENT, &BbpCsr.word); \ 383 RTMP_IO_READ32(_pAd, H2M_BBP_AGENT, &BbpCsr.word); \
411 BbpCsr.field.Busy = 0; \ 384 BbpCsr.field.Busy = 0; \
412 RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, BbpCsr.word); \ 385 RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, BbpCsr.word); \
413 } \ 386 } \
414 } \ 387 } \
415 }while(0) 388 } while (0)
416 389
417/* 390/*
418 This marco used for the BBP write operation which didn't need via MCU. 391 This marco used for the BBP write operation which didn't need via MCU.
@@ -426,25 +399,22 @@
426 will use this function too and didn't access the bbp register via the MCU. 399 will use this function too and didn't access the bbp register via the MCU.
427*/ 400*/
428/* Write BBP register by register's ID & value */ 401/* Write BBP register by register's ID & value */
429#define RTMP_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V) \ 402#define RTMP_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V) \
430{ \ 403{ \
431 BBP_CSR_CFG_STRUC BbpCsr; \ 404 BBP_CSR_CFG_STRUC BbpCsr; \
432 int BusyCnt = 0; \ 405 int BusyCnt = 0; \
433 BOOLEAN brc; \ 406 BOOLEAN brc; \
434 if (_I < MAX_NUM_OF_BBP_LATCH) \ 407 if (_I < MAX_NUM_OF_BBP_LATCH) { \
435 { \ 408 if ((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) \
436 if ((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ 409 && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \
437 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE) \ 410 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE) \
438 && ((_A)->bPCIclkOff == FALSE) \ 411 && ((_A)->bPCIclkOff == FALSE) \
439 && ((_A)->brt30xxBanMcuCmd == FALSE)) \ 412 && ((_A)->brt30xxBanMcuCmd == FALSE)) { \
440 { \ 413 if (_A->AccessBBPFailCount > 20) { \
441 if (_A->AccessBBPFailCount > 20) \ 414 AsicResetBBPAgent(_A); \
442 { \ 415 _A->AccessBBPFailCount = 0; \
443 AsicResetBBPAgent(_A); \ 416 } \
444 _A->AccessBBPFailCount = 0; \ 417 for (BusyCnt = 0; BusyCnt < MAX_BUSY_COUNT; BusyCnt++) { \
445 } \
446 for (BusyCnt=0; BusyCnt<MAX_BUSY_COUNT; BusyCnt++) \
447 { \
448 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ 418 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \
449 if (BbpCsr.field.Busy == BUSY) \ 419 if (BbpCsr.field.Busy == BUSY) \
450 continue; \ 420 continue; \
@@ -456,29 +426,24 @@
456 BbpCsr.field.RegNum = _I; \ 426 BbpCsr.field.RegNum = _I; \
457 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ 427 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \
458 brc = AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \ 428 brc = AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \
459 if (brc == TRUE) \ 429 if (brc == TRUE) { \
460 { \
461 (_A)->BbpWriteLatch[_I] = _V; \ 430 (_A)->BbpWriteLatch[_I] = _V; \
462 } \ 431 } else { \
463 else \
464 { \
465 BbpCsr.field.Busy = 0; \ 432 BbpCsr.field.Busy = 0; \
466 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ 433 RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \
467 } \ 434 } \
468 break; \ 435 break; \
469 } \ 436 } \
470 } \ 437 } \
471 else if (!((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ 438 else if (!((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) \
439 && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \
472 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE)) \ 440 && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE)) \
473 && ((_A)->bPCIclkOff == FALSE)) \ 441 && ((_A)->bPCIclkOff == FALSE)) { \
474 { \ 442 if (_A->AccessBBPFailCount > 20) { \
475 if (_A->AccessBBPFailCount > 20) \ 443 AsicResetBBPAgent(_A); \
476 { \ 444 _A->AccessBBPFailCount = 0; \
477 AsicResetBBPAgent(_A); \ 445 } \
478 _A->AccessBBPFailCount = 0; \ 446 for (BusyCnt = 0; BusyCnt < MAX_BUSY_COUNT; BusyCnt++) { \
479 } \
480 for (BusyCnt=0; BusyCnt<MAX_BUSY_COUNT; BusyCnt++) \
481 { \
482 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ 447 RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \
483 if (BbpCsr.field.Busy == BUSY) \ 448 if (BbpCsr.field.Busy == BUSY) \
484 continue; \ 449 continue; \
@@ -493,20 +458,15 @@
493 (_A)->BbpWriteLatch[_I] = _V; \ 458 (_A)->BbpWriteLatch[_I] = _V; \
494 break; \ 459 break; \
495 } \ 460 } \
496 } \ 461 } else { \
497 else \
498 { \
499 DBGPRINT_ERR((" brt30xxBanMcuCmd = %d. Write BBP %d \n", (_A)->brt30xxBanMcuCmd, (_I))); \ 462 DBGPRINT_ERR((" brt30xxBanMcuCmd = %d. Write BBP %d \n", (_A)->brt30xxBanMcuCmd, (_I))); \
500 } \ 463 } \
501 if ((BusyCnt == MAX_BUSY_COUNT) || ((_A)->bPCIclkOff == TRUE)) \ 464 if ((BusyCnt == MAX_BUSY_COUNT) || ((_A)->bPCIclkOff == TRUE)) { \
502 { \ 465 if (BusyCnt == MAX_BUSY_COUNT) \
503 if (BusyCnt == MAX_BUSY_COUNT) \
504 (_A)->AccessBBPFailCount++; \ 466 (_A)->AccessBBPFailCount++; \
505 DBGPRINT_ERR(("BBP write R%d=0x%x fail. BusyCnt= %d.bPCIclkOff = %d. \n", _I, BbpCsr.word, BusyCnt, (_A)->bPCIclkOff )); \ 467 DBGPRINT_ERR(("BBP write R%d=0x%x fail. BusyCnt= %d.bPCIclkOff = %d. \n", _I, BbpCsr.word, BusyCnt, (_A)->bPCIclkOff)); \
506 } \ 468 } \
507 } \ 469 } else { \
508 else \
509 { \
510 DBGPRINT_ERR(("****** BBP_Write_Latch Buffer exceeds max boundry ****** \n")); \ 470 DBGPRINT_ERR(("****** BBP_Write_Latch Buffer exceeds max boundry ****** \n")); \
511 } \ 471 } \
512} 472}
@@ -522,7 +482,7 @@
522 482
523#ifdef RT30xx 483#ifdef RT30xx
524#define RTMP_ASIC_MMPS_DISABLE(_pAd) \ 484#define RTMP_ASIC_MMPS_DISABLE(_pAd) \
525 do{ \ 485 do { \
526 u32 _macData; \ 486 u32 _macData; \
527 u8 _bbpData = 0; \ 487 u8 _bbpData = 0; \
528 /* disable MMPS BBP control register */ \ 488 /* disable MMPS BBP control register */ \
@@ -534,10 +494,10 @@
534 RTMP_IO_READ32(_pAd, 0x1210, &_macData); \ 494 RTMP_IO_READ32(_pAd, 0x1210, &_macData); \
535 _macData &= ~(0x09); /*bit 0, 3*/ \ 495 _macData &= ~(0x09); /*bit 0, 3*/ \
536 RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \ 496 RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \
537 }while(0) 497 } while (0)
538 498
539#define RTMP_ASIC_MMPS_ENABLE(_pAd) \ 499#define RTMP_ASIC_MMPS_ENABLE(_pAd) \
540 do{ \ 500 do { \
541 u32 _macData; \ 501 u32 _macData; \
542 u8 _bbpData = 0; \ 502 u8 _bbpData = 0; \
543 /* enable MMPS BBP control register */ \ 503 /* enable MMPS BBP control register */ \
@@ -549,7 +509,7 @@
549 RTMP_IO_READ32(_pAd, 0x1210, &_macData); \ 509 RTMP_IO_READ32(_pAd, 0x1210, &_macData); \
550 _macData |= (0x09); /*bit 0, 3*/ \ 510 _macData |= (0x09); /*bit 0, 3*/ \
551 RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \ 511 RTMP_IO_WRITE32(_pAd, 0x1210, _macData); \
552 }while(0) 512 } while (0)
553 513
554#endif /* RT30xx // */ 514#endif /* RT30xx // */
555 515
diff --git a/drivers/staging/rt2860/chips/rt3070.c b/drivers/staging/rt2860/chips/rt3070.c
index 627bad943a3c..3a17fd10ec1f 100644
--- a/drivers/staging/rt2860/chips/rt3070.c
+++ b/drivers/staging/rt2860/chips/rt3070.c
@@ -56,7 +56,7 @@ void NICInitRT3070RFRegisters(struct rt_rtmp_adapter *pAd)
56 u32 RfReg = 0; 56 u32 RfReg = 0;
57 u32 data; 57 u32 data;
58 58
59 RT30xxReadRFRegister(pAd, RF_R30, (u8 *)& RfReg); 59 RT30xxReadRFRegister(pAd, RF_R30, (u8 *)&RfReg);
60 RfReg |= 0x80; 60 RfReg |= 0x80;
61 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg); 61 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg);
62 RTMPusecDelay(1000); 62 RTMPusecDelay(1000);
@@ -84,7 +84,7 @@ void NICInitRT3070RFRegisters(struct rt_rtmp_adapter *pAd)
84 } 84 }
85 } else if (IS_RT3071(pAd)) { 85 } else if (IS_RT3071(pAd)) {
86 /* Driver should set RF R6 bit6 on before init RF registers */ 86 /* Driver should set RF R6 bit6 on before init RF registers */
87 RT30xxReadRFRegister(pAd, RF_R06, (u8 *)& RfReg); 87 RT30xxReadRFRegister(pAd, RF_R06, (u8 *)&RfReg);
88 RfReg |= 0x40; 88 RfReg |= 0x40;
89 RT30xxWriteRFRegister(pAd, RF_R06, (u8)RfReg); 89 RT30xxWriteRFRegister(pAd, RF_R06, (u8)RfReg);
90 90
diff --git a/drivers/staging/rt2860/chips/rt3090.c b/drivers/staging/rt2860/chips/rt3090.c
index 5927ba4c5a9b..c2933c69bc04 100644
--- a/drivers/staging/rt2860/chips/rt3090.c
+++ b/drivers/staging/rt2860/chips/rt3090.c
@@ -53,7 +53,7 @@ void NICInitRT3090RFRegisters(struct rt_rtmp_adapter *pAd)
53 /* Driver should toggle RF R30 bit7 before init RF registers */ 53 /* Driver should toggle RF R30 bit7 before init RF registers */
54 u32 RfReg = 0, data; 54 u32 RfReg = 0, data;
55 55
56 RT30xxReadRFRegister(pAd, RF_R30, (u8 *)& RfReg); 56 RT30xxReadRFRegister(pAd, RF_R30, (u8 *)&RfReg);
57 RfReg |= 0x80; 57 RfReg |= 0x80;
58 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg); 58 RT30xxWriteRFRegister(pAd, RF_R30, (u8)RfReg);
59 RTMPusecDelay(1000); 59 RTMPusecDelay(1000);
@@ -90,7 +90,7 @@ void NICInitRT3090RFRegisters(struct rt_rtmp_adapter *pAd)
90 } 90 }
91 91
92 /* Driver should set RF R6 bit6 on before calibration */ 92 /* Driver should set RF R6 bit6 on before calibration */
93 RT30xxReadRFRegister(pAd, RF_R06, (u8 *)& RfReg); 93 RT30xxReadRFRegister(pAd, RF_R06, (u8 *)&RfReg);
94 RfReg |= 0x40; 94 RfReg |= 0x40;
95 RT30xxWriteRFRegister(pAd, RF_R06, (u8)RfReg); 95 RT30xxWriteRFRegister(pAd, RF_R06, (u8)RfReg);
96 96
diff --git a/drivers/staging/rt2860/chips/rt30xx.c b/drivers/staging/rt2860/chips/rt30xx.c
index 6e684a3ccf0e..4367a196aeff 100644
--- a/drivers/staging/rt2860/chips/rt30xx.c
+++ b/drivers/staging/rt2860/chips/rt30xx.c
@@ -170,8 +170,7 @@ void RTMPFilterCalibration(struct rt_rtmp_adapter *pAd)
170 pAd->Mlme.CaliBW40RfR24 = 0x2F; /*Bit[5] must be 1 for BW 40 */ 170 pAd->Mlme.CaliBW40RfR24 = 0x2F; /*Bit[5] must be 1 for BW 40 */
171 171
172 do { 172 do {
173 if (loop == 1) /*BandWidth = 40 MHz */ 173 if (loop == 1) { /*BandWidth = 40 MHz */
174 {
175 /* Write 0x27 to RF_R24 to program filter */ 174 /* Write 0x27 to RF_R24 to program filter */
176 RF_R24_Value = 0x27; 175 RF_R24_Value = 0x27;
177 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); 176 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
@@ -190,8 +189,7 @@ void RTMPFilterCalibration(struct rt_rtmp_adapter *pAd)
190 RT30xxReadRFRegister(pAd, RF_R31, &value); 189 RT30xxReadRFRegister(pAd, RF_R31, &value);
191 value |= 0x20; 190 value |= 0x20;
192 RT30xxWriteRFRegister(pAd, RF_R31, value); 191 RT30xxWriteRFRegister(pAd, RF_R31, value);
193 } else /*BandWidth = 20 MHz */ 192 } else { /*BandWidth = 20 MHz */
194 {
195 /* Write 0x07 to RF_R24 to program filter */ 193 /* Write 0x07 to RF_R24 to program filter */
196 RF_R24_Value = 0x07; 194 RF_R24_Value = 0x07;
197 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); 195 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
@@ -353,8 +351,7 @@ void RT30xxLoadRFNormalModeSetup(struct rt_rtmp_adapter *pAd)
353 RT30xxReadRFRegister(pAd, RF_R27, &RFValue); 351 RT30xxReadRFRegister(pAd, RF_R27, &RFValue);
354 /* TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). */ 352 /* TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). */
355 /* Raising RF voltage is no longer needed for RT3070(F) */ 353 /* Raising RF voltage is no longer needed for RT3070(F) */
356 if (IS_RT3090(pAd)) /* RT309x and RT3071/72 */ 354 if (IS_RT3090(pAd)) { /* RT309x and RT3071/72 */
357 {
358 if ((pAd->MACVersion & 0xffff) < 0x0211) 355 if ((pAd->MACVersion & 0xffff) < 0x0211)
359 RFValue = (RFValue & (~0x77)) | 0x3; 356 RFValue = (RFValue & (~0x77)) | 0x3;
360 else 357 else
diff --git a/drivers/staging/rt2860/common/cmm_aes.c b/drivers/staging/rt2860/common/cmm_aes.c
index 250357c5cd65..1d159ff82fd2 100644
--- a/drivers/staging/rt2860/common/cmm_aes.c
+++ b/drivers/staging/rt2860/common/cmm_aes.c
@@ -281,7 +281,7 @@ void construct_mic_header2(unsigned char *mic_header2,
281 mic_header2[6] = mpdu[22] & 0x0f; /* SC */ 281 mic_header2[6] = mpdu[22] & 0x0f; /* SC */
282 mic_header2[7] = 0x00; /* mpdu[23]; */ 282 mic_header2[7] = 0x00; /* mpdu[23]; */
283 283
284 if ((!qc_exists) & a4_exists) { 284 if ((!qc_exists) && a4_exists) {
285 for (i = 0; i < 6; i++) 285 for (i = 0; i < 6; i++)
286 mic_header2[8 + i] = mpdu[24 + i]; /* A4 */ 286 mic_header2[8 + i] = mpdu[24 + i]; /* A4 */
287 287
diff --git a/drivers/staging/rt2860/common/cmm_data.c b/drivers/staging/rt2860/common/cmm_data.c
index 68263cee7952..93a53479d766 100644
--- a/drivers/staging/rt2860/common/cmm_data.c
+++ b/drivers/staging/rt2860/common/cmm_data.c
@@ -773,7 +773,8 @@ void RTMPDeQueuePacket(struct rt_rtmp_adapter *pAd, IN BOOLEAN bIntContext, u8 Q
773 773
774 /* probe the Queue Head */ 774 /* probe the Queue Head */
775 pQueue = &pAd->TxSwQueue[QueIdx]; 775 pQueue = &pAd->TxSwQueue[QueIdx];
776 if ((pEntry = pQueue->Head) == NULL) { 776 pEntry = pQueue->Head;
777 if (pEntry == NULL) {
777 DEQUEUE_UNLOCK(&pAd->irq_lock, bIntContext, 778 DEQUEUE_UNLOCK(&pAd->irq_lock, bIntContext,
778 IrqFlags); 779 IrqFlags);
779 break; 780 break;
@@ -824,7 +825,8 @@ void RTMPDeQueuePacket(struct rt_rtmp_adapter *pAd, IN BOOLEAN bIntContext, u8 Q
824 } 825 }
825 826
826 do { 827 do {
827 if ((pEntry = pQueue->Head) == NULL) 828 pEntry = pQueue->Head;
829 if (pEntry == NULL)
828 break; 830 break;
829 831
830 /* For TX_AMSDU_FRAME/TX_RALINK_FRAME, Need to check if next pakcet can do aggregation. */ 832 /* For TX_AMSDU_FRAME/TX_RALINK_FRAME, Need to check if next pakcet can do aggregation. */
@@ -1422,7 +1424,7 @@ u32 deaggregate_AMSDU_announce(struct rt_rtmp_adapter *pAd,
1422 if ((Header802_3[12] == 0x88) && (Header802_3[13] == 0x8E)) { 1424 if ((Header802_3[12] == 0x88) && (Header802_3[13] == 0x8E)) {
1423 /* avoid local heap overflow, use dyanamic allocation */ 1425 /* avoid local heap overflow, use dyanamic allocation */
1424 struct rt_mlme_queue_elem *Elem = 1426 struct rt_mlme_queue_elem *Elem =
1425 (struct rt_mlme_queue_elem *)kmalloc(sizeof(struct rt_mlme_queue_elem), 1427 kmalloc(sizeof(struct rt_mlme_queue_elem),
1426 MEM_ALLOC_FLAG); 1428 MEM_ALLOC_FLAG);
1427 if (Elem != NULL) { 1429 if (Elem != NULL) {
1428 memmove(Elem->Msg + 1430 memmove(Elem->Msg +
diff --git a/drivers/staging/rt2860/common/cmm_mac_pci.c b/drivers/staging/rt2860/common/cmm_mac_pci.c
index 560ebd398e1d..e26ba4942877 100644
--- a/drivers/staging/rt2860/common/cmm_mac_pci.c
+++ b/drivers/staging/rt2860/common/cmm_mac_pci.c
@@ -1558,7 +1558,7 @@ void RT28xxPciMlmeRadioOFF(struct rt_rtmp_adapter *pAd)
1558 if (INFRA_ON(pAd) || ADHOC_ON(pAd)) { 1558 if (INFRA_ON(pAd) || ADHOC_ON(pAd)) {
1559 struct rt_mlme_disassoc_req DisReq; 1559 struct rt_mlme_disassoc_req DisReq;
1560 struct rt_mlme_queue_elem *pMsgElem = 1560 struct rt_mlme_queue_elem *pMsgElem =
1561 (struct rt_mlme_queue_elem *)kmalloc(sizeof(struct rt_mlme_queue_elem), 1561 kmalloc(sizeof(struct rt_mlme_queue_elem),
1562 MEM_ALLOC_FLAG); 1562 MEM_ALLOC_FLAG);
1563 1563
1564 if (pMsgElem) { 1564 if (pMsgElem) {
diff --git a/drivers/staging/rt2860/common/cmm_mac_usb.c b/drivers/staging/rt2860/common/cmm_mac_usb.c
index 9dd6959cd5a5..8aec70fc20d6 100644
--- a/drivers/staging/rt2860/common/cmm_mac_usb.c
+++ b/drivers/staging/rt2860/common/cmm_mac_usb.c
@@ -1087,7 +1087,7 @@ void RT28xxUsbMlmeRadioOFF(struct rt_rtmp_adapter *pAd)
1087 if (INFRA_ON(pAd) || ADHOC_ON(pAd)) { 1087 if (INFRA_ON(pAd) || ADHOC_ON(pAd)) {
1088 struct rt_mlme_disassoc_req DisReq; 1088 struct rt_mlme_disassoc_req DisReq;
1089 struct rt_mlme_queue_elem *pMsgElem = 1089 struct rt_mlme_queue_elem *pMsgElem =
1090 (struct rt_mlme_queue_elem *)kmalloc(sizeof(struct rt_mlme_queue_elem), 1090 kmalloc(sizeof(struct rt_mlme_queue_elem),
1091 MEM_ALLOC_FLAG); 1091 MEM_ALLOC_FLAG);
1092 1092
1093 if (pMsgElem) { 1093 if (pMsgElem) {
diff --git a/drivers/staging/rt2860/common/cmm_wpa.c b/drivers/staging/rt2860/common/cmm_wpa.c
index 94e119faaa71..c16f3763cca6 100644
--- a/drivers/staging/rt2860/common/cmm_wpa.c
+++ b/drivers/staging/rt2860/common/cmm_wpa.c
@@ -2928,25 +2928,23 @@ void WpaShowAllsuite(u8 *rsnie, u32 rsnie_len)
2928 hex_dump("RSNIE", rsnie, rsnie_len); 2928 hex_dump("RSNIE", rsnie, rsnie_len);
2929 2929
2930 /* group cipher */ 2930 /* group cipher */
2931 if ((pSuite = 2931 pSuite = GetSuiteFromRSNIE(rsnie, rsnie_len, GROUP_SUITE, &count);
2932 GetSuiteFromRSNIE(rsnie, rsnie_len, GROUP_SUITE, 2932 if (pSuite != NULL) {
2933 &count)) != NULL) {
2934 hex_dump("group cipher", pSuite, 4 * count); 2933 hex_dump("group cipher", pSuite, 4 * count);
2935 } 2934 }
2936 /* pairwise cipher */ 2935 /* pairwise cipher */
2937 if ((pSuite = 2936 pSuite = GetSuiteFromRSNIE(rsnie, rsnie_len, PAIRWISE_SUITE, &count);
2938 GetSuiteFromRSNIE(rsnie, rsnie_len, PAIRWISE_SUITE, 2937 if (pSuite != NULL) {
2939 &count)) != NULL) {
2940 hex_dump("pairwise cipher", pSuite, 4 * count); 2938 hex_dump("pairwise cipher", pSuite, 4 * count);
2941 } 2939 }
2942 /* AKM */ 2940 /* AKM */
2943 if ((pSuite = 2941 pSuite = GetSuiteFromRSNIE(rsnie, rsnie_len, AKM_SUITE, &count);
2944 GetSuiteFromRSNIE(rsnie, rsnie_len, AKM_SUITE, &count)) != NULL) { 2942 if (pSuite != NULL) {
2945 hex_dump("AKM suite", pSuite, 4 * count); 2943 hex_dump("AKM suite", pSuite, 4 * count);
2946 } 2944 }
2947 /* PMKID */ 2945 /* PMKID */
2948 if ((pSuite = 2946 pSuite = GetSuiteFromRSNIE(rsnie, rsnie_len, PMKID_LIST, &count);
2949 GetSuiteFromRSNIE(rsnie, rsnie_len, PMKID_LIST, &count)) != NULL) { 2947 if (pSuite != NULL) {
2950 hex_dump("PMKID", pSuite, LEN_PMKID); 2948 hex_dump("PMKID", pSuite, LEN_PMKID);
2951 } 2949 }
2952 2950
diff --git a/drivers/staging/rt2860/common/spectrum.c b/drivers/staging/rt2860/common/spectrum.c
index 51e38d809333..2d5f847e6cc6 100644
--- a/drivers/staging/rt2860/common/spectrum.c
+++ b/drivers/staging/rt2860/common/spectrum.c
@@ -1900,8 +1900,8 @@ static void PeerMeasureReportAction(struct rt_rtmp_adapter *pAd,
1900/* if (pAd->CommonCfg.bIEEE80211H != TRUE) */ 1900/* if (pAd->CommonCfg.bIEEE80211H != TRUE) */
1901/* return; */ 1901/* return; */
1902 1902
1903 if ((pMeasureReportInfo = 1903 pMeasureReportInfo = kmalloc(sizeof(struct rt_measure_rpi_report), GFP_ATOMIC);
1904 kmalloc(sizeof(struct rt_measure_rpi_report), GFP_ATOMIC)) == NULL) { 1904 if (pMeasureReportInfo == NULL) {
1905 DBGPRINT(RT_DEBUG_ERROR, 1905 DBGPRINT(RT_DEBUG_ERROR,
1906 ("%s unable to alloc memory for measure report buffer (size=%zu).\n", 1906 ("%s unable to alloc memory for measure report buffer (size=%zu).\n",
1907 __func__, sizeof(struct rt_measure_rpi_report))); 1907 __func__, sizeof(struct rt_measure_rpi_report)));
@@ -2016,7 +2016,8 @@ static void PeerTpcRepAction(struct rt_rtmp_adapter *pAd, struct rt_mlme_queue_e
2016 NdisZeroMemory(&TpcRepInfo, sizeof(struct rt_tpc_report_info)); 2016 NdisZeroMemory(&TpcRepInfo, sizeof(struct rt_tpc_report_info));
2017 if (PeerTpcRepSanity 2017 if (PeerTpcRepSanity
2018 (pAd, Elem->Msg, Elem->MsgLen, &DialogToken, &TpcRepInfo)) { 2018 (pAd, Elem->Msg, Elem->MsgLen, &DialogToken, &TpcRepInfo)) {
2019 if ((pEntry = TpcReqLookUp(pAd, DialogToken)) != NULL) { 2019 pEntry = TpcReqLookUp(pAd, DialogToken);
2020 if (pEntry != NULL) {
2020 TpcReqDelete(pAd, pEntry->DialogToken); 2021 TpcReqDelete(pAd, pEntry->DialogToken);
2021 DBGPRINT(RT_DEBUG_TRACE, 2022 DBGPRINT(RT_DEBUG_TRACE,
2022 ("%s: DialogToken=%x, TxPwr=%d, LinkMargin=%d\n", 2023 ("%s: DialogToken=%x, TxPwr=%d, LinkMargin=%d\n",
diff --git a/drivers/staging/rt2860/mlme.h b/drivers/staging/rt2860/mlme.h
index 11434132f93b..99c9362bae86 100644
--- a/drivers/staging/rt2860/mlme.h
+++ b/drivers/staging/rt2860/mlme.h
@@ -322,7 +322,7 @@ struct rt_trigger_eventa {
322 u8 BSSID[6]; 322 u8 BSSID[6];
323 u8 RegClass; /* Regulatory Class */ 323 u8 RegClass; /* Regulatory Class */
324 u16 Channel; 324 u16 Channel;
325 unsigned long CDCounter; /* Maintain a seperate count down counter for each Event A. */ 325 unsigned long CDCounter; /* Maintain a separate count down counter for each Event A. */
326}; 326};
327 327
328/* 20/40 trigger event table */ 328/* 20/40 trigger event table */
diff --git a/drivers/staging/rt2860/pci_main_dev.c b/drivers/staging/rt2860/pci_main_dev.c
index e665d862281c..321facd6b0ab 100644
--- a/drivers/staging/rt2860/pci_main_dev.c
+++ b/drivers/staging/rt2860/pci_main_dev.c
@@ -107,13 +107,13 @@ MODULE_VERSION(STA_DRIVER_VERSION);
107/* Our PCI driver structure */ 107/* Our PCI driver structure */
108/* */ 108/* */
109static struct pci_driver rt2860_driver = { 109static struct pci_driver rt2860_driver = {
110name: "rt2860", 110name: "rt2860",
111id_table:rt2860_pci_tbl, 111id_table : rt2860_pci_tbl,
112probe: rt2860_probe, 112probe : rt2860_probe,
113remove:__devexit_p(rt2860_remove_one), 113remove : __devexit_p(rt2860_remove_one),
114#ifdef CONFIG_PM 114#ifdef CONFIG_PM
115suspend:rt2860_suspend, 115suspend : rt2860_suspend,
116resume:rt2860_resume, 116resume : rt2860_resume,
117#endif 117#endif
118}; 118};
119 119
@@ -211,9 +211,9 @@ static int rt2860_resume(struct pci_dev *pci_dev)
211 211
212 DBGPRINT(RT_DEBUG_TRACE, ("===> rt2860_resume()\n")); 212 DBGPRINT(RT_DEBUG_TRACE, ("===> rt2860_resume()\n"));
213 213
214 if (net_dev == NULL) { 214 if (net_dev == NULL)
215 DBGPRINT(RT_DEBUG_ERROR, ("net_dev == NULL!\n")); 215 DBGPRINT(RT_DEBUG_ERROR, ("net_dev == NULL!\n"));
216 } else 216 else
217 GET_PAD_FROM_NET_DEV(pAd, net_dev); 217 GET_PAD_FROM_NET_DEV(pAd, net_dev);
218 218
219 if (pAd != NULL) { 219 if (pAd != NULL) {
@@ -281,7 +281,9 @@ static int __devinit rt2860_probe(IN struct pci_dev *pci_dev,
281 281
282/*PCIDevInit============================================== */ 282/*PCIDevInit============================================== */
283 /* wake up and enable device */ 283 /* wake up and enable device */
284 if ((rv = pci_enable_device(pci_dev)) != 0) { 284 rv = pci_enable_device(pci_dev);
285
286 if (rv != 0) {
285 DBGPRINT(RT_DEBUG_ERROR, 287 DBGPRINT(RT_DEBUG_ERROR,
286 ("Enable PCI device failed, errno=%d!\n", rv)); 288 ("Enable PCI device failed, errno=%d!\n", rv));
287 return rv; 289 return rv;
@@ -289,7 +291,9 @@ static int __devinit rt2860_probe(IN struct pci_dev *pci_dev,
289 291
290 print_name = (char *)pci_name(pci_dev); 292 print_name = (char *)pci_name(pci_dev);
291 293
292 if ((rv = pci_request_regions(pci_dev, print_name)) != 0) { 294 rv = pci_request_regions(pci_dev, print_name);
295
296 if (rv != 0) {
293 DBGPRINT(RT_DEBUG_ERROR, 297 DBGPRINT(RT_DEBUG_ERROR,
294 ("Request PCI resource failed, errno=%d!\n", rv)); 298 ("Request PCI resource failed, errno=%d!\n", rv));
295 goto err_out; 299 goto err_out;
@@ -490,9 +494,8 @@ static void RTMPInitPCIeDevice(struct pci_dev *pci_dev, struct rt_rtmp_adapter *
490 494
491 /* Support advanced power save after 2892/2790. */ 495 /* Support advanced power save after 2892/2790. */
492 /* MAC version at offset 0x1000 is 0x2872XXXX/0x2870XXXX(PCIe, USB, SDIO). */ 496 /* MAC version at offset 0x1000 is 0x2872XXXX/0x2870XXXX(PCIe, USB, SDIO). */
493 if ((MacCsr0 & 0xffff0000) != 0x28600000) { 497 if ((MacCsr0 & 0xffff0000) != 0x28600000)
494 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_PCIE_DEVICE); 498 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_PCIE_DEVICE);
495 }
496 } 499 }
497} 500}
498 501
@@ -900,9 +903,9 @@ void RTMPPCIeLinkCtrlValueRestore(struct rt_rtmp_adapter *pAd, u8 Level)
900 if ((Configuration != 0) && (Configuration != 0xFFFF)) { 903 if ((Configuration != 0) && (Configuration != 0xFFFF)) {
901 Configuration &= 0xfefc; 904 Configuration &= 0xfefc;
902 /* If call from interface down, restore to orginial setting. */ 905 /* If call from interface down, restore to orginial setting. */
903 if (Level == RESTORE_CLOSE) { 906 if (Level == RESTORE_CLOSE)
904 Configuration |= pAd->HostLnkCtrlConfiguration; 907 Configuration |= pAd->HostLnkCtrlConfiguration;
905 } else 908 else
906 Configuration |= 0x0; 909 Configuration |= 0x0;
907 PCI_REG_WIRTE_WORD(pObj->parent_pci_dev, 910 PCI_REG_WIRTE_WORD(pObj->parent_pci_dev,
908 pAd->HostLnkCtrlOffset, 911 pAd->HostLnkCtrlOffset,
@@ -1100,13 +1103,13 @@ void RTMPrt3xSetPCIePowerLinkCtrl(struct rt_rtmp_adapter *pAd)
1100 /* Find PCI-to-PCI Bridge Express Capability Offset */ 1103 /* Find PCI-to-PCI Bridge Express Capability Offset */
1101 pos = pci_find_capability(pObj->parent_pci_dev, PCI_CAP_ID_EXP); 1104 pos = pci_find_capability(pObj->parent_pci_dev, PCI_CAP_ID_EXP);
1102 1105
1103 if (pos != 0) { 1106 if (pos != 0)
1104 pAd->HostLnkCtrlOffset = pos + PCI_EXP_LNKCTL; 1107 pAd->HostLnkCtrlOffset = pos + PCI_EXP_LNKCTL;
1105 } 1108
1106 /* If configurared to turn on L1. */ 1109 /* If configurared to turn on L1. */
1107 HostConfiguration = 0; 1110 HostConfiguration = 0;
1108 if (pAd->StaCfg.PSControl.field.rt30xxForceASPMTest == 1) { 1111 if (pAd->StaCfg.PSControl.field.rt30xxForceASPMTest == 1) {
1109 DBGPRINT(RT_DEBUG_TRACE, ("Enter,PSM : Force ASPM \n")); 1112 DBGPRINT(RT_DEBUG_TRACE, ("Enter,PSM : Force ASPM\n"));
1110 1113
1111 /* Skip non-exist deice right away */ 1114 /* Skip non-exist deice right away */
1112 if ((pAd->HostLnkCtrlOffset != 0)) { 1115 if ((pAd->HostLnkCtrlOffset != 0)) {
diff --git a/drivers/staging/rt2860/rt_linux.c b/drivers/staging/rt2860/rt_linux.c
index fd9a2072139b..0029b2d73b70 100644
--- a/drivers/staging/rt2860/rt_linux.c
+++ b/drivers/staging/rt2860/rt_linux.c
@@ -82,7 +82,7 @@ char const *pWirelessFloodEventText[IW_FLOOD_EVENT_TYPE_NUM] = {
82}; 82};
83 83
84/* timeout -- ms */ 84/* timeout -- ms */
85void RTMP_SetPeriodicTimer(struct timer_list * pTimer, 85void RTMP_SetPeriodicTimer(struct timer_list *pTimer,
86 IN unsigned long timeout) 86 IN unsigned long timeout)
87{ 87{
88 timeout = ((timeout * OS_HZ) / 1000); 88 timeout = ((timeout * OS_HZ) / 1000);
@@ -92,7 +92,7 @@ void RTMP_SetPeriodicTimer(struct timer_list * pTimer,
92 92
93/* convert NdisMInitializeTimer --> RTMP_OS_Init_Timer */ 93/* convert NdisMInitializeTimer --> RTMP_OS_Init_Timer */
94void RTMP_OS_Init_Timer(struct rt_rtmp_adapter *pAd, 94void RTMP_OS_Init_Timer(struct rt_rtmp_adapter *pAd,
95 struct timer_list * pTimer, 95 struct timer_list *pTimer,
96 IN TIMER_FUNCTION function, void *data) 96 IN TIMER_FUNCTION function, void *data)
97{ 97{
98 init_timer(pTimer); 98 init_timer(pTimer);
@@ -100,7 +100,7 @@ void RTMP_OS_Init_Timer(struct rt_rtmp_adapter *pAd,
100 pTimer->function = function; 100 pTimer->function = function;
101} 101}
102 102
103void RTMP_OS_Add_Timer(struct timer_list * pTimer, 103void RTMP_OS_Add_Timer(struct timer_list *pTimer,
104 IN unsigned long timeout) 104 IN unsigned long timeout)
105{ 105{
106 if (timer_pending(pTimer)) 106 if (timer_pending(pTimer))
@@ -111,14 +111,14 @@ void RTMP_OS_Add_Timer(struct timer_list * pTimer,
111 add_timer(pTimer); 111 add_timer(pTimer);
112} 112}
113 113
114void RTMP_OS_Mod_Timer(struct timer_list * pTimer, 114void RTMP_OS_Mod_Timer(struct timer_list *pTimer,
115 IN unsigned long timeout) 115 IN unsigned long timeout)
116{ 116{
117 timeout = ((timeout * OS_HZ) / 1000); 117 timeout = ((timeout * OS_HZ) / 1000);
118 mod_timer(pTimer, jiffies + timeout); 118 mod_timer(pTimer, jiffies + timeout);
119} 119}
120 120
121void RTMP_OS_Del_Timer(struct timer_list * pTimer, 121void RTMP_OS_Del_Timer(struct timer_list *pTimer,
122 OUT BOOLEAN * pCancelled) 122 OUT BOOLEAN * pCancelled)
123{ 123{
124 if (timer_pending(pTimer)) { 124 if (timer_pending(pTimer)) {
@@ -146,7 +146,7 @@ void RTMPusecDelay(unsigned long usec)
146 udelay(usec % 50); 146 udelay(usec % 50);
147} 147}
148 148
149void RTMP_GetCurrentSystemTime(LARGE_INTEGER * time) 149void RTMP_GetCurrentSystemTime(LARGE_INTEGER *time)
150{ 150{
151 time->u.LowPart = jiffies; 151 time->u.LowPart = jiffies;
152} 152}
@@ -154,11 +154,11 @@ void RTMP_GetCurrentSystemTime(LARGE_INTEGER * time)
154/* pAd MUST allow to be NULL */ 154/* pAd MUST allow to be NULL */
155int os_alloc_mem(struct rt_rtmp_adapter *pAd, u8 ** mem, unsigned long size) 155int os_alloc_mem(struct rt_rtmp_adapter *pAd, u8 ** mem, unsigned long size)
156{ 156{
157 *mem = (u8 *)kmalloc(size, GFP_ATOMIC); 157 *mem = kmalloc(size, GFP_ATOMIC);
158 if (*mem) 158 if (*mem)
159 return (NDIS_STATUS_SUCCESS); 159 return NDIS_STATUS_SUCCESS;
160 else 160 else
161 return (NDIS_STATUS_FAILURE); 161 return NDIS_STATUS_FAILURE;
162} 162}
163 163
164/* pAd MUST allow to be NULL */ 164/* pAd MUST allow to be NULL */
@@ -167,7 +167,7 @@ int os_free_mem(struct rt_rtmp_adapter *pAd, void *mem)
167 167
168 ASSERT(mem); 168 ASSERT(mem);
169 kfree(mem); 169 kfree(mem);
170 return (NDIS_STATUS_SUCCESS); 170 return NDIS_STATUS_SUCCESS;
171} 171}
172 172
173void *RtmpOSNetPktAlloc(struct rt_rtmp_adapter *pAd, IN int size) 173void *RtmpOSNetPktAlloc(struct rt_rtmp_adapter *pAd, IN int size)
@@ -176,7 +176,7 @@ void *RtmpOSNetPktAlloc(struct rt_rtmp_adapter *pAd, IN int size)
176 /* Add 2 more bytes for ip header alignment */ 176 /* Add 2 more bytes for ip header alignment */
177 skb = dev_alloc_skb(size + 2); 177 skb = dev_alloc_skb(size + 2);
178 178
179 return ((void *)skb); 179 return (void *)skb;
180} 180}
181 181
182void *RTMP_AllocateFragPacketBuffer(struct rt_rtmp_adapter *pAd, 182void *RTMP_AllocateFragPacketBuffer(struct rt_rtmp_adapter *pAd,
@@ -201,7 +201,7 @@ void *RTMP_AllocateFragPacketBuffer(struct rt_rtmp_adapter *pAd,
201void *RTMP_AllocateTxPacketBuffer(struct rt_rtmp_adapter *pAd, 201void *RTMP_AllocateTxPacketBuffer(struct rt_rtmp_adapter *pAd,
202 unsigned long Length, 202 unsigned long Length,
203 IN BOOLEAN Cached, 203 IN BOOLEAN Cached,
204 void ** VirtualAddress) 204 void **VirtualAddress)
205{ 205{
206 struct sk_buff *pkt; 206 struct sk_buff *pkt;
207 207
@@ -271,7 +271,7 @@ void RTMPFreeAdapter(struct rt_rtmp_adapter *pAd)
271 271
272BOOLEAN OS_Need_Clone_Packet(void) 272BOOLEAN OS_Need_Clone_Packet(void)
273{ 273{
274 return (FALSE); 274 return FALSE;
275} 275}
276 276
277/* 277/*
@@ -299,7 +299,7 @@ BOOLEAN OS_Need_Clone_Packet(void)
299int RTMPCloneNdisPacket(struct rt_rtmp_adapter *pAd, 299int RTMPCloneNdisPacket(struct rt_rtmp_adapter *pAd,
300 IN BOOLEAN pInsAMSDUHdr, 300 IN BOOLEAN pInsAMSDUHdr,
301 void *pInPacket, 301 void *pInPacket,
302 void ** ppOutPacket) 302 void **ppOutPacket)
303{ 303{
304 304
305 struct sk_buff *pkt; 305 struct sk_buff *pkt;
@@ -328,7 +328,7 @@ int RTMPCloneNdisPacket(struct rt_rtmp_adapter *pAd,
328 328
329/* the allocated NDIS PACKET must be freed via RTMPFreeNdisPacket() */ 329/* the allocated NDIS PACKET must be freed via RTMPFreeNdisPacket() */
330int RTMPAllocateNdisPacket(struct rt_rtmp_adapter *pAd, 330int RTMPAllocateNdisPacket(struct rt_rtmp_adapter *pAd,
331 void ** ppPacket, 331 void **ppPacket,
332 u8 *pHeader, 332 u8 *pHeader,
333 u32 HeaderLen, 333 u32 HeaderLen,
334 u8 *pData, u32 DataLen) 334 u8 *pData, u32 DataLen)
@@ -391,7 +391,7 @@ int Sniff2BytesFromNdisBuffer(char *pFirstBuffer,
391 391
392void RTMP_QueryPacketInfo(void *pPacket, 392void RTMP_QueryPacketInfo(void *pPacket,
393 struct rt_packet_info *pPacketInfo, 393 struct rt_packet_info *pPacketInfo,
394 u8 ** pSrcBufVA, u32 * pSrcBufLen) 394 u8 **pSrcBufVA, u32 * pSrcBufLen)
395{ 395{
396 pPacketInfo->BufferCount = 1; 396 pPacketInfo->BufferCount = 1;
397 pPacketInfo->pFirstBuffer = (char *)GET_OS_PKT_DATAPTR(pPacket); 397 pPacketInfo->pFirstBuffer = (char *)GET_OS_PKT_DATAPTR(pPacket);
@@ -402,9 +402,9 @@ void RTMP_QueryPacketInfo(void *pPacket,
402 *pSrcBufLen = GET_OS_PKT_LEN(pPacket); 402 *pSrcBufLen = GET_OS_PKT_LEN(pPacket);
403} 403}
404 404
405void RTMP_QueryNextPacketInfo(void ** ppPacket, 405void RTMP_QueryNextPacketInfo(void **ppPacket,
406 struct rt_packet_info *pPacketInfo, 406 struct rt_packet_info *pPacketInfo,
407 u8 ** pSrcBufVA, u32 * pSrcBufLen) 407 u8 **pSrcBufVA, u32 * pSrcBufLen)
408{ 408{
409 void *pPacket = NULL; 409 void *pPacket = NULL;
410 410
@@ -463,8 +463,8 @@ void *duplicate_pkt(struct rt_rtmp_adapter *pAd,
463 struct sk_buff *skb; 463 struct sk_buff *skb;
464 void *pPacket = NULL; 464 void *pPacket = NULL;
465 465
466 if ((skb = 466 skb = __dev_alloc_skb(HdrLen + DataSize + 2, MEM_ALLOC_FLAG);
467 __dev_alloc_skb(HdrLen + DataSize + 2, MEM_ALLOC_FLAG)) != NULL) { 467 if (skb != NULL) {
468 skb_reserve(skb, 2); 468 skb_reserve(skb, 2);
469 NdisMoveMemory(skb_tail_pointer(skb), pHeader802_3, HdrLen); 469 NdisMoveMemory(skb_tail_pointer(skb), pHeader802_3, HdrLen);
470 skb_put(skb, HdrLen); 470 skb_put(skb, HdrLen);
@@ -589,7 +589,7 @@ rt_get_sg_list_from_packet(void *pPacket, struct rt_rtmp_sg_list *sg)
589 sg->NumberOfElements = 1; 589 sg->NumberOfElements = 1;
590 sg->Elements[0].Address = GET_OS_PKT_DATAPTR(pPacket); 590 sg->Elements[0].Address = GET_OS_PKT_DATAPTR(pPacket);
591 sg->Elements[0].Length = GET_OS_PKT_LEN(pPacket); 591 sg->Elements[0].Length = GET_OS_PKT_LEN(pPacket);
592 return (sg); 592 return sg;
593} 593}
594 594
595void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen) 595void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen)
@@ -673,7 +673,8 @@ void RTMPSendWirelessEvent(struct rt_rtmp_adapter *pAd,
673 return; 673 return;
674 } 674 }
675 /*Allocate memory and copy the msg. */ 675 /*Allocate memory and copy the msg. */
676 if ((pBuf = kmalloc(IW_CUSTOM_MAX_LEN, GFP_ATOMIC)) != NULL) { 676 pBuf = kmalloc(IW_CUSTOM_MAX_LEN, GFP_ATOMIC);
677 if (pBuf != NULL) {
677 /*Prepare the payload */ 678 /*Prepare the payload */
678 memset(pBuf, 0, IW_CUSTOM_MAX_LEN); 679 memset(pBuf, 0, IW_CUSTOM_MAX_LEN);
679 680
@@ -1062,7 +1063,7 @@ void RtmpOSTaskCustomize(struct rt_rtmp_os_task *pTask)
1062 1063
1063#ifndef KTHREAD_SUPPORT 1064#ifndef KTHREAD_SUPPORT
1064 1065
1065 daemonize((char *)& pTask->taskName[0] /*"%s",pAd->net_dev->name */ ); 1066 daemonize((char *)&pTask->taskName[0] /*"%s",pAd->net_dev->name */);
1066 1067
1067 allow_signal(SIGTERM); 1068 allow_signal(SIGTERM);
1068 allow_signal(SIGKILL); 1069 allow_signal(SIGKILL);
@@ -1247,7 +1248,7 @@ void RtmpOSNetDevFree(struct net_device *pNetDev)
1247 free_netdev(pNetDev); 1248 free_netdev(pNetDev);
1248} 1249}
1249 1250
1250int RtmpOSNetDevAlloc(struct net_device ** new_dev_p, u32 privDataSize) 1251int RtmpOSNetDevAlloc(struct net_device **new_dev_p, u32 privDataSize)
1251{ 1252{
1252 /* assign it as null first. */ 1253 /* assign it as null first. */
1253 *new_dev_p = NULL; 1254 *new_dev_p = NULL;
@@ -1344,7 +1345,7 @@ struct net_device *RtmpOSNetDevCreate(struct rt_rtmp_adapter *pAd,
1344 int status; 1345 int status;
1345 1346
1346 /* allocate a new network device */ 1347 /* allocate a new network device */
1347 status = RtmpOSNetDevAlloc(&pNetDev, 0 /*privMemSize */ ); 1348 status = RtmpOSNetDevAlloc(&pNetDev, 0 /*privMemSize */);
1348 if (status != NDIS_STATUS_SUCCESS) { 1349 if (status != NDIS_STATUS_SUCCESS) {
1349 /* allocation fail, exit */ 1350 /* allocation fail, exit */
1350 DBGPRINT(RT_DEBUG_ERROR, 1351 DBGPRINT(RT_DEBUG_ERROR,
diff --git a/drivers/staging/rt2860/rt_linux.h b/drivers/staging/rt2860/rt_linux.h
index a7c540f8e3e3..b370fb21e423 100644
--- a/drivers/staging/rt2860/rt_linux.h
+++ b/drivers/staging/rt2860/rt_linux.h
@@ -455,10 +455,11 @@ void hex_dump(char *str, unsigned char *pSrcBufVA, unsigned int SrcBufLen);
455 * Device DMA Access related definitions and data structures. 455 * Device DMA Access related definitions and data structures.
456 **********************************************************************************/ 456 **********************************************************************************/
457#ifdef RTMP_MAC_PCI 457#ifdef RTMP_MAC_PCI
458dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size, 458struct rt_rtmp_adapter;
459 int sd_idx, int direction); 459dma_addr_t linux_pci_map_single(struct rt_rtmp_adapter *pAd, void *ptr,
460void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, 460 size_t size, int sd_idx, int direction);
461 int direction); 461void linux_pci_unmap_single(struct rt_rtmp_adapter *pAd, dma_addr_t dma_addr,
462 size_t size, int direction);
462 463
463#define PCI_MAP_SINGLE(_handle, _ptr, _size, _sd_idx, _dir) \ 464#define PCI_MAP_SINGLE(_handle, _ptr, _size, _sd_idx, _dir) \
464 linux_pci_map_single(_handle, _ptr, _size, _sd_idx, _dir) 465 linux_pci_map_single(_handle, _ptr, _size, _sd_idx, _dir)
@@ -475,11 +476,6 @@ void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size,
475#define DEV_ALLOC_SKB(_length) \ 476#define DEV_ALLOC_SKB(_length) \
476 dev_alloc_skb(_length) 477 dev_alloc_skb(_length)
477#endif /* RTMP_MAC_PCI // */ 478#endif /* RTMP_MAC_PCI // */
478#ifdef RTMP_MAC_USB
479#define PCI_MAP_SINGLE(_handle, _ptr, _size, _dir) (unsigned long)0
480
481#define PCI_UNMAP_SINGLE(_handle, _ptr, _size, _dir)
482#endif /* RTMP_MAC_USB // */
483 479
484/* 480/*
485 * unsigned long 481 * unsigned long
diff --git a/drivers/staging/rt2860/rt_main_dev.c b/drivers/staging/rt2860/rt_main_dev.c
index fbddb00cfedd..ad60ceaf4b88 100644
--- a/drivers/staging/rt2860/rt_main_dev.c
+++ b/drivers/staging/rt2860/rt_main_dev.c
@@ -439,13 +439,13 @@ int rt28xx_open(struct net_device *dev)
439 RTMPInitPCIeLinkCtrlValue(pAd); 439 RTMPInitPCIeLinkCtrlValue(pAd);
440#endif /* RTMP_MAC_PCI // */ 440#endif /* RTMP_MAC_PCI // */
441 441
442 return (retval); 442 return retval;
443 443
444err: 444err:
445/*+++Add by shiang, move from rt28xx_init() to here. */ 445/*+++Add by shiang, move from rt28xx_init() to here. */
446 RtmpOSIRQRelease(net_dev); 446 RtmpOSIRQRelease(net_dev);
447/*---Add by shiang, move from rt28xx_init() to here. */ 447/*---Add by shiang, move from rt28xx_init() to here. */
448 return (-1); 448 return -1;
449} /* End of rt28xx_open */ 449} /* End of rt28xx_open */
450 450
451static const struct net_device_ops rt2860_netdev_ops = { 451static const struct net_device_ops rt2860_netdev_ops = {
@@ -534,7 +534,7 @@ int rt28xx_packet_xmit(struct sk_buff *skb)
534 } 534 }
535 535
536 RTMP_SET_PACKET_5VT(pPacket, 0); 536 RTMP_SET_PACKET_5VT(pPacket, 0);
537 STASendPackets((void *)pAd, (void **)& pPacket, 1); 537 STASendPackets((void *)pAd, (void **)&pPacket, 1);
538 538
539 status = NETDEV_TX_OK; 539 status = NETDEV_TX_OK;
540done: 540done:
@@ -571,7 +571,7 @@ static int rt28xx_send_packets(IN struct sk_buff *skb_p,
571 return NETDEV_TX_OK; 571 return NETDEV_TX_OK;
572 } 572 }
573 573
574 NdisZeroMemory((u8 *)& skb_p->cb[CB_OFF], 15); 574 NdisZeroMemory((u8 *)&skb_p->cb[CB_OFF], 15);
575 RTMP_SET_PACKET_NET_DEVICE_MBSSID(skb_p, MAIN_MBSSID); 575 RTMP_SET_PACKET_NET_DEVICE_MBSSID(skb_p, MAIN_MBSSID);
576 576
577 return rt28xx_packet_xmit(skb_p); 577 return rt28xx_packet_xmit(skb_p);
@@ -628,13 +628,13 @@ void tbtt_tasklet(unsigned long data)
628 ======================================================================== 628 ========================================================================
629 629
630 Routine Description: 630 Routine Description:
631 return ethernet statistics counter 631 return ethernet statistics counter
632 632
633 Arguments: 633 Arguments:
634 net_dev Pointer to net_device 634 net_dev Pointer to net_device
635 635
636 Return Value: 636 Return Value:
637 net_device_stats* 637 net_device_stats*
638 638
639 Note: 639 Note:
640 640
@@ -728,9 +728,9 @@ int AdapterBlockAllocateMemory(void *handle, void ** ppAd)
728 728
729 if (*ppAd) { 729 if (*ppAd) {
730 NdisZeroMemory(*ppAd, sizeof(struct rt_rtmp_adapter)); 730 NdisZeroMemory(*ppAd, sizeof(struct rt_rtmp_adapter));
731 ((struct rt_rtmp_adapter *)* ppAd)->OS_Cookie = handle; 731 ((struct rt_rtmp_adapter *)*ppAd)->OS_Cookie = handle;
732 return (NDIS_STATUS_SUCCESS); 732 return NDIS_STATUS_SUCCESS;
733 } else { 733 } else {
734 return (NDIS_STATUS_FAILURE); 734 return NDIS_STATUS_FAILURE;
735 } 735 }
736} 736}
diff --git a/drivers/staging/rt2860/rt_pci_rbus.c b/drivers/staging/rt2860/rt_pci_rbus.c
index e0a0aeeb17a2..3004be6da003 100644
--- a/drivers/staging/rt2860/rt_pci_rbus.c
+++ b/drivers/staging/rt2860/rt_pci_rbus.c
@@ -81,7 +81,7 @@ void RTMP_AllocateTxDescMemory(struct rt_rtmp_adapter *pAd,
81 u32 Index, 81 u32 Index,
82 unsigned long Length, 82 unsigned long Length,
83 IN BOOLEAN Cached, 83 IN BOOLEAN Cached,
84 void ** VirtualAddress, 84 void **VirtualAddress,
85 dma_addr_t *PhysicalAddress) 85 dma_addr_t *PhysicalAddress)
86{ 86{
87 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie; 87 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie;
@@ -96,7 +96,7 @@ void RTMP_AllocateTxDescMemory(struct rt_rtmp_adapter *pAd,
96void RTMP_AllocateMgmtDescMemory(struct rt_rtmp_adapter *pAd, 96void RTMP_AllocateMgmtDescMemory(struct rt_rtmp_adapter *pAd,
97 unsigned long Length, 97 unsigned long Length,
98 IN BOOLEAN Cached, 98 IN BOOLEAN Cached,
99 void ** VirtualAddress, 99 void **VirtualAddress,
100 dma_addr_t *PhysicalAddress) 100 dma_addr_t *PhysicalAddress)
101{ 101{
102 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie; 102 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie;
@@ -111,7 +111,7 @@ void RTMP_AllocateMgmtDescMemory(struct rt_rtmp_adapter *pAd,
111void RTMP_AllocateRxDescMemory(struct rt_rtmp_adapter *pAd, 111void RTMP_AllocateRxDescMemory(struct rt_rtmp_adapter *pAd,
112 unsigned long Length, 112 unsigned long Length,
113 IN BOOLEAN Cached, 113 IN BOOLEAN Cached,
114 void ** VirtualAddress, 114 void **VirtualAddress,
115 dma_addr_t *PhysicalAddress) 115 dma_addr_t *PhysicalAddress)
116{ 116{
117 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie; 117 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie;
@@ -139,7 +139,7 @@ void RTMP_AllocateFirstTxBuffer(struct rt_rtmp_adapter *pAd,
139 u32 Index, 139 u32 Index,
140 unsigned long Length, 140 unsigned long Length,
141 IN BOOLEAN Cached, 141 IN BOOLEAN Cached,
142 void ** VirtualAddress, 142 void **VirtualAddress,
143 dma_addr_t *PhysicalAddress) 143 dma_addr_t *PhysicalAddress)
144{ 144{
145 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie; 145 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie;
@@ -173,7 +173,7 @@ void RTMP_FreeFirstTxBuffer(struct rt_rtmp_adapter *pAd,
173void RTMP_AllocateSharedMemory(struct rt_rtmp_adapter *pAd, 173void RTMP_AllocateSharedMemory(struct rt_rtmp_adapter *pAd,
174 unsigned long Length, 174 unsigned long Length,
175 IN BOOLEAN Cached, 175 IN BOOLEAN Cached,
176 void ** VirtualAddress, 176 void **VirtualAddress,
177 dma_addr_t *PhysicalAddress) 177 dma_addr_t *PhysicalAddress)
178{ 178{
179 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie; 179 struct os_cookie *pObj = (struct os_cookie *)pAd->OS_Cookie;
@@ -197,7 +197,7 @@ void RTMP_AllocateSharedMemory(struct rt_rtmp_adapter *pAd,
197void *RTMP_AllocateRxPacketBuffer(struct rt_rtmp_adapter *pAd, 197void *RTMP_AllocateRxPacketBuffer(struct rt_rtmp_adapter *pAd,
198 unsigned long Length, 198 unsigned long Length,
199 IN BOOLEAN Cached, 199 IN BOOLEAN Cached,
200 void ** VirtualAddress, 200 void **VirtualAddress,
201 OUT dma_addr_t * 201 OUT dma_addr_t *
202 PhysicalAddress) 202 PhysicalAddress)
203{ 203{
@@ -790,10 +790,9 @@ IRQ_HANDLE_TYPE rt2860_interrupt(int irq, void *dev_instance)
790 * invaild or writeback cache 790 * invaild or writeback cache
791 * and convert virtual address to physical address 791 * and convert virtual address to physical address
792 */ 792 */
793dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size, 793dma_addr_t linux_pci_map_single(struct rt_rtmp_adapter *pAd, void *ptr,
794 int sd_idx, int direction) 794 size_t size, int sd_idx, int direction)
795{ 795{
796 struct rt_rtmp_adapter *pAd;
797 struct os_cookie *pObj; 796 struct os_cookie *pObj;
798 797
799 /* 798 /*
@@ -812,7 +811,6 @@ dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size,
812 sd_idx = -1 811 sd_idx = -1
813 */ 812 */
814 813
815 pAd = (struct rt_rtmp_adapter *)handle;
816 pObj = (struct os_cookie *)pAd->OS_Cookie; 814 pObj = (struct os_cookie *)pAd->OS_Cookie;
817 815
818 if (sd_idx == 1) { 816 if (sd_idx == 1) {
@@ -826,13 +824,11 @@ dma_addr_t linux_pci_map_single(void *handle, void *ptr, size_t size,
826 824
827} 825}
828 826
829void linux_pci_unmap_single(void *handle, dma_addr_t dma_addr, size_t size, 827void linux_pci_unmap_single(struct rt_rtmp_adapter *pAd, dma_addr_t dma_addr,
830 int direction) 828 size_t size, int direction)
831{ 829{
832 struct rt_rtmp_adapter *pAd;
833 struct os_cookie *pObj; 830 struct os_cookie *pObj;
834 831
835 pAd = (struct rt_rtmp_adapter *)handle;
836 pObj = (struct os_cookie *)pAd->OS_Cookie; 832 pObj = (struct os_cookie *)pAd->OS_Cookie;
837 833
838 pci_unmap_single(pObj->pci_dev, dma_addr, size, direction); 834 pci_unmap_single(pObj->pci_dev, dma_addr, size, direction);
diff --git a/drivers/staging/rt2860/rt_usb.c b/drivers/staging/rt2860/rt_usb.c
index 01a7eb4e8ba8..bcfc0f54d2aa 100644
--- a/drivers/staging/rt2860/rt_usb.c
+++ b/drivers/staging/rt2860/rt_usb.c
@@ -233,8 +233,7 @@ static void rtusb_dataout_complete(unsigned long data)
233 FREE_HTTX_RING(pAd, BulkOutPipeId, pHTTXContext); 233 FREE_HTTX_RING(pAd, BulkOutPipeId, pHTTXContext);
234 /*RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); */ 234 /*RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); */
235 235
236 } else /* STATUS_OTHER */ 236 } else { /* STATUS_OTHER */
237 {
238 u8 *pBuf; 237 u8 *pBuf;
239 238
240 pAd->BulkOutCompleteOther++; 239 pAd->BulkOutCompleteOther++;
@@ -316,8 +315,7 @@ static void rtusb_null_frame_done_tasklet(unsigned long data)
316 RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], irqFlag); 315 RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], irqFlag);
317 316
318 RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS); 317 RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
319 } else /* STATUS_OTHER */ 318 } else { /* STATUS_OTHER */
320 {
321 if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) && 319 if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) &&
322 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) && 320 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
323 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) && 321 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&
@@ -362,8 +360,7 @@ static void rtusb_rts_frame_done_tasklet(unsigned long data)
362 if (Status == USB_ST_NOERROR) { 360 if (Status == USB_ST_NOERROR) {
363 RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], irqFlag); 361 RTMP_IRQ_UNLOCK(&pAd->BulkOutLock[0], irqFlag);
364 RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS); 362 RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
365 } else /* STATUS_OTHER */ 363 } else { /* STATUS_OTHER */
366 {
367 if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) && 364 if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) &&
368 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) && 365 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
369 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) && 366 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&
@@ -410,8 +407,7 @@ static void rtusb_pspoll_frame_done_tasklet(unsigned long data)
410 407
411 if (Status == USB_ST_NOERROR) { 408 if (Status == USB_ST_NOERROR) {
412 RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS); 409 RTMPDeQueuePacket(pAd, FALSE, NUM_OF_TX_RING, MAX_TX_PROCESS);
413 } else /* STATUS_OTHER */ 410 } else { /* STATUS_OTHER */
414 {
415 if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) && 411 if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) &&
416 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) && 412 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
417 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) && 413 (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)) &&
@@ -473,14 +469,12 @@ static void rx_done_tasklet(unsigned long data)
473 if (Status == USB_ST_NOERROR) { 469 if (Status == USB_ST_NOERROR) {
474 pAd->BulkInComplete++; 470 pAd->BulkInComplete++;
475 pAd->NextRxBulkInPosition = 0; 471 pAd->NextRxBulkInPosition = 0;
476 if (pRxContext->BulkInOffset) /* As jan's comment, it may bulk-in success but size is zero. */ 472 if (pRxContext->BulkInOffset) { /* As jan's comment, it may bulk-in success but size is zero. */
477 {
478 pRxContext->Readable = TRUE; 473 pRxContext->Readable = TRUE;
479 INC_RING_INDEX(pAd->NextRxBulkInIndex, RX_RING_SIZE); 474 INC_RING_INDEX(pAd->NextRxBulkInIndex, RX_RING_SIZE);
480 } 475 }
481 RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags); 476 RTMP_IRQ_UNLOCK(&pAd->BulkInLock, IrqFlags);
482 } else /* STATUS_OTHER */ 477 } else { /* STATUS_OTHER */
483 {
484 pAd->BulkInCompleteFail++; 478 pAd->BulkInCompleteFail++;
485 /* Still read this packet although it may comtain wrong bytes. */ 479 /* Still read this packet although it may comtain wrong bytes. */
486 pRxContext->Readable = FALSE; 480 pRxContext->Readable = FALSE;
@@ -584,7 +578,7 @@ static void rtusb_mgmt_dma_done_tasklet(unsigned long data)
584 /* The protectioon of rest bulk should be in BulkOut routine */ 578 /* The protectioon of rest bulk should be in BulkOut routine */
585 if (pAd->MgmtRing.TxSwFreeIdx < 579 if (pAd->MgmtRing.TxSwFreeIdx <
586 MGMT_RING_SIZE 580 MGMT_RING_SIZE
587 /* pMLMEContext->bWaitingBulkOut == TRUE */ ) { 581 /* pMLMEContext->bWaitingBulkOut == TRUE */) {
588 RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME); 582 RTUSB_SET_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME);
589 } 583 }
590 RTUSBKickBulkOut(pAd); 584 RTUSBKickBulkOut(pAd);
diff --git a/drivers/staging/rt2860/rtmp.h b/drivers/staging/rt2860/rtmp.h
index 4401a55bda67..ab525ee15042 100644
--- a/drivers/staging/rt2860/rtmp.h
+++ b/drivers/staging/rt2860/rtmp.h
@@ -181,8 +181,7 @@ struct rt_queue_header {
181(QueueHeader)->Head; \ 181(QueueHeader)->Head; \
182{ \ 182{ \
183 struct rt_queue_entry *pNext; \ 183 struct rt_queue_entry *pNext; \
184 if ((QueueHeader)->Head != NULL) \ 184 if ((QueueHeader)->Head != NULL) { \
185 { \
186 pNext = (QueueHeader)->Head->Next; \ 185 pNext = (QueueHeader)->Head->Next; \
187 (QueueHeader)->Head->Next = NULL; \ 186 (QueueHeader)->Head->Next = NULL; \
188 (QueueHeader)->Head = pNext; \ 187 (QueueHeader)->Head = pNext; \
@@ -242,9 +241,9 @@ struct rt_queue_header {
242#define OPSTATUS_CLEAR_FLAG(_pAd, _F) ((_pAd)->CommonCfg.OpStatusFlags &= ~(_F)) 241#define OPSTATUS_CLEAR_FLAG(_pAd, _F) ((_pAd)->CommonCfg.OpStatusFlags &= ~(_F))
243#define OPSTATUS_TEST_FLAG(_pAd, _F) (((_pAd)->CommonCfg.OpStatusFlags & (_F)) != 0) 242#define OPSTATUS_TEST_FLAG(_pAd, _F) (((_pAd)->CommonCfg.OpStatusFlags & (_F)) != 0)
244 243
245#define CLIENT_STATUS_SET_FLAG(_pEntry,_F) ((_pEntry)->ClientStatusFlags |= (_F)) 244#define CLIENT_STATUS_SET_FLAG(_pEntry, _F) ((_pEntry)->ClientStatusFlags |= (_F))
246#define CLIENT_STATUS_CLEAR_FLAG(_pEntry,_F) ((_pEntry)->ClientStatusFlags &= ~(_F)) 245#define CLIENT_STATUS_CLEAR_FLAG(_pEntry, _F) ((_pEntry)->ClientStatusFlags &= ~(_F))
247#define CLIENT_STATUS_TEST_FLAG(_pEntry,_F) (((_pEntry)->ClientStatusFlags & (_F)) != 0) 246#define CLIENT_STATUS_TEST_FLAG(_pEntry, _F) (((_pEntry)->ClientStatusFlags & (_F)) != 0)
248 247
249#define RX_FILTER_SET_FLAG(_pAd, _F) ((_pAd)->CommonCfg.PacketFilter |= (_F)) 248#define RX_FILTER_SET_FLAG(_pAd, _F) ((_pAd)->CommonCfg.PacketFilter |= (_F))
250#define RX_FILTER_CLEAR_FLAG(_pAd, _F) ((_pAd)->CommonCfg.PacketFilter &= ~(_F)) 249#define RX_FILTER_CLEAR_FLAG(_pAd, _F) ((_pAd)->CommonCfg.PacketFilter &= ~(_F))
@@ -279,13 +278,13 @@ struct rt_queue_header {
279 _pAd->StaActive.SupportedHtPhy.RecomWidth = _pAd->MlmeAux.AddHtInfo.AddHtInfo.RecomWidth; \ 278 _pAd->StaActive.SupportedHtPhy.RecomWidth = _pAd->MlmeAux.AddHtInfo.AddHtInfo.RecomWidth; \
280 _pAd->StaActive.SupportedHtPhy.OperaionMode = _pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode; \ 279 _pAd->StaActive.SupportedHtPhy.OperaionMode = _pAd->MlmeAux.AddHtInfo.AddHtInfo2.OperaionMode; \
281 _pAd->StaActive.SupportedHtPhy.NonGfPresent = _pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent; \ 280 _pAd->StaActive.SupportedHtPhy.NonGfPresent = _pAd->MlmeAux.AddHtInfo.AddHtInfo2.NonGfPresent; \
282 NdisMoveMemory((_pAd)->MacTab.Content[BSSID_WCID].HTCapability.MCSSet, (_pAd)->StaActive.SupportedPhyInfo.MCSSet, sizeof(u8)* 16);\ 281 NdisMoveMemory((_pAd)->MacTab.Content[BSSID_WCID].HTCapability.MCSSet, (_pAd)->StaActive.SupportedPhyInfo.MCSSet, sizeof(u8) * 16);\
283} 282}
284 283
285#define COPY_AP_HTSETTINGS_FROM_BEACON(_pAd, _pHtCapability) \ 284#define COPY_AP_HTSETTINGS_FROM_BEACON(_pAd, _pHtCapability) \
286{ \ 285{ \
287 _pAd->MacTab.Content[BSSID_WCID].AMsduSize = (u8)(_pHtCapability->HtCapInfo.AMsduSize); \ 286 _pAd->MacTab.Content[BSSID_WCID].AMsduSize = (u8)(_pHtCapability->HtCapInfo.AMsduSize); \
288 _pAd->MacTab.Content[BSSID_WCID].MmpsMode= (u8)(_pHtCapability->HtCapInfo.MimoPs); \ 287 _pAd->MacTab.Content[BSSID_WCID].MmpsMode = (u8)(_pHtCapability->HtCapInfo.MimoPs); \
289 _pAd->MacTab.Content[BSSID_WCID].MaxRAmpduFactor = (u8)(_pHtCapability->HtCapParm.MaxRAmpduFactor); \ 288 _pAd->MacTab.Content[BSSID_WCID].MaxRAmpduFactor = (u8)(_pHtCapability->HtCapParm.MaxRAmpduFactor); \
290} 289}
291 290
@@ -349,17 +348,14 @@ struct rt_rtmp_sg_list {
349/* if orginal Ethernet frame contains no LLC/SNAP, then an extra LLC/SNAP encap is required */ 348/* if orginal Ethernet frame contains no LLC/SNAP, then an extra LLC/SNAP encap is required */
350#define EXTRA_LLCSNAP_ENCAP_FROM_PKT_START(_pBufVA, _pExtraLlcSnapEncap) \ 349#define EXTRA_LLCSNAP_ENCAP_FROM_PKT_START(_pBufVA, _pExtraLlcSnapEncap) \
351{ \ 350{ \
352 if (((*(_pBufVA + 12) << 8) + *(_pBufVA + 13)) > 1500) \ 351 if (((*(_pBufVA + 12) << 8) + *(_pBufVA + 13)) > 1500) { \
353 { \
354 _pExtraLlcSnapEncap = SNAP_802_1H; \ 352 _pExtraLlcSnapEncap = SNAP_802_1H; \
355 if (NdisEqualMemory(IPX, _pBufVA + 12, 2) || \ 353 if (NdisEqualMemory(IPX, _pBufVA + 12, 2) || \
356 NdisEqualMemory(APPLE_TALK, _pBufVA + 12, 2)) \ 354 NdisEqualMemory(APPLE_TALK, _pBufVA + 12, 2)) { \
357 { \
358 _pExtraLlcSnapEncap = SNAP_BRIDGE_TUNNEL; \ 355 _pExtraLlcSnapEncap = SNAP_BRIDGE_TUNNEL; \
359 } \ 356 } \
360 } \ 357 } \
361 else \ 358 else { \
362 { \
363 _pExtraLlcSnapEncap = NULL; \ 359 _pExtraLlcSnapEncap = NULL; \
364 } \ 360 } \
365} 361}
@@ -367,17 +363,14 @@ struct rt_rtmp_sg_list {
367/* New Define for new Tx Path. */ 363/* New Define for new Tx Path. */
368#define EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(_pBufVA, _pExtraLlcSnapEncap) \ 364#define EXTRA_LLCSNAP_ENCAP_FROM_PKT_OFFSET(_pBufVA, _pExtraLlcSnapEncap) \
369{ \ 365{ \
370 if (((*(_pBufVA) << 8) + *(_pBufVA + 1)) > 1500) \ 366 if (((*(_pBufVA) << 8) + *(_pBufVA + 1)) > 1500) { \
371 { \
372 _pExtraLlcSnapEncap = SNAP_802_1H; \ 367 _pExtraLlcSnapEncap = SNAP_802_1H; \
373 if (NdisEqualMemory(IPX, _pBufVA, 2) || \ 368 if (NdisEqualMemory(IPX, _pBufVA, 2) || \
374 NdisEqualMemory(APPLE_TALK, _pBufVA, 2)) \ 369 NdisEqualMemory(APPLE_TALK, _pBufVA, 2)) { \
375 { \
376 _pExtraLlcSnapEncap = SNAP_BRIDGE_TUNNEL; \ 370 _pExtraLlcSnapEncap = SNAP_BRIDGE_TUNNEL; \
377 } \ 371 } \
378 } \ 372 } \
379 else \ 373 else { \
380 { \
381 _pExtraLlcSnapEncap = NULL; \ 374 _pExtraLlcSnapEncap = NULL; \
382 } \ 375 } \
383} 376}
@@ -399,33 +392,29 @@ struct rt_rtmp_sg_list {
399#define CONVERT_TO_802_3(_p8023hdr, _pDA, _pSA, _pData, _DataSize, _pRemovedLLCSNAP) \ 392#define CONVERT_TO_802_3(_p8023hdr, _pDA, _pSA, _pData, _DataSize, _pRemovedLLCSNAP) \
400{ \ 393{ \
401 char LLC_Len[2]; \ 394 char LLC_Len[2]; \
402 \ 395 \
403 _pRemovedLLCSNAP = NULL; \ 396 _pRemovedLLCSNAP = NULL; \
404 if (NdisEqualMemory(SNAP_802_1H, _pData, 6) || \ 397 if (NdisEqualMemory(SNAP_802_1H, _pData, 6) || \
405 NdisEqualMemory(SNAP_BRIDGE_TUNNEL, _pData, 6)) \ 398 NdisEqualMemory(SNAP_BRIDGE_TUNNEL, _pData, 6)) { \
406 { \ 399 u8 *pProto = _pData + 6; \
407 u8 *pProto = _pData + 6; \ 400 \
408 \ 401 if ((NdisEqualMemory(IPX, pProto, 2) || NdisEqualMemory(APPLE_TALK, pProto, 2)) && \
409 if ((NdisEqualMemory(IPX, pProto, 2) || NdisEqualMemory(APPLE_TALK, pProto, 2)) && \ 402 NdisEqualMemory(SNAP_802_1H, _pData, 6)) { \
410 NdisEqualMemory(SNAP_802_1H, _pData, 6)) \ 403 LLC_Len[0] = (u8)(_DataSize / 256); \
411 { \ 404 LLC_Len[1] = (u8)(_DataSize % 256); \
412 LLC_Len[0] = (u8)(_DataSize / 256); \ 405 MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, LLC_Len); \
413 LLC_Len[1] = (u8)(_DataSize % 256); \ 406 } \
414 MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, LLC_Len); \ 407 else { \
415 } \ 408 MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, pProto); \
416 else \ 409 _pRemovedLLCSNAP = _pData; \
417 { \ 410 _DataSize -= LENGTH_802_1_H; \
418 MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, pProto); \ 411 _pData += LENGTH_802_1_H; \
419 _pRemovedLLCSNAP = _pData; \ 412 } \
420 _DataSize -= LENGTH_802_1_H; \
421 _pData += LENGTH_802_1_H; \
422 } \
423 } \ 413 } \
424 else \ 414 else { \
425 { \ 415 LLC_Len[0] = (u8)(_DataSize / 256); \
426 LLC_Len[0] = (u8)(_DataSize / 256); \ 416 LLC_Len[1] = (u8)(_DataSize % 256); \
427 LLC_Len[1] = (u8)(_DataSize % 256); \ 417 MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, LLC_Len); \
428 MAKE_802_3_HEADER(_p8023hdr, _pDA, _pSA, LLC_Len); \
429 } \ 418 } \
430} 419}
431 420
@@ -438,19 +427,19 @@ struct rt_rtmp_sg_list {
438 u32 High32TSF, Low32TSF; \ 427 u32 High32TSF, Low32TSF; \
439 RTMP_IO_READ32(_pAd, TSF_TIMER_DW1, &High32TSF); \ 428 RTMP_IO_READ32(_pAd, TSF_TIMER_DW1, &High32TSF); \
440 RTMP_IO_READ32(_pAd, TSF_TIMER_DW0, &Low32TSF); \ 429 RTMP_IO_READ32(_pAd, TSF_TIMER_DW0, &Low32TSF); \
441 MlmeEnqueueForRecv(_pAd, Wcid, High32TSF, Low32TSF, (u8)_Rssi0, (u8)_Rssi1,(u8)_Rssi2,_FrameSize, _pFrame, (u8)_PlcpSignal); \ 430 MlmeEnqueueForRecv(_pAd, Wcid, High32TSF, Low32TSF, (u8)_Rssi0, (u8)_Rssi1, (u8)_Rssi2, _FrameSize, _pFrame, (u8)_PlcpSignal); \
442} 431}
443#endif /* RTMP_MAC_PCI // */ 432#endif /* RTMP_MAC_PCI // */
444#ifdef RTMP_MAC_USB 433#ifdef RTMP_MAC_USB
445#define REPORT_MGMT_FRAME_TO_MLME(_pAd, Wcid, _pFrame, _FrameSize, _Rssi0, _Rssi1, _Rssi2, _PlcpSignal) \ 434#define REPORT_MGMT_FRAME_TO_MLME(_pAd, Wcid, _pFrame, _FrameSize, _Rssi0, _Rssi1, _Rssi2, _PlcpSignal) \
446{ \ 435{ \
447 u32 High32TSF=0, Low32TSF=0; \ 436 u32 High32TSF = 0, Low32TSF = 0; \
448 MlmeEnqueueForRecv(_pAd, Wcid, High32TSF, Low32TSF, (u8)_Rssi0, (u8)_Rssi1,(u8)_Rssi2,_FrameSize, _pFrame, (u8)_PlcpSignal); \ 437 MlmeEnqueueForRecv(_pAd, Wcid, High32TSF, Low32TSF, (u8)_Rssi0, (u8)_Rssi1, (u8)_Rssi2, _FrameSize, _pFrame, (u8)_PlcpSignal); \
449} 438}
450#endif /* RTMP_MAC_USB // */ 439#endif /* RTMP_MAC_USB // */
451 440
452#define MAC_ADDR_EQUAL(pAddr1,pAddr2) RTMPEqualMemory((void *)(pAddr1), (void *)(pAddr2), MAC_ADDR_LEN) 441#define MAC_ADDR_EQUAL(pAddr1, pAddr2) RTMPEqualMemory((void *)(pAddr1), (void *)(pAddr2), MAC_ADDR_LEN)
453#define SSID_EQUAL(ssid1, len1, ssid2, len2) ((len1==len2) && (RTMPEqualMemory(ssid1, ssid2, len1))) 442#define SSID_EQUAL(ssid1, len1, ssid2, len2) ((len1 == len2) && (RTMPEqualMemory(ssid1, ssid2, len1)))
454 443
455/* */ 444/* */
456/* Check if it is Japan W53(ch52,56,60,64) channel. */ 445/* Check if it is Japan W53(ch52,56,60,64) channel. */
@@ -1054,7 +1043,7 @@ typedef union _BACAP_STRUC {
1054 u32 MMPSmode:2; /* MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable */ 1043 u32 MMPSmode:2; /* MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable */
1055 u32 bHtAdhoc:1; /* adhoc can use ht rate. */ 1044 u32 bHtAdhoc:1; /* adhoc can use ht rate. */
1056 u32 b2040CoexistScanSup:1; /*As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz. */ 1045 u32 b2040CoexistScanSup:1; /*As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz. */
1057 u32 : 4; 1046 u32: 4;
1058 } field; 1047 } field;
1059 u32 word; 1048 u32 word;
1060} BACAP_STRUC, *PBACAP_STRUC; 1049} BACAP_STRUC, *PBACAP_STRUC;
@@ -1334,7 +1323,7 @@ struct rt_common_config {
1334 1323
1335 BOOLEAN PSPXlink; /* 0: Disable. 1: Enable */ 1324 BOOLEAN PSPXlink; /* 0: Disable. 1: Enable */
1336 1325
1337#if defined(RT305x)||defined(RT30xx) 1326#if defined(RT305x) || defined(RT30xx)
1338 /* request by Gary, for High Power issue */ 1327 /* request by Gary, for High Power issue */
1339 u8 HighPowerPatchDisabled; 1328 u8 HighPowerPatchDisabled;
1340#endif 1329#endif
@@ -2169,8 +2158,8 @@ struct rt_rtmp_adapter {
2169 **************************************************************************/ 2158 **************************************************************************/
2170struct rt_rx_blk { 2159struct rt_rx_blk {
2171 RT28XX_RXD_STRUC RxD; 2160 RT28XX_RXD_STRUC RxD;
2172 struct rt_rxwi * pRxWI; 2161 struct rt_rxwi *pRxWI;
2173 struct rt_header_802_11 * pHeader; 2162 struct rt_header_802_11 *pHeader;
2174 void *pRxPacket; 2163 void *pRxPacket;
2175 u8 *pData; 2164 u8 *pData;
2176 u16 DataSize; 2165 u16 DataSize;
@@ -2268,7 +2257,7 @@ struct rt_tx_blk {
2268 * Other static inline function definitions 2257 * Other static inline function definitions
2269 **************************************************************************/ 2258 **************************************************************************/
2270static inline void ConvertMulticastIP2MAC(u8 *pIpAddr, 2259static inline void ConvertMulticastIP2MAC(u8 *pIpAddr,
2271 u8 ** ppMacAddr, 2260 u8 **ppMacAddr,
2272 u16 ProtoType) 2261 u16 ProtoType)
2273{ 2262{
2274 if (pIpAddr == NULL) 2263 if (pIpAddr == NULL)
@@ -2310,7 +2299,7 @@ char *GetBW(int BW);
2310/* Private routines in rtmp_init.c */ 2299/* Private routines in rtmp_init.c */
2311/* */ 2300/* */
2312int RTMPAllocAdapterBlock(void *handle, 2301int RTMPAllocAdapterBlock(void *handle,
2313 struct rt_rtmp_adapter * * ppAdapter); 2302 struct rt_rtmp_adapter **ppAdapter);
2314 2303
2315int RTMPAllocTxRxRingMemory(struct rt_rtmp_adapter *pAd); 2304int RTMPAllocTxRxRingMemory(struct rt_rtmp_adapter *pAd);
2316 2305
@@ -2431,11 +2420,11 @@ void ORIBATimerTimeout(struct rt_rtmp_adapter *pAd);
2431void SendRefreshBAR(struct rt_rtmp_adapter *pAd, struct rt_mac_table_entry *pEntry); 2420void SendRefreshBAR(struct rt_rtmp_adapter *pAd, struct rt_mac_table_entry *pEntry);
2432 2421
2433void ActHeaderInit(struct rt_rtmp_adapter *pAd, 2422void ActHeaderInit(struct rt_rtmp_adapter *pAd,
2434 struct rt_header_802_11 * pHdr80211, 2423 struct rt_header_802_11 *pHdr80211,
2435 u8 *Addr1, u8 *Addr2, u8 *Addr3); 2424 u8 *Addr1, u8 *Addr2, u8 *Addr3);
2436 2425
2437void BarHeaderInit(struct rt_rtmp_adapter *pAd, 2426void BarHeaderInit(struct rt_rtmp_adapter *pAd,
2438 struct rt_frame_bar * pCntlBar, u8 *pDA, u8 *pSA); 2427 struct rt_frame_bar *pCntlBar, u8 *pDA, u8 *pSA);
2439 2428
2440void InsertActField(struct rt_rtmp_adapter *pAd, 2429void InsertActField(struct rt_rtmp_adapter *pAd,
2441 u8 *pFrameBuf, 2430 u8 *pFrameBuf,
@@ -2443,7 +2432,7 @@ void InsertActField(struct rt_rtmp_adapter *pAd,
2443 2432
2444BOOLEAN CntlEnqueueForRecv(struct rt_rtmp_adapter *pAd, 2433BOOLEAN CntlEnqueueForRecv(struct rt_rtmp_adapter *pAd,
2445 unsigned long Wcid, 2434 unsigned long Wcid,
2446 unsigned long MsgLen, struct rt_frame_ba_req * pMsg); 2435 unsigned long MsgLen, struct rt_frame_ba_req *pMsg);
2447 2436
2448/* */ 2437/* */
2449/* Private routines in rtmp_data.c */ 2438/* Private routines in rtmp_data.c */
@@ -2511,7 +2500,7 @@ int MlmeDataHardTransmit(struct rt_rtmp_adapter *pAd,
2511 u8 QueIdx, void *pPacket); 2500 u8 QueIdx, void *pPacket);
2512 2501
2513void RTMPWriteTxDescriptor(struct rt_rtmp_adapter *pAd, 2502void RTMPWriteTxDescriptor(struct rt_rtmp_adapter *pAd,
2514 struct rt_txd * pTxD, IN BOOLEAN bWIV, u8 QSEL); 2503 struct rt_txd *pTxD, IN BOOLEAN bWIV, u8 QSEL);
2515#endif /* RTMP_MAC_PCI // */ 2504#endif /* RTMP_MAC_PCI // */
2516 2505
2517u16 RTMPCalcDuration(struct rt_rtmp_adapter *pAd, u8 Rate, unsigned long Size); 2506u16 RTMPCalcDuration(struct rt_rtmp_adapter *pAd, u8 Rate, unsigned long Size);
@@ -2527,10 +2516,10 @@ void RTMPWriteTxWI(struct rt_rtmp_adapter *pAd, struct rt_txwi * pTxWI, IN BOOLE
2527 IN BOOLEAN CfAck, IN HTTRANSMIT_SETTING * pTransmit); 2516 IN BOOLEAN CfAck, IN HTTRANSMIT_SETTING * pTransmit);
2528 2517
2529void RTMPWriteTxWI_Data(struct rt_rtmp_adapter *pAd, 2518void RTMPWriteTxWI_Data(struct rt_rtmp_adapter *pAd,
2530 struct rt_txwi * pTxWI, struct rt_tx_blk *pTxBlk); 2519 struct rt_txwi *pTxWI, struct rt_tx_blk *pTxBlk);
2531 2520
2532void RTMPWriteTxWI_Cache(struct rt_rtmp_adapter *pAd, 2521void RTMPWriteTxWI_Cache(struct rt_rtmp_adapter *pAd,
2533 struct rt_txwi * pTxWI, struct rt_tx_blk *pTxBlk); 2522 struct rt_txwi *pTxWI, struct rt_tx_blk *pTxBlk);
2534 2523
2535void RTMPSuspendMsduTransmission(struct rt_rtmp_adapter *pAd); 2524void RTMPSuspendMsduTransmission(struct rt_rtmp_adapter *pAd);
2536 2525
@@ -2573,10 +2562,10 @@ void WpaStaGroupKeySetting(struct rt_rtmp_adapter *pAd);
2573int RTMPCloneNdisPacket(struct rt_rtmp_adapter *pAd, 2562int RTMPCloneNdisPacket(struct rt_rtmp_adapter *pAd,
2574 IN BOOLEAN pInsAMSDUHdr, 2563 IN BOOLEAN pInsAMSDUHdr,
2575 void *pInPacket, 2564 void *pInPacket,
2576 void ** ppOutPacket); 2565 void **ppOutPacket);
2577 2566
2578int RTMPAllocateNdisPacket(struct rt_rtmp_adapter *pAd, 2567int RTMPAllocateNdisPacket(struct rt_rtmp_adapter *pAd,
2579 void ** pPacket, 2568 void **pPacket,
2580 u8 *pHeader, 2569 u8 *pHeader,
2581 u32 HeaderLen, 2570 u32 HeaderLen,
2582 u8 *pData, u32 DataLen); 2571 u8 *pData, u32 DataLen);
@@ -2717,7 +2706,7 @@ BOOLEAN AsicCheckCommanOk(struct rt_rtmp_adapter *pAd, u8 Command);
2717void MacAddrRandomBssid(struct rt_rtmp_adapter *pAd, u8 *pAddr); 2706void MacAddrRandomBssid(struct rt_rtmp_adapter *pAd, u8 *pAddr);
2718 2707
2719void MgtMacHeaderInit(struct rt_rtmp_adapter *pAd, 2708void MgtMacHeaderInit(struct rt_rtmp_adapter *pAd,
2720 struct rt_header_802_11 * pHdr80211, 2709 struct rt_header_802_11 *pHdr80211,
2721 u8 SubType, 2710 u8 SubType,
2722 u8 ToDs, u8 *pDA, u8 *pBssid); 2711 u8 ToDs, u8 *pDA, u8 *pBssid);
2723 2712
@@ -2796,7 +2785,7 @@ void MlmeQueueDestroy(struct rt_mlme_queue *Queue);
2796 2785
2797BOOLEAN MlmeEnqueue(struct rt_rtmp_adapter *pAd, 2786BOOLEAN MlmeEnqueue(struct rt_rtmp_adapter *pAd,
2798 unsigned long Machine, 2787 unsigned long Machine,
2799 unsigned long MsgType, unsigned long MsgLen, void * Msg); 2788 unsigned long MsgType, unsigned long MsgLen, void *Msg);
2800 2789
2801BOOLEAN MlmeEnqueueForRecv(struct rt_rtmp_adapter *pAd, 2790BOOLEAN MlmeEnqueueForRecv(struct rt_rtmp_adapter *pAd,
2802 unsigned long Wcid, 2791 unsigned long Wcid,
@@ -2807,7 +2796,7 @@ BOOLEAN MlmeEnqueueForRecv(struct rt_rtmp_adapter *pAd,
2807 u8 Rssi2, 2796 u8 Rssi2,
2808 unsigned long MsgLen, void *Msg, u8 Signal); 2797 unsigned long MsgLen, void *Msg, u8 Signal);
2809 2798
2810BOOLEAN MlmeDequeue(struct rt_mlme_queue *Queue, struct rt_mlme_queue_elem ** Elem); 2799BOOLEAN MlmeDequeue(struct rt_mlme_queue *Queue, struct rt_mlme_queue_elem **Elem);
2811 2800
2812void MlmeRestartStateMachine(struct rt_rtmp_adapter *pAd); 2801void MlmeRestartStateMachine(struct rt_rtmp_adapter *pAd);
2813 2802
@@ -2816,8 +2805,8 @@ BOOLEAN MlmeQueueEmpty(struct rt_mlme_queue *Queue);
2816BOOLEAN MlmeQueueFull(struct rt_mlme_queue *Queue); 2805BOOLEAN MlmeQueueFull(struct rt_mlme_queue *Queue);
2817 2806
2818BOOLEAN MsgTypeSubst(struct rt_rtmp_adapter *pAd, 2807BOOLEAN MsgTypeSubst(struct rt_rtmp_adapter *pAd,
2819 struct rt_frame_802_11 * pFrame, 2808 struct rt_frame_802_11 *pFrame,
2820 int * Machine, int * MsgType); 2809 int *Machine, int *MsgType);
2821 2810
2822void StateMachineInit(struct rt_state_machine *Sm, 2811void StateMachineInit(struct rt_state_machine *Sm,
2823 IN STATE_MACHINE_FUNC Trans[], 2812 IN STATE_MACHINE_FUNC Trans[],
@@ -2895,8 +2884,8 @@ void AssocPostProc(struct rt_rtmp_adapter *pAd,
2895 u8 ExtRate[], 2884 u8 ExtRate[],
2896 u8 ExtRateLen, 2885 u8 ExtRateLen,
2897 struct rt_edca_parm *pEdcaParm, 2886 struct rt_edca_parm *pEdcaParm,
2898 struct rt_ht_capability_ie * pHtCapability, 2887 struct rt_ht_capability_ie *pHtCapability,
2899 u8 HtCapabilityLen, struct rt_add_ht_info_ie * pAddHtInfo); 2888 u8 HtCapabilityLen, struct rt_add_ht_info_ie *pAddHtInfo);
2900 2889
2901void AuthStateMachineInit(struct rt_rtmp_adapter *pAd, 2890void AuthStateMachineInit(struct rt_rtmp_adapter *pAd,
2902 struct rt_state_machine *sm, OUT STATE_MACHINE_FUNC Trans[]); 2891 struct rt_state_machine *sm, OUT STATE_MACHINE_FUNC Trans[]);
@@ -2928,7 +2917,7 @@ void AuthRspStateMachineInit(struct rt_rtmp_adapter *pAd,
2928void PeerDeauthAction(struct rt_rtmp_adapter *pAd, struct rt_mlme_queue_elem *Elem); 2917void PeerDeauthAction(struct rt_rtmp_adapter *pAd, struct rt_mlme_queue_elem *Elem);
2929 2918
2930void PeerAuthSimpleRspGenAndSend(struct rt_rtmp_adapter *pAd, 2919void PeerAuthSimpleRspGenAndSend(struct rt_rtmp_adapter *pAd,
2931 struct rt_header_802_11 * pHdr80211, 2920 struct rt_header_802_11 *pHdr80211,
2932 u16 Alg, 2921 u16 Alg,
2933 u16 Seq, 2922 u16 Seq,
2934 u16 Reason, u16 Status); 2923 u16 Reason, u16 Status);
@@ -3054,133 +3043,133 @@ void ScanNextChannel(struct rt_rtmp_adapter *pAd);
3054unsigned long MakeIbssBeacon(struct rt_rtmp_adapter *pAd); 3043unsigned long MakeIbssBeacon(struct rt_rtmp_adapter *pAd);
3055 3044
3056BOOLEAN MlmeScanReqSanity(struct rt_rtmp_adapter *pAd, 3045BOOLEAN MlmeScanReqSanity(struct rt_rtmp_adapter *pAd,
3057 void * Msg, 3046 void *Msg,
3058 unsigned long MsgLen, 3047 unsigned long MsgLen,
3059 u8 * BssType, 3048 u8 *BssType,
3060 char ssid[], 3049 char ssid[],
3061 u8 * SsidLen, u8 * ScanType); 3050 u8 *SsidLen, u8 *ScanType);
3062 3051
3063BOOLEAN PeerBeaconAndProbeRspSanity(struct rt_rtmp_adapter *pAd, 3052BOOLEAN PeerBeaconAndProbeRspSanity(struct rt_rtmp_adapter *pAd,
3064 void * Msg, 3053 void *Msg,
3065 unsigned long MsgLen, 3054 unsigned long MsgLen,
3066 u8 MsgChannel, 3055 u8 MsgChannel,
3067 u8 *pAddr2, 3056 u8 *pAddr2,
3068 u8 *pBssid, 3057 u8 *pBssid,
3069 char Ssid[], 3058 char Ssid[],
3070 u8 * pSsidLen, 3059 u8 *pSsidLen,
3071 u8 * pBssType, 3060 u8 *pBssType,
3072 u16 * pBeaconPeriod, 3061 u16 *pBeaconPeriod,
3073 u8 * pChannel, 3062 u8 *pChannel,
3074 u8 * pNewChannel, 3063 u8 *pNewChannel,
3075 OUT LARGE_INTEGER * pTimestamp, 3064 OUT LARGE_INTEGER * pTimestamp,
3076 struct rt_cf_parm * pCfParm, 3065 struct rt_cf_parm *pCfParm,
3077 u16 * pAtimWin, 3066 u16 *pAtimWin,
3078 u16 * pCapabilityInfo, 3067 u16 *pCapabilityInfo,
3079 u8 * pErp, 3068 u8 *pErp,
3080 u8 * pDtimCount, 3069 u8 *pDtimCount,
3081 u8 * pDtimPeriod, 3070 u8 *pDtimPeriod,
3082 u8 * pBcastFlag, 3071 u8 *pBcastFlag,
3083 u8 * pMessageToMe, 3072 u8 *pMessageToMe,
3084 u8 SupRate[], 3073 u8 SupRate[],
3085 u8 * pSupRateLen, 3074 u8 *pSupRateLen,
3086 u8 ExtRate[], 3075 u8 ExtRate[],
3087 u8 * pExtRateLen, 3076 u8 *pExtRateLen,
3088 u8 * pCkipFlag, 3077 u8 *pCkipFlag,
3089 u8 * pAironetCellPowerLimit, 3078 u8 *pAironetCellPowerLimit,
3090 struct rt_edca_parm *pEdcaParm, 3079 struct rt_edca_parm *pEdcaParm,
3091 struct rt_qbss_load_parm *pQbssLoad, 3080 struct rt_qbss_load_parm *pQbssLoad,
3092 struct rt_qos_capability_parm *pQosCapability, 3081 struct rt_qos_capability_parm *pQosCapability,
3093 unsigned long * pRalinkIe, 3082 unsigned long *pRalinkIe,
3094 u8 * pHtCapabilityLen, 3083 u8 *pHtCapabilityLen,
3095 u8 * pPreNHtCapabilityLen, 3084 u8 *pPreNHtCapabilityLen,
3096 struct rt_ht_capability_ie * pHtCapability, 3085 struct rt_ht_capability_ie *pHtCapability,
3097 u8 * AddHtInfoLen, 3086 u8 *AddHtInfoLen,
3098 struct rt_add_ht_info_ie * AddHtInfo, 3087 struct rt_add_ht_info_ie *AddHtInfo,
3099 u8 * NewExtChannel, 3088 u8 *NewExtChannel,
3100 u16 * LengthVIE, 3089 u16 *LengthVIE,
3101 struct rt_ndis_802_11_variable_ies *pVIE); 3090 struct rt_ndis_802_11_variable_ies *pVIE);
3102 3091
3103BOOLEAN PeerAddBAReqActionSanity(struct rt_rtmp_adapter *pAd, 3092BOOLEAN PeerAddBAReqActionSanity(struct rt_rtmp_adapter *pAd,
3104 void * pMsg, 3093 void *pMsg,
3105 unsigned long MsgLen, u8 *pAddr2); 3094 unsigned long MsgLen, u8 *pAddr2);
3106 3095
3107BOOLEAN PeerAddBARspActionSanity(struct rt_rtmp_adapter *pAd, 3096BOOLEAN PeerAddBARspActionSanity(struct rt_rtmp_adapter *pAd,
3108 void * pMsg, unsigned long MsgLen); 3097 void *pMsg, unsigned long MsgLen);
3109 3098
3110BOOLEAN PeerDelBAActionSanity(struct rt_rtmp_adapter *pAd, 3099BOOLEAN PeerDelBAActionSanity(struct rt_rtmp_adapter *pAd,
3111 u8 Wcid, void * pMsg, unsigned long MsgLen); 3100 u8 Wcid, void *pMsg, unsigned long MsgLen);
3112 3101
3113BOOLEAN MlmeAssocReqSanity(struct rt_rtmp_adapter *pAd, 3102BOOLEAN MlmeAssocReqSanity(struct rt_rtmp_adapter *pAd,
3114 void * Msg, 3103 void *Msg,
3115 unsigned long MsgLen, 3104 unsigned long MsgLen,
3116 u8 *pApAddr, 3105 u8 *pApAddr,
3117 u16 * CapabilityInfo, 3106 u16 *CapabilityInfo,
3118 unsigned long * Timeout, u16 * ListenIntv); 3107 unsigned long *Timeout, u16 *ListenIntv);
3119 3108
3120BOOLEAN MlmeAuthReqSanity(struct rt_rtmp_adapter *pAd, 3109BOOLEAN MlmeAuthReqSanity(struct rt_rtmp_adapter *pAd,
3121 void * Msg, 3110 void *Msg,
3122 unsigned long MsgLen, 3111 unsigned long MsgLen,
3123 u8 *pAddr, 3112 u8 *pAddr,
3124 unsigned long * Timeout, u16 * Alg); 3113 unsigned long *Timeout, u16 *Alg);
3125 3114
3126BOOLEAN MlmeStartReqSanity(struct rt_rtmp_adapter *pAd, 3115BOOLEAN MlmeStartReqSanity(struct rt_rtmp_adapter *pAd,
3127 void * Msg, 3116 void *Msg,
3128 unsigned long MsgLen, 3117 unsigned long MsgLen,
3129 char Ssid[], u8 * Ssidlen); 3118 char Ssid[], u8 *Ssidlen);
3130 3119
3131BOOLEAN PeerAuthSanity(struct rt_rtmp_adapter *pAd, 3120BOOLEAN PeerAuthSanity(struct rt_rtmp_adapter *pAd,
3132 void * Msg, 3121 void *Msg,
3133 unsigned long MsgLen, 3122 unsigned long MsgLen,
3134 u8 *pAddr, 3123 u8 *pAddr,
3135 u16 * Alg, 3124 u16 *Alg,
3136 u16 * Seq, 3125 u16 *Seq,
3137 u16 * Status, char ChlgText[]); 3126 u16 *Status, char ChlgText[]);
3138 3127
3139BOOLEAN PeerAssocRspSanity(struct rt_rtmp_adapter *pAd, void * pMsg, unsigned long MsgLen, u8 *pAddr2, u16 * pCapabilityInfo, u16 * pStatus, u16 * pAid, u8 SupRate[], u8 * pSupRateLen, u8 ExtRate[], u8 * pExtRateLen, struct rt_ht_capability_ie * pHtCapability, struct rt_add_ht_info_ie * pAddHtInfo, /* AP might use this additional ht info IE */ 3128BOOLEAN PeerAssocRspSanity(struct rt_rtmp_adapter *pAd, void *pMsg, unsigned long MsgLen, u8 *pAddr2, u16 *pCapabilityInfo, u16 *pStatus, u16 *pAid, u8 SupRate[], u8 *pSupRateLen, u8 ExtRate[], u8 *pExtRateLen, struct rt_ht_capability_ie *pHtCapability, struct rt_add_ht_info_ie *pAddHtInfo, /* AP might use this additional ht info IE */
3140 u8 * pHtCapabilityLen, 3129 u8 *pHtCapabilityLen,
3141 u8 * pAddHtInfoLen, 3130 u8 *pAddHtInfoLen,
3142 u8 * pNewExtChannelOffset, 3131 u8 *pNewExtChannelOffset,
3143 struct rt_edca_parm *pEdcaParm, u8 * pCkipFlag); 3132 struct rt_edca_parm *pEdcaParm, u8 *pCkipFlag);
3144 3133
3145BOOLEAN PeerDisassocSanity(struct rt_rtmp_adapter *pAd, 3134BOOLEAN PeerDisassocSanity(struct rt_rtmp_adapter *pAd,
3146 void * Msg, 3135 void *Msg,
3147 unsigned long MsgLen, 3136 unsigned long MsgLen,
3148 u8 *pAddr2, u16 * Reason); 3137 u8 *pAddr2, u16 *Reason);
3149 3138
3150BOOLEAN PeerWpaMessageSanity(struct rt_rtmp_adapter *pAd, 3139BOOLEAN PeerWpaMessageSanity(struct rt_rtmp_adapter *pAd,
3151 struct rt_eapol_packet * pMsg, 3140 struct rt_eapol_packet *pMsg,
3152 unsigned long MsgLen, 3141 unsigned long MsgLen,
3153 u8 MsgType, struct rt_mac_table_entry *pEntry); 3142 u8 MsgType, struct rt_mac_table_entry *pEntry);
3154 3143
3155BOOLEAN PeerDeauthSanity(struct rt_rtmp_adapter *pAd, 3144BOOLEAN PeerDeauthSanity(struct rt_rtmp_adapter *pAd,
3156 void * Msg, 3145 void *Msg,
3157 unsigned long MsgLen, 3146 unsigned long MsgLen,
3158 u8 *pAddr2, u16 * Reason); 3147 u8 *pAddr2, u16 *Reason);
3159 3148
3160BOOLEAN PeerProbeReqSanity(struct rt_rtmp_adapter *pAd, 3149BOOLEAN PeerProbeReqSanity(struct rt_rtmp_adapter *pAd,
3161 void * Msg, 3150 void *Msg,
3162 unsigned long MsgLen, 3151 unsigned long MsgLen,
3163 u8 *pAddr2, 3152 u8 *pAddr2,
3164 char Ssid[], u8 * pSsidLen); 3153 char Ssid[], u8 *pSsidLen);
3165 3154
3166BOOLEAN GetTimBit(char * Ptr, 3155BOOLEAN GetTimBit(char *Ptr,
3167 u16 Aid, 3156 u16 Aid,
3168 u8 * TimLen, 3157 u8 *TimLen,
3169 u8 * BcastFlag, 3158 u8 *BcastFlag,
3170 u8 * DtimCount, 3159 u8 *DtimCount,
3171 u8 * DtimPeriod, u8 * MessageToMe); 3160 u8 *DtimPeriod, u8 *MessageToMe);
3172 3161
3173u8 ChannelSanity(struct rt_rtmp_adapter *pAd, u8 channel); 3162u8 ChannelSanity(struct rt_rtmp_adapter *pAd, u8 channel);
3174 3163
3175NDIS_802_11_NETWORK_TYPE NetworkTypeInUseSanity(struct rt_bss_entry *pBss); 3164NDIS_802_11_NETWORK_TYPE NetworkTypeInUseSanity(struct rt_bss_entry *pBss);
3176 3165
3177BOOLEAN MlmeDelBAReqSanity(struct rt_rtmp_adapter *pAd, 3166BOOLEAN MlmeDelBAReqSanity(struct rt_rtmp_adapter *pAd,
3178 void * Msg, unsigned long MsgLen); 3167 void *Msg, unsigned long MsgLen);
3179 3168
3180BOOLEAN MlmeAddBAReqSanity(struct rt_rtmp_adapter *pAd, 3169BOOLEAN MlmeAddBAReqSanity(struct rt_rtmp_adapter *pAd,
3181 void * Msg, unsigned long MsgLen, u8 *pAddr2); 3170 void *Msg, unsigned long MsgLen, u8 *pAddr2);
3182 3171
3183unsigned long MakeOutgoingFrame(u8 * Buffer, unsigned long * Length, ...); 3172unsigned long MakeOutgoingFrame(u8 *Buffer, unsigned long *Length, ...);
3184 3173
3185void LfsrInit(struct rt_rtmp_adapter *pAd, unsigned long Seed); 3174void LfsrInit(struct rt_rtmp_adapter *pAd, unsigned long Seed);
3186 3175
@@ -3215,7 +3204,7 @@ void MlmeSetTxRate(struct rt_rtmp_adapter *pAd,
3215 3204
3216void MlmeSelectTxRateTable(struct rt_rtmp_adapter *pAd, 3205void MlmeSelectTxRateTable(struct rt_rtmp_adapter *pAd,
3217 struct rt_mac_table_entry *pEntry, 3206 struct rt_mac_table_entry *pEntry,
3218 u8 ** ppTable, 3207 u8 **ppTable,
3219 u8 *pTableSize, u8 *pInitTxRateIdx); 3208 u8 *pTableSize, u8 *pInitTxRateIdx);
3220 3209
3221void MlmeCalculateChannelQuality(struct rt_rtmp_adapter *pAd, 3210void MlmeCalculateChannelQuality(struct rt_rtmp_adapter *pAd,
@@ -3235,15 +3224,15 @@ void MlmeUpdateTxRates(struct rt_rtmp_adapter *pAd,
3235void MlmeUpdateHtTxRates(struct rt_rtmp_adapter *pAd, u8 apidx); 3224void MlmeUpdateHtTxRates(struct rt_rtmp_adapter *pAd, u8 apidx);
3236 3225
3237void RTMPCheckRates(struct rt_rtmp_adapter *pAd, 3226void RTMPCheckRates(struct rt_rtmp_adapter *pAd,
3238 IN u8 SupRate[], IN u8 * SupRateLen); 3227 IN u8 SupRate[], IN u8 *SupRateLen);
3239 3228
3240BOOLEAN RTMPCheckChannel(struct rt_rtmp_adapter *pAd, 3229BOOLEAN RTMPCheckChannel(struct rt_rtmp_adapter *pAd,
3241 u8 CentralChannel, u8 Channel); 3230 u8 CentralChannel, u8 Channel);
3242 3231
3243BOOLEAN RTMPCheckHt(struct rt_rtmp_adapter *pAd, 3232BOOLEAN RTMPCheckHt(struct rt_rtmp_adapter *pAd,
3244 u8 Wcid, 3233 u8 Wcid,
3245 struct rt_ht_capability_ie * pHtCapability, 3234 struct rt_ht_capability_ie *pHtCapability,
3246 struct rt_add_ht_info_ie * pAddHtInfo); 3235 struct rt_add_ht_info_ie *pAddHtInfo);
3247 3236
3248void StaQuickResponeForRateUpExec(void *SystemSpecific1, 3237void StaQuickResponeForRateUpExec(void *SystemSpecific1,
3249 void *FunctionContext, 3238 void *FunctionContext,
@@ -3268,7 +3257,7 @@ int set_eFusedump_Proc(struct rt_rtmp_adapter *pAd, char *arg);
3268 3257
3269void eFusePhysicalReadRegisters(struct rt_rtmp_adapter *pAd, 3258void eFusePhysicalReadRegisters(struct rt_rtmp_adapter *pAd,
3270 u16 Offset, 3259 u16 Offset,
3271 u16 Length, u16 * pData); 3260 u16 Length, u16 *pData);
3272 3261
3273int RtmpEfuseSupportCheck(struct rt_rtmp_adapter *pAd); 3262int RtmpEfuseSupportCheck(struct rt_rtmp_adapter *pAd);
3274 3263
@@ -3391,7 +3380,7 @@ int RT_CfgSetWepKey(struct rt_rtmp_adapter *pAd,
3391 3380
3392int RT_CfgSetWPAPSKKey(struct rt_rtmp_adapter *pAd, 3381int RT_CfgSetWPAPSKKey(struct rt_rtmp_adapter *pAd,
3393 char *keyString, 3382 char *keyString,
3394 u8 * pHashStr, 3383 u8 *pHashStr,
3395 int hashStrLen, u8 *pPMKBuf); 3384 int hashStrLen, u8 *pPMKBuf);
3396 3385
3397/* */ 3386/* */
@@ -3402,9 +3391,9 @@ void RTMPWPARemoveAllKeys(struct rt_rtmp_adapter *pAd);
3402void RTMPSetPhyMode(struct rt_rtmp_adapter *pAd, unsigned long phymode); 3391void RTMPSetPhyMode(struct rt_rtmp_adapter *pAd, unsigned long phymode);
3403 3392
3404void RTMPUpdateHTIE(struct rt_ht_capability *pRtHt, 3393void RTMPUpdateHTIE(struct rt_ht_capability *pRtHt,
3405 u8 * pMcsSet, 3394 u8 *pMcsSet,
3406 struct rt_ht_capability_ie * pHtCapability, 3395 struct rt_ht_capability_ie *pHtCapability,
3407 struct rt_add_ht_info_ie * pAddHtInfo); 3396 struct rt_add_ht_info_ie *pAddHtInfo);
3408 3397
3409void RTMPAddWcidAttributeEntry(struct rt_rtmp_adapter *pAd, 3398void RTMPAddWcidAttributeEntry(struct rt_rtmp_adapter *pAd,
3410 u8 BssIdx, 3399 u8 BssIdx,
@@ -3436,22 +3425,22 @@ void RTMPToWirelessSta(struct rt_rtmp_adapter *pAd,
3436 u32 DataLen, IN BOOLEAN bClearFrame); 3425 u32 DataLen, IN BOOLEAN bClearFrame);
3437 3426
3438void WpaDerivePTK(struct rt_rtmp_adapter *pAd, 3427void WpaDerivePTK(struct rt_rtmp_adapter *pAd,
3439 u8 * PMK, 3428 u8 *PMK,
3440 u8 * ANonce, 3429 u8 *ANonce,
3441 u8 * AA, 3430 u8 *AA,
3442 u8 * SNonce, 3431 u8 *SNonce,
3443 u8 * SA, u8 * output, u32 len); 3432 u8 *SA, u8 *output, u32 len);
3444 3433
3445void GenRandom(struct rt_rtmp_adapter *pAd, u8 * macAddr, u8 * random); 3434void GenRandom(struct rt_rtmp_adapter *pAd, u8 *macAddr, u8 *random);
3446 3435
3447BOOLEAN RTMPCheckWPAframe(struct rt_rtmp_adapter *pAd, 3436BOOLEAN RTMPCheckWPAframe(struct rt_rtmp_adapter *pAd,
3448 struct rt_mac_table_entry *pEntry, 3437 struct rt_mac_table_entry *pEntry,
3449 u8 *pData, 3438 u8 *pData,
3450 unsigned long DataByteCount, u8 FromWhichBSSID); 3439 unsigned long DataByteCount, u8 FromWhichBSSID);
3451 3440
3452void AES_GTK_KEY_UNWRAP(u8 * key, 3441void AES_GTK_KEY_UNWRAP(u8 *key,
3453 u8 * plaintext, 3442 u8 *plaintext,
3454 u32 c_len, u8 * ciphertext); 3443 u32 c_len, u8 *ciphertext);
3455 3444
3456BOOLEAN RTMPParseEapolKeyData(struct rt_rtmp_adapter *pAd, 3445BOOLEAN RTMPParseEapolKeyData(struct rt_rtmp_adapter *pAd,
3457 u8 *pKeyData, 3446 u8 *pKeyData,
@@ -3464,11 +3453,11 @@ void ConstructEapolMsg(struct rt_mac_table_entry *pEntry,
3464 u8 GroupKeyWepStatus, 3453 u8 GroupKeyWepStatus,
3465 u8 MsgType, 3454 u8 MsgType,
3466 u8 DefaultKeyIdx, 3455 u8 DefaultKeyIdx,
3467 u8 * KeyNonce, 3456 u8 *KeyNonce,
3468 u8 * TxRSC, 3457 u8 *TxRSC,
3469 u8 * GTK, 3458 u8 *GTK,
3470 u8 * RSNIE, 3459 u8 *RSNIE,
3471 u8 RSNIE_Len, struct rt_eapol_packet * pMsg); 3460 u8 RSNIE_Len, struct rt_eapol_packet *pMsg);
3472 3461
3473int RTMPSoftDecryptBroadCastData(struct rt_rtmp_adapter *pAd, 3462int RTMPSoftDecryptBroadCastData(struct rt_rtmp_adapter *pAd,
3474 struct rt_rx_blk *pRxBlk, 3463 struct rt_rx_blk *pRxBlk,
@@ -3515,66 +3504,66 @@ void PeerGroupMsg1Action(struct rt_rtmp_adapter *pAd,
3515 3504
3516void PeerGroupMsg2Action(struct rt_rtmp_adapter *pAd, 3505void PeerGroupMsg2Action(struct rt_rtmp_adapter *pAd,
3517 struct rt_mac_table_entry *pEntry, 3506 struct rt_mac_table_entry *pEntry,
3518 void * Msg, u32 MsgLen); 3507 void *Msg, u32 MsgLen);
3519 3508
3520void WpaDeriveGTK(u8 * PMK, 3509void WpaDeriveGTK(u8 *PMK,
3521 u8 * GNonce, 3510 u8 *GNonce,
3522 u8 * AA, u8 * output, u32 len); 3511 u8 *AA, u8 *output, u32 len);
3523 3512
3524void AES_GTK_KEY_WRAP(u8 * key, 3513void AES_GTK_KEY_WRAP(u8 *key,
3525 u8 * plaintext, 3514 u8 *plaintext,
3526 u32 p_len, u8 * ciphertext); 3515 u32 p_len, u8 *ciphertext);
3527 3516
3528/*typedef void (*TIMER_FUNCTION)(unsigned long); */ 3517/*typedef void (*TIMER_FUNCTION)(unsigned long); */
3529 3518
3530/* timeout -- ms */ 3519/* timeout -- ms */
3531void RTMP_SetPeriodicTimer(struct timer_list * pTimer, 3520void RTMP_SetPeriodicTimer(struct timer_list *pTimer,
3532 IN unsigned long timeout); 3521 IN unsigned long timeout);
3533 3522
3534void RTMP_OS_Init_Timer(struct rt_rtmp_adapter *pAd, 3523void RTMP_OS_Init_Timer(struct rt_rtmp_adapter *pAd,
3535 struct timer_list * pTimer, 3524 struct timer_list *pTimer,
3536 IN TIMER_FUNCTION function, void *data); 3525 IN TIMER_FUNCTION function, void *data);
3537 3526
3538void RTMP_OS_Add_Timer(struct timer_list * pTimer, 3527void RTMP_OS_Add_Timer(struct timer_list *pTimer,
3539 IN unsigned long timeout); 3528 IN unsigned long timeout);
3540 3529
3541void RTMP_OS_Mod_Timer(struct timer_list * pTimer, 3530void RTMP_OS_Mod_Timer(struct timer_list *pTimer,
3542 IN unsigned long timeout); 3531 IN unsigned long timeout);
3543 3532
3544void RTMP_OS_Del_Timer(struct timer_list * pTimer, 3533void RTMP_OS_Del_Timer(struct timer_list *pTimer,
3545 OUT BOOLEAN * pCancelled); 3534 OUT BOOLEAN *pCancelled);
3546 3535
3547void RTMP_OS_Release_Packet(struct rt_rtmp_adapter *pAd, struct rt_queue_entry *pEntry); 3536void RTMP_OS_Release_Packet(struct rt_rtmp_adapter *pAd, struct rt_queue_entry *pEntry);
3548 3537
3549void RTMPusecDelay(unsigned long usec); 3538void RTMPusecDelay(unsigned long usec);
3550 3539
3551int os_alloc_mem(struct rt_rtmp_adapter *pAd, 3540int os_alloc_mem(struct rt_rtmp_adapter *pAd,
3552 u8 ** mem, unsigned long size); 3541 u8 **mem, unsigned long size);
3553 3542
3554int os_free_mem(struct rt_rtmp_adapter *pAd, void *mem); 3543int os_free_mem(struct rt_rtmp_adapter *pAd, void *mem);
3555 3544
3556void RTMP_AllocateSharedMemory(struct rt_rtmp_adapter *pAd, 3545void RTMP_AllocateSharedMemory(struct rt_rtmp_adapter *pAd,
3557 unsigned long Length, 3546 unsigned long Length,
3558 IN BOOLEAN Cached, 3547 IN BOOLEAN Cached,
3559 void ** VirtualAddress, 3548 void **VirtualAddress,
3560 dma_addr_t *PhysicalAddress); 3549 dma_addr_t *PhysicalAddress);
3561 3550
3562void RTMPFreeTxRxRingMemory(struct rt_rtmp_adapter *pAd); 3551void RTMPFreeTxRxRingMemory(struct rt_rtmp_adapter *pAd);
3563 3552
3564int AdapterBlockAllocateMemory(void *handle, void ** ppAd); 3553int AdapterBlockAllocateMemory(void *handle, void **ppAd);
3565 3554
3566void RTMP_AllocateTxDescMemory(struct rt_rtmp_adapter *pAd, 3555void RTMP_AllocateTxDescMemory(struct rt_rtmp_adapter *pAd,
3567 u32 Index, 3556 u32 Index,
3568 unsigned long Length, 3557 unsigned long Length,
3569 IN BOOLEAN Cached, 3558 IN BOOLEAN Cached,
3570 void ** VirtualAddress, 3559 void **VirtualAddress,
3571 dma_addr_t *PhysicalAddress); 3560 dma_addr_t *PhysicalAddress);
3572 3561
3573void RTMP_AllocateFirstTxBuffer(struct rt_rtmp_adapter *pAd, 3562void RTMP_AllocateFirstTxBuffer(struct rt_rtmp_adapter *pAd,
3574 u32 Index, 3563 u32 Index,
3575 unsigned long Length, 3564 unsigned long Length,
3576 IN BOOLEAN Cached, 3565 IN BOOLEAN Cached,
3577 void ** VirtualAddress, 3566 void **VirtualAddress,
3578 dma_addr_t *PhysicalAddress); 3567 dma_addr_t *PhysicalAddress);
3579 3568
3580void RTMP_FreeFirstTxBuffer(struct rt_rtmp_adapter *pAd, 3569void RTMP_FreeFirstTxBuffer(struct rt_rtmp_adapter *pAd,
@@ -3586,13 +3575,13 @@ void RTMP_FreeFirstTxBuffer(struct rt_rtmp_adapter *pAd,
3586void RTMP_AllocateMgmtDescMemory(struct rt_rtmp_adapter *pAd, 3575void RTMP_AllocateMgmtDescMemory(struct rt_rtmp_adapter *pAd,
3587 unsigned long Length, 3576 unsigned long Length,
3588 IN BOOLEAN Cached, 3577 IN BOOLEAN Cached,
3589 void ** VirtualAddress, 3578 void **VirtualAddress,
3590 dma_addr_t *PhysicalAddress); 3579 dma_addr_t *PhysicalAddress);
3591 3580
3592void RTMP_AllocateRxDescMemory(struct rt_rtmp_adapter *pAd, 3581void RTMP_AllocateRxDescMemory(struct rt_rtmp_adapter *pAd,
3593 unsigned long Length, 3582 unsigned long Length,
3594 IN BOOLEAN Cached, 3583 IN BOOLEAN Cached,
3595 void ** VirtualAddress, 3584 void **VirtualAddress,
3596 dma_addr_t *PhysicalAddress); 3585 dma_addr_t *PhysicalAddress);
3597 3586
3598void RTMP_FreeDescMemory(struct rt_rtmp_adapter *pAd, 3587void RTMP_FreeDescMemory(struct rt_rtmp_adapter *pAd,
@@ -3605,30 +3594,29 @@ void *RtmpOSNetPktAlloc(struct rt_rtmp_adapter *pAd, IN int size);
3605void *RTMP_AllocateRxPacketBuffer(struct rt_rtmp_adapter *pAd, 3594void *RTMP_AllocateRxPacketBuffer(struct rt_rtmp_adapter *pAd,
3606 unsigned long Length, 3595 unsigned long Length,
3607 IN BOOLEAN Cached, 3596 IN BOOLEAN Cached,
3608 void ** VirtualAddress, 3597 void **VirtualAddress,
3609 OUT dma_addr_t * 3598 OUT dma_addr_t *PhysicalAddress);
3610 PhysicalAddress);
3611 3599
3612void *RTMP_AllocateTxPacketBuffer(struct rt_rtmp_adapter *pAd, 3600void *RTMP_AllocateTxPacketBuffer(struct rt_rtmp_adapter *pAd,
3613 unsigned long Length, 3601 unsigned long Length,
3614 IN BOOLEAN Cached, 3602 IN BOOLEAN Cached,
3615 void ** VirtualAddress); 3603 void **VirtualAddress);
3616 3604
3617void *RTMP_AllocateFragPacketBuffer(struct rt_rtmp_adapter *pAd, 3605void *RTMP_AllocateFragPacketBuffer(struct rt_rtmp_adapter *pAd,
3618 unsigned long Length); 3606 unsigned long Length);
3619 3607
3620void RTMP_QueryPacketInfo(void *pPacket, 3608void RTMP_QueryPacketInfo(void *pPacket,
3621 struct rt_packet_info *pPacketInfo, 3609 struct rt_packet_info *pPacketInfo,
3622 u8 ** pSrcBufVA, u32 * pSrcBufLen); 3610 u8 **pSrcBufVA, u32 *pSrcBufLen);
3623 3611
3624void RTMP_QueryNextPacketInfo(void ** ppPacket, 3612void RTMP_QueryNextPacketInfo(void **ppPacket,
3625 struct rt_packet_info *pPacketInfo, 3613 struct rt_packet_info *pPacketInfo,
3626 u8 ** pSrcBufVA, u32 * pSrcBufLen); 3614 u8 **pSrcBufVA, u32 *pSrcBufLen);
3627 3615
3628BOOLEAN RTMP_FillTxBlkInfo(struct rt_rtmp_adapter *pAd, struct rt_tx_blk *pTxBlk); 3616BOOLEAN RTMP_FillTxBlkInfo(struct rt_rtmp_adapter *pAd, struct rt_tx_blk *pTxBlk);
3629 3617
3630struct rt_rtmp_sg_list * 3618struct rt_rtmp_sg_list *rt_get_sg_list_from_packet(void *pPacket,
3631rt_get_sg_list_from_packet(void *pPacket, struct rt_rtmp_sg_list *sg); 3619 struct rt_rtmp_sg_list *sg);
3632 3620
3633void announce_802_3_packet(struct rt_rtmp_adapter *pAd, void *pPacket); 3621void announce_802_3_packet(struct rt_rtmp_adapter *pAd, void *pPacket);
3634 3622
@@ -3717,23 +3705,19 @@ void wlan_802_11_to_802_3_packet(struct rt_rtmp_adapter *pAd,
3717{ \ 3705{ \
3718 u8 *_pRemovedLLCSNAP = NULL, *_pDA, *_pSA; \ 3706 u8 *_pRemovedLLCSNAP = NULL, *_pDA, *_pSA; \
3719 \ 3707 \
3720 if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_MESH)) \ 3708 if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_MESH)) { \
3721 { \
3722 _pDA = _pRxBlk->pHeader->Addr3; \ 3709 _pDA = _pRxBlk->pHeader->Addr3; \
3723 _pSA = (u8 *)_pRxBlk->pHeader + sizeof(struct rt_header_802_11); \ 3710 _pSA = (u8 *)_pRxBlk->pHeader + sizeof(struct rt_header_802_11); \
3724 } \ 3711 } \
3725 else \ 3712 else {\
3726 { \ 3713 if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_INFRA)) {\
3727 if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_INFRA)) \
3728 { \
3729 _pDA = _pRxBlk->pHeader->Addr1; \ 3714 _pDA = _pRxBlk->pHeader->Addr1; \
3730 if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_DLS)) \ 3715 if (RX_BLK_TEST_FLAG(_pRxBlk, fRX_DLS)) \
3731 _pSA = _pRxBlk->pHeader->Addr2; \ 3716 _pSA = _pRxBlk->pHeader->Addr2; \
3732 else \ 3717 else \
3733 _pSA = _pRxBlk->pHeader->Addr3; \ 3718 _pSA = _pRxBlk->pHeader->Addr3; \
3734 } \ 3719 } \
3735 else \ 3720 else { \
3736 { \
3737 _pDA = _pRxBlk->pHeader->Addr1; \ 3721 _pDA = _pRxBlk->pHeader->Addr1; \
3738 _pSA = _pRxBlk->pHeader->Addr2; \ 3722 _pSA = _pRxBlk->pHeader->Addr2; \
3739 } \ 3723 } \
@@ -3771,8 +3755,8 @@ void Update_Rssi_Sample(struct rt_rtmp_adapter *pAd,
3771 3755
3772void *GetPacketFromRxRing(struct rt_rtmp_adapter *pAd, 3756void *GetPacketFromRxRing(struct rt_rtmp_adapter *pAd,
3773 OUT PRT28XX_RXD_STRUC pSaveRxD, 3757 OUT PRT28XX_RXD_STRUC pSaveRxD,
3774 OUT BOOLEAN * pbReschedule, 3758 OUT BOOLEAN *pbReschedule,
3775 IN u32 * pRxPending); 3759 IN u32 *pRxPending);
3776 3760
3777void *RTMPDeFragmentDataFrame(struct rt_rtmp_adapter *pAd, struct rt_rx_blk *pRxBlk); 3761void *RTMPDeFragmentDataFrame(struct rt_rtmp_adapter *pAd, struct rt_rx_blk *pRxBlk);
3778 3762
@@ -3919,24 +3903,24 @@ BOOLEAN RtmpRaDevCtrlExit(struct rt_rtmp_adapter *pAd);
3919/* */ 3903/* */
3920u16 RtmpPCI_WriteTxResource(struct rt_rtmp_adapter *pAd, 3904u16 RtmpPCI_WriteTxResource(struct rt_rtmp_adapter *pAd,
3921 struct rt_tx_blk *pTxBlk, 3905 struct rt_tx_blk *pTxBlk,
3922 IN BOOLEAN bIsLast, u16 * FreeNumber); 3906 IN BOOLEAN bIsLast, u16 *FreeNumber);
3923 3907
3924u16 RtmpPCI_WriteSingleTxResource(struct rt_rtmp_adapter *pAd, 3908u16 RtmpPCI_WriteSingleTxResource(struct rt_rtmp_adapter *pAd,
3925 struct rt_tx_blk *pTxBlk, 3909 struct rt_tx_blk *pTxBlk,
3926 IN BOOLEAN bIsLast, 3910 IN BOOLEAN bIsLast,
3927 u16 * FreeNumber); 3911 u16 *FreeNumber);
3928 3912
3929u16 RtmpPCI_WriteMultiTxResource(struct rt_rtmp_adapter *pAd, 3913u16 RtmpPCI_WriteMultiTxResource(struct rt_rtmp_adapter *pAd,
3930 struct rt_tx_blk *pTxBlk, 3914 struct rt_tx_blk *pTxBlk,
3931 u8 frameNum, u16 * FreeNumber); 3915 u8 frameNum, u16 *FreeNumber);
3932 3916
3933u16 RtmpPCI_WriteFragTxResource(struct rt_rtmp_adapter *pAd, 3917u16 RtmpPCI_WriteFragTxResource(struct rt_rtmp_adapter *pAd,
3934 struct rt_tx_blk *pTxBlk, 3918 struct rt_tx_blk *pTxBlk,
3935 u8 fragNum, u16 * FreeNumber); 3919 u8 fragNum, u16 *FreeNumber);
3936 3920
3937u16 RtmpPCI_WriteSubTxResource(struct rt_rtmp_adapter *pAd, 3921u16 RtmpPCI_WriteSubTxResource(struct rt_rtmp_adapter *pAd,
3938 struct rt_tx_blk *pTxBlk, 3922 struct rt_tx_blk *pTxBlk,
3939 IN BOOLEAN bIsLast, u16 * FreeNumber); 3923 IN BOOLEAN bIsLast, u16 *FreeNumber);
3940 3924
3941void RtmpPCI_FinalWriteTxResource(struct rt_rtmp_adapter *pAd, 3925void RtmpPCI_FinalWriteTxResource(struct rt_rtmp_adapter *pAd,
3942 struct rt_tx_blk *pTxBlk, 3926 struct rt_tx_blk *pTxBlk,
@@ -3955,8 +3939,8 @@ int RtmpPCIMgmtKickOut(struct rt_rtmp_adapter *pAd,
3955 u8 *pSrcBufVA, u32 SrcBufLen); 3939 u8 *pSrcBufVA, u32 SrcBufLen);
3956 3940
3957int RTMPCheckRxError(struct rt_rtmp_adapter *pAd, 3941int RTMPCheckRxError(struct rt_rtmp_adapter *pAd,
3958 struct rt_header_802_11 * pHeader, 3942 struct rt_header_802_11 *pHeader,
3959 struct rt_rxwi * pRxWI, IN PRT28XX_RXD_STRUC pRxD); 3943 struct rt_rxwi *pRxWI, IN PRT28XX_RXD_STRUC pRxD);
3960 3944
3961BOOLEAN RT28xxPciAsicRadioOff(struct rt_rtmp_adapter *pAd, 3945BOOLEAN RT28xxPciAsicRadioOff(struct rt_rtmp_adapter *pAd,
3962 u8 Level, u16 TbttNumToNextWakeUp); 3946 u8 Level, u16 TbttNumToNextWakeUp);
@@ -4138,15 +4122,15 @@ void append_pkt(struct rt_rtmp_adapter *pAd,
4138 u8 *pHeader802_3, 4122 u8 *pHeader802_3,
4139 u32 HdrLen, 4123 u32 HdrLen,
4140 u8 *pData, 4124 u8 *pData,
4141 unsigned long DataSize, void ** ppPacket); 4125 unsigned long DataSize, void **ppPacket);
4142 4126
4143u32 deaggregate_AMSDU_announce(struct rt_rtmp_adapter *pAd, 4127u32 deaggregate_AMSDU_announce(struct rt_rtmp_adapter *pAd,
4144 void *pPacket, 4128 void *pPacket,
4145 u8 *pData, unsigned long DataSize); 4129 u8 *pData, unsigned long DataSize);
4146 4130
4147int RTMPCheckRxError(struct rt_rtmp_adapter *pAd, 4131int RTMPCheckRxError(struct rt_rtmp_adapter *pAd,
4148 struct rt_header_802_11 * pHeader, 4132 struct rt_header_802_11 *pHeader,
4149 struct rt_rxwi * pRxWI, 4133 struct rt_rxwi *pRxWI,
4150 IN PRT28XX_RXD_STRUC pRxINFO); 4134 IN PRT28XX_RXD_STRUC pRxINFO);
4151 4135
4152void RTUSBMlmeHardTransmit(struct rt_rtmp_adapter *pAd, struct rt_mgmt *pMgmt); 4136void RTUSBMlmeHardTransmit(struct rt_rtmp_adapter *pAd, struct rt_mgmt *pMgmt);
@@ -4173,20 +4157,20 @@ void RTMPWriteTxInfo(struct rt_rtmp_adapter *pAd,
4173/* */ 4157/* */
4174u16 RtmpUSB_WriteSubTxResource(struct rt_rtmp_adapter *pAd, 4158u16 RtmpUSB_WriteSubTxResource(struct rt_rtmp_adapter *pAd,
4175 struct rt_tx_blk *pTxBlk, 4159 struct rt_tx_blk *pTxBlk,
4176 IN BOOLEAN bIsLast, u16 * FreeNumber); 4160 IN BOOLEAN bIsLast, u16 *FreeNumber);
4177 4161
4178u16 RtmpUSB_WriteSingleTxResource(struct rt_rtmp_adapter *pAd, 4162u16 RtmpUSB_WriteSingleTxResource(struct rt_rtmp_adapter *pAd,
4179 struct rt_tx_blk *pTxBlk, 4163 struct rt_tx_blk *pTxBlk,
4180 IN BOOLEAN bIsLast, 4164 IN BOOLEAN bIsLast,
4181 u16 * FreeNumber); 4165 u16 *FreeNumber);
4182 4166
4183u16 RtmpUSB_WriteFragTxResource(struct rt_rtmp_adapter *pAd, 4167u16 RtmpUSB_WriteFragTxResource(struct rt_rtmp_adapter *pAd,
4184 struct rt_tx_blk *pTxBlk, 4168 struct rt_tx_blk *pTxBlk,
4185 u8 fragNum, u16 * FreeNumber); 4169 u8 fragNum, u16 *FreeNumber);
4186 4170
4187u16 RtmpUSB_WriteMultiTxResource(struct rt_rtmp_adapter *pAd, 4171u16 RtmpUSB_WriteMultiTxResource(struct rt_rtmp_adapter *pAd,
4188 struct rt_tx_blk *pTxBlk, 4172 struct rt_tx_blk *pTxBlk,
4189 u8 frameNum, u16 * FreeNumber); 4173 u8 frameNum, u16 *FreeNumber);
4190 4174
4191void RtmpUSB_FinalWriteTxResource(struct rt_rtmp_adapter *pAd, 4175void RtmpUSB_FinalWriteTxResource(struct rt_rtmp_adapter *pAd,
4192 struct rt_tx_blk *pTxBlk, 4176 struct rt_tx_blk *pTxBlk,
@@ -4205,7 +4189,7 @@ int RtmpUSBMgmtKickOut(struct rt_rtmp_adapter *pAd,
4205 4189
4206void RtmpUSBNullFrameKickOut(struct rt_rtmp_adapter *pAd, 4190void RtmpUSBNullFrameKickOut(struct rt_rtmp_adapter *pAd,
4207 u8 QueIdx, 4191 u8 QueIdx,
4208 u8 * pNullFrame, u32 frameLen); 4192 u8 *pNullFrame, u32 frameLen);
4209 4193
4210void RtmpUsbStaAsicForceWakeupTimeout(void *SystemSpecific1, 4194void RtmpUsbStaAsicForceWakeupTimeout(void *SystemSpecific1,
4211 void *FunctionContext, 4195 void *FunctionContext,
@@ -4245,9 +4229,9 @@ void AsicStaBbpTuning(struct rt_rtmp_adapter *pAd);
4245BOOLEAN StaAddMacTableEntry(struct rt_rtmp_adapter *pAd, 4229BOOLEAN StaAddMacTableEntry(struct rt_rtmp_adapter *pAd,
4246 struct rt_mac_table_entry *pEntry, 4230 struct rt_mac_table_entry *pEntry,
4247 u8 MaxSupportedRateIn500Kbps, 4231 u8 MaxSupportedRateIn500Kbps,
4248 struct rt_ht_capability_ie * pHtCapability, 4232 struct rt_ht_capability_ie *pHtCapability,
4249 u8 HtCapabilityLen, 4233 u8 HtCapabilityLen,
4250 struct rt_add_ht_info_ie * pAddHtInfo, 4234 struct rt_add_ht_info_ie *pAddHtInfo,
4251 u8 AddHtInfoLen, u16 CapabilityInfo); 4235 u8 AddHtInfoLen, u16 CapabilityInfo);
4252 4236
4253BOOLEAN AUTH_ReqSend(struct rt_rtmp_adapter *pAd, 4237BOOLEAN AUTH_ReqSend(struct rt_rtmp_adapter *pAd,
@@ -4313,7 +4297,7 @@ void RtmpOSNetDevClose(struct net_device *pNetDev);
4313 4297
4314void RtmpOSNetDevDetach(struct net_device *pNetDev); 4298void RtmpOSNetDevDetach(struct net_device *pNetDev);
4315 4299
4316int RtmpOSNetDevAlloc(struct net_device ** pNewNetDev, u32 privDataSize); 4300int RtmpOSNetDevAlloc(struct net_device **pNewNetDev, u32 privDataSize);
4317 4301
4318void RtmpOSNetDevFree(struct net_device *pNetDev); 4302void RtmpOSNetDevFree(struct net_device *pNetDev);
4319 4303
diff --git a/drivers/staging/rt2860/sta/assoc.c b/drivers/staging/rt2860/sta/assoc.c
index 7055f229e511..6e85d5e6554b 100644
--- a/drivers/staging/rt2860/sta/assoc.c
+++ b/drivers/staging/rt2860/sta/assoc.c
@@ -1596,7 +1596,6 @@ BOOLEAN StaAddMacTableEntry(struct rt_rtmp_adapter *pAd,
1596 union iwreq_data wrqu; 1596 union iwreq_data wrqu;
1597 wext_notify_event_assoc(pAd); 1597 wext_notify_event_assoc(pAd);
1598 1598
1599 memset(wrqu.ap_addr.sa_data, 0, MAC_ADDR_LEN);
1600 memcpy(wrqu.ap_addr.sa_data, pAd->MlmeAux.Bssid, MAC_ADDR_LEN); 1599 memcpy(wrqu.ap_addr.sa_data, pAd->MlmeAux.Bssid, MAC_ADDR_LEN);
1601 wireless_send_event(pAd->net_dev, SIOCGIWAP, &wrqu, NULL); 1600 wireless_send_event(pAd->net_dev, SIOCGIWAP, &wrqu, NULL);
1602 1601
diff --git a/drivers/staging/rt2860/sta_ioctl.c b/drivers/staging/rt2860/sta_ioctl.c
index de4b6277baee..112da7a6c417 100644
--- a/drivers/staging/rt2860/sta_ioctl.c
+++ b/drivers/staging/rt2860/sta_ioctl.c
@@ -608,7 +608,6 @@ int rt_ioctl_siwap(struct net_device *dev,
608 /* Prevent to connect AP again in STAMlmePeriodicExec */ 608 /* Prevent to connect AP again in STAMlmePeriodicExec */
609 pAdapter->MlmeAux.AutoReconnectSsidLen = 32; 609 pAdapter->MlmeAux.AutoReconnectSsidLen = 32;
610 610
611 memset(Bssid, 0, MAC_ADDR_LEN);
612 memcpy(Bssid, ap_addr->sa_data, MAC_ADDR_LEN); 611 memcpy(Bssid, ap_addr->sa_data, MAC_ADDR_LEN);
613 MlmeEnqueue(pAdapter, 612 MlmeEnqueue(pAdapter,
614 MLME_CNTL_STATE_MACHINE, 613 MLME_CNTL_STATE_MACHINE,
@@ -1047,8 +1046,7 @@ int rt_ioctl_giwscan(struct net_device *dev,
1047 if (tmpRate == 0x6c 1046 if (tmpRate == 0x6c
1048 && pAdapter->ScanTab.BssEntry[i].HtCapabilityLen > 1047 && pAdapter->ScanTab.BssEntry[i].HtCapabilityLen >
1049 0) { 1048 0) {
1050 int rate_count = 1049 int rate_count = ARRAY_SIZE(ralinkrate);
1051 sizeof(ralinkrate) / sizeof(__s32);
1052 struct rt_ht_cap_info capInfo = 1050 struct rt_ht_cap_info capInfo =
1053 pAdapter->ScanTab.BssEntry[i].HtCapability. 1051 pAdapter->ScanTab.BssEntry[i].HtCapability.
1054 HtCapInfo; 1052 HtCapInfo;
@@ -1061,10 +1059,11 @@ int rt_ioctl_giwscan(struct net_device *dev,
1061 int rate_index = 1059 int rate_index =
1062 12 + ((u8)capInfo.ChannelWidth * 24) + 1060 12 + ((u8)capInfo.ChannelWidth * 24) +
1063 ((u8)shortGI * 48) + ((u8)maxMCS); 1061 ((u8)shortGI * 48) + ((u8)maxMCS);
1062
1064 if (rate_index < 0) 1063 if (rate_index < 0)
1065 rate_index = 0; 1064 rate_index = 0;
1066 if (rate_index > rate_count) 1065 if (rate_index >= rate_count)
1067 rate_index = rate_count; 1066 rate_index = rate_count - 1;
1068 iwe.u.bitrate.value = 1067 iwe.u.bitrate.value =
1069 ralinkrate[rate_index] * 500000; 1068 ralinkrate[rate_index] * 500000;
1070 } 1069 }
@@ -2338,7 +2337,7 @@ int rt_ioctl_giwrate(struct net_device *dev,
2338*/ 2337*/
2339 GET_PAD_FROM_NET_DEV(pAd, dev); 2338 GET_PAD_FROM_NET_DEV(pAd, dev);
2340 2339
2341 rate_count = sizeof(ralinkrate) / sizeof(__s32); 2340 rate_count = ARRAY_SIZE(ralinkrate);
2342 /*check if the interface is down */ 2341 /*check if the interface is down */
2343 if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) { 2342 if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE)) {
2344 DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n")); 2343 DBGPRINT(RT_DEBUG_TRACE, ("INFO::Network is down!\n"));
@@ -2369,8 +2368,8 @@ int rt_ioctl_giwrate(struct net_device *dev,
2369 if (rate_index < 0) 2368 if (rate_index < 0)
2370 rate_index = 0; 2369 rate_index = 0;
2371 2370
2372 if (rate_index > rate_count) 2371 if (rate_index >= rate_count)
2373 rate_index = rate_count; 2372 rate_index = rate_count - 1;
2374 2373
2375 wrqu->bitrate.value = ralinkrate[rate_index] * 500000; 2374 wrqu->bitrate.value = ralinkrate[rate_index] * 500000;
2376 wrqu->bitrate.disabled = 0; 2375 wrqu->bitrate.disabled = 0;
diff --git a/drivers/staging/rt2860/usb_main_dev.c b/drivers/staging/rt2860/usb_main_dev.c
index 740db0c1ac01..b740662d095a 100644
--- a/drivers/staging/rt2860/usb_main_dev.c
+++ b/drivers/staging/rt2860/usb_main_dev.c
@@ -98,6 +98,7 @@ struct usb_device_id rtusb_usb_id[] = {
98 {USB_DEVICE(0x5A57, 0x0282)}, /* Zinwell */ 98 {USB_DEVICE(0x5A57, 0x0282)}, /* Zinwell */
99 {USB_DEVICE(0x7392, 0x7718)}, 99 {USB_DEVICE(0x7392, 0x7718)},
100 {USB_DEVICE(0x7392, 0x7717)}, 100 {USB_DEVICE(0x7392, 0x7717)},
101 {USB_DEVICE(0x0411, 0x016f)}, /* MelCo.,Inc. WLI-UC-G301N */
101 {USB_DEVICE(0x1737, 0x0070)}, /* Linksys WUSB100 */ 102 {USB_DEVICE(0x1737, 0x0070)}, /* Linksys WUSB100 */
102 {USB_DEVICE(0x1737, 0x0071)}, /* Linksys WUSB600N */ 103 {USB_DEVICE(0x1737, 0x0071)}, /* Linksys WUSB600N */
103 {USB_DEVICE(0x0411, 0x00e8)}, /* Buffalo WLI-UC-G300N */ 104 {USB_DEVICE(0x0411, 0x00e8)}, /* Buffalo WLI-UC-G300N */
@@ -154,7 +155,7 @@ static void rt2870_disconnect(struct usb_device *dev, struct rt_rtmp_adapter *pA
154static int __devinit rt2870_probe(IN struct usb_interface *intf, 155static int __devinit rt2870_probe(IN struct usb_interface *intf,
155 IN struct usb_device *usb_dev, 156 IN struct usb_device *usb_dev,
156 IN const struct usb_device_id *dev_id, 157 IN const struct usb_device_id *dev_id,
157 struct rt_rtmp_adapter ** ppAd); 158 struct rt_rtmp_adapter **ppAd);
158 159
159#ifndef PF_NOFREEZE 160#ifndef PF_NOFREEZE
160#define PF_NOFREEZE 0 161#define PF_NOFREEZE 0
@@ -802,7 +803,7 @@ static void rt2870_disconnect(struct usb_device *dev, struct rt_rtmp_adapter *pA
802static int __devinit rt2870_probe(IN struct usb_interface *intf, 803static int __devinit rt2870_probe(IN struct usb_interface *intf,
803 IN struct usb_device *usb_dev, 804 IN struct usb_device *usb_dev,
804 IN const struct usb_device_id *dev_id, 805 IN const struct usb_device_id *dev_id,
805 struct rt_rtmp_adapter ** ppAd) 806 struct rt_rtmp_adapter **ppAd)
806{ 807{
807 struct net_device *net_dev = NULL; 808 struct net_device *net_dev = NULL;
808 struct rt_rtmp_adapter *pAd = (struct rt_rtmp_adapter *)NULL; 809 struct rt_rtmp_adapter *pAd = (struct rt_rtmp_adapter *)NULL;
diff --git a/drivers/staging/rt2870/Kconfig b/drivers/staging/rt2870/Kconfig
index 6ea172b433e9..e988680b5be4 100644
--- a/drivers/staging/rt2870/Kconfig
+++ b/drivers/staging/rt2870/Kconfig
@@ -1,6 +1,6 @@
1config RT2870 1config RT2870
2 tristate "Ralink 2870/3070 wireless support" 2 tristate "Ralink 2870/3070 wireless support"
3 depends on USB && X86 && WLAN 3 depends on USB && (X86 || ARM) && WLAN
4 select WIRELESS_EXT 4 select WIRELESS_EXT
5 select WEXT_PRIV 5 select WEXT_PRIV
6 select CRC_CCITT 6 select CRC_CCITT
diff --git a/drivers/staging/rt2870/common/rtusb_bulk.c b/drivers/staging/rt2870/common/rtusb_bulk.c
index 379780c72b3c..d2746f8732e6 100644
--- a/drivers/staging/rt2870/common/rtusb_bulk.c
+++ b/drivers/staging/rt2870/common/rtusb_bulk.c
@@ -172,11 +172,11 @@ void RTUSBInitRxDesc(struct rt_rtmp_adapter *pAd, struct rt_rx_context *pRxConte
172*/ 172*/
173 173
174#define BULK_OUT_LOCK(pLock, IrqFlags) \ 174#define BULK_OUT_LOCK(pLock, IrqFlags) \
175 if(1 /*!(in_interrupt() & 0xffff0000)*/) \ 175 if (1 /*!(in_interrupt() & 0xffff0000)*/) \
176 RTMP_IRQ_LOCK((pLock), IrqFlags); 176 RTMP_IRQ_LOCK((pLock), IrqFlags);
177 177
178#define BULK_OUT_UNLOCK(pLock, IrqFlags) \ 178#define BULK_OUT_UNLOCK(pLock, IrqFlags) \
179 if(1 /*!(in_interrupt() & 0xffff0000)*/) \ 179 if (1 /*!(in_interrupt() & 0xffff0000)*/) \
180 RTMP_IRQ_UNLOCK((pLock), IrqFlags); 180 RTMP_IRQ_UNLOCK((pLock), IrqFlags);
181 181
182void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd, 182void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
@@ -187,7 +187,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
187 PURB pUrb; 187 PURB pUrb;
188 int ret = 0; 188 int ret = 0;
189 struct rt_txinfo *pTxInfo, *pLastTxInfo = NULL; 189 struct rt_txinfo *pTxInfo, *pLastTxInfo = NULL;
190 struct rt_txwi * pTxWI; 190 struct rt_txwi *pTxWI;
191 unsigned long TmpBulkEndPos, ThisBulkSize; 191 unsigned long TmpBulkEndPos, ThisBulkSize;
192 unsigned long IrqFlags = 0, IrqFlags2 = 0; 192 unsigned long IrqFlags = 0, IrqFlags2 = 0;
193 u8 *pWirelessPkt, *pAppendant; 193 u8 *pWirelessPkt, *pAppendant;
@@ -273,9 +273,9 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
273 } 273 }
274 274
275 do { 275 do {
276 pTxInfo = (struct rt_txinfo *)& pWirelessPkt[TmpBulkEndPos]; 276 pTxInfo = (struct rt_txinfo *)&pWirelessPkt[TmpBulkEndPos];
277 pTxWI = 277 pTxWI =
278 (struct rt_txwi *) & pWirelessPkt[TmpBulkEndPos + TXINFO_SIZE]; 278 (struct rt_txwi *)&pWirelessPkt[TmpBulkEndPos + TXINFO_SIZE];
279 279
280 if (pAd->bForcePrintTX == TRUE) 280 if (pAd->bForcePrintTX == TRUE)
281 DBGPRINT(RT_DEBUG_TRACE, 281 DBGPRINT(RT_DEBUG_TRACE,
@@ -310,7 +310,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
310 pHTTXContext->ENextBulkOutPosition = 310 pHTTXContext->ENextBulkOutPosition =
311 TmpBulkEndPos; 311 TmpBulkEndPos;
312 break; 312 break;
313 } else if (((pAd->BulkOutMaxPacketSize < 512) && ((ThisBulkSize & 0xfffff800) != 0)) /*|| ( (ThisBulkSize != 0) && (pTxWI->AMPDU == 0)) */ ) { /* For USB 1.1 or peer which didn't support AMPDU, limit the BulkOut size. */ 313 } else if (((pAd->BulkOutMaxPacketSize < 512) && ((ThisBulkSize & 0xfffff800) != 0)) /*|| ( (ThisBulkSize != 0) && (pTxWI->AMPDU == 0)) */) { /* For USB 1.1 or peer which didn't support AMPDU, limit the BulkOut size. */
314 /* For performence in b/g mode, now just check for USB 1.1 and didn't care about the APMDU or not! 2008/06/04. */ 314 /* For performence in b/g mode, now just check for USB 1.1 and didn't care about the APMDU or not! 2008/06/04. */
315 pHTTXContext->ENextBulkOutPosition = 315 pHTTXContext->ENextBulkOutPosition =
316 TmpBulkEndPos; 316 TmpBulkEndPos;
@@ -326,7 +326,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
326 if (pTxInfo->QSEL != FIFO_EDCA) { 326 if (pTxInfo->QSEL != FIFO_EDCA) {
327 DBGPRINT(RT_DEBUG_ERROR, 327 DBGPRINT(RT_DEBUG_ERROR,
328 ("%s(): ====> pTxInfo->QueueSel(%d)!= FIFO_EDCA!!!!\n", 328 ("%s(): ====> pTxInfo->QueueSel(%d)!= FIFO_EDCA!!!!\n",
329 __FUNCTION__, pTxInfo->QSEL)); 329 __func__, pTxInfo->QSEL));
330 DBGPRINT(RT_DEBUG_ERROR, 330 DBGPRINT(RT_DEBUG_ERROR,
331 ("\tCWPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d!\n", 331 ("\tCWPos=%ld, NBPos=%ld, ENBPos=%ld, bCopy=%d!\n",
332 pHTTXContext->CurWritePosition, 332 pHTTXContext->CurWritePosition,
@@ -334,7 +334,7 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
334 pHTTXContext->ENextBulkOutPosition, 334 pHTTXContext->ENextBulkOutPosition,
335 pHTTXContext->bCopySavePad)); 335 pHTTXContext->bCopySavePad));
336 hex_dump("Wrong QSel Pkt:", 336 hex_dump("Wrong QSel Pkt:",
337 (u8 *)& pWirelessPkt[TmpBulkEndPos], 337 (u8 *)&pWirelessPkt[TmpBulkEndPos],
338 (pHTTXContext->CurWritePosition - 338 (pHTTXContext->CurWritePosition -
339 pHTTXContext->NextBulkOutPosition)); 339 pHTTXContext->NextBulkOutPosition));
340 } 340 }
@@ -401,9 +401,8 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
401 } while (TRUE); 401 } while (TRUE);
402 402
403 /* adjust the pTxInfo->USBDMANextVLD value of last pTxInfo. */ 403 /* adjust the pTxInfo->USBDMANextVLD value of last pTxInfo. */
404 if (pLastTxInfo) { 404 if (pLastTxInfo)
405 pLastTxInfo->USBDMANextVLD = 0; 405 pLastTxInfo->USBDMANextVLD = 0;
406 }
407 406
408 /* 407 /*
409 We need to copy SavedPad when following condition matched! 408 We need to copy SavedPad when following condition matched!
@@ -475,7 +474,8 @@ void RTUSBBulkOutDataPacket(struct rt_rtmp_adapter *pAd,
475 (usb_complete_t) RTUSBBulkOutDataPacketComplete); 474 (usb_complete_t) RTUSBBulkOutDataPacketComplete);
476 475
477 pUrb = pHTTXContext->pUrb; 476 pUrb = pHTTXContext->pUrb;
478 if ((ret = RTUSB_SUBMIT_URB(pUrb)) != 0) { 477 ret = RTUSB_SUBMIT_URB(pUrb);
478 if (ret != 0) {
479 DBGPRINT(RT_DEBUG_ERROR, 479 DBGPRINT(RT_DEBUG_ERROR,
480 ("RTUSBBulkOutDataPacket: Submit Tx URB failed %d\n", 480 ("RTUSBBulkOutDataPacket: Submit Tx URB failed %d\n",
481 ret)); 481 ret));
@@ -573,7 +573,8 @@ void RTUSBBulkOutNullFrame(struct rt_rtmp_adapter *pAd)
573 (usb_complete_t) RTUSBBulkOutNullFrameComplete); 573 (usb_complete_t) RTUSBBulkOutNullFrameComplete);
574 574
575 pUrb = pNullContext->pUrb; 575 pUrb = pNullContext->pUrb;
576 if ((ret = RTUSB_SUBMIT_URB(pUrb)) != 0) { 576 ret = RTUSB_SUBMIT_URB(pUrb);
577 if (ret != 0) {
577 RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags); 578 RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags);
578 pAd->BulkOutPending[0] = FALSE; 579 pAd->BulkOutPending[0] = FALSE;
579 pAd->watchDogTxPendingCnt[0] = 0; 580 pAd->watchDogTxPendingCnt[0] = 0;
@@ -667,7 +668,8 @@ void RTUSBBulkOutMLMEPacket(struct rt_rtmp_adapter *pAd, u8 Index)
667 pUrb->transfer_flags &= (~URB_NO_TRANSFER_DMA_MAP); 668 pUrb->transfer_flags &= (~URB_NO_TRANSFER_DMA_MAP);
668 669
669 pUrb = pMLMEContext->pUrb; 670 pUrb = pMLMEContext->pUrb;
670 if ((ret = RTUSB_SUBMIT_URB(pUrb)) != 0) { 671 ret = RTUSB_SUBMIT_URB(pUrb);
672 if (ret != 0) {
671 DBGPRINT(RT_DEBUG_ERROR, 673 DBGPRINT(RT_DEBUG_ERROR,
672 ("RTUSBBulkOutMLMEPacket: Submit MLME URB failed %d\n", 674 ("RTUSBBulkOutMLMEPacket: Submit MLME URB failed %d\n",
673 ret)); 675 ret));
@@ -742,7 +744,8 @@ void RTUSBBulkOutPsPoll(struct rt_rtmp_adapter *pAd)
742 (usb_complete_t) RTUSBBulkOutPsPollComplete); 744 (usb_complete_t) RTUSBBulkOutPsPollComplete);
743 745
744 pUrb = pPsPollContext->pUrb; 746 pUrb = pPsPollContext->pUrb;
745 if ((ret = RTUSB_SUBMIT_URB(pUrb)) != 0) { 747 ret = RTUSB_SUBMIT_URB(pUrb);
748 if (ret != 0) {
746 RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags); 749 RTMP_IRQ_LOCK(&pAd->BulkOutLock[0], IrqFlags);
747 pAd->BulkOutPending[0] = FALSE; 750 pAd->BulkOutPending[0] = FALSE;
748 pAd->watchDogTxPendingCnt[0] = 0; 751 pAd->watchDogTxPendingCnt[0] = 0;
@@ -799,7 +802,8 @@ void DoBulkIn(struct rt_rtmp_adapter *pAd)
799 RTUSBInitRxDesc(pAd, pRxContext); 802 RTUSBInitRxDesc(pAd, pRxContext);
800 803
801 pUrb = pRxContext->pUrb; 804 pUrb = pRxContext->pUrb;
802 if ((ret = RTUSB_SUBMIT_URB(pUrb)) != 0) { /* fail */ 805 ret = RTUSB_SUBMIT_URB(pUrb);
806 if (ret != 0) { /* fail */
803 807
804 RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags); 808 RTMP_IRQ_LOCK(&pAd->BulkInLock, IrqFlags);
805 pRxContext->InUse = FALSE; 809 pRxContext->InUse = FALSE;
@@ -949,9 +953,8 @@ void RTUSBKickBulkOut(struct rt_rtmp_adapter *pAd)
949 if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_TX) 953 if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NEED_STOP_TX)
950 ) { 954 ) {
951 /* 2. PS-Poll frame is next */ 955 /* 2. PS-Poll frame is next */
952 if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL)) { 956 if (RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL))
953 RTUSBBulkOutPsPoll(pAd); 957 RTUSBBulkOutPsPoll(pAd);
954 }
955 /* 5. Mlme frame is next */ 958 /* 5. Mlme frame is next */
956 else if ((RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME)) || 959 else if ((RTUSB_TEST_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME)) ||
957 (pAd->MgmtRing.TxSwFreeIdx < MGMT_RING_SIZE)) { 960 (pAd->MgmtRing.TxSwFreeIdx < MGMT_RING_SIZE)) {
@@ -1014,9 +1017,8 @@ void RTUSBKickBulkOut(struct rt_rtmp_adapter *pAd)
1014 } 1017 }
1015 } 1018 }
1016 /* 8. No data avaliable */ 1019 /* 8. No data avaliable */
1017 else { 1020 else
1018 1021 ;
1019 }
1020 } 1022 }
1021} 1023}
1022 1024
diff --git a/drivers/staging/rt2870/common/rtusb_data.c b/drivers/staging/rt2870/common/rtusb_data.c
index 4583764c78d2..69368862217c 100644
--- a/drivers/staging/rt2870/common/rtusb_data.c
+++ b/drivers/staging/rt2870/common/rtusb_data.c
@@ -124,7 +124,7 @@ int RTUSBFreeDescriptorRequest(struct rt_rtmp_adapter *pAd,
124 } 124 }
125 RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); 125 RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
126 126
127 return (Status); 127 return Status;
128} 128}
129 129
130int RTUSBFreeDescriptorRelease(struct rt_rtmp_adapter *pAd, 130int RTUSBFreeDescriptorRelease(struct rt_rtmp_adapter *pAd,
@@ -138,7 +138,7 @@ int RTUSBFreeDescriptorRelease(struct rt_rtmp_adapter *pAd,
138 pHTTXContext->bCurWriting = FALSE; 138 pHTTXContext->bCurWriting = FALSE;
139 RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); 139 RTMP_IRQ_UNLOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
140 140
141 return (NDIS_STATUS_SUCCESS); 141 return NDIS_STATUS_SUCCESS;
142} 142}
143 143
144BOOLEAN RTUSBNeedQueueBackForAgg(struct rt_rtmp_adapter *pAd, u8 BulkOutPipeId) 144BOOLEAN RTUSBNeedQueueBackForAgg(struct rt_rtmp_adapter *pAd, u8 BulkOutPipeId)
@@ -151,7 +151,7 @@ BOOLEAN RTUSBNeedQueueBackForAgg(struct rt_rtmp_adapter *pAd, u8 BulkOutPipeId)
151 151
152 RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags); 152 RTMP_IRQ_LOCK(&pAd->TxContextQueueLock[BulkOutPipeId], IrqFlags);
153 if ((pHTTXContext->IRPPending == 153 if ((pHTTXContext->IRPPending ==
154 TRUE) /*&& (pAd->TxSwQueue[BulkOutPipeId].Number == 0) */ ) { 154 TRUE) /*&& (pAd->TxSwQueue[BulkOutPipeId].Number == 0) */) {
155 if ((pHTTXContext->CurWritePosition < 155 if ((pHTTXContext->CurWritePosition <
156 pHTTXContext->ENextBulkOutPosition) 156 pHTTXContext->ENextBulkOutPosition)
157 && 157 &&
@@ -201,7 +201,7 @@ void RTUSBRejectPendingPackets(struct rt_rtmp_adapter *pAd)
201 for (Index = 0; Index < 4; Index++) { 201 for (Index = 0; Index < 4; Index++) {
202 NdisAcquireSpinLock(&pAd->TxSwQueueLock[Index]); 202 NdisAcquireSpinLock(&pAd->TxSwQueueLock[Index]);
203 while (pAd->TxSwQueue[Index].Head != NULL) { 203 while (pAd->TxSwQueue[Index].Head != NULL) {
204 pQueue = (struct rt_queue_header *)& (pAd->TxSwQueue[Index]); 204 pQueue = (struct rt_queue_header *)&(pAd->TxSwQueue[Index]);
205 pEntry = RemoveHeadQueue(pQueue); 205 pEntry = RemoveHeadQueue(pQueue);
206 pPacket = QUEUE_ENTRY_TO_PACKET(pEntry); 206 pPacket = QUEUE_ENTRY_TO_PACKET(pEntry);
207 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE); 207 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_FAILURE);
diff --git a/drivers/staging/rt2870/common/rtusb_io.c b/drivers/staging/rt2870/common/rtusb_io.c
index cf0d2f5dbc6c..6b9ca24bbee9 100644
--- a/drivers/staging/rt2870/common/rtusb_io.c
+++ b/drivers/staging/rt2870/common/rtusb_io.c
@@ -24,7 +24,7 @@
24 * * 24 * *
25 ************************************************************************* 25 *************************************************************************
26 26
27 Module Name: 27 Module Name:
28 rtusb_io.c 28 rtusb_io.c
29 29
30 Abstract: 30 Abstract:
@@ -400,8 +400,7 @@ int RTUSBWriteBBPRegister(struct rt_rtmp_adapter *pAd,
400 ("RTUSBWriteBBPRegister(BBP_CSR_CFG):retry count=%d!\n", 400 ("RTUSBWriteBBPRegister(BBP_CSR_CFG):retry count=%d!\n",
401 i)); 401 i));
402 i++; 402 i++;
403 } 403 } while ((i < RETRY_LIMIT)
404 while ((i < RETRY_LIMIT)
405 && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))); 404 && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
406 405
407 if ((i == RETRY_LIMIT) 406 if ((i == RETRY_LIMIT)
@@ -455,8 +454,7 @@ int RTUSBWriteRFRegister(struct rt_rtmp_adapter *pAd, u32 Value)
455 ("RTUSBWriteRFRegister(RF_CSR_CFG0):retry count=%d!\n", 454 ("RTUSBWriteRFRegister(RF_CSR_CFG0):retry count=%d!\n",
456 i)); 455 i));
457 i++; 456 i++;
458 } 457 } while ((i < RETRY_LIMIT)
459 while ((i < RETRY_LIMIT)
460 && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))); 458 && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
461 459
462 if ((i == RETRY_LIMIT) 460 if ((i == RETRY_LIMIT)
@@ -652,11 +650,11 @@ int RTUSBEnqueueCmdFromNdis(struct rt_rtmp_adapter *pAd,
652 } 650 }
653 else 651 else
654#endif 652#endif
655 return (NDIS_STATUS_RESOURCES); 653 return NDIS_STATUS_RESOURCES;
656 654
657 status = os_alloc_mem(pAd, (u8 **) (&cmdqelmt), sizeof(struct rt_cmdqelmt)); 655 status = os_alloc_mem(pAd, (u8 **) (&cmdqelmt), sizeof(struct rt_cmdqelmt));
658 if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL)) 656 if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL))
659 return (NDIS_STATUS_RESOURCES); 657 return NDIS_STATUS_RESOURCES;
660 658
661 cmdqelmt->buffer = NULL; 659 cmdqelmt->buffer = NULL;
662 if (pInformationBuffer != NULL) { 660 if (pInformationBuffer != NULL) {
@@ -666,7 +664,7 @@ int RTUSBEnqueueCmdFromNdis(struct rt_rtmp_adapter *pAd,
666 if ((status != NDIS_STATUS_SUCCESS) 664 if ((status != NDIS_STATUS_SUCCESS)
667 || (cmdqelmt->buffer == NULL)) { 665 || (cmdqelmt->buffer == NULL)) {
668 kfree(cmdqelmt); 666 kfree(cmdqelmt);
669 return (NDIS_STATUS_RESOURCES); 667 return NDIS_STATUS_RESOURCES;
670 } else { 668 } else {
671 NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer, 669 NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer,
672 InformationBufferLength); 670 InformationBufferLength);
@@ -698,7 +696,7 @@ int RTUSBEnqueueCmdFromNdis(struct rt_rtmp_adapter *pAd,
698 } else 696 } else
699 RTUSBCMDUp(pAd); 697 RTUSBCMDUp(pAd);
700 698
701 return (NDIS_STATUS_SUCCESS); 699 return NDIS_STATUS_SUCCESS;
702} 700}
703 701
704/* 702/*
@@ -726,7 +724,7 @@ int RTUSBEnqueueInternalCmd(struct rt_rtmp_adapter *pAd,
726 724
727 status = os_alloc_mem(pAd, (u8 **) & cmdqelmt, sizeof(struct rt_cmdqelmt)); 725 status = os_alloc_mem(pAd, (u8 **) & cmdqelmt, sizeof(struct rt_cmdqelmt));
728 if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL)) 726 if ((status != NDIS_STATUS_SUCCESS) || (cmdqelmt == NULL))
729 return (NDIS_STATUS_RESOURCES); 727 return NDIS_STATUS_RESOURCES;
730 NdisZeroMemory(cmdqelmt, sizeof(struct rt_cmdqelmt)); 728 NdisZeroMemory(cmdqelmt, sizeof(struct rt_cmdqelmt));
731 729
732 if (InformationBufferLength > 0) { 730 if (InformationBufferLength > 0) {
@@ -736,7 +734,7 @@ int RTUSBEnqueueInternalCmd(struct rt_rtmp_adapter *pAd,
736 if ((status != NDIS_STATUS_SUCCESS) 734 if ((status != NDIS_STATUS_SUCCESS)
737 || (cmdqelmt->buffer == NULL)) { 735 || (cmdqelmt->buffer == NULL)) {
738 os_free_mem(pAd, cmdqelmt); 736 os_free_mem(pAd, cmdqelmt);
739 return (NDIS_STATUS_RESOURCES); 737 return NDIS_STATUS_RESOURCES;
740 } else { 738 } else {
741 NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer, 739 NdisMoveMemory(cmdqelmt->buffer, pInformationBuffer,
742 InformationBufferLength); 740 InformationBufferLength);
@@ -767,7 +765,7 @@ int RTUSBEnqueueInternalCmd(struct rt_rtmp_adapter *pAd,
767 } else 765 } else
768 RTUSBCMDUp(pAd); 766 RTUSBCMDUp(pAd);
769 } 767 }
770 return (NDIS_STATUS_SUCCESS); 768 return NDIS_STATUS_SUCCESS;
771} 769}
772 770
773/* 771/*
@@ -1071,7 +1069,7 @@ void CMDHandler(struct rt_rtmp_adapter *pAd)
1071 TXRXQ_PCNT, 1069 TXRXQ_PCNT,
1072 &MACValue); 1070 &MACValue);
1073 if ((MACValue & 0xf00000 1071 if ((MACValue & 0xf00000
1074 /*0x800000 */ ) == 0) 1072 /*0x800000 */) == 0)
1075 break; 1073 break;
1076 Index++; 1074 Index++;
1077 RTMPusecDelay(10000); 1075 RTMPusecDelay(10000);
@@ -1169,11 +1167,10 @@ void CMDHandler(struct rt_rtmp_adapter *pAd)
1169 (usb_complete_t) 1167 (usb_complete_t)
1170 RTUSBBulkOutDataPacketComplete); 1168 RTUSBBulkOutDataPacketComplete);
1171 1169
1172 if ((ret = 1170 ret = RTUSB_SUBMIT_URB
1173 RTUSB_SUBMIT_URB
1174 (pHTTXContext-> 1171 (pHTTXContext->
1175 pUrb)) != 1172 pUrb);
1176 0) { 1173 if (ret != 0) {
1177 RTMP_INT_LOCK 1174 RTMP_INT_LOCK
1178 (&pAd-> 1175 (&pAd->
1179 BulkOutLock 1176 BulkOutLock
@@ -1406,15 +1403,13 @@ void CMDHandler(struct rt_rtmp_adapter *pAd)
1406 /* All transfers must be aborted or cancelled before attempting to reset the pipe. */ 1403 /* All transfers must be aborted or cancelled before attempting to reset the pipe. */
1407 { 1404 {
1408 u32 MACValue; 1405 u32 MACValue;
1409
1410 { 1406 {
1411 /*while ((atomic_read(&pAd->PendingRx) > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) */ 1407 /*while ((atomic_read(&pAd->PendingRx) > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) */
1412 if ((pAd->PendingRx > 0) 1408 if ((pAd->PendingRx > 0)
1413 && 1409 &&
1414 (!RTMP_TEST_FLAG 1410 (!RTMP_TEST_FLAG
1415 (pAd, 1411 (pAd,
1416 fRTMP_ADAPTER_NIC_NOT_EXIST))) 1412 fRTMP_ADAPTER_NIC_NOT_EXIST))) {
1417 {
1418 DBGPRINT_RAW 1413 DBGPRINT_RAW
1419 (RT_DEBUG_ERROR, 1414 (RT_DEBUG_ERROR,
1420 ("BulkIn IRP Pending!!!\n")); 1415 ("BulkIn IRP Pending!!!\n"));
@@ -1424,7 +1419,6 @@ void CMDHandler(struct rt_rtmp_adapter *pAd)
1424 pAd->PendingRx = 0; 1419 pAd->PendingRx = 0;
1425 } 1420 }
1426 } 1421 }
1427
1428 /* Wait 10ms before reading register. */ 1422 /* Wait 10ms before reading register. */
1429 RTMPusecDelay(10000); 1423 RTMPusecDelay(10000);
1430 ntStatus = 1424 ntStatus =
@@ -1545,7 +1539,8 @@ void CMDHandler(struct rt_rtmp_adapter *pAd)
1545 RTUSBInitRxDesc(pAd, 1539 RTUSBInitRxDesc(pAd,
1546 pRxContext); 1540 pRxContext);
1547 pUrb = pRxContext->pUrb; 1541 pUrb = pRxContext->pUrb;
1548 if ((ret = RTUSB_SUBMIT_URB(pUrb)) != 0) { /* fail */ 1542 ret = RTUSB_SUBMIT_URB(pUrb);
1543 if (ret != 0) { /* fail */
1549 1544
1550 RTMP_IRQ_LOCK 1545 RTMP_IRQ_LOCK
1551 (&pAd-> 1546 (&pAd->
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
index 4c5d63fd5833..c8dbcb925915 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
@@ -109,11 +109,10 @@ int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
109 if (hcrypt == NULL) 109 if (hcrypt == NULL)
110 return -1; 110 return -1;
111 111
112 alg = kmalloc(sizeof(*alg), GFP_KERNEL); 112 alg = kzalloc(sizeof(*alg), GFP_KERNEL);
113 if (alg == NULL) 113 if (alg == NULL)
114 return -ENOMEM; 114 return -ENOMEM;
115 115
116 memset(alg, 0, sizeof(*alg));
117 alg->ops = ops; 116 alg->ops = ops;
118 117
119 spin_lock_irqsave(&hcrypt->lock, flags); 118 spin_lock_irqsave(&hcrypt->lock, flags);
@@ -207,11 +206,10 @@ int ieee80211_crypto_init(void)
207{ 206{
208 int ret = -ENOMEM; 207 int ret = -ENOMEM;
209 208
210 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL); 209 hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL);
211 if (!hcrypt) 210 if (!hcrypt)
212 goto out; 211 goto out;
213 212
214 memset(hcrypt, 0, sizeof(*hcrypt));
215 INIT_LIST_HEAD(&hcrypt->algs); 213 INIT_LIST_HEAD(&hcrypt->algs);
216 spin_lock_init(&hcrypt->lock); 214 spin_lock_init(&hcrypt->lock);
217 215
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
index 40f1b99faad2..731d2686411e 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
@@ -69,10 +69,9 @@ static void * ieee80211_ccmp_init(int key_idx)
69{ 69{
70 struct ieee80211_ccmp_data *priv; 70 struct ieee80211_ccmp_data *priv;
71 71
72 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 72 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
73 if (priv == NULL) 73 if (priv == NULL)
74 goto fail; 74 goto fail;
75 memset(priv, 0, sizeof(*priv));
76 priv->key_idx = key_idx; 75 priv->key_idx = key_idx;
77 76
78 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); 77 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
index a5254111d9a1..ee71ee90fd89 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
@@ -70,10 +70,9 @@ static void * ieee80211_tkip_init(int key_idx)
70{ 70{
71 struct ieee80211_tkip_data *priv; 71 struct ieee80211_tkip_data *priv;
72 72
73 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 73 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
74 if (priv == NULL) 74 if (priv == NULL)
75 goto fail; 75 goto fail;
76 memset(priv, 0, sizeof(*priv));
77 priv->key_idx = key_idx; 76 priv->key_idx = key_idx;
78 77
79 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 78 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
index c6c3bc38459b..f790cd65f107 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_wep.c
@@ -45,10 +45,9 @@ static void * prism2_wep_init(int keyidx)
45{ 45{
46 struct prism2_wep_data *priv; 46 struct prism2_wep_data *priv;
47 47
48 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 48 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
49 if (priv == NULL) 49 if (priv == NULL)
50 goto fail; 50 goto fail;
51 memset(priv, 0, sizeof(*priv));
52 priv->key_idx = keyidx; 51 priv->key_idx = keyidx;
53 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 52 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
54 if (IS_ERR(priv->tx_tfm)) { 53 if (IS_ERR(priv->tx_tfm)) {
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
index 18392fce487d..9d58a429c565 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
@@ -66,8 +66,8 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
66 if (ieee->networks) 66 if (ieee->networks)
67 return 0; 67 return 0;
68 68
69 ieee->networks = kmalloc( 69 ieee->networks = kcalloc(
70 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network), 70 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
71 GFP_KERNEL); 71 GFP_KERNEL);
72 if (!ieee->networks) { 72 if (!ieee->networks) {
73 printk(KERN_WARNING "%s: Out of memory allocating beacons\n", 73 printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
@@ -75,9 +75,6 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
75 return -ENOMEM; 75 return -ENOMEM;
76 } 76 }
77 77
78 memset(ieee->networks, 0,
79 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
80
81 return 0; 78 return 0;
82} 79}
83 80
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
index 2b7080cc2c05..3a724496e748 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
@@ -1489,8 +1489,6 @@ inline void ieee80211_process_probe_response(
1489 1489
1490 memcpy(target, &network, sizeof(*target)); 1490 memcpy(target, &network, sizeof(*target));
1491 list_add_tail(&target->list, &ieee->network_list); 1491 list_add_tail(&target->list, &ieee->network_list);
1492 if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE)
1493 ieee80211_softmac_new_net(ieee,&network);
1494 } else { 1492 } else {
1495 IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n", 1493 IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n",
1496 escape_essid(target->ssid, 1494 escape_essid(target->ssid,
@@ -1516,8 +1514,6 @@ inline void ieee80211_process_probe_response(
1516 renew = 1; 1514 renew = 1;
1517 //YJ,add,080819,for hidden ap,end 1515 //YJ,add,080819,for hidden ap,end
1518 update_network(target, &network); 1516 update_network(target, &network);
1519 if(renew && (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE))
1520 ieee80211_softmac_new_net(ieee,&network);
1521 } 1517 }
1522 1518
1523 spin_unlock_irqrestore(&ieee->lock, flags); 1519 spin_unlock_irqrestore(&ieee->lock, flags);
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
index be2d17f60c35..1b838a266e0d 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
@@ -1435,7 +1435,7 @@ static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
1435 1435
1436 if(*(t++) == MFIE_TYPE_CHALLENGE){ 1436 if(*(t++) == MFIE_TYPE_CHALLENGE){
1437 *chlen = *(t++); 1437 *chlen = *(t++);
1438 *challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC); 1438 *challenge = kmalloc(*chlen, GFP_ATOMIC);
1439 memcpy(*challenge, t, *chlen); 1439 memcpy(*challenge, t, *chlen);
1440 } 1440 }
1441 } 1441 }
@@ -1555,7 +1555,8 @@ ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1555 //IEEE80211DMESG("Rx probe"); 1555 //IEEE80211DMESG("Rx probe");
1556 ieee->softmac_stats.rx_auth_rq++; 1556 ieee->softmac_stats.rx_auth_rq++;
1557 1557
1558 if ((status = auth_rq_parse(skb, dest))!= -1){ 1558 status = auth_rq_parse(skb, dest);
1559 if (status != -1) {
1559 ieee80211_resp_to_auth(ieee, status, dest); 1560 ieee80211_resp_to_auth(ieee, status, dest);
1560 } 1561 }
1561 //DMESG("Dest is "MACSTR, MAC2STR(dest)); 1562 //DMESG("Dest is "MACSTR, MAC2STR(dest));
@@ -2321,9 +2322,11 @@ void ieee80211_disassociate(struct ieee80211_device *ieee)
2321 2322
2322 if(IS_DOT11D_ENABLE(ieee)) 2323 if(IS_DOT11D_ENABLE(ieee))
2323 Dot11d_Reset(ieee); 2324 Dot11d_Reset(ieee);
2324 ieee->state = IEEE80211_NOLINK; 2325
2325 ieee->link_change(ieee->dev); 2326 ieee->link_change(ieee->dev);
2326 notify_wx_assoc_event(ieee); 2327 if (ieee->state == IEEE80211_LINKED)
2328 notify_wx_assoc_event(ieee);
2329 ieee->state = IEEE80211_NOLINK;
2327 2330
2328} 2331}
2329void ieee80211_associate_retry_wq(struct work_struct *work) 2332void ieee80211_associate_retry_wq(struct work_struct *work)
@@ -2664,11 +2667,11 @@ static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
2664 return -EINVAL; 2667 return -EINVAL;
2665 2668
2666 if (param->u.wpa_ie.len) { 2669 if (param->u.wpa_ie.len) {
2667 buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL); 2670 buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
2671 GFP_KERNEL);
2668 if (buf == NULL) 2672 if (buf == NULL)
2669 return -ENOMEM; 2673 return -ENOMEM;
2670 2674
2671 memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
2672 kfree(ieee->wpa_ie); 2675 kfree(ieee->wpa_ie);
2673 ieee->wpa_ie = buf; 2676 ieee->wpa_ie = buf;
2674 ieee->wpa_ie_len = param->u.wpa_ie.len; 2677 ieee->wpa_ie_len = param->u.wpa_ie.len;
@@ -2858,8 +2861,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
2858 2861
2859 ieee80211_crypt_delayed_deinit(ieee, crypt); 2862 ieee80211_crypt_delayed_deinit(ieee, crypt);
2860 2863
2861 new_crypt = (struct ieee80211_crypt_data *) 2864 new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
2862 kmalloc(sizeof(*new_crypt), GFP_KERNEL);
2863 if (new_crypt == NULL) { 2865 if (new_crypt == NULL) {
2864 ret = -ENOMEM; 2866 ret = -ENOMEM;
2865 goto done; 2867 goto done;
@@ -2950,7 +2952,7 @@ int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_poin
2950 goto out; 2952 goto out;
2951 } 2953 }
2952 2954
2953 param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL); 2955 param = kmalloc(p->length, GFP_KERNEL);
2954 if (param == NULL){ 2956 if (param == NULL){
2955 ret = -ENOMEM; 2957 ret = -ENOMEM;
2956 goto out; 2958 goto out;
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
index ad42bcdc9374..e46ff2ffa09b 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
@@ -277,8 +277,6 @@ void ieee80211_wx_sync_scan_wq(struct work_struct *work)
277 277
278 chan = ieee->current_network.channel; 278 chan = ieee->current_network.channel;
279 279
280 netif_carrier_off(ieee->dev);
281
282 if (ieee->data_hard_stop) 280 if (ieee->data_hard_stop)
283 ieee->data_hard_stop(ieee->dev); 281 ieee->data_hard_stop(ieee->dev);
284 282
@@ -300,8 +298,6 @@ void ieee80211_wx_sync_scan_wq(struct work_struct *work)
300 if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER) 298 if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
301 ieee80211_start_send_beacons(ieee); 299 ieee80211_start_send_beacons(ieee);
302 300
303 netif_carrier_on(ieee->dev);
304
305 //YJ,add,080828, In prevent of lossing ping packet during scanning 301 //YJ,add,080828, In prevent of lossing ping packet during scanning
306 //ieee80211_sta_ps_send_null_frame(ieee, false); 302 //ieee80211_sta_ps_send_null_frame(ieee, false);
307 //YJ,add,080828,end 303 //YJ,add,080828,end
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
index c5b80f9c32c0..07d8dbcdca28 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
@@ -325,11 +325,10 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
325 struct ieee80211_crypt_data *new_crypt; 325 struct ieee80211_crypt_data *new_crypt;
326 326
327 /* take WEP into use */ 327 /* take WEP into use */
328 new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data), 328 new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data),
329 GFP_KERNEL); 329 GFP_KERNEL);
330 if (new_crypt == NULL) 330 if (new_crypt == NULL)
331 return -ENOMEM; 331 return -ENOMEM;
332 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
333 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 332 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
334 if (!new_crypt->ops) 333 if (!new_crypt->ops)
335 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 334 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
@@ -728,10 +727,9 @@ int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
728 printk("len:%zu, ie:%d\n", len, ie[1]); 727 printk("len:%zu, ie:%d\n", len, ie[1]);
729 return -EINVAL; 728 return -EINVAL;
730 } 729 }
731 buf = kmalloc(len, GFP_KERNEL); 730 buf = kmemdup(ie, len, GFP_KERNEL);
732 if (buf == NULL) 731 if (buf == NULL)
733 return -ENOMEM; 732 return -ENOMEM;
734 memcpy(buf, ie, len);
735 kfree(ieee->wpa_ie); 733 kfree(ieee->wpa_ie);
736 ieee->wpa_ie = buf; 734 ieee->wpa_ie = buf;
737 ieee->wpa_ie_len = len; 735 ieee->wpa_ie_len = len;
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
index 55d12e3271de..dacefea78113 100644
--- a/drivers/staging/rtl8187se/r8180_core.c
+++ b/drivers/staging/rtl8187se/r8180_core.c
@@ -44,45 +44,45 @@
44#include "ieee80211/dot11d.h" 44#include "ieee80211/dot11d.h"
45 45
46static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = { 46static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
47 { 47 {
48 .vendor = PCI_VENDOR_ID_REALTEK, 48 .vendor = PCI_VENDOR_ID_REALTEK,
49 .device = 0x8199, 49 .device = 0x8199,
50 .subvendor = PCI_ANY_ID, 50 .subvendor = PCI_ANY_ID,
51 .subdevice = PCI_ANY_ID, 51 .subdevice = PCI_ANY_ID,
52 .driver_data = 0, 52 .driver_data = 0,
53 }, 53 },
54 { 54 {
55 .vendor = 0, 55 .vendor = 0,
56 .device = 0, 56 .device = 0,
57 .subvendor = 0, 57 .subvendor = 0,
58 .subdevice = 0, 58 .subdevice = 0,
59 .driver_data = 0, 59 .driver_data = 0,
60 } 60 }
61}; 61};
62 62
63 63
64static char* ifname = "wlan%d"; 64static char *ifname = "wlan%d";
65static int hwseqnum = 0; 65static int hwseqnum = 0;
66static int hwwep = 0; 66static int hwwep = 0;
67static int channels = 0x3fff; 67static int channels = 0x3fff;
68 68
69#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) 69#define eqMacAddr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
70#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) 70#define cpMacAddr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])
71MODULE_LICENSE("GPL"); 71MODULE_LICENSE("GPL");
72MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl); 72MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
73MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); 73MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
74MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards"); 74MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
75 75
76 76
77module_param(ifname, charp, S_IRUGO|S_IWUSR ); 77module_param(ifname, charp, S_IRUGO|S_IWUSR);
78module_param(hwseqnum,int, S_IRUGO|S_IWUSR); 78module_param(hwseqnum, int, S_IRUGO|S_IWUSR);
79module_param(hwwep,int, S_IRUGO|S_IWUSR); 79module_param(hwwep, int, S_IRUGO|S_IWUSR);
80module_param(channels,int, S_IRUGO|S_IWUSR); 80module_param(channels, int, S_IRUGO|S_IWUSR);
81 81
82MODULE_PARM_DESC(devname," Net interface name, wlan%d=default"); 82MODULE_PARM_DESC(devname, " Net interface name, wlan%d=default");
83MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default"); 83MODULE_PARM_DESC(hwseqnum, " Try to use hardware 802.11 header sequence numbers. Zero=default");
84MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards"); 84MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
85MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI"); 85MODULE_PARM_DESC(channels, " Channel bitmask for specific locales. NYI");
86 86
87 87
88static int __devinit rtl8180_pci_probe(struct pci_dev *pdev, 88static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
@@ -90,7 +90,7 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
90 90
91static void __devexit rtl8180_pci_remove(struct pci_dev *pdev); 91static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
92 92
93static void rtl8180_shutdown (struct pci_dev *pdev) 93static void rtl8180_shutdown(struct pci_dev *pdev)
94{ 94{
95 struct net_device *dev = pci_get_drvdata(pdev); 95 struct net_device *dev = pci_get_drvdata(pdev);
96 if (dev->netdev_ops->ndo_stop) 96 if (dev->netdev_ops->ndo_stop)
@@ -168,40 +168,40 @@ static struct pci_driver rtl8180_pci_driver = {
168 168
169u8 read_nic_byte(struct net_device *dev, int x) 169u8 read_nic_byte(struct net_device *dev, int x)
170{ 170{
171 return 0xff&readb((u8*)dev->mem_start +x); 171 return 0xff&readb((u8 *)dev->mem_start + x);
172} 172}
173 173
174u32 read_nic_dword(struct net_device *dev, int x) 174u32 read_nic_dword(struct net_device *dev, int x)
175{ 175{
176 return readl((u8*)dev->mem_start +x); 176 return readl((u8 *)dev->mem_start + x);
177} 177}
178 178
179u16 read_nic_word(struct net_device *dev, int x) 179u16 read_nic_word(struct net_device *dev, int x)
180{ 180{
181 return readw((u8*)dev->mem_start +x); 181 return readw((u8 *)dev->mem_start + x);
182} 182}
183 183
184void write_nic_byte(struct net_device *dev, int x,u8 y) 184void write_nic_byte(struct net_device *dev, int x, u8 y)
185{ 185{
186 writeb(y,(u8*)dev->mem_start +x); 186 writeb(y, (u8 *)dev->mem_start + x);
187 udelay(20); 187 udelay(20);
188} 188}
189 189
190void write_nic_dword(struct net_device *dev, int x,u32 y) 190void write_nic_dword(struct net_device *dev, int x, u32 y)
191{ 191{
192 writel(y,(u8*)dev->mem_start +x); 192 writel(y, (u8 *)dev->mem_start + x);
193 udelay(20); 193 udelay(20);
194} 194}
195 195
196void write_nic_word(struct net_device *dev, int x,u16 y) 196void write_nic_word(struct net_device *dev, int x, u16 y)
197{ 197{
198 writew(y,(u8*)dev->mem_start +x); 198 writew(y, (u8 *)dev->mem_start + x);
199 udelay(20); 199 udelay(20);
200} 200}
201 201
202inline void force_pci_posting(struct net_device *dev) 202inline void force_pci_posting(struct net_device *dev)
203{ 203{
204 read_nic_byte(dev,EPROM_CMD); 204 read_nic_byte(dev, EPROM_CMD);
205 mb(); 205 mb();
206} 206}
207 207
@@ -220,7 +220,7 @@ static int proc_get_registers(char *page, char **start,
220{ 220{
221 struct net_device *dev = data; 221 struct net_device *dev = data;
222 int len = 0; 222 int len = 0;
223 int i,n; 223 int i, n;
224 int max = 0xff; 224 int max = 0xff;
225 225
226 /* This dump the current register page */ 226 /* This dump the current register page */
@@ -231,7 +231,7 @@ static int proc_get_registers(char *page, char **start,
231 len += snprintf(page + len, count - len, "%2x ", 231 len += snprintf(page + len, count - len, "%2x ",
232 read_nic_byte(dev, n)); 232 read_nic_byte(dev, n));
233 } 233 }
234 len += snprintf(page + len, count - len,"\n"); 234 len += snprintf(page + len, count - len, "\n");
235 235
236 *eof = 1; 236 *eof = 1;
237 return len; 237 return len;
@@ -287,7 +287,7 @@ static int proc_get_stats_tx(char *page, char **start,
287 int len = 0; 287 int len = 0;
288 unsigned long totalOK; 288 unsigned long totalOK;
289 289
290 totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint; 290 totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
291 len += snprintf(page + len, count - len, 291 len += snprintf(page + len, count - len,
292 "TX OK: %lu\n" 292 "TX OK: %lu\n"
293 "TX Error: %lu\n" 293 "TX Error: %lu\n"
@@ -308,12 +308,12 @@ static int proc_get_stats_tx(char *page, char **start,
308void rtl8180_proc_module_init(void) 308void rtl8180_proc_module_init(void)
309{ 309{
310 DMESG("Initializing proc filesystem"); 310 DMESG("Initializing proc filesystem");
311 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net); 311 rtl8180_proc = create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
312} 312}
313 313
314void rtl8180_proc_module_remove(void) 314void rtl8180_proc_module_remove(void)
315{ 315{
316 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net); 316 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
317} 317}
318 318
319void rtl8180_proc_remove_one(struct net_device *dev) 319void rtl8180_proc_remove_one(struct net_device *dev)
@@ -383,82 +383,83 @@ void rtl8180_proc_init_one(struct net_device *dev)
383short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma, 383short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
384 struct buffer **bufferhead) 384 struct buffer **bufferhead)
385{ 385{
386 struct buffer *tmp; 386 struct buffer *tmp;
387 387
388 if(! *buffer){ 388 if (!*buffer) {
389 389
390 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL); 390 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
391 391
392 if (*buffer == NULL) { 392 if (*buffer == NULL) {
393 DMESGE("Failed to kmalloc head of TX/RX struct"); 393 DMESGE("Failed to kmalloc head of TX/RX struct");
394 return -1; 394 return -1;
395 } 395 }
396 (*buffer)->next=*buffer; 396 (*buffer)->next = *buffer;
397 (*buffer)->buf=buf; 397 (*buffer)->buf = buf;
398 (*buffer)->dma=dma; 398 (*buffer)->dma = dma;
399 if(bufferhead !=NULL) 399 if (bufferhead != NULL)
400 (*bufferhead) = (*buffer); 400 (*bufferhead) = (*buffer);
401 return 0; 401 return 0;
402 } 402 }
403 tmp=*buffer; 403 tmp = *buffer;
404 404
405 while(tmp->next!=(*buffer)) tmp=tmp->next; 405 while (tmp->next != (*buffer))
406 if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){ 406 tmp = tmp->next;
407 tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
408 if (tmp->next == NULL) {
407 DMESGE("Failed to kmalloc TX/RX struct"); 409 DMESGE("Failed to kmalloc TX/RX struct");
408 return -1; 410 return -1;
409 } 411 }
410 tmp->next->buf=buf; 412 tmp->next->buf = buf;
411 tmp->next->dma=dma; 413 tmp->next->dma = dma;
412 tmp->next->next=*buffer; 414 tmp->next->next = *buffer;
413 415
414 return 0; 416 return 0;
415} 417}
416 418
417void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short 419void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
418consistent)
419{ 420{
420 421
421 struct buffer *tmp,*next; 422 struct buffer *tmp, *next;
422 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 423 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
423 struct pci_dev *pdev=priv->pdev; 424 struct pci_dev *pdev = priv->pdev;
424 425
425 if (!*buffer) 426 if (!*buffer)
426 return; 427 return;
427 428
428 tmp = *buffer; 429 tmp = *buffer;
429 430
430 do{ 431 do {
431 next=tmp->next; 432 next = tmp->next;
432 if(consistent){ 433 if (consistent) {
433 pci_free_consistent(pdev,len, 434 pci_free_consistent(pdev, len,
434 tmp->buf,tmp->dma); 435 tmp->buf, tmp->dma);
435 }else{ 436 } else {
436 pci_unmap_single(pdev, tmp->dma, 437 pci_unmap_single(pdev, tmp->dma,
437 len,PCI_DMA_FROMDEVICE); 438 len, PCI_DMA_FROMDEVICE);
438 kfree(tmp->buf); 439 kfree(tmp->buf);
439 } 440 }
440 kfree(tmp); 441 kfree(tmp);
441 tmp = next; 442 tmp = next;
442 } 443 }
443 while(next != *buffer); 444 while (next != *buffer);
444 445
445 *buffer=NULL; 446 *buffer = NULL;
446} 447}
447 448
448void print_buffer(u32 *buffer, int len) 449void print_buffer(u32 *buffer, int len)
449{ 450{
450 int i; 451 int i;
451 u8 *buf =(u8*)buffer; 452 u8 *buf = (u8 *)buffer;
452 453
453 printk("ASCII BUFFER DUMP (len: %x):\n",len); 454 printk("ASCII BUFFER DUMP (len: %x):\n", len);
454 455
455 for(i=0;i<len;i++) 456 for (i = 0; i < len; i++)
456 printk("%c",buf[i]); 457 printk("%c", buf[i]);
457 458
458 printk("\nBINARY BUFFER DUMP (len: %x):\n",len); 459 printk("\nBINARY BUFFER DUMP (len: %x):\n", len);
459 460
460 for(i=0;i<len;i++) 461 for (i = 0; i < len; i++)
461 printk("%02x",buf[i]); 462 printk("%02x", buf[i]);
462 463
463 printk("\n"); 464 printk("\n");
464} 465}
@@ -466,37 +467,37 @@ void print_buffer(u32 *buffer, int len)
466int get_curr_tx_free_desc(struct net_device *dev, int priority) 467int get_curr_tx_free_desc(struct net_device *dev, int priority)
467{ 468{
468 struct r8180_priv *priv = ieee80211_priv(dev); 469 struct r8180_priv *priv = ieee80211_priv(dev);
469 u32* tail; 470 u32 *tail;
470 u32* head; 471 u32 *head;
471 int ret; 472 int ret;
472 473
473 switch (priority){ 474 switch (priority) {
474 case MANAGE_PRIORITY: 475 case MANAGE_PRIORITY:
475 head = priv->txmapringhead; 476 head = priv->txmapringhead;
476 tail = priv->txmapringtail; 477 tail = priv->txmapringtail;
477 break; 478 break;
478 case BK_PRIORITY: 479 case BK_PRIORITY:
479 head = priv->txbkpringhead; 480 head = priv->txbkpringhead;
480 tail = priv->txbkpringtail; 481 tail = priv->txbkpringtail;
481 break; 482 break;
482 case BE_PRIORITY: 483 case BE_PRIORITY:
483 head = priv->txbepringhead; 484 head = priv->txbepringhead;
484 tail = priv->txbepringtail; 485 tail = priv->txbepringtail;
485 break; 486 break;
486 case VI_PRIORITY: 487 case VI_PRIORITY:
487 head = priv->txvipringhead; 488 head = priv->txvipringhead;
488 tail = priv->txvipringtail; 489 tail = priv->txvipringtail;
489 break; 490 break;
490 case VO_PRIORITY: 491 case VO_PRIORITY:
491 head = priv->txvopringhead; 492 head = priv->txvopringhead;
492 tail = priv->txvopringtail; 493 tail = priv->txvopringtail;
493 break; 494 break;
494 case HI_PRIORITY: 495 case HI_PRIORITY:
495 head = priv->txhpringhead; 496 head = priv->txhpringhead;
496 tail = priv->txhpringtail; 497 tail = priv->txhpringtail;
497 break; 498 break;
498 default: 499 default:
499 return -1; 500 return -1;
500 } 501 }
501 502
502 if (head <= tail) 503 if (head <= tail)
@@ -530,7 +531,7 @@ short check_nic_enought_desc(struct net_device *dev, int priority)
530 * between the tail and the head 531 * between the tail and the head
531 */ 532 */
532 533
533 return (required+2 < get_curr_tx_free_desc(dev,priority)); 534 return (required+2 < get_curr_tx_free_desc(dev, priority));
534} 535}
535 536
536void fix_tx_fifo(struct net_device *dev) 537void fix_tx_fifo(struct net_device *dev)
@@ -539,45 +540,45 @@ void fix_tx_fifo(struct net_device *dev)
539 u32 *tmp; 540 u32 *tmp;
540 int i; 541 int i;
541 542
542 for (tmp=priv->txmapring, i=0; 543 for (tmp = priv->txmapring, i = 0;
543 i < priv->txringcount; 544 i < priv->txringcount;
544 tmp+=8, i++){ 545 tmp += 8, i++) {
545 *tmp = *tmp &~ (1<<31); 546 *tmp = *tmp & ~(1<<31);
546 } 547 }
547 548
548 for (tmp=priv->txbkpring, i=0; 549 for (tmp = priv->txbkpring, i = 0;
549 i < priv->txringcount; 550 i < priv->txringcount;
550 tmp+=8, i++) { 551 tmp += 8, i++) {
551 *tmp = *tmp &~ (1<<31); 552 *tmp = *tmp & ~(1<<31);
552 } 553 }
553 554
554 for (tmp=priv->txbepring, i=0; 555 for (tmp = priv->txbepring, i = 0;
555 i < priv->txringcount; 556 i < priv->txringcount;
556 tmp+=8, i++){ 557 tmp += 8, i++) {
557 *tmp = *tmp &~ (1<<31); 558 *tmp = *tmp & ~(1<<31);
558 } 559 }
559 for (tmp=priv->txvipring, i=0; 560 for (tmp = priv->txvipring, i = 0;
560 i < priv->txringcount; 561 i < priv->txringcount;
561 tmp+=8, i++) { 562 tmp += 8, i++) {
562 *tmp = *tmp &~ (1<<31); 563 *tmp = *tmp & ~(1<<31);
563 } 564 }
564 565
565 for (tmp=priv->txvopring, i=0; 566 for (tmp = priv->txvopring, i = 0;
566 i < priv->txringcount; 567 i < priv->txringcount;
567 tmp+=8, i++){ 568 tmp += 8, i++) {
568 *tmp = *tmp &~ (1<<31); 569 *tmp = *tmp & ~(1<<31);
569 } 570 }
570 571
571 for (tmp=priv->txhpring, i=0; 572 for (tmp = priv->txhpring, i = 0;
572 i < priv->txringcount; 573 i < priv->txringcount;
573 tmp+=8,i++){ 574 tmp += 8, i++) {
574 *tmp = *tmp &~ (1<<31); 575 *tmp = *tmp & ~(1<<31);
575 } 576 }
576 577
577 for (tmp=priv->txbeaconring, i=0; 578 for (tmp = priv->txbeaconring, i = 0;
578 i < priv->txbeaconcount; 579 i < priv->txbeaconcount;
579 tmp+=8, i++){ 580 tmp += 8, i++) {
580 *tmp = *tmp &~ (1<<31); 581 *tmp = *tmp & ~(1<<31);
581 } 582 }
582 583
583 priv->txmapringtail = priv->txmapring; 584 priv->txmapringtail = priv->txmapring;
@@ -619,20 +620,20 @@ void fix_rx_fifo(struct net_device *dev)
619 struct buffer *rxbuf; 620 struct buffer *rxbuf;
620 u8 rx_desc_size; 621 u8 rx_desc_size;
621 622
622 rx_desc_size = 8; // 4*8 = 32 bytes 623 rx_desc_size = 8; /* 4*8 = 32 bytes */
623 624
624 for (tmp=priv->rxring, rxbuf=priv->rxbufferhead; 625 for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
625 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size); 626 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
626 tmp+=rx_desc_size,rxbuf=rxbuf->next){ 627 tmp += rx_desc_size, rxbuf = rxbuf->next) {
627 *(tmp+2) = rxbuf->dma; 628 *(tmp+2) = rxbuf->dma;
628 *tmp=*tmp &~ 0xfff; 629 *tmp = *tmp & ~0xfff;
629 *tmp=*tmp | priv->rxbuffersize; 630 *tmp = *tmp | priv->rxbuffersize;
630 *tmp |= (1<<31); 631 *tmp |= (1<<31);
631 } 632 }
632 633
633 priv->rxringtail=priv->rxring; 634 priv->rxringtail = priv->rxring;
634 priv->rxbuffer=priv->rxbufferhead; 635 priv->rxbuffer = priv->rxbufferhead;
635 priv->rx_skb_complete=1; 636 priv->rx_skb_complete = 1;
636 set_nic_rxring(dev); 637 set_nic_rxring(dev);
637} 638}
638 639
@@ -672,25 +673,23 @@ void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
672 673
673 q = *qual; 674 q = *qual;
674 orig_qual = *qual; 675 orig_qual = *qual;
675 _rssi = 0; // avoid gcc complains.. 676 _rssi = 0; /* avoid gcc complains.. */
676 677
677 if (q <= 0x4e) { 678 if (q <= 0x4e) {
678 temp = QUALITY_MAP[q]; 679 temp = QUALITY_MAP[q];
679 } else { 680 } else {
680 if( q & 0x80 ) { 681 if (q & 0x80)
681 temp = 0x32; 682 temp = 0x32;
682 } else { 683 else
683 temp = 1; 684 temp = 1;
684 }
685 } 685 }
686 686
687 *qual = temp; 687 *qual = temp;
688 temp2 = *rssi; 688 temp2 = *rssi;
689 689
690 if ( _rssi < 0x64 ){ 690 if (_rssi < 0x64) {
691 if ( _rssi == 0 ) { 691 if (_rssi == 0)
692 *rssi = 1; 692 *rssi = 1;
693 }
694 } else { 693 } else {
695 *rssi = 0x64; 694 *rssi = 0x64;
696 } 695 }
@@ -703,27 +702,27 @@ void rtl8180_irq_enable(struct net_device *dev)
703 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 702 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
704 703
705 priv->irq_enabled = 1; 704 priv->irq_enabled = 1;
706 write_nic_word(dev,INTA_MASK, priv->irq_mask); 705 write_nic_word(dev, INTA_MASK, priv->irq_mask);
707} 706}
708 707
709void rtl8180_irq_disable(struct net_device *dev) 708void rtl8180_irq_disable(struct net_device *dev)
710{ 709{
711 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 710 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
712 711
713 write_nic_dword(dev,IMR,0); 712 write_nic_dword(dev, IMR, 0);
714 force_pci_posting(dev); 713 force_pci_posting(dev);
715 priv->irq_enabled = 0; 714 priv->irq_enabled = 0;
716} 715}
717 716
718void rtl8180_set_mode(struct net_device *dev,int mode) 717void rtl8180_set_mode(struct net_device *dev, int mode)
719{ 718{
720 u8 ecmd; 719 u8 ecmd;
721 720
722 ecmd=read_nic_byte(dev, EPROM_CMD); 721 ecmd = read_nic_byte(dev, EPROM_CMD);
723 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK; 722 ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
724 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT); 723 ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
725 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT); 724 ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
726 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT); 725 ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
727 write_nic_byte(dev, EPROM_CMD, ecmd); 726 write_nic_byte(dev, EPROM_CMD, ecmd);
728} 727}
729 728
@@ -737,13 +736,12 @@ void rtl8180_update_msr(struct net_device *dev)
737 u32 rxconf; 736 u32 rxconf;
738 737
739 msr = read_nic_byte(dev, MSR); 738 msr = read_nic_byte(dev, MSR);
740 msr &= ~ MSR_LINK_MASK; 739 msr &= ~MSR_LINK_MASK;
741 740
742 rxconf=read_nic_dword(dev,RX_CONF); 741 rxconf = read_nic_dword(dev, RX_CONF);
743 742
744 if(priv->ieee80211->state == IEEE80211_LINKED) 743 if (priv->ieee80211->state == IEEE80211_LINKED) {
745 { 744 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
746 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
747 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT); 745 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
748 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER) 746 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
749 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT); 747 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
@@ -753,7 +751,7 @@ void rtl8180_update_msr(struct net_device *dev)
753 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT); 751 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
754 rxconf |= (1<<RX_CHECK_BSSID_SHIFT); 752 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
755 753
756 }else { 754 } else {
757 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT); 755 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
758 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT); 756 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
759 } 757 }
@@ -762,7 +760,7 @@ void rtl8180_update_msr(struct net_device *dev)
762 write_nic_dword(dev, RX_CONF, rxconf); 760 write_nic_dword(dev, RX_CONF, rxconf);
763} 761}
764 762
765void rtl8180_set_chan(struct net_device *dev,short ch) 763void rtl8180_set_chan(struct net_device *dev, short ch)
766{ 764{
767 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 765 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
768 766
@@ -771,8 +769,8 @@ void rtl8180_set_chan(struct net_device *dev,short ch)
771 return; 769 return;
772 } 770 }
773 771
774 priv->chan=ch; 772 priv->chan = ch;
775 priv->rf_set_chan(dev,priv->chan); 773 priv->rf_set_chan(dev, priv->chan);
776} 774}
777 775
778void rtl8180_rx_enable(struct net_device *dev) 776void rtl8180_rx_enable(struct net_device *dev)
@@ -782,8 +780,8 @@ void rtl8180_rx_enable(struct net_device *dev)
782 /* for now we accept data, management & ctl frame*/ 780 /* for now we accept data, management & ctl frame*/
783 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 781 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
784 782
785 rxconf=read_nic_dword(dev,RX_CONF); 783 rxconf = read_nic_dword(dev, RX_CONF);
786 rxconf = rxconf &~ MAC_FILTER_MASK; 784 rxconf = rxconf & ~MAC_FILTER_MASK;
787 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT); 785 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
788 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT); 786 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
789 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT); 787 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
@@ -791,39 +789,39 @@ void rtl8180_rx_enable(struct net_device *dev)
791 if (dev->flags & IFF_PROMISC) 789 if (dev->flags & IFF_PROMISC)
792 DMESG("NIC in promisc mode"); 790 DMESG("NIC in promisc mode");
793 791
794 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \ 792 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
795 dev->flags & IFF_PROMISC){ 793 dev->flags & IFF_PROMISC) {
796 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT); 794 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
797 }else{ 795 } else {
798 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT); 796 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
799 } 797 }
800 798
801 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){ 799 if (priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
802 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT); 800 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
803 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT); 801 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
804 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT); 802 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
805 } 803 }
806 804
807 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR) 805 if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
808 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT); 806 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
809 807
810 rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK; 808 rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK;
811 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT); 809 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT);
812 810
813 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT); 811 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
814 rxconf = rxconf &~ MAX_RX_DMA_MASK; 812 rxconf = rxconf & ~MAX_RX_DMA_MASK;
815 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT); 813 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
816 814
817 rxconf = rxconf | RCR_ONLYERLPKT; 815 rxconf = rxconf | RCR_ONLYERLPKT;
818 816
819 rxconf = rxconf &~ RCR_CS_MASK; 817 rxconf = rxconf & ~RCR_CS_MASK;
820 818
821 write_nic_dword(dev, RX_CONF, rxconf); 819 write_nic_dword(dev, RX_CONF, rxconf);
822 820
823 fix_rx_fifo(dev); 821 fix_rx_fifo(dev);
824 822
825 cmd=read_nic_byte(dev,CMD); 823 cmd = read_nic_byte(dev, CMD);
826 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT)); 824 write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
827} 825}
828 826
829void set_nic_txring(struct net_device *dev) 827void set_nic_txring(struct net_device *dev)
@@ -843,20 +841,20 @@ void rtl8180_conttx_enable(struct net_device *dev)
843{ 841{
844 u32 txconf; 842 u32 txconf;
845 843
846 txconf = read_nic_dword(dev,TX_CONF); 844 txconf = read_nic_dword(dev, TX_CONF);
847 txconf = txconf &~ TX_LOOPBACK_MASK; 845 txconf = txconf & ~TX_LOOPBACK_MASK;
848 txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT); 846 txconf = txconf | (TX_LOOPBACK_CONTINUE<<TX_LOOPBACK_SHIFT);
849 write_nic_dword(dev,TX_CONF,txconf); 847 write_nic_dword(dev, TX_CONF, txconf);
850} 848}
851 849
852void rtl8180_conttx_disable(struct net_device *dev) 850void rtl8180_conttx_disable(struct net_device *dev)
853{ 851{
854 u32 txconf; 852 u32 txconf;
855 853
856 txconf = read_nic_dword(dev,TX_CONF); 854 txconf = read_nic_dword(dev, TX_CONF);
857 txconf = txconf &~ TX_LOOPBACK_MASK; 855 txconf = txconf & ~TX_LOOPBACK_MASK;
858 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT); 856 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
859 write_nic_dword(dev,TX_CONF,txconf); 857 write_nic_dword(dev, TX_CONF, txconf);
860} 858}
861 859
862void rtl8180_tx_enable(struct net_device *dev) 860void rtl8180_tx_enable(struct net_device *dev)
@@ -883,54 +881,54 @@ void rtl8180_tx_enable(struct net_device *dev)
883 881
884 txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT); 882 txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
885 883
886 txconf = txconf &~ TX_LOOPBACK_MASK; 884 txconf = txconf & ~TX_LOOPBACK_MASK;
887 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT); 885 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
888 txconf = txconf &~ TCR_DPRETRY_MASK; 886 txconf = txconf & ~TCR_DPRETRY_MASK;
889 txconf = txconf &~ TCR_RTSRETRY_MASK; 887 txconf = txconf & ~TCR_RTSRETRY_MASK;
890 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT); 888 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
891 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT); 889 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
892 txconf = txconf &~ (1<<TX_NOCRC_SHIFT); 890 txconf = txconf & ~(1<<TX_NOCRC_SHIFT);
893 891
894 if (priv->hw_plcp_len) 892 if (priv->hw_plcp_len)
895 txconf = txconf & ~TCR_PLCP_LEN; 893 txconf = txconf & ~TCR_PLCP_LEN;
896 else 894 else
897 txconf = txconf | TCR_PLCP_LEN; 895 txconf = txconf | TCR_PLCP_LEN;
898 896
899 txconf = txconf &~ TCR_MXDMA_MASK; 897 txconf = txconf & ~TCR_MXDMA_MASK;
900 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT); 898 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
901 txconf = txconf | TCR_CWMIN; 899 txconf = txconf | TCR_CWMIN;
902 txconf = txconf | TCR_DISCW; 900 txconf = txconf | TCR_DISCW;
903 901
904 txconf = txconf | (1 << TX_NOICV_SHIFT); 902 txconf = txconf | (1 << TX_NOICV_SHIFT);
905 903
906 write_nic_dword(dev,TX_CONF,txconf); 904 write_nic_dword(dev, TX_CONF, txconf);
907 905
908 fix_tx_fifo(dev); 906 fix_tx_fifo(dev);
909 907
910 cmd=read_nic_byte(dev,CMD); 908 cmd = read_nic_byte(dev, CMD);
911 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT)); 909 write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
912 910
913 write_nic_dword(dev,TX_CONF,txconf); 911 write_nic_dword(dev, TX_CONF, txconf);
914} 912}
915 913
916void rtl8180_beacon_tx_enable(struct net_device *dev) 914void rtl8180_beacon_tx_enable(struct net_device *dev)
917{ 915{
918 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 916 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
919 917
920 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 918 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
921 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ); 919 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
922 write_nic_byte(dev,TPPollStop, priv->dma_poll_mask); 920 write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
923 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 921 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
924} 922}
925 923
926void rtl8180_beacon_tx_disable(struct net_device *dev) 924void rtl8180_beacon_tx_disable(struct net_device *dev)
927{ 925{
928 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 926 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
929 927
930 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 928 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
931 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ; 929 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
932 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); 930 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
933 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 931 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
934 932
935} 933}
936 934
@@ -939,13 +937,13 @@ void rtl8180_rtx_disable(struct net_device *dev)
939 u8 cmd; 937 u8 cmd;
940 struct r8180_priv *priv = ieee80211_priv(dev); 938 struct r8180_priv *priv = ieee80211_priv(dev);
941 939
942 cmd=read_nic_byte(dev,CMD); 940 cmd = read_nic_byte(dev, CMD);
943 write_nic_byte(dev, CMD, cmd &~ \ 941 write_nic_byte(dev, CMD, cmd & ~\
944 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT))); 942 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
945 force_pci_posting(dev); 943 force_pci_posting(dev);
946 mdelay(10); 944 mdelay(10);
947 945
948 if(!priv->rx_skb_complete) 946 if (!priv->rx_skb_complete)
949 dev_kfree_skb_any(priv->rx_skb); 947 dev_kfree_skb_any(priv->rx_skb);
950} 948}
951 949
@@ -960,11 +958,11 @@ short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
960 struct pci_dev *pdev = priv->pdev; 958 struct pci_dev *pdev = priv->pdev;
961 void *buf; 959 void *buf;
962 960
963 if((bufsize & 0xfff) != bufsize) { 961 if ((bufsize & 0xfff) != bufsize) {
964 DMESGE ("TX buffer allocation too large"); 962 DMESGE("TX buffer allocation too large");
965 return 0; 963 return 0;
966 } 964 }
967 desc = (u32*)pci_alloc_consistent(pdev, 965 desc = (u32 *)pci_alloc_consistent(pdev,
968 sizeof(u32)*8*count+256, &dma_desc); 966 sizeof(u32)*8*count+256, &dma_desc);
969 if (desc == NULL) 967 if (desc == NULL)
970 return -1; 968 return -1;
@@ -983,90 +981,90 @@ short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
983 if (buf == NULL) 981 if (buf == NULL)
984 return -ENOMEM; 982 return -ENOMEM;
985 983
986 switch(addr) { 984 switch (addr) {
987 case TX_MANAGEPRIORITY_RING_ADDR: 985 case TX_MANAGEPRIORITY_RING_ADDR:
988 if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){ 986 if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
989 DMESGE("Unable to allocate mem for buffer NP"); 987 DMESGE("Unable to allocate mem for buffer NP");
990 return -ENOMEM; 988 return -ENOMEM;
991 } 989 }
992 break; 990 break;
993 case TX_BKPRIORITY_RING_ADDR: 991 case TX_BKPRIORITY_RING_ADDR:
994 if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){ 992 if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
995 DMESGE("Unable to allocate mem for buffer LP"); 993 DMESGE("Unable to allocate mem for buffer LP");
996 return -ENOMEM; 994 return -ENOMEM;
997 } 995 }
998 break; 996 break;
999 case TX_BEPRIORITY_RING_ADDR: 997 case TX_BEPRIORITY_RING_ADDR:
1000 if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){ 998 if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
1001 DMESGE("Unable to allocate mem for buffer NP"); 999 DMESGE("Unable to allocate mem for buffer NP");
1002 return -ENOMEM; 1000 return -ENOMEM;
1003 } 1001 }
1004 break; 1002 break;
1005 case TX_VIPRIORITY_RING_ADDR: 1003 case TX_VIPRIORITY_RING_ADDR:
1006 if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){ 1004 if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
1007 DMESGE("Unable to allocate mem for buffer LP"); 1005 DMESGE("Unable to allocate mem for buffer LP");
1008 return -ENOMEM; 1006 return -ENOMEM;
1009 } 1007 }
1010 break; 1008 break;
1011 case TX_VOPRIORITY_RING_ADDR: 1009 case TX_VOPRIORITY_RING_ADDR:
1012 if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){ 1010 if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
1013 DMESGE("Unable to allocate mem for buffer NP"); 1011 DMESGE("Unable to allocate mem for buffer NP");
1014 return -ENOMEM; 1012 return -ENOMEM;
1015 } 1013 }
1016 break; 1014 break;
1017 case TX_HIGHPRIORITY_RING_ADDR: 1015 case TX_HIGHPRIORITY_RING_ADDR:
1018 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){ 1016 if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
1019 DMESGE("Unable to allocate mem for buffer HP"); 1017 DMESGE("Unable to allocate mem for buffer HP");
1020 return -ENOMEM; 1018 return -ENOMEM;
1021 } 1019 }
1022 break; 1020 break;
1023 case TX_BEACON_RING_ADDR: 1021 case TX_BEACON_RING_ADDR:
1024 if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){ 1022 if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
1025 DMESGE("Unable to allocate mem for buffer BP"); 1023 DMESGE("Unable to allocate mem for buffer BP");
1026 return -ENOMEM; 1024 return -ENOMEM;
1027 } 1025 }
1028 break; 1026 break;
1029 } 1027 }
1030 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv 1028 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
1031 *(tmp+2) = (u32)dma_tmp; 1029 *(tmp+2) = (u32)dma_tmp;
1032 *(tmp+3) = bufsize; 1030 *(tmp+3) = bufsize;
1033 1031
1034 if(i+1<count) 1032 if (i+1 < count)
1035 *(tmp+4) = (u32)dma_desc+((i+1)*8*4); 1033 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1036 else 1034 else
1037 *(tmp+4) = (u32)dma_desc; 1035 *(tmp+4) = (u32)dma_desc;
1038 1036
1039 tmp=tmp+8; 1037 tmp = tmp+8;
1040 } 1038 }
1041 1039
1042 switch(addr) { 1040 switch (addr) {
1043 case TX_MANAGEPRIORITY_RING_ADDR: 1041 case TX_MANAGEPRIORITY_RING_ADDR:
1044 priv->txmapringdma=dma_desc; 1042 priv->txmapringdma = dma_desc;
1045 priv->txmapring=desc; 1043 priv->txmapring = desc;
1046 break; 1044 break;
1047 case TX_BKPRIORITY_RING_ADDR: 1045 case TX_BKPRIORITY_RING_ADDR:
1048 priv->txbkpringdma=dma_desc; 1046 priv->txbkpringdma = dma_desc;
1049 priv->txbkpring=desc; 1047 priv->txbkpring = desc;
1050 break; 1048 break;
1051 case TX_BEPRIORITY_RING_ADDR: 1049 case TX_BEPRIORITY_RING_ADDR:
1052 priv->txbepringdma=dma_desc; 1050 priv->txbepringdma = dma_desc;
1053 priv->txbepring=desc; 1051 priv->txbepring = desc;
1054 break; 1052 break;
1055 case TX_VIPRIORITY_RING_ADDR: 1053 case TX_VIPRIORITY_RING_ADDR:
1056 priv->txvipringdma=dma_desc; 1054 priv->txvipringdma = dma_desc;
1057 priv->txvipring=desc; 1055 priv->txvipring = desc;
1058 break; 1056 break;
1059 case TX_VOPRIORITY_RING_ADDR: 1057 case TX_VOPRIORITY_RING_ADDR:
1060 priv->txvopringdma=dma_desc; 1058 priv->txvopringdma = dma_desc;
1061 priv->txvopring=desc; 1059 priv->txvopring = desc;
1062 break; 1060 break;
1063 case TX_HIGHPRIORITY_RING_ADDR: 1061 case TX_HIGHPRIORITY_RING_ADDR:
1064 priv->txhpringdma=dma_desc; 1062 priv->txhpringdma = dma_desc;
1065 priv->txhpring=desc; 1063 priv->txhpring = desc;
1066 break; 1064 break;
1067 case TX_BEACON_RING_ADDR: 1065 case TX_BEACON_RING_ADDR:
1068 priv->txbeaconringdma=dma_desc; 1066 priv->txbeaconringdma = dma_desc;
1069 priv->txbeaconring=desc; 1067 priv->txbeaconring = desc;
1070 break; 1068 break;
1071 1069
1072 } 1070 }
@@ -1077,37 +1075,37 @@ short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1077void free_tx_desc_rings(struct net_device *dev) 1075void free_tx_desc_rings(struct net_device *dev)
1078{ 1076{
1079 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1077 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1080 struct pci_dev *pdev=priv->pdev; 1078 struct pci_dev *pdev = priv->pdev;
1081 int count = priv->txringcount; 1079 int count = priv->txringcount;
1082 1080
1083 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1081 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1084 priv->txmapring, priv->txmapringdma); 1082 priv->txmapring, priv->txmapringdma);
1085 buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1); 1083 buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
1086 1084
1087 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1085 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1088 priv->txbkpring, priv->txbkpringdma); 1086 priv->txbkpring, priv->txbkpringdma);
1089 buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1); 1087 buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
1090 1088
1091 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1089 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1092 priv->txbepring, priv->txbepringdma); 1090 priv->txbepring, priv->txbepringdma);
1093 buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1); 1091 buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
1094 1092
1095 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1093 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1096 priv->txvipring, priv->txvipringdma); 1094 priv->txvipring, priv->txvipringdma);
1097 buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1); 1095 buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
1098 1096
1099 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1097 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1100 priv->txvopring, priv->txvopringdma); 1098 priv->txvopring, priv->txvopringdma);
1101 buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1); 1099 buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
1102 1100
1103 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1101 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1104 priv->txhpring, priv->txhpringdma); 1102 priv->txhpring, priv->txhpringdma);
1105 buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1); 1103 buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
1106 1104
1107 count = priv->txbeaconcount; 1105 count = priv->txbeaconcount;
1108 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1106 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1109 priv->txbeaconring, priv->txbeaconringdma); 1107 priv->txbeaconring, priv->txbeaconringdma);
1110 buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1); 1108 buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
1111} 1109}
1112 1110
1113void free_rx_desc_ring(struct net_device *dev) 1111void free_rx_desc_ring(struct net_device *dev)
@@ -1119,7 +1117,7 @@ void free_rx_desc_ring(struct net_device *dev)
1119 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1117 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1120 priv->rxring, priv->rxringdma); 1118 priv->rxring, priv->rxringdma);
1121 1119
1122 buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0); 1120 buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
1123} 1121}
1124 1122
1125short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count) 1123short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
@@ -1127,20 +1125,20 @@ short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1127 int i; 1125 int i;
1128 u32 *desc; 1126 u32 *desc;
1129 u32 *tmp; 1127 u32 *tmp;
1130 dma_addr_t dma_desc,dma_tmp; 1128 dma_addr_t dma_desc, dma_tmp;
1131 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1129 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1132 struct pci_dev *pdev=priv->pdev; 1130 struct pci_dev *pdev = priv->pdev;
1133 void *buf; 1131 void *buf;
1134 u8 rx_desc_size; 1132 u8 rx_desc_size;
1135 1133
1136 rx_desc_size = 8; // 4*8 = 32 bytes 1134 rx_desc_size = 8; /* 4*8 = 32 bytes */
1137 1135
1138 if((bufsize & 0xfff) != bufsize){ 1136 if ((bufsize & 0xfff) != bufsize) {
1139 DMESGE ("RX buffer allocation too large"); 1137 DMESGE("RX buffer allocation too large");
1140 return -1; 1138 return -1;
1141 } 1139 }
1142 1140
1143 desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256, 1141 desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
1144 &dma_desc); 1142 &dma_desc);
1145 1143
1146 if (dma_desc & 0xff) 1144 if (dma_desc & 0xff)
@@ -1150,33 +1148,34 @@ short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1150 */ 1148 */
1151 WARN(1, "DMA buffer is not aligned\n"); 1149 WARN(1, "DMA buffer is not aligned\n");
1152 1150
1153 priv->rxring=desc; 1151 priv->rxring = desc;
1154 priv->rxringdma=dma_desc; 1152 priv->rxringdma = dma_desc;
1155 tmp=desc; 1153 tmp = desc;
1156 1154
1157 for (i = 0; i < count; i++) { 1155 for (i = 0; i < count; i++) {
1158 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){ 1156 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
1157 if (buf == NULL) {
1159 DMESGE("Failed to kmalloc RX buffer"); 1158 DMESGE("Failed to kmalloc RX buffer");
1160 return -1; 1159 return -1;
1161 } 1160 }
1162 1161
1163 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8), 1162 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
1164 PCI_DMA_FROMDEVICE); 1163 PCI_DMA_FROMDEVICE);
1165 1164
1166 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp, 1165 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
1167 &(priv->rxbufferhead))){ 1166 &(priv->rxbufferhead))) {
1168 DMESGE("Unable to allocate mem RX buf"); 1167 DMESGE("Unable to allocate mem RX buf");
1169 return -1; 1168 return -1;
1170 } 1169 }
1171 *tmp = 0; //zero pads the header of the descriptor 1170 *tmp = 0; /* zero pads the header of the descriptor */
1172 *tmp = *tmp |( bufsize&0xfff); 1171 *tmp = *tmp | (bufsize&0xfff);
1173 *(tmp+2) = (u32)dma_tmp; 1172 *(tmp+2) = (u32)dma_tmp;
1174 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC 1173 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
1175 1174
1176 tmp=tmp+rx_desc_size; 1175 tmp = tmp+rx_desc_size;
1177 } 1176 }
1178 1177
1179 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor 1178 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
1180 1179
1181 return 0; 1180 return 0;
1182} 1181}
@@ -1187,10 +1186,10 @@ void set_nic_rxring(struct net_device *dev)
1187 u8 pgreg; 1186 u8 pgreg;
1188 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1187 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1189 1188
1190 pgreg=read_nic_byte(dev, PGSELECT); 1189 pgreg = read_nic_byte(dev, PGSELECT);
1191 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT)); 1190 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
1192 1191
1193 write_nic_dword(dev, RXRING_ADDR,priv->rxringdma); 1192 write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
1194} 1193}
1195 1194
1196void rtl8180_reset(struct net_device *dev) 1195void rtl8180_reset(struct net_device *dev)
@@ -1199,28 +1198,28 @@ void rtl8180_reset(struct net_device *dev)
1199 1198
1200 rtl8180_irq_disable(dev); 1199 rtl8180_irq_disable(dev);
1201 1200
1202 cr=read_nic_byte(dev,CMD); 1201 cr = read_nic_byte(dev, CMD);
1203 cr = cr & 2; 1202 cr = cr & 2;
1204 cr = cr | (1<<CMD_RST_SHIFT); 1203 cr = cr | (1<<CMD_RST_SHIFT);
1205 write_nic_byte(dev,CMD,cr); 1204 write_nic_byte(dev, CMD, cr);
1206 1205
1207 force_pci_posting(dev); 1206 force_pci_posting(dev);
1208 1207
1209 mdelay(200); 1208 mdelay(200);
1210 1209
1211 if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT)) 1210 if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
1212 DMESGW("Card reset timeout!"); 1211 DMESGW("Card reset timeout!");
1213 else 1212 else
1214 DMESG("Card successfully reset"); 1213 DMESG("Card successfully reset");
1215 1214
1216 rtl8180_set_mode(dev,EPROM_CMD_LOAD); 1215 rtl8180_set_mode(dev, EPROM_CMD_LOAD);
1217 force_pci_posting(dev); 1216 force_pci_posting(dev);
1218 mdelay(200); 1217 mdelay(200);
1219} 1218}
1220 1219
1221inline u16 ieeerate2rtlrate(int rate) 1220inline u16 ieeerate2rtlrate(int rate)
1222{ 1221{
1223 switch(rate){ 1222 switch (rate) {
1224 case 10: 1223 case 10:
1225 return 0; 1224 return 0;
1226 case 20: 1225 case 20:
@@ -1250,7 +1249,7 @@ inline u16 ieeerate2rtlrate(int rate)
1250 } 1249 }
1251} 1250}
1252 1251
1253static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720}; 1252static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1254 1253
1255inline u16 rtl8180_rate2rate(short rate) 1254inline u16 rtl8180_rate2rate(short rate)
1256{ 1255{
@@ -1261,7 +1260,7 @@ inline u16 rtl8180_rate2rate(short rate)
1261 1260
1262inline u8 rtl8180_IsWirelessBMode(u16 rate) 1261inline u8 rtl8180_IsWirelessBMode(u16 rate)
1263{ 1262{
1264 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) ) 1263 if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1265 return 1; 1264 return 1;
1266 else 1265 else
1267 return 0; 1266 return 0;
@@ -1331,15 +1330,14 @@ u16 N_DBPSOfRate(u16 DataRate)
1331 return N_DBPS; 1330 return N_DBPS;
1332} 1331}
1333 1332
1334// 1333/*
1335// Description: 1334 * For Netgear case, they want good-looking singal strength.
1336// For Netgear case, they want good-looking singal strength. 1335 */
1337//
1338long NetgearSignalStrengthTranslate(long LastSS, long CurrSS) 1336long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1339{ 1337{
1340 long RetSS; 1338 long RetSS;
1341 1339
1342 // Step 1. Scale mapping. 1340 /* Step 1. Scale mapping. */
1343 if (CurrSS >= 71 && CurrSS <= 100) 1341 if (CurrSS >= 71 && CurrSS <= 100)
1344 RetSS = 90 + ((CurrSS - 70) / 3); 1342 RetSS = 90 + ((CurrSS - 70) / 3);
1345 else if (CurrSS >= 41 && CurrSS <= 70) 1343 else if (CurrSS >= 41 && CurrSS <= 70)
@@ -1361,47 +1359,45 @@ long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1361 else 1359 else
1362 RetSS = CurrSS; 1360 RetSS = CurrSS;
1363 1361
1364 // Step 2. Smoothing. 1362 /* Step 2. Smoothing. */
1365 if(LastSS > 0) 1363 if (LastSS > 0)
1366 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6; 1364 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1367 1365
1368 return RetSS; 1366 return RetSS;
1369} 1367}
1370 1368
1371// 1369/*
1372// Description: 1370 * Translate 0-100 signal strength index into dBm.
1373// Translate 0-100 signal strength index into dBm. 1371 */
1374//
1375long TranslateToDbm8185(u8 SignalStrengthIndex) 1372long TranslateToDbm8185(u8 SignalStrengthIndex)
1376{ 1373{
1377 long SignalPower; 1374 long SignalPower;
1378 1375
1379 // Translate to dBm (x=0.5y-95). 1376 /* Translate to dBm (x=0.5y-95). */
1380 SignalPower = (long)((SignalStrengthIndex + 1) >> 1); 1377 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1381 SignalPower -= 95; 1378 SignalPower -= 95;
1382 1379
1383 return SignalPower; 1380 return SignalPower;
1384} 1381}
1385 1382
1386// 1383/*
1387// Description: 1384 * Perform signal smoothing for dynamic mechanism.
1388// Perform signal smoothing for dynamic mechanism. 1385 * This is different with PerformSignalSmoothing8185 in smoothing fomula.
1389// This is different with PerformSignalSmoothing8185 in smoothing fomula. 1386 * No dramatic adjustion is apply because dynamic mechanism need some degree
1390// No dramatic adjustion is apply because dynamic mechanism need some degree 1387 * of correctness. Ported from 8187B.
1391// of correctness. Ported from 8187B. 1388 */
1392//
1393void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv, 1389void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1394 bool bCckRate) 1390 bool bCckRate)
1395{ 1391{
1396 // Determin the current packet is CCK rate. 1392 /* Determin the current packet is CCK rate. */
1397 priv->bCurCCKPkt = bCckRate; 1393 priv->bCurCCKPkt = bCckRate;
1398 1394
1399 if (priv->UndecoratedSmoothedSS >= 0) 1395 if (priv->UndecoratedSmoothedSS >= 0)
1400 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6; 1396 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10)) / 6;
1401 else 1397 else
1402 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10; 1398 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1403 1399
1404 priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60; 1400 priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower * 11)) / 60;
1405 1401
1406 if (bCckRate) 1402 if (bCckRate)
1407 priv->CurCCKRSSI = priv->RSSI; 1403 priv->CurCCKRSSI = priv->RSSI;
@@ -1410,28 +1406,30 @@ void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1410} 1406}
1411 1407
1412 1408
1413/* This is rough RX isr handling routine*/ 1409/*
1410 * This is rough RX isr handling routine
1411 */
1414void rtl8180_rx(struct net_device *dev) 1412void rtl8180_rx(struct net_device *dev)
1415{ 1413{
1416 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1414 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1417 struct sk_buff *tmp_skb; 1415 struct sk_buff *tmp_skb;
1418 short first,last; 1416 short first, last;
1419 u32 len; 1417 u32 len;
1420 int lastlen; 1418 int lastlen;
1421 unsigned char quality, signal; 1419 unsigned char quality, signal;
1422 u8 rate; 1420 u8 rate;
1423 u32 *tmp,*tmp2; 1421 u32 *tmp, *tmp2;
1424 u8 rx_desc_size; 1422 u8 rx_desc_size;
1425 u8 padding; 1423 u8 padding;
1426 char rxpower = 0; 1424 char rxpower = 0;
1427 u32 RXAGC = 0; 1425 u32 RXAGC = 0;
1428 long RxAGC_dBm = 0; 1426 long RxAGC_dBm = 0;
1429 u8 LNA=0, BB=0; 1427 u8 LNA = 0, BB = 0;
1430 u8 LNA_gain[4]={02, 17, 29, 39}; 1428 u8 LNA_gain[4] = {02, 17, 29, 39};
1431 u8 Antenna = 0; 1429 u8 Antenna = 0;
1432 struct ieee80211_hdr_4addr *hdr; 1430 struct ieee80211_hdr_4addr *hdr;
1433 u16 fc,type; 1431 u16 fc, type;
1434 u8 bHwError = 0,bCRC = 0,bICV = 0; 1432 u8 bHwError = 0, bCRC = 0, bICV = 0;
1435 bool bCckRate = false; 1433 bool bCckRate = false;
1436 u8 RSSI = 0; 1434 u8 RSSI = 0;
1437 long SignalStrengthIndex = 0; 1435 long SignalStrengthIndex = 0;
@@ -1447,36 +1445,37 @@ void rtl8180_rx(struct net_device *dev)
1447 1445
1448 if ((*(priv->rxringtail)) & (1<<31)) { 1446 if ((*(priv->rxringtail)) & (1<<31)) {
1449 /* we have got an RX int, but the descriptor 1447 /* we have got an RX int, but the descriptor
1450 * we are pointing is empty*/ 1448 * we are pointing is empty */
1451 1449
1452 priv->stats.rxnodata++; 1450 priv->stats.rxnodata++;
1453 priv->ieee80211->stats.rx_errors++; 1451 priv->ieee80211->stats.rx_errors++;
1454 1452
1455 tmp2 = NULL; 1453 tmp2 = NULL;
1456 tmp = priv->rxringtail; 1454 tmp = priv->rxringtail;
1457 do{ 1455 do {
1458 if(tmp == priv->rxring) 1456 if (tmp == priv->rxring)
1459 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size; 1457 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1460 else 1458 else
1461 tmp -= rx_desc_size; 1459 tmp -= rx_desc_size;
1462 1460
1463 if(! (*tmp & (1<<31))) 1461 if (!(*tmp & (1<<31)))
1464 tmp2 = tmp; 1462 tmp2 = tmp;
1465 }while(tmp != priv->rxring); 1463 } while (tmp != priv->rxring);
1466 1464
1467 if(tmp2) priv->rxringtail = tmp2; 1465 if (tmp2)
1466 priv->rxringtail = tmp2;
1468 } 1467 }
1469 1468
1470 /* while there are filled descriptors */ 1469 /* while there are filled descriptors */
1471 while(!(*(priv->rxringtail) & (1<<31))){ 1470 while (!(*(priv->rxringtail) & (1<<31))) {
1472 if(*(priv->rxringtail) & (1<<26)) 1471 if (*(priv->rxringtail) & (1<<26))
1473 DMESGW("RX buffer overflow"); 1472 DMESGW("RX buffer overflow");
1474 if(*(priv->rxringtail) & (1<<12)) 1473 if (*(priv->rxringtail) & (1<<12))
1475 priv->stats.rxicverr++; 1474 priv->stats.rxicverr++;
1476 1475
1477 if(*(priv->rxringtail) & (1<<27)){ 1476 if (*(priv->rxringtail) & (1<<27)) {
1478 priv->stats.rxdmafail++; 1477 priv->stats.rxdmafail++;
1479 //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); 1478 /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1480 goto drop; 1479 goto drop;
1481 } 1480 }
1482 1481
@@ -1486,12 +1485,13 @@ void rtl8180_rx(struct net_device *dev)
1486 sizeof(u8), 1485 sizeof(u8),
1487 PCI_DMA_FROMDEVICE); 1486 PCI_DMA_FROMDEVICE);
1488 1487
1489 first = *(priv->rxringtail) & (1<<29) ? 1:0; 1488 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1490 if(first) priv->rx_prevlen=0; 1489 if (first)
1490 priv->rx_prevlen = 0;
1491 1491
1492 last = *(priv->rxringtail) & (1<<28) ? 1:0; 1492 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1493 if(last){ 1493 if (last) {
1494 lastlen=((*priv->rxringtail) &0xfff); 1494 lastlen = ((*priv->rxringtail) & 0xfff);
1495 1495
1496 /* if the last descriptor (that should 1496 /* if the last descriptor (that should
1497 * tell us the total packet len) tell 1497 * tell us the total packet len) tell
@@ -1500,221 +1500,213 @@ void rtl8180_rx(struct net_device *dev)
1500 * problem.. 1500 * problem..
1501 * workaround to prevent kernel panic 1501 * workaround to prevent kernel panic
1502 */ 1502 */
1503 if(lastlen < priv->rx_prevlen) 1503 if (lastlen < priv->rx_prevlen)
1504 len=0; 1504 len = 0;
1505 else 1505 else
1506 len=lastlen-priv->rx_prevlen; 1506 len = lastlen-priv->rx_prevlen;
1507 1507
1508 if(*(priv->rxringtail) & (1<<13)) { 1508 if (*(priv->rxringtail) & (1<<13)) {
1509 if ((*(priv->rxringtail) & 0xfff) <500) 1509 if ((*(priv->rxringtail) & 0xfff) < 500)
1510 priv->stats.rxcrcerrmin++; 1510 priv->stats.rxcrcerrmin++;
1511 else if ((*(priv->rxringtail) & 0x0fff) >1000) 1511 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1512 priv->stats.rxcrcerrmax++; 1512 priv->stats.rxcrcerrmax++;
1513 else 1513 else
1514 priv->stats.rxcrcerrmid++; 1514 priv->stats.rxcrcerrmid++;
1515 1515
1516 } 1516 }
1517 1517
1518 }else{ 1518 } else {
1519 len = priv->rxbuffersize; 1519 len = priv->rxbuffersize;
1520 } 1520 }
1521 1521
1522 if(first && last) { 1522 if (first && last) {
1523 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26; 1523 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1524 }else if(first) { 1524 } else if (first) {
1525 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26; 1525 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1526 if(padding) { 1526 if (padding)
1527 len -= 2; 1527 len -= 2;
1528 } 1528 } else {
1529 }else {
1530 padding = 0; 1529 padding = 0;
1531 } 1530 }
1532 padding = 0; 1531 padding = 0;
1533 priv->rx_prevlen+=len; 1532 priv->rx_prevlen += len;
1534 1533
1535 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){ 1534 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1536 /* HW is probably passing several buggy frames 1535 /* HW is probably passing several buggy frames
1537 * without FD or LD flag set. 1536 * without FD or LD flag set.
1538 * Throw this garbage away to prevent skb 1537 * Throw this garbage away to prevent skb
1539 * memory exausting 1538 * memory exausting
1540 */ 1539 */
1541 if(!priv->rx_skb_complete) 1540 if (!priv->rx_skb_complete)
1542 dev_kfree_skb_any(priv->rx_skb); 1541 dev_kfree_skb_any(priv->rx_skb);
1543 priv->rx_skb_complete = 1; 1542 priv->rx_skb_complete = 1;
1544 } 1543 }
1545 1544
1546 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16); 1545 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1547 signal = (signal & 0xfe) >> 1; 1546 signal = (signal & 0xfe) >> 1;
1548 1547
1549 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff)); 1548 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1550 1549
1551 stats.mac_time[0] = *(priv->rxringtail+1); 1550 stats.mac_time[0] = *(priv->rxringtail+1);
1552 stats.mac_time[1] = *(priv->rxringtail+2); 1551 stats.mac_time[1] = *(priv->rxringtail+2);
1553 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42; 1552 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1554 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f); 1553 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1555 1554
1556 rate=((*(priv->rxringtail)) & 1555 rate = ((*(priv->rxringtail)) &
1557 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20; 1556 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1558 1557
1559 stats.rate = rtl8180_rate2rate(rate); 1558 stats.rate = rtl8180_rate2rate(rate);
1560 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ; 1559 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1561 if(!rtl8180_IsWirelessBMode(stats.rate)) 1560 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1562 { // OFDM rate. 1561 RxAGC_dBm = rxpower+1; /* bias */
1562 } else { /* CCK rate. */
1563 RxAGC_dBm = signal; /* bit 0 discard */
1563 1564
1564 RxAGC_dBm = rxpower+1; //bias 1565 LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1565 } 1566 BB = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1566 else
1567 { // CCK rate.
1568 RxAGC_dBm = signal;//bit 0 discard
1569
1570 LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
1571 BB = (u8) (RxAGC_dBm & 0x1F); // bit 4 ~ bit 0
1572 1567
1573 RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm) 1568 RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1574 1569
1575 RxAGC_dBm +=4; //bias 1570 RxAGC_dBm += 4; /* bias */
1576 } 1571 }
1577 1572
1578 if(RxAGC_dBm & 0x80) //absolute value 1573 if (RxAGC_dBm & 0x80) /* absolute value */
1579 RXAGC= ~(RxAGC_dBm)+1; 1574 RXAGC = ~(RxAGC_dBm)+1;
1580 bCckRate = rtl8180_IsWirelessBMode(stats.rate); 1575 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1581 // Translate RXAGC into 1-100. 1576 /* Translate RXAGC into 1-100. */
1582 if(!rtl8180_IsWirelessBMode(stats.rate)) 1577 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1583 { // OFDM rate. 1578 if (RXAGC > 90)
1584 if(RXAGC>90) 1579 RXAGC = 90;
1585 RXAGC=90; 1580 else if (RXAGC < 25)
1586 else if(RXAGC<25) 1581 RXAGC = 25;
1587 RXAGC=25; 1582 RXAGC = (90-RXAGC)*100/65;
1588 RXAGC=(90-RXAGC)*100/65; 1583 } else { /* CCK rate. */
1589 } 1584 if (RXAGC > 95)
1590 else 1585 RXAGC = 95;
1591 { // CCK rate. 1586 else if (RXAGC < 30)
1592 if(RXAGC>95) 1587 RXAGC = 30;
1593 RXAGC=95; 1588 RXAGC = (95-RXAGC)*100/65;
1594 else if(RXAGC<30)
1595 RXAGC=30;
1596 RXAGC=(95-RXAGC)*100/65;
1597 } 1589 }
1598 priv->SignalStrength = (u8)RXAGC; 1590 priv->SignalStrength = (u8)RXAGC;
1599 priv->RecvSignalPower = RxAGC_dBm; 1591 priv->RecvSignalPower = RxAGC_dBm;
1600 priv->RxPower = rxpower; 1592 priv->RxPower = rxpower;
1601 priv->RSSI = RSSI; 1593 priv->RSSI = RSSI;
1602 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */ 1594 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1603 if(quality >= 127) 1595 if (quality >= 127)
1604 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now; 1596 quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk aroud now; */
1605 else if(quality < 27) 1597 else if (quality < 27)
1606 quality = 100; 1598 quality = 100;
1607 else 1599 else
1608 quality = 127 - quality; 1600 quality = 127 - quality;
1609 priv->SignalQuality = quality; 1601 priv->SignalQuality = quality;
1610 1602
1611 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength; 1603 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1612 stats.signalstrength = RXAGC; 1604 stats.signalstrength = RXAGC;
1613 if(stats.signalstrength > 100) 1605 if (stats.signalstrength > 100)
1614 stats.signalstrength = 100; 1606 stats.signalstrength = 100;
1615 stats.signalstrength = (stats.signalstrength * 70)/100 + 30; 1607 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1616 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); 1608 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1617 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality; 1609 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1618 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual; 1610 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1619 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 ) 1611 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) | (((*(priv->rxringtail)) & (0x04000000)) != 0)
1620 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 ); 1612 | (((*(priv->rxringtail)) & (0x08000000)) != 0) | (((~(*(priv->rxringtail))) & (0x10000000)) != 0) | (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1621 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13; 1613 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1622 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12; 1614 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1623 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf; 1615 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1624 fc = le16_to_cpu(hdr->frame_ctl); 1616 fc = le16_to_cpu(hdr->frame_ctl);
1625 type = WLAN_FC_GET_TYPE(fc); 1617 type = WLAN_FC_GET_TYPE(fc);
1626 1618
1627 if((IEEE80211_FTYPE_CTL != type) && 1619 if ((IEEE80211_FTYPE_CTL != type) &&
1628 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) 1620 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
1629 && (!bHwError) && (!bCRC)&& (!bICV)) 1621 && (!bHwError) && (!bCRC) && (!bICV)) {
1630 {
1631 /* Perform signal smoothing for dynamic 1622 /* Perform signal smoothing for dynamic
1632 * mechanism on demand. This is different 1623 * mechanism on demand. This is different
1633 * with PerformSignalSmoothing8185 in smoothing 1624 * with PerformSignalSmoothing8185 in smoothing
1634 * fomula. No dramatic adjustion is apply 1625 * fomula. No dramatic adjustion is apply
1635 * because dynamic mechanism need some degree 1626 * because dynamic mechanism need some degree
1636 * of correctness. */ 1627 * of correctness. */
1637 PerformUndecoratedSignalSmoothing8185(priv,bCckRate); 1628 PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1638 // 1629
1639 // For good-looking singal strength. 1630 /* For good-looking singal strength. */
1640 //
1641 SignalStrengthIndex = NetgearSignalStrengthTranslate( 1631 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1642 priv->LastSignalStrengthInPercent, 1632 priv->LastSignalStrengthInPercent,
1643 priv->SignalStrength); 1633 priv->SignalStrength);
1644 1634
1645 priv->LastSignalStrengthInPercent = SignalStrengthIndex; 1635 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1646 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex); 1636 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1647 // 1637 /*
1648 // We need more correct power of received packets and the "SignalStrength" of RxStats is beautified, 1638 * We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
1649 // so we record the correct power here. 1639 * so we record the correct power here.
1650 // 1640 */
1651 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6; 1641 priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1652 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6; 1642 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1653 1643
1654 // Figure out which antenna that received the lasted packet. 1644 /* Figure out which antenna that received the lasted packet. */
1655 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main. 1645 priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1656 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength); 1646 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1657 } 1647 }
1658 1648
1659 if(first){ 1649 if (first) {
1660 if(!priv->rx_skb_complete){ 1650 if (!priv->rx_skb_complete) {
1661 /* seems that HW sometimes fails to reiceve and 1651 /* seems that HW sometimes fails to reiceve and
1662 doesn't provide the last descriptor */ 1652 doesn't provide the last descriptor */
1663 dev_kfree_skb_any(priv->rx_skb); 1653 dev_kfree_skb_any(priv->rx_skb);
1664 priv->stats.rxnolast++; 1654 priv->stats.rxnolast++;
1665 } 1655 }
1666 /* support for prism header has been originally added by Christian */ 1656 /* support for prism header has been originally added by Christian */
1667 if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){ 1657 if (priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
1668 1658
1669 }else{ 1659 } else {
1670 priv->rx_skb = dev_alloc_skb(len+2); 1660 priv->rx_skb = dev_alloc_skb(len+2);
1671 if( !priv->rx_skb) goto drop; 1661 if (!priv->rx_skb)
1662 goto drop;
1672 } 1663 }
1673 1664
1674 priv->rx_skb_complete=0; 1665 priv->rx_skb_complete = 0;
1675 priv->rx_skb->dev=dev; 1666 priv->rx_skb->dev = dev;
1676 }else{ 1667 } else {
1677 /* if we are here we should have already RXed 1668 /* if we are here we should have already RXed
1678 * the first frame. 1669 * the first frame.
1679 * If we get here and the skb is not allocated then 1670 * If we get here and the skb is not allocated then
1680 * we have just throw out garbage (skb not allocated) 1671 * we have just throw out garbage (skb not allocated)
1681 * and we are still rxing garbage.... 1672 * and we are still rxing garbage....
1682 */ 1673 */
1683 if(!priv->rx_skb_complete){ 1674 if (!priv->rx_skb_complete) {
1684 1675
1685 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2); 1676 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1686 1677
1687 if(!tmp_skb) goto drop; 1678 if (!tmp_skb)
1679 goto drop;
1688 1680
1689 tmp_skb->dev=dev; 1681 tmp_skb->dev = dev;
1690 1682
1691 memcpy(skb_put(tmp_skb,priv->rx_skb->len), 1683 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1692 priv->rx_skb->data, 1684 priv->rx_skb->data,
1693 priv->rx_skb->len); 1685 priv->rx_skb->len);
1694 1686
1695 dev_kfree_skb_any(priv->rx_skb); 1687 dev_kfree_skb_any(priv->rx_skb);
1696 1688
1697 priv->rx_skb=tmp_skb; 1689 priv->rx_skb = tmp_skb;
1698 } 1690 }
1699 } 1691 }
1700 1692
1701 if(!priv->rx_skb_complete) { 1693 if (!priv->rx_skb_complete) {
1702 if(padding) { 1694 if (padding) {
1703 memcpy(skb_put(priv->rx_skb,len), 1695 memcpy(skb_put(priv->rx_skb, len),
1704 (((unsigned char *)priv->rxbuffer->buf) + 2),len); 1696 (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1705 } else { 1697 } else {
1706 memcpy(skb_put(priv->rx_skb,len), 1698 memcpy(skb_put(priv->rx_skb, len),
1707 priv->rxbuffer->buf,len); 1699 priv->rxbuffer->buf, len);
1708 } 1700 }
1709 } 1701 }
1710 1702
1711 if(last && !priv->rx_skb_complete){ 1703 if (last && !priv->rx_skb_complete) {
1712 if(priv->rx_skb->len > 4) 1704 if (priv->rx_skb->len > 4)
1713 skb_trim(priv->rx_skb,priv->rx_skb->len-4); 1705 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1714 if(!ieee80211_rtl_rx(priv->ieee80211, 1706 if (!ieee80211_rtl_rx(priv->ieee80211,
1715 priv->rx_skb, &stats)) 1707 priv->rx_skb, &stats))
1716 dev_kfree_skb_any(priv->rx_skb); 1708 dev_kfree_skb_any(priv->rx_skb);
1717 priv->rx_skb_complete=1; 1709 priv->rx_skb_complete = 1;
1718 } 1710 }
1719 1711
1720 pci_dma_sync_single_for_device(priv->pdev, 1712 pci_dma_sync_single_for_device(priv->pdev,
@@ -1723,22 +1715,22 @@ void rtl8180_rx(struct net_device *dev)
1723 sizeof(u8), 1715 sizeof(u8),
1724 PCI_DMA_FROMDEVICE); 1716 PCI_DMA_FROMDEVICE);
1725 1717
1726drop: // this is used when we have not enough mem 1718drop: /* this is used when we have not enough mem */
1727 /* restore the descriptor */ 1719 /* restore the descriptor */
1728 *(priv->rxringtail+2)=priv->rxbuffer->dma; 1720 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1729 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff; 1721 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1730 *(priv->rxringtail)= 1722 *(priv->rxringtail) =
1731 *(priv->rxringtail) | priv->rxbuffersize; 1723 *(priv->rxringtail) | priv->rxbuffersize;
1732 1724
1733 *(priv->rxringtail)= 1725 *(priv->rxringtail) =
1734 *(priv->rxringtail) | (1<<31); 1726 *(priv->rxringtail) | (1<<31);
1735 1727
1736 priv->rxringtail+=rx_desc_size; 1728 priv->rxringtail += rx_desc_size;
1737 if(priv->rxringtail >= 1729 if (priv->rxringtail >=
1738 (priv->rxring)+(priv->rxringcount )*rx_desc_size) 1730 (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1739 priv->rxringtail=priv->rxring; 1731 priv->rxringtail = priv->rxring;
1740 1732
1741 priv->rxbuffer=(priv->rxbuffer->next); 1733 priv->rxbuffer = (priv->rxbuffer->next);
1742 } 1734 }
1743} 1735}
1744 1736
@@ -1747,10 +1739,10 @@ void rtl8180_dma_kick(struct net_device *dev, int priority)
1747{ 1739{
1748 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1740 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1749 1741
1750 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 1742 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1751 write_nic_byte(dev, TX_DMA_POLLING, 1743 write_nic_byte(dev, TX_DMA_POLLING,
1752 (1 << (priority + 1)) | priv->dma_poll_mask); 1744 (1 << (priority + 1)) | priv->dma_poll_mask);
1753 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 1745 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1754 1746
1755 force_pci_posting(dev); 1747 force_pci_posting(dev);
1756} 1748}
@@ -1759,31 +1751,31 @@ void rtl8180_data_hard_stop(struct net_device *dev)
1759{ 1751{
1760 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1752 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1761 1753
1762 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 1754 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1763 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ; 1755 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1764 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); 1756 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1765 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 1757 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1766} 1758}
1767 1759
1768void rtl8180_data_hard_resume(struct net_device *dev) 1760void rtl8180_data_hard_resume(struct net_device *dev)
1769{ 1761{
1770 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1762 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1771 1763
1772 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 1764 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1773 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ); 1765 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1774 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); 1766 write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1775 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 1767 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1776} 1768}
1777 1769
1778/* this function TX data frames when the ieee80211 stack requires this. 1770/*
1771 * This function TX data frames when the ieee80211 stack requires this.
1779 * It checks also if we need to stop the ieee tx queue, eventually do it 1772 * It checks also if we need to stop the ieee tx queue, eventually do it
1780 */ 1773 */
1781void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int 1774void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1782rate) 1775rate) {
1783{
1784 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1776 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1785 int mode; 1777 int mode;
1786 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data; 1778 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1787 short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS; 1779 short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1788 unsigned long flags; 1780 unsigned long flags;
1789 int priority; 1781 int priority;
@@ -1792,35 +1784,35 @@ rate)
1792 1784
1793 rate = ieeerate2rtlrate(rate); 1785 rate = ieeerate2rtlrate(rate);
1794 /* 1786 /*
1795 * This function doesn't require lock because we make 1787 * This function doesn't require lock because we make
1796 * sure it's called with the tx_lock already acquired. 1788 * sure it's called with the tx_lock already acquired.
1797 * this come from the kernel's hard_xmit callback (through 1789 * this come from the kernel's hard_xmit callback (through
1798 * the ieee stack, or from the try_wake_queue (again through 1790 * the ieee stack, or from the try_wake_queue (again through
1799 * the ieee stack. 1791 * the ieee stack.
1800 */ 1792 */
1801 priority = AC2Q(skb->priority); 1793 priority = AC2Q(skb->priority);
1802 spin_lock_irqsave(&priv->tx_lock,flags); 1794 spin_lock_irqsave(&priv->tx_lock, flags);
1803 1795
1804 if(priv->ieee80211->bHwRadioOff) 1796 if (priv->ieee80211->bHwRadioOff) {
1805 { 1797 spin_unlock_irqrestore(&priv->tx_lock, flags);
1806 spin_unlock_irqrestore(&priv->tx_lock,flags);
1807 1798
1808 return; 1799 return;
1809 } 1800 }
1810 1801
1811 if (!check_nic_enought_desc(dev, priority)){ 1802 if (!check_nic_enought_desc(dev, priority)) {
1812 DMESGW("Error: no descriptor left by previous TX (avail %d) ", 1803 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1813 get_curr_tx_free_desc(dev, priority)); 1804 get_curr_tx_free_desc(dev, priority));
1814 ieee80211_rtl_stop_queue(priv->ieee80211); 1805 ieee80211_rtl_stop_queue(priv->ieee80211);
1815 } 1806 }
1816 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate); 1807 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1817 if (!check_nic_enought_desc(dev, priority)) 1808 if (!check_nic_enought_desc(dev, priority))
1818 ieee80211_rtl_stop_queue(priv->ieee80211); 1809 ieee80211_rtl_stop_queue(priv->ieee80211);
1819 1810
1820 spin_unlock_irqrestore(&priv->tx_lock,flags); 1811 spin_unlock_irqrestore(&priv->tx_lock, flags);
1821} 1812}
1822 1813
1823/* This is a rough attempt to TX a frame 1814/*
1815 * This is a rough attempt to TX a frame
1824 * This is called by the ieee 80211 stack to TX management frames. 1816 * This is called by the ieee 80211 stack to TX management frames.
1825 * If the ring is full packet are dropped (for data frame the queue 1817 * If the ring is full packet are dropped (for data frame the queue
1826 * is stopped before this can happen). For this reason it is better 1818 * is stopped before this can happen). For this reason it is better
@@ -1830,8 +1822,8 @@ rate)
1830 * Since queues for Management and Data frames are different we 1822 * Since queues for Management and Data frames are different we
1831 * might use a different lock than tx_lock (for example mgmt_tx_lock) 1823 * might use a different lock than tx_lock (for example mgmt_tx_lock)
1832 */ 1824 */
1833/* these function may loops if invoked with 0 descriptors or 0 len buffer*/ 1825/* these function may loops if invoked with 0 descriptors or 0 len buffer */
1834int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev) 1826int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1835{ 1827{
1836 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1828 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1837 unsigned long flags; 1829 unsigned long flags;
@@ -1839,66 +1831,68 @@ int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
1839 1831
1840 priority = MANAGE_PRIORITY; 1832 priority = MANAGE_PRIORITY;
1841 1833
1842 spin_lock_irqsave(&priv->tx_lock,flags); 1834 spin_lock_irqsave(&priv->tx_lock, flags);
1843 1835
1844 if (priv->ieee80211->bHwRadioOff) { 1836 if (priv->ieee80211->bHwRadioOff) {
1845 spin_unlock_irqrestore(&priv->tx_lock,flags); 1837 spin_unlock_irqrestore(&priv->tx_lock, flags);
1846 dev_kfree_skb_any(skb); 1838 dev_kfree_skb_any(skb);
1847 return NETDEV_TX_OK; 1839 return NETDEV_TX_OK;
1848 } 1840 }
1849 1841
1850 rtl8180_tx(dev, skb->data, skb->len, priority, 1842 rtl8180_tx(dev, skb->data, skb->len, priority,
1851 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate)); 1843 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1852 1844
1853 priv->ieee80211->stats.tx_bytes+=skb->len; 1845 priv->ieee80211->stats.tx_bytes += skb->len;
1854 priv->ieee80211->stats.tx_packets++; 1846 priv->ieee80211->stats.tx_packets++;
1855 spin_unlock_irqrestore(&priv->tx_lock,flags); 1847 spin_unlock_irqrestore(&priv->tx_lock, flags);
1856 1848
1857 dev_kfree_skb_any(skb); 1849 dev_kfree_skb_any(skb);
1858 return NETDEV_TX_OK; 1850 return NETDEV_TX_OK;
1859} 1851}
1860 1852
1861// longpre 144+48 shortpre 72+24 1853/* longpre 144+48 shortpre 72+24 */
1862u16 rtl8180_len2duration(u32 len, short rate,short* ext) 1854u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1863{ 1855{
1864 u16 duration; 1856 u16 duration;
1865 u16 drift; 1857 u16 drift;
1866 *ext=0; 1858 *ext = 0;
1867 1859
1868 switch(rate){ 1860 switch (rate) {
1869 case 0://1mbps 1861 case 0: /* 1mbps */
1870 *ext=0; 1862 *ext = 0;
1871 duration = ((len+4)<<4) /0x2; 1863 duration = ((len+4)<<4) / 0x2;
1872 drift = ((len+4)<<4) % 0x2; 1864 drift = ((len+4)<<4) % 0x2;
1873 if(drift ==0 ) break; 1865 if (drift == 0)
1866 break;
1874 duration++; 1867 duration++;
1875 break; 1868 break;
1876 case 1://2mbps 1869 case 1: /* 2mbps */
1877 *ext=0; 1870 *ext = 0;
1878 duration = ((len+4)<<4) /0x4; 1871 duration = ((len+4)<<4) / 0x4;
1879 drift = ((len+4)<<4) % 0x4; 1872 drift = ((len+4)<<4) % 0x4;
1880 if(drift ==0 ) break; 1873 if (drift == 0)
1874 break;
1881 duration++; 1875 duration++;
1882 break; 1876 break;
1883 case 2: //5.5mbps 1877 case 2: /* 5.5mbps */
1884 *ext=0; 1878 *ext = 0;
1885 duration = ((len+4)<<4) /0xb; 1879 duration = ((len+4)<<4) / 0xb;
1886 drift = ((len+4)<<4) % 0xb; 1880 drift = ((len+4)<<4) % 0xb;
1887 if(drift ==0 ) 1881 if (drift == 0)
1888 break; 1882 break;
1889 duration++; 1883 duration++;
1890 break; 1884 break;
1891 default: 1885 default:
1892 case 3://11mbps 1886 case 3: /* 11mbps */
1893 *ext=0; 1887 *ext = 0;
1894 duration = ((len+4)<<4) /0x16; 1888 duration = ((len+4)<<4) / 0x16;
1895 drift = ((len+4)<<4) % 0x16; 1889 drift = ((len+4)<<4) % 0x16;
1896 if(drift ==0 ) 1890 if (drift == 0)
1897 break; 1891 break;
1898 duration++; 1892 duration++;
1899 if(drift > 6) 1893 if (drift > 6)
1900 break; 1894 break;
1901 *ext=1; 1895 *ext = 1;
1902 break; 1896 break;
1903 } 1897 }
1904 1898
@@ -1911,19 +1905,20 @@ void rtl8180_prepare_beacon(struct net_device *dev)
1911 struct sk_buff *skb; 1905 struct sk_buff *skb;
1912 1906
1913 u16 word = read_nic_word(dev, BcnItv); 1907 u16 word = read_nic_word(dev, BcnItv);
1914 word &= ~BcnItv_BcnItv; // clear Bcn_Itv 1908 word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1915 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64; 1909 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1916 write_nic_word(dev, BcnItv, word); 1910 write_nic_word(dev, BcnItv, word);
1917 1911
1918 skb = ieee80211_get_beacon(priv->ieee80211); 1912 skb = ieee80211_get_beacon(priv->ieee80211);
1919 if(skb){ 1913 if (skb) {
1920 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY, 1914 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1921 0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate)); 1915 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1922 dev_kfree_skb_any(skb); 1916 dev_kfree_skb_any(skb);
1923 } 1917 }
1924} 1918}
1925 1919
1926/* This function do the real dirty work: it enqueues a TX command 1920/*
1921 * This function do the real dirty work: it enqueues a TX command
1927 * descriptor in the ring buffer, copyes the frame in a TX buffer 1922 * descriptor in the ring buffer, copyes the frame in a TX buffer
1928 * and kicks the NIC to ensure it does the DMA transfer. 1923 * and kicks the NIC to ensure it does the DMA transfer.
1929 */ 1924 */
@@ -1931,7 +1926,7 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1931 short morefrag, short descfrag, int rate) 1926 short morefrag, short descfrag, int rate)
1932{ 1927{
1933 struct r8180_priv *priv = ieee80211_priv(dev); 1928 struct r8180_priv *priv = ieee80211_priv(dev);
1934 u32 *tail,*temp_tail; 1929 u32 *tail, *temp_tail;
1935 u32 *begin; 1930 u32 *begin;
1936 u32 *buf; 1931 u32 *buf;
1937 int i; 1932 int i;
@@ -1940,70 +1935,69 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1940 int count; 1935 int count;
1941 u16 duration; 1936 u16 duration;
1942 short ext; 1937 short ext;
1943 struct buffer* buflist; 1938 struct buffer *buflist;
1944 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf; 1939 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1945 u8 dest[ETH_ALEN]; 1940 u8 dest[ETH_ALEN];
1946 u8 bUseShortPreamble = 0; 1941 u8 bUseShortPreamble = 0;
1947 u8 bCTSEnable = 0; 1942 u8 bCTSEnable = 0;
1948 u8 bRTSEnable = 0; 1943 u8 bRTSEnable = 0;
1949 u16 Duration = 0; 1944 u16 Duration = 0;
1950 u16 RtsDur = 0; 1945 u16 RtsDur = 0;
1951 u16 ThisFrameTime = 0; 1946 u16 ThisFrameTime = 0;
1952 u16 TxDescDuration = 0; 1947 u16 TxDescDuration = 0;
1953 u8 ownbit_flag = false; 1948 u8 ownbit_flag = false;
1954 1949
1955 switch(priority) { 1950 switch (priority) {
1956 case MANAGE_PRIORITY: 1951 case MANAGE_PRIORITY:
1957 tail=priv->txmapringtail; 1952 tail = priv->txmapringtail;
1958 begin=priv->txmapring; 1953 begin = priv->txmapring;
1959 buflist = priv->txmapbufstail; 1954 buflist = priv->txmapbufstail;
1960 count = priv->txringcount; 1955 count = priv->txringcount;
1961 break; 1956 break;
1962 case BK_PRIORITY: 1957 case BK_PRIORITY:
1963 tail=priv->txbkpringtail; 1958 tail = priv->txbkpringtail;
1964 begin=priv->txbkpring; 1959 begin = priv->txbkpring;
1965 buflist = priv->txbkpbufstail; 1960 buflist = priv->txbkpbufstail;
1966 count = priv->txringcount; 1961 count = priv->txringcount;
1967 break; 1962 break;
1968 case BE_PRIORITY: 1963 case BE_PRIORITY:
1969 tail=priv->txbepringtail; 1964 tail = priv->txbepringtail;
1970 begin=priv->txbepring; 1965 begin = priv->txbepring;
1971 buflist = priv->txbepbufstail; 1966 buflist = priv->txbepbufstail;
1972 count = priv->txringcount; 1967 count = priv->txringcount;
1973 break; 1968 break;
1974 case VI_PRIORITY: 1969 case VI_PRIORITY:
1975 tail=priv->txvipringtail; 1970 tail = priv->txvipringtail;
1976 begin=priv->txvipring; 1971 begin = priv->txvipring;
1977 buflist = priv->txvipbufstail; 1972 buflist = priv->txvipbufstail;
1978 count = priv->txringcount; 1973 count = priv->txringcount;
1979 break; 1974 break;
1980 case VO_PRIORITY: 1975 case VO_PRIORITY:
1981 tail=priv->txvopringtail; 1976 tail = priv->txvopringtail;
1982 begin=priv->txvopring; 1977 begin = priv->txvopring;
1983 buflist = priv->txvopbufstail; 1978 buflist = priv->txvopbufstail;
1984 count = priv->txringcount; 1979 count = priv->txringcount;
1985 break; 1980 break;
1986 case HI_PRIORITY: 1981 case HI_PRIORITY:
1987 tail=priv->txhpringtail; 1982 tail = priv->txhpringtail;
1988 begin=priv->txhpring; 1983 begin = priv->txhpring;
1989 buflist = priv->txhpbufstail; 1984 buflist = priv->txhpbufstail;
1990 count = priv->txringcount; 1985 count = priv->txringcount;
1991 break; 1986 break;
1992 case BEACON_PRIORITY: 1987 case BEACON_PRIORITY:
1993 tail=priv->txbeaconringtail; 1988 tail = priv->txbeaconringtail;
1994 begin=priv->txbeaconring; 1989 begin = priv->txbeaconring;
1995 buflist = priv->txbeaconbufstail; 1990 buflist = priv->txbeaconbufstail;
1996 count = priv->txbeaconcount; 1991 count = priv->txbeaconcount;
1997 break; 1992 break;
1998 default: 1993 default:
1999 return -1; 1994 return -1;
2000 break; 1995 break;
2001 } 1996 }
2002 1997
2003 memcpy(&dest, frag_hdr->addr1, ETH_ALEN); 1998 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
2004 if (is_multicast_ether_addr(dest) || 1999 if (is_multicast_ether_addr(dest) ||
2005 is_broadcast_ether_addr(dest)) 2000 is_broadcast_ether_addr(dest)) {
2006 {
2007 Duration = 0; 2001 Duration = 0;
2008 RtsDur = 0; 2002 RtsDur = 0;
2009 bRTSEnable = 0; 2003 bRTSEnable = 0;
@@ -2011,40 +2005,38 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2011 2005
2012 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble); 2006 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2013 TxDescDuration = ThisFrameTime; 2007 TxDescDuration = ThisFrameTime;
2014 } else {// Unicast packet 2008 } else { /* Unicast packet */
2015 u16 AckTime; 2009 u16 AckTime;
2016 2010
2017 //YJ,add,080828,for Keep alive 2011 /* YJ,add,080828,for Keep alive */
2018 priv->NumTxUnicast++; 2012 priv->NumTxUnicast++;
2019 2013
2020 /* Figure out ACK rate according to BSS basic rate 2014 /* Figure out ACK rate according to BSS basic rate
2021 * and Tx rate. */ 2015 * and Tx rate. */
2022 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send 2016 AckTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
2023 2017
2024 if ( ((len + sCrcLng) > priv->rts) && priv->rts ) 2018 if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
2025 { // RTS/CTS.
2026 u16 RtsTime, CtsTime; 2019 u16 RtsTime, CtsTime;
2027 //u16 CtsRate; 2020 /* u16 CtsRate; */
2028 bRTSEnable = 1; 2021 bRTSEnable = 1;
2029 bCTSEnable = 0; 2022 bCTSEnable = 0;
2030 2023
2031 // Rate and time required for RTS. 2024 /* Rate and time required for RTS. */
2032 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0); 2025 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
2033 // Rate and time required for CTS. 2026 /* Rate and time required for CTS. */
2034 CtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send 2027 CtsTime = ComputeTxTime(14, 10, 0, 0); /* AckCTSLng = 14 use 1M bps send */
2035 2028
2036 // Figure out time required to transmit this frame. 2029 /* Figure out time required to transmit this frame. */
2037 ThisFrameTime = ComputeTxTime(len + sCrcLng, 2030 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2038 rtl8180_rate2rate(rate), 2031 rtl8180_rate2rate(rate),
2039 0, 2032 0,
2040 bUseShortPreamble); 2033 bUseShortPreamble);
2041 2034
2042 // RTS-CTS-ThisFrame-ACK. 2035 /* RTS-CTS-ThisFrame-ACK. */
2043 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime; 2036 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2044 2037
2045 TxDescDuration = RtsTime + RtsDur; 2038 TxDescDuration = RtsTime + RtsDur;
2046 } 2039 } else { /* Normal case. */
2047 else {// Normal case.
2048 bCTSEnable = 0; 2040 bCTSEnable = 0;
2049 bRTSEnable = 0; 2041 bRTSEnable = 0;
2050 RtsDur = 0; 2042 RtsDur = 0;
@@ -2054,34 +2046,34 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2054 } 2046 }
2055 2047
2056 if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) { 2048 if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
2057 // ThisFrame-ACK. 2049 /* ThisFrame-ACK. */
2058 Duration = aSifsTime + AckTime; 2050 Duration = aSifsTime + AckTime;
2059 } else { // One or more fragments remained. 2051 } else { /* One or more fragments remained. */
2060 u16 NextFragTime; 2052 u16 NextFragTime;
2061 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet 2053 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
2062 rtl8180_rate2rate(rate), 2054 rtl8180_rate2rate(rate),
2063 0, 2055 0,
2064 bUseShortPreamble ); 2056 bUseShortPreamble);
2065 2057
2066 //ThisFrag-ACk-NextFrag-ACK. 2058 /* ThisFrag-ACk-NextFrag-ACK. */
2067 Duration = NextFragTime + 3*aSifsTime + 2*AckTime; 2059 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2068 } 2060 }
2069 2061
2070 } // End of Unicast packet 2062 } /* End of Unicast packet */
2071 2063
2072 frag_hdr->duration_id = Duration; 2064 frag_hdr->duration_id = Duration;
2073 2065
2074 buflen=priv->txbuffsize; 2066 buflen = priv->txbuffsize;
2075 remain=len; 2067 remain = len;
2076 temp_tail = tail; 2068 temp_tail = tail;
2077 2069
2078 while(remain!=0){ 2070 while (remain != 0) {
2079 mb(); 2071 mb();
2080 if(!buflist){ 2072 if (!buflist) {
2081 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority); 2073 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2082 return -1; 2074 return -1;
2083 } 2075 }
2084 buf=buflist->buf; 2076 buf = buflist->buf;
2085 2077
2086 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) { 2078 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
2087 DMESGW("No more TX desc, returning %x of %x", 2079 DMESGW("No more TX desc, returning %x of %x",
@@ -2090,51 +2082,50 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2090 return remain; 2082 return remain;
2091 } 2083 }
2092 2084
2093 *tail= 0; // zeroes header 2085 *tail = 0; /* zeroes header */
2094 *(tail+1) = 0; 2086 *(tail+1) = 0;
2095 *(tail+3) = 0; 2087 *(tail+3) = 0;
2096 *(tail+5) = 0; 2088 *(tail+5) = 0;
2097 *(tail+6) = 0; 2089 *(tail+6) = 0;
2098 *(tail+7) = 0; 2090 *(tail+7) = 0;
2099 2091
2100 /*FIXME: this should be triggered by HW encryption parameters.*/ 2092 /* FIXME: this should be triggered by HW encryption parameters.*/
2101 *tail |= (1<<15); /* no encrypt */ 2093 *tail |= (1<<15); /* no encrypt */
2102 2094
2103 if(remain==len && !descfrag) { 2095 if (remain == len && !descfrag) {
2104 ownbit_flag = false; 2096 ownbit_flag = false;
2105 *tail = *tail| (1<<29) ; //fist segment of the packet 2097 *tail = *tail | (1<<29) ; /* fist segment of the packet */
2106 *tail = *tail |(len); 2098 *tail = *tail | (len);
2107 } else { 2099 } else {
2108 ownbit_flag = true; 2100 ownbit_flag = true;
2109 } 2101 }
2110 2102
2111 for(i=0;i<buflen&& remain >0;i++,remain--){ 2103 for (i = 0; i < buflen && remain > 0; i++, remain--) {
2112 ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer 2104 ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
2113 if(remain == 4 && i+4 >= buflen) break; 2105 if (remain == 4 && i+4 >= buflen)
2106 break;
2114 /* ensure the last desc has at least 4 bytes payload */ 2107 /* ensure the last desc has at least 4 bytes payload */
2115 2108
2116 } 2109 }
2117 txbuf = txbuf + i; 2110 txbuf = txbuf + i;
2118 *(tail+3)=*(tail+3) &~ 0xfff; 2111 *(tail+3) = *(tail+3) & ~0xfff;
2119 *(tail+3)=*(tail+3) | i; // buffer lenght 2112 *(tail+3) = *(tail+3) | i; /* buffer length */
2120 // Use short preamble or not 2113 /* Use short preamble or not */
2121 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE) 2114 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2122 if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long! 2115 if (priv->plcp_preamble_mode == 1 && rate != 0) /* short mode now, not long! */
2123 ;// *tail |= (1<<16); // enable short preamble mode. 2116 ; /* *tail |= (1<<16); */ /* enable short preamble mode. */
2124 2117
2125 if(bCTSEnable) { 2118 if (bCTSEnable)
2126 *tail |= (1<<18); 2119 *tail |= (1<<18);
2127 }
2128 2120
2129 if(bRTSEnable) //rts enable 2121 if (bRTSEnable) { /* rts enable */
2130 { 2122 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
2131 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE 2123 *tail |= (1<<23); /* rts enable */
2132 *tail |= (1<<23);//rts enable 2124 *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
2133 *(tail+1) |=(RtsDur&0xffff);//RTS Duration
2134 } 2125 }
2135 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION 2126 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
2136// *(tail+3) |= (0xe6<<16); 2127 /* *(tail+3) |= (0xe6<<16); */
2137 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ; 2128 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
2138 2129
2139 *tail = *tail | ((rate&0xf) << 24); 2130 *tail = *tail | ((rate&0xf) << 24);
2140 2131
@@ -2143,71 +2134,73 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2143 if (!priv->hw_plcp_len) { 2134 if (!priv->hw_plcp_len) {
2144 duration = rtl8180_len2duration(len, rate, &ext); 2135 duration = rtl8180_len2duration(len, rate, &ext);
2145 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16); 2136 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2146 if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension 2137 if (ext)
2138 *(tail+1) = *(tail+1) | (1<<31); /* plcp length extension */
2147 } 2139 }
2148 2140
2149 if(morefrag) *tail = (*tail) | (1<<17); // more fragment 2141 if (morefrag)
2150 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame 2142 *tail = (*tail) | (1<<17); /* more fragment */
2143 if (!remain)
2144 *tail = (*tail) | (1<<28); /* last segment of frame */
2151 2145
2152 *(tail+5) = *(tail+5)|(2<<27); 2146 *(tail+5) = *(tail+5)|(2<<27);
2153 *(tail+7) = *(tail+7)|(1<<4); 2147 *(tail+7) = *(tail+7)|(1<<4);
2154 2148
2155 wmb(); 2149 wmb();
2156 if(ownbit_flag) 2150 if (ownbit_flag)
2157 { 2151 *tail = *tail | (1<<31); /* descriptor ready to be txed */
2158 *tail = *tail | (1<<31); // descriptor ready to be txed
2159 }
2160 2152
2161 if((tail - begin)/8 == count-1) 2153 if ((tail - begin)/8 == count-1)
2162 tail=begin; 2154 tail = begin;
2163 else 2155 else
2164 tail=tail+8; 2156 tail = tail+8;
2165 2157
2166 buflist=buflist->next; 2158 buflist = buflist->next;
2167 2159
2168 mb(); 2160 mb();
2169 2161
2170 switch(priority) { 2162 switch (priority) {
2171 case MANAGE_PRIORITY: 2163 case MANAGE_PRIORITY:
2172 priv->txmapringtail=tail; 2164 priv->txmapringtail = tail;
2173 priv->txmapbufstail=buflist; 2165 priv->txmapbufstail = buflist;
2174 break; 2166 break;
2175 case BK_PRIORITY: 2167 case BK_PRIORITY:
2176 priv->txbkpringtail=tail; 2168 priv->txbkpringtail = tail;
2177 priv->txbkpbufstail=buflist; 2169 priv->txbkpbufstail = buflist;
2178 break; 2170 break;
2179 case BE_PRIORITY: 2171 case BE_PRIORITY:
2180 priv->txbepringtail=tail; 2172 priv->txbepringtail = tail;
2181 priv->txbepbufstail=buflist; 2173 priv->txbepbufstail = buflist;
2182 break; 2174 break;
2183 case VI_PRIORITY: 2175 case VI_PRIORITY:
2184 priv->txvipringtail=tail; 2176 priv->txvipringtail = tail;
2185 priv->txvipbufstail=buflist; 2177 priv->txvipbufstail = buflist;
2186 break; 2178 break;
2187 case VO_PRIORITY: 2179 case VO_PRIORITY:
2188 priv->txvopringtail=tail; 2180 priv->txvopringtail = tail;
2189 priv->txvopbufstail=buflist; 2181 priv->txvopbufstail = buflist;
2190 break; 2182 break;
2191 case HI_PRIORITY: 2183 case HI_PRIORITY:
2192 priv->txhpringtail=tail; 2184 priv->txhpringtail = tail;
2193 priv->txhpbufstail = buflist; 2185 priv->txhpbufstail = buflist;
2194 break; 2186 break;
2195 case BEACON_PRIORITY: 2187 case BEACON_PRIORITY:
2196 /* the HW seems to be happy with the 1st 2188 /*
2197 * descriptor filled and the 2nd empty... 2189 * The HW seems to be happy with the 1st
2198 * So always update descriptor 1 and never 2190 * descriptor filled and the 2nd empty...
2199 * touch 2nd 2191 * So always update descriptor 1 and never
2200 */ 2192 * touch 2nd
2201 break; 2193 */
2194 break;
2202 } 2195 }
2203 } 2196 }
2204 *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed 2197 *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
2205 rtl8180_dma_kick(dev,priority); 2198 rtl8180_dma_kick(dev, priority);
2206 2199
2207 return 0; 2200 return 0;
2208} 2201}
2209 2202
2210void rtl8180_irq_rx_tasklet(struct r8180_priv * priv); 2203void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
2211 2204
2212void rtl8180_link_change(struct net_device *dev) 2205void rtl8180_link_change(struct net_device *dev)
2213{ 2206{
@@ -2217,13 +2210,13 @@ void rtl8180_link_change(struct net_device *dev)
2217 2210
2218 rtl8180_update_msr(dev); 2211 rtl8180_update_msr(dev);
2219 2212
2220 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 2213 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2221 2214
2222 write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]); 2215 write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
2223 write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]); 2216 write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
2224 2217
2225 beacon_interval = read_nic_dword(dev,BEACON_INTERVAL); 2218 beacon_interval = read_nic_dword(dev, BEACON_INTERVAL);
2226 beacon_interval &= ~ BEACON_INTERVAL_MASK; 2219 beacon_interval &= ~BEACON_INTERVAL_MASK;
2227 beacon_interval |= net->beacon_interval; 2220 beacon_interval |= net->beacon_interval;
2228 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval); 2221 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
2229 2222
@@ -2232,42 +2225,50 @@ void rtl8180_link_change(struct net_device *dev)
2232 rtl8180_set_chan(dev, priv->chan); 2225 rtl8180_set_chan(dev, priv->chan);
2233} 2226}
2234 2227
2235void rtl8180_rq_tx_ack(struct net_device *dev){ 2228void rtl8180_rq_tx_ack(struct net_device *dev)
2229{
2236 2230
2237 struct r8180_priv *priv = ieee80211_priv(dev); 2231 struct r8180_priv *priv = ieee80211_priv(dev);
2238 2232
2239 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT); 2233 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2240 priv->ack_tx_to_ieee = 1; 2234 priv->ack_tx_to_ieee = 1;
2241} 2235}
2242 2236
2243short rtl8180_is_tx_queue_empty(struct net_device *dev){ 2237short rtl8180_is_tx_queue_empty(struct net_device *dev)
2238{
2244 2239
2245 struct r8180_priv *priv = ieee80211_priv(dev); 2240 struct r8180_priv *priv = ieee80211_priv(dev);
2246 u32* d; 2241 u32 *d;
2247 2242
2248 for (d = priv->txmapring; 2243 for (d = priv->txmapring;
2249 d < priv->txmapring + priv->txringcount;d+=8) 2244 d < priv->txmapring + priv->txringcount; d += 8)
2250 if(*d & (1<<31)) return 0; 2245 if (*d & (1<<31))
2246 return 0;
2251 2247
2252 for (d = priv->txbkpring; 2248 for (d = priv->txbkpring;
2253 d < priv->txbkpring + priv->txringcount;d+=8) 2249 d < priv->txbkpring + priv->txringcount; d += 8)
2254 if(*d & (1<<31)) return 0; 2250 if (*d & (1<<31))
2251 return 0;
2255 2252
2256 for (d = priv->txbepring; 2253 for (d = priv->txbepring;
2257 d < priv->txbepring + priv->txringcount;d+=8) 2254 d < priv->txbepring + priv->txringcount; d += 8)
2258 if(*d & (1<<31)) return 0; 2255 if (*d & (1<<31))
2256 return 0;
2259 2257
2260 for (d = priv->txvipring; 2258 for (d = priv->txvipring;
2261 d < priv->txvipring + priv->txringcount;d+=8) 2259 d < priv->txvipring + priv->txringcount; d += 8)
2262 if(*d & (1<<31)) return 0; 2260 if (*d & (1<<31))
2261 return 0;
2263 2262
2264 for (d = priv->txvopring; 2263 for (d = priv->txvopring;
2265 d < priv->txvopring + priv->txringcount;d+=8) 2264 d < priv->txvopring + priv->txringcount; d += 8)
2266 if(*d & (1<<31)) return 0; 2265 if (*d & (1<<31))
2266 return 0;
2267 2267
2268 for (d = priv->txhpring; 2268 for (d = priv->txhpring;
2269 d < priv->txhpring + priv->txringcount;d+=8) 2269 d < priv->txhpring + priv->txringcount; d += 8)
2270 if(*d & (1<<31)) return 0; 2270 if (*d & (1<<31))
2271 return 0;
2271 return 1; 2272 return 1;
2272} 2273}
2273/* FIXME FIXME 5msecs is random */ 2274/* FIXME FIXME 5msecs is random */
@@ -2278,22 +2279,22 @@ void rtl8180_hw_wakeup(struct net_device *dev)
2278 unsigned long flags; 2279 unsigned long flags;
2279 struct r8180_priv *priv = ieee80211_priv(dev); 2280 struct r8180_priv *priv = ieee80211_priv(dev);
2280 2281
2281 spin_lock_irqsave(&priv->ps_lock,flags); 2282 spin_lock_irqsave(&priv->ps_lock, flags);
2282 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT); 2283 write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2283 if (priv->rf_wakeup) 2284 if (priv->rf_wakeup)
2284 priv->rf_wakeup(dev); 2285 priv->rf_wakeup(dev);
2285 spin_unlock_irqrestore(&priv->ps_lock,flags); 2286 spin_unlock_irqrestore(&priv->ps_lock, flags);
2286} 2287}
2287 2288
2288void rtl8180_hw_sleep_down(struct net_device *dev) 2289void rtl8180_hw_sleep_down(struct net_device *dev)
2289{ 2290{
2290 unsigned long flags; 2291 unsigned long flags;
2291 struct r8180_priv *priv = ieee80211_priv(dev); 2292 struct r8180_priv *priv = ieee80211_priv(dev);
2292 2293
2293 spin_lock_irqsave(&priv->ps_lock,flags); 2294 spin_lock_irqsave(&priv->ps_lock, flags);
2294 if(priv->rf_sleep) 2295 if (priv->rf_sleep)
2295 priv->rf_sleep(dev); 2296 priv->rf_sleep(dev);
2296 spin_unlock_irqrestore(&priv->ps_lock,flags); 2297 spin_unlock_irqrestore(&priv->ps_lock, flags);
2297} 2298}
2298 2299
2299void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl) 2300void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
@@ -2302,47 +2303,50 @@ void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2302 u32 rb = jiffies; 2303 u32 rb = jiffies;
2303 unsigned long flags; 2304 unsigned long flags;
2304 2305
2305 spin_lock_irqsave(&priv->ps_lock,flags); 2306 spin_lock_irqsave(&priv->ps_lock, flags);
2306 2307
2307 /* Writing HW register with 0 equals to disable 2308 /*
2309 * Writing HW register with 0 equals to disable
2308 * the timer, that is not really what we want 2310 * the timer, that is not really what we want
2309 */ 2311 */
2310 tl -= MSECS(4+16+7); 2312 tl -= MSECS(4+16+7);
2311 2313
2312 /* If the interval in witch we are requested to sleep is too 2314 /*
2315 * If the interval in witch we are requested to sleep is too
2313 * short then give up and remain awake 2316 * short then give up and remain awake
2314 */ 2317 */
2315 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME)) 2318 if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2316 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) { 2319 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2317 spin_unlock_irqrestore(&priv->ps_lock,flags); 2320 spin_unlock_irqrestore(&priv->ps_lock, flags);
2318 printk("too short to sleep\n"); 2321 printk("too short to sleep\n");
2319 return; 2322 return;
2320 } 2323 }
2321 2324
2322 { 2325 {
2323 u32 tmp = (tl>rb)?(tl-rb):(rb-tl); 2326 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2324 2327
2325 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp); 2328 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2326 2329
2327 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb 2330 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); /* as tl may be less than rb */
2328 } 2331 }
2329 /* if we suspect the TimerInt is gone beyond tl 2332 /*
2333 * If we suspect the TimerInt is gone beyond tl
2330 * while setting it, then give up 2334 * while setting it, then give up
2331 */ 2335 */
2332 2336
2333 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))|| 2337 if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2334 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) { 2338 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2335 spin_unlock_irqrestore(&priv->ps_lock,flags); 2339 spin_unlock_irqrestore(&priv->ps_lock, flags);
2336 return; 2340 return;
2337 } 2341 }
2338 2342
2339 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq); 2343 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2340 spin_unlock_irqrestore(&priv->ps_lock,flags); 2344 spin_unlock_irqrestore(&priv->ps_lock, flags);
2341} 2345}
2342 2346
2343void rtl8180_wmm_param_update(struct work_struct * work) 2347void rtl8180_wmm_param_update(struct work_struct *work)
2344{ 2348{
2345 struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq); 2349 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2346 struct net_device *dev = ieee->dev; 2350 struct net_device *dev = ieee->dev;
2347 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param); 2351 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2348 u8 mode = ieee->current_network.mode; 2352 u8 mode = ieee->current_network.mode;
@@ -2351,81 +2355,81 @@ void rtl8180_wmm_param_update(struct work_struct * work)
2351 PAC_PARAM pAcParam; 2355 PAC_PARAM pAcParam;
2352 u8 i; 2356 u8 i;
2353 2357
2354 if(!ieee->current_network.QoS_Enable){ 2358 if (!ieee->current_network.QoS_Enable) {
2355 //legacy ac_xx_param update 2359 /* legacy ac_xx_param update */
2356 AcParam.longData = 0; 2360 AcParam.longData = 0;
2357 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS. 2361 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2358 AcParam.f.AciAifsn.f.ACM = 0; 2362 AcParam.f.AciAifsn.f.ACM = 0;
2359 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin. 2363 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2360 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax. 2364 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2361 AcParam.f.TXOPLimit = 0; 2365 AcParam.f.TXOPLimit = 0;
2362 for(eACI = 0; eACI < AC_MAX; eACI++){ 2366 for (eACI = 0; eACI < AC_MAX; eACI++) {
2363 AcParam.f.AciAifsn.f.ACI = (u8)eACI; 2367 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2364 { 2368 {
2365 u8 u1bAIFS; 2369 u8 u1bAIFS;
2366 u32 u4bAcParam; 2370 u32 u4bAcParam;
2367 pAcParam = (PAC_PARAM)(&AcParam); 2371 pAcParam = (PAC_PARAM)(&AcParam);
2368 // Retrive paramters to udpate. 2372 /* Retrive paramters to udpate. */
2369 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime; 2373 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2370 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)| 2374 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2371 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)| 2375 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2372 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)| 2376 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2373 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET)); 2377 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2374 switch(eACI){ 2378 switch (eACI) {
2375 case AC1_BK: 2379 case AC1_BK:
2376 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam); 2380 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2377 break; 2381 break;
2378 case AC0_BE: 2382 case AC0_BE:
2379 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam); 2383 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2380 break; 2384 break;
2381 case AC2_VI: 2385 case AC2_VI:
2382 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam); 2386 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2383 break; 2387 break;
2384 case AC3_VO: 2388 case AC3_VO:
2385 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam); 2389 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2386 break; 2390 break;
2387 default: 2391 default:
2388 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI); 2392 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
2389 break; 2393 break;
2390 } 2394 }
2391 } 2395 }
2392 } 2396 }
2393 return; 2397 return;
2394 } 2398 }
2395 2399
2396 for(i = 0; i < AC_MAX; i++){ 2400 for (i = 0; i < AC_MAX; i++) {
2397 //AcParam.longData = 0; 2401 /* AcParam.longData = 0; */
2398 pAcParam = (AC_PARAM * )ac_param; 2402 pAcParam = (AC_PARAM *)ac_param;
2399 { 2403 {
2400 AC_CODING eACI; 2404 AC_CODING eACI;
2401 u8 u1bAIFS; 2405 u8 u1bAIFS;
2402 u32 u4bAcParam; 2406 u32 u4bAcParam;
2403 2407
2404 // Retrive paramters to udpate. 2408 /* Retrive paramters to udpate. */
2405 eACI = pAcParam->f.AciAifsn.f.ACI; 2409 eACI = pAcParam->f.AciAifsn.f.ACI;
2406 //Mode G/A: slotTimeTimer = 9; Mode B: 20 2410 /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2407 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime; 2411 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2408 u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) | 2412 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
2409 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) | 2413 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
2410 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) | 2414 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
2411 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET)); 2415 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2412 2416
2413 switch(eACI){ 2417 switch (eACI) {
2414 case AC1_BK: 2418 case AC1_BK:
2415 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam); 2419 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2416 break; 2420 break;
2417 case AC0_BE: 2421 case AC0_BE:
2418 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam); 2422 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2419 break; 2423 break;
2420 case AC2_VI: 2424 case AC2_VI:
2421 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam); 2425 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2422 break; 2426 break;
2423 case AC3_VO: 2427 case AC3_VO:
2424 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam); 2428 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2425 break; 2429 break;
2426 default: 2430 default:
2427 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI); 2431 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
2428 break; 2432 break;
2429 } 2433 }
2430 } 2434 }
2431 ac_param += (sizeof(AC_PARAM)); 2435 ac_param += (sizeof(AC_PARAM));
@@ -2434,7 +2438,7 @@ void rtl8180_wmm_param_update(struct work_struct * work)
2434 2438
2435void rtl8180_tx_irq_wq(struct work_struct *work); 2439void rtl8180_tx_irq_wq(struct work_struct *work);
2436void rtl8180_restart_wq(struct work_struct *work); 2440void rtl8180_restart_wq(struct work_struct *work);
2437//void rtl8180_rq_tx_ack(struct work_struct *work); 2441/* void rtl8180_rq_tx_ack(struct work_struct *work); */
2438void rtl8180_watch_dog_wq(struct work_struct *work); 2442void rtl8180_watch_dog_wq(struct work_struct *work);
2439void rtl8180_hw_wakeup_wq(struct work_struct *work); 2443void rtl8180_hw_wakeup_wq(struct work_struct *work);
2440void rtl8180_hw_sleep_wq(struct work_struct *work); 2444void rtl8180_hw_sleep_wq(struct work_struct *work);
@@ -2450,95 +2454,91 @@ void watch_dog_adaptive(unsigned long data)
2450 return; 2454 return;
2451 } 2455 }
2452 2456
2453 // Tx High Power Mechanism. 2457 /* Tx High Power Mechanism. */
2454 if(CheckHighPower((struct net_device *)data)) 2458 if (CheckHighPower((struct net_device *)data))
2455 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq); 2459 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2456 2460
2457 // Tx Power Tracking on 87SE. 2461 /* Tx Power Tracking on 87SE. */
2458 if (CheckTxPwrTracking((struct net_device *)data)) 2462 if (CheckTxPwrTracking((struct net_device *)data))
2459 TxPwrTracking87SE((struct net_device *)data); 2463 TxPwrTracking87SE((struct net_device *)data);
2460 2464
2461 // Perform DIG immediately. 2465 /* Perform DIG immediately. */
2462 if(CheckDig((struct net_device *)data) == true) 2466 if (CheckDig((struct net_device *)data) == true)
2463 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq); 2467 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2464 rtl8180_watch_dog((struct net_device *)data); 2468 rtl8180_watch_dog((struct net_device *)data);
2465 2469
2466 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem); 2470 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2467 2471
2468 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME); 2472 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2469 add_timer(&priv->watch_dog_timer); 2473 add_timer(&priv->watch_dog_timer);
2470} 2474}
2471 2475
2472static CHANNEL_LIST ChannelPlan[] = { 2476static CHANNEL_LIST ChannelPlan[] = {
2473 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC 2477 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, /* FCC */
2474 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC 2478 {{1,2,3,4,5,6,7,8,9,10,11},11}, /* IC */
2475 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI 2479 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* ETSI */
2476 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI. 2480 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Spain. Change to ETSI. */
2477 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI. 2481 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* France. Change to ETSI. */
2478 {{14,36,40,44,48,52,56,60,64},9}, //MKK 2482 {{14,36,40,44,48,52,56,60,64},9}, /* MKK */
2479 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1 2483 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2480 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel. 2484 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, /* Israel. */
2481 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC 2485 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, /* For 11a , TELEC */
2482 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 2486 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2483 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 2487 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2484}; 2488};
2485 2489
2486static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee) 2490static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2487{ 2491{
2488 int i; 2492 int i;
2489 2493
2490 //lzm add 080826 2494 /* lzm add 080826 */
2491 ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1; 2495 ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2492 ieee->IbssStartChnl=0; 2496 ieee->IbssStartChnl = 0;
2493 2497
2494 switch (channel_plan) 2498 switch (channel_plan) {
2495 { 2499 case COUNTRY_CODE_FCC:
2496 case COUNTRY_CODE_FCC: 2500 case COUNTRY_CODE_IC:
2497 case COUNTRY_CODE_IC: 2501 case COUNTRY_CODE_ETSI:
2498 case COUNTRY_CODE_ETSI: 2502 case COUNTRY_CODE_SPAIN:
2499 case COUNTRY_CODE_SPAIN: 2503 case COUNTRY_CODE_FRANCE:
2500 case COUNTRY_CODE_FRANCE: 2504 case COUNTRY_CODE_MKK:
2501 case COUNTRY_CODE_MKK: 2505 case COUNTRY_CODE_MKK1:
2502 case COUNTRY_CODE_MKK1: 2506 case COUNTRY_CODE_ISRAEL:
2503 case COUNTRY_CODE_ISRAEL: 2507 case COUNTRY_CODE_TELEC:
2504 case COUNTRY_CODE_TELEC:
2505 { 2508 {
2506 Dot11d_Init(ieee); 2509 Dot11d_Init(ieee);
2507 ieee->bGlobalDomain = false; 2510 ieee->bGlobalDomain = false;
2508 if (ChannelPlan[channel_plan].Len != 0){ 2511 if (ChannelPlan[channel_plan].Len != 0) {
2509 // Clear old channel map 2512 /* Clear old channel map */
2510 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map)); 2513 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2511 // Set new channel map 2514 /* Set new channel map */
2512 for (i=0;i<ChannelPlan[channel_plan].Len;i++) 2515 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2513 { 2516 if (ChannelPlan[channel_plan].Channel[i] <= 14)
2514 if(ChannelPlan[channel_plan].Channel[i] <= 14)
2515 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1; 2517 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2516 } 2518 }
2517 } 2519 }
2518 break; 2520 break;
2519 } 2521 }
2520 case COUNTRY_CODE_GLOBAL_DOMAIN: 2522 case COUNTRY_CODE_GLOBAL_DOMAIN:
2521 { 2523 {
2522 GET_DOT11D_INFO(ieee)->bEnabled = 0; 2524 GET_DOT11D_INFO(ieee)->bEnabled = 0;
2523 Dot11d_Reset(ieee); 2525 Dot11d_Reset(ieee);
2524 ieee->bGlobalDomain = true; 2526 ieee->bGlobalDomain = true;
2525 break; 2527 break;
2526 } 2528 }
2527 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826 2529 case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2528 { 2530 {
2529 ieee->MinPassiveChnlNum=12; 2531 ieee->MinPassiveChnlNum = 12;
2530 ieee->IbssStartChnl= 10; 2532 ieee->IbssStartChnl = 10;
2531 break; 2533 break;
2532 } 2534 }
2533 default: 2535 default:
2534 { 2536 {
2535 Dot11d_Init(ieee); 2537 Dot11d_Init(ieee);
2536 ieee->bGlobalDomain = false; 2538 ieee->bGlobalDomain = false;
2537 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map)); 2539 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2538 for (i=1;i<=14;i++) 2540 for (i = 1; i <= 14; i++)
2539 {
2540 GET_DOT11D_INFO(ieee)->channel_map[i] = 1; 2541 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2541 }
2542 break; 2542 break;
2543 } 2543 }
2544 } 2544 }
@@ -2546,7 +2546,7 @@ static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ie
2546 2546
2547void GPIOChangeRFWorkItemCallBack(struct work_struct *work); 2547void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2548 2548
2549//YJ,add,080828 2549/* YJ,add,080828 */
2550static void rtl8180_statistics_init(struct Stats *pstats) 2550static void rtl8180_statistics_init(struct Stats *pstats)
2551{ 2551{
2552 memset(pstats, 0, sizeof(struct Stats)); 2552 memset(pstats, 0, sizeof(struct Stats));
@@ -2557,8 +2557,8 @@ static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2557 memset(plink_detect, 0, sizeof(link_detect_t)); 2557 memset(plink_detect, 0, sizeof(link_detect_t));
2558 plink_detect->SlotNum = DEFAULT_SLOT_NUM; 2558 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2559} 2559}
2560//YJ,add,080828,end
2561 2560
2561/* YJ,add,080828,end */
2562static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom) 2562static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2563{ 2563{
2564 struct net_device *dev = eeprom->data; 2564 struct net_device *dev = eeprom->data;
@@ -2607,19 +2607,19 @@ short rtl8180_init(struct net_device *dev)
2607 2607
2608 eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val); 2608 eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2609 priv->channel_plan = eeprom_val & 0xFF; 2609 priv->channel_plan = eeprom_val & 0xFF;
2610 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){ 2610 if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2611 printk("rtl8180_init:Error channel plan! Set to default.\n"); 2611 printk("rtl8180_init:Error channel plan! Set to default.\n");
2612 priv->channel_plan = 0; 2612 priv->channel_plan = 0;
2613 } 2613 }
2614 2614
2615 DMESG("Channel plan is %d\n",priv->channel_plan); 2615 DMESG("Channel plan is %d\n", priv->channel_plan);
2616 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211); 2616 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2617 2617
2618 //FIXME: these constants are placed in a bad pleace. 2618 /* FIXME: these constants are placed in a bad pleace. */
2619 priv->txbuffsize = 2048;//1024; 2619 priv->txbuffsize = 2048; /* 1024; */
2620 priv->txringcount = 32;//32; 2620 priv->txringcount = 32; /* 32; */
2621 priv->rxbuffersize = 2048;//1024; 2621 priv->rxbuffersize = 2048; /* 1024; */
2622 priv->rxringcount = 64;//32; 2622 priv->rxringcount = 64; /* 32; */
2623 priv->txbeaconcount = 2; 2623 priv->txbeaconcount = 2;
2624 priv->rx_skb_complete = 1; 2624 priv->rx_skb_complete = 1;
2625 2625
@@ -2628,7 +2628,7 @@ short rtl8180_init(struct net_device *dev)
2628 priv->RFProgType = 0; 2628 priv->RFProgType = 0;
2629 priv->bInHctTest = false; 2629 priv->bInHctTest = false;
2630 2630
2631 priv->irq_enabled=0; 2631 priv->irq_enabled = 0;
2632 2632
2633 rtl8180_statistics_init(&priv->stats); 2633 rtl8180_statistics_init(&priv->stats);
2634 rtl8180_link_detect_init(&priv->link_detect); 2634 rtl8180_link_detect_init(&priv->link_detect);
@@ -2640,7 +2640,7 @@ short rtl8180_init(struct net_device *dev)
2640 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ | 2640 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2641 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE; 2641 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2642 priv->ieee80211->active_scan = 1; 2642 priv->ieee80211->active_scan = 1;
2643 priv->ieee80211->rate = 110; //11 mbps 2643 priv->ieee80211->rate = 110; /* 11 mbps */
2644 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION; 2644 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2645 priv->ieee80211->host_encrypt = 1; 2645 priv->ieee80211->host_encrypt = 1;
2646 priv->ieee80211->host_decrypt = 1; 2646 priv->ieee80211->host_decrypt = 1;
@@ -2650,27 +2650,27 @@ short rtl8180_init(struct net_device *dev)
2650 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty; 2650 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2651 2651
2652 priv->hw_wep = hwwep; 2652 priv->hw_wep = hwwep;
2653 priv->prism_hdr=0; 2653 priv->prism_hdr = 0;
2654 priv->dev=dev; 2654 priv->dev = dev;
2655 priv->retry_rts = DEFAULT_RETRY_RTS; 2655 priv->retry_rts = DEFAULT_RETRY_RTS;
2656 priv->retry_data = DEFAULT_RETRY_DATA; 2656 priv->retry_data = DEFAULT_RETRY_DATA;
2657 priv->RFChangeInProgress = false; 2657 priv->RFChangeInProgress = false;
2658 priv->SetRFPowerStateInProgress = false; 2658 priv->SetRFPowerStateInProgress = false;
2659 priv->RFProgType = 0; 2659 priv->RFProgType = 0;
2660 priv->bInHctTest = false; 2660 priv->bInHctTest = false;
2661 priv->bInactivePs = true;//false; 2661 priv->bInactivePs = true; /* false; */
2662 priv->ieee80211->bInactivePs = priv->bInactivePs; 2662 priv->ieee80211->bInactivePs = priv->bInactivePs;
2663 priv->bSwRfProcessing = false; 2663 priv->bSwRfProcessing = false;
2664 priv->eRFPowerState = eRfOff; 2664 priv->eRFPowerState = eRfOff;
2665 priv->RfOffReason = 0; 2665 priv->RfOffReason = 0;
2666 priv->LedStrategy = SW_LED_MODE0; 2666 priv->LedStrategy = SW_LED_MODE0;
2667 priv->TxPollingTimes = 0;//lzm add 080826 2667 priv->TxPollingTimes = 0; /* lzm add 080826 */
2668 priv->bLeisurePs = true; 2668 priv->bLeisurePs = true;
2669 priv->dot11PowerSaveMode = eActive; 2669 priv->dot11PowerSaveMode = eActive;
2670 priv->AdMinCheckPeriod = 5; 2670 priv->AdMinCheckPeriod = 5;
2671 priv->AdMaxCheckPeriod = 10; 2671 priv->AdMaxCheckPeriod = 10;
2672 priv->AdMaxRxSsThreshold = 30;//60->30 2672 priv->AdMaxRxSsThreshold = 30; /* 60->30 */
2673 priv->AdRxSsThreshold = 20;//50->20 2673 priv->AdRxSsThreshold = 20; /* 50->20 */
2674 priv->AdCheckPeriod = priv->AdMinCheckPeriod; 2674 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2675 priv->AdTickCount = 0; 2675 priv->AdTickCount = 0;
2676 priv->AdRxSignalStrength = -1; 2676 priv->AdRxSignalStrength = -1;
@@ -2691,15 +2691,15 @@ short rtl8180_init(struct net_device *dev)
2691 priv->bTxPowerTrack = false; 2691 priv->bTxPowerTrack = false;
2692 priv->ThermalMeter = 0; 2692 priv->ThermalMeter = 0;
2693 priv->FalseAlarmRegValue = 0; 2693 priv->FalseAlarmRegValue = 0;
2694 priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG. 2694 priv->RegDigOfdmFaUpTh = 0xc; /* Upper threhold of OFDM false alarm, which is used in DIG. */
2695 priv->DIG_NumberFallbackVote = 0; 2695 priv->DIG_NumberFallbackVote = 0;
2696 priv->DIG_NumberUpgradeVote = 0; 2696 priv->DIG_NumberUpgradeVote = 0;
2697 priv->LastSignalStrengthInPercent = 0; 2697 priv->LastSignalStrengthInPercent = 0;
2698 priv->Stats_SignalStrength = 0; 2698 priv->Stats_SignalStrength = 0;
2699 priv->LastRxPktAntenna = 0; 2699 priv->LastRxPktAntenna = 0;
2700 priv->SignalQuality = 0; // in 0-100 index. 2700 priv->SignalQuality = 0; /* in 0-100 index. */
2701 priv->Stats_SignalQuality = 0; 2701 priv->Stats_SignalQuality = 0;
2702 priv->RecvSignalPower = 0; // in dBm. 2702 priv->RecvSignalPower = 0; /* in dBm. */
2703 priv->Stats_RecvSignalPower = 0; 2703 priv->Stats_RecvSignalPower = 0;
2704 priv->AdMainAntennaRxOkCnt = 0; 2704 priv->AdMainAntennaRxOkCnt = 0;
2705 priv->AdAuxAntennaRxOkCnt = 0; 2705 priv->AdAuxAntennaRxOkCnt = 0;
@@ -2784,7 +2784,7 @@ short rtl8180_init(struct net_device *dev)
2784 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop; 2784 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2785 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume; 2785 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2786 2786
2787 priv->ieee80211->init_wmmparam_flag = 0; 2787 priv->ieee80211->init_wmmparam_flag = 0;
2788 2788
2789 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon; 2789 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2790 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable; 2790 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
@@ -2829,57 +2829,57 @@ short rtl8180_init(struct net_device *dev)
2829 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION; 2829 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2830 priv->ieee80211->short_slot = 1; 2830 priv->ieee80211->short_slot = 1;
2831 2831
2832 // just for sync 85 2832 /* just for sync 85 */
2833 priv->enable_gpio0 = 0; 2833 priv->enable_gpio0 = 0;
2834 2834
2835 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val); 2835 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
2836 usValue = eeprom_val; 2836 usValue = eeprom_val;
2837 DMESG("usValue is 0x%x\n",usValue); 2837 DMESG("usValue is 0x%x\n", usValue);
2838 //3Read AntennaDiversity 2838 /* 3Read AntennaDiversity */
2839 2839
2840 // SW Antenna Diversity. 2840 /* SW Antenna Diversity. */
2841 if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE) 2841 if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE)
2842 priv->EEPROMSwAntennaDiversity = false; 2842 priv->EEPROMSwAntennaDiversity = false;
2843 else 2843 else
2844 priv->EEPROMSwAntennaDiversity = true; 2844 priv->EEPROMSwAntennaDiversity = true;
2845 2845
2846 // Default Antenna to use. 2846 /* Default Antenna to use. */
2847 if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1) 2847 if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1)
2848 priv->EEPROMDefaultAntenna1 = false; 2848 priv->EEPROMDefaultAntenna1 = false;
2849 else 2849 else
2850 priv->EEPROMDefaultAntenna1 = true; 2850 priv->EEPROMDefaultAntenna1 = true;
2851 2851
2852 if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto 2852 if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2853 /* 0: default from EEPROM. */ 2853 /* 0: default from EEPROM. */
2854 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity; 2854 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2855 else 2855 else
2856 /* 1:disable antenna diversity, 2: enable antenna diversity. */ 2856 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2857 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true); 2857 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1) ? false : true);
2858 2858
2859 if (priv->RegDefaultAntenna == 0) 2859 if (priv->RegDefaultAntenna == 0)
2860 /* 0: default from EEPROM. */ 2860 /* 0: default from EEPROM. */
2861 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1; 2861 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2862 else 2862 else
2863 /* 1: main, 2: aux. */ 2863 /* 1: main, 2: aux. */
2864 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false); 2864 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna == 2) ? true : false);
2865 2865
2866 /* rtl8185 can calc plcp len in HW.*/ 2866 /* rtl8185 can calc plcp len in HW. */
2867 priv->hw_plcp_len = 1; 2867 priv->hw_plcp_len = 1;
2868 2868
2869 priv->plcp_preamble_mode = 2; 2869 priv->plcp_preamble_mode = 2;
2870 /*the eeprom type is stored in RCR register bit #6 */ 2870 /* the eeprom type is stored in RCR register bit #6 */
2871 if (RCR_9356SEL & read_nic_dword(dev, RCR)) 2871 if (RCR_9356SEL & read_nic_dword(dev, RCR))
2872 priv->epromtype=EPROM_93c56; 2872 priv->epromtype = EPROM_93c56;
2873 else 2873 else
2874 priv->epromtype=EPROM_93c46; 2874 priv->epromtype = EPROM_93c46;
2875 2875
2876 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *) 2876 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2877 dev->dev_addr, 3); 2877 dev->dev_addr, 3);
2878 2878
2879 for(i=1,j=0; i<14; i+=2,j++){ 2879 for (i = 1, j = 0; i < 14; i += 2, j++) {
2880 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word); 2880 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2881 priv->chtxpwr[i]=word & 0xff; 2881 priv->chtxpwr[i] = word & 0xff;
2882 priv->chtxpwr[i+1]=(word & 0xff00)>>8; 2882 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2883 } 2883 }
2884 for (i = 1, j = 0; i < 14; i += 2, j++) { 2884 for (i = 1, j = 0; i < 14; i += 2, j++) {
2885 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word); 2885 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
@@ -2906,7 +2906,7 @@ short rtl8180_init(struct net_device *dev)
2906 priv->ofdm_txpwr_base = (word>>4) & 0xf; 2906 priv->ofdm_txpwr_base = (word>>4) & 0xf;
2907 2907
2908 eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version); 2908 eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
2909 DMESG("EEPROM version %x",version); 2909 DMESG("EEPROM version %x", version);
2910 priv->rcr_csense = 3; 2910 priv->rcr_csense = 3;
2911 2911
2912 eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val); 2912 eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
@@ -2922,43 +2922,43 @@ short rtl8180_init(struct net_device *dev)
2922 priv->rf_set_chan = rtl8225z2_rf_set_chan; 2922 priv->rf_set_chan = rtl8225z2_rf_set_chan;
2923 priv->rf_set_sens = NULL; 2923 priv->rf_set_sens = NULL;
2924 2924
2925 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount)) 2925 if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2926 return -ENOMEM; 2926 return -ENOMEM;
2927 2927
2928 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 2928 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2929 TX_MANAGEPRIORITY_RING_ADDR)) 2929 TX_MANAGEPRIORITY_RING_ADDR))
2930 return -ENOMEM; 2930 return -ENOMEM;
2931 2931
2932 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 2932 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2933 TX_BKPRIORITY_RING_ADDR)) 2933 TX_BKPRIORITY_RING_ADDR))
2934 return -ENOMEM; 2934 return -ENOMEM;
2935 2935
2936 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 2936 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2937 TX_BEPRIORITY_RING_ADDR)) 2937 TX_BEPRIORITY_RING_ADDR))
2938 return -ENOMEM; 2938 return -ENOMEM;
2939 2939
2940 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 2940 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2941 TX_VIPRIORITY_RING_ADDR)) 2941 TX_VIPRIORITY_RING_ADDR))
2942 return -ENOMEM; 2942 return -ENOMEM;
2943 2943
2944 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 2944 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2945 TX_VOPRIORITY_RING_ADDR)) 2945 TX_VOPRIORITY_RING_ADDR))
2946 return -ENOMEM; 2946 return -ENOMEM;
2947 2947
2948 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 2948 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2949 TX_HIGHPRIORITY_RING_ADDR)) 2949 TX_HIGHPRIORITY_RING_ADDR))
2950 return -ENOMEM; 2950 return -ENOMEM;
2951 2951
2952 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount, 2952 if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2953 TX_BEACON_RING_ADDR)) 2953 TX_BEACON_RING_ADDR))
2954 return -ENOMEM; 2954 return -ENOMEM;
2955 2955
2956 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){ 2956 if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2957 DMESGE("Error allocating IRQ %d",dev->irq); 2957 DMESGE("Error allocating IRQ %d", dev->irq);
2958 return -1; 2958 return -1;
2959 }else{ 2959 } else {
2960 priv->irq=dev->irq; 2960 priv->irq = dev->irq;
2961 DMESG("IRQ %d",dev->irq); 2961 DMESG("IRQ %d", dev->irq);
2962 } 2962 }
2963 2963
2964 return 0; 2964 return 0;
@@ -2975,36 +2975,36 @@ void rtl8180_set_hw_wep(struct net_device *dev)
2975 u8 security; 2975 u8 security;
2976 u32 key0_word4; 2976 u32 key0_word4;
2977 2977
2978 pgreg=read_nic_byte(dev, PGSELECT); 2978 pgreg = read_nic_byte(dev, PGSELECT);
2979 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT)); 2979 write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2980 2980
2981 key0_word4 = read_nic_dword(dev, KEY0+4+4+4); 2981 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2982 key0_word4 &= ~ 0xff; 2982 key0_word4 &= ~0xff;
2983 key0_word4 |= priv->key0[3]& 0xff; 2983 key0_word4 |= priv->key0[3] & 0xff;
2984 write_nic_dword(dev,KEY0,(priv->key0[0])); 2984 write_nic_dword(dev, KEY0, (priv->key0[0]));
2985 write_nic_dword(dev,KEY0+4,(priv->key0[1])); 2985 write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2986 write_nic_dword(dev,KEY0+4+4,(priv->key0[2])); 2986 write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2987 write_nic_dword(dev,KEY0+4+4+4,(key0_word4)); 2987 write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2988 2988
2989 security = read_nic_byte(dev,SECURITY); 2989 security = read_nic_byte(dev, SECURITY);
2990 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT); 2990 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2991 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT); 2991 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2992 security &= ~ SECURITY_ENCRYP_MASK; 2992 security &= ~SECURITY_ENCRYP_MASK;
2993 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT); 2993 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2994 2994
2995 write_nic_byte(dev, SECURITY, security); 2995 write_nic_byte(dev, SECURITY, security);
2996 2996
2997 DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4), 2997 DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2998 read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4), 2998 read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2999 read_nic_dword(dev,KEY0)); 2999 read_nic_dword(dev, KEY0));
3000} 3000}
3001 3001
3002 3002
3003void rtl8185_rf_pins_enable(struct net_device *dev) 3003void rtl8185_rf_pins_enable(struct net_device *dev)
3004{ 3004{
3005// u16 tmp; 3005 /* u16 tmp; */
3006// tmp = read_nic_word(dev, RFPinsEnable); 3006 /* tmp = read_nic_word(dev, RFPinsEnable); */
3007 write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp); 3007 write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
3008} 3008}
3009 3009
3010void rtl8185_set_anaparam2(struct net_device *dev, u32 a) 3010void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
@@ -3018,7 +3018,7 @@ void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
3018 write_nic_dword(dev, ANAPARAM2, a); 3018 write_nic_dword(dev, ANAPARAM2, a);
3019 3019
3020 conf3 = read_nic_byte(dev, CONFIG3); 3020 conf3 = read_nic_byte(dev, CONFIG3);
3021 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT)); 3021 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3022 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 3022 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3023} 3023}
3024 3024
@@ -3033,7 +3033,7 @@ void rtl8180_set_anaparam(struct net_device *dev, u32 a)
3033 write_nic_dword(dev, ANAPARAM, a); 3033 write_nic_dword(dev, ANAPARAM, a);
3034 3034
3035 conf3 = read_nic_byte(dev, CONFIG3); 3035 conf3 = read_nic_byte(dev, CONFIG3);
3036 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT)); 3036 write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3037 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 3037 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3038} 3038}
3039 3039
@@ -3050,27 +3050,27 @@ void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
3050 3050
3051 adr |= 0x80; 3051 adr |= 0x80;
3052 3052
3053 phyw= ((data<<8) | adr); 3053 phyw = ((data<<8) | adr);
3054 3054
3055 // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. 3055 /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
3056 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24)); 3056 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
3057 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16)); 3057 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
3058 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8)); 3058 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
3059 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) )); 3059 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
3060 3060
3061 /* this is ok to fail when we write AGC table. check for AGC table might be 3061 /* this is ok to fail when we write AGC table. check for AGC table might be
3062 * done by masking with 0x7f instead of 0xff 3062 * done by masking with 0x7f instead of 0xff
3063 */ 3063 */
3064 //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr); 3064 /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
3065} 3065}
3066 3066
3067inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data) 3067inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
3068{ 3068{
3069 data = data & 0xff; 3069 data = data & 0xff;
3070 rtl8185_write_phy(dev, adr, data); 3070 rtl8185_write_phy(dev, adr, data);
3071} 3071}
3072 3072
3073void write_phy_cck (struct net_device *dev, u8 adr, u32 data) 3073void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
3074{ 3074{
3075 data = data & 0xff; 3075 data = data & 0xff;
3076 rtl8185_write_phy(dev, adr, data | 0x10000); 3076 rtl8185_write_phy(dev, adr, data | 0x10000);
@@ -3080,19 +3080,19 @@ void rtl8185_set_rate(struct net_device *dev)
3080{ 3080{
3081 int i; 3081 int i;
3082 u16 word; 3082 u16 word;
3083 int basic_rate,min_rr_rate,max_rr_rate; 3083 int basic_rate, min_rr_rate, max_rr_rate;
3084 3084
3085 basic_rate = ieeerate2rtlrate(240); 3085 basic_rate = ieeerate2rtlrate(240);
3086 min_rr_rate = ieeerate2rtlrate(60); 3086 min_rr_rate = ieeerate2rtlrate(60);
3087 max_rr_rate = ieeerate2rtlrate(240); 3087 max_rr_rate = ieeerate2rtlrate(240);
3088 3088
3089 write_nic_byte(dev, RESP_RATE, 3089 write_nic_byte(dev, RESP_RATE,
3090 max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT); 3090 max_rr_rate<<MAX_RESP_RATE_SHIFT | min_rr_rate<<MIN_RESP_RATE_SHIFT);
3091 3091
3092 word = read_nic_word(dev, BRSR); 3092 word = read_nic_word(dev, BRSR);
3093 word &= ~BRSR_MBR_8185; 3093 word &= ~BRSR_MBR_8185;
3094 3094
3095 for(i=0;i<=basic_rate;i++) 3095 for (i = 0; i <= basic_rate; i++)
3096 word |= (1<<i); 3096 word |= (1<<i);
3097 3097
3098 write_nic_word(dev, BRSR, word); 3098 write_nic_word(dev, BRSR, word);
@@ -3100,14 +3100,15 @@ void rtl8185_set_rate(struct net_device *dev)
3100 3100
3101void rtl8180_adapter_start(struct net_device *dev) 3101void rtl8180_adapter_start(struct net_device *dev)
3102{ 3102{
3103 struct r8180_priv *priv = ieee80211_priv(dev); 3103 struct r8180_priv *priv = ieee80211_priv(dev);
3104 3104
3105 rtl8180_rtx_disable(dev); 3105 rtl8180_rtx_disable(dev);
3106 rtl8180_reset(dev); 3106 rtl8180_reset(dev);
3107 3107
3108 /* enable beacon timeout, beacon TX ok and err 3108 /* enable beacon timeout, beacon TX ok and err
3109 * LP tx ok and err, HP TX ok and err, NP TX ok and err, 3109 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3110 * RX ok and ERR, and GP timer */ 3110 * RX ok and ERR, and GP timer
3111 */
3111 priv->irq_mask = 0x6fcf; 3112 priv->irq_mask = 0x6fcf;
3112 3113
3113 priv->dma_poll_mask = 0; 3114 priv->dma_poll_mask = 0;
@@ -3115,8 +3116,8 @@ void rtl8180_adapter_start(struct net_device *dev)
3115 rtl8180_beacon_tx_disable(dev); 3116 rtl8180_beacon_tx_disable(dev);
3116 3117
3117 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 3118 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3118 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]); 3119 write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
3119 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff ); 3120 write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
3120 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 3121 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3121 3122
3122 rtl8180_update_msr(dev); 3123 rtl8180_update_msr(dev);
@@ -3128,21 +3129,21 @@ void rtl8180_adapter_start(struct net_device *dev)
3128 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 3129 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3129 3130
3130 /* 3131 /*
3131 The following is very strange. seems to be that 1 means test mode, 3132 * The following is very strange. seems to be that 1 means test mode,
3132 but we need to acknolwledges the nic when a packet is ready 3133 * but we need to acknolwledges the nic when a packet is ready
3133 although we set it to 0 3134 * although we set it to 0
3134 */ 3135 */
3135 3136
3136 write_nic_byte(dev, 3137 write_nic_byte(dev,
3137 CONFIG2, read_nic_byte(dev,CONFIG2) &~\ 3138 CONFIG2, read_nic_byte(dev, CONFIG2) & ~\
3138 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT)); 3139 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
3139 //^the nic isn't in test mode 3140 /* ^the nic isn't in test mode */
3140 write_nic_byte(dev, 3141 write_nic_byte(dev,
3141 CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4)); 3142 CONFIG2, read_nic_byte(dev, CONFIG2)|(1<<4));
3142 3143
3143 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 3144 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3144 3145
3145 write_nic_dword(dev,INT_TIMEOUT,0); 3146 write_nic_dword(dev, INT_TIMEOUT, 0);
3146 3147
3147 write_nic_byte(dev, WPA_CONFIG, 0); 3148 write_nic_byte(dev, WPA_CONFIG, 0);
3148 3149
@@ -3153,7 +3154,7 @@ void rtl8180_adapter_start(struct net_device *dev)
3153 3154
3154 write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6)); 3155 write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
3155 3156
3156 /*FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */ 3157 /* FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */
3157 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 3158 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3158 write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3) 3159 write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3)
3159 | (1 << CONFIG3_CLKRUN_SHIFT)); 3160 | (1 << CONFIG3_CLKRUN_SHIFT));
@@ -3161,14 +3162,15 @@ void rtl8180_adapter_start(struct net_device *dev)
3161 3162
3162 priv->rf_init(dev); 3163 priv->rf_init(dev);
3163 3164
3164 if(priv->rf_set_sens != NULL) 3165 if (priv->rf_set_sens != NULL)
3165 priv->rf_set_sens(dev,priv->sens); 3166 priv->rf_set_sens(dev, priv->sens);
3166 rtl8180_irq_enable(dev); 3167 rtl8180_irq_enable(dev);
3167 3168
3168 netif_start_queue(dev); 3169 netif_start_queue(dev);
3169} 3170}
3170 3171
3171/* this configures registers for beacon tx and enables it via 3172/*
3173 * This configures registers for beacon tx and enables it via
3172 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might 3174 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
3173 * be used to stop beacon transmission 3175 * be used to stop beacon transmission
3174 */ 3176 */
@@ -3181,12 +3183,12 @@ void rtl8180_start_tx_beacon(struct net_device *dev)
3181 rtl8180_irq_disable(dev); 3183 rtl8180_irq_disable(dev);
3182 rtl8180_beacon_tx_enable(dev); 3184 rtl8180_beacon_tx_enable(dev);
3183 3185
3184 word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd; 3186 word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
3185 write_nic_word(dev, AtimWnd,word);// word |= 3187 write_nic_word(dev, AtimWnd, word); /* word |= */
3186 3188
3187 word = read_nic_word(dev, BintrItv); 3189 word = read_nic_word(dev, BintrItv);
3188 word &= ~BintrItv_BintrItv; 3190 word &= ~BintrItv_BintrItv;
3189 word |= 1000;/*priv->ieee80211->current_network.beacon_interval * 3191 word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
3190 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1); 3192 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
3191 // FIXME: check if correct ^^ worked with 0x3e8; 3193 // FIXME: check if correct ^^ worked with 0x3e8;
3192 */ 3194 */
@@ -3194,7 +3196,7 @@ void rtl8180_start_tx_beacon(struct net_device *dev)
3194 3196
3195 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 3197 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3196 3198
3197 rtl8185b_irq_enable(dev); 3199 rtl8185b_irq_enable(dev);
3198} 3200}
3199 3201
3200static struct net_device_stats *rtl8180_stats(struct net_device *dev) 3202static struct net_device_stats *rtl8180_stats(struct net_device *dev)
@@ -3203,17 +3205,18 @@ static struct net_device_stats *rtl8180_stats(struct net_device *dev)
3203 3205
3204 return &priv->ieee80211->stats; 3206 return &priv->ieee80211->stats;
3205} 3207}
3206// 3208
3207// Change current and default preamble mode. 3209/*
3208// 3210 * Change current and default preamble mode.
3211 */
3209bool 3212bool
3210MgntActSet_802_11_PowerSaveMode( 3213MgntActSet_802_11_PowerSaveMode(
3211 struct r8180_priv *priv, 3214 struct r8180_priv *priv,
3212 RT_PS_MODE rtPsMode 3215 RT_PS_MODE rtPsMode
3213) 3216)
3214{ 3217{
3215 // Currently, we do not change power save mode on IBSS mode. 3218 /* Currently, we do not change power save mode on IBSS mode. */
3216 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) 3219 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3217 return false; 3220 return false;
3218 3221
3219 priv->ieee80211->ps = rtPsMode; 3222 priv->ieee80211->ps = rtPsMode;
@@ -3225,7 +3228,7 @@ void LeisurePSEnter(struct r8180_priv *priv)
3225{ 3228{
3226 if (priv->bLeisurePs) { 3229 if (priv->bLeisurePs) {
3227 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED) 3230 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3228 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE 3231 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST); /* IEEE80211_PS_ENABLE */
3229 } 3232 }
3230} 3233}
3231 3234
@@ -3237,53 +3240,48 @@ void LeisurePSLeave(struct r8180_priv *priv)
3237 } 3240 }
3238} 3241}
3239 3242
3240void rtl8180_hw_wakeup_wq (struct work_struct *work) 3243void rtl8180_hw_wakeup_wq(struct work_struct *work)
3241{ 3244{
3242 struct delayed_work *dwork = to_delayed_work(work); 3245 struct delayed_work *dwork = to_delayed_work(work);
3243 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq); 3246 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
3244 struct net_device *dev = ieee->dev; 3247 struct net_device *dev = ieee->dev;
3245 3248
3246 rtl8180_hw_wakeup(dev); 3249 rtl8180_hw_wakeup(dev);
3247} 3250}
3248 3251
3249void rtl8180_hw_sleep_wq (struct work_struct *work) 3252void rtl8180_hw_sleep_wq(struct work_struct *work)
3250{ 3253{
3251 struct delayed_work *dwork = to_delayed_work(work); 3254 struct delayed_work *dwork = to_delayed_work(work);
3252 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq); 3255 struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
3253 struct net_device *dev = ieee->dev; 3256 struct net_device *dev = ieee->dev;
3254 3257
3255 rtl8180_hw_sleep_down(dev); 3258 rtl8180_hw_sleep_down(dev);
3256} 3259}
3257 3260
3258static void MgntLinkKeepAlive(struct r8180_priv *priv ) 3261static void MgntLinkKeepAlive(struct r8180_priv *priv)
3259{ 3262{
3260 if (priv->keepAliveLevel == 0) 3263 if (priv->keepAliveLevel == 0)
3261 return; 3264 return;
3262 3265
3263 if(priv->ieee80211->state == IEEE80211_LINKED) 3266 if (priv->ieee80211->state == IEEE80211_LINKED) {
3264 { 3267 /*
3265 // 3268 * Keep-Alive.
3266 // Keep-Alive. 3269 */
3267 //
3268 3270
3269 if ( (priv->keepAliveLevel== 2) || 3271 if ((priv->keepAliveLevel == 2) ||
3270 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast && 3272 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
3271 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast ) 3273 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
3272 ) 3274 ) {
3273 {
3274 priv->link_detect.IdleCount++; 3275 priv->link_detect.IdleCount++;
3275 3276
3276 // 3277 /*
3277 // Send a Keep-Alive packet packet to AP if we had been idle for a while. 3278 * Send a Keep-Alive packet packet to AP if we had been idle for a while.
3278 // 3279 */
3279 if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) ) 3280 if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
3280 {
3281 priv->link_detect.IdleCount = 0; 3281 priv->link_detect.IdleCount = 0;
3282 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false); 3282 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
3283 } 3283 }
3284 } 3284 } else {
3285 else
3286 {
3287 priv->link_detect.IdleCount = 0; 3285 priv->link_detect.IdleCount = 0;
3288 } 3286 }
3289 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast; 3287 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
@@ -3301,46 +3299,45 @@ void rtl8180_watch_dog(struct net_device *dev)
3301 u32 TotalRxNum = 0; 3299 u32 TotalRxNum = 0;
3302 u16 SlotIndex = 0; 3300 u16 SlotIndex = 0;
3303 u16 i = 0; 3301 u16 i = 0;
3304 if(priv->ieee80211->actscanning == false){ 3302 if (priv->ieee80211->actscanning == false) {
3305 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){ 3303 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn))
3306 IPSEnter(dev); 3304 IPSEnter(dev);
3307 }
3308 } 3305 }
3309 //YJ,add,080828,for link state check 3306 /* YJ,add,080828,for link state check */
3310 if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){ 3307 if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
3311 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum; 3308 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
3312 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod; 3309 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
3313 for( i=0; i<priv->link_detect.SlotNum; i++ ) 3310 for (i = 0; i < priv->link_detect.SlotNum; i++)
3314 TotalRxNum+= priv->link_detect.RxFrameNum[i]; 3311 TotalRxNum += priv->link_detect.RxFrameNum[i];
3315 3312
3316 if(TotalRxNum == 0){ 3313 if (TotalRxNum == 0) {
3317 priv->ieee80211->state = IEEE80211_ASSOCIATING; 3314 priv->ieee80211->state = IEEE80211_ASSOCIATING;
3318 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq); 3315 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
3319 } 3316 }
3320 } 3317 }
3321 3318
3322 //YJ,add,080828,for KeepAlive 3319 /* YJ,add,080828,for KeepAlive */
3323 MgntLinkKeepAlive(priv); 3320 MgntLinkKeepAlive(priv);
3324 3321
3325 //YJ,add,080828,for LPS 3322 /* YJ,add,080828,for LPS */
3326 if (priv->PowerProfile == POWER_PROFILE_BATTERY) 3323 if (priv->PowerProfile == POWER_PROFILE_BATTERY)
3327 priv->bLeisurePs = true; 3324 priv->bLeisurePs = true;
3328 else if (priv->PowerProfile == POWER_PROFILE_AC) { 3325 else if (priv->PowerProfile == POWER_PROFILE_AC) {
3329 LeisurePSLeave(priv); 3326 LeisurePSLeave(priv);
3330 priv->bLeisurePs= false; 3327 priv->bLeisurePs = false;
3331 } 3328 }
3332 3329
3333 if(priv->ieee80211->state == IEEE80211_LINKED){ 3330 if (priv->ieee80211->state == IEEE80211_LINKED) {
3334 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod; 3331 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
3335 if( priv->link_detect.NumRxOkInPeriod> 666 || 3332 if (priv->link_detect.NumRxOkInPeriod > 666 ||
3336 priv->link_detect.NumTxOkInPeriod> 666 ) { 3333 priv->link_detect.NumTxOkInPeriod > 666) {
3337 bBusyTraffic = true; 3334 bBusyTraffic = true;
3338 } 3335 }
3339 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8) 3336 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
3340 || (priv->link_detect.NumRxOkInPeriod > 2)) { 3337 || (priv->link_detect.NumRxOkInPeriod > 2)) {
3341 bEnterPS= false; 3338 bEnterPS = false;
3342 } else 3339 } else
3343 bEnterPS= true; 3340 bEnterPS = true;
3344 3341
3345 if (bEnterPS) 3342 if (bEnterPS)
3346 LeisurePSEnter(priv); 3343 LeisurePSEnter(priv);
@@ -3359,19 +3356,19 @@ int _rtl8180_up(struct net_device *dev)
3359{ 3356{
3360 struct r8180_priv *priv = ieee80211_priv(dev); 3357 struct r8180_priv *priv = ieee80211_priv(dev);
3361 3358
3362 priv->up=1; 3359 priv->up = 1;
3363 3360
3364 DMESG("Bringing up iface"); 3361 DMESG("Bringing up iface");
3365 rtl8185b_adapter_start(dev); 3362 rtl8185b_adapter_start(dev);
3366 rtl8185b_rx_enable(dev); 3363 rtl8185b_rx_enable(dev);
3367 rtl8185b_tx_enable(dev); 3364 rtl8185b_tx_enable(dev);
3368 if(priv->bInactivePs){ 3365 if (priv->bInactivePs) {
3369 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) 3366 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3370 IPSLeave(dev); 3367 IPSLeave(dev);
3371 } 3368 }
3372 timer_rate_adaptive((unsigned long)dev); 3369 timer_rate_adaptive((unsigned long)dev);
3373 watch_dog_adaptive((unsigned long)dev); 3370 watch_dog_adaptive((unsigned long)dev);
3374 if(priv->bSwAntennaDiverity) 3371 if (priv->bSwAntennaDiverity)
3375 SwAntennaDiversityTimerCallback(dev); 3372 SwAntennaDiversityTimerCallback(dev);
3376 ieee80211_softmac_start_protocol(priv->ieee80211); 3373 ieee80211_softmac_start_protocol(priv->ieee80211);
3377 return 0; 3374 return 0;
@@ -3392,7 +3389,8 @@ int rtl8180_up(struct net_device *dev)
3392{ 3389{
3393 struct r8180_priv *priv = ieee80211_priv(dev); 3390 struct r8180_priv *priv = ieee80211_priv(dev);
3394 3391
3395 if (priv->up == 1) return -1; 3392 if (priv->up == 1)
3393 return -1;
3396 3394
3397 return _rtl8180_up(dev); 3395 return _rtl8180_up(dev);
3398} 3396}
@@ -3416,7 +3414,7 @@ int rtl8180_down(struct net_device *dev)
3416 if (priv->up == 0) 3414 if (priv->up == 0)
3417 return -1; 3415 return -1;
3418 3416
3419 priv->up=0; 3417 priv->up = 0;
3420 3418
3421 ieee80211_softmac_stop_protocol(priv->ieee80211); 3419 ieee80211_softmac_stop_protocol(priv->ieee80211);
3422 /* FIXME */ 3420 /* FIXME */
@@ -3432,8 +3430,8 @@ int rtl8180_down(struct net_device *dev)
3432 cancel_delayed_work(&priv->ieee80211->hw_dig_wq); 3430 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3433 cancel_delayed_work(&priv->ieee80211->tx_pw_wq); 3431 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3434 del_timer_sync(&priv->SwAntennaDiversityTimer); 3432 del_timer_sync(&priv->SwAntennaDiversityTimer);
3435 SetZebraRFPowerState8185(dev,eRfOff); 3433 SetZebraRFPowerState8185(dev, eRfOff);
3436 memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network)); 3434 memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3437 priv->ieee80211->state = IEEE80211_NOLINK; 3435 priv->ieee80211->state = IEEE80211_NOLINK;
3438 return 0; 3436 return 0;
3439} 3437}
@@ -3483,7 +3481,7 @@ static void r8180_set_multicast(struct net_device *dev)
3483 struct r8180_priv *priv = ieee80211_priv(dev); 3481 struct r8180_priv *priv = ieee80211_priv(dev);
3484 short promisc; 3482 short promisc;
3485 3483
3486 promisc = (dev->flags & IFF_PROMISC) ? 1:0; 3484 promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3487 3485
3488 if (promisc != priv->promisc) 3486 if (promisc != priv->promisc)
3489 rtl8180_restart(dev); 3487 rtl8180_restart(dev);
@@ -3500,7 +3498,7 @@ int r8180_set_mac_adr(struct net_device *dev, void *mac)
3500 3498
3501 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 3499 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3502 3500
3503 if(priv->ieee80211->iw_mode == IW_MODE_MASTER) 3501 if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3504 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN); 3502 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3505 3503
3506 if (priv->up) { 3504 if (priv->up) {
@@ -3518,7 +3516,7 @@ int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3518{ 3516{
3519 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 3517 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3520 struct iwreq *wrq = (struct iwreq *) rq; 3518 struct iwreq *wrq = (struct iwreq *) rq;
3521 int ret=-1; 3519 int ret = -1;
3522 3520
3523 switch (cmd) { 3521 switch (cmd) {
3524 case RTL_IOCTL_WPA_SUPPLICANT: 3522 case RTL_IOCTL_WPA_SUPPLICANT:
@@ -3549,21 +3547,21 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3549{ 3547{
3550 unsigned long ioaddr = 0; 3548 unsigned long ioaddr = 0;
3551 struct net_device *dev = NULL; 3549 struct net_device *dev = NULL;
3552 struct r8180_priv *priv= NULL; 3550 struct r8180_priv *priv = NULL;
3553 u8 unit = 0; 3551 u8 unit = 0;
3554 3552
3555 unsigned long pmem_start, pmem_len, pmem_flags; 3553 unsigned long pmem_start, pmem_len, pmem_flags;
3556 3554
3557 DMESG("Configuring chip resources"); 3555 DMESG("Configuring chip resources");
3558 3556
3559 if( pci_enable_device (pdev) ){ 3557 if (pci_enable_device(pdev)) {
3560 DMESG("Failed to enable PCI device"); 3558 DMESG("Failed to enable PCI device");
3561 return -EIO; 3559 return -EIO;
3562 } 3560 }
3563 3561
3564 pci_set_master(pdev); 3562 pci_set_master(pdev);
3565 pci_set_dma_mask(pdev, 0xffffff00ULL); 3563 pci_set_dma_mask(pdev, 0xffffff00ULL);
3566 pci_set_consistent_dma_mask(pdev,0xffffff00ULL); 3564 pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3567 dev = alloc_ieee80211(sizeof(struct r8180_priv)); 3565 dev = alloc_ieee80211(sizeof(struct r8180_priv));
3568 if (!dev) 3566 if (!dev)
3569 return -ENOMEM; 3567 return -ENOMEM;
@@ -3578,26 +3576,26 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3578 3576
3579 pmem_start = pci_resource_start(pdev, 1); 3577 pmem_start = pci_resource_start(pdev, 1);
3580 pmem_len = pci_resource_len(pdev, 1); 3578 pmem_len = pci_resource_len(pdev, 1);
3581 pmem_flags = pci_resource_flags (pdev, 1); 3579 pmem_flags = pci_resource_flags(pdev, 1);
3582 3580
3583 if (!(pmem_flags & IORESOURCE_MEM)) { 3581 if (!(pmem_flags & IORESOURCE_MEM)) {
3584 DMESG("region #1 not a MMIO resource, aborting"); 3582 DMESG("region #1 not a MMIO resource, aborting");
3585 goto fail; 3583 goto fail;
3586 } 3584 }
3587 3585
3588 if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) { 3586 if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3589 DMESG("request_mem_region failed!"); 3587 DMESG("request_mem_region failed!");
3590 goto fail; 3588 goto fail;
3591 } 3589 }
3592 3590
3593 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len); 3591 ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3594 if( ioaddr == (unsigned long)NULL ){ 3592 if (ioaddr == (unsigned long)NULL) {
3595 DMESG("ioremap failed!"); 3593 DMESG("ioremap failed!");
3596 goto fail1; 3594 goto fail1;
3597 } 3595 }
3598 3596
3599 dev->mem_start = ioaddr; // shared mem start 3597 dev->mem_start = ioaddr; /* shared mem start */
3600 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end 3598 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3601 3599
3602 pci_read_config_byte(pdev, 0x05, &unit); 3600 pci_read_config_byte(pdev, 0x05, &unit);
3603 pci_write_config_byte(pdev, 0x05, unit & (~0x04)); 3601 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
@@ -3608,16 +3606,16 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3608 dev->netdev_ops = &rtl8180_netdev_ops; 3606 dev->netdev_ops = &rtl8180_netdev_ops;
3609 dev->wireless_handlers = &r8180_wx_handlers_def; 3607 dev->wireless_handlers = &r8180_wx_handlers_def;
3610 3608
3611 dev->type=ARPHRD_ETHER; 3609 dev->type = ARPHRD_ETHER;
3612 dev->watchdog_timeo = HZ*3; 3610 dev->watchdog_timeo = HZ*3;
3613 3611
3614 if (dev_alloc_name(dev, ifname) < 0){ 3612 if (dev_alloc_name(dev, ifname) < 0) {
3615 DMESG("Oops: devname already taken! Trying wlan%%d...\n"); 3613 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3616 ifname = "wlan%d"; 3614 ifname = "wlan%d";
3617 dev_alloc_name(dev, ifname); 3615 dev_alloc_name(dev, ifname);
3618 } 3616 }
3619 3617
3620 if(rtl8180_init(dev)!=0){ 3618 if (rtl8180_init(dev) != 0) {
3621 DMESG("Initialization failed"); 3619 DMESG("Initialization failed");
3622 goto fail1; 3620 goto fail1;
3623 } 3621 }
@@ -3631,16 +3629,16 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3631 DMESG("Driver probe completed\n"); 3629 DMESG("Driver probe completed\n");
3632 return 0; 3630 return 0;
3633fail1: 3631fail1:
3634 if( dev->mem_start != (unsigned long)NULL ){ 3632 if (dev->mem_start != (unsigned long)NULL) {
3635 iounmap( (void *)dev->mem_start ); 3633 iounmap((void *)dev->mem_start);
3636 release_mem_region( pci_resource_start(pdev, 1), 3634 release_mem_region(pci_resource_start(pdev, 1),
3637 pci_resource_len(pdev, 1) ); 3635 pci_resource_len(pdev, 1));
3638 } 3636 }
3639fail: 3637fail:
3640 if(dev){ 3638 if (dev) {
3641 if (priv->irq) { 3639 if (priv->irq) {
3642 free_irq(dev->irq, dev); 3640 free_irq(dev->irq, dev);
3643 dev->irq=0; 3641 dev->irq = 0;
3644 } 3642 }
3645 free_ieee80211(dev); 3643 free_ieee80211(dev);
3646 } 3644 }
@@ -3668,19 +3666,19 @@ static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
3668 rtl8180_reset(dev); 3666 rtl8180_reset(dev);
3669 mdelay(10); 3667 mdelay(10);
3670 3668
3671 if(priv->irq){ 3669 if (priv->irq) {
3672 DMESG("Freeing irq %d",dev->irq); 3670 DMESG("Freeing irq %d", dev->irq);
3673 free_irq(dev->irq, dev); 3671 free_irq(dev->irq, dev);
3674 priv->irq=0; 3672 priv->irq = 0;
3675 } 3673 }
3676 3674
3677 free_rx_desc_ring(dev); 3675 free_rx_desc_ring(dev);
3678 free_tx_desc_rings(dev); 3676 free_tx_desc_rings(dev);
3679 3677
3680 if( dev->mem_start != (unsigned long)NULL ){ 3678 if (dev->mem_start != (unsigned long)NULL) {
3681 iounmap( (void *)dev->mem_start ); 3679 iounmap((void *)dev->mem_start);
3682 release_mem_region( pci_resource_start(pdev, 1), 3680 release_mem_region(pci_resource_start(pdev, 1),
3683 pci_resource_len(pdev, 1) ); 3681 pci_resource_len(pdev, 1));
3684 } 3682 }
3685 3683
3686 free_ieee80211(dev); 3684 free_ieee80211(dev);
@@ -3740,7 +3738,7 @@ static int __init rtl8180_pci_module_init(void)
3740 3738
3741static void __exit rtl8180_pci_module_exit(void) 3739static void __exit rtl8180_pci_module_exit(void)
3742{ 3740{
3743 pci_unregister_driver (&rtl8180_pci_driver); 3741 pci_unregister_driver(&rtl8180_pci_driver);
3744 rtl8180_proc_module_remove(); 3742 rtl8180_proc_module_remove();
3745 ieee80211_crypto_tkip_exit(); 3743 ieee80211_crypto_tkip_exit();
3746 ieee80211_crypto_ccmp_exit(); 3744 ieee80211_crypto_ccmp_exit();
@@ -3755,109 +3753,111 @@ void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3755 short enough_desc; 3753 short enough_desc;
3756 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 3754 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3757 3755
3758 spin_lock_irqsave(&priv->tx_lock,flags); 3756 spin_lock_irqsave(&priv->tx_lock, flags);
3759 enough_desc = check_nic_enought_desc(dev,pri); 3757 enough_desc = check_nic_enought_desc(dev, pri);
3760 spin_unlock_irqrestore(&priv->tx_lock,flags); 3758 spin_unlock_irqrestore(&priv->tx_lock, flags);
3761 3759
3762 if(enough_desc) 3760 if (enough_desc)
3763 ieee80211_rtl_wake_queue(priv->ieee80211); 3761 ieee80211_rtl_wake_queue(priv->ieee80211);
3764} 3762}
3765 3763
3766void rtl8180_tx_isr(struct net_device *dev, int pri,short error) 3764void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3767{ 3765{
3768 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 3766 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3769 u32 *tail; //tail virtual addr 3767 u32 *tail; /* tail virtual addr */
3770 u32 *head; //head virtual addr 3768 u32 *head; /* head virtual addr */
3771 u32 *begin;//start of ring virtual addr 3769 u32 *begin; /* start of ring virtual addr */
3772 u32 *nicv; //nic pointer virtual addr 3770 u32 *nicv; /* nic pointer virtual addr */
3773 u32 nic; //nic pointer physical addr 3771 u32 nic; /* nic pointer physical addr */
3774 u32 nicbegin;// start of ring physical addr 3772 u32 nicbegin; /* start of ring physical addr */
3775 unsigned long flag; 3773 unsigned long flag;
3776 /* physical addr are ok on 32 bits since we set DMA mask*/ 3774 /* physical addr are ok on 32 bits since we set DMA mask */
3777 int offs; 3775 int offs;
3778 int j,i; 3776 int j, i;
3779 int hd; 3777 int hd;
3780 if (error) priv->stats.txretry++; //tony 20060601 3778 if (error)
3781 spin_lock_irqsave(&priv->tx_lock,flag); 3779 priv->stats.txretry++; /* tony 20060601 */
3782 switch(pri) { 3780 spin_lock_irqsave(&priv->tx_lock, flag);
3781 switch (pri) {
3783 case MANAGE_PRIORITY: 3782 case MANAGE_PRIORITY:
3784 tail = priv->txmapringtail; 3783 tail = priv->txmapringtail;
3785 begin = priv->txmapring; 3784 begin = priv->txmapring;
3786 head = priv->txmapringhead; 3785 head = priv->txmapringhead;
3787 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR); 3786 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3788 nicbegin = priv->txmapringdma; 3787 nicbegin = priv->txmapringdma;
3789 break; 3788 break;
3790 case BK_PRIORITY: 3789 case BK_PRIORITY:
3791 tail = priv->txbkpringtail; 3790 tail = priv->txbkpringtail;
3792 begin = priv->txbkpring; 3791 begin = priv->txbkpring;
3793 head = priv->txbkpringhead; 3792 head = priv->txbkpringhead;
3794 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR); 3793 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3795 nicbegin = priv->txbkpringdma; 3794 nicbegin = priv->txbkpringdma;
3796 break; 3795 break;
3797 case BE_PRIORITY: 3796 case BE_PRIORITY:
3798 tail = priv->txbepringtail; 3797 tail = priv->txbepringtail;
3799 begin = priv->txbepring; 3798 begin = priv->txbepring;
3800 head = priv->txbepringhead; 3799 head = priv->txbepringhead;
3801 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR); 3800 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3802 nicbegin = priv->txbepringdma; 3801 nicbegin = priv->txbepringdma;
3803 break; 3802 break;
3804 case VI_PRIORITY: 3803 case VI_PRIORITY:
3805 tail = priv->txvipringtail; 3804 tail = priv->txvipringtail;
3806 begin = priv->txvipring; 3805 begin = priv->txvipring;
3807 head = priv->txvipringhead; 3806 head = priv->txvipringhead;
3808 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR); 3807 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3809 nicbegin = priv->txvipringdma; 3808 nicbegin = priv->txvipringdma;
3810 break; 3809 break;
3811 case VO_PRIORITY: 3810 case VO_PRIORITY:
3812 tail = priv->txvopringtail; 3811 tail = priv->txvopringtail;
3813 begin = priv->txvopring; 3812 begin = priv->txvopring;
3814 head = priv->txvopringhead; 3813 head = priv->txvopringhead;
3815 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR); 3814 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3816 nicbegin = priv->txvopringdma; 3815 nicbegin = priv->txvopringdma;
3817 break; 3816 break;
3818 case HI_PRIORITY: 3817 case HI_PRIORITY:
3819 tail = priv->txhpringtail; 3818 tail = priv->txhpringtail;
3820 begin = priv->txhpring; 3819 begin = priv->txhpring;
3821 head = priv->txhpringhead; 3820 head = priv->txhpringhead;
3822 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR); 3821 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3823 nicbegin = priv->txhpringdma; 3822 nicbegin = priv->txhpringdma;
3824 break; 3823 break;
3825 3824
3826 default: 3825 default:
3827 spin_unlock_irqrestore(&priv->tx_lock,flag); 3826 spin_unlock_irqrestore(&priv->tx_lock, flag);
3828 return ; 3827 return ;
3829 } 3828 }
3830 3829
3831 nicv = (u32*) ((nic - nicbegin) + (u8*)begin); 3830 nicv = (u32 *)((nic - nicbegin) + (u8*)begin);
3832 if((head <= tail && (nicv > tail || nicv < head)) || 3831 if ((head <= tail && (nicv > tail || nicv < head)) ||
3833 (head > tail && (nicv > tail && nicv < head))){ 3832 (head > tail && (nicv > tail && nicv < head))) {
3834 DMESGW("nic has lost pointer"); 3833 DMESGW("nic has lost pointer");
3835 spin_unlock_irqrestore(&priv->tx_lock,flag); 3834 spin_unlock_irqrestore(&priv->tx_lock, flag);
3836 rtl8180_restart(dev); 3835 rtl8180_restart(dev);
3837 return; 3836 return;
3838 } 3837 }
3839 3838
3840 /* we check all the descriptors between the head and the nic, 3839 /*
3840 * We check all the descriptors between the head and the nic,
3841 * but not the currently pointed by the nic (the next to be txed) 3841 * but not the currently pointed by the nic (the next to be txed)
3842 * and the previous of the pointed (might be in process ??) 3842 * and the previous of the pointed (might be in process ??)
3843 */ 3843 */
3844 offs = (nic - nicbegin); 3844 offs = (nic - nicbegin);
3845 offs = offs / 8 /4; 3845 offs = offs / 8 / 4;
3846 hd = (head - begin) /8; 3846 hd = (head - begin) / 8;
3847 3847
3848 if(offs >= hd) 3848 if (offs >= hd)
3849 j = offs - hd; 3849 j = offs - hd;
3850 else 3850 else
3851 j = offs + (priv->txringcount -1 -hd); 3851 j = offs + (priv->txringcount-1-hd);
3852 3852
3853 j-=2; 3853 j -= 2;
3854 if(j<0) j=0; 3854 if (j < 0)
3855 j = 0;
3855 3856
3856 for(i=0;i<j;i++) 3857 for (i = 0; i < j; i++) {
3857 { 3858 if ((*head) & (1<<31))
3858 if((*head) & (1<<31))
3859 break; 3859 break;
3860 if(((*head)&(0x10000000)) != 0){ 3860 if (((*head)&(0x10000000)) != 0) {
3861 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff)); 3861 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3862 if (!error) 3862 if (!error)
3863 priv->NumTxOkTotal++; 3863 priv->NumTxOkTotal++;
@@ -3866,15 +3866,16 @@ void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
3866 if (!error) 3866 if (!error)
3867 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff); 3867 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3868 3868
3869 *head = *head &~ (1<<31); 3869 *head = *head & ~(1<<31);
3870 3870
3871 if((head - begin)/8 == priv->txringcount-1) 3871 if ((head - begin)/8 == priv->txringcount-1)
3872 head=begin; 3872 head = begin;
3873 else 3873 else
3874 head+=8; 3874 head += 8;
3875 } 3875 }
3876 3876
3877 /* the head has been moved to the last certainly TXed 3877 /*
3878 * The head has been moved to the last certainly TXed
3878 * (or at least processed by the nic) packet. 3879 * (or at least processed by the nic) packet.
3879 * The driver take forcefully owning of all these packets 3880 * The driver take forcefully owning of all these packets
3880 * If the packet previous of the nic pointer has been 3881 * If the packet previous of the nic pointer has been
@@ -3883,14 +3884,14 @@ void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
3883 * TXed no memory leak occour at all. 3884 * TXed no memory leak occour at all.
3884 */ 3885 */
3885 3886
3886 switch(pri) { 3887 switch (pri) {
3887 case MANAGE_PRIORITY: 3888 case MANAGE_PRIORITY:
3888 priv->txmapringhead = head; 3889 priv->txmapringhead = head;
3889 3890
3890 if(priv->ack_tx_to_ieee){ 3891 if (priv->ack_tx_to_ieee) {
3891 if(rtl8180_is_tx_queue_empty(dev)){ 3892 if (rtl8180_is_tx_queue_empty(dev)) {
3892 priv->ack_tx_to_ieee = 0; 3893 priv->ack_tx_to_ieee = 0;
3893 ieee80211_ps_tx_ack(priv->ieee80211,!error); 3894 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3894 } 3895 }
3895 } 3896 }
3896 break; 3897 break;
@@ -3911,17 +3912,17 @@ void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
3911 break; 3912 break;
3912 } 3913 }
3913 3914
3914 spin_unlock_irqrestore(&priv->tx_lock,flag); 3915 spin_unlock_irqrestore(&priv->tx_lock, flag);
3915} 3916}
3916 3917
3917void rtl8180_tx_irq_wq(struct work_struct *work) 3918void rtl8180_tx_irq_wq(struct work_struct *work)
3918{ 3919{
3919 struct delayed_work *dwork = to_delayed_work(work); 3920 struct delayed_work *dwork = to_delayed_work(work);
3920 struct ieee80211_device * ieee = (struct ieee80211_device*) 3921 struct ieee80211_device * ieee = (struct ieee80211_device *)
3921 container_of(dwork, struct ieee80211_device, watch_dog_wq); 3922 container_of(dwork, struct ieee80211_device, watch_dog_wq);
3922 struct net_device *dev = ieee->dev; 3923 struct net_device *dev = ieee->dev;
3923 3924
3924 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0); 3925 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3925} 3926}
3926irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs) 3927irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3927{ 3928{
@@ -3931,23 +3932,24 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3931 u32 inta; 3932 u32 inta;
3932 3933
3933 /* We should return IRQ_NONE, but for now let me keep this */ 3934 /* We should return IRQ_NONE, but for now let me keep this */
3934 if(priv->irq_enabled == 0) return IRQ_HANDLED; 3935 if (priv->irq_enabled == 0)
3936 return IRQ_HANDLED;
3935 3937
3936 spin_lock_irqsave(&priv->irq_th_lock,flags); 3938 spin_lock_irqsave(&priv->irq_th_lock, flags);
3937 3939
3938 //ISR: 4bytes 3940 /* ISR: 4bytes */
3939 inta = read_nic_dword(dev, ISR);// & priv->IntrMask; 3941 inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3940 write_nic_dword(dev,ISR,inta); // reset int situation 3942 write_nic_dword(dev, ISR, inta); /* reset int situation */
3941 3943
3942 priv->stats.shints++; 3944 priv->stats.shints++;
3943 3945
3944 if(!inta){ 3946 if (!inta) {
3945 spin_unlock_irqrestore(&priv->irq_th_lock,flags); 3947 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3946 return IRQ_HANDLED; 3948 return IRQ_HANDLED;
3947 /* 3949 /*
3948 most probably we can safely return IRQ_NONE, 3950 * most probably we can safely return IRQ_NONE,
3949 but for now is better to avoid problems 3951 * but for now is better to avoid problems
3950 */ 3952 */
3951 } 3953 }
3952 3954
3953 if (inta == 0xffff) { 3955 if (inta == 0xffff) {
@@ -3958,8 +3960,8 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3958 3960
3959 priv->stats.ints++; 3961 priv->stats.ints++;
3960 3962
3961 if(!netif_running(dev)) { 3963 if (!netif_running(dev)) {
3962 spin_unlock_irqrestore(&priv->irq_th_lock,flags); 3964 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3963 return IRQ_HANDLED; 3965 return IRQ_HANDLED;
3964 } 3966 }
3965 3967
@@ -3973,70 +3975,70 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3973 priv->stats.txbeaconerr++; 3975 priv->stats.txbeaconerr++;
3974 3976
3975 if (inta & IMR_TMGDOK) 3977 if (inta & IMR_TMGDOK)
3976 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0); 3978 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3977 3979
3978 if(inta & ISR_THPDER){ 3980 if (inta & ISR_THPDER) {
3979 priv->stats.txhperr++; 3981 priv->stats.txhperr++;
3980 rtl8180_tx_isr(dev,HI_PRIORITY,1); 3982 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3981 priv->ieee80211->stats.tx_errors++; 3983 priv->ieee80211->stats.tx_errors++;
3982 } 3984 }
3983 3985
3984 if(inta & ISR_THPDOK){ //High priority tx ok 3986 if (inta & ISR_THPDOK) { /* High priority tx ok */
3985 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 3987 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3986 priv->stats.txhpokint++; 3988 priv->stats.txhpokint++;
3987 rtl8180_tx_isr(dev,HI_PRIORITY,0); 3989 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3988 } 3990 }
3989 3991
3990 if(inta & ISR_RER) { 3992 if (inta & ISR_RER)
3991 priv->stats.rxerr++; 3993 priv->stats.rxerr++;
3992 } 3994
3993 if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY 3995 if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3994 priv->stats.txbkperr++; 3996 priv->stats.txbkperr++;
3995 priv->ieee80211->stats.tx_errors++; 3997 priv->ieee80211->stats.tx_errors++;
3996 rtl8180_tx_isr(dev,BK_PRIORITY,1); 3998 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3997 rtl8180_try_wake_queue(dev, BE_PRIORITY); 3999 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3998 } 4000 }
3999 4001
4000 if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY 4002 if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
4001 priv->stats.txbeperr++; 4003 priv->stats.txbeperr++;
4002 priv->ieee80211->stats.tx_errors++; 4004 priv->ieee80211->stats.tx_errors++;
4003 rtl8180_tx_isr(dev,BE_PRIORITY,1); 4005 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
4004 rtl8180_try_wake_queue(dev, BE_PRIORITY); 4006 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4005 } 4007 }
4006 if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY 4008 if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
4007 priv->stats.txnperr++; 4009 priv->stats.txnperr++;
4008 priv->ieee80211->stats.tx_errors++; 4010 priv->ieee80211->stats.tx_errors++;
4009 rtl8180_tx_isr(dev,NORM_PRIORITY,1); 4011 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
4010 rtl8180_try_wake_queue(dev, NORM_PRIORITY); 4012 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
4011 } 4013 }
4012 4014
4013 if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY 4015 if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
4014 priv->stats.txlperr++; 4016 priv->stats.txlperr++;
4015 priv->ieee80211->stats.tx_errors++; 4017 priv->ieee80211->stats.tx_errors++;
4016 rtl8180_tx_isr(dev,LOW_PRIORITY,1); 4018 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
4017 rtl8180_try_wake_queue(dev, LOW_PRIORITY); 4019 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4018 } 4020 }
4019 4021
4020 if(inta & ISR_ROK){ 4022 if (inta & ISR_ROK) {
4021 priv->stats.rxint++; 4023 priv->stats.rxint++;
4022 tasklet_schedule(&priv->irq_rx_tasklet); 4024 tasklet_schedule(&priv->irq_rx_tasklet);
4023 } 4025 }
4024 4026
4025 if(inta & ISR_RQoSOK ){ 4027 if (inta & ISR_RQoSOK) {
4026 priv->stats.rxint++; 4028 priv->stats.rxint++;
4027 tasklet_schedule(&priv->irq_rx_tasklet); 4029 tasklet_schedule(&priv->irq_rx_tasklet);
4028 } 4030 }
4029 if(inta & ISR_BcnInt) { 4031
4032 if (inta & ISR_BcnInt)
4030 rtl8180_prepare_beacon(dev); 4033 rtl8180_prepare_beacon(dev);
4031 }
4032 4034
4033 if(inta & ISR_RDU){ 4035 if (inta & ISR_RDU) {
4034 DMESGW("No RX descriptor available"); 4036 DMESGW("No RX descriptor available");
4035 priv->stats.rxrdu++; 4037 priv->stats.rxrdu++;
4036 tasklet_schedule(&priv->irq_rx_tasklet); 4038 tasklet_schedule(&priv->irq_rx_tasklet);
4037 } 4039 }
4038 4040
4039 if(inta & ISR_RXFOVW){ 4041 if (inta & ISR_RXFOVW) {
4040 priv->stats.rxoverflow++; 4042 priv->stats.rxoverflow++;
4041 tasklet_schedule(&priv->irq_rx_tasklet); 4043 tasklet_schedule(&priv->irq_rx_tasklet);
4042 } 4044 }
@@ -4044,39 +4046,39 @@ irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
4044 if (inta & ISR_TXFOVW) 4046 if (inta & ISR_TXFOVW)
4045 priv->stats.txoverflow++; 4047 priv->stats.txoverflow++;
4046 4048
4047 if(inta & ISR_TNPDOK){ //Normal priority tx ok 4049 if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
4048 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 4050 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4049 priv->stats.txnpokint++; 4051 priv->stats.txnpokint++;
4050 rtl8180_tx_isr(dev,NORM_PRIORITY,0); 4052 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
4051 } 4053 }
4052 4054
4053 if(inta & ISR_TLPDOK){ //Low priority tx ok 4055 if (inta & ISR_TLPDOK) { /* Low priority tx ok */
4054 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 4056 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4055 priv->stats.txlpokint++; 4057 priv->stats.txlpokint++;
4056 rtl8180_tx_isr(dev,LOW_PRIORITY,0); 4058 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
4057 rtl8180_try_wake_queue(dev, LOW_PRIORITY); 4059 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4058 } 4060 }
4059 4061
4060 if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY 4062 if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
4061 priv->stats.txbkpokint++; 4063 priv->stats.txbkpokint++;
4062 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 4064 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4063 rtl8180_tx_isr(dev,BK_PRIORITY,0); 4065 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
4064 rtl8180_try_wake_queue(dev, BE_PRIORITY); 4066 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4065 } 4067 }
4066 4068
4067 if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY 4069 if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
4068 priv->stats.txbeperr++; 4070 priv->stats.txbeperr++;
4069 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 4071 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4070 rtl8180_tx_isr(dev,BE_PRIORITY,0); 4072 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
4071 rtl8180_try_wake_queue(dev, BE_PRIORITY); 4073 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4072 } 4074 }
4073 force_pci_posting(dev); 4075 force_pci_posting(dev);
4074 spin_unlock_irqrestore(&priv->irq_th_lock,flags); 4076 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4075 4077
4076 return IRQ_HANDLED; 4078 return IRQ_HANDLED;
4077} 4079}
4078 4080
4079void rtl8180_irq_rx_tasklet(struct r8180_priv* priv) 4081void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
4080{ 4082{
4081 rtl8180_rx(priv->dev); 4083 rtl8180_rx(priv->dev);
4082} 4084}
@@ -4089,14 +4091,14 @@ void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4089 u8 btPSR; 4091 u8 btPSR;
4090 u8 btConfig0; 4092 u8 btConfig0;
4091 RT_RF_POWER_STATE eRfPowerStateToSet; 4093 RT_RF_POWER_STATE eRfPowerStateToSet;
4092 bool bActuallySet=false; 4094 bool bActuallySet = false;
4093 4095
4094 char *argv[3]; 4096 char *argv[3];
4095 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh"; 4097 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
4096 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL}; 4098 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4097 static int readf_count = 0; 4099 static int readf_count = 0;
4098 4100
4099 if(readf_count % 10 == 0) 4101 if (readf_count % 10 == 0)
4100 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state"); 4102 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4101 4103
4102 readf_count = (readf_count+1)%0xffff; 4104 readf_count = (readf_count+1)%0xffff;
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225z2.c b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
index 6edf5a46fa40..2a2afd51cf42 100644
--- a/drivers/staging/rtl8187se/r8180_rtl8225z2.c
+++ b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
@@ -1,14 +1,13 @@
1/* 1/*
2 This is part of the rtl8180-sa2400 driver 2 * This is part of the rtl8180-sa2400 driver
3 released under the GPL (See file COPYING for details). 3 * released under the GPL (See file COPYING for details).
4 Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it> 4 * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
5 5 *
6 This files contains programming code for the rtl8225 6 * This files contains programming code for the rtl8225
7 radio frontend. 7 * radio frontend.
8 8 *
9 *Many* thanks to Realtek Corp. for their great support! 9 * *Many* thanks to Realtek Corp. for their great support!
10 10 */
11*/
12 11
13#include "r8180_hw.h" 12#include "r8180_hw.h"
14#include "r8180_rtl8225.h" 13#include "r8180_rtl8225.h"
@@ -225,7 +224,7 @@ static void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
225} 224}
226 225
227static const u8 rtl8225z2_threshold[] = { 226static const u8 rtl8225z2_threshold[] = {
228 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 227 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
229}; 228};
230 229
231static const u8 rtl8225z2_gain_bg[] = { 230static const u8 rtl8225z2_gain_bg[] = {
@@ -307,7 +306,7 @@ static u32 read_rtl8225(struct net_device *dev, u8 adr)
307 u32 data2Write = ((u32)(adr & 0x1f)) << 27; 306 u32 data2Write = ((u32)(adr & 0x1f)) << 27;
308 u32 dataRead; 307 u32 dataRead;
309 u32 mask; 308 u32 mask;
310 u16 oval,oval2,oval3,tmp; 309 u16 oval, oval2, oval3, tmp;
311 int i; 310 int i;
312 short bit, rw; 311 short bit, rw;
313 u8 wLength = 6; 312 u8 wLength = 6;
@@ -325,9 +324,11 @@ static u32 read_rtl8225(struct net_device *dev, u8 adr)
325 324
326 oval &= ~0xf; 325 oval &= ~0xf;
327 326
328 write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN ); udelay(4); 327 write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN);
328 udelay(4);
329 329
330 write_nic_word(dev, RFPinsOutput, oval ); udelay(5); 330 write_nic_word(dev, RFPinsOutput, oval);
331 udelay(5);
331 332
332 rw = 0; 333 rw = 0;
333 334
@@ -335,31 +336,45 @@ static u32 read_rtl8225(struct net_device *dev, u8 adr)
335 336
336 for (i = 0; i < wLength/2; i++) { 337 for (i = 0; i < wLength/2; i++) {
337 bit = ((data2Write&mask) != 0) ? 1 : 0; 338 bit = ((data2Write&mask) != 0) ? 1 : 0;
338 write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(1); 339 write_nic_word(dev, RFPinsOutput, bit | oval | rw);
340 udelay(1);
339 341
340 write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2); 342 write_nic_word(dev, RFPinsOutput,
341 write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2); 343 bit | oval | BB_HOST_BANG_CLK | rw);
344 udelay(2);
345 write_nic_word(dev, RFPinsOutput,
346 bit | oval | BB_HOST_BANG_CLK | rw);
347 udelay(2);
342 348
343 mask = (low2high) ? (mask<<1): (mask>>1); 349 mask = (low2high) ? (mask<<1) : (mask>>1);
344 350
345 if (i == 2) { 351 if (i == 2) {
346 rw = BB_HOST_BANG_RW; 352 rw = BB_HOST_BANG_RW;
347 write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2); 353 write_nic_word(dev, RFPinsOutput,
348 write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(2); 354 bit | oval | BB_HOST_BANG_CLK | rw);
355 udelay(2);
356 write_nic_word(dev, RFPinsOutput, bit | oval | rw);
357 udelay(2);
349 break; 358 break;
350 } 359 }
351 360
352 bit = ((data2Write&mask) != 0) ? 1: 0; 361 bit = ((data2Write&mask) != 0) ? 1 : 0;
353 362
354 write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2); 363 write_nic_word(dev, RFPinsOutput,
355 write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2); 364 oval | bit | rw | BB_HOST_BANG_CLK);
365 udelay(2);
366 write_nic_word(dev, RFPinsOutput,
367 oval | bit | rw | BB_HOST_BANG_CLK);
368 udelay(2);
356 369
357 write_nic_word(dev, RFPinsOutput, oval| bit |rw); udelay(1); 370 write_nic_word(dev, RFPinsOutput, oval | bit | rw);
371 udelay(1);
358 372
359 mask = (low2high) ? (mask<<1) : (mask>>1); 373 mask = (low2high) ? (mask<<1) : (mask>>1);
360 } 374 }
361 375
362 write_nic_word(dev, RFPinsOutput, rw|oval); udelay(2); 376 write_nic_word(dev, RFPinsOutput, rw|oval);
377 udelay(2);
363 mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1)); 378 mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1));
364 379
365 /* 380 /*
@@ -371,9 +386,12 @@ static u32 read_rtl8225(struct net_device *dev, u8 adr)
371 for (i = 0; i < rLength; i++) { 386 for (i = 0; i < rLength; i++) {
372 write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1); 387 write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1);
373 388
374 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2); 389 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
375 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2); 390 udelay(2);
376 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2); 391 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
392 udelay(2);
393 write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK);
394 udelay(2);
377 tmp = read_nic_word(dev, RFPinsInput); 395 tmp = read_nic_word(dev, RFPinsInput);
378 396
379 dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0); 397 dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);
@@ -383,7 +401,9 @@ static u32 read_rtl8225(struct net_device *dev, u8 adr)
383 mask = (low2high) ? (mask<<1) : (mask>>1); 401 mask = (low2high) ? (mask<<1) : (mask>>1);
384 } 402 }
385 403
386 write_nic_word(dev, RFPinsOutput, BB_HOST_BANG_EN|BB_HOST_BANG_RW|oval); udelay(2); 404 write_nic_word(dev, RFPinsOutput,
405 BB_HOST_BANG_EN | BB_HOST_BANG_RW | oval);
406 udelay(2);
387 407
388 write_nic_word(dev, RFPinsEnable, oval2); 408 write_nic_word(dev, RFPinsEnable, oval2);
389 write_nic_word(dev, RFPinsSelect, oval3); /* Set To SW Switch */ 409 write_nic_word(dev, RFPinsSelect, oval3); /* Set To SW Switch */
@@ -426,7 +446,7 @@ void rtl8225z2_rf_close(struct net_device *dev)
426s8 DbmToTxPwrIdx(struct r8180_priv *priv, WIRELESS_MODE WirelessMode, 446s8 DbmToTxPwrIdx(struct r8180_priv *priv, WIRELESS_MODE WirelessMode,
427 s32 PowerInDbm) 447 s32 PowerInDbm)
428{ 448{
429 bool bUseDefault = true; 449 bool bUseDefault = true;
430 s8 TxPwrIdx = 0; 450 s8 TxPwrIdx = 0;
431 451
432 /* 452 /*
@@ -486,8 +506,10 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
486 if (IS_DOT11D_ENABLE(priv->ieee80211) && 506 if (IS_DOT11D_ENABLE(priv->ieee80211) &&
487 IS_DOT11D_STATE_DONE(priv->ieee80211)) { 507 IS_DOT11D_STATE_DONE(priv->ieee80211)) {
488 u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch); 508 u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch);
489 u8 CckMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_B, MaxTxPwrInDbm); 509 u8 CckMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_B,
490 u8 OfdmMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_G, MaxTxPwrInDbm); 510 MaxTxPwrInDbm);
511 u8 OfdmMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_G,
512 MaxTxPwrInDbm);
491 513
492 if (cck_power_level > CckMaxPwrIdx) 514 if (cck_power_level > CckMaxPwrIdx)
493 cck_power_level = CckMaxPwrIdx; 515 cck_power_level = CckMaxPwrIdx;
@@ -524,7 +546,7 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
524 if (ofdm_power_level <= 11) { 546 if (ofdm_power_level <= 11) {
525 write_phy_ofdm(dev, 0x07, 0x5c); 547 write_phy_ofdm(dev, 0x07, 0x5c);
526 write_phy_ofdm(dev, 0x09, 0x5c); 548 write_phy_ofdm(dev, 0x09, 0x5c);
527 } 549 }
528 550
529 if (ofdm_power_level <= 17) { 551 if (ofdm_power_level <= 17) {
530 write_phy_ofdm(dev, 0x07, 0x54); 552 write_phy_ofdm(dev, 0x07, 0x54);
@@ -613,7 +635,7 @@ void rtl8225z2_rf_init(struct net_device *dev)
613 int i; 635 int i;
614 short channel = 1; 636 short channel = 1;
615 u16 brsr; 637 u16 brsr;
616 u32 data,addr; 638 u32 data, addr;
617 639
618 priv->chan = channel; 640 priv->chan = channel;
619 641
@@ -740,7 +762,7 @@ void rtl8225z2_rf_init(struct net_device *dev)
740 write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); 762 write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
741 write_phy_ofdm(dev, 0x27, 0x88); mdelay(1); 763 write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
742 764
743 rtl8225z2_set_gain(dev,4); 765 rtl8225z2_set_gain(dev, 4);
744 766
745 write_phy_cck(dev, 0x0, 0x98); mdelay(1); 767 write_phy_cck(dev, 0x0, 0x98); mdelay(1);
746 write_phy_cck(dev, 0x3, 0x20); mdelay(1); 768 write_phy_cck(dev, 0x3, 0x20); mdelay(1);
@@ -803,12 +825,12 @@ void rtl8225z2_rf_set_mode(struct net_device *dev)
803 write_phy_ofdm(dev, 0xf, 0x20); 825 write_phy_ofdm(dev, 0xf, 0x20);
804 write_phy_ofdm(dev, 0x11, 0x7); 826 write_phy_ofdm(dev, 0x11, 0x7);
805 827
806 rtl8225z2_set_gain(dev,4); 828 rtl8225z2_set_gain(dev, 4);
807 829
808 write_phy_ofdm(dev,0x15, 0x40); 830 write_phy_ofdm(dev, 0x15, 0x40);
809 write_phy_ofdm(dev,0x17, 0x40); 831 write_phy_ofdm(dev, 0x17, 0x40);
810 832
811 write_nic_dword(dev, 0x94,0x10000000); 833 write_nic_dword(dev, 0x94, 0x10000000);
812 } else { 834 } else {
813 write_rtl8225(dev, 0x5, 0x1864); 835 write_rtl8225(dev, 0x5, 0x1864);
814 write_nic_dword(dev, RF_PARA, 0x10044); 836 write_nic_dword(dev, RF_PARA, 0x10044);
@@ -819,18 +841,18 @@ void rtl8225z2_rf_set_mode(struct net_device *dev)
819 write_phy_ofdm(dev, 0xf, 0x20); 841 write_phy_ofdm(dev, 0xf, 0x20);
820 write_phy_ofdm(dev, 0x11, 0x7); 842 write_phy_ofdm(dev, 0x11, 0x7);
821 843
822 rtl8225z2_set_gain(dev,4); 844 rtl8225z2_set_gain(dev, 4);
823 845
824 write_phy_ofdm(dev,0x15, 0x40); 846 write_phy_ofdm(dev, 0x15, 0x40);
825 write_phy_ofdm(dev,0x17, 0x40); 847 write_phy_ofdm(dev, 0x17, 0x40);
826 848
827 write_nic_dword(dev, 0x94,0x04000002); 849 write_nic_dword(dev, 0x94, 0x04000002);
828 } 850 }
829} 851}
830 852
831#define MAX_DOZE_WAITING_TIMES_85B 20 853#define MAX_DOZE_WAITING_TIMES_85B 20
832#define MAX_POLLING_24F_TIMES_87SE 10 854#define MAX_POLLING_24F_TIMES_87SE 10
833#define LPS_MAX_SLEEP_WAITING_TIMES_87SE 5 855#define LPS_MAX_SLEEP_WAITING_TIMES_87SE 5
834 856
835bool SetZebraRFPowerState8185(struct net_device *dev, 857bool SetZebraRFPowerState8185(struct net_device *dev,
836 RT_RF_POWER_STATE eRFPowerState) 858 RT_RF_POWER_STATE eRFPowerState)
@@ -882,12 +904,14 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
882 break; 904 break;
883 case eRfSleep: 905 case eRfSleep:
884 for (QueueID = 0, i = 0; QueueID < 6;) { 906 for (QueueID = 0, i = 0; QueueID < 6;) {
885 if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) { 907 if (get_curr_tx_free_desc(dev, QueueID) ==
908 priv->txringcount) {
886 QueueID++; 909 QueueID++;
887 continue; 910 continue;
888 } else { 911 } else {
889 priv->TxPollingTimes++; 912 priv->TxPollingTimes++;
890 if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) { 913 if (priv->TxPollingTimes >=
914 LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
891 bActionAllowed = false; 915 bActionAllowed = false;
892 break; 916 break;
893 } else 917 } else
@@ -915,7 +939,8 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
915 while (true) { 939 while (true) {
916 u8 tmp24F = read_nic_byte(dev, 0x24f); 940 u8 tmp24F = read_nic_byte(dev, 0x24f);
917 941
918 if ((tmp24F == 0x01) || (tmp24F == 0x09)) { 942 if ((tmp24F == 0x01) ||
943 (tmp24F == 0x09)) {
919 bTurnOffBB = true; 944 bTurnOffBB = true;
920 break; 945 break;
921 } else { 946 } else {
@@ -935,7 +960,8 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
935 if (bTurnOffBB) { 960 if (bTurnOffBB) {
936 /* turn off BB */ 961 /* turn off BB */
937 u1bTmp = read_nic_byte(dev, 0x24E); 962 u1bTmp = read_nic_byte(dev, 0x24E);
938 write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6)); 963 write_nic_byte(dev, 0x24E,
964 (u1bTmp | BIT5 | BIT6));
939 965
940 /* turn off AFE PLL */ 966 /* turn off AFE PLL */
941 write_nic_byte(dev, 0x54, 0xFC); 967 write_nic_byte(dev, 0x54, 0xFC);
@@ -945,7 +971,8 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
945 break; 971 break;
946 case eRfOff: 972 case eRfOff:
947 for (QueueID = 0, i = 0; QueueID < 6;) { 973 for (QueueID = 0, i = 0; QueueID < 6;) {
948 if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) { 974 if (get_curr_tx_free_desc(dev, QueueID) ==
975 priv->txringcount) {
949 QueueID++; 976 QueueID++;
950 continue; 977 continue;
951 } else { 978 } else {
diff --git a/drivers/staging/rtl8192e/Makefile b/drivers/staging/rtl8192e/Makefile
index e032c3e1e864..41cb4d3d6262 100644
--- a/drivers/staging/rtl8192e/Makefile
+++ b/drivers/staging/rtl8192e/Makefile
@@ -18,6 +18,7 @@ r8192e_pci-objs := \
18 r819xE_firmware.o \ 18 r819xE_firmware.o \
19 r819xE_cmdpkt.o \ 19 r819xE_cmdpkt.o \
20 r8192E_dm.o \ 20 r8192E_dm.o \
21 r8192_pm.o \
21 ieee80211/ieee80211_rx.o \ 22 ieee80211/ieee80211_rx.o \
22 ieee80211/ieee80211_softmac.o \ 23 ieee80211/ieee80211_softmac.o \
23 ieee80211/ieee80211_tx.o \ 24 ieee80211/ieee80211_tx.o \
diff --git a/drivers/staging/rtl8192e/ieee80211.h b/drivers/staging/rtl8192e/ieee80211.h
index c39249eb54b5..e1f03d79d2b6 100644
--- a/drivers/staging/rtl8192e/ieee80211.h
+++ b/drivers/staging/rtl8192e/ieee80211.h
@@ -1846,7 +1846,7 @@ struct ieee80211_device {
1846 spinlock_t bw_spinlock; 1846 spinlock_t bw_spinlock;
1847 1847
1848 spinlock_t reorder_spinlock; 1848 spinlock_t reorder_spinlock;
1849 // for HT operation rate set. we use this one for HT data rate to seperate different descriptors 1849 // for HT operation rate set. we use this one for HT data rate to separate different descriptors
1850 //the way fill this is the same as in the IE 1850 //the way fill this is the same as in the IE
1851 u8 Regdot11HTOperationalRateSet[16]; //use RATR format 1851 u8 Regdot11HTOperationalRateSet[16]; //use RATR format
1852 u8 dot11HTOperationalRateSet[16]; //use RATR format 1852 u8 dot11HTOperationalRateSet[16]; //use RATR format
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211.h b/drivers/staging/rtl8192e/ieee80211/ieee80211.h
index 1f613a28152f..50728f6e9c55 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211.h
@@ -2067,7 +2067,7 @@ struct ieee80211_device {
2067 spinlock_t bw_spinlock; 2067 spinlock_t bw_spinlock;
2068 2068
2069 spinlock_t reorder_spinlock; 2069 spinlock_t reorder_spinlock;
2070 // for HT operation rate set. we use this one for HT data rate to seperate different descriptors 2070 // for HT operation rate set. we use this one for HT data rate to separate different descriptors
2071 //the way fill this is the same as in the IE 2071 //the way fill this is the same as in the IE
2072 u8 Regdot11HTOperationalRateSet[16]; //use RATR format 2072 u8 Regdot11HTOperationalRateSet[16]; //use RATR format
2073 u8 dot11HTOperationalRateSet[16]; //use RATR format 2073 u8 dot11HTOperationalRateSet[16]; //use RATR format
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
index b3c9bf4b4ea6..d5aa9af3d9f4 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
@@ -109,11 +109,10 @@ int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
109 if (hcrypt == NULL) 109 if (hcrypt == NULL)
110 return -1; 110 return -1;
111 111
112 alg = kmalloc(sizeof(*alg), GFP_KERNEL); 112 alg = kzalloc(sizeof(*alg), GFP_KERNEL);
113 if (alg == NULL) 113 if (alg == NULL)
114 return -ENOMEM; 114 return -ENOMEM;
115 115
116 memset(alg, 0, sizeof(*alg));
117 alg->ops = ops; 116 alg->ops = ops;
118 117
119 spin_lock_irqsave(&hcrypt->lock, flags); 118 spin_lock_irqsave(&hcrypt->lock, flags);
@@ -207,11 +206,10 @@ int __init ieee80211_crypto_init(void)
207{ 206{
208 int ret = -ENOMEM; 207 int ret = -ENOMEM;
209 208
210 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL); 209 hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL);
211 if (!hcrypt) 210 if (!hcrypt)
212 goto out; 211 goto out;
213 212
214 memset(hcrypt, 0, sizeof(*hcrypt));
215 INIT_LIST_HEAD(&hcrypt->algs); 213 INIT_LIST_HEAD(&hcrypt->algs);
216 spin_lock_init(&hcrypt->lock); 214 spin_lock_init(&hcrypt->lock);
217 215
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c
index 1776f7e69bfe..7165c4c75c7e 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_ccmp.c
@@ -96,10 +96,9 @@ static void * ieee80211_ccmp_init(int key_idx)
96{ 96{
97 struct ieee80211_ccmp_data *priv; 97 struct ieee80211_ccmp_data *priv;
98 98
99 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 99 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
100 if (priv == NULL) 100 if (priv == NULL)
101 goto fail; 101 goto fail;
102 memset(priv, 0, sizeof(*priv));
103 priv->key_idx = key_idx; 102 priv->key_idx = key_idx;
104 103
105#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) 104#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c
index 03cb21eb0658..65f48896bfaa 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_tkip.c
@@ -87,10 +87,9 @@ static void * ieee80211_tkip_init(int key_idx)
87{ 87{
88 struct ieee80211_tkip_data *priv; 88 struct ieee80211_tkip_data *priv;
89 89
90 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 90 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
91 if (priv == NULL) 91 if (priv == NULL)
92 goto fail; 92 goto fail;
93 memset(priv, 0, sizeof(*priv));
94 priv->key_idx = key_idx; 93 priv->key_idx = key_idx;
95#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) 94#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
96 priv->tx_tfm_arc4 = crypto_alloc_tfm("arc4", 0); 95 priv->tx_tfm_arc4 = crypto_alloc_tfm("arc4", 0);
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c
index 5678313e30a5..c4bbc8ddbad1 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt_wep.c
@@ -71,10 +71,9 @@ static void * prism2_wep_init(int keyidx)
71{ 71{
72 struct prism2_wep_data *priv; 72 struct prism2_wep_data *priv;
73 73
74 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 74 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
75 if (priv == NULL) 75 if (priv == NULL)
76 goto fail; 76 goto fail;
77 memset(priv, 0, sizeof(*priv));
78 priv->key_idx = keyidx; 77 priv->key_idx = keyidx;
79 78
80#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) 79#if((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED))
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
index f43a7db5c78b..614a8b630e67 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
@@ -65,8 +65,8 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
65 if (ieee->networks) 65 if (ieee->networks)
66 return 0; 66 return 0;
67 67
68 ieee->networks = kmalloc( 68 ieee->networks = kcalloc(
69 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network), 69 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
70 GFP_KERNEL); 70 GFP_KERNEL);
71 if (!ieee->networks) { 71 if (!ieee->networks) {
72 printk(KERN_WARNING "%s: Out of memory allocating beacons\n", 72 printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
@@ -74,9 +74,6 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
74 return -ENOMEM; 74 return -ENOMEM;
75 } 75 }
76 76
77 memset(ieee->networks, 0,
78 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
79
80 return 0; 77 return 0;
81} 78}
82 79
@@ -170,7 +167,7 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
170 ieee80211_softmac_init(ieee); 167 ieee80211_softmac_init(ieee);
171 168
172#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)) 169#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
173 ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL); 170 ieee->pHTInfo = kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
174#else 171#else
175 ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kmalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL); 172 ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kmalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
176 memset(ieee->pHTInfo,0,sizeof(RT_HIGH_THROUGHPUT)); 173 memset(ieee->pHTInfo,0,sizeof(RT_HIGH_THROUGHPUT));
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
index ce265ae5fe18..da10067485e3 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
@@ -1397,7 +1397,7 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
1397 /* skb: hdr + (possible reassembled) full plaintext payload */ 1397 /* skb: hdr + (possible reassembled) full plaintext payload */
1398 payload = skb->data + hdrlen; 1398 payload = skb->data + hdrlen;
1399 //ethertype = (payload[6] << 8) | payload[7]; 1399 //ethertype = (payload[6] << 8) | payload[7];
1400 rxb = (struct ieee80211_rxb*)kmalloc(sizeof(struct ieee80211_rxb),GFP_ATOMIC); 1400 rxb = kmalloc(sizeof(struct ieee80211_rxb), GFP_ATOMIC);
1401 if(rxb == NULL) 1401 if(rxb == NULL)
1402 { 1402 {
1403 IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__); 1403 IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__);
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
index d1d7b0866755..46b6e8c900e9 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
@@ -1800,7 +1800,7 @@ static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
1800 1800
1801 if(*(t++) == MFIE_TYPE_CHALLENGE){ 1801 if(*(t++) == MFIE_TYPE_CHALLENGE){
1802 *chlen = *(t++); 1802 *chlen = *(t++);
1803 *challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC); 1803 *challenge = kmalloc(*chlen, GFP_ATOMIC);
1804 memcpy(*challenge, t, *chlen); 1804 memcpy(*challenge, t, *chlen);
1805 } 1805 }
1806 } 1806 }
@@ -1934,7 +1934,8 @@ ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1934 //IEEE80211DMESG("Rx probe"); 1934 //IEEE80211DMESG("Rx probe");
1935 ieee->softmac_stats.rx_auth_rq++; 1935 ieee->softmac_stats.rx_auth_rq++;
1936 1936
1937 if ((status = auth_rq_parse(skb, dest))!= -1){ 1937 status = auth_rq_parse(skb, dest);
1938 if (status != -1) {
1938 ieee80211_resp_to_auth(ieee, status, dest); 1939 ieee80211_resp_to_auth(ieee, status, dest);
1939 } 1940 }
1940 //DMESG("Dest is "MACSTR, MAC2STR(dest)); 1941 //DMESG("Dest is "MACSTR, MAC2STR(dest));
@@ -3078,10 +3079,9 @@ void ieee80211_softmac_init(struct ieee80211_device *ieee)
3078 ieee->seq_ctrl[i] = 0; 3079 ieee->seq_ctrl[i] = 0;
3079 } 3080 }
3080#ifdef ENABLE_DOT11D 3081#ifdef ENABLE_DOT11D
3081 ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC); 3082 ieee->pDot11dInfo = kzalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
3082 if (!ieee->pDot11dInfo) 3083 if (!ieee->pDot11dInfo)
3083 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n"); 3084 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n");
3084 memset(ieee->pDot11dInfo, 0, sizeof(RT_DOT11D_INFO));
3085#endif 3085#endif
3086 //added for AP roaming 3086 //added for AP roaming
3087 ieee->LinkDetectInfo.SlotNum = 2; 3087 ieee->LinkDetectInfo.SlotNum = 2;
@@ -3255,11 +3255,11 @@ static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
3255 return -EINVAL; 3255 return -EINVAL;
3256 3256
3257 if (param->u.wpa_ie.len) { 3257 if (param->u.wpa_ie.len) {
3258 buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL); 3258 buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
3259 GFP_KERNEL);
3259 if (buf == NULL) 3260 if (buf == NULL)
3260 return -ENOMEM; 3261 return -ENOMEM;
3261 3262
3262 memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
3263 kfree(ieee->wpa_ie); 3263 kfree(ieee->wpa_ie);
3264 ieee->wpa_ie = buf; 3264 ieee->wpa_ie = buf;
3265 ieee->wpa_ie_len = param->u.wpa_ie.len; 3265 ieee->wpa_ie_len = param->u.wpa_ie.len;
@@ -3458,8 +3458,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3458 3458
3459 ieee80211_crypt_delayed_deinit(ieee, crypt); 3459 ieee80211_crypt_delayed_deinit(ieee, crypt);
3460 3460
3461 new_crypt = (struct ieee80211_crypt_data *) 3461 new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3462 kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3463 if (new_crypt == NULL) { 3462 if (new_crypt == NULL) {
3464 ret = -ENOMEM; 3463 ret = -ENOMEM;
3465 goto done; 3464 goto done;
@@ -3591,7 +3590,7 @@ int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_poin
3591 goto out; 3590 goto out;
3592 } 3591 }
3593 3592
3594 param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL); 3593 param = kmalloc(p->length, GFP_KERNEL);
3595 if (param == NULL){ 3594 if (param == NULL){
3596 ret = -ENOMEM; 3595 ret = -ENOMEM;
3597 goto out; 3596 goto out;
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
index de57967b9681..4971b1c8e7d7 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
@@ -477,11 +477,10 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
477 struct ieee80211_crypt_data *new_crypt; 477 struct ieee80211_crypt_data *new_crypt;
478 478
479 /* take WEP into use */ 479 /* take WEP into use */
480 new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data), 480 new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data),
481 GFP_KERNEL); 481 GFP_KERNEL);
482 if (new_crypt == NULL) 482 if (new_crypt == NULL)
483 return -ENOMEM; 483 return -ENOMEM;
484 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
485 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 484 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
486 if (!new_crypt->ops) 485 if (!new_crypt->ops)
487 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 486 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
@@ -980,10 +979,9 @@ int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
980 printk("len:%zu, ie:%d\n", len, ie[1]); 979 printk("len:%zu, ie:%d\n", len, ie[1]);
981 return -EINVAL; 980 return -EINVAL;
982 } 981 }
983 buf = kmalloc(len, GFP_KERNEL); 982 buf = kmemdup(ie, len, GFP_KERNEL);
984 if (buf == NULL) 983 if (buf == NULL)
985 return -ENOMEM; 984 return -ENOMEM;
986 memcpy(buf, ie, len);
987 kfree(ieee->wpa_ie); 985 kfree(ieee->wpa_ie);
988 ieee->wpa_ie = buf; 986 ieee->wpa_ie = buf;
989 ieee->wpa_ie_len = len; 987 ieee->wpa_ie_len = len;
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h b/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h
index a50ee0e1c059..d4565ecc7ab4 100644
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h
+++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_Qos.h
@@ -69,147 +69,6 @@ typedef enum _ACK_POLICY{
69}ACK_POLICY,*PACK_POLICY; 69}ACK_POLICY,*PACK_POLICY;
70 70
71#define WMM_PARAM_ELEMENT_SIZE (8+(4*AC_PARAM_SIZE)) 71#define WMM_PARAM_ELEMENT_SIZE (8+(4*AC_PARAM_SIZE))
72#if 0
73#define GET_QOS_CTRL(_pStart) ReadEF2Byte((u8 *)(_pStart) + 24)
74#define SET_QOS_CTRL(_pStart, _value) WriteEF2Byte((u8 *)(_pStart) + 24, _value)
75
76// WMM control field.
77#define GET_QOS_CTRL_WMM_UP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 3))
78#define SET_QOS_CTRL_WMM_UP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 3, (u8)(_value))
79
80#define GET_QOS_CTRL_WMM_EOSP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
81#define SET_QOS_CTRL_WMM_EOSP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
82
83#define GET_QOS_CTRL_WMM_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
84#define SET_QOS_CTRL_WMM_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
85
86// 802.11e control field (by STA, data)
87#define GET_QOS_CTRL_STA_DATA_TID(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
88#define SET_QOS_CTRL_STA_DATA_TID(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
89
90#define GET_QOS_CTRL_STA_DATA_QSIZE_FLAG(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
91#define SET_QOS_CTRL_STA_DATA_QSIZE_FLAG(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
92
93#define GET_QOS_CTRL_STA_DATA_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
94#define SET_QOS_CTRL_STA_DATA_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
95
96#define GET_QOS_CTRL_STA_DATA_TXOP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
97#define SET_QOS_CTRL_STA_DATA_TXOP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
98
99#define GET_QOS_CTRL_STA_DATA_QSIZE(_pStart) GET_QOS_CTRL_STA_DATA_TXOP(_pStart)
100#define SET_QOS_CTRL_STA_DATA_QSIZE(_pStart, _value) SET_QOS_CTRL_STA_DATA_TXOP(_pStart)
101
102// 802.11e control field (by HC, data)
103#define GET_QOS_CTRL_HC_DATA_TID(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
104#define SET_QOS_CTRL_HC_DATA_TID(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
105
106#define GET_QOS_CTRL_HC_DATA_EOSP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
107#define SET_QOS_CTRL_HC_DATA_EOSP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
108
109#define GET_QOS_CTRL_HC_DATA_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
110#define SET_QOS_CTRL_HC_DATA_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
111
112#define GET_QOS_CTRL_HC_DATA_PS_BUFSTATE(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
113#define SET_QOS_CTRL_HC_DATA_PS_BUFSTATE(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
114
115// 802.11e control field (by HC, CFP)
116#define GET_QOS_CTRL_HC_CFP_TID(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
117#define SET_QOS_CTRL_HC_CFP_TID(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
118
119#define GET_QOS_CTRL_HC_CFP_EOSP(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
120#define SET_QOS_CTRL_HC_CFP_EOSP(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
121
122#define GET_QOS_CTRL_HC_CFP_ACK_POLICY(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
123#define SET_QOS_CTRL_HC_CFP_ACK_POLICY(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
124
125#define GET_QOS_CTRL_HC_CFP_TXOP_LIMIT(_pStart) ((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
126#define SET_QOS_CTRL_HC_CFP_TXOP_LIMIT(_pStart, _value) SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
127
128#define SET_WMM_QOS_INFO_FIELD(_pStart, _val) WriteEF1Byte(_pStart, _val)
129
130#define GET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart) LE_BITS_TO_1BYTE(_pStart, 0, 4)
131#define SET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 0, 4, _val)
132
133#define GET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 7, 1)
134#define SET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 7, 1, _val)
135
136#define GET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 0, 1)
137#define SET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 0, 1, _val)
138
139#define GET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 1, 1)
140#define SET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 1, 1, _val)
141
142#define GET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 2, 1)
143#define SET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 2, 1, _val)
144
145#define GET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart) LE_BITS_TO_1BYTE(_pStart, 3, 1)
146#define SET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 3, 1, _val)
147
148#define GET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart) LE_BITS_TO_1BYTE(_pStart, 5, 2)
149#define SET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart, _val) SET_BITS_TO_LE_1BYTE(_pStart, 5, 2, _val)
150
151
152#define WMM_INFO_ELEMENT_SIZE 7
153
154#define GET_WMM_INFO_ELE_OUI(_pStart) ((u8 *)(_pStart))
155#define SET_WMM_INFO_ELE_OUI(_pStart, _pVal) PlatformMoveMemory(_pStart, _pVal, 3);
156
157#define GET_WMM_INFO_ELE_OUI_TYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+3) ) )
158#define SET_WMM_INFO_ELE_OUI_TYPE(_pStart, _val) ( *((u8 *)(_pStart)+3) = EF1Byte(_val) )
159
160#define GET_WMM_INFO_ELE_OUI_SUBTYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+4) ) )
161#define SET_WMM_INFO_ELE_OUI_SUBTYPE(_pStart, _val) ( *((u8 *)(_pStart)+4) = EF1Byte(_val) )
162
163#define GET_WMM_INFO_ELE_VERSION(_pStart) ( EF1Byte( *((u8 *)(_pStart)+5) ) )
164#define SET_WMM_INFO_ELE_VERSION(_pStart, _val) ( *((u8 *)(_pStart)+5) = EF1Byte(_val) )
165
166#define GET_WMM_INFO_ELE_QOS_INFO_FIELD(_pStart) ( EF1Byte( *((u8 *)(_pStart)+6) ) )
167#define SET_WMM_INFO_ELE_QOS_INFO_FIELD(_pStart, _val) ( *((u8 *)(_pStart)+6) = EF1Byte(_val) )
168
169
170
171#define GET_WMM_AC_PARAM_AIFSN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 4) )
172#define SET_WMM_AC_PARAM_AIFSN(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 0, 4, _val)
173
174#define GET_WMM_AC_PARAM_ACM(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 4, 1) )
175#define SET_WMM_AC_PARAM_ACM(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 4, 1, _val)
176
177#define GET_WMM_AC_PARAM_ACI(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 5, 2) )
178#define SET_WMM_AC_PARAM_ACI(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 5, 2, _val)
179
180#define GET_WMM_AC_PARAM_ACI_AIFSN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 8) )
181#define SET_WMM_AC_PARAM_ACI_AIFSN(_pStart, _val) SET_BTIS_TO_LE_4BYTE(_pStart, 0, 8, _val)
182
183#define GET_WMM_AC_PARAM_ECWMIN(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 8, 4) )
184#define SET_WMM_AC_PARAM_ECWMIN(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 8, 4, _val)
185
186#define GET_WMM_AC_PARAM_ECWMAX(_pStart) ( (u8)LE_BITS_TO_4BYTE(_pStart, 12, 4) )
187#define SET_WMM_AC_PARAM_ECWMAX(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 12, 4, _val)
188
189#define GET_WMM_AC_PARAM_TXOP_LIMIT(_pStart) ( (u16)LE_BITS_TO_4BYTE(_pStart, 16, 16) )
190#define SET_WMM_AC_PARAM_TXOP_LIMIT(_pStart, _val) SET_BITS_TO_LE_4BYTE(_pStart, 16, 16, _val)
191
192
193
194
195#define GET_WMM_PARAM_ELE_OUI(_pStart) ((u8 *)(_pStart))
196#define SET_WMM_PARAM_ELE_OUI(_pStart, _pVal) PlatformMoveMemory(_pStart, _pVal, 3)
197
198#define GET_WMM_PARAM_ELE_OUI_TYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+3) ) )
199#define SET_WMM_PARAM_ELE_OUI_TYPE(_pStart, _val) ( *((u8 *)(_pStart)+3) = EF1Byte(_val) )
200
201#define GET_WMM_PARAM_ELE_OUI_SUBTYPE(_pStart) ( EF1Byte( *((u8 *)(_pStart)+4) ) )
202#define SET_WMM_PARAM_ELE_OUI_SUBTYPE(_pStart, _val) ( *((u8 *)(_pStart)+4) = EF1Byte(_val) )
203
204#define GET_WMM_PARAM_ELE_VERSION(_pStart) ( EF1Byte( *((u8 *)(_pStart)+5) ) )
205#define SET_WMM_PARAM_ELE_VERSION(_pStart, _val) ( *((u8 *)(_pStart)+5) = EF1Byte(_val) )
206
207#define GET_WMM_PARAM_ELE_QOS_INFO_FIELD(_pStart) ( EF1Byte( *((u8 *)(_pStart)+6) ) )
208#define SET_WMM_PARAM_ELE_QOS_INFO_FIELD(_pStart, _val) ( *((u8 *)(_pStart)+6) = EF1Byte(_val) )
209
210#define GET_WMM_PARAM_ELE_AC_PARAM(_pStart) ( (u8 *)(_pStart)+8 )
211#define SET_WMM_PARAM_ELE_AC_PARAM(_pStart, _pVal) PlatformMoveMemory((_pStart)+8, _pVal, 16)
212#endif
213 72
214// 73//
215// QoS Control Field 74// QoS Control Field
@@ -360,22 +219,6 @@ typedef union _QOS_INFO_FIELD{
360 219
361}QOS_INFO_FIELD, *PQOS_INFO_FIELD; 220}QOS_INFO_FIELD, *PQOS_INFO_FIELD;
362 221
363#if 0
364//
365// WMM Information Element
366// Ref: WMM spec 2.2.1: WME Information Element, p.10.
367//
368typedef struct _WMM_INFO_ELEMENT{
369// u8 ElementID;
370// u8 Length;
371 u8 OUI[3];
372 u8 OUI_Type;
373 u8 OUI_SubType;
374 u8 Version;
375 QOS_INFO_FIELD QosInfo;
376}WMM_INFO_ELEMENT, *PWMM_INFO_ELEMENT;
377#endif
378
379// 222//
380// ACI to AC coding. 223// ACI to AC coding.
381// Ref: WMM spec 2.2.2: WME Parameter Element, p.13. 224// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
@@ -649,16 +492,7 @@ typedef struct _OCTET_STRING{
649 u8 *Octet; 492 u8 *Octet;
650 u16 Length; 493 u16 Length;
651}OCTET_STRING, *POCTET_STRING; 494}OCTET_STRING, *POCTET_STRING;
652#if 0 495
653#define FillOctetString(_os,_octet,_len) \
654 (_os).Octet=(u8 *)(_octet); \
655 (_os).Length=(_len);
656
657#define WMM_ELEM_HDR_LEN 6
658#define WMMElemSkipHdr(_osWMMElem) \
659 (_osWMMElem).Octet += WMM_ELEM_HDR_LEN; \
660 (_osWMMElem).Length -= WMM_ELEM_HDR_LEN;
661#endif
662// 496//
663// STA QoS data. 497// STA QoS data.
664// Ref: DOT11_QOS in 8185 code. [def. in QoS_mp.h] 498// Ref: DOT11_QOS in 8185 code. [def. in QoS_mp.h]
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c
index e8699616fad4..5876b4d53eb1 100644
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c
+++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_TSProc.c
@@ -3,13 +3,6 @@
3#include <linux/slab.h> 3#include <linux/slab.h>
4#include "rtl819x_TS.h" 4#include "rtl819x_TS.h"
5 5
6#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
7#define list_for_each_entry_safe(pos, n, head, member) \
8 for (pos = list_entry((head)->next, typeof(*pos), member), \
9 n = list_entry(pos->member.next, typeof(*pos), member); \
10 &pos->member != (head); \
11 pos = n, n = list_entry(n->member.next, typeof(*n), member))
12#endif
13void TsSetupTimeOut(unsigned long data) 6void TsSetupTimeOut(unsigned long data)
14{ 7{
15 // Not implement yet 8 // Not implement yet
@@ -29,7 +22,6 @@ void TsInactTimeout(unsigned long data)
29 * return: NULL 22 * return: NULL
30 * notice: 23 * notice:
31********************************************************************************************************************/ 24********************************************************************************************************************/
32#if 1
33void RxPktPendingTimeout(unsigned long data) 25void RxPktPendingTimeout(unsigned long data)
34{ 26{
35 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data; 27 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
@@ -90,25 +82,16 @@ void RxPktPendingTimeout(unsigned long data)
90 return; 82 return;
91 } 83 }
92 ieee80211_indicate_packets(ieee, stats_IndicateArray, index); 84 ieee80211_indicate_packets(ieee, stats_IndicateArray, index);
93 bPktInBuf = false;
94 } 85 }
95 86
96 if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff)) 87 if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff))
97 { 88 {
98 pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq; 89 pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
99#if 0
100 if(timer_pending(&pRxTs->RxPktPendingTimer))
101 del_timer_sync(&pRxTs->RxPktPendingTimer);
102 pRxTs->RxPktPendingTimer.expires = jiffies + ieee->pHTInfo->RxReorderPendingTime;
103 add_timer(&pRxTs->RxPktPendingTimer);
104#else
105 mod_timer(&pRxTs->RxPktPendingTimer, jiffies + MSECS(ieee->pHTInfo->RxReorderPendingTime)); 90 mod_timer(&pRxTs->RxPktPendingTimer, jiffies + MSECS(ieee->pHTInfo->RxReorderPendingTime));
106#endif
107 } 91 }
108 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags); 92 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
109 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK); 93 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
110} 94}
111#endif
112 95
113/******************************************************************************************************************** 96/********************************************************************************************************************
114 *function: Add BA timer function 97 *function: Add BA timer function
@@ -372,17 +355,11 @@ bool GetTs(
372 IEEE80211_DEBUG(IEEE80211_DL_ERR, "get TS for Broadcast or Multicast\n"); 355 IEEE80211_DEBUG(IEEE80211_DL_ERR, "get TS for Broadcast or Multicast\n");
373 return false; 356 return false;
374 } 357 }
375#if 0 358
376 if(ieee->pStaQos->CurrentQosMode == QOS_DISABLE)
377 { UP = 0; } //only use one TS
378 else if(ieee->pStaQos->CurrentQosMode & QOS_WMM)
379 {
380#else
381 if (ieee->current_network.qos_data.supported == 0) 359 if (ieee->current_network.qos_data.supported == 0)
382 UP = 0; 360 UP = 0;
383 else 361 else
384 { 362 {
385#endif
386 // In WMM case: we use 4 TID only 363 // In WMM case: we use 4 TID only
387 if (!IsACValid(TID)) 364 if (!IsACValid(TID))
388 { 365 {
@@ -553,8 +530,8 @@ void RemoveTsEntry(
553void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) 530void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
554{ 531{
555 PTS_COMMON_INFO pTS, pTmpTS; 532 PTS_COMMON_INFO pTS, pTmpTS;
533
556 printk("===========>RemovePeerTS,%pM\n", Addr); 534 printk("===========>RemovePeerTS,%pM\n", Addr);
557#if 1
558 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) 535 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
559 { 536 {
560 if (memcmp(pTS->Addr, Addr, 6) == 0) 537 if (memcmp(pTS->Addr, Addr, 6) == 0)
@@ -595,13 +572,12 @@ void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
595 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List); 572 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
596 } 573 }
597 } 574 }
598#endif
599} 575}
600 576
601void RemoveAllTS(struct ieee80211_device* ieee) 577void RemoveAllTS(struct ieee80211_device* ieee)
602{ 578{
603 PTS_COMMON_INFO pTS, pTmpTS; 579 PTS_COMMON_INFO pTS, pTmpTS;
604#if 1 580
605 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) 581 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
606 { 582 {
607 RemoveTsEntry(ieee, pTS, TX_DIR); 583 RemoveTsEntry(ieee, pTS, TX_DIR);
@@ -629,7 +605,6 @@ void RemoveAllTS(struct ieee80211_device* ieee)
629 list_del_init(&pTS->List); 605 list_del_init(&pTS->List);
630 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List); 606 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
631 } 607 }
632#endif
633} 608}
634 609
635void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS) 610void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
@@ -637,7 +612,6 @@ void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
637 if(pTxTS->bAddBaReqInProgress == false) 612 if(pTxTS->bAddBaReqInProgress == false)
638 { 613 {
639 pTxTS->bAddBaReqInProgress = true; 614 pTxTS->bAddBaReqInProgress = true;
640#if 1
641 if(pTxTS->bAddBaReqDelayed) 615 if(pTxTS->bAddBaReqDelayed)
642 { 616 {
643 IEEE80211_DEBUG(IEEE80211_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n"); 617 IEEE80211_DEBUG(IEEE80211_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
@@ -648,13 +622,7 @@ void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
648 IEEE80211_DEBUG(IEEE80211_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n"); 622 IEEE80211_DEBUG(IEEE80211_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
649 mod_timer(&pTxTS->TsAddBaTimer, jiffies+10); //set 10 ticks 623 mod_timer(&pTxTS->TsAddBaTimer, jiffies+10); //set 10 ticks
650 } 624 }
651#endif
652 } 625 }
653 else 626 else
654 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__); 627 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__);
655} 628}
656#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
657EXPORT_SYMBOL_NOVERS(RemovePeerTS);
658#else
659//EXPORT_SYMBOL(RemovePeerTS);
660#endif
diff --git a/drivers/staging/rtl8192e/r8190_rtl8256.c b/drivers/staging/rtl8192e/r8190_rtl8256.c
index 1bd054d42f24..7391f5f8f25f 100644
--- a/drivers/staging/rtl8192e/r8190_rtl8256.c
+++ b/drivers/staging/rtl8192e/r8190_rtl8256.c
@@ -802,7 +802,7 @@ MgntDisconnectIBSS(
802 802
803 case RT_OP_MODE_IBSS: 803 case RT_OP_MODE_IBSS:
804 btMsr |= MSR_LINK_ADHOC; 804 btMsr |= MSR_LINK_ADHOC;
805 // led link set seperate 805 // led link set separate
806 break; 806 break;
807 807
808 case RT_OP_MODE_AP: 808 case RT_OP_MODE_AP:
@@ -885,7 +885,7 @@ MlmeDisassociateRequest(
885 885
886 case RT_OP_MODE_IBSS: 886 case RT_OP_MODE_IBSS:
887 btMsr |= MSR_LINK_ADHOC; 887 btMsr |= MSR_LINK_ADHOC;
888 // led link set seperate 888 // led link set separate
889 break; 889 break;
890 890
891 case RT_OP_MODE_AP: 891 case RT_OP_MODE_AP:
diff --git a/drivers/staging/rtl8192e/r8192E_core.c b/drivers/staging/rtl8192e/r8192E_core.c
index bb7e1ef28d3b..eb41402d1d37 100644
--- a/drivers/staging/rtl8192e/r8192E_core.c
+++ b/drivers/staging/rtl8192e/r8192E_core.c
@@ -62,7 +62,7 @@
62//#include <linux/usb.h> 62//#include <linux/usb.h>
63// FIXME: check if 2.6.7 is ok 63// FIXME: check if 2.6.7 is ok
64 64
65#ifdef CONFIG_PM_RTL 65#ifdef CONFIG_PM
66#include "r8192_pm.h" 66#include "r8192_pm.h"
67#endif 67#endif
68 68
@@ -146,7 +146,7 @@ static struct pci_driver rtl8192_pci_driver = {
146 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */ 146 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
147 .probe = rtl8192_pci_probe, /* probe fn */ 147 .probe = rtl8192_pci_probe, /* probe fn */
148 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */ 148 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
149#ifdef CONFIG_PM_RTL 149#ifdef CONFIG_PM
150 .suspend = rtl8192E_suspend, /* PM suspend fn */ 150 .suspend = rtl8192E_suspend, /* PM suspend fn */
151 .resume = rtl8192E_resume, /* PM resume fn */ 151 .resume = rtl8192E_resume, /* PM resume fn */
152#else 152#else
@@ -407,7 +407,7 @@ rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
407 407
408 case RT_OP_MODE_IBSS: 408 case RT_OP_MODE_IBSS:
409 btMsr |= MSR_ADHOC; 409 btMsr |= MSR_ADHOC;
410 // led link set seperate 410 // led link set separate
411 break; 411 break;
412 412
413 case RT_OP_MODE_AP: 413 case RT_OP_MODE_AP:
@@ -1864,13 +1864,15 @@ static short rtl8192_pci_initdescring(struct net_device *dev)
1864 1864
1865 /* general process for other queue */ 1865 /* general process for other queue */
1866 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) { 1866 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1867 if ((ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount))) 1867 ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount);
1868 if (ret)
1868 goto err_free_rings; 1869 goto err_free_rings;
1869 } 1870 }
1870 1871
1871#if 0 1872#if 0
1872 /* specific process for hardware beacon process */ 1873 /* specific process for hardware beacon process */
1873 if ((ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2))) 1874 ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2);
1875 if (ret)
1874 goto err_free_rings; 1876 goto err_free_rings;
1875#endif 1877#endif
1876 1878
@@ -5038,7 +5040,7 @@ static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5038 goto out; 5040 goto out;
5039 } 5041 }
5040 5042
5041 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL); 5043 ipw = kmalloc(p->length, GFP_KERNEL);
5042 if (ipw == NULL){ 5044 if (ipw == NULL){
5043 ret = -ENOMEM; 5045 ret = -ENOMEM;
5044 goto out; 5046 goto out;
diff --git a/drivers/staging/rtl8192e/r8192_pm.c b/drivers/staging/rtl8192e/r8192_pm.c
index feef29b0a893..521d49f8f8ea 100644
--- a/drivers/staging/rtl8192e/r8192_pm.c
+++ b/drivers/staging/rtl8192e/r8192_pm.c
@@ -9,8 +9,6 @@
9 Released under the terms of GPL (General Public Licence) 9 Released under the terms of GPL (General Public Licence)
10*/ 10*/
11 11
12#ifdef CONFIG_PM_RTL
13
14#include "r8192E.h" 12#include "r8192E.h"
15#include "r8192E_hw.h" 13#include "r8192E_hw.h"
16#include "r8192_pm.h" 14#include "r8192_pm.h"
@@ -27,7 +25,9 @@ int rtl8192E_suspend (struct pci_dev *pdev, pm_message_t state)
27{ 25{
28 struct net_device *dev = pci_get_drvdata(pdev); 26 struct net_device *dev = pci_get_drvdata(pdev);
29 struct r8192_priv *priv = ieee80211_priv(dev); 27 struct r8192_priv *priv = ieee80211_priv(dev);
28#ifdef RTL8190P
30 u8 ucRegRead; 29 u8 ucRegRead;
30#endif
31 u32 ulRegRead; 31 u32 ulRegRead;
32 32
33 RT_TRACE(COMP_POWER, "============> r8192E suspend call.\n"); 33 RT_TRACE(COMP_POWER, "============> r8192E suspend call.\n");
@@ -168,5 +168,3 @@ int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable)
168 state.event, enable); 168 state.event, enable);
169 return(-EAGAIN); 169 return(-EAGAIN);
170} 170}
171
172#endif //CONFIG_PM_RTL
diff --git a/drivers/staging/rtl8192e/r8192_pm.h b/drivers/staging/rtl8192e/r8192_pm.h
index 68d292b1d864..4da9b464b416 100644
--- a/drivers/staging/rtl8192e/r8192_pm.h
+++ b/drivers/staging/rtl8192e/r8192_pm.h
@@ -10,8 +10,6 @@
10 10
11*/ 11*/
12 12
13#ifdef CONFIG_PM_RTL
14
15#ifndef R8192E_PM_H 13#ifndef R8192E_PM_H
16#define R8192E_PM_H 14#define R8192E_PM_H
17 15
@@ -24,5 +22,3 @@ int rtl8192E_resume (struct pci_dev *dev);
24int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable); 22int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable);
25 23
26#endif //R8192E_PM_H 24#endif //R8192E_PM_H
27
28#endif // CONFIG_PM_RTL
diff --git a/drivers/staging/rtl8192su/Kconfig b/drivers/staging/rtl8192su/Kconfig
index b72a96206f58..b422ea1ecf9c 100644
--- a/drivers/staging/rtl8192su/Kconfig
+++ b/drivers/staging/rtl8192su/Kconfig
@@ -3,5 +3,6 @@ config RTL8192SU
3 depends on PCI && WLAN && USB 3 depends on PCI && WLAN && USB
4 select WIRELESS_EXT 4 select WIRELESS_EXT
5 select WEXT_PRIV 5 select WEXT_PRIV
6 select EEPROM_93CX6
6 default N 7 default N
7 ---help--- 8 ---help---
diff --git a/drivers/staging/rtl8192su/Makefile b/drivers/staging/rtl8192su/Makefile
index c8b4332d108c..7133894afe76 100644
--- a/drivers/staging/rtl8192su/Makefile
+++ b/drivers/staging/rtl8192su/Makefile
@@ -9,7 +9,6 @@ EXTRA_CFLAGS += -DTHOMAS_BEACON
9#EXTRA_CFLAGS += -DMUTIPLE_BULK_OUT 9#EXTRA_CFLAGS += -DMUTIPLE_BULK_OUT
10 10
11r8192s_usb-objs := \ 11r8192s_usb-objs := \
12 r8180_93cx6.o \
13 r8192U_wx.o \ 12 r8192U_wx.o \
14 r8192S_phy.o \ 13 r8192S_phy.o \
15 r8192S_rtl6052.o \ 14 r8192S_rtl6052.o \
@@ -21,6 +20,7 @@ r8192s_usb-objs := \
21 r8192S_Efuse.o \ 20 r8192S_Efuse.o \
22 r8192U_core.o \ 21 r8192U_core.o \
23 r8192U_pm.o \ 22 r8192U_pm.o \
23 r8192SU_led.o \
24 ieee80211/ieee80211_crypt.o \ 24 ieee80211/ieee80211_crypt.o \
25 ieee80211/ieee80211_crypt_tkip.o \ 25 ieee80211/ieee80211_crypt_tkip.o \
26 ieee80211/ieee80211_crypt_ccmp.o \ 26 ieee80211/ieee80211_crypt_ccmp.o \
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211.h b/drivers/staging/rtl8192su/ieee80211/ieee80211.h
index 32b261d15594..bcb2b12a8398 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211.h
@@ -1152,7 +1152,7 @@ struct ieee80211_device {
1152 spinlock_t reorder_spinlock; 1152 spinlock_t reorder_spinlock;
1153 /* 1153 /*
1154 * for HT operation rate set, we use this one for HT data rate to 1154 * for HT operation rate set, we use this one for HT data rate to
1155 * seperate different descriptors the way fill this is the same as 1155 * separate different descriptors the way fill this is the same as
1156 * in the IE 1156 * in the IE
1157 */ 1157 */
1158 u8 Regdot11HTOperationalRateSet[16]; /* use RATR format */ 1158 u8 Regdot11HTOperationalRateSet[16]; /* use RATR format */
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c
index c4640e63196b..801942339437 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c
@@ -109,11 +109,10 @@ int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
109 if (hcrypt == NULL) 109 if (hcrypt == NULL)
110 return -1; 110 return -1;
111 111
112 alg = kmalloc(sizeof(*alg), GFP_KERNEL); 112 alg = kzalloc(sizeof(*alg), GFP_KERNEL);
113 if (alg == NULL) 113 if (alg == NULL)
114 return -ENOMEM; 114 return -ENOMEM;
115 115
116 memset(alg, 0, sizeof(*alg));
117 alg->ops = ops; 116 alg->ops = ops;
118 117
119 spin_lock_irqsave(&hcrypt->lock, flags); 118 spin_lock_irqsave(&hcrypt->lock, flags);
@@ -206,11 +205,10 @@ int __init ieee80211_crypto_init(void)
206{ 205{
207 int ret = -ENOMEM; 206 int ret = -ENOMEM;
208 207
209 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL); 208 hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL);
210 if (!hcrypt) 209 if (!hcrypt)
211 goto out; 210 goto out;
212 211
213 memset(hcrypt, 0, sizeof(*hcrypt));
214 INIT_LIST_HEAD(&hcrypt->algs); 212 INIT_LIST_HEAD(&hcrypt->algs);
215 spin_lock_init(&hcrypt->lock); 213 spin_lock_init(&hcrypt->lock);
216 214
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c
index 8a93f7d3eb38..77de957f1b1f 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp.c
@@ -68,10 +68,9 @@ static void * ieee80211_ccmp_init(int key_idx)
68{ 68{
69 struct ieee80211_ccmp_data *priv; 69 struct ieee80211_ccmp_data *priv;
70 70
71 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 71 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
72 if (priv == NULL) 72 if (priv == NULL)
73 goto fail; 73 goto fail;
74 memset(priv, 0, sizeof(*priv));
75 priv->key_idx = key_idx; 74 priv->key_idx = key_idx;
76 75
77 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); 76 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c
index 7e48748da102..ade5f6f13667 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip.c
@@ -67,10 +67,9 @@ static void * ieee80211_tkip_init(int key_idx)
67{ 67{
68 struct ieee80211_tkip_data *priv; 68 struct ieee80211_tkip_data *priv;
69 69
70 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 70 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
71 if (priv == NULL) 71 if (priv == NULL)
72 goto fail; 72 goto fail;
73 memset(priv, 0, sizeof(*priv));
74 priv->key_idx = key_idx; 73 priv->key_idx = key_idx;
75 74
76 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 75 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep.c
index 64f9cf01c94e..a1c0a59122b8 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep.c
@@ -43,10 +43,9 @@ static void * prism2_wep_init(int keyidx)
43{ 43{
44 struct prism2_wep_data *priv; 44 struct prism2_wep_data *priv;
45 45
46 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 46 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
47 if (priv == NULL) 47 if (priv == NULL)
48 goto fail; 48 goto fail;
49 memset(priv, 0, sizeof(*priv));
50 priv->key_idx = keyidx; 49 priv->key_idx = keyidx;
51 50
52 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 51 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c
index c024fa600729..a87650a517bd 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c
@@ -65,8 +65,8 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
65 if (ieee->networks) 65 if (ieee->networks)
66 return 0; 66 return 0;
67 67
68 ieee->networks = kmalloc( 68 ieee->networks = kcalloc(
69 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network), 69 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
70 GFP_KERNEL); 70 GFP_KERNEL);
71 if (!ieee->networks) { 71 if (!ieee->networks) {
72 printk(KERN_WARNING "%s: Out of memory allocating beacons\n", 72 printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
@@ -74,9 +74,6 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
74 return -ENOMEM; 74 return -ENOMEM;
75 } 75 }
76 76
77 memset(ieee->networks, 0,
78 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
79
80 return 0; 77 return 0;
81} 78}
82 79
@@ -161,7 +158,7 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
161 158
162 ieee80211_softmac_init(ieee); 159 ieee80211_softmac_init(ieee);
163 160
164 ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL); 161 ieee->pHTInfo = kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
165 if (ieee->pHTInfo == NULL) 162 if (ieee->pHTInfo == NULL)
166 { 163 {
167 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for HTInfo\n"); 164 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for HTInfo\n");
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h b/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h
index 7d6c3bc143ae..1824cda790d8 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h
@@ -172,18 +172,20 @@ enum {
172 IG_Max 172 IG_Max
173}; 173};
174 174
175typedef enum _LED_CTL_MODE { 175typedef enum _LED_CTL_MODE{
176 LED_CTL_POWER_ON = 1, 176 LED_CTL_POWER_ON = 1,
177 LED_CTL_LINK = 2, 177 LED_CTL_LINK = 2,
178 LED_CTL_NO_LINK = 3, 178 LED_CTL_NO_LINK = 3,
179 LED_CTL_TX = 4, 179 LED_CTL_TX = 4,
180 LED_CTL_RX = 5, 180 LED_CTL_RX = 5,
181 LED_CTL_SITE_SURVEY = 6, 181 LED_CTL_SITE_SURVEY = 6,
182 LED_CTL_POWER_OFF = 7, 182 LED_CTL_POWER_OFF = 7,
183 LED_CTL_START_TO_LINK = 8, 183 LED_CTL_START_TO_LINK = 8,
184 LED_CTL_START_WPS = 9, 184 LED_CTL_START_WPS = 9,
185 LED_CTL_STOP_WPS = 10, 185 LED_CTL_STOP_WPS = 10,
186 LED_CTL_START_WPS_BOTTON = 11, 186 LED_CTL_START_WPS_BOTTON = 11,
187 LED_CTL_STOP_WPS_FAIL = 12,
188 LED_CTL_STOP_WPS_FAIL_OVERLAP = 13,
187} LED_CTL_MODE; 189} LED_CTL_MODE;
188 190
189typedef union _frameqos { 191typedef union _frameqos {
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c
index cc80faf6598b..1f2bc7ac6f79 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c
@@ -1191,7 +1191,7 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
1191 /* skb: hdr + (possible reassembled) full plaintext payload */ 1191 /* skb: hdr + (possible reassembled) full plaintext payload */
1192 payload = skb->data + hdrlen; 1192 payload = skb->data + hdrlen;
1193 //ethertype = (payload[6] << 8) | payload[7]; 1193 //ethertype = (payload[6] << 8) | payload[7];
1194 rxb = (struct ieee80211_rxb*)kmalloc(sizeof(struct ieee80211_rxb),GFP_ATOMIC); 1194 rxb = kmalloc(sizeof(struct ieee80211_rxb), GFP_ATOMIC);
1195 if(rxb == NULL) 1195 if(rxb == NULL)
1196 { 1196 {
1197 IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__); 1197 IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__);
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
index 84a4e23b60b3..4f1f2f08b2d7 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
@@ -1557,7 +1557,7 @@ static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
1557 1557
1558 if(*(t++) == MFIE_TYPE_CHALLENGE){ 1558 if(*(t++) == MFIE_TYPE_CHALLENGE){
1559 *chlen = *(t++); 1559 *chlen = *(t++);
1560 *challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC); 1560 *challenge = kmalloc(*chlen, GFP_ATOMIC);
1561 memcpy(*challenge, t, *chlen); 1561 memcpy(*challenge, t, *chlen);
1562 } 1562 }
1563 } 1563 }
@@ -1691,7 +1691,8 @@ ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1691 //IEEE80211DMESG("Rx probe"); 1691 //IEEE80211DMESG("Rx probe");
1692 ieee->softmac_stats.rx_auth_rq++; 1692 ieee->softmac_stats.rx_auth_rq++;
1693 1693
1694 if ((status = auth_rq_parse(skb, dest))!= -1){ 1694 status = auth_rq_parse(skb, dest);
1695 if (status != -1) {
1695 ieee80211_resp_to_auth(ieee, status, dest); 1696 ieee80211_resp_to_auth(ieee, status, dest);
1696 } 1697 }
1697 //DMESG("Dest is "MACSTR, MAC2STR(dest)); 1698 //DMESG("Dest is "MACSTR, MAC2STR(dest));
@@ -2698,10 +2699,9 @@ void ieee80211_softmac_init(struct ieee80211_device *ieee)
2698 for(i = 0; i < 5; i++) { 2699 for(i = 0; i < 5; i++) {
2699 ieee->seq_ctrl[i] = 0; 2700 ieee->seq_ctrl[i] = 0;
2700 } 2701 }
2701 ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC); 2702 ieee->pDot11dInfo = kzalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
2702 if (!ieee->pDot11dInfo) 2703 if (!ieee->pDot11dInfo)
2703 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n"); 2704 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n");
2704 memset(ieee->pDot11dInfo, 0, sizeof(RT_DOT11D_INFO));
2705 //added for AP roaming 2705 //added for AP roaming
2706 ieee->LinkDetectInfo.SlotNum = 2; 2706 ieee->LinkDetectInfo.SlotNum = 2;
2707 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0; 2707 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
@@ -2844,11 +2844,11 @@ static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
2844 return -EINVAL; 2844 return -EINVAL;
2845 2845
2846 if (param->u.wpa_ie.len) { 2846 if (param->u.wpa_ie.len) {
2847 buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL); 2847 buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
2848 GFP_KERNEL);
2848 if (buf == NULL) 2849 if (buf == NULL)
2849 return -ENOMEM; 2850 return -ENOMEM;
2850 2851
2851 memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
2852 kfree(ieee->wpa_ie); 2852 kfree(ieee->wpa_ie);
2853 ieee->wpa_ie = buf; 2853 ieee->wpa_ie = buf;
2854 ieee->wpa_ie_len = param->u.wpa_ie.len; 2854 ieee->wpa_ie_len = param->u.wpa_ie.len;
@@ -3047,8 +3047,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3047 3047
3048 ieee80211_crypt_delayed_deinit(ieee, crypt); 3048 ieee80211_crypt_delayed_deinit(ieee, crypt);
3049 3049
3050 new_crypt = (struct ieee80211_crypt_data *) 3050 new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3051 kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3052 if (new_crypt == NULL) { 3051 if (new_crypt == NULL) {
3053 ret = -ENOMEM; 3052 ret = -ENOMEM;
3054 goto done; 3053 goto done;
@@ -3181,7 +3180,7 @@ int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_poin
3181 goto out; 3180 goto out;
3182 } 3181 }
3183 3182
3184 param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL); 3183 param = kmalloc(p->length, GFP_KERNEL);
3185 if (param == NULL){ 3184 if (param == NULL){
3186 ret = -ENOMEM; 3185 ret = -ENOMEM;
3187 goto out; 3186 goto out;
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c
index 727cc552c5ee..2ce5bd543eae 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c
@@ -352,11 +352,10 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
352 struct ieee80211_crypt_data *new_crypt; 352 struct ieee80211_crypt_data *new_crypt;
353 353
354 /* take WEP into use */ 354 /* take WEP into use */
355 new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data), 355 new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data),
356 GFP_KERNEL); 356 GFP_KERNEL);
357 if (new_crypt == NULL) 357 if (new_crypt == NULL)
358 return -ENOMEM; 358 return -ENOMEM;
359 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
360 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 359 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
361 if (!new_crypt->ops) 360 if (!new_crypt->ops)
362 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 361 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
@@ -768,10 +767,9 @@ int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
768 printk("len: %Zd, ie:%d\n", len, ie[1]); 767 printk("len: %Zd, ie:%d\n", len, ie[1]);
769 return -EINVAL; 768 return -EINVAL;
770 } 769 }
771 buf = kmalloc(len, GFP_KERNEL); 770 buf = kmemdup(ie, len, GFP_KERNEL);
772 if (buf == NULL) 771 if (buf == NULL)
773 return -ENOMEM; 772 return -ENOMEM;
774 memcpy(buf, ie, len);
775 kfree(ieee->wpa_ie); 773 kfree(ieee->wpa_ie);
776 ieee->wpa_ie = buf; 774 ieee->wpa_ie = buf;
777 ieee->wpa_ie_len = len; 775 ieee->wpa_ie_len = len;
diff --git a/drivers/staging/rtl8192su/ieee80211/rtl819x_Qos.h b/drivers/staging/rtl8192su/ieee80211/rtl819x_Qos.h
index 7aa9a7790b63..d4565ecc7ab4 100644
--- a/drivers/staging/rtl8192su/ieee80211/rtl819x_Qos.h
+++ b/drivers/staging/rtl8192su/ieee80211/rtl819x_Qos.h
@@ -1,7 +1,6 @@
1#ifndef __INC_QOS_TYPE_H 1#ifndef __INC_QOS_TYPE_H
2#define __INC_QOS_TYPE_H 2#define __INC_QOS_TYPE_H
3 3
4//#include "EndianFree.h"
5#define BIT0 0x00000001 4#define BIT0 0x00000001
6#define BIT1 0x00000002 5#define BIT1 0x00000002
7#define BIT2 0x00000004 6#define BIT2 0x00000004
diff --git a/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c
index 38468c539675..de143ecae5fa 100644
--- a/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c
+++ b/drivers/staging/rtl8192su/ieee80211/rtl819x_TSProc.c
@@ -22,7 +22,6 @@ void TsInactTimeout(unsigned long data)
22 * return: NULL 22 * return: NULL
23 * notice: 23 * notice:
24********************************************************************************************************************/ 24********************************************************************************************************************/
25#if 1
26void RxPktPendingTimeout(unsigned long data) 25void RxPktPendingTimeout(unsigned long data)
27{ 26{
28 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data; 27 PRX_TS_RECORD pRxTs = (PRX_TS_RECORD)data;
@@ -83,8 +82,6 @@ void RxPktPendingTimeout(unsigned long data)
83 return; 82 return;
84 } 83 }
85 ieee80211_indicate_packets(ieee, stats_IndicateArray, index); 84 ieee80211_indicate_packets(ieee, stats_IndicateArray, index);
86 bPktInBuf = false;
87
88 } 85 }
89 86
90 if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff)) 87 if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff))
@@ -95,7 +92,6 @@ void RxPktPendingTimeout(unsigned long data)
95 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags); 92 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
96 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK); 93 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
97} 94}
98#endif
99 95
100/******************************************************************************************************************** 96/********************************************************************************************************************
101 *function: Add BA timer function 97 *function: Add BA timer function
@@ -534,8 +530,8 @@ void RemoveTsEntry(
534void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) 530void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
535{ 531{
536 PTS_COMMON_INFO pTS, pTmpTS; 532 PTS_COMMON_INFO pTS, pTmpTS;
533
537 printk("===========>RemovePeerTS,%pM\n", Addr); 534 printk("===========>RemovePeerTS,%pM\n", Addr);
538#if 1
539 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) 535 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
540 { 536 {
541 if (memcmp(pTS->Addr, Addr, 6) == 0) 537 if (memcmp(pTS->Addr, Addr, 6) == 0)
@@ -576,13 +572,12 @@ void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
576 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List); 572 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
577 } 573 }
578 } 574 }
579#endif
580} 575}
581 576
582void RemoveAllTS(struct ieee80211_device* ieee) 577void RemoveAllTS(struct ieee80211_device* ieee)
583{ 578{
584 PTS_COMMON_INFO pTS, pTmpTS; 579 PTS_COMMON_INFO pTS, pTmpTS;
585#if 1 580
586 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) 581 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
587 { 582 {
588 RemoveTsEntry(ieee, pTS, TX_DIR); 583 RemoveTsEntry(ieee, pTS, TX_DIR);
@@ -610,7 +605,6 @@ void RemoveAllTS(struct ieee80211_device* ieee)
610 list_del_init(&pTS->List); 605 list_del_init(&pTS->List);
611 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List); 606 list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
612 } 607 }
613#endif
614} 608}
615 609
616void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS) 610void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
@@ -618,7 +612,6 @@ void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
618 if(pTxTS->bAddBaReqInProgress == false) 612 if(pTxTS->bAddBaReqInProgress == false)
619 { 613 {
620 pTxTS->bAddBaReqInProgress = true; 614 pTxTS->bAddBaReqInProgress = true;
621#if 1
622 if(pTxTS->bAddBaReqDelayed) 615 if(pTxTS->bAddBaReqDelayed)
623 { 616 {
624 IEEE80211_DEBUG(IEEE80211_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n"); 617 IEEE80211_DEBUG(IEEE80211_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
@@ -629,7 +622,6 @@ void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
629 IEEE80211_DEBUG(IEEE80211_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n"); 622 IEEE80211_DEBUG(IEEE80211_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
630 mod_timer(&pTxTS->TsAddBaTimer, jiffies+10); //set 10 ticks 623 mod_timer(&pTxTS->TsAddBaTimer, jiffies+10); //set 10 ticks
631 } 624 }
632#endif
633 } 625 }
634 else 626 else
635 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__); 627 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__);
diff --git a/drivers/staging/rtl8192su/r8180_93cx6.c b/drivers/staging/rtl8192su/r8180_93cx6.c
deleted file mode 100644
index 8878cfeb0fbb..000000000000
--- a/drivers/staging/rtl8192su/r8180_93cx6.c
+++ /dev/null
@@ -1,146 +0,0 @@
1/*
2 This files contains card eeprom (93c46 or 93c56) programming routines,
3 memory is addressed by 16 bits words.
4
5 This is part of rtl8180 OpenSource driver.
6 Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
7 Released under the terms of GPL (General Public Licence)
8
9 Parts of this driver are based on the GPL part of the
10 official realtek driver.
11
12 Parts of this driver are based on the rtl8180 driver skeleton
13 from Patric Schenke & Andres Salomon.
14
15 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
16
17 We want to tanks the Authors of those projects and the Ndiswrapper
18 project Authors.
19*/
20
21#include "r8180_93cx6.h"
22
23void eprom_cs(struct net_device *dev, short bit)
24{
25 if(bit)
26 write_nic_byte_E(dev, EPROM_CMD,
27 (1<<EPROM_CS_SHIFT) | \
28 read_nic_byte_E(dev, EPROM_CMD)); //enable EPROM
29 else
30 write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev, EPROM_CMD)\
31 &~(1<<EPROM_CS_SHIFT)); //disable EPROM
32
33 force_pci_posting(dev);
34 udelay(EPROM_DELAY);
35}
36
37
38void eprom_ck_cycle(struct net_device *dev)
39{
40 write_nic_byte_E(dev, EPROM_CMD,
41 (1<<EPROM_CK_SHIFT) | read_nic_byte_E(dev,EPROM_CMD));
42 force_pci_posting(dev);
43 udelay(EPROM_DELAY);
44 write_nic_byte_E(dev, EPROM_CMD,
45 read_nic_byte_E(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
46 force_pci_posting(dev);
47 udelay(EPROM_DELAY);
48}
49
50
51void eprom_w(struct net_device *dev,short bit)
52{
53 if(bit)
54 write_nic_byte_E(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
55 read_nic_byte_E(dev,EPROM_CMD));
56 else
57 write_nic_byte_E(dev, EPROM_CMD, read_nic_byte_E(dev,EPROM_CMD)\
58 &~(1<<EPROM_W_SHIFT));
59
60 force_pci_posting(dev);
61 udelay(EPROM_DELAY);
62}
63
64
65short eprom_r(struct net_device *dev)
66{
67 short bit;
68
69 bit=(read_nic_byte_E(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
70 udelay(EPROM_DELAY);
71
72 if(bit) return 1;
73 return 0;
74}
75
76
77void eprom_send_bits_string(struct net_device *dev, short b[], int len)
78{
79 int i;
80
81 for(i=0; i<len; i++){
82 eprom_w(dev, b[i]);
83 eprom_ck_cycle(dev);
84 }
85}
86
87
88u32 eprom_read(struct net_device *dev, u32 addr)
89{
90 struct r8192_priv *priv = ieee80211_priv(dev);
91 short read_cmd[]={1,1,0};
92 short addr_str[8];
93 int i;
94 int addr_len;
95 u32 ret;
96
97 ret=0;
98 //enable EPROM programming
99 write_nic_byte_E(dev, EPROM_CMD,
100 (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
101 force_pci_posting(dev);
102 udelay(EPROM_DELAY);
103
104 if (priv->epromtype==EPROM_93c56){
105 addr_str[7]=addr & 1;
106 addr_str[6]=addr & (1<<1);
107 addr_str[5]=addr & (1<<2);
108 addr_str[4]=addr & (1<<3);
109 addr_str[3]=addr & (1<<4);
110 addr_str[2]=addr & (1<<5);
111 addr_str[1]=addr & (1<<6);
112 addr_str[0]=addr & (1<<7);
113 addr_len=8;
114 }else{
115 addr_str[5]=addr & 1;
116 addr_str[4]=addr & (1<<1);
117 addr_str[3]=addr & (1<<2);
118 addr_str[2]=addr & (1<<3);
119 addr_str[1]=addr & (1<<4);
120 addr_str[0]=addr & (1<<5);
121 addr_len=6;
122 }
123 eprom_cs(dev, 1);
124 eprom_ck_cycle(dev);
125 eprom_send_bits_string(dev, read_cmd, 3);
126 eprom_send_bits_string(dev, addr_str, addr_len);
127
128 //keep chip pin D to low state while reading.
129 //I'm unsure if it is necessary, but anyway shouldn't hurt
130 eprom_w(dev, 0);
131
132 for(i=0;i<16;i++){
133 //eeprom needs a clk cycle between writing opcode&adr
134 //and reading data. (eeprom outs a dummy 0)
135 eprom_ck_cycle(dev);
136 ret |= (eprom_r(dev)<<(15-i));
137 }
138
139 eprom_cs(dev, 0);
140 eprom_ck_cycle(dev);
141
142 //disable EPROM programming
143 write_nic_byte_E(dev, EPROM_CMD,
144 (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
145 return ret;
146}
diff --git a/drivers/staging/rtl8192su/r8180_93cx6.h b/drivers/staging/rtl8192su/r8180_93cx6.h
deleted file mode 100644
index 0309800255cf..000000000000
--- a/drivers/staging/rtl8192su/r8180_93cx6.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 This is part of rtl8187 OpenSource driver
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public Licence)
5
6 Parts of this driver are based on the GPL part of the official realtek driver
7 Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
8 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
9
10 We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
11*/
12
13/*This files contains card eeprom (93c46 or 93c56) programming routines*/
14/*memory is addressed by WORDS*/
15
16#include "r8192U.h"
17#include "r8192S_hw.h"
18
19#define EPROM_DELAY 10
20
21#define EPROM_ANAPARAM_ADDRLWORD 0xd
22#define EPROM_ANAPARAM_ADDRHWORD 0xe
23
24#define EPROM_RFCHIPID 0x6
25#define EPROM_TXPW_BASE 0x05
26#define EPROM_RFCHIPID_RTL8225U 5
27#define EPROM_RF_PARAM 0x4
28#define EPROM_CONFIG2 0xc
29
30#define EPROM_VERSION 0x1E
31#define MAC_ADR 0x7
32
33#define CIS 0x18
34
35#define EPROM_TXPW0 0x16
36#define EPROM_TXPW2 0x1b
37#define EPROM_TXPW1 0x3d
38
39
40u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word
diff --git a/drivers/staging/rtl8192su/r8192SU_led.c b/drivers/staging/rtl8192su/r8192SU_led.c
new file mode 100644
index 000000000000..609dba67eb4e
--- /dev/null
+++ b/drivers/staging/rtl8192su/r8192SU_led.c
@@ -0,0 +1,2347 @@
1/*
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 */
19
20#include "r8192U.h"
21#include "r8192S_hw.h"
22#include "r8192SU_led.h"
23
24#define LED_BLINK_NORMAL_INTERVAL 100
25#define LED_BLINK_SLOWLY_INTERVAL 200
26#define LED_BLINK_LONG_INTERVAL 400
27
28#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000
29#define LED_BLINK_LINK_INTERVAL_ALPHA 500
30#define LED_BLINK_SCAN_INTERVAL_ALPHA 180
31#define LED_BLINK_FASTER_INTERVAL_ALPHA 50
32#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000
33
34
35
36static void BlinkTimerCallback (unsigned long data);
37
38static void BlinkWorkItemCallback (struct work_struct *work);
39
40void InitLed819xUsb (struct net_device *dev, PLED_819xUsb pLed,
41 LED_PIN_819xUsb LedPin)
42{
43 struct r8192_priv *priv = ieee80211_priv(dev);
44
45 pLed->dev = dev;
46 pLed->LedPin = LedPin;
47 pLed->CurrLedState = LED_OFF;
48 pLed->bLedOn = FALSE;
49
50 pLed->bLedBlinkInProgress = FALSE;
51 pLed->BlinkTimes = 0;
52 pLed->BlinkingLedState = LED_OFF;
53
54 init_timer(&pLed->BlinkTimer);
55 pLed->BlinkTimer.data = (unsigned long)dev;
56 pLed->BlinkTimer.function = BlinkTimerCallback;
57
58 INIT_WORK(&priv->BlinkWorkItem, (void*)BlinkWorkItemCallback);
59 priv->pLed = pLed;
60}
61
62
63void DeInitLed819xUsb (PLED_819xUsb pLed)
64{
65 del_timer_sync(&(pLed->BlinkTimer));
66 pLed->bLedBlinkInProgress = FALSE;
67}
68
69void SwLedOn (struct net_device *dev, PLED_819xUsb pLed)
70{
71 u8 LedCfg;
72
73 LedCfg = read_nic_byte(dev, LEDCFG);
74 switch (pLed->LedPin) {
75 case LED_PIN_GPIO0:
76 break;
77 case LED_PIN_LED0:
78 write_nic_byte(dev, LEDCFG, LedCfg&0xf0);
79 break;
80 case LED_PIN_LED1:
81 write_nic_byte(dev, LEDCFG, LedCfg&0x0f);
82 break;
83 default:
84 break;
85 }
86 pLed->bLedOn = TRUE;
87}
88
89void SwLedOff (struct net_device *dev, PLED_819xUsb pLed)
90{
91 u8 LedCfg;
92
93 LedCfg = read_nic_byte(dev, LEDCFG);
94 switch (pLed->LedPin) {
95 case LED_PIN_GPIO0:
96 break;
97 case LED_PIN_LED0:
98 LedCfg &= 0xf0;
99 write_nic_byte(dev, LEDCFG, (LedCfg|BIT3));
100 break;
101 case LED_PIN_LED1:
102 LedCfg &= 0x0f;
103 write_nic_byte(dev, LEDCFG, (LedCfg|BIT7));
104 break;
105 default:
106 break;
107 }
108 pLed->bLedOn = FALSE;
109}
110
111
112void
113InitSwLeds(
114 struct net_device *dev
115 )
116{
117 struct r8192_priv *priv = ieee80211_priv(dev);
118
119 InitLed819xUsb(dev, &(priv->SwLed0), LED_PIN_LED0);
120
121 InitLed819xUsb(dev,&(priv->SwLed1), LED_PIN_LED1);
122}
123
124
125void
126DeInitSwLeds(
127 struct net_device *dev
128 )
129{
130 struct r8192_priv *priv = ieee80211_priv(dev);
131
132 DeInitLed819xUsb( &(priv->SwLed0) );
133 DeInitLed819xUsb( &(priv->SwLed1) );
134}
135
136
137void
138SwLedBlink(
139 PLED_819xUsb pLed
140 )
141{
142 struct net_device *dev = (struct net_device *)(pLed->dev);
143 struct r8192_priv *priv = ieee80211_priv(dev);
144 bool bStopBlinking = FALSE;
145
146 if( pLed->BlinkingLedState == LED_ON )
147 {
148 SwLedOn(dev, pLed);
149 RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
150 }
151 else
152 {
153 SwLedOff(dev, pLed);
154 RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
155 }
156
157 pLed->BlinkTimes--;
158 switch(pLed->CurrLedState)
159 {
160
161 case LED_BLINK_NORMAL:
162 if(pLed->BlinkTimes == 0)
163 {
164 bStopBlinking = TRUE;
165 }
166 break;
167
168 case LED_BLINK_StartToBlink:
169 if( (priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA))
170 {
171 bStopBlinking = TRUE;
172 }
173 else if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_ADHOC))
174 {
175 bStopBlinking = TRUE;
176 }
177 else if(pLed->BlinkTimes == 0)
178 {
179 bStopBlinking = TRUE;
180 }
181 break;
182
183 case LED_BLINK_WPS:
184 if( pLed->BlinkTimes == 0 )
185 {
186 bStopBlinking = TRUE;
187 }
188 break;
189
190
191 default:
192 bStopBlinking = TRUE;
193 break;
194
195 }
196
197 if(bStopBlinking)
198 {
199 if( priv->ieee80211->eRFPowerState != eRfOn )
200 {
201 SwLedOff(dev, pLed);
202 }
203 else if( (priv->ieee80211->state == IEEE80211_LINKED) && (pLed->bLedOn == false))
204 {
205 SwLedOn(dev, pLed);
206 }
207 else if( (priv->ieee80211->state != IEEE80211_LINKED) && pLed->bLedOn == true)
208 {
209 SwLedOff(dev, pLed);
210 }
211
212 pLed->BlinkTimes = 0;
213 pLed->bLedBlinkInProgress = FALSE;
214 }
215 else
216 {
217 if( pLed->BlinkingLedState == LED_ON )
218 pLed->BlinkingLedState = LED_OFF;
219 else
220 pLed->BlinkingLedState = LED_ON;
221
222 switch( pLed->CurrLedState )
223 {
224 case LED_BLINK_NORMAL:
225 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
226 break;
227
228 case LED_BLINK_SLOWLY:
229 case LED_BLINK_StartToBlink:
230 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
231 break;
232
233 case LED_BLINK_WPS:
234 {
235 if( pLed->BlinkingLedState == LED_ON )
236 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LONG_INTERVAL));
237 else
238 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LONG_INTERVAL));
239 }
240 break;
241
242 default:
243 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
244 break;
245 }
246 }
247}
248
249
250void
251SwLedBlink1(
252 PLED_819xUsb pLed
253 )
254{
255 struct net_device *dev = (struct net_device *)(pLed->dev);
256 struct r8192_priv *priv = ieee80211_priv(dev);
257 PLED_819xUsb pLed1 = &(priv->SwLed1);
258 bool bStopBlinking = FALSE;
259
260 if(priv->CustomerID == RT_CID_819x_CAMEO)
261 pLed = &(priv->SwLed1);
262
263 if( pLed->BlinkingLedState == LED_ON )
264 {
265 SwLedOn(dev, pLed);
266 RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
267 }
268 else
269 {
270 SwLedOff(dev, pLed);
271 RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
272 }
273
274
275 if(priv->CustomerID == RT_CID_DEFAULT)
276 {
277 if(priv->ieee80211->state == IEEE80211_LINKED)
278 {
279 if(!pLed1->bSWLedCtrl)
280 {
281 SwLedOn(dev, pLed1);
282 pLed1->bSWLedCtrl = TRUE;
283 }
284 else if(!pLed1->bLedOn)
285 SwLedOn(dev, pLed1);
286 RT_TRACE(COMP_LED, "Blinktimes (): turn on pLed1\n");
287 }
288 else
289 {
290 if(!pLed1->bSWLedCtrl)
291 {
292 SwLedOff(dev, pLed1);
293 pLed1->bSWLedCtrl = TRUE;
294 }
295 else if(pLed1->bLedOn)
296 SwLedOff(dev, pLed1);
297 RT_TRACE(COMP_LED, "Blinktimes (): turn off pLed1\n");
298 }
299 }
300
301 switch(pLed->CurrLedState)
302 {
303 case LED_BLINK_SLOWLY:
304 if( pLed->bLedOn )
305 pLed->BlinkingLedState = LED_OFF;
306 else
307 pLed->BlinkingLedState = LED_ON;
308 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
309 break;
310
311 case LED_BLINK_NORMAL:
312 if( pLed->bLedOn )
313 pLed->BlinkingLedState = LED_OFF;
314 else
315 pLed->BlinkingLedState = LED_ON;
316 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LINK_INTERVAL_ALPHA));
317 break;
318
319 case LED_SCAN_BLINK:
320 pLed->BlinkTimes--;
321 if( pLed->BlinkTimes == 0 )
322 {
323 bStopBlinking = TRUE;
324 }
325
326 if(bStopBlinking)
327 {
328 if( priv->ieee80211->eRFPowerState != eRfOn )
329 {
330 SwLedOff(dev, pLed);
331 }
332 else if(priv->ieee80211->state == IEEE80211_LINKED)
333 {
334 pLed->bLedLinkBlinkInProgress = TRUE;
335 pLed->CurrLedState = LED_BLINK_NORMAL;
336 if( pLed->bLedOn )
337 pLed->BlinkingLedState = LED_OFF;
338 else
339 pLed->BlinkingLedState = LED_ON;
340 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LINK_INTERVAL_ALPHA));
341 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
342
343 }
344 else if(priv->ieee80211->state != IEEE80211_LINKED)
345 {
346 pLed->bLedNoLinkBlinkInProgress = TRUE;
347 pLed->CurrLedState = LED_BLINK_SLOWLY;
348 if( pLed->bLedOn )
349 pLed->BlinkingLedState = LED_OFF;
350 else
351 pLed->BlinkingLedState = LED_ON;
352 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
353 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
354 }
355 pLed->bLedScanBlinkInProgress = FALSE;
356 }
357 else
358 {
359 if( priv->ieee80211->eRFPowerState != eRfOn )
360 {
361 SwLedOff(dev, pLed);
362 }
363 else
364 {
365 if( pLed->bLedOn )
366 pLed->BlinkingLedState = LED_OFF;
367 else
368 pLed->BlinkingLedState = LED_ON;
369 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
370 }
371 }
372 break;
373
374 case LED_TXRX_BLINK:
375 pLed->BlinkTimes--;
376 if( pLed->BlinkTimes == 0 )
377 {
378 bStopBlinking = TRUE;
379 }
380 if(bStopBlinking)
381 {
382 if( priv->ieee80211->eRFPowerState != eRfOn )
383 {
384 SwLedOff(dev, pLed);
385 }
386 else if(priv->ieee80211->state == IEEE80211_LINKED)
387 {
388 pLed->bLedLinkBlinkInProgress = TRUE;
389 pLed->CurrLedState = LED_BLINK_NORMAL;
390 if( pLed->bLedOn )
391 pLed->BlinkingLedState = LED_OFF;
392 else
393 pLed->BlinkingLedState = LED_ON;
394 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LINK_INTERVAL_ALPHA));
395 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
396 }
397 else if(priv->ieee80211->state != IEEE80211_LINKED)
398 {
399 pLed->bLedNoLinkBlinkInProgress = TRUE;
400 pLed->CurrLedState = LED_BLINK_SLOWLY;
401 if( pLed->bLedOn )
402 pLed->BlinkingLedState = LED_OFF;
403 else
404 pLed->BlinkingLedState = LED_ON;
405 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
406 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
407 }
408 pLed->BlinkTimes = 0;
409 pLed->bLedBlinkInProgress = FALSE;
410 }
411 else
412 {
413 if( priv->ieee80211->eRFPowerState != eRfOn )
414 {
415 SwLedOff(dev, pLed);
416 }
417 else
418 {
419 if( pLed->bLedOn )
420 pLed->BlinkingLedState = LED_OFF;
421 else
422 pLed->BlinkingLedState = LED_ON;
423 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
424 }
425 }
426 break;
427
428 case LED_BLINK_WPS:
429 if( pLed->bLedOn )
430 pLed->BlinkingLedState = LED_OFF;
431 else
432 pLed->BlinkingLedState = LED_ON;
433 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
434 break;
435
436 case LED_BLINK_WPS_STOP:
437 if(pLed->BlinkingLedState == LED_ON)
438 {
439 pLed->BlinkingLedState = LED_OFF;
440 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
441 bStopBlinking = FALSE;
442 }
443 else
444 {
445 bStopBlinking = TRUE;
446 }
447
448 if(bStopBlinking)
449 {
450 if( priv->ieee80211->eRFPowerState != eRfOn )
451 {
452 SwLedOff(dev, pLed);
453 }
454 else
455 {
456 pLed->bLedLinkBlinkInProgress = TRUE;
457 pLed->CurrLedState = LED_BLINK_NORMAL;
458 if( pLed->bLedOn )
459 pLed->BlinkingLedState = LED_OFF;
460 else
461 pLed->BlinkingLedState = LED_ON;
462 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LINK_INTERVAL_ALPHA));
463 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
464 }
465 pLed->bLedWPSBlinkInProgress = FALSE;
466 }
467 break;
468
469 default:
470 break;
471 }
472
473}
474
475void
476SwLedBlink2(
477 PLED_819xUsb pLed
478 )
479{
480 struct net_device *dev = (struct net_device *)(pLed->dev);
481 struct r8192_priv *priv = ieee80211_priv(dev);
482 bool bStopBlinking = FALSE;
483
484 if( pLed->BlinkingLedState == LED_ON)
485 {
486 SwLedOn(dev, pLed);
487 RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
488 }
489 else
490 {
491 SwLedOff(dev, pLed);
492 RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
493 }
494
495 switch(pLed->CurrLedState)
496 {
497 case LED_SCAN_BLINK:
498 pLed->BlinkTimes--;
499 if( pLed->BlinkTimes == 0 )
500 {
501 bStopBlinking = TRUE;
502 }
503
504 if(bStopBlinking)
505 {
506 if( priv->ieee80211->eRFPowerState != eRfOn )
507 {
508 SwLedOff(dev, pLed);
509 RT_TRACE(COMP_LED, "eRFPowerState %d\n", priv->ieee80211->eRFPowerState);
510 }
511 else if(priv->ieee80211->state == IEEE80211_LINKED)
512 {
513 pLed->CurrLedState = LED_ON;
514 pLed->BlinkingLedState = LED_ON;
515 SwLedOn(dev, pLed);
516 RT_TRACE(COMP_LED, "stop scan blink CurrLedState %d\n", pLed->CurrLedState);
517
518 }
519 else if(priv->ieee80211->state != IEEE80211_LINKED)
520 {
521 pLed->CurrLedState = LED_OFF;
522 pLed->BlinkingLedState = LED_OFF;
523 SwLedOff(dev, pLed);
524 RT_TRACE(COMP_LED, "stop scan blink CurrLedState %d\n", pLed->CurrLedState);
525 }
526 pLed->bLedScanBlinkInProgress = FALSE;
527 }
528 else
529 {
530 if( priv->ieee80211->eRFPowerState != eRfOn )
531 {
532 SwLedOff(dev, pLed);
533 }
534 else
535 {
536 if( pLed->bLedOn )
537 pLed->BlinkingLedState = LED_OFF;
538 else
539 pLed->BlinkingLedState = LED_ON;
540 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
541 }
542 }
543 break;
544
545 case LED_TXRX_BLINK:
546 pLed->BlinkTimes--;
547 if( pLed->BlinkTimes == 0 )
548 {
549 bStopBlinking = TRUE;
550 }
551 if(bStopBlinking)
552 {
553 if( priv->ieee80211->eRFPowerState != eRfOn )
554 {
555 SwLedOff(dev, pLed);
556 }
557 else if(priv->ieee80211->state == IEEE80211_LINKED)
558 {
559 pLed->CurrLedState = LED_ON;
560 pLed->BlinkingLedState = LED_ON;
561 SwLedOn(dev, pLed);
562 RT_TRACE(COMP_LED, "stop CurrLedState %d\n", pLed->CurrLedState);
563
564 }
565 else if(priv->ieee80211->state != IEEE80211_LINKED)
566 {
567 pLed->CurrLedState = LED_OFF;
568 pLed->BlinkingLedState = LED_OFF;
569 SwLedOff(dev, pLed);
570 RT_TRACE(COMP_LED, "stop CurrLedState %d\n", pLed->CurrLedState);
571 }
572 pLed->bLedBlinkInProgress = FALSE;
573 }
574 else
575 {
576 if( priv->ieee80211->eRFPowerState != eRfOn )
577 {
578 SwLedOff(dev, pLed);
579 }
580 else
581 {
582 if( pLed->bLedOn )
583 pLed->BlinkingLedState = LED_OFF;
584 else
585 pLed->BlinkingLedState = LED_ON;
586 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
587 }
588 }
589 break;
590
591 default:
592 break;
593 }
594
595}
596
597void
598SwLedBlink3(
599 PLED_819xUsb pLed
600 )
601{
602 struct net_device *dev = (struct net_device *)(pLed->dev);
603 struct r8192_priv *priv = ieee80211_priv(dev);
604 bool bStopBlinking = FALSE;
605
606 if( pLed->BlinkingLedState == LED_ON )
607 {
608 SwLedOn(dev, pLed);
609 RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
610 }
611 else
612 {
613 if(pLed->CurrLedState != LED_BLINK_WPS_STOP)
614 SwLedOff(dev, pLed);
615 RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
616 }
617
618 switch(pLed->CurrLedState)
619 {
620 case LED_SCAN_BLINK:
621 pLed->BlinkTimes--;
622 if( pLed->BlinkTimes == 0 )
623 {
624 bStopBlinking = TRUE;
625 }
626
627 if(bStopBlinking)
628 {
629 if( priv->ieee80211->eRFPowerState != eRfOn )
630 {
631 SwLedOff(dev, pLed);
632 }
633 else if(priv->ieee80211->state == IEEE80211_LINKED)
634 {
635 pLed->CurrLedState = LED_ON;
636 pLed->BlinkingLedState = LED_ON;
637 if( !pLed->bLedOn )
638 SwLedOn(dev, pLed);
639
640 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
641 }
642 else if(priv->ieee80211->state != IEEE80211_LINKED)
643 {
644 pLed->CurrLedState = LED_OFF;
645 pLed->BlinkingLedState = LED_OFF;
646 if( pLed->bLedOn )
647 SwLedOff(dev, pLed);
648
649 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
650 }
651 pLed->bLedScanBlinkInProgress = FALSE;
652 }
653 else
654 {
655 if( priv->ieee80211->eRFPowerState != eRfOn )
656 {
657 SwLedOff(dev, pLed);
658 }
659 else
660 {
661 if( pLed->bLedOn )
662 pLed->BlinkingLedState = LED_OFF;
663 else
664 pLed->BlinkingLedState = LED_ON;
665 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
666 }
667 }
668 break;
669
670 case LED_TXRX_BLINK:
671 pLed->BlinkTimes--;
672 if( pLed->BlinkTimes == 0 )
673 {
674 bStopBlinking = TRUE;
675 }
676 if(bStopBlinking)
677 {
678 if( priv->ieee80211->eRFPowerState != eRfOn )
679 {
680 SwLedOff(dev, pLed);
681 }
682 else if(priv->ieee80211->state == IEEE80211_LINKED)
683 {
684 pLed->CurrLedState = LED_ON;
685 pLed->BlinkingLedState = LED_ON;
686
687 if( !pLed->bLedOn )
688 SwLedOn(dev, pLed);
689
690 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
691 }
692 else if(priv->ieee80211->state != IEEE80211_LINKED)
693 {
694 pLed->CurrLedState = LED_OFF;
695 pLed->BlinkingLedState = LED_OFF;
696
697 if( pLed->bLedOn )
698 SwLedOff(dev, pLed);
699
700
701 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
702 }
703 pLed->bLedBlinkInProgress = FALSE;
704 }
705 else
706 {
707 if( priv->ieee80211->eRFPowerState != eRfOn )
708 {
709 SwLedOff(dev, pLed);
710 }
711 else
712 {
713 if( pLed->bLedOn )
714 pLed->BlinkingLedState = LED_OFF;
715 else
716 pLed->BlinkingLedState = LED_ON;
717 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
718 }
719 }
720 break;
721
722 case LED_BLINK_WPS:
723 if( pLed->bLedOn )
724 pLed->BlinkingLedState = LED_OFF;
725 else
726 pLed->BlinkingLedState = LED_ON;
727 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
728 break;
729
730 case LED_BLINK_WPS_STOP:
731 if(pLed->BlinkingLedState == LED_ON)
732 {
733 pLed->BlinkingLedState = LED_OFF;
734 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
735 bStopBlinking = FALSE;
736 }
737 else
738 {
739 bStopBlinking = TRUE;
740 }
741
742 if(bStopBlinking)
743 {
744 if( priv->ieee80211->eRFPowerState != eRfOn )
745 {
746 SwLedOff(dev, pLed);
747 }
748 else
749 {
750 pLed->CurrLedState = LED_ON;
751 pLed->BlinkingLedState = LED_ON;
752 SwLedOn(dev, pLed);
753 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
754 }
755 pLed->bLedWPSBlinkInProgress = FALSE;
756 }
757 break;
758
759
760 default:
761 break;
762 }
763
764}
765
766
767void
768SwLedBlink4(
769 PLED_819xUsb pLed
770 )
771{
772 struct net_device *dev = (struct net_device *)(pLed->dev);
773 struct r8192_priv *priv = ieee80211_priv(dev);
774 PLED_819xUsb pLed1 = &(priv->SwLed1);
775 bool bStopBlinking = FALSE;
776
777 if( pLed->BlinkingLedState == LED_ON )
778 {
779 SwLedOn(dev, pLed);
780 RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
781 }
782 else
783 {
784 SwLedOff(dev, pLed);
785 RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
786 }
787
788 if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN)
789 {
790 pLed1->BlinkingLedState = LED_OFF;
791 pLed1->CurrLedState = LED_OFF;
792 SwLedOff(dev, pLed1);
793 }
794
795 switch(pLed->CurrLedState)
796 {
797 case LED_BLINK_SLOWLY:
798 if( pLed->bLedOn )
799 pLed->BlinkingLedState = LED_OFF;
800 else
801 pLed->BlinkingLedState = LED_ON;
802 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
803 break;
804
805 case LED_BLINK_StartToBlink:
806 if( pLed->bLedOn )
807 {
808 pLed->BlinkingLedState = LED_OFF;
809 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
810 }
811 else
812 {
813 pLed->BlinkingLedState = LED_ON;
814 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
815 }
816 break;
817
818 case LED_SCAN_BLINK:
819 pLed->BlinkTimes--;
820 if( pLed->BlinkTimes == 0 )
821 {
822 bStopBlinking = TRUE;
823 }
824
825 if(bStopBlinking)
826 {
827 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
828 {
829 SwLedOff(dev, pLed);
830 }
831 else
832 {
833 pLed->bLedNoLinkBlinkInProgress = TRUE;
834 pLed->CurrLedState = LED_BLINK_SLOWLY;
835 if( pLed->bLedOn )
836 pLed->BlinkingLedState = LED_OFF;
837 else
838 pLed->BlinkingLedState = LED_ON;
839 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
840 }
841 pLed->bLedScanBlinkInProgress = FALSE;
842 }
843 else
844 {
845 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
846 {
847 SwLedOff(dev, pLed);
848 }
849 else
850 {
851 if( pLed->bLedOn )
852 pLed->BlinkingLedState = LED_OFF;
853 else
854 pLed->BlinkingLedState = LED_ON;
855 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
856 }
857 }
858 break;
859
860 case LED_TXRX_BLINK:
861 pLed->BlinkTimes--;
862 if( pLed->BlinkTimes == 0 )
863 {
864 bStopBlinking = TRUE;
865 }
866 if(bStopBlinking)
867 {
868 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
869 {
870 SwLedOff(dev, pLed);
871 }
872 else
873 {
874 pLed->bLedNoLinkBlinkInProgress = TRUE;
875 pLed->CurrLedState = LED_BLINK_SLOWLY;
876 if( pLed->bLedOn )
877 pLed->BlinkingLedState = LED_OFF;
878 else
879 pLed->BlinkingLedState = LED_ON;
880 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
881 }
882 pLed->bLedBlinkInProgress = FALSE;
883 }
884 else
885 {
886 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
887 {
888 SwLedOff(dev, pLed);
889 }
890 else
891 {
892 if( pLed->bLedOn )
893 pLed->BlinkingLedState = LED_OFF;
894 else
895 pLed->BlinkingLedState = LED_ON;
896 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
897 }
898 }
899 break;
900
901 case LED_BLINK_WPS:
902 if( pLed->bLedOn )
903 {
904 pLed->BlinkingLedState = LED_OFF;
905 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
906 }
907 else
908 {
909 pLed->BlinkingLedState = LED_ON;
910 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
911 }
912 break;
913
914 case LED_BLINK_WPS_STOP:
915 if( pLed->bLedOn )
916 pLed->BlinkingLedState = LED_OFF;
917 else
918 pLed->BlinkingLedState = LED_ON;
919
920 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
921 break;
922
923 case LED_BLINK_WPS_STOP_OVERLAP:
924 pLed->BlinkTimes--;
925 if(pLed->BlinkTimes == 0)
926 {
927 if(pLed->bLedOn)
928 {
929 pLed->BlinkTimes = 1;
930 }
931 else
932 {
933 bStopBlinking = TRUE;
934 }
935 }
936
937 if(bStopBlinking)
938 {
939 pLed->BlinkTimes = 10;
940 pLed->BlinkingLedState = LED_ON;
941 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LINK_INTERVAL_ALPHA));
942 }
943 else
944 {
945 if( pLed->bLedOn )
946 pLed->BlinkingLedState = LED_OFF;
947 else
948 pLed->BlinkingLedState = LED_ON;
949
950 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
951 }
952 break;
953
954
955 default:
956 break;
957 }
958
959 RT_TRACE(COMP_LED, "SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState);
960
961
962}
963
964void
965SwLedBlink5(
966 PLED_819xUsb pLed
967 )
968{
969 struct net_device *dev = (struct net_device *)(pLed->dev);
970 struct r8192_priv *priv = ieee80211_priv(dev);
971 bool bStopBlinking = FALSE;
972
973 if( pLed->BlinkingLedState == LED_ON )
974 {
975 SwLedOn(dev, pLed);
976 RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
977 }
978 else
979 {
980 SwLedOff(dev, pLed);
981 RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
982 }
983
984 switch(pLed->CurrLedState)
985 {
986 case LED_SCAN_BLINK:
987 pLed->BlinkTimes--;
988 if( pLed->BlinkTimes == 0 )
989 {
990 bStopBlinking = TRUE;
991 }
992
993 if(bStopBlinking)
994 {
995 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
996 {
997 pLed->CurrLedState = LED_OFF;
998 pLed->BlinkingLedState = LED_OFF;
999 if(pLed->bLedOn)
1000 SwLedOff(dev, pLed);
1001 }
1002 else
1003 { pLed->CurrLedState = LED_ON;
1004 pLed->BlinkingLedState = LED_ON;
1005 if(!pLed->bLedOn)
1006 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
1007 }
1008
1009 pLed->bLedScanBlinkInProgress = FALSE;
1010 }
1011 else
1012 {
1013 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
1014 {
1015 SwLedOff(dev, pLed);
1016 }
1017 else
1018 {
1019 if( pLed->bLedOn )
1020 pLed->BlinkingLedState = LED_OFF;
1021 else
1022 pLed->BlinkingLedState = LED_ON;
1023 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
1024 }
1025 }
1026 break;
1027
1028
1029 case LED_TXRX_BLINK:
1030 pLed->BlinkTimes--;
1031 if( pLed->BlinkTimes == 0 )
1032 {
1033 bStopBlinking = TRUE;
1034 }
1035
1036 if(bStopBlinking)
1037 {
1038 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
1039 {
1040 pLed->CurrLedState = LED_OFF;
1041 pLed->BlinkingLedState = LED_OFF;
1042 if(pLed->bLedOn)
1043 SwLedOff(dev, pLed);
1044 }
1045 else
1046 {
1047 pLed->CurrLedState = LED_ON;
1048 pLed->BlinkingLedState = LED_ON;
1049 if(!pLed->bLedOn)
1050 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
1051 }
1052
1053 pLed->bLedBlinkInProgress = FALSE;
1054 }
1055 else
1056 {
1057 if( priv->ieee80211->eRFPowerState != eRfOn && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
1058 {
1059 SwLedOff(dev, pLed);
1060 }
1061 else
1062 {
1063 if( pLed->bLedOn )
1064 pLed->BlinkingLedState = LED_OFF;
1065 else
1066 pLed->BlinkingLedState = LED_ON;
1067 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
1068 }
1069 }
1070 break;
1071
1072 default:
1073 break;
1074 }
1075
1076 RT_TRACE(COMP_LED, "SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState);
1077
1078
1079}
1080
1081
1082void
1083BlinkTimerCallback(
1084 unsigned long data
1085 )
1086{
1087 struct net_device *dev = (struct net_device *)data;
1088 struct r8192_priv *priv = ieee80211_priv(dev);
1089
1090#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
1091 schedule_work(&(priv->BlinkWorkItem));
1092#endif
1093}
1094
1095
1096#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
1097void BlinkWorkItemCallback(struct work_struct *work)
1098{
1099 struct r8192_priv *priv = container_of(work, struct r8192_priv, BlinkWorkItem);
1100#else
1101void BlinkWorkItemCallback(void * Context)
1102{
1103 struct net_device *dev = (struct net_device *)Context;
1104 struct r8192_priv *priv = ieee80211_priv(dev);
1105#endif
1106
1107 PLED_819xUsb pLed = priv->pLed;
1108
1109 switch(priv->LedStrategy)
1110 {
1111 case SW_LED_MODE0:
1112 SwLedBlink(pLed);
1113 break;
1114
1115 case SW_LED_MODE1:
1116 SwLedBlink1(pLed);
1117 break;
1118
1119 case SW_LED_MODE2:
1120 SwLedBlink2(pLed);
1121 break;
1122
1123 case SW_LED_MODE3:
1124 SwLedBlink3(pLed);
1125 break;
1126
1127 case SW_LED_MODE4:
1128 SwLedBlink4(pLed);
1129 break;
1130
1131 case SW_LED_MODE5:
1132 SwLedBlink5(pLed);
1133 break;
1134
1135 default:
1136 SwLedBlink(pLed);
1137 break;
1138 }
1139}
1140
1141
1142
1143
1144void
1145SwLedControlMode0(
1146 struct net_device *dev,
1147 LED_CTL_MODE LedAction
1148)
1149{
1150 struct r8192_priv *priv = ieee80211_priv(dev);
1151 PLED_819xUsb pLed = &(priv->SwLed1);
1152
1153 switch(LedAction)
1154 {
1155 case LED_CTL_TX:
1156 case LED_CTL_RX:
1157 if( pLed->bLedBlinkInProgress == FALSE )
1158 {
1159 pLed->bLedBlinkInProgress = TRUE;
1160
1161 pLed->CurrLedState = LED_BLINK_NORMAL;
1162 pLed->BlinkTimes = 2;
1163
1164 if( pLed->bLedOn )
1165 pLed->BlinkingLedState = LED_OFF;
1166 else
1167 pLed->BlinkingLedState = LED_ON;
1168 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
1169 }
1170 break;
1171
1172 case LED_CTL_START_TO_LINK:
1173 if( pLed->bLedBlinkInProgress == FALSE )
1174 {
1175 pLed->bLedBlinkInProgress = TRUE;
1176
1177 pLed->CurrLedState = LED_BLINK_StartToBlink;
1178 pLed->BlinkTimes = 24;
1179
1180 if( pLed->bLedOn )
1181 pLed->BlinkingLedState = LED_OFF;
1182 else
1183 pLed->BlinkingLedState = LED_ON;
1184 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
1185 }
1186 else
1187 {
1188 pLed->CurrLedState = LED_BLINK_StartToBlink;
1189 }
1190 break;
1191
1192 case LED_CTL_LINK:
1193 pLed->CurrLedState = LED_ON;
1194 if( pLed->bLedBlinkInProgress == FALSE )
1195 {
1196 SwLedOn(dev, pLed);
1197 }
1198 break;
1199
1200 case LED_CTL_NO_LINK:
1201 pLed->CurrLedState = LED_OFF;
1202 if( pLed->bLedBlinkInProgress == FALSE )
1203 {
1204 SwLedOff(dev, pLed);
1205 }
1206 break;
1207
1208 case LED_CTL_POWER_OFF:
1209 pLed->CurrLedState = LED_OFF;
1210 if(pLed->bLedBlinkInProgress)
1211 {
1212 del_timer_sync(&(pLed->BlinkTimer));
1213 pLed->bLedBlinkInProgress = FALSE;
1214 }
1215 SwLedOff(dev, pLed);
1216 break;
1217
1218 case LED_CTL_START_WPS:
1219 if( pLed->bLedBlinkInProgress == FALSE || pLed->CurrLedState == LED_ON)
1220 {
1221 pLed->bLedBlinkInProgress = TRUE;
1222
1223 pLed->CurrLedState = LED_BLINK_WPS;
1224 pLed->BlinkTimes = 20;
1225
1226 if( pLed->bLedOn )
1227 {
1228 pLed->BlinkingLedState = LED_OFF;
1229 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LONG_INTERVAL));
1230 }
1231 else
1232 {
1233 pLed->BlinkingLedState = LED_ON;
1234 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LONG_INTERVAL));
1235 }
1236 }
1237 break;
1238
1239 case LED_CTL_STOP_WPS:
1240 if(pLed->bLedBlinkInProgress)
1241 {
1242 pLed->CurrLedState = LED_OFF;
1243 del_timer_sync(&(pLed->BlinkTimer));
1244 pLed->bLedBlinkInProgress = FALSE;
1245 }
1246 break;
1247
1248
1249 default:
1250 break;
1251 }
1252
1253 RT_TRACE(COMP_LED, "Led %d\n", pLed->CurrLedState);
1254
1255}
1256
1257void
1258SwLedControlMode1(
1259 struct net_device *dev,
1260 LED_CTL_MODE LedAction
1261)
1262{
1263 struct r8192_priv *priv = ieee80211_priv(dev);
1264 PLED_819xUsb pLed = &(priv->SwLed0);
1265
1266 if(priv->CustomerID == RT_CID_819x_CAMEO)
1267 pLed = &(priv->SwLed1);
1268
1269 switch(LedAction)
1270 {
1271 case LED_CTL_START_TO_LINK:
1272 case LED_CTL_NO_LINK:
1273 if( pLed->bLedNoLinkBlinkInProgress == FALSE )
1274 {
1275 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
1276 {
1277 return;
1278 }
1279 if( pLed->bLedLinkBlinkInProgress == TRUE )
1280 {
1281 del_timer_sync(&(pLed->BlinkTimer));
1282 pLed->bLedLinkBlinkInProgress = FALSE;
1283 }
1284 if(pLed->bLedBlinkInProgress ==TRUE)
1285 {
1286 del_timer_sync(&(pLed->BlinkTimer));
1287 pLed->bLedBlinkInProgress = FALSE;
1288 }
1289
1290 pLed->bLedNoLinkBlinkInProgress = TRUE;
1291 pLed->CurrLedState = LED_BLINK_SLOWLY;
1292 if( pLed->bLedOn )
1293 pLed->BlinkingLedState = LED_OFF;
1294 else
1295 pLed->BlinkingLedState = LED_ON;
1296 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
1297 }
1298 break;
1299
1300 case LED_CTL_LINK:
1301 if( pLed->bLedLinkBlinkInProgress == FALSE )
1302 {
1303 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
1304 {
1305 return;
1306 }
1307 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
1308 {
1309 del_timer_sync(&(pLed->BlinkTimer));
1310 pLed->bLedNoLinkBlinkInProgress = FALSE;
1311 }
1312 if(pLed->bLedBlinkInProgress ==TRUE)
1313 {
1314 del_timer_sync(&(pLed->BlinkTimer));
1315 pLed->bLedBlinkInProgress = FALSE;
1316 }
1317 pLed->bLedLinkBlinkInProgress = TRUE;
1318 pLed->CurrLedState = LED_BLINK_NORMAL;
1319 if( pLed->bLedOn )
1320 pLed->BlinkingLedState = LED_OFF;
1321 else
1322 pLed->BlinkingLedState = LED_ON;
1323 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_LINK_INTERVAL_ALPHA));
1324 }
1325 break;
1326
1327 case LED_CTL_SITE_SURVEY:
1328 if((priv->ieee80211->LinkDetectInfo.bBusyTraffic) && (priv->ieee80211->state == IEEE80211_LINKED))
1329 ;
1330 else if(pLed->bLedScanBlinkInProgress ==FALSE)
1331 {
1332 if(IS_LED_WPS_BLINKING(pLed))
1333 return;
1334
1335 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
1336 {
1337 del_timer_sync(&(pLed->BlinkTimer));
1338 pLed->bLedNoLinkBlinkInProgress = FALSE;
1339 }
1340 if( pLed->bLedLinkBlinkInProgress == TRUE )
1341 {
1342 del_timer_sync(&(pLed->BlinkTimer));
1343 pLed->bLedLinkBlinkInProgress = FALSE;
1344 }
1345 if(pLed->bLedBlinkInProgress ==TRUE)
1346 {
1347 del_timer_sync(&(pLed->BlinkTimer));
1348 pLed->bLedBlinkInProgress = FALSE;
1349 }
1350 pLed->bLedScanBlinkInProgress = TRUE;
1351 pLed->CurrLedState = LED_SCAN_BLINK;
1352 pLed->BlinkTimes = 24;
1353 if( pLed->bLedOn )
1354 pLed->BlinkingLedState = LED_OFF;
1355 else
1356 pLed->BlinkingLedState = LED_ON;
1357 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
1358
1359 }
1360 break;
1361
1362 case LED_CTL_TX:
1363 case LED_CTL_RX:
1364 if(pLed->bLedBlinkInProgress ==FALSE)
1365 {
1366 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
1367 {
1368 }
1369 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
1370 {
1371 del_timer_sync(&(pLed->BlinkTimer));
1372 pLed->bLedNoLinkBlinkInProgress = FALSE;
1373 }
1374 if( pLed->bLedLinkBlinkInProgress == TRUE )
1375 {
1376 del_timer_sync(&(pLed->BlinkTimer));
1377 pLed->bLedLinkBlinkInProgress = FALSE;
1378 }
1379 pLed->bLedBlinkInProgress = TRUE;
1380 pLed->CurrLedState = LED_TXRX_BLINK;
1381 pLed->BlinkTimes = 2;
1382 if( pLed->bLedOn )
1383 pLed->BlinkingLedState = LED_OFF;
1384 else
1385 pLed->BlinkingLedState = LED_ON;
1386 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
1387 }
1388 break;
1389
1390 case LED_CTL_START_WPS:
1391 case LED_CTL_START_WPS_BOTTON:
1392 if(pLed->bLedWPSBlinkInProgress ==FALSE)
1393 {
1394 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
1395 {
1396 del_timer_sync(&(pLed->BlinkTimer));
1397 pLed->bLedNoLinkBlinkInProgress = FALSE;
1398 }
1399 if( pLed->bLedLinkBlinkInProgress == TRUE )
1400 {
1401 del_timer_sync(&(pLed->BlinkTimer));
1402 pLed->bLedLinkBlinkInProgress = FALSE;
1403 }
1404 if(pLed->bLedBlinkInProgress ==TRUE)
1405 {
1406 del_timer_sync(&(pLed->BlinkTimer));
1407 pLed->bLedBlinkInProgress = FALSE;
1408 }
1409 if(pLed->bLedScanBlinkInProgress ==TRUE)
1410 {
1411 del_timer_sync(&(pLed->BlinkTimer));
1412 pLed->bLedScanBlinkInProgress = FALSE;
1413 }
1414 pLed->bLedWPSBlinkInProgress = TRUE;
1415 pLed->CurrLedState = LED_BLINK_WPS;
1416 if( pLed->bLedOn )
1417 pLed->BlinkingLedState = LED_OFF;
1418 else
1419 pLed->BlinkingLedState = LED_ON;
1420 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
1421
1422 }
1423 break;
1424
1425
1426 case LED_CTL_STOP_WPS:
1427 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
1428 {
1429 del_timer_sync(&(pLed->BlinkTimer));
1430 pLed->bLedNoLinkBlinkInProgress = FALSE;
1431 }
1432 if( pLed->bLedLinkBlinkInProgress == TRUE )
1433 {
1434 del_timer_sync(&(pLed->BlinkTimer));
1435 pLed->bLedLinkBlinkInProgress = FALSE;
1436 }
1437 if(pLed->bLedBlinkInProgress ==TRUE)
1438 {
1439 del_timer_sync(&(pLed->BlinkTimer));
1440 pLed->bLedBlinkInProgress = FALSE;
1441 }
1442 if(pLed->bLedScanBlinkInProgress ==TRUE)
1443 {
1444 del_timer_sync(&(pLed->BlinkTimer));
1445 pLed->bLedScanBlinkInProgress = FALSE;
1446 }
1447 if(pLed->bLedWPSBlinkInProgress)
1448 {
1449 del_timer_sync(&(pLed->BlinkTimer));
1450 }
1451 else
1452 {
1453 pLed->bLedWPSBlinkInProgress = TRUE;
1454 }
1455
1456 pLed->CurrLedState = LED_BLINK_WPS_STOP;
1457 if(pLed->bLedOn)
1458 {
1459 pLed->BlinkingLedState = LED_OFF;
1460 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
1461 }
1462 else
1463 {
1464 pLed->BlinkingLedState = LED_ON;
1465 mod_timer(&(pLed->BlinkTimer), 0);
1466 }
1467 break;
1468
1469 case LED_CTL_STOP_WPS_FAIL:
1470 if(pLed->bLedWPSBlinkInProgress)
1471 {
1472 del_timer_sync(&(pLed->BlinkTimer));
1473 pLed->bLedWPSBlinkInProgress = FALSE;
1474 }
1475
1476 pLed->bLedNoLinkBlinkInProgress = TRUE;
1477 pLed->CurrLedState = LED_BLINK_SLOWLY;
1478 if( pLed->bLedOn )
1479 pLed->BlinkingLedState = LED_OFF;
1480 else
1481 pLed->BlinkingLedState = LED_ON;
1482 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
1483 break;
1484
1485 case LED_CTL_POWER_OFF:
1486 pLed->CurrLedState = LED_OFF;
1487 if( pLed->bLedNoLinkBlinkInProgress)
1488 {
1489 del_timer_sync(&(pLed->BlinkTimer));
1490 pLed->bLedNoLinkBlinkInProgress = FALSE;
1491 }
1492 if( pLed->bLedLinkBlinkInProgress)
1493 {
1494 del_timer_sync(&(pLed->BlinkTimer));
1495 pLed->bLedLinkBlinkInProgress = FALSE;
1496 }
1497 if( pLed->bLedBlinkInProgress)
1498 {
1499 del_timer_sync(&(pLed->BlinkTimer));
1500 pLed->bLedBlinkInProgress = FALSE;
1501 }
1502 if( pLed->bLedWPSBlinkInProgress )
1503 {
1504 del_timer_sync(&(pLed->BlinkTimer));
1505 pLed->bLedWPSBlinkInProgress = FALSE;
1506 }
1507 if( pLed->bLedScanBlinkInProgress)
1508 {
1509 del_timer_sync(&(pLed->BlinkTimer));
1510 pLed->bLedScanBlinkInProgress = FALSE;
1511 }
1512
1513 SwLedOff(dev, pLed);
1514 break;
1515
1516 default:
1517 break;
1518
1519 }
1520
1521 RT_TRACE(COMP_LED, "Led %d\n", pLed->CurrLedState);
1522}
1523
1524void
1525SwLedControlMode2(
1526 struct net_device *dev,
1527 LED_CTL_MODE LedAction
1528)
1529{
1530 struct r8192_priv *priv = ieee80211_priv(dev);
1531 PLED_819xUsb pLed = &(priv->SwLed0);
1532
1533 switch(LedAction)
1534 {
1535 case LED_CTL_SITE_SURVEY:
1536 if(priv->ieee80211->LinkDetectInfo.bBusyTraffic)
1537 ;
1538 else if(pLed->bLedScanBlinkInProgress ==FALSE)
1539 {
1540 if(IS_LED_WPS_BLINKING(pLed))
1541 return;
1542
1543 if(pLed->bLedBlinkInProgress ==TRUE)
1544 {
1545 del_timer_sync(&(pLed->BlinkTimer));
1546 pLed->bLedBlinkInProgress = FALSE;
1547 }
1548 pLed->bLedScanBlinkInProgress = TRUE;
1549 pLed->CurrLedState = LED_SCAN_BLINK;
1550 pLed->BlinkTimes = 24;
1551 if( pLed->bLedOn )
1552 pLed->BlinkingLedState = LED_OFF;
1553 else
1554 pLed->BlinkingLedState = LED_ON;
1555 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
1556
1557 }
1558 break;
1559
1560 case LED_CTL_TX:
1561 case LED_CTL_RX:
1562 if((pLed->bLedBlinkInProgress ==FALSE) && (priv->ieee80211->state == IEEE80211_LINKED))
1563 {
1564 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
1565 {
1566 return;
1567 }
1568
1569 pLed->bLedBlinkInProgress = TRUE;
1570 pLed->CurrLedState = LED_TXRX_BLINK;
1571 pLed->BlinkTimes = 2;
1572 if( pLed->bLedOn )
1573 pLed->BlinkingLedState = LED_OFF;
1574 else
1575 pLed->BlinkingLedState = LED_ON;
1576 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
1577 }
1578 break;
1579
1580 case LED_CTL_LINK:
1581 pLed->CurrLedState = LED_ON;
1582 pLed->BlinkingLedState = LED_ON;
1583 if( pLed->bLedBlinkInProgress)
1584 {
1585 del_timer_sync(&(pLed->BlinkTimer));
1586 pLed->bLedBlinkInProgress = FALSE;
1587 }
1588 if( pLed->bLedScanBlinkInProgress)
1589 {
1590 del_timer_sync(&(pLed->BlinkTimer));
1591 pLed->bLedScanBlinkInProgress = FALSE;
1592 }
1593
1594 mod_timer(&(pLed->BlinkTimer), 0);
1595 break;
1596
1597 case LED_CTL_START_WPS:
1598 case LED_CTL_START_WPS_BOTTON:
1599 if(pLed->bLedWPSBlinkInProgress ==FALSE)
1600 {
1601 if(pLed->bLedBlinkInProgress ==TRUE)
1602 {
1603 del_timer_sync(&(pLed->BlinkTimer));
1604 pLed->bLedBlinkInProgress = FALSE;
1605 }
1606 if(pLed->bLedScanBlinkInProgress ==TRUE)
1607 {
1608 del_timer_sync(&(pLed->BlinkTimer));
1609 pLed->bLedScanBlinkInProgress = FALSE;
1610 }
1611 pLed->bLedWPSBlinkInProgress = TRUE;
1612 pLed->CurrLedState = LED_ON;
1613 pLed->BlinkingLedState = LED_ON;
1614 mod_timer(&(pLed->BlinkTimer), 0);
1615 }
1616 break;
1617
1618 case LED_CTL_STOP_WPS:
1619 pLed->bLedWPSBlinkInProgress = FALSE;
1620 if( priv->ieee80211->eRFPowerState != eRfOn )
1621 {
1622 SwLedOff(dev, pLed);
1623 }
1624 else
1625 {
1626 pLed->CurrLedState = LED_ON;
1627 pLed->BlinkingLedState = LED_ON;
1628 mod_timer(&(pLed->BlinkTimer), 0);
1629 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
1630 }
1631 break;
1632
1633 case LED_CTL_STOP_WPS_FAIL:
1634 pLed->bLedWPSBlinkInProgress = FALSE;
1635 if( priv->ieee80211->eRFPowerState != eRfOn )
1636 {
1637 SwLedOff(dev, pLed);
1638 }
1639 else
1640 {
1641 pLed->CurrLedState = LED_OFF;
1642 pLed->BlinkingLedState = LED_OFF;
1643 mod_timer(&(pLed->BlinkTimer), 0);
1644 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
1645 }
1646 break;
1647
1648 case LED_CTL_START_TO_LINK:
1649 case LED_CTL_NO_LINK:
1650 if(!IS_LED_BLINKING(pLed))
1651 {
1652 pLed->CurrLedState = LED_OFF;
1653 pLed->BlinkingLedState = LED_OFF;
1654 mod_timer(&(pLed->BlinkTimer), 0);
1655 }
1656 break;
1657
1658 case LED_CTL_POWER_OFF:
1659 pLed->CurrLedState = LED_OFF;
1660 pLed->BlinkingLedState = LED_OFF;
1661 if( pLed->bLedBlinkInProgress)
1662 {
1663 del_timer_sync(&(pLed->BlinkTimer));
1664 pLed->bLedBlinkInProgress = FALSE;
1665 }
1666 if( pLed->bLedScanBlinkInProgress)
1667 {
1668 del_timer_sync(&(pLed->BlinkTimer));
1669 pLed->bLedScanBlinkInProgress = FALSE;
1670 }
1671 if( pLed->bLedWPSBlinkInProgress )
1672 {
1673 del_timer_sync(&(pLed->BlinkTimer));
1674 pLed->bLedWPSBlinkInProgress = FALSE;
1675 }
1676
1677 mod_timer(&(pLed->BlinkTimer), 0);
1678 break;
1679
1680 default:
1681 break;
1682
1683 }
1684
1685 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
1686}
1687
1688 void
1689 SwLedControlMode3(
1690 struct net_device *dev,
1691 LED_CTL_MODE LedAction
1692)
1693{
1694 struct r8192_priv *priv = ieee80211_priv(dev);
1695 PLED_819xUsb pLed = &(priv->SwLed0);
1696
1697 switch(LedAction)
1698 {
1699 case LED_CTL_SITE_SURVEY:
1700 if(priv->ieee80211->LinkDetectInfo.bBusyTraffic)
1701 ;
1702 else if(pLed->bLedScanBlinkInProgress ==FALSE)
1703 {
1704 if(IS_LED_WPS_BLINKING(pLed))
1705 return;
1706
1707 if(pLed->bLedBlinkInProgress ==TRUE)
1708 {
1709 del_timer_sync(&(pLed->BlinkTimer));
1710 pLed->bLedBlinkInProgress = FALSE;
1711 }
1712 pLed->bLedScanBlinkInProgress = TRUE;
1713 pLed->CurrLedState = LED_SCAN_BLINK;
1714 pLed->BlinkTimes = 24;
1715 if( pLed->bLedOn )
1716 pLed->BlinkingLedState = LED_OFF;
1717 else
1718 pLed->BlinkingLedState = LED_ON;
1719 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
1720
1721 }
1722 break;
1723
1724 case LED_CTL_TX:
1725 case LED_CTL_RX:
1726 if((pLed->bLedBlinkInProgress ==FALSE) && (priv->ieee80211->state == IEEE80211_LINKED))
1727 {
1728 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
1729 {
1730 return;
1731 }
1732
1733 pLed->bLedBlinkInProgress = TRUE;
1734 pLed->CurrLedState = LED_TXRX_BLINK;
1735 pLed->BlinkTimes = 2;
1736 if( pLed->bLedOn )
1737 pLed->BlinkingLedState = LED_OFF;
1738 else
1739 pLed->BlinkingLedState = LED_ON;
1740 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
1741 }
1742 break;
1743
1744 case LED_CTL_LINK:
1745 if(IS_LED_WPS_BLINKING(pLed))
1746 return;
1747
1748 pLed->CurrLedState = LED_ON;
1749 pLed->BlinkingLedState = LED_ON;
1750 if( pLed->bLedBlinkInProgress)
1751 {
1752 del_timer_sync(&(pLed->BlinkTimer));
1753 pLed->bLedBlinkInProgress = FALSE;
1754 }
1755 if( pLed->bLedScanBlinkInProgress)
1756 {
1757 del_timer_sync(&(pLed->BlinkTimer));
1758 pLed->bLedScanBlinkInProgress = FALSE;
1759 }
1760
1761 mod_timer(&(pLed->BlinkTimer), 0);
1762 break;
1763
1764 case LED_CTL_START_WPS:
1765 case LED_CTL_START_WPS_BOTTON:
1766 if(pLed->bLedWPSBlinkInProgress ==FALSE)
1767 {
1768 if(pLed->bLedBlinkInProgress ==TRUE)
1769 {
1770 del_timer_sync(&(pLed->BlinkTimer));
1771 pLed->bLedBlinkInProgress = FALSE;
1772 }
1773 if(pLed->bLedScanBlinkInProgress ==TRUE)
1774 {
1775 del_timer_sync(&(pLed->BlinkTimer));
1776 pLed->bLedScanBlinkInProgress = FALSE;
1777 }
1778 pLed->bLedWPSBlinkInProgress = TRUE;
1779 pLed->CurrLedState = LED_BLINK_WPS;
1780 if( pLed->bLedOn )
1781 pLed->BlinkingLedState = LED_OFF;
1782 else
1783 pLed->BlinkingLedState = LED_ON;
1784 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
1785
1786 }
1787 break;
1788
1789 case LED_CTL_STOP_WPS:
1790 if(pLed->bLedWPSBlinkInProgress)
1791 {
1792 del_timer_sync(&(pLed->BlinkTimer));
1793 pLed->bLedWPSBlinkInProgress = FALSE;
1794 }
1795 else
1796 {
1797 pLed->bLedWPSBlinkInProgress = TRUE;
1798 }
1799
1800 pLed->CurrLedState = LED_BLINK_WPS_STOP;
1801 if(pLed->bLedOn)
1802 {
1803 pLed->BlinkingLedState = LED_OFF;
1804 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
1805 }
1806 else
1807 {
1808 pLed->BlinkingLedState = LED_ON;
1809 mod_timer(&(pLed->BlinkTimer), 0);
1810 }
1811
1812 break;
1813
1814
1815 case LED_CTL_STOP_WPS_FAIL:
1816 if(pLed->bLedWPSBlinkInProgress)
1817 {
1818 del_timer_sync(&(pLed->BlinkTimer));
1819 pLed->bLedWPSBlinkInProgress = FALSE;
1820 }
1821
1822 pLed->CurrLedState = LED_OFF;
1823 pLed->BlinkingLedState = LED_OFF;
1824 mod_timer(&(pLed->BlinkTimer), 0);
1825 break;
1826
1827 case LED_CTL_START_TO_LINK:
1828 case LED_CTL_NO_LINK:
1829 if(!IS_LED_BLINKING(pLed))
1830 {
1831 pLed->CurrLedState = LED_OFF;
1832 pLed->BlinkingLedState = LED_OFF;
1833 mod_timer(&(pLed->BlinkTimer), 0);
1834 }
1835 break;
1836
1837 case LED_CTL_POWER_OFF:
1838 pLed->CurrLedState = LED_OFF;
1839 pLed->BlinkingLedState = LED_OFF;
1840 if( pLed->bLedBlinkInProgress)
1841 {
1842 del_timer_sync(&(pLed->BlinkTimer));
1843 pLed->bLedBlinkInProgress = FALSE;
1844 }
1845 if( pLed->bLedScanBlinkInProgress)
1846 {
1847 del_timer_sync(&(pLed->BlinkTimer));
1848 pLed->bLedScanBlinkInProgress = FALSE;
1849 }
1850 if( pLed->bLedWPSBlinkInProgress )
1851 {
1852 del_timer_sync(&(pLed->BlinkTimer));
1853 pLed->bLedWPSBlinkInProgress = FALSE;
1854 }
1855
1856 mod_timer(&(pLed->BlinkTimer), 0);
1857 break;
1858
1859 default:
1860 break;
1861
1862 }
1863
1864 RT_TRACE(COMP_LED, "CurrLedState %d\n", pLed->CurrLedState);
1865}
1866
1867
1868void
1869SwLedControlMode4(
1870 struct net_device *dev,
1871 LED_CTL_MODE LedAction
1872)
1873{
1874 struct r8192_priv *priv = ieee80211_priv(dev);
1875 PLED_819xUsb pLed = &(priv->SwLed0);
1876 PLED_819xUsb pLed1 = &(priv->SwLed1);
1877
1878 switch(LedAction)
1879 {
1880 case LED_CTL_START_TO_LINK:
1881 if(pLed1->bLedWPSBlinkInProgress)
1882 {
1883 pLed1->bLedWPSBlinkInProgress = FALSE;
1884 del_timer_sync(&(pLed1->BlinkTimer));
1885
1886 pLed1->BlinkingLedState = LED_OFF;
1887 pLed1->CurrLedState = LED_OFF;
1888
1889 if(pLed1->bLedOn)
1890 mod_timer(&(pLed1->BlinkTimer), 0);
1891 }
1892
1893 if( pLed->bLedStartToLinkBlinkInProgress == FALSE )
1894 {
1895 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
1896 {
1897 return;
1898 }
1899 if(pLed->bLedBlinkInProgress ==TRUE)
1900 {
1901 del_timer_sync(&(pLed->BlinkTimer));
1902 pLed->bLedBlinkInProgress = FALSE;
1903 }
1904 if(pLed->bLedNoLinkBlinkInProgress ==TRUE)
1905 {
1906 del_timer_sync(&(pLed->BlinkTimer));
1907 pLed->bLedNoLinkBlinkInProgress = FALSE;
1908 }
1909
1910 pLed->bLedStartToLinkBlinkInProgress = TRUE;
1911 pLed->CurrLedState = LED_BLINK_StartToBlink;
1912 if( pLed->bLedOn )
1913 {
1914 pLed->BlinkingLedState = LED_OFF;
1915 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
1916 }
1917 else
1918 {
1919 pLed->BlinkingLedState = LED_ON;
1920 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
1921 }
1922 }
1923 break;
1924
1925 case LED_CTL_LINK:
1926 case LED_CTL_NO_LINK:
1927 if(LedAction == LED_CTL_LINK)
1928 {
1929 if(pLed1->bLedWPSBlinkInProgress)
1930 {
1931 pLed1->bLedWPSBlinkInProgress = FALSE;
1932 del_timer_sync(&(pLed1->BlinkTimer));
1933
1934 pLed1->BlinkingLedState = LED_OFF;
1935 pLed1->CurrLedState = LED_OFF;
1936
1937 if(pLed1->bLedOn)
1938 mod_timer(&(pLed1->BlinkTimer), 0);
1939 }
1940 }
1941
1942 if( pLed->bLedNoLinkBlinkInProgress == FALSE )
1943 {
1944 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
1945 {
1946 return;
1947 }
1948 if(pLed->bLedBlinkInProgress ==TRUE)
1949 {
1950 del_timer_sync(&(pLed->BlinkTimer));
1951 pLed->bLedBlinkInProgress = FALSE;
1952 }
1953
1954 pLed->bLedNoLinkBlinkInProgress = TRUE;
1955 pLed->CurrLedState = LED_BLINK_SLOWLY;
1956 if( pLed->bLedOn )
1957 pLed->BlinkingLedState = LED_OFF;
1958 else
1959 pLed->BlinkingLedState = LED_ON;
1960 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
1961 }
1962
1963 break;
1964
1965 case LED_CTL_SITE_SURVEY:
1966 if((priv->ieee80211->LinkDetectInfo.bBusyTraffic) && (priv->ieee80211->state == IEEE80211_LINKED))
1967 ;
1968 else if(pLed->bLedScanBlinkInProgress ==FALSE)
1969 {
1970 if(IS_LED_WPS_BLINKING(pLed))
1971 return;
1972
1973 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
1974 {
1975 del_timer_sync(&(pLed->BlinkTimer));
1976 pLed->bLedNoLinkBlinkInProgress = FALSE;
1977 }
1978 if(pLed->bLedBlinkInProgress ==TRUE)
1979 {
1980 del_timer_sync(&(pLed->BlinkTimer));
1981 pLed->bLedBlinkInProgress = FALSE;
1982 }
1983 pLed->bLedScanBlinkInProgress = TRUE;
1984 pLed->CurrLedState = LED_SCAN_BLINK;
1985 pLed->BlinkTimes = 24;
1986 if( pLed->bLedOn )
1987 pLed->BlinkingLedState = LED_OFF;
1988 else
1989 pLed->BlinkingLedState = LED_ON;
1990 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
1991
1992 }
1993 break;
1994
1995 case LED_CTL_TX:
1996 case LED_CTL_RX:
1997 if(pLed->bLedBlinkInProgress ==FALSE)
1998 {
1999 if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed))
2000 {
2001 return;
2002 }
2003 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
2004 {
2005 del_timer_sync(&(pLed->BlinkTimer));
2006 pLed->bLedNoLinkBlinkInProgress = FALSE;
2007 }
2008 pLed->bLedBlinkInProgress = TRUE;
2009 pLed->CurrLedState = LED_TXRX_BLINK;
2010 pLed->BlinkTimes = 2;
2011 if( pLed->bLedOn )
2012 pLed->BlinkingLedState = LED_OFF;
2013 else
2014 pLed->BlinkingLedState = LED_ON;
2015 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
2016 }
2017 break;
2018
2019 case LED_CTL_START_WPS:
2020 case LED_CTL_START_WPS_BOTTON:
2021 if(pLed1->bLedWPSBlinkInProgress)
2022 {
2023 pLed1->bLedWPSBlinkInProgress = FALSE;
2024 del_timer_sync(&(pLed1->BlinkTimer));
2025
2026 pLed1->BlinkingLedState = LED_OFF;
2027 pLed1->CurrLedState = LED_OFF;
2028
2029 if(pLed1->bLedOn)
2030 mod_timer(&(pLed1->BlinkTimer), 0);
2031 }
2032
2033 if(pLed->bLedWPSBlinkInProgress ==FALSE)
2034 {
2035 if(pLed->bLedNoLinkBlinkInProgress == TRUE)
2036 {
2037 del_timer_sync(&(pLed->BlinkTimer));
2038 pLed->bLedNoLinkBlinkInProgress = FALSE;
2039 }
2040 if(pLed->bLedBlinkInProgress ==TRUE)
2041 {
2042 del_timer_sync(&(pLed->BlinkTimer));
2043 pLed->bLedBlinkInProgress = FALSE;
2044 }
2045 if(pLed->bLedScanBlinkInProgress ==TRUE)
2046 {
2047 del_timer_sync(&(pLed->BlinkTimer));
2048 pLed->bLedScanBlinkInProgress = FALSE;
2049 }
2050 pLed->bLedWPSBlinkInProgress = TRUE;
2051 pLed->CurrLedState = LED_BLINK_WPS;
2052 if( pLed->bLedOn )
2053 {
2054 pLed->BlinkingLedState = LED_OFF;
2055 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
2056 }
2057 else
2058 {
2059 pLed->BlinkingLedState = LED_ON;
2060 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
2061 }
2062
2063 }
2064 break;
2065
2066 case LED_CTL_STOP_WPS:
2067 if(pLed->bLedWPSBlinkInProgress)
2068 {
2069 del_timer_sync(&(pLed->BlinkTimer));
2070 pLed->bLedWPSBlinkInProgress = FALSE;
2071 }
2072
2073 pLed->bLedNoLinkBlinkInProgress = TRUE;
2074 pLed->CurrLedState = LED_BLINK_SLOWLY;
2075 if( pLed->bLedOn )
2076 pLed->BlinkingLedState = LED_OFF;
2077 else
2078 pLed->BlinkingLedState = LED_ON;
2079 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
2080
2081 break;
2082
2083 case LED_CTL_STOP_WPS_FAIL:
2084 if(pLed->bLedWPSBlinkInProgress)
2085 {
2086 del_timer_sync(&(pLed->BlinkTimer));
2087 pLed->bLedWPSBlinkInProgress = FALSE;
2088 }
2089
2090 pLed->bLedNoLinkBlinkInProgress = TRUE;
2091 pLed->CurrLedState = LED_BLINK_SLOWLY;
2092 if( pLed->bLedOn )
2093 pLed->BlinkingLedState = LED_OFF;
2094 else
2095 pLed->BlinkingLedState = LED_ON;
2096 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
2097
2098 if(pLed1->bLedWPSBlinkInProgress)
2099 del_timer_sync(&(pLed1->BlinkTimer));
2100 else
2101 pLed1->bLedWPSBlinkInProgress = TRUE;
2102
2103 pLed1->CurrLedState = LED_BLINK_WPS_STOP;
2104 if( pLed1->bLedOn )
2105 pLed1->BlinkingLedState = LED_OFF;
2106 else
2107 pLed1->BlinkingLedState = LED_ON;
2108 mod_timer(&(pLed1->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
2109
2110 break;
2111
2112 case LED_CTL_STOP_WPS_FAIL_OVERLAP:
2113 if(pLed->bLedWPSBlinkInProgress)
2114 {
2115 del_timer_sync(&(pLed->BlinkTimer));
2116 pLed->bLedWPSBlinkInProgress = FALSE;
2117 }
2118
2119 pLed->bLedNoLinkBlinkInProgress = TRUE;
2120 pLed->CurrLedState = LED_BLINK_SLOWLY;
2121 if( pLed->bLedOn )
2122 pLed->BlinkingLedState = LED_OFF;
2123 else
2124 pLed->BlinkingLedState = LED_ON;
2125 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
2126
2127 if(pLed1->bLedWPSBlinkInProgress)
2128 del_timer_sync(&(pLed1->BlinkTimer));
2129 else
2130 pLed1->bLedWPSBlinkInProgress = TRUE;
2131
2132 pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
2133 pLed1->BlinkTimes = 10;
2134 if( pLed1->bLedOn )
2135 pLed1->BlinkingLedState = LED_OFF;
2136 else
2137 pLed1->BlinkingLedState = LED_ON;
2138 mod_timer(&(pLed1->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
2139
2140 break;
2141
2142 case LED_CTL_POWER_OFF:
2143 pLed->CurrLedState = LED_OFF;
2144 pLed->BlinkingLedState = LED_OFF;
2145
2146 if( pLed->bLedNoLinkBlinkInProgress)
2147 {
2148 del_timer_sync(&(pLed->BlinkTimer));
2149 pLed->bLedNoLinkBlinkInProgress = FALSE;
2150 }
2151 if( pLed->bLedLinkBlinkInProgress)
2152 {
2153 del_timer_sync(&(pLed->BlinkTimer));
2154 pLed->bLedLinkBlinkInProgress = FALSE;
2155 }
2156 if( pLed->bLedBlinkInProgress)
2157 {
2158 del_timer_sync(&(pLed->BlinkTimer));
2159 pLed->bLedBlinkInProgress = FALSE;
2160 }
2161 if( pLed->bLedWPSBlinkInProgress )
2162 {
2163 del_timer_sync(&(pLed->BlinkTimer));
2164 pLed->bLedWPSBlinkInProgress = FALSE;
2165 }
2166 if( pLed->bLedScanBlinkInProgress)
2167 {
2168 del_timer_sync(&(pLed->BlinkTimer));
2169 pLed->bLedScanBlinkInProgress = FALSE;
2170 }
2171 if( pLed->bLedStartToLinkBlinkInProgress)
2172 {
2173 del_timer_sync(&(pLed->BlinkTimer));
2174 pLed->bLedStartToLinkBlinkInProgress = FALSE;
2175 }
2176
2177 if( pLed1->bLedWPSBlinkInProgress )
2178 {
2179 del_timer_sync(&(pLed1->BlinkTimer));
2180 pLed1->bLedWPSBlinkInProgress = FALSE;
2181 }
2182
2183
2184 pLed1->BlinkingLedState = LED_UNKNOWN;
2185 SwLedOff(dev, pLed);
2186 SwLedOff(dev, pLed1);
2187 break;
2188
2189 default:
2190 break;
2191
2192 }
2193
2194 RT_TRACE(COMP_LED, "Led %d\n", pLed->CurrLedState);
2195}
2196
2197
2198
2199void
2200SwLedControlMode5(
2201 struct net_device *dev,
2202 LED_CTL_MODE LedAction
2203)
2204{
2205 struct r8192_priv *priv = ieee80211_priv(dev);
2206 PLED_819xUsb pLed = &(priv->SwLed0);
2207
2208 if(priv->CustomerID == RT_CID_819x_CAMEO)
2209 pLed = &(priv->SwLed1);
2210
2211 switch(LedAction)
2212 {
2213 case LED_CTL_POWER_ON:
2214 case LED_CTL_NO_LINK:
2215 case LED_CTL_LINK:
2216 if(pLed->CurrLedState == LED_SCAN_BLINK)
2217 {
2218 return;
2219 }
2220 pLed->CurrLedState = LED_ON;
2221 pLed->BlinkingLedState = LED_ON;
2222 pLed->bLedBlinkInProgress = FALSE;
2223 mod_timer(&(pLed->BlinkTimer), 0);
2224 break;
2225
2226 case LED_CTL_SITE_SURVEY:
2227 if((priv->ieee80211->LinkDetectInfo.bBusyTraffic) && (priv->ieee80211->state == IEEE80211_LINKED))
2228 ;
2229 else if(pLed->bLedScanBlinkInProgress ==FALSE)
2230 {
2231 if(pLed->bLedBlinkInProgress ==TRUE)
2232 {
2233 del_timer_sync(&(pLed->BlinkTimer));
2234 pLed->bLedBlinkInProgress = FALSE;
2235 }
2236 pLed->bLedScanBlinkInProgress = TRUE;
2237 pLed->CurrLedState = LED_SCAN_BLINK;
2238 pLed->BlinkTimes = 24;
2239 if( pLed->bLedOn )
2240 pLed->BlinkingLedState = LED_OFF;
2241 else
2242 pLed->BlinkingLedState = LED_ON;
2243 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SCAN_INTERVAL_ALPHA));
2244
2245 }
2246 break;
2247
2248 case LED_CTL_TX:
2249 case LED_CTL_RX:
2250 if(pLed->bLedBlinkInProgress ==FALSE)
2251 {
2252 if(pLed->CurrLedState == LED_SCAN_BLINK)
2253 {
2254 return;
2255 }
2256 pLed->bLedBlinkInProgress = TRUE;
2257 pLed->CurrLedState = LED_TXRX_BLINK;
2258 pLed->BlinkTimes = 2;
2259 if( pLed->bLedOn )
2260 pLed->BlinkingLedState = LED_OFF;
2261 else
2262 pLed->BlinkingLedState = LED_ON;
2263 mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_FASTER_INTERVAL_ALPHA));
2264 }
2265 break;
2266
2267 case LED_CTL_POWER_OFF:
2268 pLed->CurrLedState = LED_OFF;
2269 pLed->BlinkingLedState = LED_OFF;
2270
2271 if( pLed->bLedBlinkInProgress)
2272 {
2273 del_timer_sync(&(pLed->BlinkTimer));
2274 pLed->bLedBlinkInProgress = FALSE;
2275 }
2276
2277 SwLedOff(dev, pLed);
2278 break;
2279
2280 default:
2281 break;
2282
2283 }
2284
2285 RT_TRACE(COMP_LED, "Led %d\n", pLed->CurrLedState);
2286}
2287
2288
2289void
2290LedControl8192SUsb(
2291 struct net_device *dev,
2292 LED_CTL_MODE LedAction
2293 )
2294{
2295 struct r8192_priv *priv = ieee80211_priv(dev);
2296
2297 if( priv->bRegUseLed == FALSE)
2298 return;
2299
2300 if (!priv->up)
2301 return;
2302
2303 if(priv->bInHctTest)
2304 return;
2305
2306 if( priv->ieee80211->eRFPowerState != eRfOn &&
2307 (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX ||
2308 LedAction == LED_CTL_SITE_SURVEY ||
2309 LedAction == LED_CTL_LINK ||
2310 LedAction == LED_CTL_NO_LINK ||
2311 LedAction == LED_CTL_POWER_ON) )
2312 {
2313 return;
2314 }
2315
2316 switch(priv->LedStrategy)
2317 {
2318 case SW_LED_MODE0:
2319 break;
2320
2321 case SW_LED_MODE1:
2322 SwLedControlMode1(dev, LedAction);
2323 break;
2324 case SW_LED_MODE2:
2325 SwLedControlMode2(dev, LedAction);
2326 break;
2327
2328 case SW_LED_MODE3:
2329 SwLedControlMode3(dev, LedAction);
2330 break;
2331
2332 case SW_LED_MODE4:
2333 SwLedControlMode4(dev, LedAction);
2334 break;
2335
2336 case SW_LED_MODE5:
2337 SwLedControlMode5(dev, LedAction);
2338 break;
2339
2340 default:
2341 break;
2342 }
2343
2344 RT_TRACE(COMP_LED, "LedStrategy:%d, LedAction %d\n", priv->LedStrategy,LedAction);
2345}
2346
2347
diff --git a/drivers/staging/rtl8192su/r8192SU_led.h b/drivers/staging/rtl8192su/r8192SU_led.h
new file mode 100644
index 000000000000..acedae4a59ca
--- /dev/null
+++ b/drivers/staging/rtl8192su/r8192SU_led.h
@@ -0,0 +1,93 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
8 *
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
12 *
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
15 *
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/
19#ifndef __INC_HAL8192USBLED_H
20#define __INC_HAL8192USBLED_H
21
22#include <linux/types.h>
23#include <linux/timer.h>
24
25typedef enum _LED_STATE_819xUsb{
26 LED_UNKNOWN = 0,
27 LED_ON = 1,
28 LED_OFF = 2,
29 LED_BLINK_NORMAL = 3,
30 LED_BLINK_SLOWLY = 4,
31 LED_POWER_ON_BLINK = 5,
32 LED_SCAN_BLINK = 6,
33 LED_NO_LINK_BLINK = 7,
34 LED_BLINK_StartToBlink = 8,
35 LED_BLINK_WPS = 9,
36 LED_TXRX_BLINK = 10,
37 LED_BLINK_WPS_STOP = 11,
38 LED_BLINK_WPS_STOP_OVERLAP = 12,
39
40}LED_STATE_819xUsb;
41
42#define IS_LED_WPS_BLINKING(_LED_819xUsb) (((PLED_819xUsb)_LED_819xUsb)->CurrLedState==LED_BLINK_WPS \
43 || ((PLED_819xUsb)_LED_819xUsb)->CurrLedState==LED_BLINK_WPS_STOP \
44 || ((PLED_819xUsb)_LED_819xUsb)->bLedWPSBlinkInProgress)
45
46#define IS_LED_BLINKING(_LED_819xUsb) (((PLED_819xUsb)_LED_819xUsb)->bLedWPSBlinkInProgress \
47 ||((PLED_819xUsb)_LED_819xUsb)->bLedScanBlinkInProgress)
48
49typedef enum _LED_PIN_819xUsb{
50 LED_PIN_GPIO0,
51 LED_PIN_LED0,
52 LED_PIN_LED1
53}LED_PIN_819xUsb;
54
55typedef enum _LED_STRATEGY_819xUsb{
56 SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
57 SW_LED_MODE1, /* SW control for PCI Express */
58 SW_LED_MODE2, /* SW control for Cameo. */
59 SW_LED_MODE3, /* SW contorl for RunTop. */
60 SW_LED_MODE4, /* SW control for Netcore */
61 SW_LED_MODE5,
62 HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) */
63}LED_STRATEGY_819xUsb, *PLED_STRATEGY_819xUsb;
64
65typedef struct _LED_819xUsb{
66 struct net_device *dev;
67
68 LED_PIN_819xUsb LedPin;
69
70 LED_STATE_819xUsb CurrLedState;
71 bool bLedOn;
72
73 bool bSWLedCtrl;
74
75 bool bLedBlinkInProgress;
76 bool bLedNoLinkBlinkInProgress;
77 bool bLedLinkBlinkInProgress;
78 bool bLedStartToLinkBlinkInProgress;
79 bool bLedScanBlinkInProgress;
80 bool bLedWPSBlinkInProgress;
81
82 u32 BlinkTimes;
83 LED_STATE_819xUsb BlinkingLedState;
84
85 struct timer_list BlinkTimer;
86} LED_819xUsb, *PLED_819xUsb;
87
88void InitSwLeds(struct net_device *dev);
89void DeInitSwLeds(struct net_device *dev);
90void LedControl8192SUsb(struct net_device *dev,LED_CTL_MODE LedAction);
91
92#endif
93
diff --git a/drivers/staging/rtl8192su/r8192S_firmware.c b/drivers/staging/rtl8192su/r8192S_firmware.c
index 752a3f1fb3f5..5036d547d5d3 100644
--- a/drivers/staging/rtl8192su/r8192S_firmware.c
+++ b/drivers/staging/rtl8192su/r8192S_firmware.c
@@ -31,44 +31,46 @@
31// Code size 31// Code size
32// Created by Roger, 2008.04.10. 32// Created by Roger, 2008.04.10.
33// 33//
34bool FirmwareDownloadCode(struct net_device *dev, u8 * code_virtual_address,u32 buffer_len) 34bool FirmwareDownloadCode(struct net_device *dev,
35 u8 *code_virtual_address,
36 u32 buffer_len)
35{ 37{
36 struct r8192_priv *priv = ieee80211_priv(dev); 38 struct r8192_priv *priv = ieee80211_priv(dev);
37 bool rt_status = true; 39 bool rt_status = true;
38 u16 frag_threshold = MAX_FIRMWARE_CODE_SIZE; //Fragmentation might be required in 90/92 but not in 92S 40 /* Fragmentation might be required in 90/92 but not in 92S */
39 u16 frag_length, frag_offset = 0; 41 u16 frag_threshold = MAX_FIRMWARE_CODE_SIZE;
40 struct sk_buff *skb; 42 u16 frag_length, frag_offset = 0;
41 unsigned char *seg_ptr; 43 struct sk_buff *skb;
42 cb_desc *tcb_desc; 44 unsigned char *seg_ptr;
43 u8 bLastIniPkt = 0; 45 cb_desc *tcb_desc;
44 u16 ExtraDescOffset = 0; 46 u8 bLastIniPkt = 0;
45 47 u16 ExtraDescOffset = 0;
46 48
47 RT_TRACE(COMP_FIRMWARE, "--->FirmwareDownloadCode()\n" ); 49 if (buffer_len >= MAX_FIRMWARE_CODE_SIZE - USB_HWDESC_HEADER_LEN) {
48 50 RT_TRACE(COMP_ERR, "(%s): Firmware exceeds"
49 //MAX_TRANSMIT_BUFFER_SIZE 51 " MAX_FIRMWARE_CODE_SIZE\n", __func__);
50 if(buffer_len >= MAX_FIRMWARE_CODE_SIZE-USB_HWDESC_HEADER_LEN)
51 {
52 RT_TRACE(COMP_ERR, "Size over MAX_FIRMWARE_CODE_SIZE! \n");
53 goto cmdsend_downloadcode_fail; 52 goto cmdsend_downloadcode_fail;
54 } 53 }
55
56 ExtraDescOffset = USB_HWDESC_HEADER_LEN; 54 ExtraDescOffset = USB_HWDESC_HEADER_LEN;
57
58 do { 55 do {
59 if((buffer_len-frag_offset) > frag_threshold) 56 if((buffer_len-frag_offset) > frag_threshold)
60 {
61 frag_length = frag_threshold + ExtraDescOffset; 57 frag_length = frag_threshold + ExtraDescOffset;
58 else {
59 frag_length = (u16)(buffer_len -
60 frag_offset + ExtraDescOffset);
61 bLastIniPkt = 1;
62 } 62 }
63 else 63 /*
64 { 64 * Allocate skb buffer to contain firmware info
65 frag_length = (u16)(buffer_len - frag_offset + ExtraDescOffset); 65 * and tx descriptor info.
66 bLastIniPkt = 1; 66 */
67 }
68
69 /* Allocate skb buffer to contain firmware info and tx descriptor info. */
70 skb = dev_alloc_skb(frag_length); 67 skb = dev_alloc_skb(frag_length);
71 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); 68 if (skb == NULL) {
69 RT_TRACE(COMP_ERR, "(%s): unable to alloc skb buffer\n",
70 __func__);
71 goto cmdsend_downloadcode_fail;
72 }
73 memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev));
72 74
73 tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE); 75 tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
74 tcb_desc->queue_index = TXCMD_QUEUE; 76 tcb_desc->queue_index = TXCMD_QUEUE;
@@ -76,73 +78,60 @@ bool FirmwareDownloadCode(struct net_device *dev, u8 * code_virtual_address,u32
76 tcb_desc->bLastIniPkt = bLastIniPkt; 78 tcb_desc->bLastIniPkt = bLastIniPkt;
77 79
78 skb_reserve(skb, ExtraDescOffset); 80 skb_reserve(skb, ExtraDescOffset);
79 seg_ptr = (u8 *)skb_put(skb, (u32)(frag_length-ExtraDescOffset));
80 memcpy(seg_ptr, code_virtual_address+frag_offset, (u32)(frag_length-ExtraDescOffset));
81 81
82 tcb_desc->txbuf_size= frag_length; 82 seg_ptr = (u8 *)skb_put(skb,
83 (u32)(frag_length - ExtraDescOffset));
84
85 memcpy(seg_ptr, code_virtual_address + frag_offset,
86 (u32)(frag_length-ExtraDescOffset));
87
88 tcb_desc->txbuf_size = frag_length;
83 89
84 if(!priv->ieee80211->check_nic_enough_desc(dev,tcb_desc->queue_index)|| 90 if (!priv->ieee80211->check_nic_enough_desc(dev, tcb_desc->queue_index) ||
85 (!skb_queue_empty(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index]))||\ 91 (!skb_queue_empty(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index])) ||
86 (priv->ieee80211->queue_stop) ) 92 (priv->ieee80211->queue_stop)) {
87 {
88 RT_TRACE(COMP_FIRMWARE,"=====================================================> tx full!\n"); 93 RT_TRACE(COMP_FIRMWARE,"=====================================================> tx full!\n");
89 skb_queue_tail(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index], skb); 94 skb_queue_tail(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index], skb);
90 } 95 } else
91 else 96 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
92 {
93 priv->ieee80211->softmac_hard_start_xmit(skb,dev);
94 }
95 97
96 frag_offset += (frag_length - ExtraDescOffset); 98 frag_offset += (frag_length - ExtraDescOffset);
97 99
98 }while(frag_offset < buffer_len); 100 } while (frag_offset < buffer_len);
99
100 return rt_status ; 101 return rt_status ;
101 102
102
103cmdsend_downloadcode_fail: 103cmdsend_downloadcode_fail:
104 rt_status = false; 104 rt_status = false;
105 RT_TRACE(COMP_ERR, "CmdSendDownloadCode fail !!\n"); 105 RT_TRACE(COMP_ERR, "(%s): failed\n", __func__);
106 return rt_status; 106 return rt_status;
107
108} 107}
109 108
110 109
111RT_STATUS 110bool FirmwareEnableCPU(struct net_device *dev)
112FirmwareEnableCPU(struct net_device *dev)
113{ 111{
112 bool rtStatus = true;
113 u8 tmpU1b, CPUStatus = 0;
114 u16 tmpU2b;
115 u32 iCheckTime = 200;
114 116
115 RT_STATUS rtStatus = RT_STATUS_SUCCESS; 117 /* Enable CPU. */
116 u8 tmpU1b, CPUStatus = 0;
117 u16 tmpU2b;
118 u32 iCheckTime = 200;
119
120 RT_TRACE(COMP_FIRMWARE, "-->FirmwareEnableCPU()\n" );
121 // Enable CPU.
122 tmpU1b = read_nic_byte(dev, SYS_CLKR); 118 tmpU1b = read_nic_byte(dev, SYS_CLKR);
123 write_nic_byte(dev, SYS_CLKR, (tmpU1b|SYS_CPU_CLKSEL)); //AFE source 119 /* AFE source */
124 120 write_nic_byte(dev, SYS_CLKR, (tmpU1b|SYS_CPU_CLKSEL));
125 tmpU2b = read_nic_word(dev, SYS_FUNC_EN); 121 tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
126 write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_CPUEN)); 122 write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_CPUEN));
127 123 /* Poll IMEM Ready after CPU has refilled. */
128 //Polling IMEM Ready after CPU has refilled. 124 do {
129 do
130 {
131 CPUStatus = read_nic_byte(dev, TCR); 125 CPUStatus = read_nic_byte(dev, TCR);
132 if(CPUStatus& IMEM_RDY) 126 if (CPUStatus & IMEM_RDY)
133 { 127 /* success */
134 RT_TRACE(COMP_FIRMWARE, "IMEM Ready after CPU has refilled.\n");
135 break; 128 break;
136 }
137
138 //usleep(100);
139 udelay(100); 129 udelay(100);
140 }while(iCheckTime--); 130 } while (iCheckTime--);
141 131 if (!(CPUStatus & IMEM_RDY)) {
142 if(!(CPUStatus & IMEM_RDY)) 132 RT_TRACE(COMP_ERR, "%s(): failed to enable CPU", __func__);
143 return RT_STATUS_FAILURE; 133 rtStatus = false;
144 134 }
145 RT_TRACE(COMP_FIRMWARE, "<--FirmwareEnableCPU(): rtStatus(%#x)\n", rtStatus);
146 return rtStatus; 135 return rtStatus;
147} 136}
148 137
@@ -176,106 +165,87 @@ FirmwareGetNextStatus(FIRMWARE_8192S_STATUS FWCurrentStatus)
176 return NextFWStatus; 165 return NextFWStatus;
177} 166}
178 167
179bool 168bool FirmwareCheckReady(struct net_device *dev, u8 LoadFWStatus)
180FirmwareCheckReady(struct net_device *dev, u8 LoadFWStatus)
181{ 169{
182 struct r8192_priv *priv = ieee80211_priv(dev); 170 struct r8192_priv *priv = ieee80211_priv(dev);
183 RT_STATUS rtStatus = RT_STATUS_SUCCESS; 171 bool rtStatus = true;
184 rt_firmware *pFirmware = priv->pFirmware; 172 rt_firmware *pFirmware = priv->pFirmware;
185 int PollingCnt = 1000; 173 int PollingCnt = 1000;
186 //u8 tmpU1b, CPUStatus = 0; 174 u8 CPUStatus = 0;
187 u8 CPUStatus = 0; 175 u32 tmpU4b;
188 u32 tmpU4b;
189 //bool bOrgIMREnable;
190
191 RT_TRACE(COMP_FIRMWARE, "--->FirmwareCheckReady(): LoadStaus(%d),", LoadFWStatus);
192 176
193 pFirmware->FWStatus = (FIRMWARE_8192S_STATUS)LoadFWStatus; 177 pFirmware->FWStatus = (FIRMWARE_8192S_STATUS)LoadFWStatus;
194 if( LoadFWStatus == FW_STATUS_LOAD_IMEM) 178 switch (LoadFWStatus) {
195 { 179 case FW_STATUS_LOAD_IMEM:
196 do 180 do { /* Polling IMEM code done. */
197 {//Polling IMEM code done.
198 CPUStatus = read_nic_byte(dev, TCR); 181 CPUStatus = read_nic_byte(dev, TCR);
199 if(CPUStatus& IMEM_CODE_DONE) 182 if(CPUStatus& IMEM_CODE_DONE)
200 break; 183 break;
201
202 udelay(5); 184 udelay(5);
203 }while(PollingCnt--); 185 } while (PollingCnt--);
204 if(!(CPUStatus & IMEM_CHK_RPT) || PollingCnt <= 0) 186 if (!(CPUStatus & IMEM_CHK_RPT) || PollingCnt <= 0) {
205 {
206 RT_TRACE(COMP_ERR, "FW_STATUS_LOAD_IMEM FAIL CPU, Status=%x\r\n", CPUStatus); 187 RT_TRACE(COMP_ERR, "FW_STATUS_LOAD_IMEM FAIL CPU, Status=%x\r\n", CPUStatus);
207 return false; 188 goto FirmwareCheckReadyFail;
208 } 189 }
209 } 190 break;
210 else if( LoadFWStatus == FW_STATUS_LOAD_EMEM) 191 case FW_STATUS_LOAD_EMEM: /* Check Put Code OK and Turn On CPU */
211 {//Check Put Code OK and Turn On CPU 192 do { /* Polling EMEM code done. */
212 do
213 {//Polling EMEM code done.
214 CPUStatus = read_nic_byte(dev, TCR); 193 CPUStatus = read_nic_byte(dev, TCR);
215 if(CPUStatus& EMEM_CODE_DONE) 194 if(CPUStatus& EMEM_CODE_DONE)
216 break; 195 break;
217
218 udelay(5); 196 udelay(5);
219 }while(PollingCnt--); 197 } while (PollingCnt--);
220 if(!(CPUStatus & EMEM_CHK_RPT)) 198 if (!(CPUStatus & EMEM_CHK_RPT)) {
221 {
222 RT_TRACE(COMP_ERR, "FW_STATUS_LOAD_EMEM FAIL CPU, Status=%x\r\n", CPUStatus); 199 RT_TRACE(COMP_ERR, "FW_STATUS_LOAD_EMEM FAIL CPU, Status=%x\r\n", CPUStatus);
223 return false; 200 goto FirmwareCheckReadyFail;
224 } 201 }
225 202 /* Turn On CPU */
226 // Turn On CPU 203 if (FirmwareEnableCPU(dev) != true) {
227 rtStatus = FirmwareEnableCPU(dev); 204 RT_TRACE(COMP_ERR, "%s(): failed to enable CPU",
228 if(rtStatus != RT_STATUS_SUCCESS) 205 __func__);
229 { 206 goto FirmwareCheckReadyFail;
230 RT_TRACE(COMP_ERR, "Enable CPU fail ! \n" );
231 return false;
232 } 207 }
233 } 208 break;
234 else if( LoadFWStatus == FW_STATUS_LOAD_DMEM) 209 case FW_STATUS_LOAD_DMEM:
235 { 210 do { /* Polling DMEM code done */
236 do
237 {//Polling DMEM code done
238 CPUStatus = read_nic_byte(dev, TCR); 211 CPUStatus = read_nic_byte(dev, TCR);
239 if(CPUStatus& DMEM_CODE_DONE) 212 if(CPUStatus& DMEM_CODE_DONE)
240 break; 213 break;
241 214
242 udelay(5); 215 udelay(5);
243 }while(PollingCnt--); 216 } while (PollingCnt--);
244 217
245 if(!(CPUStatus & DMEM_CODE_DONE)) 218 if (!(CPUStatus & DMEM_CODE_DONE)) {
246 {
247 RT_TRACE(COMP_ERR, "Polling DMEM code done fail ! CPUStatus(%#x)\n", CPUStatus); 219 RT_TRACE(COMP_ERR, "Polling DMEM code done fail ! CPUStatus(%#x)\n", CPUStatus);
248 return false; 220 goto FirmwareCheckReadyFail;
249 } 221 }
250 222
251 RT_TRACE(COMP_FIRMWARE, "DMEM code download success, CPUStatus(%#x)\n", CPUStatus); 223 RT_TRACE(COMP_FIRMWARE, "%s(): DMEM code download success, "
224 "CPUStatus(%#x)",
225 __func__, CPUStatus);
252 226
253// PollingCnt = 100; // Set polling cycle to 10ms. 227 PollingCnt = 10000; /* Set polling cycle to 10ms. */
254 PollingCnt = 10000; // Set polling cycle to 10ms.
255 228
256 do 229 do { /* Polling Load Firmware ready */
257 {//Polling Load Firmware ready
258 CPUStatus = read_nic_byte(dev, TCR); 230 CPUStatus = read_nic_byte(dev, TCR);
259 if(CPUStatus & FWRDY) 231 if(CPUStatus & FWRDY)
260 break; 232 break;
261
262 udelay(100); 233 udelay(100);
263 }while(PollingCnt--); 234 } while (PollingCnt--);
264 235
265 RT_TRACE(COMP_FIRMWARE, "Polling Load Firmware ready, CPUStatus(%x)\n", CPUStatus); 236 RT_TRACE(COMP_FIRMWARE, "%s(): polling load firmware ready, "
237 "CPUStatus(%x)",
238 __func__, CPUStatus);
266 239
267 //if(!(CPUStatus & LOAD_FW_READY)) 240 if ((CPUStatus & LOAD_FW_READY) != LOAD_FW_READY) {
268 //if((CPUStatus & LOAD_FW_READY) != 0xff) 241 RT_TRACE(COMP_ERR, "Polling Load Firmware ready failed "
269 if((CPUStatus & LOAD_FW_READY) != LOAD_FW_READY) 242 "CPUStatus(%x)\n", CPUStatus);
270 { 243 goto FirmwareCheckReadyFail;
271 RT_TRACE(COMP_ERR, "Polling Load Firmware ready fail ! CPUStatus(%x)\n", CPUStatus);
272 return false;
273 } 244 }
274 245 /*
275 // 246 * USB interface will update
276 // <Roger_Notes> USB interface will update reserved followings parameters later!! 247 * reserved followings parameters later
277 // 2008.08.28. 248 */
278 //
279 249
280 // 250 //
281 // <Roger_Notes> If right here, we can set TCR/RCR to desired value 251 // <Roger_Notes> If right here, we can set TCR/RCR to desired value
@@ -288,16 +258,23 @@ FirmwareCheckReady(struct net_device *dev, u8 LoadFWStatus)
288 write_nic_dword(dev, RCR, 258 write_nic_dword(dev, RCR,
289 (tmpU4b|RCR_APPFCS|RCR_APP_ICV|RCR_APP_MIC)); 259 (tmpU4b|RCR_APPFCS|RCR_APP_ICV|RCR_APP_MIC));
290 260
291 RT_TRACE(COMP_FIRMWARE, "FirmwareCheckReady(): Current RCR settings(%#x)\n", tmpU4b); 261 RT_TRACE(COMP_FIRMWARE, "%s(): Current RCR settings(%#x)",
292 262 __func__, tmpU4b);
293
294 // Set to normal mode. 263 // Set to normal mode.
295 write_nic_byte(dev, LBKMD_SEL, LBK_NORMAL); 264 write_nic_byte(dev, LBKMD_SEL, LBK_NORMAL);
296 265 break;
266 default:
267 break;
297 } 268 }
269 RT_TRACE(COMP_FIRMWARE, "%s(): LoadFWStatus(%d), success",
270 __func__, LoadFWStatus);
271 return rtStatus;
298 272
299 RT_TRACE(COMP_FIRMWARE, "<---FirmwareCheckReady(): LoadFWStatus(%d), rtStatus(%x)\n", LoadFWStatus, rtStatus); 273FirmwareCheckReadyFail:
300 return (rtStatus == RT_STATUS_SUCCESS) ? true:false; 274 rtStatus = false;
275 RT_TRACE(COMP_FIRMWARE, "%s(): LoadFWStatus(%d), failed",
276 __func__, LoadFWStatus);
277 return rtStatus;
301} 278}
302 279
303// 280//
@@ -338,143 +315,159 @@ void FirmwareHeaderPriveUpdate(struct net_device *dev, PRT_8192S_FIRMWARE_PRIV
338 pFwPriv->rf_config = FirmwareHeaderMapRfType(dev); 315 pFwPriv->rf_config = FirmwareHeaderMapRfType(dev);
339} 316}
340 317
318bool FirmwareRequest92S(struct net_device *dev, rt_firmware *pFirmware)
319{
320 struct r8192_priv *priv = ieee80211_priv(dev);
321 bool rtStatus = true;
322 const char *pFwImageFileName[1] = {"RTL8192SU/rtl8192sfw.bin"};
323 u8 *pucMappedFile = NULL;
324 u32 ulInitStep = 0;
325 u8 FwHdrSize = RT_8192S_FIRMWARE_HDR_SIZE;
326 PRT_8192S_FIRMWARE_HDR pFwHdr = NULL;
327 u32 file_length = 0;
328 int rc;
329 const struct firmware *fw_entry;
330
331 rc = request_firmware(&fw_entry,
332 pFwImageFileName[ulInitStep],
333 &priv->udev->dev);
334 if (rc < 0)
335 goto RequestFirmware_Fail;
336
337 if (fw_entry->size > sizeof(pFirmware->szFwTmpBuffer)) {
338 RT_TRACE(COMP_ERR, "%s(): image file too large"
339 "for container buffer", __func__);
340 release_firmware(fw_entry);
341 goto RequestFirmware_Fail;
342 }
341 343
344 memcpy(pFirmware->szFwTmpBuffer, fw_entry->data, fw_entry->size);
345 pFirmware->szFwTmpBufferLen = fw_entry->size;
346 release_firmware(fw_entry);
347
348 pucMappedFile = pFirmware->szFwTmpBuffer;
349 file_length = pFirmware->szFwTmpBufferLen;
350
351 /* Retrieve FW header. */
352 pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile;
353 pFwHdr = pFirmware->pFwHeader;
354
355 RT_TRACE(COMP_FIRMWARE, "%s(): signature: %x, version: %x, "
356 "size: %x, imemsize: %x, sram size: %x",
357 __func__, pFwHdr->Signature, pFwHdr->Version,
358 pFwHdr->DMEMSize, pFwHdr->IMG_IMEM_SIZE,
359 pFwHdr->IMG_SRAM_SIZE);
360
361 pFirmware->FirmwareVersion = byte(pFwHdr->Version , 0);
362
363 if ((pFwHdr->IMG_IMEM_SIZE == 0) ||
364 (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) {
365 RT_TRACE(COMP_ERR, "%s(): memory for data image is less than"
366 " IMEM requires", __func__);
367 goto RequestFirmware_Fail;
368 } else {
369 pucMappedFile += FwHdrSize;
370 /* Retrieve IMEM image. */
371 memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE);
372 pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE;
373 }
374
375 if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) {
376 RT_TRACE(COMP_ERR, "%s(): memory for data image is less than"
377 " EMEM requires", __func__);
378 goto RequestFirmware_Fail;
379 } else {
380 pucMappedFile += pFirmware->FwIMEMLen;
381 /* Retriecve EMEM image */
382 memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);
383 pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE;
384 }
385 return rtStatus;
386
387RequestFirmware_Fail:
388 RT_TRACE(COMP_ERR, "%s(): failed with TCR-Status: %x\n",
389 __func__, read_nic_word(dev, TCR));
390 rtStatus = false;
391 return rtStatus;
392}
342 393
343bool FirmwareDownload92S(struct net_device *dev) 394bool FirmwareDownload92S(struct net_device *dev)
344{ 395{
345 struct r8192_priv *priv = ieee80211_priv(dev); 396 struct r8192_priv *priv = ieee80211_priv(dev);
346 bool rtStatus = true; 397 bool rtStatus = true;
347 const char *pFwImageFileName[1] = {"RTL8192SU/rtl8192sfw.bin"}; 398 u8 *pucMappedFile = NULL;
348 u8 *pucMappedFile = NULL; 399 u32 ulFileLength;
349 u32 ulFileLength, ulInitStep = 0; 400 u8 FwHdrSize = RT_8192S_FIRMWARE_HDR_SIZE;
350 u8 FwHdrSize = RT_8192S_FIRMWARE_HDR_SIZE; 401 rt_firmware *pFirmware = priv->pFirmware;
351 rt_firmware *pFirmware = priv->pFirmware; 402 u8 FwStatus = FW_STATUS_INIT;
352 u8 FwStatus = FW_STATUS_INIT; 403 PRT_8192S_FIRMWARE_HDR pFwHdr = NULL;
353 PRT_8192S_FIRMWARE_HDR pFwHdr = NULL; 404 PRT_8192S_FIRMWARE_PRIV pFwPriv = NULL;
354 PRT_8192S_FIRMWARE_PRIV pFwPriv = NULL;
355 int rc;
356 const struct firmware *fw_entry;
357 u32 file_length = 0;
358 405
359 pFirmware->FWStatus = FW_STATUS_INIT; 406 pFirmware->FWStatus = FW_STATUS_INIT;
360 407 /*
361 RT_TRACE(COMP_FIRMWARE, " --->FirmwareDownload92S()\n"); 408 * Load the firmware from RTL8192SU/rtl8192sfw.bin if necessary
362 409 */
363/* 410 if (pFirmware->szFwTmpBufferLen == 0) {
364* Load the firmware from RTL8192SU/rtl8192sfw.bin 411 if (FirmwareRequest92S(dev, pFirmware) != true)
365*/ 412 goto DownloadFirmware_Fail;
366 if(pFirmware->szFwTmpBufferLen == 0)
367 {
368 rc = request_firmware(&fw_entry, pFwImageFileName[ulInitStep],&priv->udev->dev);
369 if(rc < 0 ) {
370 RT_TRACE(COMP_ERR, "request firmware fail!\n");
371 goto DownloadFirmware_Fail;
372 }
373
374 if(fw_entry->size > sizeof(pFirmware->szFwTmpBuffer)) {
375 RT_TRACE(COMP_ERR, "img file size exceed the container buffer fail!\n");
376 release_firmware(fw_entry);
377 goto DownloadFirmware_Fail;
378 }
379
380 memcpy(pFirmware->szFwTmpBuffer,fw_entry->data,fw_entry->size);
381 pFirmware->szFwTmpBufferLen = fw_entry->size;
382 release_firmware(fw_entry);
383
384 pucMappedFile = pFirmware->szFwTmpBuffer;
385 file_length = pFirmware->szFwTmpBufferLen;
386
387 /* Retrieve FW header. */
388 pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile;
389 pFwHdr = pFirmware->pFwHeader;
390 RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \
391 pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \
392 pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE);
393 pFirmware->FirmwareVersion = byte(pFwHdr->Version ,0);
394 if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM))) {
395 RT_TRACE(COMP_ERR, "%s: memory for data image is less than IMEM required\n",\
396 __FUNCTION__);
397 goto DownloadFirmware_Fail;
398 } else {
399 pucMappedFile+=FwHdrSize;
400 /* Retrieve IMEM image. */
401 memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE);
402 pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE;
403 }
404
405 if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM)) {
406 RT_TRACE(COMP_ERR, "%s: memory for data image is less than EMEM required\n",\
407 __FUNCTION__);
408 goto DownloadFirmware_Fail;
409 } else {
410 pucMappedFile += pFirmware->FwIMEMLen;
411 /* Retriecve EMEM image */
412 memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);//===>6
413 pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE;
414 }
415 } 413 }
416
417 FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus); 414 FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus);
418 while(FwStatus!= FW_STATUS_READY) 415 while (FwStatus != FW_STATUS_READY) {
419 { 416 /* Image buffer redirection. */
420 // Image buffer redirection. 417 switch (FwStatus) {
421 switch(FwStatus) 418 case FW_STATUS_LOAD_IMEM:
422 { 419 pucMappedFile = pFirmware->FwIMEM;
423 case FW_STATUS_LOAD_IMEM: 420 ulFileLength = pFirmware->FwIMEMLen;
424 pucMappedFile = pFirmware->FwIMEM; 421 break;
425 ulFileLength = pFirmware->FwIMEMLen;
426 break;
427 422
428 case FW_STATUS_LOAD_EMEM: 423 case FW_STATUS_LOAD_EMEM:
429 pucMappedFile = pFirmware->FwEMEM; 424 pucMappedFile = pFirmware->FwEMEM;
430 ulFileLength = pFirmware->FwEMEMLen; 425 ulFileLength = pFirmware->FwEMEMLen;
431 break; 426 break;
432 427
433 case FW_STATUS_LOAD_DMEM: 428 case FW_STATUS_LOAD_DMEM:
434 /* <Roger_Notes> Partial update the content of header private. 2008.12.18 */ 429 /* Partial update the content of private header */
435 pFwHdr = pFirmware->pFwHeader; 430 pFwHdr = pFirmware->pFwHeader;
436 pFwPriv = (PRT_8192S_FIRMWARE_PRIV)&pFwHdr->FWPriv; 431 pFwPriv = (PRT_8192S_FIRMWARE_PRIV)&pFwHdr->FWPriv;
437 FirmwareHeaderPriveUpdate(dev, pFwPriv); 432 FirmwareHeaderPriveUpdate(dev, pFwPriv);
438 pucMappedFile = (u8*)(pFirmware->pFwHeader)+RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE; 433 pucMappedFile = (u8 *)(pFirmware->pFwHeader) +
439 ulFileLength = FwHdrSize-RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE; 434 RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE;
440 break;
441 435
442 default: 436 ulFileLength = FwHdrSize -
443 RT_TRACE(COMP_ERR, "Unexpected Download step!!\n"); 437 RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE;
444 goto DownloadFirmware_Fail; 438 break;
445 break; 439
440 default:
441 RT_TRACE(COMP_ERR, "Unexpected Download step!!\n");
442 goto DownloadFirmware_Fail;
443 break;
446 } 444 }
447 445
448 //3// 446 /* <2> Download image file */
449 //3// <2> Download image file 447
450 //3 // 448 rtStatus = FirmwareDownloadCode(dev,
451 rtStatus = FirmwareDownloadCode(dev, pucMappedFile, ulFileLength); 449 pucMappedFile,
450 ulFileLength);
452 451
453 if(rtStatus != true) 452 if(rtStatus != true)
454 {
455 RT_TRACE(COMP_ERR, "FirmwareDownloadCode() fail ! \n" );
456 goto DownloadFirmware_Fail; 453 goto DownloadFirmware_Fail;
457 }
458 454
459 //3// 455 /* <3> Check whether load FW process is ready */
460 //3// <3> Check whether load FW process is ready 456
461 //3 //
462 rtStatus = FirmwareCheckReady(dev, FwStatus); 457 rtStatus = FirmwareCheckReady(dev, FwStatus);
463 458
464 if(rtStatus != true) 459 if(rtStatus != true)
465 {
466 RT_TRACE(COMP_ERR, "FirmwareDownloadCode() fail ! \n");
467 goto DownloadFirmware_Fail; 460 goto DownloadFirmware_Fail;
468 }
469 461
470 FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus); 462 FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus);
471 } 463 }
472 464
473 RT_TRACE(COMP_FIRMWARE, "Firmware Download Success!!\n"); 465 RT_TRACE(COMP_FIRMWARE, "%s(): Firmware Download Success", __func__);
474 return rtStatus; 466 return rtStatus;
475 467
476 DownloadFirmware_Fail: 468DownloadFirmware_Fail:
477 RT_TRACE(COMP_ERR, "Firmware Download Fail!!%x\n",read_nic_word(dev, TCR)); 469 RT_TRACE(COMP_ERR, "%s(): failed with TCR-Status: %x\n",
470 __func__, read_nic_word(dev, TCR));
478 rtStatus = false; 471 rtStatus = false;
479 return rtStatus; 472 return rtStatus;
480} 473}
diff --git a/drivers/staging/rtl8192su/r8192S_phy.c b/drivers/staging/rtl8192su/r8192S_phy.c
index 63d4e5fd7b18..b6c0f1990742 100644
--- a/drivers/staging/rtl8192su/r8192S_phy.c
+++ b/drivers/staging/rtl8192su/r8192S_phy.c
@@ -882,7 +882,7 @@ phy_BB8192S_Config_ParaFile(struct net_device* dev)
882 882
883 // 883 //
884 // 1. Read PHY_REG.TXT BB INIT!! 884 // 1. Read PHY_REG.TXT BB INIT!!
885 // We will seperate as 1T1R/1T2R/1T2R_GREEN/2T2R 885 // We will separate as 1T1R/1T2R/1T2R_GREEN/2T2R
886 // 886 //
887 if (priv->rf_type == RF_1T2R || priv->rf_type == RF_2T2R || 887 if (priv->rf_type == RF_1T2R || priv->rf_type == RF_2T2R ||
888 priv->rf_type == RF_1T1R ||priv->rf_type == RF_2T2R_GREEN) 888 priv->rf_type == RF_1T1R ||priv->rf_type == RF_2T2R_GREEN)
@@ -1873,10 +1873,9 @@ PHY_GetTxPowerLevel8192S(
1873 if(priv->bTXPowerDataReadFromEEPORM == FALSE) 1873 if(priv->bTXPowerDataReadFromEEPORM == FALSE)
1874 return; 1874 return;
1875 1875
1876 // 1876 /*
1877 // Read predefined TX power index in EEPROM 1877 * Read predefined TX power index in EEPROM
1878 // 1878 */
1879// if(priv->epromtype == EPROM_93c46)
1880 { 1879 {
1881 // 1880 //
1882 // Mainly we use RF-A Tx Power to write the Tx Power registers, but the RF-B Tx 1881 // Mainly we use RF-A Tx Power to write the Tx Power registers, but the RF-B Tx
@@ -3607,128 +3606,103 @@ void SetBWModeCallback8192SUsb(struct net_device *dev)
3607 RT_TRACE(COMP_SCAN, "<==SetBWMode8190Pci()" ); 3606 RT_TRACE(COMP_SCAN, "<==SetBWMode8190Pci()" );
3608} 3607}
3609 3608
3610// 3609/*
3611// Callback routine of the work item for set bandwidth mode. 3610 * Callback routine of the work item for set bandwidth mode.
3612// 3611 *
3613// use in phy only (in win it's work) 3612 * use in phy only (in win it's work)
3613 */
3614void SetBWModeCallback8192SUsbWorkItem(struct net_device *dev) 3614void SetBWModeCallback8192SUsbWorkItem(struct net_device *dev)
3615{ 3615{
3616 struct r8192_priv *priv = ieee80211_priv(dev); 3616 struct r8192_priv *priv = ieee80211_priv(dev);
3617 u8 regBwOpMode; 3617 u8 regBwOpMode;
3618 3618 u8 regRRSR_RSC;
3619 // Added it for 20/40 mhz switch time evaluation by guangan 070531
3620 //u32 NowL, NowH;
3621 //u8Byte BeginTime, EndTime;
3622 u8 regRRSR_RSC;
3623 3619
3624 RT_TRACE(COMP_SCAN, "==>SetBWModeCallback8192SUsbWorkItem() Switch to %s bandwidth\n", \ 3620 RT_TRACE(COMP_SCAN, "%s(): Switch to %s bandwidth", __func__,
3625 priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"); 3621 priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ? "20MHz" : "40MHz");
3626 3622
3627 if(priv->rf_chip == RF_PSEUDO_11N) 3623 if (priv->rf_chip == RF_PSEUDO_11N) {
3628 {
3629 priv->SetBWModeInProgress= FALSE; 3624 priv->SetBWModeInProgress= FALSE;
3630 return; 3625 return;
3631 } 3626 }
3632
3633 if(!priv->up) 3627 if(!priv->up)
3634 return; 3628 return;
3635 3629 /* Set MAC register */
3636 // Added it for 20/40 mhz switch time evaluation by guangan 070531
3637 //NowL = read_nic_dword(dev, TSFR);
3638 //NowH = read_nic_dword(dev, TSFR+4);
3639 //BeginTime = ((u8Byte)NowH << 32) + NowL;
3640
3641 //3<1>Set MAC register
3642 regBwOpMode = read_nic_byte(dev, BW_OPMODE); 3630 regBwOpMode = read_nic_byte(dev, BW_OPMODE);
3643 regRRSR_RSC = read_nic_byte(dev, RRSR+2); 3631 regRRSR_RSC = read_nic_byte(dev, RRSR+2);
3644 3632 switch (priv->CurrentChannelBW) {
3645 switch(priv->CurrentChannelBW) 3633 case HT_CHANNEL_WIDTH_20:
3646 { 3634 regBwOpMode |= BW_OPMODE_20MHZ;
3647 case HT_CHANNEL_WIDTH_20: 3635 /* we have not verified whether this register works */
3648 regBwOpMode |= BW_OPMODE_20MHZ; 3636 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
3649 // 2007/02/07 Mark by Emily becasue we have not verify whether this register works 3637 break;
3650 write_nic_byte(dev, BW_OPMODE, regBwOpMode); 3638 case HT_CHANNEL_WIDTH_20_40:
3651 break; 3639 regBwOpMode &= ~BW_OPMODE_20MHZ;
3652 3640 /* we have not verified whether this register works */
3653 case HT_CHANNEL_WIDTH_20_40: 3641 write_nic_byte(dev, BW_OPMODE, regBwOpMode);
3654 regBwOpMode &= ~BW_OPMODE_20MHZ; 3642 regRRSR_RSC = (regRRSR_RSC&0x90) | (priv->nCur40MhzPrimeSC<<5);
3655 // 2007/02/07 Mark by Emily becasue we have not verify whether this register works 3643 write_nic_byte(dev, RRSR+2, regRRSR_RSC);
3656 write_nic_byte(dev, BW_OPMODE, regBwOpMode); 3644 break;
3657 regRRSR_RSC = (regRRSR_RSC&0x90) |(priv->nCur40MhzPrimeSC<<5); 3645 default:
3658 write_nic_byte(dev, RRSR+2, regRRSR_RSC); 3646 RT_TRACE(COMP_DBG, "%s(): unknown Bandwidth: %#X", __func__,
3659 3647 priv->CurrentChannelBW);
3660 break; 3648 break;
3661
3662 default:
3663 RT_TRACE(COMP_DBG, "SetBWModeCallback8192SUsbWorkItem(): unknown Bandwidth: %#X\n",
3664 priv->CurrentChannelBW);
3665 break;
3666 } 3649 }
3667 3650 /* Set PHY related register */
3668 //3 <2>Set PHY related register 3651 switch (priv->CurrentChannelBW) {
3669 switch(priv->CurrentChannelBW) 3652 case HT_CHANNEL_WIDTH_20:
3670 { 3653 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x0);
3671 case HT_CHANNEL_WIDTH_20: 3654 rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x0);
3672 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x0); 3655 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);
3673 rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x0); 3656 break;
3674 3657 case HT_CHANNEL_WIDTH_20_40:
3675 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58); 3658 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x1);
3676 3659 rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x1);
3677 break; 3660 /*
3678 case HT_CHANNEL_WIDTH_20_40: 3661 * Set Control channel to upper or lower.
3679 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x1); 3662 * These settings are required only for 40MHz
3680 rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x1); 3663 */
3681 3664 rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand,
3682 // Set Control channel to upper or lower. These settings are required only for 40MHz 3665 (priv->nCur40MhzPrimeSC>>1));
3683 rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, (priv->nCur40MhzPrimeSC>>1)); 3666 rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00,
3684 rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC); 3667 priv->nCur40MhzPrimeSC);
3685 3668 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x18);
3686 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x18); 3669 break;
3687 3670 default:
3688 break; 3671 RT_TRACE(COMP_DBG, "%s(): unknown Bandwidth: %#X", __func__,
3689 3672 priv->CurrentChannelBW);
3690 3673 break;
3691 default:
3692 RT_TRACE(COMP_DBG, "SetBWModeCallback8192SUsbWorkItem(): unknown Bandwidth: %#X\n"\
3693 ,priv->CurrentChannelBW);
3694 break;
3695 3674
3696 } 3675 }
3697 //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 3676 /*
3698 3677 * Skip over setting of J-mode in BB register here.
3699 //3<3>Set RF related register 3678 * Default value is "None J mode".
3700 switch( priv->rf_chip ) 3679 */
3701 {
3702 case RF_8225:
3703 PHY_SetRF8225Bandwidth(dev, priv->CurrentChannelBW);
3704 break;
3705
3706 case RF_8256:
3707 // Please implement this function in Hal8190PciPhy8256.c
3708 //PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW);
3709 break;
3710
3711 case RF_6052:
3712 PHY_RF6052SetBandwidth(dev, priv->CurrentChannelBW);
3713 break;
3714
3715 case RF_8258:
3716 // Please implement this function in Hal8190PciPhy8258.c
3717 // PHY_SetRF8258Bandwidth();
3718 break;
3719
3720 case RF_PSEUDO_11N:
3721 // Do Nothing
3722 break;
3723 3680
3724 default: 3681 /* Set RF related register */
3725 //RT_ASSERT(FALSE, ("Unknown rf_chip: %d\n", priv->rf_chip)); 3682 switch (priv->rf_chip) {
3726 break; 3683 case RF_8225:
3684 PHY_SetRF8225Bandwidth(dev, priv->CurrentChannelBW);
3685 break;
3686 case RF_8256:
3687 /* Please implement this function in Hal8190PciPhy8256.c */
3688 /* PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW); */
3689 break;
3690 case RF_6052:
3691 PHY_RF6052SetBandwidth(dev, priv->CurrentChannelBW);
3692 break;
3693 case RF_8258:
3694 /* Please implement this function in Hal8190PciPhy8258.c */
3695 /* PHY_SetRF8258Bandwidth(); */
3696 break;
3697 case RF_PSEUDO_11N:
3698 /* Do Nothing */
3699 break;
3700 default:
3701 RT_TRACE(COMP_DBG, "%s(): unknown rf_chip: %d", __func__,
3702 priv->rf_chip);
3703 break;
3727 } 3704 }
3728
3729 priv->SetBWModeInProgress= FALSE; 3705 priv->SetBWModeInProgress= FALSE;
3730
3731 RT_TRACE(COMP_SCAN, "<==SetBWModeCallback8192SUsbWorkItem()" );
3732} 3706}
3733 3707
3734//--------------------------Move to oter DIR later-------------------------------*/ 3708//--------------------------Move to oter DIR later-------------------------------*/
diff --git a/drivers/staging/rtl8192su/r8192U.h b/drivers/staging/rtl8192su/r8192U.h
index ba87623f32ee..eccf4478fba8 100644
--- a/drivers/staging/rtl8192su/r8192U.h
+++ b/drivers/staging/rtl8192su/r8192U.h
@@ -43,6 +43,13 @@
43#include "ieee80211/ieee80211.h" 43#include "ieee80211/ieee80211.h"
44 44
45#include "r8192S_firmware.h" 45#include "r8192S_firmware.h"
46#include "r8192SU_led.h"
47
48/* EEPROM defs for use with linux/eeprom_93cx6.h */
49#define RTL819X_EEPROM_CMD_READ (1 << 0)
50#define RTL819X_EEPROM_CMD_WRITE (1 << 1)
51#define RTL819X_EEPROM_CMD_CK (1 << 2)
52#define RTL819X_EEPROM_CMD_CS (1 << 3)
46 53
47//#define RTL8192U 54//#define RTL8192U
48#define RTL819xU_MODULE_NAME "rtl819xU" 55#define RTL819xU_MODULE_NAME "rtl819xU"
@@ -735,11 +742,6 @@ typedef enum _RTL8192SUSB_LOOPBACK{
735#define RSVD_FW_QUEUE_PAGE_CMD_SHIFT 0x08 742#define RSVD_FW_QUEUE_PAGE_CMD_SHIFT 0x08
736#define RSVD_FW_QUEUE_PAGE_BCN_SHIFT 0x00 743#define RSVD_FW_QUEUE_PAGE_BCN_SHIFT 0x00
737#define RSVD_FW_QUEUE_PAGE_PUB_SHIFT 0x08 744#define RSVD_FW_QUEUE_PAGE_PUB_SHIFT 0x08
738//=================================================================
739//=================================================================
740
741#define EPROM_93c46 0
742#define EPROM_93c56 1
743 745
744#define DEFAULT_FRAG_THRESHOLD 2342U 746#define DEFAULT_FRAG_THRESHOLD 2342U
745#define MIN_FRAG_THRESHOLD 256U 747#define MIN_FRAG_THRESHOLD 256U
@@ -1066,19 +1068,6 @@ typedef enum _RT_CUSTOMER_ID
1066 RT_CID_PRONET = 13, 1068 RT_CID_PRONET = 13,
1067}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; 1069}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
1068 1070
1069//================================================================================
1070// LED customization.
1071//================================================================================
1072
1073typedef enum _LED_STRATEGY_8190{
1074 SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option.
1075 SW_LED_MODE1, // SW control for PCI Express
1076 SW_LED_MODE2, // SW control for Cameo.
1077 SW_LED_MODE3, // SW contorl for RunTop.
1078 SW_LED_MODE4, // SW control for Netcore
1079 HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
1080}LED_STRATEGY_8190, *PLED_STRATEGY_8190;
1081
1082typedef enum _RESET_TYPE { 1071typedef enum _RESET_TYPE {
1083 RESET_TYPE_NORESET = 0x00, 1072 RESET_TYPE_NORESET = 0x00,
1084 RESET_TYPE_NORMAL = 0x01, 1073 RESET_TYPE_NORMAL = 0x01,
@@ -1123,15 +1112,14 @@ typedef struct r8192_priv
1123{ 1112{
1124 struct rtl819x_ops* ops; 1113 struct rtl819x_ops* ops;
1125 struct usb_device *udev; 1114 struct usb_device *udev;
1126 //added for maintain info from eeprom 1115 /* added for maintain info from eeprom */
1127 short epromtype;
1128 u16 eeprom_vid; 1116 u16 eeprom_vid;
1129 u16 eeprom_pid; 1117 u16 eeprom_pid;
1130 u8 eeprom_CustomerID; 1118 u8 eeprom_CustomerID;
1131 u8 eeprom_SubCustomerID; 1119 u8 eeprom_SubCustomerID;
1132 u8 eeprom_ChannelPlan; 1120 u8 eeprom_ChannelPlan;
1133 RT_CUSTOMER_ID CustomerID; 1121 RT_CUSTOMER_ID CustomerID;
1134 LED_STRATEGY_8190 LedStrategy; 1122 LED_STRATEGY_819xUsb LedStrategy;
1135 u8 txqueue_to_outpipemap[9]; 1123 u8 txqueue_to_outpipemap[9];
1136 u8 RtOutPipes[16]; 1124 u8 RtOutPipes[16];
1137 u8 RtInPipes[16]; 1125 u8 RtInPipes[16];
@@ -1501,8 +1489,17 @@ typedef struct r8192_priv
1501 u8 MinSpaceCfg; 1489 u8 MinSpaceCfg;
1502 1490
1503 u16 rf_pathmap; 1491 u16 rf_pathmap;
1504//#endif
1505 1492
1493 /* added for led control */
1494 PLED_819xUsb pLed;
1495 LED_819xUsb SwLed0;
1496 LED_819xUsb SwLed1;
1497 u8 bRegUseLed;
1498 struct work_struct BlinkWorkItem;
1499 /* added for led control */
1500 u16 FwCmdIOMap;
1501 u32 FwCmdIOParam;
1502 u8 DMFlag;
1506 1503
1507 1504
1508 1505
diff --git a/drivers/staging/rtl8192su/r8192U_core.c b/drivers/staging/rtl8192su/r8192U_core.c
index 04d9b85f3d4c..447d6474a70c 100644
--- a/drivers/staging/rtl8192su/r8192U_core.c
+++ b/drivers/staging/rtl8192su/r8192U_core.c
@@ -26,6 +26,7 @@
26 26
27#include <linux/vmalloc.h> 27#include <linux/vmalloc.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29#include <linux/eeprom_93cx6.h>
29 30
30#undef LOOP_TEST 31#undef LOOP_TEST
31#undef DUMP_RX 32#undef DUMP_RX
@@ -54,7 +55,6 @@
54 55
55#include <asm/uaccess.h> 56#include <asm/uaccess.h>
56#include "r8192U.h" 57#include "r8192U.h"
57#include "r8180_93cx6.h" /* Card EEPROM */
58#include "r8192U_wx.h" 58#include "r8192U_wx.h"
59 59
60#include "r8192S_rtl8225.h" 60#include "r8192S_rtl8225.h"
@@ -217,6 +217,36 @@ static CHANNEL_LIST ChannelPlan[] = {
217 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 217 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
218}; 218};
219 219
220static void rtl819x_eeprom_register_read(struct eeprom_93cx6 *eeprom)
221{
222 struct net_device *dev = eeprom->data;
223 u8 reg = read_nic_byte(dev, EPROM_CMD);
224
225 eeprom->reg_data_in = reg & RTL819X_EEPROM_CMD_WRITE;
226 eeprom->reg_data_out = reg & RTL819X_EEPROM_CMD_READ;
227 eeprom->reg_data_clock = reg & RTL819X_EEPROM_CMD_CK;
228 eeprom->reg_chip_select = reg & RTL819X_EEPROM_CMD_CS;
229}
230
231static void rtl819x_eeprom_register_write(struct eeprom_93cx6 *eeprom)
232{
233 struct net_device *dev = eeprom->data;
234 u8 reg = 2 << 6;
235
236 if (eeprom->reg_data_in)
237 reg |= RTL819X_EEPROM_CMD_WRITE;
238 if (eeprom->reg_data_out)
239 reg |= RTL819X_EEPROM_CMD_READ;
240 if (eeprom->reg_data_clock)
241 reg |= RTL819X_EEPROM_CMD_CK;
242 if (eeprom->reg_chip_select)
243 reg |= RTL819X_EEPROM_CMD_CS;
244
245 write_nic_byte(dev, EPROM_CMD, reg);
246 read_nic_byte(dev, EPROM_CMD);
247 udelay(10);
248}
249
220static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv) 250static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
221{ 251{
222 int i, max_chan=-1, min_chan=-1; 252 int i, max_chan=-1, min_chan=-1;
@@ -1155,15 +1185,6 @@ void tx_timeout(struct net_device *dev)
1155 //DMESG("TXTIMEOUT"); 1185 //DMESG("TXTIMEOUT");
1156} 1186}
1157 1187
1158
1159/* this is only for debug */
1160void dump_eprom(struct net_device *dev)
1161{
1162 int i;
1163 for(i=0; i<63; i++)
1164 RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
1165}
1166
1167/* this is only for debug */ 1188/* this is only for debug */
1168void rtl8192_dump_reg(struct net_device *dev) 1189void rtl8192_dump_reg(struct net_device *dev)
1169{ 1190{
@@ -1201,6 +1222,7 @@ void rtl8192_set_mode(struct net_device *dev,int mode)
1201void rtl8192_update_msr(struct net_device *dev) 1222void rtl8192_update_msr(struct net_device *dev)
1202{ 1223{
1203 struct r8192_priv *priv = ieee80211_priv(dev); 1224 struct r8192_priv *priv = ieee80211_priv(dev);
1225 LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
1204 u8 msr; 1226 u8 msr;
1205 1227
1206 msr = read_nic_byte(dev, MSR); 1228 msr = read_nic_byte(dev, MSR);
@@ -1211,19 +1233,23 @@ void rtl8192_update_msr(struct net_device *dev)
1211 * this is intentional and make sense for ad-hoc and 1233 * this is intentional and make sense for ad-hoc and
1212 * master (see the create BSS/IBSS func) 1234 * master (see the create BSS/IBSS func)
1213 */ 1235 */
1214 if (priv->ieee80211->state == IEEE80211_LINKED){ 1236 if (priv->ieee80211->state == IEEE80211_LINKED) {
1215 1237
1216 if (priv->ieee80211->iw_mode == IW_MODE_INFRA) 1238 if (priv->ieee80211->iw_mode == IW_MODE_INFRA) {
1217 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT); 1239 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1218 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC) 1240 LedAction = LED_CTL_LINK;
1241 } else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1219 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT); 1242 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1220 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER) 1243 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1221 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT); 1244 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1222 1245
1223 }else 1246 } else
1224 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT); 1247 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1225 1248
1226 write_nic_byte(dev, MSR, msr); 1249 write_nic_byte(dev, MSR, msr);
1250
1251 if(priv->ieee80211->LedControlHandler != NULL)
1252 priv->ieee80211->LedControlHandler(dev, LedAction);
1227} 1253}
1228 1254
1229void rtl8192_set_chan(struct net_device *dev,short ch) 1255void rtl8192_set_chan(struct net_device *dev,short ch)
@@ -1278,7 +1304,6 @@ static int rtl8192_rx_initiate(struct net_device*dev)
1278 kfree_skb(skb); 1304 kfree_skb(skb);
1279 break; 1305 break;
1280 } 1306 }
1281// printk("nomal packet IN request!\n");
1282 usb_fill_bulk_urb(entry, priv->udev, 1307 usb_fill_bulk_urb(entry, priv->udev,
1283 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb), 1308 usb_rcvbulkpipe(priv->udev, 3), skb_tail_pointer(skb),
1284 RX_URB_SIZE, rtl8192_rx_isr, skb); 1309 RX_URB_SIZE, rtl8192_rx_isr, skb);
@@ -1292,7 +1317,6 @@ static int rtl8192_rx_initiate(struct net_device*dev)
1292 1317
1293 /* command packet rx procedure */ 1318 /* command packet rx procedure */
1294 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) { 1319 while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1295// printk("command packet IN request!\n");
1296 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL); 1320 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1297 if (!skb) 1321 if (!skb)
1298 break; 1322 break;
@@ -2138,15 +2162,13 @@ short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2138 struct r8192_priv *priv = ieee80211_priv(dev); 2162 struct r8192_priv *priv = ieee80211_priv(dev);
2139 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); 2163 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2140 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data; 2164 tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2141 //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2142 struct usb_device *udev = priv->udev; 2165 struct usb_device *udev = priv->udev;
2143 int pend; 2166 int pend;
2144 int status; 2167 int status;
2145 struct urb *tx_urb = NULL, *tx_urb_zero = NULL; 2168 struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2146 //int urb_len;
2147 unsigned int idx_pipe; 2169 unsigned int idx_pipe;
2148 u16 MPDUOverhead = 0; 2170 u16 MPDUOverhead = 0;
2149 //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc)); 2171 u16 type = 0;
2150 2172
2151 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]); 2173 pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2152 /* we are locked here so the two atomic_read and inc are executed 2174 /* we are locked here so the two atomic_read and inc are executed
@@ -2343,6 +2365,11 @@ short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2343 skb->data, 2365 skb->data,
2344 skb->len, rtl8192_tx_isr, skb); 2366 skb->len, rtl8192_tx_isr, skb);
2345 2367
2368 if (type == IEEE80211_FTYPE_DATA) {
2369 if (priv->ieee80211->LedControlHandler != NULL)
2370 priv->ieee80211->LedControlHandler(dev, LED_CTL_TX);
2371 }
2372
2346 status = usb_submit_urb(tx_urb, GFP_ATOMIC); 2373 status = usb_submit_urb(tx_urb, GFP_ATOMIC);
2347 if (!status) { 2374 if (!status) {
2348 /* 2375 /*
@@ -2577,30 +2604,20 @@ void rtl8192SU_update_ratr_table(struct net_device* dev)
2577void rtl8192SU_link_change(struct net_device *dev) 2604void rtl8192SU_link_change(struct net_device *dev)
2578{ 2605{
2579 struct r8192_priv *priv = ieee80211_priv(dev); 2606 struct r8192_priv *priv = ieee80211_priv(dev);
2580 struct ieee80211_device* ieee = priv->ieee80211; 2607 struct ieee80211_device *ieee = priv->ieee80211;
2581 //unsigned long flags;
2582 u32 reg = 0; 2608 u32 reg = 0;
2583 2609
2584 printk("=====>%s 1\n", __func__);
2585 reg = read_nic_dword(dev, RCR); 2610 reg = read_nic_dword(dev, RCR);
2586 2611 if (ieee->state == IEEE80211_LINKED) {
2587 if (ieee->state == IEEE80211_LINKED)
2588 {
2589
2590 rtl8192SU_net_update(dev); 2612 rtl8192SU_net_update(dev);
2591 rtl8192SU_update_ratr_table(dev); 2613 rtl8192SU_update_ratr_table(dev);
2592 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE); 2614 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
2593 priv->ReceiveConfig = reg |= RCR_CBSSID; 2615 priv->ReceiveConfig = reg |= RCR_CBSSID;
2594 2616
2595 }else{ 2617 } else
2596 priv->ReceiveConfig = reg &= ~RCR_CBSSID; 2618 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
2597
2598 }
2599
2600 write_nic_dword(dev, RCR, reg); 2619 write_nic_dword(dev, RCR, reg);
2601 rtl8192_update_msr(dev); 2620 rtl8192_update_msr(dev);
2602
2603 printk("<=====%s 2\n", __func__);
2604} 2621}
2605 2622
2606static struct ieee80211_qos_parameters def_qos_parameters = { 2623static struct ieee80211_qos_parameters def_qos_parameters = {
@@ -3303,18 +3320,6 @@ static void rtl8192_init_priv_task(struct net_device* dev)
3303 (unsigned long)priv); 3320 (unsigned long)priv);
3304} 3321}
3305 3322
3306static void rtl8192_get_eeprom_size(struct net_device* dev)
3307{
3308 u16 curCR = 0;
3309 struct r8192_priv *priv = ieee80211_priv(dev);
3310 RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
3311 curCR = read_nic_word_E(dev,EPROM_CMD);
3312 RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
3313 //whether need I consider BIT5?
3314 priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
3315 RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
3316}
3317
3318//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead. 3323//used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
3319static inline u16 endian_swap(u16* data) 3324static inline u16 endian_swap(u16* data)
3320{ 3325{
@@ -3409,34 +3414,28 @@ void update_hal_variables(struct r8192_priv *priv)
3409 } 3414 }
3410} 3415}
3411 3416
3412// 3417/*
3413// Description: 3418 * Description:
3414// Config HW adapter information into initial value. 3419 * Config HW adapter information into initial value.
3415// 3420 *
3416// Assumption: 3421 * Assumption:
3417// 1. After Auto load fail(i.e, check CR9346 fail) 3422 * 1. After Auto load fail(i.e, check CR9346 fail)
3418// 3423 *
3419// Created by Roger, 2008.10.21. 3424 */
3420// 3425void rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device *dev)
3421void
3422rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3423{ 3426{
3424 struct r8192_priv *priv = ieee80211_priv(dev); 3427 struct r8192_priv *priv = ieee80211_priv(dev);
3425 //u16 i,usValue; 3428 u8 rf_path; /* For EEPROM/EFUSE After V0.6_1117 */
3426 //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; 3429 int i;
3427 u8 rf_path; // For EEPROM/EFUSE After V0.6_1117
3428 int i;
3429 3430
3430 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n"); 3431 RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
3431 3432
3432 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader 3433 /* Isolation signals from Loader */
3433 //PlatformStallExecution(10000); 3434 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8);
3434 mdelay(10); 3435 mdelay(10);
3435 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep 3436 write_nic_byte(dev, PMC_FSM, 0x02); /* Enable Loader Data Keep */
3436
3437 //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
3438 3437
3439 // Initialize IC Version && Channel Plan 3438 /* Initialize IC Version && Channel Plan */
3440 priv->eeprom_vid = 0; 3439 priv->eeprom_vid = 0;
3441 priv->eeprom_pid = 0; 3440 priv->eeprom_pid = 0;
3442 priv->card_8192_version = 0; 3441 priv->card_8192_version = 0;
@@ -3447,12 +3446,14 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3447 3446
3448 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid); 3447 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3449 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid); 3448 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
3450 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID); 3449 RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n",
3451 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID); 3450 priv->eeprom_CustomerID);
3452 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan); 3451 RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n",
3453 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset); 3452 priv->eeprom_SubCustomerID);
3454 3453 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n",
3455 3454 priv->eeprom_ChannelPlan);
3455 RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n",
3456 priv->bIgnoreDiffRateTxPowerOffset);
3456 3457
3457 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC; 3458 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3458 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption); 3459 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
@@ -3460,19 +3461,15 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3460 for(i=0; i<5; i++) 3461 for(i=0; i<5; i++)
3461 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM; 3462 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
3462 3463
3463 //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
3464
3465 { 3464 {
3466 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15. 3465 /*
3466 * In this case, we randomly assign a MAC address here.
3467 */
3467 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; 3468 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
3468 u8 i;
3469
3470 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
3471
3472 for(i = 0; i < 6; i++) 3469 for(i = 0; i < 6; i++)
3473 dev->dev_addr[i] = sMacAddr[i]; 3470 dev->dev_addr[i] = sMacAddr[i];
3474 } 3471 }
3475 //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); 3472 /* NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); */
3476 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]); 3473 write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
3477 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]); 3474 write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
3478 3475
@@ -3481,7 +3478,7 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3481 dev->dev_addr); 3478 dev->dev_addr);
3482 3479
3483 priv->EEPROMBoardType = EEPROM_Default_BoardType; 3480 priv->EEPROMBoardType = EEPROM_Default_BoardType;
3484 priv->rf_type = RF_1T2R; //RF_2T2R 3481 priv->rf_type = RF_1T2R; /* RF_2T2R */
3485 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff; 3482 priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
3486 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter; 3483 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
3487 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap; 3484 priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
@@ -3490,13 +3487,11 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3490 priv->EEPROMTSSI_B = EEPROM_Default_TSSI; 3487 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
3491 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode; 3488 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
3492 3489
3493
3494
3495 for (rf_path = 0; rf_path < 2; rf_path++) 3490 for (rf_path = 0; rf_path < 2; rf_path++)
3496 { 3491 {
3497 for (i = 0; i < 3; i++) 3492 for (i = 0; i < 3; i++)
3498 { 3493 {
3499 // Read CCK RF A & B Tx power 3494 /* Read CCK RF A & B Tx power */
3500 priv->RfCckChnlAreaTxPwr[rf_path][i] = 3495 priv->RfCckChnlAreaTxPwr[rf_path][i] =
3501 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] = 3496 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
3502 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] = 3497 priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
@@ -3506,175 +3501,133 @@ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
3506 3501
3507 update_hal_variables(priv); 3502 update_hal_variables(priv);
3508 3503
3509 // 3504 /*
3510 // Update remained HAL variables. 3505 * Update remaining HAL variables.
3511 // 3506 */
3512 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100; 3507 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
3513 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new 3508 priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff; /* new */
3514 priv->TxPowerDiff = priv->EEPROMTxPowerDiff; 3509 priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
3515 //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3 3510 /* Antenna B gain offset to antenna A, bit0~3 */
3516 //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7 3511 /* priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf); */
3517 priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit12~15 3512 /* Antenna C gain offset to antenna A, bit4~7 */
3518 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2 3513 /* priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4); */
3514 /* CrystalCap, bit12~15 */
3515 priv->CrystalCap = priv->EEPROMCrystalCap;
3516 /* ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2 */
3517 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
3519 priv->LedStrategy = SW_LED_MODE0; 3518 priv->LedStrategy = SW_LED_MODE0;
3520 3519
3521 init_rate_adaptive(dev); 3520 init_rate_adaptive(dev);
3522 3521
3523 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n"); 3522 RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
3524
3525} 3523}
3526 3524
3527// 3525/*
3528// Description: 3526 * Description:
3529// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported. 3527 * Read HW adapter information by E-Fuse
3530// 3528 * or EEPROM according CR9346 reported.
3531// Assumption: 3529 *
3532// 1. CR9346 regiser has verified. 3530 * Assumption:
3533// 2. PASSIVE_LEVEL (USB interface) 3531 * 1. CR9346 regiser has verified.
3534// 3532 * 2. PASSIVE_LEVEL (USB interface)
3535// Created by Roger, 2008.10.21. 3533 */
3536// 3534void rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device *dev)
3537void
3538rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
3539{ 3535{
3540 struct r8192_priv *priv = ieee80211_priv(dev); 3536 struct r8192_priv *priv = ieee80211_priv(dev);
3541 u16 i,usValue; 3537 u16 i;
3542 u8 tmpU1b, tempval; 3538 u8 tmpU1b, tempval;
3543 u16 EEPROMId; 3539 u16 EEPROMId;
3544 u8 hwinfo[HWSET_MAX_SIZE_92S]; 3540 u8 hwinfo[HWSET_MAX_SIZE_92S];
3545 u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117 3541 u8 rf_path, index; /* For EEPROM/EFUSE After V0.6_1117 */
3546 3542 struct eeprom_93cx6 eeprom;
3547 3543 u16 eeprom_val;
3548 RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n"); 3544
3545 eeprom.data = dev;
3546 eeprom.register_read = rtl819x_eeprom_register_read;
3547 eeprom.register_write = rtl819x_eeprom_register_write;
3548 eeprom.width = PCI_EEPROM_WIDTH_93C46;
3549 3549
3550 // 3550 /*
3551 // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V. 3551 * The following operation are prevent Efuse leakage by turn on 2.5V.
3552 // 2008.11.25. 3552 */
3553 //
3554 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3); 3553 tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
3555 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80); 3554 write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
3556 //PlatformStallExecution(1000);
3557 mdelay(10); 3555 mdelay(10);
3558 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7))); 3556 write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
3559 3557
3560 // Retrieve Chip version. 3558 /* Retrieve Chip version. */
3561 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF); 3559 priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
3562 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version); 3560 RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
3563 3561
3564 switch(priv->card_8192_version) 3562 switch (priv->card_8192_version) {
3565 { 3563 case 0:
3566 case 0: 3564 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
3567 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n"); 3565 break;
3568 break; 3566 case 1:
3569 case 1: 3567 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
3570 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n"); 3568 break;
3571 break; 3569 case 2:
3572 case 2: 3570 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
3573 RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n"); 3571 break;
3574 break; 3572 default:
3575 default: 3573 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
3576 RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n"); 3574 priv->card_8192_version = VERSION_8192S_BCUT;
3577 priv->card_8192_version = VERSION_8192S_BCUT; 3575 break;
3578 break;
3579 } 3576 }
3580 3577
3581 //if (IS_BOOT_FROM_EEPROM(Adapter)) 3578 if (priv->EepromOrEfuse) { /* Read from EEPROM */
3582 if(priv->EepromOrEfuse) 3579 /* Isolation signals from Loader */
3583 { // Read frin EEPROM 3580 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8);
3584 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3585 //PlatformStallExecution(10000);
3586 mdelay(10); 3581 mdelay(10);
3587 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep 3582 /* Enable Loader Data Keep */
3588 // Read all Content from EEPROM or EFUSE. 3583 write_nic_byte(dev, PMC_FSM, 0x02);
3589 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2) 3584 /* Read all Content from EEPROM or EFUSE. */
3590 { 3585 for (i = 0; i < HWSET_MAX_SIZE_92S; i += 2) {
3591 usValue = eprom_read(dev, (u16) (i>>1)); 3586 eeprom_93cx6_read(&eeprom, (u16) (i>>1), &eeprom_val);
3592 *((u16*)(&hwinfo[i])) = usValue; 3587 *((u16 *)(&hwinfo[i])) = eeprom_val;
3593 } 3588 }
3594 } 3589 } else if (!(priv->EepromOrEfuse)) { /* Read from EFUSE */
3595 else if (!(priv->EepromOrEfuse)) 3590 /* Read EFUSE real map to shadow. */
3596 { // Read from EFUSE
3597
3598 //
3599 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
3600 // from suspend mode.
3601 // 2008.10.21.
3602 //
3603 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
3604 //PlatformStallExecution(10000);
3605 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
3606 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
3607
3608 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
3609 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
3610 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
3611 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
3612
3613 // Read EFUSE real map to shadow.
3614 EFUSE_ShadowMapUpdate(dev); 3591 EFUSE_ShadowMapUpdate(dev);
3615 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S); 3592 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
3593 } else {
3594 RT_TRACE(COMP_INIT, "%s(): Invalid boot type", __func__);
3616 } 3595 }
3617 else
3618 {
3619 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
3620 }
3621
3622 //YJ,test,090106
3623 //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
3624 //
3625 // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
3626 //
3627 //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
3628 3596
3629 // 3597 /*
3630 // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still 3598 * Even though CR9346 regiser can verify whether Autoload
3631 // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue). 3599 * is success or not, but we still double check ID codes for 92S here
3632 // 2008.10.21. 3600 * (e.g., due to HW GPIO polling fail issue)
3633 // 3601 */
3634 EEPROMId = *((u16 *)&hwinfo[0]); 3602 EEPROMId = *((u16 *)&hwinfo[0]);
3635 3603 if (EEPROMId != RTL8190_EEPROM_ID) {
3636 if( EEPROMId != RTL8190_EEPROM_ID )
3637 {
3638 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId); 3604 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
3639 priv->bTXPowerDataReadFromEEPORM = FALSE; 3605 priv->bTXPowerDataReadFromEEPORM = FALSE;
3640 priv->AutoloadFailFlag=TRUE; 3606 priv->AutoloadFailFlag=TRUE;
3641 } 3607 } else {
3642 else
3643 {
3644 priv->AutoloadFailFlag=FALSE; 3608 priv->AutoloadFailFlag=FALSE;
3645 priv->bTXPowerDataReadFromEEPORM = TRUE; 3609 priv->bTXPowerDataReadFromEEPORM = TRUE;
3646 } 3610 }
3647 // Read IC Version && Channel Plan 3611 /* Read IC Version && Channel Plan */
3648 if(!priv->AutoloadFailFlag) 3612 if (!priv->AutoloadFailFlag) {
3649 { 3613 /* VID, PID */
3650 // VID, PID
3651 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID]; 3614 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
3652 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID]; 3615 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
3653 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test 3616 priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
3654 3617
3655 3618
3656 // EEPROM Version ID, Channel plan 3619 /* EEPROM Version ID, Channel plan */
3657 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version]; 3620 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
3658 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan]; 3621 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
3659 3622
3660 // Customer ID, 0x00 and 0xff are reserved for Realtek. 3623 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
3661 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID]; 3624 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
3662 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID]; 3625 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
3663 } 3626 } else {
3664 else
3665 {
3666 //priv->eeprom_vid = 0;
3667 //priv->eeprom_pid = 0;
3668 //priv->EEPROMVersion = 0;
3669 //priv->eeprom_ChannelPlan = 0;
3670 //priv->eeprom_CustomerID = 0;
3671 //priv->eeprom_SubCustomerID = 0;
3672
3673 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev); 3627 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
3674 return; 3628 return;
3675 } 3629 }
3676 3630
3677
3678 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId); 3631 RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
3679 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid); 3632 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
3680 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid); 3633 RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
@@ -3684,18 +3637,13 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
3684 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan); 3637 RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
3685 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset); 3638 RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
3686 3639
3687 3640 /* Read USB optional function. */
3688 // Read USB optional function. 3641 if (!priv->AutoloadFailFlag) {
3689 if(!priv->AutoloadFailFlag)
3690 {
3691 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL]; 3642 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
3692 } 3643 } else {
3693 else
3694 {
3695 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC; 3644 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
3696 } 3645 }
3697 3646
3698
3699 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3); 3647 priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
3700 3648
3701 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption); 3649 RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
@@ -4134,18 +4082,12 @@ short rtl8192_init(struct net_device *dev)
4134 rtl8192_init_priv_variable(dev); 4082 rtl8192_init_priv_variable(dev);
4135 rtl8192_init_priv_lock(priv); 4083 rtl8192_init_priv_lock(priv);
4136 rtl8192_init_priv_task(dev); 4084 rtl8192_init_priv_task(dev);
4137 rtl8192_get_eeprom_size(dev);
4138 priv->ops->rtl819x_read_eeprom_info(dev); 4085 priv->ops->rtl819x_read_eeprom_info(dev);
4139 rtl8192_get_channel_map(dev); 4086 rtl8192_get_channel_map(dev);
4140 init_hal_dm(dev); 4087 init_hal_dm(dev);
4141 init_timer(&priv->watch_dog_timer); 4088 init_timer(&priv->watch_dog_timer);
4142 priv->watch_dog_timer.data = (unsigned long)dev; 4089 priv->watch_dog_timer.data = (unsigned long)dev;
4143 priv->watch_dog_timer.function = watch_dog_timer_callback; 4090 priv->watch_dog_timer.function = watch_dog_timer_callback;
4144
4145 //rtl8192_adapter_start(dev);
4146#ifdef DEBUG_EPROM
4147 dump_eprom(dev);
4148#endif
4149 return 0; 4091 return 0;
4150} 4092}
4151 4093
@@ -5513,85 +5455,88 @@ void rtl819x_update_rxcounts(
5513 } 5455 }
5514} 5456}
5515 5457
5516extern void rtl819x_watchdog_wqcallback(struct work_struct *work) 5458void rtl819x_watchdog_wqcallback(struct work_struct *work)
5517{ 5459{
5518 struct delayed_work *dwork = container_of(work,struct delayed_work,work); 5460 struct delayed_work *dwork = container_of(work,
5519 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq); 5461 struct delayed_work,
5520 struct net_device *dev = priv->ieee80211->dev; 5462 work);
5463 struct r8192_priv *priv = container_of(dwork,
5464 struct r8192_priv,
5465 watch_dog_wq);
5466 struct net_device *dev = priv->ieee80211->dev;
5521 struct ieee80211_device* ieee = priv->ieee80211; 5467 struct ieee80211_device* ieee = priv->ieee80211;
5522 RESET_TYPE ResetType = RESET_TYPE_NORESET; 5468 RESET_TYPE ResetType = RESET_TYPE_NORESET;
5523 static u8 check_reset_cnt=0; 5469 static u8 check_reset_cnt;
5470 u32 TotalRxBcnNum = 0;
5471 u32 TotalRxDataNum = 0;
5524 bool bBusyTraffic = false; 5472 bool bBusyTraffic = false;
5525 5473
5526 if(!priv->up) 5474 if(!priv->up)
5527 return; 5475 return;
5528 hal_dm_watchdog(dev); 5476 hal_dm_watchdog(dev);
5529 5477 /* to get busy traffic condition */
5530 {//to get busy traffic condition 5478 if (ieee->state == IEEE80211_LINKED) {
5531 if(ieee->state == IEEE80211_LINKED) 5479 if (ieee->LinkDetectInfo.NumRxOkInPeriod > 666 ||
5532 { 5480 ieee->LinkDetectInfo.NumTxOkInPeriod > 666)
5533 //windows mod 666 to 100.
5534 //if( ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
5535 // ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
5536 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
5537 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
5538 bBusyTraffic = true; 5481 bBusyTraffic = true;
5539 }
5540 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5541 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5542 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5543 }
5544 }
5545 //added by amy for AP roaming
5546 {
5547 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
5548 {
5549 u32 TotalRxBcnNum = 0;
5550 u32 TotalRxDataNum = 0;
5551 5482
5552 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum); 5483 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
5553 if((TotalRxBcnNum+TotalRxDataNum) == 0) 5484 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
5554 { 5485 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
5555 #ifdef TODO 5486 }
5556 if(rfState == eRfOff) 5487
5557 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__); 5488 if (priv->ieee80211->state == IEEE80211_LINKED &&
5558 #endif 5489 priv->ieee80211->iw_mode == IW_MODE_INFRA) {
5559 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__); 5490 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
5560 // Dot11d_Reset(dev); 5491 if ((TotalRxBcnNum + TotalRxDataNum) == 0) {
5561 priv->ieee80211->state = IEEE80211_ASSOCIATING; 5492 RT_TRACE(COMP_ERR, "%s(): AP is powered off,"
5562 notify_wx_assoc_event(priv->ieee80211); 5493 "connect another one\n", __func__);
5563 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid); 5494 /* Dot11d_Reset(dev); */
5564 ieee->is_roaming = true; 5495 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5565 priv->ieee80211->link_change(dev); 5496 notify_wx_assoc_event(priv->ieee80211);
5566 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq); 5497 RemovePeerTS(priv->ieee80211,
5567 } 5498 priv->ieee80211->current_network.bssid);
5499 ieee->is_roaming = true;
5500 priv->ieee80211->link_change(dev);
5501 if(ieee->LedControlHandler != NULL)
5502 ieee->LedControlHandler(ieee->dev,
5503 LED_CTL_START_TO_LINK);
5504 queue_work(priv->ieee80211->wq,
5505 &priv->ieee80211->associate_procedure_wq);
5568 } 5506 }
5569 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
5570 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
5571 } 5507 }
5572// CAM_read_entry(dev,4); 5508 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod = 0;
5573 //check if reset the driver 5509 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod = 0;
5574 if(check_reset_cnt++ >= 3 && !ieee->is_roaming) 5510
5575 { 5511 /*
5576 ResetType = rtl819x_ifcheck_resetornot(dev); 5512 * CAM_read_entry(dev,4);
5513 * check if reset the driver
5514 */
5515 if (check_reset_cnt++ >= 3 && !ieee->is_roaming) {
5516 ResetType = rtl819x_ifcheck_resetornot(dev);
5577 check_reset_cnt = 3; 5517 check_reset_cnt = 3;
5578 //DbgPrint("Start to check silent reset\n");
5579 } 5518 }
5580 // RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType); 5519 if ((priv->force_reset) || (priv->ResetProgress == RESET_TYPE_NORESET &&
5581#if 1
5582 if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
5583 (priv->bForcedSilentReset || 5520 (priv->bForcedSilentReset ||
5584 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo 5521 (!priv->bDisableNormalResetCheck &&
5585 { 5522 /* This is control by OID set in Pomelo */
5586 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType); 5523 ResetType == RESET_TYPE_SILENT)))) {
5524 RT_TRACE(COMP_RESET, "%s(): priv->force_reset is %d,"
5525 "priv->ResetProgress is %d, "
5526 "priv->bForcedSilentReset is %d, "
5527 "priv->bDisableNormalResetCheck is %d, "
5528 "ResetType is %d",
5529 __func__,
5530 priv->force_reset,
5531 priv->ResetProgress,
5532 priv->bForcedSilentReset,
5533 priv->bDisableNormalResetCheck,
5534 ResetType);
5587 rtl819x_ifsilentreset(dev); 5535 rtl819x_ifsilentreset(dev);
5588 } 5536 }
5589#endif
5590 priv->force_reset = false; 5537 priv->force_reset = false;
5591 priv->bForcedSilentReset = false; 5538 priv->bForcedSilentReset = false;
5592 priv->bResetInProgress = false; 5539 priv->bResetInProgress = false;
5593 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
5594
5595} 5540}
5596 5541
5597void watch_dog_timer_callback(unsigned long data) 5542void watch_dog_timer_callback(unsigned long data)
@@ -5816,7 +5761,7 @@ int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5816 goto out; 5761 goto out;
5817 } 5762 }
5818 5763
5819 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL); 5764 ipw = kmalloc(p->length, GFP_KERNEL);
5820 if (ipw == NULL){ 5765 if (ipw == NULL){
5821 ret = -ENOMEM; 5766 ret = -ENOMEM;
5822 goto out; 5767 goto out;
@@ -7593,96 +7538,113 @@ void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7593 7538
7594void EnableHWSecurityConfig8192(struct net_device *dev) 7539void EnableHWSecurityConfig8192(struct net_device *dev)
7595{ 7540{
7596 u8 SECR_value = 0x0; 7541 u8 SECR_value = 0x0;
7597 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); 7542 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7598 struct ieee80211_device* ieee = priv->ieee80211; 7543 struct ieee80211_device *ieee = priv->ieee80211;
7599 7544
7600 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable; 7545 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
7601#if 1 7546 switch (ieee->pairwise_key_type) {
7602 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2)) 7547 case KEY_TYPE_WEP40:
7603 { 7548 case KEY_TYPE_WEP104:
7604 SECR_value |= SCR_RxUseDK; 7549 if (priv->ieee80211->auth_mode != 2) {
7605 SECR_value |= SCR_TxUseDK; 7550 SECR_value |= SCR_RxUseDK;
7606 } 7551 SECR_value |= SCR_TxUseDK;
7607 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP))) 7552 }
7608 { 7553 break;
7609 SECR_value |= SCR_RxUseDK; 7554 case KEY_TYPE_TKIP:
7610 SECR_value |= SCR_TxUseDK; 7555 case KEY_TYPE_CCMP:
7556 if (ieee->iw_mode == IW_MODE_ADHOC) {
7557 SECR_value |= SCR_RxUseDK;
7558 SECR_value |= SCR_TxUseDK;
7559 }
7560 break;
7561 default:
7562 break;
7611 } 7563 }
7612#endif
7613 //add HWSec active enable here.
7614//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
7615 7564
7565 /*
7566 * add HWSec active enable here.
7567 * default using hwsec.
7568 * when peer AP is in N mode only and pairwise_key_type is none_aes
7569 * (which HT_IOT_ACT_PURE_N_MODE indicates it),
7570 * use software security.
7571 * when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes
7572 * use g mode hw security.
7573 */
7616 ieee->hwsec_active = 1; 7574 ieee->hwsec_active = 1;
7617 7575
7618 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off 7576 /* add hwsec_support flag to totol control hw_sec on/off */
7619 { 7577 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep) {
7620 ieee->hwsec_active = 0; 7578 ieee->hwsec_active = 0;
7621 SECR_value &= ~SCR_RxDecEnable; 7579 SECR_value &= ~SCR_RxDecEnable;
7622 } 7580 }
7623 7581
7624 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \ 7582 RT_TRACE(COMP_SEC, "%s(): hwsec: %d, pairwise_key: %d, "
7625 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value); 7583 "SECR_value: %x",
7626 { 7584 __func__, ieee->hwsec_active,
7627 write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK ); 7585 ieee->pairwise_key_type, SECR_value);
7628 } 7586
7587 write_nic_byte(dev, SECR, SECR_value); /* SECR_value | SCR_UseDK ); */
7629} 7588}
7630 7589
7631 7590
7632void setKey( struct net_device *dev, 7591void setKey(struct net_device *dev,
7633 u8 EntryNo, 7592 u8 EntryNo,
7634 u8 KeyIndex, 7593 u8 KeyIndex,
7635 u16 KeyType, 7594 u16 KeyType,
7636 u8 *MacAddr, 7595 u8 *MacAddr,
7637 u8 DefaultKey, 7596 u8 DefaultKey,
7638 u32 *KeyContent ) 7597 u32 *KeyContent)
7639{ 7598{
7640 u32 TargetCommand = 0; 7599 u32 TargetCommand = 0;
7641 u32 TargetContent = 0; 7600 u32 TargetContent = 0;
7642 u16 usConfig = 0; 7601 u16 usConfig = 0;
7643 u8 i; 7602 u8 i;
7603
7644 if (EntryNo >= TOTAL_CAM_ENTRY) 7604 if (EntryNo >= TOTAL_CAM_ENTRY)
7645 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); 7605 RT_TRACE(COMP_ERR, "%s(): cam entry exceeds TOTAL_CAM_ENTRY",
7606 __func__);
7646 7607
7647 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr); 7608 RT_TRACE(COMP_SEC, "%s(): dev: %p, EntryNo: %d, "
7609 "KeyIndex: %d, KeyType: %d, MacAddr: %pM",
7610 __func__, dev, EntryNo,
7611 KeyIndex, KeyType, MacAddr);
7648 7612
7649 if (DefaultKey) 7613 if (DefaultKey)
7650 usConfig |= BIT15 | (KeyType<<2); 7614 usConfig |= BIT15 | (KeyType << 2);
7651 else 7615 else
7652 usConfig |= BIT15 | (KeyType<<2) | KeyIndex; 7616 usConfig |= BIT15 | (KeyType << 2) | KeyIndex;
7653// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
7654 7617
7655 7618 for (i = 0 ; i < CAM_CONTENT_COUNT; i++) {
7656 for(i=0 ; i<CAM_CONTENT_COUNT; i++){ 7619 TargetCommand = i + CAM_CONTENT_COUNT * EntryNo;
7657 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
7658 TargetCommand |= BIT31|BIT16; 7620 TargetCommand |= BIT31|BIT16;
7659 7621 switch (i) {
7660 if(i==0){//MAC|Config 7622 case 0: /* MAC|Config */
7661 TargetContent = (u32)(*(MacAddr+0)) << 16| 7623 TargetContent = (u32)(*(MacAddr + 0)) << 16|
7662 (u32)(*(MacAddr+1)) << 24| 7624 (u32)(*(MacAddr + 1)) << 24|
7663 (u32)usConfig; 7625 (u32)usConfig;
7664 7626
7665 write_nic_dword(dev, WCAMI, TargetContent); 7627 write_nic_dword(dev, WCAMI, TargetContent);
7666 write_nic_dword(dev, RWCAM, TargetCommand); 7628 write_nic_dword(dev, RWCAM, TargetCommand);
7667 // printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo)); 7629 continue;
7668 } 7630 case 1: /* MAC */
7669 else if(i==1){//MAC 7631 TargetContent = (u32)(*(MacAddr + 2))|
7670 TargetContent = (u32)(*(MacAddr+2)) | 7632 (u32)(*(MacAddr + 3)) << 8|
7671 (u32)(*(MacAddr+3)) << 8| 7633 (u32)(*(MacAddr + 4)) << 16|
7672 (u32)(*(MacAddr+4)) << 16| 7634 (u32)(*(MacAddr + 5)) << 24;
7673 (u32)(*(MacAddr+5)) << 24;
7674 write_nic_dword(dev, WCAMI, TargetContent); 7635 write_nic_dword(dev, WCAMI, TargetContent);
7675 write_nic_dword(dev, RWCAM, TargetCommand); 7636 write_nic_dword(dev, RWCAM, TargetCommand);
7637 continue;
7638 default: /* Key Material */
7639 if (KeyContent != NULL) {
7640 write_nic_dword(dev, WCAMI,
7641 (u32)(*(KeyContent+i-2)));
7642 write_nic_dword(dev, RWCAM,
7643 TargetCommand);
7644 }
7645 continue;
7676 } 7646 }
7677 else {
7678 //Key Material
7679 if(KeyContent !=NULL){
7680 write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
7681 write_nic_dword(dev, RWCAM, TargetCommand);
7682 }
7683 }
7684 } 7647 }
7685
7686} 7648}
7687 7649
7688/*************************************************************************** 7650/***************************************************************************
diff --git a/drivers/staging/rtl8192su/r819xU_cmdpkt.c b/drivers/staging/rtl8192su/r819xU_cmdpkt.c
index 3ebfe79bb663..a8e9d2d96f5b 100644
--- a/drivers/staging/rtl8192su/r819xU_cmdpkt.c
+++ b/drivers/staging/rtl8192su/r819xU_cmdpkt.c
@@ -1,384 +1,255 @@
1/****************************************************************************** 1/*
2 2 * (c) Copyright 2008, RealTEK Technologies Inc. All Rights Reserved.
3 (c) Copyright 2008, RealTEK Technologies Inc. All Rights Reserved. 3 *
4 4 * Module: r819xusb_cmdpkt.c
5 Module: r819xusb_cmdpkt.c (RTL8190 TX/RX command packet handler Source C File) 5 * (RTL8190 TX/RX command packet handler Source C File)
6 6 *
7 Note: The module is responsible for handling TX and RX command packet. 7 * Note: The module is responsible for handling TX and RX command packet.
8 1. TX : Send set and query configuration command packet. 8 * 1.TX: Send set and query configuration command packet.
9 2. RX : Receive tx feedback, beacon state, query configuration 9 * 2.RX: Receive tx feedback, beacon state, query configuration, command packet.
10 command packet. 10 */
11
12 Function:
13
14 Export:
15
16 Abbrev:
17
18 History:
19 Data Who Remark
20
21 05/06/2008 amy Create initial version porting from windows driver.
22
23******************************************************************************/
24#include "r8192U.h" 11#include "r8192U.h"
25#include "r819xU_cmdpkt.h" 12#include "r819xU_cmdpkt.h"
26/*---------------------------Define Local Constant---------------------------*/ 13
27/* Debug constant*/ 14bool SendTxCommandPacket(struct net_device *dev, void *pData, u32 DataLen)
28#define CMPK_DEBOUNCE_CNT 1
29/* 2007/10/24 MH Add for printing a range of data. */
30#define CMPK_PRINT(Address)\
31{\
32 unsigned char i;\
33 u32 temp[10];\
34 \
35 memcpy(temp, Address, 40);\
36 for (i = 0; i <40; i+=4)\
37 printk("\r\n %08x", temp[i]);\
38}\
39/*---------------------------Define functions---------------------------------*/
40
41bool
42SendTxCommandPacket(
43 struct net_device *dev,
44 void* pData,
45 u32 DataLen
46 )
47{ 15{
48 bool rtStatus = true; 16 bool rtStatus = true;
49 struct r8192_priv *priv = ieee80211_priv(dev); 17 struct r8192_priv *priv = ieee80211_priv(dev);
50 struct sk_buff *skb; 18 struct sk_buff *skb;
51 cb_desc *tcb_desc; 19 cb_desc *tcb_desc;
52 unsigned char *ptr_buf; 20 unsigned char *ptr_buf;
53 //bool bLastInitPacket = false;
54 21
55 //PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); 22 /* PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); */
56 23
57 //Get TCB and local buffer from common pool. (It is shared by CmdQ, MgntQ, and USB coalesce DataQ) 24 /*
25 * Get TCB and local buffer from common pool.
26 * (It is shared by CmdQ, MgntQ, and USB coalesce DataQ)
27 */
58 skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + DataLen + 4); 28 skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + DataLen + 4);
59 memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); 29 if (skb == NULL) {
60 tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE); 30 RT_TRACE(COMP_ERR, "(%s): unable to alloc skb buffer\n",
31 __func__);
32 rtStatus = false;
33 return rtStatus;
34 }
35 memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev));
36 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
61 tcb_desc->queue_index = TXCMD_QUEUE; 37 tcb_desc->queue_index = TXCMD_QUEUE;
62 tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_NORMAL; 38 tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_NORMAL;
63 tcb_desc->bLastIniPkt = 0; 39 tcb_desc->bLastIniPkt = 0;
64 skb_reserve(skb, USB_HWDESC_HEADER_LEN); 40 skb_reserve(skb, USB_HWDESC_HEADER_LEN);
65 ptr_buf = skb_put(skb, DataLen); 41 ptr_buf = skb_put(skb, DataLen);
66 memset(ptr_buf,0,DataLen); 42 memcpy(ptr_buf, pData, DataLen);
67 memcpy(ptr_buf,pData,DataLen); 43 tcb_desc->txbuf_size = (u16)DataLen;
68 tcb_desc->txbuf_size= (u16)DataLen; 44
69 45 if (!priv->ieee80211->check_nic_enough_desc(dev, tcb_desc->queue_index) ||
70 if(!priv->ieee80211->check_nic_enough_desc(dev,tcb_desc->queue_index)|| 46 (!skb_queue_empty(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index])) ||
71 (!skb_queue_empty(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index]))||\ 47 (priv->ieee80211->queue_stop)) {
72 (priv->ieee80211->queue_stop) ) { 48 RT_TRACE(COMP_FIRMWARE, "NULL packet => tx full\n");
73 RT_TRACE(COMP_FIRMWARE,"===================NULL packet==================================> tx full!\n");
74 skb_queue_tail(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index], skb); 49 skb_queue_tail(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index], skb);
75 } else { 50 } else {
76 priv->ieee80211->softmac_hard_start_xmit(skb,dev); 51 priv->ieee80211->softmac_hard_start_xmit(skb, dev);
77 } 52 }
78 53
79 //PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); 54 //PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
80 return rtStatus; 55 return rtStatus;
81} 56}
82 57
83/*----------------------------------------------------------------------------- 58/*
84 * Function: cmpk_message_handle_tx() 59 * Function: cmpk_message_handle_tx()
85 * 60 *
86 * Overview: Driver internal module can call the API to send message to 61 * Overview: Driver internal module can call the API to send message to
87 * firmware side. For example, you can send a debug command packet. 62 * firmware side. For example, you can send a debug command packet.
88 * Or you can send a request for FW to modify RLX4181 LBUS HW bank. 63 * Or you can send a request for FW to modify RLX4181 LBUS HW bank.
89 * Otherwise, you can change MAC/PHT/RF register by firmware at 64 * Otherwise, you can change MAC/PHT/RF register by firmware at
90 * run time. We do not support message more than one segment now. 65 * run time. We do not support message more than one segment now.
91 * 66 *
92 * Input: NONE 67 * Input: NONE
93 * 68 *
94 * Output: NONE 69 * Output: NONE
95 * 70 *
96 * Return: NONE 71 * Return: NONE
97 * 72 */
98 * Revised History:
99 * When Who Remark
100 * 05/06/2008 amy porting from windows code.
101 *
102 *---------------------------------------------------------------------------*/
103 extern bool cmpk_message_handle_tx( 73 extern bool cmpk_message_handle_tx(
104 struct net_device *dev, 74 struct net_device *dev,
105 u8* codevirtualaddress, 75 u8 *codevirtualaddress,
106 u32 packettype, 76 u32 packettype,
107 u32 buffer_len) 77 u32 buffer_len)
108{ 78{
109 79 bool rt_status = true;
110 bool rt_status = true;
111 return rt_status; 80 return rt_status;
112} /* CMPK_Message_Handle_Tx */ 81}
113 82
114/*----------------------------------------------------------------------------- 83/*
115 * Function: cmpk_counttxstatistic() 84 * Function: cmpk_counttxstatistic()
116 * 85 */
117 * Overview:
118 *
119 * Input: PADAPTER pAdapter - .
120 * CMPK_TXFB_T *psTx_FB - .
121 *
122 * Output: NONE
123 *
124 * Return: NONE
125 *
126 * Revised History:
127 * When Who Remark
128 * 05/12/2008 amy Create Version 0 porting from windows code.
129 *
130 *---------------------------------------------------------------------------*/
131static void 86static void
132cmpk_count_txstatistic( 87cmpk_count_txstatistic(struct net_device *dev, cmpk_txfb_t *pstx_fb)
133 struct net_device *dev,
134 cmpk_txfb_t *pstx_fb)
135{ 88{
136 struct r8192_priv *priv = ieee80211_priv(dev); 89 struct r8192_priv *priv = ieee80211_priv(dev);
137#ifdef ENABLE_PS 90#ifdef ENABLE_PS
138 RT_RF_POWER_STATE rtState; 91 RT_RF_POWER_STATE rtState;
139 92
140 pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); 93 pAdapter->HalFunc.GetHwRegHandler(pAdapter,
94 HW_VAR_RF_STATE,
95 (pu1Byte)(&rtState));
141 96
142 // When RF is off, we should not count the packet for hw/sw synchronize 97 /*
143 // reason, ie. there may be a duration while sw switch is changed and hw 98 * When RF is off, we should not count the packet for hw/sw synchronize
144 // switch is being changed. 2006.12.04, by shien chang. 99 * reason, ie. there may be a duration while sw switch is changed and hw
100 * switch is being changed.
101 */
145 if (rtState == eRfOff) 102 if (rtState == eRfOff)
146 {
147 return; 103 return;
148 }
149#endif 104#endif
150 105
151#ifdef TODO 106#ifdef TODO
152 if(pAdapter->bInHctTest) 107 if (pAdapter->bInHctTest)
153 return; 108 return;
154#endif 109#endif
155 /* We can not know the packet length and transmit type: broadcast or uni 110 /*
156 or multicast. So the relative statistics must be collected in tx 111 * We can not know the packet length and transmit type:
157 feedback info. */ 112 * broadcast or uni or multicast.
158 if (pstx_fb->tok) 113 * So the relative statistics must be collected in tx feedback info
159 { 114 */
115 if (pstx_fb->tok) {
160 priv->stats.txfeedbackok++; 116 priv->stats.txfeedbackok++;
161 priv->stats.txoktotal++; 117 priv->stats.txoktotal++;
162 priv->stats.txokbytestotal += pstx_fb->pkt_length; 118 priv->stats.txokbytestotal += pstx_fb->pkt_length;
163 priv->stats.txokinperiod++; 119 priv->stats.txokinperiod++;
164
165 /* We can not make sure broadcast/multicast or unicast mode. */ 120 /* We can not make sure broadcast/multicast or unicast mode. */
166 if (pstx_fb->pkt_type == PACKET_MULTICAST) 121 if (pstx_fb->pkt_type == PACKET_MULTICAST) {
167 {
168 priv->stats.txmulticast++; 122 priv->stats.txmulticast++;
169 priv->stats.txbytesmulticast += pstx_fb->pkt_length; 123 priv->stats.txbytesmulticast += pstx_fb->pkt_length;
170 } 124 } else if (pstx_fb->pkt_type == PACKET_BROADCAST) {
171 else if (pstx_fb->pkt_type == PACKET_BROADCAST)
172 {
173 priv->stats.txbroadcast++; 125 priv->stats.txbroadcast++;
174 priv->stats.txbytesbroadcast += pstx_fb->pkt_length; 126 priv->stats.txbytesbroadcast += pstx_fb->pkt_length;
175 } 127 } else {
176 else
177 {
178 priv->stats.txunicast++; 128 priv->stats.txunicast++;
179 priv->stats.txbytesunicast += pstx_fb->pkt_length; 129 priv->stats.txbytesunicast += pstx_fb->pkt_length;
180 } 130 }
181 } 131 } else {
182 else
183 {
184 priv->stats.txfeedbackfail++; 132 priv->stats.txfeedbackfail++;
185 priv->stats.txerrtotal++; 133 priv->stats.txerrtotal++;
186 priv->stats.txerrbytestotal += pstx_fb->pkt_length; 134 priv->stats.txerrbytestotal += pstx_fb->pkt_length;
187
188 /* We can not make sure broadcast/multicast or unicast mode. */ 135 /* We can not make sure broadcast/multicast or unicast mode. */
189 if (pstx_fb->pkt_type == PACKET_MULTICAST) 136 if (pstx_fb->pkt_type == PACKET_MULTICAST)
190 {
191 priv->stats.txerrmulticast++; 137 priv->stats.txerrmulticast++;
192 }
193 else if (pstx_fb->pkt_type == PACKET_BROADCAST) 138 else if (pstx_fb->pkt_type == PACKET_BROADCAST)
194 {
195 priv->stats.txerrbroadcast++; 139 priv->stats.txerrbroadcast++;
196 }
197 else 140 else
198 {
199 priv->stats.txerrunicast++; 141 priv->stats.txerrunicast++;
200 }
201 } 142 }
202
203 priv->stats.txretrycount += pstx_fb->retry_cnt; 143 priv->stats.txretrycount += pstx_fb->retry_cnt;
204 priv->stats.txfeedbackretry += pstx_fb->retry_cnt; 144 priv->stats.txfeedbackretry += pstx_fb->retry_cnt;
145}
205 146
206} /* cmpk_CountTxStatistic */ 147/*
207
208
209
210/*-----------------------------------------------------------------------------
211 * Function: cmpk_handle_tx_feedback() 148 * Function: cmpk_handle_tx_feedback()
212 * 149 *
213 * Overview: The function is responsible for extract the message inside TX 150 * Overview: The function is responsible for extract the message inside TX
214 * feedbck message from firmware. It will contain dedicated info in 151 * feedbck message from firmware. It will contain dedicated info in
215 * ws-06-0063-rtl8190-command-packet-specification. Please 152 * ws-06-0063-rtl8190-command-packet-specification. Please
216 * refer to chapter "TX Feedback Element". We have to read 20 bytes 153 * refer to chapter "TX Feedback Element". We have to read 20 bytes
217 * in the command packet. 154 * in the command packet.
218 * 155 *
219 * Input: struct net_device * dev 156 * Input: struct net_device * dev
220 * u8 * pmsg - Msg Ptr of the command packet. 157 * u8 *pmsg - Msg Ptr of the command packet.
221 * 158 *
222 * Output: NONE 159 * Output: NONE
223 * 160 *
224 * Return: NONE 161 * Return: NONE
225 * 162 */
226 * Revised History: 163static void cmpk_handle_tx_feedback(struct net_device *dev, u8 *pmsg)
227 * When Who Remark
228 * 05/08/2008 amy Create Version 0 porting from windows code.
229 *
230 *---------------------------------------------------------------------------*/
231static void
232cmpk_handle_tx_feedback(
233 struct net_device *dev,
234 u8 * pmsg)
235{ 164{
236 struct r8192_priv *priv = ieee80211_priv(dev); 165 struct r8192_priv *priv = ieee80211_priv(dev);
237 cmpk_txfb_t rx_tx_fb; /* */ 166 cmpk_txfb_t rx_tx_fb;
238 167
239 priv->stats.txfeedback++; 168 priv->stats.txfeedback++;
240 169
241 /* 0. Display received message. */
242 //cmpk_Display_Message(CMPK_RX_TX_FB_SIZE, pMsg);
243
244 /* 1. Extract TX feedback info from RFD to temp structure buffer. */ 170 /* 1. Extract TX feedback info from RFD to temp structure buffer. */
171 memcpy((u8 *)&rx_tx_fb, pmsg, sizeof(cmpk_txfb_t));
245 172
246 /* 2007/07/05 MH Use pointer to transfer structure memory. */
247 //memcpy((UINT8 *)&rx_tx_fb, pMsg, sizeof(CMPK_TXFB_T));
248 memcpy((u8*)&rx_tx_fb, pmsg, sizeof(cmpk_txfb_t));
249 /* 2. Use tx feedback info to count TX statistics. */ 173 /* 2. Use tx feedback info to count TX statistics. */
250 cmpk_count_txstatistic(dev, &rx_tx_fb); 174 cmpk_count_txstatistic(dev, &rx_tx_fb);
175}
251 176
252 /* 2007/01/17 MH Comment previous method for TX statistic function. */ 177void cmdpkt_beacontimerinterrupt_819xusb(struct net_device *dev)
253 /* Collect info TX feedback packet to fill TCB. */
254 /* We can not know the packet length and transmit type: broadcast or uni
255 or multicast. */
256 //CountTxStatistics( pAdapter, &tcb );
257
258} /* cmpk_Handle_Tx_Feedback */
259
260void
261cmdpkt_beacontimerinterrupt_819xusb(
262 struct net_device *dev
263)
264{ 178{
265 struct r8192_priv *priv = ieee80211_priv(dev); 179 struct r8192_priv *priv = ieee80211_priv(dev);
266 u16 tx_rate; 180 u16 tx_rate;
267 {
268 //
269 // 070117, rcnjko: 87B have to S/W beacon for DTM encryption_cmn.
270 //
271 if(priv->ieee80211->current_network.mode == IEEE_A ||
272 priv->ieee80211->current_network.mode == IEEE_N_5G ||
273 (priv->ieee80211->current_network.mode == IEEE_N_24G && (!priv->ieee80211->pHTInfo->bCurSuppCCK)))
274 {
275 tx_rate = 60;
276 DMESG("send beacon frame tx rate is 6Mbpm\n");
277 }
278 else
279 {
280 tx_rate =10;
281 DMESG("send beacon frame tx rate is 1Mbpm\n");
282 }
283
284 rtl819xusb_beacon_tx(dev,tx_rate); // HW Beacon
285 181
182 if (priv->ieee80211->current_network.mode == IEEE_A ||
183 priv->ieee80211->current_network.mode == IEEE_N_5G ||
184 (priv->ieee80211->current_network.mode == IEEE_N_24G &&
185 (!priv->ieee80211->pHTInfo->bCurSuppCCK))) {
186 tx_rate = 60;
187 DMESG("send beacon frame tx rate is 6Mbpm\n");
188 } else {
189 tx_rate = 10;
190 DMESG("send beacon frame tx rate is 1Mbpm\n");
286 } 191 }
287 192 rtl819xusb_beacon_tx(dev, tx_rate); /* HW Beacon */
288} 193}
289 194
290 195/*
291
292
293/*-----------------------------------------------------------------------------
294 * Function: cmpk_handle_interrupt_status() 196 * Function: cmpk_handle_interrupt_status()
295 * 197 *
296 * Overview: The function is responsible for extract the message from 198 * Overview: The function is responsible for extract the message from
297 * firmware. It will contain dedicated info in 199 * firmware. It will contain dedicated info in
298 * ws-07-0063-v06-rtl819x-command-packet-specification-070315.doc. 200 * ws-07-0063-v06-rtl819x-command-packet-specification-070315.doc.
299 * Please refer to chapter "Interrupt Status Element". 201 * Please refer to chapter "Interrupt Status Element".
300 * 202 *
301 * Input: struct net_device *dev, 203 * Input: struct net_device *dev,
302 * u8* pmsg - Message Pointer of the command packet. 204 * u8* pmsg - Message Pointer of the command packet.
303 * 205 *
304 * Output: NONE 206 * Output: NONE
305 * 207 *
306 * Return: NONE 208 * Return: NONE
307 * 209 */
308 * Revised History: 210static void cmpk_handle_interrupt_status(struct net_device *dev, u8 *pmsg)
309 * When Who Remark
310 * 05/12/2008 amy Add this for rtl8192 porting from windows code.
311 *
312 *---------------------------------------------------------------------------*/
313static void
314cmpk_handle_interrupt_status(
315 struct net_device *dev,
316 u8* pmsg)
317{ 211{
318 cmpk_intr_sta_t rx_intr_status; /* */ 212 cmpk_intr_sta_t rx_intr_status; /* */
319 struct r8192_priv *priv = ieee80211_priv(dev); 213 struct r8192_priv *priv = ieee80211_priv(dev);
320 214
321 DMESG("---> cmpk_Handle_Interrupt_Status()\n"); 215 DMESG("---> cmpk_Handle_Interrupt_Status()\n");
322 216
323 /* 0. Display received message. */
324 //cmpk_Display_Message(CMPK_RX_BEACON_STATE_SIZE, pMsg);
325
326 /* 1. Extract TX feedback info from RFD to temp structure buffer. */ 217 /* 1. Extract TX feedback info from RFD to temp structure buffer. */
327 /* It seems that FW use big endian(MIPS) and DRV use little endian in
328 windows OS. So we have to read the content byte by byte or transfer
329 endian type before copy the message copy. */
330 //rx_bcn_state.Element_ID = pMsg[0];
331 //rx_bcn_state.Length = pMsg[1];
332 rx_intr_status.length = pmsg[1]; 218 rx_intr_status.length = pmsg[1];
333 if (rx_intr_status.length != (sizeof(cmpk_intr_sta_t) - 2)) 219 if (rx_intr_status.length != (sizeof(cmpk_intr_sta_t) - 2)) {
334 {
335 DMESG("cmpk_Handle_Interrupt_Status: wrong length!\n"); 220 DMESG("cmpk_Handle_Interrupt_Status: wrong length!\n");
336 return; 221 return;
337 } 222 }
338 223 /* Statistics of beacon for ad-hoc mode. */
339 224 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC) {
340 // Statistics of beacon for ad-hoc mode.
341 if( priv->ieee80211->iw_mode == IW_MODE_ADHOC)
342 {
343 //2 maybe need endian transform? 225 //2 maybe need endian transform?
344 rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4)); 226 rx_intr_status.interrupt_status = *((u32 *)(pmsg + 4));
345 //rx_intr_status.InterruptStatus = N2H4BYTE(*((UINT32 *)(pMsg + 4))); 227 //rx_intr_status.InterruptStatus = N2H4BYTE(*((UINT32 *)(pMsg + 4)));
346 228
347 DMESG("interrupt status = 0x%x\n", rx_intr_status.interrupt_status); 229 DMESG("interrupt status = 0x%x\n", rx_intr_status.interrupt_status);
348 230
349 if (rx_intr_status.interrupt_status & ISR_TxBcnOk) 231 if (rx_intr_status.interrupt_status & ISR_TxBcnOk) {
350 {
351 priv->ieee80211->bibsscoordinator = true; 232 priv->ieee80211->bibsscoordinator = true;
352 priv->stats.txbeaconokint++; 233 priv->stats.txbeaconokint++;
353 } 234 } else if (rx_intr_status.interrupt_status & ISR_TxBcnErr) {
354 else if (rx_intr_status.interrupt_status & ISR_TxBcnErr)
355 {
356 priv->ieee80211->bibsscoordinator = false; 235 priv->ieee80211->bibsscoordinator = false;
357 priv->stats.txbeaconerr++; 236 priv->stats.txbeaconerr++;
358 } 237 }
359 238
360 if (rx_intr_status.interrupt_status & ISR_BcnTimerIntr) 239 if (rx_intr_status.interrupt_status & ISR_BcnTimerIntr)
361 {
362 cmdpkt_beacontimerinterrupt_819xusb(dev); 240 cmdpkt_beacontimerinterrupt_819xusb(dev);
363 }
364
365 } 241 }
366 242 /* Other informations in interrupt status we need? */
367 // Other informations in interrupt status we need?
368
369
370 DMESG("<---- cmpk_handle_interrupt_status()\n"); 243 DMESG("<---- cmpk_handle_interrupt_status()\n");
244}
371 245
372} /* cmpk_handle_interrupt_status */ 246/*
373
374
375/*-----------------------------------------------------------------------------
376 * Function: cmpk_handle_query_config_rx() 247 * Function: cmpk_handle_query_config_rx()
377 * 248 *
378 * Overview: The function is responsible for extract the message from 249 * Overview: The function is responsible for extract the message from
379 * firmware. It will contain dedicated info in 250 * firmware. It will contain dedicated info in
380 * ws-06-0063-rtl8190-command-packet-specification. Please 251 * ws-06-0063-rtl8190-command-packet-specification
381 * refer to chapter "Beacon State Element". 252 * Please refer to chapter "Beacon State Element".
382 * 253 *
383 * Input: u8 * pmsg - Message Pointer of the command packet. 254 * Input: u8 * pmsg - Message Pointer of the command packet.
384 * 255 *
@@ -386,44 +257,28 @@ cmpk_handle_interrupt_status(
386 * 257 *
387 * Return: NONE 258 * Return: NONE
388 * 259 *
389 * Revised History: 260 */
390 * When Who Remark 261static void cmpk_handle_query_config_rx(struct net_device *dev, u8 *pmsg)
391 * 05/12/2008 amy Create Version 0 porting from windows code.
392 *
393 *---------------------------------------------------------------------------*/
394static void
395cmpk_handle_query_config_rx(
396 struct net_device *dev,
397 u8* pmsg)
398{ 262{
399 cmpk_query_cfg_t rx_query_cfg; /* */ 263 cmpk_query_cfg_t rx_query_cfg;
400 264 /*
401 /* 0. Display received message. */ 265 * Extract TX feedback info from RFD to temp structure buffer.
402 //cmpk_Display_Message(CMPK_RX_BEACON_STATE_SIZE, pMsg); 266 */
267 rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000) >> 31;
268 rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5;
269 rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3;
270 rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0;
271 rx_query_cfg.cfg_offset = pmsg[7];
272 rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) |
273 (pmsg[10] << 8) | (pmsg[11] << 0);
274 rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) |
275 (pmsg[14] << 8) | (pmsg[15] << 0);
276}
403 277
404 /* 1. Extract TX feedback info from RFD to temp structure buffer. */ 278/*
405 /* It seems that FW use big endian(MIPS) and DRV use little endian in
406 windows OS. So we have to read the content byte by byte or transfer
407 endian type before copy the message copy. */
408 //rx_query_cfg.Element_ID = pMsg[0];
409 //rx_query_cfg.Length = pMsg[1];
410 rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000)>>31;
411 rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5;
412 rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3;
413 rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0;
414 rx_query_cfg.cfg_offset = pmsg[7];
415 rx_query_cfg.value = (pmsg[8] << 24) | (pmsg[9] << 16) |
416 (pmsg[10] << 8) | (pmsg[11] << 0);
417 rx_query_cfg.mask = (pmsg[12] << 24) | (pmsg[13] << 16) |
418 (pmsg[14] << 8) | (pmsg[15] << 0);
419
420} /* cmpk_Handle_Query_Config_Rx */
421
422
423/*-----------------------------------------------------------------------------
424 * Function: cmpk_count_tx_status() 279 * Function: cmpk_count_tx_status()
425 * 280 *
426 * Overview: Count aggregated tx status from firmwar of one type rx command 281 * Overview: Count aggregated tx status from firmware of one type rx command
427 * packet element id = RX_TX_STATUS. 282 * packet element id = RX_TX_STATUS.
428 * 283 *
429 * Input: NONE 284 * Input: NONE
@@ -431,14 +286,9 @@ cmpk_handle_query_config_rx(
431 * Output: NONE 286 * Output: NONE
432 * 287 *
433 * Return: NONE 288 * Return: NONE
434 * 289 */
435 * Revised History: 290static void cmpk_count_tx_status(struct net_device *dev,
436 * When Who Remark 291 cmpk_tx_status_t *pstx_status)
437 * 05/12/2008 amy Create Version 0 porting from windows code.
438 *
439 *---------------------------------------------------------------------------*/
440static void cmpk_count_tx_status( struct net_device *dev,
441 cmpk_tx_status_t *pstx_status)
442{ 292{
443 struct r8192_priv *priv = ieee80211_priv(dev); 293 struct r8192_priv *priv = ieee80211_priv(dev);
444 294
@@ -448,13 +298,13 @@ static void cmpk_count_tx_status( struct net_device *dev,
448 298
449 pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); 299 pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
450 300
451 // When RF is off, we should not count the packet for hw/sw synchronize 301 /*
452 // reason, ie. there may be a duration while sw switch is changed and hw 302 * When RF is off, we should not count the packet for hw/sw synchronize
453 // switch is being changed. 2006.12.04, by shien chang. 303 * reason, ie. there may be a duration while sw switch is changed and hw
304 * switch is being changed.
305 */
454 if (rtState == eRfOff) 306 if (rtState == eRfOff)
455 {
456 return; 307 return;
457 }
458#endif 308#endif
459 309
460 priv->stats.txfeedbackok += pstx_status->txok; 310 priv->stats.txfeedbackok += pstx_status->txok;
@@ -463,15 +313,11 @@ static void cmpk_count_tx_status( struct net_device *dev,
463 priv->stats.txfeedbackfail += pstx_status->txfail; 313 priv->stats.txfeedbackfail += pstx_status->txfail;
464 priv->stats.txerrtotal += pstx_status->txfail; 314 priv->stats.txerrtotal += pstx_status->txfail;
465 315
466 priv->stats.txretrycount += pstx_status->txretry; 316 priv->stats.txretrycount += pstx_status->txretry;
467 priv->stats.txfeedbackretry += pstx_status->txretry; 317 priv->stats.txfeedbackretry += pstx_status->txretry;
468 318
469 //pAdapter->TxStats.NumTxOkBytesTotal += psTx_FB->pkt_length; 319 priv->stats.txmulticast += pstx_status->txmcok;
470 //pAdapter->TxStats.NumTxErrBytesTotal += psTx_FB->pkt_length; 320 priv->stats.txbroadcast += pstx_status->txbcok;
471 //pAdapter->MgntInfo.LinkDetectInfo.NumTxOkInPeriod++;
472
473 priv->stats.txmulticast += pstx_status->txmcok;
474 priv->stats.txbroadcast += pstx_status->txbcok;
475 priv->stats.txunicast += pstx_status->txucok; 321 priv->stats.txunicast += pstx_status->txucok;
476 322
477 priv->stats.txerrmulticast += pstx_status->txmcfail; 323 priv->stats.txerrmulticast += pstx_status->txmcfail;
@@ -480,14 +326,12 @@ static void cmpk_count_tx_status( struct net_device *dev,
480 326
481 priv->stats.txbytesmulticast += pstx_status->txmclength; 327 priv->stats.txbytesmulticast += pstx_status->txmclength;
482 priv->stats.txbytesbroadcast += pstx_status->txbclength; 328 priv->stats.txbytesbroadcast += pstx_status->txbclength;
483 priv->stats.txbytesunicast += pstx_status->txuclength; 329 priv->stats.txbytesunicast += pstx_status->txuclength;
484
485 priv->stats.last_packet_rate = pstx_status->rate;
486} /* cmpk_CountTxStatus */
487
488 330
331 priv->stats.last_packet_rate = pstx_status->rate;
332}
489 333
490/*----------------------------------------------------------------------------- 334/*
491 * Function: cmpk_handle_tx_status() 335 * Function: cmpk_handle_tx_status()
492 * 336 *
493 * Overview: Firmware add a new tx feedback status to reduce rx command 337 * Overview: Firmware add a new tx feedback status to reduce rx command
@@ -498,27 +342,18 @@ static void cmpk_count_tx_status( struct net_device *dev,
498 * Output: NONE 342 * Output: NONE
499 * 343 *
500 * Return: NONE 344 * Return: NONE
501 * 345 */
502 * Revised History:
503 * When Who Remark
504 * 05/12/2008 amy Create Version 0 porting from windows code.
505 *
506 *---------------------------------------------------------------------------*/
507static void 346static void
508cmpk_handle_tx_status( 347cmpk_handle_tx_status(struct net_device *dev, u8 *pmsg)
509 struct net_device *dev,
510 u8* pmsg)
511{ 348{
512 cmpk_tx_status_t rx_tx_sts; /* */ 349 cmpk_tx_status_t rx_tx_sts;
513 350
514 memcpy((void*)&rx_tx_sts, (void*)pmsg, sizeof(cmpk_tx_status_t)); 351 memcpy((void *)&rx_tx_sts, (void *)pmsg, sizeof(cmpk_tx_status_t));
515 /* 2. Use tx feedback info to count TX statistics. */ 352 /* 2. Use tx feedback info to count TX statistics. */
516 cmpk_count_tx_status(dev, &rx_tx_sts); 353 cmpk_count_tx_status(dev, &rx_tx_sts);
354}
517 355
518} /* cmpk_Handle_Tx_Status */ 356/*
519
520
521/*-----------------------------------------------------------------------------
522 * Function: cmpk_handle_tx_rate_history() 357 * Function: cmpk_handle_tx_rate_history()
523 * 358 *
524 * Overview: Firmware add a new tx rate history 359 * Overview: Firmware add a new tx rate history
@@ -528,117 +363,90 @@ cmpk_handle_tx_status(
528 * Output: NONE 363 * Output: NONE
529 * 364 *
530 * Return: NONE 365 * Return: NONE
531 * 366 */
532 * Revised History: 367static void cmpk_handle_tx_rate_history(struct net_device *dev, u8 *pmsg)
533 * When Who Remark
534 * 05/12/2008 amy Create Version 0 porting from windows code.
535 *
536 *---------------------------------------------------------------------------*/
537static void
538cmpk_handle_tx_rate_history(
539 struct net_device *dev,
540 u8* pmsg)
541{ 368{
542 cmpk_tx_rahis_t *ptxrate; 369 cmpk_tx_rahis_t *ptxrate;
543// RT_RF_POWER_STATE rtState; 370 u8 i, j;
544 u8 i, j; 371 u16 length = sizeof(cmpk_tx_rahis_t);
545 u16 length = sizeof(cmpk_tx_rahis_t); 372 u32 *ptemp;
546 u32 *ptemp;
547 struct r8192_priv *priv = ieee80211_priv(dev); 373 struct r8192_priv *priv = ieee80211_priv(dev);
548 374
549
550#ifdef ENABLE_PS 375#ifdef ENABLE_PS
551 pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); 376 pAdapter->HalFunc.GetHwRegHandler(pAdapter,
552 377 HW_VAR_RF_STATE,
553 // When RF is off, we should not count the packet for hw/sw synchronize 378 (pu1Byte)(&rtState));
554 // reason, ie. there may be a duration while sw switch is changed and hw 379 /*
555 // switch is being changed. 2006.12.04, by shien chang. 380 * When RF is off, we should not count the packet for hw/sw synchronize
381 * reason, ie. there may be a duration while sw switch is changed and hw
382 * switch is being changed.
383 */
556 if (rtState == eRfOff) 384 if (rtState == eRfOff)
557 {
558 return; 385 return;
559 }
560#endif 386#endif
561
562 ptemp = (u32 *)pmsg; 387 ptemp = (u32 *)pmsg;
563 388
564 // 389 /*
565 // Do endian transfer to word alignment(16 bits) for windows system. 390 * Do endian transfer to word alignment(16 bits) for windows system.
566 // You must do different endian transfer for linux and MAC OS 391 * You must do different endian transfer for linux and MAC OS
567 // 392 */
568 for (i = 0; i < (length/4); i++) 393 for (i = 0; i < (length/4); i++) {
569 { 394 u16 temp1, temp2;
570 u16 temp1, temp2; 395 temp1 = ptemp[i] & 0x0000FFFF;
571 396 temp2 = ptemp[i] >> 16;
572 temp1 = ptemp[i]&0x0000FFFF; 397 ptemp[i] = (temp1 << 16) | temp2;
573 temp2 = ptemp[i]>>16;
574 ptemp[i] = (temp1<<16)|temp2;
575 } 398 }
576 399
577 ptxrate = (cmpk_tx_rahis_t *)pmsg; 400 ptxrate = (cmpk_tx_rahis_t *)pmsg;
578 401
579 if (ptxrate == NULL ) 402 if (ptxrate == NULL)
580 {
581 return; 403 return;
582 }
583 404
584 for (i = 0; i < 16; i++) 405 for (i = 0; i < 16; i++) {
585 { 406 /* Collect CCK rate packet num */
586 // Collect CCK rate packet num
587 if (i < 4) 407 if (i < 4)
588 priv->stats.txrate.cck[i] += ptxrate->cck[i]; 408 priv->stats.txrate.cck[i] += ptxrate->cck[i];
589 409 /* Collect OFDM rate packet num */
590 // Collect OFDM rate packet num 410 if (i < 8)
591 if (i< 8)
592 priv->stats.txrate.ofdm[i] += ptxrate->ofdm[i]; 411 priv->stats.txrate.ofdm[i] += ptxrate->ofdm[i];
593
594 for (j = 0; j < 4; j++) 412 for (j = 0; j < 4; j++)
595 priv->stats.txrate.ht_mcs[j][i] += ptxrate->ht_mcs[j][i]; 413 priv->stats.txrate.ht_mcs[j][i] += ptxrate->ht_mcs[j][i];
596 } 414 }
597 415
598} /* cmpk_Handle_Tx_Rate_History */ 416}
599
600 417
601/*----------------------------------------------------------------------------- 418/*
602 * Function: cmpk_message_handle_rx() 419 * Function: cmpk_message_handle_rx()
603 * 420 *
604 * Overview: In the function, we will capture different RX command packet 421 * Overview: In the function, we will capture different RX command packet
605 * info. Every RX command packet element has different message 422 * info. Every RX command packet element has different message
606 * length and meaning in content. We only support three type of RX 423 * length and meaning in content. We only support three type of RX
607 * command packet now. Please refer to document 424 * command packet now. Please refer to document
608 * ws-06-0063-rtl8190-command-packet-specification. 425 * ws-06-0063-rtl8190-command-packet-specification.
609 * 426 *
610 * Input: NONE 427 * Input: NONE
611 * 428 *
612 * Output: NONE 429 * Output: NONE
613 * 430 *
614 * Return: NONE 431 * Return: NONE
615 * 432 */
616 * Revised History:
617 * When Who Remark
618 * 05/06/2008 amy Create Version 0 porting from windows code.
619 *
620 *---------------------------------------------------------------------------*/
621extern u32 433extern u32
622cmpk_message_handle_rx( 434cmpk_message_handle_rx(
623 struct net_device *dev, 435 struct net_device *dev,
624 struct ieee80211_rx_stats *pstats) 436 struct ieee80211_rx_stats *pstats)
625{ 437{
626// u32 debug_level = DBG_LOUD;
627 struct r8192_priv *priv = ieee80211_priv(dev); 438 struct r8192_priv *priv = ieee80211_priv(dev);
628 int total_length; 439 int total_length;
629 u8 cmd_length, exe_cnt = 0; 440 u8 cmd_length, exe_cnt = 0;
630 u8 element_id; 441 u8 element_id;
631 u8 *pcmd_buff; 442 u8 *pcmd_buff;
632 443
633 /* 0. Check inpt arguments. If is is a command queue message or pointer is 444 /*
634 null. */ 445 * 0. Check input arguments.
635 if (/*(prfd->queue_id != CMPK_RX_QUEUE_ID) || */(pstats== NULL)) 446 * If is is a command queue message or pointer is null
636 { 447 */
637 /* Print error message. */ 448 if ((pstats == NULL))
638 /*RT_TRACE(COMP_SEND, DebugLevel,
639 ("\n\r[CMPK]-->Err queue id or pointer"));*/
640 return 0; /* This is not a command packet. */ 449 return 0; /* This is not a command packet. */
641 }
642 450
643 /* 1. Read received command packet message length from RFD. */ 451 /* 1. Read received command packet message length from RFD. */
644 total_length = pstats->Length; 452 total_length = pstats->Length;
@@ -648,70 +456,49 @@ cmpk_message_handle_rx(
648 456
649 /* 3. Read command pakcet element id and length. */ 457 /* 3. Read command pakcet element id and length. */
650 element_id = pcmd_buff[0]; 458 element_id = pcmd_buff[0];
651 /*RT_TRACE(COMP_SEND, DebugLevel,
652 ("\n\r[CMPK]-->element ID=%d Len=%d", element_id, total_length));*/
653
654 /* 4. Check every received command packet conent according to different
655 element type. Because FW may aggregate RX command packet to minimize
656 transmit time between DRV and FW.*/
657 // Add a counter to prevent to locked in the loop too long
658 while (total_length > 0 || exe_cnt++ >100)
659 {
660 /* 2007/01/17 MH We support aggregation of different cmd in the same packet. */
661 element_id = pcmd_buff[0];
662 459
663 switch(element_id) 460 /*
664 { 461 * 4. Check every received command packet conent according to different
665 case RX_TX_FEEDBACK: 462 * element type. Because FW may aggregate RX command packet to minimize
666 cmpk_handle_tx_feedback (dev, pcmd_buff); 463 * transmit time between DRV and FW.
667 cmd_length = CMPK_RX_TX_FB_SIZE; 464 */
668 break;
669
670 case RX_INTERRUPT_STATUS:
671 cmpk_handle_interrupt_status(dev, pcmd_buff);
672 cmd_length = sizeof(cmpk_intr_sta_t);
673 break;
674
675 case BOTH_QUERY_CONFIG:
676 cmpk_handle_query_config_rx(dev, pcmd_buff);
677 cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE;
678 break;
679
680 case RX_TX_STATUS:
681 cmpk_handle_tx_status(dev, pcmd_buff);
682 cmd_length = CMPK_RX_TX_STS_SIZE;
683 break;
684
685 case RX_TX_PER_PKT_FEEDBACK:
686 // You must at lease add a switch case element here,
687 // Otherwise, we will jump to default case.
688 //DbgPrint("CCX Test\r\n");
689 cmd_length = CMPK_RX_TX_FB_SIZE;
690 break;
691
692 case RX_TX_RATE_HISTORY:
693 //DbgPrint(" rx tx rate history\r\n");
694 cmpk_handle_tx_rate_history(dev, pcmd_buff);
695 cmd_length = CMPK_TX_RAHIS_SIZE;
696 break;
697
698 default:
699
700 RT_TRACE(COMP_ERR, "---->cmpk_message_handle_rx():unknown CMD Element\n");
701 return 1; /* This is a command packet. */
702 }
703 // 2007/01/22 MH Display received rx command packet info.
704 //cmpk_Display_Message(cmd_length, pcmd_buff);
705 465
706 // 2007/01/22 MH Add to display tx statistic. 466 /* Add a counter to prevent to locked in the loop too long */
707 //cmpk_DisplayTxStatistic(pAdapter); 467 while (total_length > 0 || exe_cnt++ > 100) {
708 468 /* We support aggregation of different cmd in the same packet */
709 /* 2007/03/09 MH Collect sidderent cmd element pkt num. */ 469 element_id = pcmd_buff[0];
470 switch (element_id) {
471 case RX_TX_FEEDBACK:
472 cmpk_handle_tx_feedback(dev, pcmd_buff);
473 cmd_length = CMPK_RX_TX_FB_SIZE;
474 break;
475 case RX_INTERRUPT_STATUS:
476 cmpk_handle_interrupt_status(dev, pcmd_buff);
477 cmd_length = sizeof(cmpk_intr_sta_t);
478 break;
479 case BOTH_QUERY_CONFIG:
480 cmpk_handle_query_config_rx(dev, pcmd_buff);
481 cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE;
482 break;
483 case RX_TX_STATUS:
484 cmpk_handle_tx_status(dev, pcmd_buff);
485 cmd_length = CMPK_RX_TX_STS_SIZE;
486 break;
487 case RX_TX_PER_PKT_FEEDBACK:
488 cmd_length = CMPK_RX_TX_FB_SIZE;
489 break;
490 case RX_TX_RATE_HISTORY:
491 cmpk_handle_tx_rate_history(dev, pcmd_buff);
492 cmd_length = CMPK_TX_RAHIS_SIZE;
493 break;
494 default:
495 RT_TRACE(COMP_ERR, "(%s): unknown CMD Element\n",
496 __func__);
497 return 1; /* This is a command packet. */
498 }
710 priv->stats.rxcmdpkt[element_id]++; 499 priv->stats.rxcmdpkt[element_id]++;
711
712 total_length -= cmd_length; 500 total_length -= cmd_length;
713 pcmd_buff += cmd_length; 501 pcmd_buff += cmd_length;
714 } /* while (total_length > 0) */ 502 }
715 return 1; /* This is a command packet. */ 503 return 1; /* This is a command packet. */
716 504}
717} /* CMPK_Message_Handle_Rx */
diff --git a/drivers/staging/rtl8192su/r819xU_cmdpkt.h b/drivers/staging/rtl8192su/r819xU_cmdpkt.h
index cced8e0d2788..d3c561551880 100644
--- a/drivers/staging/rtl8192su/r819xU_cmdpkt.h
+++ b/drivers/staging/rtl8192su/r819xU_cmdpkt.h
@@ -1,199 +1,191 @@
1#ifndef R819XUSB_CMDPKT_H 1#ifndef R819XUSB_CMDPKT_H
2#define R819XUSB_CMDPKT_H 2#define R819XUSB_CMDPKT_H
3/* Different command packet have dedicated message length and definition. */
4#define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t) //20
5#define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
6#define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
7#define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t)//
8#define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t)//
9#define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t)
10
11/* 2008/05/08 amy For USB constant. */
12#define ISR_TxBcnOk BIT27 // Transmit Beacon OK
13#define ISR_TxBcnErr BIT26 // Transmit Beacon Error
14#define ISR_BcnTimerIntr BIT13 // Beacon Timer Interrupt
15
16/* Define element ID of command packet. */
17
18/*------------------------------Define structure----------------------------*/
19/* Define different command packet structure. */
20/* 1. RX side: TX feedback packet. */
21typedef struct tag_cmd_pkt_tx_feedback
22{
23 // DWORD 0
24 u8 element_id; /* Command packet type. */
25 u8 length; /* Command packet length. */
26 /* 2007/07/05 MH Change tx feedback info field. */
27 /*------TX Feedback Info Field */
28 u8 TID:4; /* */
29 u8 fail_reason:3; /* */
30 u8 tok:1; /* Transmit ok. */
31 u8 reserve1:4; /* */
32 u8 pkt_type:2; /* */
33 u8 bandwidth:1; /* */
34 u8 qos_pkt:1; /* */
35
36 // DWORD 1
37 u8 reserve2; /* */
38 /*------TX Feedback Info Field */
39 u8 retry_cnt; /* */
40 u16 pkt_id; /* */
41
42 // DWORD 3
43 u16 seq_num; /* */
44 u8 s_rate; /* Start rate. */
45 u8 f_rate; /* Final rate. */
46
47 // DWORD 4
48 u8 s_rts_rate; /* */
49 u8 f_rts_rate; /* */
50 u16 pkt_length; /* */
51
52 // DWORD 5
53 u16 reserve3; /* */
54 u16 duration; /* */
55}cmpk_txfb_t;
56
57/* 2. RX side: Interrupt status packet. It includes Beacon State,
58 Beacon Timer Interrupt and other useful informations in MAC ISR Reg. */
59typedef struct tag_cmd_pkt_interrupt_status
60{
61 u8 element_id; /* Command packet type. */
62 u8 length; /* Command packet length. */
63 u16 reserve;
64 u32 interrupt_status; /* Interrupt Status. */
65}cmpk_intr_sta_t;
66
67
68/* 3. TX side: Set configuration packet. */
69typedef struct tag_cmd_pkt_set_configuration
70{
71 u8 element_id; /* Command packet type. */
72 u8 length; /* Command packet length. */
73 u16 reserve1; /* */
74 u8 cfg_reserve1:3;
75 u8 cfg_size:2; /* Configuration info. */
76 u8 cfg_type:2; /* Configuration info. */
77 u8 cfg_action:1; /* Configuration info. */
78 u8 cfg_reserve2; /* Configuration info. */
79 u8 cfg_page:4; /* Configuration info. */
80 u8 cfg_reserve3:4; /* Configuration info. */
81 u8 cfg_offset; /* Configuration info. */
82 u32 value; /* */
83 u32 mask; /* */
84}cmpk_set_cfg_t;
85
86/* 4. Both side : TX/RX query configuraton packet. The query structure is the
87 same as set configuration. */
88#define cmpk_query_cfg_t cmpk_set_cfg_t
89 3
90/* 5. Multi packet feedback status. */ 4/*
91typedef struct tag_tx_stats_feedback // PJ quick rxcmd 09042007 5 * Different command packets have dedicated message length and definition.
92{ 6 */
93 // For endian transfer --> Driver will not the same as firmware structure. 7#define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t) /* 20 */
94 // DW 0 8#define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t) /* 16 */
9#define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t) /* 16 */
10#define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t)
11#define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t)
12#define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t)
13
14/* For USB constant. */
15#define ISR_TxBcnOk BIT27 /* Transmit Beacon OK */
16#define ISR_TxBcnErr BIT26 /* Transmit Beacon Error */
17#define ISR_BcnTimerIntr BIT13 /* Beacon Timer Interrupt */
18
19/*
20 * Define different command packet structures
21 *
22 * 1. RX side: TX feedback packet.
23 */
24typedef struct tag_cmd_pkt_tx_feedback {
25 /* DWORD 0 */
26 u8 element_id; /* Command packet type. */
27 u8 length; /* Command packet length. */
28 /* TX Feedback Info Field */
29 u8 TID:4;
30 u8 fail_reason:3;
31 u8 tok:1; /* Transmit ok. */
32 u8 reserve1:4;
33 u8 pkt_type:2;
34 u8 bandwidth:1;
35 u8 qos_pkt:1;
36
37 /* DWORD 1 */
38 u8 reserve2;
39 /* TX Feedback Info Field */
40 u8 retry_cnt;
41 u16 pkt_id;
42
43 /* DWORD 3 */
44 u16 seq_num;
45 u8 s_rate; /* Start rate. */
46 u8 f_rate; /* Final rate. */
47
48 /* DWORD 4 */
49 u8 s_rts_rate;
50 u8 f_rts_rate;
51 u16 pkt_length;
52
53 /* DWORD 5 */
54 u16 reserve3;
55 u16 duration;
56} cmpk_txfb_t;
57
58/*
59 * 2. RX side: Interrupt status packet.
60 * It includes Beacon State, Beacon Timer Interrupt
61 * and other useful informations in MAC ISR Reg.
62 */
63typedef struct tag_cmd_pkt_interrupt_status {
64 u8 element_id; /* Command packet type. */
65 u8 length; /* Command packet length. */
66 u16 reserve;
67 u32 interrupt_status; /* Interrupt Status. */
68} cmpk_intr_sta_t;
69
70
71/*
72 * 3. TX side: Set configuration packet.
73 */
74typedef struct tag_cmd_pkt_set_configuration {
75 u8 element_id; /* Command packet type. */
76 u8 length; /* Command packet length. */
95 u16 reserve1; 77 u16 reserve1;
96 u8 length; // Command packet length 78 u8 cfg_reserve1:3;
97 u8 element_id; // Command packet type 79 u8 cfg_size:2; /* Configuration info. */
98 80 u8 cfg_type:2; /* Configuration info. */
99 // DW 1 81 u8 cfg_action:1; /* Configuration info. */
100 u16 txfail; // Tx Fail count 82 u8 cfg_reserve2; /* Configuration info. */
101 u16 txok; // Tx ok count 83 u8 cfg_page:4; /* Configuration info. */
102 84 u8 cfg_reserve3:4; /* Configuration info. */
103 // DW 2 85 u8 cfg_offset; /* Configuration info. */
104 u16 txmcok; // tx multicast 86 u32 value;
105 u16 txretry; // Tx Retry count 87 u32 mask;
106 88} cmpk_set_cfg_t;
107 // DW 3 89
108 u16 txucok; // tx unicast 90/*
109 u16 txbcok; // tx broadcast 91 * 4. Both side : TX/RX query configuraton packet.
110 92 * The query structure is the same as set configuration.
111 // DW 4 93 */
112 u16 txbcfail; // 94#define cmpk_query_cfg_t cmpk_set_cfg_t
113 u16 txmcfail; //
114
115 // DW 5
116 u16 reserve2; //
117 u16 txucfail; //
118
119 // DW 6-8
120 u32 txmclength;
121 u32 txbclength;
122 u32 txuclength;
123
124 // DW 9
125 u16 reserve3_23;
126 u8 reserve3_1;
127 u8 rate;
128}__attribute__((packed)) cmpk_tx_status_t;
129
130/* 6. Debug feedback message. */
131/* 2007/10/23 MH Define RX debug message */
132typedef struct tag_rx_debug_message_feedback
133{
134 // For endian transfer --> for driver
135 // DW 0
136 u16 reserve1;
137 u8 length; // Command packet length
138 u8 element_id; // Command packet type
139
140 // DW 1-??
141 // Variable debug message.
142
143}cmpk_rx_dbginfo_t;
144
145/* 2008/03/20 MH Define transmit rate history. For big endian format. */
146typedef struct tag_tx_rate_history
147{
148 // For endian transfer --> for driver
149 // DW 0
150 u8 element_id; // Command packet type
151 u8 length; // Command packet length
152 u16 reserved1;
153
154 // DW 1-2 CCK rate counter
155 u16 cck[4];
156
157 // DW 3-6
158 u16 ofdm[8];
159
160 // DW 7-14
161 //UINT16 MCS_BW0_SG0[16];
162
163 // DW 15-22
164 //UINT16 MCS_BW1_SG0[16];
165
166 // DW 23-30
167 //UINT16 MCS_BW0_SG1[16];
168
169 // DW 31-38
170 //UINT16 MCS_BW1_SG1[16];
171
172 // DW 7-14 BW=0 SG=0
173 // DW 15-22 BW=1 SG=0
174 // DW 23-30 BW=0 SG=1
175 // DW 31-38 BW=1 SG=1
176 u16 ht_mcs[4][16];
177
178}__attribute__((packed)) cmpk_tx_rahis_t;
179 95
180typedef enum tag_command_packet_directories 96/*
181{ 97 * 5. Multi packet feedback status.
98 */
99typedef struct tag_tx_stats_feedback {
100 /*
101 * For endian transfer
102 * Driver will not the same as firmware structure.
103 */
104 /* DW 0 */
105 u16 reserve1;
106 u8 length; /* Command packet length */
107 u8 element_id; /* Command packet type */
108
109 /* DW 1 */
110 u16 txfail; /* Tx Fail count */
111 u16 txok; /* Tx ok count */
112
113 /* DW 2 */
114 u16 txmcok; /* tx multicast */
115 u16 txretry; /* Tx Retry count */
116
117 /* DW 3 */
118 u16 txucok; /* tx unicast */
119 u16 txbcok; /* tx broadcast */
120
121 /* DW 4 */
122 u16 txbcfail;
123 u16 txmcfail;
124
125 /* DW 5 */
126 u16 reserve2;
127 u16 txucfail;
128
129 /* DW 6-8 */
130 u32 txmclength;
131 u32 txbclength;
132 u32 txuclength;
133
134 /* DW 9 */
135 u16 reserve3_23;
136 u8 reserve3_1;
137 u8 rate;
138} __attribute__((packed)) cmpk_tx_status_t;
139
140/*
141 * 6. Debug feedback message.
142 */
143typedef struct tag_rx_debug_message_feedback {
144 /* For endian transfer --> for driver */
145 /* DW 0 */
146 u16 reserve1;
147 u8 length; /* Command packet length */
148 u8 element_id; /* Command packet type */
149} cmpk_rx_dbginfo_t;
150
151/*
152 * Define transmit rate history. For big endian format.
153 */
154typedef struct tag_tx_rate_history {
155 /* For endian transfer --> for driver */
156 /* DW 0 */
157 u8 element_id; /* Command packet type */
158 u8 length; /* Command packet length */
159 u16 reserved1;
160 /* DW 1-2 CCK rate counter */
161 u16 cck[4];
162 /* DW 3-6 */
163 u16 ofdm[8];
164 u16 ht_mcs[4][16];
165} __attribute__((packed)) cmpk_tx_rahis_t;
166
167typedef enum tag_command_packet_directories {
182 RX_TX_FEEDBACK = 0, 168 RX_TX_FEEDBACK = 0,
183 RX_INTERRUPT_STATUS = 1, 169 RX_INTERRUPT_STATUS = 1,
184 TX_SET_CONFIG = 2, 170 TX_SET_CONFIG = 2,
185 BOTH_QUERY_CONFIG = 3, 171 BOTH_QUERY_CONFIG = 3,
186 RX_TX_STATUS = 4, 172 RX_TX_STATUS = 4,
187 RX_DBGINFO_FEEDBACK = 5, 173 RX_DBGINFO_FEEDBACK = 5,
188 RX_TX_PER_PKT_FEEDBACK = 6, 174 RX_TX_PER_PKT_FEEDBACK = 6,
189 RX_TX_RATE_HISTORY = 7, 175 RX_TX_RATE_HISTORY = 7,
190 RX_CMD_ELE_MAX 176 RX_CMD_ELE_MAX
191}cmpk_element_e; 177} cmpk_element_e;
192 178
193extern bool cmpk_message_handle_tx(struct net_device *dev, u8* codevirtualaddress, u32 packettype, u32 buffer_len); 179extern bool cmpk_message_handle_tx(struct net_device *dev,
180 u8 *codevirtualaddress,
181 u32 packettype,
182 u32 buffer_len);
194 183
195extern u32 cmpk_message_handle_rx(struct net_device *dev, struct ieee80211_rx_stats * pstats); 184extern u32 cmpk_message_handle_rx(struct net_device *dev,
196extern bool SendTxCommandPacket( struct net_device *dev, void* pData, u32 DataLen); 185 struct ieee80211_rx_stats *pstats);
197 186
187extern bool SendTxCommandPacket(struct net_device *dev,
188 void *pData,
189 u32 DataLen);
198 190
199#endif 191#endif
diff --git a/drivers/staging/rtl8192u/dot11d.h b/drivers/staging/rtl8192u/dot11d.h
index 15b7a4ba37b6..0851b9db17a6 100644
--- a/drivers/staging/rtl8192u/dot11d.h
+++ b/drivers/staging/rtl8192u/dot11d.h
@@ -4,44 +4,44 @@
4#ifdef ENABLE_DOT11D 4#ifdef ENABLE_DOT11D
5#include "ieee80211.h" 5#include "ieee80211.h"
6 6
7//#define ENABLE_DOT11D
8
9//#define DOT11D_MAX_CHNL_NUM 83
10 7
11typedef struct _CHNL_TXPOWER_TRIPLE { 8typedef struct _CHNL_TXPOWER_TRIPLE {
12 u8 FirstChnl; 9 u8 FirstChnl;
13 u8 NumChnls; 10 u8 NumChnls;
14 u8 MaxTxPowerInDbm; 11 u8 MaxTxPowerInDbm;
15}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE; 12} CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
16 13
17typedef enum _DOT11D_STATE { 14typedef enum _DOT11D_STATE {
18 DOT11D_STATE_NONE = 0, 15 DOT11D_STATE_NONE = 0,
19 DOT11D_STATE_LEARNED, 16 DOT11D_STATE_LEARNED,
20 DOT11D_STATE_DONE, 17 DOT11D_STATE_DONE,
21}DOT11D_STATE; 18} DOT11D_STATE;
22 19
23typedef struct _RT_DOT11D_INFO { 20typedef struct _RT_DOT11D_INFO {
24 //DECLARE_RT_OBJECT(RT_DOT11D_INFO); 21 /* DECLARE_RT_OBJECT(RT_DOT11D_INFO); */
25 22
26 bool bEnabled; // dot11MultiDomainCapabilityEnabled 23 bool bEnabled; /* dot11MultiDomainCapabilityEnabled */
27 24
28 u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element. 25 u16 CountryIeLen; /* > 0 if CountryIeBuf[] contains valid country information element. */
29 u8 CountryIeBuf[MAX_IE_LEN]; 26 u8 CountryIeBuf[MAX_IE_LEN];
30 u8 CountryIeSrcAddr[6]; // Source AP of the country IE. 27 u8 CountryIeSrcAddr[6]; /* Source AP of the country IE. */
31 u8 CountryIeWatchdog; 28 u8 CountryIeWatchdog;
32 29
33 u8 channel_map[MAX_CHANNEL_NUMBER+1]; //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan) 30 u8 channel_map[MAX_CHANNEL_NUMBER+1]; /* !Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan) */
34 //u8 ChnlListLen; // #Bytes valid in ChnlList[].
35 //u8 ChnlList[DOT11D_MAX_CHNL_NUM];
36 u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1]; 31 u8 MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
37 32
38 DOT11D_STATE State; 33 DOT11D_STATE State;
39}RT_DOT11D_INFO, *PRT_DOT11D_INFO; 34} RT_DOT11D_INFO, *PRT_DOT11D_INFO;
40#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) 35#define eqMacAddr(a, b) (((a)[0] == (b)[0] && \
41#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) 36 (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && \
37 (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
38#define cpMacAddr(des, src) ((des)[0] = (src)[0], \
39 (des)[1] = (src)[1], (des)[2] = (src)[2], \
40 (des)[3] = (src)[3], (des)[4] = (src)[4], \
41 (des)[5] = (src)[5])
42#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo)) 42#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
43 43
44#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled 44#define IS_DOT11D_ENABLE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->bEnabled)
45#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0) 45#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
46 46
47#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) 47#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
@@ -53,9 +53,9 @@ typedef struct _RT_DOT11D_INFO {
53 (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length))) 53 (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
54 54
55#define CIE_WATCHDOG_TH 1 55#define CIE_WATCHDOG_TH 1
56#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog 56#define GET_CIE_WATCHDOG(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog)
57#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0 57#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
58#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev) 58#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev))
59 59
60#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE) 60#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
61 61
@@ -73,9 +73,9 @@ Dot11d_Reset(
73void 73void
74Dot11d_UpdateCountryIe( 74Dot11d_UpdateCountryIe(
75 struct ieee80211_device *dev, 75 struct ieee80211_device *dev,
76 u8 * pTaddr, 76 u8 *pTaddr,
77 u16 CoutryIeLen, 77 u16 CoutryIeLen,
78 u8 * pCoutryIe 78 u8 *pCoutryIe
79 ); 79 );
80 80
81u8 81u8
@@ -86,17 +86,17 @@ DOT11D_GetMaxTxPwrInDbm(
86 86
87void 87void
88DOT11D_ScanComplete( 88DOT11D_ScanComplete(
89 struct ieee80211_device * dev 89 struct ieee80211_device *dev
90 ); 90 );
91 91
92int IsLegalChannel( 92int IsLegalChannel(
93 struct ieee80211_device * dev, 93 struct ieee80211_device *dev,
94 u8 channel 94 u8 channel
95); 95);
96 96
97int ToLegalChannel( 97int ToLegalChannel(
98 struct ieee80211_device * dev, 98 struct ieee80211_device *dev,
99 u8 channel 99 u8 channel
100); 100);
101#endif //ENABLE_DOT11D 101#endif /* ENABLE_DOT11D */
102#endif // #ifndef __INC_DOT11D_H 102#endif /* #ifndef __INC_DOT11D_H */
diff --git a/drivers/staging/rtl8192u/ieee80211.h b/drivers/staging/rtl8192u/ieee80211.h
index 9d05ed6791ee..9c726113214d 100644
--- a/drivers/staging/rtl8192u/ieee80211.h
+++ b/drivers/staging/rtl8192u/ieee80211.h
@@ -58,12 +58,12 @@
58 * 58 *
59 */ 59 */
60#define container_of(ptr, type, member) ({ \ 60#define container_of(ptr, type, member) ({ \
61 const typeof( ((type *)0)->member ) *__mptr = (ptr); \ 61 const typeof(((type *)0)->member) (*__mptr = (ptr)); \
62 (type *)( (char *)__mptr - offsetof(type,member) );}) 62 (type *)((char *)__mptr - offsetof(type, member)); })
63#endif 63#endif
64 64
65#define KEY_TYPE_NA 0x0 65#define KEY_TYPE_NA 0x0
66#define KEY_TYPE_WEP40 0x1 66#define KEY_TYPE_WEP40 0x1
67#define KEY_TYPE_TKIP 0x2 67#define KEY_TYPE_TKIP 0x2
68#define KEY_TYPE_CCMP 0x4 68#define KEY_TYPE_CCMP 0x4
69#define KEY_TYPE_WEP104 0x5 69#define KEY_TYPE_WEP104 0x5
@@ -71,9 +71,9 @@
71/* added for rtl819x tx procedure */ 71/* added for rtl819x tx procedure */
72#define MAX_QUEUE_SIZE 0x10 72#define MAX_QUEUE_SIZE 0x10
73 73
74// 74/*
75// 8190 queue mapping 75 * 8190 queue mapping
76// 76 */
77#define BK_QUEUE 0 77#define BK_QUEUE 0
78#define BE_QUEUE 1 78#define BE_QUEUE 1
79#define VI_QUEUE 2 79#define VI_QUEUE 2
@@ -87,13 +87,13 @@
87#define LOW_QUEUE BE_QUEUE 87#define LOW_QUEUE BE_QUEUE
88#define NORMAL_QUEUE MGNT_QUEUE 88#define NORMAL_QUEUE MGNT_QUEUE
89 89
90//added by amy for ps 90/* added by amy for ps */
91#define SWRF_TIMEOUT 50 91#define SWRF_TIMEOUT 50
92 92
93//added by amy for LEAP related 93/* added by amy for LEAP related */
94#define IE_CISCO_FLAG_POSITION 0x08 // Flag byte: byte 8, numbered from 0. 94#define IE_CISCO_FLAG_POSITION 0x08 /* Flag byte: byte 8, numbered from 0. */
95#define SUPPORT_CKIP_MIC 0x08 // bit3 95#define SUPPORT_CKIP_MIC 0x08 /* bit3 */
96#define SUPPORT_CKIP_PK 0x10 // bit4 96#define SUPPORT_CKIP_PK 0x10 /* bit4 */
97/* defined for skb cb field */ 97/* defined for skb cb field */
98/* At most 28 byte */ 98/* At most 28 byte */
99typedef struct cb_desc { 99typedef struct cb_desc {
@@ -105,7 +105,7 @@ typedef struct cb_desc {
105 u8 bEncrypt:1; 105 u8 bEncrypt:1;
106 u8 bTxDisableRateFallBack:1; 106 u8 bTxDisableRateFallBack:1;
107 u8 bTxUseDriverAssingedRate:1; 107 u8 bTxUseDriverAssingedRate:1;
108 u8 bHwSec:1; //indicate whether use Hw security. WB 108 u8 bHwSec:1; /* indicate whether use Hw security. WB */
109 109
110 u8 reserved1; 110 u8 reserved1;
111 111
@@ -125,17 +125,13 @@ typedef struct cb_desc {
125 u8 bRTSUseShortGI:1; 125 u8 bRTSUseShortGI:1;
126 u8 bMulticast:1; 126 u8 bMulticast:1;
127 u8 bBroadcast:1; 127 u8 bBroadcast:1;
128 //u8 reserved2:2;
129 u8 drv_agg_enable:1; 128 u8 drv_agg_enable:1;
130 u8 reserved2:1; 129 u8 reserved2:1;
131 130
132 /* Tx Desc related element(12-19) */ 131 /* Tx Desc related element(12-19) */
133 u8 rata_index; 132 u8 rata_index;
134 u8 queue_index; 133 u8 queue_index;
135 //u8 reserved3;
136 //u8 reserved4;
137 u16 txbuf_size; 134 u16 txbuf_size;
138 //u8 reserved5;
139 u8 RATRIndex; 135 u8 RATRIndex;
140 u8 reserved6; 136 u8 reserved6;
141 u8 reserved7; 137 u8 reserved7;
@@ -146,13 +142,10 @@ typedef struct cb_desc {
146 u8 rts_rate; 142 u8 rts_rate;
147 u8 ampdu_factor; 143 u8 ampdu_factor;
148 u8 ampdu_density; 144 u8 ampdu_density;
149 //u8 reserved9;
150 //u8 reserved10;
151 //u8 reserved11;
152 u8 DrvAggrNum; 145 u8 DrvAggrNum;
153 u16 pkt_size; 146 u16 pkt_size;
154 u8 reserved12; 147 u8 reserved12;
155}cb_desc, *pcb_desc; 148} cb_desc, *pcb_desc;
156 149
157/*--------------------------Define -------------------------------------------*/ 150/*--------------------------Define -------------------------------------------*/
158#define MGN_1M 0x02 151#define MGN_1M 0x02
@@ -186,9 +179,9 @@ typedef struct cb_desc {
186#define MGN_MCS14 0x8e 179#define MGN_MCS14 0x8e
187#define MGN_MCS15 0x8f 180#define MGN_MCS15 0x8f
188 181
189//---------------------------------------------------------------------------- 182/*
190// 802.11 Management frame Reason Code field 183 * 802.11 Management frame Reason Code field
191//---------------------------------------------------------------------------- 184 */
192enum _ReasonCode{ 185enum _ReasonCode{
193 unspec_reason = 0x1, 186 unspec_reason = 0x1,
194 auth_not_valid = 0x2, 187 auth_not_valid = 0x2,
@@ -200,11 +193,11 @@ enum _ReasonCode{
200 disas_lv_ss = 0x8, 193 disas_lv_ss = 0x8,
201 asoc_not_auth = 0x9, 194 asoc_not_auth = 0x9,
202 195
203 //----MIC_CHECK 196 /* ----MIC_CHECK */
204 mic_failure = 0xe, 197 mic_failure = 0xe,
205 //----END MIC_CHECK 198 /* ----END MIC_CHECK */
206 199
207 // Reason code defined in 802.11i D10.0 p.28. 200 /* Reason code defined in 802.11i D10.0 p.28. */
208 invalid_IE = 0x0d, 201 invalid_IE = 0x0d,
209 four_way_tmout = 0x0f, 202 four_way_tmout = 0x0f,
210 two_way_tmout = 0x10, 203 two_way_tmout = 0x10,
@@ -214,27 +207,29 @@ enum _ReasonCode{
214 invalid_AKMP = 0x14, 207 invalid_AKMP = 0x14,
215 unsup_RSNIEver = 0x15, 208 unsup_RSNIEver = 0x15,
216 invalid_RSNIE = 0x16, 209 invalid_RSNIE = 0x16,
217 auth_802_1x_fail= 0x17, 210 auth_802_1x_fail = 0x17,
218 ciper_reject = 0x18, 211 ciper_reject = 0x18,
219 212
220 // Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. Added by Annie, 2005-11-15. 213 /* Reason code defined in 7.3.1.7, 802.1e D13.0, p.42. */
221 QoS_unspec = 0x20, // 32 214 QoS_unspec = 0x20, /* 32 */
222 QAP_bandwidth = 0x21, // 33 215 QAP_bandwidth = 0x21, /* 33 */
223 poor_condition = 0x22, // 34 216 poor_condition = 0x22, /* 34 */
224 no_facility = 0x23, // 35 217 no_facility = 0x23, /* 35 */
225 // Where is 36??? 218 /* Where is 36??? */
226 req_declined = 0x25, // 37 219 req_declined = 0x25, /* 37 */
227 invalid_param = 0x26, // 38 220 invalid_param = 0x26, /* 38 */
228 req_not_honored= 0x27, // 39 221 req_not_honored = 0x27, /* 39 */
229 TS_not_created = 0x2F, // 47 222 TS_not_created = 0x2F, /* 47 */
230 DL_not_allowed = 0x30, // 48 223 DL_not_allowed = 0x30, /* 48 */
231 dest_not_exist = 0x31, // 49 224 dest_not_exist = 0x31, /* 49 */
232 dest_not_QSTA = 0x32, // 50 225 dest_not_QSTA = 0x32, /* 50 */
233}; 226};
234 227
235 228
236 229
237#define aSifsTime ((priv->ieee80211->current_network.mode == IEEE_A)||(priv->ieee80211->current_network.mode == IEEE_N_24G)||(priv->ieee80211->current_network.mode == IEEE_N_5G))? 16 : 10 230#define aSifsTime ((priv->ieee80211->current_network.mode == IEEE_A) || \
231 (priv->ieee80211->current_network.mode == IEEE_N_24G) || \
232 (priv->ieee80211->current_network.mode == IEEE_N_5G)) ? 16 : 10
238 233
239#define MGMT_QUEUE_NUM 5 234#define MGMT_QUEUE_NUM 5
240 235
@@ -249,15 +244,12 @@ enum _ReasonCode{
249#define IEEE_PARAM_PRIVACY_INVOKED 4 244#define IEEE_PARAM_PRIVACY_INVOKED 4
250#define IEEE_PARAM_AUTH_ALGS 5 245#define IEEE_PARAM_AUTH_ALGS 5
251#define IEEE_PARAM_IEEE_802_1X 6 246#define IEEE_PARAM_IEEE_802_1X 6
252//It should consistent with the driver_XXX.c 247/* It should consistent with the driver_XXX.c */
253// David, 2006.9.26
254#define IEEE_PARAM_WPAX_SELECT 7 248#define IEEE_PARAM_WPAX_SELECT 7
255//Added for notify the encryption type selection 249/* Added for notify the encryption type selection */
256// David, 2006.9.26
257#define IEEE_PROTO_WPA 1 250#define IEEE_PROTO_WPA 1
258#define IEEE_PROTO_RSN 2 251#define IEEE_PROTO_RSN 2
259//Added for notify the encryption type selection 252/* Added for notify the encryption type selection */
260// David, 2006.9.26
261#define IEEE_WPAX_USEGROUP 0 253#define IEEE_WPAX_USEGROUP 0
262#define IEEE_WPAX_WEP40 1 254#define IEEE_WPAX_WEP40 1
263#define IEEE_WPAX_TKIP 2 255#define IEEE_WPAX_TKIP 2
@@ -284,7 +276,7 @@ enum _ReasonCode{
284 276
285#define MAX_IE_LEN 0xff 277#define MAX_IE_LEN 0xff
286 278
287// added for kernel conflict 279/* added for kernel conflict */
288#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rsl 280#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rsl
289#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rsl 281#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rsl
290#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rsl 282#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rsl
@@ -385,7 +377,7 @@ typedef struct ieee_param {
385 u8 key[0]; 377 u8 key[0];
386 } crypt; 378 } crypt;
387 } u; 379 } u;
388}ieee_param; 380} ieee_param;
389 381
390 382
391#if WIRELESS_EXT < 17 383#if WIRELESS_EXT < 17
@@ -398,7 +390,7 @@ typedef struct ieee_param {
398#endif 390#endif
399 391
400 392
401// linux under 2.6.9 release may not support it, so modify it for common use 393/* linux under 2.6.9 release may not support it, so modify it for common use */
402#define MSECS(t) msecs_to_jiffies(t) 394#define MSECS(t) msecs_to_jiffies(t)
403#define msleep_interruptible_rsl msleep_interruptible 395#define msleep_interruptible_rsl msleep_interruptible
404 396
@@ -432,7 +424,7 @@ typedef struct ieee_param {
432#define IEEE80211_FCTL_FRAMETYPE 0x00fc 424#define IEEE80211_FCTL_FRAMETYPE 0x00fc
433#define IEEE80211_FCTL_TODS 0x0100 425#define IEEE80211_FCTL_TODS 0x0100
434#define IEEE80211_FCTL_FROMDS 0x0200 426#define IEEE80211_FCTL_FROMDS 0x0200
435#define IEEE80211_FCTL_DSTODS 0x0300 //added by david 427#define IEEE80211_FCTL_DSTODS 0x0300
436#define IEEE80211_FCTL_MOREFRAGS 0x0400 428#define IEEE80211_FCTL_MOREFRAGS 0x0400
437#define IEEE80211_FCTL_RETRY 0x0800 429#define IEEE80211_FCTL_RETRY 0x0800
438#define IEEE80211_FCTL_PM 0x1000 430#define IEEE80211_FCTL_PM 0x1000
@@ -476,7 +468,7 @@ typedef struct ieee_param {
476#define IEEE80211_STYPE_CFACK 0x0050 468#define IEEE80211_STYPE_CFACK 0x0050
477#define IEEE80211_STYPE_CFPOLL 0x0060 469#define IEEE80211_STYPE_CFPOLL 0x0060
478#define IEEE80211_STYPE_CFACKPOLL 0x0070 470#define IEEE80211_STYPE_CFACKPOLL 0x0070
479#define IEEE80211_STYPE_QOS_DATA 0x0080 //added for WMM 2006/8/2 471#define IEEE80211_STYPE_QOS_DATA 0x0080
480#define IEEE80211_STYPE_QOS_NULL 0x00C0 472#define IEEE80211_STYPE_QOS_NULL 0x00C0
481 473
482#define IEEE80211_SCTL_FRAG 0x000F 474#define IEEE80211_SCTL_FRAG 0x000F
@@ -486,12 +478,12 @@ typedef struct ieee_param {
486#define IEEE80211_QCTL_TID 0x000F 478#define IEEE80211_QCTL_TID 0x000F
487 479
488#define FC_QOS_BIT BIT7 480#define FC_QOS_BIT BIT7
489#define IsDataFrame(pdu) ( ((pdu[0] & 0x0C)==0x08) ? true : false ) 481#define IsDataFrame(pdu) (((pdu[0] & 0x0C) == 0x08) ? true : false)
490#define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT)) ) 482#define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT)))
491//added by wb. Is this right? 483
492#define IsQoSDataFrame(pframe) ((*(u16*)pframe&(IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA)) == (IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA)) 484#define IsQoSDataFrame(pframe) ((*(u16 *)pframe&(IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA)) == (IEEE80211_STYPE_QOS_DATA|IEEE80211_FTYPE_DATA))
493#define Frame_Order(pframe) (*(u16*)pframe&IEEE80211_FCTL_ORDER) 485#define Frame_Order(pframe) (*(u16 *)pframe&IEEE80211_FCTL_ORDER)
494#define SN_LESS(a, b) (((a-b)&0x800)!=0) 486#define SN_LESS(a, b) (((a-b)&0x800) != 0)
495#define SN_EQUAL(a, b) (a == b) 487#define SN_EQUAL(a, b) (a == b)
496#define MAX_DEV_ADDR_SIZE 8 488#define MAX_DEV_ADDR_SIZE 8
497typedef enum _ACT_CATEGORY{ 489typedef enum _ACT_CATEGORY{
@@ -516,10 +508,10 @@ typedef enum _BA_ACTION{
516} BA_ACTION, *PBA_ACTION; 508} BA_ACTION, *PBA_ACTION;
517 509
518typedef enum _InitialGainOpType{ 510typedef enum _InitialGainOpType{
519 IG_Backup=0, 511 IG_Backup = 0,
520 IG_Restore, 512 IG_Restore,
521 IG_Max 513 IG_Max
522}InitialGainOpType; 514} InitialGainOpType;
523 515
524/* debug macros */ 516/* debug macros */
525#define CONFIG_IEEE80211_DEBUG 517#define CONFIG_IEEE80211_DEBUG
@@ -528,25 +520,26 @@ extern u32 ieee80211_debug_level;
528#define IEEE80211_DEBUG(level, fmt, args...) \ 520#define IEEE80211_DEBUG(level, fmt, args...) \
529do { if (ieee80211_debug_level & (level)) \ 521do { if (ieee80211_debug_level & (level)) \
530 printk(KERN_DEBUG "ieee80211: " fmt, ## args); } while (0) 522 printk(KERN_DEBUG "ieee80211: " fmt, ## args); } while (0)
531//wb added to debug out data buf 523/* wb added to debug out data buf
532//if you want print DATA buffer related BA, please set ieee80211_debug_level to DATA|BA 524 * if you want print DATA buffer related BA, please set ieee80211_debug_level
525 * to DATA|BA
526 */
533#define IEEE80211_DEBUG_DATA(level, data, datalen) \ 527#define IEEE80211_DEBUG_DATA(level, data, datalen) \
534 do{ if ((ieee80211_debug_level & (level)) == (level)) \ 528 do { if ((ieee80211_debug_level & (level)) == (level)) { \
535 { \
536 int i; \ 529 int i; \
537 u8* pdata = (u8*) data; \ 530 u8* pdata = (u8 *) data; \
538 printk(KERN_DEBUG "ieee80211: %s()\n", __FUNCTION__); \ 531 printk(KERN_DEBUG "ieee80211: %s()\n", __FUNCTION__); \
539 for(i=0; i<(int)(datalen); i++) \ 532 for (i = 0; i < (int)(datalen); i++) { \
540 { \
541 printk("%2x ", pdata[i]); \ 533 printk("%2x ", pdata[i]); \
542 if ((i+1)%16 == 0) printk("\n"); \ 534 if ((i+1)%16 == 0) \
543 } \ 535 printk("\n"); \
536 } \
544 printk("\n"); \ 537 printk("\n"); \
545 } \ 538 } \
546 } while (0) 539 } while (0)
547#else 540#else
548#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0) 541#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
549#define IEEE80211_DEBUG_DATA(level, data, datalen) do {} while(0) 542#define IEEE80211_DEBUG_DATA(level, data, datalen) do {} while (0)
550#endif /* CONFIG_IEEE80211_DEBUG */ 543#endif /* CONFIG_IEEE80211_DEBUG */
551 544
552/* debug macros not dependent on CONFIG_IEEE80211_DEBUG */ 545/* debug macros not dependent on CONFIG_IEEE80211_DEBUG */
@@ -589,16 +582,16 @@ do { if (ieee80211_debug_level & (level)) \
589#define IEEE80211_DL_TX (1<<8) 582#define IEEE80211_DL_TX (1<<8)
590#define IEEE80211_DL_RX (1<<9) 583#define IEEE80211_DL_RX (1<<9)
591 584
592#define IEEE80211_DL_HT (1<<10) //HT 585#define IEEE80211_DL_HT (1<<10) /* HT */
593#define IEEE80211_DL_BA (1<<11) //ba 586#define IEEE80211_DL_BA (1<<11) /* ba */
594#define IEEE80211_DL_TS (1<<12) //TS 587#define IEEE80211_DL_TS (1<<12) /* TS */
595#define IEEE80211_DL_QOS (1<<13) 588#define IEEE80211_DL_QOS (1<<13)
596#define IEEE80211_DL_REORDER (1<<14) 589#define IEEE80211_DL_REORDER (1<<14)
597#define IEEE80211_DL_IOT (1<<15) 590#define IEEE80211_DL_IOT (1<<15)
598#define IEEE80211_DL_IPS (1<<16) 591#define IEEE80211_DL_IPS (1<<16)
599#define IEEE80211_DL_TRACE (1<<29) //trace function, need to user net_ratelimit() together in order not to print too much to the screen 592#define IEEE80211_DL_TRACE (1<<29) /* trace function, need to user net_ratelimit() together in order not to print too much to the screen */
600#define IEEE80211_DL_DATA (1<<30) //use this flag to control whether print data buf out. 593#define IEEE80211_DL_DATA (1<<30) /* use this flag to control whether print data buf out. */
601#define IEEE80211_DL_ERR (1<<31) //always open 594#define IEEE80211_DL_ERR (1<<31) /* always open */
602#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a) 595#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
603#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a) 596#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
604#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a) 597#define IEEE80211_DEBUG_INFO(f, a...) IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
@@ -618,18 +611,17 @@ do { if (ieee80211_debug_level & (level)) \
618/* Added by Annie, 2005-11-22. */ 611/* Added by Annie, 2005-11-22. */
619#define MAX_STR_LEN 64 612#define MAX_STR_LEN 64
620/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/ 613/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
621#define PRINTABLE(_ch) (_ch>'!' && _ch<'~') 614#define PRINTABLE(_ch) (_ch > '!' && _ch < '~')
622#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \ 615#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
623 if((_Comp) & level) \ 616 if ((_Comp) & level) { \
624 { \
625 int __i; \ 617 int __i; \
626 u8 buffer[MAX_STR_LEN]; \ 618 u8 buffer[MAX_STR_LEN]; \
627 int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \ 619 int length = (_Len < MAX_STR_LEN) ? _Len : (MAX_STR_LEN - 1); \
628 memset(buffer, 0, MAX_STR_LEN); \ 620 memset(buffer, 0, MAX_STR_LEN); \
629 memcpy(buffer, (u8 *)_Ptr, length ); \ 621 memcpy(buffer, (u8 *)_Ptr, length); \
630 for( __i=0; __i<MAX_STR_LEN; __i++ ) \ 622 for (__i = 0; __i < MAX_STR_LEN; __i++) { \
631 { \ 623 if (!PRINTABLE(buffer[__i])) \
632 if( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \ 624 buffer[__i] = '?'; \
633 } \ 625 } \
634 buffer[length] = '\0'; \ 626 buffer[length] = '\0'; \
635 printk("Rtl819x: "); \ 627 printk("Rtl819x: "); \
@@ -644,9 +636,9 @@ do { if (ieee80211_debug_level & (level)) \
644#include <linux/if_arp.h> /* ARPHRD_ETHER */ 636#include <linux/if_arp.h> /* ARPHRD_ETHER */
645 637
646#ifndef WIRELESS_SPY 638#ifndef WIRELESS_SPY
647#define WIRELESS_SPY // enable iwspy support 639#define WIRELESS_SPY /* enable iwspy support */
648#endif 640#endif
649#include <net/iw_handler.h> // new driver API 641#include <net/iw_handler.h> /* new driver API */
650 642
651#ifndef ETH_P_PAE 643#ifndef ETH_P_PAE
652#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ 644#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
@@ -873,29 +865,28 @@ struct ieee80211_rx_stats {
873 u32 beacon_time; 865 u32 beacon_time;
874 u8 nic_type; 866 u8 nic_type;
875 u16 Length; 867 u16 Length;
876 // u8 DataRate; // In 0.5 Mbps 868 u8 SignalQuality; /* in 0-100 index. */
877 u8 SignalQuality; // in 0-100 index. 869 s32 RecvSignalPower; /* Real power in dBm for this packet, no beautification and aggregation. */
878 s32 RecvSignalPower; // Real power in dBm for this packet, no beautification and aggregation. 870 s8 RxPower; /* in dBm Translate from PWdB */
879 s8 RxPower; // in dBm Translate from PWdB 871 u8 SignalStrength; /* in 0-100 index. */
880 u8 SignalStrength; // in 0-100 index.
881 u16 bHwError:1; 872 u16 bHwError:1;
882 u16 bCRC:1; 873 u16 bCRC:1;
883 u16 bICV:1; 874 u16 bICV:1;
884 u16 bShortPreamble:1; 875 u16 bShortPreamble:1;
885 u16 Antenna:1; //for rtl8185 876 u16 Antenna:1; /* for rtl8185 */
886 u16 Decrypted:1; //for rtl8185, rtl8187 877 u16 Decrypted:1; /* for rtl8185, rtl8187 */
887 u16 Wakeup:1; //for rtl8185 878 u16 Wakeup:1; /* for rtl8185 */
888 u16 Reserved0:1; //for rtl8185 879 u16 Reserved0:1; /* for rtl8185 */
889 u8 AGC; 880 u8 AGC;
890 u32 TimeStampLow; 881 u32 TimeStampLow;
891 u32 TimeStampHigh; 882 u32 TimeStampHigh;
892 bool bShift; 883 bool bShift;
893 bool bIsQosData; // Added by Annie, 2005-12-22. 884 bool bIsQosData;
894 u8 UserPriority; 885 u8 UserPriority;
895 886
896 //1!!!!!!!!!!!!!!!!!!!!!!!!!!! 887 /*
897 //1Attention Please!!!<11n or 8190 specific code should be put below this line> 888 * 1Attention Please!!!<11n or 8190 specific code should be put below this line>
898 //1!!!!!!!!!!!!!!!!!!!!!!!!!!! 889 */
899 890
900 u8 RxDrvInfoSize; 891 u8 RxDrvInfoSize;
901 u8 RxBufShift; 892 u8 RxBufShift;
@@ -904,21 +895,20 @@ struct ieee80211_rx_stats {
904 bool bContainHTC; 895 bool bContainHTC;
905 bool RxIs40MHzPacket; 896 bool RxIs40MHzPacket;
906 u32 RxPWDBAll; 897 u32 RxPWDBAll;
907 u8 RxMIMOSignalStrength[4]; // in 0~100 index 898 u8 RxMIMOSignalStrength[4]; /* in 0~100 index */
908 s8 RxMIMOSignalQuality[2]; 899 s8 RxMIMOSignalQuality[2];
909 bool bPacketMatchBSSID; 900 bool bPacketMatchBSSID;
910 bool bIsCCK; 901 bool bIsCCK;
911 bool bPacketToSelf; 902 bool bPacketToSelf;
912 //added by amy 903 u8 *virtual_address;
913 u8* virtual_address; 904 u16 packetlength; /* Total packet length: Must equal to sum of all FragLength */
914 u16 packetlength; // Total packet length: Must equal to sum of all FragLength 905 u16 fraglength; /* FragLength should equal to PacketLength in non-fragment case */
915 u16 fraglength; // FragLength should equal to PacketLength in non-fragment case 906 u16 fragoffset; /* Data offset for this fragment */
916 u16 fragoffset; // Data offset for this fragment
917 u16 ntotalfrag; 907 u16 ntotalfrag;
918 bool bisrxaggrsubframe; 908 bool bisrxaggrsubframe;
919 bool bPacketBeacon; //cosa add for rssi 909 bool bPacketBeacon; /* cosa add for rssi */
920 bool bToSelfBA; //cosa add for rssi 910 bool bToSelfBA; /* cosa add for rssi */
921 char cck_adc_pwdb[4]; //cosa add for rx path selection 911 char cck_adc_pwdb[4]; /* cosa add for rx path selection */
922 u16 Seq_Num; 912 u16 Seq_Num;
923 913
924}; 914};
@@ -1045,9 +1035,9 @@ enum ieee80211_mfie {
1045 MFIE_TYPE_ERP = 42, 1035 MFIE_TYPE_ERP = 42,
1046 MFIE_TYPE_RSN = 48, 1036 MFIE_TYPE_RSN = 48,
1047 MFIE_TYPE_RATES_EX = 50, 1037 MFIE_TYPE_RATES_EX = 50,
1048 MFIE_TYPE_HT_CAP= 45, 1038 MFIE_TYPE_HT_CAP = 45,
1049 MFIE_TYPE_HT_INFO= 61, 1039 MFIE_TYPE_HT_INFO = 61,
1050 MFIE_TYPE_AIRONET=133, 1040 MFIE_TYPE_AIRONET = 133,
1051 MFIE_TYPE_GENERIC = 221, 1041 MFIE_TYPE_GENERIC = 221,
1052 MFIE_TYPE_QOS_PARAMETER = 222, 1042 MFIE_TYPE_QOS_PARAMETER = 222,
1053}; 1043};
@@ -1199,7 +1189,7 @@ struct ieee80211_txb {
1199struct ieee80211_drv_agg_txb { 1189struct ieee80211_drv_agg_txb {
1200 u8 nr_drv_agg_frames; 1190 u8 nr_drv_agg_frames;
1201 struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT]; 1191 struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
1202}__attribute__((packed)); 1192} __attribute__((packed));
1203 1193
1204#define MAX_SUBFRAME_COUNT 64 1194#define MAX_SUBFRAME_COUNT 64
1205struct ieee80211_rxb { 1195struct ieee80211_rxb {
@@ -1207,7 +1197,7 @@ struct ieee80211_rxb {
1207 struct sk_buff *subframes[MAX_SUBFRAME_COUNT]; 1197 struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
1208 u8 dst[ETH_ALEN]; 1198 u8 dst[ETH_ALEN];
1209 u8 src[ETH_ALEN]; 1199 u8 src[ETH_ALEN];
1210}__attribute__((packed)); 1200} __attribute__((packed));
1211 1201
1212typedef union _frameqos { 1202typedef union _frameqos {
1213 u16 shortdata; 1203 u16 shortdata;
@@ -1218,8 +1208,8 @@ typedef union _frameqos {
1218 u16 ack_policy:2; 1208 u16 ack_policy:2;
1219 u16 reserved:1; 1209 u16 reserved:1;
1220 u16 txop:8; 1210 u16 txop:8;
1221 }field; 1211 } field;
1222}frameqos,*pframeqos; 1212} frameqos, *pframeqos;
1223 1213
1224/* SWEEP TABLE ENTRIES NUMBER*/ 1214/* SWEEP TABLE ENTRIES NUMBER*/
1225#define MAX_SWEEP_TAB_ENTRIES 42 1215#define MAX_SWEEP_TAB_ENTRIES 42
@@ -1234,7 +1224,7 @@ typedef union _frameqos {
1234 1224
1235#define MAX_CHANNEL_NUMBER 161 1225#define MAX_CHANNEL_NUMBER 161
1236#define IEEE80211_SOFTMAC_SCAN_TIME 100 1226#define IEEE80211_SOFTMAC_SCAN_TIME 100
1237//(HZ / 2) 1227/* (HZ / 2) */
1238#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2) 1228#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
1239 1229
1240#define CRC_LENGTH 4U 1230#define CRC_LENGTH 4U
@@ -1310,7 +1300,6 @@ struct ieee80211_tim_parameters {
1310 u8 tim_period; 1300 u8 tim_period;
1311} __attribute__ ((packed)); 1301} __attribute__ ((packed));
1312 1302
1313//#else
1314struct ieee80211_wmm_ac_param { 1303struct ieee80211_wmm_ac_param {
1315 u8 ac_aci_acm_aifsn; 1304 u8 ac_aci_acm_aifsn;
1316 u8 ac_ecwmin_ecwmax; 1305 u8 ac_ecwmin_ecwmax;
@@ -1340,7 +1329,7 @@ struct ieee80211_wmm_tspec_elem {
1340 u32 min_phy_rate; 1329 u32 min_phy_rate;
1341 u16 surp_band_allow; 1330 u16 surp_band_allow;
1342 u16 medium_time; 1331 u16 medium_time;
1343}__attribute__((packed)); 1332} __attribute__((packed));
1344enum eap_type { 1333enum eap_type {
1345 EAP_PACKET = 0, 1334 EAP_PACKET = 0,
1346 EAPOL_START, 1335 EAPOL_START,
@@ -1361,17 +1350,15 @@ static inline const char *eap_get_type(int type)
1361{ 1350{
1362 return ((u32)type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type]; 1351 return ((u32)type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
1363} 1352}
1364//added by amy for reorder 1353static inline u8 Frame_QoSTID(u8 *buf)
1365static inline u8 Frame_QoSTID(u8* buf)
1366{ 1354{
1367 struct ieee80211_hdr_3addr *hdr; 1355 struct ieee80211_hdr_3addr *hdr;
1368 u16 fc; 1356 u16 fc;
1369 hdr = (struct ieee80211_hdr_3addr *)buf; 1357 hdr = (struct ieee80211_hdr_3addr *)buf;
1370 fc = le16_to_cpu(hdr->frame_ctl); 1358 fc = le16_to_cpu(hdr->frame_ctl);
1371 return (u8)((frameqos*)(buf + (((fc & IEEE80211_FCTL_TODS)&&(fc & IEEE80211_FCTL_FROMDS))? 30 : 24)))->field.tid; 1359 return (u8)((frameqos *)(buf + (((fc & IEEE80211_FCTL_TODS) && (fc & IEEE80211_FCTL_FROMDS)) ? 30 : 24)))->field.tid;
1372} 1360}
1373 1361
1374//added by amy for reorder
1375 1362
1376struct eapol { 1363struct eapol {
1377 u8 snap[6]; 1364 u8 snap[6];
@@ -1429,7 +1416,7 @@ struct ieee80211_info_element_hdr {
1429*/ 1416*/
1430 1417
1431#define IEEE80211_DEFAULT_TX_ESSID "Penguin" 1418#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
1432#define IEEE80211_DEFAULT_BASIC_RATE 2 //1Mbps 1419#define IEEE80211_DEFAULT_BASIC_RATE 2 /* 1Mbps */
1433 1420
1434enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame}; 1421enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
1435#define MAX_SP_Len (WMM_all_frame << 4) 1422#define MAX_SP_Len (WMM_all_frame << 4)
@@ -1445,8 +1432,7 @@ enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
1445#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST 1432#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
1446#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST 1433#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
1447 1434
1448//added by David for QoS 2006/6/30 1435
1449//#define WMM_Hang_8187
1450#ifdef WMM_Hang_8187 1436#ifdef WMM_Hang_8187
1451#undef WMM_Hang_8187 1437#undef WMM_Hang_8187
1452#endif 1438#endif
@@ -1461,15 +1447,14 @@ enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
1461 1447
1462#define MAX_RECEIVE_BUFFER_SIZE 9100 1448#define MAX_RECEIVE_BUFFER_SIZE 9100
1463 1449
1464//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP 1450/* UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP */
1465//#define UP2AC(up) ((up<3) ? ((up==0)?1:0) : (up>>1))
1466#define UP2AC(up) ( \ 1451#define UP2AC(up) ( \
1467 ((up) < 1) ? WME_AC_BE : \ 1452 ((up) < 1) ? WME_AC_BE : \
1468 ((up) < 3) ? WME_AC_BK : \ 1453 ((up) < 3) ? WME_AC_BK : \
1469 ((up) < 4) ? WME_AC_BE : \ 1454 ((up) < 4) ? WME_AC_BE : \
1470 ((up) < 6) ? WME_AC_VI : \ 1455 ((up) < 6) ? WME_AC_VI : \
1471 WME_AC_VO) 1456 WME_AC_VO)
1472//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue 1457/* AC Mapping to UP, using in Tx part for selecting the corresponding TX queue */
1473#define AC2UP(_ac) ( \ 1458#define AC2UP(_ac) ( \
1474 ((_ac) == WME_AC_VO) ? 6 : \ 1459 ((_ac) == WME_AC_VO) ? 6 : \
1475 ((_ac) == WME_AC_VI) ? 5 : \ 1460 ((_ac) == WME_AC_VI) ? 5 : \
@@ -1496,19 +1481,19 @@ typedef struct _bss_ht{
1496 1481
1497 bool support_ht; 1482 bool support_ht;
1498 1483
1499 // HT related elements 1484 /* HT related elements */
1500 u8 ht_cap_buf[32]; 1485 u8 ht_cap_buf[32];
1501 u16 ht_cap_len; 1486 u16 ht_cap_len;
1502 u8 ht_info_buf[32]; 1487 u8 ht_info_buf[32];
1503 u16 ht_info_len; 1488 u16 ht_info_len;
1504 1489
1505 HT_SPEC_VER ht_spec_ver; 1490 HT_SPEC_VER ht_spec_ver;
1506 //HT_CAPABILITY_ELE bdHTCapEle; 1491 /* HT_CAPABILITY_ELE bdHTCapEle; */
1507 //HT_INFORMATION_ELE bdHTInfoEle; 1492 /* HT_INFORMATION_ELE bdHTInfoEle; */
1508 1493
1509 bool aggregation; 1494 bool aggregation;
1510 bool long_slot_time; 1495 bool long_slot_time;
1511}bss_ht, *pbss_ht; 1496} bss_ht, *pbss_ht;
1512 1497
1513typedef enum _erp_t{ 1498typedef enum _erp_t{
1514 ERP_NonERPpresent = 0x01, 1499 ERP_NonERPpresent = 0x01,
@@ -1525,16 +1510,15 @@ struct ieee80211_network {
1525 u8 ssid[IW_ESSID_MAX_SIZE + 1]; 1510 u8 ssid[IW_ESSID_MAX_SIZE + 1];
1526 u8 ssid_len; 1511 u8 ssid_len;
1527 struct ieee80211_qos_data qos_data; 1512 struct ieee80211_qos_data qos_data;
1528 //added by amy for LEAP
1529 bool bWithAironetIE; 1513 bool bWithAironetIE;
1530 bool bCkipSupported; 1514 bool bCkipSupported;
1531 bool bCcxRmEnable; 1515 bool bCcxRmEnable;
1532 u16 CcxRmState[2]; 1516 u16 CcxRmState[2];
1533 // CCXv4 S59, MBSSID. 1517 /* CCXv4 S59, MBSSID. */
1534 bool bMBssidValid; 1518 bool bMBssidValid;
1535 u8 MBssidMask; 1519 u8 MBssidMask;
1536 u8 MBssid[6]; 1520 u8 MBssid[6];
1537 // CCX 2 S38, WLAN Device Version Number element. Annie, 2006-08-20. 1521 /* CCX 2 S38, WLAN Device Version Number element. */
1538 bool bWithCcxVerNum; 1522 bool bWithCcxVerNum;
1539 u8 BssCcxVerNumber; 1523 u8 BssCcxVerNumber;
1540 /* These are network statistics */ 1524 /* These are network statistics */
@@ -1563,29 +1547,28 @@ struct ieee80211_network {
1563 u8 dtim_data; 1547 u8 dtim_data;
1564 u32 last_dtim_sta_time[2]; 1548 u32 last_dtim_sta_time[2];
1565 1549
1566 //appeded for QoS 1550 /* appeded for QoS */
1567 u8 wmm_info; 1551 u8 wmm_info;
1568 struct ieee80211_wmm_ac_param wmm_param[4]; 1552 struct ieee80211_wmm_ac_param wmm_param[4];
1569 u8 QoS_Enable; 1553 u8 QoS_Enable;
1570#ifdef THOMAS_TURBO 1554#ifdef THOMAS_TURBO
1571 u8 Turbo_Enable;//enable turbo mode, added by thomas 1555 u8 Turbo_Enable;/* enable turbo mode, added by thomas */
1572#endif 1556#endif
1573#ifdef ENABLE_DOT11D 1557#ifdef ENABLE_DOT11D
1574 u16 CountryIeLen; 1558 u16 CountryIeLen;
1575 u8 CountryIeBuf[MAX_IE_LEN]; 1559 u8 CountryIeBuf[MAX_IE_LEN];
1576#endif 1560#endif
1577 // HT Related, by amy, 2008.04.29 1561 /* HT Related */
1578 BSS_HT bssht; 1562 BSS_HT bssht;
1579 // Add to handle broadcom AP management frame CCK rate. 1563 /* Add to handle broadcom AP management frame CCK rate. */
1580 bool broadcom_cap_exist; 1564 bool broadcom_cap_exist;
1581 bool ralink_cap_exist; 1565 bool ralink_cap_exist;
1582 bool atheros_cap_exist; 1566 bool atheros_cap_exist;
1583 bool cisco_cap_exist; 1567 bool cisco_cap_exist;
1584 bool unknown_cap_exist; 1568 bool unknown_cap_exist;
1585// u8 berp_info;
1586 bool berp_info_valid; 1569 bool berp_info_valid;
1587 bool buseprotection; 1570 bool buseprotection;
1588 //put at the end of the structure. 1571 /* put at the end of the structure. */
1589 struct list_head list; 1572 struct list_head list;
1590}; 1573};
1591 1574
@@ -1650,75 +1633,66 @@ enum ieee80211_state {
1650typedef struct tx_pending_t{ 1633typedef struct tx_pending_t{
1651 int frag; 1634 int frag;
1652 struct ieee80211_txb *txb; 1635 struct ieee80211_txb *txb;
1653}tx_pending_t; 1636} tx_pending_t;
1654 1637
1655typedef struct _bandwidth_autoswitch 1638typedef struct _bandwidth_autoswitch {
1656{
1657 long threshold_20Mhzto40Mhz; 1639 long threshold_20Mhzto40Mhz;
1658 long threshold_40Mhzto20Mhz; 1640 long threshold_40Mhzto20Mhz;
1659 bool bforced_tx20Mhz; 1641 bool bforced_tx20Mhz;
1660 bool bautoswitch_enable; 1642 bool bautoswitch_enable;
1661}bandwidth_autoswitch,*pbandwidth_autoswitch; 1643} bandwidth_autoswitch, *pbandwidth_autoswitch;
1662 1644
1663 1645
1664//added by amy for order
1665 1646
1666#define REORDER_WIN_SIZE 128 1647#define REORDER_WIN_SIZE 128
1667#define REORDER_ENTRY_NUM 128 1648#define REORDER_ENTRY_NUM 128
1668typedef struct _RX_REORDER_ENTRY 1649typedef struct _RX_REORDER_ENTRY {
1669{
1670 struct list_head List; 1650 struct list_head List;
1671 u16 SeqNum; 1651 u16 SeqNum;
1672 struct ieee80211_rxb* prxb; 1652 struct ieee80211_rxb *prxb;
1673} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY; 1653} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;
1674//added by amy for order 1654
1675typedef enum _Fsync_State{ 1655typedef enum _Fsync_State {
1676 Default_Fsync, 1656 Default_Fsync,
1677 HW_Fsync, 1657 HW_Fsync,
1678 SW_Fsync 1658 SW_Fsync
1679}Fsync_State; 1659} Fsync_State;
1680 1660
1681// Power save mode configured. 1661/* Power save mode configured. */
1682typedef enum _RT_PS_MODE 1662typedef enum _RT_PS_MODE {
1683{ 1663 eActive, /* Active/Continuous access. */
1684 eActive, // Active/Continuous access. 1664 eMaxPs, /* Max power save mode. */
1685 eMaxPs, // Max power save mode. 1665 eFastPs /* Fast power save mode. */
1686 eFastPs // Fast power save mode. 1666} RT_PS_MODE;
1687}RT_PS_MODE;
1688 1667
1689typedef enum _IPS_CALLBACK_FUNCION 1668typedef enum _IPS_CALLBACK_FUNCION {
1690{
1691 IPS_CALLBACK_NONE = 0, 1669 IPS_CALLBACK_NONE = 0,
1692 IPS_CALLBACK_MGNT_LINK_REQUEST = 1, 1670 IPS_CALLBACK_MGNT_LINK_REQUEST = 1,
1693 IPS_CALLBACK_JOIN_REQUEST = 2, 1671 IPS_CALLBACK_JOIN_REQUEST = 2,
1694}IPS_CALLBACK_FUNCION; 1672} IPS_CALLBACK_FUNCION;
1695 1673
1696typedef enum _RT_JOIN_ACTION{ 1674typedef enum _RT_JOIN_ACTION {
1697 RT_JOIN_INFRA = 1, 1675 RT_JOIN_INFRA = 1,
1698 RT_JOIN_IBSS = 2, 1676 RT_JOIN_IBSS = 2,
1699 RT_START_IBSS = 3, 1677 RT_START_IBSS = 3,
1700 RT_NO_ACTION = 4, 1678 RT_NO_ACTION = 4,
1701}RT_JOIN_ACTION; 1679} RT_JOIN_ACTION;
1702 1680
1703typedef struct _IbssParms{ 1681typedef struct _IbssParms {
1704 u16 atimWin; 1682 u16 atimWin;
1705}IbssParms, *PIbssParms; 1683} IbssParms, *PIbssParms;
1706#define MAX_NUM_RATES 264 // Max num of support rates element: 8, Max num of ext. support rate: 255. 061122, by rcnjko. 1684#define MAX_NUM_RATES 264 /* Max num of support rates element: 8, Max num of ext. support rate: 255. 061122, by rcnjko. */
1707 1685
1708// RF state. 1686/* RF state. */
1709typedef enum _RT_RF_POWER_STATE 1687typedef enum _RT_RF_POWER_STATE {
1710{
1711 eRfOn, 1688 eRfOn,
1712 eRfSleep, 1689 eRfSleep,
1713 eRfOff 1690 eRfOff
1714}RT_RF_POWER_STATE; 1691} RT_RF_POWER_STATE;
1715 1692
1716typedef struct _RT_POWER_SAVE_CONTROL 1693typedef struct _RT_POWER_SAVE_CONTROL {
1717{
1718 1694
1719 // 1695 /* Inactive Power Save(IPS) : Disable RF when disconnected */
1720 // Inactive Power Save(IPS) : Disable RF when disconnected
1721 //
1722 bool bInactivePs; 1696 bool bInactivePs;
1723 bool bIPSModeBackup; 1697 bool bIPSModeBackup;
1724 bool bSwRfProcessing; 1698 bool bSwRfProcessing;
@@ -1726,15 +1700,15 @@ typedef struct _RT_POWER_SAVE_CONTROL
1726 struct work_struct InactivePsWorkItem; 1700 struct work_struct InactivePsWorkItem;
1727 struct timer_list InactivePsTimer; 1701 struct timer_list InactivePsTimer;
1728 1702
1729 // Return point for join action 1703 /* Return point for join action */
1730 IPS_CALLBACK_FUNCION ReturnPoint; 1704 IPS_CALLBACK_FUNCION ReturnPoint;
1731 1705
1732 // Recored Parameters for rescheduled JoinRequest 1706 /* Recored Parameters for rescheduled JoinRequest */
1733 bool bTmpBssDesc; 1707 bool bTmpBssDesc;
1734 RT_JOIN_ACTION tmpJoinAction; 1708 RT_JOIN_ACTION tmpJoinAction;
1735 struct ieee80211_network tmpBssDesc; 1709 struct ieee80211_network tmpBssDesc;
1736 1710
1737 // Recored Parameters for rescheduled MgntLinkRequest 1711 /* Recored Parameters for rescheduled MgntLinkRequest */
1738 bool bTmpScanOnly; 1712 bool bTmpScanOnly;
1739 bool bTmpActiveScan; 1713 bool bTmpActiveScan;
1740 bool bTmpFilterHiddenAP; 1714 bool bTmpFilterHiddenAP;
@@ -1753,23 +1727,20 @@ typedef struct _RT_POWER_SAVE_CONTROL
1753 IbssParms tmpIbpm; 1727 IbssParms tmpIbpm;
1754 bool bTmpIbpm; 1728 bool bTmpIbpm;
1755 1729
1756 // 1730 /* Leisre Poswer Save : Disable RF if connected but traffic is not busy */
1757 // Leisre Poswer Save : Disable RF if connected but traffic is not busy
1758 //
1759 bool bLeisurePs; 1731 bool bLeisurePs;
1760 1732
1761}RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL; 1733} RT_POWER_SAVE_CONTROL, *PRT_POWER_SAVE_CONTROL;
1762 1734
1763typedef u32 RT_RF_CHANGE_SOURCE; 1735typedef u32 RT_RF_CHANGE_SOURCE;
1764#define RF_CHANGE_BY_SW BIT31 1736#define RF_CHANGE_BY_SW BIT31
1765#define RF_CHANGE_BY_HW BIT30 1737#define RF_CHANGE_BY_HW BIT30
1766#define RF_CHANGE_BY_PS BIT29 1738#define RF_CHANGE_BY_PS BIT29
1767#define RF_CHANGE_BY_IPS BIT28 1739#define RF_CHANGE_BY_IPS BIT28
1768#define RF_CHANGE_BY_INIT 0 // Do not change the RFOff reason. Defined by Bruce, 2008-01-17. 1740#define RF_CHANGE_BY_INIT 0 /* Do not change the RFOff reason. */
1769 1741
1770#ifdef ENABLE_DOT11D 1742#ifdef ENABLE_DOT11D
1771typedef enum 1743typedef enum {
1772{
1773 COUNTRY_CODE_FCC = 0, 1744 COUNTRY_CODE_FCC = 0,
1774 COUNTRY_CODE_IC = 1, 1745 COUNTRY_CODE_IC = 1,
1775 COUNTRY_CODE_ETSI = 2, 1746 COUNTRY_CODE_ETSI = 2,
@@ -1781,84 +1752,78 @@ typedef enum
1781 COUNTRY_CODE_TELEC, 1752 COUNTRY_CODE_TELEC,
1782 COUNTRY_CODE_MIC, 1753 COUNTRY_CODE_MIC,
1783 COUNTRY_CODE_GLOBAL_DOMAIN 1754 COUNTRY_CODE_GLOBAL_DOMAIN
1784}country_code_type_t; 1755} country_code_type_t;
1785#endif 1756#endif
1786 1757
1787#define RT_MAX_LD_SLOT_NUM 10 1758#define RT_MAX_LD_SLOT_NUM 10
1788typedef struct _RT_LINK_DETECT_T{ 1759typedef struct _RT_LINK_DETECT_T {
1789 1760
1790 u32 NumRecvBcnInPeriod; 1761 u32 NumRecvBcnInPeriod;
1791 u32 NumRecvDataInPeriod; 1762 u32 NumRecvDataInPeriod;
1792 1763
1793 u32 RxBcnNum[RT_MAX_LD_SLOT_NUM]; // number of Rx beacon / CheckForHang_period to determine link status 1764 u32 RxBcnNum[RT_MAX_LD_SLOT_NUM]; /* number of Rx beacon / CheckForHang_period to determine link status */
1794 u32 RxDataNum[RT_MAX_LD_SLOT_NUM]; // number of Rx data / CheckForHang_period to determine link status 1765 u32 RxDataNum[RT_MAX_LD_SLOT_NUM]; /* number of Rx data / CheckForHang_period to determine link status */
1795 u16 SlotNum; // number of CheckForHang period to determine link status 1766 u16 SlotNum; /* number of CheckForHang period to determine link status */
1796 u16 SlotIndex; 1767 u16 SlotIndex;
1797 1768
1798 u32 NumTxOkInPeriod; 1769 u32 NumTxOkInPeriod;
1799 u32 NumRxOkInPeriod; 1770 u32 NumRxOkInPeriod;
1800 bool bBusyTraffic; 1771 bool bBusyTraffic;
1801}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T; 1772} RT_LINK_DETECT_T, *PRT_LINK_DETECT_T;
1802 1773
1803 1774
1804struct ieee80211_device { 1775struct ieee80211_device {
1805 struct net_device *dev; 1776 struct net_device *dev;
1806 struct ieee80211_security sec; 1777 struct ieee80211_security sec;
1807 1778
1808 //hw security related 1779 /* hw security related */
1809// u8 hwsec_support; //support? 1780 u8 hwsec_active; /* hw security active. */
1810 u8 hwsec_active; //hw security active.
1811 bool is_silent_reset; 1781 bool is_silent_reset;
1812 bool ieee_up; 1782 bool ieee_up;
1813 //added by amy
1814 bool bSupportRemoteWakeUp; 1783 bool bSupportRemoteWakeUp;
1815 RT_PS_MODE dot11PowerSaveMode; // Power save mode configured. 1784 RT_PS_MODE dot11PowerSaveMode; /* Power save mode configured. */
1816 bool actscanning; 1785 bool actscanning;
1817 bool beinretry; 1786 bool beinretry;
1818 RT_RF_POWER_STATE eRFPowerState; 1787 RT_RF_POWER_STATE eRFPowerState;
1819 RT_RF_CHANGE_SOURCE RfOffReason; 1788 RT_RF_CHANGE_SOURCE RfOffReason;
1820 bool is_set_key; 1789 bool is_set_key;
1821 //11n spec related I wonder if These info structure need to be moved out of ieee80211_device 1790 /* 11n spec related I wonder if These info structure need to be moved out of ieee80211_device */
1822 1791
1823 //11n HT below 1792 /* 11n HT below */
1824 PRT_HIGH_THROUGHPUT pHTInfo; 1793 PRT_HIGH_THROUGHPUT pHTInfo;
1825 //struct timer_list SwBwTimer;
1826// spinlock_t chnlop_spinlock;
1827 spinlock_t bw_spinlock; 1794 spinlock_t bw_spinlock;
1828 1795
1829 spinlock_t reorder_spinlock; 1796 spinlock_t reorder_spinlock;
1830 // for HT operation rate set. we use this one for HT data rate to seperate different descriptors 1797 /* for HT operation rate set. we use this one for HT data rate to
1831 //the way fill this is the same as in the IE 1798 * separate different descriptors
1832 u8 Regdot11HTOperationalRateSet[16]; //use RATR format 1799 * the way fill this is the same as in the IE
1833 u8 dot11HTOperationalRateSet[16]; //use RATR format 1800 */
1801 u8 Regdot11HTOperationalRateSet[16]; /* use RATR format */
1802 u8 dot11HTOperationalRateSet[16]; /* use RATR format */
1834 u8 RegHTSuppRateSet[16]; 1803 u8 RegHTSuppRateSet[16];
1835 u8 HTCurrentOperaRate; 1804 u8 HTCurrentOperaRate;
1836 u8 HTHighestOperaRate; 1805 u8 HTHighestOperaRate;
1837 //wb added for rate operation mode to firmware 1806 /* wb added for rate operation mode to firmware */
1838 u8 bTxDisableRateFallBack; 1807 u8 bTxDisableRateFallBack;
1839 u8 bTxUseDriverAssingedRate; 1808 u8 bTxUseDriverAssingedRate;
1840 atomic_t atm_chnlop; 1809 atomic_t atm_chnlop;
1841 atomic_t atm_swbw; 1810 atomic_t atm_swbw;
1842// u8 HTHighestOperaRate;
1843// u8 HTCurrentOperaRate;
1844 1811
1845 // 802.11e and WMM Traffic Stream Info (TX) 1812 /* 802.11e and WMM Traffic Stream Info (TX) */
1846 struct list_head Tx_TS_Admit_List; 1813 struct list_head Tx_TS_Admit_List;
1847 struct list_head Tx_TS_Pending_List; 1814 struct list_head Tx_TS_Pending_List;
1848 struct list_head Tx_TS_Unused_List; 1815 struct list_head Tx_TS_Unused_List;
1849 TX_TS_RECORD TxTsRecord[TOTAL_TS_NUM]; 1816 TX_TS_RECORD TxTsRecord[TOTAL_TS_NUM];
1850 // 802.11e and WMM Traffic Stream Info (RX) 1817 /* 802.11e and WMM Traffic Stream Info (RX) */
1851 struct list_head Rx_TS_Admit_List; 1818 struct list_head Rx_TS_Admit_List;
1852 struct list_head Rx_TS_Pending_List; 1819 struct list_head Rx_TS_Pending_List;
1853 struct list_head Rx_TS_Unused_List; 1820 struct list_head Rx_TS_Unused_List;
1854 RX_TS_RECORD RxTsRecord[TOTAL_TS_NUM]; 1821 RX_TS_RECORD RxTsRecord[TOTAL_TS_NUM];
1855//#ifdef TO_DO_LIST
1856 RX_REORDER_ENTRY RxReorderEntry[128]; 1822 RX_REORDER_ENTRY RxReorderEntry[128];
1857 struct list_head RxReorder_Unused_List; 1823 struct list_head RxReorder_Unused_List;
1858//#endif 1824 /* Qos related. */
1859 // Qos related. Added by Annie, 2005-11-01. 1825/* PSTA_QOS pStaQos; */
1860// PSTA_QOS pStaQos; 1826 u8 ForcedPriority; /* Force per-packet priority 1~7. (default: 0, not to force it.) */
1861 u8 ForcedPriority; // Force per-packet priority 1~7. (default: 0, not to force it.)
1862 1827
1863 1828
1864 /* Bookkeeping structures */ 1829 /* Bookkeeping structures */
@@ -1925,7 +1890,7 @@ struct ieee80211_device {
1925 * with RX of broad/multicast frames */ 1890 * with RX of broad/multicast frames */
1926 1891
1927 /* Fragmentation structures */ 1892 /* Fragmentation structures */
1928 // each streaming contain a entry 1893 /* each streaming contain a entry */
1929 struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN]; 1894 struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
1930 unsigned int frag_next_idx[17]; 1895 unsigned int frag_next_idx[17];
1931 u16 fts; /* Fragmentation Threshold */ 1896 u16 fts; /* Fragmentation Threshold */
@@ -1967,16 +1932,16 @@ struct ieee80211_device {
1967 u16 prev_seq_ctl; /* used to drop duplicate frames */ 1932 u16 prev_seq_ctl; /* used to drop duplicate frames */
1968 1933
1969 /* map of allowed channels. 0 is dummy */ 1934 /* map of allowed channels. 0 is dummy */
1970 // FIXME: remeber to default to a basic channel plan depending of the PHY type 1935 /* FIXME: remeber to default to a basic channel plan depending of the PHY type */
1971#ifdef ENABLE_DOT11D 1936#ifdef ENABLE_DOT11D
1972 void* pDot11dInfo; 1937 void *pDot11dInfo;
1973 bool bGlobalDomain; 1938 bool bGlobalDomain;
1974#else 1939#else
1975 int channel_map[MAX_CHANNEL_NUMBER+1]; 1940 int channel_map[MAX_CHANNEL_NUMBER+1];
1976#endif 1941#endif
1977 int rate; /* current rate */ 1942 int rate; /* current rate */
1978 int basic_rate; 1943 int basic_rate;
1979 //FIXME: pleace callback, see if redundant with softmac_features 1944 /* FIXME: pleace callback, see if redundant with softmac_features */
1980 short active_scan; 1945 short active_scan;
1981 1946
1982 /* this contains flags for selectively enable softmac support */ 1947 /* this contains flags for selectively enable softmac support */
@@ -2017,8 +1982,8 @@ struct ieee80211_device {
2017 short wap_set; 1982 short wap_set;
2018 short ssid_set; 1983 short ssid_set;
2019 1984
2020 u8 wpax_type_set; //{added by David, 2006.9.28} 1985 u8 wpax_type_set;
2021 u32 wpax_type_notify; //{added by David, 2006.9.26} 1986 u32 wpax_type_notify;
2022 1987
2023 /* QoS related flag */ 1988 /* QoS related flag */
2024 char init_wmmparam_flag; 1989 char init_wmmparam_flag;
@@ -2040,7 +2005,7 @@ struct ieee80211_device {
2040 struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM]; 2005 struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
2041 int mgmt_queue_head; 2006 int mgmt_queue_head;
2042 int mgmt_queue_tail; 2007 int mgmt_queue_tail;
2043//{ added for rtl819x 2008/* added for rtl819x */
2044#define IEEE80211_QUEUE_LIMIT 128 2009#define IEEE80211_QUEUE_LIMIT 128
2045 u8 AsocRetryCount; 2010 u8 AsocRetryCount;
2046 unsigned int hw_header; 2011 unsigned int hw_header;
@@ -2049,12 +2014,12 @@ struct ieee80211_device {
2049 struct sk_buff_head skb_drv_aggQ[MAX_QUEUE_SIZE]; 2014 struct sk_buff_head skb_drv_aggQ[MAX_QUEUE_SIZE];
2050 u32 sta_edca_param[4]; 2015 u32 sta_edca_param[4];
2051 bool aggregation; 2016 bool aggregation;
2052 // Enable/Disable Rx immediate BA capability. 2017 /* Enable/Disable Rx immediate BA capability. */
2053 bool enable_rx_imm_BA; 2018 bool enable_rx_imm_BA;
2054 bool bibsscoordinator; 2019 bool bibsscoordinator;
2055 2020
2056 //+by amy for DM ,080515 2021 /*+by amy for DM ,080515 */
2057 //Dynamic Tx power for near/far range enable/Disable , by amy , 2008-05-15 2022 /* Dynamic Tx power for near/far range enable/Disable */
2058 bool bdynamic_txpower_enable; 2023 bool bdynamic_txpower_enable;
2059 2024
2060 bool bCTSToSelfEnable; 2025 bool bCTSToSelfEnable;
@@ -2065,21 +2030,20 @@ struct ieee80211_device {
2065 u8 fsync_rssi_threshold; 2030 u8 fsync_rssi_threshold;
2066 bool bfsync_enable; 2031 bool bfsync_enable;
2067 2032
2068 u8 fsync_multiple_timeinterval; // FsyncMultipleTimeInterval * FsyncTimeInterval 2033 u8 fsync_multiple_timeinterval; /* FsyncMultipleTimeInterval * FsyncTimeInterval */
2069 u32 fsync_firstdiff_ratethreshold; // low threshold 2034 u32 fsync_firstdiff_ratethreshold; /* low threshold */
2070 u32 fsync_seconddiff_ratethreshold; // decrease threshold 2035 u32 fsync_seconddiff_ratethreshold; /* decrease threshold */
2071 Fsync_State fsync_state; 2036 Fsync_State fsync_state;
2072 bool bis_any_nonbepkts; 2037 bool bis_any_nonbepkts;
2073 //20Mhz 40Mhz AutoSwitch Threshold 2038 /* 20Mhz 40Mhz AutoSwitch Threshold */
2074 bandwidth_autoswitch bandwidth_auto_switch; 2039 bandwidth_autoswitch bandwidth_auto_switch;
2075 //for txpower tracking 2040 /* for txpower tracking */
2076 bool FwRWRF; 2041 bool FwRWRF;
2077 2042
2078 //added by amy for AP roaming 2043 /* added by amy for AP roaming */
2079 RT_LINK_DETECT_T LinkDetectInfo; 2044 RT_LINK_DETECT_T LinkDetectInfo;
2080 //added by amy for ps 2045 /* added by amy for ps */
2081 RT_POWER_SAVE_CONTROL PowerSaveControl; 2046 RT_POWER_SAVE_CONTROL PowerSaveControl;
2082//}
2083 /* used if IEEE_SOFTMAC_TX_QUEUE is set */ 2047 /* used if IEEE_SOFTMAC_TX_QUEUE is set */
2084 struct tx_pending_t tx_pending; 2048 struct tx_pending_t tx_pending;
2085 2049
@@ -2095,11 +2059,8 @@ struct ieee80211_device {
2095 struct delayed_work start_ibss_wq; 2059 struct delayed_work start_ibss_wq;
2096 struct work_struct wx_sync_scan_wq; 2060 struct work_struct wx_sync_scan_wq;
2097 struct workqueue_struct *wq; 2061 struct workqueue_struct *wq;
2098 // Qos related. Added by Annie, 2005-11-01. 2062 /* Qos related. Added by Annie, 2005-11-01. */
2099 //STA_QOS StaQos; 2063 /* STA_QOS StaQos; */
2100
2101 //u32 STA_EDCA_PARAM[4];
2102 //CHANNEL_ACCESS_SETTING ChannelAccessSetting;
2103 2064
2104 2065
2105 /* Callback functions */ 2066 /* Callback functions */
@@ -2114,10 +2075,10 @@ struct ieee80211_device {
2114 struct net_device *dev); 2075 struct net_device *dev);
2115 2076
2116 int (*reset_port)(struct net_device *dev); 2077 int (*reset_port)(struct net_device *dev);
2117 int (*is_queue_full) (struct net_device * dev, int pri); 2078 int (*is_queue_full) (struct net_device *dev, int pri);
2118 2079
2119 int (*handle_management) (struct net_device * dev, 2080 int (*handle_management) (struct net_device *dev,
2120 struct ieee80211_network * network, u16 type); 2081 struct ieee80211_network *network, u16 type);
2121 int (*is_qos_active) (struct net_device *dev, struct sk_buff *skb); 2082 int (*is_qos_active) (struct net_device *dev, struct sk_buff *skb);
2122 2083
2123 /* Softmac-generated frames (mamagement) are TXed via this 2084 /* Softmac-generated frames (mamagement) are TXed via this
@@ -2137,7 +2098,7 @@ struct ieee80211_device {
2137 * This function can't sleep. 2098 * This function can't sleep.
2138 */ 2099 */
2139 void (*softmac_data_hard_start_xmit)(struct sk_buff *skb, 2100 void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
2140 struct net_device *dev,int rate); 2101 struct net_device *dev, int rate);
2141 2102
2142 /* stops the HW queue for DATA frames. Useful to avoid 2103 /* stops the HW queue for DATA frames. Useful to avoid
2143 * waste time to TX data frame when we are reassociating 2104 * waste time to TX data frame when we are reassociating
@@ -2152,7 +2113,7 @@ struct ieee80211_device {
2152 * This function can sleep. the driver should ensure 2113 * This function can sleep. the driver should ensure
2153 * the radio has been swithced before return. 2114 * the radio has been swithced before return.
2154 */ 2115 */
2155 void (*set_chan)(struct net_device *dev,short ch); 2116 void (*set_chan)(struct net_device *dev, short ch);
2156 2117
2157 /* These are not used if the ieee stack takes care of 2118 /* These are not used if the ieee stack takes care of
2158 * scanning (IEEE_SOFTMAC_SCAN feature set). 2119 * scanning (IEEE_SOFTMAC_SCAN feature set).
@@ -2186,7 +2147,7 @@ struct ieee80211_device {
2186 * stop_send_bacons is NOT guaranteed to be called only 2147 * stop_send_bacons is NOT guaranteed to be called only
2187 * after start_send_beacons. 2148 * after start_send_beacons.
2188 */ 2149 */
2189 void (*start_send_beacons) (struct net_device *dev,u16 tx_rate); 2150 void (*start_send_beacons) (struct net_device *dev, u16 tx_rate);
2190 void (*stop_send_beacons) (struct net_device *dev); 2151 void (*stop_send_beacons) (struct net_device *dev);
2191 2152
2192 /* power save mode related */ 2153 /* power save mode related */
@@ -2194,19 +2155,17 @@ struct ieee80211_device {
2194 void (*ps_request_tx_ack) (struct net_device *dev); 2155 void (*ps_request_tx_ack) (struct net_device *dev);
2195 void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl); 2156 void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
2196 short (*ps_is_queue_empty) (struct net_device *dev); 2157 short (*ps_is_queue_empty) (struct net_device *dev);
2197 int (*handle_beacon) (struct net_device * dev, struct ieee80211_beacon * beacon, struct ieee80211_network * network); 2158 int (*handle_beacon) (struct net_device *dev, struct ieee80211_beacon *beacon, struct ieee80211_network *network);
2198 int (*handle_assoc_response) (struct net_device * dev, struct ieee80211_assoc_response_frame * resp, struct ieee80211_network * network); 2159 int (*handle_assoc_response) (struct net_device *dev, struct ieee80211_assoc_response_frame *resp, struct ieee80211_network *network);
2199 2160
2200 2161
2201 /* check whether Tx hw resouce available */ 2162 /* check whether Tx hw resouce available */
2202 short (*check_nic_enough_desc)(struct net_device *dev, int queue_index); 2163 short (*check_nic_enough_desc)(struct net_device *dev, int queue_index);
2203 //added by wb for HT related 2164 /* added by wb for HT related */
2204// void (*SwChnlByTimerHandler)(struct net_device *dev, int channel);
2205 void (*SetBWModeHandler)(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset); 2165 void (*SetBWModeHandler)(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
2206// void (*UpdateHalRATRTableHandler)(struct net_device* dev, u8* pMcsRate); 2166 bool (*GetNmodeSupportBySecCfg)(struct net_device *dev);
2207 bool (*GetNmodeSupportBySecCfg)(struct net_device* dev); 2167 void (*SetWirelessMode)(struct net_device *dev, u8 wireless_mode);
2208 void (*SetWirelessMode)(struct net_device* dev, u8 wireless_mode); 2168 bool (*GetHalfNmodeSupportByAPsHandler)(struct net_device *dev);
2209 bool (*GetHalfNmodeSupportByAPsHandler)(struct net_device* dev);
2210 void (*InitialGainHandler)(struct net_device *dev, u8 Operation); 2169 void (*InitialGainHandler)(struct net_device *dev, u8 Operation);
2211 2170
2212 /* This must be the last item so that it points to the data 2171 /* This must be the last item so that it points to the data
@@ -2307,7 +2266,7 @@ extern inline int ieee80211_get_hdrlen(u16 fc)
2307 case IEEE80211_FTYPE_DATA: 2266 case IEEE80211_FTYPE_DATA:
2308 if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS)) 2267 if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
2309 hdrlen = IEEE80211_4ADDR_LEN; /* Addr4 */ 2268 hdrlen = IEEE80211_4ADDR_LEN; /* Addr4 */
2310 if(IEEE80211_QOS_HAS_SEQ(fc)) 2269 if (IEEE80211_QOS_HAS_SEQ(fc))
2311 hdrlen += 2; /* QOS ctrl*/ 2270 hdrlen += 2; /* QOS ctrl*/
2312 break; 2271 break;
2313 case IEEE80211_FTYPE_CTL: 2272 case IEEE80211_FTYPE_CTL:
@@ -2408,10 +2367,10 @@ extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
2408#if WIRELESS_EXT >= 18 2367#if WIRELESS_EXT >= 18
2409extern int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee, 2368extern int ieee80211_wx_get_encode_ext(struct ieee80211_device *ieee,
2410 struct iw_request_info *info, 2369 struct iw_request_info *info,
2411 union iwreq_data* wrqu, char *extra); 2370 union iwreq_data *wrqu, char *extra);
2412extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, 2371extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
2413 struct iw_request_info *info, 2372 struct iw_request_info *info,
2414 union iwreq_data* wrqu, char *extra); 2373 union iwreq_data *wrqu, char *extra);
2415extern int ieee80211_wx_set_auth(struct ieee80211_device *ieee, 2374extern int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
2416 struct iw_request_info *info, 2375 struct iw_request_info *info,
2417 struct iw_param *data, char *extra); 2376 struct iw_param *data, char *extra);
@@ -2477,7 +2436,9 @@ extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
2477 union iwreq_data *awrq, 2436 union iwreq_data *awrq,
2478 char *extra); 2437 char *extra);
2479 2438
2480extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b); 2439extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee,
2440 struct iw_request_info *a,
2441 union iwreq_data *wrqu, char *b);
2481 2442
2482extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee, 2443extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee,
2483 struct iw_request_info *info, 2444 struct iw_request_info *info,
@@ -2506,7 +2467,6 @@ extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_reques
2506extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a, 2467extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
2507 union iwreq_data *wrqu, char *b); 2468 union iwreq_data *wrqu, char *b);
2508 2469
2509//extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
2510extern void ieee80211_wx_sync_scan_wq(struct work_struct *work); 2470extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
2511 2471
2512 2472
@@ -2533,54 +2493,53 @@ extern int ieee80211_wx_set_rts(struct ieee80211_device *ieee,
2533extern int ieee80211_wx_get_rts(struct ieee80211_device *ieee, 2493extern int ieee80211_wx_get_rts(struct ieee80211_device *ieee,
2534 struct iw_request_info *info, 2494 struct iw_request_info *info,
2535 union iwreq_data *wrqu, char *extra); 2495 union iwreq_data *wrqu, char *extra);
2536//HT 2496/* HT */
2537#define MAX_RECEIVE_BUFFER_SIZE 9100 // 2497#define MAX_RECEIVE_BUFFER_SIZE 9100
2538extern void HTDebugHTCapability(u8* CapIE, u8* TitleString ); 2498extern void HTDebugHTCapability(u8 *CapIE, u8 *TitleString);
2539extern void HTDebugHTInfo(u8* InfoIE, u8* TitleString); 2499extern void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString);
2540 2500
2541void HTSetConnectBwMode(struct ieee80211_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset); 2501void HTSetConnectBwMode(struct ieee80211_device *ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
2542extern void HTUpdateDefaultSetting(struct ieee80211_device* ieee); 2502extern void HTUpdateDefaultSetting(struct ieee80211_device *ieee);
2543extern void HTConstructCapabilityElement(struct ieee80211_device* ieee, u8* posHTCap, u8* len, u8 isEncrypt); 2503extern void HTConstructCapabilityElement(struct ieee80211_device *ieee, u8 *posHTCap, u8 *len, u8 isEncrypt);
2544extern void HTConstructInfoElement(struct ieee80211_device* ieee, u8* posHTInfo, u8* len, u8 isEncrypt); 2504extern void HTConstructInfoElement(struct ieee80211_device *ieee, u8 *posHTInfo, u8 *len, u8 isEncrypt);
2545extern void HTConstructRT2RTAggElement(struct ieee80211_device* ieee, u8* posRT2RTAgg, u8* len); 2505extern void HTConstructRT2RTAggElement(struct ieee80211_device *ieee, u8 *posRT2RTAgg, u8 *len);
2546extern void HTOnAssocRsp(struct ieee80211_device *ieee); 2506extern void HTOnAssocRsp(struct ieee80211_device *ieee);
2547extern void HTInitializeHTInfo(struct ieee80211_device* ieee); 2507extern void HTInitializeHTInfo(struct ieee80211_device *ieee);
2548extern void HTInitializeBssDesc(PBSS_HT pBssHT); 2508extern void HTInitializeBssDesc(PBSS_HT pBssHT);
2549extern void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork); 2509extern void HTResetSelfAndSavePeerSetting(struct ieee80211_device *ieee, struct ieee80211_network *pNetwork);
2550extern void HTUpdateSelfAndPeerSetting(struct ieee80211_device* ieee, struct ieee80211_network * pNetwork); 2510extern void HTUpdateSelfAndPeerSetting(struct ieee80211_device *ieee, struct ieee80211_network *pNetwork);
2551extern u8 HTGetHighestMCSRate(struct ieee80211_device* ieee, u8* pMCSRateSet, u8* pMCSFilter); 2511extern u8 HTGetHighestMCSRate(struct ieee80211_device *ieee, u8 *pMCSRateSet, u8 *pMCSFilter);
2552extern u8 MCS_FILTER_ALL[]; 2512extern u8 MCS_FILTER_ALL[];
2553extern u16 MCS_DATA_RATE[2][2][77] ; 2513extern u16 MCS_DATA_RATE[2][2][77] ;
2554extern u8 HTCCheck(struct ieee80211_device* ieee, u8* pFrame); 2514extern u8 HTCCheck(struct ieee80211_device *ieee, u8 *pFrame);
2555//extern void HTSetConnectBwModeCallback(unsigned long data);
2556extern void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo); 2515extern void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo);
2557extern bool IsHTHalfNmodeAPs(struct ieee80211_device* ieee); 2516extern bool IsHTHalfNmodeAPs(struct ieee80211_device *ieee);
2558extern u16 HTHalfMcsToDataRate(struct ieee80211_device* ieee, u8 nMcsRate); 2517extern u16 HTHalfMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate);
2559extern u16 HTMcsToDataRate( struct ieee80211_device* ieee, u8 nMcsRate); 2518extern u16 HTMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate);
2560extern u16 TxCountToDataRate( struct ieee80211_device* ieee, u8 nDataRate); 2519extern u16 TxCountToDataRate(struct ieee80211_device *ieee, u8 nDataRate);
2561//function in BAPROC.c 2520/* function in BAPROC.c */
2562extern int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb); 2521extern int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb);
2563extern int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb); 2522extern int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb);
2564extern int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb); 2523extern int ieee80211_rx_DELBA(struct ieee80211_device *ieee, struct sk_buff *skb);
2565extern void TsInitAddBA( struct ieee80211_device* ieee, PTX_TS_RECORD pTS, u8 Policy, u8 bOverwritePending); 2524extern void TsInitAddBA(struct ieee80211_device *ieee, PTX_TS_RECORD pTS, u8 Policy, u8 bOverwritePending);
2566extern void TsInitDelBA( struct ieee80211_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect); 2525extern void TsInitDelBA(struct ieee80211_device *ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect);
2567extern void BaSetupTimeOut(unsigned long data); 2526extern void BaSetupTimeOut(unsigned long data);
2568extern void TxBaInactTimeout(unsigned long data); 2527extern void TxBaInactTimeout(unsigned long data);
2569extern void RxBaInactTimeout(unsigned long data); 2528extern void RxBaInactTimeout(unsigned long data);
2570extern void ResetBaEntry( PBA_RECORD pBA); 2529extern void ResetBaEntry(PBA_RECORD pBA);
2571//function in TS.c 2530/* function in TS.c */
2572extern bool GetTs( 2531extern bool GetTs(
2573 struct ieee80211_device* ieee, 2532 struct ieee80211_device *ieee,
2574 PTS_COMMON_INFO *ppTS, 2533 PTS_COMMON_INFO *ppTS,
2575 u8* Addr, 2534 u8 *Addr,
2576 u8 TID, 2535 u8 TID,
2577 TR_SELECT TxRxSelect, //Rx:1, Tx:0 2536 TR_SELECT TxRxSelect, /* Rx:1, Tx:0 */
2578 bool bAddNewTs 2537 bool bAddNewTs
2579 ); 2538 );
2580extern void TSInitialize(struct ieee80211_device *ieee); 2539extern void TSInitialize(struct ieee80211_device *ieee);
2581extern void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS); 2540extern void TsStartAddBaProcess(struct ieee80211_device *ieee, PTX_TS_RECORD pTxTS);
2582extern void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr); 2541extern void RemovePeerTS(struct ieee80211_device *ieee, u8 *Addr);
2583extern void RemoveAllTS(struct ieee80211_device* ieee); 2542extern void RemoveAllTS(struct ieee80211_device *ieee);
2584void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee); 2543void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee);
2585 2544
2586extern const long ieee80211_wlan_frequencies[]; 2545extern const long ieee80211_wlan_frequencies[];
@@ -2595,7 +2554,8 @@ extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
2595 return ieee->scans; 2554 return ieee->scans;
2596} 2555}
2597 2556
2598static inline const char *escape_essid(const char *essid, u8 essid_len) { 2557static inline const char *escape_essid(const char *essid, u8 essid_len)
2558{
2599 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; 2559 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
2600 const char *s = essid; 2560 const char *s = essid;
2601 char *d = escaped; 2561 char *d = escaped;
@@ -2630,6 +2590,6 @@ extern int ieee80211_parse_info_param(struct ieee80211_device *ieee,
2630 struct ieee80211_network *network, 2590 struct ieee80211_network *network,
2631 struct ieee80211_rx_stats *stats); 2591 struct ieee80211_rx_stats *stats);
2632 2592
2633void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb** prxbIndicateArray,u8 index); 2593void ieee80211_indicate_packets(struct ieee80211_device *ieee, struct ieee80211_rxb **prxbIndicateArray, u8 index);
2634#define RT_ASOC_RETRY_LIMIT 5 2594#define RT_ASOC_RETRY_LIMIT 5
2635#endif /* IEEE80211_H */ 2595#endif /* IEEE80211_H */
diff --git a/drivers/staging/rtl8192u/ieee80211/api.c b/drivers/staging/rtl8192u/ieee80211/api.c
index c627d029528b..5f46e50e586e 100644
--- a/drivers/staging/rtl8192u/ieee80211/api.c
+++ b/drivers/staging/rtl8192u/ieee80211/api.c
@@ -131,12 +131,10 @@ struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)
131 if (alg == NULL) 131 if (alg == NULL)
132 goto out; 132 goto out;
133 133
134 tfm = kmalloc(sizeof(*tfm) + alg->cra_ctxsize, GFP_KERNEL); 134 tfm = kzalloc(sizeof(*tfm) + alg->cra_ctxsize, GFP_KERNEL);
135 if (tfm == NULL) 135 if (tfm == NULL)
136 goto out_put; 136 goto out_put;
137 137
138 memset(tfm, 0, sizeof(*tfm) + alg->cra_ctxsize);
139
140 tfm->__crt_alg = alg; 138 tfm->__crt_alg = alg;
141 139
142 if (crypto_init_flags(tfm, flags)) 140 if (crypto_init_flags(tfm, flags))
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211.h b/drivers/staging/rtl8192u/ieee80211/ieee80211.h
index 39847c81e29c..e1216b704959 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211.h
@@ -1829,7 +1829,7 @@ struct ieee80211_device {
1829 spinlock_t bw_spinlock; 1829 spinlock_t bw_spinlock;
1830 1830
1831 spinlock_t reorder_spinlock; 1831 spinlock_t reorder_spinlock;
1832 // for HT operation rate set. we use this one for HT data rate to seperate different descriptors 1832 // for HT operation rate set. we use this one for HT data rate to separate different descriptors
1833 //the way fill this is the same as in the IE 1833 //the way fill this is the same as in the IE
1834 u8 Regdot11HTOperationalRateSet[16]; //use RATR format 1834 u8 Regdot11HTOperationalRateSet[16]; //use RATR format
1835 u8 dot11HTOperationalRateSet[16]; //use RATR format 1835 u8 dot11HTOperationalRateSet[16]; //use RATR format
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt.c
index 521e7b989934..8707eba4f905 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt.c
@@ -109,11 +109,10 @@ int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
109 if (hcrypt == NULL) 109 if (hcrypt == NULL)
110 return -1; 110 return -1;
111 111
112 alg = kmalloc(sizeof(*alg), GFP_KERNEL); 112 alg = kzalloc(sizeof(*alg), GFP_KERNEL);
113 if (alg == NULL) 113 if (alg == NULL)
114 return -ENOMEM; 114 return -ENOMEM;
115 115
116 memset(alg, 0, sizeof(*alg));
117 alg->ops = ops; 116 alg->ops = ops;
118 117
119 spin_lock_irqsave(&hcrypt->lock, flags); 118 spin_lock_irqsave(&hcrypt->lock, flags);
@@ -206,11 +205,10 @@ int __init ieee80211_crypto_init(void)
206{ 205{
207 int ret = -ENOMEM; 206 int ret = -ENOMEM;
208 207
209 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL); 208 hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL);
210 if (!hcrypt) 209 if (!hcrypt)
211 goto out; 210 goto out;
212 211
213 memset(hcrypt, 0, sizeof(*hcrypt));
214 INIT_LIST_HEAD(&hcrypt->algs); 212 INIT_LIST_HEAD(&hcrypt->algs);
215 spin_lock_init(&hcrypt->lock); 213 spin_lock_init(&hcrypt->lock);
216 214
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c
index 0b57632bcff9..4b078e536382 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_ccmp.c
@@ -68,10 +68,9 @@ static void * ieee80211_ccmp_init(int key_idx)
68{ 68{
69 struct ieee80211_ccmp_data *priv; 69 struct ieee80211_ccmp_data *priv;
70 70
71 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 71 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
72 if (priv == NULL) 72 if (priv == NULL)
73 goto fail; 73 goto fail;
74 memset(priv, 0, sizeof(*priv));
75 priv->key_idx = key_idx; 74 priv->key_idx = key_idx;
76 75
77 priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); 76 priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c
index 9510507d8d05..a98584c845b8 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_tkip.c
@@ -67,10 +67,9 @@ static void * ieee80211_tkip_init(int key_idx)
67{ 67{
68 struct ieee80211_tkip_data *priv; 68 struct ieee80211_tkip_data *priv;
69 69
70 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 70 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
71 if (priv == NULL) 71 if (priv == NULL)
72 goto fail; 72 goto fail;
73 memset(priv, 0, sizeof(*priv));
74 priv->key_idx = key_idx; 73 priv->key_idx = key_idx;
75 74
76 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 75 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_wep.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_wep.c
index 61ad11cae38c..96c2c9d67fd1 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_wep.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_crypt_wep.c
@@ -43,10 +43,9 @@ static void * prism2_wep_init(int keyidx)
43{ 43{
44 struct prism2_wep_data *priv; 44 struct prism2_wep_data *priv;
45 45
46 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 46 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
47 if (priv == NULL) 47 if (priv == NULL)
48 goto fail; 48 goto fail;
49 memset(priv, 0, sizeof(*priv));
50 priv->key_idx = keyidx; 49 priv->key_idx = keyidx;
51 50
52 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 51 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c
index b752017a4d18..7455264aa543 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c
@@ -65,8 +65,8 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
65 if (ieee->networks) 65 if (ieee->networks)
66 return 0; 66 return 0;
67 67
68 ieee->networks = kmalloc( 68 ieee->networks = kcalloc(
69 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network), 69 MAX_NETWORK_COUNT, sizeof(struct ieee80211_network),
70 GFP_KERNEL); 70 GFP_KERNEL);
71 if (!ieee->networks) { 71 if (!ieee->networks) {
72 printk(KERN_WARNING "%s: Out of memory allocating beacons\n", 72 printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
@@ -74,9 +74,6 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
74 return -ENOMEM; 74 return -ENOMEM;
75 } 75 }
76 76
77 memset(ieee->networks, 0,
78 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
79
80 return 0; 77 return 0;
81} 78}
82 79
@@ -161,7 +158,7 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
161 158
162 ieee80211_softmac_init(ieee); 159 ieee80211_softmac_init(ieee);
163 160
164 ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL); 161 ieee->pHTInfo = kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
165 if (ieee->pHTInfo == NULL) 162 if (ieee->pHTInfo == NULL)
166 { 163 {
167 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for HTInfo\n"); 164 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for HTInfo\n");
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c
index 7e9b367594a0..192123fbec7f 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c
@@ -1302,7 +1302,7 @@ int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
1302 /* skb: hdr + (possible reassembled) full plaintext payload */ 1302 /* skb: hdr + (possible reassembled) full plaintext payload */
1303 payload = skb->data + hdrlen; 1303 payload = skb->data + hdrlen;
1304 //ethertype = (payload[6] << 8) | payload[7]; 1304 //ethertype = (payload[6] << 8) | payload[7];
1305 rxb = (struct ieee80211_rxb*)kmalloc(sizeof(struct ieee80211_rxb),GFP_ATOMIC); 1305 rxb = kmalloc(sizeof(struct ieee80211_rxb), GFP_ATOMIC);
1306 if(rxb == NULL) 1306 if(rxb == NULL)
1307 { 1307 {
1308 IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__); 1308 IEEE80211_DEBUG(IEEE80211_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__);
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c
index d54e3a77423f..a2e84c578579 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c
@@ -1579,8 +1579,9 @@ static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
1579 1579
1580 if(*(t++) == MFIE_TYPE_CHALLENGE){ 1580 if(*(t++) == MFIE_TYPE_CHALLENGE){
1581 *chlen = *(t++); 1581 *chlen = *(t++);
1582 *challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC); 1582 *challenge = kmemdup(t, *chlen, GFP_ATOMIC);
1583 memcpy(*challenge, t, *chlen); 1583 if (!*challenge)
1584 return -ENOMEM;
1584 } 1585 }
1585 } 1586 }
1586 1587
@@ -1713,7 +1714,8 @@ ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1713 //IEEE80211DMESG("Rx probe"); 1714 //IEEE80211DMESG("Rx probe");
1714 ieee->softmac_stats.rx_auth_rq++; 1715 ieee->softmac_stats.rx_auth_rq++;
1715 1716
1716 if ((status = auth_rq_parse(skb, dest))!= -1){ 1717 status = auth_rq_parse(skb, dest);
1718 if (status != -1) {
1717 ieee80211_resp_to_auth(ieee, status, dest); 1719 ieee80211_resp_to_auth(ieee, status, dest);
1718 } 1720 }
1719 //DMESG("Dest is "MACSTR, MAC2STR(dest)); 1721 //DMESG("Dest is "MACSTR, MAC2STR(dest));
@@ -2720,10 +2722,9 @@ void ieee80211_softmac_init(struct ieee80211_device *ieee)
2720 ieee->seq_ctrl[i] = 0; 2722 ieee->seq_ctrl[i] = 0;
2721 } 2723 }
2722#ifdef ENABLE_DOT11D 2724#ifdef ENABLE_DOT11D
2723 ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC); 2725 ieee->pDot11dInfo = kzalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
2724 if (!ieee->pDot11dInfo) 2726 if (!ieee->pDot11dInfo)
2725 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n"); 2727 IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n");
2726 memset(ieee->pDot11dInfo, 0, sizeof(RT_DOT11D_INFO));
2727#endif 2728#endif
2728 //added for AP roaming 2729 //added for AP roaming
2729 ieee->LinkDetectInfo.SlotNum = 2; 2730 ieee->LinkDetectInfo.SlotNum = 2;
@@ -2868,11 +2869,11 @@ static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
2868 return -EINVAL; 2869 return -EINVAL;
2869 2870
2870 if (param->u.wpa_ie.len) { 2871 if (param->u.wpa_ie.len) {
2871 buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL); 2872 buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
2873 GFP_KERNEL);
2872 if (buf == NULL) 2874 if (buf == NULL)
2873 return -ENOMEM; 2875 return -ENOMEM;
2874 2876
2875 memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
2876 kfree(ieee->wpa_ie); 2877 kfree(ieee->wpa_ie);
2877 ieee->wpa_ie = buf; 2878 ieee->wpa_ie = buf;
2878 ieee->wpa_ie_len = param->u.wpa_ie.len; 2879 ieee->wpa_ie_len = param->u.wpa_ie.len;
@@ -3074,8 +3075,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3074 3075
3075 ieee80211_crypt_delayed_deinit(ieee, crypt); 3076 ieee80211_crypt_delayed_deinit(ieee, crypt);
3076 3077
3077 new_crypt = (struct ieee80211_crypt_data *) 3078 new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3078 kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3079 if (new_crypt == NULL) { 3079 if (new_crypt == NULL) {
3080 ret = -ENOMEM; 3080 ret = -ENOMEM;
3081 goto done; 3081 goto done;
@@ -3207,7 +3207,7 @@ int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_poin
3207 goto out; 3207 goto out;
3208 } 3208 }
3209 3209
3210 param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL); 3210 param = kmalloc(p->length, GFP_KERNEL);
3211 if (param == NULL){ 3211 if (param == NULL){
3212 ret = -ENOMEM; 3212 ret = -ENOMEM;
3213 goto out; 3213 goto out;
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c
index 48537d948945..81aa2ed226ac 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c
@@ -47,7 +47,6 @@
47#include <linux/slab.h> 47#include <linux/slab.h>
48#include <linux/tcp.h> 48#include <linux/tcp.h>
49#include <linux/types.h> 49#include <linux/types.h>
50#include <linux/version.h>
51#include <linux/wireless.h> 50#include <linux/wireless.h>
52#include <linux/etherdevice.h> 51#include <linux/etherdevice.h>
53#include <asm/uaccess.h> 52#include <asm/uaccess.h>
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c
index 750e94e17114..fb78ed2876e5 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c
@@ -30,7 +30,6 @@
30 30
31******************************************************************************/ 31******************************************************************************/
32#include <linux/wireless.h> 32#include <linux/wireless.h>
33#include <linux/version.h>
34#include <linux/kmod.h> 33#include <linux/kmod.h>
35#include <linux/slab.h> 34#include <linux/slab.h>
36#include <linux/module.h> 35#include <linux/module.h>
@@ -380,11 +379,10 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
380 struct ieee80211_crypt_data *new_crypt; 379 struct ieee80211_crypt_data *new_crypt;
381 380
382 /* take WEP into use */ 381 /* take WEP into use */
383 new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data), 382 new_crypt = kzalloc(sizeof(struct ieee80211_crypt_data),
384 GFP_KERNEL); 383 GFP_KERNEL);
385 if (new_crypt == NULL) 384 if (new_crypt == NULL)
386 return -ENOMEM; 385 return -ENOMEM;
387 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
388 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 386 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
389 if (!new_crypt->ops) { 387 if (!new_crypt->ops) {
390 request_module("ieee80211_crypt_wep"); 388 request_module("ieee80211_crypt_wep");
@@ -849,10 +847,9 @@ int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
849 printk("len:%zu, ie:%d\n", len, ie[1]); 847 printk("len:%zu, ie:%d\n", len, ie[1]);
850 return -EINVAL; 848 return -EINVAL;
851 } 849 }
852 buf = kmalloc(len, GFP_KERNEL); 850 buf = kmemdup(ie, len, GFP_KERNEL);
853 if (buf == NULL) 851 if (buf == NULL)
854 return -ENOMEM; 852 return -ENOMEM;
855 memcpy(buf, ie, len);
856 kfree(ieee->wpa_ie); 853 kfree(ieee->wpa_ie);
857 ieee->wpa_ie = buf; 854 ieee->wpa_ie = buf;
858 ieee->wpa_ie_len = len; 855 ieee->wpa_ie_len = len;
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_Qos.h b/drivers/staging/rtl8192u/ieee80211/rtl819x_Qos.h
index 13b1e5ca436d..9e4ced15edf5 100644
--- a/drivers/staging/rtl8192u/ieee80211/rtl819x_Qos.h
+++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_Qos.h
@@ -1,7 +1,6 @@
1#ifndef __INC_QOS_TYPE_H 1#ifndef __INC_QOS_TYPE_H
2#define __INC_QOS_TYPE_H 2#define __INC_QOS_TYPE_H
3 3
4//#include "EndianFree.h"
5#define BIT0 0x00000001 4#define BIT0 0x00000001
6#define BIT1 0x00000002 5#define BIT1 0x00000002
7#define BIT2 0x00000004 6#define BIT2 0x00000004
@@ -220,7 +219,6 @@ typedef union _QOS_INFO_FIELD{
220 219
221}QOS_INFO_FIELD, *PQOS_INFO_FIELD; 220}QOS_INFO_FIELD, *PQOS_INFO_FIELD;
222 221
223
224// 222//
225// ACI to AC coding. 223// ACI to AC coding.
226// Ref: WMM spec 2.2.2: WME Parameter Element, p.13. 224// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
@@ -494,6 +492,7 @@ typedef struct _OCTET_STRING{
494 u8 *Octet; 492 u8 *Octet;
495 u16 Length; 493 u16 Length;
496}OCTET_STRING, *POCTET_STRING; 494}OCTET_STRING, *POCTET_STRING;
495
497// 496//
498// STA QoS data. 497// STA QoS data.
499// Ref: DOT11_QOS in 8185 code. [def. in QoS_mp.h] 498// Ref: DOT11_QOS in 8185 code. [def. in QoS_mp.h]
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
index 451120ff2130..c3fcaae0750d 100644
--- a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
+++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c
@@ -87,10 +87,7 @@ void RxPktPendingTimeout(unsigned long data)
87 if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff)) 87 if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff))
88 { 88 {
89 pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq; 89 pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
90 if(timer_pending(&pRxTs->RxPktPendingTimer)) 90 mod_timer(&pRxTs->RxPktPendingTimer, jiffies + MSECS(ieee->pHTInfo->RxReorderPendingTime));
91 del_timer_sync(&pRxTs->RxPktPendingTimer);
92 pRxTs->RxPktPendingTimer.expires = jiffies + ieee->pHTInfo->RxReorderPendingTime;
93 add_timer(&pRxTs->RxPktPendingTimer);
94 } 91 }
95 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags); 92 spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
96 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK); 93 //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
@@ -358,6 +355,7 @@ bool GetTs(
358 IEEE80211_DEBUG(IEEE80211_DL_ERR, "get TS for Broadcast or Multicast\n"); 355 IEEE80211_DEBUG(IEEE80211_DL_ERR, "get TS for Broadcast or Multicast\n");
359 return false; 356 return false;
360 } 357 }
358
361 if (ieee->current_network.qos_data.supported == 0) 359 if (ieee->current_network.qos_data.supported == 0)
362 UP = 0; 360 UP = 0;
363 else 361 else
@@ -532,6 +530,7 @@ void RemoveTsEntry(
532void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr) 530void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
533{ 531{
534 PTS_COMMON_INFO pTS, pTmpTS; 532 PTS_COMMON_INFO pTS, pTmpTS;
533
535 printk("===========>RemovePeerTS,%pM\n", Addr); 534 printk("===========>RemovePeerTS,%pM\n", Addr);
536 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) 535 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
537 { 536 {
@@ -578,6 +577,7 @@ void RemovePeerTS(struct ieee80211_device* ieee, u8* Addr)
578void RemoveAllTS(struct ieee80211_device* ieee) 577void RemoveAllTS(struct ieee80211_device* ieee)
579{ 578{
580 PTS_COMMON_INFO pTS, pTmpTS; 579 PTS_COMMON_INFO pTS, pTmpTS;
580
581 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) 581 list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
582 { 582 {
583 RemoveTsEntry(ieee, pTS, TX_DIR); 583 RemoveTsEntry(ieee, pTS, TX_DIR);
@@ -626,4 +626,3 @@ void TsStartAddBaProcess(struct ieee80211_device* ieee, PTX_TS_RECORD pTxTS)
626 else 626 else
627 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__); 627 IEEE80211_DEBUG(IEEE80211_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__);
628} 628}
629EXPORT_SYMBOL(RemovePeerTS);
diff --git a/drivers/staging/rtl8192u/ieee80211_crypt.h b/drivers/staging/rtl8192u/ieee80211_crypt.h
index b58a3bcc0dc0..0b4ea431982d 100644
--- a/drivers/staging/rtl8192u/ieee80211_crypt.h
+++ b/drivers/staging/rtl8192u/ieee80211_crypt.h
@@ -77,7 +77,7 @@ struct ieee80211_crypt_data {
77 77
78int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops); 78int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
79int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops); 79int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
80struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name); 80struct ieee80211_crypto_ops *ieee80211_get_crypto_ops(const char *name);
81void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int); 81void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
82void ieee80211_crypt_deinit_handler(unsigned long); 82void ieee80211_crypt_deinit_handler(unsigned long);
83void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee, 83void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c
index 68ebb0256771..2bede271a2f0 100644
--- a/drivers/staging/rtl8192u/r8192U_core.c
+++ b/drivers/staging/rtl8192u/r8192U_core.c
@@ -2216,7 +2216,8 @@ short rtl8192_usb_initendpoints(struct net_device *dev)
2216{ 2216{
2217 struct r8192_priv *priv = ieee80211_priv(dev); 2217 struct r8192_priv *priv = ieee80211_priv(dev);
2218 2218
2219 priv->rx_urb = (struct urb**) kmalloc (sizeof(struct urb*) * (MAX_RX_URB+1), GFP_KERNEL); 2219 priv->rx_urb = kmalloc(sizeof(struct urb *) * (MAX_RX_URB+1),
2220 GFP_KERNEL);
2220 2221
2221#ifndef JACKSON_NEW_RX 2222#ifndef JACKSON_NEW_RX
2222 for(i=0;i<(MAX_RX_URB+1);i++){ 2223 for(i=0;i<(MAX_RX_URB+1);i++){
@@ -2250,12 +2251,11 @@ short rtl8192_usb_initendpoints(struct net_device *dev)
2250#endif 2251#endif
2251 2252
2252 memset(priv->rx_urb, 0, sizeof(struct urb*) * MAX_RX_URB); 2253 memset(priv->rx_urb, 0, sizeof(struct urb*) * MAX_RX_URB);
2253 priv->pp_rxskb = (struct sk_buff **)kmalloc(sizeof(struct sk_buff *) * MAX_RX_URB, GFP_KERNEL); 2254 priv->pp_rxskb = kcalloc(MAX_RX_URB, sizeof(struct sk_buff *),
2255 GFP_KERNEL);
2254 if (priv->pp_rxskb == NULL) 2256 if (priv->pp_rxskb == NULL)
2255 goto destroy; 2257 goto destroy;
2256 2258
2257 memset(priv->pp_rxskb, 0, sizeof(struct sk_buff*) * MAX_RX_URB);
2258
2259 goto _middle; 2259 goto _middle;
2260 2260
2261 2261
@@ -2839,7 +2839,7 @@ static void rtl8192_init_priv_variable(struct net_device* dev)
2839 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0); 2839 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
2840 2840
2841 priv->AcmControl = 0; 2841 priv->AcmControl = 0;
2842 priv->pFirmware = (rt_firmware*)kmalloc(sizeof(rt_firmware), GFP_KERNEL); 2842 priv->pFirmware = kmalloc(sizeof(rt_firmware), GFP_KERNEL);
2843 if (priv->pFirmware) 2843 if (priv->pFirmware)
2844 memset(priv->pFirmware, 0, sizeof(rt_firmware)); 2844 memset(priv->pFirmware, 0, sizeof(rt_firmware));
2845 2845
@@ -4415,7 +4415,7 @@ int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4415 goto out; 4415 goto out;
4416 } 4416 }
4417 4417
4418 ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL); 4418 ipw = kmalloc(p->length, GFP_KERNEL);
4419 if (ipw == NULL){ 4419 if (ipw == NULL){
4420 ret = -ENOMEM; 4420 ret = -ENOMEM;
4421 goto out; 4421 goto out;
diff --git a/drivers/staging/rtl8192u/r819xU_cmdpkt.c b/drivers/staging/rtl8192u/r819xU_cmdpkt.c
index fd19a85297a9..0cb28c776c49 100644
--- a/drivers/staging/rtl8192u/r819xU_cmdpkt.c
+++ b/drivers/staging/rtl8192u/r819xU_cmdpkt.c
@@ -63,7 +63,6 @@ SendTxCommandPacket(
63 tcb_desc->bLastIniPkt = 0; 63 tcb_desc->bLastIniPkt = 0;
64 skb_reserve(skb, USB_HWDESC_HEADER_LEN); 64 skb_reserve(skb, USB_HWDESC_HEADER_LEN);
65 ptr_buf = skb_put(skb, DataLen); 65 ptr_buf = skb_put(skb, DataLen);
66 memset(ptr_buf,0,DataLen);
67 memcpy(ptr_buf,pData,DataLen); 66 memcpy(ptr_buf,pData,DataLen);
68 tcb_desc->txbuf_size= (u16)DataLen; 67 tcb_desc->txbuf_size= (u16)DataLen;
69 68
diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c
index 88880734921a..0332c370fd82 100644
--- a/drivers/staging/sep/sep_driver.c
+++ b/drivers/staging/sep/sep_driver.c
@@ -39,7 +39,6 @@
39#include <linux/mm.h> 39#include <linux/mm.h>
40#include <linux/poll.h> 40#include <linux/poll.h>
41#include <linux/wait.h> 41#include <linux/wait.h>
42#include <linux/sched.h>
43#include <linux/pci.h> 42#include <linux/pci.h>
44#include <linux/firmware.h> 43#include <linux/firmware.h>
45#include <linux/slab.h> 44#include <linux/slab.h>
diff --git a/drivers/staging/serqt_usb2/serqt_usb2.c b/drivers/staging/serqt_usb2/serqt_usb2.c
index 44f2d4eaf84b..27841ef6a568 100644
--- a/drivers/staging/serqt_usb2/serqt_usb2.c
+++ b/drivers/staging/serqt_usb2/serqt_usb2.c
@@ -413,7 +413,7 @@ static void qt_read_bulk_callback(struct urb *urb)
413 413
414 case 0x01: 414 case 0x01:
415 /* Modem status status change 4th byte must follow */ 415 /* Modem status status change 4th byte must follow */
416 dbg("Modem status status. \n"); 416 dbg("Modem status status.\n");
417 if (i > (RxCount - 4)) { 417 if (i > (RxCount - 4)) {
418 dbg("Illegal escape sequences in received data\n"); 418 dbg("Illegal escape sequences in received data\n");
419 break; 419 break;
@@ -424,7 +424,7 @@ static void qt_read_bulk_callback(struct urb *urb)
424 flag = 1; 424 flag = 1;
425 break; 425 break;
426 case 0xff: 426 case 0xff:
427 dbg("No status sequence. \n"); 427 dbg("No status sequence.\n");
428 428
429 if (tty) { 429 if (tty) {
430 ProcessRxChar(tty, port, data[i]); 430 ProcessRxChar(tty, port, data[i]);
@@ -738,7 +738,7 @@ static int qt_startup(struct usb_serial *serial)
738 if (!qt_port) { 738 if (!qt_port) {
739 dbg("%s: kmalloc for quatech_port (%d) failed!.", 739 dbg("%s: kmalloc for quatech_port (%d) failed!.",
740 __func__, i); 740 __func__, i);
741 for(--i; i >= 0; i--) { 741 for (--i; i >= 0; i--) {
742 port = serial->port[i]; 742 port = serial->port[i];
743 kfree(usb_get_serial_port_data(port)); 743 kfree(usb_get_serial_port_data(port));
744 usb_set_serial_port_data(port, NULL); 744 usb_set_serial_port_data(port, NULL);
@@ -963,11 +963,11 @@ static int qt_open(struct tty_struct *tty,
963 963
964 } 964 }
965 965
966 dbg("port number is %d \n", port->number); 966 dbg("port number is %d\n", port->number);
967 dbg("serial number is %d \n", port->serial->minor); 967 dbg("serial number is %d\n", port->serial->minor);
968 dbg("Bulkin endpoint is %d \n", port->bulk_in_endpointAddress); 968 dbg("Bulkin endpoint is %d\n", port->bulk_in_endpointAddress);
969 dbg("BulkOut endpoint is %d \n", port->bulk_out_endpointAddress); 969 dbg("BulkOut endpoint is %d\n", port->bulk_out_endpointAddress);
970 dbg("Interrupt endpoint is %d \n", port->interrupt_in_endpointAddress); 970 dbg("Interrupt endpoint is %d\n", port->interrupt_in_endpointAddress);
971 dbg("port's number in the device is %d\n", quatech_port->port_num); 971 dbg("port's number in the device is %d\n", quatech_port->port_num);
972 quatech_port->read_urb = port->read_urb; 972 quatech_port->read_urb = port->read_urb;
973 973
@@ -1470,7 +1470,7 @@ static int qt_tiocmget(struct tty_struct *tty, struct file *file)
1470 int retval = -ENODEV; 1470 int retval = -ENODEV;
1471 unsigned long flags; 1471 unsigned long flags;
1472 1472
1473 dbg("In %s \n", __func__); 1473 dbg("In %s\n", __func__);
1474 1474
1475 if (!serial) 1475 if (!serial)
1476 return -ENODEV; 1476 return -ENODEV;
@@ -1496,14 +1496,14 @@ static int qt_tiocmset(struct tty_struct *tty, struct file *file,
1496 unsigned long flags; 1496 unsigned long flags;
1497 int retval = -ENODEV; 1497 int retval = -ENODEV;
1498 1498
1499 dbg("In %s \n", __func__); 1499 dbg("In %s\n", __func__);
1500 1500
1501 if (!serial) 1501 if (!serial)
1502 return -ENODEV; 1502 return -ENODEV;
1503 1503
1504 spin_lock_irqsave(&qt_port->lock, flags); 1504 spin_lock_irqsave(&qt_port->lock, flags);
1505 1505
1506 dbg("%s - port %d \n", __func__, port->number); 1506 dbg("%s - port %d\n", __func__, port->number);
1507 dbg("%s - qt_port->RxHolding = %d\n", __func__, qt_port->RxHolding); 1507 dbg("%s - qt_port->RxHolding = %d\n", __func__, qt_port->RxHolding);
1508 1508
1509 retval = qt_real_tiocmset(tty, port, file, serial, set); 1509 retval = qt_real_tiocmset(tty, port, file, serial, set);
@@ -1584,9 +1584,9 @@ static int qt_calc_num_ports(struct usb_serial *serial)
1584{ 1584{
1585 int num_ports; 1585 int num_ports;
1586 1586
1587 dbg("numberofendpoints: %d \n", 1587 dbg("numberofendpoints: %d\n",
1588 (int)serial->interface->cur_altsetting->desc.bNumEndpoints); 1588 (int)serial->interface->cur_altsetting->desc.bNumEndpoints);
1589 dbg("numberofendpoints: %d \n", 1589 dbg("numberofendpoints: %d\n",
1590 (int)serial->interface->altsetting->desc.bNumEndpoints); 1590 (int)serial->interface->altsetting->desc.bNumEndpoints);
1591 1591
1592 num_ports = 1592 num_ports =
diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c
index 8d7261c052eb..9ffeb36ddde6 100644
--- a/drivers/staging/sm7xx/smtcfb.c
+++ b/drivers/staging/sm7xx/smtcfb.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp. 4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com 5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn 6 * Boyod boyod.yang@siliconmotion.com.cn
7 * 7 *
8 * Copyright (C) 2009 Lemote, Inc. 8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com 9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
@@ -13,17 +13,17 @@
13 * more details. 13 * more details.
14 * 14 *
15 * Version 0.10.26192.21.01 15 * Version 0.10.26192.21.01
16 * - Add PowerPC/Big endian support 16 * - Add PowerPC/Big endian support
17 * - Add 2D support for Lynx 17 * - Add 2D support for Lynx
18 * - Verified on2.6.19.2 Boyod.yang <boyod.yang@siliconmotion.com.cn> 18 * - Verified on2.6.19.2 Boyod.yang <boyod.yang@siliconmotion.com.cn>
19 * 19 *
20 * Version 0.09.2621.00.01 20 * Version 0.09.2621.00.01
21 * - Only support Linux Kernel's version 2.6.21. 21 * - Only support Linux Kernel's version 2.6.21.
22 * Boyod.yang <boyod.yang@siliconmotion.com.cn> 22 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
23 * 23 *
24 * Version 0.09 24 * Version 0.09
25 * - Only support Linux Kernel's version 2.6.12. 25 * - Only support Linux Kernel's version 2.6.12.
26 * Boyod.yang <boyod.yang@siliconmotion.com.cn> 26 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
27 */ 27 */
28 28
29#ifndef __KERNEL__ 29#ifndef __KERNEL__
@@ -688,13 +688,11 @@ static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev,
688{ 688{
689 struct smtcfb_info *sfb; 689 struct smtcfb_info *sfb;
690 690
691 sfb = kmalloc(sizeof(struct smtcfb_info), GFP_KERNEL); 691 sfb = kzalloc(sizeof(struct smtcfb_info), GFP_KERNEL);
692 692
693 if (!sfb) 693 if (!sfb)
694 return NULL; 694 return NULL;
695 695
696 memset(sfb, 0, sizeof(struct smtcfb_info));
697
698 sfb->currcon = -1; 696 sfb->currcon = -1;
699 sfb->dev = dev; 697 sfb->dev = dev;
700 698
diff --git a/drivers/staging/sm7xx/smtcfb.h b/drivers/staging/sm7xx/smtcfb.h
index 7ee565c2c952..0c113835b85c 100644
--- a/drivers/staging/sm7xx/smtcfb.h
+++ b/drivers/staging/sm7xx/smtcfb.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp. 4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com 5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn 6 * Boyod boyod.yang@siliconmotion.com.cn
7 * 7 *
8 * Copyright (C) 2009 Lemote, Inc. 8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com 9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
diff --git a/drivers/staging/strip/Kconfig b/drivers/staging/strip/Kconfig
deleted file mode 100644
index 36257b5cd6e1..000000000000
--- a/drivers/staging/strip/Kconfig
+++ /dev/null
@@ -1,22 +0,0 @@
1config STRIP
2 tristate "STRIP (Metricom starmode radio IP)"
3 depends on INET
4 select WIRELESS_EXT
5 ---help---
6 Say Y if you have a Metricom radio and intend to use Starmode Radio
7 IP. STRIP is a radio protocol developed for the MosquitoNet project
8 to send Internet traffic using Metricom radios. Metricom radios are
9 small, battery powered, 100kbit/sec packet radio transceivers, about
10 the size and weight of a cellular telephone. (You may also have heard
11 them called "Metricom modems" but we avoid the term "modem" because
12 it misleads many people into thinking that you can plug a Metricom
13 modem into a phone line and use it as a modem.)
14
15 You can use STRIP on any Linux machine with a serial port, although
16 it is obviously most useful for people with laptop computers. If you
17 think you might get a Metricom radio in the future, there is no harm
18 in saying Y to STRIP now, except that it makes the kernel a bit
19 bigger.
20
21 To compile this as a module, choose M here: the module will be
22 called strip.
diff --git a/drivers/staging/strip/Makefile b/drivers/staging/strip/Makefile
deleted file mode 100644
index 6417bdcac2fb..000000000000
--- a/drivers/staging/strip/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-$(CONFIG_STRIP) += strip.o
diff --git a/drivers/staging/strip/TODO b/drivers/staging/strip/TODO
deleted file mode 100644
index 9bd15a2f6d9e..000000000000
--- a/drivers/staging/strip/TODO
+++ /dev/null
@@ -1,7 +0,0 @@
1TODO:
2 - step up and maintain this driver to ensure that it continues
3 to work. Having the hardware for this is pretty much a
4 requirement. If this does not happen, the will be removed in
5 the 2.6.35 kernel release.
6
7Please send patches to Greg Kroah-Hartman <greg@kroah.com>.
diff --git a/drivers/staging/strip/strip.c b/drivers/staging/strip/strip.c
deleted file mode 100644
index c976c6b4d28a..000000000000
--- a/drivers/staging/strip/strip.c
+++ /dev/null
@@ -1,2823 +0,0 @@
1/*
2 * Copyright 1996 The Board of Trustees of The Leland Stanford
3 * Junior University. All Rights Reserved.
4 *
5 * Permission to use, copy, modify, and distribute this
6 * software and its documentation for any purpose and without
7 * fee is hereby granted, provided that the above copyright
8 * notice appear in all copies. Stanford University
9 * makes no representations about the suitability of this
10 * software for any purpose. It is provided "as is" without
11 * express or implied warranty.
12 *
13 * strip.c This module implements Starmode Radio IP (STRIP)
14 * for kernel-based devices like TTY. It interfaces between a
15 * raw TTY, and the kernel's INET protocol layers (via DDI).
16 *
17 * Version: @(#)strip.c 1.3 July 1997
18 *
19 * Author: Stuart Cheshire <cheshire@cs.stanford.edu>
20 *
21 * Fixes: v0.9 12th Feb 1996 (SC)
22 * New byte stuffing (2+6 run-length encoding)
23 * New watchdog timer task
24 * New Protocol key (SIP0)
25 *
26 * v0.9.1 3rd March 1996 (SC)
27 * Changed to dynamic device allocation -- no more compile
28 * time (or boot time) limit on the number of STRIP devices.
29 *
30 * v0.9.2 13th March 1996 (SC)
31 * Uses arp cache lookups (but doesn't send arp packets yet)
32 *
33 * v0.9.3 17th April 1996 (SC)
34 * Fixed bug where STR_ERROR flag was getting set unneccessarily
35 * (causing otherwise good packets to be unneccessarily dropped)
36 *
37 * v0.9.4 27th April 1996 (SC)
38 * First attempt at using "&COMMAND" Starmode AT commands
39 *
40 * v0.9.5 29th May 1996 (SC)
41 * First attempt at sending (unicast) ARP packets
42 *
43 * v0.9.6 5th June 1996 (Elliot)
44 * Put "message level" tags in every "printk" statement
45 *
46 * v0.9.7 13th June 1996 (laik)
47 * Added support for the /proc fs
48 *
49 * v0.9.8 July 1996 (Mema)
50 * Added packet logging
51 *
52 * v1.0 November 1996 (SC)
53 * Fixed (severe) memory leaks in the /proc fs code
54 * Fixed race conditions in the logging code
55 *
56 * v1.1 January 1997 (SC)
57 * Deleted packet logging (use tcpdump instead)
58 * Added support for Metricom Firmware v204 features
59 * (like message checksums)
60 *
61 * v1.2 January 1997 (SC)
62 * Put portables list back in
63 *
64 * v1.3 July 1997 (SC)
65 * Made STRIP driver set the radio's baud rate automatically.
66 * It is no longer necessarily to manually set the radio's
67 * rate permanently to 115200 -- the driver handles setting
68 * the rate automatically.
69 */
70
71#ifdef MODULE
72static const char StripVersion[] = "1.3A-STUART.CHESHIRE-MODULAR";
73#else
74static const char StripVersion[] = "1.3A-STUART.CHESHIRE";
75#endif
76
77#define TICKLE_TIMERS 0
78#define EXT_COUNTERS 1
79
80
81/************************************************************************/
82/* Header files */
83
84#include <linux/kernel.h>
85#include <linux/module.h>
86#include <linux/init.h>
87#include <linux/bitops.h>
88#include <asm/system.h>
89#include <asm/uaccess.h>
90
91# include <linux/ctype.h>
92#include <linux/string.h>
93#include <linux/mm.h>
94#include <linux/interrupt.h>
95#include <linux/in.h>
96#include <linux/tty.h>
97#include <linux/errno.h>
98#include <linux/netdevice.h>
99#include <linux/inetdevice.h>
100#include <linux/etherdevice.h>
101#include <linux/skbuff.h>
102#include <linux/if_arp.h>
103#include <linux/if_strip.h>
104#include <linux/proc_fs.h>
105#include <linux/seq_file.h>
106#include <linux/serial.h>
107#include <linux/serialP.h>
108#include <linux/rcupdate.h>
109#include <linux/compat.h>
110#include <linux/slab.h>
111#include <net/arp.h>
112#include <net/net_namespace.h>
113
114#include <linux/ip.h>
115#include <linux/tcp.h>
116#include <linux/time.h>
117#include <linux/jiffies.h>
118
119/************************************************************************/
120/* Useful structures and definitions */
121
122/*
123 * A MetricomKey identifies the protocol being carried inside a Metricom
124 * Starmode packet.
125 */
126
127typedef union {
128 __u8 c[4];
129 __u32 l;
130} MetricomKey;
131
132/*
133 * An IP address can be viewed as four bytes in memory (which is what it is) or as
134 * a single 32-bit long (which is convenient for assignment, equality testing etc.)
135 */
136
137typedef union {
138 __u8 b[4];
139 __u32 l;
140} IPaddr;
141
142/*
143 * A MetricomAddressString is used to hold a printable representation of
144 * a Metricom address.
145 */
146
147typedef struct {
148 __u8 c[24];
149} MetricomAddressString;
150
151/* Encapsulation can expand packet of size x to 65/64x + 1
152 * Sent packet looks like "<CR>*<address>*<key><encaps payload><CR>"
153 * 1 1 1-18 1 4 ? 1
154 * eg. <CR>*0000-1234*SIP0<encaps payload><CR>
155 * We allow 31 bytes for the stars, the key, the address and the <CR>s
156 */
157#define STRIP_ENCAP_SIZE(X) (32 + (X)*65L/64L)
158
159/*
160 * A STRIP_Header is never really sent over the radio, but making a dummy
161 * header for internal use within the kernel that looks like an Ethernet
162 * header makes certain other software happier. For example, tcpdump
163 * already understands Ethernet headers.
164 */
165
166typedef struct {
167 MetricomAddress dst_addr; /* Destination address, e.g. "0000-1234" */
168 MetricomAddress src_addr; /* Source address, e.g. "0000-5678" */
169 unsigned short protocol; /* The protocol type, using Ethernet codes */
170} STRIP_Header;
171
172typedef struct {
173 char c[60];
174} MetricomNode;
175
176#define NODE_TABLE_SIZE 32
177typedef struct {
178 struct timeval timestamp;
179 int num_nodes;
180 MetricomNode node[NODE_TABLE_SIZE];
181} MetricomNodeTable;
182
183enum { FALSE = 0, TRUE = 1 };
184
185/*
186 * Holds the radio's firmware version.
187 */
188typedef struct {
189 char c[50];
190} FirmwareVersion;
191
192/*
193 * Holds the radio's serial number.
194 */
195typedef struct {
196 char c[18];
197} SerialNumber;
198
199/*
200 * Holds the radio's battery voltage.
201 */
202typedef struct {
203 char c[11];
204} BatteryVoltage;
205
206typedef struct {
207 char c[8];
208} char8;
209
210enum {
211 NoStructure = 0, /* Really old firmware */
212 StructuredMessages = 1, /* Parsable AT response msgs */
213 ChecksummedMessages = 2 /* Parsable AT response msgs with checksums */
214};
215
216struct strip {
217 int magic;
218 /*
219 * These are pointers to the malloc()ed frame buffers.
220 */
221
222 unsigned char *rx_buff; /* buffer for received IP packet */
223 unsigned char *sx_buff; /* buffer for received serial data */
224 int sx_count; /* received serial data counter */
225 int sx_size; /* Serial buffer size */
226 unsigned char *tx_buff; /* transmitter buffer */
227 unsigned char *tx_head; /* pointer to next byte to XMIT */
228 int tx_left; /* bytes left in XMIT queue */
229 int tx_size; /* Serial buffer size */
230
231 /*
232 * STRIP interface statistics.
233 */
234
235 unsigned long rx_packets; /* inbound frames counter */
236 unsigned long tx_packets; /* outbound frames counter */
237 unsigned long rx_errors; /* Parity, etc. errors */
238 unsigned long tx_errors; /* Planned stuff */
239 unsigned long rx_dropped; /* No memory for skb */
240 unsigned long tx_dropped; /* When MTU change */
241 unsigned long rx_over_errors; /* Frame bigger than STRIP buf. */
242
243 unsigned long pps_timer; /* Timer to determine pps */
244 unsigned long rx_pps_count; /* Counter to determine pps */
245 unsigned long tx_pps_count; /* Counter to determine pps */
246 unsigned long sx_pps_count; /* Counter to determine pps */
247 unsigned long rx_average_pps; /* rx packets per second * 8 */
248 unsigned long tx_average_pps; /* tx packets per second * 8 */
249 unsigned long sx_average_pps; /* sent packets per second * 8 */
250
251#ifdef EXT_COUNTERS
252 unsigned long rx_bytes; /* total received bytes */
253 unsigned long tx_bytes; /* total received bytes */
254 unsigned long rx_rbytes; /* bytes thru radio i/f */
255 unsigned long tx_rbytes; /* bytes thru radio i/f */
256 unsigned long rx_sbytes; /* tot bytes thru serial i/f */
257 unsigned long tx_sbytes; /* tot bytes thru serial i/f */
258 unsigned long rx_ebytes; /* tot stat/err bytes */
259 unsigned long tx_ebytes; /* tot stat/err bytes */
260#endif
261
262 /*
263 * Internal variables.
264 */
265
266 struct list_head list; /* Linked list of devices */
267
268 int discard; /* Set if serial error */
269 int working; /* Is radio working correctly? */
270 int firmware_level; /* Message structuring level */
271 int next_command; /* Next periodic command */
272 unsigned int user_baud; /* The user-selected baud rate */
273 int mtu; /* Our mtu (to spot changes!) */
274 long watchdog_doprobe; /* Next time to test the radio */
275 long watchdog_doreset; /* Time to do next reset */
276 long gratuitous_arp; /* Time to send next ARP refresh */
277 long arp_interval; /* Next ARP interval */
278 struct timer_list idle_timer; /* For periodic wakeup calls */
279 MetricomAddress true_dev_addr; /* True address of radio */
280 int manual_dev_addr; /* Hack: See note below */
281
282 FirmwareVersion firmware_version; /* The radio's firmware version */
283 SerialNumber serial_number; /* The radio's serial number */
284 BatteryVoltage battery_voltage; /* The radio's battery voltage */
285
286 /*
287 * Other useful structures.
288 */
289
290 struct tty_struct *tty; /* ptr to TTY structure */
291 struct net_device *dev; /* Our device structure */
292
293 /*
294 * Neighbour radio records
295 */
296
297 MetricomNodeTable portables;
298 MetricomNodeTable poletops;
299};
300
301/*
302 * Note: manual_dev_addr hack
303 *
304 * It is not possible to change the hardware address of a Metricom radio,
305 * or to send packets with a user-specified hardware source address, thus
306 * trying to manually set a hardware source address is a questionable
307 * thing to do. However, if the user *does* manually set the hardware
308 * source address of a STRIP interface, then the kernel will believe it,
309 * and use it in certain places. For example, the hardware address listed
310 * by ifconfig will be the manual address, not the true one.
311 * (Both addresses are listed in /proc/net/strip.)
312 * Also, ARP packets will be sent out giving the user-specified address as
313 * the source address, not the real address. This is dangerous, because
314 * it means you won't receive any replies -- the ARP replies will go to
315 * the specified address, which will be some other radio. The case where
316 * this is useful is when that other radio is also connected to the same
317 * machine. This allows you to connect a pair of radios to one machine,
318 * and to use one exclusively for inbound traffic, and the other
319 * exclusively for outbound traffic. Pretty neat, huh?
320 *
321 * Here's the full procedure to set this up:
322 *
323 * 1. "slattach" two interfaces, e.g. st0 for outgoing packets,
324 * and st1 for incoming packets
325 *
326 * 2. "ifconfig" st0 (outbound radio) to have the hardware address
327 * which is the real hardware address of st1 (inbound radio).
328 * Now when it sends out packets, it will masquerade as st1, and
329 * replies will be sent to that radio, which is exactly what we want.
330 *
331 * 3. Set the route table entry ("route add default ..." or
332 * "route add -net ...", as appropriate) to send packets via the st0
333 * interface (outbound radio). Do not add any route which sends packets
334 * out via the st1 interface -- that radio is for inbound traffic only.
335 *
336 * 4. "ifconfig" st1 (inbound radio) to have hardware address zero.
337 * This tells the STRIP driver to "shut down" that interface and not
338 * send any packets through it. In particular, it stops sending the
339 * periodic gratuitous ARP packets that a STRIP interface normally sends.
340 * Also, when packets arrive on that interface, it will search the
341 * interface list to see if there is another interface who's manual
342 * hardware address matches its own real address (i.e. st0 in this
343 * example) and if so it will transfer ownership of the skbuff to
344 * that interface, so that it looks to the kernel as if the packet
345 * arrived on that interface. This is necessary because when the
346 * kernel sends an ARP packet on st0, it expects to get a reply on
347 * st0, and if it sees the reply come from st1 then it will ignore
348 * it (to be accurate, it puts the entry in the ARP table, but
349 * labelled in such a way that st0 can't use it).
350 *
351 * Thanks to Petros Maniatis for coming up with the idea of splitting
352 * inbound and outbound traffic between two interfaces, which turned
353 * out to be really easy to implement, even if it is a bit of a hack.
354 *
355 * Having set a manual address on an interface, you can restore it
356 * to automatic operation (where the address is automatically kept
357 * consistent with the real address of the radio) by setting a manual
358 * address of all ones, e.g. "ifconfig st0 hw strip FFFFFFFFFFFF"
359 * This 'turns off' manual override mode for the device address.
360 *
361 * Note: The IEEE 802 headers reported in tcpdump will show the *real*
362 * radio addresses the packets were sent and received from, so that you
363 * can see what is really going on with packets, and which interfaces
364 * they are really going through.
365 */
366
367
368/************************************************************************/
369/* Constants */
370
371/*
372 * CommandString1 works on all radios
373 * Other CommandStrings are only used with firmware that provides structured responses.
374 *
375 * ats319=1 Enables Info message for node additions and deletions
376 * ats319=2 Enables Info message for a new best node
377 * ats319=4 Enables checksums
378 * ats319=8 Enables ACK messages
379 */
380
381static const int MaxCommandStringLength = 32;
382static const int CompatibilityCommand = 1;
383
384static const char CommandString0[] = "*&COMMAND*ATS319=7"; /* Turn on checksums & info messages */
385static const char CommandString1[] = "*&COMMAND*ATS305?"; /* Query radio name */
386static const char CommandString2[] = "*&COMMAND*ATS325?"; /* Query battery voltage */
387static const char CommandString3[] = "*&COMMAND*ATS300?"; /* Query version information */
388static const char CommandString4[] = "*&COMMAND*ATS311?"; /* Query poletop list */
389static const char CommandString5[] = "*&COMMAND*AT~LA"; /* Query portables list */
390typedef struct {
391 const char *string;
392 long length;
393} StringDescriptor;
394
395static const StringDescriptor CommandString[] = {
396 {CommandString0, sizeof(CommandString0) - 1},
397 {CommandString1, sizeof(CommandString1) - 1},
398 {CommandString2, sizeof(CommandString2) - 1},
399 {CommandString3, sizeof(CommandString3) - 1},
400 {CommandString4, sizeof(CommandString4) - 1},
401 {CommandString5, sizeof(CommandString5) - 1}
402};
403
404#define GOT_ALL_RADIO_INFO(S) \
405 ((S)->firmware_version.c[0] && \
406 (S)->battery_voltage.c[0] && \
407 memcmp(&(S)->true_dev_addr, zero_address.c, sizeof(zero_address)))
408
409static const char hextable[16] = "0123456789ABCDEF";
410
411static const MetricomAddress zero_address;
412static const MetricomAddress broadcast_address =
413 { {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF} };
414
415static const MetricomKey SIP0Key = { "SIP0" };
416static const MetricomKey ARP0Key = { "ARP0" };
417static const MetricomKey ATR_Key = { "ATR " };
418static const MetricomKey ACK_Key = { "ACK_" };
419static const MetricomKey INF_Key = { "INF_" };
420static const MetricomKey ERR_Key = { "ERR_" };
421
422static const long MaxARPInterval = 60 * HZ; /* One minute */
423
424/*
425 * Maximum Starmode packet length is 1183 bytes. Allowing 4 bytes for
426 * protocol key, 4 bytes for checksum, one byte for CR, and 65/64 expansion
427 * for STRIP encoding, that translates to a maximum payload MTU of 1155.
428 * Note: A standard NFS 1K data packet is a total of 0x480 (1152) bytes
429 * long, including IP header, UDP header, and NFS header. Setting the STRIP
430 * MTU to 1152 allows us to send default sized NFS packets without fragmentation.
431 */
432static const unsigned short MAX_SEND_MTU = 1152;
433static const unsigned short MAX_RECV_MTU = 1500; /* Hoping for Ethernet sized packets in the future! */
434static const unsigned short DEFAULT_STRIP_MTU = 1152;
435static const int STRIP_MAGIC = 0x5303;
436static const long LongTime = 0x7FFFFFFF;
437
438/************************************************************************/
439/* Global variables */
440
441static LIST_HEAD(strip_list);
442static DEFINE_SPINLOCK(strip_lock);
443
444/************************************************************************/
445/* Macros */
446
447/* Returns TRUE if text T begins with prefix P */
448#define has_prefix(T,L,P) (((L) >= sizeof(P)-1) && !strncmp((T), (P), sizeof(P)-1))
449
450/* Returns TRUE if text T of length L is equal to string S */
451#define text_equal(T,L,S) (((L) == sizeof(S)-1) && !strncmp((T), (S), sizeof(S)-1))
452
453#define READHEX(X) ((X)>='0' && (X)<='9' ? (X)-'0' : \
454 (X)>='a' && (X)<='f' ? (X)-'a'+10 : \
455 (X)>='A' && (X)<='F' ? (X)-'A'+10 : 0 )
456
457#define READHEX16(X) ((__u16)(READHEX(X)))
458
459#define READDEC(X) ((X)>='0' && (X)<='9' ? (X)-'0' : 0)
460
461#define ARRAY_END(X) (&((X)[ARRAY_SIZE(X)]))
462
463#define JIFFIE_TO_SEC(X) ((X) / HZ)
464
465
466/************************************************************************/
467/* Utility routines */
468
469static int arp_query(unsigned char *haddr, u32 paddr,
470 struct net_device *dev)
471{
472 struct neighbour *neighbor_entry;
473 int ret = 0;
474
475 neighbor_entry = neigh_lookup(&arp_tbl, &paddr, dev);
476
477 if (neighbor_entry != NULL) {
478 neighbor_entry->used = jiffies;
479 if (neighbor_entry->nud_state & NUD_VALID) {
480 memcpy(haddr, neighbor_entry->ha, dev->addr_len);
481 ret = 1;
482 }
483 neigh_release(neighbor_entry);
484 }
485 return ret;
486}
487
488static void DumpData(char *msg, struct strip *strip_info, __u8 * ptr,
489 __u8 * end)
490{
491 static const int MAX_DumpData = 80;
492 __u8 pkt_text[MAX_DumpData], *p = pkt_text;
493
494 *p++ = '\"';
495
496 while (ptr < end && p < &pkt_text[MAX_DumpData - 4]) {
497 if (*ptr == '\\') {
498 *p++ = '\\';
499 *p++ = '\\';
500 } else {
501 if (*ptr >= 32 && *ptr <= 126) {
502 *p++ = *ptr;
503 } else {
504 sprintf(p, "\\%02X", *ptr);
505 p += 3;
506 }
507 }
508 ptr++;
509 }
510
511 if (ptr == end)
512 *p++ = '\"';
513 *p++ = 0;
514
515 printk(KERN_INFO "%s: %-13s%s\n", strip_info->dev->name, msg, pkt_text);
516}
517
518
519/************************************************************************/
520/* Byte stuffing/unstuffing routines */
521
522/* Stuffing scheme:
523 * 00 Unused (reserved character)
524 * 01-3F Run of 2-64 different characters
525 * 40-7F Run of 1-64 different characters plus a single zero at the end
526 * 80-BF Run of 1-64 of the same character
527 * C0-FF Run of 1-64 zeroes (ASCII 0)
528 */
529
530typedef enum {
531 Stuff_Diff = 0x00,
532 Stuff_DiffZero = 0x40,
533 Stuff_Same = 0x80,
534 Stuff_Zero = 0xC0,
535 Stuff_NoCode = 0xFF, /* Special code, meaning no code selected */
536
537 Stuff_CodeMask = 0xC0,
538 Stuff_CountMask = 0x3F,
539 Stuff_MaxCount = 0x3F,
540 Stuff_Magic = 0x0D /* The value we are eliminating */
541} StuffingCode;
542
543/* StuffData encodes the data starting at "src" for "length" bytes.
544 * It writes it to the buffer pointed to by "dst" (which must be at least
545 * as long as 1 + 65/64 of the input length). The output may be up to 1.6%
546 * larger than the input for pathological input, but will usually be smaller.
547 * StuffData returns the new value of the dst pointer as its result.
548 * "code_ptr_ptr" points to a "__u8 *" which is used to hold encoding state
549 * between calls, allowing an encoded packet to be incrementally built up
550 * from small parts. On the first call, the "__u8 *" pointed to should be
551 * initialized to NULL; between subsequent calls the calling routine should
552 * leave the value alone and simply pass it back unchanged so that the
553 * encoder can recover its current state.
554 */
555
556#define StuffData_FinishBlock(X) \
557(*code_ptr = (X) ^ Stuff_Magic, code = Stuff_NoCode)
558
559static __u8 *StuffData(__u8 * src, __u32 length, __u8 * dst,
560 __u8 ** code_ptr_ptr)
561{
562 __u8 *end = src + length;
563 __u8 *code_ptr = *code_ptr_ptr;
564 __u8 code = Stuff_NoCode, count = 0;
565
566 if (!length)
567 return (dst);
568
569 if (code_ptr) {
570 /*
571 * Recover state from last call, if applicable
572 */
573 code = (*code_ptr ^ Stuff_Magic) & Stuff_CodeMask;
574 count = (*code_ptr ^ Stuff_Magic) & Stuff_CountMask;
575 }
576
577 while (src < end) {
578 switch (code) {
579 /* Stuff_NoCode: If no current code, select one */
580 case Stuff_NoCode:
581 /* Record where we're going to put this code */
582 code_ptr = dst++;
583 count = 0; /* Reset the count (zero means one instance) */
584 /* Tentatively start a new block */
585 if (*src == 0) {
586 code = Stuff_Zero;
587 src++;
588 } else {
589 code = Stuff_Same;
590 *dst++ = *src++ ^ Stuff_Magic;
591 }
592 /* Note: We optimistically assume run of same -- */
593 /* which will be fixed later in Stuff_Same */
594 /* if it turns out not to be true. */
595 break;
596
597 /* Stuff_Zero: We already have at least one zero encoded */
598 case Stuff_Zero:
599 /* If another zero, count it, else finish this code block */
600 if (*src == 0) {
601 count++;
602 src++;
603 } else {
604 StuffData_FinishBlock(Stuff_Zero + count);
605 }
606 break;
607
608 /* Stuff_Same: We already have at least one byte encoded */
609 case Stuff_Same:
610 /* If another one the same, count it */
611 if ((*src ^ Stuff_Magic) == code_ptr[1]) {
612 count++;
613 src++;
614 break;
615 }
616 /* else, this byte does not match this block. */
617 /* If we already have two or more bytes encoded, finish this code block */
618 if (count) {
619 StuffData_FinishBlock(Stuff_Same + count);
620 break;
621 }
622 /* else, we only have one so far, so switch to Stuff_Diff code */
623 code = Stuff_Diff;
624 /* and fall through to Stuff_Diff case below
625 * Note cunning cleverness here: case Stuff_Diff compares
626 * the current character with the previous two to see if it
627 * has a run of three the same. Won't this be an error if
628 * there aren't two previous characters stored to compare with?
629 * No. Because we know the current character is *not* the same
630 * as the previous one, the first test below will necessarily
631 * fail and the send half of the "if" won't be executed.
632 */
633
634 /* Stuff_Diff: We have at least two *different* bytes encoded */
635 case Stuff_Diff:
636 /* If this is a zero, must encode a Stuff_DiffZero, and begin a new block */
637 if (*src == 0) {
638 StuffData_FinishBlock(Stuff_DiffZero +
639 count);
640 }
641 /* else, if we have three in a row, it is worth starting a Stuff_Same block */
642 else if ((*src ^ Stuff_Magic) == dst[-1]
643 && dst[-1] == dst[-2]) {
644 /* Back off the last two characters we encoded */
645 code += count - 2;
646 /* Note: "Stuff_Diff + 0" is an illegal code */
647 if (code == Stuff_Diff + 0) {
648 code = Stuff_Same + 0;
649 }
650 StuffData_FinishBlock(code);
651 code_ptr = dst - 2;
652 /* dst[-1] already holds the correct value */
653 count = 2; /* 2 means three bytes encoded */
654 code = Stuff_Same;
655 }
656 /* else, another different byte, so add it to the block */
657 else {
658 *dst++ = *src ^ Stuff_Magic;
659 count++;
660 }
661 src++; /* Consume the byte */
662 break;
663 }
664 if (count == Stuff_MaxCount) {
665 StuffData_FinishBlock(code + count);
666 }
667 }
668 if (code == Stuff_NoCode) {
669 *code_ptr_ptr = NULL;
670 } else {
671 *code_ptr_ptr = code_ptr;
672 StuffData_FinishBlock(code + count);
673 }
674 return (dst);
675}
676
677/*
678 * UnStuffData decodes the data at "src", up to (but not including) "end".
679 * It writes the decoded data into the buffer pointed to by "dst", up to a
680 * maximum of "dst_length", and returns the new value of "src" so that a
681 * follow-on call can read more data, continuing from where the first left off.
682 *
683 * There are three types of results:
684 * 1. The source data runs out before extracting "dst_length" bytes:
685 * UnStuffData returns NULL to indicate failure.
686 * 2. The source data produces exactly "dst_length" bytes:
687 * UnStuffData returns new_src = end to indicate that all bytes were consumed.
688 * 3. "dst_length" bytes are extracted, with more remaining.
689 * UnStuffData returns new_src < end to indicate that there are more bytes
690 * to be read.
691 *
692 * Note: The decoding may be destructive, in that it may alter the source
693 * data in the process of decoding it (this is necessary to allow a follow-on
694 * call to resume correctly).
695 */
696
697static __u8 *UnStuffData(__u8 * src, __u8 * end, __u8 * dst,
698 __u32 dst_length)
699{
700 __u8 *dst_end = dst + dst_length;
701 /* Sanity check */
702 if (!src || !end || !dst || !dst_length)
703 return (NULL);
704 while (src < end && dst < dst_end) {
705 int count = (*src ^ Stuff_Magic) & Stuff_CountMask;
706 switch ((*src ^ Stuff_Magic) & Stuff_CodeMask) {
707 case Stuff_Diff:
708 if (src + 1 + count >= end)
709 return (NULL);
710 do {
711 *dst++ = *++src ^ Stuff_Magic;
712 }
713 while (--count >= 0 && dst < dst_end);
714 if (count < 0)
715 src += 1;
716 else {
717 if (count == 0)
718 *src = Stuff_Same ^ Stuff_Magic;
719 else
720 *src =
721 (Stuff_Diff +
722 count) ^ Stuff_Magic;
723 }
724 break;
725 case Stuff_DiffZero:
726 if (src + 1 + count >= end)
727 return (NULL);
728 do {
729 *dst++ = *++src ^ Stuff_Magic;
730 }
731 while (--count >= 0 && dst < dst_end);
732 if (count < 0)
733 *src = Stuff_Zero ^ Stuff_Magic;
734 else
735 *src =
736 (Stuff_DiffZero + count) ^ Stuff_Magic;
737 break;
738 case Stuff_Same:
739 if (src + 1 >= end)
740 return (NULL);
741 do {
742 *dst++ = src[1] ^ Stuff_Magic;
743 }
744 while (--count >= 0 && dst < dst_end);
745 if (count < 0)
746 src += 2;
747 else
748 *src = (Stuff_Same + count) ^ Stuff_Magic;
749 break;
750 case Stuff_Zero:
751 do {
752 *dst++ = 0;
753 }
754 while (--count >= 0 && dst < dst_end);
755 if (count < 0)
756 src += 1;
757 else
758 *src = (Stuff_Zero + count) ^ Stuff_Magic;
759 break;
760 }
761 }
762 if (dst < dst_end)
763 return (NULL);
764 else
765 return (src);
766}
767
768
769/************************************************************************/
770/* General routines for STRIP */
771
772/*
773 * set_baud sets the baud rate to the rate defined by baudcode
774 */
775static void set_baud(struct tty_struct *tty, speed_t baudrate)
776{
777 struct ktermios old_termios;
778
779 mutex_lock(&tty->termios_mutex);
780 old_termios =*(tty->termios);
781 tty_encode_baud_rate(tty, baudrate, baudrate);
782 tty->ops->set_termios(tty, &old_termios);
783 mutex_unlock(&tty->termios_mutex);
784}
785
786/*
787 * Convert a string to a Metricom Address.
788 */
789
790#define IS_RADIO_ADDRESS(p) ( \
791 isdigit((p)[0]) && isdigit((p)[1]) && isdigit((p)[2]) && isdigit((p)[3]) && \
792 (p)[4] == '-' && \
793 isdigit((p)[5]) && isdigit((p)[6]) && isdigit((p)[7]) && isdigit((p)[8]) )
794
795static int string_to_radio_address(MetricomAddress * addr, __u8 * p)
796{
797 if (!IS_RADIO_ADDRESS(p))
798 return (1);
799 addr->c[0] = 0;
800 addr->c[1] = 0;
801 addr->c[2] = READHEX(p[0]) << 4 | READHEX(p[1]);
802 addr->c[3] = READHEX(p[2]) << 4 | READHEX(p[3]);
803 addr->c[4] = READHEX(p[5]) << 4 | READHEX(p[6]);
804 addr->c[5] = READHEX(p[7]) << 4 | READHEX(p[8]);
805 return (0);
806}
807
808/*
809 * Convert a Metricom Address to a string.
810 */
811
812static __u8 *radio_address_to_string(const MetricomAddress * addr,
813 MetricomAddressString * p)
814{
815 sprintf(p->c, "%02X%02X-%02X%02X", addr->c[2], addr->c[3],
816 addr->c[4], addr->c[5]);
817 return (p->c);
818}
819
820/*
821 * Note: Must make sure sx_size is big enough to receive a stuffed
822 * MAX_RECV_MTU packet. Additionally, we also want to ensure that it's
823 * big enough to receive a large radio neighbour list (currently 4K).
824 */
825
826static int allocate_buffers(struct strip *strip_info, int mtu)
827{
828 struct net_device *dev = strip_info->dev;
829 int sx_size = max_t(int, STRIP_ENCAP_SIZE(MAX_RECV_MTU), 4096);
830 int tx_size = STRIP_ENCAP_SIZE(mtu) + MaxCommandStringLength;
831 __u8 *r = kmalloc(MAX_RECV_MTU, GFP_ATOMIC);
832 __u8 *s = kmalloc(sx_size, GFP_ATOMIC);
833 __u8 *t = kmalloc(tx_size, GFP_ATOMIC);
834 if (r && s && t) {
835 strip_info->rx_buff = r;
836 strip_info->sx_buff = s;
837 strip_info->tx_buff = t;
838 strip_info->sx_size = sx_size;
839 strip_info->tx_size = tx_size;
840 strip_info->mtu = dev->mtu = mtu;
841 return (1);
842 }
843 kfree(r);
844 kfree(s);
845 kfree(t);
846 return (0);
847}
848
849/*
850 * MTU has been changed by the IP layer.
851 * We could be in
852 * an upcall from the tty driver, or in an ip packet queue.
853 */
854static int strip_change_mtu(struct net_device *dev, int new_mtu)
855{
856 struct strip *strip_info = netdev_priv(dev);
857 int old_mtu = strip_info->mtu;
858 unsigned char *orbuff = strip_info->rx_buff;
859 unsigned char *osbuff = strip_info->sx_buff;
860 unsigned char *otbuff = strip_info->tx_buff;
861
862 if (new_mtu > MAX_SEND_MTU) {
863 printk(KERN_ERR
864 "%s: MTU exceeds maximum allowable (%d), MTU change cancelled.\n",
865 strip_info->dev->name, MAX_SEND_MTU);
866 return -EINVAL;
867 }
868
869 spin_lock_bh(&strip_lock);
870 if (!allocate_buffers(strip_info, new_mtu)) {
871 printk(KERN_ERR "%s: unable to grow strip buffers, MTU change cancelled.\n",
872 strip_info->dev->name);
873 spin_unlock_bh(&strip_lock);
874 return -ENOMEM;
875 }
876
877 if (strip_info->sx_count) {
878 if (strip_info->sx_count <= strip_info->sx_size)
879 memcpy(strip_info->sx_buff, osbuff,
880 strip_info->sx_count);
881 else {
882 strip_info->discard = strip_info->sx_count;
883 strip_info->rx_over_errors++;
884 }
885 }
886
887 if (strip_info->tx_left) {
888 if (strip_info->tx_left <= strip_info->tx_size)
889 memcpy(strip_info->tx_buff, strip_info->tx_head,
890 strip_info->tx_left);
891 else {
892 strip_info->tx_left = 0;
893 strip_info->tx_dropped++;
894 }
895 }
896 strip_info->tx_head = strip_info->tx_buff;
897 spin_unlock_bh(&strip_lock);
898
899 printk(KERN_NOTICE "%s: strip MTU changed fom %d to %d.\n",
900 strip_info->dev->name, old_mtu, strip_info->mtu);
901
902 kfree(orbuff);
903 kfree(osbuff);
904 kfree(otbuff);
905 return 0;
906}
907
908static void strip_unlock(struct strip *strip_info)
909{
910 /*
911 * Set the timer to go off in one second.
912 */
913 strip_info->idle_timer.expires = jiffies + 1 * HZ;
914 add_timer(&strip_info->idle_timer);
915 netif_wake_queue(strip_info->dev);
916}
917
918
919
920/*
921 * If the time is in the near future, time_delta prints the number of
922 * seconds to go into the buffer and returns the address of the buffer.
923 * If the time is not in the near future, it returns the address of the
924 * string "Not scheduled" The buffer must be long enough to contain the
925 * ascii representation of the number plus 9 charactes for the " seconds"
926 * and the null character.
927 */
928#ifdef CONFIG_PROC_FS
929static char *time_delta(char buffer[], long time)
930{
931 time -= jiffies;
932 if (time > LongTime / 2)
933 return ("Not scheduled");
934 if (time < 0)
935 time = 0; /* Don't print negative times */
936 sprintf(buffer, "%ld seconds", time / HZ);
937 return (buffer);
938}
939
940/* get Nth element of the linked list */
941static struct strip *strip_get_idx(loff_t pos)
942{
943 struct strip *str;
944 int i = 0;
945
946 list_for_each_entry_rcu(str, &strip_list, list) {
947 if (pos == i)
948 return str;
949 ++i;
950 }
951 return NULL;
952}
953
954static void *strip_seq_start(struct seq_file *seq, loff_t *pos)
955 __acquires(RCU)
956{
957 rcu_read_lock();
958 return *pos ? strip_get_idx(*pos - 1) : SEQ_START_TOKEN;
959}
960
961static void *strip_seq_next(struct seq_file *seq, void *v, loff_t *pos)
962{
963 struct list_head *l;
964 struct strip *s;
965
966 ++*pos;
967 if (v == SEQ_START_TOKEN)
968 return strip_get_idx(1);
969
970 s = v;
971 l = &s->list;
972 list_for_each_continue_rcu(l, &strip_list) {
973 return list_entry(l, struct strip, list);
974 }
975 return NULL;
976}
977
978static void strip_seq_stop(struct seq_file *seq, void *v)
979 __releases(RCU)
980{
981 rcu_read_unlock();
982}
983
984static void strip_seq_neighbours(struct seq_file *seq,
985 const MetricomNodeTable * table,
986 const char *title)
987{
988 /* We wrap this in a do/while loop, so if the table changes */
989 /* while we're reading it, we just go around and try again. */
990 struct timeval t;
991
992 do {
993 int i;
994 t = table->timestamp;
995 if (table->num_nodes)
996 seq_printf(seq, "\n %s\n", title);
997 for (i = 0; i < table->num_nodes; i++) {
998 MetricomNode node;
999
1000 spin_lock_bh(&strip_lock);
1001 node = table->node[i];
1002 spin_unlock_bh(&strip_lock);
1003 seq_printf(seq, " %s\n", node.c);
1004 }
1005 } while (table->timestamp.tv_sec != t.tv_sec
1006 || table->timestamp.tv_usec != t.tv_usec);
1007}
1008
1009/*
1010 * This function prints radio status information via the seq_file
1011 * interface. The interface takes care of buffer size and over
1012 * run issues.
1013 *
1014 * The buffer in seq_file is PAGESIZE (4K)
1015 * so this routine should never print more or it will get truncated.
1016 * With the maximum of 32 portables and 32 poletops
1017 * reported, the routine outputs 3107 bytes into the buffer.
1018 */
1019static void strip_seq_status_info(struct seq_file *seq,
1020 const struct strip *strip_info)
1021{
1022 char temp[32];
1023 MetricomAddressString addr_string;
1024
1025 /* First, we must copy all of our data to a safe place, */
1026 /* in case a serial interrupt comes in and changes it. */
1027 int tx_left = strip_info->tx_left;
1028 unsigned long rx_average_pps = strip_info->rx_average_pps;
1029 unsigned long tx_average_pps = strip_info->tx_average_pps;
1030 unsigned long sx_average_pps = strip_info->sx_average_pps;
1031 int working = strip_info->working;
1032 int firmware_level = strip_info->firmware_level;
1033 long watchdog_doprobe = strip_info->watchdog_doprobe;
1034 long watchdog_doreset = strip_info->watchdog_doreset;
1035 long gratuitous_arp = strip_info->gratuitous_arp;
1036 long arp_interval = strip_info->arp_interval;
1037 FirmwareVersion firmware_version = strip_info->firmware_version;
1038 SerialNumber serial_number = strip_info->serial_number;
1039 BatteryVoltage battery_voltage = strip_info->battery_voltage;
1040 char *if_name = strip_info->dev->name;
1041 MetricomAddress true_dev_addr = strip_info->true_dev_addr;
1042 MetricomAddress dev_dev_addr =
1043 *(MetricomAddress *) strip_info->dev->dev_addr;
1044 int manual_dev_addr = strip_info->manual_dev_addr;
1045#ifdef EXT_COUNTERS
1046 unsigned long rx_bytes = strip_info->rx_bytes;
1047 unsigned long tx_bytes = strip_info->tx_bytes;
1048 unsigned long rx_rbytes = strip_info->rx_rbytes;
1049 unsigned long tx_rbytes = strip_info->tx_rbytes;
1050 unsigned long rx_sbytes = strip_info->rx_sbytes;
1051 unsigned long tx_sbytes = strip_info->tx_sbytes;
1052 unsigned long rx_ebytes = strip_info->rx_ebytes;
1053 unsigned long tx_ebytes = strip_info->tx_ebytes;
1054#endif
1055
1056 seq_printf(seq, "\nInterface name\t\t%s\n", if_name);
1057 seq_printf(seq, " Radio working:\t\t%s\n", working ? "Yes" : "No");
1058 radio_address_to_string(&true_dev_addr, &addr_string);
1059 seq_printf(seq, " Radio address:\t\t%s\n", addr_string.c);
1060 if (manual_dev_addr) {
1061 radio_address_to_string(&dev_dev_addr, &addr_string);
1062 seq_printf(seq, " Device address:\t%s\n", addr_string.c);
1063 }
1064 seq_printf(seq, " Firmware version:\t%s", !working ? "Unknown" :
1065 !firmware_level ? "Should be upgraded" :
1066 firmware_version.c);
1067 if (firmware_level >= ChecksummedMessages)
1068 seq_printf(seq, " (Checksums Enabled)");
1069 seq_printf(seq, "\n");
1070 seq_printf(seq, " Serial number:\t\t%s\n", serial_number.c);
1071 seq_printf(seq, " Battery voltage:\t%s\n", battery_voltage.c);
1072 seq_printf(seq, " Transmit queue (bytes):%d\n", tx_left);
1073 seq_printf(seq, " Receive packet rate: %ld packets per second\n",
1074 rx_average_pps / 8);
1075 seq_printf(seq, " Transmit packet rate: %ld packets per second\n",
1076 tx_average_pps / 8);
1077 seq_printf(seq, " Sent packet rate: %ld packets per second\n",
1078 sx_average_pps / 8);
1079 seq_printf(seq, " Next watchdog probe:\t%s\n",
1080 time_delta(temp, watchdog_doprobe));
1081 seq_printf(seq, " Next watchdog reset:\t%s\n",
1082 time_delta(temp, watchdog_doreset));
1083 seq_printf(seq, " Next gratuitous ARP:\t");
1084
1085 if (!memcmp
1086 (strip_info->dev->dev_addr, zero_address.c,
1087 sizeof(zero_address)))
1088 seq_printf(seq, "Disabled\n");
1089 else {
1090 seq_printf(seq, "%s\n", time_delta(temp, gratuitous_arp));
1091 seq_printf(seq, " Next ARP interval:\t%ld seconds\n",
1092 JIFFIE_TO_SEC(arp_interval));
1093 }
1094
1095 if (working) {
1096#ifdef EXT_COUNTERS
1097 seq_printf(seq, "\n");
1098 seq_printf(seq,
1099 " Total bytes: \trx:\t%lu\ttx:\t%lu\n",
1100 rx_bytes, tx_bytes);
1101 seq_printf(seq,
1102 " thru radio: \trx:\t%lu\ttx:\t%lu\n",
1103 rx_rbytes, tx_rbytes);
1104 seq_printf(seq,
1105 " thru serial port: \trx:\t%lu\ttx:\t%lu\n",
1106 rx_sbytes, tx_sbytes);
1107 seq_printf(seq,
1108 " Total stat/err bytes:\trx:\t%lu\ttx:\t%lu\n",
1109 rx_ebytes, tx_ebytes);
1110#endif
1111 strip_seq_neighbours(seq, &strip_info->poletops,
1112 "Poletops:");
1113 strip_seq_neighbours(seq, &strip_info->portables,
1114 "Portables:");
1115 }
1116}
1117
1118/*
1119 * This function is exports status information from the STRIP driver through
1120 * the /proc file system.
1121 */
1122static int strip_seq_show(struct seq_file *seq, void *v)
1123{
1124 if (v == SEQ_START_TOKEN)
1125 seq_printf(seq, "strip_version: %s\n", StripVersion);
1126 else
1127 strip_seq_status_info(seq, (const struct strip *)v);
1128 return 0;
1129}
1130
1131
1132static const struct seq_operations strip_seq_ops = {
1133 .start = strip_seq_start,
1134 .next = strip_seq_next,
1135 .stop = strip_seq_stop,
1136 .show = strip_seq_show,
1137};
1138
1139static int strip_seq_open(struct inode *inode, struct file *file)
1140{
1141 return seq_open(file, &strip_seq_ops);
1142}
1143
1144static const struct file_operations strip_seq_fops = {
1145 .owner = THIS_MODULE,
1146 .open = strip_seq_open,
1147 .read = seq_read,
1148 .llseek = seq_lseek,
1149 .release = seq_release,
1150};
1151#endif
1152
1153
1154
1155/************************************************************************/
1156/* Sending routines */
1157
1158static void ResetRadio(struct strip *strip_info)
1159{
1160 struct tty_struct *tty = strip_info->tty;
1161 static const char init[] = "ate0q1dt**starmode\r**";
1162 StringDescriptor s = { init, sizeof(init) - 1 };
1163
1164 /*
1165 * If the radio isn't working anymore,
1166 * we should clear the old status information.
1167 */
1168 if (strip_info->working) {
1169 printk(KERN_INFO "%s: No response: Resetting radio.\n",
1170 strip_info->dev->name);
1171 strip_info->firmware_version.c[0] = '\0';
1172 strip_info->serial_number.c[0] = '\0';
1173 strip_info->battery_voltage.c[0] = '\0';
1174 strip_info->portables.num_nodes = 0;
1175 do_gettimeofday(&strip_info->portables.timestamp);
1176 strip_info->poletops.num_nodes = 0;
1177 do_gettimeofday(&strip_info->poletops.timestamp);
1178 }
1179
1180 strip_info->pps_timer = jiffies;
1181 strip_info->rx_pps_count = 0;
1182 strip_info->tx_pps_count = 0;
1183 strip_info->sx_pps_count = 0;
1184 strip_info->rx_average_pps = 0;
1185 strip_info->tx_average_pps = 0;
1186 strip_info->sx_average_pps = 0;
1187
1188 /* Mark radio address as unknown */
1189 *(MetricomAddress *) & strip_info->true_dev_addr = zero_address;
1190 if (!strip_info->manual_dev_addr)
1191 *(MetricomAddress *) strip_info->dev->dev_addr =
1192 zero_address;
1193 strip_info->working = FALSE;
1194 strip_info->firmware_level = NoStructure;
1195 strip_info->next_command = CompatibilityCommand;
1196 strip_info->watchdog_doprobe = jiffies + 10 * HZ;
1197 strip_info->watchdog_doreset = jiffies + 1 * HZ;
1198
1199 /* If the user has selected a baud rate above 38.4 see what magic we have to do */
1200 if (strip_info->user_baud > 38400) {
1201 /*
1202 * Subtle stuff: Pay attention :-)
1203 * If the serial port is currently at the user's selected (>38.4) rate,
1204 * then we temporarily switch to 19.2 and issue the ATS304 command
1205 * to tell the radio to switch to the user's selected rate.
1206 * If the serial port is not currently at that rate, that means we just
1207 * issued the ATS304 command last time through, so this time we restore
1208 * the user's selected rate and issue the normal starmode reset string.
1209 */
1210 if (strip_info->user_baud == tty_get_baud_rate(tty)) {
1211 static const char b0[] = "ate0q1s304=57600\r";
1212 static const char b1[] = "ate0q1s304=115200\r";
1213 static const StringDescriptor baudstring[2] =
1214 { {b0, sizeof(b0) - 1}
1215 , {b1, sizeof(b1) - 1}
1216 };
1217 set_baud(tty, 19200);
1218 if (strip_info->user_baud == 57600)
1219 s = baudstring[0];
1220 else if (strip_info->user_baud == 115200)
1221 s = baudstring[1];
1222 else
1223 s = baudstring[1]; /* For now */
1224 } else
1225 set_baud(tty, strip_info->user_baud);
1226 }
1227
1228 tty->ops->write(tty, s.string, s.length);
1229#ifdef EXT_COUNTERS
1230 strip_info->tx_ebytes += s.length;
1231#endif
1232}
1233
1234/*
1235 * Called by the driver when there's room for more data. If we have
1236 * more packets to send, we send them here.
1237 */
1238
1239static void strip_write_some_more(struct tty_struct *tty)
1240{
1241 struct strip *strip_info = tty->disc_data;
1242
1243 /* First make sure we're connected. */
1244 if (!strip_info || strip_info->magic != STRIP_MAGIC ||
1245 !netif_running(strip_info->dev))
1246 return;
1247
1248 if (strip_info->tx_left > 0) {
1249 int num_written =
1250 tty->ops->write(tty, strip_info->tx_head,
1251 strip_info->tx_left);
1252 strip_info->tx_left -= num_written;
1253 strip_info->tx_head += num_written;
1254#ifdef EXT_COUNTERS
1255 strip_info->tx_sbytes += num_written;
1256#endif
1257 } else { /* Else start transmission of another packet */
1258
1259 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
1260 strip_unlock(strip_info);
1261 }
1262}
1263
1264static __u8 *add_checksum(__u8 * buffer, __u8 * end)
1265{
1266 __u16 sum = 0;
1267 __u8 *p = buffer;
1268 while (p < end)
1269 sum += *p++;
1270 end[3] = hextable[sum & 0xF];
1271 sum >>= 4;
1272 end[2] = hextable[sum & 0xF];
1273 sum >>= 4;
1274 end[1] = hextable[sum & 0xF];
1275 sum >>= 4;
1276 end[0] = hextable[sum & 0xF];
1277 return (end + 4);
1278}
1279
1280static unsigned char *strip_make_packet(unsigned char *buffer,
1281 struct strip *strip_info,
1282 struct sk_buff *skb)
1283{
1284 __u8 *ptr = buffer;
1285 __u8 *stuffstate = NULL;
1286 STRIP_Header *header = (STRIP_Header *) skb->data;
1287 MetricomAddress haddr = header->dst_addr;
1288 int len = skb->len - sizeof(STRIP_Header);
1289 MetricomKey key;
1290
1291 /*HexDump("strip_make_packet", strip_info, skb->data, skb->data + skb->len); */
1292
1293 if (header->protocol == htons(ETH_P_IP))
1294 key = SIP0Key;
1295 else if (header->protocol == htons(ETH_P_ARP))
1296 key = ARP0Key;
1297 else {
1298 printk(KERN_ERR
1299 "%s: strip_make_packet: Unknown packet type 0x%04X\n",
1300 strip_info->dev->name, ntohs(header->protocol));
1301 return (NULL);
1302 }
1303
1304 if (len > strip_info->mtu) {
1305 printk(KERN_ERR
1306 "%s: Dropping oversized transmit packet: %d bytes\n",
1307 strip_info->dev->name, len);
1308 return (NULL);
1309 }
1310
1311 /*
1312 * If we're sending to ourselves, discard the packet.
1313 * (Metricom radios choke if they try to send a packet to their own address.)
1314 */
1315 if (!memcmp(haddr.c, strip_info->true_dev_addr.c, sizeof(haddr))) {
1316 printk(KERN_ERR "%s: Dropping packet addressed to self\n",
1317 strip_info->dev->name);
1318 return (NULL);
1319 }
1320
1321 /*
1322 * If this is a broadcast packet, send it to our designated Metricom
1323 * 'broadcast hub' radio (First byte of address being 0xFF means broadcast)
1324 */
1325 if (haddr.c[0] == 0xFF) {
1326 __be32 brd = 0;
1327 struct in_device *in_dev;
1328
1329 rcu_read_lock();
1330 in_dev = __in_dev_get_rcu(strip_info->dev);
1331 if (in_dev == NULL) {
1332 rcu_read_unlock();
1333 return NULL;
1334 }
1335 if (in_dev->ifa_list)
1336 brd = in_dev->ifa_list->ifa_broadcast;
1337 rcu_read_unlock();
1338
1339 /* arp_query returns 1 if it succeeds in looking up the address, 0 if it fails */
1340 if (!arp_query(haddr.c, brd, strip_info->dev)) {
1341 printk(KERN_ERR
1342 "%s: Unable to send packet (no broadcast hub configured)\n",
1343 strip_info->dev->name);
1344 return (NULL);
1345 }
1346 /*
1347 * If we are the broadcast hub, don't bother sending to ourselves.
1348 * (Metricom radios choke if they try to send a packet to their own address.)
1349 */
1350 if (!memcmp
1351 (haddr.c, strip_info->true_dev_addr.c, sizeof(haddr)))
1352 return (NULL);
1353 }
1354
1355 *ptr++ = 0x0D;
1356 *ptr++ = '*';
1357 *ptr++ = hextable[haddr.c[2] >> 4];
1358 *ptr++ = hextable[haddr.c[2] & 0xF];
1359 *ptr++ = hextable[haddr.c[3] >> 4];
1360 *ptr++ = hextable[haddr.c[3] & 0xF];
1361 *ptr++ = '-';
1362 *ptr++ = hextable[haddr.c[4] >> 4];
1363 *ptr++ = hextable[haddr.c[4] & 0xF];
1364 *ptr++ = hextable[haddr.c[5] >> 4];
1365 *ptr++ = hextable[haddr.c[5] & 0xF];
1366 *ptr++ = '*';
1367 *ptr++ = key.c[0];
1368 *ptr++ = key.c[1];
1369 *ptr++ = key.c[2];
1370 *ptr++ = key.c[3];
1371
1372 ptr =
1373 StuffData(skb->data + sizeof(STRIP_Header), len, ptr,
1374 &stuffstate);
1375
1376 if (strip_info->firmware_level >= ChecksummedMessages)
1377 ptr = add_checksum(buffer + 1, ptr);
1378
1379 *ptr++ = 0x0D;
1380 return (ptr);
1381}
1382
1383static void strip_send(struct strip *strip_info, struct sk_buff *skb)
1384{
1385 MetricomAddress haddr;
1386 unsigned char *ptr = strip_info->tx_buff;
1387 int doreset = (long) jiffies - strip_info->watchdog_doreset >= 0;
1388 int doprobe = (long) jiffies - strip_info->watchdog_doprobe >= 0
1389 && !doreset;
1390 __be32 addr, brd;
1391
1392 /*
1393 * 1. If we have a packet, encapsulate it and put it in the buffer
1394 */
1395 if (skb) {
1396 char *newptr = strip_make_packet(ptr, strip_info, skb);
1397 strip_info->tx_pps_count++;
1398 if (!newptr)
1399 strip_info->tx_dropped++;
1400 else {
1401 ptr = newptr;
1402 strip_info->sx_pps_count++;
1403 strip_info->tx_packets++; /* Count another successful packet */
1404#ifdef EXT_COUNTERS
1405 strip_info->tx_bytes += skb->len;
1406 strip_info->tx_rbytes += ptr - strip_info->tx_buff;
1407#endif
1408 /*DumpData("Sending:", strip_info, strip_info->tx_buff, ptr); */
1409 /*HexDump("Sending", strip_info, strip_info->tx_buff, ptr); */
1410 }
1411 }
1412
1413 /*
1414 * 2. If it is time for another tickle, tack it on, after the packet
1415 */
1416 if (doprobe) {
1417 StringDescriptor ts = CommandString[strip_info->next_command];
1418#if TICKLE_TIMERS
1419 {
1420 struct timeval tv;
1421 do_gettimeofday(&tv);
1422 printk(KERN_INFO "**** Sending tickle string %d at %02d.%06d\n",
1423 strip_info->next_command, tv.tv_sec % 100,
1424 tv.tv_usec);
1425 }
1426#endif
1427 if (ptr == strip_info->tx_buff)
1428 *ptr++ = 0x0D;
1429
1430 *ptr++ = '*'; /* First send "**" to provoke an error message */
1431 *ptr++ = '*';
1432
1433 /* Then add the command */
1434 memcpy(ptr, ts.string, ts.length);
1435
1436 /* Add a checksum ? */
1437 if (strip_info->firmware_level < ChecksummedMessages)
1438 ptr += ts.length;
1439 else
1440 ptr = add_checksum(ptr, ptr + ts.length);
1441
1442 *ptr++ = 0x0D; /* Terminate the command with a <CR> */
1443
1444 /* Cycle to next periodic command? */
1445 if (strip_info->firmware_level >= StructuredMessages)
1446 if (++strip_info->next_command >=
1447 ARRAY_SIZE(CommandString))
1448 strip_info->next_command = 0;
1449#ifdef EXT_COUNTERS
1450 strip_info->tx_ebytes += ts.length;
1451#endif
1452 strip_info->watchdog_doprobe = jiffies + 10 * HZ;
1453 strip_info->watchdog_doreset = jiffies + 1 * HZ;
1454 /*printk(KERN_INFO "%s: Routine radio test.\n", strip_info->dev->name); */
1455 }
1456
1457 /*
1458 * 3. Set up the strip_info ready to send the data (if any).
1459 */
1460 strip_info->tx_head = strip_info->tx_buff;
1461 strip_info->tx_left = ptr - strip_info->tx_buff;
1462 set_bit(TTY_DO_WRITE_WAKEUP, &strip_info->tty->flags);
1463 /*
1464 * 4. Debugging check to make sure we're not overflowing the buffer.
1465 */
1466 if (strip_info->tx_size - strip_info->tx_left < 20)
1467 printk(KERN_ERR "%s: Sending%5d bytes;%5d bytes free.\n",
1468 strip_info->dev->name, strip_info->tx_left,
1469 strip_info->tx_size - strip_info->tx_left);
1470
1471 /*
1472 * 5. If watchdog has expired, reset the radio. Note: if there's data waiting in
1473 * the buffer, strip_write_some_more will send it after the reset has finished
1474 */
1475 if (doreset) {
1476 ResetRadio(strip_info);
1477 return;
1478 }
1479
1480 if (1) {
1481 struct in_device *in_dev;
1482
1483 brd = addr = 0;
1484 rcu_read_lock();
1485 in_dev = __in_dev_get_rcu(strip_info->dev);
1486 if (in_dev) {
1487 if (in_dev->ifa_list) {
1488 brd = in_dev->ifa_list->ifa_broadcast;
1489 addr = in_dev->ifa_list->ifa_local;
1490 }
1491 }
1492 rcu_read_unlock();
1493 }
1494
1495
1496 /*
1497 * 6. If it is time for a periodic ARP, queue one up to be sent.
1498 * We only do this if:
1499 * 1. The radio is working
1500 * 2. It's time to send another periodic ARP
1501 * 3. We really know what our address is (and it is not manually set to zero)
1502 * 4. We have a designated broadcast address configured
1503 * If we queue up an ARP packet when we don't have a designated broadcast
1504 * address configured, then the packet will just have to be discarded in
1505 * strip_make_packet. This is not fatal, but it causes misleading information
1506 * to be displayed in tcpdump. tcpdump will report that periodic APRs are
1507 * being sent, when in fact they are not, because they are all being dropped
1508 * in the strip_make_packet routine.
1509 */
1510 if (strip_info->working
1511 && (long) jiffies - strip_info->gratuitous_arp >= 0
1512 && memcmp(strip_info->dev->dev_addr, zero_address.c,
1513 sizeof(zero_address))
1514 && arp_query(haddr.c, brd, strip_info->dev)) {
1515 /*printk(KERN_INFO "%s: Sending gratuitous ARP with interval %ld\n",
1516 strip_info->dev->name, strip_info->arp_interval / HZ); */
1517 strip_info->gratuitous_arp =
1518 jiffies + strip_info->arp_interval;
1519 strip_info->arp_interval *= 2;
1520 if (strip_info->arp_interval > MaxARPInterval)
1521 strip_info->arp_interval = MaxARPInterval;
1522 if (addr)
1523 arp_send(ARPOP_REPLY, ETH_P_ARP, addr, /* Target address of ARP packet is our address */
1524 strip_info->dev, /* Device to send packet on */
1525 addr, /* Source IP address this ARP packet comes from */
1526 NULL, /* Destination HW address is NULL (broadcast it) */
1527 strip_info->dev->dev_addr, /* Source HW address is our HW address */
1528 strip_info->dev->dev_addr); /* Target HW address is our HW address (redundant) */
1529 }
1530
1531 /*
1532 * 7. All ready. Start the transmission
1533 */
1534 strip_write_some_more(strip_info->tty);
1535}
1536
1537/* Encapsulate a datagram and kick it into a TTY queue. */
1538static netdev_tx_t strip_xmit(struct sk_buff *skb, struct net_device *dev)
1539{
1540 struct strip *strip_info = netdev_priv(dev);
1541
1542 if (!netif_running(dev)) {
1543 printk(KERN_ERR "%s: xmit call when iface is down\n",
1544 dev->name);
1545 return NETDEV_TX_BUSY;
1546 }
1547
1548 netif_stop_queue(dev);
1549
1550 del_timer(&strip_info->idle_timer);
1551
1552
1553 if (time_after(jiffies, strip_info->pps_timer + HZ)) {
1554 unsigned long t = jiffies - strip_info->pps_timer;
1555 unsigned long rx_pps_count =
1556 DIV_ROUND_CLOSEST(strip_info->rx_pps_count*HZ*8, t);
1557 unsigned long tx_pps_count =
1558 DIV_ROUND_CLOSEST(strip_info->tx_pps_count*HZ*8, t);
1559 unsigned long sx_pps_count =
1560 DIV_ROUND_CLOSEST(strip_info->sx_pps_count*HZ*8, t);
1561
1562 strip_info->pps_timer = jiffies;
1563 strip_info->rx_pps_count = 0;
1564 strip_info->tx_pps_count = 0;
1565 strip_info->sx_pps_count = 0;
1566
1567 strip_info->rx_average_pps = (strip_info->rx_average_pps + rx_pps_count + 1) / 2;
1568 strip_info->tx_average_pps = (strip_info->tx_average_pps + tx_pps_count + 1) / 2;
1569 strip_info->sx_average_pps = (strip_info->sx_average_pps + sx_pps_count + 1) / 2;
1570
1571 if (rx_pps_count / 8 >= 10)
1572 printk(KERN_INFO "%s: WARNING: Receiving %ld packets per second.\n",
1573 strip_info->dev->name, rx_pps_count / 8);
1574 if (tx_pps_count / 8 >= 10)
1575 printk(KERN_INFO "%s: WARNING: Tx %ld packets per second.\n",
1576 strip_info->dev->name, tx_pps_count / 8);
1577 if (sx_pps_count / 8 >= 10)
1578 printk(KERN_INFO "%s: WARNING: Sending %ld packets per second.\n",
1579 strip_info->dev->name, sx_pps_count / 8);
1580 }
1581
1582 spin_lock_bh(&strip_lock);
1583
1584 strip_send(strip_info, skb);
1585
1586 spin_unlock_bh(&strip_lock);
1587
1588 if (skb)
1589 dev_kfree_skb(skb);
1590 return NETDEV_TX_OK;
1591}
1592
1593/*
1594 * IdleTask periodically calls strip_xmit, so even when we have no IP packets
1595 * to send for an extended period of time, the watchdog processing still gets
1596 * done to ensure that the radio stays in Starmode
1597 */
1598
1599static void strip_IdleTask(unsigned long parameter)
1600{
1601 strip_xmit(NULL, (struct net_device *) parameter);
1602}
1603
1604/*
1605 * Create the MAC header for an arbitrary protocol layer
1606 *
1607 * saddr!=NULL means use this specific address (n/a for Metricom)
1608 * saddr==NULL means use default device source address
1609 * daddr!=NULL means use this destination address
1610 * daddr==NULL means leave destination address alone
1611 * (e.g. unresolved arp -- kernel will call
1612 * rebuild_header later to fill in the address)
1613 */
1614
1615static int strip_header(struct sk_buff *skb, struct net_device *dev,
1616 unsigned short type, const void *daddr,
1617 const void *saddr, unsigned len)
1618{
1619 struct strip *strip_info = netdev_priv(dev);
1620 STRIP_Header *header = (STRIP_Header *) skb_push(skb, sizeof(STRIP_Header));
1621
1622 /*printk(KERN_INFO "%s: strip_header 0x%04X %s\n", dev->name, type,
1623 type == ETH_P_IP ? "IP" : type == ETH_P_ARP ? "ARP" : ""); */
1624
1625 header->src_addr = strip_info->true_dev_addr;
1626 header->protocol = htons(type);
1627
1628 /*HexDump("strip_header", netdev_priv(dev), skb->data, skb->data + skb->len); */
1629
1630 if (!daddr)
1631 return (-dev->hard_header_len);
1632
1633 header->dst_addr = *(MetricomAddress *) daddr;
1634 return (dev->hard_header_len);
1635}
1636
1637/*
1638 * Rebuild the MAC header. This is called after an ARP
1639 * (or in future other address resolution) has completed on this
1640 * sk_buff. We now let ARP fill in the other fields.
1641 * I think this should return zero if packet is ready to send,
1642 * or non-zero if it needs more time to do an address lookup
1643 */
1644
1645static int strip_rebuild_header(struct sk_buff *skb)
1646{
1647#ifdef CONFIG_INET
1648 STRIP_Header *header = (STRIP_Header *) skb->data;
1649
1650 /* Arp find returns zero if if knows the address, */
1651 /* or if it doesn't know the address it sends an ARP packet and returns non-zero */
1652 return arp_find(header->dst_addr.c, skb) ? 1 : 0;
1653#else
1654 return 0;
1655#endif
1656}
1657
1658
1659/************************************************************************/
1660/* Receiving routines */
1661
1662/*
1663 * This function parses the response to the ATS300? command,
1664 * extracting the radio version and serial number.
1665 */
1666static void get_radio_version(struct strip *strip_info, __u8 * ptr, __u8 * end)
1667{
1668 __u8 *p, *value_begin, *value_end;
1669 int len;
1670
1671 /* Determine the beginning of the second line of the payload */
1672 p = ptr;
1673 while (p < end && *p != 10)
1674 p++;
1675 if (p >= end)
1676 return;
1677 p++;
1678 value_begin = p;
1679
1680 /* Determine the end of line */
1681 while (p < end && *p != 10)
1682 p++;
1683 if (p >= end)
1684 return;
1685 value_end = p;
1686 p++;
1687
1688 len = value_end - value_begin;
1689 len = min_t(int, len, sizeof(FirmwareVersion) - 1);
1690 if (strip_info->firmware_version.c[0] == 0)
1691 printk(KERN_INFO "%s: Radio Firmware: %.*s\n",
1692 strip_info->dev->name, len, value_begin);
1693 sprintf(strip_info->firmware_version.c, "%.*s", len, value_begin);
1694
1695 /* Look for the first colon */
1696 while (p < end && *p != ':')
1697 p++;
1698 if (p >= end)
1699 return;
1700 /* Skip over the space */
1701 p += 2;
1702 len = sizeof(SerialNumber) - 1;
1703 if (p + len <= end) {
1704 sprintf(strip_info->serial_number.c, "%.*s", len, p);
1705 } else {
1706 printk(KERN_DEBUG
1707 "STRIP: radio serial number shorter (%zd) than expected (%d)\n",
1708 end - p, len);
1709 }
1710}
1711
1712/*
1713 * This function parses the response to the ATS325? command,
1714 * extracting the radio battery voltage.
1715 */
1716static void get_radio_voltage(struct strip *strip_info, __u8 * ptr, __u8 * end)
1717{
1718 int len;
1719
1720 len = sizeof(BatteryVoltage) - 1;
1721 if (ptr + len <= end) {
1722 sprintf(strip_info->battery_voltage.c, "%.*s", len, ptr);
1723 } else {
1724 printk(KERN_DEBUG
1725 "STRIP: radio voltage string shorter (%zd) than expected (%d)\n",
1726 end - ptr, len);
1727 }
1728}
1729
1730/*
1731 * This function parses the responses to the AT~LA and ATS311 commands,
1732 * which list the radio's neighbours.
1733 */
1734static void get_radio_neighbours(MetricomNodeTable * table, __u8 * ptr, __u8 * end)
1735{
1736 table->num_nodes = 0;
1737 while (ptr < end && table->num_nodes < NODE_TABLE_SIZE) {
1738 MetricomNode *node = &table->node[table->num_nodes++];
1739 char *dst = node->c, *limit = dst + sizeof(*node) - 1;
1740 while (ptr < end && *ptr <= 32)
1741 ptr++;
1742 while (ptr < end && dst < limit && *ptr != 10)
1743 *dst++ = *ptr++;
1744 *dst++ = 0;
1745 while (ptr < end && ptr[-1] != 10)
1746 ptr++;
1747 }
1748 do_gettimeofday(&table->timestamp);
1749}
1750
1751static int get_radio_address(struct strip *strip_info, __u8 * p)
1752{
1753 MetricomAddress addr;
1754
1755 if (string_to_radio_address(&addr, p))
1756 return (1);
1757
1758 /* See if our radio address has changed */
1759 if (memcmp(strip_info->true_dev_addr.c, addr.c, sizeof(addr))) {
1760 MetricomAddressString addr_string;
1761 radio_address_to_string(&addr, &addr_string);
1762 printk(KERN_INFO "%s: Radio address = %s\n",
1763 strip_info->dev->name, addr_string.c);
1764 strip_info->true_dev_addr = addr;
1765 if (!strip_info->manual_dev_addr)
1766 *(MetricomAddress *) strip_info->dev->dev_addr =
1767 addr;
1768 /* Give the radio a few seconds to get its head straight, then send an arp */
1769 strip_info->gratuitous_arp = jiffies + 15 * HZ;
1770 strip_info->arp_interval = 1 * HZ;
1771 }
1772 return (0);
1773}
1774
1775static int verify_checksum(struct strip *strip_info)
1776{
1777 __u8 *p = strip_info->sx_buff;
1778 __u8 *end = strip_info->sx_buff + strip_info->sx_count - 4;
1779 u_short sum =
1780 (READHEX16(end[0]) << 12) | (READHEX16(end[1]) << 8) |
1781 (READHEX16(end[2]) << 4) | (READHEX16(end[3]));
1782 while (p < end)
1783 sum -= *p++;
1784 if (sum == 0 && strip_info->firmware_level == StructuredMessages) {
1785 strip_info->firmware_level = ChecksummedMessages;
1786 printk(KERN_INFO "%s: Radio provides message checksums\n",
1787 strip_info->dev->name);
1788 }
1789 return (sum == 0);
1790}
1791
1792static void RecvErr(char *msg, struct strip *strip_info)
1793{
1794 __u8 *ptr = strip_info->sx_buff;
1795 __u8 *end = strip_info->sx_buff + strip_info->sx_count;
1796 DumpData(msg, strip_info, ptr, end);
1797 strip_info->rx_errors++;
1798}
1799
1800static void RecvErr_Message(struct strip *strip_info, __u8 * sendername,
1801 const __u8 * msg, u_long len)
1802{
1803 if (has_prefix(msg, len, "001")) { /* Not in StarMode! */
1804 RecvErr("Error Msg:", strip_info);
1805 printk(KERN_INFO "%s: Radio %s is not in StarMode\n",
1806 strip_info->dev->name, sendername);
1807 }
1808
1809 else if (has_prefix(msg, len, "002")) { /* Remap handle */
1810 /* We ignore "Remap handle" messages for now */
1811 }
1812
1813 else if (has_prefix(msg, len, "003")) { /* Can't resolve name */
1814 RecvErr("Error Msg:", strip_info);
1815 printk(KERN_INFO "%s: Destination radio name is unknown\n",
1816 strip_info->dev->name);
1817 }
1818
1819 else if (has_prefix(msg, len, "004")) { /* Name too small or missing */
1820 strip_info->watchdog_doreset = jiffies + LongTime;
1821#if TICKLE_TIMERS
1822 {
1823 struct timeval tv;
1824 do_gettimeofday(&tv);
1825 printk(KERN_INFO
1826 "**** Got ERR_004 response at %02d.%06d\n",
1827 tv.tv_sec % 100, tv.tv_usec);
1828 }
1829#endif
1830 if (!strip_info->working) {
1831 strip_info->working = TRUE;
1832 printk(KERN_INFO "%s: Radio now in starmode\n",
1833 strip_info->dev->name);
1834 /*
1835 * If the radio has just entered a working state, we should do our first
1836 * probe ASAP, so that we find out our radio address etc. without delay.
1837 */
1838 strip_info->watchdog_doprobe = jiffies;
1839 }
1840 if (strip_info->firmware_level == NoStructure && sendername) {
1841 strip_info->firmware_level = StructuredMessages;
1842 strip_info->next_command = 0; /* Try to enable checksums ASAP */
1843 printk(KERN_INFO
1844 "%s: Radio provides structured messages\n",
1845 strip_info->dev->name);
1846 }
1847 if (strip_info->firmware_level >= StructuredMessages) {
1848 /*
1849 * If this message has a valid checksum on the end, then the call to verify_checksum
1850 * will elevate the firmware_level to ChecksummedMessages for us. (The actual return
1851 * code from verify_checksum is ignored here.)
1852 */
1853 verify_checksum(strip_info);
1854 /*
1855 * If the radio has structured messages but we don't yet have all our information about it,
1856 * we should do probes without delay, until we have gathered all the information
1857 */
1858 if (!GOT_ALL_RADIO_INFO(strip_info))
1859 strip_info->watchdog_doprobe = jiffies;
1860 }
1861 }
1862
1863 else if (has_prefix(msg, len, "005")) /* Bad count specification */
1864 RecvErr("Error Msg:", strip_info);
1865
1866 else if (has_prefix(msg, len, "006")) /* Header too big */
1867 RecvErr("Error Msg:", strip_info);
1868
1869 else if (has_prefix(msg, len, "007")) { /* Body too big */
1870 RecvErr("Error Msg:", strip_info);
1871 printk(KERN_ERR
1872 "%s: Error! Packet size too big for radio.\n",
1873 strip_info->dev->name);
1874 }
1875
1876 else if (has_prefix(msg, len, "008")) { /* Bad character in name */
1877 RecvErr("Error Msg:", strip_info);
1878 printk(KERN_ERR
1879 "%s: Radio name contains illegal character\n",
1880 strip_info->dev->name);
1881 }
1882
1883 else if (has_prefix(msg, len, "009")) /* No count or line terminator */
1884 RecvErr("Error Msg:", strip_info);
1885
1886 else if (has_prefix(msg, len, "010")) /* Invalid checksum */
1887 RecvErr("Error Msg:", strip_info);
1888
1889 else if (has_prefix(msg, len, "011")) /* Checksum didn't match */
1890 RecvErr("Error Msg:", strip_info);
1891
1892 else if (has_prefix(msg, len, "012")) /* Failed to transmit packet */
1893 RecvErr("Error Msg:", strip_info);
1894
1895 else
1896 RecvErr("Error Msg:", strip_info);
1897}
1898
1899static void process_AT_response(struct strip *strip_info, __u8 * ptr,
1900 __u8 * end)
1901{
1902 u_long len;
1903 __u8 *p = ptr;
1904 while (p < end && p[-1] != 10)
1905 p++; /* Skip past first newline character */
1906 /* Now ptr points to the AT command, and p points to the text of the response. */
1907 len = p - ptr;
1908
1909#if TICKLE_TIMERS
1910 {
1911 struct timeval tv;
1912 do_gettimeofday(&tv);
1913 printk(KERN_INFO "**** Got AT response %.7s at %02d.%06d\n",
1914 ptr, tv.tv_sec % 100, tv.tv_usec);
1915 }
1916#endif
1917
1918 if (has_prefix(ptr, len, "ATS300?"))
1919 get_radio_version(strip_info, p, end);
1920 else if (has_prefix(ptr, len, "ATS305?"))
1921 get_radio_address(strip_info, p);
1922 else if (has_prefix(ptr, len, "ATS311?"))
1923 get_radio_neighbours(&strip_info->poletops, p, end);
1924 else if (has_prefix(ptr, len, "ATS319=7"))
1925 verify_checksum(strip_info);
1926 else if (has_prefix(ptr, len, "ATS325?"))
1927 get_radio_voltage(strip_info, p, end);
1928 else if (has_prefix(ptr, len, "AT~LA"))
1929 get_radio_neighbours(&strip_info->portables, p, end);
1930 else
1931 RecvErr("Unknown AT Response:", strip_info);
1932}
1933
1934static void process_ACK(struct strip *strip_info, __u8 * ptr, __u8 * end)
1935{
1936 /* Currently we don't do anything with ACKs from the radio */
1937}
1938
1939static void process_Info(struct strip *strip_info, __u8 * ptr, __u8 * end)
1940{
1941 if (ptr + 16 > end)
1942 RecvErr("Bad Info Msg:", strip_info);
1943}
1944
1945static struct net_device *get_strip_dev(struct strip *strip_info)
1946{
1947 /* If our hardware address is *manually set* to zero, and we know our */
1948 /* real radio hardware address, try to find another strip device that has been */
1949 /* manually set to that address that we can 'transfer ownership' of this packet to */
1950 if (strip_info->manual_dev_addr &&
1951 !memcmp(strip_info->dev->dev_addr, zero_address.c,
1952 sizeof(zero_address))
1953 && memcmp(&strip_info->true_dev_addr, zero_address.c,
1954 sizeof(zero_address))) {
1955 struct net_device *dev;
1956 read_lock_bh(&dev_base_lock);
1957 for_each_netdev(&init_net, dev) {
1958 if (dev->type == strip_info->dev->type &&
1959 !memcmp(dev->dev_addr,
1960 &strip_info->true_dev_addr,
1961 sizeof(MetricomAddress))) {
1962 printk(KERN_INFO
1963 "%s: Transferred packet ownership to %s.\n",
1964 strip_info->dev->name, dev->name);
1965 read_unlock_bh(&dev_base_lock);
1966 return (dev);
1967 }
1968 }
1969 read_unlock_bh(&dev_base_lock);
1970 }
1971 return (strip_info->dev);
1972}
1973
1974/*
1975 * Send one completely decapsulated datagram to the next layer.
1976 */
1977
1978static void deliver_packet(struct strip *strip_info, STRIP_Header * header,
1979 __u16 packetlen)
1980{
1981 struct sk_buff *skb = dev_alloc_skb(sizeof(STRIP_Header) + packetlen);
1982 if (!skb) {
1983 printk(KERN_ERR "%s: memory squeeze, dropping packet.\n",
1984 strip_info->dev->name);
1985 strip_info->rx_dropped++;
1986 } else {
1987 memcpy(skb_put(skb, sizeof(STRIP_Header)), header,
1988 sizeof(STRIP_Header));
1989 memcpy(skb_put(skb, packetlen), strip_info->rx_buff,
1990 packetlen);
1991 skb->dev = get_strip_dev(strip_info);
1992 skb->protocol = header->protocol;
1993 skb_reset_mac_header(skb);
1994
1995 /* Having put a fake header on the front of the sk_buff for the */
1996 /* benefit of tools like tcpdump, skb_pull now 'consumes' that */
1997 /* fake header before we hand the packet up to the next layer. */
1998 skb_pull(skb, sizeof(STRIP_Header));
1999
2000 /* Finally, hand the packet up to the next layer (e.g. IP or ARP, etc.) */
2001 strip_info->rx_packets++;
2002 strip_info->rx_pps_count++;
2003#ifdef EXT_COUNTERS
2004 strip_info->rx_bytes += packetlen;
2005#endif
2006 netif_rx(skb);
2007 }
2008}
2009
2010static void process_IP_packet(struct strip *strip_info,
2011 STRIP_Header * header, __u8 * ptr,
2012 __u8 * end)
2013{
2014 __u16 packetlen;
2015
2016 /* Decode start of the IP packet header */
2017 ptr = UnStuffData(ptr, end, strip_info->rx_buff, 4);
2018 if (!ptr) {
2019 RecvErr("IP Packet too short", strip_info);
2020 return;
2021 }
2022
2023 packetlen = ((__u16) strip_info->rx_buff[2] << 8) | strip_info->rx_buff[3];
2024
2025 if (packetlen > MAX_RECV_MTU) {
2026 printk(KERN_INFO "%s: Dropping oversized received IP packet: %d bytes\n",
2027 strip_info->dev->name, packetlen);
2028 strip_info->rx_dropped++;
2029 return;
2030 }
2031
2032 /*printk(KERN_INFO "%s: Got %d byte IP packet\n", strip_info->dev->name, packetlen); */
2033
2034 /* Decode remainder of the IP packet */
2035 ptr =
2036 UnStuffData(ptr, end, strip_info->rx_buff + 4, packetlen - 4);
2037 if (!ptr) {
2038 RecvErr("IP Packet too short", strip_info);
2039 return;
2040 }
2041
2042 if (ptr < end) {
2043 RecvErr("IP Packet too long", strip_info);
2044 return;
2045 }
2046
2047 header->protocol = htons(ETH_P_IP);
2048
2049 deliver_packet(strip_info, header, packetlen);
2050}
2051
2052static void process_ARP_packet(struct strip *strip_info,
2053 STRIP_Header * header, __u8 * ptr,
2054 __u8 * end)
2055{
2056 __u16 packetlen;
2057 struct arphdr *arphdr = (struct arphdr *) strip_info->rx_buff;
2058
2059 /* Decode start of the ARP packet */
2060 ptr = UnStuffData(ptr, end, strip_info->rx_buff, 8);
2061 if (!ptr) {
2062 RecvErr("ARP Packet too short", strip_info);
2063 return;
2064 }
2065
2066 packetlen = 8 + (arphdr->ar_hln + arphdr->ar_pln) * 2;
2067
2068 if (packetlen > MAX_RECV_MTU) {
2069 printk(KERN_INFO
2070 "%s: Dropping oversized received ARP packet: %d bytes\n",
2071 strip_info->dev->name, packetlen);
2072 strip_info->rx_dropped++;
2073 return;
2074 }
2075
2076 /*printk(KERN_INFO "%s: Got %d byte ARP %s\n",
2077 strip_info->dev->name, packetlen,
2078 ntohs(arphdr->ar_op) == ARPOP_REQUEST ? "request" : "reply"); */
2079
2080 /* Decode remainder of the ARP packet */
2081 ptr =
2082 UnStuffData(ptr, end, strip_info->rx_buff + 8, packetlen - 8);
2083 if (!ptr) {
2084 RecvErr("ARP Packet too short", strip_info);
2085 return;
2086 }
2087
2088 if (ptr < end) {
2089 RecvErr("ARP Packet too long", strip_info);
2090 return;
2091 }
2092
2093 header->protocol = htons(ETH_P_ARP);
2094
2095 deliver_packet(strip_info, header, packetlen);
2096}
2097
2098/*
2099 * process_text_message processes a <CR>-terminated block of data received
2100 * from the radio that doesn't begin with a '*' character. All normal
2101 * Starmode communication messages with the radio begin with a '*',
2102 * so any text that does not indicates a serial port error, a radio that
2103 * is in Hayes command mode instead of Starmode, or a radio with really
2104 * old firmware that doesn't frame its Starmode responses properly.
2105 */
2106static void process_text_message(struct strip *strip_info)
2107{
2108 __u8 *msg = strip_info->sx_buff;
2109 int len = strip_info->sx_count;
2110
2111 /* Check for anything that looks like it might be our radio name */
2112 /* (This is here for backwards compatibility with old firmware) */
2113 if (len == 9 && get_radio_address(strip_info, msg) == 0)
2114 return;
2115
2116 if (text_equal(msg, len, "OK"))
2117 return; /* Ignore 'OK' responses from prior commands */
2118 if (text_equal(msg, len, "ERROR"))
2119 return; /* Ignore 'ERROR' messages */
2120 if (has_prefix(msg, len, "ate0q1"))
2121 return; /* Ignore character echo back from the radio */
2122
2123 /* Catch other error messages */
2124 /* (This is here for backwards compatibility with old firmware) */
2125 if (has_prefix(msg, len, "ERR_")) {
2126 RecvErr_Message(strip_info, NULL, &msg[4], len - 4);
2127 return;
2128 }
2129
2130 RecvErr("No initial *", strip_info);
2131}
2132
2133/*
2134 * process_message processes a <CR>-terminated block of data received
2135 * from the radio. If the radio is not in Starmode or has old firmware,
2136 * it may be a line of text in response to an AT command. Ideally, with
2137 * a current radio that's properly in Starmode, all data received should
2138 * be properly framed and checksummed radio message blocks, containing
2139 * either a starmode packet, or a other communication from the radio
2140 * firmware, like "INF_" Info messages and &COMMAND responses.
2141 */
2142static void process_message(struct strip *strip_info)
2143{
2144 STRIP_Header header = { zero_address, zero_address, 0 };
2145 __u8 *ptr = strip_info->sx_buff;
2146 __u8 *end = strip_info->sx_buff + strip_info->sx_count;
2147 __u8 sendername[32], *sptr = sendername;
2148 MetricomKey key;
2149
2150 /*HexDump("Receiving", strip_info, ptr, end); */
2151
2152 /* Check for start of address marker, and then skip over it */
2153 if (*ptr == '*')
2154 ptr++;
2155 else {
2156 process_text_message(strip_info);
2157 return;
2158 }
2159
2160 /* Copy out the return address */
2161 while (ptr < end && *ptr != '*'
2162 && sptr < ARRAY_END(sendername) - 1)
2163 *sptr++ = *ptr++;
2164 *sptr = 0; /* Null terminate the sender name */
2165
2166 /* Check for end of address marker, and skip over it */
2167 if (ptr >= end || *ptr != '*') {
2168 RecvErr("No second *", strip_info);
2169 return;
2170 }
2171 ptr++; /* Skip the second '*' */
2172
2173 /* If the sender name is "&COMMAND", ignore this 'packet' */
2174 /* (This is here for backwards compatibility with old firmware) */
2175 if (!strcmp(sendername, "&COMMAND")) {
2176 strip_info->firmware_level = NoStructure;
2177 strip_info->next_command = CompatibilityCommand;
2178 return;
2179 }
2180
2181 if (ptr + 4 > end) {
2182 RecvErr("No proto key", strip_info);
2183 return;
2184 }
2185
2186 /* Get the protocol key out of the buffer */
2187 key.c[0] = *ptr++;
2188 key.c[1] = *ptr++;
2189 key.c[2] = *ptr++;
2190 key.c[3] = *ptr++;
2191
2192 /* If we're using checksums, verify the checksum at the end of the packet */
2193 if (strip_info->firmware_level >= ChecksummedMessages) {
2194 end -= 4; /* Chop the last four bytes off the packet (they're the checksum) */
2195 if (ptr > end) {
2196 RecvErr("Missing Checksum", strip_info);
2197 return;
2198 }
2199 if (!verify_checksum(strip_info)) {
2200 RecvErr("Bad Checksum", strip_info);
2201 return;
2202 }
2203 }
2204
2205 /*printk(KERN_INFO "%s: Got packet from \"%s\".\n", strip_info->dev->name, sendername); */
2206
2207 /*
2208 * Fill in (pseudo) source and destination addresses in the packet.
2209 * We assume that the destination address was our address (the radio does not
2210 * tell us this). If the radio supplies a source address, then we use it.
2211 */
2212 header.dst_addr = strip_info->true_dev_addr;
2213 string_to_radio_address(&header.src_addr, sendername);
2214
2215#ifdef EXT_COUNTERS
2216 if (key.l == SIP0Key.l) {
2217 strip_info->rx_rbytes += (end - ptr);
2218 process_IP_packet(strip_info, &header, ptr, end);
2219 } else if (key.l == ARP0Key.l) {
2220 strip_info->rx_rbytes += (end - ptr);
2221 process_ARP_packet(strip_info, &header, ptr, end);
2222 } else if (key.l == ATR_Key.l) {
2223 strip_info->rx_ebytes += (end - ptr);
2224 process_AT_response(strip_info, ptr, end);
2225 } else if (key.l == ACK_Key.l) {
2226 strip_info->rx_ebytes += (end - ptr);
2227 process_ACK(strip_info, ptr, end);
2228 } else if (key.l == INF_Key.l) {
2229 strip_info->rx_ebytes += (end - ptr);
2230 process_Info(strip_info, ptr, end);
2231 } else if (key.l == ERR_Key.l) {
2232 strip_info->rx_ebytes += (end - ptr);
2233 RecvErr_Message(strip_info, sendername, ptr, end - ptr);
2234 } else
2235 RecvErr("Unrecognized protocol key", strip_info);
2236#else
2237 if (key.l == SIP0Key.l)
2238 process_IP_packet(strip_info, &header, ptr, end);
2239 else if (key.l == ARP0Key.l)
2240 process_ARP_packet(strip_info, &header, ptr, end);
2241 else if (key.l == ATR_Key.l)
2242 process_AT_response(strip_info, ptr, end);
2243 else if (key.l == ACK_Key.l)
2244 process_ACK(strip_info, ptr, end);
2245 else if (key.l == INF_Key.l)
2246 process_Info(strip_info, ptr, end);
2247 else if (key.l == ERR_Key.l)
2248 RecvErr_Message(strip_info, sendername, ptr, end - ptr);
2249 else
2250 RecvErr("Unrecognized protocol key", strip_info);
2251#endif
2252}
2253
2254#define TTYERROR(X) ((X) == TTY_BREAK ? "Break" : \
2255 (X) == TTY_FRAME ? "Framing Error" : \
2256 (X) == TTY_PARITY ? "Parity Error" : \
2257 (X) == TTY_OVERRUN ? "Hardware Overrun" : "Unknown Error")
2258
2259/*
2260 * Handle the 'receiver data ready' interrupt.
2261 * This function is called by the 'tty_io' module in the kernel when
2262 * a block of STRIP data has been received, which can now be decapsulated
2263 * and sent on to some IP layer for further processing.
2264 */
2265
2266static void strip_receive_buf(struct tty_struct *tty, const unsigned char *cp,
2267 char *fp, int count)
2268{
2269 struct strip *strip_info = tty->disc_data;
2270 const unsigned char *end = cp + count;
2271
2272 if (!strip_info || strip_info->magic != STRIP_MAGIC
2273 || !netif_running(strip_info->dev))
2274 return;
2275
2276 spin_lock_bh(&strip_lock);
2277#if 0
2278 {
2279 struct timeval tv;
2280 do_gettimeofday(&tv);
2281 printk(KERN_INFO
2282 "**** strip_receive_buf: %3d bytes at %02d.%06d\n",
2283 count, tv.tv_sec % 100, tv.tv_usec);
2284 }
2285#endif
2286
2287#ifdef EXT_COUNTERS
2288 strip_info->rx_sbytes += count;
2289#endif
2290
2291 /* Read the characters out of the buffer */
2292 while (cp < end) {
2293 if (fp && *fp)
2294 printk(KERN_INFO "%s: %s on serial port\n",
2295 strip_info->dev->name, TTYERROR(*fp));
2296 if (fp && *fp++ && !strip_info->discard) { /* If there's a serial error, record it */
2297 /* If we have some characters in the buffer, discard them */
2298 strip_info->discard = strip_info->sx_count;
2299 strip_info->rx_errors++;
2300 }
2301
2302 /* Leading control characters (CR, NL, Tab, etc.) are ignored */
2303 if (strip_info->sx_count > 0 || *cp >= ' ') {
2304 if (*cp == 0x0D) { /* If end of packet, decide what to do with it */
2305 if (strip_info->sx_count > 3000)
2306 printk(KERN_INFO
2307 "%s: Cut a %d byte packet (%zd bytes remaining)%s\n",
2308 strip_info->dev->name,
2309 strip_info->sx_count,
2310 end - cp - 1,
2311 strip_info->
2312 discard ? " (discarded)" :
2313 "");
2314 if (strip_info->sx_count >
2315 strip_info->sx_size) {
2316 strip_info->rx_over_errors++;
2317 printk(KERN_INFO
2318 "%s: sx_buff overflow (%d bytes total)\n",
2319 strip_info->dev->name,
2320 strip_info->sx_count);
2321 } else if (strip_info->discard)
2322 printk(KERN_INFO
2323 "%s: Discarding bad packet (%d/%d)\n",
2324 strip_info->dev->name,
2325 strip_info->discard,
2326 strip_info->sx_count);
2327 else
2328 process_message(strip_info);
2329 strip_info->discard = 0;
2330 strip_info->sx_count = 0;
2331 } else {
2332 /* Make sure we have space in the buffer */
2333 if (strip_info->sx_count <
2334 strip_info->sx_size)
2335 strip_info->sx_buff[strip_info->
2336 sx_count] =
2337 *cp;
2338 strip_info->sx_count++;
2339 }
2340 }
2341 cp++;
2342 }
2343 spin_unlock_bh(&strip_lock);
2344}
2345
2346
2347/************************************************************************/
2348/* General control routines */
2349
2350static int set_mac_address(struct strip *strip_info,
2351 MetricomAddress * addr)
2352{
2353 /*
2354 * We're using a manually specified address if the address is set
2355 * to anything other than all ones. Setting the address to all ones
2356 * disables manual mode and goes back to automatic address determination
2357 * (tracking the true address that the radio has).
2358 */
2359 strip_info->manual_dev_addr =
2360 memcmp(addr->c, broadcast_address.c,
2361 sizeof(broadcast_address));
2362 if (strip_info->manual_dev_addr)
2363 *(MetricomAddress *) strip_info->dev->dev_addr = *addr;
2364 else
2365 *(MetricomAddress *) strip_info->dev->dev_addr =
2366 strip_info->true_dev_addr;
2367 return 0;
2368}
2369
2370static int strip_set_mac_address(struct net_device *dev, void *addr)
2371{
2372 struct strip *strip_info = netdev_priv(dev);
2373 struct sockaddr *sa = addr;
2374 printk(KERN_INFO "%s: strip_set_dev_mac_address called\n", dev->name);
2375 set_mac_address(strip_info, (MetricomAddress *) sa->sa_data);
2376 return 0;
2377}
2378
2379static struct net_device_stats *strip_get_stats(struct net_device *dev)
2380{
2381 struct strip *strip_info = netdev_priv(dev);
2382 static struct net_device_stats stats;
2383
2384 memset(&stats, 0, sizeof(struct net_device_stats));
2385
2386 stats.rx_packets = strip_info->rx_packets;
2387 stats.tx_packets = strip_info->tx_packets;
2388 stats.rx_dropped = strip_info->rx_dropped;
2389 stats.tx_dropped = strip_info->tx_dropped;
2390 stats.tx_errors = strip_info->tx_errors;
2391 stats.rx_errors = strip_info->rx_errors;
2392 stats.rx_over_errors = strip_info->rx_over_errors;
2393 return (&stats);
2394}
2395
2396
2397/************************************************************************/
2398/* Opening and closing */
2399
2400/*
2401 * Here's the order things happen:
2402 * When the user runs "slattach -p strip ..."
2403 * 1. The TTY module calls strip_open;;
2404 * 2. strip_open calls strip_alloc
2405 * 3. strip_alloc calls register_netdev
2406 * 4. register_netdev calls strip_dev_init
2407 * 5. then strip_open finishes setting up the strip_info
2408 *
2409 * When the user runs "ifconfig st<x> up address netmask ..."
2410 * 6. strip_open_low gets called
2411 *
2412 * When the user runs "ifconfig st<x> down"
2413 * 7. strip_close_low gets called
2414 *
2415 * When the user kills the slattach process
2416 * 8. strip_close gets called
2417 * 9. strip_close calls dev_close
2418 * 10. if the device is still up, then dev_close calls strip_close_low
2419 * 11. strip_close calls strip_free
2420 */
2421
2422/* Open the low-level part of the STRIP channel. Easy! */
2423
2424static int strip_open_low(struct net_device *dev)
2425{
2426 struct strip *strip_info = netdev_priv(dev);
2427
2428 if (strip_info->tty == NULL)
2429 return (-ENODEV);
2430
2431 if (!allocate_buffers(strip_info, dev->mtu))
2432 return (-ENOMEM);
2433
2434 strip_info->sx_count = 0;
2435 strip_info->tx_left = 0;
2436
2437 strip_info->discard = 0;
2438 strip_info->working = FALSE;
2439 strip_info->firmware_level = NoStructure;
2440 strip_info->next_command = CompatibilityCommand;
2441 strip_info->user_baud = tty_get_baud_rate(strip_info->tty);
2442
2443 printk(KERN_INFO "%s: Initializing Radio.\n",
2444 strip_info->dev->name);
2445 ResetRadio(strip_info);
2446 strip_info->idle_timer.expires = jiffies + 1 * HZ;
2447 add_timer(&strip_info->idle_timer);
2448 netif_wake_queue(dev);
2449 return (0);
2450}
2451
2452
2453/*
2454 * Close the low-level part of the STRIP channel. Easy!
2455 */
2456
2457static int strip_close_low(struct net_device *dev)
2458{
2459 struct strip *strip_info = netdev_priv(dev);
2460
2461 if (strip_info->tty == NULL)
2462 return -EBUSY;
2463 clear_bit(TTY_DO_WRITE_WAKEUP, &strip_info->tty->flags);
2464 netif_stop_queue(dev);
2465
2466 /*
2467 * Free all STRIP frame buffers.
2468 */
2469 kfree(strip_info->rx_buff);
2470 strip_info->rx_buff = NULL;
2471 kfree(strip_info->sx_buff);
2472 strip_info->sx_buff = NULL;
2473 kfree(strip_info->tx_buff);
2474 strip_info->tx_buff = NULL;
2475
2476 del_timer(&strip_info->idle_timer);
2477 return 0;
2478}
2479
2480static const struct header_ops strip_header_ops = {
2481 .create = strip_header,
2482 .rebuild = strip_rebuild_header,
2483};
2484
2485
2486static const struct net_device_ops strip_netdev_ops = {
2487 .ndo_open = strip_open_low,
2488 .ndo_stop = strip_close_low,
2489 .ndo_start_xmit = strip_xmit,
2490 .ndo_set_mac_address = strip_set_mac_address,
2491 .ndo_get_stats = strip_get_stats,
2492 .ndo_change_mtu = strip_change_mtu,
2493};
2494
2495/*
2496 * This routine is called by DDI when the
2497 * (dynamically assigned) device is registered
2498 */
2499
2500static void strip_dev_setup(struct net_device *dev)
2501{
2502 /*
2503 * Finish setting up the DEVICE info.
2504 */
2505
2506 dev->trans_start = 0;
2507 dev->tx_queue_len = 30; /* Drop after 30 frames queued */
2508
2509 dev->flags = 0;
2510 dev->mtu = DEFAULT_STRIP_MTU;
2511 dev->type = ARPHRD_METRICOM; /* dtang */
2512 dev->hard_header_len = sizeof(STRIP_Header);
2513 /*
2514 * netdev_priv(dev) Already holds a pointer to our struct strip
2515 */
2516
2517 *(MetricomAddress *)dev->broadcast = broadcast_address;
2518 dev->dev_addr[0] = 0;
2519 dev->addr_len = sizeof(MetricomAddress);
2520
2521 dev->header_ops = &strip_header_ops,
2522 dev->netdev_ops = &strip_netdev_ops;
2523}
2524
2525/*
2526 * Free a STRIP channel.
2527 */
2528
2529static void strip_free(struct strip *strip_info)
2530{
2531 spin_lock_bh(&strip_lock);
2532 list_del_rcu(&strip_info->list);
2533 spin_unlock_bh(&strip_lock);
2534
2535 strip_info->magic = 0;
2536
2537 free_netdev(strip_info->dev);
2538}
2539
2540
2541/*
2542 * Allocate a new free STRIP channel
2543 */
2544static struct strip *strip_alloc(void)
2545{
2546 struct list_head *n;
2547 struct net_device *dev;
2548 struct strip *strip_info;
2549
2550 dev = alloc_netdev(sizeof(struct strip), "st%d",
2551 strip_dev_setup);
2552
2553 if (!dev)
2554 return NULL; /* If no more memory, return */
2555
2556
2557 strip_info = netdev_priv(dev);
2558 strip_info->dev = dev;
2559
2560 strip_info->magic = STRIP_MAGIC;
2561 strip_info->tty = NULL;
2562
2563 strip_info->gratuitous_arp = jiffies + LongTime;
2564 strip_info->arp_interval = 0;
2565 init_timer(&strip_info->idle_timer);
2566 strip_info->idle_timer.data = (long) dev;
2567 strip_info->idle_timer.function = strip_IdleTask;
2568
2569
2570 spin_lock_bh(&strip_lock);
2571 rescan:
2572 /*
2573 * Search the list to find where to put our new entry
2574 * (and in the process decide what channel number it is
2575 * going to be)
2576 */
2577 list_for_each(n, &strip_list) {
2578 struct strip *s = hlist_entry(n, struct strip, list);
2579
2580 if (s->dev->base_addr == dev->base_addr) {
2581 ++dev->base_addr;
2582 goto rescan;
2583 }
2584 }
2585
2586 sprintf(dev->name, "st%ld", dev->base_addr);
2587
2588 list_add_tail_rcu(&strip_info->list, &strip_list);
2589 spin_unlock_bh(&strip_lock);
2590
2591 return strip_info;
2592}
2593
2594/*
2595 * Open the high-level part of the STRIP channel.
2596 * This function is called by the TTY module when the
2597 * STRIP line discipline is called for. Because we are
2598 * sure the tty line exists, we only have to link it to
2599 * a free STRIP channel...
2600 */
2601
2602static int strip_open(struct tty_struct *tty)
2603{
2604 struct strip *strip_info = tty->disc_data;
2605
2606 /*
2607 * First make sure we're not already connected.
2608 */
2609
2610 if (strip_info && strip_info->magic == STRIP_MAGIC)
2611 return -EEXIST;
2612
2613 /*
2614 * We need a write method.
2615 */
2616
2617 if (tty->ops->write == NULL || tty->ops->set_termios == NULL)
2618 return -EOPNOTSUPP;
2619
2620 /*
2621 * OK. Find a free STRIP channel to use.
2622 */
2623 if ((strip_info = strip_alloc()) == NULL)
2624 return -ENFILE;
2625
2626 /*
2627 * Register our newly created device so it can be ifconfig'd
2628 * strip_dev_init() will be called as a side-effect
2629 */
2630
2631 if (register_netdev(strip_info->dev) != 0) {
2632 printk(KERN_ERR "strip: register_netdev() failed.\n");
2633 strip_free(strip_info);
2634 return -ENFILE;
2635 }
2636
2637 strip_info->tty = tty;
2638 tty->disc_data = strip_info;
2639 tty->receive_room = 65536;
2640
2641 tty_driver_flush_buffer(tty);
2642
2643 /*
2644 * Restore default settings
2645 */
2646
2647 strip_info->dev->type = ARPHRD_METRICOM; /* dtang */
2648
2649 /*
2650 * Set tty options
2651 */
2652
2653 tty->termios->c_iflag |= IGNBRK | IGNPAR; /* Ignore breaks and parity errors. */
2654 tty->termios->c_cflag |= CLOCAL; /* Ignore modem control signals. */
2655 tty->termios->c_cflag &= ~HUPCL; /* Don't close on hup */
2656
2657 printk(KERN_INFO "STRIP: device \"%s\" activated\n",
2658 strip_info->dev->name);
2659
2660 /*
2661 * Done. We have linked the TTY line to a channel.
2662 */
2663 return (strip_info->dev->base_addr);
2664}
2665
2666/*
2667 * Close down a STRIP channel.
2668 * This means flushing out any pending queues, and then restoring the
2669 * TTY line discipline to what it was before it got hooked to STRIP
2670 * (which usually is TTY again).
2671 */
2672
2673static void strip_close(struct tty_struct *tty)
2674{
2675 struct strip *strip_info = tty->disc_data;
2676
2677 /*
2678 * First make sure we're connected.
2679 */
2680
2681 if (!strip_info || strip_info->magic != STRIP_MAGIC)
2682 return;
2683
2684 unregister_netdev(strip_info->dev);
2685
2686 tty->disc_data = NULL;
2687 strip_info->tty = NULL;
2688 printk(KERN_INFO "STRIP: device \"%s\" closed down\n",
2689 strip_info->dev->name);
2690 strip_free(strip_info);
2691 tty->disc_data = NULL;
2692}
2693
2694
2695/************************************************************************/
2696/* Perform I/O control calls on an active STRIP channel. */
2697
2698static int strip_ioctl(struct tty_struct *tty, struct file *file,
2699 unsigned int cmd, unsigned long arg)
2700{
2701 struct strip *strip_info = tty->disc_data;
2702
2703 /*
2704 * First make sure we're connected.
2705 */
2706
2707 if (!strip_info || strip_info->magic != STRIP_MAGIC)
2708 return -EINVAL;
2709
2710 switch (cmd) {
2711 case SIOCGIFNAME:
2712 if(copy_to_user((void __user *) arg, strip_info->dev->name, strlen(strip_info->dev->name) + 1))
2713 return -EFAULT;
2714 break;
2715 case SIOCSIFHWADDR:
2716 {
2717 MetricomAddress addr;
2718 //printk(KERN_INFO "%s: SIOCSIFHWADDR\n", strip_info->dev->name);
2719 if(copy_from_user(&addr, (void __user *) arg, sizeof(MetricomAddress)))
2720 return -EFAULT;
2721 return set_mac_address(strip_info, &addr);
2722 }
2723 default:
2724 return tty_mode_ioctl(tty, file, cmd, arg);
2725 break;
2726 }
2727 return 0;
2728}
2729
2730#ifdef CONFIG_COMPAT
2731static long strip_compat_ioctl(struct tty_struct *tty, struct file *file,
2732 unsigned int cmd, unsigned long arg)
2733{
2734 switch (cmd) {
2735 case SIOCGIFNAME:
2736 case SIOCSIFHWADDR:
2737 return strip_ioctl(tty, file, cmd,
2738 (unsigned long)compat_ptr(arg));
2739 }
2740 return -ENOIOCTLCMD;
2741}
2742#endif
2743
2744/************************************************************************/
2745/* Initialization */
2746
2747static struct tty_ldisc_ops strip_ldisc = {
2748 .magic = TTY_LDISC_MAGIC,
2749 .name = "strip",
2750 .owner = THIS_MODULE,
2751 .open = strip_open,
2752 .close = strip_close,
2753 .ioctl = strip_ioctl,
2754#ifdef CONFIG_COMPAT
2755 .compat_ioctl = strip_compat_ioctl,
2756#endif
2757 .receive_buf = strip_receive_buf,
2758 .write_wakeup = strip_write_some_more,
2759};
2760
2761/*
2762 * Initialize the STRIP driver.
2763 * This routine is called at boot time, to bootstrap the multi-channel
2764 * STRIP driver
2765 */
2766
2767static char signon[] __initdata =
2768 KERN_INFO "STRIP: Version %s (unlimited channels)\n";
2769
2770static int __init strip_init_driver(void)
2771{
2772 int status;
2773
2774 printk(signon, StripVersion);
2775
2776
2777 /*
2778 * Fill in our line protocol discipline, and register it
2779 */
2780 if ((status = tty_register_ldisc(N_STRIP, &strip_ldisc)))
2781 printk(KERN_ERR "STRIP: can't register line discipline (err = %d)\n",
2782 status);
2783
2784 /*
2785 * Register the status file with /proc
2786 */
2787 proc_net_fops_create(&init_net, "strip", S_IFREG | S_IRUGO, &strip_seq_fops);
2788
2789 return status;
2790}
2791
2792module_init(strip_init_driver);
2793
2794static const char signoff[] __exitdata =
2795 KERN_INFO "STRIP: Module Unloaded\n";
2796
2797static void __exit strip_exit_driver(void)
2798{
2799 int i;
2800 struct list_head *p,*n;
2801
2802 /* module ref count rules assure that all entries are unregistered */
2803 list_for_each_safe(p, n, &strip_list) {
2804 struct strip *s = list_entry(p, struct strip, list);
2805 strip_free(s);
2806 }
2807
2808 /* Unregister with the /proc/net file here. */
2809 proc_net_remove(&init_net, "strip");
2810
2811 if ((i = tty_unregister_ldisc(N_STRIP)))
2812 printk(KERN_ERR "STRIP: can't unregister line discipline (err = %d)\n", i);
2813
2814 printk(signoff);
2815}
2816
2817module_exit(strip_exit_driver);
2818
2819MODULE_AUTHOR("Stuart Cheshire <cheshire@cs.stanford.edu>");
2820MODULE_DESCRIPTION("Starmode Radio IP (STRIP) Device Driver");
2821MODULE_LICENSE("Dual BSD/GPL");
2822
2823MODULE_SUPPORTED_DEVICE("Starmode Radio IP (STRIP) modem");
diff --git a/drivers/staging/ti-st/Kconfig b/drivers/staging/ti-st/Kconfig
new file mode 100644
index 000000000000..3ab204ddc29d
--- /dev/null
+++ b/drivers/staging/ti-st/Kconfig
@@ -0,0 +1,25 @@
1#
2# TI's shared transport line discipline and the protocol
3# drivers (BT, FM and GPS)
4#
5menu "Texas Instruments shared transport line discipline"
6config TI_ST
7 tristate "shared transport core driver"
8 depends on RFKILL
9 select FW_LOADER
10 help
11 This enables the shared transport core driver for TI
12 BT / FM and GPS combo chips. This enables protocol drivers
13 to register themselves with core and send data, the responses
14 are returned to relevant protocol drivers based on their
15 packet types.
16
17config ST_BT
18 tristate "BlueZ bluetooth driver for ST"
19 depends on BT
20 select TI_ST
21 help
22 This enables the Bluetooth driver for TI BT/FM/GPS combo devices.
23 This makes use of shared transport line discipline core driver to
24 communicate with the BT core of the combo chip.
25endmenu
diff --git a/drivers/staging/ti-st/Makefile b/drivers/staging/ti-st/Makefile
new file mode 100644
index 000000000000..0167d1d2c255
--- /dev/null
+++ b/drivers/staging/ti-st/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for TI's shared transport line discipline
3# and its protocol drivers (BT, FM, GPS)
4#
5obj-$(CONFIG_TI_ST) += st_drv.o
6st_drv-objs := st_core.o st_kim.o st_ll.o
7obj-$(CONFIG_ST_BT) += bt_drv.o
diff --git a/drivers/staging/ti-st/TODO b/drivers/staging/ti-st/TODO
new file mode 100644
index 000000000000..2c4fe583901d
--- /dev/null
+++ b/drivers/staging/ti-st/TODO
@@ -0,0 +1,19 @@
1TODO:
2
31. A per-device/tty port context required to support multiple devices
4on same platform.
5
62. REMOVE the sysfs entry PID passing mechanism, since there should
7be a better way to request user-space to install line discipline.
8
93. Re-view/Re-work on the locking.
10
114. Re-structure to make the ldisc driver more generic for chipsets which mux
12multiple connectivity (BT, FM, GPS) upon 1 TTY port.
13
145. Step up and maintain this driver to ensure that it continues
15to work. Having the hardware for this is pretty much a
16requirement. If this does not happen, the will be removed in
17the 2.6.35 kernel release.
18
19Please send patches to Greg Kroah-Hartman <greg@kroah.com>.
diff --git a/drivers/staging/ti-st/bt_drv.c b/drivers/staging/ti-st/bt_drv.c
new file mode 100644
index 000000000000..d8420b5c91fa
--- /dev/null
+++ b/drivers/staging/ti-st/bt_drv.c
@@ -0,0 +1,502 @@
1/*
2 * Texas Instrument's Bluetooth Driver For Shared Transport.
3 *
4 * Bluetooth Driver acts as interface between HCI CORE and
5 * TI Shared Transport Layer.
6 *
7 * Copyright (C) 2009 Texas Instruments
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <net/bluetooth/bluetooth.h>
25#include <net/bluetooth/hci_core.h>
26
27#include "st.h"
28#include "bt_drv.h"
29
30/* Define this macro to get debug msg */
31#undef DEBUG
32
33#ifdef DEBUG
34#define BT_DRV_DBG(fmt, arg...) printk(KERN_INFO "(btdrv):"fmt"\n" , ## arg)
35#define BTDRV_API_START() printk(KERN_INFO "(btdrv): %s Start\n", \
36 __func__)
37#define BTDRV_API_EXIT(errno) printk(KERN_INFO "(btdrv): %s Exit(%d)\n", \
38 __func__, errno)
39#else
40#define BT_DRV_DBG(fmt, arg...)
41#define BTDRV_API_START()
42#define BTDRV_API_EXIT(errno)
43#endif
44
45#define BT_DRV_ERR(fmt, arg...) printk(KERN_ERR "(btdrv):"fmt"\n" , ## arg)
46
47static int reset;
48static struct hci_st *hst;
49
50/* Increments HCI counters based on pocket ID (cmd,acl,sco) */
51static inline void hci_st_tx_complete(struct hci_st *hst, int pkt_type)
52{
53 struct hci_dev *hdev;
54
55 BTDRV_API_START();
56
57 hdev = hst->hdev;
58
59 /* Update HCI stat counters */
60 switch (pkt_type) {
61 case HCI_COMMAND_PKT:
62 hdev->stat.cmd_tx++;
63 break;
64
65 case HCI_ACLDATA_PKT:
66 hdev->stat.acl_tx++;
67 break;
68
69 case HCI_SCODATA_PKT:
70 hdev->stat.cmd_tx++;
71 break;
72 }
73
74 BTDRV_API_EXIT(0);
75}
76
77/* ------- Interfaces to Shared Transport ------ */
78
79/* Called by ST layer to indicate protocol registration completion
80 * status.hci_st_open() function will wait for signal from this
81 * API when st_register() function returns ST_PENDING.
82 */
83static void hci_st_registration_completion_cb(char data)
84{
85 BTDRV_API_START();
86
87 /* hci_st_open() function needs value of 'data' to know
88 * the registration status(success/fail),So have a back
89 * up of it.
90 */
91 hst->streg_cbdata = data;
92
93 /* Got a feedback from ST for BT driver registration
94 * request.Wackup hci_st_open() function to continue
95 * it's open operation.
96 */
97 complete(&hst->wait_for_btdrv_reg_completion);
98
99 BTDRV_API_EXIT(0);
100}
101
102/* Called by Shared Transport layer when receive data is
103 * available */
104static long hci_st_receive(struct sk_buff *skb)
105{
106 int err;
107 int len;
108
109 BTDRV_API_START();
110
111 err = 0;
112 len = 0;
113
114 if (skb == NULL) {
115 BT_DRV_ERR("Invalid SKB received from ST");
116 BTDRV_API_EXIT(-EFAULT);
117 return -EFAULT;
118 }
119 if (!hst) {
120 kfree_skb(skb);
121 BT_DRV_ERR("Invalid hci_st memory,freeing SKB");
122 BTDRV_API_EXIT(-EFAULT);
123 return -EFAULT;
124 }
125 if (!test_bit(BT_DRV_RUNNING, &hst->flags)) {
126 kfree_skb(skb);
127 BT_DRV_ERR("Device is not running,freeing SKB");
128 BTDRV_API_EXIT(-EINVAL);
129 return -EINVAL;
130 }
131
132 len = skb->len;
133 skb->dev = (struct net_device *)hst->hdev;
134
135 /* Forward skb to HCI CORE layer */
136 err = hci_recv_frame(skb);
137 if (err) {
138 kfree_skb(skb);
139 BT_DRV_ERR("Unable to push skb to HCI CORE(%d),freeing SKB",
140 err);
141 BTDRV_API_EXIT(err);
142 return err;
143 }
144 hst->hdev->stat.byte_rx += len;
145
146 BTDRV_API_EXIT(0);
147 return 0;
148}
149
150/* ------- Interfaces to HCI layer ------ */
151
152/* Called from HCI core to initialize the device */
153static int hci_st_open(struct hci_dev *hdev)
154{
155 static struct st_proto_s hci_st_proto;
156 unsigned long timeleft;
157 int err;
158
159 BTDRV_API_START();
160
161 err = 0;
162
163 BT_DRV_DBG("%s %p", hdev->name, hdev);
164
165 /* Already registered with ST ? */
166 if (test_bit(BT_ST_REGISTERED, &hst->flags)) {
167 BT_DRV_ERR("Registered with ST already,open called again?");
168 BTDRV_API_EXIT(0);
169 return 0;
170 }
171
172 /* Populate BT driver info required by ST */
173 memset(&hci_st_proto, 0, sizeof(hci_st_proto));
174
175 /* BT driver ID */
176 hci_st_proto.type = ST_BT;
177
178 /* Receive function which called from ST */
179 hci_st_proto.recv = hci_st_receive;
180
181 /* Packet match function may used in future */
182 hci_st_proto.match_packet = NULL;
183
184 /* Callback to be called when registration is pending */
185 hci_st_proto.reg_complete_cb = hci_st_registration_completion_cb;
186
187 /* This is write function pointer of ST. BT driver will make use of this
188 * for sending any packets to chip. ST will assign and give to us, so
189 * make it as NULL */
190 hci_st_proto.write = NULL;
191
192 /* Register with ST layer */
193 err = st_register(&hci_st_proto);
194 if (err == ST_ERR_PENDING) {
195 /* Prepare wait-for-completion handler data structures.
196 * Needed to syncronize this and st_registration_completion_cb()
197 * functions.
198 */
199 init_completion(&hst->wait_for_btdrv_reg_completion);
200
201 /* Reset ST registration callback status flag , this value
202 * will be updated in hci_st_registration_completion_cb()
203 * function whenever it called from ST driver.
204 */
205 hst->streg_cbdata = -EINPROGRESS;
206
207 /* ST is busy with other protocol registration(may be busy with
208 * firmware download).So,Wait till the registration callback
209 * (passed as a argument to st_register() function) getting
210 * called from ST.
211 */
212 BT_DRV_DBG(" %s waiting for reg completion signal from ST",
213 __func__);
214
215 timeleft =
216 wait_for_completion_timeout
217 (&hst->wait_for_btdrv_reg_completion,
218 msecs_to_jiffies(BT_REGISTER_TIMEOUT));
219 if (!timeleft) {
220 BT_DRV_ERR("Timeout(%ld sec),didn't get reg"
221 "completion signal from ST",
222 BT_REGISTER_TIMEOUT / 1000);
223 BTDRV_API_EXIT(-ETIMEDOUT);
224 return -ETIMEDOUT;
225 }
226
227 /* Is ST registration callback called with ERROR value? */
228 if (hst->streg_cbdata != 0) {
229 BT_DRV_ERR("ST reg completion CB called with invalid"
230 "status %d", hst->streg_cbdata);
231 BTDRV_API_EXIT(-EAGAIN);
232 return -EAGAIN;
233 }
234 err = 0;
235 } else if (err == ST_ERR_FAILURE) {
236 BT_DRV_ERR("st_register failed %d", err);
237 BTDRV_API_EXIT(-EAGAIN);
238 return -EAGAIN;
239 }
240
241 /* Do we have proper ST write function? */
242 if (hci_st_proto.write != NULL) {
243 /* We need this pointer for sending any Bluetooth pkts */
244 hst->st_write = hci_st_proto.write;
245 } else {
246 BT_DRV_ERR("failed to get ST write func pointer");
247
248 /* Undo registration with ST */
249 err = st_unregister(ST_BT);
250 if (err < 0)
251 BT_DRV_ERR("st_unregister failed %d", err);
252
253 hst->st_write = NULL;
254 BTDRV_API_EXIT(-EAGAIN);
255 return -EAGAIN;
256 }
257
258 /* Registration with ST layer is completed successfully,
259 * now chip is ready to accept commands from HCI CORE.
260 * Mark HCI Device flag as RUNNING
261 */
262 set_bit(HCI_RUNNING, &hdev->flags);
263
264 /* Registration with ST successful */
265 set_bit(BT_ST_REGISTERED, &hst->flags);
266
267 BTDRV_API_EXIT(err);
268 return err;
269}
270
271/* Close device */
272static int hci_st_close(struct hci_dev *hdev)
273{
274 int err;
275
276 BTDRV_API_START();
277
278 err = 0;
279
280 /* Unregister from ST layer */
281 if (test_and_clear_bit(BT_ST_REGISTERED, &hst->flags)) {
282 err = st_unregister(ST_BT);
283 if (err != ST_SUCCESS) {
284 BT_DRV_ERR("st_unregister failed %d", err);
285 BTDRV_API_EXIT(-EBUSY);
286 return -EBUSY;
287 }
288 }
289
290 hst->st_write = NULL;
291
292 /* ST layer would have moved chip to inactive state.
293 * So,clear HCI device RUNNING flag.
294 */
295 if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags)) {
296 BTDRV_API_EXIT(0);
297 return 0;
298 }
299
300 BTDRV_API_EXIT(err);
301 return err;
302}
303
304/* Called from HCI CORE , Sends frames to Shared Transport */
305static int hci_st_send_frame(struct sk_buff *skb)
306{
307 struct hci_dev *hdev;
308 struct hci_st *hst;
309 long len;
310
311 BTDRV_API_START();
312
313 if (skb == NULL) {
314 BT_DRV_ERR("Invalid skb received from HCI CORE");
315 BTDRV_API_EXIT(-ENOMEM);
316 return -ENOMEM;
317 }
318 hdev = (struct hci_dev *)skb->dev;
319 if (!hdev) {
320 BT_DRV_ERR("SKB received for invalid HCI Device (hdev=NULL)");
321 BTDRV_API_EXIT(-ENODEV);
322 return -ENODEV;
323 }
324 if (!test_bit(HCI_RUNNING, &hdev->flags)) {
325 BT_DRV_ERR("Device is not running");
326 BTDRV_API_EXIT(-EBUSY);
327 return -EBUSY;
328 }
329
330 hst = (struct hci_st *)hdev->driver_data;
331
332 /* Prepend skb with frame type */
333 memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
334
335 BT_DRV_DBG(" %s: type %d len %d", hdev->name, bt_cb(skb)->pkt_type,
336 skb->len);
337
338 /* Insert skb to shared transport layer's transmit queue.
339 * Freeing skb memory is taken care in shared transport layer,
340 * so don't free skb memory here.
341 */
342 if (!hst->st_write) {
343 kfree_skb(skb);
344 BT_DRV_ERR(" Can't write to ST, st_write null?");
345 BTDRV_API_EXIT(-EAGAIN);
346 return -EAGAIN;
347 }
348 len = hst->st_write(skb);
349 if (len < 0) {
350 /* Something went wrong in st write , free skb memory */
351 kfree_skb(skb);
352 BT_DRV_ERR(" ST write failed (%ld)", len);
353 BTDRV_API_EXIT(-EAGAIN);
354 return -EAGAIN;
355 }
356
357 /* ST accepted our skb. So, Go ahead and do rest */
358 hdev->stat.byte_tx += len;
359 hci_st_tx_complete(hst, bt_cb(skb)->pkt_type);
360
361 BTDRV_API_EXIT(0);
362 return 0;
363}
364
365static void hci_st_destruct(struct hci_dev *hdev)
366{
367 BTDRV_API_START();
368
369 if (!hdev) {
370 BT_DRV_ERR("Destruct called with invalid HCI Device"
371 "(hdev=NULL)");
372 BTDRV_API_EXIT(0);
373 return;
374 }
375
376 BT_DRV_DBG("%s", hdev->name);
377
378 /* free hci_st memory */
379 if (hdev->driver_data != NULL)
380 kfree(hdev->driver_data);
381
382 BTDRV_API_EXIT(0);
383 return;
384}
385
386/* Creates new HCI device */
387static int hci_st_register_dev(struct hci_st *hst)
388{
389 struct hci_dev *hdev;
390
391 BTDRV_API_START();
392
393 /* Initialize and register HCI device */
394 hdev = hci_alloc_dev();
395 if (!hdev) {
396 BT_DRV_ERR("Can't allocate HCI device");
397 BTDRV_API_EXIT(-ENOMEM);
398 return -ENOMEM;
399 }
400 BT_DRV_DBG(" HCI device allocated. hdev= %p", hdev);
401
402 hst->hdev = hdev;
403 hdev->bus = HCI_UART;
404 hdev->driver_data = hst;
405 hdev->open = hci_st_open;
406 hdev->close = hci_st_close;
407 hdev->flush = NULL;
408 hdev->send = hci_st_send_frame;
409 hdev->destruct = hci_st_destruct;
410 hdev->owner = THIS_MODULE;
411
412 if (reset)
413 set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks);
414
415 if (hci_register_dev(hdev) < 0) {
416 BT_DRV_ERR("Can't register HCI device");
417 hci_free_dev(hdev);
418 BTDRV_API_EXIT(-ENODEV);
419 return -ENODEV;
420 }
421
422 BT_DRV_DBG(" HCI device registered. hdev= %p", hdev);
423 BTDRV_API_EXIT(0);
424 return 0;
425}
426
427/* ------- Module Init interface ------ */
428
429static int __init bt_drv_init(void)
430{
431 int err;
432
433 BTDRV_API_START();
434
435 err = 0;
436
437 BT_DRV_DBG(" Bluetooth Driver Version %s", VERSION);
438
439 /* Allocate local resource memory */
440 hst = kzalloc(sizeof(struct hci_st), GFP_KERNEL);
441 if (!hst) {
442 BT_DRV_ERR("Can't allocate control structure");
443 BTDRV_API_EXIT(-ENFILE);
444 return -ENFILE;
445 }
446
447 /* Expose "hciX" device to user space */
448 err = hci_st_register_dev(hst);
449 if (err) {
450 /* Release local resource memory */
451 kfree(hst);
452
453 BT_DRV_ERR("Unable to expose hci0 device(%d)", err);
454 BTDRV_API_EXIT(err);
455 return err;
456 }
457 set_bit(BT_DRV_RUNNING, &hst->flags);
458
459 BTDRV_API_EXIT(err);
460 return err;
461}
462
463/* ------- Module Exit interface ------ */
464
465static void __exit bt_drv_exit(void)
466{
467 BTDRV_API_START();
468
469 /* Deallocate local resource's memory */
470 if (hst) {
471 struct hci_dev *hdev = hst->hdev;
472
473 if (hdev == NULL) {
474 BT_DRV_ERR("Invalid hdev memory");
475 kfree(hst);
476 } else {
477 hci_st_close(hdev);
478 if (test_and_clear_bit(BT_DRV_RUNNING, &hst->flags)) {
479 /* Remove HCI device (hciX) created
480 * in module init.
481 */
482 hci_unregister_dev(hdev);
483
484 /* Free HCI device memory */
485 hci_free_dev(hdev);
486 }
487 }
488 }
489 BTDRV_API_EXIT(0);
490}
491
492module_init(bt_drv_init);
493module_exit(bt_drv_exit);
494
495/* ------ Module Info ------ */
496
497module_param(reset, bool, 0644);
498MODULE_PARM_DESC(reset, "Send HCI reset command on initialization");
499MODULE_AUTHOR("Raja Mani <raja_mani@ti.com>");
500MODULE_DESCRIPTION("Bluetooth Driver for TI Shared Transport" VERSION);
501MODULE_VERSION(VERSION);
502MODULE_LICENSE("GPL");
diff --git a/drivers/staging/ti-st/bt_drv.h b/drivers/staging/ti-st/bt_drv.h
new file mode 100644
index 000000000000..a0beebec8465
--- /dev/null
+++ b/drivers/staging/ti-st/bt_drv.h
@@ -0,0 +1,61 @@
1/*
2 * Texas Instrument's Bluetooth Driver For Shared Transport.
3 *
4 * Bluetooth Driver acts as interface between HCI CORE and
5 * TI Shared Transport Layer.
6 *
7 * Copyright (C) 2009 Texas Instruments
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#ifndef _BT_DRV_H
25#define _BT_DRV_H
26
27/* Bluetooth Driver Version */
28#define VERSION "1.0"
29
30/* Defines number of seconds to wait for reg completion
31 * callback getting called from ST (in case,registration
32 * with ST returns PENDING status)
33 */
34#define BT_REGISTER_TIMEOUT msecs_to_jiffies(6000) /* 6 sec */
35
36/* BT driver's local status */
37#define BT_DRV_RUNNING 0
38#define BT_ST_REGISTERED 1
39
40/* BT driver operation structure */
41struct hci_st {
42
43 /* hci device pointer which binds to bt driver */
44 struct hci_dev *hdev;
45
46 /* used locally,to maintain various BT driver status */
47 unsigned long flags;
48
49 /* to hold ST registration callback status */
50 char streg_cbdata;
51
52 /* write function pointer of ST driver */
53 long (*st_write) (struct sk_buff *);
54
55 /* Wait on comepletion handler needed to synchronize
56 * hci_st_open() and hci_st_registration_completion_cb()
57 * functions.*/
58 struct completion wait_for_btdrv_reg_completion;
59};
60
61#endif
diff --git a/drivers/staging/ti-st/fm.h b/drivers/staging/ti-st/fm.h
new file mode 100644
index 000000000000..be41453649ed
--- /dev/null
+++ b/drivers/staging/ti-st/fm.h
@@ -0,0 +1,13 @@
1struct fm_event_hdr {
2 unsigned char plen;
3} __attribute__ ((packed));
4
5#define FM_MAX_FRAME_SIZE 0xFF /* TODO: */
6#define FM_EVENT_HDR_SIZE 1 /* size of fm_event_hdr */
7#define ST_FM_CH8_PKT 0x8
8
9/* gps stuff */
10struct gps_event_hdr {
11unsigned char opcode;
12unsigned short plen;
13} __attribute__ ((packed));
diff --git a/drivers/staging/ti-st/st.h b/drivers/staging/ti-st/st.h
new file mode 100644
index 000000000000..e8fc97e32c94
--- /dev/null
+++ b/drivers/staging/ti-st/st.h
@@ -0,0 +1,90 @@
1/*
2 * Shared Transport Header file
3 * To be included by the protocol stack drivers for
4 * Texas Instruments BT,FM and GPS combo chip drivers
5 *
6 * Copyright (C) 2009 Texas Instruments
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef ST_H
24#define ST_H
25
26#include <linux/skbuff.h>
27/*
28 * st.h
29 */
30
31/* TODO:
32 * Move the following to tty.h upon acceptance
33 */
34#define N_TI_WL 20 /* Ldisc for TI's WL BT, FM, GPS combo chips */
35
36/* some gpios have active high, others like fm have
37 * active low
38 */
39enum kim_gpio_state {
40 KIM_GPIO_INACTIVE,
41 KIM_GPIO_ACTIVE,
42};
43/*
44 * the list of protocols on chip
45 */
46enum proto_type {
47 ST_BT,
48 ST_FM,
49 ST_GPS,
50 ST_MAX,
51};
52
53enum {
54 ST_ERR_FAILURE = -1, /* check struct */
55 ST_SUCCESS,
56 ST_ERR_PENDING = -5, /* to call reg_complete_cb */
57 ST_ERR_ALREADY, /* already registered */
58 ST_ERR_INPROGRESS,
59 ST_ERR_NOPROTO, /* protocol not supported */
60};
61
62/* per protocol structure
63 * for BT/FM and GPS
64 */
65struct st_proto_s {
66 enum proto_type type;
67/*
68 * to be called by ST when data arrives
69 */
70 long (*recv) (struct sk_buff *);
71/*
72 * for future use, logic now to be in ST
73 */
74 unsigned char (*match_packet) (const unsigned char *data);
75/*
76 * subsequent registration return PENDING,
77 * signalled complete by this callback function
78 */
79 void (*reg_complete_cb) (char data);
80/*
81 * write function, sent in as NULL and to be returned to
82 * protocol drivers
83 */
84 long (*write) (struct sk_buff *skb);
85};
86
87extern long st_register(struct st_proto_s *new_proto);
88extern long st_unregister(enum proto_type type);
89
90#endif /* ST_H */
diff --git a/drivers/staging/ti-st/st_core.c b/drivers/staging/ti-st/st_core.c
new file mode 100644
index 000000000000..4e93694e1c21
--- /dev/null
+++ b/drivers/staging/ti-st/st_core.c
@@ -0,0 +1,1062 @@
1/*
2 * Shared Transport Line discipline driver Core
3 * This hooks up ST KIM driver and ST LL driver
4 * Copyright (C) 2009 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#define pr_fmt(fmt) "(stc): " fmt
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/tty.h>
26
27/* understand BT, FM and GPS for now */
28#include <net/bluetooth/bluetooth.h>
29#include <net/bluetooth/hci_core.h>
30#include <net/bluetooth/hci.h>
31#include "fm.h"
32/*
33 * packet formats for fm and gps
34 * #include "gps.h"
35 */
36#include "st_core.h"
37#include "st_kim.h"
38#include "st_ll.h"
39#include "st.h"
40
41#ifdef DEBUG
42/* strings to be used for rfkill entries and by
43 * ST Core to be used for sysfs debug entry
44 */
45#define PROTO_ENTRY(type, name) name
46const unsigned char *protocol_strngs[] = {
47 PROTO_ENTRY(ST_BT, "Bluetooth"),
48 PROTO_ENTRY(ST_FM, "FM"),
49 PROTO_ENTRY(ST_GPS, "GPS"),
50};
51#endif
52/* function pointer pointing to either,
53 * st_kim_recv during registration to receive fw download responses
54 * st_int_recv after registration to receive proto stack responses
55 */
56void (*st_recv) (void*, const unsigned char*, long);
57
58/********************************************************************/
59#if 0
60/* internal misc functions */
61bool is_protocol_list_empty(void)
62{
63 unsigned char i = 0;
64 pr_info(" %s ", __func__);
65 for (i = 0; i < ST_MAX; i++) {
66 if (st_gdata->list[i] != NULL)
67 return ST_NOTEMPTY;
68 /* not empty */
69 }
70 /* list empty */
71 return ST_EMPTY;
72}
73#endif
74/* can be called in from
75 * -- KIM (during fw download)
76 * -- ST Core (during st_write)
77 *
78 * This is the internal write function - a wrapper
79 * to tty->ops->write
80 */
81int st_int_write(struct st_data_s *st_gdata,
82 const unsigned char *data, int count)
83{
84#ifdef VERBOSE /* for debug */
85 int i;
86#endif
87 struct tty_struct *tty;
88 if (unlikely(st_gdata == NULL || st_gdata->tty == NULL)) {
89 pr_err("tty unavailable to perform write");
90 return ST_ERR_FAILURE;
91 }
92 tty = st_gdata->tty;
93#ifdef VERBOSE
94 printk(KERN_ERR "start data..\n");
95 for (i = 0; i < count; i++) /* no newlines for each datum */
96 printk(" %x", data[i]);
97 printk(KERN_ERR "\n ..end data\n");
98#endif
99 return tty->ops->write(tty, data, count);
100
101}
102
103/*
104 * push the skb received to relevant
105 * protocol stacks
106 */
107void st_send_frame(enum proto_type protoid, struct st_data_s *st_gdata)
108{
109 pr_info(" %s(prot:%d) ", __func__, protoid);
110
111 if (unlikely
112 (st_gdata == NULL || st_gdata->rx_skb == NULL
113 || st_gdata->list[protoid] == NULL)) {
114 pr_err("protocol %d not registered, no data to send?",
115 protoid);
116 kfree_skb(st_gdata->rx_skb);
117 return;
118 }
119 /* this cannot fail
120 * this shouldn't take long
121 * - should be just skb_queue_tail for the
122 * protocol stack driver
123 */
124 if (likely(st_gdata->list[protoid]->recv != NULL)) {
125 if (unlikely(st_gdata->list[protoid]->recv(st_gdata->rx_skb)
126 != ST_SUCCESS)) {
127 pr_err(" proto stack %d's ->recv failed", protoid);
128 kfree_skb(st_gdata->rx_skb);
129 return;
130 }
131 } else {
132 pr_err(" proto stack %d's ->recv null", protoid);
133 kfree_skb(st_gdata->rx_skb);
134 }
135 pr_info(" done %s", __func__);
136 return;
137}
138
139/*
140 * to call registration complete callbacks
141 * of all protocol stack drivers
142 */
143void st_reg_complete(struct st_data_s *st_gdata, char err)
144{
145 unsigned char i = 0;
146 pr_info(" %s ", __func__);
147 for (i = 0; i < ST_MAX; i++) {
148 if (likely(st_gdata != NULL && st_gdata->list[i] != NULL &&
149 st_gdata->list[i]->reg_complete_cb != NULL))
150 st_gdata->list[i]->reg_complete_cb(err);
151 }
152}
153
154static inline int st_check_data_len(struct st_data_s *st_gdata,
155 int protoid, int len)
156{
157 register int room = skb_tailroom(st_gdata->rx_skb);
158
159 pr_info("len %d room %d", len, room);
160
161 if (!len) {
162 /* Received packet has only packet header and
163 * has zero length payload. So, ask ST CORE to
164 * forward the packet to protocol driver (BT/FM/GPS)
165 */
166 st_send_frame(protoid, st_gdata);
167
168 } else if (len > room) {
169 /* Received packet's payload length is larger.
170 * We can't accommodate it in created skb.
171 */
172 pr_err("Data length is too large len %d room %d", len,
173 room);
174 kfree_skb(st_gdata->rx_skb);
175 } else {
176 /* Packet header has non-zero payload length and
177 * we have enough space in created skb. Lets read
178 * payload data */
179 st_gdata->rx_state = ST_BT_W4_DATA;
180 st_gdata->rx_count = len;
181 return len;
182 }
183
184 /* Change ST state to continue to process next
185 * packet */
186 st_gdata->rx_state = ST_W4_PACKET_TYPE;
187 st_gdata->rx_skb = NULL;
188 st_gdata->rx_count = 0;
189
190 return 0;
191}
192
193/* internal function for action when wake-up ack
194 * received
195 */
196static inline void st_wakeup_ack(struct st_data_s *st_gdata,
197 unsigned char cmd)
198{
199 register struct sk_buff *waiting_skb;
200 unsigned long flags = 0;
201
202 spin_lock_irqsave(&st_gdata->lock, flags);
203 /* de-Q from waitQ and Q in txQ now that the
204 * chip is awake
205 */
206 while ((waiting_skb = skb_dequeue(&st_gdata->tx_waitq)))
207 skb_queue_tail(&st_gdata->txq, waiting_skb);
208
209 /* state forwarded to ST LL */
210 st_ll_sleep_state(st_gdata, (unsigned long)cmd);
211 spin_unlock_irqrestore(&st_gdata->lock, flags);
212
213 /* wake up to send the recently copied skbs from waitQ */
214 st_tx_wakeup(st_gdata);
215}
216
217/* Decodes received RAW data and forwards to corresponding
218 * client drivers (Bluetooth,FM,GPS..etc).
219 *
220 */
221void st_int_recv(void *disc_data,
222 const unsigned char *data, long count)
223{
224 register char *ptr;
225 struct hci_event_hdr *eh;
226 struct hci_acl_hdr *ah;
227 struct hci_sco_hdr *sh;
228 struct fm_event_hdr *fm;
229 struct gps_event_hdr *gps;
230 register int len = 0, type = 0, dlen = 0;
231 static enum proto_type protoid = ST_MAX;
232 struct st_data_s *st_gdata = (struct st_data_s *)disc_data;
233
234 ptr = (char *)data;
235 /* tty_receive sent null ? */
236 if (unlikely(ptr == NULL) || (st_gdata == NULL)) {
237 pr_err(" received null from TTY ");
238 return;
239 }
240
241 pr_info("count %ld rx_state %ld"
242 "rx_count %ld", count, st_gdata->rx_state,
243 st_gdata->rx_count);
244
245 /* Decode received bytes here */
246 while (count) {
247 if (st_gdata->rx_count) {
248 len = min_t(unsigned int, st_gdata->rx_count, count);
249 memcpy(skb_put(st_gdata->rx_skb, len), ptr, len);
250 st_gdata->rx_count -= len;
251 count -= len;
252 ptr += len;
253
254 if (st_gdata->rx_count)
255 continue;
256
257 /* Check ST RX state machine , where are we? */
258 switch (st_gdata->rx_state) {
259
260 /* Waiting for complete packet ? */
261 case ST_BT_W4_DATA:
262 pr_info("Complete pkt received");
263
264 /* Ask ST CORE to forward
265 * the packet to protocol driver */
266 st_send_frame(protoid, st_gdata);
267
268 st_gdata->rx_state = ST_W4_PACKET_TYPE;
269 st_gdata->rx_skb = NULL;
270 protoid = ST_MAX; /* is this required ? */
271 continue;
272
273 /* Waiting for Bluetooth event header ? */
274 case ST_BT_W4_EVENT_HDR:
275 eh = (struct hci_event_hdr *)st_gdata->rx_skb->
276 data;
277
278 pr_info("Event header: evt 0x%2.2x"
279 "plen %d", eh->evt, eh->plen);
280
281 st_check_data_len(st_gdata, protoid, eh->plen);
282 continue;
283
284 /* Waiting for Bluetooth acl header ? */
285 case ST_BT_W4_ACL_HDR:
286 ah = (struct hci_acl_hdr *)st_gdata->rx_skb->
287 data;
288 dlen = __le16_to_cpu(ah->dlen);
289
290 pr_info("ACL header: dlen %d", dlen);
291
292 st_check_data_len(st_gdata, protoid, dlen);
293 continue;
294
295 /* Waiting for Bluetooth sco header ? */
296 case ST_BT_W4_SCO_HDR:
297 sh = (struct hci_sco_hdr *)st_gdata->rx_skb->
298 data;
299
300 pr_info("SCO header: dlen %d", sh->dlen);
301
302 st_check_data_len(st_gdata, protoid, sh->dlen);
303 continue;
304 case ST_FM_W4_EVENT_HDR:
305 fm = (struct fm_event_hdr *)st_gdata->rx_skb->
306 data;
307 pr_info("FM Header: ");
308 st_check_data_len(st_gdata, ST_FM, fm->plen);
309 continue;
310 /* TODO : Add GPS packet machine logic here */
311 case ST_GPS_W4_EVENT_HDR:
312 /* [0x09 pkt hdr][R/W byte][2 byte len] */
313 gps = (struct gps_event_hdr *)st_gdata->rx_skb->
314 data;
315 pr_info("GPS Header: ");
316 st_check_data_len(st_gdata, ST_GPS, gps->plen);
317 continue;
318 } /* end of switch rx_state */
319 }
320
321 /* end of if rx_count */
322 /* Check first byte of packet and identify module
323 * owner (BT/FM/GPS) */
324 switch (*ptr) {
325
326 /* Bluetooth event packet? */
327 case HCI_EVENT_PKT:
328 pr_info("Event packet");
329 st_gdata->rx_state = ST_BT_W4_EVENT_HDR;
330 st_gdata->rx_count = HCI_EVENT_HDR_SIZE;
331 type = HCI_EVENT_PKT;
332 protoid = ST_BT;
333 break;
334
335 /* Bluetooth acl packet? */
336 case HCI_ACLDATA_PKT:
337 pr_info("ACL packet");
338 st_gdata->rx_state = ST_BT_W4_ACL_HDR;
339 st_gdata->rx_count = HCI_ACL_HDR_SIZE;
340 type = HCI_ACLDATA_PKT;
341 protoid = ST_BT;
342 break;
343
344 /* Bluetooth sco packet? */
345 case HCI_SCODATA_PKT:
346 pr_info("SCO packet");
347 st_gdata->rx_state = ST_BT_W4_SCO_HDR;
348 st_gdata->rx_count = HCI_SCO_HDR_SIZE;
349 type = HCI_SCODATA_PKT;
350 protoid = ST_BT;
351 break;
352
353 /* Channel 8(FM) packet? */
354 case ST_FM_CH8_PKT:
355 pr_info("FM CH8 packet");
356 type = ST_FM_CH8_PKT;
357 st_gdata->rx_state = ST_FM_W4_EVENT_HDR;
358 st_gdata->rx_count = FM_EVENT_HDR_SIZE;
359 protoid = ST_FM;
360 break;
361
362 /* Channel 9(GPS) packet? */
363 case 0x9: /*ST_LL_GPS_CH9_PKT */
364 pr_info("GPS CH9 packet");
365 type = 0x9; /* ST_LL_GPS_CH9_PKT; */
366 protoid = ST_GPS;
367 st_gdata->rx_state = ST_GPS_W4_EVENT_HDR;
368 st_gdata->rx_count = 3; /* GPS_EVENT_HDR_SIZE -1*/
369 break;
370 case LL_SLEEP_IND:
371 case LL_SLEEP_ACK:
372 case LL_WAKE_UP_IND:
373 pr_info("PM packet");
374 /* this takes appropriate action based on
375 * sleep state received --
376 */
377 st_ll_sleep_state(st_gdata, *ptr);
378 ptr++;
379 count--;
380 continue;
381 case LL_WAKE_UP_ACK:
382 pr_info("PM packet");
383 /* wake up ack received */
384 st_wakeup_ack(st_gdata, *ptr);
385 ptr++;
386 count--;
387 continue;
388 /* Unknow packet? */
389 default:
390 pr_err("Unknown packet type %2.2x", (__u8) *ptr);
391 ptr++;
392 count--;
393 continue;
394 };
395 ptr++;
396 count--;
397
398 switch (protoid) {
399 case ST_BT:
400 /* Allocate new packet to hold received data */
401 st_gdata->rx_skb =
402 bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
403 if (!st_gdata->rx_skb) {
404 pr_err("Can't allocate mem for new packet");
405 st_gdata->rx_state = ST_W4_PACKET_TYPE;
406 st_gdata->rx_count = 0;
407 return;
408 }
409 bt_cb(st_gdata->rx_skb)->pkt_type = type;
410 break;
411 case ST_FM: /* for FM */
412 st_gdata->rx_skb =
413 alloc_skb(FM_MAX_FRAME_SIZE, GFP_ATOMIC);
414 if (!st_gdata->rx_skb) {
415 pr_err("Can't allocate mem for new packet");
416 st_gdata->rx_state = ST_W4_PACKET_TYPE;
417 st_gdata->rx_count = 0;
418 return;
419 }
420 /* place holder 0x08 */
421 skb_reserve(st_gdata->rx_skb, 1);
422 st_gdata->rx_skb->cb[0] = ST_FM_CH8_PKT;
423 break;
424 case ST_GPS:
425 /* for GPS */
426 st_gdata->rx_skb =
427 alloc_skb(100 /*GPS_MAX_FRAME_SIZE */ , GFP_ATOMIC);
428 if (!st_gdata->rx_skb) {
429 pr_err("Can't allocate mem for new packet");
430 st_gdata->rx_state = ST_W4_PACKET_TYPE;
431 st_gdata->rx_count = 0;
432 return;
433 }
434 /* place holder 0x09 */
435 skb_reserve(st_gdata->rx_skb, 1);
436 st_gdata->rx_skb->cb[0] = 0x09; /*ST_GPS_CH9_PKT; */
437 break;
438 case ST_MAX:
439 break;
440 }
441 }
442 pr_info("done %s", __func__);
443 return;
444}
445
446/* internal de-Q function
447 * -- return previous in-completely written skb
448 * or return the skb in the txQ
449 */
450struct sk_buff *st_int_dequeue(struct st_data_s *st_gdata)
451{
452 struct sk_buff *returning_skb;
453
454 pr_info("%s", __func__);
455 /* if the previous skb wasn't written completely
456 */
457 if (st_gdata->tx_skb != NULL) {
458 returning_skb = st_gdata->tx_skb;
459 st_gdata->tx_skb = NULL;
460 return returning_skb;
461 }
462
463 /* de-Q from the txQ always if previous write is complete */
464 return skb_dequeue(&st_gdata->txq);
465}
466
467/* internal Q-ing function
468 * will either Q the skb to txq or the tx_waitq
469 * depending on the ST LL state
470 *
471 * lock the whole func - since ll_getstate and Q-ing should happen
472 * in one-shot
473 */
474void st_int_enqueue(struct st_data_s *st_gdata, struct sk_buff *skb)
475{
476 unsigned long flags = 0;
477
478 pr_info("%s", __func__);
479 /* this function can be invoked in more then one context.
480 * so have a lock */
481 spin_lock_irqsave(&st_gdata->lock, flags);
482
483 switch (st_ll_getstate(st_gdata)) {
484 case ST_LL_AWAKE:
485 pr_info("ST LL is AWAKE, sending normally");
486 skb_queue_tail(&st_gdata->txq, skb);
487 break;
488 case ST_LL_ASLEEP_TO_AWAKE:
489 skb_queue_tail(&st_gdata->tx_waitq, skb);
490 break;
491 case ST_LL_AWAKE_TO_ASLEEP: /* host cannot be in this state */
492 pr_err("ST LL is illegal state(%ld),"
493 "purging received skb.", st_ll_getstate(st_gdata));
494 kfree_skb(skb);
495 break;
496
497 case ST_LL_ASLEEP:
498 /* call a function of ST LL to put data
499 * in tx_waitQ and wake_ind in txQ
500 */
501 skb_queue_tail(&st_gdata->tx_waitq, skb);
502 st_ll_wakeup(st_gdata);
503 break;
504 default:
505 pr_err("ST LL is illegal state(%ld),"
506 "purging received skb.", st_ll_getstate(st_gdata));
507 kfree_skb(skb);
508 break;
509 }
510 spin_unlock_irqrestore(&st_gdata->lock, flags);
511 pr_info("done %s", __func__);
512 return;
513}
514
515/*
516 * internal wakeup function
517 * called from either
518 * - TTY layer when write's finished
519 * - st_write (in context of the protocol stack)
520 */
521void st_tx_wakeup(struct st_data_s *st_data)
522{
523 struct sk_buff *skb;
524 unsigned long flags; /* for irq save flags */
525 pr_info("%s", __func__);
526 /* check for sending & set flag sending here */
527 if (test_and_set_bit(ST_TX_SENDING, &st_data->tx_state)) {
528 pr_info("ST already sending");
529 /* keep sending */
530 set_bit(ST_TX_WAKEUP, &st_data->tx_state);
531 return;
532 /* TX_WAKEUP will be checked in another
533 * context
534 */
535 }
536 do { /* come back if st_tx_wakeup is set */
537 /* woke-up to write */
538 clear_bit(ST_TX_WAKEUP, &st_data->tx_state);
539 while ((skb = st_int_dequeue(st_data))) {
540 int len;
541 spin_lock_irqsave(&st_data->lock, flags);
542 /* enable wake-up from TTY */
543 set_bit(TTY_DO_WRITE_WAKEUP, &st_data->tty->flags);
544 len = st_int_write(st_data, skb->data, skb->len);
545 skb_pull(skb, len);
546 /* if skb->len = len as expected, skb->len=0 */
547 if (skb->len) {
548 /* would be the next skb to be sent */
549 st_data->tx_skb = skb;
550 spin_unlock_irqrestore(&st_data->lock, flags);
551 break;
552 }
553 kfree_skb(skb);
554 spin_unlock_irqrestore(&st_data->lock, flags);
555 }
556 /* if wake-up is set in another context- restart sending */
557 } while (test_bit(ST_TX_WAKEUP, &st_data->tx_state));
558
559 /* clear flag sending */
560 clear_bit(ST_TX_SENDING, &st_data->tx_state);
561}
562
563/********************************************************************/
564/* functions called from ST KIM
565*/
566void kim_st_list_protocols(struct st_data_s *st_gdata, char *buf)
567{
568 unsigned long flags = 0;
569#ifdef DEBUG
570 unsigned char i = ST_MAX;
571#endif
572 spin_lock_irqsave(&st_gdata->lock, flags);
573#ifdef DEBUG /* more detailed log */
574 for (i = 0; i < ST_MAX; i++) {
575 if (i == 0) {
576 sprintf(buf, "%s is %s", protocol_strngs[i],
577 st_gdata->list[i] !=
578 NULL ? "Registered" : "Unregistered");
579 } else {
580 sprintf(buf, "%s\n%s is %s", buf, protocol_strngs[i],
581 st_gdata->list[i] !=
582 NULL ? "Registered" : "Unregistered");
583 }
584 }
585 sprintf(buf, "%s\n", buf);
586#else /* limited info */
587 sprintf(buf, "BT=%c\nFM=%c\nGPS=%c\n",
588 st_gdata->list[ST_BT] != NULL ? 'R' : 'U',
589 st_gdata->list[ST_FM] != NULL ? 'R' : 'U',
590 st_gdata->list[ST_GPS] != NULL ? 'R' : 'U');
591#endif
592 spin_unlock_irqrestore(&st_gdata->lock, flags);
593}
594
595/********************************************************************/
596/*
597 * functions called from protocol stack drivers
598 * to be EXPORT-ed
599 */
600long st_register(struct st_proto_s *new_proto)
601{
602 struct st_data_s *st_gdata;
603 long err = ST_SUCCESS;
604 unsigned long flags = 0;
605
606 st_kim_ref(&st_gdata);
607 pr_info("%s(%d) ", __func__, new_proto->type);
608 if (st_gdata == NULL || new_proto == NULL || new_proto->recv == NULL
609 || new_proto->reg_complete_cb == NULL) {
610 pr_err("gdata/new_proto/recv or reg_complete_cb not ready");
611 return ST_ERR_FAILURE;
612 }
613
614 if (new_proto->type < ST_BT || new_proto->type >= ST_MAX) {
615 pr_err("protocol %d not supported", new_proto->type);
616 return ST_ERR_NOPROTO;
617 }
618
619 if (st_gdata->list[new_proto->type] != NULL) {
620 pr_err("protocol %d already registered", new_proto->type);
621 return ST_ERR_ALREADY;
622 }
623
624 /* can be from process context only */
625 spin_lock_irqsave(&st_gdata->lock, flags);
626
627 if (test_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state)) {
628 pr_info(" ST_REG_IN_PROGRESS:%d ", new_proto->type);
629 /* fw download in progress */
630 st_kim_chip_toggle(new_proto->type, KIM_GPIO_ACTIVE);
631
632 st_gdata->list[new_proto->type] = new_proto;
633 new_proto->write = st_write;
634
635 set_bit(ST_REG_PENDING, &st_gdata->st_state);
636 spin_unlock_irqrestore(&st_gdata->lock, flags);
637 return ST_ERR_PENDING;
638 } else if (st_gdata->protos_registered == ST_EMPTY) {
639 pr_info(" protocol list empty :%d ", new_proto->type);
640 set_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state);
641 st_recv = st_kim_recv;
642
643 /* release lock previously held - re-locked below */
644 spin_unlock_irqrestore(&st_gdata->lock, flags);
645
646 /* enable the ST LL - to set default chip state */
647 st_ll_enable(st_gdata);
648 /* this may take a while to complete
649 * since it involves BT fw download
650 */
651 err = st_kim_start();
652 if (err != ST_SUCCESS) {
653 clear_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state);
654 if ((st_gdata->protos_registered != ST_EMPTY) &&
655 (test_bit(ST_REG_PENDING, &st_gdata->st_state))) {
656 pr_err(" KIM failure complete callback ");
657 st_reg_complete(st_gdata, ST_ERR_FAILURE);
658 }
659
660 return ST_ERR_FAILURE;
661 }
662
663 /* the protocol might require other gpios to be toggled
664 */
665 st_kim_chip_toggle(new_proto->type, KIM_GPIO_ACTIVE);
666
667 clear_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state);
668 st_recv = st_int_recv;
669
670 /* this is where all pending registration
671 * are signalled to be complete by calling callback functions
672 */
673 if ((st_gdata->protos_registered != ST_EMPTY) &&
674 (test_bit(ST_REG_PENDING, &st_gdata->st_state))) {
675 pr_info(" call reg complete callback ");
676 st_gdata->protos_registered++;
677 st_reg_complete(st_gdata, ST_SUCCESS);
678 }
679 clear_bit(ST_REG_PENDING, &st_gdata->st_state);
680
681 /* check for already registered once more,
682 * since the above check is old
683 */
684 if (st_gdata->list[new_proto->type] != NULL) {
685 pr_err(" proto %d already registered ",
686 new_proto->type);
687 return ST_ERR_ALREADY;
688 }
689
690 spin_lock_irqsave(&st_gdata->lock, flags);
691 st_gdata->list[new_proto->type] = new_proto;
692 new_proto->write = st_write;
693 spin_unlock_irqrestore(&st_gdata->lock, flags);
694 return err;
695 }
696 /* if fw is already downloaded & new stack registers protocol */
697 else {
698 switch (new_proto->type) {
699 case ST_BT:
700 /* do nothing */
701 break;
702 case ST_FM:
703 case ST_GPS:
704 st_kim_chip_toggle(new_proto->type, KIM_GPIO_ACTIVE);
705 break;
706 case ST_MAX:
707 default:
708 pr_err("%d protocol not supported",
709 new_proto->type);
710 err = ST_ERR_NOPROTO;
711 /* something wrong */
712 break;
713 }
714 st_gdata->list[new_proto->type] = new_proto;
715 new_proto->write = st_write;
716
717 /* lock already held before entering else */
718 spin_unlock_irqrestore(&st_gdata->lock, flags);
719 return err;
720 }
721 pr_info("done %s(%d) ", __func__, new_proto->type);
722}
723EXPORT_SYMBOL_GPL(st_register);
724
725/* to unregister a protocol -
726 * to be called from protocol stack driver
727 */
728long st_unregister(enum proto_type type)
729{
730 long err = ST_SUCCESS;
731 unsigned long flags = 0;
732 struct st_data_s *st_gdata;
733
734 pr_info("%s: %d ", __func__, type);
735
736 st_kim_ref(&st_gdata);
737 if (type < ST_BT || type >= ST_MAX) {
738 pr_err(" protocol %d not supported", type);
739 return ST_ERR_NOPROTO;
740 }
741
742 spin_lock_irqsave(&st_gdata->lock, flags);
743
744 if (st_gdata->list[type] == NULL) {
745 pr_err(" protocol %d not registered", type);
746 spin_unlock_irqrestore(&st_gdata->lock, flags);
747 return ST_ERR_NOPROTO;
748 }
749
750 st_gdata->protos_registered--;
751 st_gdata->list[type] = NULL;
752
753 /* kim ignores BT in the below function
754 * and handles the rest, BT is toggled
755 * only in kim_start and kim_stop
756 */
757 st_kim_chip_toggle(type, KIM_GPIO_INACTIVE);
758 spin_unlock_irqrestore(&st_gdata->lock, flags);
759
760 if ((st_gdata->protos_registered == ST_EMPTY) &&
761 (!test_bit(ST_REG_PENDING, &st_gdata->st_state))) {
762 pr_info(" all protocols unregistered ");
763
764 /* stop traffic on tty */
765 if (st_gdata->tty) {
766 tty_ldisc_flush(st_gdata->tty);
767 stop_tty(st_gdata->tty);
768 }
769
770 /* all protocols now unregistered */
771 st_kim_stop();
772 /* disable ST LL */
773 st_ll_disable(st_gdata);
774 }
775 return err;
776}
777
778/*
779 * called in protocol stack drivers
780 * via the write function pointer
781 */
782long st_write(struct sk_buff *skb)
783{
784 struct st_data_s *st_gdata;
785#ifdef DEBUG
786 enum proto_type protoid = ST_MAX;
787#endif
788 long len;
789
790 st_kim_ref(&st_gdata);
791 if (unlikely(skb == NULL || st_gdata == NULL
792 || st_gdata->tty == NULL)) {
793 pr_err("data/tty unavailable to perform write");
794 return ST_ERR_FAILURE;
795 }
796#ifdef DEBUG /* open-up skb to read the 1st byte */
797 switch (skb->data[0]) {
798 case HCI_COMMAND_PKT:
799 case HCI_ACLDATA_PKT:
800 case HCI_SCODATA_PKT:
801 protoid = ST_BT;
802 break;
803 case ST_FM_CH8_PKT:
804 protoid = ST_FM;
805 break;
806 case 0x09:
807 protoid = ST_GPS;
808 break;
809 }
810 if (unlikely(st_gdata->list[protoid] == NULL)) {
811 pr_err(" protocol %d not registered, and writing? ",
812 protoid);
813 return ST_ERR_FAILURE;
814 }
815#endif
816 pr_info("%d to be written", skb->len);
817 len = skb->len;
818
819 /* st_ll to decide where to enqueue the skb */
820 st_int_enqueue(st_gdata, skb);
821 /* wake up */
822 st_tx_wakeup(st_gdata);
823
824 /* return number of bytes written */
825 return len;
826}
827
828/* for protocols making use of shared transport */
829EXPORT_SYMBOL_GPL(st_unregister);
830
831/********************************************************************/
832/*
833 * functions called from TTY layer
834 */
835static int st_tty_open(struct tty_struct *tty)
836{
837 int err = ST_SUCCESS;
838 struct st_data_s *st_gdata;
839 pr_info("%s ", __func__);
840
841 st_kim_ref(&st_gdata);
842 st_gdata->tty = tty;
843 tty->disc_data = st_gdata;
844
845 /* don't do an wakeup for now */
846 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
847
848 /* mem already allocated
849 */
850 tty->receive_room = 65536;
851 /* Flush any pending characters in the driver and discipline. */
852 tty_ldisc_flush(tty);
853 tty_driver_flush_buffer(tty);
854 /*
855 * signal to UIM via KIM that -
856 * installation of N_TI_WL ldisc is complete
857 */
858 st_kim_complete();
859 pr_info("done %s", __func__);
860 return err;
861}
862
863static void st_tty_close(struct tty_struct *tty)
864{
865 unsigned char i = ST_MAX;
866 unsigned long flags = 0;
867 struct st_data_s *st_gdata = tty->disc_data;
868
869 pr_info("%s ", __func__);
870
871 /* TODO:
872 * if a protocol has been registered & line discipline
873 * un-installed for some reason - what should be done ?
874 */
875 spin_lock_irqsave(&st_gdata->lock, flags);
876 for (i = ST_BT; i < ST_MAX; i++) {
877 if (st_gdata->list[i] != NULL)
878 pr_err("%d not un-registered", i);
879 st_gdata->list[i] = NULL;
880 }
881 spin_unlock_irqrestore(&st_gdata->lock, flags);
882 /*
883 * signal to UIM via KIM that -
884 * N_TI_WL ldisc is un-installed
885 */
886 st_kim_complete();
887 st_gdata->tty = NULL;
888 /* Flush any pending characters in the driver and discipline. */
889 tty_ldisc_flush(tty);
890 tty_driver_flush_buffer(tty);
891
892 spin_lock_irqsave(&st_gdata->lock, flags);
893 /* empty out txq and tx_waitq */
894 skb_queue_purge(&st_gdata->txq);
895 skb_queue_purge(&st_gdata->tx_waitq);
896 /* reset the TTY Rx states of ST */
897 st_gdata->rx_count = 0;
898 st_gdata->rx_state = ST_W4_PACKET_TYPE;
899 kfree_skb(st_gdata->rx_skb);
900 st_gdata->rx_skb = NULL;
901 spin_unlock_irqrestore(&st_gdata->lock, flags);
902
903 pr_info("%s: done ", __func__);
904}
905
906static void st_tty_receive(struct tty_struct *tty, const unsigned char *data,
907 char *tty_flags, int count)
908{
909
910#ifdef VERBOSE
911 long i;
912 printk(KERN_ERR "incoming data...\n");
913 for (i = 0; i < count; i++)
914 printk(" %x", data[i]);
915 printk(KERN_ERR "\n.. data end\n");
916#endif
917
918 /*
919 * if fw download is in progress then route incoming data
920 * to KIM for validation
921 */
922 st_recv(tty->disc_data, data, count);
923 pr_info("done %s", __func__);
924}
925
926/* wake-up function called in from the TTY layer
927 * inside the internal wakeup function will be called
928 */
929static void st_tty_wakeup(struct tty_struct *tty)
930{
931 struct st_data_s *st_gdata = tty->disc_data;
932 pr_info("%s ", __func__);
933 /* don't do an wakeup for now */
934 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
935
936 /* call our internal wakeup */
937 st_tx_wakeup((void *)st_gdata);
938}
939
940static void st_tty_flush_buffer(struct tty_struct *tty)
941{
942 struct st_data_s *st_gdata = tty->disc_data;
943 pr_info("%s ", __func__);
944
945 kfree_skb(st_gdata->tx_skb);
946 st_gdata->tx_skb = NULL;
947
948 tty->ops->flush_buffer(tty);
949 return;
950}
951
952/********************************************************************/
953int st_core_init(struct st_data_s **core_data)
954{
955 struct st_data_s *st_gdata;
956 long err;
957 static struct tty_ldisc_ops *st_ldisc_ops;
958
959 /* populate and register to TTY line discipline */
960 st_ldisc_ops = kzalloc(sizeof(*st_ldisc_ops), GFP_KERNEL);
961 if (!st_ldisc_ops) {
962 pr_err("no mem to allocate");
963 return -ENOMEM;
964 }
965
966 st_ldisc_ops->magic = TTY_LDISC_MAGIC;
967 st_ldisc_ops->name = "n_st"; /*"n_hci"; */
968 st_ldisc_ops->open = st_tty_open;
969 st_ldisc_ops->close = st_tty_close;
970 st_ldisc_ops->receive_buf = st_tty_receive;
971 st_ldisc_ops->write_wakeup = st_tty_wakeup;
972 st_ldisc_ops->flush_buffer = st_tty_flush_buffer;
973 st_ldisc_ops->owner = THIS_MODULE;
974
975 err = tty_register_ldisc(N_TI_WL, st_ldisc_ops);
976 if (err) {
977 pr_err("error registering %d line discipline %ld",
978 N_TI_WL, err);
979 kfree(st_ldisc_ops);
980 return err;
981 }
982 pr_info("registered n_shared line discipline");
983
984 st_gdata = kzalloc(sizeof(struct st_data_s), GFP_KERNEL);
985 if (!st_gdata) {
986 pr_err("memory allocation failed");
987 err = tty_unregister_ldisc(N_TI_WL);
988 if (err)
989 pr_err("unable to un-register ldisc %ld", err);
990 kfree(st_ldisc_ops);
991 err = -ENOMEM;
992 return err;
993 }
994
995 /* Initialize ST TxQ and Tx waitQ queue head. All BT/FM/GPS module skb's
996 * will be pushed in this queue for actual transmission.
997 */
998 skb_queue_head_init(&st_gdata->txq);
999 skb_queue_head_init(&st_gdata->tx_waitq);
1000
1001 /* Locking used in st_int_enqueue() to avoid multiple execution */
1002 spin_lock_init(&st_gdata->lock);
1003
1004 /* ldisc_ops ref to be only used in __exit of module */
1005 st_gdata->ldisc_ops = st_ldisc_ops;
1006
1007#if 0
1008 err = st_kim_init();
1009 if (err) {
1010 pr_err("error during kim initialization(%ld)", err);
1011 kfree(st_gdata);
1012 err = tty_unregister_ldisc(N_TI_WL);
1013 if (err)
1014 pr_err("unable to un-register ldisc");
1015 kfree(st_ldisc_ops);
1016 return -1;
1017 }
1018#endif
1019
1020 err = st_ll_init(st_gdata);
1021 if (err) {
1022 pr_err("error during st_ll initialization(%ld)", err);
1023 kfree(st_gdata);
1024 err = tty_unregister_ldisc(N_TI_WL);
1025 if (err)
1026 pr_err("unable to un-register ldisc");
1027 kfree(st_ldisc_ops);
1028 return -1;
1029 }
1030 *core_data = st_gdata;
1031 return 0;
1032}
1033
1034void st_core_exit(struct st_data_s *st_gdata)
1035{
1036 long err;
1037 /* internal module cleanup */
1038 err = st_ll_deinit(st_gdata);
1039 if (err)
1040 pr_err("error during deinit of ST LL %ld", err);
1041#if 0
1042 err = st_kim_deinit();
1043 if (err)
1044 pr_err("error during deinit of ST KIM %ld", err);
1045#endif
1046 if (st_gdata != NULL) {
1047 /* Free ST Tx Qs and skbs */
1048 skb_queue_purge(&st_gdata->txq);
1049 skb_queue_purge(&st_gdata->tx_waitq);
1050 kfree_skb(st_gdata->rx_skb);
1051 kfree_skb(st_gdata->tx_skb);
1052 /* TTY ldisc cleanup */
1053 err = tty_unregister_ldisc(N_TI_WL);
1054 if (err)
1055 pr_err("unable to un-register ldisc %ld", err);
1056 kfree(st_gdata->ldisc_ops);
1057 /* free the global data pointer */
1058 kfree(st_gdata);
1059 }
1060}
1061
1062
diff --git a/drivers/staging/ti-st/st_core.h b/drivers/staging/ti-st/st_core.h
new file mode 100644
index 000000000000..f271c88a8087
--- /dev/null
+++ b/drivers/staging/ti-st/st_core.h
@@ -0,0 +1,98 @@
1/*
2 * Shared Transport Core header file
3 *
4 * Copyright (C) 2009 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#ifndef ST_CORE_H
22#define ST_CORE_H
23
24#include <linux/skbuff.h>
25#include "st.h"
26
27/* states of protocol list */
28#define ST_NOTEMPTY 1
29#define ST_EMPTY 0
30
31/*
32 * possible st_states
33 */
34#define ST_INITIALIZING 1
35#define ST_REG_IN_PROGRESS 2
36#define ST_REG_PENDING 3
37#define ST_WAITING_FOR_RESP 4
38
39/*
40 * local data required for ST/KIM/ST-HCI-LL
41 */
42struct st_data_s {
43 unsigned long st_state;
44/*
45 * an instance of tty_struct & ldisc ops to move around
46 */
47 struct tty_struct *tty;
48 struct tty_ldisc_ops *ldisc_ops;
49/*
50 * the tx skb -
51 * if the skb is already dequeued and the tty failed to write the same
52 * maintain the skb to write in the next transaction
53 */
54 struct sk_buff *tx_skb;
55#define ST_TX_SENDING 1
56#define ST_TX_WAKEUP 2
57 unsigned long tx_state;
58/*
59 * list of protocol registered
60 */
61 struct st_proto_s *list[ST_MAX];
62/*
63 * lock
64 */
65 unsigned long rx_state;
66 unsigned long rx_count;
67 struct sk_buff *rx_skb;
68 struct sk_buff_head txq, tx_waitq;
69 spinlock_t lock; /* ST LL state lock */
70 unsigned char protos_registered;
71 unsigned long ll_state; /* ST LL power state */
72};
73
74/* point this to tty->driver->write or tty->ops->write
75 * depending upon the kernel version
76 */
77int st_int_write(struct st_data_s*, const unsigned char*, int);
78/* internal write function, passed onto protocol drivers
79 * via the write function ptr of protocol struct
80 */
81long st_write(struct sk_buff *);
82/* function to be called from ST-LL
83 */
84void st_ll_send_frame(enum proto_type, struct sk_buff *);
85/* internal wake up function */
86void st_tx_wakeup(struct st_data_s *st_data);
87
88int st_core_init(struct st_data_s **);
89void st_core_exit(struct st_data_s *);
90void st_kim_ref(struct st_data_s **);
91
92#define GPS_STUB_TEST
93#ifdef GPS_STUB_TEST
94int gps_chrdrv_stub_write(const unsigned char*, int);
95void gps_chrdrv_stub_init(void);
96#endif
97
98#endif /*ST_CORE_H */
diff --git a/drivers/staging/ti-st/st_kim.c b/drivers/staging/ti-st/st_kim.c
new file mode 100644
index 000000000000..98cbabba3844
--- /dev/null
+++ b/drivers/staging/ti-st/st_kim.c
@@ -0,0 +1,754 @@
1/*
2 * Shared Transport Line discipline driver Core
3 * Init Manager module responsible for GPIO control
4 * and firmware download
5 * Copyright (C) 2009 Texas Instruments
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#define pr_fmt(fmt) "(stk) :" fmt
23#include <linux/platform_device.h>
24#include <linux/jiffies.h>
25#include <linux/firmware.h>
26#include <linux/delay.h>
27#include <linux/wait.h>
28#include <linux/gpio.h>
29
30#include <linux/sched.h>
31
32#include "st_kim.h"
33/* understand BT events for fw response */
34#include <net/bluetooth/bluetooth.h>
35#include <net/bluetooth/hci_core.h>
36#include <net/bluetooth/hci.h>
37
38
39static int kim_probe(struct platform_device *pdev);
40static int kim_remove(struct platform_device *pdev);
41
42/* KIM platform device driver structure */
43static struct platform_driver kim_platform_driver = {
44 .probe = kim_probe,
45 .remove = kim_remove,
46 /* TODO: ST driver power management during suspend/resume ?
47 */
48#if 0
49 .suspend = kim_suspend,
50 .resume = kim_resume,
51#endif
52 .driver = {
53 .name = "kim",
54 .owner = THIS_MODULE,
55 },
56};
57
58#ifndef LEGACY_RFKILL_SUPPORT
59static ssize_t show_pid(struct device *dev, struct device_attribute
60 *attr, char *buf);
61static ssize_t store_pid(struct device *dev, struct device_attribute
62 *devattr, char *buf, size_t count);
63static ssize_t show_list(struct device *dev, struct device_attribute
64 *attr, char *buf);
65
66/* structures specific for sysfs entries */
67static struct kobj_attribute pid_attr =
68__ATTR(pid, 0644, (void *)show_pid, (void *)store_pid);
69
70static struct kobj_attribute list_protocols =
71__ATTR(protocols, 0444, (void *)show_list, NULL);
72
73static struct attribute *uim_attrs[] = {
74 &pid_attr.attr,
75 /* add more debug sysfs entries */
76 &list_protocols.attr,
77 NULL,
78};
79
80static struct attribute_group uim_attr_grp = {
81 .attrs = uim_attrs,
82};
83#else
84static int kim_toggle_radio(void*, bool);
85static const struct rfkill_ops kim_rfkill_ops = {
86 .set_block = kim_toggle_radio,
87};
88#endif /* LEGACY_RFKILL_SUPPORT */
89
90/* strings to be used for rfkill entries and by
91 * ST Core to be used for sysfs debug entry
92 */
93#define PROTO_ENTRY(type, name) name
94const unsigned char *protocol_names[] = {
95 PROTO_ENTRY(ST_BT, "Bluetooth"),
96 PROTO_ENTRY(ST_FM, "FM"),
97 PROTO_ENTRY(ST_GPS, "GPS"),
98};
99
100struct kim_data_s *kim_gdata;
101
102/**********************************************************************/
103/* internal functions */
104
105/*
106 * function to return whether the firmware response was proper
107 * in case of error don't complete so that waiting for proper
108 * response times out
109 */
110void validate_firmware_response(struct sk_buff *skb)
111{
112 if (unlikely(skb->data[5] != 0)) {
113 pr_err("no proper response during fw download");
114 pr_err("data6 %x", skb->data[5]);
115 return; /* keep waiting for the proper response */
116 }
117 /* becos of all the script being downloaded */
118 complete_all(&kim_gdata->kim_rcvd);
119 kfree_skb(skb);
120}
121
122/* check for data len received inside kim_int_recv
123 * most often hit the last case to update state to waiting for data
124 */
125static inline int kim_check_data_len(int len)
126{
127 register int room = skb_tailroom(kim_gdata->rx_skb);
128
129 pr_info("len %d room %d", len, room);
130
131 if (!len) {
132 validate_firmware_response(kim_gdata->rx_skb);
133 } else if (len > room) {
134 /* Received packet's payload length is larger.
135 * We can't accommodate it in created skb.
136 */
137 pr_err("Data length is too large len %d room %d", len,
138 room);
139 kfree_skb(kim_gdata->rx_skb);
140 } else {
141 /* Packet header has non-zero payload length and
142 * we have enough space in created skb. Lets read
143 * payload data */
144 kim_gdata->rx_state = ST_BT_W4_DATA;
145 kim_gdata->rx_count = len;
146 return len;
147 }
148
149 /* Change ST LL state to continue to process next
150 * packet */
151 kim_gdata->rx_state = ST_W4_PACKET_TYPE;
152 kim_gdata->rx_skb = NULL;
153 kim_gdata->rx_count = 0;
154
155 return 0;
156}
157
158/* receive function called during firmware download
159 * - firmware download responses on different UART drivers
160 * have been observed to come in bursts of different
161 * tty_receive and hence the logic
162 */
163void kim_int_recv(const unsigned char *data, long count)
164{
165 register char *ptr;
166 struct hci_event_hdr *eh;
167 register int len = 0, type = 0;
168
169 pr_info("%s", __func__);
170 /* Decode received bytes here */
171 ptr = (char *)data;
172 if (unlikely(ptr == NULL)) {
173 pr_err(" received null from TTY ");
174 return;
175 }
176 while (count) {
177 if (kim_gdata->rx_count) {
178 len = min_t(unsigned int, kim_gdata->rx_count, count);
179 memcpy(skb_put(kim_gdata->rx_skb, len), ptr, len);
180 kim_gdata->rx_count -= len;
181 count -= len;
182 ptr += len;
183
184 if (kim_gdata->rx_count)
185 continue;
186
187 /* Check ST RX state machine , where are we? */
188 switch (kim_gdata->rx_state) {
189 /* Waiting for complete packet ? */
190 case ST_BT_W4_DATA:
191 pr_info("Complete pkt received");
192 validate_firmware_response(kim_gdata->rx_skb);
193 kim_gdata->rx_state = ST_W4_PACKET_TYPE;
194 kim_gdata->rx_skb = NULL;
195 continue;
196 /* Waiting for Bluetooth event header ? */
197 case ST_BT_W4_EVENT_HDR:
198 eh = (struct hci_event_hdr *)kim_gdata->
199 rx_skb->data;
200 pr_info("Event header: evt 0x%2.2x"
201 "plen %d", eh->evt, eh->plen);
202 kim_check_data_len(eh->plen);
203 continue;
204 } /* end of switch */
205 } /* end of if rx_state */
206 switch (*ptr) {
207 /* Bluetooth event packet? */
208 case HCI_EVENT_PKT:
209 pr_info("Event packet");
210 kim_gdata->rx_state = ST_BT_W4_EVENT_HDR;
211 kim_gdata->rx_count = HCI_EVENT_HDR_SIZE;
212 type = HCI_EVENT_PKT;
213 break;
214 default:
215 pr_info("unknown packet");
216 ptr++;
217 count--;
218 continue;
219 } /* end of switch *ptr */
220 ptr++;
221 count--;
222 kim_gdata->rx_skb =
223 bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
224 if (!kim_gdata->rx_skb) {
225 pr_err("can't allocate mem for new packet");
226 kim_gdata->rx_state = ST_W4_PACKET_TYPE;
227 kim_gdata->rx_count = 0;
228 return;
229 } /* not necessary in this case */
230 bt_cb(kim_gdata->rx_skb)->pkt_type = type;
231 } /* end of while count */
232 pr_info("done %s", __func__);
233 return;
234}
235
236static long read_local_version(char *bts_scr_name)
237{
238 unsigned short version = 0, chip = 0, min_ver = 0, maj_ver = 0;
239 char read_ver_cmd[] = { 0x01, 0x01, 0x10, 0x00 };
240
241 pr_info("%s", __func__);
242
243 INIT_COMPLETION(kim_gdata->kim_rcvd);
244 if (4 != st_int_write(kim_gdata->core_data, read_ver_cmd, 4)) {
245 pr_err("kim: couldn't write 4 bytes");
246 return ST_ERR_FAILURE;
247 }
248
249 if (!wait_for_completion_timeout
250 (&kim_gdata->kim_rcvd, msecs_to_jiffies(CMD_RESP_TIME))) {
251 pr_err(" waiting for ver info- timed out ");
252 return ST_ERR_FAILURE;
253 }
254
255 version =
256 MAKEWORD(kim_gdata->resp_buffer[13], kim_gdata->resp_buffer[14]);
257 chip = (version & 0x7C00) >> 10;
258 min_ver = (version & 0x007F);
259 maj_ver = (version & 0x0380) >> 7;
260
261 if (version & 0x8000)
262 maj_ver |= 0x0008;
263
264 sprintf(bts_scr_name, "TIInit_%d.%d.%d.bts", chip, maj_ver, min_ver);
265 pr_info("%s", bts_scr_name);
266 return ST_SUCCESS;
267}
268
269/* internal function which parses through the .bts firmware script file
270 * intreprets SEND, DELAY actions only as of now
271 */
272static long download_firmware(void)
273{
274 long err = ST_SUCCESS;
275 long len = 0;
276 register unsigned char *ptr = NULL;
277 register unsigned char *action_ptr = NULL;
278 unsigned char bts_scr_name[30] = { 0 }; /* 30 char long bts scr name? */
279
280 pr_info("%s", __func__);
281
282 err = read_local_version(bts_scr_name);
283 if (err != ST_SUCCESS) {
284 pr_err("kim: failed to read local ver");
285 return err;
286 }
287 err =
288 request_firmware(&kim_gdata->fw_entry, bts_scr_name,
289 &kim_gdata->kim_pdev->dev);
290 if (unlikely((err != 0) || (kim_gdata->fw_entry->data == NULL) ||
291 (kim_gdata->fw_entry->size == 0))) {
292 pr_err(" request_firmware failed(errno %ld) for %s", err,
293 bts_scr_name);
294 return ST_ERR_FAILURE;
295 }
296 ptr = (void *)kim_gdata->fw_entry->data;
297 len = kim_gdata->fw_entry->size;
298 /* bts_header to remove out magic number and
299 * version
300 */
301 ptr += sizeof(struct bts_header);
302 len -= sizeof(struct bts_header);
303
304 while (len > 0 && ptr) {
305 pr_info(" action size %d, type %d ",
306 ((struct bts_action *)ptr)->size,
307 ((struct bts_action *)ptr)->type);
308
309 switch (((struct bts_action *)ptr)->type) {
310 case ACTION_SEND_COMMAND: /* action send */
311 action_ptr = &(((struct bts_action *)ptr)->data[0]);
312 if (unlikely
313 (((struct hci_command *)action_ptr)->opcode ==
314 0xFF36)) {
315 /* ignore remote change
316 * baud rate HCI VS command */
317 pr_err
318 (" change remote baud\
319 rate command in firmware");
320 break;
321 }
322
323 INIT_COMPLETION(kim_gdata->kim_rcvd);
324 err = st_int_write(kim_gdata->core_data,
325 ((struct bts_action_send *)action_ptr)->data,
326 ((struct bts_action *)ptr)->size);
327 if (unlikely(err < 0)) {
328 release_firmware(kim_gdata->fw_entry);
329 return ST_ERR_FAILURE;
330 }
331 if (!wait_for_completion_timeout
332 (&kim_gdata->kim_rcvd,
333 msecs_to_jiffies(CMD_RESP_TIME))) {
334 pr_err
335 (" response timeout during fw download ");
336 /* timed out */
337 release_firmware(kim_gdata->fw_entry);
338 return ST_ERR_FAILURE;
339 }
340 break;
341 case ACTION_DELAY: /* sleep */
342 pr_info("sleep command in scr");
343 action_ptr = &(((struct bts_action *)ptr)->data[0]);
344 mdelay(((struct bts_action_delay *)action_ptr)->msec);
345 break;
346 }
347 len =
348 len - (sizeof(struct bts_action) +
349 ((struct bts_action *)ptr)->size);
350 ptr =
351 ptr + sizeof(struct bts_action) +
352 ((struct bts_action *)ptr)->size;
353 }
354 /* fw download complete */
355 release_firmware(kim_gdata->fw_entry);
356 return ST_SUCCESS;
357}
358
359/**********************************************************************/
360/* functions called from ST core */
361
362/* function to toggle the GPIO
363 * needs to know whether the GPIO is active high or active low
364 */
365void st_kim_chip_toggle(enum proto_type type, enum kim_gpio_state state)
366{
367 pr_info(" %s ", __func__);
368
369 if (kim_gdata->gpios[type] == -1) {
370 pr_info(" gpio not requested for protocol %s",
371 protocol_names[type]);
372 return;
373 }
374 switch (type) {
375 case ST_BT:
376 /*Do Nothing */
377 break;
378
379 case ST_FM:
380 if (state == KIM_GPIO_ACTIVE)
381 gpio_set_value(kim_gdata->gpios[ST_FM], GPIO_LOW);
382 else
383 gpio_set_value(kim_gdata->gpios[ST_FM], GPIO_HIGH);
384 break;
385
386 case ST_GPS:
387 if (state == KIM_GPIO_ACTIVE)
388 gpio_set_value(kim_gdata->gpios[ST_GPS], GPIO_HIGH);
389 else
390 gpio_set_value(kim_gdata->gpios[ST_GPS], GPIO_LOW);
391 break;
392
393 case ST_MAX:
394 default:
395 break;
396 }
397
398 return;
399}
400
401/* called from ST Core, when REG_IN_PROGRESS (registration in progress)
402 * can be because of
403 * 1. response to read local version
404 * 2. during send/recv's of firmware download
405 */
406void st_kim_recv(void *disc_data, const unsigned char *data, long count)
407{
408 pr_info(" %s ", __func__);
409 /* copy to local buffer */
410 if (unlikely(data[4] == 0x01 && data[5] == 0x10 && data[0] == 0x04)) {
411 /* must be the read_ver_cmd */
412 memcpy(kim_gdata->resp_buffer, data, count);
413 complete_all(&kim_gdata->kim_rcvd);
414 return;
415 } else {
416 kim_int_recv(data, count);
417 /* either completes or times out */
418 }
419 return;
420}
421
422/* to signal completion of line discipline installation
423 * called from ST Core, upon tty_open
424 */
425void st_kim_complete(void)
426{
427 complete(&kim_gdata->ldisc_installed);
428}
429
430/* called from ST Core upon 1st registration
431*/
432long st_kim_start(void)
433{
434 long err = ST_SUCCESS;
435 long retry = POR_RETRY_COUNT;
436 pr_info(" %s", __func__);
437
438 do {
439#ifdef LEGACY_RFKILL_SUPPORT
440 /* TODO: this is only because rfkill sub-system
441 * doesn't send events to user-space if the state
442 * isn't changed
443 */
444 rfkill_set_hw_state(kim_gdata->rfkill[ST_BT], 1);
445#endif
446 /* Configure BT nShutdown to HIGH state */
447 gpio_set_value(kim_gdata->gpios[ST_BT], GPIO_LOW);
448 mdelay(5); /* FIXME: a proper toggle */
449 gpio_set_value(kim_gdata->gpios[ST_BT], GPIO_HIGH);
450 mdelay(100);
451 /* re-initialize the completion */
452 INIT_COMPLETION(kim_gdata->ldisc_installed);
453#ifndef LEGACY_RFKILL_SUPPORT
454 /* send signal to UIM */
455 err = kill_pid(find_get_pid(kim_gdata->uim_pid), SIGUSR2, 0);
456 if (err != 0) {
457 pr_info(" sending SIGUSR2 to uim failed %ld", err);
458 err = ST_ERR_FAILURE;
459 continue;
460 }
461#else
462 /* unblock and send event to UIM via /dev/rfkill */
463 rfkill_set_hw_state(kim_gdata->rfkill[ST_BT], 0);
464#endif
465 /* wait for ldisc to be installed */
466 err = wait_for_completion_timeout(&kim_gdata->ldisc_installed,
467 msecs_to_jiffies(LDISC_TIME));
468 if (!err) { /* timeout */
469 pr_err("line disc installation timed out ");
470 err = ST_ERR_FAILURE;
471 continue;
472 } else {
473 /* ldisc installed now */
474 pr_info(" line discipline installed ");
475 err = download_firmware();
476 if (err != ST_SUCCESS) {
477 pr_err("download firmware failed");
478 continue;
479 } else { /* on success don't retry */
480 break;
481 }
482 }
483 } while (retry--);
484 return err;
485}
486
487/* called from ST Core, on the last un-registration
488*/
489long st_kim_stop(void)
490{
491 long err = ST_SUCCESS;
492
493 INIT_COMPLETION(kim_gdata->ldisc_installed);
494#ifndef LEGACY_RFKILL_SUPPORT
495 /* send signal to UIM */
496 err = kill_pid(find_get_pid(kim_gdata->uim_pid), SIGUSR2, 1);
497 if (err != 0) {
498 pr_err("sending SIGUSR2 to uim failed %ld", err);
499 return ST_ERR_FAILURE;
500 }
501#else
502 /* set BT rfkill to be blocked */
503 err = rfkill_set_hw_state(kim_gdata->rfkill[ST_BT], 1);
504#endif
505
506 /* wait for ldisc to be un-installed */
507 err = wait_for_completion_timeout(&kim_gdata->ldisc_installed,
508 msecs_to_jiffies(LDISC_TIME));
509 if (!err) { /* timeout */
510 pr_err(" timed out waiting for ldisc to be un-installed");
511 return ST_ERR_FAILURE;
512 }
513
514 /* By default configure BT nShutdown to LOW state */
515 gpio_set_value(kim_gdata->gpios[ST_BT], GPIO_LOW);
516 mdelay(1);
517 gpio_set_value(kim_gdata->gpios[ST_BT], GPIO_HIGH);
518 mdelay(1);
519 gpio_set_value(kim_gdata->gpios[ST_BT], GPIO_LOW);
520 return err;
521}
522
523/**********************************************************************/
524/* functions called from subsystems */
525
526#ifndef LEGACY_RFKILL_SUPPORT
527/* called when sysfs entry is written to */
528static ssize_t store_pid(struct device *dev, struct device_attribute
529 *devattr, char *buf, size_t count)
530{
531 pr_info("%s: pid %s ", __func__, buf);
532 sscanf(buf, "%ld", &kim_gdata->uim_pid);
533 /* to be made use by kim_start to signal SIGUSR2
534 */
535 return strlen(buf);
536}
537
538/* called when sysfs entry is read from */
539static ssize_t show_pid(struct device *dev, struct device_attribute
540 *attr, char *buf)
541{
542 sprintf(buf, "%ld", kim_gdata->uim_pid);
543 return strlen(buf);
544}
545
546/* called when sysfs entry is read from */
547static ssize_t show_list(struct device *dev, struct device_attribute
548 *attr, char *buf)
549{
550 kim_st_list_protocols(kim_gdata->core_data, buf);
551 return strlen(buf);
552}
553
554#else /* LEGACY_RFKILL_SUPPORT */
555
556/* function called from rfkill subsystem, when someone from
557 * user space would write 0/1 on the sysfs entry
558 * /sys/class/rfkill/rfkill0,1,3/state
559 */
560static int kim_toggle_radio(void *data, bool blocked)
561{
562 enum proto_type type = *((enum proto_type *)data);
563 pr_info(" %s: %d ", __func__, type);
564
565 switch (type) {
566 case ST_BT:
567 /* do nothing */
568 break;
569 case ST_FM:
570 case ST_GPS:
571 if (blocked)
572 st_kim_chip_toggle(type, KIM_GPIO_INACTIVE);
573 else
574 st_kim_chip_toggle(type, KIM_GPIO_ACTIVE);
575 break;
576 case ST_MAX:
577 pr_err(" wrong proto type ");
578 break;
579 }
580 return ST_SUCCESS;
581}
582
583#endif /* LEGACY_RFKILL_SUPPORT */
584
585void st_kim_ref(struct st_data_s **core_data)
586{
587 *core_data = kim_gdata->core_data;
588}
589
590/**********************************************************************/
591/* functions called from platform device driver subsystem
592 * need to have a relevant platform device entry in the platform's
593 * board-*.c file
594 */
595
596static int kim_probe(struct platform_device *pdev)
597{
598 long status;
599 long proto;
600 long *gpios = pdev->dev.platform_data;
601
602 status = st_core_init(&kim_gdata->core_data);
603 if (status != 0) {
604 pr_err(" ST core init failed");
605 return ST_ERR_FAILURE;
606 }
607
608 for (proto = 0; proto < ST_MAX; proto++) {
609 kim_gdata->gpios[proto] = gpios[proto];
610 pr_info(" %ld gpio to be requested", gpios[proto]);
611 }
612
613 for (proto = 0; (proto < ST_MAX) && (gpios[proto] != -1); proto++) {
614 /* Claim the Bluetooth/FM/GPIO
615 * nShutdown gpio from the system
616 */
617 status = gpio_request(gpios[proto], "kim");
618 if (unlikely(status)) {
619 pr_err(" gpio %ld request failed ", gpios[proto]);
620 proto -= 1;
621 while (proto >= 0) {
622 if (gpios[proto] != -1)
623 gpio_free(gpios[proto]);
624 }
625 return status;
626 }
627
628 /* Configure nShutdown GPIO as output=0 */
629 status =
630 gpio_direction_output(gpios[proto], 0);
631 if (unlikely(status)) {
632 pr_err(" unable to configure gpio %ld",
633 gpios[proto]);
634 proto -= 1;
635 while (proto >= 0) {
636 if (gpios[proto] != -1)
637 gpio_free(gpios[proto]);
638 }
639 return status;
640 }
641 }
642#ifndef LEGACY_RFKILL_SUPPORT
643 /* pdev to contain BT, FM and GPS enable/N-Shutdown GPIOs
644 * execute request_gpio, set output direction
645 */
646 kim_gdata->kim_kobj = kobject_create_and_add("uim", NULL);
647 /* create the sysfs entry for UIM to put in pid */
648 if (sysfs_create_group(kim_gdata->kim_kobj, &uim_attr_grp)) {
649 pr_err(" sysfs entry creation failed");
650 kobject_put(kim_gdata->kim_kobj);
651 /* free requested GPIOs and fail probe */
652 for (proto = ST_BT; proto < ST_MAX; proto++) {
653 if (gpios[proto] != -1)
654 gpio_free(gpios[proto]);
655 }
656 return -1; /* fail insmod */
657 }
658 pr_info(" sysfs entry created ");
659#endif
660 /* get reference of pdev for request_firmware
661 */
662 kim_gdata->kim_pdev = pdev;
663 init_completion(&kim_gdata->kim_rcvd);
664 init_completion(&kim_gdata->ldisc_installed);
665#ifdef LEGACY_RFKILL_SUPPORT
666 for (proto = 0; (proto < ST_MAX) && (gpios[proto] != -1); proto++) {
667 /* TODO: should all types be rfkill_type_bt ? */
668 kim_gdata->rf_protos[proto] = proto;
669 kim_gdata->rfkill[proto] = rfkill_alloc(protocol_names[proto],
670 &pdev->dev, RFKILL_TYPE_BLUETOOTH,
671 &kim_rfkill_ops, &kim_gdata->rf_protos[proto]);
672 if (kim_gdata->rfkill[proto] == NULL) {
673 pr_err("cannot create rfkill entry for gpio %ld",
674 gpios[proto]);
675 continue;
676 }
677 /* block upon creation */
678 rfkill_init_sw_state(kim_gdata->rfkill[proto], 1);
679 status = rfkill_register(kim_gdata->rfkill[proto]);
680 if (unlikely(status)) {
681 pr_err("rfkill registration failed for gpio %ld",
682 gpios[proto]);
683 rfkill_unregister(kim_gdata->rfkill[proto]);
684 continue;
685 }
686 pr_info("rfkill entry created for %ld", gpios[proto]);
687 }
688#endif
689 return ST_SUCCESS;
690}
691
692static int kim_remove(struct platform_device *pdev)
693{
694 /* free the GPIOs requested
695 */
696 long *gpios = pdev->dev.platform_data;
697 long proto;
698
699 for (proto = 0; (proto < ST_MAX) && (gpios[proto] != -1); proto++) {
700 /* Claim the Bluetooth/FM/GPIO
701 * nShutdown gpio from the system
702 */
703 gpio_free(gpios[proto]);
704#ifdef LEGACY_RFKILL_SUPPORT
705 rfkill_unregister(kim_gdata->rfkill[proto]);
706 rfkill_destroy(kim_gdata->rfkill[proto]);
707 kim_gdata->rfkill[proto] = NULL;
708#endif
709 }
710 pr_info("kim: GPIO Freed");
711#ifndef LEGACY_RFKILL_SUPPORT
712 /* delete the sysfs entries */
713 sysfs_remove_group(kim_gdata->kim_kobj, &uim_attr_grp);
714 kobject_put(kim_gdata->kim_kobj);
715#endif
716 kim_gdata->kim_pdev = NULL;
717 st_core_exit(kim_gdata->core_data);
718 return ST_SUCCESS;
719}
720
721/**********************************************************************/
722/* entry point for ST KIM module, called in from ST Core */
723
724static int __init st_kim_init(void)
725{
726 long ret = ST_SUCCESS;
727 kim_gdata = kzalloc(sizeof(struct kim_data_s), GFP_ATOMIC);
728 if (!kim_gdata) {
729 pr_err("no mem to allocate");
730 return -ENOMEM;
731 }
732
733 ret = platform_driver_register(&kim_platform_driver);
734 if (ret != 0) {
735 pr_err("platform drv registration failed");
736 return ST_ERR_FAILURE;
737 }
738 return ST_SUCCESS;
739}
740
741static void __exit st_kim_deinit(void)
742{
743 /* the following returns void */
744 platform_driver_unregister(&kim_platform_driver);
745 kfree(kim_gdata);
746 kim_gdata = NULL;
747}
748
749
750module_init(st_kim_init);
751module_exit(st_kim_deinit);
752MODULE_AUTHOR("Pavan Savoy <pavan_savoy@ti.com>");
753MODULE_DESCRIPTION("Shared Transport Driver for TI BT/FM/GPS combo chips ");
754MODULE_LICENSE("GPL");
diff --git a/drivers/staging/ti-st/st_kim.h b/drivers/staging/ti-st/st_kim.h
new file mode 100644
index 000000000000..ff3270ec7847
--- /dev/null
+++ b/drivers/staging/ti-st/st_kim.h
@@ -0,0 +1,150 @@
1/*
2 * Shared Transport Line discipline driver Core
3 * Init Manager Module header file
4 * Copyright (C) 2009 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#ifndef ST_KIM_H
22#define ST_KIM_H
23
24#include <linux/types.h>
25#include "st.h"
26#include "st_core.h"
27#include "st_ll.h"
28#include <linux/rfkill.h>
29
30/* time in msec to wait for
31 * line discipline to be installed
32 */
33#define LDISC_TIME 500
34#define CMD_RESP_TIME 500
35#define MAKEWORD(a, b) ((unsigned short)(((unsigned char)(a)) \
36 | ((unsigned short)((unsigned char)(b))) << 8))
37
38#define GPIO_HIGH 1
39#define GPIO_LOW 0
40
41/* the Power-On-Reset logic, requires to attempt
42 * to download firmware onto chip more than once
43 * since the self-test for chip takes a while
44 */
45#define POR_RETRY_COUNT 5
46/*
47 * legacy rfkill support where-in 3 rfkill
48 * devices are created for the 3 gpios
49 * that ST has requested
50 */
51#define LEGACY_RFKILL_SUPPORT
52/*
53 * header file for ST provided by KIM
54 */
55struct kim_data_s {
56 long uim_pid;
57 struct platform_device *kim_pdev;
58 struct completion kim_rcvd, ldisc_installed;
59 /* MAX len of the .bts firmware script name */
60 char resp_buffer[30];
61 const struct firmware *fw_entry;
62 long gpios[ST_MAX];
63 struct kobject *kim_kobj;
64/* used by kim_int_recv to validate fw response */
65 unsigned long rx_state;
66 unsigned long rx_count;
67 struct sk_buff *rx_skb;
68#ifdef LEGACY_RFKILL_SUPPORT
69 struct rfkill *rfkill[ST_MAX];
70 enum proto_type rf_protos[ST_MAX];
71#endif
72 struct st_data_s *core_data;
73};
74
75long st_kim_start(void);
76long st_kim_stop(void);
77/*
78 * called from st_tty_receive to authenticate fw_download
79 */
80void st_kim_recv(void *, const unsigned char *, long count);
81
82void st_kim_chip_toggle(enum proto_type, enum kim_gpio_state);
83
84void st_kim_complete(void);
85
86/* function called from ST KIM to ST Core, to
87 * list out the protocols registered
88 */
89void kim_st_list_protocols(struct st_data_s *, char *);
90
91/*
92 * BTS headers
93 */
94#define ACTION_SEND_COMMAND 1
95#define ACTION_WAIT_EVENT 2
96#define ACTION_SERIAL 3
97#define ACTION_DELAY 4
98#define ACTION_RUN_SCRIPT 5
99#define ACTION_REMARKS 6
100
101/*
102 * * BRF Firmware header
103 * */
104struct bts_header {
105 uint32_t magic;
106 uint32_t version;
107 uint8_t future[24];
108 uint8_t actions[0];
109} __attribute__ ((packed));
110
111/*
112 * * BRF Actions structure
113 * */
114struct bts_action {
115 uint16_t type;
116 uint16_t size;
117 uint8_t data[0];
118} __attribute__ ((packed));
119
120struct bts_action_send {
121 uint8_t data[0];
122} __attribute__ ((packed));
123
124struct bts_action_wait {
125 uint32_t msec;
126 uint32_t size;
127 uint8_t data[0];
128} __attribute__ ((packed));
129
130struct bts_action_delay {
131 uint32_t msec;
132} __attribute__ ((packed));
133
134struct bts_action_serial {
135 uint32_t baud;
136 uint32_t flow_control;
137} __attribute__ ((packed));
138
139/* for identifying the change speed HCI VS
140 * command
141 */
142struct hci_command {
143 uint8_t prefix;
144 uint16_t opcode;
145 uint8_t plen;
146 uint32_t speed;
147} __attribute__ ((packed));
148
149
150#endif /* ST_KIM_H */
diff --git a/drivers/staging/ti-st/st_ll.c b/drivers/staging/ti-st/st_ll.c
new file mode 100644
index 000000000000..0685a100db6a
--- /dev/null
+++ b/drivers/staging/ti-st/st_ll.c
@@ -0,0 +1,147 @@
1/*
2 * Shared Transport driver
3 * HCI-LL module responsible for TI proprietary HCI_LL protocol
4 * Copyright (C) 2009 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#define pr_fmt(fmt) "(stll) :" fmt
22#include "st_ll.h"
23
24/**********************************************************************/
25/* internal functions */
26static void send_ll_cmd(struct st_data_s *st_data,
27 unsigned char cmd)
28{
29
30 pr_info("%s: writing %x", __func__, cmd);
31 st_int_write(st_data, &cmd, 1);
32 return;
33}
34
35static void ll_device_want_to_sleep(struct st_data_s *st_data)
36{
37 pr_info("%s", __func__);
38 /* sanity check */
39 if (st_data->ll_state != ST_LL_AWAKE)
40 pr_err("ERR hcill: ST_LL_GO_TO_SLEEP_IND"
41 "in state %ld", st_data->ll_state);
42
43 send_ll_cmd(st_data, LL_SLEEP_ACK);
44 /* update state */
45 st_data->ll_state = ST_LL_ASLEEP;
46}
47
48static void ll_device_want_to_wakeup(struct st_data_s *st_data)
49{
50 /* diff actions in diff states */
51 switch (st_data->ll_state) {
52 case ST_LL_ASLEEP:
53 send_ll_cmd(st_data, LL_WAKE_UP_ACK); /* send wake_ack */
54 break;
55 case ST_LL_ASLEEP_TO_AWAKE:
56 /* duplicate wake_ind */
57 pr_err("duplicate wake_ind while waiting for Wake ack");
58 break;
59 case ST_LL_AWAKE:
60 /* duplicate wake_ind */
61 pr_err("duplicate wake_ind already AWAKE");
62 break;
63 case ST_LL_AWAKE_TO_ASLEEP:
64 /* duplicate wake_ind */
65 pr_err("duplicate wake_ind");
66 break;
67 }
68 /* update state */
69 st_data->ll_state = ST_LL_AWAKE;
70}
71
72/**********************************************************************/
73/* functions invoked by ST Core */
74
75/* called when ST Core wants to
76 * enable ST LL */
77void st_ll_enable(struct st_data_s *ll)
78{
79 ll->ll_state = ST_LL_AWAKE;
80}
81
82/* called when ST Core /local module wants to
83 * disable ST LL */
84void st_ll_disable(struct st_data_s *ll)
85{
86 ll->ll_state = ST_LL_INVALID;
87}
88
89/* called when ST Core wants to update the state */
90void st_ll_wakeup(struct st_data_s *ll)
91{
92 if (likely(ll->ll_state != ST_LL_AWAKE)) {
93 send_ll_cmd(ll, LL_WAKE_UP_IND); /* WAKE_IND */
94 ll->ll_state = ST_LL_ASLEEP_TO_AWAKE;
95 } else {
96 /* don't send the duplicate wake_indication */
97 pr_err(" Chip already AWAKE ");
98 }
99}
100
101/* called when ST Core wants the state */
102unsigned long st_ll_getstate(struct st_data_s *ll)
103{
104 pr_info(" returning state %ld", ll->ll_state);
105 return ll->ll_state;
106}
107
108/* called from ST Core, when a PM related packet arrives */
109unsigned long st_ll_sleep_state(struct st_data_s *st_data,
110 unsigned char cmd)
111{
112 switch (cmd) {
113 case LL_SLEEP_IND: /* sleep ind */
114 pr_info("sleep indication recvd");
115 ll_device_want_to_sleep(st_data);
116 break;
117 case LL_SLEEP_ACK: /* sleep ack */
118 pr_err("sleep ack rcvd: host shouldn't");
119 break;
120 case LL_WAKE_UP_IND: /* wake ind */
121 pr_info("wake indication recvd");
122 ll_device_want_to_wakeup(st_data);
123 break;
124 case LL_WAKE_UP_ACK: /* wake ack */
125 pr_info("wake ack rcvd");
126 st_data->ll_state = ST_LL_AWAKE;
127 break;
128 default:
129 pr_err(" unknown input/state ");
130 return ST_ERR_FAILURE;
131 }
132 return ST_SUCCESS;
133}
134
135/* Called from ST CORE to initialize ST LL */
136long st_ll_init(struct st_data_s *ll)
137{
138 /* set state to invalid */
139 ll->ll_state = ST_LL_INVALID;
140 return 0;
141}
142
143/* Called from ST CORE to de-initialize ST LL */
144long st_ll_deinit(struct st_data_s *ll)
145{
146 return 0;
147}
diff --git a/drivers/staging/ti-st/st_ll.h b/drivers/staging/ti-st/st_ll.h
new file mode 100644
index 000000000000..77dfbf07e7b8
--- /dev/null
+++ b/drivers/staging/ti-st/st_ll.h
@@ -0,0 +1,62 @@
1/*
2 * Shared Transport Low Level (ST LL)
3 *
4 * Copyright (C) 2009 Texas Instruments
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#ifndef ST_LL_H
22#define ST_LL_H
23
24#include <linux/skbuff.h>
25#include "st.h"
26#include "st_core.h"
27
28/* ST LL receiver states */
29#define ST_W4_PACKET_TYPE 0
30#define ST_BT_W4_EVENT_HDR 1
31#define ST_BT_W4_ACL_HDR 2
32#define ST_BT_W4_SCO_HDR 3
33#define ST_BT_W4_DATA 4
34#define ST_FM_W4_EVENT_HDR 5
35#define ST_GPS_W4_EVENT_HDR 6
36
37/* ST LL state machines */
38#define ST_LL_ASLEEP 0
39#define ST_LL_ASLEEP_TO_AWAKE 1
40#define ST_LL_AWAKE 2
41#define ST_LL_AWAKE_TO_ASLEEP 3
42#define ST_LL_INVALID 4
43
44#define LL_SLEEP_IND 0x30
45#define LL_SLEEP_ACK 0x31
46#define LL_WAKE_UP_IND 0x32
47#define LL_WAKE_UP_ACK 0x33
48
49/* initialize and de-init ST LL */
50long st_ll_init(struct st_data_s *);
51long st_ll_deinit(struct st_data_s *);
52
53/* enable/disable ST LL along with KIM start/stop
54 * called by ST Core
55 */
56void st_ll_enable(struct st_data_s *);
57void st_ll_disable(struct st_data_s *);
58
59unsigned long st_ll_getstate(struct st_data_s *);
60unsigned long st_ll_sleep_state(struct st_data_s *, unsigned char);
61void st_ll_wakeup(struct st_data_s *);
62#endif /* ST_LL_H */
diff --git a/drivers/staging/ti-st/sysfs-uim b/drivers/staging/ti-st/sysfs-uim
new file mode 100644
index 000000000000..10311afcbd45
--- /dev/null
+++ b/drivers/staging/ti-st/sysfs-uim
@@ -0,0 +1,16 @@
1What: /sys/class/rfkill/rfkill%d/
2Date: March 22
3Contact: Pavan Savoy <pavan_savoy@ti.com>
4Description:
5 Creates the rfkill entries for Radio apps like
6 BT app, FM app or GPS app to toggle corresponding
7 cores of the chip
8
9What: /dev/rfkill
10Date: March 22
11Contact: Pavan Savoy <pavan_savoy@ti.com>
12Description:
13 A daemon which maintains the ldisc installation and
14 uninstallation would be ppolling on this device and listening
15 on events which would suggest either to install or un-install
16 line discipline
diff --git a/drivers/staging/udlfb/udlfb.c b/drivers/staging/udlfb/udlfb.c
index 577f2bf6eb23..c7e061e5e04d 100644
--- a/drivers/staging/udlfb/udlfb.c
+++ b/drivers/staging/udlfb/udlfb.c
@@ -58,17 +58,17 @@ static struct usb_device_id id_table[] = {
58MODULE_DEVICE_TABLE(usb, id_table); 58MODULE_DEVICE_TABLE(usb, id_table);
59 59
60#ifndef CONFIG_FB_DEFERRED_IO 60#ifndef CONFIG_FB_DEFERRED_IO
61#warning message "kernel FB_DEFFERRED_IO option to support generic fbdev apps" 61#warning Please set CONFIG_FB_DEFFERRED_IO option to support generic fbdev apps
62#endif 62#endif
63 63
64#ifndef CONFIG_FB_SYS_IMAGEBLIT 64#ifndef CONFIG_FB_SYS_IMAGEBLIT
65#ifndef CONFIG_FB_SYS_IMAGEBLIT_MODULE 65#ifndef CONFIG_FB_SYS_IMAGEBLIT_MODULE
66#warning message "FB_SYS_* in kernel or module option to support fb console" 66#warning Please set CONFIG_FB_SYS_IMAGEBLIT option to support fb console
67#endif 67#endif
68#endif 68#endif
69 69
70#ifndef CONFIG_FB_MODE_HELPERS 70#ifndef CONFIG_FB_MODE_HELPERS
71#warning message "kernel FB_MODE_HELPERS required. Expect build break" 71#warning CONFIG_FB_MODE_HELPERS required. Expect build break
72#endif 72#endif
73 73
74/* dlfb keeps a list of urbs for efficient bulk transfers */ 74/* dlfb keeps a list of urbs for efficient bulk transfers */
@@ -366,32 +366,32 @@ static int dlfb_trim_hline(const u8 *bback, const u8 **bfront, int *width_bytes)
366} 366}
367 367
368/* 368/*
369Render a command stream for an encoded horizontal line segment of pixels. 369 * Render a command stream for an encoded horizontal line segment of pixels.
370 370 *
371A command buffer holds several commands. 371 * A command buffer holds several commands.
372It always begins with a fresh command header 372 * It always begins with a fresh command header
373(the protocol doesn't require this, but we enforce it to allow 373 * (the protocol doesn't require this, but we enforce it to allow
374multiple buffers to be potentially encoded and sent in parallel). 374 * multiple buffers to be potentially encoded and sent in parallel).
375A single command encodes one contiguous horizontal line of pixels 375 * A single command encodes one contiguous horizontal line of pixels
376 376 *
377The function relies on the client to do all allocation, so that 377 * The function relies on the client to do all allocation, so that
378rendering can be done directly to output buffers (e.g. USB URBs). 378 * rendering can be done directly to output buffers (e.g. USB URBs).
379The function fills the supplied command buffer, providing information 379 * The function fills the supplied command buffer, providing information
380on where it left off, so the client may call in again with additional 380 * on where it left off, so the client may call in again with additional
381buffers if the line will take several buffers to complete. 381 * buffers if the line will take several buffers to complete.
382 382 *
383A single command can transmit a maximum of 256 pixels, 383 * A single command can transmit a maximum of 256 pixels,
384regardless of the compression ratio (protocol design limit). 384 * regardless of the compression ratio (protocol design limit).
385To the hardware, 0 for a size byte means 256 385 * To the hardware, 0 for a size byte means 256
386 386 *
387Rather than 256 pixel commands which are either rl or raw encoded, 387 * Rather than 256 pixel commands which are either rl or raw encoded,
388the rlx command simply assumes alternating raw and rl spans within one cmd. 388 * the rlx command simply assumes alternating raw and rl spans within one cmd.
389This has a slightly larger header overhead, but produces more even results. 389 * This has a slightly larger header overhead, but produces more even results.
390It also processes all data (read and write) in a single pass. 390 * It also processes all data (read and write) in a single pass.
391Performance benchmarks of common cases show it having just slightly better 391 * Performance benchmarks of common cases show it having just slightly better
392compression than 256 pixel raw -or- rle commands, with similar CPU consumpion. 392 * compression than 256 pixel raw -or- rle commands, with similar CPU consumpion.
393But for very rl friendly data, will compress not quite as well. 393 * But for very rl friendly data, will compress not quite as well.
394*/ 394 */
395static void dlfb_compress_hline( 395static void dlfb_compress_hline(
396 const uint16_t **pixel_start_ptr, 396 const uint16_t **pixel_start_ptr,
397 const uint16_t *const pixel_end, 397 const uint16_t *const pixel_end,
@@ -1439,7 +1439,7 @@ static int __init dlfb_module_init(void)
1439 if (res) 1439 if (res)
1440 err("usb_register failed. Error number %d", res); 1440 err("usb_register failed. Error number %d", res);
1441 1441
1442 printk("VMODES initialized\n"); 1442 printk(KERN_INFO "VMODES initialized\n");
1443 1443
1444 return res; 1444 return res;
1445} 1445}
@@ -1568,7 +1568,7 @@ static int dlfb_alloc_urb_list(struct dlfb_data *dev, int count, size_t size)
1568 1568
1569 kref_get(&dev->kref); /* released in free_render_urbs() */ 1569 kref_get(&dev->kref); /* released in free_render_urbs() */
1570 1570
1571 dl_notice("allocated %d %d byte urbs \n", i, (int) size); 1571 dl_notice("allocated %d %d byte urbs\n", i, (int) size);
1572 1572
1573 return i; 1573 return i;
1574} 1574}
diff --git a/drivers/staging/usbip/stub_rx.c b/drivers/staging/usbip/stub_rx.c
index da30658fa048..5972ae70e381 100644
--- a/drivers/staging/usbip/stub_rx.c
+++ b/drivers/staging/usbip/stub_rx.c
@@ -502,13 +502,13 @@ static void stub_recv_cmd_submit(struct stub_device *sdev,
502 } 502 }
503 503
504 /* set priv->urb->setup_packet */ 504 /* set priv->urb->setup_packet */
505 priv->urb->setup_packet = kzalloc(8, GFP_KERNEL); 505 priv->urb->setup_packet = kmemdup(&pdu->u.cmd_submit.setup, 8,
506 GFP_KERNEL);
506 if (!priv->urb->setup_packet) { 507 if (!priv->urb->setup_packet) {
507 dev_err(&sdev->interface->dev, "allocate setup_packet\n"); 508 dev_err(&sdev->interface->dev, "allocate setup_packet\n");
508 usbip_event_add(ud, SDEV_EVENT_ERROR_MALLOC); 509 usbip_event_add(ud, SDEV_EVENT_ERROR_MALLOC);
509 return; 510 return;
510 } 511 }
511 memcpy(priv->urb->setup_packet, &pdu->u.cmd_submit.setup, 8);
512 512
513 /* set other members from the base header of pdu */ 513 /* set other members from the base header of pdu */
514 priv->urb->context = (void *) priv; 514 priv->urb->context = (void *) priv;
diff --git a/drivers/staging/usbip/usbip_common.h b/drivers/staging/usbip/usbip_common.h
index 6f1dcb197d13..e1bbd1287e28 100644
--- a/drivers/staging/usbip/usbip_common.h
+++ b/drivers/staging/usbip/usbip_common.h
@@ -182,7 +182,7 @@ struct usbip_header_basic {
182 __u32 devid; 182 __u32 devid;
183 183
184#define USBIP_DIR_OUT 0 184#define USBIP_DIR_OUT 0
185#define USBIP_DIR_IN 1 185#define USBIP_DIR_IN 1
186 __u32 direction; 186 __u32 direction;
187 __u32 ep; /* endpoint number */ 187 __u32 ep; /* endpoint number */
188} __attribute__ ((packed)); 188} __attribute__ ((packed));
diff --git a/drivers/staging/usbip/vhci_hcd.c b/drivers/staging/usbip/vhci_hcd.c
index 0b1766122d38..be5d8db98165 100644
--- a/drivers/staging/usbip/vhci_hcd.c
+++ b/drivers/staging/usbip/vhci_hcd.c
@@ -1072,7 +1072,7 @@ static struct hc_driver vhci_hc_driver = {
1072 .flags = HCD_USB2, 1072 .flags = HCD_USB2,
1073 1073
1074 .start = vhci_start, 1074 .start = vhci_start,
1075 .stop = vhci_stop, 1075 .stop = vhci_stop,
1076 1076
1077 .urb_enqueue = vhci_urb_enqueue, 1077 .urb_enqueue = vhci_urb_enqueue,
1078 .urb_dequeue = vhci_urb_dequeue, 1078 .urb_dequeue = vhci_urb_dequeue,
diff --git a/drivers/staging/usbip/vhci_tx.c b/drivers/staging/usbip/vhci_tx.c
index b71b4c2fbd86..e1c1f716a1c2 100644
--- a/drivers/staging/usbip/vhci_tx.c
+++ b/drivers/staging/usbip/vhci_tx.c
@@ -179,7 +179,7 @@ static int vhci_send_cmd_unlink(struct vhci_device *vdev)
179 memset(&msg, 0, sizeof(msg)); 179 memset(&msg, 0, sizeof(msg));
180 memset(&iov, 0, sizeof(iov)); 180 memset(&iov, 0, sizeof(iov));
181 181
182 usbip_dbg_vhci_tx("setup cmd unlink, %lu \n", unlink->seqnum); 182 usbip_dbg_vhci_tx("setup cmd unlink, %lu\n", unlink->seqnum);
183 183
184 184
185 /* 1. setup usbip_header */ 185 /* 1. setup usbip_header */
diff --git a/drivers/staging/vme/boards/vme_vmivme7805.c b/drivers/staging/vme/boards/vme_vmivme7805.c
index 843c9edde555..80eaa0c4fe1c 100644
--- a/drivers/staging/vme/boards/vme_vmivme7805.c
+++ b/drivers/staging/vme/boards/vme_vmivme7805.c
@@ -10,7 +10,6 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13#include <linux/version.h>
14#include <linux/module.h> 13#include <linux/module.h>
15#include <linux/types.h> 14#include <linux/types.h>
16#include <linux/errno.h> 15#include <linux/errno.h>
diff --git a/drivers/staging/vme/bridges/vme_ca91cx42.c b/drivers/staging/vme/bridges/vme_ca91cx42.c
index b159ea58adf7..0c82eb47a28d 100644
--- a/drivers/staging/vme/bridges/vme_ca91cx42.c
+++ b/drivers/staging/vme/bridges/vme_ca91cx42.c
@@ -26,9 +26,9 @@
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/sched.h> 27#include <linux/sched.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29#include <asm/time.h> 29#include <linux/time.h>
30#include <asm/io.h> 30#include <linux/io.h>
31#include <asm/uaccess.h> 31#include <linux/uaccess.h>
32 32
33#include "../vme.h" 33#include "../vme.h"
34#include "../vme_bridge.h" 34#include "../vme_bridge.h"
@@ -94,31 +94,35 @@ static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge)
94 return CA91CX42_LINT_SW_IACK; 94 return CA91CX42_LINT_SW_IACK;
95} 95}
96 96
97static u32 ca91cx42_VERR_irqhandler(struct ca91cx42_driver *bridge) 97static u32 ca91cx42_VERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
98{ 98{
99 int val; 99 int val;
100 struct ca91cx42_driver *bridge;
101
102 bridge = ca91cx42_bridge->driver_priv;
100 103
101 val = ioread32(bridge->base + DGCS); 104 val = ioread32(bridge->base + DGCS);
102 105
103 if (!(val & 0x00000800)) { 106 if (!(val & 0x00000800)) {
104 printk(KERN_ERR "ca91c042: ca91cx42_VERR_irqhandler DMA Read " 107 dev_err(ca91cx42_bridge->parent, "ca91cx42_VERR_irqhandler DMA "
105 "Error DGCS=%08X\n", val); 108 "Read Error DGCS=%08X\n", val);
106 } 109 }
107 110
108 return CA91CX42_LINT_VERR; 111 return CA91CX42_LINT_VERR;
109} 112}
110 113
111static u32 ca91cx42_LERR_irqhandler(struct ca91cx42_driver *bridge) 114static u32 ca91cx42_LERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
112{ 115{
113 int val; 116 int val;
117 struct ca91cx42_driver *bridge;
114 118
115 val = ioread32(bridge->base + DGCS); 119 bridge = ca91cx42_bridge->driver_priv;
116 120
117 if (!(val & 0x00000800)) { 121 val = ioread32(bridge->base + DGCS);
118 printk(KERN_ERR "ca91c042: ca91cx42_LERR_irqhandler DMA Read "
119 "Error DGCS=%08X\n", val);
120 122
121 } 123 if (!(val & 0x00000800))
124 dev_err(ca91cx42_bridge->parent, "ca91cx42_LERR_irqhandler DMA "
125 "Read Error DGCS=%08X\n", val);
122 126
123 return CA91CX42_LINT_LERR; 127 return CA91CX42_LINT_LERR;
124} 128}
@@ -176,9 +180,9 @@ static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr)
176 if (stat & CA91CX42_LINT_SW_IACK) 180 if (stat & CA91CX42_LINT_SW_IACK)
177 serviced |= ca91cx42_IACK_irqhandler(bridge); 181 serviced |= ca91cx42_IACK_irqhandler(bridge);
178 if (stat & CA91CX42_LINT_VERR) 182 if (stat & CA91CX42_LINT_VERR)
179 serviced |= ca91cx42_VERR_irqhandler(bridge); 183 serviced |= ca91cx42_VERR_irqhandler(ca91cx42_bridge);
180 if (stat & CA91CX42_LINT_LERR) 184 if (stat & CA91CX42_LINT_LERR)
181 serviced |= ca91cx42_LERR_irqhandler(bridge); 185 serviced |= ca91cx42_LERR_irqhandler(ca91cx42_bridge);
182 if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 | 186 if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 |
183 CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 | 187 CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 |
184 CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 | 188 CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 |
@@ -326,9 +330,12 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
326 unsigned int i, addr = 0, granularity; 330 unsigned int i, addr = 0, granularity;
327 unsigned int temp_ctl = 0; 331 unsigned int temp_ctl = 0;
328 unsigned int vme_bound, pci_offset; 332 unsigned int vme_bound, pci_offset;
333 struct vme_bridge *ca91cx42_bridge;
329 struct ca91cx42_driver *bridge; 334 struct ca91cx42_driver *bridge;
330 335
331 bridge = image->parent->driver_priv; 336 ca91cx42_bridge = image->parent;
337
338 bridge = ca91cx42_bridge->driver_priv;
332 339
333 i = image->number; 340 i = image->number;
334 341
@@ -353,7 +360,7 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
353 case VME_USER3: 360 case VME_USER3:
354 case VME_USER4: 361 case VME_USER4:
355 default: 362 default:
356 printk(KERN_ERR "Invalid address space\n"); 363 dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
357 return -EINVAL; 364 return -EINVAL;
358 break; 365 break;
359 } 366 }
@@ -371,15 +378,18 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
371 granularity = 0x10000; 378 granularity = 0x10000;
372 379
373 if (vme_base & (granularity - 1)) { 380 if (vme_base & (granularity - 1)) {
374 printk(KERN_ERR "Invalid VME base alignment\n"); 381 dev_err(ca91cx42_bridge->parent, "Invalid VME base "
382 "alignment\n");
375 return -EINVAL; 383 return -EINVAL;
376 } 384 }
377 if (vme_bound & (granularity - 1)) { 385 if (vme_bound & (granularity - 1)) {
378 printk(KERN_ERR "Invalid VME bound alignment\n"); 386 dev_err(ca91cx42_bridge->parent, "Invalid VME bound "
387 "alignment\n");
379 return -EINVAL; 388 return -EINVAL;
380 } 389 }
381 if (pci_offset & (granularity - 1)) { 390 if (pci_offset & (granularity - 1)) {
382 printk(KERN_ERR "Invalid PCI Offset alignment\n"); 391 dev_err(ca91cx42_bridge->parent, "Invalid PCI Offset "
392 "alignment\n");
383 return -EINVAL; 393 return -EINVAL;
384 } 394 }
385 395
@@ -491,7 +501,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
491 501
492 /* Find pci_dev container of dev */ 502 /* Find pci_dev container of dev */
493 if (ca91cx42_bridge->parent == NULL) { 503 if (ca91cx42_bridge->parent == NULL) {
494 printk(KERN_ERR "Dev entry NULL\n"); 504 dev_err(ca91cx42_bridge->parent, "Dev entry NULL\n");
495 return -EINVAL; 505 return -EINVAL;
496 } 506 }
497 pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); 507 pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev);
@@ -515,8 +525,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
515 if (image->bus_resource.name == NULL) { 525 if (image->bus_resource.name == NULL) {
516 image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); 526 image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL);
517 if (image->bus_resource.name == NULL) { 527 if (image->bus_resource.name == NULL) {
518 printk(KERN_ERR "Unable to allocate memory for resource" 528 dev_err(ca91cx42_bridge->parent, "Unable to allocate "
519 " name\n"); 529 "memory for resource name\n");
520 retval = -ENOMEM; 530 retval = -ENOMEM;
521 goto err_name; 531 goto err_name;
522 } 532 }
@@ -533,8 +543,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
533 &(image->bus_resource), size, size, PCIBIOS_MIN_MEM, 543 &(image->bus_resource), size, size, PCIBIOS_MIN_MEM,
534 0, NULL, NULL); 544 0, NULL, NULL);
535 if (retval) { 545 if (retval) {
536 printk(KERN_ERR "Failed to allocate mem resource for " 546 dev_err(ca91cx42_bridge->parent, "Failed to allocate mem "
537 "window %d size 0x%lx start 0x%lx\n", 547 "resource for window %d size 0x%lx start 0x%lx\n",
538 image->number, (unsigned long)size, 548 image->number, (unsigned long)size,
539 (unsigned long)image->bus_resource.start); 549 (unsigned long)image->bus_resource.start);
540 goto err_resource; 550 goto err_resource;
@@ -543,7 +553,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
543 image->kern_base = ioremap_nocache( 553 image->kern_base = ioremap_nocache(
544 image->bus_resource.start, size); 554 image->bus_resource.start, size);
545 if (image->kern_base == NULL) { 555 if (image->kern_base == NULL) {
546 printk(KERN_ERR "Failed to remap resource\n"); 556 dev_err(ca91cx42_bridge->parent, "Failed to remap resource\n");
547 retval = -ENOMEM; 557 retval = -ENOMEM;
548 goto err_remap; 558 goto err_remap;
549 } 559 }
@@ -582,9 +592,12 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
582 unsigned int i, granularity = 0; 592 unsigned int i, granularity = 0;
583 unsigned int temp_ctl = 0; 593 unsigned int temp_ctl = 0;
584 unsigned long long pci_bound, vme_offset, pci_base; 594 unsigned long long pci_bound, vme_offset, pci_base;
595 struct vme_bridge *ca91cx42_bridge;
585 struct ca91cx42_driver *bridge; 596 struct ca91cx42_driver *bridge;
586 597
587 bridge = image->parent->driver_priv; 598 ca91cx42_bridge = image->parent;
599
600 bridge = ca91cx42_bridge->driver_priv;
588 601
589 i = image->number; 602 i = image->number;
590 603
@@ -595,12 +608,14 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
595 608
596 /* Verify input data */ 609 /* Verify input data */
597 if (vme_base & (granularity - 1)) { 610 if (vme_base & (granularity - 1)) {
598 printk(KERN_ERR "Invalid VME Window alignment\n"); 611 dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
612 "alignment\n");
599 retval = -EINVAL; 613 retval = -EINVAL;
600 goto err_window; 614 goto err_window;
601 } 615 }
602 if (size & (granularity - 1)) { 616 if (size & (granularity - 1)) {
603 printk(KERN_ERR "Invalid VME Window alignment\n"); 617 dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
618 "alignment\n");
604 retval = -EINVAL; 619 retval = -EINVAL;
605 goto err_window; 620 goto err_window;
606 } 621 }
@@ -614,8 +629,8 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
614 retval = ca91cx42_alloc_resource(image, size); 629 retval = ca91cx42_alloc_resource(image, size);
615 if (retval) { 630 if (retval) {
616 spin_unlock(&(image->lock)); 631 spin_unlock(&(image->lock));
617 printk(KERN_ERR "Unable to allocate memory for resource " 632 dev_err(ca91cx42_bridge->parent, "Unable to allocate memory "
618 "name\n"); 633 "for resource name\n");
619 retval = -ENOMEM; 634 retval = -ENOMEM;
620 goto err_res; 635 goto err_res;
621 } 636 }
@@ -658,7 +673,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
658 break; 673 break;
659 default: 674 default:
660 spin_unlock(&(image->lock)); 675 spin_unlock(&(image->lock));
661 printk(KERN_ERR "Invalid data width\n"); 676 dev_err(ca91cx42_bridge->parent, "Invalid data width\n");
662 retval = -EINVAL; 677 retval = -EINVAL;
663 goto err_dwidth; 678 goto err_dwidth;
664 break; 679 break;
@@ -690,7 +705,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
690 case VME_USER4: 705 case VME_USER4:
691 default: 706 default:
692 spin_unlock(&(image->lock)); 707 spin_unlock(&(image->lock));
693 printk(KERN_ERR "Invalid address space\n"); 708 dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
694 retval = -EINVAL; 709 retval = -EINVAL;
695 goto err_aspace; 710 goto err_aspace;
696 break; 711 break;
@@ -921,12 +936,14 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
921 struct vme_dma_vme *vme_attr; 936 struct vme_dma_vme *vme_attr;
922 dma_addr_t desc_ptr; 937 dma_addr_t desc_ptr;
923 int retval = 0; 938 int retval = 0;
939 struct device *dev;
940
941 dev = list->parent->parent->parent;
924 942
925 /* XXX descriptor must be aligned on 64-bit boundaries */ 943 /* XXX descriptor must be aligned on 64-bit boundaries */
926 entry = (struct ca91cx42_dma_entry *) 944 entry = kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL);
927 kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL);
928 if (entry == NULL) { 945 if (entry == NULL) {
929 printk(KERN_ERR "Failed to allocate memory for dma resource " 946 dev_err(dev, "Failed to allocate memory for dma resource "
930 "structure\n"); 947 "structure\n");
931 retval = -ENOMEM; 948 retval = -ENOMEM;
932 goto err_mem; 949 goto err_mem;
@@ -934,7 +951,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
934 951
935 /* Test descriptor alignment */ 952 /* Test descriptor alignment */
936 if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) { 953 if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) {
937 printk("Descriptor not aligned to 16 byte boundary as " 954 dev_err(dev, "Descriptor not aligned to 16 byte boundary as "
938 "required: %p\n", &(entry->descriptor)); 955 "required: %p\n", &(entry->descriptor));
939 retval = -EINVAL; 956 retval = -EINVAL;
940 goto err_align; 957 goto err_align;
@@ -955,7 +972,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
955 if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 | 972 if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 |
956 VME_USER2)) != 0) { 973 VME_USER2)) != 0) {
957 974
958 printk(KERN_ERR "Unsupported cycle type\n"); 975 dev_err(dev, "Unsupported cycle type\n");
959 retval = -EINVAL; 976 retval = -EINVAL;
960 goto err_aspace; 977 goto err_aspace;
961 } 978 }
@@ -963,7 +980,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
963 if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER | 980 if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER |
964 VME_PROG | VME_DATA)) != 0) { 981 VME_PROG | VME_DATA)) != 0) {
965 982
966 printk(KERN_ERR "Unsupported cycle type\n"); 983 dev_err(dev, "Unsupported cycle type\n");
967 retval = -EINVAL; 984 retval = -EINVAL;
968 goto err_cycle; 985 goto err_cycle;
969 } 986 }
@@ -972,7 +989,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
972 if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) || 989 if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) ||
973 ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) { 990 ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) {
974 991
975 printk(KERN_ERR "Cannot perform transfer with this " 992 dev_err(dev, "Cannot perform transfer with this "
976 "source-destination combination\n"); 993 "source-destination combination\n");
977 retval = -EINVAL; 994 retval = -EINVAL;
978 goto err_direct; 995 goto err_direct;
@@ -997,7 +1014,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
997 entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64; 1014 entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64;
998 break; 1015 break;
999 default: 1016 default:
1000 printk(KERN_ERR "Invalid data width\n"); 1017 dev_err(dev, "Invalid data width\n");
1001 return -EINVAL; 1018 return -EINVAL;
1002 } 1019 }
1003 1020
@@ -1019,7 +1036,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
1019 entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2; 1036 entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2;
1020 break; 1037 break;
1021 default: 1038 default:
1022 printk(KERN_ERR "Invalid address space\n"); 1039 dev_err(dev, "Invalid address space\n");
1023 return -EINVAL; 1040 return -EINVAL;
1024 break; 1041 break;
1025 } 1042 }
@@ -1079,12 +1096,13 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list)
1079 int retval = 0; 1096 int retval = 0;
1080 dma_addr_t bus_addr; 1097 dma_addr_t bus_addr;
1081 u32 val; 1098 u32 val;
1082 1099 struct device *dev;
1083 struct ca91cx42_driver *bridge; 1100 struct ca91cx42_driver *bridge;
1084 1101
1085 ctrlr = list->parent; 1102 ctrlr = list->parent;
1086 1103
1087 bridge = ctrlr->parent->driver_priv; 1104 bridge = ctrlr->parent->driver_priv;
1105 dev = ctrlr->parent->parent;
1088 1106
1089 mutex_lock(&(ctrlr->mtx)); 1107 mutex_lock(&(ctrlr->mtx));
1090 1108
@@ -1140,7 +1158,7 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list)
1140 if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | 1158 if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR |
1141 CA91CX42_DGCS_PERR)) { 1159 CA91CX42_DGCS_PERR)) {
1142 1160
1143 printk(KERN_ERR "ca91c042: DMA Error. DGCS=%08X\n", val); 1161 dev_err(dev, "ca91c042: DMA Error. DGCS=%08X\n", val);
1144 val = ioread32(bridge->base + DCTL); 1162 val = ioread32(bridge->base + DCTL);
1145 } 1163 }
1146 1164
@@ -1476,7 +1494,7 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1476 /* We want to support more than one of each bridge so we need to 1494 /* We want to support more than one of each bridge so we need to
1477 * dynamically allocate the bridge structure 1495 * dynamically allocate the bridge structure
1478 */ 1496 */
1479 ca91cx42_bridge = kmalloc(sizeof(struct vme_bridge), GFP_KERNEL); 1497 ca91cx42_bridge = kzalloc(sizeof(struct vme_bridge), GFP_KERNEL);
1480 1498
1481 if (ca91cx42_bridge == NULL) { 1499 if (ca91cx42_bridge == NULL) {
1482 dev_err(&pdev->dev, "Failed to allocate memory for device " 1500 dev_err(&pdev->dev, "Failed to allocate memory for device "
@@ -1485,9 +1503,7 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1485 goto err_struct; 1503 goto err_struct;
1486 } 1504 }
1487 1505
1488 memset(ca91cx42_bridge, 0, sizeof(struct vme_bridge)); 1506 ca91cx42_device = kzalloc(sizeof(struct ca91cx42_driver), GFP_KERNEL);
1489
1490 ca91cx42_device = kmalloc(sizeof(struct ca91cx42_driver), GFP_KERNEL);
1491 1507
1492 if (ca91cx42_device == NULL) { 1508 if (ca91cx42_device == NULL) {
1493 dev_err(&pdev->dev, "Failed to allocate memory for device " 1509 dev_err(&pdev->dev, "Failed to allocate memory for device "
@@ -1496,8 +1512,6 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1496 goto err_driver; 1512 goto err_driver;
1497 } 1513 }
1498 1514
1499 memset(ca91cx42_device, 0, sizeof(struct ca91cx42_driver));
1500
1501 ca91cx42_bridge->driver_priv = ca91cx42_device; 1515 ca91cx42_bridge->driver_priv = ca91cx42_device;
1502 1516
1503 /* Enable the device */ 1517 /* Enable the device */
@@ -1665,9 +1679,8 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1665 dev_info(&pdev->dev, "Slot ID is %d\n", 1679 dev_info(&pdev->dev, "Slot ID is %d\n",
1666 ca91cx42_slot_get(ca91cx42_bridge)); 1680 ca91cx42_slot_get(ca91cx42_bridge));
1667 1681
1668 if (ca91cx42_crcsr_init(ca91cx42_bridge, pdev)) { 1682 if (ca91cx42_crcsr_init(ca91cx42_bridge, pdev))
1669 dev_err(&pdev->dev, "CR/CSR configuration failed.\n"); 1683 dev_err(&pdev->dev, "CR/CSR configuration failed.\n");
1670 }
1671 1684
1672 /* Need to save ca91cx42_bridge pointer locally in link list for use in 1685 /* Need to save ca91cx42_bridge pointer locally in link list for use in
1673 * ca91cx42_remove() 1686 * ca91cx42_remove()
diff --git a/drivers/staging/vme/bridges/vme_tsi148.c b/drivers/staging/vme/bridges/vme_tsi148.c
index 783051f59f19..abe88a380b72 100644
--- a/drivers/staging/vme/bridges/vme_tsi148.c
+++ b/drivers/staging/vme/bridges/vme_tsi148.c
@@ -26,9 +26,9 @@
26#include <linux/spinlock.h> 26#include <linux/spinlock.h>
27#include <linux/sched.h> 27#include <linux/sched.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29#include <asm/time.h> 29#include <linux/time.h>
30#include <asm/io.h> 30#include <linux/io.h>
31#include <asm/uaccess.h> 31#include <linux/uaccess.h>
32 32
33#include "../vme.h" 33#include "../vme.h"
34#include "../vme_bridge.h" 34#include "../vme_bridge.h"
@@ -40,27 +40,6 @@ static void tsi148_remove(struct pci_dev *);
40static void __exit tsi148_exit(void); 40static void __exit tsi148_exit(void);
41 41
42 42
43int tsi148_slave_set(struct vme_slave_resource *, int, unsigned long long,
44 unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t);
45int tsi148_slave_get(struct vme_slave_resource *, int *, unsigned long long *,
46 unsigned long long *, dma_addr_t *, vme_address_t *, vme_cycle_t *);
47
48int tsi148_master_get(struct vme_master_resource *, int *, unsigned long long *,
49 unsigned long long *, vme_address_t *, vme_cycle_t *, vme_width_t *);
50int tsi148_master_set(struct vme_master_resource *, int, unsigned long long,
51 unsigned long long, vme_address_t, vme_cycle_t, vme_width_t);
52ssize_t tsi148_master_read(struct vme_master_resource *, void *, size_t,
53 loff_t);
54ssize_t tsi148_master_write(struct vme_master_resource *, void *, size_t,
55 loff_t);
56unsigned int tsi148_master_rmw(struct vme_master_resource *, unsigned int,
57 unsigned int, unsigned int, loff_t);
58int tsi148_dma_list_add (struct vme_dma_list *, struct vme_dma_attr *,
59 struct vme_dma_attr *, size_t);
60int tsi148_dma_list_exec(struct vme_dma_list *);
61int tsi148_dma_list_empty(struct vme_dma_list *);
62int tsi148_generate_irq(int, int);
63
64/* Module parameter */ 43/* Module parameter */
65static int err_chk; 44static int err_chk;
66static int geoid; 45static int geoid;
@@ -122,7 +101,7 @@ static u32 tsi148_LM_irqhandler(struct tsi148_driver *bridge, u32 stat)
122 u32 serviced = 0; 101 u32 serviced = 0;
123 102
124 for (i = 0; i < 4; i++) { 103 for (i = 0; i < 4; i++) {
125 if(stat & TSI148_LCSR_INTS_LMS[i]) { 104 if (stat & TSI148_LCSR_INTS_LMS[i]) {
126 /* We only enable interrupts if the callback is set */ 105 /* We only enable interrupts if the callback is set */
127 bridge->lm_callback[i](i); 106 bridge->lm_callback[i](i);
128 serviced |= TSI148_LCSR_INTC_LMC[i]; 107 serviced |= TSI148_LCSR_INTC_LMC[i];
@@ -137,16 +116,20 @@ static u32 tsi148_LM_irqhandler(struct tsi148_driver *bridge, u32 stat)
137 * 116 *
138 * XXX This functionality is not exposed up though API. 117 * XXX This functionality is not exposed up though API.
139 */ 118 */
140static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat) 119static u32 tsi148_MB_irqhandler(struct vme_bridge *tsi148_bridge, u32 stat)
141{ 120{
142 int i; 121 int i;
143 u32 val; 122 u32 val;
144 u32 serviced = 0; 123 u32 serviced = 0;
124 struct tsi148_driver *bridge;
125
126 bridge = tsi148_bridge->driver_priv;
145 127
146 for (i = 0; i < 4; i++) { 128 for (i = 0; i < 4; i++) {
147 if(stat & TSI148_LCSR_INTS_MBS[i]) { 129 if (stat & TSI148_LCSR_INTS_MBS[i]) {
148 val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]); 130 val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]);
149 printk("VME Mailbox %d received: 0x%x\n", i, val); 131 dev_err(tsi148_bridge->parent, "VME Mailbox %d received"
132 ": 0x%x\n", i, val);
150 serviced |= TSI148_LCSR_INTC_MBC[i]; 133 serviced |= TSI148_LCSR_INTC_MBC[i];
151 } 134 }
152 } 135 }
@@ -157,19 +140,22 @@ static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat)
157/* 140/*
158 * Display error & status message when PERR (PCI) exception interrupt occurs. 141 * Display error & status message when PERR (PCI) exception interrupt occurs.
159 */ 142 */
160static u32 tsi148_PERR_irqhandler(struct tsi148_driver *bridge) 143static u32 tsi148_PERR_irqhandler(struct vme_bridge *tsi148_bridge)
161{ 144{
162 printk(KERN_ERR 145 struct tsi148_driver *bridge;
163 "PCI Exception at address: 0x%08x:%08x, attributes: %08x\n", 146
147 bridge = tsi148_bridge->driver_priv;
148
149 dev_err(tsi148_bridge->parent, "PCI Exception at address: 0x%08x:%08x, "
150 "attributes: %08x\n",
164 ioread32be(bridge->base + TSI148_LCSR_EDPAU), 151 ioread32be(bridge->base + TSI148_LCSR_EDPAU),
165 ioread32be(bridge->base + TSI148_LCSR_EDPAL), 152 ioread32be(bridge->base + TSI148_LCSR_EDPAL),
166 ioread32be(bridge->base + TSI148_LCSR_EDPAT) 153 ioread32be(bridge->base + TSI148_LCSR_EDPAT));
167 ); 154
168 printk(KERN_ERR 155 dev_err(tsi148_bridge->parent, "PCI-X attribute reg: %08x, PCI-X split "
169 "PCI-X attribute reg: %08x, PCI-X split completion reg: %08x\n", 156 "completion reg: %08x\n",
170 ioread32be(bridge->base + TSI148_LCSR_EDPXA), 157 ioread32be(bridge->base + TSI148_LCSR_EDPXA),
171 ioread32be(bridge->base + TSI148_LCSR_EDPXS) 158 ioread32be(bridge->base + TSI148_LCSR_EDPXS));
172 );
173 159
174 iowrite32be(TSI148_LCSR_EDPAT_EDPCL, bridge->base + TSI148_LCSR_EDPAT); 160 iowrite32be(TSI148_LCSR_EDPAT_EDPCL, bridge->base + TSI148_LCSR_EDPAT);
175 161
@@ -196,22 +182,21 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge)
196 reg_join(error_addr_high, error_addr_low, &error_addr); 182 reg_join(error_addr_high, error_addr_low, &error_addr);
197 183
198 /* Check for exception register overflow (we have lost error data) */ 184 /* Check for exception register overflow (we have lost error data) */
199 if(error_attrib & TSI148_LCSR_VEAT_VEOF) { 185 if (error_attrib & TSI148_LCSR_VEAT_VEOF) {
200 printk(KERN_ERR "VME Bus Exception Overflow Occurred\n"); 186 dev_err(tsi148_bridge->parent, "VME Bus Exception Overflow "
187 "Occurred\n");
201 } 188 }
202 189
203 error = (struct vme_bus_error *)kmalloc(sizeof (struct vme_bus_error), 190 error = kmalloc(sizeof(struct vme_bus_error), GFP_ATOMIC);
204 GFP_ATOMIC);
205 if (error) { 191 if (error) {
206 error->address = error_addr; 192 error->address = error_addr;
207 error->attributes = error_attrib; 193 error->attributes = error_attrib;
208 list_add_tail(&(error->list), &(tsi148_bridge->vme_errors)); 194 list_add_tail(&(error->list), &(tsi148_bridge->vme_errors));
209 } else { 195 } else {
210 printk(KERN_ERR 196 dev_err(tsi148_bridge->parent, "Unable to alloc memory for "
211 "Unable to alloc memory for VMEbus Error reporting\n"); 197 "VMEbus Error reporting\n");
212 printk(KERN_ERR 198 dev_err(tsi148_bridge->parent, "VME Bus Error at address: "
213 "VME Bus Error at address: 0x%llx, attributes: %08x\n", 199 "0x%llx, attributes: %08x\n", error_addr, error_attrib);
214 error_addr, error_attrib);
215 } 200 }
216 201
217 /* Clear Status */ 202 /* Clear Status */
@@ -244,10 +229,9 @@ static u32 tsi148_VIRQ_irqhandler(struct vme_bridge *tsi148_bridge,
244 for (i = 7; i > 0; i--) { 229 for (i = 7; i > 0; i--) {
245 if (stat & (1 << i)) { 230 if (stat & (1 << i)) {
246 /* 231 /*
247 * Note: Even though the registers are defined 232 * Note: Even though the registers are defined as
248 * as 32-bits in the spec, we only want to issue 233 * 32-bits in the spec, we only want to issue 8-bit
249 * 8-bit IACK cycles on the bus, read from offset 234 * IACK cycles on the bus, read from offset 3.
250 * 3.
251 */ 235 */
252 vec = ioread8(bridge->base + TSI148_LCSR_VIACK[i] + 3); 236 vec = ioread8(bridge->base + TSI148_LCSR_VIACK[i] + 3);
253 237
@@ -281,9 +265,8 @@ static irqreturn_t tsi148_irqhandler(int irq, void *ptr)
281 /* Only look at unmasked interrupts */ 265 /* Only look at unmasked interrupts */
282 stat &= enable; 266 stat &= enable;
283 267
284 if (unlikely(!stat)) { 268 if (unlikely(!stat))
285 return IRQ_NONE; 269 return IRQ_NONE;
286 }
287 270
288 /* Call subhandlers as appropriate */ 271 /* Call subhandlers as appropriate */
289 /* DMA irqs */ 272 /* DMA irqs */
@@ -298,11 +281,11 @@ static irqreturn_t tsi148_irqhandler(int irq, void *ptr)
298 /* Mail box irqs */ 281 /* Mail box irqs */
299 if (stat & (TSI148_LCSR_INTS_MB3S | TSI148_LCSR_INTS_MB2S | 282 if (stat & (TSI148_LCSR_INTS_MB3S | TSI148_LCSR_INTS_MB2S |
300 TSI148_LCSR_INTS_MB1S | TSI148_LCSR_INTS_MB0S)) 283 TSI148_LCSR_INTS_MB1S | TSI148_LCSR_INTS_MB0S))
301 serviced |= tsi148_MB_irqhandler(bridge, stat); 284 serviced |= tsi148_MB_irqhandler(tsi148_bridge, stat);
302 285
303 /* PCI bus error */ 286 /* PCI bus error */
304 if (stat & TSI148_LCSR_INTS_PERRS) 287 if (stat & TSI148_LCSR_INTS_PERRS)
305 serviced |= tsi148_PERR_irqhandler(bridge); 288 serviced |= tsi148_PERR_irqhandler(tsi148_bridge);
306 289
307 /* VME bus error */ 290 /* VME bus error */
308 if (stat & TSI148_LCSR_INTS_VERRS) 291 if (stat & TSI148_LCSR_INTS_VERRS)
@@ -346,8 +329,8 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge)
346 IRQF_SHARED, 329 IRQF_SHARED,
347 driver_name, tsi148_bridge); 330 driver_name, tsi148_bridge);
348 if (result) { 331 if (result) {
349 dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", 332 dev_err(tsi148_bridge->parent, "Can't get assigned pci irq "
350 pdev->irq); 333 "vector %02X\n", pdev->irq);
351 return result; 334 return result;
352 } 335 }
353 336
@@ -515,7 +498,9 @@ static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge,
515 /* Iterate through errors */ 498 /* Iterate through errors */
516 list_for_each(err_pos, &(tsi148_bridge->vme_errors)) { 499 list_for_each(err_pos, &(tsi148_bridge->vme_errors)) {
517 vme_err = list_entry(err_pos, struct vme_bus_error, list); 500 vme_err = list_entry(err_pos, struct vme_bus_error, list);
518 if((vme_err->address >= address) && (vme_err->address < bound)){ 501 if ((vme_err->address >= address) &&
502 (vme_err->address < bound)) {
503
519 valid = vme_err; 504 valid = vme_err;
520 break; 505 break;
521 } 506 }
@@ -548,7 +533,9 @@ static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge,
548 list_for_each_safe(err_pos, temp, &(tsi148_bridge->vme_errors)) { 533 list_for_each_safe(err_pos, temp, &(tsi148_bridge->vme_errors)) {
549 vme_err = list_entry(err_pos, struct vme_bus_error, list); 534 vme_err = list_entry(err_pos, struct vme_bus_error, list);
550 535
551 if((vme_err->address >= address) && (vme_err->address < bound)){ 536 if ((vme_err->address >= address) &&
537 (vme_err->address < bound)) {
538
552 list_del(err_pos); 539 list_del(err_pos);
553 kfree(vme_err); 540 kfree(vme_err);
554 } 541 }
@@ -568,9 +555,11 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
568 unsigned int vme_bound_low, vme_bound_high; 555 unsigned int vme_bound_low, vme_bound_high;
569 unsigned int pci_offset_low, pci_offset_high; 556 unsigned int pci_offset_low, pci_offset_high;
570 unsigned long long vme_bound, pci_offset; 557 unsigned long long vme_bound, pci_offset;
558 struct vme_bridge *tsi148_bridge;
571 struct tsi148_driver *bridge; 559 struct tsi148_driver *bridge;
572 560
573 bridge = image->parent->driver_priv; 561 tsi148_bridge = image->parent;
562 bridge = tsi148_bridge->driver_priv;
574 563
575 i = image->number; 564 i = image->number;
576 565
@@ -597,7 +586,7 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
597 case VME_USER3: 586 case VME_USER3:
598 case VME_USER4: 587 case VME_USER4:
599 default: 588 default:
600 printk("Invalid address space\n"); 589 dev_err(tsi148_bridge->parent, "Invalid address space\n");
601 return -EINVAL; 590 return -EINVAL;
602 break; 591 break;
603 } 592 }
@@ -615,15 +604,16 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
615 reg_split(pci_offset, &pci_offset_high, &pci_offset_low); 604 reg_split(pci_offset, &pci_offset_high, &pci_offset_low);
616 605
617 if (vme_base_low & (granularity - 1)) { 606 if (vme_base_low & (granularity - 1)) {
618 printk("Invalid VME base alignment\n"); 607 dev_err(tsi148_bridge->parent, "Invalid VME base alignment\n");
619 return -EINVAL; 608 return -EINVAL;
620 } 609 }
621 if (vme_bound_low & (granularity - 1)) { 610 if (vme_bound_low & (granularity - 1)) {
622 printk("Invalid VME bound alignment\n"); 611 dev_err(tsi148_bridge->parent, "Invalid VME bound alignment\n");
623 return -EINVAL; 612 return -EINVAL;
624 } 613 }
625 if (pci_offset_low & (granularity - 1)) { 614 if (pci_offset_low & (granularity - 1)) {
626 printk("Invalid PCI Offset alignment\n"); 615 dev_err(tsi148_bridge->parent, "Invalid PCI Offset "
616 "alignment\n");
627 return -EINVAL; 617 return -EINVAL;
628 } 618 }
629 619
@@ -815,12 +805,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
815 805
816 tsi148_bridge = image->parent; 806 tsi148_bridge = image->parent;
817 807
818 /* Find pci_dev container of dev */ 808 pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev);
819 if (tsi148_bridge->parent == NULL) {
820 printk("Dev entry NULL\n");
821 return -EINVAL;
822 }
823 pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev);
824 809
825 existing_size = (unsigned long long)(image->bus_resource.end - 810 existing_size = (unsigned long long)(image->bus_resource.end -
826 image->bus_resource.start); 811 image->bus_resource.start);
@@ -839,15 +824,14 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
839 } 824 }
840 825
841 /* Exit here if size is zero */ 826 /* Exit here if size is zero */
842 if (size == 0) { 827 if (size == 0)
843 return 0; 828 return 0;
844 }
845 829
846 if (image->bus_resource.name == NULL) { 830 if (image->bus_resource.name == NULL) {
847 image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); 831 image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL);
848 if (image->bus_resource.name == NULL) { 832 if (image->bus_resource.name == NULL) {
849 printk(KERN_ERR "Unable to allocate memory for resource" 833 dev_err(tsi148_bridge->parent, "Unable to allocate "
850 " name\n"); 834 "memory for resource name\n");
851 retval = -ENOMEM; 835 retval = -ENOMEM;
852 goto err_name; 836 goto err_name;
853 } 837 }
@@ -864,8 +848,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
864 &(image->bus_resource), size, size, PCIBIOS_MIN_MEM, 848 &(image->bus_resource), size, size, PCIBIOS_MIN_MEM,
865 0, NULL, NULL); 849 0, NULL, NULL);
866 if (retval) { 850 if (retval) {
867 printk(KERN_ERR "Failed to allocate mem resource for " 851 dev_err(tsi148_bridge->parent, "Failed to allocate mem "
868 "window %d size 0x%lx start 0x%lx\n", 852 "resource for window %d size 0x%lx start 0x%lx\n",
869 image->number, (unsigned long)size, 853 image->number, (unsigned long)size,
870 (unsigned long)image->bus_resource.start); 854 (unsigned long)image->bus_resource.start);
871 goto err_resource; 855 goto err_resource;
@@ -874,7 +858,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
874 image->kern_base = ioremap_nocache( 858 image->kern_base = ioremap_nocache(
875 image->bus_resource.start, size); 859 image->bus_resource.start, size);
876 if (image->kern_base == NULL) { 860 if (image->kern_base == NULL) {
877 printk(KERN_ERR "Failed to remap resource\n"); 861 dev_err(tsi148_bridge->parent, "Failed to remap resource\n");
878 retval = -ENOMEM; 862 retval = -ENOMEM;
879 goto err_remap; 863 goto err_remap;
880 } 864 }
@@ -907,7 +891,7 @@ static void tsi148_free_resource(struct vme_master_resource *image)
907/* 891/*
908 * Set the attributes of an outbound window. 892 * Set the attributes of an outbound window.
909 */ 893 */
910int tsi148_master_set( struct vme_master_resource *image, int enabled, 894int tsi148_master_set(struct vme_master_resource *image, int enabled,
911 unsigned long long vme_base, unsigned long long size, 895 unsigned long long vme_base, unsigned long long size,
912 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 896 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth)
913{ 897{
@@ -918,19 +902,24 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
918 unsigned int pci_bound_low, pci_bound_high; 902 unsigned int pci_bound_low, pci_bound_high;
919 unsigned int vme_offset_low, vme_offset_high; 903 unsigned int vme_offset_low, vme_offset_high;
920 unsigned long long pci_bound, vme_offset, pci_base; 904 unsigned long long pci_bound, vme_offset, pci_base;
905 struct vme_bridge *tsi148_bridge;
921 struct tsi148_driver *bridge; 906 struct tsi148_driver *bridge;
922 907
923 bridge = image->parent->driver_priv; 908 tsi148_bridge = image->parent;
909
910 bridge = tsi148_bridge->driver_priv;
924 911
925 /* Verify input data */ 912 /* Verify input data */
926 if (vme_base & 0xFFFF) { 913 if (vme_base & 0xFFFF) {
927 printk(KERN_ERR "Invalid VME Window alignment\n"); 914 dev_err(tsi148_bridge->parent, "Invalid VME Window "
915 "alignment\n");
928 retval = -EINVAL; 916 retval = -EINVAL;
929 goto err_window; 917 goto err_window;
930 } 918 }
931 919
932 if ((size == 0) && (enabled != 0)) { 920 if ((size == 0) && (enabled != 0)) {
933 printk(KERN_ERR "Size must be non-zero for enabled windows\n"); 921 dev_err(tsi148_bridge->parent, "Size must be non-zero for "
922 "enabled windows\n");
934 retval = -EINVAL; 923 retval = -EINVAL;
935 goto err_window; 924 goto err_window;
936 } 925 }
@@ -944,7 +933,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
944 retval = tsi148_alloc_resource(image, size); 933 retval = tsi148_alloc_resource(image, size);
945 if (retval) { 934 if (retval) {
946 spin_unlock(&(image->lock)); 935 spin_unlock(&(image->lock));
947 printk(KERN_ERR "Unable to allocate memory for " 936 dev_err(tsi148_bridge->parent, "Unable to allocate memory for "
948 "resource\n"); 937 "resource\n");
949 goto err_res; 938 goto err_res;
950 } 939 }
@@ -971,19 +960,20 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
971 960
972 if (pci_base_low & 0xFFFF) { 961 if (pci_base_low & 0xFFFF) {
973 spin_unlock(&(image->lock)); 962 spin_unlock(&(image->lock));
974 printk(KERN_ERR "Invalid PCI base alignment\n"); 963 dev_err(tsi148_bridge->parent, "Invalid PCI base alignment\n");
975 retval = -EINVAL; 964 retval = -EINVAL;
976 goto err_gran; 965 goto err_gran;
977 } 966 }
978 if (pci_bound_low & 0xFFFF) { 967 if (pci_bound_low & 0xFFFF) {
979 spin_unlock(&(image->lock)); 968 spin_unlock(&(image->lock));
980 printk(KERN_ERR "Invalid PCI bound alignment\n"); 969 dev_err(tsi148_bridge->parent, "Invalid PCI bound alignment\n");
981 retval = -EINVAL; 970 retval = -EINVAL;
982 goto err_gran; 971 goto err_gran;
983 } 972 }
984 if (vme_offset_low & 0xFFFF) { 973 if (vme_offset_low & 0xFFFF) {
985 spin_unlock(&(image->lock)); 974 spin_unlock(&(image->lock));
986 printk(KERN_ERR "Invalid VME Offset alignment\n"); 975 dev_err(tsi148_bridge->parent, "Invalid VME Offset "
976 "alignment\n");
987 retval = -EINVAL; 977 retval = -EINVAL;
988 goto err_gran; 978 goto err_gran;
989 } 979 }
@@ -1029,8 +1019,8 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
1029 temp_ctl |= TSI148_LCSR_OTAT_TM_2eSST; 1019 temp_ctl |= TSI148_LCSR_OTAT_TM_2eSST;
1030 } 1020 }
1031 if (cycle & VME_2eSSTB) { 1021 if (cycle & VME_2eSSTB) {
1032 printk(KERN_WARNING "Currently not setting Broadcast Select " 1022 dev_warn(tsi148_bridge->parent, "Currently not setting "
1033 "Registers\n"); 1023 "Broadcast Select Registers\n");
1034 temp_ctl &= ~TSI148_LCSR_OTAT_TM_M; 1024 temp_ctl &= ~TSI148_LCSR_OTAT_TM_M;
1035 temp_ctl |= TSI148_LCSR_OTAT_TM_2eSSTB; 1025 temp_ctl |= TSI148_LCSR_OTAT_TM_2eSSTB;
1036 } 1026 }
@@ -1046,7 +1036,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
1046 break; 1036 break;
1047 default: 1037 default:
1048 spin_unlock(&(image->lock)); 1038 spin_unlock(&(image->lock));
1049 printk(KERN_ERR "Invalid data width\n"); 1039 dev_err(tsi148_bridge->parent, "Invalid data width\n");
1050 retval = -EINVAL; 1040 retval = -EINVAL;
1051 goto err_dwidth; 1041 goto err_dwidth;
1052 } 1042 }
@@ -1083,7 +1073,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
1083 break; 1073 break;
1084 default: 1074 default:
1085 spin_unlock(&(image->lock)); 1075 spin_unlock(&(image->lock));
1086 printk(KERN_ERR "Invalid address space\n"); 1076 dev_err(tsi148_bridge->parent, "Invalid address space\n");
1087 retval = -EINVAL; 1077 retval = -EINVAL;
1088 goto err_aspace; 1078 goto err_aspace;
1089 break; 1079 break;
@@ -1137,7 +1127,7 @@ err_window:
1137 * 1127 *
1138 * XXX Not parsing prefetch information. 1128 * XXX Not parsing prefetch information.
1139 */ 1129 */
1140int __tsi148_master_get( struct vme_master_resource *image, int *enabled, 1130int __tsi148_master_get(struct vme_master_resource *image, int *enabled,
1141 unsigned long long *vme_base, unsigned long long *size, 1131 unsigned long long *vme_base, unsigned long long *size,
1142 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 1132 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth)
1143{ 1133{
@@ -1214,17 +1204,17 @@ int __tsi148_master_get( struct vme_master_resource *image, int *enabled,
1214 *cycle |= VME_2eSST320; 1204 *cycle |= VME_2eSST320;
1215 1205
1216 /* Setup cycle types */ 1206 /* Setup cycle types */
1217 if ((ctl & TSI148_LCSR_OTAT_TM_M ) == TSI148_LCSR_OTAT_TM_SCT) 1207 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_SCT)
1218 *cycle |= VME_SCT; 1208 *cycle |= VME_SCT;
1219 if ((ctl & TSI148_LCSR_OTAT_TM_M ) == TSI148_LCSR_OTAT_TM_BLT) 1209 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_BLT)
1220 *cycle |= VME_BLT; 1210 *cycle |= VME_BLT;
1221 if ((ctl & TSI148_LCSR_OTAT_TM_M ) == TSI148_LCSR_OTAT_TM_MBLT) 1211 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_MBLT)
1222 *cycle |= VME_MBLT; 1212 *cycle |= VME_MBLT;
1223 if ((ctl & TSI148_LCSR_OTAT_TM_M ) == TSI148_LCSR_OTAT_TM_2eVME) 1213 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_2eVME)
1224 *cycle |= VME_2eVME; 1214 *cycle |= VME_2eVME;
1225 if ((ctl & TSI148_LCSR_OTAT_TM_M ) == TSI148_LCSR_OTAT_TM_2eSST) 1215 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_2eSST)
1226 *cycle |= VME_2eSST; 1216 *cycle |= VME_2eSST;
1227 if ((ctl & TSI148_LCSR_OTAT_TM_M ) == TSI148_LCSR_OTAT_TM_2eSSTB) 1217 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_2eSSTB)
1228 *cycle |= VME_2eSSTB; 1218 *cycle |= VME_2eSSTB;
1229 1219
1230 if (ctl & TSI148_LCSR_OTAT_SUP) 1220 if (ctl & TSI148_LCSR_OTAT_SUP)
@@ -1247,7 +1237,7 @@ int __tsi148_master_get( struct vme_master_resource *image, int *enabled,
1247} 1237}
1248 1238
1249 1239
1250int tsi148_master_get( struct vme_master_resource *image, int *enabled, 1240int tsi148_master_get(struct vme_master_resource *image, int *enabled,
1251 unsigned long long *vme_base, unsigned long long *size, 1241 unsigned long long *vme_base, unsigned long long *size,
1252 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 1242 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth)
1253{ 1243{
@@ -1289,7 +1279,7 @@ ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf,
1289 1279
1290 vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, 1280 vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset,
1291 count); 1281 count);
1292 if(vme_err != NULL) { 1282 if (vme_err != NULL) {
1293 dev_err(image->parent->parent, "First VME read error detected " 1283 dev_err(image->parent->parent, "First VME read error detected "
1294 "an at address 0x%llx\n", vme_err->address); 1284 "an at address 0x%llx\n", vme_err->address);
1295 retval = vme_err->address - (vme_base + offset); 1285 retval = vme_err->address - (vme_base + offset);
@@ -1352,9 +1342,9 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf,
1352 1342
1353 vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, 1343 vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset,
1354 count); 1344 count);
1355 if(vme_err != NULL) { 1345 if (vme_err != NULL) {
1356 printk("First VME write error detected an at address 0x%llx\n", 1346 dev_warn(tsi148_bridge->parent, "First VME write error detected"
1357 vme_err->address); 1347 " an at address 0x%llx\n", vme_err->address);
1358 retval = vme_err->address - (vme_base + offset); 1348 retval = vme_err->address - (vme_base + offset);
1359 /* Clear down save errors in this address range */ 1349 /* Clear down save errors in this address range */
1360 tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset, 1350 tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset,
@@ -1428,8 +1418,8 @@ unsigned int tsi148_master_rmw(struct vme_master_resource *image,
1428 return result; 1418 return result;
1429} 1419}
1430 1420
1431static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, 1421static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr,
1432 vme_cycle_t cycle, vme_width_t dwidth) 1422 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth)
1433{ 1423{
1434 /* Setup 2eSST speeds */ 1424 /* Setup 2eSST speeds */
1435 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { 1425 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
@@ -1445,23 +1435,24 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
1445 } 1435 }
1446 1436
1447 /* Setup cycle types */ 1437 /* Setup cycle types */
1448 if (cycle & VME_SCT) { 1438 if (cycle & VME_SCT)
1449 *attr |= TSI148_LCSR_DSAT_TM_SCT; 1439 *attr |= TSI148_LCSR_DSAT_TM_SCT;
1450 } 1440
1451 if (cycle & VME_BLT) { 1441 if (cycle & VME_BLT)
1452 *attr |= TSI148_LCSR_DSAT_TM_BLT; 1442 *attr |= TSI148_LCSR_DSAT_TM_BLT;
1453 } 1443
1454 if (cycle & VME_MBLT) { 1444 if (cycle & VME_MBLT)
1455 *attr |= TSI148_LCSR_DSAT_TM_MBLT; 1445 *attr |= TSI148_LCSR_DSAT_TM_MBLT;
1456 } 1446
1457 if (cycle & VME_2eVME) { 1447 if (cycle & VME_2eVME)
1458 *attr |= TSI148_LCSR_DSAT_TM_2eVME; 1448 *attr |= TSI148_LCSR_DSAT_TM_2eVME;
1459 } 1449
1460 if (cycle & VME_2eSST) { 1450 if (cycle & VME_2eSST)
1461 *attr |= TSI148_LCSR_DSAT_TM_2eSST; 1451 *attr |= TSI148_LCSR_DSAT_TM_2eSST;
1462 } 1452
1463 if (cycle & VME_2eSSTB) { 1453 if (cycle & VME_2eSSTB) {
1464 printk("Currently not setting Broadcast Select Registers\n"); 1454 dev_err(dev, "Currently not setting Broadcast Select "
1455 "Registers\n");
1465 *attr |= TSI148_LCSR_DSAT_TM_2eSSTB; 1456 *attr |= TSI148_LCSR_DSAT_TM_2eSSTB;
1466 } 1457 }
1467 1458
@@ -1474,7 +1465,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
1474 *attr |= TSI148_LCSR_DSAT_DBW_32; 1465 *attr |= TSI148_LCSR_DSAT_DBW_32;
1475 break; 1466 break;
1476 default: 1467 default:
1477 printk("Invalid data width\n"); 1468 dev_err(dev, "Invalid data width\n");
1478 return -EINVAL; 1469 return -EINVAL;
1479 } 1470 }
1480 1471
@@ -1508,7 +1499,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
1508 *attr |= TSI148_LCSR_DSAT_AMODE_USER4; 1499 *attr |= TSI148_LCSR_DSAT_AMODE_USER4;
1509 break; 1500 break;
1510 default: 1501 default:
1511 printk("Invalid address space\n"); 1502 dev_err(dev, "Invalid address space\n");
1512 return -EINVAL; 1503 return -EINVAL;
1513 break; 1504 break;
1514 } 1505 }
@@ -1521,8 +1512,8 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
1521 return 0; 1512 return 0;
1522} 1513}
1523 1514
1524static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, 1515static int tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr,
1525 vme_cycle_t cycle, vme_width_t dwidth) 1516 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth)
1526{ 1517{
1527 /* Setup 2eSST speeds */ 1518 /* Setup 2eSST speeds */
1528 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { 1519 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
@@ -1538,23 +1529,24 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace,
1538 } 1529 }
1539 1530
1540 /* Setup cycle types */ 1531 /* Setup cycle types */
1541 if (cycle & VME_SCT) { 1532 if (cycle & VME_SCT)
1542 *attr |= TSI148_LCSR_DDAT_TM_SCT; 1533 *attr |= TSI148_LCSR_DDAT_TM_SCT;
1543 } 1534
1544 if (cycle & VME_BLT) { 1535 if (cycle & VME_BLT)
1545 *attr |= TSI148_LCSR_DDAT_TM_BLT; 1536 *attr |= TSI148_LCSR_DDAT_TM_BLT;
1546 } 1537
1547 if (cycle & VME_MBLT) { 1538 if (cycle & VME_MBLT)
1548 *attr |= TSI148_LCSR_DDAT_TM_MBLT; 1539 *attr |= TSI148_LCSR_DDAT_TM_MBLT;
1549 } 1540
1550 if (cycle & VME_2eVME) { 1541 if (cycle & VME_2eVME)
1551 *attr |= TSI148_LCSR_DDAT_TM_2eVME; 1542 *attr |= TSI148_LCSR_DDAT_TM_2eVME;
1552 } 1543
1553 if (cycle & VME_2eSST) { 1544 if (cycle & VME_2eSST)
1554 *attr |= TSI148_LCSR_DDAT_TM_2eSST; 1545 *attr |= TSI148_LCSR_DDAT_TM_2eSST;
1555 } 1546
1556 if (cycle & VME_2eSSTB) { 1547 if (cycle & VME_2eSSTB) {
1557 printk("Currently not setting Broadcast Select Registers\n"); 1548 dev_err(dev, "Currently not setting Broadcast Select "
1549 "Registers\n");
1558 *attr |= TSI148_LCSR_DDAT_TM_2eSSTB; 1550 *attr |= TSI148_LCSR_DDAT_TM_2eSSTB;
1559 } 1551 }
1560 1552
@@ -1567,7 +1559,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace,
1567 *attr |= TSI148_LCSR_DDAT_DBW_32; 1559 *attr |= TSI148_LCSR_DDAT_DBW_32;
1568 break; 1560 break;
1569 default: 1561 default:
1570 printk("Invalid data width\n"); 1562 dev_err(dev, "Invalid data width\n");
1571 return -EINVAL; 1563 return -EINVAL;
1572 } 1564 }
1573 1565
@@ -1601,7 +1593,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace,
1601 *attr |= TSI148_LCSR_DDAT_AMODE_USER4; 1593 *attr |= TSI148_LCSR_DDAT_AMODE_USER4;
1602 break; 1594 break;
1603 default: 1595 default:
1604 printk("Invalid address space\n"); 1596 dev_err(dev, "Invalid address space\n");
1605 return -EINVAL; 1597 return -EINVAL;
1606 break; 1598 break;
1607 } 1599 }
@@ -1617,7 +1609,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace,
1617/* 1609/*
1618 * Add a link list descriptor to the list 1610 * Add a link list descriptor to the list
1619 */ 1611 */
1620int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, 1612int tsi148_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
1621 struct vme_dma_attr *dest, size_t count) 1613 struct vme_dma_attr *dest, size_t count)
1622{ 1614{
1623 struct tsi148_dma_entry *entry, *prev; 1615 struct tsi148_dma_entry *entry, *prev;
@@ -1627,21 +1619,24 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
1627 struct vme_dma_vme *vme_attr; 1619 struct vme_dma_vme *vme_attr;
1628 dma_addr_t desc_ptr; 1620 dma_addr_t desc_ptr;
1629 int retval = 0; 1621 int retval = 0;
1622 struct vme_bridge *tsi148_bridge;
1623
1624 tsi148_bridge = list->parent->parent;
1630 1625
1631 /* Descriptor must be aligned on 64-bit boundaries */ 1626 /* Descriptor must be aligned on 64-bit boundaries */
1632 entry = (struct tsi148_dma_entry *)kmalloc( 1627 entry = kmalloc(sizeof(struct tsi148_dma_entry), GFP_KERNEL);
1633 sizeof(struct tsi148_dma_entry), GFP_KERNEL);
1634 if (entry == NULL) { 1628 if (entry == NULL) {
1635 printk("Failed to allocate memory for dma resource " 1629 dev_err(tsi148_bridge->parent, "Failed to allocate memory for "
1636 "structure\n"); 1630 "dma resource structure\n");
1637 retval = -ENOMEM; 1631 retval = -ENOMEM;
1638 goto err_mem; 1632 goto err_mem;
1639 } 1633 }
1640 1634
1641 /* Test descriptor alignment */ 1635 /* Test descriptor alignment */
1642 if ((unsigned long)&(entry->descriptor) & 0x7) { 1636 if ((unsigned long)&(entry->descriptor) & 0x7) {
1643 printk("Descriptor not aligned to 8 byte boundary as " 1637 dev_err(tsi148_bridge->parent, "Descriptor not aligned to 8 "
1644 "required: %p\n", &(entry->descriptor)); 1638 "byte boundary as required: %p\n",
1639 &(entry->descriptor));
1645 retval = -EINVAL; 1640 retval = -EINVAL;
1646 goto err_align; 1641 goto err_align;
1647 } 1642 }
@@ -1659,13 +1654,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
1659 entry->descriptor.dsal = pattern_attr->pattern; 1654 entry->descriptor.dsal = pattern_attr->pattern;
1660 entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_PAT; 1655 entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_PAT;
1661 /* Default behaviour is 32 bit pattern */ 1656 /* Default behaviour is 32 bit pattern */
1662 if (pattern_attr->type & VME_DMA_PATTERN_BYTE) { 1657 if (pattern_attr->type & VME_DMA_PATTERN_BYTE)
1663 entry->descriptor.dsat |= TSI148_LCSR_DSAT_PSZ; 1658 entry->descriptor.dsat |= TSI148_LCSR_DSAT_PSZ;
1664 } 1659
1665 /* It seems that the default behaviour is to increment */ 1660 /* It seems that the default behaviour is to increment */
1666 if ((pattern_attr->type & VME_DMA_PATTERN_INCREMENT) == 0) { 1661 if ((pattern_attr->type & VME_DMA_PATTERN_INCREMENT) == 0)
1667 entry->descriptor.dsat |= TSI148_LCSR_DSAT_NIN; 1662 entry->descriptor.dsat |= TSI148_LCSR_DSAT_NIN;
1668 } 1663
1669 break; 1664 break;
1670 case VME_DMA_PCI: 1665 case VME_DMA_PCI:
1671 pci_attr = (struct vme_dma_pci *)src->private; 1666 pci_attr = (struct vme_dma_pci *)src->private;
@@ -1686,13 +1681,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
1686 entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_VME; 1681 entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_VME;
1687 1682
1688 retval = tsi148_dma_set_vme_src_attributes( 1683 retval = tsi148_dma_set_vme_src_attributes(
1689 &(entry->descriptor.dsat), vme_attr->aspace, 1684 tsi148_bridge->parent, &(entry->descriptor.dsat),
1690 vme_attr->cycle, vme_attr->dwidth); 1685 vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth);
1691 if(retval < 0 ) 1686 if (retval < 0)
1692 goto err_source; 1687 goto err_source;
1693 break; 1688 break;
1694 default: 1689 default:
1695 printk("Invalid source type\n"); 1690 dev_err(tsi148_bridge->parent, "Invalid source type\n");
1696 retval = -EINVAL; 1691 retval = -EINVAL;
1697 goto err_source; 1692 goto err_source;
1698 break; 1693 break;
@@ -1724,13 +1719,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
1724 entry->descriptor.ddat = TSI148_LCSR_DDAT_TYP_VME; 1719 entry->descriptor.ddat = TSI148_LCSR_DDAT_TYP_VME;
1725 1720
1726 retval = tsi148_dma_set_vme_dest_attributes( 1721 retval = tsi148_dma_set_vme_dest_attributes(
1727 &(entry->descriptor.ddat), vme_attr->aspace, 1722 tsi148_bridge->parent, &(entry->descriptor.ddat),
1728 vme_attr->cycle, vme_attr->dwidth); 1723 vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth);
1729 if(retval < 0 ) 1724 if (retval < 0)
1730 goto err_dest; 1725 goto err_dest;
1731 break; 1726 break;
1732 default: 1727 default:
1733 printk("Invalid destination type\n"); 1728 dev_err(tsi148_bridge->parent, "Invalid destination type\n");
1734 retval = -EINVAL; 1729 retval = -EINVAL;
1735 goto err_dest; 1730 goto err_dest;
1736 break; 1731 break;
@@ -1743,7 +1738,7 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
1743 list_add_tail(&(entry->list), &(list->entries)); 1738 list_add_tail(&(entry->list), &(list->entries));
1744 1739
1745 /* Fill out previous descriptors "Next Address" */ 1740 /* Fill out previous descriptors "Next Address" */
1746 if(entry->list.prev != &(list->entries)){ 1741 if (entry->list.prev != &(list->entries)) {
1747 prev = list_entry(entry->list.prev, struct tsi148_dma_entry, 1742 prev = list_entry(entry->list.prev, struct tsi148_dma_entry,
1748 list); 1743 list);
1749 /* We need the bus address for the pointer */ 1744 /* We need the bus address for the pointer */
@@ -1795,17 +1790,20 @@ int tsi148_dma_list_exec(struct vme_dma_list *list)
1795 dma_addr_t bus_addr; 1790 dma_addr_t bus_addr;
1796 u32 bus_addr_high, bus_addr_low; 1791 u32 bus_addr_high, bus_addr_low;
1797 u32 val, dctlreg = 0; 1792 u32 val, dctlreg = 0;
1793 struct vme_bridge *tsi148_bridge;
1798 struct tsi148_driver *bridge; 1794 struct tsi148_driver *bridge;
1799 1795
1800 ctrlr = list->parent; 1796 ctrlr = list->parent;
1801 1797
1802 bridge = ctrlr->parent->driver_priv; 1798 tsi148_bridge = ctrlr->parent;
1799
1800 bridge = tsi148_bridge->driver_priv;
1803 1801
1804 mutex_lock(&(ctrlr->mtx)); 1802 mutex_lock(&(ctrlr->mtx));
1805 1803
1806 channel = ctrlr->number; 1804 channel = ctrlr->number;
1807 1805
1808 if (! list_empty(&(ctrlr->running))) { 1806 if (!list_empty(&(ctrlr->running))) {
1809 /* 1807 /*
1810 * XXX We have an active DMA transfer and currently haven't 1808 * XXX We have an active DMA transfer and currently haven't
1811 * sorted out the mechanism for "pending" DMA transfers. 1809 * sorted out the mechanism for "pending" DMA transfers.
@@ -1847,7 +1845,7 @@ int tsi148_dma_list_exec(struct vme_dma_list *list)
1847 TSI148_LCSR_OFFSET_DSTA); 1845 TSI148_LCSR_OFFSET_DSTA);
1848 1846
1849 if (val & TSI148_LCSR_DSTA_VBE) { 1847 if (val & TSI148_LCSR_DSTA_VBE) {
1850 printk(KERN_ERR "tsi148: DMA Error. DSTA=%08X\n", val); 1848 dev_err(tsi148_bridge->parent, "DMA Error. DSTA=%08X\n", val);
1851 retval = -EIO; 1849 retval = -EIO;
1852 } 1850 }
1853 1851
@@ -1867,7 +1865,7 @@ int tsi148_dma_list_exec(struct vme_dma_list *list)
1867int tsi148_dma_list_empty(struct vme_dma_list *list) 1865int tsi148_dma_list_empty(struct vme_dma_list *list)
1868{ 1866{
1869 struct list_head *pos, *temp; 1867 struct list_head *pos, *temp;
1870 struct tsi148_dma_entry *entry; 1868 struct tsi148_dma_entry *entry;
1871 1869
1872 /* detach and free each entry */ 1870 /* detach and free each entry */
1873 list_for_each_safe(pos, temp, &(list->entries)) { 1871 list_for_each_safe(pos, temp, &(list->entries)) {
@@ -1876,7 +1874,7 @@ int tsi148_dma_list_empty(struct vme_dma_list *list)
1876 kfree(entry); 1874 kfree(entry);
1877 } 1875 }
1878 1876
1879 return (0); 1877 return 0;
1880} 1878}
1881 1879
1882/* 1880/*
@@ -1891,9 +1889,12 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
1891{ 1889{
1892 u32 lm_base_high, lm_base_low, lm_ctl = 0; 1890 u32 lm_base_high, lm_base_low, lm_ctl = 0;
1893 int i; 1891 int i;
1892 struct vme_bridge *tsi148_bridge;
1894 struct tsi148_driver *bridge; 1893 struct tsi148_driver *bridge;
1895 1894
1896 bridge = lm->parent->driver_priv; 1895 tsi148_bridge = lm->parent;
1896
1897 bridge = tsi148_bridge->driver_priv;
1897 1898
1898 mutex_lock(&(lm->mtx)); 1899 mutex_lock(&(lm->mtx));
1899 1900
@@ -1901,8 +1902,8 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
1901 for (i = 0; i < lm->monitors; i++) { 1902 for (i = 0; i < lm->monitors; i++) {
1902 if (bridge->lm_callback[i] != NULL) { 1903 if (bridge->lm_callback[i] != NULL) {
1903 mutex_unlock(&(lm->mtx)); 1904 mutex_unlock(&(lm->mtx));
1904 printk("Location monitor callback attached, can't " 1905 dev_err(tsi148_bridge->parent, "Location monitor "
1905 "reset\n"); 1906 "callback attached, can't reset\n");
1906 return -EBUSY; 1907 return -EBUSY;
1907 } 1908 }
1908 } 1909 }
@@ -1922,7 +1923,7 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
1922 break; 1923 break;
1923 default: 1924 default:
1924 mutex_unlock(&(lm->mtx)); 1925 mutex_unlock(&(lm->mtx));
1925 printk("Invalid address space\n"); 1926 dev_err(tsi148_bridge->parent, "Invalid address space\n");
1926 return -EINVAL; 1927 return -EINVAL;
1927 break; 1928 break;
1928 } 1929 }
@@ -1969,18 +1970,18 @@ int tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base,
1969 if (lm_ctl & TSI148_LCSR_LMAT_EN) 1970 if (lm_ctl & TSI148_LCSR_LMAT_EN)
1970 enabled = 1; 1971 enabled = 1;
1971 1972
1972 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A16) { 1973 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A16)
1973 *aspace |= VME_A16; 1974 *aspace |= VME_A16;
1974 } 1975
1975 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A24) { 1976 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A24)
1976 *aspace |= VME_A24; 1977 *aspace |= VME_A24;
1977 } 1978
1978 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A32) { 1979 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A32)
1979 *aspace |= VME_A32; 1980 *aspace |= VME_A32;
1980 } 1981
1981 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A64) { 1982 if ((lm_ctl & TSI148_LCSR_LMAT_AS_M) == TSI148_LCSR_LMAT_AS_A64)
1982 *aspace |= VME_A64; 1983 *aspace |= VME_A64;
1983 } 1984
1984 1985
1985 if (lm_ctl & TSI148_LCSR_LMAT_SUPR) 1986 if (lm_ctl & TSI148_LCSR_LMAT_SUPR)
1986 *cycle |= VME_SUPER; 1987 *cycle |= VME_SUPER;
@@ -2005,9 +2006,12 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor,
2005 void (*callback)(int)) 2006 void (*callback)(int))
2006{ 2007{
2007 u32 lm_ctl, tmp; 2008 u32 lm_ctl, tmp;
2009 struct vme_bridge *tsi148_bridge;
2008 struct tsi148_driver *bridge; 2010 struct tsi148_driver *bridge;
2009 2011
2010 bridge = lm->parent->driver_priv; 2012 tsi148_bridge = lm->parent;
2013
2014 bridge = tsi148_bridge->driver_priv;
2011 2015
2012 mutex_lock(&(lm->mtx)); 2016 mutex_lock(&(lm->mtx));
2013 2017
@@ -2015,14 +2019,15 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor,
2015 lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT); 2019 lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT);
2016 if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) { 2020 if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) {
2017 mutex_unlock(&(lm->mtx)); 2021 mutex_unlock(&(lm->mtx));
2018 printk("Location monitor not properly configured\n"); 2022 dev_err(tsi148_bridge->parent, "Location monitor not properly "
2023 "configured\n");
2019 return -EINVAL; 2024 return -EINVAL;
2020 } 2025 }
2021 2026
2022 /* Check that a callback isn't already attached */ 2027 /* Check that a callback isn't already attached */
2023 if (bridge->lm_callback[monitor] != NULL) { 2028 if (bridge->lm_callback[monitor] != NULL) {
2024 mutex_unlock(&(lm->mtx)); 2029 mutex_unlock(&(lm->mtx));
2025 printk("Existing callback attached\n"); 2030 dev_err(tsi148_bridge->parent, "Existing callback attached\n");
2026 return -EBUSY; 2031 return -EBUSY;
2027 } 2032 }
2028 2033
@@ -2094,7 +2099,7 @@ int tsi148_lm_detach(struct vme_lm_resource *lm, int monitor)
2094 */ 2099 */
2095int tsi148_slot_get(struct vme_bridge *tsi148_bridge) 2100int tsi148_slot_get(struct vme_bridge *tsi148_bridge)
2096{ 2101{
2097 u32 slot = 0; 2102 u32 slot = 0;
2098 struct tsi148_driver *bridge; 2103 struct tsi148_driver *bridge;
2099 2104
2100 bridge = tsi148_bridge->driver_priv; 2105 bridge = tsi148_bridge->driver_priv;
@@ -2139,8 +2144,8 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge,
2139 bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, 2144 bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE,
2140 &(bridge->crcsr_bus)); 2145 &(bridge->crcsr_bus));
2141 if (bridge->crcsr_kernel == NULL) { 2146 if (bridge->crcsr_kernel == NULL) {
2142 dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " 2147 dev_err(tsi148_bridge->parent, "Failed to allocate memory for "
2143 "image\n"); 2148 "CR/CSR image\n");
2144 return -ENOMEM; 2149 return -ENOMEM;
2145 } 2150 }
2146 2151
@@ -2159,29 +2164,30 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge,
2159 2164
2160 if (cbar != vstat) { 2165 if (cbar != vstat) {
2161 cbar = vstat; 2166 cbar = vstat;
2162 dev_info(&pdev->dev, "Setting CR/CSR offset\n"); 2167 dev_info(tsi148_bridge->parent, "Setting CR/CSR offset\n");
2163 iowrite32be(cbar<<3, bridge->base + TSI148_CBAR); 2168 iowrite32be(cbar<<3, bridge->base + TSI148_CBAR);
2164 } 2169 }
2165 dev_info(&pdev->dev, "CR/CSR Offset: %d\n", cbar); 2170 dev_info(tsi148_bridge->parent, "CR/CSR Offset: %d\n", cbar);
2166 2171
2167 crat = ioread32be(bridge->base + TSI148_LCSR_CRAT); 2172 crat = ioread32be(bridge->base + TSI148_LCSR_CRAT);
2168 if (crat & TSI148_LCSR_CRAT_EN) { 2173 if (crat & TSI148_LCSR_CRAT_EN) {
2169 dev_info(&pdev->dev, "Enabling CR/CSR space\n"); 2174 dev_info(tsi148_bridge->parent, "Enabling CR/CSR space\n");
2170 iowrite32be(crat | TSI148_LCSR_CRAT_EN, 2175 iowrite32be(crat | TSI148_LCSR_CRAT_EN,
2171 bridge->base + TSI148_LCSR_CRAT); 2176 bridge->base + TSI148_LCSR_CRAT);
2172 } else 2177 } else
2173 dev_info(&pdev->dev, "CR/CSR already enabled\n"); 2178 dev_info(tsi148_bridge->parent, "CR/CSR already enabled\n");
2174 2179
2175 /* If we want flushed, error-checked writes, set up a window 2180 /* If we want flushed, error-checked writes, set up a window
2176 * over the CR/CSR registers. We read from here to safely flush 2181 * over the CR/CSR registers. We read from here to safely flush
2177 * through VME writes. 2182 * through VME writes.
2178 */ 2183 */
2179 if(err_chk) { 2184 if (err_chk) {
2180 retval = tsi148_master_set(bridge->flush_image, 1, 2185 retval = tsi148_master_set(bridge->flush_image, 1,
2181 (vstat * 0x80000), 0x80000, VME_CRCSR, VME_SCT, 2186 (vstat * 0x80000), 0x80000, VME_CRCSR, VME_SCT,
2182 VME_D16); 2187 VME_D16);
2183 if (retval) 2188 if (retval)
2184 dev_err(&pdev->dev, "Configuring flush image failed\n"); 2189 dev_err(tsi148_bridge->parent, "Configuring flush image"
2190 " failed\n");
2185 } 2191 }
2186 2192
2187 return 0; 2193 return 0;
@@ -2224,8 +2230,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2224 /* If we want to support more than one of each bridge, we need to 2230 /* If we want to support more than one of each bridge, we need to
2225 * dynamically generate this so we get one per device 2231 * dynamically generate this so we get one per device
2226 */ 2232 */
2227 tsi148_bridge = (struct vme_bridge *)kmalloc(sizeof(struct vme_bridge), 2233 tsi148_bridge = kzalloc(sizeof(struct vme_bridge), GFP_KERNEL);
2228 GFP_KERNEL);
2229 if (tsi148_bridge == NULL) { 2234 if (tsi148_bridge == NULL) {
2230 dev_err(&pdev->dev, "Failed to allocate memory for device " 2235 dev_err(&pdev->dev, "Failed to allocate memory for device "
2231 "structure\n"); 2236 "structure\n");
@@ -2233,9 +2238,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2233 goto err_struct; 2238 goto err_struct;
2234 } 2239 }
2235 2240
2236 memset(tsi148_bridge, 0, sizeof(struct vme_bridge)); 2241 tsi148_device = kzalloc(sizeof(struct tsi148_driver), GFP_KERNEL);
2237
2238 tsi148_device = kmalloc(sizeof(struct tsi148_driver), GFP_KERNEL);
2239 if (tsi148_device == NULL) { 2242 if (tsi148_device == NULL) {
2240 dev_err(&pdev->dev, "Failed to allocate memory for device " 2243 dev_err(&pdev->dev, "Failed to allocate memory for device "
2241 "structure\n"); 2244 "structure\n");
@@ -2243,8 +2246,6 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2243 goto err_driver; 2246 goto err_driver;
2244 } 2247 }
2245 2248
2246 memset(tsi148_device, 0, sizeof(struct tsi148_driver));
2247
2248 tsi148_bridge->driver_priv = tsi148_device; 2249 tsi148_bridge->driver_priv = tsi148_device;
2249 2250
2250 /* Enable the device */ 2251 /* Enable the device */
@@ -2301,10 +2302,10 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2301 * hence have one less master window resource available. 2302 * hence have one less master window resource available.
2302 */ 2303 */
2303 master_num = TSI148_MAX_MASTER; 2304 master_num = TSI148_MAX_MASTER;
2304 if(err_chk){ 2305 if (err_chk) {
2305 master_num--; 2306 master_num--;
2306 2307
2307 tsi148_device->flush_image = (struct vme_master_resource *) 2308 tsi148_device->flush_image =
2308 kmalloc(sizeof(struct vme_master_resource), GFP_KERNEL); 2309 kmalloc(sizeof(struct vme_master_resource), GFP_KERNEL);
2309 if (tsi148_device->flush_image == NULL) { 2310 if (tsi148_device->flush_image == NULL) {
2310 dev_err(&pdev->dev, "Failed to allocate memory for " 2311 dev_err(&pdev->dev, "Failed to allocate memory for "
@@ -2331,8 +2332,8 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2331 /* Add master windows to list */ 2332 /* Add master windows to list */
2332 INIT_LIST_HEAD(&(tsi148_bridge->master_resources)); 2333 INIT_LIST_HEAD(&(tsi148_bridge->master_resources));
2333 for (i = 0; i < master_num; i++) { 2334 for (i = 0; i < master_num; i++) {
2334 master_image = (struct vme_master_resource *)kmalloc( 2335 master_image = kmalloc(sizeof(struct vme_master_resource),
2335 sizeof(struct vme_master_resource), GFP_KERNEL); 2336 GFP_KERNEL);
2336 if (master_image == NULL) { 2337 if (master_image == NULL) {
2337 dev_err(&pdev->dev, "Failed to allocate memory for " 2338 dev_err(&pdev->dev, "Failed to allocate memory for "
2338 "master resource structure\n"); 2339 "master resource structure\n");
@@ -2360,8 +2361,8 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2360 /* Add slave windows to list */ 2361 /* Add slave windows to list */
2361 INIT_LIST_HEAD(&(tsi148_bridge->slave_resources)); 2362 INIT_LIST_HEAD(&(tsi148_bridge->slave_resources));
2362 for (i = 0; i < TSI148_MAX_SLAVE; i++) { 2363 for (i = 0; i < TSI148_MAX_SLAVE; i++) {
2363 slave_image = (struct vme_slave_resource *)kmalloc( 2364 slave_image = kmalloc(sizeof(struct vme_slave_resource),
2364 sizeof(struct vme_slave_resource), GFP_KERNEL); 2365 GFP_KERNEL);
2365 if (slave_image == NULL) { 2366 if (slave_image == NULL) {
2366 dev_err(&pdev->dev, "Failed to allocate memory for " 2367 dev_err(&pdev->dev, "Failed to allocate memory for "
2367 "slave resource structure\n"); 2368 "slave resource structure\n");
@@ -2386,8 +2387,8 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2386 /* Add dma engines to list */ 2387 /* Add dma engines to list */
2387 INIT_LIST_HEAD(&(tsi148_bridge->dma_resources)); 2388 INIT_LIST_HEAD(&(tsi148_bridge->dma_resources));
2388 for (i = 0; i < TSI148_MAX_DMA; i++) { 2389 for (i = 0; i < TSI148_MAX_DMA; i++) {
2389 dma_ctrlr = (struct vme_dma_resource *)kmalloc( 2390 dma_ctrlr = kmalloc(sizeof(struct vme_dma_resource),
2390 sizeof(struct vme_dma_resource), GFP_KERNEL); 2391 GFP_KERNEL);
2391 if (dma_ctrlr == NULL) { 2392 if (dma_ctrlr == NULL) {
2392 dev_err(&pdev->dev, "Failed to allocate memory for " 2393 dev_err(&pdev->dev, "Failed to allocate memory for "
2393 "dma resource structure\n"); 2394 "dma resource structure\n");
@@ -2444,7 +2445,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2444 2445
2445 data = ioread32be(tsi148_device->base + TSI148_LCSR_VSTAT); 2446 data = ioread32be(tsi148_device->base + TSI148_LCSR_VSTAT);
2446 dev_info(&pdev->dev, "Board is%s the VME system controller\n", 2447 dev_info(&pdev->dev, "Board is%s the VME system controller\n",
2447 (data & TSI148_LCSR_VSTAT_SCONS)? "" : " not"); 2448 (data & TSI148_LCSR_VSTAT_SCONS) ? "" : " not");
2448 if (!geoid) 2449 if (!geoid)
2449 dev_info(&pdev->dev, "VME geographical address is %d\n", 2450 dev_info(&pdev->dev, "VME geographical address is %d\n",
2450 data & TSI148_LCSR_VSTAT_GA_M); 2451 data & TSI148_LCSR_VSTAT_GA_M);
@@ -2504,7 +2505,8 @@ err_slave:
2504err_master: 2505err_master:
2505 /* resources are stored in link list */ 2506 /* resources are stored in link list */
2506 list_for_each(pos, &(tsi148_bridge->master_resources)) { 2507 list_for_each(pos, &(tsi148_bridge->master_resources)) {
2507 master_image = list_entry(pos, struct vme_master_resource, list); 2508 master_image = list_entry(pos, struct vme_master_resource,
2509 list);
2508 list_del(pos); 2510 list_del(pos);
2509 kfree(master_image); 2511 kfree(master_image);
2510 } 2512 }
@@ -2624,8 +2626,6 @@ static void tsi148_remove(struct pci_dev *pdev)
2624static void __exit tsi148_exit(void) 2626static void __exit tsi148_exit(void)
2625{ 2627{
2626 pci_unregister_driver(&tsi148_driver); 2628 pci_unregister_driver(&tsi148_driver);
2627
2628 printk(KERN_DEBUG "Driver removed.\n");
2629} 2629}
2630 2630
2631MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes"); 2631MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes");
diff --git a/drivers/staging/vme/bridges/vme_tsi148.h b/drivers/staging/vme/bridges/vme_tsi148.h
index 9e5f7fa1d744..bda64ef85754 100644
--- a/drivers/staging/vme/bridges/vme_tsi148.h
+++ b/drivers/staging/vme/bridges/vme_tsi148.h
@@ -579,7 +579,7 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
579/* 579/*
580 * Memory Base Address Lower Reg (CRG + $010) 580 * Memory Base Address Lower Reg (CRG + $010)
581 */ 581 */
582#define TSI148_PCFS_MBARL_BASEL_M (0xFFFFF<<12) /* Base Addr Lower Mask */ 582#define TSI148_PCFS_MBARL_BASEL_M (0xFFFFF<<12) /* Base Addr Lower Mask */
583#define TSI148_PCFS_MBARL_PRE (1<<3) /* Prefetch */ 583#define TSI148_PCFS_MBARL_PRE (1<<3) /* Prefetch */
584#define TSI148_PCFS_MBARL_MTYPE_M (3<<1) /* Memory Type Mask */ 584#define TSI148_PCFS_MBARL_MTYPE_M (3<<1) /* Memory Type Mask */
585#define TSI148_PCFS_MBARL_IOMEM (1<<0) /* I/O Space Indicator */ 585#define TSI148_PCFS_MBARL_IOMEM (1<<0) /* I/O Space Indicator */
@@ -615,7 +615,8 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
615 */ 615 */
616#define TSI148_PCFS_PCIXSTAT_RSCEM (1<<29) /* Recieved Split Comp Error */ 616#define TSI148_PCFS_PCIXSTAT_RSCEM (1<<29) /* Recieved Split Comp Error */
617#define TSI148_PCFS_PCIXSTAT_DMCRS_M (7<<26) /* max Cumulative Read Size */ 617#define TSI148_PCFS_PCIXSTAT_DMCRS_M (7<<26) /* max Cumulative Read Size */
618#define TSI148_PCFS_PCIXSTAT_DMOST_M (7<<23) /* max outstanding Split Trans */ 618#define TSI148_PCFS_PCIXSTAT_DMOST_M (7<<23) /* max outstanding Split Trans
619 */
619#define TSI148_PCFS_PCIXSTAT_DMMRC_M (3<<21) /* max mem read byte count */ 620#define TSI148_PCFS_PCIXSTAT_DMMRC_M (3<<21) /* max mem read byte count */
620#define TSI148_PCFS_PCIXSTAT_DC (1<<20) /* Device Complexity */ 621#define TSI148_PCFS_PCIXSTAT_DC (1<<20) /* Device Complexity */
621#define TSI148_PCFS_PCIXSTAT_USC (1<<19) /* Unexpected Split comp */ 622#define TSI148_PCFS_PCIXSTAT_USC (1<<19) /* Unexpected Split comp */
@@ -703,7 +704,8 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
703 704
704#define TSI148_LCSR_VMCTRL_RMWEN (1<<20) /* RMW Enable */ 705#define TSI148_LCSR_VMCTRL_RMWEN (1<<20) /* RMW Enable */
705 706
706#define TSI148_LCSR_VMCTRL_ATO_M (7<<16) /* Master Access Time-out Mask */ 707#define TSI148_LCSR_VMCTRL_ATO_M (7<<16) /* Master Access Time-out Mask
708 */
707#define TSI148_LCSR_VMCTRL_ATO_32 (0<<16) /* 32 us */ 709#define TSI148_LCSR_VMCTRL_ATO_32 (0<<16) /* 32 us */
708#define TSI148_LCSR_VMCTRL_ATO_128 (1<<16) /* 128 us */ 710#define TSI148_LCSR_VMCTRL_ATO_128 (1<<16) /* 128 us */
709#define TSI148_LCSR_VMCTRL_ATO_512 (2<<16) /* 512 us */ 711#define TSI148_LCSR_VMCTRL_ATO_512 (2<<16) /* 512 us */
@@ -733,14 +735,16 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
733#define TSI148_LCSR_VMCTRL_VTON_256 (6<<8) /* 256us */ 735#define TSI148_LCSR_VMCTRL_VTON_256 (6<<8) /* 256us */
734#define TSI148_LCSR_VMCTRL_VTON_512 (7<<8) /* 512us */ 736#define TSI148_LCSR_VMCTRL_VTON_512 (7<<8) /* 512us */
735 737
736#define TSI148_LCSR_VMCTRL_VREL_M (3<<3) /* VMEbus Master Rel Mode Mask */ 738#define TSI148_LCSR_VMCTRL_VREL_M (3<<3) /* VMEbus Master Rel Mode Mask
739 */
737#define TSI148_LCSR_VMCTRL_VREL_T_D (0<<3) /* Time on or Done */ 740#define TSI148_LCSR_VMCTRL_VREL_T_D (0<<3) /* Time on or Done */
738#define TSI148_LCSR_VMCTRL_VREL_T_R_D (1<<3) /* Time on and REQ or Done */ 741#define TSI148_LCSR_VMCTRL_VREL_T_R_D (1<<3) /* Time on and REQ or Done */
739#define TSI148_LCSR_VMCTRL_VREL_T_B_D (2<<3) /* Time on and BCLR or Done */ 742#define TSI148_LCSR_VMCTRL_VREL_T_B_D (2<<3) /* Time on and BCLR or Done */
740#define TSI148_LCSR_VMCTRL_VREL_T_D_R (3<<3) /* Time on or Done and REQ */ 743#define TSI148_LCSR_VMCTRL_VREL_T_D_R (3<<3) /* Time on or Done and REQ */
741 744
742#define TSI148_LCSR_VMCTRL_VFAIR (1<<2) /* VMEbus Master Fair Mode */ 745#define TSI148_LCSR_VMCTRL_VFAIR (1<<2) /* VMEbus Master Fair Mode */
743#define TSI148_LCSR_VMCTRL_VREQL_M (3<<0) /* VMEbus Master Req Level Mask */ 746#define TSI148_LCSR_VMCTRL_VREQL_M (3<<0) /* VMEbus Master Req Level Mask
747 */
744 748
745/* 749/*
746 * VMEbus Control Register CRG+$238 750 * VMEbus Control Register CRG+$238
@@ -762,7 +766,8 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
762#define TSI148_LCSR_VCTRL_DLT_16384 (0xB<<24) /* 16384 VCLKS */ 766#define TSI148_LCSR_VCTRL_DLT_16384 (0xB<<24) /* 16384 VCLKS */
763#define TSI148_LCSR_VCTRL_DLT_32768 (0xC<<24) /* 32768 VCLKS */ 767#define TSI148_LCSR_VCTRL_DLT_32768 (0xC<<24) /* 32768 VCLKS */
764 768
765#define TSI148_LCSR_VCTRL_NERBB (1<<20) /* No Early Release of Bus Busy */ 769#define TSI148_LCSR_VCTRL_NERBB (1<<20) /* No Early Release of Bus Busy
770 */
766 771
767#define TSI148_LCSR_VCTRL_SRESET (1<<17) /* System Reset */ 772#define TSI148_LCSR_VCTRL_SRESET (1<<17) /* System Reset */
768#define TSI148_LCSR_VCTRL_LRESET (1<<16) /* Local Reset */ 773#define TSI148_LCSR_VCTRL_LRESET (1<<16) /* Local Reset */
@@ -773,7 +778,8 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
773#define TSI148_LCSR_VCTRL_ATOEN (1<<7) /* Arbiter Time-out Enable */ 778#define TSI148_LCSR_VCTRL_ATOEN (1<<7) /* Arbiter Time-out Enable */
774#define TSI148_LCSR_VCTRL_ROBIN (1<<6) /* VMEbus Round Robin */ 779#define TSI148_LCSR_VCTRL_ROBIN (1<<6) /* VMEbus Round Robin */
775 780
776#define TSI148_LCSR_VCTRL_GTO_M (7<<0) /* VMEbus Global Time-out Mask */ 781#define TSI148_LCSR_VCTRL_GTO_M (7<<0) /* VMEbus Global Time-out Mask
782 */
777#define TSI148_LCSR_VCTRL_GTO_8 (0<<0) /* 8 us */ 783#define TSI148_LCSR_VCTRL_GTO_8 (0<<0) /* 8 us */
778#define TSI148_LCSR_VCTRL_GTO_16 (1<<0) /* 16 us */ 784#define TSI148_LCSR_VCTRL_GTO_16 (1<<0) /* 16 us */
779#define TSI148_LCSR_VCTRL_GTO_32 (2<<0) /* 32 us */ 785#define TSI148_LCSR_VCTRL_GTO_32 (2<<0) /* 32 us */
@@ -794,7 +800,7 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
794#define TSI148_LCSR_VSTAT_ACFAILS (1<<9) /* AC fail status */ 800#define TSI148_LCSR_VSTAT_ACFAILS (1<<9) /* AC fail status */
795#define TSI148_LCSR_VSTAT_SCONS (1<<8) /* System Cont Status */ 801#define TSI148_LCSR_VSTAT_SCONS (1<<8) /* System Cont Status */
796#define TSI148_LCSR_VSTAT_GAP (1<<5) /* Geographic Addr Parity */ 802#define TSI148_LCSR_VSTAT_GAP (1<<5) /* Geographic Addr Parity */
797#define TSI148_LCSR_VSTAT_GA_M (0x1F<<0) /* Geographic Addr Mask */ 803#define TSI148_LCSR_VSTAT_GA_M (0x1F<<0) /* Geographic Addr Mask */
798 804
799/* 805/*
800 * PCI Configuration Status Register CRG+$240 806 * PCI Configuration Status Register CRG+$240
@@ -1341,7 +1347,7 @@ static const int TSI148_LCSR_INTC_MBC[4] = { TSI148_LCSR_INTC_MB0C,
1341 * DMA Next Link Address Lower 1347 * DMA Next Link Address Lower
1342 */ 1348 */
1343#define TSI148_LCSR_DNLAL_DNLAL_M (0x3FFFFFF<<6) /* Address Mask */ 1349#define TSI148_LCSR_DNLAL_DNLAL_M (0x3FFFFFF<<6) /* Address Mask */
1344#define TSI148_LCSR_DNLAL_LLA (1<<0) /* Last Link Address Indicator */ 1350#define TSI148_LCSR_DNLAL_LLA (1<<0) /* Last Link Address Indicator */
1345 1351
1346/* 1352/*
1347 * DMA 2eSST Broadcast Select 1353 * DMA 2eSST Broadcast Select
@@ -1371,7 +1377,7 @@ static const int TSI148_LCSR_INTC_MBC[4] = { TSI148_LCSR_INTC_MB0C,
1371#define TSI148_GCSR_GCTRL_MBI0S (1<<0) /* Mail box 0 Int Status */ 1377#define TSI148_GCSR_GCTRL_MBI0S (1<<0) /* Mail box 0 Int Status */
1372 1378
1373#define TSI148_GCSR_GAP (1<<5) /* Geographic Addr Parity */ 1379#define TSI148_GCSR_GAP (1<<5) /* Geographic Addr Parity */
1374#define TSI148_GCSR_GA_M (0x1F<<0) /* Geographic Address Mask */ 1380#define TSI148_GCSR_GA_M (0x1F<<0) /* Geographic Address Mask */
1375 1381
1376/* 1382/*
1377 * CR/CSR Register Group 1383 * CR/CSR Register Group
diff --git a/drivers/staging/vme/devices/vme_user.c b/drivers/staging/vme/devices/vme_user.c
index 1ab9a985dfb9..bc16fc070fd3 100644
--- a/drivers/staging/vme/devices/vme_user.c
+++ b/drivers/staging/vme/devices/vme_user.c
@@ -31,6 +31,7 @@
31#include <linux/slab.h> 31#include <linux/slab.h>
32#include <linux/spinlock.h> 32#include <linux/spinlock.h>
33#include <linux/syscalls.h> 33#include <linux/syscalls.h>
34#include <linux/smp_lock.h>
34#include <linux/types.h> 35#include <linux/types.h>
35 36
36#include <asm/io.h> 37#include <asm/io.h>
@@ -130,8 +131,7 @@ static int vme_user_release(struct inode *, struct file *);
130static ssize_t vme_user_read(struct file *, char *, size_t, loff_t *); 131static ssize_t vme_user_read(struct file *, char *, size_t, loff_t *);
131static ssize_t vme_user_write(struct file *, const char *, size_t, loff_t *); 132static ssize_t vme_user_write(struct file *, const char *, size_t, loff_t *);
132static loff_t vme_user_llseek(struct file *, loff_t, int); 133static loff_t vme_user_llseek(struct file *, loff_t, int);
133static int vme_user_ioctl(struct inode *, struct file *, unsigned int, 134static long vme_user_unlocked_ioctl(struct file *, unsigned int, unsigned long);
134 unsigned long);
135 135
136static int __init vme_user_probe(struct device *, int, int); 136static int __init vme_user_probe(struct device *, int, int);
137static int __exit vme_user_remove(struct device *, int, int); 137static int __exit vme_user_remove(struct device *, int, int);
@@ -142,7 +142,7 @@ static struct file_operations vme_user_fops = {
142 .read = vme_user_read, 142 .read = vme_user_read,
143 .write = vme_user_write, 143 .write = vme_user_write,
144 .llseek = vme_user_llseek, 144 .llseek = vme_user_llseek,
145 .ioctl = vme_user_ioctl, 145 .unlocked_ioctl = vme_user_unlocked_ioctl,
146}; 146};
147 147
148 148
@@ -555,6 +555,18 @@ static int vme_user_ioctl(struct inode *inode, struct file *file,
555 return -EINVAL; 555 return -EINVAL;
556} 556}
557 557
558static long
559vme_user_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
560{
561 int ret;
562
563 lock_kernel();
564 ret = vme_user_ioctl(file->f_path.dentry->d_inode, file, cmd, arg);
565 unlock_kernel();
566
567 return ret;
568}
569
558 570
559/* 571/*
560 * Unallocate a previously allocated buffer 572 * Unallocate a previously allocated buffer
diff --git a/drivers/staging/vme/vme.c b/drivers/staging/vme/vme.c
index 934283a19ca5..093fbffbf557 100644
--- a/drivers/staging/vme/vme.c
+++ b/drivers/staging/vme/vme.c
@@ -36,7 +36,7 @@
36 36
37/* Bitmask and mutex to keep track of bridge numbers */ 37/* Bitmask and mutex to keep track of bridge numbers */
38static unsigned int vme_bus_numbers; 38static unsigned int vme_bus_numbers;
39DEFINE_MUTEX(vme_bus_num_mtx); 39static DEFINE_MUTEX(vme_bus_num_mtx);
40 40
41static void __exit vme_exit(void); 41static void __exit vme_exit(void);
42static int __init vme_init(void); 42static int __init vme_init(void);
@@ -1408,7 +1408,7 @@ EXPORT_SYMBOL(vme_unregister_driver);
1408 1408
1409/* - Bus Registration ------------------------------------------------------ */ 1409/* - Bus Registration ------------------------------------------------------ */
1410 1410
1411int vme_calc_slot(struct device *dev) 1411static int vme_calc_slot(struct device *dev)
1412{ 1412{
1413 struct vme_bridge *bridge; 1413 struct vme_bridge *bridge;
1414 int num; 1414 int num;
diff --git a/drivers/staging/vt6655/80211hdr.h b/drivers/staging/vt6655/80211hdr.h
index e5cee6fd0533..b7b170e19aa2 100644
--- a/drivers/staging/vt6655/80211hdr.h
+++ b/drivers/staging/vt6655/80211hdr.h
@@ -34,7 +34,7 @@
34#include "ttype.h" 34#include "ttype.h"
35 35
36/*--------------------- Export Definitions -------------------------*/ 36/*--------------------- Export Definitions -------------------------*/
37// bit type 37/* bit type */
38#define BIT0 0x00000001 38#define BIT0 0x00000001
39#define BIT1 0x00000002 39#define BIT1 0x00000002
40#define BIT2 0x00000004 40#define BIT2 0x00000004
@@ -80,7 +80,7 @@
80#define WLAN_HDR_ADDR4_LEN 30 80#define WLAN_HDR_ADDR4_LEN 30
81#define WLAN_IEHDR_LEN 2 81#define WLAN_IEHDR_LEN 2
82#define WLAN_SSID_MAXLEN 32 82#define WLAN_SSID_MAXLEN 32
83//#define WLAN_RATES_MAXLEN 255 83/*#define WLAN_RATES_MAXLEN 255*/
84#define WLAN_RATES_MAXLEN 16 84#define WLAN_RATES_MAXLEN 16
85#define WLAN_RATES_MAXLEN_11B 4 85#define WLAN_RATES_MAXLEN_11B 4
86#define WLAN_RSN_MAXLEN 32 86#define WLAN_RSN_MAXLEN 32
@@ -106,7 +106,7 @@
106#define WLAN_WEP40_KEYLEN 5 106#define WLAN_WEP40_KEYLEN 5
107#define WLAN_WEP104_KEYLEN 13 107#define WLAN_WEP104_KEYLEN 13
108#define WLAN_WEP232_KEYLEN 29 108#define WLAN_WEP232_KEYLEN 29
109//#define WLAN_WEPMAX_KEYLEN 29 109/*#define WLAN_WEPMAX_KEYLEN 29*/
110#define WLAN_WEPMAX_KEYLEN 32 110#define WLAN_WEPMAX_KEYLEN 32
111#define WLAN_CHALLENGE_IE_MAXLEN 255 111#define WLAN_CHALLENGE_IE_MAXLEN 255
112#define WLAN_CHALLENGE_IE_LEN 130 112#define WLAN_CHALLENGE_IE_LEN 130
@@ -115,7 +115,7 @@
115#define WLAN_WEP_ICV_LEN 4 115#define WLAN_WEP_ICV_LEN 4
116#define WLAN_FRAGS_MAX 16 116#define WLAN_FRAGS_MAX 16
117 117
118// Frame Type 118/* Frame Type */
119#define WLAN_TYPE_MGR 0x00 119#define WLAN_TYPE_MGR 0x00
120#define WLAN_TYPE_CTL 0x01 120#define WLAN_TYPE_CTL 0x01
121#define WLAN_TYPE_DATA 0x02 121#define WLAN_TYPE_DATA 0x02
@@ -125,7 +125,7 @@
125#define WLAN_FTYPE_DATA 0x02 125#define WLAN_FTYPE_DATA 0x02
126 126
127 127
128// Frame Subtypes 128/* Frame Subtypes */
129#define WLAN_FSTYPE_ASSOCREQ 0x00 129#define WLAN_FSTYPE_ASSOCREQ 0x00
130#define WLAN_FSTYPE_ASSOCRESP 0x01 130#define WLAN_FSTYPE_ASSOCRESP 0x01
131#define WLAN_FSTYPE_REASSOCREQ 0x02 131#define WLAN_FSTYPE_REASSOCREQ 0x02
@@ -139,7 +139,7 @@
139#define WLAN_FSTYPE_DEAUTHEN 0x0c 139#define WLAN_FSTYPE_DEAUTHEN 0x0c
140#define WLAN_FSTYPE_ACTION 0x0d 140#define WLAN_FSTYPE_ACTION 0x0d
141 141
142// Control 142/* Control */
143#define WLAN_FSTYPE_PSPOLL 0x0a 143#define WLAN_FSTYPE_PSPOLL 0x0a
144#define WLAN_FSTYPE_RTS 0x0b 144#define WLAN_FSTYPE_RTS 0x0b
145#define WLAN_FSTYPE_CTS 0x0c 145#define WLAN_FSTYPE_CTS 0x0c
@@ -147,7 +147,7 @@
147#define WLAN_FSTYPE_CFEND 0x0e 147#define WLAN_FSTYPE_CFEND 0x0e
148#define WLAN_FSTYPE_CFENDCFACK 0x0f 148#define WLAN_FSTYPE_CFENDCFACK 0x0f
149 149
150// Data 150/* Data */
151#define WLAN_FSTYPE_DATAONLY 0x00 151#define WLAN_FSTYPE_DATAONLY 0x00
152#define WLAN_FSTYPE_DATA_CFACK 0x01 152#define WLAN_FSTYPE_DATA_CFACK 0x01
153#define WLAN_FSTYPE_DATA_CFPOLL 0x02 153#define WLAN_FSTYPE_DATA_CFPOLL 0x02
@@ -160,7 +160,7 @@
160 160
161#ifdef __BIG_ENDIAN 161#ifdef __BIG_ENDIAN
162 162
163// GET & SET Frame Control bit 163/* GET & SET Frame Control bit */
164#define WLAN_GET_FC_PRVER(n) ((((WORD)(n) >> 8) & (BIT0 | BIT1)) 164#define WLAN_GET_FC_PRVER(n) ((((WORD)(n) >> 8) & (BIT0 | BIT1))
165#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n) >> 8) & (BIT2 | BIT3)) >> 2) 165#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n) >> 8) & (BIT2 | BIT3)) >> 2)
166#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n) >> 8) & (BIT4|BIT5|BIT6|BIT7)) >> 4) 166#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n) >> 8) & (BIT4|BIT5|BIT6|BIT7)) >> 4)
@@ -173,12 +173,12 @@
173#define WLAN_GET_FC_ISWEP(n) ((((WORD)(n) << 8) & (BIT14)) >> 14) 173#define WLAN_GET_FC_ISWEP(n) ((((WORD)(n) << 8) & (BIT14)) >> 14)
174#define WLAN_GET_FC_ORDER(n) ((((WORD)(n) << 8) & (BIT15)) >> 15) 174#define WLAN_GET_FC_ORDER(n) ((((WORD)(n) << 8) & (BIT15)) >> 15)
175 175
176// Sequence Field bit 176/* Sequence Field bit */
177#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n) >> 8) & (BIT0|BIT1|BIT2|BIT3)) 177#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n) >> 8) & (BIT0|BIT1|BIT2|BIT3))
178#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n) >> 8) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4) 178#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n) >> 8) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
179 179
180 180
181// Capability Field bit 181/* Capability Field bit */
182#define WLAN_GET_CAP_INFO_ESS(n) (((n) >> 8) & BIT0) 182#define WLAN_GET_CAP_INFO_ESS(n) (((n) >> 8) & BIT0)
183#define WLAN_GET_CAP_INFO_IBSS(n) ((((n) >> 8) & BIT1) >> 1) 183#define WLAN_GET_CAP_INFO_IBSS(n) ((((n) >> 8) & BIT1) >> 1)
184#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) ((((n) >> 8) & BIT2) >> 2) 184#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) ((((n) >> 8) & BIT2) >> 2)
@@ -195,7 +195,7 @@
195 195
196#else 196#else
197 197
198// GET & SET Frame Control bit 198/* GET & SET Frame Control bit */
199#define WLAN_GET_FC_PRVER(n) (((WORD)(n)) & (BIT0 | BIT1)) 199#define WLAN_GET_FC_PRVER(n) (((WORD)(n)) & (BIT0 | BIT1))
200#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n)) & (BIT2 | BIT3)) >> 2) 200#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n)) & (BIT2 | BIT3)) >> 2)
201#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4) 201#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4)
@@ -209,12 +209,12 @@
209#define WLAN_GET_FC_ORDER(n) ((((WORD)(n)) & (BIT15)) >> 15) 209#define WLAN_GET_FC_ORDER(n) ((((WORD)(n)) & (BIT15)) >> 15)
210 210
211 211
212// Sequence Field bit 212/* Sequence Field bit */
213#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n)) & (BIT0|BIT1|BIT2|BIT3)) 213#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n)) & (BIT0|BIT1|BIT2|BIT3))
214#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4) 214#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
215 215
216 216
217// Capability Field bit 217/* Capability Field bit */
218#define WLAN_GET_CAP_INFO_ESS(n) ((n) & BIT0) 218#define WLAN_GET_CAP_INFO_ESS(n) ((n) & BIT0)
219#define WLAN_GET_CAP_INFO_IBSS(n) (((n) & BIT1) >> 1) 219#define WLAN_GET_CAP_INFO_IBSS(n) (((n) & BIT1) >> 1)
220#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) (((n) & BIT2) >> 2) 220#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) (((n) & BIT2) >> 2)
@@ -229,7 +229,7 @@
229#define WLAN_GET_CAP_INFO_GRPACK(n) (((n) & BIT14) >> 14) 229#define WLAN_GET_CAP_INFO_GRPACK(n) (((n) & BIT14) >> 14)
230 230
231 231
232#endif //#ifdef __BIG_ENDIAN 232#endif /*#ifdef __BIG_ENDIAN */
233 233
234 234
235#define WLAN_SET_CAP_INFO_ESS(n) (n) 235#define WLAN_SET_CAP_INFO_ESS(n) (n)
@@ -261,7 +261,7 @@
261#define WLAN_SET_SEQ_FRGNUM(n) ((WORD)(n)) 261#define WLAN_SET_SEQ_FRGNUM(n) ((WORD)(n))
262#define WLAN_SET_SEQ_SEQNUM(n) (((WORD)(n)) << 4) 262#define WLAN_SET_SEQ_SEQNUM(n) (((WORD)(n)) << 4)
263 263
264// ERP Field bit 264/* ERP Field bit */
265 265
266#define WLAN_GET_ERP_NONERP_PRESENT(n) ((n) & BIT0) 266#define WLAN_GET_ERP_NONERP_PRESENT(n) ((n) & BIT0)
267#define WLAN_GET_ERP_USE_PROTECTION(n) (((n) & BIT1) >> 1) 267#define WLAN_GET_ERP_USE_PROTECTION(n) (((n) & BIT1) >> 1)
@@ -273,19 +273,19 @@
273 273
274 274
275 275
276// Support & Basic Rates field 276/* Support & Basic Rates field */
277#define WLAN_MGMT_IS_BASICRATE(b) ((b) & BIT7) 277#define WLAN_MGMT_IS_BASICRATE(b) ((b) & BIT7)
278#define WLAN_MGMT_GET_RATE(b) ((b) & ~BIT7) 278#define WLAN_MGMT_GET_RATE(b) ((b) & ~BIT7)
279 279
280// TIM field 280/* TIM field */
281#define WLAN_MGMT_IS_MULTICAST_TIM(b) ((b) & BIT0) 281#define WLAN_MGMT_IS_MULTICAST_TIM(b) ((b) & BIT0)
282#define WLAN_MGMT_GET_TIM_OFFSET(b) (((b) & ~BIT0) >> 1) 282#define WLAN_MGMT_GET_TIM_OFFSET(b) (((b) & ~BIT0) >> 1)
283 283
284// 3-Addr & 4-Addr 284/* 3-Addr & 4-Addr */
285#define WLAN_HDR_A3_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR3_LEN) 285#define WLAN_HDR_A3_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR3_LEN)
286#define WLAN_HDR_A4_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR4_LEN) 286#define WLAN_HDR_A4_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR4_LEN)
287 287
288// IEEE ADDR 288/* IEEE ADDR */
289#define IEEE_ADDR_UNIVERSAL 0x02 289#define IEEE_ADDR_UNIVERSAL 0x02
290#define IEEE_ADDR_GROUP 0x01 290#define IEEE_ADDR_GROUP 0x01
291 291
@@ -293,7 +293,7 @@ typedef struct {
293 BYTE abyAddr[6]; 293 BYTE abyAddr[6];
294} IEEE_ADDR, *PIEEE_ADDR; 294} IEEE_ADDR, *PIEEE_ADDR;
295 295
296// 802.11 Header Format 296/* 802.11 Header Format */
297 297
298typedef struct tagWLAN_80211HDR_A2 { 298typedef struct tagWLAN_80211HDR_A2 {
299 299
@@ -302,7 +302,7 @@ typedef struct tagWLAN_80211HDR_A2 {
302 BYTE abyAddr1[WLAN_ADDR_LEN]; 302 BYTE abyAddr1[WLAN_ADDR_LEN];
303 BYTE abyAddr2[WLAN_ADDR_LEN]; 303 BYTE abyAddr2[WLAN_ADDR_LEN];
304 304
305}__attribute__ ((__packed__)) 305} __attribute__ ((__packed__))
306WLAN_80211HDR_A2, *PWLAN_80211HDR_A2; 306WLAN_80211HDR_A2, *PWLAN_80211HDR_A2;
307 307
308typedef struct tagWLAN_80211HDR_A3 { 308typedef struct tagWLAN_80211HDR_A3 {
@@ -327,7 +327,7 @@ typedef struct tagWLAN_80211HDR_A4 {
327 WORD wSeqCtl; 327 WORD wSeqCtl;
328 BYTE abyAddr4[WLAN_ADDR_LEN]; 328 BYTE abyAddr4[WLAN_ADDR_LEN];
329 329
330}__attribute__ ((__packed__)) 330} __attribute__ ((__packed__))
331WLAN_80211HDR_A4, *PWLAN_80211HDR_A4; 331WLAN_80211HDR_A4, *PWLAN_80211HDR_A4;
332 332
333 333
@@ -348,6 +348,6 @@ typedef union tagUWLAN_80211HDR {
348 348
349 349
350 350
351#endif // __80211HDR_H__ 351#endif /* __80211HDR_H__ */
352 352
353 353
diff --git a/drivers/staging/vt6655/80211mgr.c b/drivers/staging/vt6655/80211mgr.c
index d309049370eb..38697c862489 100644
--- a/drivers/staging/vt6655/80211mgr.c
+++ b/drivers/staging/vt6655/80211mgr.c
@@ -89,9 +89,9 @@ static int msglevel =MSG_LEVEL_INFO;
89 * 89 *
90-*/ 90-*/
91 91
92VOID 92void
93vMgrEncodeBeacon( 93vMgrEncodeBeacon(
94 IN PWLAN_FR_BEACON pFrame 94 PWLAN_FR_BEACON pFrame
95 ) 95 )
96{ 96{
97 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 97 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -121,9 +121,9 @@ vMgrEncodeBeacon(
121-*/ 121-*/
122 122
123 123
124VOID 124void
125vMgrDecodeBeacon( 125vMgrDecodeBeacon(
126 IN PWLAN_FR_BEACON pFrame 126 PWLAN_FR_BEACON pFrame
127 ) 127 )
128{ 128{
129 PWLAN_IE pItem; 129 PWLAN_IE pItem;
@@ -242,9 +242,9 @@ vMgrDecodeBeacon(
242-*/ 242-*/
243 243
244 244
245VOID 245void
246vMgrEncodeIBSSATIM( 246vMgrEncodeIBSSATIM(
247 IN PWLAN_FR_IBSSATIM pFrame 247 PWLAN_FR_IBSSATIM pFrame
248 ) 248 )
249{ 249{
250 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 250 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -265,9 +265,9 @@ vMgrEncodeIBSSATIM(
265 * 265 *
266-*/ 266-*/
267 267
268VOID 268void
269vMgrDecodeIBSSATIM( 269vMgrDecodeIBSSATIM(
270 IN PWLAN_FR_IBSSATIM pFrame 270 PWLAN_FR_IBSSATIM pFrame
271 ) 271 )
272{ 272{
273 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 273 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -287,9 +287,9 @@ vMgrDecodeIBSSATIM(
287 * 287 *
288-*/ 288-*/
289 289
290VOID 290void
291vMgrEncodeDisassociation( 291vMgrEncodeDisassociation(
292 IN PWLAN_FR_DISASSOC pFrame 292 PWLAN_FR_DISASSOC pFrame
293 ) 293 )
294{ 294{
295 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 295 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -315,9 +315,9 @@ vMgrEncodeDisassociation(
315 * 315 *
316-*/ 316-*/
317 317
318VOID 318void
319vMgrDecodeDisassociation( 319vMgrDecodeDisassociation(
320 IN PWLAN_FR_DISASSOC pFrame 320 PWLAN_FR_DISASSOC pFrame
321 ) 321 )
322{ 322{
323 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 323 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -341,9 +341,9 @@ vMgrDecodeDisassociation(
341-*/ 341-*/
342 342
343 343
344VOID 344void
345vMgrEncodeAssocRequest( 345vMgrEncodeAssocRequest(
346 IN PWLAN_FR_ASSOCREQ pFrame 346 PWLAN_FR_ASSOCREQ pFrame
347 ) 347 )
348{ 348{
349 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 349 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -368,9 +368,9 @@ vMgrEncodeAssocRequest(
368 * 368 *
369-*/ 369-*/
370 370
371VOID 371void
372vMgrDecodeAssocRequest( 372vMgrDecodeAssocRequest(
373 IN PWLAN_FR_ASSOCREQ pFrame 373 PWLAN_FR_ASSOCREQ pFrame
374 ) 374 )
375{ 375{
376 PWLAN_IE pItem; 376 PWLAN_IE pItem;
@@ -434,9 +434,9 @@ vMgrDecodeAssocRequest(
434 * 434 *
435-*/ 435-*/
436 436
437VOID 437void
438vMgrEncodeAssocResponse( 438vMgrEncodeAssocResponse(
439 IN PWLAN_FR_ASSOCRESP pFrame 439 PWLAN_FR_ASSOCRESP pFrame
440 ) 440 )
441{ 441{
442 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 442 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -466,9 +466,9 @@ vMgrEncodeAssocResponse(
466 * 466 *
467-*/ 467-*/
468 468
469VOID 469void
470vMgrDecodeAssocResponse( 470vMgrDecodeAssocResponse(
471 IN PWLAN_FR_ASSOCRESP pFrame 471 PWLAN_FR_ASSOCRESP pFrame
472 ) 472 )
473{ 473{
474 PWLAN_IE pItem; 474 PWLAN_IE pItem;
@@ -512,9 +512,9 @@ vMgrDecodeAssocResponse(
512 * 512 *
513-*/ 513-*/
514 514
515VOID 515void
516vMgrEncodeReassocRequest( 516vMgrEncodeReassocRequest(
517 IN PWLAN_FR_REASSOCREQ pFrame 517 PWLAN_FR_REASSOCREQ pFrame
518 ) 518 )
519{ 519{
520 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 520 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -544,9 +544,9 @@ vMgrEncodeReassocRequest(
544-*/ 544-*/
545 545
546 546
547VOID 547void
548vMgrDecodeReassocRequest( 548vMgrDecodeReassocRequest(
549 IN PWLAN_FR_REASSOCREQ pFrame 549 PWLAN_FR_REASSOCREQ pFrame
550 ) 550 )
551{ 551{
552 PWLAN_IE pItem; 552 PWLAN_IE pItem;
@@ -616,9 +616,9 @@ vMgrDecodeReassocRequest(
616-*/ 616-*/
617 617
618 618
619VOID 619void
620vMgrEncodeProbeRequest( 620vMgrEncodeProbeRequest(
621 IN PWLAN_FR_PROBEREQ pFrame 621 PWLAN_FR_PROBEREQ pFrame
622 ) 622 )
623{ 623{
624 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 624 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -637,9 +637,9 @@ vMgrEncodeProbeRequest(
637 * 637 *
638-*/ 638-*/
639 639
640VOID 640void
641vMgrDecodeProbeRequest( 641vMgrDecodeProbeRequest(
642 IN PWLAN_FR_PROBEREQ pFrame 642 PWLAN_FR_PROBEREQ pFrame
643 ) 643 )
644{ 644{
645 PWLAN_IE pItem; 645 PWLAN_IE pItem;
@@ -690,9 +690,9 @@ vMgrDecodeProbeRequest(
690-*/ 690-*/
691 691
692 692
693VOID 693void
694vMgrEncodeProbeResponse( 694vMgrEncodeProbeResponse(
695 IN PWLAN_FR_PROBERESP pFrame 695 PWLAN_FR_PROBERESP pFrame
696 ) 696 )
697{ 697{
698 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 698 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -724,9 +724,9 @@ vMgrEncodeProbeResponse(
724 * 724 *
725-*/ 725-*/
726 726
727VOID 727void
728vMgrDecodeProbeResponse( 728vMgrDecodeProbeResponse(
729 IN PWLAN_FR_PROBERESP pFrame 729 PWLAN_FR_PROBERESP pFrame
730 ) 730 )
731{ 731{
732 PWLAN_IE pItem; 732 PWLAN_IE pItem;
@@ -838,9 +838,9 @@ vMgrDecodeProbeResponse(
838 * 838 *
839-*/ 839-*/
840 840
841VOID 841void
842vMgrEncodeAuthen( 842vMgrEncodeAuthen(
843 IN PWLAN_FR_AUTHEN pFrame 843 PWLAN_FR_AUTHEN pFrame
844 ) 844 )
845{ 845{
846 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 846 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -869,9 +869,9 @@ vMgrEncodeAuthen(
869 * 869 *
870-*/ 870-*/
871 871
872VOID 872void
873vMgrDecodeAuthen( 873vMgrDecodeAuthen(
874 IN PWLAN_FR_AUTHEN pFrame 874 PWLAN_FR_AUTHEN pFrame
875 ) 875 )
876{ 876{
877 PWLAN_IE pItem; 877 PWLAN_IE pItem;
@@ -909,9 +909,9 @@ vMgrDecodeAuthen(
909 * 909 *
910-*/ 910-*/
911 911
912VOID 912void
913vMgrEncodeDeauthen( 913vMgrEncodeDeauthen(
914 IN PWLAN_FR_DEAUTHEN pFrame 914 PWLAN_FR_DEAUTHEN pFrame
915 ) 915 )
916{ 916{
917 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 917 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -936,9 +936,9 @@ vMgrEncodeDeauthen(
936 * 936 *
937-*/ 937-*/
938 938
939VOID 939void
940vMgrDecodeDeauthen( 940vMgrDecodeDeauthen(
941 IN PWLAN_FR_DEAUTHEN pFrame 941 PWLAN_FR_DEAUTHEN pFrame
942 ) 942 )
943{ 943{
944 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 944 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -962,9 +962,9 @@ vMgrDecodeDeauthen(
962 * 962 *
963-*/ 963-*/
964 964
965VOID 965void
966vMgrEncodeReassocResponse( 966vMgrEncodeReassocResponse(
967 IN PWLAN_FR_REASSOCRESP pFrame 967 PWLAN_FR_REASSOCRESP pFrame
968 ) 968 )
969{ 969{
970 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 970 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -995,9 +995,9 @@ vMgrEncodeReassocResponse(
995-*/ 995-*/
996 996
997 997
998VOID 998void
999vMgrDecodeReassocResponse( 999vMgrDecodeReassocResponse(
1000 IN PWLAN_FR_REASSOCRESP pFrame 1000 PWLAN_FR_REASSOCRESP pFrame
1001 ) 1001 )
1002{ 1002{
1003 PWLAN_IE pItem; 1003 PWLAN_IE pItem;
diff --git a/drivers/staging/vt6655/80211mgr.h b/drivers/staging/vt6655/80211mgr.h
index 5efc13227eb8..658fe144f898 100644
--- a/drivers/staging/vt6655/80211mgr.h
+++ b/drivers/staging/vt6655/80211mgr.h
@@ -714,114 +714,114 @@ typedef struct tagWLAN_FR_DEAUTHEN {
714 714
715/*--------------------- Export Functions --------------------------*/ 715/*--------------------- Export Functions --------------------------*/
716 716
717VOID 717void
718vMgrEncodeBeacon( 718vMgrEncodeBeacon(
719 IN PWLAN_FR_BEACON pFrame 719 PWLAN_FR_BEACON pFrame
720 ); 720 );
721 721
722VOID 722void
723vMgrDecodeBeacon( 723vMgrDecodeBeacon(
724 IN PWLAN_FR_BEACON pFrame 724 PWLAN_FR_BEACON pFrame
725 ); 725 );
726 726
727VOID 727void
728vMgrEncodeIBSSATIM( 728vMgrEncodeIBSSATIM(
729 IN PWLAN_FR_IBSSATIM pFrame 729 PWLAN_FR_IBSSATIM pFrame
730 ); 730 );
731 731
732VOID 732void
733vMgrDecodeIBSSATIM( 733vMgrDecodeIBSSATIM(
734 IN PWLAN_FR_IBSSATIM pFrame 734 PWLAN_FR_IBSSATIM pFrame
735 ); 735 );
736 736
737VOID 737void
738vMgrEncodeDisassociation( 738vMgrEncodeDisassociation(
739 IN PWLAN_FR_DISASSOC pFrame 739 PWLAN_FR_DISASSOC pFrame
740 ); 740 );
741 741
742VOID 742void
743vMgrDecodeDisassociation( 743vMgrDecodeDisassociation(
744 IN PWLAN_FR_DISASSOC pFrame 744 PWLAN_FR_DISASSOC pFrame
745 ); 745 );
746 746
747VOID 747void
748vMgrEncodeAssocRequest( 748vMgrEncodeAssocRequest(
749 IN PWLAN_FR_ASSOCREQ pFrame 749 PWLAN_FR_ASSOCREQ pFrame
750 ); 750 );
751 751
752VOID 752void
753vMgrDecodeAssocRequest( 753vMgrDecodeAssocRequest(
754 IN PWLAN_FR_ASSOCREQ pFrame 754 PWLAN_FR_ASSOCREQ pFrame
755 ); 755 );
756 756
757VOID 757void
758vMgrEncodeAssocResponse( 758vMgrEncodeAssocResponse(
759 IN PWLAN_FR_ASSOCRESP pFrame 759 PWLAN_FR_ASSOCRESP pFrame
760 ); 760 );
761 761
762VOID 762void
763vMgrDecodeAssocResponse( 763vMgrDecodeAssocResponse(
764 IN PWLAN_FR_ASSOCRESP pFrame 764 PWLAN_FR_ASSOCRESP pFrame
765 ); 765 );
766 766
767VOID 767void
768vMgrEncodeReassocRequest( 768vMgrEncodeReassocRequest(
769 IN PWLAN_FR_REASSOCREQ pFrame 769 PWLAN_FR_REASSOCREQ pFrame
770 ); 770 );
771 771
772VOID 772void
773vMgrDecodeReassocRequest( 773vMgrDecodeReassocRequest(
774 IN PWLAN_FR_REASSOCREQ pFrame 774 PWLAN_FR_REASSOCREQ pFrame
775 ); 775 );
776 776
777VOID 777void
778vMgrEncodeProbeRequest( 778vMgrEncodeProbeRequest(
779 IN PWLAN_FR_PROBEREQ pFrame 779 PWLAN_FR_PROBEREQ pFrame
780 ); 780 );
781 781
782VOID 782void
783vMgrDecodeProbeRequest( 783vMgrDecodeProbeRequest(
784 IN PWLAN_FR_PROBEREQ pFrame 784 PWLAN_FR_PROBEREQ pFrame
785 ); 785 );
786 786
787VOID 787void
788vMgrEncodeProbeResponse( 788vMgrEncodeProbeResponse(
789 IN PWLAN_FR_PROBERESP pFrame 789 PWLAN_FR_PROBERESP pFrame
790 ); 790 );
791 791
792VOID 792void
793vMgrDecodeProbeResponse( 793vMgrDecodeProbeResponse(
794 IN PWLAN_FR_PROBERESP pFrame 794 PWLAN_FR_PROBERESP pFrame
795 ); 795 );
796 796
797VOID 797void
798vMgrEncodeAuthen( 798vMgrEncodeAuthen(
799 IN PWLAN_FR_AUTHEN pFrame 799 PWLAN_FR_AUTHEN pFrame
800 ); 800 );
801 801
802VOID 802void
803vMgrDecodeAuthen( 803vMgrDecodeAuthen(
804 IN PWLAN_FR_AUTHEN pFrame 804 PWLAN_FR_AUTHEN pFrame
805 ); 805 );
806 806
807VOID 807void
808vMgrEncodeDeauthen( 808vMgrEncodeDeauthen(
809 IN PWLAN_FR_DEAUTHEN pFrame 809 PWLAN_FR_DEAUTHEN pFrame
810 ); 810 );
811 811
812VOID 812void
813vMgrDecodeDeauthen( 813vMgrDecodeDeauthen(
814 IN PWLAN_FR_DEAUTHEN pFrame 814 PWLAN_FR_DEAUTHEN pFrame
815 ); 815 );
816 816
817VOID 817void
818vMgrEncodeReassocResponse( 818vMgrEncodeReassocResponse(
819 IN PWLAN_FR_REASSOCRESP pFrame 819 PWLAN_FR_REASSOCRESP pFrame
820 ); 820 );
821 821
822VOID 822void
823vMgrDecodeReassocResponse( 823vMgrDecodeReassocResponse(
824 IN PWLAN_FR_REASSOCRESP pFrame 824 PWLAN_FR_REASSOCRESP pFrame
825 ); 825 );
826 826
827#endif// __80211MGR_H__ 827#endif// __80211MGR_H__
diff --git a/drivers/staging/vt6655/IEEE11h.c b/drivers/staging/vt6655/IEEE11h.c
index 2567143d3b1c..22f12f5ef90c 100644
--- a/drivers/staging/vt6655/IEEE11h.c
+++ b/drivers/staging/vt6655/IEEE11h.c
@@ -203,8 +203,8 @@ static BOOL s_bRxTPCReq(PSMgmtObject pMgmt, PWLAN_FRAME_TPCREQ pTPCReq, BYTE byR
203-*/ 203-*/
204BOOL 204BOOL
205IEEE11hbMgrRxAction ( 205IEEE11hbMgrRxAction (
206 IN PVOID pMgmtHandle, 206 void *pMgmtHandle,
207 IN PVOID pRxPacket 207 void *pRxPacket
208 ) 208 )
209{ 209{
210 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle; 210 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle;
@@ -265,7 +265,7 @@ IEEE11hbMgrRxAction (
265 265
266 266
267BOOL IEEE11hbMSRRepTx ( 267BOOL IEEE11hbMSRRepTx (
268 IN PVOID pMgmtHandle 268 void *pMgmtHandle
269 ) 269 )
270{ 270{
271 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle; 271 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle;
diff --git a/drivers/staging/vt6655/IEEE11h.h b/drivers/staging/vt6655/IEEE11h.h
index 0f61eddd6f26..ae32498a511d 100644
--- a/drivers/staging/vt6655/IEEE11h.h
+++ b/drivers/staging/vt6655/IEEE11h.h
@@ -46,7 +46,7 @@
46/*--------------------- Export Functions --------------------------*/ 46/*--------------------- Export Functions --------------------------*/
47 47
48BOOL IEEE11hbMSRRepTx ( 48BOOL IEEE11hbMSRRepTx (
49 IN PVOID pMgmtHandle 49 void *pMgmtHandle
50 ); 50 );
51 51
52#endif // __IEEE11h_H__ 52#endif // __IEEE11h_H__
diff --git a/drivers/staging/vt6655/aes_ccmp.c b/drivers/staging/vt6655/aes_ccmp.c
index 2614ed380a43..fef1b91c2925 100644
--- a/drivers/staging/vt6655/aes_ccmp.c
+++ b/drivers/staging/vt6655/aes_ccmp.c
@@ -277,7 +277,7 @@ int ii,jj,kk;
277 pbyPayload = pbyIV + 8; //IV-length 277 pbyPayload = pbyIV + 8; //IV-length
278 278
279 abyNonce[0] = 0x00; //now is 0, if Qos here will be priority 279 abyNonce[0] = 0x00; //now is 0, if Qos here will be priority
280 memcpy(&(abyNonce[1]), pMACHeader->abyAddr2, U_ETHER_ADDR_LEN); 280 memcpy(&(abyNonce[1]), pMACHeader->abyAddr2, ETH_ALEN);
281 abyNonce[7] = pbyIV[7]; 281 abyNonce[7] = pbyIV[7];
282 abyNonce[8] = pbyIV[6]; 282 abyNonce[8] = pbyIV[6];
283 abyNonce[9] = pbyIV[5]; 283 abyNonce[9] = pbyIV[5];
@@ -299,16 +299,16 @@ int ii,jj,kk;
299 byTmp = (BYTE)(pMACHeader->wFrameCtl >> 8); 299 byTmp = (BYTE)(pMACHeader->wFrameCtl >> 8);
300 byTmp &= 0x87; 300 byTmp &= 0x87;
301 MIC_HDR1[3] = byTmp | 0x40; 301 MIC_HDR1[3] = byTmp | 0x40;
302 memcpy(&(MIC_HDR1[4]), pMACHeader->abyAddr1, U_ETHER_ADDR_LEN); 302 memcpy(&(MIC_HDR1[4]), pMACHeader->abyAddr1, ETH_ALEN);
303 memcpy(&(MIC_HDR1[10]), pMACHeader->abyAddr2, U_ETHER_ADDR_LEN); 303 memcpy(&(MIC_HDR1[10]), pMACHeader->abyAddr2, ETH_ALEN);
304 304
305 //MIC_HDR2 305 //MIC_HDR2
306 memcpy(&(MIC_HDR2[0]), pMACHeader->abyAddr3, U_ETHER_ADDR_LEN); 306 memcpy(&(MIC_HDR2[0]), pMACHeader->abyAddr3, ETH_ALEN);
307 byTmp = (BYTE)(pMACHeader->wSeqCtl & 0xff); 307 byTmp = (BYTE)(pMACHeader->wSeqCtl & 0xff);
308 MIC_HDR2[6] = byTmp & 0x0f; 308 MIC_HDR2[6] = byTmp & 0x0f;
309 MIC_HDR2[7] = 0; 309 MIC_HDR2[7] = 0;
310 if ( bA4 ) { 310 if ( bA4 ) {
311 memcpy(&(MIC_HDR2[8]), pMACHeader->abyAddr4, U_ETHER_ADDR_LEN); 311 memcpy(&(MIC_HDR2[8]), pMACHeader->abyAddr4, ETH_ALEN);
312 } else { 312 } else {
313 MIC_HDR2[8] = 0x00; 313 MIC_HDR2[8] = 0x00;
314 MIC_HDR2[9] = 0x00; 314 MIC_HDR2[9] = 0x00;
diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c
index cd5b8ea02538..5414c6c6c050 100644
--- a/drivers/staging/vt6655/baseband.c
+++ b/drivers/staging/vt6655/baseband.c
@@ -1723,15 +1723,15 @@ ULONG
1723s_ulGetRatio(PSDevice pDevice); 1723s_ulGetRatio(PSDevice pDevice);
1724 1724
1725static 1725static
1726VOID 1726void
1727s_vChangeAntenna( 1727s_vChangeAntenna(
1728 IN PSDevice pDevice 1728 PSDevice pDevice
1729 ); 1729 );
1730 1730
1731static 1731static
1732VOID 1732void
1733s_vChangeAntenna ( 1733s_vChangeAntenna (
1734 IN PSDevice pDevice 1734 PSDevice pDevice
1735 ) 1735 )
1736{ 1736{
1737 1737
@@ -1778,10 +1778,10 @@ s_vChangeAntenna (
1778 */ 1778 */
1779UINT 1779UINT
1780BBuGetFrameTime ( 1780BBuGetFrameTime (
1781 IN BYTE byPreambleType, 1781 BYTE byPreambleType,
1782 IN BYTE byPktType, 1782 BYTE byPktType,
1783 IN UINT cbFrameLength, 1783 UINT cbFrameLength,
1784 IN WORD wRate 1784 WORD wRate
1785 ) 1785 )
1786{ 1786{
1787 UINT uFrameTime; 1787 UINT uFrameTime;
@@ -1843,15 +1843,15 @@ BBuGetFrameTime (
1843 * Return Value: none 1843 * Return Value: none
1844 * 1844 *
1845 */ 1845 */
1846VOID 1846void
1847BBvCaculateParameter ( 1847BBvCaculateParameter (
1848 IN PSDevice pDevice, 1848 PSDevice pDevice,
1849 IN UINT cbFrameLength, 1849 UINT cbFrameLength,
1850 IN WORD wRate, 1850 WORD wRate,
1851 IN BYTE byPacketType, 1851 BYTE byPacketType,
1852 OUT PWORD pwPhyLen, 1852 PWORD pwPhyLen,
1853 OUT PBYTE pbyPhySrv, 1853 PBYTE pbyPhySrv,
1854 OUT PBYTE pbyPhySgn 1854 PBYTE pbyPhySgn
1855 ) 1855 )
1856{ 1856{
1857 UINT cbBitCount; 1857 UINT cbBitCount;
@@ -2321,7 +2321,7 @@ BOOL BBbVT3253Init (PSDevice pDevice)
2321 * Return Value: none 2321 * Return Value: none
2322 * 2322 *
2323 */ 2323 */
2324VOID BBvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyBBRegs) 2324void BBvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyBBRegs)
2325{ 2325{
2326 int ii; 2326 int ii;
2327 BYTE byBase = 1; 2327 BYTE byBase = 1;
@@ -2438,7 +2438,7 @@ void BBvLoopbackOff (PSDevice pDevice)
2438 * Return Value: none 2438 * Return Value: none
2439 * 2439 *
2440 */ 2440 */
2441VOID 2441void
2442BBvSetShortSlotTime (PSDevice pDevice) 2442BBvSetShortSlotTime (PSDevice pDevice)
2443{ 2443{
2444 BYTE byBBRxConf=0; 2444 BYTE byBBRxConf=0;
@@ -2462,7 +2462,7 @@ BBvSetShortSlotTime (PSDevice pDevice)
2462 2462
2463} 2463}
2464 2464
2465VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData) 2465void BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
2466{ 2466{
2467 BYTE byBBRxConf=0; 2467 BYTE byBBRxConf=0;
2468 2468
@@ -2494,7 +2494,7 @@ VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
2494 * Return Value: none 2494 * Return Value: none
2495 * 2495 *
2496 */ 2496 */
2497VOID 2497void
2498BBvSoftwareReset (DWORD_PTR dwIoBase) 2498BBvSoftwareReset (DWORD_PTR dwIoBase)
2499{ 2499{
2500 BBbWriteEmbeded(dwIoBase, 0x50, 0x40); 2500 BBbWriteEmbeded(dwIoBase, 0x50, 0x40);
@@ -2515,7 +2515,7 @@ BBvSoftwareReset (DWORD_PTR dwIoBase)
2515 * Return Value: none 2515 * Return Value: none
2516 * 2516 *
2517 */ 2517 */
2518VOID 2518void
2519BBvPowerSaveModeON (DWORD_PTR dwIoBase) 2519BBvPowerSaveModeON (DWORD_PTR dwIoBase)
2520{ 2520{
2521 BYTE byOrgData; 2521 BYTE byOrgData;
@@ -2537,7 +2537,7 @@ BBvPowerSaveModeON (DWORD_PTR dwIoBase)
2537 * Return Value: none 2537 * Return Value: none
2538 * 2538 *
2539 */ 2539 */
2540VOID 2540void
2541BBvPowerSaveModeOFF (DWORD_PTR dwIoBase) 2541BBvPowerSaveModeOFF (DWORD_PTR dwIoBase)
2542{ 2542{
2543 BYTE byOrgData; 2543 BYTE byOrgData;
@@ -2561,7 +2561,7 @@ BBvPowerSaveModeOFF (DWORD_PTR dwIoBase)
2561 * 2561 *
2562 */ 2562 */
2563 2563
2564VOID 2564void
2565BBvSetTxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode) 2565BBvSetTxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2566{ 2566{
2567 BYTE byBBTxConf; 2567 BYTE byBBTxConf;
@@ -2603,7 +2603,7 @@ BBvSetTxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2603 * 2603 *
2604 */ 2604 */
2605 2605
2606VOID 2606void
2607BBvSetRxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode) 2607BBvSetRxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2608{ 2608{
2609 BYTE byBBRxConf; 2609 BYTE byBBRxConf;
@@ -2634,14 +2634,14 @@ BBvSetRxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2634 * Return Value: none 2634 * Return Value: none
2635 * 2635 *
2636 */ 2636 */
2637VOID 2637void
2638BBvSetDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID) 2638BBvSetDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2639{ 2639{
2640 BBbWriteEmbeded(dwIoBase, 0x0C, 0x17);//CR12 2640 BBbWriteEmbeded(dwIoBase, 0x0C, 0x17);//CR12
2641 BBbWriteEmbeded(dwIoBase, 0x0D, 0xB9);//CR13 2641 BBbWriteEmbeded(dwIoBase, 0x0D, 0xB9);//CR13
2642} 2642}
2643 2643
2644VOID 2644void
2645BBvExitDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID) 2645BBvExitDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2646{ 2646{
2647 BBbWriteEmbeded(dwIoBase, 0x0C, 0x00);//CR12 2647 BBbWriteEmbeded(dwIoBase, 0x0C, 0x00);//CR12
@@ -2759,7 +2759,7 @@ ULONG ulPacketNum;
2759} 2759}
2760 2760
2761 2761
2762VOID 2762void
2763BBvClearAntDivSQ3Value (PSDevice pDevice) 2763BBvClearAntDivSQ3Value (PSDevice pDevice)
2764{ 2764{
2765 UINT ii; 2765 UINT ii;
@@ -2786,7 +2786,7 @@ BBvClearAntDivSQ3Value (PSDevice pDevice)
2786 * 2786 *
2787 */ 2787 */
2788 2788
2789VOID 2789void
2790BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3) 2790BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
2791{ 2791{
2792 2792
@@ -2876,9 +2876,9 @@ BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
2876 * 2876 *
2877-*/ 2877-*/
2878 2878
2879VOID 2879void
2880TimerSQ3CallBack ( 2880TimerSQ3CallBack (
2881 IN HANDLE hDeviceContext 2881 void *hDeviceContext
2882 ) 2882 )
2883{ 2883{
2884 PSDevice pDevice = (PSDevice)hDeviceContext; 2884 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -2924,9 +2924,9 @@ TimerSQ3CallBack (
2924 * 2924 *
2925-*/ 2925-*/
2926 2926
2927VOID 2927void
2928TimerState1CallBack ( 2928TimerState1CallBack (
2929 IN HANDLE hDeviceContext 2929 void *hDeviceContext
2930 ) 2930 )
2931{ 2931{
2932 PSDevice pDevice = (PSDevice)hDeviceContext; 2932 PSDevice pDevice = (PSDevice)hDeviceContext;
diff --git a/drivers/staging/vt6655/baseband.h b/drivers/staging/vt6655/baseband.h
index 0682a396ea44..b236ff4139a0 100644
--- a/drivers/staging/vt6655/baseband.h
+++ b/drivers/staging/vt6655/baseband.h
@@ -120,58 +120,58 @@
120 120
121UINT 121UINT
122BBuGetFrameTime( 122BBuGetFrameTime(
123 IN BYTE byPreambleType, 123 BYTE byPreambleType,
124 IN BYTE byPktType, 124 BYTE byPktType,
125 IN UINT cbFrameLength, 125 UINT cbFrameLength,
126 IN WORD wRate 126 WORD wRate
127 ); 127 );
128 128
129VOID 129void
130BBvCaculateParameter ( 130BBvCaculateParameter (
131 IN PSDevice pDevice, 131 PSDevice pDevice,
132 IN UINT cbFrameLength, 132 UINT cbFrameLength,
133 IN WORD wRate, 133 WORD wRate,
134 IN BYTE byPacketType, 134 BYTE byPacketType,
135 OUT PWORD pwPhyLen, 135 PWORD pwPhyLen,
136 OUT PBYTE pbyPhySrv, 136 PBYTE pbyPhySrv,
137 OUT PBYTE pbyPhySgn 137 PBYTE pbyPhySgn
138 ); 138 );
139 139
140BOOL BBbReadEmbeded(DWORD_PTR dwIoBase, BYTE byBBAddr, PBYTE pbyData); 140BOOL BBbReadEmbeded(DWORD_PTR dwIoBase, BYTE byBBAddr, PBYTE pbyData);
141BOOL BBbWriteEmbeded(DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byData); 141BOOL BBbWriteEmbeded(DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byData);
142 142
143VOID BBvReadAllRegs(DWORD_PTR dwIoBase, PBYTE pbyBBRegs); 143void BBvReadAllRegs(DWORD_PTR dwIoBase, PBYTE pbyBBRegs);
144void BBvLoopbackOn(PSDevice pDevice); 144void BBvLoopbackOn(PSDevice pDevice);
145void BBvLoopbackOff(PSDevice pDevice); 145void BBvLoopbackOff(PSDevice pDevice);
146void BBvSetShortSlotTime(PSDevice pDevice); 146void BBvSetShortSlotTime(PSDevice pDevice);
147BOOL BBbIsRegBitsOn(DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits); 147BOOL BBbIsRegBitsOn(DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits);
148BOOL BBbIsRegBitsOff(DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits); 148BOOL BBbIsRegBitsOff(DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits);
149VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData); 149void BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData);
150 150
151// VT3253 Baseband 151// VT3253 Baseband
152BOOL BBbVT3253Init(PSDevice pDevice); 152BOOL BBbVT3253Init(PSDevice pDevice);
153VOID BBvSoftwareReset(DWORD_PTR dwIoBase); 153void BBvSoftwareReset(DWORD_PTR dwIoBase);
154VOID BBvPowerSaveModeON(DWORD_PTR dwIoBase); 154void BBvPowerSaveModeON(DWORD_PTR dwIoBase);
155VOID BBvPowerSaveModeOFF(DWORD_PTR dwIoBase); 155void BBvPowerSaveModeOFF(DWORD_PTR dwIoBase);
156VOID BBvSetTxAntennaMode(DWORD_PTR dwIoBase, BYTE byAntennaMode); 156void BBvSetTxAntennaMode(DWORD_PTR dwIoBase, BYTE byAntennaMode);
157VOID BBvSetRxAntennaMode(DWORD_PTR dwIoBase, BYTE byAntennaMode); 157void BBvSetRxAntennaMode(DWORD_PTR dwIoBase, BYTE byAntennaMode);
158VOID BBvSetDeepSleep(DWORD_PTR dwIoBase, BYTE byLocalID); 158void BBvSetDeepSleep(DWORD_PTR dwIoBase, BYTE byLocalID);
159VOID BBvExitDeepSleep(DWORD_PTR dwIoBase, BYTE byLocalID); 159void BBvExitDeepSleep(DWORD_PTR dwIoBase, BYTE byLocalID);
160 160
161// timer for antenna diversity 161// timer for antenna diversity
162 162
163VOID 163void
164TimerSQ3CallBack ( 164TimerSQ3CallBack (
165 IN HANDLE hDeviceContext 165 void *hDeviceContext
166 ); 166 );
167 167
168VOID 168void
169TimerState1CallBack( 169TimerState1CallBack(
170 IN HANDLE hDeviceContext 170 void *hDeviceContext
171 ); 171 );
172 172
173void BBvAntennaDiversity(PSDevice pDevice, BYTE byRxRate, BYTE bySQ3); 173void BBvAntennaDiversity(PSDevice pDevice, BYTE byRxRate, BYTE bySQ3);
174VOID 174void
175BBvClearAntDivSQ3Value (PSDevice pDevice); 175BBvClearAntDivSQ3Value (PSDevice pDevice);
176 176
177#endif // __BASEBAND_H__ 177#endif // __BASEBAND_H__
diff --git a/drivers/staging/vt6655/bssdb.c b/drivers/staging/vt6655/bssdb.c
index 9535d4473c58..6312a55dab1a 100644
--- a/drivers/staging/vt6655/bssdb.c
+++ b/drivers/staging/vt6655/bssdb.c
@@ -90,19 +90,19 @@ const WORD awHWRetry1[5][5] = {
90 90
91/*--------------------- Static Functions --------------------------*/ 91/*--------------------- Static Functions --------------------------*/
92 92
93VOID s_vCheckSensitivity( 93void s_vCheckSensitivity(
94 IN HANDLE hDeviceContext 94 void *hDeviceContext
95 ); 95 );
96 96
97#ifdef Calcu_LinkQual 97#ifdef Calcu_LinkQual
98VOID s_uCalculateLinkQual( 98void s_uCalculateLinkQual(
99 IN HANDLE hDeviceContext 99 void *hDeviceContext
100 ); 100 );
101#endif 101#endif
102 102
103 103
104VOID s_vCheckPreEDThreshold( 104void s_vCheckPreEDThreshold(
105 IN HANDLE hDeviceContext 105 void *hDeviceContext
106 ); 106 );
107/*--------------------- Export Variables --------------------------*/ 107/*--------------------- Export Variables --------------------------*/
108 108
@@ -125,10 +125,10 @@ VOID s_vCheckPreEDThreshold(
125 125
126PKnownBSS 126PKnownBSS
127BSSpSearchBSSList( 127BSSpSearchBSSList(
128 IN HANDLE hDeviceContext, 128 void *hDeviceContext,
129 IN PBYTE pbyDesireBSSID, 129 PBYTE pbyDesireBSSID,
130 IN PBYTE pbyDesireSSID, 130 PBYTE pbyDesireSSID,
131 IN CARD_PHY_TYPE ePhyType 131 CARD_PHY_TYPE ePhyType
132 ) 132 )
133{ 133{
134 PSDevice pDevice = (PSDevice)hDeviceContext; 134 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -280,10 +280,10 @@ if(pDevice->bLinkPass==FALSE) pCurrBSS->bSelected = FALSE;
280-*/ 280-*/
281 281
282 282
283VOID 283void
284BSSvClearBSSList( 284BSSvClearBSSList(
285 IN HANDLE hDeviceContext, 285 void *hDeviceContext,
286 IN BOOL bKeepCurrBSSID 286 BOOL bKeepCurrBSSID
287 ) 287 )
288{ 288{
289 PSDevice pDevice = (PSDevice)hDeviceContext; 289 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -325,9 +325,9 @@ BSSvClearBSSList(
325-*/ 325-*/
326PKnownBSS 326PKnownBSS
327BSSpAddrIsInBSSList( 327BSSpAddrIsInBSSList(
328 IN HANDLE hDeviceContext, 328 void *hDeviceContext,
329 IN PBYTE abyBSSID, 329 PBYTE abyBSSID,
330 IN PWLAN_IE_SSID pSSID 330 PWLAN_IE_SSID pSSID
331 ) 331 )
332{ 332{
333 PSDevice pDevice = (PSDevice)hDeviceContext; 333 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -368,23 +368,23 @@ BSSpAddrIsInBSSList(
368 368
369BOOL 369BOOL
370BSSbInsertToBSSList ( 370BSSbInsertToBSSList (
371 IN HANDLE hDeviceContext, 371 void *hDeviceContext,
372 IN PBYTE abyBSSIDAddr, 372 PBYTE abyBSSIDAddr,
373 IN QWORD qwTimestamp, 373 QWORD qwTimestamp,
374 IN WORD wBeaconInterval, 374 WORD wBeaconInterval,
375 IN WORD wCapInfo, 375 WORD wCapInfo,
376 IN BYTE byCurrChannel, 376 BYTE byCurrChannel,
377 IN PWLAN_IE_SSID pSSID, 377 PWLAN_IE_SSID pSSID,
378 IN PWLAN_IE_SUPP_RATES pSuppRates, 378 PWLAN_IE_SUPP_RATES pSuppRates,
379 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 379 PWLAN_IE_SUPP_RATES pExtSuppRates,
380 IN PERPObject psERP, 380 PERPObject psERP,
381 IN PWLAN_IE_RSN pRSN, 381 PWLAN_IE_RSN pRSN,
382 IN PWLAN_IE_RSN_EXT pRSNWPA, 382 PWLAN_IE_RSN_EXT pRSNWPA,
383 IN PWLAN_IE_COUNTRY pIE_Country, 383 PWLAN_IE_COUNTRY pIE_Country,
384 IN PWLAN_IE_QUIET pIE_Quiet, 384 PWLAN_IE_QUIET pIE_Quiet,
385 IN UINT uIELength, 385 UINT uIELength,
386 IN PBYTE pbyIEs, 386 PBYTE pbyIEs,
387 IN HANDLE pRxPacketContext 387 void *pRxPacketContext
388 ) 388 )
389{ 389{
390 390
@@ -502,7 +502,7 @@ BSSbInsertToBSSList (
502 if ((bIs802_1x == TRUE) && (pSSID->len == ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->len) && 502 if ((bIs802_1x == TRUE) && (pSSID->len == ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->len) &&
503 ( !memcmp(pSSID->abySSID, ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySSID, pSSID->len))) { 503 ( !memcmp(pSSID->abySSID, ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySSID, pSSID->len))) {
504 504
505 bAdd_PMKID_Candidate((HANDLE)pDevice, pBSSList->abyBSSID, &pBSSList->sRSNCapObj); 505 bAdd_PMKID_Candidate((void *)pDevice, pBSSList->abyBSSID, &pBSSList->sRSNCapObj);
506 506
507 if ((pDevice->bLinkPass == TRUE) && (pMgmt->eCurrState == WMAC_STATE_ASSOC)) { 507 if ((pDevice->bLinkPass == TRUE) && (pMgmt->eCurrState == WMAC_STATE_ASSOC)) {
508 if ((KeybGetTransmitKey(&(pDevice->sKey), pDevice->abyBSSID, PAIRWISE_KEY, &pTransmitKey) == TRUE) || 508 if ((KeybGetTransmitKey(&(pDevice->sKey), pDevice->abyBSSID, PAIRWISE_KEY, &pTransmitKey) == TRUE) ||
@@ -585,24 +585,24 @@ BSSbInsertToBSSList (
585 585
586BOOL 586BOOL
587BSSbUpdateToBSSList ( 587BSSbUpdateToBSSList (
588 IN HANDLE hDeviceContext, 588 void *hDeviceContext,
589 IN QWORD qwTimestamp, 589 QWORD qwTimestamp,
590 IN WORD wBeaconInterval, 590 WORD wBeaconInterval,
591 IN WORD wCapInfo, 591 WORD wCapInfo,
592 IN BYTE byCurrChannel, 592 BYTE byCurrChannel,
593 IN BOOL bChannelHit, 593 BOOL bChannelHit,
594 IN PWLAN_IE_SSID pSSID, 594 PWLAN_IE_SSID pSSID,
595 IN PWLAN_IE_SUPP_RATES pSuppRates, 595 PWLAN_IE_SUPP_RATES pSuppRates,
596 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 596 PWLAN_IE_SUPP_RATES pExtSuppRates,
597 IN PERPObject psERP, 597 PERPObject psERP,
598 IN PWLAN_IE_RSN pRSN, 598 PWLAN_IE_RSN pRSN,
599 IN PWLAN_IE_RSN_EXT pRSNWPA, 599 PWLAN_IE_RSN_EXT pRSNWPA,
600 IN PWLAN_IE_COUNTRY pIE_Country, 600 PWLAN_IE_COUNTRY pIE_Country,
601 IN PWLAN_IE_QUIET pIE_Quiet, 601 PWLAN_IE_QUIET pIE_Quiet,
602 IN PKnownBSS pBSSList, 602 PKnownBSS pBSSList,
603 IN UINT uIELength, 603 UINT uIELength,
604 IN PBYTE pbyIEs, 604 PBYTE pbyIEs,
605 IN HANDLE pRxPacketContext 605 void *pRxPacketContext
606 ) 606 )
607{ 607{
608 int ii; 608 int ii;
@@ -764,9 +764,9 @@ BSSbUpdateToBSSList (
764 764
765BOOL 765BOOL
766BSSDBbIsSTAInNodeDB( 766BSSDBbIsSTAInNodeDB(
767 IN PVOID pMgmtObject, 767 void *pMgmtObject,
768 IN PBYTE abyDstAddr, 768 PBYTE abyDstAddr,
769 OUT PUINT puNodeIndex 769 PUINT puNodeIndex
770 ) 770 )
771{ 771{
772 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject; 772 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject;
@@ -797,10 +797,10 @@ BSSDBbIsSTAInNodeDB(
797 * None 797 * None
798 * 798 *
799-*/ 799-*/
800VOID 800void
801BSSvCreateOneNode( 801BSSvCreateOneNode(
802 IN HANDLE hDeviceContext, 802 void *hDeviceContext,
803 OUT PUINT puNodeIndex 803 PUINT puNodeIndex
804 ) 804 )
805{ 805{
806 806
@@ -862,10 +862,10 @@ BSSvCreateOneNode(
862 * None 862 * None
863 * 863 *
864-*/ 864-*/
865VOID 865void
866BSSvRemoveOneNode( 866BSSvRemoveOneNode(
867 IN HANDLE hDeviceContext, 867 void *hDeviceContext,
868 IN UINT uNodeIndex 868 UINT uNodeIndex
869 ) 869 )
870{ 870{
871 871
@@ -895,12 +895,12 @@ BSSvRemoveOneNode(
895 * 895 *
896-*/ 896-*/
897 897
898VOID 898void
899BSSvUpdateAPNode( 899BSSvUpdateAPNode(
900 IN HANDLE hDeviceContext, 900 void *hDeviceContext,
901 IN PWORD pwCapInfo, 901 PWORD pwCapInfo,
902 IN PWLAN_IE_SUPP_RATES pSuppRates, 902 PWLAN_IE_SUPP_RATES pSuppRates,
903 IN PWLAN_IE_SUPP_RATES pExtSuppRates 903 PWLAN_IE_SUPP_RATES pExtSuppRates
904 ) 904 )
905{ 905{
906 PSDevice pDevice = (PSDevice)hDeviceContext; 906 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -919,7 +919,7 @@ BSSvUpdateAPNode(
919 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pExtSuppRates, 919 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pExtSuppRates,
920 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 920 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
921 uRateLen); 921 uRateLen);
922 RATEvParseMaxRate((PVOID) pDevice, 922 RATEvParseMaxRate((void *)pDevice,
923 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 923 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
924 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 924 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
925 TRUE, 925 TRUE,
@@ -958,9 +958,9 @@ BSSvUpdateAPNode(
958-*/ 958-*/
959 959
960 960
961VOID 961void
962BSSvAddMulticastNode( 962BSSvAddMulticastNode(
963 IN HANDLE hDeviceContext 963 void *hDeviceContext
964 ) 964 )
965{ 965{
966 PSDevice pDevice = (PSDevice)hDeviceContext; 966 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -972,7 +972,7 @@ BSSvAddMulticastNode(
972 pMgmt->sNodeDBTable[0].bActive = TRUE; 972 pMgmt->sNodeDBTable[0].bActive = TRUE;
973 pMgmt->sNodeDBTable[0].bPSEnable = FALSE; 973 pMgmt->sNodeDBTable[0].bPSEnable = FALSE;
974 skb_queue_head_init(&pMgmt->sNodeDBTable[0].sTxPSQueue); 974 skb_queue_head_init(&pMgmt->sNodeDBTable[0].sTxPSQueue);
975 RATEvParseMaxRate((PVOID) pDevice, 975 RATEvParseMaxRate((void *)pDevice,
976 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 976 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
977 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 977 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
978 TRUE, 978 TRUE,
@@ -1011,9 +1011,9 @@ BSSvAddMulticastNode(
1011BOOL cc=FALSE; 1011BOOL cc=FALSE;
1012UINT status; 1012UINT status;
1013#endif 1013#endif
1014VOID 1014void
1015BSSvSecondCallBack( 1015BSSvSecondCallBack(
1016 IN HANDLE hDeviceContext 1016 void *hDeviceContext
1017 ) 1017 )
1018{ 1018{
1019 PSDevice pDevice = (PSDevice)hDeviceContext; 1019 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1111,7 +1111,7 @@ start:
1111} 1111}
1112 1112
1113#ifdef Calcu_LinkQual 1113#ifdef Calcu_LinkQual
1114 s_uCalculateLinkQual((HANDLE)pDevice); 1114 s_uCalculateLinkQual((void *)pDevice);
1115#endif 1115#endif
1116 1116
1117 for (ii = 0; ii < (MAX_NODE_NUM + 1); ii++) { 1117 for (ii = 0; ii < (MAX_NODE_NUM + 1); ii++) {
@@ -1162,7 +1162,7 @@ start:
1162*/ 1162*/
1163 if (ii > 0) { 1163 if (ii > 0) {
1164 // ii = 0 for multicast node (AP & Adhoc) 1164 // ii = 0 for multicast node (AP & Adhoc)
1165 RATEvTxRateFallBack((PVOID)pDevice, &(pMgmt->sNodeDBTable[ii])); 1165 RATEvTxRateFallBack((void *)pDevice, &(pMgmt->sNodeDBTable[ii]));
1166 } 1166 }
1167 else { 1167 else {
1168 // ii = 0 reserved for unicast AP node (Infra STA) 1168 // ii = 0 reserved for unicast AP node (Infra STA)
@@ -1170,7 +1170,7 @@ start:
1170#ifdef PLICE_DEBUG 1170#ifdef PLICE_DEBUG
1171 printk("SecondCallback:Before:TxDataRate is %d\n",pMgmt->sNodeDBTable[0].wTxDataRate); 1171 printk("SecondCallback:Before:TxDataRate is %d\n",pMgmt->sNodeDBTable[0].wTxDataRate);
1172#endif 1172#endif
1173 RATEvTxRateFallBack((PVOID)pDevice, &(pMgmt->sNodeDBTable[ii])); 1173 RATEvTxRateFallBack((void *)pDevice, &(pMgmt->sNodeDBTable[ii]));
1174#ifdef PLICE_DEBUG 1174#ifdef PLICE_DEBUG
1175 printk("SecondCallback:After:TxDataRate is %d\n",pMgmt->sNodeDBTable[0].wTxDataRate); 1175 printk("SecondCallback:After:TxDataRate is %d\n",pMgmt->sNodeDBTable[0].wTxDataRate);
1176#endif 1176#endif
@@ -1215,14 +1215,14 @@ start:
1215 if (pDevice->bShortSlotTime) { 1215 if (pDevice->bShortSlotTime) {
1216 pDevice->bShortSlotTime = FALSE; 1216 pDevice->bShortSlotTime = FALSE;
1217 BBvSetShortSlotTime(pDevice); 1217 BBvSetShortSlotTime(pDevice);
1218 vUpdateIFS((PVOID)pDevice); 1218 vUpdateIFS((void *)pDevice);
1219 } 1219 }
1220 } 1220 }
1221 else { 1221 else {
1222 if (!pDevice->bShortSlotTime) { 1222 if (!pDevice->bShortSlotTime) {
1223 pDevice->bShortSlotTime = TRUE; 1223 pDevice->bShortSlotTime = TRUE;
1224 BBvSetShortSlotTime(pDevice); 1224 BBvSetShortSlotTime(pDevice);
1225 vUpdateIFS((PVOID)pDevice); 1225 vUpdateIFS((void *)pDevice);
1226 } 1226 }
1227 } 1227 }
1228 1228
@@ -1261,18 +1261,18 @@ start:
1261 if (pMgmt->sNodeDBTable[0].bActive) { // Assoc with BSS 1261 if (pMgmt->sNodeDBTable[0].bActive) { // Assoc with BSS
1262 // DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Callback inactive Count = [%d]\n", pMgmt->sNodeDBTable[0].uInActiveCount); 1262 // DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Callback inactive Count = [%d]\n", pMgmt->sNodeDBTable[0].uInActiveCount);
1263 //if (pDevice->bUpdateBBVGA) { 1263 //if (pDevice->bUpdateBBVGA) {
1264 // s_vCheckSensitivity((HANDLE) pDevice); 1264 // s_vCheckSensitivity((void *) pDevice);
1265 //} 1265 //}
1266 1266
1267 if (pDevice->bUpdateBBVGA) { 1267 if (pDevice->bUpdateBBVGA) {
1268 // s_vCheckSensitivity((HANDLE) pDevice); 1268 // s_vCheckSensitivity((void *) pDevice);
1269 s_vCheckPreEDThreshold((HANDLE)pDevice); 1269 s_vCheckPreEDThreshold((void *)pDevice);
1270 } 1270 }
1271 1271
1272 if ((pMgmt->sNodeDBTable[0].uInActiveCount >= (LOST_BEACON_COUNT/2)) && 1272 if ((pMgmt->sNodeDBTable[0].uInActiveCount >= (LOST_BEACON_COUNT/2)) &&
1273 (pDevice->byBBVGACurrent != pDevice->abyBBVGA[0]) ) { 1273 (pDevice->byBBVGACurrent != pDevice->abyBBVGA[0]) ) {
1274 pDevice->byBBVGANew = pDevice->abyBBVGA[0]; 1274 pDevice->byBBVGANew = pDevice->abyBBVGA[0];
1275 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_BBSENSITIVITY, NULL); 1275 bScheduleCommand((void *) pDevice, WLAN_CMD_CHANGE_BBSENSITIVITY, NULL);
1276 } 1276 }
1277 1277
1278 if (pMgmt->sNodeDBTable[0].uInActiveCount >= LOST_BEACON_COUNT) { 1278 if (pMgmt->sNodeDBTable[0].uInActiveCount >= LOST_BEACON_COUNT) {
@@ -1324,10 +1324,10 @@ start:
1324 pDevice->eEncryptionStatus = pDevice->eOldEncryptionStatus; 1324 pDevice->eEncryptionStatus = pDevice->eOldEncryptionStatus;
1325 1325
1326 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Roaming ...\n"); 1326 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Roaming ...\n");
1327 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 1327 BSSvClearBSSList((void *)pDevice, pDevice->bLinkPass);
1328 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 1328 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
1329 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 1329 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID);
1330 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID); 1330 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID);
1331 pDevice->uAutoReConnectTime = 0; 1331 pDevice->uAutoReConnectTime = 0;
1332 } 1332 }
1333 } 1333 }
@@ -1342,16 +1342,16 @@ start:
1342 else { 1342 else {
1343 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Adhoc re-scaning ...\n"); 1343 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Adhoc re-scaning ...\n");
1344 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 1344 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
1345 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 1345 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
1346 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 1346 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
1347 pDevice->uAutoReConnectTime = 0; 1347 pDevice->uAutoReConnectTime = 0;
1348 }; 1348 };
1349 } 1349 }
1350 if (pMgmt->eCurrState == WMAC_STATE_JOINTED) { 1350 if (pMgmt->eCurrState == WMAC_STATE_JOINTED) {
1351 1351
1352 if (pDevice->bUpdateBBVGA) { 1352 if (pDevice->bUpdateBBVGA) {
1353 //s_vCheckSensitivity((HANDLE) pDevice); 1353 //s_vCheckSensitivity((void *) pDevice);
1354 s_vCheckPreEDThreshold((HANDLE)pDevice); 1354 s_vCheckPreEDThreshold((void *)pDevice);
1355 } 1355 }
1356 if (pMgmt->sNodeDBTable[0].uInActiveCount >=ADHOC_LOST_BEACON_COUNT) { 1356 if (pMgmt->sNodeDBTable[0].uInActiveCount >=ADHOC_LOST_BEACON_COUNT) {
1357 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Lost other STA beacon [%d] sec, started !\n", pMgmt->sNodeDBTable[0].uInActiveCount); 1357 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Lost other STA beacon [%d] sec, started !\n", pMgmt->sNodeDBTable[0].uInActiveCount);
@@ -1388,13 +1388,13 @@ start:
1388 1388
1389 1389
1390 1390
1391VOID 1391void
1392BSSvUpdateNodeTxCounter( 1392BSSvUpdateNodeTxCounter(
1393 IN HANDLE hDeviceContext, 1393 void *hDeviceContext,
1394 IN BYTE byTsr0, 1394 BYTE byTsr0,
1395 IN BYTE byTsr1, 1395 BYTE byTsr1,
1396 IN PBYTE pbyBuffer, 1396 PBYTE pbyBuffer,
1397 IN UINT uFIFOHeaderSize 1397 UINT uFIFOHeaderSize
1398 ) 1398 )
1399{ 1399{
1400 PSDevice pDevice = (PSDevice)hDeviceContext; 1400 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1503,7 +1503,7 @@ BSSvUpdateNodeTxCounter(
1503 1503
1504 pMACHeader = (PS802_11Header)(pbyBuffer + uFIFOHeaderSize); 1504 pMACHeader = (PS802_11Header)(pbyBuffer + uFIFOHeaderSize);
1505 1505
1506 if (BSSDBbIsSTAInNodeDB((HANDLE)pMgmt, &(pMACHeader->abyAddr1[0]), &uNodeIndex)){ 1506 if (BSSDBbIsSTAInNodeDB((void *)pMgmt, &(pMACHeader->abyAddr1[0]), &uNodeIndex)){
1507 pMgmt->sNodeDBTable[uNodeIndex].uTxAttempts += 1; 1507 pMgmt->sNodeDBTable[uNodeIndex].uTxAttempts += 1;
1508 if ((byTsr1 & TSR1_TERR) == 0) { 1508 if ((byTsr1 & TSR1_TERR) == 0) {
1509 // transmit success, TxAttempts at least plus one 1509 // transmit success, TxAttempts at least plus one
@@ -1581,10 +1581,10 @@ BSSvUpdateNodeTxCounter(
1581-*/ 1581-*/
1582 1582
1583 1583
1584VOID 1584void
1585BSSvClearNodeDBTable( 1585BSSvClearNodeDBTable(
1586 IN HANDLE hDeviceContext, 1586 void *hDeviceContext,
1587 IN UINT uStartIndex 1587 UINT uStartIndex
1588 ) 1588 )
1589 1589
1590{ 1590{
@@ -1610,8 +1610,8 @@ BSSvClearNodeDBTable(
1610}; 1610};
1611 1611
1612 1612
1613VOID s_vCheckSensitivity( 1613void s_vCheckSensitivity(
1614 IN HANDLE hDeviceContext 1614 void *hDeviceContext
1615 ) 1615 )
1616{ 1616{
1617 PSDevice pDevice = (PSDevice)hDeviceContext; 1617 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1649,7 +1649,7 @@ VOID s_vCheckSensitivity(
1649 if (pDevice->byBBVGANew != pDevice->byBBVGACurrent) { 1649 if (pDevice->byBBVGANew != pDevice->byBBVGACurrent) {
1650 pDevice->uBBVGADiffCount++; 1650 pDevice->uBBVGADiffCount++;
1651 if (pDevice->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) 1651 if (pDevice->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD)
1652 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_BBSENSITIVITY, NULL); 1652 bScheduleCommand((void *) pDevice, WLAN_CMD_CHANGE_BBSENSITIVITY, NULL);
1653 } else { 1653 } else {
1654 pDevice->uBBVGADiffCount = 0; 1654 pDevice->uBBVGADiffCount = 0;
1655 } 1655 }
@@ -1659,9 +1659,9 @@ VOID s_vCheckSensitivity(
1659} 1659}
1660 1660
1661 1661
1662VOID 1662void
1663BSSvClearAnyBSSJoinRecord ( 1663BSSvClearAnyBSSJoinRecord (
1664 IN HANDLE hDeviceContext 1664 void *hDeviceContext
1665 ) 1665 )
1666{ 1666{
1667 PSDevice pDevice = (PSDevice)hDeviceContext; 1667 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1675,8 +1675,8 @@ BSSvClearAnyBSSJoinRecord (
1675} 1675}
1676 1676
1677#ifdef Calcu_LinkQual 1677#ifdef Calcu_LinkQual
1678VOID s_uCalculateLinkQual( 1678void s_uCalculateLinkQual(
1679 IN HANDLE hDeviceContext 1679 void *hDeviceContext
1680 ) 1680 )
1681{ 1681{
1682 PSDevice pDevice = (PSDevice)hDeviceContext; 1682 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1723,8 +1723,8 @@ else
1723} 1723}
1724#endif 1724#endif
1725 1725
1726VOID s_vCheckPreEDThreshold( 1726void s_vCheckPreEDThreshold(
1727 IN HANDLE hDeviceContext 1727 void *hDeviceContext
1728 ) 1728 )
1729{ 1729{
1730 PSDevice pDevice = (PSDevice)hDeviceContext; 1730 PSDevice pDevice = (PSDevice)hDeviceContext;
diff --git a/drivers/staging/vt6655/bssdb.h b/drivers/staging/vt6655/bssdb.h
index 5ce4ef9c1bd1..e09ef8762979 100644
--- a/drivers/staging/vt6655/bssdb.h
+++ b/drivers/staging/vt6655/bssdb.h
@@ -244,128 +244,128 @@ typedef struct tagKnownNodeDB {
244 244
245PKnownBSS 245PKnownBSS
246BSSpSearchBSSList( 246BSSpSearchBSSList(
247 IN HANDLE hDeviceContext, 247 void *hDeviceContext,
248 IN PBYTE pbyDesireBSSID, 248 PBYTE pbyDesireBSSID,
249 IN PBYTE pbyDesireSSID, 249 PBYTE pbyDesireSSID,
250 IN CARD_PHY_TYPE ePhyType 250 CARD_PHY_TYPE ePhyType
251 ); 251 );
252 252
253PKnownBSS 253PKnownBSS
254BSSpAddrIsInBSSList( 254BSSpAddrIsInBSSList(
255 IN HANDLE hDeviceContext, 255 void *hDeviceContext,
256 IN PBYTE abyBSSID, 256 PBYTE abyBSSID,
257 IN PWLAN_IE_SSID pSSID 257 PWLAN_IE_SSID pSSID
258 ); 258 );
259 259
260VOID 260void
261BSSvClearBSSList( 261BSSvClearBSSList(
262 IN HANDLE hDeviceContext, 262 void *hDeviceContext,
263 IN BOOL bKeepCurrBSSID 263 BOOL bKeepCurrBSSID
264 ); 264 );
265 265
266BOOL 266BOOL
267BSSbInsertToBSSList( 267BSSbInsertToBSSList(
268 IN HANDLE hDeviceContext, 268 void *hDeviceContext,
269 IN PBYTE abyBSSIDAddr, 269 PBYTE abyBSSIDAddr,
270 IN QWORD qwTimestamp, 270 QWORD qwTimestamp,
271 IN WORD wBeaconInterval, 271 WORD wBeaconInterval,
272 IN WORD wCapInfo, 272 WORD wCapInfo,
273 IN BYTE byCurrChannel, 273 BYTE byCurrChannel,
274 IN PWLAN_IE_SSID pSSID, 274 PWLAN_IE_SSID pSSID,
275 IN PWLAN_IE_SUPP_RATES pSuppRates, 275 PWLAN_IE_SUPP_RATES pSuppRates,
276 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 276 PWLAN_IE_SUPP_RATES pExtSuppRates,
277 IN PERPObject psERP, 277 PERPObject psERP,
278 IN PWLAN_IE_RSN pRSN, 278 PWLAN_IE_RSN pRSN,
279 IN PWLAN_IE_RSN_EXT pRSNWPA, 279 PWLAN_IE_RSN_EXT pRSNWPA,
280 IN PWLAN_IE_COUNTRY pIE_Country, 280 PWLAN_IE_COUNTRY pIE_Country,
281 IN PWLAN_IE_QUIET pIE_Quiet, 281 PWLAN_IE_QUIET pIE_Quiet,
282 IN UINT uIELength, 282 UINT uIELength,
283 IN PBYTE pbyIEs, 283 PBYTE pbyIEs,
284 IN HANDLE pRxPacketContext 284 void *pRxPacketContext
285 ); 285 );
286 286
287 287
288BOOL 288BOOL
289BSSbUpdateToBSSList( 289BSSbUpdateToBSSList(
290 IN HANDLE hDeviceContext, 290 void *hDeviceContext,
291 IN QWORD qwTimestamp, 291 QWORD qwTimestamp,
292 IN WORD wBeaconInterval, 292 WORD wBeaconInterval,
293 IN WORD wCapInfo, 293 WORD wCapInfo,
294 IN BYTE byCurrChannel, 294 BYTE byCurrChannel,
295 IN BOOL bChannelHit, 295 BOOL bChannelHit,
296 IN PWLAN_IE_SSID pSSID, 296 PWLAN_IE_SSID pSSID,
297 IN PWLAN_IE_SUPP_RATES pSuppRates, 297 PWLAN_IE_SUPP_RATES pSuppRates,
298 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 298 PWLAN_IE_SUPP_RATES pExtSuppRates,
299 IN PERPObject psERP, 299 PERPObject psERP,
300 IN PWLAN_IE_RSN pRSN, 300 PWLAN_IE_RSN pRSN,
301 IN PWLAN_IE_RSN_EXT pRSNWPA, 301 PWLAN_IE_RSN_EXT pRSNWPA,
302 IN PWLAN_IE_COUNTRY pIE_Country, 302 PWLAN_IE_COUNTRY pIE_Country,
303 IN PWLAN_IE_QUIET pIE_Quiet, 303 PWLAN_IE_QUIET pIE_Quiet,
304 IN PKnownBSS pBSSList, 304 PKnownBSS pBSSList,
305 IN UINT uIELength, 305 UINT uIELength,
306 IN PBYTE pbyIEs, 306 PBYTE pbyIEs,
307 IN HANDLE pRxPacketContext 307 void *pRxPacketContext
308 ); 308 );
309 309
310 310
311BOOL 311BOOL
312BSSDBbIsSTAInNodeDB( 312BSSDBbIsSTAInNodeDB(
313 IN HANDLE hDeviceContext, 313 void *hDeviceContext,
314 IN PBYTE abyDstAddr, 314 PBYTE abyDstAddr,
315 OUT PUINT puNodeIndex 315 PUINT puNodeIndex
316 ); 316 );
317 317
318VOID 318void
319BSSvCreateOneNode( 319BSSvCreateOneNode(
320 IN HANDLE hDeviceContext, 320 void *hDeviceContext,
321 OUT PUINT puNodeIndex 321 PUINT puNodeIndex
322 ); 322 );
323 323
324VOID 324void
325BSSvUpdateAPNode( 325BSSvUpdateAPNode(
326 IN HANDLE hDeviceContext, 326 void *hDeviceContext,
327 IN PWORD pwCapInfo, 327 PWORD pwCapInfo,
328 IN PWLAN_IE_SUPP_RATES pItemRates, 328 PWLAN_IE_SUPP_RATES pItemRates,
329 IN PWLAN_IE_SUPP_RATES pExtSuppRates 329 PWLAN_IE_SUPP_RATES pExtSuppRates
330 ); 330 );
331 331
332 332
333VOID 333void
334BSSvSecondCallBack( 334BSSvSecondCallBack(
335 IN HANDLE hDeviceContext 335 void *hDeviceContext
336 ); 336 );
337 337
338 338
339VOID 339void
340BSSvUpdateNodeTxCounter( 340BSSvUpdateNodeTxCounter(
341 IN HANDLE hDeviceContext, 341 void *hDeviceContext,
342 IN BYTE byTsr0, 342 BYTE byTsr0,
343 IN BYTE byTsr1, 343 BYTE byTsr1,
344 IN PBYTE pbyBuffer, 344 PBYTE pbyBuffer,
345 IN UINT uFIFOHeaderSize 345 UINT uFIFOHeaderSize
346 ); 346 );
347 347
348VOID 348void
349BSSvRemoveOneNode( 349BSSvRemoveOneNode(
350 IN HANDLE hDeviceContext, 350 void *hDeviceContext,
351 IN UINT uNodeIndex 351 UINT uNodeIndex
352 ); 352 );
353 353
354VOID 354void
355BSSvAddMulticastNode( 355BSSvAddMulticastNode(
356 IN HANDLE hDeviceContext 356 void *hDeviceContext
357 ); 357 );
358 358
359 359
360VOID 360void
361BSSvClearNodeDBTable( 361BSSvClearNodeDBTable(
362 IN HANDLE hDeviceContext, 362 void *hDeviceContext,
363 IN UINT uStartIndex 363 UINT uStartIndex
364 ); 364 );
365 365
366VOID 366void
367BSSvClearAnyBSSJoinRecord( 367BSSvClearAnyBSSJoinRecord(
368 IN HANDLE hDeviceContext 368 void *hDeviceContext
369 ); 369 );
370 370
371#endif //__BSSDB_H__ 371#endif //__BSSDB_H__
diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c
index bf4fd49709df..7bc2d7654b07 100644
--- a/drivers/staging/vt6655/card.c
+++ b/drivers/staging/vt6655/card.c
@@ -423,12 +423,12 @@ SCountryTable ChannelRuleTab[CCODE_MAX+1] =
423/*--------------------- Static Functions --------------------------*/ 423/*--------------------- Static Functions --------------------------*/
424 424
425static 425static
426VOID 426void
427s_vCaculateOFDMRParameter( 427s_vCaculateOFDMRParameter(
428 IN BYTE byRate, 428 BYTE byRate,
429 IN CARD_PHY_TYPE ePHYType, 429 CARD_PHY_TYPE ePHYType,
430 OUT PBYTE pbyTxRate, 430 PBYTE pbyTxRate,
431 OUT PBYTE pbyRsvTime 431 PBYTE pbyRsvTime
432 ); 432 );
433 433
434 434
@@ -496,12 +496,12 @@ exit:
496 * 496 *
497 */ 497 */
498static 498static
499VOID 499void
500s_vCaculateOFDMRParameter ( 500s_vCaculateOFDMRParameter (
501 IN BYTE byRate, 501 BYTE byRate,
502 IN CARD_PHY_TYPE ePHYType, 502 CARD_PHY_TYPE ePHYType,
503 OUT PBYTE pbyTxRate, 503 PBYTE pbyTxRate,
504 OUT PBYTE pbyRsvTime 504 PBYTE pbyRsvTime
505 ) 505 )
506{ 506{
507 switch (byRate) { 507 switch (byRate) {
@@ -611,8 +611,8 @@ s_vCaculateOFDMRParameter (
611 * 611 *
612 */ 612 */
613static 613static
614VOID 614void
615s_vSetRSPINF (PSDevice pDevice, CARD_PHY_TYPE ePHYType, PVOID pvSupportRateIEs, PVOID pvExtSupportRateIEs) 615s_vSetRSPINF (PSDevice pDevice, CARD_PHY_TYPE ePHYType, void *pvSupportRateIEs, void *pvExtSupportRateIEs)
616{ 616{
617 BYTE byServ = 0, bySignal = 0; // For CCK 617 BYTE byServ = 0, bySignal = 0; // For CCK
618 WORD wLen = 0; 618 WORD wLen = 0;
@@ -728,7 +728,7 @@ s_vSetRSPINF (PSDevice pDevice, CARD_PHY_TYPE ePHYType, PVOID pvSupportRateIEs,
728/*--------------------- Export Variables --------------------------*/ 728/*--------------------- Export Variables --------------------------*/
729 729
730/*--------------------- Export Functions --------------------------*/ 730/*--------------------- Export Functions --------------------------*/
731BYTE CARDbyGetChannelMapping (PVOID pDeviceHandler, BYTE byChannelNumber, CARD_PHY_TYPE ePhyType) 731BYTE CARDbyGetChannelMapping (void *pDeviceHandler, BYTE byChannelNumber, CARD_PHY_TYPE ePhyType)
732{ 732{
733 UINT ii; 733 UINT ii;
734 734
@@ -746,7 +746,7 @@ BYTE CARDbyGetChannelMapping (PVOID pDeviceHandler, BYTE byChannelNumber, CARD_P
746} 746}
747 747
748 748
749BYTE CARDbyGetChannelNumber (PVOID pDeviceHandler, BYTE byChannelIndex) 749BYTE CARDbyGetChannelNumber (void *pDeviceHandler, BYTE byChannelIndex)
750{ 750{
751// PSDevice pDevice = (PSDevice) pDeviceHandler; 751// PSDevice pDevice = (PSDevice) pDeviceHandler;
752 return(sChannelTbl[byChannelIndex].byChannelNumber); 752 return(sChannelTbl[byChannelIndex].byChannelNumber);
@@ -765,7 +765,7 @@ BYTE CARDbyGetChannelNumber (PVOID pDeviceHandler, BYTE byChannelIndex)
765 * Return Value: TRUE if succeeded; FALSE if failed. 765 * Return Value: TRUE if succeeded; FALSE if failed.
766 * 766 *
767 */ 767 */
768BOOL CARDbSetChannel (PVOID pDeviceHandler, UINT uConnectionChannel) 768BOOL CARDbSetChannel (void *pDeviceHandler, UINT uConnectionChannel)
769{ 769{
770 PSDevice pDevice = (PSDevice) pDeviceHandler; 770 PSDevice pDevice = (PSDevice) pDeviceHandler;
771 BOOL bResult = TRUE; 771 BOOL bResult = TRUE;
@@ -853,7 +853,7 @@ BOOL CARDbSetChannel (PVOID pDeviceHandler, UINT uConnectionChannel)
853 * 853 *
854 */ 854 */
855/* 855/*
856BOOL CARDbSendPacket (PVOID pDeviceHandler, PVOID pPacket, CARD_PKT_TYPE ePktType, UINT uLength) 856BOOL CARDbSendPacket (void *pDeviceHandler, void *pPacket, CARD_PKT_TYPE ePktType, UINT uLength)
857{ 857{
858 PSDevice pDevice = (PSDevice) pDeviceHandler; 858 PSDevice pDevice = (PSDevice) pDeviceHandler;
859 if (ePktType == PKT_TYPE_802_11_MNG) { 859 if (ePktType == PKT_TYPE_802_11_MNG) {
@@ -881,7 +881,7 @@ BOOL CARDbSendPacket (PVOID pDeviceHandler, PVOID pPacket, CARD_PKT_TYPE ePktTyp
881 * Return Value: TRUE if short preamble; otherwise FALSE 881 * Return Value: TRUE if short preamble; otherwise FALSE
882 * 882 *
883 */ 883 */
884BOOL CARDbIsShortPreamble (PVOID pDeviceHandler) 884BOOL CARDbIsShortPreamble (void *pDeviceHandler)
885{ 885{
886 PSDevice pDevice = (PSDevice) pDeviceHandler; 886 PSDevice pDevice = (PSDevice) pDeviceHandler;
887 if (pDevice->byPreambleType == 0) { 887 if (pDevice->byPreambleType == 0) {
@@ -902,7 +902,7 @@ BOOL CARDbIsShortPreamble (PVOID pDeviceHandler)
902 * Return Value: TRUE if short slot time; otherwise FALSE 902 * Return Value: TRUE if short slot time; otherwise FALSE
903 * 903 *
904 */ 904 */
905BOOL CARDbIsShorSlotTime (PVOID pDeviceHandler) 905BOOL CARDbIsShorSlotTime (void *pDeviceHandler)
906{ 906{
907 PSDevice pDevice = (PSDevice) pDeviceHandler; 907 PSDevice pDevice = (PSDevice) pDeviceHandler;
908 return(pDevice->bShortSlotTime); 908 return(pDevice->bShortSlotTime);
@@ -921,7 +921,7 @@ BOOL CARDbIsShorSlotTime (PVOID pDeviceHandler)
921 * Return Value: None. 921 * Return Value: None.
922 * 922 *
923 */ 923 */
924BOOL CARDbSetPhyParameter (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType, WORD wCapInfo, BYTE byERPField, PVOID pvSupportRateIEs, PVOID pvExtSupportRateIEs) 924BOOL CARDbSetPhyParameter (void *pDeviceHandler, CARD_PHY_TYPE ePHYType, WORD wCapInfo, BYTE byERPField, void *pvSupportRateIEs, void *pvExtSupportRateIEs)
925{ 925{
926 PSDevice pDevice = (PSDevice) pDeviceHandler; 926 PSDevice pDevice = (PSDevice) pDeviceHandler;
927 BYTE byCWMaxMin = 0; 927 BYTE byCWMaxMin = 0;
@@ -1108,7 +1108,7 @@ BOOL CARDbSetPhyParameter (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType, WORD wC
1108 * Return Value: none 1108 * Return Value: none
1109 * 1109 *
1110 */ 1110 */
1111BOOL CARDbUpdateTSF (PVOID pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp, QWORD qwLocalTSF) 1111BOOL CARDbUpdateTSF (void *pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp, QWORD qwLocalTSF)
1112{ 1112{
1113 PSDevice pDevice = (PSDevice) pDeviceHandler; 1113 PSDevice pDevice = (PSDevice) pDeviceHandler;
1114 QWORD qwTSFOffset; 1114 QWORD qwTSFOffset;
@@ -1143,7 +1143,7 @@ BOOL CARDbUpdateTSF (PVOID pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp,
1143 * Return Value: TRUE if succeed; otherwise FALSE 1143 * Return Value: TRUE if succeed; otherwise FALSE
1144 * 1144 *
1145 */ 1145 */
1146BOOL CARDbSetBeaconPeriod (PVOID pDeviceHandler, WORD wBeaconInterval) 1146BOOL CARDbSetBeaconPeriod (void *pDeviceHandler, WORD wBeaconInterval)
1147{ 1147{
1148 PSDevice pDevice = (PSDevice) pDeviceHandler; 1148 PSDevice pDevice = (PSDevice) pDeviceHandler;
1149 UINT uBeaconInterval = 0; 1149 UINT uBeaconInterval = 0;
@@ -1197,7 +1197,7 @@ BOOL CARDbSetBeaconPeriod (PVOID pDeviceHandler, WORD wBeaconInterval)
1197 * Return Value: TRUE if all data packet complete; otherwise FALSE. 1197 * Return Value: TRUE if all data packet complete; otherwise FALSE.
1198 * 1198 *
1199 */ 1199 */
1200BOOL CARDbStopTxPacket (PVOID pDeviceHandler, CARD_PKT_TYPE ePktType) 1200BOOL CARDbStopTxPacket (void *pDeviceHandler, CARD_PKT_TYPE ePktType)
1201{ 1201{
1202 PSDevice pDevice = (PSDevice) pDeviceHandler; 1202 PSDevice pDevice = (PSDevice) pDeviceHandler;
1203 1203
@@ -1255,7 +1255,7 @@ BOOL CARDbStopTxPacket (PVOID pDeviceHandler, CARD_PKT_TYPE ePktType)
1255 * Return Value: TRUE if success; FALSE if failed. 1255 * Return Value: TRUE if success; FALSE if failed.
1256 * 1256 *
1257 */ 1257 */
1258BOOL CARDbStartTxPacket (PVOID pDeviceHandler, CARD_PKT_TYPE ePktType) 1258BOOL CARDbStartTxPacket (void *pDeviceHandler, CARD_PKT_TYPE ePktType)
1259{ 1259{
1260 PSDevice pDevice = (PSDevice) pDeviceHandler; 1260 PSDevice pDevice = (PSDevice) pDeviceHandler;
1261 1261
@@ -1297,7 +1297,7 @@ BOOL CARDbStartTxPacket (PVOID pDeviceHandler, CARD_PKT_TYPE ePktType)
1297 * Return Value: TRUE if success; FALSE if failed. 1297 * Return Value: TRUE if success; FALSE if failed.
1298 * 1298 *
1299 */ 1299 */
1300BOOL CARDbSetBSSID(PVOID pDeviceHandler, PBYTE pbyBSSID, CARD_OP_MODE eOPMode) 1300BOOL CARDbSetBSSID(void *pDeviceHandler, PBYTE pbyBSSID, CARD_OP_MODE eOPMode)
1301{ 1301{
1302 PSDevice pDevice = (PSDevice) pDeviceHandler; 1302 PSDevice pDevice = (PSDevice) pDeviceHandler;
1303 1303
@@ -1367,7 +1367,7 @@ BOOL CARDbSetBSSID(PVOID pDeviceHandler, PBYTE pbyBSSID, CARD_OP_MODE eOPMode)
1367 * 1367 *
1368 */ 1368 */
1369BOOL CARDbSetTxDataRate( 1369BOOL CARDbSetTxDataRate(
1370 PVOID pDeviceHandler, 1370 void *pDeviceHandler,
1371 WORD wDataRate 1371 WORD wDataRate
1372 ) 1372 )
1373{ 1373{
@@ -1393,7 +1393,7 @@ BOOL CARDbSetTxDataRate(
1393-*/ 1393-*/
1394BOOL 1394BOOL
1395CARDbPowerDown( 1395CARDbPowerDown(
1396 PVOID pDeviceHandler 1396 void *pDeviceHandler
1397 ) 1397 )
1398{ 1398{
1399 PSDevice pDevice = (PSDevice)pDeviceHandler; 1399 PSDevice pDevice = (PSDevice)pDeviceHandler;
@@ -1430,7 +1430,7 @@ CARDbPowerDown(
1430 * Return Value: TRUE if success; otherwise FALSE 1430 * Return Value: TRUE if success; otherwise FALSE
1431 * 1431 *
1432 */ 1432 */
1433BOOL CARDbRadioPowerOff (PVOID pDeviceHandler) 1433BOOL CARDbRadioPowerOff (void *pDeviceHandler)
1434{ 1434{
1435 PSDevice pDevice = (PSDevice) pDeviceHandler; 1435 PSDevice pDevice = (PSDevice) pDeviceHandler;
1436 BOOL bResult = TRUE; 1436 BOOL bResult = TRUE;
@@ -1479,7 +1479,7 @@ MACvRegBitsOn(pDevice->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); //LED issue
1479 * Return Value: TRUE if success; otherwise FALSE 1479 * Return Value: TRUE if success; otherwise FALSE
1480 * 1480 *
1481 */ 1481 */
1482BOOL CARDbRadioPowerOn (PVOID pDeviceHandler) 1482BOOL CARDbRadioPowerOn (void *pDeviceHandler)
1483{ 1483{
1484 PSDevice pDevice = (PSDevice) pDeviceHandler; 1484 PSDevice pDevice = (PSDevice) pDeviceHandler;
1485 BOOL bResult = TRUE; 1485 BOOL bResult = TRUE;
@@ -1523,7 +1523,7 @@ MACvRegBitsOff(pDevice->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); //LED issue
1523 1523
1524 1524
1525 1525
1526BOOL CARDbRemoveKey (PVOID pDeviceHandler, PBYTE pbyBSSID) 1526BOOL CARDbRemoveKey (void *pDeviceHandler, PBYTE pbyBSSID)
1527{ 1527{
1528 PSDevice pDevice = (PSDevice) pDeviceHandler; 1528 PSDevice pDevice = (PSDevice) pDeviceHandler;
1529 1529
@@ -1550,10 +1550,10 @@ BOOL CARDbRemoveKey (PVOID pDeviceHandler, PBYTE pbyBSSID)
1550-*/ 1550-*/
1551BOOL 1551BOOL
1552CARDbAdd_PMKID_Candidate ( 1552CARDbAdd_PMKID_Candidate (
1553 IN PVOID pDeviceHandler, 1553 void *pDeviceHandler,
1554 IN PBYTE pbyBSSID, 1554 PBYTE pbyBSSID,
1555 IN BOOL bRSNCapExist, 1555 BOOL bRSNCapExist,
1556 IN WORD wRSNCap 1556 WORD wRSNCap
1557 ) 1557 )
1558{ 1558{
1559 PSDevice pDevice = (PSDevice) pDeviceHandler; 1559 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -1576,7 +1576,7 @@ CARDbAdd_PMKID_Candidate (
1576 // Update Old Candidate 1576 // Update Old Candidate
1577 for (ii = 0; ii < pDevice->gsPMKIDCandidate.NumCandidates; ii++) { 1577 for (ii = 0; ii < pDevice->gsPMKIDCandidate.NumCandidates; ii++) {
1578 pCandidateList = &pDevice->gsPMKIDCandidate.CandidateList[ii]; 1578 pCandidateList = &pDevice->gsPMKIDCandidate.CandidateList[ii];
1579 if ( !memcmp(pCandidateList->BSSID, pbyBSSID, U_ETHER_ADDR_LEN)) { 1579 if ( !memcmp(pCandidateList->BSSID, pbyBSSID, ETH_ALEN)) {
1580 if ((bRSNCapExist == TRUE) && (wRSNCap & BIT0)) { 1580 if ((bRSNCapExist == TRUE) && (wRSNCap & BIT0)) {
1581 pCandidateList->Flags |= NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED; 1581 pCandidateList->Flags |= NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED;
1582 } else { 1582 } else {
@@ -1593,15 +1593,15 @@ CARDbAdd_PMKID_Candidate (
1593 } else { 1593 } else {
1594 pCandidateList->Flags &= ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED); 1594 pCandidateList->Flags &= ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED);
1595 } 1595 }
1596 memcpy(pCandidateList->BSSID, pbyBSSID, U_ETHER_ADDR_LEN); 1596 memcpy(pCandidateList->BSSID, pbyBSSID, ETH_ALEN);
1597 pDevice->gsPMKIDCandidate.NumCandidates++; 1597 pDevice->gsPMKIDCandidate.NumCandidates++;
1598 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"NumCandidates:%d\n", (int)pDevice->gsPMKIDCandidate.NumCandidates); 1598 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"NumCandidates:%d\n", (int)pDevice->gsPMKIDCandidate.NumCandidates);
1599 return TRUE; 1599 return TRUE;
1600} 1600}
1601 1601
1602PVOID 1602void *
1603CARDpGetCurrentAddress ( 1603CARDpGetCurrentAddress (
1604 IN PVOID pDeviceHandler 1604 void *pDeviceHandler
1605 ) 1605 )
1606{ 1606{
1607 PSDevice pDevice = (PSDevice) pDeviceHandler; 1607 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -1611,7 +1611,7 @@ CARDpGetCurrentAddress (
1611 1611
1612 1612
1613 1613
1614VOID CARDvInitChannelTable (PVOID pDeviceHandler) 1614void CARDvInitChannelTable (void *pDeviceHandler)
1615{ 1615{
1616 PSDevice pDevice = (PSDevice) pDeviceHandler; 1616 PSDevice pDevice = (PSDevice) pDeviceHandler;
1617 BOOL bMultiBand = FALSE; 1617 BOOL bMultiBand = FALSE;
@@ -1708,9 +1708,9 @@ VOID CARDvInitChannelTable (PVOID pDeviceHandler)
1708-*/ 1708-*/
1709BOOL 1709BOOL
1710CARDbStartMeasure ( 1710CARDbStartMeasure (
1711 IN PVOID pDeviceHandler, 1711 void *pDeviceHandler,
1712 IN PVOID pvMeasureEIDs, 1712 void *pvMeasureEIDs,
1713 IN UINT uNumOfMeasureEIDs 1713 UINT uNumOfMeasureEIDs
1714 ) 1714 )
1715{ 1715{
1716 PSDevice pDevice = (PSDevice) pDeviceHandler; 1716 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -1835,10 +1835,10 @@ CARDbStartMeasure (
1835-*/ 1835-*/
1836BOOL 1836BOOL
1837CARDbChannelSwitch ( 1837CARDbChannelSwitch (
1838 IN PVOID pDeviceHandler, 1838 void *pDeviceHandler,
1839 IN BYTE byMode, 1839 BYTE byMode,
1840 IN BYTE byNewChannel, 1840 BYTE byNewChannel,
1841 IN BYTE byCount 1841 BYTE byCount
1842 ) 1842 )
1843{ 1843{
1844 PSDevice pDevice = (PSDevice) pDeviceHandler; 1844 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -1878,12 +1878,12 @@ CARDbChannelSwitch (
1878-*/ 1878-*/
1879BOOL 1879BOOL
1880CARDbSetQuiet ( 1880CARDbSetQuiet (
1881 IN PVOID pDeviceHandler, 1881 void *pDeviceHandler,
1882 IN BOOL bResetQuiet, 1882 BOOL bResetQuiet,
1883 IN BYTE byQuietCount, 1883 BYTE byQuietCount,
1884 IN BYTE byQuietPeriod, 1884 BYTE byQuietPeriod,
1885 IN WORD wQuietDuration, 1885 WORD wQuietDuration,
1886 IN WORD wQuietOffset 1886 WORD wQuietOffset
1887 ) 1887 )
1888{ 1888{
1889 PSDevice pDevice = (PSDevice) pDeviceHandler; 1889 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -1934,7 +1934,7 @@ CARDbSetQuiet (
1934-*/ 1934-*/
1935BOOL 1935BOOL
1936CARDbStartQuiet ( 1936CARDbStartQuiet (
1937 IN PVOID pDeviceHandler 1937 void *pDeviceHandler
1938 ) 1938 )
1939{ 1939{
1940 PSDevice pDevice = (PSDevice) pDeviceHandler; 1940 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2033,11 +2033,11 @@ CARDbStartQuiet (
2033 * Return Value: none. 2033 * Return Value: none.
2034 * 2034 *
2035-*/ 2035-*/
2036VOID 2036void
2037CARDvSetCountryInfo ( 2037CARDvSetCountryInfo (
2038 IN PVOID pDeviceHandler, 2038 void *pDeviceHandler,
2039 IN CARD_PHY_TYPE ePHYType, 2039 CARD_PHY_TYPE ePHYType,
2040 IN PVOID pIE 2040 void *pIE
2041 ) 2041 )
2042{ 2042{
2043 PSDevice pDevice = (PSDevice) pDeviceHandler; 2043 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2092,11 +2092,11 @@ CARDvSetCountryInfo (
2092 * Return Value: none. 2092 * Return Value: none.
2093 * 2093 *
2094-*/ 2094-*/
2095VOID 2095void
2096CARDvSetPowerConstraint ( 2096CARDvSetPowerConstraint (
2097 IN PVOID pDeviceHandler, 2097 void *pDeviceHandler,
2098 IN BYTE byChannel, 2098 BYTE byChannel,
2099 IN I8 byPower 2099 I8 byPower
2100 ) 2100 )
2101{ 2101{
2102 PSDevice pDevice = (PSDevice) pDeviceHandler; 2102 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2127,11 +2127,11 @@ CARDvSetPowerConstraint (
2127 * Return Value: none. 2127 * Return Value: none.
2128 * 2128 *
2129-*/ 2129-*/
2130VOID 2130void
2131CARDvGetPowerCapability ( 2131CARDvGetPowerCapability (
2132 IN PVOID pDeviceHandler, 2132 void *pDeviceHandler,
2133 OUT PBYTE pbyMinPower, 2133 PBYTE pbyMinPower,
2134 OUT PBYTE pbyMaxPower 2134 PBYTE pbyMaxPower
2135 ) 2135 )
2136{ 2136{
2137 PSDevice pDevice = (PSDevice) pDeviceHandler; 2137 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2165,8 +2165,8 @@ CARDvGetPowerCapability (
2165-*/ 2165-*/
2166BYTE 2166BYTE
2167CARDbySetSupportChannels ( 2167CARDbySetSupportChannels (
2168 IN PVOID pDeviceHandler, 2168 void *pDeviceHandler,
2169 IN OUT PBYTE pbyIEs 2169 PBYTE pbyIEs
2170 ) 2170 )
2171{ 2171{
2172 PSDevice pDevice = (PSDevice) pDeviceHandler; 2172 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2256,7 +2256,7 @@ CARDbySetSupportChannels (
2256-*/ 2256-*/
2257I8 2257I8
2258CARDbyGetTransmitPower ( 2258CARDbyGetTransmitPower (
2259 IN PVOID pDeviceHandler 2259 void *pDeviceHandler
2260 ) 2260 )
2261{ 2261{
2262 PSDevice pDevice = (PSDevice) pDeviceHandler; 2262 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2267,8 +2267,8 @@ CARDbyGetTransmitPower (
2267 2267
2268BOOL 2268BOOL
2269CARDbChannelGetList ( 2269CARDbChannelGetList (
2270 IN UINT uCountryCodeIdx, 2270 UINT uCountryCodeIdx,
2271 OUT PBYTE pbyChannelTable 2271 PBYTE pbyChannelTable
2272 ) 2272 )
2273{ 2273{
2274 if (uCountryCodeIdx >= CCODE_MAX) { 2274 if (uCountryCodeIdx >= CCODE_MAX) {
@@ -2279,10 +2279,10 @@ CARDbChannelGetList (
2279} 2279}
2280 2280
2281 2281
2282VOID 2282void
2283CARDvSetCountryIE( 2283CARDvSetCountryIE(
2284 IN PVOID pDeviceHandler, 2284 void *pDeviceHandler,
2285 IN PVOID pIE 2285 void *pIE
2286 ) 2286 )
2287{ 2287{
2288 PSDevice pDevice = (PSDevice) pDeviceHandler; 2288 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2307,10 +2307,10 @@ CARDvSetCountryIE(
2307 2307
2308BOOL 2308BOOL
2309CARDbGetChannelMapInfo( 2309CARDbGetChannelMapInfo(
2310 IN PVOID pDeviceHandler, 2310 void *pDeviceHandler,
2311 IN UINT uChannelIndex, 2311 UINT uChannelIndex,
2312 OUT PBYTE pbyChannelNumber, 2312 PBYTE pbyChannelNumber,
2313 OUT PBYTE pbyMap 2313 PBYTE pbyMap
2314 ) 2314 )
2315{ 2315{
2316// PSDevice pDevice = (PSDevice) pDeviceHandler; 2316// PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2324,11 +2324,11 @@ CARDbGetChannelMapInfo(
2324} 2324}
2325 2325
2326 2326
2327VOID 2327void
2328CARDvSetChannelMapInfo( 2328CARDvSetChannelMapInfo(
2329 IN PVOID pDeviceHandler, 2329 void *pDeviceHandler,
2330 IN UINT uChannelIndex, 2330 UINT uChannelIndex,
2331 IN BYTE byMap 2331 BYTE byMap
2332 ) 2332 )
2333{ 2333{
2334// PSDevice pDevice = (PSDevice) pDeviceHandler; 2334// PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2340,9 +2340,9 @@ CARDvSetChannelMapInfo(
2340} 2340}
2341 2341
2342 2342
2343VOID 2343void
2344CARDvClearChannelMapInfo( 2344CARDvClearChannelMapInfo(
2345 IN PVOID pDeviceHandler 2345 void *pDeviceHandler
2346 ) 2346 )
2347{ 2347{
2348// PSDevice pDevice = (PSDevice) pDeviceHandler; 2348// PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2356,7 +2356,7 @@ CARDvClearChannelMapInfo(
2356 2356
2357BYTE 2357BYTE
2358CARDbyAutoChannelSelect( 2358CARDbyAutoChannelSelect(
2359 IN PVOID pDeviceHandler, 2359 void *pDeviceHandler,
2360 CARD_PHY_TYPE ePHYType 2360 CARD_PHY_TYPE ePHYType
2361 ) 2361 )
2362{ 2362{
@@ -2420,9 +2420,9 @@ CARDbyAutoChannelSelect(
2420 2420
2421 2421
2422//xxx 2422//xxx
2423VOID 2423void
2424CARDvSafeResetTx ( 2424CARDvSafeResetTx (
2425 IN PVOID pDeviceHandler 2425 void *pDeviceHandler
2426 ) 2426 )
2427{ 2427{
2428 PSDevice pDevice = (PSDevice) pDeviceHandler; 2428 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2476,9 +2476,9 @@ CARDvSafeResetTx (
2476 * Return Value: none 2476 * Return Value: none
2477 * 2477 *
2478-*/ 2478-*/
2479VOID 2479void
2480CARDvSafeResetRx ( 2480CARDvSafeResetRx (
2481 IN PVOID pDeviceHandler 2481 void *pDeviceHandler
2482 ) 2482 )
2483{ 2483{
2484 PSDevice pDevice = (PSDevice) pDeviceHandler; 2484 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2537,7 +2537,7 @@ CARDvSafeResetRx (
2537 * Return Value: response Control frame rate 2537 * Return Value: response Control frame rate
2538 * 2538 *
2539 */ 2539 */
2540WORD CARDwGetCCKControlRate(PVOID pDeviceHandler, WORD wRateIdx) 2540WORD CARDwGetCCKControlRate(void *pDeviceHandler, WORD wRateIdx)
2541{ 2541{
2542 PSDevice pDevice = (PSDevice) pDeviceHandler; 2542 PSDevice pDevice = (PSDevice) pDeviceHandler;
2543 UINT ui = (UINT)wRateIdx; 2543 UINT ui = (UINT)wRateIdx;
@@ -2564,14 +2564,14 @@ WORD CARDwGetCCKControlRate(PVOID pDeviceHandler, WORD wRateIdx)
2564 * Return Value: response Control frame rate 2564 * Return Value: response Control frame rate
2565 * 2565 *
2566 */ 2566 */
2567WORD CARDwGetOFDMControlRate (PVOID pDeviceHandler, WORD wRateIdx) 2567WORD CARDwGetOFDMControlRate (void *pDeviceHandler, WORD wRateIdx)
2568{ 2568{
2569 PSDevice pDevice = (PSDevice) pDeviceHandler; 2569 PSDevice pDevice = (PSDevice) pDeviceHandler;
2570 UINT ui = (UINT)wRateIdx; 2570 UINT ui = (UINT)wRateIdx;
2571 2571
2572 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BASIC RATE: %X\n", pDevice->wBasicRate); 2572 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BASIC RATE: %X\n", pDevice->wBasicRate);
2573 2573
2574 if (!CARDbIsOFDMinBasicRate((PVOID)pDevice)) { 2574 if (!CARDbIsOFDMinBasicRate((void *)pDevice)) {
2575 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"CARDwGetOFDMControlRate:(NO OFDM) %d\n", wRateIdx); 2575 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"CARDwGetOFDMControlRate:(NO OFDM) %d\n", wRateIdx);
2576 if (wRateIdx > RATE_24M) 2576 if (wRateIdx > RATE_24M)
2577 wRateIdx = RATE_24M; 2577 wRateIdx = RATE_24M;
@@ -2601,7 +2601,7 @@ WORD CARDwGetOFDMControlRate (PVOID pDeviceHandler, WORD wRateIdx)
2601 * Return Value: None. 2601 * Return Value: None.
2602 * 2602 *
2603 */ 2603 */
2604void CARDvSetRSPINF (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType) 2604void CARDvSetRSPINF (void *pDeviceHandler, CARD_PHY_TYPE ePHYType)
2605{ 2605{
2606 PSDevice pDevice = (PSDevice) pDeviceHandler; 2606 PSDevice pDevice = (PSDevice) pDeviceHandler;
2607 BYTE byServ = 0x00, bySignal = 0x00; //For CCK 2607 BYTE byServ = 0x00, bySignal = 0x00; //For CCK
@@ -2614,7 +2614,7 @@ void CARDvSetRSPINF (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType)
2614 //RSPINF_b_1 2614 //RSPINF_b_1
2615 BBvCaculateParameter(pDevice, 2615 BBvCaculateParameter(pDevice,
2616 14, 2616 14,
2617 CARDwGetCCKControlRate((PVOID)pDevice, RATE_1M), 2617 CARDwGetCCKControlRate((void *)pDevice, RATE_1M),
2618 PK_TYPE_11B, 2618 PK_TYPE_11B,
2619 &wLen, 2619 &wLen,
2620 &byServ, 2620 &byServ,
@@ -2625,7 +2625,7 @@ void CARDvSetRSPINF (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType)
2625 ///RSPINF_b_2 2625 ///RSPINF_b_2
2626 BBvCaculateParameter(pDevice, 2626 BBvCaculateParameter(pDevice,
2627 14, 2627 14,
2628 CARDwGetCCKControlRate((PVOID)pDevice, RATE_2M), 2628 CARDwGetCCKControlRate((void *)pDevice, RATE_2M),
2629 PK_TYPE_11B, 2629 PK_TYPE_11B,
2630 &wLen, 2630 &wLen,
2631 &byServ, 2631 &byServ,
@@ -2636,7 +2636,7 @@ void CARDvSetRSPINF (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType)
2636 //RSPINF_b_5 2636 //RSPINF_b_5
2637 BBvCaculateParameter(pDevice, 2637 BBvCaculateParameter(pDevice,
2638 14, 2638 14,
2639 CARDwGetCCKControlRate((PVOID)pDevice, RATE_5M), 2639 CARDwGetCCKControlRate((void *)pDevice, RATE_5M),
2640 PK_TYPE_11B, 2640 PK_TYPE_11B,
2641 &wLen, 2641 &wLen,
2642 &byServ, 2642 &byServ,
@@ -2647,7 +2647,7 @@ void CARDvSetRSPINF (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType)
2647 //RSPINF_b_11 2647 //RSPINF_b_11
2648 BBvCaculateParameter(pDevice, 2648 BBvCaculateParameter(pDevice,
2649 14, 2649 14,
2650 CARDwGetCCKControlRate((PVOID)pDevice, RATE_11M), 2650 CARDwGetCCKControlRate((void *)pDevice, RATE_11M),
2651 PK_TYPE_11B, 2651 PK_TYPE_11B,
2652 &wLen, 2652 &wLen,
2653 &byServ, 2653 &byServ,
@@ -2686,26 +2686,26 @@ void CARDvSetRSPINF (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType)
2686 &byRsvTime); 2686 &byRsvTime);
2687 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_24, MAKEWORD(byTxRate,byRsvTime)); 2687 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_24, MAKEWORD(byTxRate,byRsvTime));
2688 //RSPINF_a_36 2688 //RSPINF_a_36
2689 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((PVOID)pDevice, RATE_36M), 2689 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((void *)pDevice, RATE_36M),
2690 ePHYType, 2690 ePHYType,
2691 &byTxRate, 2691 &byTxRate,
2692 &byRsvTime); 2692 &byRsvTime);
2693 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_36, MAKEWORD(byTxRate,byRsvTime)); 2693 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_36, MAKEWORD(byTxRate,byRsvTime));
2694 //RSPINF_a_48 2694 //RSPINF_a_48
2695 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((PVOID)pDevice, RATE_48M), 2695 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((void *)pDevice, RATE_48M),
2696 ePHYType, 2696 ePHYType,
2697 &byTxRate, 2697 &byTxRate,
2698 &byRsvTime); 2698 &byRsvTime);
2699 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_48, MAKEWORD(byTxRate,byRsvTime)); 2699 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_48, MAKEWORD(byTxRate,byRsvTime));
2700 //RSPINF_a_54 2700 //RSPINF_a_54
2701 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((PVOID)pDevice, RATE_54M), 2701 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((void *)pDevice, RATE_54M),
2702 ePHYType, 2702 ePHYType,
2703 &byTxRate, 2703 &byTxRate,
2704 &byRsvTime); 2704 &byRsvTime);
2705 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_54, MAKEWORD(byTxRate,byRsvTime)); 2705 VNSvOutPortW(pDevice->PortOffset + MAC_REG_RSPINF_A_54, MAKEWORD(byTxRate,byRsvTime));
2706 2706
2707 //RSPINF_a_72 2707 //RSPINF_a_72
2708 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((PVOID)pDevice, RATE_54M), 2708 s_vCaculateOFDMRParameter(CARDwGetOFDMControlRate((void *)pDevice, RATE_54M),
2709 ePHYType, 2709 ePHYType,
2710 &byTxRate, 2710 &byTxRate,
2711 &byRsvTime); 2711 &byRsvTime);
@@ -2726,7 +2726,7 @@ void CARDvSetRSPINF (PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType)
2726 * Return Value: None. 2726 * Return Value: None.
2727 * 2727 *
2728 */ 2728 */
2729void vUpdateIFS (PVOID pDeviceHandler) 2729void vUpdateIFS (void *pDeviceHandler)
2730{ 2730{
2731 //Set SIFS, DIFS, EIFS, SlotTime, CwMin 2731 //Set SIFS, DIFS, EIFS, SlotTime, CwMin
2732 PSDevice pDevice = (PSDevice) pDeviceHandler; 2732 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -2780,7 +2780,7 @@ void vUpdateIFS (PVOID pDeviceHandler)
2780 VNSvOutPortB(pDevice->PortOffset + MAC_REG_CWMAXMIN0, (BYTE)byMaxMin); 2780 VNSvOutPortB(pDevice->PortOffset + MAC_REG_CWMAXMIN0, (BYTE)byMaxMin);
2781} 2781}
2782 2782
2783void CARDvUpdateBasicTopRate (PVOID pDeviceHandler) 2783void CARDvUpdateBasicTopRate (void *pDeviceHandler)
2784{ 2784{
2785 PSDevice pDevice = (PSDevice) pDeviceHandler; 2785 PSDevice pDevice = (PSDevice) pDeviceHandler;
2786 BYTE byTopOFDM = RATE_24M, byTopCCK = RATE_1M; 2786 BYTE byTopOFDM = RATE_24M, byTopCCK = RATE_1M;
@@ -2820,7 +2820,7 @@ void CARDvUpdateBasicTopRate (PVOID pDeviceHandler)
2820 * Return Value: TRUE if succeeded; FALSE if failed. 2820 * Return Value: TRUE if succeeded; FALSE if failed.
2821 * 2821 *
2822 */ 2822 */
2823BOOL CARDbAddBasicRate (PVOID pDeviceHandler, WORD wRateIdx) 2823BOOL CARDbAddBasicRate (void *pDeviceHandler, WORD wRateIdx)
2824{ 2824{
2825 PSDevice pDevice = (PSDevice) pDeviceHandler; 2825 PSDevice pDevice = (PSDevice) pDeviceHandler;
2826 WORD wRate = (WORD)(1<<wRateIdx); 2826 WORD wRate = (WORD)(1<<wRateIdx);
@@ -2828,12 +2828,12 @@ BOOL CARDbAddBasicRate (PVOID pDeviceHandler, WORD wRateIdx)
2828 pDevice->wBasicRate |= wRate; 2828 pDevice->wBasicRate |= wRate;
2829 2829
2830 //Determines the highest basic rate. 2830 //Determines the highest basic rate.
2831 CARDvUpdateBasicTopRate((PVOID)pDevice); 2831 CARDvUpdateBasicTopRate((void *)pDevice);
2832 2832
2833 return(TRUE); 2833 return(TRUE);
2834} 2834}
2835 2835
2836BOOL CARDbIsOFDMinBasicRate (PVOID pDeviceHandler) 2836BOOL CARDbIsOFDMinBasicRate (void *pDeviceHandler)
2837{ 2837{
2838 PSDevice pDevice = (PSDevice) pDeviceHandler; 2838 PSDevice pDevice = (PSDevice) pDeviceHandler;
2839 int ii; 2839 int ii;
@@ -2845,14 +2845,14 @@ BOOL CARDbIsOFDMinBasicRate (PVOID pDeviceHandler)
2845 return FALSE; 2845 return FALSE;
2846} 2846}
2847 2847
2848BYTE CARDbyGetPktType (PVOID pDeviceHandler) 2848BYTE CARDbyGetPktType (void *pDeviceHandler)
2849{ 2849{
2850 PSDevice pDevice = (PSDevice) pDeviceHandler; 2850 PSDevice pDevice = (PSDevice) pDeviceHandler;
2851 2851
2852 if (pDevice->byBBType == BB_TYPE_11A || pDevice->byBBType == BB_TYPE_11B) { 2852 if (pDevice->byBBType == BB_TYPE_11A || pDevice->byBBType == BB_TYPE_11B) {
2853 return (BYTE)pDevice->byBBType; 2853 return (BYTE)pDevice->byBBType;
2854 } 2854 }
2855 else if (CARDbIsOFDMinBasicRate((PVOID)pDevice)) { 2855 else if (CARDbIsOFDMinBasicRate((void *)pDevice)) {
2856 return PK_TYPE_11GA; 2856 return PK_TYPE_11GA;
2857 } 2857 }
2858 else { 2858 else {
@@ -2902,7 +2902,7 @@ void CARDvSetLoopbackMode (DWORD_PTR dwIoBase, WORD wLoopbackMode)
2902 * Return Value: none 2902 * Return Value: none
2903 * 2903 *
2904 */ 2904 */
2905BOOL CARDbSoftwareReset (PVOID pDeviceHandler) 2905BOOL CARDbSoftwareReset (void *pDeviceHandler)
2906{ 2906{
2907 PSDevice pDevice = (PSDevice) pDeviceHandler; 2907 PSDevice pDevice = (PSDevice) pDeviceHandler;
2908 2908
diff --git a/drivers/staging/vt6655/card.h b/drivers/staging/vt6655/card.h
index 264b844cf055..76313462cf76 100644
--- a/drivers/staging/vt6655/card.h
+++ b/drivers/staging/vt6655/card.h
@@ -87,168 +87,168 @@ typedef enum _CARD_OP_MODE {
87/*--------------------- Export Functions --------------------------*/ 87/*--------------------- Export Functions --------------------------*/
88 88
89BOOL ChannelValid(UINT CountryCode, UINT ChannelIndex); 89BOOL ChannelValid(UINT CountryCode, UINT ChannelIndex);
90void CARDvSetRSPINF(PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType); 90void CARDvSetRSPINF(void *pDeviceHandler, CARD_PHY_TYPE ePHYType);
91void vUpdateIFS(PVOID pDeviceHandler); 91void vUpdateIFS(void *pDeviceHandler);
92void CARDvUpdateBasicTopRate(PVOID pDeviceHandler); 92void CARDvUpdateBasicTopRate(void *pDeviceHandler);
93BOOL CARDbAddBasicRate(PVOID pDeviceHandler, WORD wRateIdx); 93BOOL CARDbAddBasicRate(void *pDeviceHandler, WORD wRateIdx);
94BOOL CARDbIsOFDMinBasicRate(PVOID pDeviceHandler); 94BOOL CARDbIsOFDMinBasicRate(void *pDeviceHandler);
95void CARDvSetLoopbackMode(DWORD_PTR dwIoBase, WORD wLoopbackMode); 95void CARDvSetLoopbackMode(DWORD_PTR dwIoBase, WORD wLoopbackMode);
96BOOL CARDbSoftwareReset(PVOID pDeviceHandler); 96BOOL CARDbSoftwareReset(void *pDeviceHandler);
97void CARDvSetFirstNextTBTT(DWORD_PTR dwIoBase, WORD wBeaconInterval); 97void CARDvSetFirstNextTBTT(DWORD_PTR dwIoBase, WORD wBeaconInterval);
98void CARDvUpdateNextTBTT(DWORD_PTR dwIoBase, QWORD qwTSF, WORD wBeaconInterval); 98void CARDvUpdateNextTBTT(DWORD_PTR dwIoBase, QWORD qwTSF, WORD wBeaconInterval);
99BOOL CARDbGetCurrentTSF(DWORD_PTR dwIoBase, PQWORD pqwCurrTSF); 99BOOL CARDbGetCurrentTSF(DWORD_PTR dwIoBase, PQWORD pqwCurrTSF);
100QWORD CARDqGetNextTBTT(QWORD qwTSF, WORD wBeaconInterval); 100QWORD CARDqGetNextTBTT(QWORD qwTSF, WORD wBeaconInterval);
101QWORD CARDqGetTSFOffset(BYTE byRxRate, QWORD qwTSF1, QWORD qwTSF2); 101QWORD CARDqGetTSFOffset(BYTE byRxRate, QWORD qwTSF1, QWORD qwTSF2);
102BOOL CARDbSetTxPower(PVOID pDeviceHandler, ULONG ulTxPower); 102BOOL CARDbSetTxPower(void *pDeviceHandler, ULONG ulTxPower);
103BYTE CARDbyGetPktType(PVOID pDeviceHandler); 103BYTE CARDbyGetPktType(void *pDeviceHandler);
104VOID CARDvSafeResetTx(PVOID pDeviceHandler); 104void CARDvSafeResetTx(void *pDeviceHandler);
105VOID CARDvSafeResetRx(PVOID pDeviceHandler); 105void CARDvSafeResetRx(void *pDeviceHandler);
106 106
107//xxx 107//xxx
108BOOL CARDbRadioPowerOff(PVOID pDeviceHandler); 108BOOL CARDbRadioPowerOff(void *pDeviceHandler);
109BOOL CARDbRadioPowerOn(PVOID pDeviceHandler); 109BOOL CARDbRadioPowerOn(void *pDeviceHandler);
110BOOL CARDbSetChannel(PVOID pDeviceHandler, UINT uConnectionChannel); 110BOOL CARDbSetChannel(void *pDeviceHandler, UINT uConnectionChannel);
111//BOOL CARDbSendPacket(PVOID pDeviceHandler, PVOID pPacket, CARD_PKT_TYPE ePktType, UINT uLength); 111//BOOL CARDbSendPacket(void *pDeviceHandler, void *pPacket, CARD_PKT_TYPE ePktType, UINT uLength);
112BOOL CARDbIsShortPreamble(PVOID pDeviceHandler); 112BOOL CARDbIsShortPreamble(void *pDeviceHandler);
113BOOL CARDbIsShorSlotTime(PVOID pDeviceHandler); 113BOOL CARDbIsShorSlotTime(void *pDeviceHandler);
114BOOL CARDbSetPhyParameter(PVOID pDeviceHandler, CARD_PHY_TYPE ePHYType, WORD wCapInfo, BYTE byERPField, PVOID pvSupportRateIEs, PVOID pvExtSupportRateIEs); 114BOOL CARDbSetPhyParameter(void *pDeviceHandler, CARD_PHY_TYPE ePHYType, WORD wCapInfo, BYTE byERPField, void *pvSupportRateIEs, void *pvExtSupportRateIEs);
115BOOL CARDbUpdateTSF(PVOID pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp, QWORD qwLocalTSF); 115BOOL CARDbUpdateTSF(void *pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp, QWORD qwLocalTSF);
116BOOL CARDbStopTxPacket(PVOID pDeviceHandler, CARD_PKT_TYPE ePktType); 116BOOL CARDbStopTxPacket(void *pDeviceHandler, CARD_PKT_TYPE ePktType);
117BOOL CARDbStartTxPacket(PVOID pDeviceHandler, CARD_PKT_TYPE ePktType); 117BOOL CARDbStartTxPacket(void *pDeviceHandler, CARD_PKT_TYPE ePktType);
118BOOL CARDbSetBeaconPeriod(PVOID pDeviceHandler, WORD wBeaconInterval); 118BOOL CARDbSetBeaconPeriod(void *pDeviceHandler, WORD wBeaconInterval);
119BOOL CARDbSetBSSID(PVOID pDeviceHandler, PBYTE pbyBSSID, CARD_OP_MODE eOPMode); 119BOOL CARDbSetBSSID(void *pDeviceHandler, PBYTE pbyBSSID, CARD_OP_MODE eOPMode);
120 120
121BOOL 121BOOL
122CARDbPowerDown( 122CARDbPowerDown(
123 PVOID pDeviceHandler 123 void *pDeviceHandler
124 ); 124 );
125 125
126BOOL CARDbSetTxDataRate( 126BOOL CARDbSetTxDataRate(
127 PVOID pDeviceHandler, 127 void *pDeviceHandler,
128 WORD wDataRate 128 WORD wDataRate
129 ); 129 );
130 130
131 131
132BOOL CARDbRemoveKey (PVOID pDeviceHandler, PBYTE pbyBSSID); 132BOOL CARDbRemoveKey (void *pDeviceHandler, PBYTE pbyBSSID);
133 133
134BOOL 134BOOL
135CARDbAdd_PMKID_Candidate ( 135CARDbAdd_PMKID_Candidate (
136 IN PVOID pDeviceHandler, 136 void *pDeviceHandler,
137 IN PBYTE pbyBSSID, 137 PBYTE pbyBSSID,
138 IN BOOL bRSNCapExist, 138 BOOL bRSNCapExist,
139 IN WORD wRSNCap 139 WORD wRSNCap
140 ); 140 );
141 141
142PVOID 142void *
143CARDpGetCurrentAddress ( 143CARDpGetCurrentAddress (
144 IN PVOID pDeviceHandler 144 void *pDeviceHandler
145 ); 145 );
146 146
147 147
148VOID CARDvInitChannelTable(PVOID pDeviceHandler); 148void CARDvInitChannelTable(void *pDeviceHandler);
149BYTE CARDbyGetChannelMapping(PVOID pDeviceHandler, BYTE byChannelNumber, CARD_PHY_TYPE ePhyType); 149BYTE CARDbyGetChannelMapping(void *pDeviceHandler, BYTE byChannelNumber, CARD_PHY_TYPE ePhyType);
150 150
151BOOL 151BOOL
152CARDbStartMeasure ( 152CARDbStartMeasure (
153 IN PVOID pDeviceHandler, 153 void *pDeviceHandler,
154 IN PVOID pvMeasureEIDs, 154 void *pvMeasureEIDs,
155 IN UINT uNumOfMeasureEIDs 155 UINT uNumOfMeasureEIDs
156 ); 156 );
157 157
158BOOL 158BOOL
159CARDbChannelSwitch ( 159CARDbChannelSwitch (
160 IN PVOID pDeviceHandler, 160 void *pDeviceHandler,
161 IN BYTE byMode, 161 BYTE byMode,
162 IN BYTE byNewChannel, 162 BYTE byNewChannel,
163 IN BYTE byCount 163 BYTE byCount
164 ); 164 );
165 165
166BOOL 166BOOL
167CARDbSetQuiet ( 167CARDbSetQuiet (
168 IN PVOID pDeviceHandler, 168 void *pDeviceHandler,
169 IN BOOL bResetQuiet, 169 BOOL bResetQuiet,
170 IN BYTE byQuietCount, 170 BYTE byQuietCount,
171 IN BYTE byQuietPeriod, 171 BYTE byQuietPeriod,
172 IN WORD wQuietDuration, 172 WORD wQuietDuration,
173 IN WORD wQuietOffset 173 WORD wQuietOffset
174 ); 174 );
175 175
176BOOL 176BOOL
177CARDbStartQuiet ( 177CARDbStartQuiet (
178 IN PVOID pDeviceHandler 178 void *pDeviceHandler
179 ); 179 );
180 180
181VOID 181void
182CARDvSetCountryInfo ( 182CARDvSetCountryInfo (
183 IN PVOID pDeviceHandler, 183 void *pDeviceHandler,
184 IN CARD_PHY_TYPE ePHYType, 184 CARD_PHY_TYPE ePHYType,
185 IN PVOID pIE 185 void *pIE
186 ); 186 );
187 187
188VOID 188void
189CARDvSetPowerConstraint ( 189CARDvSetPowerConstraint (
190 IN PVOID pDeviceHandler, 190 void *pDeviceHandler,
191 IN BYTE byChannel, 191 BYTE byChannel,
192 IN I8 byPower 192 I8 byPower
193 ); 193 );
194 194
195VOID 195void
196CARDvGetPowerCapability ( 196CARDvGetPowerCapability (
197 IN PVOID pDeviceHandler, 197 void *pDeviceHandler,
198 OUT PBYTE pbyMinPower, 198 PBYTE pbyMinPower,
199 OUT PBYTE pbyMaxPower 199 PBYTE pbyMaxPower
200 ); 200 );
201 201
202BYTE 202BYTE
203CARDbySetSupportChannels ( 203CARDbySetSupportChannels (
204 IN PVOID pDeviceHandler, 204 void *pDeviceHandler,
205 IN OUT PBYTE pbyIEs 205 PBYTE pbyIEs
206 ); 206 );
207 207
208I8 208I8
209CARDbyGetTransmitPower ( 209CARDbyGetTransmitPower (
210 IN PVOID pDeviceHandler 210 void *pDeviceHandler
211 ); 211 );
212 212
213BOOL 213BOOL
214CARDbChannelGetList ( 214CARDbChannelGetList (
215 IN UINT uCountryCodeIdx, 215 UINT uCountryCodeIdx,
216 OUT PBYTE pbyChannelTable 216 PBYTE pbyChannelTable
217 ); 217 );
218 218
219VOID 219void
220CARDvSetCountryIE( 220CARDvSetCountryIE(
221 IN PVOID pDeviceHandler, 221 void *pDeviceHandler,
222 IN PVOID pIE 222 void *pIE
223 ); 223 );
224 224
225BOOL 225BOOL
226CARDbGetChannelMapInfo( 226CARDbGetChannelMapInfo(
227 IN PVOID pDeviceHandler, 227 void *pDeviceHandler,
228 IN UINT uChannelIndex, 228 UINT uChannelIndex,
229 OUT PBYTE pbyChannelNumber, 229 PBYTE pbyChannelNumber,
230 OUT PBYTE pbyMap 230 PBYTE pbyMap
231 ); 231 );
232 232
233VOID 233void
234CARDvSetChannelMapInfo( 234CARDvSetChannelMapInfo(
235 IN PVOID pDeviceHandler, 235 void *pDeviceHandler,
236 IN UINT uChannelIndex, 236 UINT uChannelIndex,
237 IN BYTE byMap 237 BYTE byMap
238 ); 238 );
239 239
240VOID 240void
241CARDvClearChannelMapInfo( 241CARDvClearChannelMapInfo(
242 IN PVOID pDeviceHandler 242 void *pDeviceHandler
243 ); 243 );
244 244
245BYTE 245BYTE
246CARDbyAutoChannelSelect( 246CARDbyAutoChannelSelect(
247 IN PVOID pDeviceHandler, 247 void *pDeviceHandler,
248 CARD_PHY_TYPE ePHYType 248 CARD_PHY_TYPE ePHYType
249 ); 249 );
250 250
251BYTE CARDbyGetChannelNumber(PVOID pDeviceHandler, BYTE byChannelIndex); 251BYTE CARDbyGetChannelNumber(void *pDeviceHandler, BYTE byChannelIndex);
252 252
253#endif // __CARD_H__ 253#endif // __CARD_H__
254 254
diff --git a/drivers/staging/vt6655/datarate.c b/drivers/staging/vt6655/datarate.c
index 10da57f28449..38b09a7fb53b 100644
--- a/drivers/staging/vt6655/datarate.c
+++ b/drivers/staging/vt6655/datarate.c
@@ -64,15 +64,15 @@ const BYTE acbyIERate[MAX_RATE] =
64 64
65/*--------------------- Static Functions --------------------------*/ 65/*--------------------- Static Functions --------------------------*/
66 66
67VOID s_vResetCounter ( 67void s_vResetCounter (
68 IN PKnownNodeDB psNodeDBTable 68 PKnownNodeDB psNodeDBTable
69 ); 69 );
70 70
71 71
72 72
73VOID 73void
74s_vResetCounter ( 74s_vResetCounter (
75 IN PKnownNodeDB psNodeDBTable 75 PKnownNodeDB psNodeDBTable
76 ) 76 )
77{ 77{
78 BYTE ii; 78 BYTE ii;
@@ -106,7 +106,7 @@ s_vResetCounter (
106-*/ 106-*/
107BYTE 107BYTE
108DATARATEbyGetRateIdx ( 108DATARATEbyGetRateIdx (
109 IN BYTE byRate 109 BYTE byRate
110 ) 110 )
111{ 111{
112 BYTE ii; 112 BYTE ii;
@@ -160,7 +160,7 @@ DATARATEbyGetRateIdx (
160-*/ 160-*/
161WORD 161WORD
162wGetRateIdx( 162wGetRateIdx(
163 IN BYTE byRate 163 BYTE byRate
164 ) 164 )
165{ 165{
166 WORD ii; 166 WORD ii;
@@ -194,17 +194,17 @@ wGetRateIdx(
194 * Return Value: none 194 * Return Value: none
195 * 195 *
196-*/ 196-*/
197VOID 197void
198RATEvParseMaxRate ( 198RATEvParseMaxRate (
199 IN PVOID pDeviceHandler, 199 void *pDeviceHandler,
200 IN PWLAN_IE_SUPP_RATES pItemRates, 200 PWLAN_IE_SUPP_RATES pItemRates,
201 IN PWLAN_IE_SUPP_RATES pItemExtRates, 201 PWLAN_IE_SUPP_RATES pItemExtRates,
202 IN BOOL bUpdateBasicRate, 202 BOOL bUpdateBasicRate,
203 OUT PWORD pwMaxBasicRate, 203 PWORD pwMaxBasicRate,
204 OUT PWORD pwMaxSuppRate, 204 PWORD pwMaxSuppRate,
205 OUT PWORD pwSuppRate, 205 PWORD pwSuppRate,
206 OUT PBYTE pbyTopCCKRate, 206 PBYTE pbyTopCCKRate,
207 OUT PBYTE pbyTopOFDMRate 207 PBYTE pbyTopOFDMRate
208 ) 208 )
209{ 209{
210PSDevice pDevice = (PSDevice) pDeviceHandler; 210PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -235,7 +235,7 @@ UINT uRateLen;
235 if (WLAN_MGMT_IS_BASICRATE(byRate) && 235 if (WLAN_MGMT_IS_BASICRATE(byRate) &&
236 (bUpdateBasicRate == TRUE)) { 236 (bUpdateBasicRate == TRUE)) {
237 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate 237 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate
238 CARDbAddBasicRate((PVOID)pDevice, wGetRateIdx(byRate)); 238 CARDbAddBasicRate((void *)pDevice, wGetRateIdx(byRate));
239 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", wGetRateIdx(byRate)); 239 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", wGetRateIdx(byRate));
240 } 240 }
241 byRate = (BYTE)(pItemRates->abyRates[ii]&0x7F); 241 byRate = (BYTE)(pItemRates->abyRates[ii]&0x7F);
@@ -258,7 +258,7 @@ UINT uRateLen;
258 // select highest basic rate 258 // select highest basic rate
259 if (WLAN_MGMT_IS_BASICRATE(pItemExtRates->abyRates[ii])) { 259 if (WLAN_MGMT_IS_BASICRATE(pItemExtRates->abyRates[ii])) {
260 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate 260 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate
261 CARDbAddBasicRate((PVOID)pDevice, wGetRateIdx(byRate)); 261 CARDbAddBasicRate((void *)pDevice, wGetRateIdx(byRate));
262 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", wGetRateIdx(byRate)); 262 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", wGetRateIdx(byRate));
263 } 263 }
264 byRate = (BYTE)(pItemExtRates->abyRates[ii]&0x7F); 264 byRate = (BYTE)(pItemExtRates->abyRates[ii]&0x7F);
@@ -271,7 +271,7 @@ UINT uRateLen;
271 } 271 }
272 } //if(pItemExtRates != NULL) 272 } //if(pItemExtRates != NULL)
273 273
274 if ((pDevice->byPacketType == PK_TYPE_11GB) && CARDbIsOFDMinBasicRate((PVOID)pDevice)) { 274 if ((pDevice->byPacketType == PK_TYPE_11GB) && CARDbIsOFDMinBasicRate((void *)pDevice)) {
275 pDevice->byPacketType = PK_TYPE_11GA; 275 pDevice->byPacketType = PK_TYPE_11GA;
276 } 276 }
277 277
@@ -283,7 +283,7 @@ UINT uRateLen;
283 else 283 else
284 *pwMaxBasicRate = pDevice->byTopOFDMBasicRate; 284 *pwMaxBasicRate = pDevice->byTopOFDMBasicRate;
285 if (wOldBasicRate != pDevice->wBasicRate) 285 if (wOldBasicRate != pDevice->wBasicRate)
286 CARDvSetRSPINF((PVOID)pDevice, pDevice->eCurrentPHYType); 286 CARDvSetRSPINF((void *)pDevice, pDevice->eCurrentPHYType);
287 287
288 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Exit ParseMaxRate\n"); 288 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Exit ParseMaxRate\n");
289} 289}
@@ -307,10 +307,10 @@ UINT uRateLen;
307#define AUTORATE_TXCNT_THRESHOLD 20 307#define AUTORATE_TXCNT_THRESHOLD 20
308#define AUTORATE_INC_THRESHOLD 30 308#define AUTORATE_INC_THRESHOLD 30
309 309
310VOID 310void
311RATEvTxRateFallBack ( 311RATEvTxRateFallBack (
312 IN PVOID pDeviceHandler, 312 void *pDeviceHandler,
313 IN PKnownNodeDB psNodeDBTable 313 PKnownNodeDB psNodeDBTable
314 ) 314 )
315{ 315{
316PSDevice pDevice = (PSDevice) pDeviceHandler; 316PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -411,9 +411,9 @@ TxRate_iwconfig=psNodeDBTable->wTxDataRate;
411-*/ 411-*/
412BYTE 412BYTE
413RATEuSetIE ( 413RATEuSetIE (
414 IN PWLAN_IE_SUPP_RATES pSrcRates, 414 PWLAN_IE_SUPP_RATES pSrcRates,
415 IN PWLAN_IE_SUPP_RATES pDstRates, 415 PWLAN_IE_SUPP_RATES pDstRates,
416 IN UINT uRateLen 416 UINT uRateLen
417 ) 417 )
418{ 418{
419 UINT ii, uu, uRateCnt = 0; 419 UINT ii, uu, uRateCnt = 0;
diff --git a/drivers/staging/vt6655/datarate.h b/drivers/staging/vt6655/datarate.h
index 5096f3df4993..b8ca792e9c6e 100644
--- a/drivers/staging/vt6655/datarate.h
+++ b/drivers/staging/vt6655/datarate.h
@@ -54,41 +54,41 @@
54 54
55 55
56 56
57VOID 57void
58RATEvParseMaxRate( 58RATEvParseMaxRate(
59 IN PVOID pDeviceHandler, 59 void *pDeviceHandler,
60 IN PWLAN_IE_SUPP_RATES pItemRates, 60 PWLAN_IE_SUPP_RATES pItemRates,
61 IN PWLAN_IE_SUPP_RATES pItemExtRates, 61 PWLAN_IE_SUPP_RATES pItemExtRates,
62 IN BOOL bUpdateBasicRate, 62 BOOL bUpdateBasicRate,
63 OUT PWORD pwMaxBasicRate, 63 PWORD pwMaxBasicRate,
64 OUT PWORD pwMaxSuppRate, 64 PWORD pwMaxSuppRate,
65 OUT PWORD pwSuppRate, 65 PWORD pwSuppRate,
66 OUT PBYTE pbyTopCCKRate, 66 PBYTE pbyTopCCKRate,
67 OUT PBYTE pbyTopOFDMRate 67 PBYTE pbyTopOFDMRate
68 ); 68 );
69 69
70VOID 70void
71RATEvTxRateFallBack( 71RATEvTxRateFallBack(
72 IN PVOID pDeviceHandler, 72 void *pDeviceHandler,
73 IN PKnownNodeDB psNodeDBTable 73 PKnownNodeDB psNodeDBTable
74 ); 74 );
75 75
76BYTE 76BYTE
77RATEuSetIE( 77RATEuSetIE(
78 IN PWLAN_IE_SUPP_RATES pSrcRates, 78 PWLAN_IE_SUPP_RATES pSrcRates,
79 IN PWLAN_IE_SUPP_RATES pDstRates, 79 PWLAN_IE_SUPP_RATES pDstRates,
80 IN UINT uRateLen 80 UINT uRateLen
81 ); 81 );
82 82
83WORD 83WORD
84wGetRateIdx( 84wGetRateIdx(
85 IN BYTE byRate 85 BYTE byRate
86 ); 86 );
87 87
88 88
89BYTE 89BYTE
90DATARATEbyGetRateIdx( 90DATARATEbyGetRateIdx(
91 IN BYTE byRate 91 BYTE byRate
92 ); 92 );
93 93
94 94
diff --git a/drivers/staging/vt6655/desc.h b/drivers/staging/vt6655/desc.h
index b573ef77abe1..cedb1e7df4fa 100644
--- a/drivers/staging/vt6655/desc.h
+++ b/drivers/staging/vt6655/desc.h
@@ -232,7 +232,8 @@ typedef struct tagDEVICE_RD_INFO {
232/* 232/*
233static inline PDEVICE_RD_INFO alloc_rd_info(void) { 233static inline PDEVICE_RD_INFO alloc_rd_info(void) {
234 PDEVICE_RD_INFO ptr; 234 PDEVICE_RD_INFO ptr;
235 if ((ptr = kmalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC)) == NULL) 235 ptr = kmalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC);
236 if (ptr == NULL)
236 return NULL; 237 return NULL;
237 else { 238 else {
238 memset(ptr,0,sizeof(DEVICE_RD_INFO)); 239 memset(ptr,0,sizeof(DEVICE_RD_INFO));
@@ -361,7 +362,8 @@ typedef struct tagDEVICE_TD_INFO{
361/* 362/*
362static inline PDEVICE_TD_INFO alloc_td_info(void) { 363static inline PDEVICE_TD_INFO alloc_td_info(void) {
363 PDEVICE_TD_INFO ptr; 364 PDEVICE_TD_INFO ptr;
364 if ((ptr = kmalloc(sizeof(DEVICE_TD_INFO),GFP_ATOMIC))==NULL) 365 ptr = kmalloc(sizeof(DEVICE_TD_INFO),GFP_ATOMIC);
366 if (ptr == NULL)
365 return NULL; 367 return NULL;
366 else { 368 else {
367 memset(ptr,0,sizeof(DEVICE_TD_INFO)); 369 memset(ptr,0,sizeof(DEVICE_TD_INFO));
@@ -444,8 +446,8 @@ typedef const SRrvTime_atim *PCSRrvTime_atim;
444typedef struct tagSRTSData { 446typedef struct tagSRTSData {
445 WORD wFrameControl; 447 WORD wFrameControl;
446 WORD wDurationID; 448 WORD wDurationID;
447 BYTE abyRA[U_ETHER_ADDR_LEN]; 449 BYTE abyRA[ETH_ALEN];
448 BYTE abyTA[U_ETHER_ADDR_LEN]; 450 BYTE abyTA[ETH_ALEN];
449}__attribute__ ((__packed__)) 451}__attribute__ ((__packed__))
450SRTSData, *PSRTSData; 452SRTSData, *PSRTSData;
451typedef const SRTSData *PCSRTSData; 453typedef const SRTSData *PCSRTSData;
@@ -520,7 +522,7 @@ typedef const SRTS_a_FB *PCSRTS_a_FB;
520typedef struct tagSCTSData { 522typedef struct tagSCTSData {
521 WORD wFrameControl; 523 WORD wFrameControl;
522 WORD wDurationID; 524 WORD wDurationID;
523 BYTE abyRA[U_ETHER_ADDR_LEN]; 525 BYTE abyRA[ETH_ALEN];
524 WORD wReserved; 526 WORD wReserved;
525}__attribute__ ((__packed__)) 527}__attribute__ ((__packed__))
526SCTSData, *PSCTSData; 528SCTSData, *PSCTSData;
diff --git a/drivers/staging/vt6655/device.h b/drivers/staging/vt6655/device.h
index cde44d21b75c..40ee4e14237e 100644
--- a/drivers/staging/vt6655/device.h
+++ b/drivers/staging/vt6655/device.h
@@ -103,7 +103,7 @@
103#define MAC_MAX_CONTEXT_REG (256+128) 103#define MAC_MAX_CONTEXT_REG (256+128)
104 104
105#define MAX_MULTICAST_ADDRESS_NUM 32 105#define MAX_MULTICAST_ADDRESS_NUM 32
106#define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * U_ETHER_ADDR_LEN) 106#define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * ETH_ALEN)
107 107
108 108
109//#define OP_MODE_INFRASTRUCTURE 0 109//#define OP_MODE_INFRASTRUCTURE 0
@@ -304,7 +304,7 @@ typedef enum {
304// The receive duplicate detection cache entry 304// The receive duplicate detection cache entry
305typedef struct tagSCacheEntry{ 305typedef struct tagSCacheEntry{
306 WORD wFmSequence; 306 WORD wFmSequence;
307 BYTE abyAddr2[U_ETHER_ADDR_LEN]; 307 BYTE abyAddr2[ETH_ALEN];
308} SCacheEntry, *PSCacheEntry; 308} SCacheEntry, *PSCacheEntry;
309 309
310typedef struct tagSCache{ 310typedef struct tagSCache{
@@ -321,7 +321,7 @@ typedef struct tagSDeFragControlBlock
321{ 321{
322 WORD wSequence; 322 WORD wSequence;
323 WORD wFragNum; 323 WORD wFragNum;
324 BYTE abyAddr2[U_ETHER_ADDR_LEN]; 324 BYTE abyAddr2[ETH_ALEN];
325 UINT uLifetime; 325 UINT uLifetime;
326 struct sk_buff* skb; 326 struct sk_buff* skb;
327 PBYTE pbyRxBuffer; 327 PBYTE pbyRxBuffer;
@@ -484,7 +484,7 @@ typedef struct __device_info {
484 BYTE byOriginalZonetype; 484 BYTE byOriginalZonetype;
485 BYTE abyMacContext[MAC_MAX_CONTEXT_REG]; 485 BYTE abyMacContext[MAC_MAX_CONTEXT_REG];
486 BOOL bLinkPass; // link status: OK or fail 486 BOOL bLinkPass; // link status: OK or fail
487 BYTE abyCurrentNetAddr[U_ETHER_ADDR_LEN]; 487 BYTE abyCurrentNetAddr[ETH_ALEN];
488 488
489 // Adapter statistics 489 // Adapter statistics
490 SStatCounter scStatistic; 490 SStatCounter scStatistic;
@@ -546,8 +546,8 @@ typedef struct __device_info {
546 BYTE byOpMode; 546 BYTE byOpMode;
547 BOOL bBSSIDFilter; 547 BOOL bBSSIDFilter;
548 WORD wMaxTransmitMSDULifetime; 548 WORD wMaxTransmitMSDULifetime;
549 BYTE abyBSSID[U_ETHER_ADDR_LEN]; 549 BYTE abyBSSID[ETH_ALEN];
550 BYTE abyDesireBSSID[U_ETHER_ADDR_LEN]; 550 BYTE abyDesireBSSID[ETH_ALEN];
551 WORD wCTSDuration; // update while speed change 551 WORD wCTSDuration; // update while speed change
552 WORD wACKDuration; // update while speed change 552 WORD wACKDuration; // update while speed change
553 WORD wRTSTransmitLen; // update while speed change 553 WORD wRTSTransmitLen; // update while speed change
@@ -753,9 +753,9 @@ typedef struct __device_info {
753 753
754 SEthernetHeader sTxEthHeader; 754 SEthernetHeader sTxEthHeader;
755 SEthernetHeader sRxEthHeader; 755 SEthernetHeader sRxEthHeader;
756 BYTE abyBroadcastAddr[U_ETHER_ADDR_LEN]; 756 BYTE abyBroadcastAddr[ETH_ALEN];
757 BYTE abySNAP_RFC1042[U_ETHER_ADDR_LEN]; 757 BYTE abySNAP_RFC1042[ETH_ALEN];
758 BYTE abySNAP_Bridgetunnel[U_ETHER_ADDR_LEN]; 758 BYTE abySNAP_Bridgetunnel[ETH_ALEN];
759 BYTE abyEEPROM[EEP_MAX_CONTEXT_SIZE]; //DWORD alignment 759 BYTE abyEEPROM[EEP_MAX_CONTEXT_SIZE]; //DWORD alignment
760 // Pre-Authentication & PMK cache 760 // Pre-Authentication & PMK cache
761 SPMKID gsPMKID; 761 SPMKID gsPMKID;
@@ -828,7 +828,7 @@ typedef struct __device_info {
828//PLICE_DEBUG-> 828//PLICE_DEBUG->
829 829
830 830
831 inline static VOID EnQueue (PSDevice pDevice,PSRxMgmtPacket pRxMgmtPacket) 831 inline static void EnQueue (PSDevice pDevice,PSRxMgmtPacket pRxMgmtPacket)
832{ 832{
833 //printk("Enter EnQueue:tail is %d\n",pDevice->rxManeQueue.tail); 833 //printk("Enter EnQueue:tail is %d\n",pDevice->rxManeQueue.tail);
834 if ((pDevice->rxManeQueue.tail+1) % NUM == pDevice->rxManeQueue.head) 834 if ((pDevice->rxManeQueue.tail+1) % NUM == pDevice->rxManeQueue.head)
@@ -869,7 +869,7 @@ typedef struct __device_info {
869 } 869 }
870} 870}
871 871
872VOID InitRxManagementQueue(PSDevice pDevice); 872void InitRxManagementQueue(PSDevice pDevice);
873 873
874 874
875 875
@@ -898,7 +898,8 @@ inline static BOOL device_get_ip(PSDevice pInfo) {
898 898
899static inline PDEVICE_RD_INFO alloc_rd_info(void) { 899static inline PDEVICE_RD_INFO alloc_rd_info(void) {
900 PDEVICE_RD_INFO ptr; 900 PDEVICE_RD_INFO ptr;
901 if ((ptr = (PDEVICE_RD_INFO)kmalloc((int)sizeof(DEVICE_RD_INFO), (int)GFP_ATOMIC)) == NULL) 901 ptr = (PDEVICE_RD_INFO)kmalloc((int)sizeof(DEVICE_RD_INFO), (int)GFP_ATOMIC);
902 if (ptr == NULL)
902 return NULL; 903 return NULL;
903 else { 904 else {
904 memset(ptr,0,sizeof(DEVICE_RD_INFO)); 905 memset(ptr,0,sizeof(DEVICE_RD_INFO));
@@ -908,7 +909,8 @@ static inline PDEVICE_RD_INFO alloc_rd_info(void) {
908 909
909static inline PDEVICE_TD_INFO alloc_td_info(void) { 910static inline PDEVICE_TD_INFO alloc_td_info(void) {
910 PDEVICE_TD_INFO ptr; 911 PDEVICE_TD_INFO ptr;
911 if ((ptr = (PDEVICE_TD_INFO)kmalloc((int)sizeof(DEVICE_TD_INFO), (int)GFP_ATOMIC))==NULL) 912 ptr = (PDEVICE_TD_INFO)kmalloc((int)sizeof(DEVICE_TD_INFO), (int)GFP_ATOMIC);
913 if (ptr == NULL)
912 return NULL; 914 return NULL;
913 else { 915 else {
914 memset(ptr,0,sizeof(DEVICE_TD_INFO)); 916 memset(ptr,0,sizeof(DEVICE_TD_INFO));
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c
index 18f4dfed997f..e49bb258b5c3 100644
--- a/drivers/staging/vt6655/device_main.c
+++ b/drivers/staging/vt6655/device_main.c
@@ -429,14 +429,14 @@ pOpts->flags|=DEVICE_FLAGS_DiversityANT;
429static void 429static void
430device_set_options(PSDevice pDevice) { 430device_set_options(PSDevice pDevice) {
431 431
432 BYTE abyBroadcastAddr[U_ETHER_ADDR_LEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 432 BYTE abyBroadcastAddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
433 BYTE abySNAP_RFC1042[U_ETHER_ADDR_LEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00}; 433 BYTE abySNAP_RFC1042[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00};
434 BYTE abySNAP_Bridgetunnel[U_ETHER_ADDR_LEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8}; 434 BYTE abySNAP_Bridgetunnel[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8};
435 435
436 436
437 memcpy(pDevice->abyBroadcastAddr, abyBroadcastAddr, U_ETHER_ADDR_LEN); 437 memcpy(pDevice->abyBroadcastAddr, abyBroadcastAddr, ETH_ALEN);
438 memcpy(pDevice->abySNAP_RFC1042, abySNAP_RFC1042, U_ETHER_ADDR_LEN); 438 memcpy(pDevice->abySNAP_RFC1042, abySNAP_RFC1042, ETH_ALEN);
439 memcpy(pDevice->abySNAP_Bridgetunnel, abySNAP_Bridgetunnel, U_ETHER_ADDR_LEN); 439 memcpy(pDevice->abySNAP_Bridgetunnel, abySNAP_Bridgetunnel, ETH_ALEN);
440 440
441 pDevice->uChannel = pDevice->sOpts.channel_num; 441 pDevice->uChannel = pDevice->sOpts.channel_num;
442 pDevice->wRTSThreshold = pDevice->sOpts.rts_thresh; 442 pDevice->wRTSThreshold = pDevice->sOpts.rts_thresh;
@@ -478,7 +478,7 @@ pDevice->bUpdateBBVGA = TRUE;
478 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" pDevice->bDiversityRegCtlON= %d\n",(INT)pDevice->bDiversityRegCtlON); 478 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" pDevice->bDiversityRegCtlON= %d\n",(INT)pDevice->bDiversityRegCtlON);
479} 479}
480 480
481static VOID s_vCompleteCurrentMeasure (IN PSDevice pDevice, IN BYTE byResult) 481static void s_vCompleteCurrentMeasure (PSDevice pDevice, BYTE byResult)
482{ 482{
483 UINT ii; 483 UINT ii;
484 DWORD dwDuration = 0; 484 DWORD dwDuration = 0;
@@ -638,7 +638,8 @@ byValue1 = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA);
638//2008-8-4 <add> by chester 638//2008-8-4 <add> by chester
639//zonetype initial 639//zonetype initial
640 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE]; 640 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
641 if((zonetype=Config_FileOperation(pDevice,FALSE,NULL)) >= 0) { //read zonetype file ok! 641 zonetype = Config_FileOperation(pDevice,FALSE,NULL);
642 if (zonetype >= 0) { //read zonetype file ok!
642 if ((zonetype == 0)&& 643 if ((zonetype == 0)&&
643 (pDevice->abyEEPROM[EEP_OFS_ZONETYPE] !=0x00)){ //for USA 644 (pDevice->abyEEPROM[EEP_OFS_ZONETYPE] !=0x00)){ //for USA
644 pDevice->abyEEPROM[EEP_OFS_ZONETYPE] = 0; 645 pDevice->abyEEPROM[EEP_OFS_ZONETYPE] = 0;
@@ -728,7 +729,7 @@ else
728 pDevice->abyOFDMPwrTbl[ii+CB_MAX_CHANNEL_24G+1] = SROMbyReadEmbedded(pDevice->PortOffset, (BYTE)(ii + EEP_OFS_OFDMA_PWR_TBL)); 729 pDevice->abyOFDMPwrTbl[ii+CB_MAX_CHANNEL_24G+1] = SROMbyReadEmbedded(pDevice->PortOffset, (BYTE)(ii + EEP_OFS_OFDMA_PWR_TBL));
729 pDevice->abyOFDMDefaultPwr[ii+CB_MAX_CHANNEL_24G+1] = SROMbyReadEmbedded(pDevice->PortOffset, (BYTE)(ii + EEP_OFS_OFDMA_PWR_dBm)); 730 pDevice->abyOFDMDefaultPwr[ii+CB_MAX_CHANNEL_24G+1] = SROMbyReadEmbedded(pDevice->PortOffset, (BYTE)(ii + EEP_OFS_OFDMA_PWR_dBm));
730 } 731 }
731 CARDvInitChannelTable((PVOID)pDevice); 732 CARDvInitChannelTable((void *)pDevice);
732 733
733 734
734 if (pDevice->byLocalID > REV_ID_VT3253_B1) { 735 if (pDevice->byLocalID > REV_ID_VT3253_B1) {
@@ -846,7 +847,7 @@ else CARDbRadioPowerOn(pDevice);
846 847
847 848
848 849
849static VOID device_init_diversity_timer(PSDevice pDevice) { 850static void device_init_diversity_timer(PSDevice pDevice) {
850 851
851 init_timer(&pDevice->TimerSQ3Tmax1); 852 init_timer(&pDevice->TimerSQ3Tmax1);
852 pDevice->TimerSQ3Tmax1.data = (ULONG)pDevice; 853 pDevice->TimerSQ3Tmax1.data = (ULONG)pDevice;
@@ -1073,7 +1074,7 @@ device_found1(struct pci_dev *pcid, const struct pci_device_id *ent)
1073 //Enable the chip specified capbilities 1074 //Enable the chip specified capbilities
1074 pDevice->flags = pDevice->sOpts.flags | (pChip_info->flags & 0xFF000000UL); 1075 pDevice->flags = pDevice->sOpts.flags | (pChip_info->flags & 0xFF000000UL);
1075 pDevice->tx_80211 = device_dma0_tx_80211; 1076 pDevice->tx_80211 = device_dma0_tx_80211;
1076 pDevice->sMgmtObj.pAdapter = (PVOID)pDevice; 1077 pDevice->sMgmtObj.pAdapter = (void *)pDevice;
1077 pDevice->pMgmt = &(pDevice->sMgmtObj); 1078 pDevice->pMgmt = &(pDevice->sMgmtObj);
1078 1079
1079 dev->irq = pcid->irq; 1080 dev->irq = pcid->irq;
@@ -1090,11 +1091,13 @@ device_found1(struct pci_dev *pcid, const struct pci_device_id *ent)
1090 } 1091 }
1091//2008-07-21-01<Add>by MikeLiu 1092//2008-07-21-01<Add>by MikeLiu
1092//register wpadev 1093//register wpadev
1094#if 0
1093 if(wpa_set_wpadev(pDevice, 1)!=0) { 1095 if(wpa_set_wpadev(pDevice, 1)!=0) {
1094 printk("Fail to Register WPADEV?\n"); 1096 printk("Fail to Register WPADEV?\n");
1095 unregister_netdev(pDevice->dev); 1097 unregister_netdev(pDevice->dev);
1096 free_netdev(dev); 1098 free_netdev(dev);
1097 } 1099 }
1100#endif
1098 device_print_info(pDevice); 1101 device_print_info(pDevice);
1099 pci_set_drvdata(pcid, pDevice); 1102 pci_set_drvdata(pcid, pDevice);
1100 return 0; 1103 return 0;
@@ -1242,13 +1245,13 @@ device_release_WPADEV(pDevice);
1242 } 1245 }
1243#ifdef HOSTAP 1246#ifdef HOSTAP
1244 if (dev) 1247 if (dev)
1245 hostap_set_hostapd(pDevice, 0, 0); 1248 vt6655_hostap_set_hostapd(pDevice, 0, 0);
1246#endif 1249#endif
1247 if (dev) 1250 if (dev)
1248 unregister_netdev(dev); 1251 unregister_netdev(dev);
1249 1252
1250 if (pDevice->PortOffset) 1253 if (pDevice->PortOffset)
1251 iounmap((PVOID)pDevice->PortOffset); 1254 iounmap((void *)pDevice->PortOffset);
1252 1255
1253 if (pDevice->pcid) 1256 if (pDevice->pcid)
1254 pci_release_regions(pDevice->pcid); 1257 pci_release_regions(pDevice->pcid);
@@ -1460,7 +1463,7 @@ static void device_free_rd0_ring(PSDevice pDevice) {
1460 1463
1461 dev_kfree_skb(pRDInfo->skb); 1464 dev_kfree_skb(pRDInfo->skb);
1462 1465
1463 kfree((PVOID)pDesc->pRDInfo); 1466 kfree((void *)pDesc->pRDInfo);
1464 } 1467 }
1465 1468
1466} 1469}
@@ -1478,7 +1481,7 @@ static void device_free_rd1_ring(PSDevice pDevice) {
1478 1481
1479 dev_kfree_skb(pRDInfo->skb); 1482 dev_kfree_skb(pRDInfo->skb);
1480 1483
1481 kfree((PVOID)pDesc->pRDInfo); 1484 kfree((void *)pDesc->pRDInfo);
1482 } 1485 }
1483 1486
1484} 1487}
@@ -1563,7 +1566,7 @@ static void device_free_td0_ring(PSDevice pDevice) {
1563 if (pTDInfo->skb) 1566 if (pTDInfo->skb)
1564 dev_kfree_skb(pTDInfo->skb); 1567 dev_kfree_skb(pTDInfo->skb);
1565 1568
1566 kfree((PVOID)pDesc->pTDInfo); 1569 kfree((void *)pDesc->pTDInfo);
1567 } 1570 }
1568} 1571}
1569 1572
@@ -1581,7 +1584,7 @@ static void device_free_td1_ring(PSDevice pDevice) {
1581 if (pTDInfo->skb) 1584 if (pTDInfo->skb)
1582 dev_kfree_skb(pTDInfo->skb); 1585 dev_kfree_skb(pTDInfo->skb);
1583 1586
1584 kfree((PVOID)pDesc->pTDInfo); 1587 kfree((void *)pDesc->pTDInfo);
1585 } 1588 }
1586 1589
1587} 1590}
@@ -1829,7 +1832,7 @@ static void device_free_tx_buf(PSDevice pDevice, PSTxDesc pDesc) {
1829 1832
1830 1833
1831//PLICE_DEBUG -> 1834//PLICE_DEBUG ->
1832VOID InitRxManagementQueue(PSDevice pDevice) 1835void InitRxManagementQueue(PSDevice pDevice)
1833{ 1836{
1834 pDevice->rxManeQueue.packet_num = 0; 1837 pDevice->rxManeQueue.packet_num = 0;
1835 pDevice->rxManeQueue.head = pDevice->rxManeQueue.tail = 0; 1838 pDevice->rxManeQueue.head = pDevice->rxManeQueue.tail = 0;
@@ -1968,7 +1971,7 @@ device_init_rd0_ring(pDevice);
1968DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "call device_init_registers\n"); 1971DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "call device_init_registers\n");
1969 device_init_registers(pDevice, DEVICE_INIT_COLD); 1972 device_init_registers(pDevice, DEVICE_INIT_COLD);
1970 MACvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr); 1973 MACvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr);
1971 memcpy(pDevice->pMgmt->abyMACAddr, pDevice->abyCurrentNetAddr, U_ETHER_ADDR_LEN); 1974 memcpy(pDevice->pMgmt->abyMACAddr, pDevice->abyCurrentNetAddr, ETH_ALEN);
1972 device_set_multi(pDevice->dev); 1975 device_set_multi(pDevice->dev);
1973 1976
1974 // Init for Key Management 1977 // Init for Key Management
@@ -2008,11 +2011,11 @@ DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "call MACvIntEnable\n");
2008 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE); 2011 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE);
2009 2012
2010 if (pDevice->pMgmt->eConfigMode == WMAC_CONFIG_AP) { 2013 if (pDevice->pMgmt->eConfigMode == WMAC_CONFIG_AP) {
2011 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RUN_AP, NULL); 2014 bScheduleCommand((void *)pDevice, WLAN_CMD_RUN_AP, NULL);
2012 } 2015 }
2013 else { 2016 else {
2014 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_BSSID_SCAN, NULL); 2017 bScheduleCommand((void *)pDevice, WLAN_CMD_BSSID_SCAN, NULL);
2015 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_SSID, NULL); 2018 bScheduleCommand((void *)pDevice, WLAN_CMD_SSID, NULL);
2016 } 2019 }
2017 pDevice->flags |=DEVICE_FLAGS_OPENED; 2020 pDevice->flags |=DEVICE_FLAGS_OPENED;
2018 2021
@@ -2031,7 +2034,7 @@ static int device_close(struct net_device *dev) {
2031//PLICE_DEBUG<- 2034//PLICE_DEBUG<-
2032//2007-1121-02<Add>by EinsnLiu 2035//2007-1121-02<Add>by EinsnLiu
2033 if (pDevice->bLinkPass) { 2036 if (pDevice->bLinkPass) {
2034 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_DISASSOCIATE, NULL); 2037 bScheduleCommand((void *)pDevice, WLAN_CMD_DISASSOCIATE, NULL);
2035 mdelay(30); 2038 mdelay(30);
2036 } 2039 }
2037#ifdef TxInSleep 2040#ifdef TxInSleep
@@ -2149,11 +2152,11 @@ BOOL device_dma0_xmit(PSDevice pDevice, struct sk_buff *skb, UINT uNodeIndex) {
2149 2152
2150 pHeadTD->m_td1TD1.byTCR = (TCR_EDP|TCR_STP); 2153 pHeadTD->m_td1TD1.byTCR = (TCR_EDP|TCR_STP);
2151 2154
2152 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)(skb->data), U_HEADER_LEN); 2155 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)(skb->data), ETH_HLEN);
2153 cbFrameBodySize = skb->len - U_HEADER_LEN; 2156 cbFrameBodySize = skb->len - ETH_HLEN;
2154 2157
2155 // 802.1H 2158 // 802.1H
2156 if (ntohs(pDevice->sTxEthHeader.wType) > MAX_DATA_LEN) { 2159 if (ntohs(pDevice->sTxEthHeader.wType) > ETH_DATA_LEN) {
2157 cbFrameBodySize += 8; 2160 cbFrameBodySize += 8;
2158 } 2161 }
2159 uMACfragNum = cbGetFragCount(pDevice, pTransmitKey, cbFrameBodySize, &pDevice->sTxEthHeader); 2162 uMACfragNum = cbGetFragCount(pDevice, pTransmitKey, cbFrameBodySize, &pDevice->sTxEthHeader);
@@ -2353,10 +2356,10 @@ static int device_xmit(struct sk_buff *skb, struct net_device *dev) {
2353 pHeadTD->m_td1TD1.byTCR = (TCR_EDP|TCR_STP); 2356 pHeadTD->m_td1TD1.byTCR = (TCR_EDP|TCR_STP);
2354 2357
2355 2358
2356 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)(skb->data), U_HEADER_LEN); 2359 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)(skb->data), ETH_HLEN);
2357 cbFrameBodySize = skb->len - U_HEADER_LEN; 2360 cbFrameBodySize = skb->len - ETH_HLEN;
2358 // 802.1H 2361 // 802.1H
2359 if (ntohs(pDevice->sTxEthHeader.wType) > MAX_DATA_LEN) { 2362 if (ntohs(pDevice->sTxEthHeader.wType) > ETH_DATA_LEN) {
2360 cbFrameBodySize += 8; 2363 cbFrameBodySize += 8;
2361 } 2364 }
2362 2365
@@ -2633,10 +2636,10 @@ pDevice->byTopCCKBasicRate,pDevice->byTopOFDMBasicRate);
2633 BYTE Descriptor_type; 2636 BYTE Descriptor_type;
2634 WORD Key_info; 2637 WORD Key_info;
2635BOOL bTxeapol_key = FALSE; 2638BOOL bTxeapol_key = FALSE;
2636 Protocol_Version = skb->data[U_HEADER_LEN]; 2639 Protocol_Version = skb->data[ETH_HLEN];
2637 Packet_Type = skb->data[U_HEADER_LEN+1]; 2640 Packet_Type = skb->data[ETH_HLEN+1];
2638 Descriptor_type = skb->data[U_HEADER_LEN+1+1+2]; 2641 Descriptor_type = skb->data[ETH_HLEN+1+1+2];
2639 Key_info = (skb->data[U_HEADER_LEN+1+1+2+1] << 8)|(skb->data[U_HEADER_LEN+1+1+2+2]); 2642 Key_info = (skb->data[ETH_HLEN+1+1+2+1] << 8)|(skb->data[ETH_HLEN+1+1+2+2]);
2640 if (pDevice->sTxEthHeader.wType == TYPE_PKT_802_1x) { 2643 if (pDevice->sTxEthHeader.wType == TYPE_PKT_802_1x) {
2641 if(((Protocol_Version==1) ||(Protocol_Version==2)) && 2644 if(((Protocol_Version==1) ||(Protocol_Version==2)) &&
2642 (Packet_Type==3)) { //802.1x OR eapol-key challenge frame transfer 2645 (Packet_Type==3)) { //802.1x OR eapol-key challenge frame transfer
@@ -2857,7 +2860,7 @@ static irqreturn_t device_intr(int irq, void *dev_instance) {
2857 2860
2858 pDevice->bBeaconSent = FALSE; 2861 pDevice->bBeaconSent = FALSE;
2859 if (pDevice->bEnablePSMode) { 2862 if (pDevice->bEnablePSMode) {
2860 PSbIsNextTBTTWakeUp((HANDLE)pDevice); 2863 PSbIsNextTBTTWakeUp((void *)pDevice);
2861 }; 2864 };
2862 2865
2863 if ((pDevice->eOPMode == OP_MODE_AP) || 2866 if ((pDevice->eOPMode == OP_MODE_AP) ||
@@ -2890,7 +2893,7 @@ static irqreturn_t device_intr(int irq, void *dev_instance) {
2890 // check if mutltcast tx bufferring 2893 // check if mutltcast tx bufferring
2891 pMgmt->byDTIMCount = pMgmt->byDTIMPeriod - 1; 2894 pMgmt->byDTIMCount = pMgmt->byDTIMPeriod - 1;
2892 pMgmt->sNodeDBTable[0].bRxPSPoll = TRUE; 2895 pMgmt->sNodeDBTable[0].bRxPSPoll = TRUE;
2893 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 2896 bScheduleCommand((void *)pDevice, WLAN_CMD_RX_PSPOLL, NULL);
2894 } 2897 }
2895 } 2898 }
2896 } 2899 }
@@ -3022,7 +3025,7 @@ int Config_FileOperation(PSDevice pDevice,BOOL fwrite,unsigned char *Parameter)
3022 goto error1; 3025 goto error1;
3023 } 3026 }
3024 3027
3025buffer = (UCHAR *)kmalloc(1024, GFP_KERNEL); 3028buffer = kmalloc(1024, GFP_KERNEL);
3026if(buffer==NULL) { 3029if(buffer==NULL) {
3027 printk("alllocate mem for file fail?\n"); 3030 printk("alllocate mem for file fail?\n");
3028 result = -1; 3031 result = -1;
@@ -3328,7 +3331,7 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
3328 break; 3331 break;
3329 3332
3330 case SIOCSIWTXPOW: 3333 case SIOCSIWTXPOW:
3331 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWTXPOW \n"); 3334 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWTXPOW \n");
3332 rc = -EOPNOTSUPP; 3335 rc = -EOPNOTSUPP;
3333 break; 3336 break;
3334 3337
@@ -3406,7 +3409,7 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
3406 // Get the spy list 3409 // Get the spy list
3407 case SIOCGIWSPY: 3410 case SIOCGIWSPY:
3408 3411
3409 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCSIWSPY \n"); 3412 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWSPY \n");
3410 rc = -EOPNOTSUPP; 3413 rc = -EOPNOTSUPP;
3411 break; 3414 break;
3412 3415
@@ -3523,7 +3526,7 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
3523 case IOCTL_CMD_HOSTAPD: 3526 case IOCTL_CMD_HOSTAPD:
3524 3527
3525 3528
3526 rc = hostap_ioctl(pDevice, &wrq->u.data); 3529 rc = vt6655_hostap_ioctl(pDevice, &wrq->u.data);
3527 break; 3530 break;
3528 3531
3529 case IOCTL_CMD_WPA: 3532 case IOCTL_CMD_WPA:
@@ -3546,7 +3549,7 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
3546 if (pMgmt->eConfigMode == WMAC_CONFIG_AP) { 3549 if (pMgmt->eConfigMode == WMAC_CONFIG_AP) {
3547 netif_stop_queue(pDevice->dev); 3550 netif_stop_queue(pDevice->dev);
3548 spin_lock_irq(&pDevice->lock); 3551 spin_lock_irq(&pDevice->lock);
3549 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RUN_AP, NULL); 3552 bScheduleCommand((void *)pDevice, WLAN_CMD_RUN_AP, NULL);
3550 spin_unlock_irq(&pDevice->lock); 3553 spin_unlock_irq(&pDevice->lock);
3551 } 3554 }
3552 else { 3555 else {
@@ -3560,8 +3563,8 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
3560 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 3563 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
3561 if(pDevice->bWPASuppWextEnabled !=TRUE) 3564 if(pDevice->bWPASuppWextEnabled !=TRUE)
3562 #endif 3565 #endif
3563 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 3566 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID);
3564 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 3567 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
3565 spin_unlock_irq(&pDevice->lock); 3568 spin_unlock_irq(&pDevice->lock);
3566 } 3569 }
3567 pDevice->bCommit = FALSE; 3570 pDevice->bCommit = FALSE;
@@ -3716,9 +3719,9 @@ viawget_resume(struct pci_dev *pcid)
3716 init_timer(&pMgmt->sTimerSecondCallback); 3719 init_timer(&pMgmt->sTimerSecondCallback);
3717 init_timer(&pDevice->sTimerCommand); 3720 init_timer(&pDevice->sTimerCommand);
3718 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE); 3721 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE);
3719 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 3722 BSSvClearBSSList((void *)pDevice, pDevice->bLinkPass);
3720 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 3723 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
3721 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 3724 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
3722 spin_unlock_irq(&pDevice->lock); 3725 spin_unlock_irq(&pDevice->lock);
3723 } 3726 }
3724 return 0; 3727 return 0;
diff --git a/drivers/staging/vt6655/dpc.c b/drivers/staging/vt6655/dpc.c
index 67f238c01b44..6b758a8c1af3 100644
--- a/drivers/staging/vt6655/dpc.c
+++ b/drivers/staging/vt6655/dpc.c
@@ -76,70 +76,70 @@ const BYTE acbyRxRate[MAX_RATE] =
76 76
77/*--------------------- Static Functions --------------------------*/ 77/*--------------------- Static Functions --------------------------*/
78 78
79static BYTE s_byGetRateIdx(IN BYTE byRate); 79static BYTE s_byGetRateIdx(BYTE byRate);
80 80
81 81
82static 82static
83VOID 83void
84s_vGetDASA( 84s_vGetDASA(
85 IN PBYTE pbyRxBufferAddr, 85 PBYTE pbyRxBufferAddr,
86 OUT PUINT pcbHeaderSize, 86 PUINT pcbHeaderSize,
87 OUT PSEthernetHeader psEthHeader 87 PSEthernetHeader psEthHeader
88 ); 88 );
89 89
90static 90static
91VOID 91void
92s_vProcessRxMACHeader ( 92s_vProcessRxMACHeader (
93 IN PSDevice pDevice, 93 PSDevice pDevice,
94 IN PBYTE pbyRxBufferAddr, 94 PBYTE pbyRxBufferAddr,
95 IN UINT cbPacketSize, 95 UINT cbPacketSize,
96 IN BOOL bIsWEP, 96 BOOL bIsWEP,
97 IN BOOL bExtIV, 97 BOOL bExtIV,
98 OUT PUINT pcbHeadSize 98 PUINT pcbHeadSize
99 ); 99 );
100 100
101static BOOL s_bAPModeRxCtl( 101static BOOL s_bAPModeRxCtl(
102 IN PSDevice pDevice, 102 PSDevice pDevice,
103 IN PBYTE pbyFrame, 103 PBYTE pbyFrame,
104 IN INT iSANodeIndex 104 INT iSANodeIndex
105 ); 105 );
106 106
107 107
108 108
109static BOOL s_bAPModeRxData ( 109static BOOL s_bAPModeRxData (
110 IN PSDevice pDevice, 110 PSDevice pDevice,
111 IN struct sk_buff* skb, 111 struct sk_buff* skb,
112 IN UINT FrameSize, 112 UINT FrameSize,
113 IN UINT cbHeaderOffset, 113 UINT cbHeaderOffset,
114 IN INT iSANodeIndex, 114 INT iSANodeIndex,
115 IN INT iDANodeIndex 115 INT iDANodeIndex
116 ); 116 );
117 117
118 118
119static BOOL s_bHandleRxEncryption( 119static BOOL s_bHandleRxEncryption(
120 IN PSDevice pDevice, 120 PSDevice pDevice,
121 IN PBYTE pbyFrame, 121 PBYTE pbyFrame,
122 IN UINT FrameSize, 122 UINT FrameSize,
123 IN PBYTE pbyRsr, 123 PBYTE pbyRsr,
124 OUT PBYTE pbyNewRsr, 124 PBYTE pbyNewRsr,
125 OUT PSKeyItem *pKeyOut, 125 PSKeyItem *pKeyOut,
126 int * pbExtIV, 126 int * pbExtIV,
127 OUT PWORD pwRxTSC15_0, 127 PWORD pwRxTSC15_0,
128 OUT PDWORD pdwRxTSC47_16 128 PDWORD pdwRxTSC47_16
129 ); 129 );
130 130
131static BOOL s_bHostWepRxEncryption( 131static BOOL s_bHostWepRxEncryption(
132 132
133 IN PSDevice pDevice, 133 PSDevice pDevice,
134 IN PBYTE pbyFrame, 134 PBYTE pbyFrame,
135 IN UINT FrameSize, 135 UINT FrameSize,
136 IN PBYTE pbyRsr, 136 PBYTE pbyRsr,
137 IN BOOL bOnFly, 137 BOOL bOnFly,
138 IN PSKeyItem pKey, 138 PSKeyItem pKey,
139 OUT PBYTE pbyNewRsr, 139 PBYTE pbyNewRsr,
140 int * pbExtIV, 140 int * pbExtIV,
141 OUT PWORD pwRxTSC15_0, 141 PWORD pwRxTSC15_0,
142 OUT PDWORD pdwRxTSC47_16 142 PDWORD pdwRxTSC47_16
143 143
144 ); 144 );
145 145
@@ -163,14 +163,14 @@ static BOOL s_bHostWepRxEncryption(
163 * 163 *
164-*/ 164-*/
165static 165static
166VOID 166void
167s_vProcessRxMACHeader ( 167s_vProcessRxMACHeader (
168 IN PSDevice pDevice, 168 PSDevice pDevice,
169 IN PBYTE pbyRxBufferAddr, 169 PBYTE pbyRxBufferAddr,
170 IN UINT cbPacketSize, 170 UINT cbPacketSize,
171 IN BOOL bIsWEP, 171 BOOL bIsWEP,
172 IN BOOL bExtIV, 172 BOOL bExtIV,
173 OUT PUINT pcbHeadSize 173 PUINT pcbHeadSize
174 ) 174 )
175{ 175{
176 PBYTE pbyRxBuffer; 176 PBYTE pbyRxBuffer;
@@ -236,11 +236,11 @@ s_vProcessRxMACHeader (
236 } 236 }
237 } 237 }
238 238
239 cbHeaderSize -= (U_ETHER_ADDR_LEN * 2); 239 cbHeaderSize -= (ETH_ALEN * 2);
240 pbyRxBuffer = (PBYTE) (pbyRxBufferAddr + cbHeaderSize); 240 pbyRxBuffer = (PBYTE) (pbyRxBufferAddr + cbHeaderSize);
241 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) 241 for(ii=0;ii<ETH_ALEN;ii++)
242 *pbyRxBuffer++ = pDevice->sRxEthHeader.abyDstAddr[ii]; 242 *pbyRxBuffer++ = pDevice->sRxEthHeader.abyDstAddr[ii];
243 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) 243 for(ii=0;ii<ETH_ALEN;ii++)
244 *pbyRxBuffer++ = pDevice->sRxEthHeader.abySrcAddr[ii]; 244 *pbyRxBuffer++ = pDevice->sRxEthHeader.abySrcAddr[ii];
245 245
246 *pcbHeadSize = cbHeaderSize; 246 *pcbHeadSize = cbHeaderSize;
@@ -249,7 +249,7 @@ s_vProcessRxMACHeader (
249 249
250 250
251 251
252static BYTE s_byGetRateIdx (IN BYTE byRate) 252static BYTE s_byGetRateIdx (BYTE byRate)
253{ 253{
254 BYTE byRateIdx; 254 BYTE byRateIdx;
255 255
@@ -262,11 +262,11 @@ static BYTE s_byGetRateIdx (IN BYTE byRate)
262 262
263 263
264static 264static
265VOID 265void
266s_vGetDASA ( 266s_vGetDASA (
267 IN PBYTE pbyRxBufferAddr, 267 PBYTE pbyRxBufferAddr,
268 OUT PUINT pcbHeaderSize, 268 PUINT pcbHeaderSize,
269 OUT PSEthernetHeader psEthHeader 269 PSEthernetHeader psEthHeader
270 ) 270 )
271{ 271{
272 UINT cbHeaderSize = 0; 272 UINT cbHeaderSize = 0;
@@ -277,14 +277,14 @@ s_vGetDASA (
277 277
278 if ((pMACHeader->wFrameCtl & FC_TODS) == 0) { 278 if ((pMACHeader->wFrameCtl & FC_TODS) == 0) {
279 if (pMACHeader->wFrameCtl & FC_FROMDS) { 279 if (pMACHeader->wFrameCtl & FC_FROMDS) {
280 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 280 for(ii=0;ii<ETH_ALEN;ii++) {
281 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr1[ii]; 281 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr1[ii];
282 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr3[ii]; 282 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr3[ii];
283 } 283 }
284 } 284 }
285 else { 285 else {
286 // IBSS mode 286 // IBSS mode
287 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 287 for(ii=0;ii<ETH_ALEN;ii++) {
288 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr1[ii]; 288 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr1[ii];
289 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr2[ii]; 289 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr2[ii];
290 } 290 }
@@ -293,14 +293,14 @@ s_vGetDASA (
293 else { 293 else {
294 // Is AP mode.. 294 // Is AP mode..
295 if (pMACHeader->wFrameCtl & FC_FROMDS) { 295 if (pMACHeader->wFrameCtl & FC_FROMDS) {
296 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 296 for(ii=0;ii<ETH_ALEN;ii++) {
297 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr3[ii]; 297 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr3[ii];
298 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr4[ii]; 298 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr4[ii];
299 cbHeaderSize += 6; 299 cbHeaderSize += 6;
300 } 300 }
301 } 301 }
302 else { 302 else {
303 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 303 for(ii=0;ii<ETH_ALEN;ii++) {
304 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr3[ii]; 304 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr3[ii];
305 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr2[ii]; 305 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr2[ii];
306 } 306 }
@@ -314,7 +314,7 @@ s_vGetDASA (
314 314
315//PLICE_DEBUG -> 315//PLICE_DEBUG ->
316 316
317VOID MngWorkItem(PVOID Context) 317void MngWorkItem(void *Context)
318{ 318{
319 PSRxMgmtPacket pRxMgmtPacket; 319 PSRxMgmtPacket pRxMgmtPacket;
320 PSDevice pDevice = (PSDevice) Context; 320 PSDevice pDevice = (PSDevice) Context;
@@ -335,8 +335,8 @@ VOID MngWorkItem(PVOID Context)
335 335
336BOOL 336BOOL
337device_receive_frame ( 337device_receive_frame (
338 IN PSDevice pDevice, 338 PSDevice pDevice,
339 IN PSRxDesc pCurrRD 339 PSRxDesc pCurrRD
340 ) 340 )
341{ 341{
342 342
@@ -569,7 +569,7 @@ device_receive_frame (
569 // RX OK 569 // RX OK
570 // 570 //
571 //remove the CRC length 571 //remove the CRC length
572 FrameSize -= U_CRC_LEN; 572 FrameSize -= ETH_FCS_LEN;
573 573
574 if (( !(*pbyRsr & (RSR_ADDRBROAD | RSR_ADDRMULTI))) && // unicast address 574 if (( !(*pbyRsr & (RSR_ADDRBROAD | RSR_ADDRMULTI))) && // unicast address
575 (IS_FRAGMENT_PKT((skb->data+4))) 575 (IS_FRAGMENT_PKT((skb->data+4)))
@@ -631,13 +631,13 @@ device_receive_frame (
631 tasklet_schedule(&pDevice->RxMngWorkItem); 631 tasklet_schedule(&pDevice->RxMngWorkItem);
632#else 632#else
633//printk("RxMan\n"); 633//printk("RxMan\n");
634 vMgrRxManagePacket((HANDLE)pDevice, pDevice->pMgmt, pRxPacket); 634 vMgrRxManagePacket((void *)pDevice, pDevice->pMgmt, pRxPacket);
635 //tasklet_schedule(&pDevice->RxMngWorkItem); 635 //tasklet_schedule(&pDevice->RxMngWorkItem);
636#endif 636#endif
637 637
638#endif 638#endif
639//PLICE_DEBUG<- 639//PLICE_DEBUG<-
640 //vMgrRxManagePacket((HANDLE)pDevice, pDevice->pMgmt, pRxPacket); 640 //vMgrRxManagePacket((void *)pDevice, pDevice->pMgmt, pRxPacket);
641 // hostap Deamon handle 802.11 management 641 // hostap Deamon handle 802.11 management
642 if (pDevice->bEnableHostapd) { 642 if (pDevice->bEnableHostapd) {
643 skb->dev = pDevice->apdev; 643 skb->dev = pDevice->apdev;
@@ -1039,9 +1039,9 @@ device_receive_frame (
1039 1039
1040 1040
1041static BOOL s_bAPModeRxCtl ( 1041static BOOL s_bAPModeRxCtl (
1042 IN PSDevice pDevice, 1042 PSDevice pDevice,
1043 IN PBYTE pbyFrame, 1043 PBYTE pbyFrame,
1044 IN INT iSANodeIndex 1044 INT iSANodeIndex
1045 ) 1045 )
1046{ 1046{
1047 PS802_11Header p802_11Header; 1047 PS802_11Header p802_11Header;
@@ -1087,7 +1087,7 @@ static BOOL s_bAPModeRxCtl (
1087 // delcare received ps-poll event 1087 // delcare received ps-poll event
1088 if (IS_CTL_PSPOLL(pbyFrame)) { 1088 if (IS_CTL_PSPOLL(pbyFrame)) {
1089 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE; 1089 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE;
1090 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 1090 bScheduleCommand((void *)pDevice, WLAN_CMD_RX_PSPOLL, NULL);
1091 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 1\n"); 1091 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 1\n");
1092 } 1092 }
1093 else { 1093 else {
@@ -1096,7 +1096,7 @@ static BOOL s_bAPModeRxCtl (
1096 if (!IS_FC_POWERMGT(pbyFrame)) { 1096 if (!IS_FC_POWERMGT(pbyFrame)) {
1097 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE; 1097 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE;
1098 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE; 1098 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE;
1099 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 1099 bScheduleCommand((void *)pDevice, WLAN_CMD_RX_PSPOLL, NULL);
1100 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 2\n"); 1100 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 2\n");
1101 } 1101 }
1102 } 1102 }
@@ -1112,7 +1112,7 @@ static BOOL s_bAPModeRxCtl (
1112 if (pMgmt->sNodeDBTable[iSANodeIndex].wEnQueueCnt > 0) { 1112 if (pMgmt->sNodeDBTable[iSANodeIndex].wEnQueueCnt > 0) {
1113 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE; 1113 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE;
1114 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE; 1114 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE;
1115 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 1115 bScheduleCommand((void *)pDevice, WLAN_CMD_RX_PSPOLL, NULL);
1116 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 3\n"); 1116 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 3\n");
1117 1117
1118 } 1118 }
@@ -1163,15 +1163,15 @@ static BOOL s_bAPModeRxCtl (
1163} 1163}
1164 1164
1165static BOOL s_bHandleRxEncryption ( 1165static BOOL s_bHandleRxEncryption (
1166 IN PSDevice pDevice, 1166 PSDevice pDevice,
1167 IN PBYTE pbyFrame, 1167 PBYTE pbyFrame,
1168 IN UINT FrameSize, 1168 UINT FrameSize,
1169 IN PBYTE pbyRsr, 1169 PBYTE pbyRsr,
1170 OUT PBYTE pbyNewRsr, 1170 PBYTE pbyNewRsr,
1171 OUT PSKeyItem *pKeyOut, 1171 PSKeyItem *pKeyOut,
1172 int * pbExtIV, 1172 int * pbExtIV,
1173 OUT PWORD pwRxTSC15_0, 1173 PWORD pwRxTSC15_0,
1174 OUT PDWORD pdwRxTSC47_16 1174 PDWORD pdwRxTSC47_16
1175 ) 1175 )
1176{ 1176{
1177 UINT PayloadLen = FrameSize; 1177 UINT PayloadLen = FrameSize;
@@ -1309,16 +1309,16 @@ static BOOL s_bHandleRxEncryption (
1309 1309
1310 1310
1311static BOOL s_bHostWepRxEncryption ( 1311static BOOL s_bHostWepRxEncryption (
1312 IN PSDevice pDevice, 1312 PSDevice pDevice,
1313 IN PBYTE pbyFrame, 1313 PBYTE pbyFrame,
1314 IN UINT FrameSize, 1314 UINT FrameSize,
1315 IN PBYTE pbyRsr, 1315 PBYTE pbyRsr,
1316 IN BOOL bOnFly, 1316 BOOL bOnFly,
1317 IN PSKeyItem pKey, 1317 PSKeyItem pKey,
1318 OUT PBYTE pbyNewRsr, 1318 PBYTE pbyNewRsr,
1319 int * pbExtIV, 1319 int * pbExtIV,
1320 OUT PWORD pwRxTSC15_0, 1320 PWORD pwRxTSC15_0,
1321 OUT PDWORD pdwRxTSC47_16 1321 PDWORD pdwRxTSC47_16
1322 ) 1322 )
1323{ 1323{
1324 UINT PayloadLen = FrameSize; 1324 UINT PayloadLen = FrameSize;
@@ -1440,12 +1440,12 @@ static BOOL s_bHostWepRxEncryption (
1440 1440
1441 1441
1442static BOOL s_bAPModeRxData ( 1442static BOOL s_bAPModeRxData (
1443 IN PSDevice pDevice, 1443 PSDevice pDevice,
1444 IN struct sk_buff* skb, 1444 struct sk_buff* skb,
1445 IN UINT FrameSize, 1445 UINT FrameSize,
1446 IN UINT cbHeaderOffset, 1446 UINT cbHeaderOffset,
1447 IN INT iSANodeIndex, 1447 INT iSANodeIndex,
1448 IN INT iDANodeIndex 1448 INT iDANodeIndex
1449 ) 1449 )
1450{ 1450{
1451 PSMgmtObject pMgmt = pDevice->pMgmt; 1451 PSMgmtObject pMgmt = pDevice->pMgmt;
diff --git a/drivers/staging/vt6655/dpc.h b/drivers/staging/vt6655/dpc.h
index 51508b9087ea..e574963fee0c 100644
--- a/drivers/staging/vt6655/dpc.h
+++ b/drivers/staging/vt6655/dpc.h
@@ -43,11 +43,11 @@
43 43
44BOOL 44BOOL
45device_receive_frame ( 45device_receive_frame (
46 IN PSDevice pDevice, 46 PSDevice pDevice,
47 IN PSRxDesc pCurrRD 47 PSRxDesc pCurrRD
48 ); 48 );
49 49
50VOID MngWorkItem(PVOID Context); 50void MngWorkItem(void *Context);
51 51
52#endif // __RXTX_H__ 52#endif // __RXTX_H__
53 53
diff --git a/drivers/staging/vt6655/hostap.c b/drivers/staging/vt6655/hostap.c
index 58abf44c76a6..195cc36654ae 100644
--- a/drivers/staging/vt6655/hostap.c
+++ b/drivers/staging/vt6655/hostap.c
@@ -90,10 +90,9 @@ static int hostap_enable_hostapd(PSDevice pDevice, int rtnl_locked)
90 90
91 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "%s: Enabling hostapd mode\n", dev->name); 91 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "%s: Enabling hostapd mode\n", dev->name);
92 92
93 pDevice->apdev = (struct net_device *)kmalloc(sizeof(struct net_device), GFP_KERNEL); 93 pDevice->apdev = kzalloc(sizeof(struct net_device), GFP_KERNEL);
94 if (pDevice->apdev == NULL) 94 if (pDevice->apdev == NULL)
95 return -ENOMEM; 95 return -ENOMEM;
96 memset(pDevice->apdev, 0, sizeof(struct net_device));
97 96
98 apdev_priv = netdev_priv(pDevice->apdev); 97 apdev_priv = netdev_priv(pDevice->apdev);
99 *apdev_priv = *pDevice; 98 *apdev_priv = *pDevice;
@@ -183,7 +182,7 @@ KeyvInitTable(&pDevice->sKey,pDevice->PortOffset);
183 * 182 *
184 */ 183 */
185 184
186int hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked) 185int vt6655_hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked)
187{ 186{
188 if (val < 0 || val > 1) 187 if (val < 0 || val > 1)
189 return -EINVAL; 188 return -EINVAL;
@@ -746,7 +745,7 @@ static int hostap_get_encryption(PSDevice pDevice,
746 745
747/* 746/*
748 * Description: 747 * Description:
749 * hostap_ioctl main function supported for hostap deamon. 748 * vt6655_hostap_ioctl main function supported for hostap deamon.
750 * 749 *
751 * Parameters: 750 * Parameters:
752 * In: 751 * In:
@@ -758,7 +757,7 @@ static int hostap_get_encryption(PSDevice pDevice,
758 * 757 *
759 */ 758 */
760 759
761int hostap_ioctl(PSDevice pDevice, struct iw_point *p) 760int vt6655_hostap_ioctl(PSDevice pDevice, struct iw_point *p)
762{ 761{
763 struct viawget_hostapd_param *param; 762 struct viawget_hostapd_param *param;
764 int ret = 0; 763 int ret = 0;
@@ -768,7 +767,7 @@ int hostap_ioctl(PSDevice pDevice, struct iw_point *p)
768 p->length > VIAWGET_HOSTAPD_MAX_BUF_SIZE || !p->pointer) 767 p->length > VIAWGET_HOSTAPD_MAX_BUF_SIZE || !p->pointer)
769 return -EINVAL; 768 return -EINVAL;
770 769
771 param = (struct viawget_hostapd_param *) kmalloc((int)p->length, (int)GFP_KERNEL); 770 param = kmalloc((int)p->length, (int)GFP_KERNEL);
772 if (param == NULL) 771 if (param == NULL)
773 return -ENOMEM; 772 return -ENOMEM;
774 773
@@ -846,7 +845,7 @@ int hostap_ioctl(PSDevice pDevice, struct iw_point *p)
846 return -EOPNOTSUPP; 845 return -EOPNOTSUPP;
847 846
848 default: 847 default:
849 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "hostap_ioctl: unknown cmd=%d\n", 848 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "vt6655_hostap_ioctl: unknown cmd=%d\n",
850 (int)param->cmd); 849 (int)param->cmd);
851 return -EOPNOTSUPP; 850 return -EOPNOTSUPP;
852 break; 851 break;
diff --git a/drivers/staging/vt6655/hostap.h b/drivers/staging/vt6655/hostap.h
index 8fd667b542be..55db55524d96 100644
--- a/drivers/staging/vt6655/hostap.h
+++ b/drivers/staging/vt6655/hostap.h
@@ -61,8 +61,8 @@
61#define ARPHRD_IEEE80211 801 61#define ARPHRD_IEEE80211 801
62#endif 62#endif
63 63
64int hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked); 64int vt6655_hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked);
65int hostap_ioctl(PSDevice pDevice, struct iw_point *p); 65int vt6655_hostap_ioctl(PSDevice pDevice, struct iw_point *p);
66 66
67#endif // __HOSTAP_H__ 67#endif // __HOSTAP_H__
68 68
diff --git a/drivers/staging/vt6655/ioctl.c b/drivers/staging/vt6655/ioctl.c
index d9a5fd21ab31..404287c60252 100644
--- a/drivers/staging/vt6655/ioctl.c
+++ b/drivers/staging/vt6655/ioctl.c
@@ -83,7 +83,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
83 83
84 pReq->wResult = 0; 84 pReq->wResult = 0;
85 85
86 switch(pReq->wCmdCode) { 86 switch (pReq->wCmdCode) {
87 87
88 case WLAN_CMD_BSS_SCAN: 88 case WLAN_CMD_BSS_SCAN:
89 89
@@ -109,14 +109,14 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
109 } 109 }
110 spin_lock_irq(&pDevice->lock); 110 spin_lock_irq(&pDevice->lock);
111 if (memcmp(pMgmt->abyCurrBSSID, &abyNullAddr[0], 6) == 0) 111 if (memcmp(pMgmt->abyCurrBSSID, &abyNullAddr[0], 6) == 0)
112 BSSvClearBSSList((HANDLE)pDevice, FALSE); 112 BSSvClearBSSList((void *)pDevice, FALSE);
113 else 113 else
114 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 114 BSSvClearBSSList((void *)pDevice, pDevice->bLinkPass);
115 115
116 if (pItemSSID->len != 0) 116 if (pItemSSID->len != 0)
117 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, abyScanSSID); 117 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, abyScanSSID);
118 else 118 else
119 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 119 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
120 spin_unlock_irq(&pDevice->lock); 120 spin_unlock_irq(&pDevice->lock);
121 break; 121 break;
122 122
@@ -223,8 +223,8 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
223 netif_stop_queue(pDevice->dev); 223 netif_stop_queue(pDevice->dev);
224 spin_lock_irq(&pDevice->lock); 224 spin_lock_irq(&pDevice->lock);
225 pMgmt->eCurrState = WMAC_STATE_IDLE; 225 pMgmt->eCurrState = WMAC_STATE_IDLE;
226 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 226 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID);
227 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 227 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
228 spin_unlock_irq(&pDevice->lock); 228 spin_unlock_irq(&pDevice->lock);
229 break; 229 break;
230 230
@@ -429,7 +429,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
429 break; 429 break;
430 }; 430 };
431 if (sValue.dwValue == 1) { 431 if (sValue.dwValue == 1) {
432 if (hostap_set_hostapd(pDevice, 1, 1) == 0){ 432 if (vt6655_hostap_set_hostapd(pDevice, 1, 1) == 0){
433 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enable HOSTAP\n"); 433 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enable HOSTAP\n");
434 } 434 }
435 else { 435 else {
@@ -438,7 +438,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
438 } 438 }
439 } 439 }
440 else { 440 else {
441 hostap_set_hostapd(pDevice, 0, 1); 441 vt6655_hostap_set_hostapd(pDevice, 0, 1);
442 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disable HOSTAP\n"); 442 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disable HOSTAP\n");
443 } 443 }
444 444
@@ -497,7 +497,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
497 }; 497 };
498 if (sValue.dwValue == 1) { 498 if (sValue.dwValue == 1) {
499 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "up wpadev\n"); 499 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "up wpadev\n");
500 memcpy(pDevice->wpadev->dev_addr, pDevice->dev->dev_addr, U_ETHER_ADDR_LEN); 500 memcpy(pDevice->wpadev->dev_addr, pDevice->dev->dev_addr, ETH_ALEN);
501 pDevice->bWPADEVUp = TRUE; 501 pDevice->bWPADEVUp = TRUE;
502 } 502 }
503 else { 503 else {
@@ -593,7 +593,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
593 593
594 netif_stop_queue(pDevice->dev); 594 netif_stop_queue(pDevice->dev);
595 spin_lock_irq(&pDevice->lock); 595 spin_lock_irq(&pDevice->lock);
596 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RUN_AP, NULL); 596 bScheduleCommand((void *)pDevice, WLAN_CMD_RUN_AP, NULL);
597 spin_unlock_irq(&pDevice->lock); 597 spin_unlock_irq(&pDevice->lock);
598 break; 598 break;
599 599
@@ -714,12 +714,12 @@ if(wpa_Result.authenticated==TRUE) {
714} 714}
715 715
716/* 716/*
717VOID 717void
718vConfigWEPKey ( 718vConfigWEPKey (
719 IN PSDevice pDevice, 719 PSDevice pDevice,
720 IN DWORD dwKeyIndex, 720 DWORD dwKeyIndex,
721 IN PBYTE pbyKey, 721 PBYTE pbyKey,
722 IN ULONG uKeyLength 722 ULONG uKeyLength
723 ) 723 )
724{ 724{
725 int ii; 725 int ii;
diff --git a/drivers/staging/vt6655/ioctl.h b/drivers/staging/vt6655/ioctl.h
index 07d228399c3c..0d10c2a923c6 100644
--- a/drivers/staging/vt6655/ioctl.h
+++ b/drivers/staging/vt6655/ioctl.h
@@ -43,11 +43,11 @@
43int private_ioctl(PSDevice pDevice, struct ifreq *rq); 43int private_ioctl(PSDevice pDevice, struct ifreq *rq);
44 44
45/* 45/*
46VOID vConfigWEPKey ( 46void vConfigWEPKey (
47 IN PSDevice pDevice, 47 PSDevice pDevice,
48 IN DWORD dwKeyIndex, 48 DWORD dwKeyIndex,
49 IN PBYTE pbyKey, 49 PBYTE pbyKey,
50 IN ULONG uKeyLength 50 ULONG uKeyLength
51 ); 51 );
52*/ 52*/
53 53
diff --git a/drivers/staging/vt6655/iwctl.c b/drivers/staging/vt6655/iwctl.c
index 78b49830a255..cf69034fc0f0 100644
--- a/drivers/staging/vt6655/iwctl.c
+++ b/drivers/staging/vt6655/iwctl.c
@@ -190,7 +190,7 @@ if(pDevice->byReAssocCount > 0) { //reject scan when re-associating!
190} 190}
191 191
192 spin_lock_irq(&pDevice->lock); 192 spin_lock_irq(&pDevice->lock);
193 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 193 BSSvClearBSSList((void *)pDevice, pDevice->bLinkPass);
194 194
195//mike add: active scan OR passive scan OR desire_ssid scan 195//mike add: active scan OR passive scan OR desire_ssid scan
196 if(wrq->length == sizeof(struct iw_scan_req)) { 196 if(wrq->length == sizeof(struct iw_scan_req)) {
@@ -208,7 +208,7 @@ if(pDevice->byReAssocCount > 0) { //reject scan when re-associating!
208 pMgmt->eScanType = WMAC_SCAN_PASSIVE; 208 pMgmt->eScanType = WMAC_SCAN_PASSIVE;
209 PRINT_K("SIOCSIWSCAN:[desired_ssid=%s,len=%d]\n",((PWLAN_IE_SSID)abyScanSSID)->abySSID, 209 PRINT_K("SIOCSIWSCAN:[desired_ssid=%s,len=%d]\n",((PWLAN_IE_SSID)abyScanSSID)->abySSID,
210 ((PWLAN_IE_SSID)abyScanSSID)->len); 210 ((PWLAN_IE_SSID)abyScanSSID)->len);
211 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, abyScanSSID); 211 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, abyScanSSID);
212 spin_unlock_irq(&pDevice->lock); 212 spin_unlock_irq(&pDevice->lock);
213 213
214 return 0; 214 return 0;
@@ -223,7 +223,7 @@ if(pDevice->byReAssocCount > 0) { //reject scan when re-associating!
223 223
224 pMgmt->eScanType = WMAC_SCAN_PASSIVE; 224 pMgmt->eScanType = WMAC_SCAN_PASSIVE;
225 //printk("SIOCSIWSCAN:WLAN_CMD_BSSID_SCAN\n"); 225 //printk("SIOCSIWSCAN:WLAN_CMD_BSSID_SCAN\n");
226 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 226 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
227 spin_unlock_irq(&pDevice->lock); 227 spin_unlock_irq(&pDevice->lock);
228 228
229 return 0; 229 return 0;
@@ -699,7 +699,6 @@ if (pMgmt->eScanState == WMAC_IS_SCANNING) {
699 if (wrq->sa_family != ARPHRD_ETHER) 699 if (wrq->sa_family != ARPHRD_ETHER)
700 rc = -EINVAL; 700 rc = -EINVAL;
701 else { 701 else {
702 memset(pMgmt->abyDesireBSSID, 0xFF, 6);
703 memcpy(pMgmt->abyDesireBSSID, wrq->sa_data, 6); 702 memcpy(pMgmt->abyDesireBSSID, wrq->sa_data, 6);
704 //2008-0409-05, <Add> by Einsn Liu 703 //2008-0409-05, <Add> by Einsn Liu
705 if((pDevice->bLinkPass == TRUE) && 704 if((pDevice->bLinkPass == TRUE) &&
@@ -889,7 +888,6 @@ if (pMgmt->eScanState == WMAC_IS_SCANNING) {
889 BYTE abyTmpDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 888 BYTE abyTmpDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
890 UINT ii , uSameBssidNum=0; 889 UINT ii , uSameBssidNum=0;
891 890
892 memset(abyTmpDesireSSID,0,sizeof(abyTmpDesireSSID));
893 memcpy(abyTmpDesireSSID,pMgmt->abyDesireSSID,sizeof(abyTmpDesireSSID)); 891 memcpy(abyTmpDesireSSID,pMgmt->abyDesireSSID,sizeof(abyTmpDesireSSID));
894 pCurr = BSSpSearchBSSList(pDevice, 892 pCurr = BSSpSearchBSSList(pDevice,
895 NULL, 893 NULL,
@@ -899,10 +897,10 @@ if (pMgmt->eScanState == WMAC_IS_SCANNING) {
899 897
900 if (pCurr == NULL){ 898 if (pCurr == NULL){
901 PRINT_K("SIOCSIWESSID:hidden ssid site survey before associate.......\n"); 899 PRINT_K("SIOCSIWESSID:hidden ssid site survey before associate.......\n");
902 vResetCommandTimer((HANDLE) pDevice); 900 vResetCommandTimer((void *) pDevice);
903 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 901 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
904 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 902 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID);
905 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID); 903 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID);
906 } 904 }
907 else { //mike:to find out if that desired SSID is a hidden-ssid AP , 905 else { //mike:to find out if that desired SSID is a hidden-ssid AP ,
908 // by means of judging if there are two same BSSID exist in list ? 906 // by means of judging if there are two same BSSID exist in list ?
@@ -914,10 +912,10 @@ if (pMgmt->eScanState == WMAC_IS_SCANNING) {
914 } 912 }
915 if(uSameBssidNum >= 2) { //hit: desired AP is in hidden ssid mode!!! 913 if(uSameBssidNum >= 2) { //hit: desired AP is in hidden ssid mode!!!
916 printk("SIOCSIWESSID:hidden ssid directly associate.......\n"); 914 printk("SIOCSIWESSID:hidden ssid directly associate.......\n");
917 vResetCommandTimer((HANDLE) pDevice); 915 vResetCommandTimer((void *) pDevice);
918 pMgmt->eScanType = WMAC_SCAN_PASSIVE; //this scan type,you'll submit scan result! 916 pMgmt->eScanType = WMAC_SCAN_PASSIVE; //this scan type,you'll submit scan result!
919 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 917 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID);
920 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID); 918 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID);
921 } 919 }
922 } 920 }
923 } 921 }
@@ -1662,11 +1660,11 @@ int iwctl_siwpower(struct net_device *dev,
1662 } 1660 }
1663 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) { 1661 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
1664 pDevice->ePSMode = WMAC_POWER_FAST; 1662 pDevice->ePSMode = WMAC_POWER_FAST;
1665 PSvEnablePowerSaving((HANDLE)pDevice, pMgmt->wListenInterval); 1663 PSvEnablePowerSaving((void *)pDevice, pMgmt->wListenInterval);
1666 1664
1667 } else if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_PERIOD) { 1665 } else if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_PERIOD) {
1668 pDevice->ePSMode = WMAC_POWER_FAST; 1666 pDevice->ePSMode = WMAC_POWER_FAST;
1669 PSvEnablePowerSaving((HANDLE)pDevice, pMgmt->wListenInterval); 1667 PSvEnablePowerSaving((void *)pDevice, pMgmt->wListenInterval);
1670 } 1668 }
1671 switch (wrq->flags & IW_POWER_MODE) { 1669 switch (wrq->flags & IW_POWER_MODE) {
1672 case IW_POWER_UNICAST_R: 1670 case IW_POWER_UNICAST_R:
@@ -1702,7 +1700,8 @@ int iwctl_giwpower(struct net_device *dev,
1702 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWPOWER \n"); 1700 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWPOWER \n");
1703 1701
1704 1702
1705 if ((wrq->disabled = (mode == WMAC_POWER_CAM))) 1703 wrq->disabled = (mode == WMAC_POWER_CAM);
1704 if (wrq->disabled)
1706 return 0; 1705 return 0;
1707 1706
1708 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) { 1707 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
@@ -2097,7 +2096,7 @@ int iwctl_siwmlme(struct net_device *dev,
2097 switch(mlme->cmd){ 2096 switch(mlme->cmd){
2098 case IW_MLME_DEAUTH: 2097 case IW_MLME_DEAUTH:
2099 //this command seems to be not complete,please test it --einsnliu 2098 //this command seems to be not complete,please test it --einsnliu
2100 //bScheduleCommand((HANDLE) pDevice, WLAN_CMD_DEAUTH, (PBYTE)&reason); 2099 //bScheduleCommand((void *) pDevice, WLAN_CMD_DEAUTH, (PBYTE)&reason);
2101 break; 2100 break;
2102 case IW_MLME_DISASSOC: 2101 case IW_MLME_DISASSOC:
2103 if(pDevice->bLinkPass == TRUE){ 2102 if(pDevice->bLinkPass == TRUE){
@@ -2105,7 +2104,7 @@ int iwctl_siwmlme(struct net_device *dev,
2105 //clear related flags 2104 //clear related flags
2106 memset(pMgmt->abyDesireBSSID, 0xFF,6); 2105 memset(pMgmt->abyDesireBSSID, 0xFF,6);
2107 KeyvInitTable(&pDevice->sKey, pDevice->PortOffset); 2106 KeyvInitTable(&pDevice->sKey, pDevice->PortOffset);
2108 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_DISASSOCIATE, NULL); 2107 bScheduleCommand((void *)pDevice, WLAN_CMD_DISASSOCIATE, NULL);
2109 } 2108 }
2110 break; 2109 break;
2111 default: 2110 default:
diff --git a/drivers/staging/vt6655/key.c b/drivers/staging/vt6655/key.c
index a4d2184d826d..bfc5c509d902 100644
--- a/drivers/staging/vt6655/key.c
+++ b/drivers/staging/vt6655/key.c
@@ -58,7 +58,7 @@ static int msglevel =MSG_LEVEL_INFO;
58/*--------------------- Static Variables --------------------------*/ 58/*--------------------- Static Variables --------------------------*/
59 59
60/*--------------------- Static Functions --------------------------*/ 60/*--------------------- Static Functions --------------------------*/
61static VOID 61static void
62s_vCheckKeyTableValid (PSKeyManagement pTable, DWORD_PTR dwIoBase) 62s_vCheckKeyTableValid (PSKeyManagement pTable, DWORD_PTR dwIoBase)
63{ 63{
64 int i; 64 int i;
@@ -96,7 +96,7 @@ s_vCheckKeyTableValid (PSKeyManagement pTable, DWORD_PTR dwIoBase)
96 * Return Value: none 96 * Return Value: none
97 * 97 *
98 */ 98 */
99VOID KeyvInitTable (PSKeyManagement pTable, DWORD_PTR dwIoBase) 99void KeyvInitTable (PSKeyManagement pTable, DWORD_PTR dwIoBase)
100{ 100{
101 int i; 101 int i;
102 int jj; 102 int jj;
@@ -104,10 +104,10 @@ VOID KeyvInitTable (PSKeyManagement pTable, DWORD_PTR dwIoBase)
104 for (i=0;i<MAX_KEY_TABLE;i++) { 104 for (i=0;i<MAX_KEY_TABLE;i++) {
105 pTable->KeyTable[i].bInUse = FALSE; 105 pTable->KeyTable[i].bInUse = FALSE;
106 pTable->KeyTable[i].PairwiseKey.bKeyValid = FALSE; 106 pTable->KeyTable[i].PairwiseKey.bKeyValid = FALSE;
107 pTable->KeyTable[i].PairwiseKey.pvKeyTable = (PVOID)&pTable->KeyTable[i]; 107 pTable->KeyTable[i].PairwiseKey.pvKeyTable = (void *)&pTable->KeyTable[i];
108 for (jj=0; jj < MAX_GROUP_KEY; jj++) { 108 for (jj=0; jj < MAX_GROUP_KEY; jj++) {
109 pTable->KeyTable[i].GroupKey[jj].bKeyValid = FALSE; 109 pTable->KeyTable[i].GroupKey[jj].bKeyValid = FALSE;
110 pTable->KeyTable[i].GroupKey[jj].pvKeyTable = (PVOID)&pTable->KeyTable[i]; 110 pTable->KeyTable[i].GroupKey[jj].pvKeyTable = (void *)&pTable->KeyTable[i];
111 } 111 }
112 pTable->KeyTable[i].wKeyCtl = 0; 112 pTable->KeyTable[i].wKeyCtl = 0;
113 pTable->KeyTable[i].dwGTKeyIndex = 0; 113 pTable->KeyTable[i].dwGTKeyIndex = 0;
@@ -132,10 +132,10 @@ VOID KeyvInitTable (PSKeyManagement pTable, DWORD_PTR dwIoBase)
132 * 132 *
133 */ 133 */
134BOOL KeybGetKey ( 134BOOL KeybGetKey (
135 IN PSKeyManagement pTable, 135 PSKeyManagement pTable,
136 IN PBYTE pbyBSSID, 136 PBYTE pbyBSSID,
137 IN DWORD dwKeyIndex, 137 DWORD dwKeyIndex,
138 OUT PSKeyItem *pKey 138 PSKeyItem *pKey
139 ) 139 )
140{ 140{
141 int i; 141 int i;
@@ -281,7 +281,7 @@ BOOL KeybSetKey (
281 } 281 }
282 } 282 }
283 if (j < (MAX_KEY_TABLE-1)) { 283 if (j < (MAX_KEY_TABLE-1)) {
284 memcpy(pTable->KeyTable[j].abyBSSID,pbyBSSID,U_ETHER_ADDR_LEN); 284 memcpy(pTable->KeyTable[j].abyBSSID,pbyBSSID,ETH_ALEN);
285 pTable->KeyTable[j].bInUse = TRUE; 285 pTable->KeyTable[j].bInUse = TRUE;
286 if ((dwKeyIndex & PAIRWISE_KEY) != 0) { 286 if ((dwKeyIndex & PAIRWISE_KEY) != 0) {
287 // Pairwise key 287 // Pairwise key
@@ -470,7 +470,7 @@ BOOL KeybRemoveAllKey (
470 * Return Value: TRUE if success otherwise FALSE 470 * Return Value: TRUE if success otherwise FALSE
471 * 471 *
472 */ 472 */
473VOID KeyvRemoveWEPKey ( 473void KeyvRemoveWEPKey (
474 PSKeyManagement pTable, 474 PSKeyManagement pTable,
475 DWORD dwKeyIndex, 475 DWORD dwKeyIndex,
476 DWORD_PTR dwIoBase 476 DWORD_PTR dwIoBase
@@ -492,7 +492,7 @@ VOID KeyvRemoveWEPKey (
492 return; 492 return;
493} 493}
494 494
495VOID KeyvRemoveAllWEPKey ( 495void KeyvRemoveAllWEPKey (
496 PSKeyManagement pTable, 496 PSKeyManagement pTable,
497 DWORD_PTR dwIoBase 497 DWORD_PTR dwIoBase
498 ) 498 )
@@ -518,10 +518,10 @@ VOID KeyvRemoveAllWEPKey (
518 * 518 *
519 */ 519 */
520BOOL KeybGetTransmitKey ( 520BOOL KeybGetTransmitKey (
521 IN PSKeyManagement pTable, 521 PSKeyManagement pTable,
522 IN PBYTE pbyBSSID, 522 PBYTE pbyBSSID,
523 IN DWORD dwKeyType, 523 DWORD dwKeyType,
524 OUT PSKeyItem *pKey 524 PSKeyItem *pKey
525 ) 525 )
526{ 526{
527 int i, ii; 527 int i, ii;
@@ -598,8 +598,8 @@ BOOL KeybGetTransmitKey (
598 * 598 *
599 */ 599 */
600BOOL KeybCheckPairewiseKey ( 600BOOL KeybCheckPairewiseKey (
601 IN PSKeyManagement pTable, 601 PSKeyManagement pTable,
602 OUT PSKeyItem *pKey 602 PSKeyItem *pKey
603 ) 603 )
604{ 604{
605 int i; 605 int i;
@@ -656,7 +656,7 @@ BOOL KeybSetDefaultKey (
656 } 656 }
657 657
658 pTable->KeyTable[MAX_KEY_TABLE-1].bInUse = TRUE; 658 pTable->KeyTable[MAX_KEY_TABLE-1].bInUse = TRUE;
659 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) 659 for(ii=0;ii<ETH_ALEN;ii++)
660 pTable->KeyTable[MAX_KEY_TABLE-1].abyBSSID[ii] = 0xFF; 660 pTable->KeyTable[MAX_KEY_TABLE-1].abyBSSID[ii] = 0xFF;
661 661
662 // Group key 662 // Group key
diff --git a/drivers/staging/vt6655/key.h b/drivers/staging/vt6655/key.h
index ba797c7b3c17..39403d93aeb1 100644
--- a/drivers/staging/vt6655/key.h
+++ b/drivers/staging/vt6655/key.h
@@ -66,12 +66,12 @@ typedef struct tagSKeyItem
66 BYTE byCipherSuite; 66 BYTE byCipherSuite;
67 BYTE byReserved0; 67 BYTE byReserved0;
68 DWORD dwKeyIndex; 68 DWORD dwKeyIndex;
69 PVOID pvKeyTable; 69 void *pvKeyTable;
70} SKeyItem, *PSKeyItem; //64 70} SKeyItem, *PSKeyItem; //64
71 71
72typedef struct tagSKeyTable 72typedef struct tagSKeyTable
73{ 73{
74 BYTE abyBSSID[U_ETHER_ADDR_LEN]; //6 74 BYTE abyBSSID[ETH_ALEN]; //6
75 BYTE byReserved0[2]; //8 75 BYTE byReserved0[2]; //8
76 SKeyItem PairwiseKey; 76 SKeyItem PairwiseKey;
77 SKeyItem GroupKey[MAX_GROUP_KEY]; //64*5 = 320, 320+8=328 77 SKeyItem GroupKey[MAX_GROUP_KEY]; //64*5 = 320, 320+8=328
@@ -101,13 +101,13 @@ typedef struct tagSKeyManagement
101 101
102/*--------------------- Export Functions --------------------------*/ 102/*--------------------- Export Functions --------------------------*/
103 103
104VOID KeyvInitTable(PSKeyManagement pTable, DWORD_PTR dwIoBase); 104void KeyvInitTable(PSKeyManagement pTable, DWORD_PTR dwIoBase);
105 105
106BOOL KeybGetKey( 106BOOL KeybGetKey(
107 IN PSKeyManagement pTable, 107 PSKeyManagement pTable,
108 IN PBYTE pbyBSSID, 108 PBYTE pbyBSSID,
109 IN DWORD dwKeyIndex, 109 DWORD dwKeyIndex,
110 OUT PSKeyItem *pKey 110 PSKeyItem *pKey
111 ); 111 );
112 112
113BOOL KeybSetKey( 113BOOL KeybSetKey(
@@ -141,15 +141,15 @@ BOOL KeybRemoveKey(
141 ); 141 );
142 142
143BOOL KeybGetTransmitKey( 143BOOL KeybGetTransmitKey(
144 IN PSKeyManagement pTable, 144 PSKeyManagement pTable,
145 IN PBYTE pbyBSSID, 145 PBYTE pbyBSSID,
146 IN DWORD dwKeyType, 146 DWORD dwKeyType,
147 OUT PSKeyItem *pKey 147 PSKeyItem *pKey
148 ); 148 );
149 149
150BOOL KeybCheckPairewiseKey( 150BOOL KeybCheckPairewiseKey(
151 IN PSKeyManagement pTable, 151 PSKeyManagement pTable,
152 OUT PSKeyItem *pKey 152 PSKeyItem *pKey
153 ); 153 );
154 154
155BOOL KeybRemoveAllKey( 155BOOL KeybRemoveAllKey(
@@ -158,13 +158,13 @@ BOOL KeybRemoveAllKey(
158 DWORD_PTR dwIoBase 158 DWORD_PTR dwIoBase
159 ); 159 );
160 160
161VOID KeyvRemoveWEPKey( 161void KeyvRemoveWEPKey(
162 PSKeyManagement pTable, 162 PSKeyManagement pTable,
163 DWORD dwKeyIndex, 163 DWORD dwKeyIndex,
164 DWORD_PTR dwIoBase 164 DWORD_PTR dwIoBase
165 ); 165 );
166 166
167VOID KeyvRemoveAllWEPKey( 167void KeyvRemoveAllWEPKey(
168 PSKeyManagement pTable, 168 PSKeyManagement pTable,
169 DWORD_PTR dwIoBase 169 DWORD_PTR dwIoBase
170 ); 170 );
diff --git a/drivers/staging/vt6655/mac.c b/drivers/staging/vt6655/mac.c
index cdd7cd5e4095..f1ef7da75c2b 100644
--- a/drivers/staging/vt6655/mac.c
+++ b/drivers/staging/vt6655/mac.c
@@ -103,7 +103,7 @@ static int msglevel =MSG_LEVEL_INFO;
103 * Return Value: none 103 * Return Value: none
104 * 104 *
105 */ 105 */
106VOID MACvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyMacRegs) 106void MACvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyMacRegs)
107{ 107{
108 int ii; 108 int ii;
109 109
@@ -234,7 +234,7 @@ BYTE MACbyReadMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx)
234 * Return Value: none 234 * Return Value: none
235 * 235 *
236 */ 236 */
237VOID MACvWriteMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx, BYTE byData) 237void MACvWriteMultiAddr (DWORD_PTR dwIoBase, UINT uByteIdx, BYTE byData)
238{ 238{
239 MACvSelectPage1(dwIoBase); 239 MACvSelectPage1(dwIoBase);
240 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData); 240 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData);
@@ -676,7 +676,7 @@ void MACvSaveContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
676 * Return Value: none 676 * Return Value: none
677 * 677 *
678 */ 678 */
679VOID MACvRestoreContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf) 679void MACvRestoreContext (DWORD_PTR dwIoBase, PBYTE pbyCxtBuf)
680{ 680{
681 int ii; 681 int ii;
682 682
@@ -1244,7 +1244,7 @@ void MACvSetCurrTXDescAddr (int iTxType, DWORD_PTR dwIoBase, DWORD dwCurrDescAdd
1244 * Return Value: none 1244 * Return Value: none
1245 * 1245 *
1246 */ 1246 */
1247VOID MACvTimer0MicroSDelay (DWORD_PTR dwIoBase, UINT uDelay) 1247void MACvTimer0MicroSDelay (DWORD_PTR dwIoBase, UINT uDelay)
1248{ 1248{
1249BYTE byValue; 1249BYTE byValue;
1250UINT uu,ii; 1250UINT uu,ii;
diff --git a/drivers/staging/vt6655/mac.h b/drivers/staging/vt6655/mac.h
index 3ba87fb64d3c..5eb7f57f7182 100644
--- a/drivers/staging/vt6655/mac.h
+++ b/drivers/staging/vt6655/mac.h
@@ -1075,7 +1075,7 @@
1075/*--------------------- Export Functions --------------------------*/ 1075/*--------------------- Export Functions --------------------------*/
1076 1076
1077extern WORD TxRate_iwconfig;//2008-5-8 <add> by chester 1077extern WORD TxRate_iwconfig;//2008-5-8 <add> by chester
1078VOID MACvReadAllRegs(DWORD_PTR dwIoBase, PBYTE pbyMacRegs); 1078void MACvReadAllRegs(DWORD_PTR dwIoBase, PBYTE pbyMacRegs);
1079 1079
1080BOOL MACbIsRegBitsOn(DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits); 1080BOOL MACbIsRegBitsOn(DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits);
1081BOOL MACbIsRegBitsOff(DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits); 1081BOOL MACbIsRegBitsOff(DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits);
@@ -1083,32 +1083,32 @@ BOOL MACbIsRegBitsOff(DWORD_PTR dwIoBase, BYTE byRegOfs, BYTE byTestBits);
1083BOOL MACbIsIntDisable(DWORD_PTR dwIoBase); 1083BOOL MACbIsIntDisable(DWORD_PTR dwIoBase);
1084 1084
1085BYTE MACbyReadMultiAddr(DWORD_PTR dwIoBase, UINT uByteIdx); 1085BYTE MACbyReadMultiAddr(DWORD_PTR dwIoBase, UINT uByteIdx);
1086VOID MACvWriteMultiAddr(DWORD_PTR dwIoBase, UINT uByteIdx, BYTE byData); 1086void MACvWriteMultiAddr(DWORD_PTR dwIoBase, UINT uByteIdx, BYTE byData);
1087VOID MACvSetMultiAddrByHash(DWORD_PTR dwIoBase, BYTE byHashIdx); 1087void MACvSetMultiAddrByHash(DWORD_PTR dwIoBase, BYTE byHashIdx);
1088VOID MACvResetMultiAddrByHash(DWORD_PTR dwIoBase, BYTE byHashIdx); 1088void MACvResetMultiAddrByHash(DWORD_PTR dwIoBase, BYTE byHashIdx);
1089 1089
1090VOID MACvSetRxThreshold(DWORD_PTR dwIoBase, BYTE byThreshold); 1090void MACvSetRxThreshold(DWORD_PTR dwIoBase, BYTE byThreshold);
1091VOID MACvGetRxThreshold(DWORD_PTR dwIoBase, PBYTE pbyThreshold); 1091void MACvGetRxThreshold(DWORD_PTR dwIoBase, PBYTE pbyThreshold);
1092 1092
1093VOID MACvSetTxThreshold(DWORD_PTR dwIoBase, BYTE byThreshold); 1093void MACvSetTxThreshold(DWORD_PTR dwIoBase, BYTE byThreshold);
1094VOID MACvGetTxThreshold(DWORD_PTR dwIoBase, PBYTE pbyThreshold); 1094void MACvGetTxThreshold(DWORD_PTR dwIoBase, PBYTE pbyThreshold);
1095 1095
1096VOID MACvSetDmaLength(DWORD_PTR dwIoBase, BYTE byDmaLength); 1096void MACvSetDmaLength(DWORD_PTR dwIoBase, BYTE byDmaLength);
1097VOID MACvGetDmaLength(DWORD_PTR dwIoBase, PBYTE pbyDmaLength); 1097void MACvGetDmaLength(DWORD_PTR dwIoBase, PBYTE pbyDmaLength);
1098 1098
1099VOID MACvSetShortRetryLimit(DWORD_PTR dwIoBase, BYTE byRetryLimit); 1099void MACvSetShortRetryLimit(DWORD_PTR dwIoBase, BYTE byRetryLimit);
1100VOID MACvGetShortRetryLimit(DWORD_PTR dwIoBase, PBYTE pbyRetryLimit); 1100void MACvGetShortRetryLimit(DWORD_PTR dwIoBase, PBYTE pbyRetryLimit);
1101 1101
1102VOID MACvSetLongRetryLimit(DWORD_PTR dwIoBase, BYTE byRetryLimit); 1102void MACvSetLongRetryLimit(DWORD_PTR dwIoBase, BYTE byRetryLimit);
1103VOID MACvGetLongRetryLimit(DWORD_PTR dwIoBase, PBYTE pbyRetryLimit); 1103void MACvGetLongRetryLimit(DWORD_PTR dwIoBase, PBYTE pbyRetryLimit);
1104 1104
1105VOID MACvSetLoopbackMode(DWORD_PTR dwIoBase, BYTE byLoopbackMode); 1105void MACvSetLoopbackMode(DWORD_PTR dwIoBase, BYTE byLoopbackMode);
1106BOOL MACbIsInLoopbackMode(DWORD_PTR dwIoBase); 1106BOOL MACbIsInLoopbackMode(DWORD_PTR dwIoBase);
1107 1107
1108VOID MACvSetPacketFilter(DWORD_PTR dwIoBase, WORD wFilterType); 1108void MACvSetPacketFilter(DWORD_PTR dwIoBase, WORD wFilterType);
1109 1109
1110VOID MACvSaveContext(DWORD_PTR dwIoBase, PBYTE pbyCxtBuf); 1110void MACvSaveContext(DWORD_PTR dwIoBase, PBYTE pbyCxtBuf);
1111VOID MACvRestoreContext(DWORD_PTR dwIoBase, PBYTE pbyCxtBuf); 1111void MACvRestoreContext(DWORD_PTR dwIoBase, PBYTE pbyCxtBuf);
1112BOOL MACbCompareContext(DWORD_PTR dwIoBase, PBYTE pbyCxtBuf); 1112BOOL MACbCompareContext(DWORD_PTR dwIoBase, PBYTE pbyCxtBuf);
1113 1113
1114BOOL MACbSoftwareReset(DWORD_PTR dwIoBase); 1114BOOL MACbSoftwareReset(DWORD_PTR dwIoBase);
@@ -1117,14 +1117,14 @@ BOOL MACbSafeRxOff(DWORD_PTR dwIoBase);
1117BOOL MACbSafeTxOff(DWORD_PTR dwIoBase); 1117BOOL MACbSafeTxOff(DWORD_PTR dwIoBase);
1118BOOL MACbSafeStop(DWORD_PTR dwIoBase); 1118BOOL MACbSafeStop(DWORD_PTR dwIoBase);
1119BOOL MACbShutdown(DWORD_PTR dwIoBase); 1119BOOL MACbShutdown(DWORD_PTR dwIoBase);
1120VOID MACvInitialize(DWORD_PTR dwIoBase); 1120void MACvInitialize(DWORD_PTR dwIoBase);
1121VOID MACvSetCurrRx0DescAddr(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr); 1121void MACvSetCurrRx0DescAddr(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr);
1122VOID MACvSetCurrRx1DescAddr(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr); 1122void MACvSetCurrRx1DescAddr(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr);
1123VOID MACvSetCurrTXDescAddr(int iTxType, DWORD_PTR dwIoBase, DWORD dwCurrDescAddr); 1123void MACvSetCurrTXDescAddr(int iTxType, DWORD_PTR dwIoBase, DWORD dwCurrDescAddr);
1124VOID MACvSetCurrTx0DescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr); 1124void MACvSetCurrTx0DescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr);
1125VOID MACvSetCurrAC0DescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr); 1125void MACvSetCurrAC0DescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr);
1126VOID MACvSetCurrSyncDescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr); 1126void MACvSetCurrSyncDescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr);
1127VOID MACvSetCurrATIMDescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr); 1127void MACvSetCurrATIMDescAddrEx(DWORD_PTR dwIoBase, DWORD dwCurrDescAddr);
1128void MACvTimer0MicroSDelay(DWORD_PTR dwIoBase, UINT uDelay); 1128void MACvTimer0MicroSDelay(DWORD_PTR dwIoBase, UINT uDelay);
1129void MACvOneShotTimer0MicroSec(DWORD_PTR dwIoBase, UINT uDelayTime); 1129void MACvOneShotTimer0MicroSec(DWORD_PTR dwIoBase, UINT uDelayTime);
1130void MACvOneShotTimer1MicroSec(DWORD_PTR dwIoBase, UINT uDelayTime); 1130void MACvOneShotTimer1MicroSec(DWORD_PTR dwIoBase, UINT uDelayTime);
diff --git a/drivers/staging/vt6655/mib.c b/drivers/staging/vt6655/mib.c
index fb11595c82cb..4ca7877075b2 100644
--- a/drivers/staging/vt6655/mib.c
+++ b/drivers/staging/vt6655/mib.c
@@ -190,7 +190,7 @@ void STAvUpdateRDStatCounter (PSStatCounter pStatistic,
190 190
191 pStatistic->ullRsrOK++; 191 pStatistic->ullRsrOK++;
192 192
193 if (cbFrameLength >= U_ETHER_ADDR_LEN) { 193 if (cbFrameLength >= ETH_ALEN) {
194 // update counters in case that successful transmit 194 // update counters in case that successful transmit
195 if (byRSR & RSR_ADDRBROAD) { 195 if (byRSR & RSR_ADDRBROAD) {
196 pStatistic->ullRxBroadcastFrames++; 196 pStatistic->ullRxBroadcastFrames++;
@@ -359,9 +359,9 @@ void STAvUpdateRDStatCounter (PSStatCounter pStatistic,
359 else if ((512 <= cbFrameLength) && (cbFrameLength <= 1023)) { 359 else if ((512 <= cbFrameLength) && (cbFrameLength <= 1023)) {
360 pStatistic->dwRsrRxFrmLen512_1023++; 360 pStatistic->dwRsrRxFrmLen512_1023++;
361 } 361 }
362 else if ((1024 <= cbFrameLength) && (cbFrameLength <= MAX_PACKET_LEN + 4)) { 362 else if ((1024 <= cbFrameLength) && (cbFrameLength <= ETH_FRAME_LEN + 4)) {
363 pStatistic->dwRsrRxFrmLen1024_1518++; 363 pStatistic->dwRsrRxFrmLen1024_1518++;
364 } else if (cbFrameLength > MAX_PACKET_LEN + 4) { 364 } else if (cbFrameLength > ETH_FRAME_LEN + 4) {
365 pStatistic->dwRsrLong++; 365 pStatistic->dwRsrLong++;
366 } 366 }
367 367
diff --git a/drivers/staging/vt6655/mib.h b/drivers/staging/vt6655/mib.h
index 2aa2b91de72b..2308319a4051 100644
--- a/drivers/staging/vt6655/mib.h
+++ b/drivers/staging/vt6655/mib.h
@@ -78,7 +78,7 @@ typedef struct tagSMib2Counter {
78 LONG ifType; 78 LONG ifType;
79 LONG ifMtu; 79 LONG ifMtu;
80 DWORD ifSpeed; 80 DWORD ifSpeed;
81 BYTE ifPhysAddress[U_ETHER_ADDR_LEN]; 81 BYTE ifPhysAddress[ETH_ALEN];
82 LONG ifAdminStatus; 82 LONG ifAdminStatus;
83 LONG ifOperStatus; 83 LONG ifOperStatus;
84 DWORD ifLastChange; 84 DWORD ifLastChange;
diff --git a/drivers/staging/vt6655/michael.c b/drivers/staging/vt6655/michael.c
index c930e0cdb853..0bf57efdede0 100644
--- a/drivers/staging/vt6655/michael.c
+++ b/drivers/staging/vt6655/michael.c
@@ -49,12 +49,12 @@
49/*--------------------- Static Functions --------------------------*/ 49/*--------------------- Static Functions --------------------------*/
50/* 50/*
51static DWORD s_dwGetUINT32(BYTE * p); // Get DWORD from 4 bytes LSByte first 51static DWORD s_dwGetUINT32(BYTE * p); // Get DWORD from 4 bytes LSByte first
52static VOID s_vPutUINT32(BYTE* p, DWORD val); // Put DWORD into 4 bytes LSByte first 52static void s_vPutUINT32(BYTE* p, DWORD val); // Put DWORD into 4 bytes LSByte first
53*/ 53*/
54static VOID s_vClear(void); // Clear the internal message, 54static void s_vClear(void); // Clear the internal message,
55 // resets the object to the state just after construction. 55 // resets the object to the state just after construction.
56static VOID s_vSetKey(DWORD dwK0, DWORD dwK1); 56static void s_vSetKey(DWORD dwK0, DWORD dwK1);
57static VOID s_vAppendByte(BYTE b); // Add a single byte to the internal message 57static void s_vAppendByte(BYTE b); // Add a single byte to the internal message
58 58
59/*--------------------- Export Variables --------------------------*/ 59/*--------------------- Export Variables --------------------------*/
60static DWORD L, R; // Current state 60static DWORD L, R; // Current state
@@ -78,7 +78,7 @@ static DWORD s_dwGetUINT32 (BYTE * p)
78 return res; 78 return res;
79} 79}
80 80
81static VOID s_vPutUINT32 (BYTE* p, DWORD val) 81static void s_vPutUINT32 (BYTE* p, DWORD val)
82// Convert from DWORD to BYTE[] in a portable way 82// Convert from DWORD to BYTE[] in a portable way
83{ 83{
84 UINT i; 84 UINT i;
@@ -90,7 +90,7 @@ static VOID s_vPutUINT32 (BYTE* p, DWORD val)
90} 90}
91*/ 91*/
92 92
93static VOID s_vClear (void) 93static void s_vClear (void)
94{ 94{
95 // Reset the state to the empty message. 95 // Reset the state to the empty message.
96 L = K0; 96 L = K0;
@@ -99,7 +99,7 @@ static VOID s_vClear (void)
99 M = 0; 99 M = 0;
100} 100}
101 101
102static VOID s_vSetKey (DWORD dwK0, DWORD dwK1) 102static void s_vSetKey (DWORD dwK0, DWORD dwK1)
103{ 103{
104 // Set the key 104 // Set the key
105 K0 = dwK0; 105 K0 = dwK0;
@@ -108,7 +108,7 @@ static VOID s_vSetKey (DWORD dwK0, DWORD dwK1)
108 s_vClear(); 108 s_vClear();
109} 109}
110 110
111static VOID s_vAppendByte (BYTE b) 111static void s_vAppendByte (BYTE b)
112{ 112{
113 // Append the byte to our word-sized buffer 113 // Append the byte to our word-sized buffer
114 M |= b << (8*nBytesInM); 114 M |= b << (8*nBytesInM);
@@ -131,14 +131,14 @@ static VOID s_vAppendByte (BYTE b)
131 } 131 }
132} 132}
133 133
134VOID MIC_vInit (DWORD dwK0, DWORD dwK1) 134void MIC_vInit (DWORD dwK0, DWORD dwK1)
135{ 135{
136 // Set the key 136 // Set the key
137 s_vSetKey(dwK0, dwK1); 137 s_vSetKey(dwK0, dwK1);
138} 138}
139 139
140 140
141VOID MIC_vUnInit (void) 141void MIC_vUnInit (void)
142{ 142{
143 // Wipe the key material 143 // Wipe the key material
144 K0 = 0; 144 K0 = 0;
@@ -149,7 +149,7 @@ VOID MIC_vUnInit (void)
149 s_vClear(); 149 s_vClear();
150} 150}
151 151
152VOID MIC_vAppend (PBYTE src, UINT nBytes) 152void MIC_vAppend (PBYTE src, UINT nBytes)
153{ 153{
154 // This is simple 154 // This is simple
155 while (nBytes > 0) 155 while (nBytes > 0)
@@ -159,7 +159,7 @@ VOID MIC_vAppend (PBYTE src, UINT nBytes)
159 } 159 }
160} 160}
161 161
162VOID MIC_vGetMIC (PDWORD pdwL, PDWORD pdwR) 162void MIC_vGetMIC (PDWORD pdwL, PDWORD pdwR)
163{ 163{
164 // Append the minimum padding 164 // Append the minimum padding
165 s_vAppendByte(0x5a); 165 s_vAppendByte(0x5a);
diff --git a/drivers/staging/vt6655/michael.h b/drivers/staging/vt6655/michael.h
index 3f79b52832d1..97de77b4da2c 100644
--- a/drivers/staging/vt6655/michael.h
+++ b/drivers/staging/vt6655/michael.h
@@ -35,16 +35,16 @@
35 35
36/*--------------------- Export Types ------------------------------*/ 36/*--------------------- Export Types ------------------------------*/
37 37
38VOID MIC_vInit(DWORD dwK0, DWORD dwK1); 38void MIC_vInit(DWORD dwK0, DWORD dwK1);
39 39
40VOID MIC_vUnInit(void); 40void MIC_vUnInit(void);
41 41
42// Append bytes to the message to be MICed 42// Append bytes to the message to be MICed
43VOID MIC_vAppend(PBYTE src, UINT nBytes); 43void MIC_vAppend(PBYTE src, UINT nBytes);
44 44
45// Get the MIC result. Destination should accept 8 bytes of result. 45// Get the MIC result. Destination should accept 8 bytes of result.
46// This also resets the message to empty. 46// This also resets the message to empty.
47VOID MIC_vGetMIC(PDWORD pdwL, PDWORD pdwR); 47void MIC_vGetMIC(PDWORD pdwL, PDWORD pdwR);
48 48
49/*--------------------- Export Macros ------------------------------*/ 49/*--------------------- Export Macros ------------------------------*/
50 50
diff --git a/drivers/staging/vt6655/power.c b/drivers/staging/vt6655/power.c
index 84eda0455381..64c22c3e4bb3 100644
--- a/drivers/staging/vt6655/power.c
+++ b/drivers/staging/vt6655/power.c
@@ -74,10 +74,10 @@ static int msglevel =MSG_LEVEL_INFO;
74-*/ 74-*/
75 75
76 76
77VOID 77void
78PSvEnablePowerSaving( 78PSvEnablePowerSaving(
79 IN HANDLE hDeviceContext, 79 void *hDeviceContext,
80 IN WORD wListenInterval 80 WORD wListenInterval
81 ) 81 )
82{ 82{
83 PSDevice pDevice = (PSDevice)hDeviceContext; 83 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -118,7 +118,7 @@ PSvEnablePowerSaving(
118 pDevice->bEnablePSMode = TRUE; 118 pDevice->bEnablePSMode = TRUE;
119 119
120 if (pDevice->eOPMode == OP_MODE_ADHOC) { 120 if (pDevice->eOPMode == OP_MODE_ADHOC) {
121// bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt); 121// bMgrPrepareBeaconToSend((void *)pDevice, pMgmt);
122 } 122 }
123 // We don't send null pkt in ad hoc mode since beacon will handle this. 123 // We don't send null pkt in ad hoc mode since beacon will handle this.
124 else if (pDevice->eOPMode == OP_MODE_INFRASTRUCTURE) { 124 else if (pDevice->eOPMode == OP_MODE_INFRASTRUCTURE) {
@@ -144,9 +144,9 @@ PSvEnablePowerSaving(
144 * 144 *
145-*/ 145-*/
146 146
147VOID 147void
148PSvDisablePowerSaving( 148PSvDisablePowerSaving(
149 IN HANDLE hDeviceContext 149 void *hDeviceContext
150 ) 150 )
151{ 151{
152 PSDevice pDevice = (PSDevice)hDeviceContext; 152 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -184,9 +184,9 @@ PSvDisablePowerSaving(
184 184
185BOOL 185BOOL
186PSbConsiderPowerDown( 186PSbConsiderPowerDown(
187 IN HANDLE hDeviceContext, 187 void *hDeviceContext,
188 IN BOOL bCheckRxDMA, 188 BOOL bCheckRxDMA,
189 IN BOOL bCheckCountToWakeUp 189 BOOL bCheckCountToWakeUp
190 ) 190 )
191{ 191{
192 PSDevice pDevice = (PSDevice)hDeviceContext; 192 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -250,9 +250,9 @@ PSbConsiderPowerDown(
250 250
251 251
252 252
253VOID 253void
254PSvSendPSPOLL( 254PSvSendPSPOLL(
255 IN HANDLE hDeviceContext 255 void *hDeviceContext
256 ) 256 )
257{ 257{
258 PSDevice pDevice = (PSDevice)hDeviceContext; 258 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -298,7 +298,7 @@ PSvSendPSPOLL(
298-*/ 298-*/
299BOOL 299BOOL
300PSbSendNullPacket( 300PSbSendNullPacket(
301 IN HANDLE hDeviceContext 301 void *hDeviceContext
302 ) 302 )
303{ 303{
304 PSDevice pDevice = (PSDevice)hDeviceContext; 304 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -384,7 +384,7 @@ PSbSendNullPacket(
384 384
385BOOL 385BOOL
386PSbIsNextTBTTWakeUp( 386PSbIsNextTBTTWakeUp(
387 IN HANDLE hDeviceContext 387 void *hDeviceContext
388 ) 388 )
389{ 389{
390 390
diff --git a/drivers/staging/vt6655/power.h b/drivers/staging/vt6655/power.h
index 30634fabfe96..c0dbe216e977 100644
--- a/drivers/staging/vt6655/power.h
+++ b/drivers/staging/vt6655/power.h
@@ -45,40 +45,40 @@
45 45
46/*--------------------- Export Functions --------------------------*/ 46/*--------------------- Export Functions --------------------------*/
47 47
48// IN PSDevice pDevice 48// PSDevice pDevice
49// IN PSDevice hDeviceContext 49// PSDevice hDeviceContext
50 50
51BOOL 51BOOL
52PSbConsiderPowerDown( 52PSbConsiderPowerDown(
53 IN HANDLE hDeviceContext, 53 void *hDeviceContext,
54 IN BOOL bCheckRxDMA, 54 BOOL bCheckRxDMA,
55 IN BOOL bCheckCountToWakeUp 55 BOOL bCheckCountToWakeUp
56 ); 56 );
57 57
58VOID 58void
59PSvDisablePowerSaving( 59PSvDisablePowerSaving(
60 IN HANDLE hDeviceContext 60 void *hDeviceContext
61 ); 61 );
62 62
63VOID 63void
64PSvEnablePowerSaving( 64PSvEnablePowerSaving(
65 IN HANDLE hDeviceContext, 65 void *hDeviceContext,
66 IN WORD wListenInterval 66 WORD wListenInterval
67 ); 67 );
68 68
69VOID 69void
70PSvSendPSPOLL( 70PSvSendPSPOLL(
71 IN HANDLE hDeviceContext 71 void *hDeviceContext
72 ); 72 );
73 73
74BOOL 74BOOL
75PSbSendNullPacket( 75PSbSendNullPacket(
76 IN HANDLE hDeviceContext 76 void *hDeviceContext
77 ); 77 );
78 78
79BOOL 79BOOL
80PSbIsNextTBTTWakeUp( 80PSbIsNextTBTTWakeUp(
81 IN HANDLE hDeviceContext 81 void *hDeviceContext
82 ); 82 );
83 83
84#endif //__POWER_H__ 84#endif //__POWER_H__
diff --git a/drivers/staging/vt6655/rc4.c b/drivers/staging/vt6655/rc4.c
index e6c61312fd28..4a53f159cb30 100644
--- a/drivers/staging/vt6655/rc4.c
+++ b/drivers/staging/vt6655/rc4.c
@@ -32,7 +32,7 @@
32 32
33#include "rc4.h" 33#include "rc4.h"
34 34
35VOID rc4_init(PRC4Ext pRC4, PBYTE pbyKey, UINT cbKey_len) 35void rc4_init(PRC4Ext pRC4, PBYTE pbyKey, UINT cbKey_len)
36{ 36{
37 UINT ust1, ust2; 37 UINT ust1, ust2;
38 UINT keyindex; 38 UINT keyindex;
@@ -78,7 +78,7 @@ UINT rc4_byte(PRC4Ext pRC4)
78 return pbyst[(ustx + usty) & 0xff]; 78 return pbyst[(ustx + usty) & 0xff];
79} 79}
80 80
81VOID rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest, 81void rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest,
82 PBYTE pbySrc, UINT cbData_len) 82 PBYTE pbySrc, UINT cbData_len)
83{ 83{
84 UINT ii; 84 UINT ii;
diff --git a/drivers/staging/vt6655/rc4.h b/drivers/staging/vt6655/rc4.h
index bf607c9d446a..e65cae69efaf 100644
--- a/drivers/staging/vt6655/rc4.h
+++ b/drivers/staging/vt6655/rc4.h
@@ -40,7 +40,7 @@ typedef struct {
40 BYTE abystate[256]; 40 BYTE abystate[256];
41} RC4Ext, *PRC4Ext; 41} RC4Ext, *PRC4Ext;
42 42
43VOID rc4_init(PRC4Ext pRC4, PBYTE pbyKey, UINT cbKey_len); 43void rc4_init(PRC4Ext pRC4, PBYTE pbyKey, UINT cbKey_len);
44UINT rc4_byte(PRC4Ext pRC4); 44UINT rc4_byte(PRC4Ext pRC4);
45void rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest, PBYTE pbySrc, UINT cbData_len); 45void rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest, PBYTE pbySrc, UINT cbData_len);
46 46
diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c
index 01ab73f1cc3f..7cb86fe2eeb9 100644
--- a/drivers/staging/vt6655/rf.c
+++ b/drivers/staging/vt6655/rf.c
@@ -808,7 +808,7 @@ BOOL RFbAL2230SelectChannel (DWORD_PTR dwIoBase, BYTE byChannel)
808 * 808 *
809 */ 809 */
810BOOL RFbInit ( 810BOOL RFbInit (
811 IN PSDevice pDevice 811 PSDevice pDevice
812 ) 812 )
813{ 813{
814BOOL bResult = TRUE; 814BOOL bResult = TRUE;
@@ -846,7 +846,7 @@ BOOL bResult = TRUE;
846 * 846 *
847 */ 847 */
848BOOL RFbShutDown ( 848BOOL RFbShutDown (
849 IN PSDevice pDevice 849 PSDevice pDevice
850 ) 850 )
851{ 851{
852BOOL bResult = TRUE; 852BOOL bResult = TRUE;
@@ -997,9 +997,9 @@ BOOL RFvWriteWakeProgSyn (DWORD_PTR dwIoBase, BYTE byRFType, UINT uChannel)
997 * 997 *
998 */ 998 */
999BOOL RFbSetPower ( 999BOOL RFbSetPower (
1000 IN PSDevice pDevice, 1000 PSDevice pDevice,
1001 IN UINT uRATE, 1001 UINT uRATE,
1002 IN UINT uCH 1002 UINT uCH
1003 ) 1003 )
1004{ 1004{
1005BOOL bResult = TRUE; 1005BOOL bResult = TRUE;
@@ -1136,9 +1136,9 @@ BYTE byPwrdBm = 0;
1136 */ 1136 */
1137 1137
1138BOOL RFbRawSetPower ( 1138BOOL RFbRawSetPower (
1139 IN PSDevice pDevice, 1139 PSDevice pDevice,
1140 IN BYTE byPwr, 1140 BYTE byPwr,
1141 IN UINT uRATE 1141 UINT uRATE
1142 ) 1142 )
1143{ 1143{
1144BOOL bResult = TRUE; 1144BOOL bResult = TRUE;
@@ -1201,10 +1201,10 @@ DWORD dwMax7230Pwr = 0;
1201 * Return Value: none 1201 * Return Value: none
1202 * 1202 *
1203-*/ 1203-*/
1204VOID 1204void
1205RFvRSSITodBm ( 1205RFvRSSITodBm (
1206 IN PSDevice pDevice, 1206 PSDevice pDevice,
1207 IN BYTE byCurrRSSI, 1207 BYTE byCurrRSSI,
1208 long * pldBm 1208 long * pldBm
1209 ) 1209 )
1210{ 1210{
diff --git a/drivers/staging/vt6655/rf.h b/drivers/staging/vt6655/rf.h
index f316bcced8e8..25dfc7942f67 100644
--- a/drivers/staging/vt6655/rf.h
+++ b/drivers/staging/vt6655/rf.h
@@ -79,20 +79,20 @@
79BOOL IFRFbWriteEmbeded(DWORD_PTR dwIoBase, DWORD dwData); 79BOOL IFRFbWriteEmbeded(DWORD_PTR dwIoBase, DWORD dwData);
80BOOL RFbSelectChannel(DWORD_PTR dwIoBase, BYTE byRFType, BYTE byChannel); 80BOOL RFbSelectChannel(DWORD_PTR dwIoBase, BYTE byRFType, BYTE byChannel);
81BOOL RFbInit ( 81BOOL RFbInit (
82 IN PSDevice pDevice 82 PSDevice pDevice
83 ); 83 );
84BOOL RFvWriteWakeProgSyn(DWORD_PTR dwIoBase, BYTE byRFType, UINT uChannel); 84BOOL RFvWriteWakeProgSyn(DWORD_PTR dwIoBase, BYTE byRFType, UINT uChannel);
85BOOL RFbSetPower(PSDevice pDevice, UINT uRATE, UINT uCH); 85BOOL RFbSetPower(PSDevice pDevice, UINT uRATE, UINT uCH);
86BOOL RFbRawSetPower( 86BOOL RFbRawSetPower(
87 IN PSDevice pDevice, 87 PSDevice pDevice,
88 IN BYTE byPwr, 88 BYTE byPwr,
89 IN UINT uRATE 89 UINT uRATE
90 ); 90 );
91 91
92VOID 92void
93RFvRSSITodBm( 93RFvRSSITodBm(
94 IN PSDevice pDevice, 94 PSDevice pDevice,
95 IN BYTE byCurrRSSI, 95 BYTE byCurrRSSI,
96 long *pldBm 96 long *pldBm
97 ); 97 );
98 98
diff --git a/drivers/staging/vt6655/rxtx.c b/drivers/staging/vt6655/rxtx.c
index 4fcc4351e73f..a0445c3427ea 100644
--- a/drivers/staging/vt6655/rxtx.c
+++ b/drivers/staging/vt6655/rxtx.c
@@ -115,93 +115,93 @@ const WORD wFB_Opt1[2][5] = {
115 115
116 116
117static 117static
118VOID 118void
119s_vFillTxKey( 119s_vFillTxKey(
120 IN PSDevice pDevice, 120 PSDevice pDevice,
121 IN PBYTE pbyBuf, 121 PBYTE pbyBuf,
122 IN PBYTE pbyIVHead, 122 PBYTE pbyIVHead,
123 IN PSKeyItem pTransmitKey, 123 PSKeyItem pTransmitKey,
124 IN PBYTE pbyHdrBuf, 124 PBYTE pbyHdrBuf,
125 IN WORD wPayloadLen, 125 WORD wPayloadLen,
126 OUT PBYTE pMICHDR 126 PBYTE pMICHDR
127 ); 127 );
128 128
129 129
130 130
131static 131static
132VOID 132void
133s_vFillRTSHead( 133s_vFillRTSHead(
134 IN PSDevice pDevice, 134 PSDevice pDevice,
135 IN BYTE byPktType, 135 BYTE byPktType,
136 IN PVOID pvRTS, 136 void * pvRTS,
137 IN UINT cbFrameLength, 137 UINT cbFrameLength,
138 IN BOOL bNeedAck, 138 BOOL bNeedAck,
139 IN BOOL bDisCRC, 139 BOOL bDisCRC,
140 IN PSEthernetHeader psEthHeader, 140 PSEthernetHeader psEthHeader,
141 IN WORD wCurrentRate, 141 WORD wCurrentRate,
142 IN BYTE byFBOption 142 BYTE byFBOption
143 ); 143 );
144 144
145static 145static
146VOID 146void
147s_vGenerateTxParameter( 147s_vGenerateTxParameter(
148 IN PSDevice pDevice, 148 PSDevice pDevice,
149 IN BYTE byPktType, 149 BYTE byPktType,
150 IN PVOID pTxBufHead, 150 void * pTxBufHead,
151 IN PVOID pvRrvTime, 151 void * pvRrvTime,
152 IN PVOID pvRTS, 152 void * pvRTS,
153 IN PVOID pvCTS, 153 void * pvCTS,
154 IN UINT cbFrameSize, 154 UINT cbFrameSize,
155 IN BOOL bNeedACK, 155 BOOL bNeedACK,
156 IN UINT uDMAIdx, 156 UINT uDMAIdx,
157 IN PSEthernetHeader psEthHeader, 157 PSEthernetHeader psEthHeader,
158 IN WORD wCurrentRate 158 WORD wCurrentRate
159 ); 159 );
160 160
161 161
162 162
163static void s_vFillFragParameter( 163static void s_vFillFragParameter(
164 IN PSDevice pDevice, 164 PSDevice pDevice,
165 IN PBYTE pbyBuffer, 165 PBYTE pbyBuffer,
166 IN UINT uTxType, 166 UINT uTxType,
167 IN PVOID pvtdCurr, 167 void * pvtdCurr,
168 IN WORD wFragType, 168 WORD wFragType,
169 IN UINT cbReqCount 169 UINT cbReqCount
170 ); 170 );
171 171
172 172
173static 173static
174UINT 174UINT
175s_cbFillTxBufHead ( 175s_cbFillTxBufHead (
176 IN PSDevice pDevice, 176 PSDevice pDevice,
177 IN BYTE byPktType, 177 BYTE byPktType,
178 IN PBYTE pbyTxBufferAddr, 178 PBYTE pbyTxBufferAddr,
179 IN UINT cbFrameBodySize, 179 UINT cbFrameBodySize,
180 IN UINT uDMAIdx, 180 UINT uDMAIdx,
181 IN PSTxDesc pHeadTD, 181 PSTxDesc pHeadTD,
182 IN PSEthernetHeader psEthHeader, 182 PSEthernetHeader psEthHeader,
183 IN PBYTE pPacket, 183 PBYTE pPacket,
184 IN BOOL bNeedEncrypt, 184 BOOL bNeedEncrypt,
185 IN PSKeyItem pTransmitKey, 185 PSKeyItem pTransmitKey,
186 IN UINT uNodeIndex, 186 UINT uNodeIndex,
187 OUT PUINT puMACfragNum 187 PUINT puMACfragNum
188 ); 188 );
189 189
190 190
191static 191static
192UINT 192UINT
193s_uFillDataHead ( 193s_uFillDataHead (
194 IN PSDevice pDevice, 194 PSDevice pDevice,
195 IN BYTE byPktType, 195 BYTE byPktType,
196 IN PVOID pTxDataHead, 196 void * pTxDataHead,
197 IN UINT cbFrameLength, 197 UINT cbFrameLength,
198 IN UINT uDMAIdx, 198 UINT uDMAIdx,
199 IN BOOL bNeedAck, 199 BOOL bNeedAck,
200 IN UINT uFragIdx, 200 UINT uFragIdx,
201 IN UINT cbLastFragmentSize, 201 UINT cbLastFragmentSize,
202 IN UINT uMACfragNum, 202 UINT uMACfragNum,
203 IN BYTE byFBOption, 203 BYTE byFBOption,
204 IN WORD wCurrentRate 204 WORD wCurrentRate
205 ); 205 );
206 206
207 207
@@ -210,15 +210,15 @@ s_uFillDataHead (
210 210
211 211
212static 212static
213VOID 213void
214s_vFillTxKey ( 214s_vFillTxKey (
215 IN PSDevice pDevice, 215 PSDevice pDevice,
216 IN PBYTE pbyBuf, 216 PBYTE pbyBuf,
217 IN PBYTE pbyIVHead, 217 PBYTE pbyIVHead,
218 IN PSKeyItem pTransmitKey, 218 PSKeyItem pTransmitKey,
219 IN PBYTE pbyHdrBuf, 219 PBYTE pbyHdrBuf,
220 IN WORD wPayloadLen, 220 WORD wPayloadLen,
221 OUT PBYTE pMICHDR 221 PBYTE pMICHDR
222 ) 222 )
223{ 223{
224 PDWORD pdwIV = (PDWORD) pbyIVHead; 224 PDWORD pdwIV = (PDWORD) pbyIVHead;
@@ -328,12 +328,12 @@ s_vFillTxKey (
328 328
329 329
330static 330static
331VOID 331void
332s_vSWencryption ( 332s_vSWencryption (
333 IN PSDevice pDevice, 333 PSDevice pDevice,
334 IN PSKeyItem pTransmitKey, 334 PSKeyItem pTransmitKey,
335 IN PBYTE pbyPayloadHead, 335 PBYTE pbyPayloadHead,
336 IN WORD wPayloadSize 336 WORD wPayloadSize
337 ) 337 )
338{ 338{
339 UINT cbICVlen = 4; 339 UINT cbICVlen = 4;
@@ -379,11 +379,11 @@ s_vSWencryption (
379static 379static
380UINT 380UINT
381s_uGetTxRsvTime ( 381s_uGetTxRsvTime (
382 IN PSDevice pDevice, 382 PSDevice pDevice,
383 IN BYTE byPktType, 383 BYTE byPktType,
384 IN UINT cbFrameLength, 384 UINT cbFrameLength,
385 IN WORD wRate, 385 WORD wRate,
386 IN BOOL bNeedAck 386 BOOL bNeedAck
387 ) 387 )
388{ 388{
389 UINT uDataTime, uAckTime; 389 UINT uDataTime, uAckTime;
@@ -410,11 +410,11 @@ s_uGetTxRsvTime (
410static 410static
411UINT 411UINT
412s_uGetRTSCTSRsvTime ( 412s_uGetRTSCTSRsvTime (
413 IN PSDevice pDevice, 413 PSDevice pDevice,
414 IN BYTE byRTSRsvType, 414 BYTE byRTSRsvType,
415 IN BYTE byPktType, 415 BYTE byPktType,
416 IN UINT cbFrameLength, 416 UINT cbFrameLength,
417 IN WORD wCurrentRate 417 WORD wCurrentRate
418 ) 418 )
419{ 419{
420 UINT uRrvTime , uRTSTime, uCTSTime, uAckTime, uDataTime; 420 UINT uRrvTime , uRTSTime, uCTSTime, uAckTime, uDataTime;
@@ -452,16 +452,16 @@ s_uGetRTSCTSRsvTime (
452static 452static
453UINT 453UINT
454s_uGetDataDuration ( 454s_uGetDataDuration (
455 IN PSDevice pDevice, 455 PSDevice pDevice,
456 IN BYTE byDurType, 456 BYTE byDurType,
457 IN UINT cbFrameLength, 457 UINT cbFrameLength,
458 IN BYTE byPktType, 458 BYTE byPktType,
459 IN WORD wRate, 459 WORD wRate,
460 IN BOOL bNeedAck, 460 BOOL bNeedAck,
461 IN UINT uFragIdx, 461 UINT uFragIdx,
462 IN UINT cbLastFragmentSize, 462 UINT cbLastFragmentSize,
463 IN UINT uMACfragNum, 463 UINT uMACfragNum,
464 IN BYTE byFBOption 464 BYTE byFBOption
465 ) 465 )
466{ 466{
467 BOOL bLastFrag = 0; 467 BOOL bLastFrag = 0;
@@ -623,13 +623,13 @@ s_uGetDataDuration (
623static 623static
624UINT 624UINT
625s_uGetRTSCTSDuration ( 625s_uGetRTSCTSDuration (
626 IN PSDevice pDevice, 626 PSDevice pDevice,
627 IN BYTE byDurType, 627 BYTE byDurType,
628 IN UINT cbFrameLength, 628 UINT cbFrameLength,
629 IN BYTE byPktType, 629 BYTE byPktType,
630 IN WORD wRate, 630 WORD wRate,
631 IN BOOL bNeedAck, 631 BOOL bNeedAck,
632 IN BYTE byFBOption 632 BYTE byFBOption
633 ) 633 )
634{ 634{
635 UINT uCTSTime = 0, uDurTime = 0; 635 UINT uCTSTime = 0, uDurTime = 0;
@@ -721,17 +721,17 @@ s_uGetRTSCTSDuration (
721static 721static
722UINT 722UINT
723s_uFillDataHead ( 723s_uFillDataHead (
724 IN PSDevice pDevice, 724 PSDevice pDevice,
725 IN BYTE byPktType, 725 BYTE byPktType,
726 IN PVOID pTxDataHead, 726 void * pTxDataHead,
727 IN UINT cbFrameLength, 727 UINT cbFrameLength,
728 IN UINT uDMAIdx, 728 UINT uDMAIdx,
729 IN BOOL bNeedAck, 729 BOOL bNeedAck,
730 IN UINT uFragIdx, 730 UINT uFragIdx,
731 IN UINT cbLastFragmentSize, 731 UINT cbLastFragmentSize,
732 IN UINT uMACfragNum, 732 UINT uMACfragNum,
733 IN BYTE byFBOption, 733 BYTE byFBOption,
734 IN WORD wCurrentRate 734 WORD wCurrentRate
735 ) 735 )
736{ 736{
737 WORD wLen = 0x0000; 737 WORD wLen = 0x0000;
@@ -851,17 +851,17 @@ s_uFillDataHead (
851 851
852 852
853static 853static
854VOID 854void
855s_vFillRTSHead ( 855s_vFillRTSHead (
856 IN PSDevice pDevice, 856 PSDevice pDevice,
857 IN BYTE byPktType, 857 BYTE byPktType,
858 IN PVOID pvRTS, 858 void * pvRTS,
859 IN UINT cbFrameLength, 859 UINT cbFrameLength,
860 IN BOOL bNeedAck, 860 BOOL bNeedAck,
861 IN BOOL bDisCRC, 861 BOOL bDisCRC,
862 IN PSEthernetHeader psEthHeader, 862 PSEthernetHeader psEthHeader,
863 IN WORD wCurrentRate, 863 WORD wCurrentRate,
864 IN BYTE byFBOption 864 BYTE byFBOption
865 ) 865 )
866{ 866{
867 UINT uRTSFrameLen = 20; 867 UINT uRTSFrameLen = 20;
@@ -900,16 +900,16 @@ s_vFillRTSHead (
900 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4 900 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4
901 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 901 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
902 (pDevice->eOPMode == OP_MODE_AP)) { 902 (pDevice->eOPMode == OP_MODE_AP)) {
903 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 903 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
904 } 904 }
905 else { 905 else {
906 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 906 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
907 } 907 }
908 if (pDevice->eOPMode == OP_MODE_AP) { 908 if (pDevice->eOPMode == OP_MODE_AP) {
909 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 909 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
910 } 910 }
911 else { 911 else {
912 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 912 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
913 } 913 }
914 } 914 }
915 else { 915 else {
@@ -938,17 +938,17 @@ s_vFillRTSHead (
938 938
939 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 939 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
940 (pDevice->eOPMode == OP_MODE_AP)) { 940 (pDevice->eOPMode == OP_MODE_AP)) {
941 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 941 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
942 } 942 }
943 else { 943 else {
944 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 944 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
945 } 945 }
946 946
947 if (pDevice->eOPMode == OP_MODE_AP) { 947 if (pDevice->eOPMode == OP_MODE_AP) {
948 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 948 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
949 } 949 }
950 else { 950 else {
951 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 951 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
952 } 952 }
953 953
954 } // if (byFBOption == AUTO_FB_NONE) 954 } // if (byFBOption == AUTO_FB_NONE)
@@ -969,17 +969,17 @@ s_vFillRTSHead (
969 969
970 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 970 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
971 (pDevice->eOPMode == OP_MODE_AP)) { 971 (pDevice->eOPMode == OP_MODE_AP)) {
972 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 972 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
973 } 973 }
974 else { 974 else {
975 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 975 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
976 } 976 }
977 977
978 if (pDevice->eOPMode == OP_MODE_AP) { 978 if (pDevice->eOPMode == OP_MODE_AP) {
979 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 979 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
980 } 980 }
981 else { 981 else {
982 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 982 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
983 } 983 }
984 984
985 } 985 }
@@ -1000,16 +1000,16 @@ s_vFillRTSHead (
1000 1000
1001 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 1001 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1002 (pDevice->eOPMode == OP_MODE_AP)) { 1002 (pDevice->eOPMode == OP_MODE_AP)) {
1003 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1003 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
1004 } 1004 }
1005 else { 1005 else {
1006 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1006 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
1007 } 1007 }
1008 if (pDevice->eOPMode == OP_MODE_AP) { 1008 if (pDevice->eOPMode == OP_MODE_AP) {
1009 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1009 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
1010 } 1010 }
1011 else { 1011 else {
1012 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1012 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
1013 } 1013 }
1014 } 1014 }
1015 } 1015 }
@@ -1029,33 +1029,33 @@ s_vFillRTSHead (
1029 1029
1030 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 1030 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1031 (pDevice->eOPMode == OP_MODE_AP)) { 1031 (pDevice->eOPMode == OP_MODE_AP)) {
1032 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1032 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
1033 } 1033 }
1034 else { 1034 else {
1035 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1035 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
1036 } 1036 }
1037 1037
1038 if (pDevice->eOPMode == OP_MODE_AP) { 1038 if (pDevice->eOPMode == OP_MODE_AP) {
1039 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1039 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
1040 } 1040 }
1041 else { 1041 else {
1042 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1042 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
1043 } 1043 }
1044 } 1044 }
1045} 1045}
1046 1046
1047static 1047static
1048VOID 1048void
1049s_vFillCTSHead ( 1049s_vFillCTSHead (
1050 IN PSDevice pDevice, 1050 PSDevice pDevice,
1051 IN UINT uDMAIdx, 1051 UINT uDMAIdx,
1052 IN BYTE byPktType, 1052 BYTE byPktType,
1053 IN PVOID pvCTS, 1053 void * pvCTS,
1054 IN UINT cbFrameLength, 1054 UINT cbFrameLength,
1055 IN BOOL bNeedAck, 1055 BOOL bNeedAck,
1056 IN BOOL bDisCRC, 1056 BOOL bDisCRC,
1057 IN WORD wCurrentRate, 1057 WORD wCurrentRate,
1058 IN BYTE byFBOption 1058 BYTE byFBOption
1059 ) 1059 )
1060{ 1060{
1061 UINT uCTSFrameLen = 14; 1061 UINT uCTSFrameLen = 14;
@@ -1098,7 +1098,7 @@ s_vFillCTSHead (
1098 pBuf->Data.wDurationID = pBuf->wDuration_ba; 1098 pBuf->Data.wDurationID = pBuf->wDuration_ba;
1099 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4 1099 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4
1100 pBuf->Data.wReserved = 0x0000; 1100 pBuf->Data.wReserved = 0x0000;
1101 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyCurrentNetAddr[0]), U_ETHER_ADDR_LEN); 1101 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyCurrentNetAddr[0]), ETH_ALEN);
1102 1102
1103 } else { //if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA) 1103 } else { //if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA)
1104 PSCTS pBuf = (PSCTS)pvCTS; 1104 PSCTS pBuf = (PSCTS)pvCTS;
@@ -1116,7 +1116,7 @@ s_vFillCTSHead (
1116 pBuf->Data.wDurationID = pBuf->wDuration_ba; 1116 pBuf->Data.wDurationID = pBuf->wDuration_ba;
1117 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4 1117 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4
1118 pBuf->Data.wReserved = 0x0000; 1118 pBuf->Data.wReserved = 0x0000;
1119 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyCurrentNetAddr[0]), U_ETHER_ADDR_LEN); 1119 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyCurrentNetAddr[0]), ETH_ALEN);
1120 } 1120 }
1121 } 1121 }
1122} 1122}
@@ -1150,19 +1150,19 @@ s_vFillCTSHead (
1150-*/ 1150-*/
1151// UINT cbFrameSize,//Hdr+Payload+FCS 1151// UINT cbFrameSize,//Hdr+Payload+FCS
1152static 1152static
1153VOID 1153void
1154s_vGenerateTxParameter ( 1154s_vGenerateTxParameter (
1155 IN PSDevice pDevice, 1155 PSDevice pDevice,
1156 IN BYTE byPktType, 1156 BYTE byPktType,
1157 IN PVOID pTxBufHead, 1157 void * pTxBufHead,
1158 IN PVOID pvRrvTime, 1158 void * pvRrvTime,
1159 IN PVOID pvRTS, 1159 void * pvRTS,
1160 IN PVOID pvCTS, 1160 void * pvCTS,
1161 IN UINT cbFrameSize, 1161 UINT cbFrameSize,
1162 IN BOOL bNeedACK, 1162 BOOL bNeedACK,
1163 IN UINT uDMAIdx, 1163 UINT uDMAIdx,
1164 IN PSEthernetHeader psEthHeader, 1164 PSEthernetHeader psEthHeader,
1165 IN WORD wCurrentRate 1165 WORD wCurrentRate
1166 ) 1166 )
1167{ 1167{
1168 UINT cbMACHdLen = WLAN_HDR_ADDR3_LEN; //24 1168 UINT cbMACHdLen = WLAN_HDR_ADDR3_LEN; //24
@@ -1268,14 +1268,14 @@ s_vGenerateTxParameter (
1268 UINT cbFragmentSize,//Hdr+payoad+FCS 1268 UINT cbFragmentSize,//Hdr+payoad+FCS
1269*/ 1269*/
1270static 1270static
1271VOID 1271void
1272s_vFillFragParameter( 1272s_vFillFragParameter(
1273 IN PSDevice pDevice, 1273 PSDevice pDevice,
1274 IN PBYTE pbyBuffer, 1274 PBYTE pbyBuffer,
1275 IN UINT uTxType, 1275 UINT uTxType,
1276 IN PVOID pvtdCurr, 1276 void * pvtdCurr,
1277 IN WORD wFragType, 1277 WORD wFragType,
1278 IN UINT cbReqCount 1278 UINT cbReqCount
1279 ) 1279 )
1280{ 1280{
1281 PSTxBufHead pTxBufHead = (PSTxBufHead) pbyBuffer; 1281 PSTxBufHead pTxBufHead = (PSTxBufHead) pbyBuffer;
@@ -1318,18 +1318,18 @@ s_vFillFragParameter(
1318static 1318static
1319UINT 1319UINT
1320s_cbFillTxBufHead ( 1320s_cbFillTxBufHead (
1321 IN PSDevice pDevice, 1321 PSDevice pDevice,
1322 IN BYTE byPktType, 1322 BYTE byPktType,
1323 IN PBYTE pbyTxBufferAddr, 1323 PBYTE pbyTxBufferAddr,
1324 IN UINT cbFrameBodySize, 1324 UINT cbFrameBodySize,
1325 IN UINT uDMAIdx, 1325 UINT uDMAIdx,
1326 IN PSTxDesc pHeadTD, 1326 PSTxDesc pHeadTD,
1327 IN PSEthernetHeader psEthHeader, 1327 PSEthernetHeader psEthHeader,
1328 IN PBYTE pPacket, 1328 PBYTE pPacket,
1329 IN BOOL bNeedEncrypt, 1329 BOOL bNeedEncrypt,
1330 IN PSKeyItem pTransmitKey, 1330 PSKeyItem pTransmitKey,
1331 IN UINT uNodeIndex, 1331 UINT uNodeIndex,
1332 OUT PUINT puMACfragNum 1332 PUINT puMACfragNum
1333 ) 1333 )
1334{ 1334{
1335 UINT cbMACHdLen; 1335 UINT cbMACHdLen;
@@ -1376,11 +1376,11 @@ s_cbFillTxBufHead (
1376 PSTxBufHead psTxBufHd = (PSTxBufHead) pbyTxBufferAddr; 1376 PSTxBufHead psTxBufHd = (PSTxBufHead) pbyTxBufferAddr;
1377// UINT tmpDescIdx; 1377// UINT tmpDescIdx;
1378 UINT cbHeaderLength = 0; 1378 UINT cbHeaderLength = 0;
1379 PVOID pvRrvTime; 1379 void * pvRrvTime;
1380 PSMICHDRHead pMICHDR; 1380 PSMICHDRHead pMICHDR;
1381 PVOID pvRTS; 1381 void * pvRTS;
1382 PVOID pvCTS; 1382 void * pvCTS;
1383 PVOID pvTxDataHd; 1383 void * pvTxDataHd;
1384 WORD wTxBufSize; // FFinfo size 1384 WORD wTxBufSize; // FFinfo size
1385 UINT uTotalCopyLength = 0; 1385 UINT uTotalCopyLength = 0;
1386 BYTE byFBOption = AUTO_FB_NONE; 1386 BYTE byFBOption = AUTO_FB_NONE;
@@ -1544,7 +1544,7 @@ s_cbFillTxBufHead (
1544 } 1544 }
1545 } // Auto Fall Back 1545 } // Auto Fall Back
1546 } 1546 }
1547 memset((PVOID)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderLength - wTxBufSize)); 1547 memset((void *)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderLength - wTxBufSize));
1548 1548
1549////////////////////////////////////////////////////////////////// 1549//////////////////////////////////////////////////////////////////
1550 if ((bNeedEncrypt == TRUE) && (pTransmitKey != NULL) && (pTransmitKey->byCipherSuite == KEY_CTL_TKIP)) { 1550 if ((bNeedEncrypt == TRUE) && (pTransmitKey != NULL) && (pTransmitKey->byCipherSuite == KEY_CTL_TKIP)) {
@@ -1600,7 +1600,7 @@ s_cbFillTxBufHead (
1600 1600
1601 1601
1602 //Fill FIFO,RrvTime,RTS,and CTS 1602 //Fill FIFO,RrvTime,RTS,and CTS
1603 s_vGenerateTxParameter(pDevice, byPktType, (PVOID)psTxBufHd, pvRrvTime, pvRTS, pvCTS, 1603 s_vGenerateTxParameter(pDevice, byPktType, (void *)psTxBufHd, pvRrvTime, pvRTS, pvCTS,
1604 cbFragmentSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate); 1604 cbFragmentSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate);
1605 //Fill DataHead 1605 //Fill DataHead
1606 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbFragmentSize, uDMAIdx, bNeedACK, 1606 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbFragmentSize, uDMAIdx, bNeedACK,
@@ -1622,7 +1622,7 @@ s_cbFillTxBufHead (
1622 1622
1623 1623
1624 // 802.1H 1624 // 802.1H
1625 if (ntohs(psEthHeader->wType) > MAX_DATA_LEN) { 1625 if (ntohs(psEthHeader->wType) > ETH_DATA_LEN) {
1626 if ((psEthHeader->wType == TYPE_PKT_IPX) || 1626 if ((psEthHeader->wType == TYPE_PKT_IPX) ||
1627 (psEthHeader->wType == cpu_to_le16(0xF380))) { 1627 (psEthHeader->wType == cpu_to_le16(0xF380))) {
1628 memcpy((PBYTE) (pbyPayloadHead), &pDevice->abySNAP_Bridgetunnel[0], 6); 1628 memcpy((PBYTE) (pbyPayloadHead), &pDevice->abySNAP_Bridgetunnel[0], 6);
@@ -1643,7 +1643,7 @@ s_cbFillTxBufHead (
1643 //if (pDevice->bAES) { 1643 //if (pDevice->bAES) {
1644 // s_vFillMICHDR(pDevice, (PBYTE)pMICHDR, pbyMacHdr, (WORD)cbFragPayloadSize); 1644 // s_vFillMICHDR(pDevice, (PBYTE)pMICHDR, pbyMacHdr, (WORD)cbFragPayloadSize);
1645 //} 1645 //}
1646 //cbReqCount += s_uDoEncryption(pDevice, psEthHeader, (PVOID)psTxBufHd, byKeySel, 1646 //cbReqCount += s_uDoEncryption(pDevice, psEthHeader, (void *)psTxBufHd, byKeySel,
1647 // pbyPayloadHead, (WORD)cbFragPayloadSize, uDMAIdx); 1647 // pbyPayloadHead, (WORD)cbFragPayloadSize, uDMAIdx);
1648 1648
1649 1649
@@ -1653,7 +1653,7 @@ s_cbFillTxBufHead (
1653 1653
1654 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen + cb802_1_H_len; 1654 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen + cb802_1_H_len;
1655 //copy TxBufferHeader + MacHeader to desc 1655 //copy TxBufferHeader + MacHeader to desc
1656 memcpy(pbyBuffer, (PVOID)psTxBufHd, uLength); 1656 memcpy(pbyBuffer, (void *)psTxBufHd, uLength);
1657 1657
1658 // Copy the Packet into a tx Buffer 1658 // Copy the Packet into a tx Buffer
1659 memcpy((pbyBuffer + uLength), (pPacket + 14), (cbFragPayloadSize - cb802_1_H_len)); 1659 memcpy((pbyBuffer + uLength), (pPacket + 14), (cbFragPayloadSize - cb802_1_H_len));
@@ -1685,7 +1685,7 @@ s_cbFillTxBufHead (
1685 //4.Set Sequence Control 1685 //4.Set Sequence Control
1686 //5.Get S/W generate FCS 1686 //5.Get S/W generate FCS
1687 //-------------------- 1687 //--------------------
1688 s_vFillFragParameter(pDevice, pbyBuffer, uDMAIdx, (PVOID)ptdCurr, wFragType, cbReqCount); 1688 s_vFillFragParameter(pDevice, pbyBuffer, uDMAIdx, (void *)ptdCurr, wFragType, cbReqCount);
1689 1689
1690 ptdCurr->pTDInfo->dwReqCount = cbReqCount - uPadding; 1690 ptdCurr->pTDInfo->dwReqCount = cbReqCount - uPadding;
1691 ptdCurr->pTDInfo->dwHeaderLength = cbHeaderLength; 1691 ptdCurr->pTDInfo->dwHeaderLength = cbHeaderLength;
@@ -1704,7 +1704,7 @@ s_cbFillTxBufHead (
1704 wFragType = FRAGCTL_ENDFRAG; 1704 wFragType = FRAGCTL_ENDFRAG;
1705 1705
1706 //Fill FIFO,RrvTime,RTS,and CTS 1706 //Fill FIFO,RrvTime,RTS,and CTS
1707 s_vGenerateTxParameter(pDevice, byPktType, (PVOID)psTxBufHd, pvRrvTime, pvRTS, pvCTS, 1707 s_vGenerateTxParameter(pDevice, byPktType, (void *)psTxBufHd, pvRrvTime, pvRTS, pvCTS,
1708 cbLastFragmentSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate); 1708 cbLastFragmentSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate);
1709 //Fill DataHead 1709 //Fill DataHead
1710 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbLastFragmentSize, uDMAIdx, bNeedACK, 1710 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbLastFragmentSize, uDMAIdx, bNeedACK,
@@ -1740,7 +1740,7 @@ s_cbFillTxBufHead (
1740 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen; 1740 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen;
1741 1741
1742 //copy TxBufferHeader + MacHeader to desc 1742 //copy TxBufferHeader + MacHeader to desc
1743 memcpy(pbyBuffer, (PVOID)psTxBufHd, uLength); 1743 memcpy(pbyBuffer, (void *)psTxBufHd, uLength);
1744 1744
1745 // Copy the Packet into a tx Buffer 1745 // Copy the Packet into a tx Buffer
1746 if (bMIC2Frag == FALSE) { 1746 if (bMIC2Frag == FALSE) {
@@ -1814,7 +1814,7 @@ s_cbFillTxBufHead (
1814 //-------------------- 1814 //--------------------
1815 1815
1816 1816
1817 s_vFillFragParameter(pDevice, pbyBuffer, uDMAIdx, (PVOID)ptdCurr, wFragType, cbReqCount); 1817 s_vFillFragParameter(pDevice, pbyBuffer, uDMAIdx, (void *)ptdCurr, wFragType, cbReqCount);
1818 1818
1819 ptdCurr->pTDInfo->dwReqCount = cbReqCount - uPadding; 1819 ptdCurr->pTDInfo->dwReqCount = cbReqCount - uPadding;
1820 ptdCurr->pTDInfo->dwHeaderLength = cbHeaderLength; 1820 ptdCurr->pTDInfo->dwHeaderLength = cbHeaderLength;
@@ -1834,7 +1834,7 @@ s_cbFillTxBufHead (
1834 wFragType = FRAGCTL_MIDFRAG; 1834 wFragType = FRAGCTL_MIDFRAG;
1835 1835
1836 //Fill FIFO,RrvTime,RTS,and CTS 1836 //Fill FIFO,RrvTime,RTS,and CTS
1837 s_vGenerateTxParameter(pDevice, byPktType, (PVOID)psTxBufHd, pvRrvTime, pvRTS, pvCTS, 1837 s_vGenerateTxParameter(pDevice, byPktType, (void *)psTxBufHd, pvRrvTime, pvRTS, pvCTS,
1838 cbFragmentSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate); 1838 cbFragmentSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate);
1839 //Fill DataHead 1839 //Fill DataHead
1840 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbFragmentSize, uDMAIdx, bNeedACK, 1840 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbFragmentSize, uDMAIdx, bNeedACK,
@@ -1864,7 +1864,7 @@ s_cbFillTxBufHead (
1864 //if (pDevice->bAES) { 1864 //if (pDevice->bAES) {
1865 // s_vFillMICHDR(pDevice, (PBYTE)pMICHDR, pbyMacHdr, (WORD)cbFragPayloadSize); 1865 // s_vFillMICHDR(pDevice, (PBYTE)pMICHDR, pbyMacHdr, (WORD)cbFragPayloadSize);
1866 //} 1866 //}
1867 //cbReqCount += s_uDoEncryption(pDevice, psEthHeader, (PVOID)psTxBufHd, byKeySel, 1867 //cbReqCount += s_uDoEncryption(pDevice, psEthHeader, (void *)psTxBufHd, byKeySel,
1868 // pbyPayloadHead, (WORD)cbFragPayloadSize, uDMAIdx); 1868 // pbyPayloadHead, (WORD)cbFragPayloadSize, uDMAIdx);
1869 1869
1870 1870
@@ -1875,7 +1875,7 @@ s_cbFillTxBufHead (
1875 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen; 1875 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen;
1876 1876
1877 //copy TxBufferHeader + MacHeader to desc 1877 //copy TxBufferHeader + MacHeader to desc
1878 memcpy(pbyBuffer, (PVOID)psTxBufHd, uLength); 1878 memcpy(pbyBuffer, (void *)psTxBufHd, uLength);
1879 1879
1880 // Copy the Packet into a tx Buffer 1880 // Copy the Packet into a tx Buffer
1881 memcpy((pbyBuffer + uLength), 1881 memcpy((pbyBuffer + uLength),
@@ -1941,7 +1941,7 @@ s_cbFillTxBufHead (
1941 //5.Get S/W generate FCS 1941 //5.Get S/W generate FCS
1942 //-------------------- 1942 //--------------------
1943 1943
1944 s_vFillFragParameter(pDevice, pbyBuffer, uDMAIdx, (PVOID)ptdCurr, wFragType, cbReqCount); 1944 s_vFillFragParameter(pDevice, pbyBuffer, uDMAIdx, (void *)ptdCurr, wFragType, cbReqCount);
1945 1945
1946 ptdCurr->pTDInfo->dwReqCount = cbReqCount - uPadding; 1946 ptdCurr->pTDInfo->dwReqCount = cbReqCount - uPadding;
1947 ptdCurr->pTDInfo->dwHeaderLength = cbHeaderLength; 1947 ptdCurr->pTDInfo->dwHeaderLength = cbHeaderLength;
@@ -1964,7 +1964,7 @@ s_cbFillTxBufHead (
1964 psTxBufHd->wFragCtl |= (WORD)wFragType; 1964 psTxBufHd->wFragCtl |= (WORD)wFragType;
1965 1965
1966 //Fill FIFO,RrvTime,RTS,and CTS 1966 //Fill FIFO,RrvTime,RTS,and CTS
1967 s_vGenerateTxParameter(pDevice, byPktType, (PVOID)psTxBufHd, pvRrvTime, pvRTS, pvCTS, 1967 s_vGenerateTxParameter(pDevice, byPktType, (void *)psTxBufHd, pvRrvTime, pvRTS, pvCTS,
1968 cbFrameSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate); 1968 cbFrameSize, bNeedACK, uDMAIdx, psEthHeader, pDevice->wCurrentRate);
1969 //Fill DataHead 1969 //Fill DataHead
1970 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbFrameSize, uDMAIdx, bNeedACK, 1970 uDuration = s_uFillDataHead(pDevice, byPktType, pvTxDataHd, cbFrameSize, uDMAIdx, bNeedACK,
@@ -1986,7 +1986,7 @@ s_cbFillTxBufHead (
1986 } 1986 }
1987 1987
1988 // 802.1H 1988 // 802.1H
1989 if (ntohs(psEthHeader->wType) > MAX_DATA_LEN) { 1989 if (ntohs(psEthHeader->wType) > ETH_DATA_LEN) {
1990 if ((psEthHeader->wType == TYPE_PKT_IPX) || 1990 if ((psEthHeader->wType == TYPE_PKT_IPX) ||
1991 (psEthHeader->wType == cpu_to_le16(0xF380))) { 1991 (psEthHeader->wType == cpu_to_le16(0xF380))) {
1992 memcpy((PBYTE) (pbyPayloadHead), &pDevice->abySNAP_Bridgetunnel[0], 6); 1992 memcpy((PBYTE) (pbyPayloadHead), &pDevice->abySNAP_Bridgetunnel[0], 6);
@@ -2015,7 +2015,7 @@ s_cbFillTxBufHead (
2015 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen + cb802_1_H_len; 2015 uLength = cbHeaderLength + cbMACHdLen + uPadding + cbIVlen + cb802_1_H_len;
2016 2016
2017 //copy TxBufferHeader + MacHeader to desc 2017 //copy TxBufferHeader + MacHeader to desc
2018 memcpy(pbyBuffer, (PVOID)psTxBufHd, uLength); 2018 memcpy(pbyBuffer, (void *)psTxBufHd, uLength);
2019 2019
2020 // Copy the Packet into a tx Buffer 2020 // Copy the Packet into a tx Buffer
2021 memcpy((pbyBuffer + uLength), 2021 memcpy((pbyBuffer + uLength),
@@ -2093,21 +2093,21 @@ s_cbFillTxBufHead (
2093} 2093}
2094 2094
2095 2095
2096VOID 2096void
2097vGenerateFIFOHeader ( 2097vGenerateFIFOHeader (
2098 IN PSDevice pDevice, 2098 PSDevice pDevice,
2099 IN BYTE byPktType, 2099 BYTE byPktType,
2100 IN PBYTE pbyTxBufferAddr, 2100 PBYTE pbyTxBufferAddr,
2101 IN BOOL bNeedEncrypt, 2101 BOOL bNeedEncrypt,
2102 IN UINT cbPayloadSize, 2102 UINT cbPayloadSize,
2103 IN UINT uDMAIdx, 2103 UINT uDMAIdx,
2104 IN PSTxDesc pHeadTD, 2104 PSTxDesc pHeadTD,
2105 IN PSEthernetHeader psEthHeader, 2105 PSEthernetHeader psEthHeader,
2106 IN PBYTE pPacket, 2106 PBYTE pPacket,
2107 IN PSKeyItem pTransmitKey, 2107 PSKeyItem pTransmitKey,
2108 IN UINT uNodeIndex, 2108 UINT uNodeIndex,
2109 OUT PUINT puMACfragNum, 2109 PUINT puMACfragNum,
2110 OUT PUINT pcbHeaderSize 2110 PUINT pcbHeaderSize
2111 ) 2111 )
2112{ 2112{
2113 UINT wTxBufSize; // FFinfo size 2113 UINT wTxBufSize; // FFinfo size
@@ -2264,16 +2264,16 @@ vGenerateFIFOHeader (
2264 * 2264 *
2265-*/ 2265-*/
2266 2266
2267VOID 2267void
2268vGenerateMACHeader ( 2268vGenerateMACHeader (
2269 IN PSDevice pDevice, 2269 PSDevice pDevice,
2270 IN PBYTE pbyBufferAddr, 2270 PBYTE pbyBufferAddr,
2271 IN WORD wDuration, 2271 WORD wDuration,
2272 IN PSEthernetHeader psEthHeader, 2272 PSEthernetHeader psEthHeader,
2273 IN BOOL bNeedEncrypt, 2273 BOOL bNeedEncrypt,
2274 IN WORD wFragType, 2274 WORD wFragType,
2275 IN UINT uDMAIdx, 2275 UINT uDMAIdx,
2276 IN UINT uFragIdx 2276 UINT uFragIdx
2277 ) 2277 )
2278{ 2278{
2279 PS802_11Header pMACHeader = (PS802_11Header)pbyBufferAddr; 2279 PS802_11Header pMACHeader = (PS802_11Header)pbyBufferAddr;
@@ -2287,21 +2287,21 @@ vGenerateMACHeader (
2287 } 2287 }
2288 2288
2289 if (pDevice->eOPMode == OP_MODE_AP) { 2289 if (pDevice->eOPMode == OP_MODE_AP) {
2290 memcpy(&(pMACHeader->abyAddr1[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 2290 memcpy(&(pMACHeader->abyAddr1[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
2291 memcpy(&(pMACHeader->abyAddr2[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 2291 memcpy(&(pMACHeader->abyAddr2[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
2292 memcpy(&(pMACHeader->abyAddr3[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 2292 memcpy(&(pMACHeader->abyAddr3[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
2293 pMACHeader->wFrameCtl |= FC_FROMDS; 2293 pMACHeader->wFrameCtl |= FC_FROMDS;
2294 } 2294 }
2295 else { 2295 else {
2296 if (pDevice->eOPMode == OP_MODE_ADHOC) { 2296 if (pDevice->eOPMode == OP_MODE_ADHOC) {
2297 memcpy(&(pMACHeader->abyAddr1[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 2297 memcpy(&(pMACHeader->abyAddr1[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
2298 memcpy(&(pMACHeader->abyAddr2[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 2298 memcpy(&(pMACHeader->abyAddr2[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
2299 memcpy(&(pMACHeader->abyAddr3[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 2299 memcpy(&(pMACHeader->abyAddr3[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
2300 } 2300 }
2301 else { 2301 else {
2302 memcpy(&(pMACHeader->abyAddr3[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 2302 memcpy(&(pMACHeader->abyAddr3[0]), &(psEthHeader->abyDstAddr[0]), ETH_ALEN);
2303 memcpy(&(pMACHeader->abyAddr2[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 2303 memcpy(&(pMACHeader->abyAddr2[0]), &(psEthHeader->abySrcAddr[0]), ETH_ALEN);
2304 memcpy(&(pMACHeader->abyAddr1[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 2304 memcpy(&(pMACHeader->abyAddr1[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
2305 pMACHeader->wFrameCtl |= FC_TODS; 2305 pMACHeader->wFrameCtl |= FC_TODS;
2306 } 2306 }
2307 } 2307 }
@@ -2342,9 +2342,9 @@ CMD_STATUS csMgmt_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket) {
2342 PSTxDesc pFrstTD; 2342 PSTxDesc pFrstTD;
2343 BYTE byPktType; 2343 BYTE byPktType;
2344 PBYTE pbyTxBufferAddr; 2344 PBYTE pbyTxBufferAddr;
2345 PVOID pvRTS; 2345 void * pvRTS;
2346 PSCTS pCTS; 2346 PSCTS pCTS;
2347 PVOID pvTxDataHd; 2347 void * pvTxDataHd;
2348 UINT uDuration; 2348 UINT uDuration;
2349 UINT cbReqCount; 2349 UINT cbReqCount;
2350 PS802_11Header pMACHeader; 2350 PS802_11Header pMACHeader;
@@ -2362,8 +2362,8 @@ CMD_STATUS csMgmt_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket) {
2362 WORD wTxBufSize; 2362 WORD wTxBufSize;
2363 UINT cbMacHdLen; 2363 UINT cbMacHdLen;
2364 SEthernetHeader sEthHeader; 2364 SEthernetHeader sEthHeader;
2365 PVOID pvRrvTime; 2365 void * pvRrvTime;
2366 PVOID pMICHDR; 2366 void * pMICHDR;
2367 PSMgmtObject pMgmt = pDevice->pMgmt; 2367 PSMgmtObject pMgmt = pDevice->pMgmt;
2368 WORD wCurrentRate = RATE_1M; 2368 WORD wCurrentRate = RATE_1M;
2369 2369
@@ -2516,10 +2516,10 @@ CMD_STATUS csMgmt_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket) {
2516 cbHeaderSize = wTxBufSize + sizeof(SRrvTime_ab) + sizeof(STxDataHead_ab); 2516 cbHeaderSize = wTxBufSize + sizeof(SRrvTime_ab) + sizeof(STxDataHead_ab);
2517 } 2517 }
2518 2518
2519 memset((PVOID)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderSize - wTxBufSize)); 2519 memset((void *)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderSize - wTxBufSize));
2520 2520
2521 memcpy(&(sEthHeader.abyDstAddr[0]), &(pPacket->p80211Header->sA3.abyAddr1[0]), U_ETHER_ADDR_LEN); 2521 memcpy(&(sEthHeader.abyDstAddr[0]), &(pPacket->p80211Header->sA3.abyAddr1[0]), ETH_ALEN);
2522 memcpy(&(sEthHeader.abySrcAddr[0]), &(pPacket->p80211Header->sA3.abyAddr2[0]), U_ETHER_ADDR_LEN); 2522 memcpy(&(sEthHeader.abySrcAddr[0]), &(pPacket->p80211Header->sA3.abyAddr2[0]), ETH_ALEN);
2523 //========================= 2523 //=========================
2524 // No Fragmentation 2524 // No Fragmentation
2525 //========================= 2525 //=========================
@@ -2738,10 +2738,10 @@ CMD_STATUS csBeacon_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket) {
2738 2738
2739UINT 2739UINT
2740cbGetFragCount ( 2740cbGetFragCount (
2741 IN PSDevice pDevice, 2741 PSDevice pDevice,
2742 IN PSKeyItem pTransmitKey, 2742 PSKeyItem pTransmitKey,
2743 IN UINT cbFrameBodySize, 2743 UINT cbFrameBodySize,
2744 IN PSEthernetHeader psEthHeader 2744 PSEthernetHeader psEthHeader
2745 ) 2745 )
2746{ 2746{
2747 UINT cbMACHdLen; 2747 UINT cbMACHdLen;
@@ -2825,15 +2825,15 @@ cbGetFragCount (
2825} 2825}
2826 2826
2827 2827
2828VOID 2828void
2829vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb, PBYTE pbMPDU, UINT cbMPDULen) { 2829vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb, PBYTE pbMPDU, UINT cbMPDULen) {
2830 2830
2831 PSTxDesc pFrstTD; 2831 PSTxDesc pFrstTD;
2832 BYTE byPktType; 2832 BYTE byPktType;
2833 PBYTE pbyTxBufferAddr; 2833 PBYTE pbyTxBufferAddr;
2834 PVOID pvRTS; 2834 void * pvRTS;
2835 PVOID pvCTS; 2835 void * pvCTS;
2836 PVOID pvTxDataHd; 2836 void * pvTxDataHd;
2837 UINT uDuration; 2837 UINT uDuration;
2838 UINT cbReqCount; 2838 UINT cbReqCount;
2839 PS802_11Header pMACHeader; 2839 PS802_11Header pMACHeader;
@@ -2857,8 +2857,8 @@ vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb, PBYTE pbMPDU, UINT cbMPDU
2857 WORD wTxBufSize; 2857 WORD wTxBufSize;
2858 UINT cbMacHdLen; 2858 UINT cbMacHdLen;
2859 SEthernetHeader sEthHeader; 2859 SEthernetHeader sEthHeader;
2860 PVOID pvRrvTime; 2860 void * pvRrvTime;
2861 PVOID pMICHDR; 2861 void * pMICHDR;
2862 PSMgmtObject pMgmt = pDevice->pMgmt; 2862 PSMgmtObject pMgmt = pDevice->pMgmt;
2863 WORD wCurrentRate = RATE_1M; 2863 WORD wCurrentRate = RATE_1M;
2864 PUWLAN_80211HDR p80211Header; 2864 PUWLAN_80211HDR p80211Header;
@@ -3061,9 +3061,9 @@ vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb, PBYTE pbMPDU, UINT cbMPDU
3061 3061
3062 } 3062 }
3063 3063
3064 memset((PVOID)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderSize - wTxBufSize)); 3064 memset((void *)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderSize - wTxBufSize));
3065 memcpy(&(sEthHeader.abyDstAddr[0]), &(p80211Header->sA3.abyAddr1[0]), U_ETHER_ADDR_LEN); 3065 memcpy(&(sEthHeader.abyDstAddr[0]), &(p80211Header->sA3.abyAddr1[0]), ETH_ALEN);
3066 memcpy(&(sEthHeader.abySrcAddr[0]), &(p80211Header->sA3.abyAddr2[0]), U_ETHER_ADDR_LEN); 3066 memcpy(&(sEthHeader.abySrcAddr[0]), &(p80211Header->sA3.abyAddr2[0]), ETH_ALEN);
3067 //========================= 3067 //=========================
3068 // No Fragmentation 3068 // No Fragmentation
3069 //========================= 3069 //=========================
diff --git a/drivers/staging/vt6655/rxtx.h b/drivers/staging/vt6655/rxtx.h
index 5da815efe70b..b008fc23adb9 100644
--- a/drivers/staging/vt6655/rxtx.h
+++ b/drivers/staging/vt6655/rxtx.h
@@ -40,67 +40,67 @@
40/*--------------------- Export Functions --------------------------*/ 40/*--------------------- Export Functions --------------------------*/
41 41
42/* 42/*
43VOID vGenerateMACHeader( 43void vGenerateMACHeader(
44 IN PSDevice pDevice, 44 PSDevice pDevice,
45 IN DWORD dwTxBufferAddr, 45 DWORD dwTxBufferAddr,
46 IN PBYTE pbySkbData, 46 PBYTE pbySkbData,
47 IN UINT cbPacketSize, 47 UINT cbPacketSize,
48 IN BOOL bDMA0Used, 48 BOOL bDMA0Used,
49 OUT PUINT pcbHeadSize, 49 PUINT pcbHeadSize,
50 OUT PUINT pcbAppendPayload 50 PUINT pcbAppendPayload
51 ); 51 );
52 52
53VOID vProcessRxMACHeader ( 53void vProcessRxMACHeader (
54 IN PSDevice pDevice, 54 PSDevice pDevice,
55 IN DWORD dwRxBufferAddr, 55 DWORD dwRxBufferAddr,
56 IN UINT cbPacketSize, 56 UINT cbPacketSize,
57 IN BOOL bIsWEP, 57 BOOL bIsWEP,
58 OUT PUINT pcbHeadSize 58 PUINT pcbHeadSize
59 ); 59 );
60*/ 60*/
61 61
62 62
63VOID 63void
64vGenerateMACHeader ( 64vGenerateMACHeader (
65 IN PSDevice pDevice, 65 PSDevice pDevice,
66 IN PBYTE pbyBufferAddr, 66 PBYTE pbyBufferAddr,
67 IN WORD wDuration, 67 WORD wDuration,
68 IN PSEthernetHeader psEthHeader, 68 PSEthernetHeader psEthHeader,
69 IN BOOL bNeedEncrypt, 69 BOOL bNeedEncrypt,
70 IN WORD wFragType, 70 WORD wFragType,
71 IN UINT uDMAIdx, 71 UINT uDMAIdx,
72 IN UINT uFragIdx 72 UINT uFragIdx
73 ); 73 );
74 74
75 75
76UINT 76UINT
77cbGetFragCount( 77cbGetFragCount(
78 IN PSDevice pDevice, 78 PSDevice pDevice,
79 IN PSKeyItem pTransmitKey, 79 PSKeyItem pTransmitKey,
80 IN UINT cbFrameBodySize, 80 UINT cbFrameBodySize,
81 IN PSEthernetHeader psEthHeader 81 PSEthernetHeader psEthHeader
82 ); 82 );
83 83
84 84
85VOID 85void
86vGenerateFIFOHeader ( 86vGenerateFIFOHeader (
87 IN PSDevice pDevice, 87 PSDevice pDevice,
88 IN BYTE byPktTyp, 88 BYTE byPktTyp,
89 IN PBYTE pbyTxBufferAddr, 89 PBYTE pbyTxBufferAddr,
90 IN BOOL bNeedEncrypt, 90 BOOL bNeedEncrypt,
91 IN UINT cbPayloadSize, 91 UINT cbPayloadSize,
92 IN UINT uDMAIdx, 92 UINT uDMAIdx,
93 IN PSTxDesc pHeadTD, 93 PSTxDesc pHeadTD,
94 IN PSEthernetHeader psEthHeader, 94 PSEthernetHeader psEthHeader,
95 IN PBYTE pPacket, 95 PBYTE pPacket,
96 IN PSKeyItem pTransmitKey, 96 PSKeyItem pTransmitKey,
97 IN UINT uNodeIndex, 97 UINT uNodeIndex,
98 OUT PUINT puMACfragNum, 98 PUINT puMACfragNum,
99 OUT PUINT pcbHeaderSize 99 PUINT pcbHeaderSize
100 ); 100 );
101 101
102 102
103VOID vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb, PBYTE pbMPDU, UINT cbMPDULen); 103void vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb, PBYTE pbMPDU, UINT cbMPDULen);
104CMD_STATUS csMgmt_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket); 104CMD_STATUS csMgmt_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket);
105CMD_STATUS csBeacon_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket); 105CMD_STATUS csBeacon_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket);
106 106
diff --git a/drivers/staging/vt6655/srom.c b/drivers/staging/vt6655/srom.c
index 5a7c6ca724b3..418575fdc2c0 100644
--- a/drivers/staging/vt6655/srom.c
+++ b/drivers/staging/vt6655/srom.c
@@ -85,15 +85,15 @@ BYTE SROMbyReadEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset)
85 85
86 byData = 0xFF; 86 byData = 0xFF;
87 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); 87 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
88 // turn off hardware retry for getting NACK 88 /* turn off hardware retry for getting NACK */
89 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); 89 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
90 for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) { 90 for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) {
91 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); 91 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
92 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset); 92 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
93 93
94 // issue read command 94 /* issue read command */
95 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR); 95 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR);
96 // wait DONE be set 96 /* wait DONE be set */
97 for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) { 97 for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) {
98 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); 98 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
99 if (byWait & (I2MCSR_DONE | I2MCSR_NACK)) 99 if (byWait & (I2MCSR_DONE | I2MCSR_NACK))
@@ -125,7 +125,7 @@ BYTE SROMbyReadEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset)
125 * Return Value: TRUE if succeeded; FALSE if failed. 125 * Return Value: TRUE if succeeded; FALSE if failed.
126 * 126 *
127 */ 127 */
128BOOL SROMbWriteEmbedded (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData) 128BOOL SROMbWriteEmbedded(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData)
129{ 129{
130 WORD wDelay, wNoACK; 130 WORD wDelay, wNoACK;
131 BYTE byWait; 131 BYTE byWait;
@@ -133,16 +133,16 @@ BOOL SROMbWriteEmbedded (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData)
133 BYTE byOrg; 133 BYTE byOrg;
134 134
135 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); 135 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
136 // turn off hardware retry for getting NACK 136 /* turn off hardware retry for getting NACK */
137 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); 137 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
138 for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) { 138 for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) {
139 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); 139 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
140 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset); 140 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
141 VNSvOutPortB(dwIoBase + MAC_REG_I2MDOPT, byData); 141 VNSvOutPortB(dwIoBase + MAC_REG_I2MDOPT, byData);
142 142
143 // issue write command 143 /* issue write command */
144 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMW); 144 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMW);
145 // wait DONE be set 145 /* wait DONE be set */
146 for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) { 146 for (wDelay = 0; wDelay < W_MAX_TIMEOUT; wDelay++) {
147 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); 147 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
148 if (byWait & (I2MCSR_DONE | I2MCSR_NACK)) 148 if (byWait & (I2MCSR_DONE | I2MCSR_NACK))
@@ -178,7 +178,7 @@ BOOL SROMbWriteEmbedded (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byData)
178 * Return Value: none 178 * Return Value: none
179 * 179 *
180 */ 180 */
181void SROMvRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits) 181void SROMvRegBitsOn(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits)
182{ 182{
183 BYTE byOrgData; 183 BYTE byOrgData;
184 184
@@ -199,7 +199,7 @@ void SROMvRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits)
199 * none 199 * none
200 * 200 *
201 */ 201 */
202void SROMvRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits) 202void SROMvRegBitsOff(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits)
203{ 203{
204 BYTE byOrgData; 204 BYTE byOrgData;
205 205
@@ -222,7 +222,7 @@ void SROMvRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byBits)
222 * Return Value: TRUE if all test bits on; otherwise FALSE 222 * Return Value: TRUE if all test bits on; otherwise FALSE
223 * 223 *
224 */ 224 */
225BOOL SROMbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits) 225BOOL SROMbIsRegBitsOn(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits)
226{ 226{
227 BYTE byOrgData; 227 BYTE byOrgData;
228 228
@@ -245,7 +245,7 @@ BOOL SROMbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits)
245 * Return Value: TRUE if all test bits off; otherwise FALSE 245 * Return Value: TRUE if all test bits off; otherwise FALSE
246 * 246 *
247 */ 247 */
248BOOL SROMbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits) 248BOOL SROMbIsRegBitsOff(DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits)
249{ 249{
250 BYTE byOrgData; 250 BYTE byOrgData;
251 251
@@ -266,11 +266,11 @@ BOOL SROMbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byContntOffset, BYTE byTestBits
266 * Return Value: none 266 * Return Value: none
267 * 267 *
268 */ 268 */
269void SROMvReadAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs) 269void SROMvReadAllContents(DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
270{ 270{
271 int ii; 271 int ii;
272 272
273 // ii = Rom Address 273 /* ii = Rom Address */
274 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { 274 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
275 *pbyEepromRegs = SROMbyReadEmbedded(dwIoBase,(BYTE) ii); 275 *pbyEepromRegs = SROMbyReadEmbedded(dwIoBase,(BYTE) ii);
276 pbyEepromRegs++; 276 pbyEepromRegs++;
@@ -291,11 +291,11 @@ void SROMvReadAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
291 * Return Value: none 291 * Return Value: none
292 * 292 *
293 */ 293 */
294void SROMvWriteAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs) 294void SROMvWriteAllContents(DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
295{ 295{
296 int ii; 296 int ii;
297 297
298 // ii = Rom Address 298 /* ii = Rom Address */
299 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { 299 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
300 SROMbWriteEmbedded(dwIoBase,(BYTE) ii, *pbyEepromRegs); 300 SROMbWriteEmbedded(dwIoBase,(BYTE) ii, *pbyEepromRegs);
301 pbyEepromRegs++; 301 pbyEepromRegs++;
@@ -315,12 +315,12 @@ void SROMvWriteAllContents (DWORD_PTR dwIoBase, PBYTE pbyEepromRegs)
315 * Return Value: none 315 * Return Value: none
316 * 316 *
317 */ 317 */
318void SROMvReadEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress) 318void SROMvReadEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
319{ 319{
320 BYTE ii; 320 BYTE ii;
321 321
322 // ii = Rom Address 322 /* ii = Rom Address */
323 for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) { 323 for (ii = 0; ii < ETH_ALEN; ii++) {
324 *pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii); 324 *pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii);
325 pbyEtherAddress++; 325 pbyEtherAddress++;
326 } 326 }
@@ -340,12 +340,12 @@ void SROMvReadEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
340 * Return Value: none 340 * Return Value: none
341 * 341 *
342 */ 342 */
343void SROMvWriteEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress) 343void SROMvWriteEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
344{ 344{
345 BYTE ii; 345 BYTE ii;
346 346
347 // ii = Rom Address 347 /* ii = Rom Address */
348 for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) { 348 for (ii = 0; ii < ETH_ALEN; ii++) {
349 SROMbWriteEmbedded(dwIoBase, ii, *pbyEtherAddress); 349 SROMbWriteEmbedded(dwIoBase, ii, *pbyEtherAddress);
350 pbyEtherAddress++; 350 pbyEtherAddress++;
351 } 351 }
@@ -364,15 +364,15 @@ void SROMvWriteEtherAddress (DWORD_PTR dwIoBase, PBYTE pbyEtherAddress)
364 * Return Value: none 364 * Return Value: none
365 * 365 *
366 */ 366 */
367void SROMvReadSubSysVenId (DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId) 367void SROMvReadSubSysVenId(DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId)
368{ 368{
369 PBYTE pbyData; 369 PBYTE pbyData;
370 370
371 pbyData = (PBYTE)pdwSubSysVenId; 371 pbyData = (PBYTE)pdwSubSysVenId;
372 // sub vendor 372 /* sub vendor */
373 *pbyData = SROMbyReadEmbedded(dwIoBase, 6); 373 *pbyData = SROMbyReadEmbedded(dwIoBase, 6);
374 *(pbyData+1) = SROMbyReadEmbedded(dwIoBase, 7); 374 *(pbyData+1) = SROMbyReadEmbedded(dwIoBase, 7);
375 // sub system 375 /* sub system */
376 *(pbyData+2) = SROMbyReadEmbedded(dwIoBase, 8); 376 *(pbyData+2) = SROMbyReadEmbedded(dwIoBase, 8);
377 *(pbyData+3) = SROMbyReadEmbedded(dwIoBase, 9); 377 *(pbyData+3) = SROMbyReadEmbedded(dwIoBase, 9);
378} 378}
@@ -389,7 +389,7 @@ void SROMvReadSubSysVenId (DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId)
389 * Return Value: TRUE if success; otherwise FALSE 389 * Return Value: TRUE if success; otherwise FALSE
390 * 390 *
391 */ 391 */
392BOOL SROMbAutoLoad (DWORD_PTR dwIoBase) 392BOOL SROMbAutoLoad(DWORD_PTR dwIoBase)
393{ 393{
394 BYTE byWait; 394 BYTE byWait;
395 int ii; 395 int ii;
@@ -397,12 +397,12 @@ BOOL SROMbAutoLoad (DWORD_PTR dwIoBase)
397 BYTE byOrg; 397 BYTE byOrg;
398 398
399 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); 399 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
400 // turn on hardware retry 400 /* turn on hardware retry */
401 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY)); 401 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY));
402 402
403 MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD); 403 MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
404 404
405 // ii = Rom Address 405 /* ii = Rom Address */
406 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) { 406 for (ii = 0; ii < EEP_MAX_CONTEXT_SIZE; ii++) {
407 MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT); 407 MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT);
408 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); 408 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
diff --git a/drivers/staging/vt6655/srom.h b/drivers/staging/vt6655/srom.h
index ba123ee61d24..dbb3f5efe979 100644
--- a/drivers/staging/vt6655/srom.h
+++ b/drivers/staging/vt6655/srom.h
@@ -150,7 +150,7 @@ void SROMvWriteAllContents(DWORD_PTR dwIoBase, PBYTE pbyEepromRegs);
150void SROMvReadEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress); 150void SROMvReadEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress);
151void SROMvWriteEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress); 151void SROMvWriteEtherAddress(DWORD_PTR dwIoBase, PBYTE pbyEtherAddress);
152 152
153VOID SROMvReadSubSysVenId(DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId); 153void SROMvReadSubSysVenId(DWORD_PTR dwIoBase, PDWORD pdwSubSysVenId);
154 154
155BOOL SROMbAutoLoad (DWORD_PTR dwIoBase); 155BOOL SROMbAutoLoad (DWORD_PTR dwIoBase);
156 156
diff --git a/drivers/staging/vt6655/tether.c b/drivers/staging/vt6655/tether.c
index c90b469ad545..d8ba67395cb1 100644
--- a/drivers/staging/vt6655/tether.c
+++ b/drivers/staging/vt6655/tether.c
@@ -68,7 +68,7 @@ BYTE ETHbyGetHashIndexByCrc32 (PBYTE pbyMultiAddr)
68 BYTE byHash = 0; 68 BYTE byHash = 0;
69 69
70 // get the least 6-bits from CRC generator 70 // get the least 6-bits from CRC generator
71 byTmpHash = (BYTE)(CRCdwCrc32(pbyMultiAddr, U_ETHER_ADDR_LEN, 71 byTmpHash = (BYTE)(CRCdwCrc32(pbyMultiAddr, ETH_ALEN,
72 0xFFFFFFFFL) & 0x3F); 72 0xFFFFFFFFL) & 0x3F);
73 // reverse most bit to least bit 73 // reverse most bit to least bit
74 for (ii = 0; ii < (sizeof(byTmpHash) * 8); ii++) { 74 for (ii = 0; ii < (sizeof(byTmpHash) * 8); ii++) {
diff --git a/drivers/staging/vt6655/tether.h b/drivers/staging/vt6655/tether.h
index 5a3c326436c6..3c9acd7903a8 100644
--- a/drivers/staging/vt6655/tether.h
+++ b/drivers/staging/vt6655/tether.h
@@ -29,30 +29,23 @@
29#ifndef __TETHER_H__ 29#ifndef __TETHER_H__
30#define __TETHER_H__ 30#define __TETHER_H__
31 31
32#include <linux/if_ether.h>
32#include "ttype.h" 33#include "ttype.h"
33 34
34/*--------------------- Export Definitions -------------------------*/ 35/*--------------------- Export Definitions -------------------------*/
35// 36//
36// constants 37// constants
37// 38//
38#define U_ETHER_ADDR_LEN 6 // Ethernet address length 39#define U_ETHER_ADDR_STR_LEN (ETH_ALEN * 2 + 1)
39#define U_TYPE_LEN 2 //
40#define U_CRC_LEN 4 //
41#define U_HEADER_LEN (U_ETHER_ADDR_LEN * 2 + U_TYPE_LEN)
42#define U_ETHER_ADDR_STR_LEN (U_ETHER_ADDR_LEN * 2 + 1)
43 // Ethernet address string length 40 // Ethernet address string length
44 41
45#define MIN_DATA_LEN 46 // min data length 42#define MIN_DATA_LEN 46 // min data length
46#define MAX_DATA_LEN 1500 // max data length
47 43
48#define MIN_PACKET_LEN (MIN_DATA_LEN + U_HEADER_LEN) 44#define MIN_PACKET_LEN (MIN_DATA_LEN + ETH_HLEN)
49 // 60 45 // 60
50 // min total packet length (tx) 46 // min total packet length (tx)
51#define MAX_PACKET_LEN (MAX_DATA_LEN + U_HEADER_LEN)
52 // 1514
53 // max total packet length (tx)
54 47
55#define MAX_LOOKAHEAD_SIZE MAX_PACKET_LEN 48#define MAX_LOOKAHEAD_SIZE ETH_FRAME_LEN
56 49
57#define U_MULTI_ADDR_LEN 8 // multicast address length 50#define U_MULTI_ADDR_LEN 8 // multicast address length
58 51
@@ -167,8 +160,8 @@
167// Ethernet packet 160// Ethernet packet
168// 161//
169typedef struct tagSEthernetHeader { 162typedef struct tagSEthernetHeader {
170 BYTE abyDstAddr[U_ETHER_ADDR_LEN]; 163 BYTE abyDstAddr[ETH_ALEN];
171 BYTE abySrcAddr[U_ETHER_ADDR_LEN]; 164 BYTE abySrcAddr[ETH_ALEN];
172 WORD wType; 165 WORD wType;
173}__attribute__ ((__packed__)) 166}__attribute__ ((__packed__))
174SEthernetHeader, *PSEthernetHeader; 167SEthernetHeader, *PSEthernetHeader;
@@ -178,8 +171,8 @@ SEthernetHeader, *PSEthernetHeader;
178// 802_3 packet 171// 802_3 packet
179// 172//
180typedef struct tagS802_3Header { 173typedef struct tagS802_3Header {
181 BYTE abyDstAddr[U_ETHER_ADDR_LEN]; 174 BYTE abyDstAddr[ETH_ALEN];
182 BYTE abySrcAddr[U_ETHER_ADDR_LEN]; 175 BYTE abySrcAddr[ETH_ALEN];
183 WORD wLen; 176 WORD wLen;
184}__attribute__ ((__packed__)) 177}__attribute__ ((__packed__))
185S802_3Header, *PS802_3Header; 178S802_3Header, *PS802_3Header;
@@ -190,11 +183,11 @@ S802_3Header, *PS802_3Header;
190typedef struct tagS802_11Header { 183typedef struct tagS802_11Header {
191 WORD wFrameCtl; 184 WORD wFrameCtl;
192 WORD wDurationID; 185 WORD wDurationID;
193 BYTE abyAddr1[U_ETHER_ADDR_LEN]; 186 BYTE abyAddr1[ETH_ALEN];
194 BYTE abyAddr2[U_ETHER_ADDR_LEN]; 187 BYTE abyAddr2[ETH_ALEN];
195 BYTE abyAddr3[U_ETHER_ADDR_LEN]; 188 BYTE abyAddr3[ETH_ALEN];
196 WORD wSeqCtl; 189 WORD wSeqCtl;
197 BYTE abyAddr4[U_ETHER_ADDR_LEN]; 190 BYTE abyAddr4[ETH_ALEN];
198}__attribute__ ((__packed__)) 191}__attribute__ ((__packed__))
199S802_11Header, *PS802_11Header; 192S802_11Header, *PS802_11Header;
200 193
diff --git a/drivers/staging/vt6655/tkip.c b/drivers/staging/vt6655/tkip.c
index 8ca154080e98..f83af5913aa6 100644
--- a/drivers/staging/vt6655/tkip.c
+++ b/drivers/staging/vt6655/tkip.c
@@ -183,7 +183,7 @@ unsigned int rotr1(unsigned int a)
183 * Return Value: none 183 * Return Value: none
184 * 184 *
185 */ 185 */
186VOID TKIPvMixKey( 186void TKIPvMixKey(
187 PBYTE pbyTKey, 187 PBYTE pbyTKey,
188 PBYTE pbyTA, 188 PBYTE pbyTA,
189 WORD wTSC15_0, 189 WORD wTSC15_0,
diff --git a/drivers/staging/vt6655/tkip.h b/drivers/staging/vt6655/tkip.h
index 847ecdf97ee8..3dfa7f5ee7ec 100644
--- a/drivers/staging/vt6655/tkip.h
+++ b/drivers/staging/vt6655/tkip.h
@@ -46,7 +46,7 @@
46 46
47/*--------------------- Export Functions --------------------------*/ 47/*--------------------- Export Functions --------------------------*/
48 48
49VOID TKIPvMixKey( 49void TKIPvMixKey(
50 PBYTE pbyTKey, 50 PBYTE pbyTKey,
51 PBYTE pbyTA, 51 PBYTE pbyTA,
52 WORD wTSC15_0, 52 WORD wTSC15_0,
diff --git a/drivers/staging/vt6655/ttype.h b/drivers/staging/vt6655/ttype.h
index 4dfad04bb25a..2921083a9f22 100644
--- a/drivers/staging/vt6655/ttype.h
+++ b/drivers/staging/vt6655/ttype.h
@@ -33,14 +33,6 @@
33 33
34/******* Common definitions and typedefs ***********************************/ 34/******* Common definitions and typedefs ***********************************/
35 35
36#ifndef VOID
37#define VOID void
38#endif
39
40#ifndef IN
41#define IN
42#endif
43
44#ifndef OUT 36#ifndef OUT
45#define OUT 37#define OUT
46#endif 38#endif
@@ -58,11 +50,6 @@ typedef int BOOL;
58#define FALSE 0 50#define FALSE 0
59#endif 51#endif
60 52
61
62#if !defined(SUCCESS)
63#define SUCCESS 0
64#endif
65
66//2007-0809-01<Add>by MikeLiu 53//2007-0809-01<Add>by MikeLiu
67#ifndef update_BssList 54#ifndef update_BssList
68#define update_BssList 55#define update_BssList
@@ -141,13 +128,4 @@ typedef DWORD * PDWORD;
141 128
142typedef QWORD * PQWORD; 129typedef QWORD * PQWORD;
143 130
144typedef void * PVOID;
145
146// handle declaration
147#ifdef STRICT
148typedef void *HANDLE;
149#else
150typedef PVOID HANDLE;
151#endif
152
153#endif // __TTYPE_H__ 131#endif // __TTYPE_H__
diff --git a/drivers/staging/vt6655/vntwifi.c b/drivers/staging/vt6655/vntwifi.c
index fbe27a834ce3..b527a019188b 100644
--- a/drivers/staging/vt6655/vntwifi.c
+++ b/drivers/staging/vt6655/vntwifi.c
@@ -69,10 +69,10 @@
69 * Return Value: none 69 * Return Value: none
70 * 70 *
71-*/ 71-*/
72VOID 72void
73VNTWIFIvSetOPMode ( 73VNTWIFIvSetOPMode (
74 IN PVOID pMgmtHandle, 74 void *pMgmtHandle,
75 IN WMAC_CONFIG_MODE eOPMode 75 WMAC_CONFIG_MODE eOPMode
76 ) 76 )
77{ 77{
78 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 78 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -98,12 +98,12 @@ VNTWIFIvSetOPMode (
98 * Return Value: none 98 * Return Value: none
99 * 99 *
100-*/ 100-*/
101VOID 101void
102VNTWIFIvSetIBSSParameter ( 102VNTWIFIvSetIBSSParameter (
103 IN PVOID pMgmtHandle, 103 void *pMgmtHandle,
104 IN WORD wBeaconPeriod, 104 WORD wBeaconPeriod,
105 IN WORD wATIMWindow, 105 WORD wATIMWindow,
106 IN UINT uChannel 106 UINT uChannel
107 ) 107 )
108{ 108{
109 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 109 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -129,7 +129,7 @@ VNTWIFIvSetIBSSParameter (
129-*/ 129-*/
130PWLAN_IE_SSID 130PWLAN_IE_SSID
131VNTWIFIpGetCurrentSSID ( 131VNTWIFIpGetCurrentSSID (
132 IN PVOID pMgmtHandle 132 void *pMgmtHandle
133 ) 133 )
134{ 134{
135 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 135 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -152,7 +152,7 @@ VNTWIFIpGetCurrentSSID (
152-*/ 152-*/
153UINT 153UINT
154VNTWIFIpGetCurrentChannel ( 154VNTWIFIpGetCurrentChannel (
155 IN PVOID pMgmtHandle 155 void *pMgmtHandle
156 ) 156 )
157{ 157{
158 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 158 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -178,7 +178,7 @@ VNTWIFIpGetCurrentChannel (
178-*/ 178-*/
179WORD 179WORD
180VNTWIFIwGetAssocID ( 180VNTWIFIwGetAssocID (
181 IN PVOID pMgmtHandle 181 void *pMgmtHandle
182 ) 182 )
183{ 183{
184 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 184 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -204,8 +204,8 @@ VNTWIFIwGetAssocID (
204-*/ 204-*/
205BYTE 205BYTE
206VNTWIFIbyGetMaxSupportRate ( 206VNTWIFIbyGetMaxSupportRate (
207 IN PWLAN_IE_SUPP_RATES pSupportRateIEs, 207 PWLAN_IE_SUPP_RATES pSupportRateIEs,
208 IN PWLAN_IE_SUPP_RATES pExtSupportRateIEs 208 PWLAN_IE_SUPP_RATES pExtSupportRateIEs
209 ) 209 )
210{ 210{
211 BYTE byMaxSupportRate = RATE_1M; 211 BYTE byMaxSupportRate = RATE_1M;
@@ -250,9 +250,9 @@ VNTWIFIbyGetMaxSupportRate (
250-*/ 250-*/
251BYTE 251BYTE
252VNTWIFIbyGetACKTxRate ( 252VNTWIFIbyGetACKTxRate (
253 IN BYTE byRxDataRate, 253 BYTE byRxDataRate,
254 IN PWLAN_IE_SUPP_RATES pSupportRateIEs, 254 PWLAN_IE_SUPP_RATES pSupportRateIEs,
255 IN PWLAN_IE_SUPP_RATES pExtSupportRateIEs 255 PWLAN_IE_SUPP_RATES pExtSupportRateIEs
256 ) 256 )
257{ 257{
258 BYTE byMaxAckRate; 258 BYTE byMaxAckRate;
@@ -306,10 +306,10 @@ VNTWIFIbyGetACKTxRate (
306 * Return Value: none 306 * Return Value: none
307 * 307 *
308-*/ 308-*/
309VOID 309void
310VNTWIFIvSetAuthenticationMode ( 310VNTWIFIvSetAuthenticationMode (
311 IN PVOID pMgmtHandle, 311 void *pMgmtHandle,
312 IN WMAC_AUTHENTICATION_MODE eAuthMode 312 WMAC_AUTHENTICATION_MODE eAuthMode
313 ) 313 )
314{ 314{
315 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 315 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -338,10 +338,10 @@ VNTWIFIvSetAuthenticationMode (
338 * Return Value: none 338 * Return Value: none
339 * 339 *
340-*/ 340-*/
341VOID 341void
342VNTWIFIvSetEncryptionMode ( 342VNTWIFIvSetEncryptionMode (
343 IN PVOID pMgmtHandle, 343 void *pMgmtHandle,
344 IN WMAC_ENCRYPTION_MODE eEncryptionMode 344 WMAC_ENCRYPTION_MODE eEncryptionMode
345 ) 345 )
346{ 346{
347 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 347 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -360,8 +360,8 @@ VNTWIFIvSetEncryptionMode (
360 360
361BOOL 361BOOL
362VNTWIFIbConfigPhyMode ( 362VNTWIFIbConfigPhyMode (
363 IN PVOID pMgmtHandle, 363 void *pMgmtHandle,
364 IN CARD_PHY_TYPE ePhyType 364 CARD_PHY_TYPE ePhyType
365 ) 365 )
366{ 366{
367 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 367 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -379,10 +379,10 @@ VNTWIFIbConfigPhyMode (
379} 379}
380 380
381 381
382VOID 382void
383VNTWIFIbGetConfigPhyMode ( 383VNTWIFIbGetConfigPhyMode (
384 IN PVOID pMgmtHandle, 384 void *pMgmtHandle,
385 OUT PVOID pePhyType 385 void *pePhyType
386 ) 386 )
387{ 387{
388 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 388 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -424,11 +424,11 @@ VNTWIFIbGetConfigPhyMode (
424 * 424 *
425-*/ 425-*/
426 426
427VOID 427void
428VNTWIFIvQueryBSSList ( 428VNTWIFIvQueryBSSList (
429 IN PVOID pMgmtHandle, 429 void *pMgmtHandle,
430 OUT PUINT puBSSCount, 430 PUINT puBSSCount,
431 OUT PVOID *pvFirstBSS 431 void **pvFirstBSS
432 ) 432 )
433{ 433{
434 UINT ii = 0; 434 UINT ii = 0;
@@ -454,11 +454,11 @@ VNTWIFIvQueryBSSList (
454 454
455 455
456 456
457VOID 457void
458VNTWIFIvGetNextBSS ( 458VNTWIFIvGetNextBSS (
459 IN PVOID pMgmtHandle, 459 void *pMgmtHandle,
460 IN PVOID pvCurrentBSS, 460 void *pvCurrentBSS,
461 OUT PVOID *pvNextBSS 461 void **pvNextBSS
462 ) 462 )
463{ 463{
464 PKnownBSS pBSS = (PKnownBSS) pvCurrentBSS; 464 PKnownBSS pBSS = (PKnownBSS) pvCurrentBSS;
@@ -494,13 +494,13 @@ VNTWIFIvGetNextBSS (
494 * Return Value: none 494 * Return Value: none
495 * 495 *
496-*/ 496-*/
497VOID 497void
498VNTWIFIvUpdateNodeTxCounter( 498VNTWIFIvUpdateNodeTxCounter(
499 IN PVOID pMgmtHandle, 499 void *pMgmtHandle,
500 IN PBYTE pbyDestAddress, 500 PBYTE pbyDestAddress,
501 IN BOOL bTxOk, 501 BOOL bTxOk,
502 IN WORD wRate, 502 WORD wRate,
503 IN PBYTE pbyTxFailCount 503 PBYTE pbyTxFailCount
504 ) 504 )
505{ 505{
506 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 506 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -529,14 +529,14 @@ VNTWIFIvUpdateNodeTxCounter(
529} 529}
530 530
531 531
532VOID 532void
533VNTWIFIvGetTxRate( 533VNTWIFIvGetTxRate(
534 IN PVOID pMgmtHandle, 534 void *pMgmtHandle,
535 IN PBYTE pbyDestAddress, 535 PBYTE pbyDestAddress,
536 OUT PWORD pwTxDataRate, 536 PWORD pwTxDataRate,
537 OUT PBYTE pbyACKRate, 537 PBYTE pbyACKRate,
538 OUT PBYTE pbyCCKBasicRate, 538 PBYTE pbyCCKBasicRate,
539 OUT PBYTE pbyOFDMBasicRate 539 PBYTE pbyOFDMBasicRate
540 ) 540 )
541{ 541{
542 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 542 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -603,8 +603,8 @@ VNTWIFIvGetTxRate(
603 603
604BYTE 604BYTE
605VNTWIFIbyGetKeyCypher( 605VNTWIFIbyGetKeyCypher(
606 IN PVOID pMgmtHandle, 606 void *pMgmtHandle,
607 IN BOOL bGroupKey 607 BOOL bGroupKey
608 ) 608 )
609{ 609{
610 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle; 610 PSMgmtObject pMgmt = (PSMgmtObject)pMgmtHandle;
@@ -620,8 +620,8 @@ VNTWIFIbyGetKeyCypher(
620/* 620/*
621BOOL 621BOOL
622VNTWIFIbInit( 622VNTWIFIbInit(
623 IN PVOID pAdapterHandler, 623 void *pAdapterHandler,
624 OUT PVOID *pMgmtHandler 624 void **pMgmtHandler
625 ) 625 )
626{ 626{
627 627
@@ -636,7 +636,7 @@ VNTWIFIbInit(
636 } 636 }
637 637
638 memset(pMgmt, 0, sizeof(SMgmtObject)); 638 memset(pMgmt, 0, sizeof(SMgmtObject));
639 pMgmt->pAdapter = (PVOID) pAdapterHandler; 639 pMgmt->pAdapter = (void *) pAdapterHandler;
640 640
641 // should initial MAC address abyMACAddr 641 // should initial MAC address abyMACAddr
642 for(ii=0;ii<WLAN_BSSID_LEN;ii++) { 642 for(ii=0;ii<WLAN_BSSID_LEN;ii++) {
@@ -664,9 +664,9 @@ VNTWIFIbInit(
664 664
665BOOL 665BOOL
666VNTWIFIbSetPMKIDCache ( 666VNTWIFIbSetPMKIDCache (
667 IN PVOID pMgmtObject, 667 void *pMgmtObject,
668 IN ULONG ulCount, 668 ULONG ulCount,
669 IN PVOID pPMKIDInfo 669 void *pPMKIDInfo
670 ) 670 )
671{ 671{
672 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject; 672 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject;
@@ -683,7 +683,7 @@ VNTWIFIbSetPMKIDCache (
683 683
684WORD 684WORD
685VNTWIFIwGetMaxSupportRate( 685VNTWIFIwGetMaxSupportRate(
686 IN PVOID pMgmtObject 686 void *pMgmtObject
687 ) 687 )
688{ 688{
689 WORD wRate = RATE_54M; 689 WORD wRate = RATE_54M;
@@ -702,10 +702,10 @@ VNTWIFIwGetMaxSupportRate(
702} 702}
703 703
704 704
705VOID 705void
706VNTWIFIvSet11h ( 706VNTWIFIvSet11h (
707 IN PVOID pMgmtObject, 707 void *pMgmtObject,
708 IN BOOL b11hEnable 708 BOOL b11hEnable
709 ) 709 )
710{ 710{
711 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject; 711 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject;
@@ -715,13 +715,13 @@ VNTWIFIvSet11h (
715 715
716BOOL 716BOOL
717VNTWIFIbMeasureReport( 717VNTWIFIbMeasureReport(
718 IN PVOID pMgmtObject, 718 void *pMgmtObject,
719 IN BOOL bEndOfReport, 719 BOOL bEndOfReport,
720 IN PVOID pvMeasureEID, 720 void *pvMeasureEID,
721 IN BYTE byReportMode, 721 BYTE byReportMode,
722 IN BYTE byBasicMap, 722 BYTE byBasicMap,
723 IN BYTE byCCAFraction, 723 BYTE byCCAFraction,
724 IN PBYTE pbyRPIs 724 PBYTE pbyRPIs
725 ) 725 )
726{ 726{
727 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject; 727 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject;
@@ -775,8 +775,8 @@ VNTWIFIbMeasureReport(
775 775
776BOOL 776BOOL
777VNTWIFIbChannelSwitch( 777VNTWIFIbChannelSwitch(
778 IN PVOID pMgmtObject, 778 void *pMgmtObject,
779 IN BYTE byNewChannel 779 BYTE byNewChannel
780 ) 780 )
781{ 781{
782 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject; 782 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject;
@@ -791,8 +791,8 @@ VNTWIFIbChannelSwitch(
791/* 791/*
792BOOL 792BOOL
793VNTWIFIbRadarPresent( 793VNTWIFIbRadarPresent(
794 IN PVOID pMgmtObject, 794 void *pMgmtObject,
795 IN BYTE byChannel 795 BYTE byChannel
796 ) 796 )
797{ 797{
798 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject; 798 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtObject;
diff --git a/drivers/staging/vt6655/vntwifi.h b/drivers/staging/vt6655/vntwifi.h
index 2854dfcb19aa..c91dfd79adca 100644
--- a/drivers/staging/vt6655/vntwifi.h
+++ b/drivers/staging/vt6655/vntwifi.h
@@ -140,123 +140,123 @@ typedef enum tagWMAC_POWER_MODE {
140 140
141/*--------------------- Export Functions --------------------------*/ 141/*--------------------- Export Functions --------------------------*/
142 142
143VOID 143void
144VNTWIFIvSetIBSSParameter ( 144VNTWIFIvSetIBSSParameter (
145 IN PVOID pMgmtHandle, 145 void *pMgmtHandle,
146 IN WORD wBeaconPeriod, 146 WORD wBeaconPeriod,
147 IN WORD wATIMWindow, 147 WORD wATIMWindow,
148 IN UINT uChannel 148 UINT uChannel
149 ); 149 );
150 150
151VOID 151void
152VNTWIFIvSetOPMode ( 152VNTWIFIvSetOPMode (
153 IN PVOID pMgmtHandle, 153 void *pMgmtHandle,
154 IN WMAC_CONFIG_MODE eOPMode 154 WMAC_CONFIG_MODE eOPMode
155 ); 155 );
156 156
157PWLAN_IE_SSID 157PWLAN_IE_SSID
158VNTWIFIpGetCurrentSSID( 158VNTWIFIpGetCurrentSSID(
159 IN PVOID pMgmtHandle 159 void *pMgmtHandle
160 ); 160 );
161 161
162UINT 162UINT
163VNTWIFIpGetCurrentChannel( 163VNTWIFIpGetCurrentChannel(
164 IN PVOID pMgmtHandle 164 void *pMgmtHandle
165 ); 165 );
166 166
167WORD 167WORD
168VNTWIFIwGetAssocID ( 168VNTWIFIwGetAssocID (
169 IN PVOID pMgmtHandle 169 void *pMgmtHandle
170 ); 170 );
171 171
172BYTE 172BYTE
173VNTWIFIbyGetMaxSupportRate ( 173VNTWIFIbyGetMaxSupportRate (
174 IN PWLAN_IE_SUPP_RATES pSupportRateIEs, 174 PWLAN_IE_SUPP_RATES pSupportRateIEs,
175 IN PWLAN_IE_SUPP_RATES pExtSupportRateIEs 175 PWLAN_IE_SUPP_RATES pExtSupportRateIEs
176 ); 176 );
177 177
178BYTE 178BYTE
179VNTWIFIbyGetACKTxRate ( 179VNTWIFIbyGetACKTxRate (
180 IN BYTE byRxDataRate, 180 BYTE byRxDataRate,
181 IN PWLAN_IE_SUPP_RATES pSupportRateIEs, 181 PWLAN_IE_SUPP_RATES pSupportRateIEs,
182 IN PWLAN_IE_SUPP_RATES pExtSupportRateIEs 182 PWLAN_IE_SUPP_RATES pExtSupportRateIEs
183 ); 183 );
184 184
185VOID 185void
186VNTWIFIvSetAuthenticationMode ( 186VNTWIFIvSetAuthenticationMode (
187 IN PVOID pMgmtHandle, 187 void *pMgmtHandle,
188 IN WMAC_AUTHENTICATION_MODE eAuthMode 188 WMAC_AUTHENTICATION_MODE eAuthMode
189 ); 189 );
190 190
191VOID 191void
192VNTWIFIvSetEncryptionMode ( 192VNTWIFIvSetEncryptionMode (
193 IN PVOID pMgmtHandle, 193 void *pMgmtHandle,
194 IN WMAC_ENCRYPTION_MODE eEncryptionMode 194 WMAC_ENCRYPTION_MODE eEncryptionMode
195 ); 195 );
196 196
197 197
198BOOL 198BOOL
199VNTWIFIbConfigPhyMode( 199VNTWIFIbConfigPhyMode(
200 IN PVOID pMgmtHandle, 200 void *pMgmtHandle,
201 IN CARD_PHY_TYPE ePhyType 201 CARD_PHY_TYPE ePhyType
202 ); 202 );
203 203
204VOID 204void
205VNTWIFIbGetConfigPhyMode( 205VNTWIFIbGetConfigPhyMode(
206 IN PVOID pMgmtHandle, 206 void *pMgmtHandle,
207 OUT PVOID pePhyType 207 void *pePhyType
208 ); 208 );
209 209
210VOID 210void
211VNTWIFIvQueryBSSList( 211VNTWIFIvQueryBSSList(
212 IN PVOID pMgmtHandle, 212 void *pMgmtHandle,
213 OUT PUINT puBSSCount, 213 PUINT puBSSCount,
214 OUT PVOID *pvFirstBSS 214 void **pvFirstBSS
215 ); 215 );
216 216
217 217
218 218
219 219
220VOID 220void
221VNTWIFIvGetNextBSS ( 221VNTWIFIvGetNextBSS (
222 IN PVOID pMgmtHandle, 222 void *pMgmtHandle,
223 IN PVOID pvCurrentBSS, 223 void *pvCurrentBSS,
224 OUT PVOID *pvNextBSS 224 void **pvNextBSS
225 ); 225 );
226 226
227 227
228 228
229VOID 229void
230VNTWIFIvUpdateNodeTxCounter( 230VNTWIFIvUpdateNodeTxCounter(
231 IN PVOID pMgmtHandle, 231 void *pMgmtHandle,
232 IN PBYTE pbyDestAddress, 232 PBYTE pbyDestAddress,
233 IN BOOL bTxOk, 233 BOOL bTxOk,
234 IN WORD wRate, 234 WORD wRate,
235 IN PBYTE pbyTxFailCount 235 PBYTE pbyTxFailCount
236 ); 236 );
237 237
238 238
239VOID 239void
240VNTWIFIvGetTxRate( 240VNTWIFIvGetTxRate(
241 IN PVOID pMgmtHandle, 241 void *pMgmtHandle,
242 IN PBYTE pbyDestAddress, 242 PBYTE pbyDestAddress,
243 OUT PWORD pwTxDataRate, 243 PWORD pwTxDataRate,
244 OUT PBYTE pbyACKRate, 244 PBYTE pbyACKRate,
245 OUT PBYTE pbyCCKBasicRate, 245 PBYTE pbyCCKBasicRate,
246 OUT PBYTE pbyOFDMBasicRate 246 PBYTE pbyOFDMBasicRate
247 ); 247 );
248/* 248/*
249BOOL 249BOOL
250VNTWIFIbInit( 250VNTWIFIbInit(
251 IN PVOID pAdapterHandler, 251 void *pAdapterHandler,
252 OUT PVOID *pMgmtHandler 252 void **pMgmtHandler
253 ); 253 );
254*/ 254*/
255 255
256BYTE 256BYTE
257VNTWIFIbyGetKeyCypher( 257VNTWIFIbyGetKeyCypher(
258 IN PVOID pMgmtHandle, 258 void *pMgmtHandle,
259 IN BOOL bGroupKey 259 BOOL bGroupKey
260 ); 260 );
261 261
262 262
@@ -264,49 +264,49 @@ VNTWIFIbyGetKeyCypher(
264 264
265BOOL 265BOOL
266VNTWIFIbSetPMKIDCache ( 266VNTWIFIbSetPMKIDCache (
267 IN PVOID pMgmtObject, 267 void *pMgmtObject,
268 IN ULONG ulCount, 268 ULONG ulCount,
269 IN PVOID pPMKIDInfo 269 void *pPMKIDInfo
270 ); 270 );
271 271
272BOOL 272BOOL
273VNTWIFIbCommandRunning ( 273VNTWIFIbCommandRunning (
274 IN PVOID pMgmtObject 274 void *pMgmtObject
275 ); 275 );
276 276
277WORD 277WORD
278VNTWIFIwGetMaxSupportRate( 278VNTWIFIwGetMaxSupportRate(
279 IN PVOID pMgmtObject 279 void *pMgmtObject
280 ); 280 );
281 281
282// for 802.11h 282// for 802.11h
283VOID 283void
284VNTWIFIvSet11h ( 284VNTWIFIvSet11h (
285 IN PVOID pMgmtObject, 285 void *pMgmtObject,
286 IN BOOL b11hEnable 286 BOOL b11hEnable
287 ); 287 );
288 288
289BOOL 289BOOL
290VNTWIFIbMeasureReport( 290VNTWIFIbMeasureReport(
291 IN PVOID pMgmtObject, 291 void *pMgmtObject,
292 IN BOOL bEndOfReport, 292 BOOL bEndOfReport,
293 IN PVOID pvMeasureEID, 293 void *pvMeasureEID,
294 IN BYTE byReportMode, 294 BYTE byReportMode,
295 IN BYTE byBasicMap, 295 BYTE byBasicMap,
296 IN BYTE byCCAFraction, 296 BYTE byCCAFraction,
297 IN PBYTE pbyRPIs 297 PBYTE pbyRPIs
298 ); 298 );
299 299
300BOOL 300BOOL
301VNTWIFIbChannelSwitch( 301VNTWIFIbChannelSwitch(
302 IN PVOID pMgmtObject, 302 void *pMgmtObject,
303 IN BYTE byNewChannel 303 BYTE byNewChannel
304 ); 304 );
305/* 305/*
306BOOL 306BOOL
307VNTWIFIbRadarPresent( 307VNTWIFIbRadarPresent(
308 IN PVOID pMgmtObject, 308 void *pMgmtObject,
309 IN BYTE byChannel 309 BYTE byChannel
310 ); 310 );
311*/ 311*/
312 312
diff --git a/drivers/staging/vt6655/wcmd.c b/drivers/staging/vt6655/wcmd.c
index c9eabf9995df..28665d870f59 100644
--- a/drivers/staging/vt6655/wcmd.c
+++ b/drivers/staging/vt6655/wcmd.c
@@ -66,21 +66,21 @@ static int msglevel =MSG_LEVEL_INFO;
66/*--------------------- Static Functions --------------------------*/ 66/*--------------------- Static Functions --------------------------*/
67 67
68static 68static
69VOID 69void
70s_vProbeChannel( 70s_vProbeChannel(
71 IN PSDevice pDevice 71 PSDevice pDevice
72 ); 72 );
73 73
74 74
75static 75static
76PSTxMgmtPacket 76PSTxMgmtPacket
77s_MgrMakeProbeRequest( 77s_MgrMakeProbeRequest(
78 IN PSDevice pDevice, 78 PSDevice pDevice,
79 IN PSMgmtObject pMgmt, 79 PSMgmtObject pMgmt,
80 IN PBYTE pScanBSSID, 80 PBYTE pScanBSSID,
81 IN PWLAN_IE_SSID pSSID, 81 PWLAN_IE_SSID pSSID,
82 IN PWLAN_IE_SUPP_RATES pCurrRates, 82 PWLAN_IE_SUPP_RATES pCurrRates,
83 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 83 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
84 ); 84 );
85 85
86 86
@@ -202,9 +202,9 @@ vAdHocBeaconRestart(PSDevice pDevice)
202-*/ 202-*/
203 203
204static 204static
205VOID 205void
206s_vProbeChannel( 206s_vProbeChannel(
207 IN PSDevice pDevice 207 PSDevice pDevice
208 ) 208 )
209{ 209{
210 //1M, 2M, 5M, 11M, 18M, 24M, 36M, 54M 210 //1M, 2M, 5M, 11M, 18M, 24M, 36M, 54M
@@ -267,12 +267,12 @@ s_vProbeChannel(
267 267
268PSTxMgmtPacket 268PSTxMgmtPacket
269s_MgrMakeProbeRequest( 269s_MgrMakeProbeRequest(
270 IN PSDevice pDevice, 270 PSDevice pDevice,
271 IN PSMgmtObject pMgmt, 271 PSMgmtObject pMgmt,
272 IN PBYTE pScanBSSID, 272 PBYTE pScanBSSID,
273 IN PWLAN_IE_SSID pSSID, 273 PWLAN_IE_SSID pSSID,
274 IN PWLAN_IE_SUPP_RATES pCurrRates, 274 PWLAN_IE_SUPP_RATES pCurrRates,
275 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 275 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
276 276
277 ) 277 )
278{ 278{
@@ -317,10 +317,10 @@ s_MgrMakeProbeRequest(
317 317
318 318
319 319
320VOID 320void
321vCommandTimerWait( 321vCommandTimerWait(
322 IN HANDLE hDeviceContext, 322 void *hDeviceContext,
323 IN UINT MSecond 323 UINT MSecond
324 ) 324 )
325{ 325{
326 PSDevice pDevice = (PSDevice)hDeviceContext; 326 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -337,9 +337,9 @@ vCommandTimerWait(
337 337
338 338
339 339
340VOID 340void
341vCommandTimer ( 341vCommandTimer (
342 IN HANDLE hDeviceContext 342 void *hDeviceContext
343 ) 343 )
344{ 344{
345 PSDevice pDevice = (PSDevice)hDeviceContext; 345 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -382,7 +382,7 @@ vCommandTimer (
382 // wait all Data TD complete 382 // wait all Data TD complete
383 if (pDevice->iTDUsed[TYPE_AC0DMA] != 0){ 383 if (pDevice->iTDUsed[TYPE_AC0DMA] != 0){
384 spin_unlock_irq(&pDevice->lock); 384 spin_unlock_irq(&pDevice->lock);
385 vCommandTimerWait((HANDLE)pDevice, 10); 385 vCommandTimerWait((void *)pDevice, 10);
386 return; 386 return;
387 }; 387 };
388 388
@@ -424,7 +424,7 @@ vCommandTimer (
424 pMgmt->abyScanBSSID[5] = 0xFF; 424 pMgmt->abyScanBSSID[5] = 0xFF;
425 pItemSSID->byElementID = WLAN_EID_SSID; 425 pItemSSID->byElementID = WLAN_EID_SSID;
426 // clear bssid list 426 // clear bssid list
427 // BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 427 // BSSvClearBSSList((void *)pDevice, pDevice->bLinkPass);
428 pMgmt->eScanState = WMAC_IS_SCANNING; 428 pMgmt->eScanState = WMAC_IS_SCANNING;
429 429
430 } 430 }
@@ -453,11 +453,11 @@ vCommandTimer (
453 (pMgmt->uScanChannel < CB_MAX_CHANNEL_24G)) { 453 (pMgmt->uScanChannel < CB_MAX_CHANNEL_24G)) {
454 s_vProbeChannel(pDevice); 454 s_vProbeChannel(pDevice);
455 spin_unlock_irq(&pDevice->lock); 455 spin_unlock_irq(&pDevice->lock);
456 vCommandTimerWait((HANDLE)pDevice, WCMD_ACTIVE_SCAN_TIME); 456 vCommandTimerWait((void *)pDevice, WCMD_ACTIVE_SCAN_TIME);
457 return; 457 return;
458 } else { 458 } else {
459 spin_unlock_irq(&pDevice->lock); 459 spin_unlock_irq(&pDevice->lock);
460 vCommandTimerWait((HANDLE)pDevice, WCMD_PASSIVE_SCAN_TIME); 460 vCommandTimerWait((void *)pDevice, WCMD_PASSIVE_SCAN_TIME);
461 return; 461 return;
462 } 462 }
463 463
@@ -501,7 +501,7 @@ vCommandTimer (
501 } else { 501 } else {
502 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Send Disassociation Packet..\n"); 502 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Send Disassociation Packet..\n");
503 // reason = 8 : disassoc because sta has left 503 // reason = 8 : disassoc because sta has left
504 vMgrDisassocBeginSta((HANDLE)pDevice, pMgmt, pMgmt->abyCurrBSSID, (8), &Status); 504 vMgrDisassocBeginSta((void *)pDevice, pMgmt, pMgmt->abyCurrBSSID, (8), &Status);
505 pDevice->bLinkPass = FALSE; 505 pDevice->bLinkPass = FALSE;
506 // unlock command busy 506 // unlock command busy
507 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID; 507 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID;
@@ -515,7 +515,7 @@ vCommandTimer (
515 pDevice->eCommandState = WLAN_DISASSOCIATE_WAIT; 515 pDevice->eCommandState = WLAN_DISASSOCIATE_WAIT;
516 // wait all Control TD complete 516 // wait all Control TD complete
517 if (pDevice->iTDUsed[TYPE_TXDMA0] != 0){ 517 if (pDevice->iTDUsed[TYPE_TXDMA0] != 0){
518 vCommandTimerWait((HANDLE)pDevice, 10); 518 vCommandTimerWait((void *)pDevice, 10);
519 spin_unlock_irq(&pDevice->lock); 519 spin_unlock_irq(&pDevice->lock);
520 return; 520 return;
521 }; 521 };
@@ -528,7 +528,7 @@ vCommandTimer (
528 case WLAN_DISASSOCIATE_WAIT : 528 case WLAN_DISASSOCIATE_WAIT :
529 // wait all Control TD complete 529 // wait all Control TD complete
530 if (pDevice->iTDUsed[TYPE_TXDMA0] != 0){ 530 if (pDevice->iTDUsed[TYPE_TXDMA0] != 0){
531 vCommandTimerWait((HANDLE)pDevice, 10); 531 vCommandTimerWait((void *)pDevice, 10);
532 spin_unlock_irq(&pDevice->lock); 532 spin_unlock_irq(&pDevice->lock);
533 return; 533 return;
534 }; 534 };
@@ -578,24 +578,24 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
578 // set initial state 578 // set initial state
579 pMgmt->eCurrState = WMAC_STATE_IDLE; 579 pMgmt->eCurrState = WMAC_STATE_IDLE;
580 pMgmt->eCurrMode = WMAC_MODE_STANDBY; 580 pMgmt->eCurrMode = WMAC_MODE_STANDBY;
581 PSvDisablePowerSaving((HANDLE)pDevice); 581 PSvDisablePowerSaving((void *)pDevice);
582 BSSvClearNodeDBTable(pDevice, 0); 582 BSSvClearNodeDBTable(pDevice, 0);
583 583
584 vMgrJoinBSSBegin((HANDLE)pDevice, &Status); 584 vMgrJoinBSSBegin((void *)pDevice, &Status);
585 // if Infra mode 585 // if Infra mode
586 if ((pMgmt->eCurrMode == WMAC_MODE_ESS_STA) && (pMgmt->eCurrState == WMAC_STATE_JOINTED)) { 586 if ((pMgmt->eCurrMode == WMAC_MODE_ESS_STA) && (pMgmt->eCurrState == WMAC_STATE_JOINTED)) {
587 587
588 // Call mgr to begin the deauthentication 588 // Call mgr to begin the deauthentication
589 // reason = (3) beacuse sta has left ESS 589 // reason = (3) beacuse sta has left ESS
590 if (pMgmt->eCurrState>= WMAC_STATE_AUTH) { 590 if (pMgmt->eCurrState>= WMAC_STATE_AUTH) {
591 vMgrDeAuthenBeginSta((HANDLE)pDevice, pMgmt, pMgmt->abyCurrBSSID, (3), &Status); 591 vMgrDeAuthenBeginSta((void *)pDevice, pMgmt, pMgmt->abyCurrBSSID, (3), &Status);
592 } 592 }
593 // Call mgr to begin the authentication 593 // Call mgr to begin the authentication
594 vMgrAuthenBeginSta((HANDLE)pDevice, pMgmt, &Status); 594 vMgrAuthenBeginSta((void *)pDevice, pMgmt, &Status);
595 if (Status == CMD_STATUS_SUCCESS) { 595 if (Status == CMD_STATUS_SUCCESS) {
596 pDevice->byLinkWaitCount = 0; 596 pDevice->byLinkWaitCount = 0;
597 pDevice->eCommandState = WLAN_AUTHENTICATE_WAIT; 597 pDevice->eCommandState = WLAN_AUTHENTICATE_WAIT;
598 vCommandTimerWait((HANDLE)pDevice, AUTHENTICATE_TIMEOUT); 598 vCommandTimerWait((void *)pDevice, AUTHENTICATE_TIMEOUT);
599 spin_unlock_irq(&pDevice->lock); 599 spin_unlock_irq(&pDevice->lock);
600 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" Set eCommandState = WLAN_AUTHENTICATE_WAIT\n"); 600 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" Set eCommandState = WLAN_AUTHENTICATE_WAIT\n");
601 return; 601 return;
@@ -615,7 +615,7 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
615 } 615 }
616 else { 616 else {
617 // start own IBSS 617 // start own IBSS
618 vMgrCreateOwnIBSS((HANDLE)pDevice, &Status); 618 vMgrCreateOwnIBSS((void *)pDevice, &Status);
619 if (Status != CMD_STATUS_SUCCESS){ 619 if (Status != CMD_STATUS_SUCCESS){
620 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " WLAN_CMD_IBSS_CREATE fail ! \n"); 620 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " WLAN_CMD_IBSS_CREATE fail ! \n");
621 }; 621 };
@@ -627,7 +627,7 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
627 if (pMgmt->eConfigMode == WMAC_CONFIG_IBSS_STA || 627 if (pMgmt->eConfigMode == WMAC_CONFIG_IBSS_STA ||
628 pMgmt->eConfigMode == WMAC_CONFIG_AUTO) { 628 pMgmt->eConfigMode == WMAC_CONFIG_AUTO) {
629 // start own IBSS 629 // start own IBSS
630 vMgrCreateOwnIBSS((HANDLE)pDevice, &Status); 630 vMgrCreateOwnIBSS((void *)pDevice, &Status);
631 if (Status != CMD_STATUS_SUCCESS){ 631 if (Status != CMD_STATUS_SUCCESS){
632 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" WLAN_CMD_IBSS_CREATE fail ! \n"); 632 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" WLAN_CMD_IBSS_CREATE fail ! \n");
633 }; 633 };
@@ -661,12 +661,12 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
661 // Call mgr to begin the association 661 // Call mgr to begin the association
662 pDevice->byLinkWaitCount = 0; 662 pDevice->byLinkWaitCount = 0;
663 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_AUTH\n"); 663 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_AUTH\n");
664 vMgrAssocBeginSta((HANDLE)pDevice, pMgmt, &Status); 664 vMgrAssocBeginSta((void *)pDevice, pMgmt, &Status);
665 if (Status == CMD_STATUS_SUCCESS) { 665 if (Status == CMD_STATUS_SUCCESS) {
666 pDevice->byLinkWaitCount = 0; 666 pDevice->byLinkWaitCount = 0;
667 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCommandState = WLAN_ASSOCIATE_WAIT\n"); 667 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCommandState = WLAN_ASSOCIATE_WAIT\n");
668 pDevice->eCommandState = WLAN_ASSOCIATE_WAIT; 668 pDevice->eCommandState = WLAN_ASSOCIATE_WAIT;
669 vCommandTimerWait((HANDLE)pDevice, ASSOCIATE_TIMEOUT); 669 vCommandTimerWait((void *)pDevice, ASSOCIATE_TIMEOUT);
670 spin_unlock_irq(&pDevice->lock); 670 spin_unlock_irq(&pDevice->lock);
671 return; 671 return;
672 } 672 }
@@ -679,7 +679,7 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
679 pDevice->byLinkWaitCount ++; 679 pDevice->byLinkWaitCount ++;
680 printk("WLAN_AUTHENTICATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount); 680 printk("WLAN_AUTHENTICATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount);
681 spin_unlock_irq(&pDevice->lock); 681 spin_unlock_irq(&pDevice->lock);
682 vCommandTimerWait((HANDLE)pDevice, AUTHENTICATE_TIMEOUT/2); 682 vCommandTimerWait((void *)pDevice, AUTHENTICATE_TIMEOUT/2);
683 return; 683 return;
684 } 684 }
685 pDevice->byLinkWaitCount = 0; 685 pDevice->byLinkWaitCount = 0;
@@ -702,7 +702,7 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
702 if (pMgmt->eCurrState == WMAC_STATE_ASSOC) { 702 if (pMgmt->eCurrState == WMAC_STATE_ASSOC) {
703 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_ASSOC\n"); 703 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_ASSOC\n");
704 if (pDevice->ePSMode != WMAC_POWER_CAM) { 704 if (pDevice->ePSMode != WMAC_POWER_CAM) {
705 PSvEnablePowerSaving((HANDLE)pDevice, pMgmt->wListenInterval); 705 PSvEnablePowerSaving((void *)pDevice, pMgmt->wListenInterval);
706 } 706 }
707 if (pMgmt->eAuthenMode >= WMAC_AUTH_WPA) { 707 if (pMgmt->eAuthenMode >= WMAC_AUTH_WPA) {
708 KeybRemoveAllKey(&(pDevice->sKey), pDevice->abyBSSID, pDevice->PortOffset); 708 KeybRemoveAllKey(&(pDevice->sKey), pDevice->abyBSSID, pDevice->PortOffset);
@@ -743,7 +743,7 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
743 pDevice->byLinkWaitCount ++; 743 pDevice->byLinkWaitCount ++;
744 printk("WLAN_ASSOCIATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount); 744 printk("WLAN_ASSOCIATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount);
745 spin_unlock_irq(&pDevice->lock); 745 spin_unlock_irq(&pDevice->lock);
746 vCommandTimerWait((HANDLE)pDevice, ASSOCIATE_TIMEOUT/2); 746 vCommandTimerWait((void *)pDevice, ASSOCIATE_TIMEOUT/2);
747 return; 747 return;
748 } 748 }
749 pDevice->byLinkWaitCount = 0; 749 pDevice->byLinkWaitCount = 0;
@@ -779,7 +779,7 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
779 pMgmt->eCurrState = WMAC_STATE_IDLE; 779 pMgmt->eCurrState = WMAC_STATE_IDLE;
780 pDevice->bFixRate = FALSE; 780 pDevice->bFixRate = FALSE;
781 781
782 vMgrCreateOwnIBSS((HANDLE)pDevice, &Status); 782 vMgrCreateOwnIBSS((void *)pDevice, &Status);
783 if (Status != CMD_STATUS_SUCCESS){ 783 if (Status != CMD_STATUS_SUCCESS){
784 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " vMgrCreateOwnIBSS fail ! \n"); 784 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " vMgrCreateOwnIBSS fail ! \n");
785 }; 785 };
@@ -869,12 +869,12 @@ printk("chester-abyDesireSSID=%s\n",((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySS
869 //DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCommandState == WLAN_CMD_CHECK_BBSENSITIVITY_START\n"); 869 //DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCommandState == WLAN_CMD_CHECK_BBSENSITIVITY_START\n");
870 // wait all TD complete 870 // wait all TD complete
871 if (pDevice->iTDUsed[TYPE_AC0DMA] != 0){ 871 if (pDevice->iTDUsed[TYPE_AC0DMA] != 0){
872 vCommandTimerWait((HANDLE)pDevice, 10); 872 vCommandTimerWait((void *)pDevice, 10);
873 spin_unlock_irq(&pDevice->lock); 873 spin_unlock_irq(&pDevice->lock);
874 return; 874 return;
875 } 875 }
876 if (pDevice->iTDUsed[TYPE_TXDMA0] != 0){ 876 if (pDevice->iTDUsed[TYPE_TXDMA0] != 0){
877 vCommandTimerWait((HANDLE)pDevice, 10); 877 vCommandTimerWait((void *)pDevice, 10);
878 spin_unlock_irq(&pDevice->lock); 878 spin_unlock_irq(&pDevice->lock);
879 return; 879 return;
880 } 880 }
@@ -971,7 +971,7 @@ s_bCommandComplete (
971 971
972 } 972 }
973 973
974 vCommandTimerWait((HANDLE)pDevice, 0); 974 vCommandTimerWait((void *)pDevice, 0);
975 } 975 }
976 976
977 return TRUE; 977 return TRUE;
@@ -980,9 +980,9 @@ s_bCommandComplete (
980 980
981 981
982BOOL bScheduleCommand ( 982BOOL bScheduleCommand (
983 IN HANDLE hDeviceContext, 983 void *hDeviceContext,
984 IN CMD_CODE eCommand, 984 CMD_CODE eCommand,
985 IN PBYTE pbyItem0 985 PBYTE pbyItem0
986 ) 986 )
987{ 987{
988 PSDevice pDevice = (PSDevice)hDeviceContext; 988 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1061,7 +1061,7 @@ BOOL bScheduleCommand (
1061 * 1061 *
1062 */ 1062 */
1063BOOL bClearBSSID_SCAN ( 1063BOOL bClearBSSID_SCAN (
1064 IN HANDLE hDeviceContext 1064 void *hDeviceContext
1065 ) 1065 )
1066{ 1066{
1067 PSDevice pDevice = (PSDevice)hDeviceContext; 1067 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1081,9 +1081,9 @@ BOOL bClearBSSID_SCAN (
1081} 1081}
1082 1082
1083//mike add:reset command timer 1083//mike add:reset command timer
1084VOID 1084void
1085vResetCommandTimer( 1085vResetCommandTimer(
1086 IN HANDLE hDeviceContext 1086 void *hDeviceContext
1087 ) 1087 )
1088{ 1088{
1089 PSDevice pDevice = (PSDevice)hDeviceContext; 1089 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1105,9 +1105,9 @@ vResetCommandTimer(
1105 1105
1106 1106
1107#ifdef TxInSleep 1107#ifdef TxInSleep
1108VOID 1108void
1109BSSvSecondTxData( 1109BSSvSecondTxData(
1110 IN HANDLE hDeviceContext 1110 void *hDeviceContext
1111 ) 1111 )
1112{ 1112{
1113 PSDevice pDevice = (PSDevice)hDeviceContext; 1113 PSDevice pDevice = (PSDevice)hDeviceContext;
diff --git a/drivers/staging/vt6655/wcmd.h b/drivers/staging/vt6655/wcmd.h
index af32e57e335f..c3c418089513 100644
--- a/drivers/staging/vt6655/wcmd.h
+++ b/drivers/staging/vt6655/wcmd.h
@@ -109,36 +109,36 @@ typedef enum tagCMD_STATE {
109 109
110 110
111/*--------------------- Export Functions --------------------------*/ 111/*--------------------- Export Functions --------------------------*/
112VOID 112void
113vResetCommandTimer( 113vResetCommandTimer(
114 IN HANDLE hDeviceContext 114 void *hDeviceContext
115 ); 115 );
116 116
117VOID 117void
118vCommandTimer ( 118vCommandTimer (
119 IN HANDLE hDeviceContext 119 void *hDeviceContext
120 ); 120 );
121 121
122BOOL bClearBSSID_SCAN( 122BOOL bClearBSSID_SCAN(
123 IN HANDLE hDeviceContext 123 void *hDeviceContext
124 ); 124 );
125 125
126BOOL 126BOOL
127bScheduleCommand( 127bScheduleCommand(
128 IN HANDLE hDeviceContext, 128 void *hDeviceContext,
129 IN CMD_CODE eCommand, 129 CMD_CODE eCommand,
130 IN PBYTE pbyItem0 130 PBYTE pbyItem0
131 ); 131 );
132 132
133VOID 133void
134vCommandTimerWait( 134vCommandTimerWait(
135 IN HANDLE hDeviceContext, 135 void *hDeviceContext,
136 IN UINT MSecond 136 UINT MSecond
137 ); 137 );
138#ifdef TxInSleep 138#ifdef TxInSleep
139VOID 139void
140BSSvSecondTxData( 140BSSvSecondTxData(
141 IN HANDLE hDeviceContext 141 void *hDeviceContext
142 ); 142 );
143#endif 143#endif
144 144
diff --git a/drivers/staging/vt6655/wctl.c b/drivers/staging/vt6655/wctl.c
index 4406f8caa555..64a66b2f1fc5 100644
--- a/drivers/staging/vt6655/wctl.c
+++ b/drivers/staging/vt6655/wctl.c
@@ -89,7 +89,7 @@ BOOL WCTLbIsDuplicate (PSCache pCache, PS802_11Header pMACHeader)
89 /* Not fount in cache - insert */ 89 /* Not fount in cache - insert */
90 pCacheEntry = &pCache->asCacheEntry[pCache->uInPtr]; 90 pCacheEntry = &pCache->asCacheEntry[pCache->uInPtr];
91 pCacheEntry->wFmSequence = pMACHeader->wSeqCtl; 91 pCacheEntry->wFmSequence = pMACHeader->wSeqCtl;
92 memcpy(&(pCacheEntry->abyAddr2[0]), &(pMACHeader->abyAddr2[0]), U_ETHER_ADDR_LEN); 92 memcpy(&(pCacheEntry->abyAddr2[0]), &(pMACHeader->abyAddr2[0]), ETH_ALEN);
93 ADD_ONE_WITH_WRAP_AROUND(pCache->uInPtr, DUPLICATE_RX_CACHE_LENGTH); 93 ADD_ONE_WITH_WRAP_AROUND(pCache->uInPtr, DUPLICATE_RX_CACHE_LENGTH);
94 return FALSE; 94 return FALSE;
95} 95}
@@ -151,7 +151,7 @@ UINT ii;
151 pDevice->sRxDFCB[ii].bInUse = TRUE; 151 pDevice->sRxDFCB[ii].bInUse = TRUE;
152 pDevice->sRxDFCB[ii].wSequence = (pMACHeader->wSeqCtl >> 4); 152 pDevice->sRxDFCB[ii].wSequence = (pMACHeader->wSeqCtl >> 4);
153 pDevice->sRxDFCB[ii].wFragNum = (pMACHeader->wSeqCtl & 0x000F); 153 pDevice->sRxDFCB[ii].wFragNum = (pMACHeader->wSeqCtl & 0x000F);
154 memcpy(&(pDevice->sRxDFCB[ii].abyAddr2[0]), &(pMACHeader->abyAddr2[0]), U_ETHER_ADDR_LEN); 154 memcpy(&(pDevice->sRxDFCB[ii].abyAddr2[0]), &(pMACHeader->abyAddr2[0]), ETH_ALEN);
155 return(ii); 155 return(ii);
156 } 156 }
157 } 157 }
diff --git a/drivers/staging/vt6655/wmgr.c b/drivers/staging/vt6655/wmgr.c
index 659be05a33ef..8af356fd139e 100644
--- a/drivers/staging/vt6655/wmgr.c
+++ b/drivers/staging/vt6655/wmgr.c
@@ -94,160 +94,160 @@ static int msglevel =MSG_LEVEL_INFO;
94/*--------------------- Static Functions --------------------------*/ 94/*--------------------- Static Functions --------------------------*/
95//2008-8-4 <add> by chester 95//2008-8-4 <add> by chester
96static BOOL ChannelExceedZoneType( 96static BOOL ChannelExceedZoneType(
97 IN PSDevice pDevice, 97 PSDevice pDevice,
98 IN BYTE byCurrChannel 98 BYTE byCurrChannel
99 ); 99 );
100 100
101// Association/diassociation functions 101// Association/diassociation functions
102static 102static
103PSTxMgmtPacket 103PSTxMgmtPacket
104s_MgrMakeAssocRequest( 104s_MgrMakeAssocRequest(
105 IN PSDevice pDevice, 105 PSDevice pDevice,
106 IN PSMgmtObject pMgmt, 106 PSMgmtObject pMgmt,
107 IN PBYTE pDAddr, 107 PBYTE pDAddr,
108 IN WORD wCurrCapInfo, 108 WORD wCurrCapInfo,
109 IN WORD wListenInterval, 109 WORD wListenInterval,
110 IN PWLAN_IE_SSID pCurrSSID, 110 PWLAN_IE_SSID pCurrSSID,
111 IN PWLAN_IE_SUPP_RATES pCurrRates, 111 PWLAN_IE_SUPP_RATES pCurrRates,
112 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 112 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
113 ); 113 );
114 114
115static 115static
116VOID 116void
117s_vMgrRxAssocRequest( 117s_vMgrRxAssocRequest(
118 IN PSDevice pDevice, 118 PSDevice pDevice,
119 IN PSMgmtObject pMgmt, 119 PSMgmtObject pMgmt,
120 IN PSRxMgmtPacket pRxPacket, 120 PSRxMgmtPacket pRxPacket,
121 IN UINT uNodeIndex 121 UINT uNodeIndex
122 ); 122 );
123 123
124static 124static
125PSTxMgmtPacket 125PSTxMgmtPacket
126s_MgrMakeReAssocRequest( 126s_MgrMakeReAssocRequest(
127 IN PSDevice pDevice, 127 PSDevice pDevice,
128 IN PSMgmtObject pMgmt, 128 PSMgmtObject pMgmt,
129 IN PBYTE pDAddr, 129 PBYTE pDAddr,
130 IN WORD wCurrCapInfo, 130 WORD wCurrCapInfo,
131 IN WORD wListenInterval, 131 WORD wListenInterval,
132 IN PWLAN_IE_SSID pCurrSSID, 132 PWLAN_IE_SSID pCurrSSID,
133 IN PWLAN_IE_SUPP_RATES pCurrRates, 133 PWLAN_IE_SUPP_RATES pCurrRates,
134 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 134 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
135 ); 135 );
136 136
137static 137static
138VOID 138void
139s_vMgrRxAssocResponse( 139s_vMgrRxAssocResponse(
140 IN PSDevice pDevice, 140 PSDevice pDevice,
141 IN PSMgmtObject pMgmt, 141 PSMgmtObject pMgmt,
142 IN PSRxMgmtPacket pRxPacket, 142 PSRxMgmtPacket pRxPacket,
143 IN BOOL bReAssocType 143 BOOL bReAssocType
144 ); 144 );
145 145
146static 146static
147VOID 147void
148s_vMgrRxDisassociation( 148s_vMgrRxDisassociation(
149 IN PSDevice pDevice, 149 PSDevice pDevice,
150 IN PSMgmtObject pMgmt, 150 PSMgmtObject pMgmt,
151 IN PSRxMgmtPacket pRxPacket 151 PSRxMgmtPacket pRxPacket
152 ); 152 );
153 153
154// Authentication/deauthen functions 154// Authentication/deauthen functions
155static 155static
156VOID 156void
157s_vMgrRxAuthenSequence_1( 157s_vMgrRxAuthenSequence_1(
158 IN PSDevice pDevice, 158 PSDevice pDevice,
159 IN PSMgmtObject pMgmt, 159 PSMgmtObject pMgmt,
160 IN PWLAN_FR_AUTHEN pFrame 160 PWLAN_FR_AUTHEN pFrame
161 ); 161 );
162 162
163static 163static
164VOID 164void
165s_vMgrRxAuthenSequence_2( 165s_vMgrRxAuthenSequence_2(
166 IN PSDevice pDevice, 166 PSDevice pDevice,
167 IN PSMgmtObject pMgmt, 167 PSMgmtObject pMgmt,
168 IN PWLAN_FR_AUTHEN pFrame 168 PWLAN_FR_AUTHEN pFrame
169 ); 169 );
170 170
171static 171static
172VOID 172void
173s_vMgrRxAuthenSequence_3( 173s_vMgrRxAuthenSequence_3(
174 IN PSDevice pDevice, 174 PSDevice pDevice,
175 IN PSMgmtObject pMgmt, 175 PSMgmtObject pMgmt,
176 IN PWLAN_FR_AUTHEN pFrame 176 PWLAN_FR_AUTHEN pFrame
177 ); 177 );
178 178
179static 179static
180VOID 180void
181s_vMgrRxAuthenSequence_4( 181s_vMgrRxAuthenSequence_4(
182 IN PSDevice pDevice, 182 PSDevice pDevice,
183 IN PSMgmtObject pMgmt, 183 PSMgmtObject pMgmt,
184 IN PWLAN_FR_AUTHEN pFrame 184 PWLAN_FR_AUTHEN pFrame
185 ); 185 );
186 186
187static 187static
188VOID 188void
189s_vMgrRxAuthentication( 189s_vMgrRxAuthentication(
190 IN PSDevice pDevice, 190 PSDevice pDevice,
191 IN PSMgmtObject pMgmt, 191 PSMgmtObject pMgmt,
192 IN PSRxMgmtPacket pRxPacket 192 PSRxMgmtPacket pRxPacket
193 ); 193 );
194 194
195static 195static
196VOID 196void
197s_vMgrRxDeauthentication( 197s_vMgrRxDeauthentication(
198 IN PSDevice pDevice, 198 PSDevice pDevice,
199 IN PSMgmtObject pMgmt, 199 PSMgmtObject pMgmt,
200 IN PSRxMgmtPacket pRxPacket 200 PSRxMgmtPacket pRxPacket
201 ); 201 );
202 202
203// Scan functions 203// Scan functions
204// probe request/response functions 204// probe request/response functions
205static 205static
206VOID 206void
207s_vMgrRxProbeRequest( 207s_vMgrRxProbeRequest(
208 IN PSDevice pDevice, 208 PSDevice pDevice,
209 IN PSMgmtObject pMgmt, 209 PSMgmtObject pMgmt,
210 IN PSRxMgmtPacket pRxPacket 210 PSRxMgmtPacket pRxPacket
211 ); 211 );
212 212
213static 213static
214VOID 214void
215s_vMgrRxProbeResponse( 215s_vMgrRxProbeResponse(
216 IN PSDevice pDevice, 216 PSDevice pDevice,
217 IN PSMgmtObject pMgmt, 217 PSMgmtObject pMgmt,
218 IN PSRxMgmtPacket pRxPacket 218 PSRxMgmtPacket pRxPacket
219 ); 219 );
220 220
221// beacon functions 221// beacon functions
222static 222static
223VOID 223void
224s_vMgrRxBeacon( 224s_vMgrRxBeacon(
225 IN PSDevice pDevice, 225 PSDevice pDevice,
226 IN PSMgmtObject pMgmt, 226 PSMgmtObject pMgmt,
227 IN PSRxMgmtPacket pRxPacket, 227 PSRxMgmtPacket pRxPacket,
228 IN BOOL bInScan 228 BOOL bInScan
229 ); 229 );
230 230
231static 231static
232VOID 232void
233s_vMgrFormatTIM( 233s_vMgrFormatTIM(
234 IN PSMgmtObject pMgmt, 234 PSMgmtObject pMgmt,
235 IN PWLAN_IE_TIM pTIM 235 PWLAN_IE_TIM pTIM
236 ); 236 );
237 237
238static 238static
239PSTxMgmtPacket 239PSTxMgmtPacket
240s_MgrMakeBeacon( 240s_MgrMakeBeacon(
241 IN PSDevice pDevice, 241 PSDevice pDevice,
242 IN PSMgmtObject pMgmt, 242 PSMgmtObject pMgmt,
243 IN WORD wCurrCapInfo, 243 WORD wCurrCapInfo,
244 IN WORD wCurrBeaconPeriod, 244 WORD wCurrBeaconPeriod,
245 IN UINT uCurrChannel, 245 UINT uCurrChannel,
246 IN WORD wCurrATIMWinodw, 246 WORD wCurrATIMWinodw,
247 IN PWLAN_IE_SSID pCurrSSID, 247 PWLAN_IE_SSID pCurrSSID,
248 IN PBYTE pCurrBSSID, 248 PBYTE pCurrBSSID,
249 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 249 PWLAN_IE_SUPP_RATES pCurrSuppRates,
250 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 250 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
251 ); 251 );
252 252
253 253
@@ -255,78 +255,78 @@ s_MgrMakeBeacon(
255static 255static
256PSTxMgmtPacket 256PSTxMgmtPacket
257s_MgrMakeAssocResponse( 257s_MgrMakeAssocResponse(
258 IN PSDevice pDevice, 258 PSDevice pDevice,
259 IN PSMgmtObject pMgmt, 259 PSMgmtObject pMgmt,
260 IN WORD wCurrCapInfo, 260 WORD wCurrCapInfo,
261 IN WORD wAssocStatus, 261 WORD wAssocStatus,
262 IN WORD wAssocAID, 262 WORD wAssocAID,
263 IN PBYTE pDstAddr, 263 PBYTE pDstAddr,
264 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 264 PWLAN_IE_SUPP_RATES pCurrSuppRates,
265 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 265 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
266 ); 266 );
267 267
268// ReAssociation response 268// ReAssociation response
269static 269static
270PSTxMgmtPacket 270PSTxMgmtPacket
271s_MgrMakeReAssocResponse( 271s_MgrMakeReAssocResponse(
272 IN PSDevice pDevice, 272 PSDevice pDevice,
273 IN PSMgmtObject pMgmt, 273 PSMgmtObject pMgmt,
274 IN WORD wCurrCapInfo, 274 WORD wCurrCapInfo,
275 IN WORD wAssocStatus, 275 WORD wAssocStatus,
276 IN WORD wAssocAID, 276 WORD wAssocAID,
277 IN PBYTE pDstAddr, 277 PBYTE pDstAddr,
278 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 278 PWLAN_IE_SUPP_RATES pCurrSuppRates,
279 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 279 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
280 ); 280 );
281 281
282// Probe response 282// Probe response
283static 283static
284PSTxMgmtPacket 284PSTxMgmtPacket
285s_MgrMakeProbeResponse( 285s_MgrMakeProbeResponse(
286 IN PSDevice pDevice, 286 PSDevice pDevice,
287 IN PSMgmtObject pMgmt, 287 PSMgmtObject pMgmt,
288 IN WORD wCurrCapInfo, 288 WORD wCurrCapInfo,
289 IN WORD wCurrBeaconPeriod, 289 WORD wCurrBeaconPeriod,
290 IN UINT uCurrChannel, 290 UINT uCurrChannel,
291 IN WORD wCurrATIMWinodw, 291 WORD wCurrATIMWinodw,
292 IN PBYTE pDstAddr, 292 PBYTE pDstAddr,
293 IN PWLAN_IE_SSID pCurrSSID, 293 PWLAN_IE_SSID pCurrSSID,
294 IN PBYTE pCurrBSSID, 294 PBYTE pCurrBSSID,
295 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 295 PWLAN_IE_SUPP_RATES pCurrSuppRates,
296 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates, 296 PWLAN_IE_SUPP_RATES pCurrExtSuppRates,
297 IN BYTE byPHYType 297 BYTE byPHYType
298 ); 298 );
299 299
300// received status 300// received status
301static 301static
302VOID 302void
303s_vMgrLogStatus( 303s_vMgrLogStatus(
304 IN PSMgmtObject pMgmt, 304 PSMgmtObject pMgmt,
305 IN WORD wStatus 305 WORD wStatus
306 ); 306 );
307 307
308 308
309static 309static
310VOID 310void
311s_vMgrSynchBSS ( 311s_vMgrSynchBSS (
312 IN PSDevice pDevice, 312 PSDevice pDevice,
313 IN UINT uBSSMode, 313 UINT uBSSMode,
314 IN PKnownBSS pCurr, 314 PKnownBSS pCurr,
315 OUT PCMD_STATUS pStatus 315 PCMD_STATUS pStatus
316 ); 316 );
317 317
318 318
319static BOOL 319static BOOL
320s_bCipherMatch ( 320s_bCipherMatch (
321 IN PKnownBSS pBSSNode, 321 PKnownBSS pBSSNode,
322 IN NDIS_802_11_ENCRYPTION_STATUS EncStatus, 322 NDIS_802_11_ENCRYPTION_STATUS EncStatus,
323 OUT PBYTE pbyCCSPK, 323 PBYTE pbyCCSPK,
324 OUT PBYTE pbyCCSGK 324 PBYTE pbyCCSGK
325 ); 325 );
326 326
327 static VOID Encyption_Rebuild( 327 static void Encyption_Rebuild(
328 IN PSDevice pDevice, 328 PSDevice pDevice,
329 IN PKnownBSS pCurr 329 PKnownBSS pCurr
330 ); 330 );
331 331
332 332
@@ -347,9 +347,9 @@ s_bCipherMatch (
347 * 347 *
348-*/ 348-*/
349 349
350VOID 350void
351vMgrObjectInit( 351vMgrObjectInit(
352 IN HANDLE hDeviceContext 352 void *hDeviceContext
353 ) 353 )
354{ 354{
355 PSDevice pDevice = (PSDevice)hDeviceContext; 355 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -368,7 +368,7 @@ vMgrObjectInit(
368 pMgmt->byCSSPK = KEY_CTL_NONE; 368 pMgmt->byCSSPK = KEY_CTL_NONE;
369 pMgmt->byCSSGK = KEY_CTL_NONE; 369 pMgmt->byCSSGK = KEY_CTL_NONE;
370 pMgmt->wIBSSBeaconPeriod = DEFAULT_IBSS_BI; 370 pMgmt->wIBSSBeaconPeriod = DEFAULT_IBSS_BI;
371 BSSvClearBSSList((HANDLE)pDevice, FALSE); 371 BSSvClearBSSList((void *)pDevice, FALSE);
372 372
373 return; 373 return;
374} 374}
@@ -385,7 +385,7 @@ vMgrObjectInit(
385 385
386void 386void
387vMgrTimerInit( 387vMgrTimerInit(
388 IN HANDLE hDeviceContext 388 void *hDeviceContext
389 ) 389 )
390{ 390{
391 PSDevice pDevice = (PSDevice)hDeviceContext; 391 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -431,9 +431,9 @@ vMgrTimerInit(
431 * 431 *
432-*/ 432-*/
433 433
434VOID 434void
435vMgrObjectReset( 435vMgrObjectReset(
436 IN HANDLE hDeviceContext 436 void *hDeviceContext
437 ) 437 )
438{ 438{
439 PSDevice pDevice = (PSDevice)hDeviceContext; 439 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -460,11 +460,11 @@ vMgrObjectReset(
460-*/ 460-*/
461 461
462 462
463VOID 463void
464vMgrAssocBeginSta( 464vMgrAssocBeginSta(
465 IN HANDLE hDeviceContext, 465 void *hDeviceContext,
466 IN PSMgmtObject pMgmt, 466 PSMgmtObject pMgmt,
467 OUT PCMD_STATUS pStatus 467 PCMD_STATUS pStatus
468 ) 468 )
469{ 469{
470 PSDevice pDevice = (PSDevice)hDeviceContext; 470 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -536,11 +536,11 @@ vMgrAssocBeginSta(
536 * 536 *
537-*/ 537-*/
538 538
539VOID 539void
540vMgrReAssocBeginSta( 540vMgrReAssocBeginSta(
541 IN HANDLE hDeviceContext, 541 void *hDeviceContext,
542 IN PSMgmtObject pMgmt, 542 PSMgmtObject pMgmt,
543 OUT PCMD_STATUS pStatus 543 PCMD_STATUS pStatus
544 ) 544 )
545{ 545{
546 PSDevice pDevice = (PSDevice)hDeviceContext; 546 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -615,13 +615,13 @@ vMgrReAssocBeginSta(
615 * 615 *
616-*/ 616-*/
617 617
618VOID 618void
619vMgrDisassocBeginSta( 619vMgrDisassocBeginSta(
620 IN HANDLE hDeviceContext, 620 void *hDeviceContext,
621 IN PSMgmtObject pMgmt, 621 PSMgmtObject pMgmt,
622 IN PBYTE abyDestAddress, 622 PBYTE abyDestAddress,
623 IN WORD wReason, 623 WORD wReason,
624 OUT PCMD_STATUS pStatus 624 PCMD_STATUS pStatus
625 ) 625 )
626{ 626{
627 PSDevice pDevice = (PSDevice)hDeviceContext; 627 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -678,12 +678,12 @@ vMgrDisassocBeginSta(
678-*/ 678-*/
679 679
680static 680static
681VOID 681void
682s_vMgrRxAssocRequest( 682s_vMgrRxAssocRequest(
683 IN PSDevice pDevice, 683 PSDevice pDevice,
684 IN PSMgmtObject pMgmt, 684 PSMgmtObject pMgmt,
685 IN PSRxMgmtPacket pRxPacket, 685 PSRxMgmtPacket pRxPacket,
686 IN UINT uNodeIndex 686 UINT uNodeIndex
687 ) 687 )
688{ 688{
689 WLAN_FR_ASSOCREQ sFrame; 689 WLAN_FR_ASSOCREQ sFrame;
@@ -736,7 +736,7 @@ s_vMgrRxAssocRequest(
736 } 736 }
737 737
738 738
739 RATEvParseMaxRate((PVOID)pDevice, 739 RATEvParseMaxRate((void *)pDevice,
740 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates, 740 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates,
741 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates, 741 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates,
742 FALSE, // do not change our basic rate 742 FALSE, // do not change our basic rate
@@ -840,12 +840,12 @@ s_vMgrRxAssocRequest(
840-*/ 840-*/
841 841
842static 842static
843VOID 843void
844s_vMgrRxReAssocRequest( 844s_vMgrRxReAssocRequest(
845 IN PSDevice pDevice, 845 PSDevice pDevice,
846 IN PSMgmtObject pMgmt, 846 PSMgmtObject pMgmt,
847 IN PSRxMgmtPacket pRxPacket, 847 PSRxMgmtPacket pRxPacket,
848 IN UINT uNodeIndex 848 UINT uNodeIndex
849 ) 849 )
850{ 850{
851 WLAN_FR_REASSOCREQ sFrame; 851 WLAN_FR_REASSOCREQ sFrame;
@@ -895,7 +895,7 @@ s_vMgrRxReAssocRequest(
895 } 895 }
896 896
897 897
898 RATEvParseMaxRate((PVOID)pDevice, 898 RATEvParseMaxRate((void *)pDevice,
899 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates, 899 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates,
900 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates, 900 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates,
901 FALSE, // do not change our basic rate 901 FALSE, // do not change our basic rate
@@ -990,12 +990,12 @@ s_vMgrRxReAssocRequest(
990-*/ 990-*/
991 991
992static 992static
993VOID 993void
994s_vMgrRxAssocResponse( 994s_vMgrRxAssocResponse(
995 IN PSDevice pDevice, 995 PSDevice pDevice,
996 IN PSMgmtObject pMgmt, 996 PSMgmtObject pMgmt,
997 IN PSRxMgmtPacket pRxPacket, 997 PSRxMgmtPacket pRxPacket,
998 IN BOOL bReAssocType 998 BOOL bReAssocType
999 ) 999 )
1000{ 1000{
1001 WLAN_FR_ASSOCRESP sFrame; 1001 WLAN_FR_ASSOCRESP sFrame;
@@ -1041,7 +1041,7 @@ s_vMgrRxAssocResponse(
1041 }; 1041 };
1042 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Association Successful, AID=%d.\n", pMgmt->wCurrAID & ~(BIT14|BIT15)); 1042 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Association Successful, AID=%d.\n", pMgmt->wCurrAID & ~(BIT14|BIT15));
1043 pMgmt->eCurrState = WMAC_STATE_ASSOC; 1043 pMgmt->eCurrState = WMAC_STATE_ASSOC;
1044 BSSvUpdateAPNode((HANDLE)pDevice, sFrame.pwCapInfo, sFrame.pSuppRates, sFrame.pExtSuppRates); 1044 BSSvUpdateAPNode((void *)pDevice, sFrame.pwCapInfo, sFrame.pSuppRates, sFrame.pExtSuppRates);
1045 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID; 1045 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID;
1046 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Link with AP(SSID): %s\n", pItemSSID->abySSID); 1046 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Link with AP(SSID): %s\n", pItemSSID->abySSID);
1047 pDevice->bLinkPass = TRUE; 1047 pDevice->bLinkPass = TRUE;
@@ -1150,11 +1150,11 @@ if(pMgmt->eCurrState == WMAC_STATE_ASSOC)
1150 * 1150 *
1151-*/ 1151-*/
1152 1152
1153VOID 1153void
1154vMgrAuthenBeginSta( 1154vMgrAuthenBeginSta(
1155 IN HANDLE hDeviceContext, 1155 void *hDeviceContext,
1156 IN PSMgmtObject pMgmt, 1156 PSMgmtObject pMgmt,
1157 OUT PCMD_STATUS pStatus 1157 PCMD_STATUS pStatus
1158 ) 1158 )
1159{ 1159{
1160 PSDevice pDevice = (PSDevice)hDeviceContext; 1160 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1208,13 +1208,13 @@ vMgrAuthenBeginSta(
1208 * 1208 *
1209-*/ 1209-*/
1210 1210
1211VOID 1211void
1212vMgrDeAuthenBeginSta( 1212vMgrDeAuthenBeginSta(
1213 IN HANDLE hDeviceContext, 1213 void *hDeviceContext,
1214 IN PSMgmtObject pMgmt, 1214 PSMgmtObject pMgmt,
1215 IN PBYTE abyDestAddress, 1215 PBYTE abyDestAddress,
1216 IN WORD wReason, 1216 WORD wReason,
1217 OUT PCMD_STATUS pStatus 1217 PCMD_STATUS pStatus
1218 ) 1218 )
1219{ 1219{
1220 PSDevice pDevice = (PSDevice)hDeviceContext; 1220 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -1265,11 +1265,11 @@ vMgrDeAuthenBeginSta(
1265-*/ 1265-*/
1266 1266
1267static 1267static
1268VOID 1268void
1269s_vMgrRxAuthentication( 1269s_vMgrRxAuthentication(
1270 IN PSDevice pDevice, 1270 PSDevice pDevice,
1271 IN PSMgmtObject pMgmt, 1271 PSMgmtObject pMgmt,
1272 IN PSRxMgmtPacket pRxPacket 1272 PSRxMgmtPacket pRxPacket
1273 ) 1273 )
1274{ 1274{
1275 WLAN_FR_AUTHEN sFrame; 1275 WLAN_FR_AUTHEN sFrame;
@@ -1323,11 +1323,11 @@ s_vMgrRxAuthentication(
1323 1323
1324 1324
1325static 1325static
1326VOID 1326void
1327s_vMgrRxAuthenSequence_1( 1327s_vMgrRxAuthenSequence_1(
1328 IN PSDevice pDevice, 1328 PSDevice pDevice,
1329 IN PSMgmtObject pMgmt, 1329 PSMgmtObject pMgmt,
1330 IN PWLAN_FR_AUTHEN pFrame 1330 PWLAN_FR_AUTHEN pFrame
1331 ) 1331 )
1332{ 1332{
1333 PSTxMgmtPacket pTxPacket = NULL; 1333 PSTxMgmtPacket pTxPacket = NULL;
@@ -1429,11 +1429,11 @@ s_vMgrRxAuthenSequence_1(
1429-*/ 1429-*/
1430 1430
1431static 1431static
1432VOID 1432void
1433s_vMgrRxAuthenSequence_2( 1433s_vMgrRxAuthenSequence_2(
1434 IN PSDevice pDevice, 1434 PSDevice pDevice,
1435 IN PSMgmtObject pMgmt, 1435 PSMgmtObject pMgmt,
1436 IN PWLAN_FR_AUTHEN pFrame 1436 PWLAN_FR_AUTHEN pFrame
1437 ) 1437 )
1438{ 1438{
1439 WLAN_FR_AUTHEN sFrame; 1439 WLAN_FR_AUTHEN sFrame;
@@ -1455,7 +1455,7 @@ s_vMgrRxAuthenSequence_2(
1455 } 1455 }
1456 if (pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) { 1456 if (pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) {
1457// spin_unlock_irq(&pDevice->lock); 1457// spin_unlock_irq(&pDevice->lock);
1458// vCommandTimerWait((HANDLE)pDevice, 0); 1458// vCommandTimerWait((void *)pDevice, 0);
1459// spin_lock_irq(&pDevice->lock); 1459// spin_lock_irq(&pDevice->lock);
1460 } 1460 }
1461 1461
@@ -1502,7 +1502,7 @@ s_vMgrRxAuthenSequence_2(
1502 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Mgt:rx Auth_reply sequence_2 status error ...\n"); 1502 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Mgt:rx Auth_reply sequence_2 status error ...\n");
1503 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) { 1503 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) {
1504// spin_unlock_irq(&pDevice->lock); 1504// spin_unlock_irq(&pDevice->lock);
1505// vCommandTimerWait((HANDLE)pDevice, 0); 1505// vCommandTimerWait((void *)pDevice, 0);
1506// spin_lock_irq(&pDevice->lock); 1506// spin_lock_irq(&pDevice->lock);
1507 } 1507 }
1508 s_vMgrLogStatus(pMgmt, cpu_to_le16((*(pFrame->pwStatus)))); 1508 s_vMgrLogStatus(pMgmt, cpu_to_le16((*(pFrame->pwStatus))));
@@ -1531,11 +1531,11 @@ s_vMgrRxAuthenSequence_2(
1531-*/ 1531-*/
1532 1532
1533static 1533static
1534VOID 1534void
1535s_vMgrRxAuthenSequence_3( 1535s_vMgrRxAuthenSequence_3(
1536 IN PSDevice pDevice, 1536 PSDevice pDevice,
1537 IN PSMgmtObject pMgmt, 1537 PSMgmtObject pMgmt,
1538 IN PWLAN_FR_AUTHEN pFrame 1538 PWLAN_FR_AUTHEN pFrame
1539 ) 1539 )
1540{ 1540{
1541 PSTxMgmtPacket pTxPacket = NULL; 1541 PSTxMgmtPacket pTxPacket = NULL;
@@ -1619,11 +1619,11 @@ reply:
1619 * 1619 *
1620-*/ 1620-*/
1621static 1621static
1622VOID 1622void
1623s_vMgrRxAuthenSequence_4( 1623s_vMgrRxAuthenSequence_4(
1624 IN PSDevice pDevice, 1624 PSDevice pDevice,
1625 IN PSMgmtObject pMgmt, 1625 PSMgmtObject pMgmt,
1626 IN PWLAN_FR_AUTHEN pFrame 1626 PWLAN_FR_AUTHEN pFrame
1627 ) 1627 )
1628{ 1628{
1629 1629
@@ -1640,7 +1640,7 @@ s_vMgrRxAuthenSequence_4(
1640 1640
1641 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) { 1641 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) {
1642// spin_unlock_irq(&pDevice->lock); 1642// spin_unlock_irq(&pDevice->lock);
1643// vCommandTimerWait((HANDLE)pDevice, 0); 1643// vCommandTimerWait((void *)pDevice, 0);
1644// spin_lock_irq(&pDevice->lock); 1644// spin_lock_irq(&pDevice->lock);
1645 } 1645 }
1646 1646
@@ -1658,11 +1658,11 @@ s_vMgrRxAuthenSequence_4(
1658-*/ 1658-*/
1659 1659
1660static 1660static
1661VOID 1661void
1662s_vMgrRxDisassociation( 1662s_vMgrRxDisassociation(
1663 IN PSDevice pDevice, 1663 PSDevice pDevice,
1664 IN PSMgmtObject pMgmt, 1664 PSMgmtObject pMgmt,
1665 IN PSRxMgmtPacket pRxPacket 1665 PSRxMgmtPacket pRxPacket
1666 ) 1666 )
1667{ 1667{
1668 WLAN_FR_DISASSOC sFrame; 1668 WLAN_FR_DISASSOC sFrame;
@@ -1737,11 +1737,11 @@ s_vMgrRxDisassociation(
1737-*/ 1737-*/
1738 1738
1739static 1739static
1740VOID 1740void
1741s_vMgrRxDeauthentication( 1741s_vMgrRxDeauthentication(
1742 IN PSDevice pDevice, 1742 PSDevice pDevice,
1743 IN PSMgmtObject pMgmt, 1743 PSMgmtObject pMgmt,
1744 IN PSRxMgmtPacket pRxPacket 1744 PSRxMgmtPacket pRxPacket
1745 ) 1745 )
1746{ 1746{
1747 WLAN_FR_DEAUTHEN sFrame; 1747 WLAN_FR_DEAUTHEN sFrame;
@@ -1827,8 +1827,8 @@ s_vMgrRxDeauthentication(
1827-*/ 1827-*/
1828static BOOL 1828static BOOL
1829ChannelExceedZoneType( 1829ChannelExceedZoneType(
1830 IN PSDevice pDevice, 1830 PSDevice pDevice,
1831 IN BYTE byCurrChannel 1831 BYTE byCurrChannel
1832 ) 1832 )
1833{ 1833{
1834 BOOL exceed=FALSE; 1834 BOOL exceed=FALSE;
@@ -1863,12 +1863,12 @@ ChannelExceedZoneType(
1863-*/ 1863-*/
1864 1864
1865static 1865static
1866VOID 1866void
1867s_vMgrRxBeacon( 1867s_vMgrRxBeacon(
1868 IN PSDevice pDevice, 1868 PSDevice pDevice,
1869 IN PSMgmtObject pMgmt, 1869 PSMgmtObject pMgmt,
1870 IN PSRxMgmtPacket pRxPacket, 1870 PSRxMgmtPacket pRxPacket,
1871 IN BOOL bInScan 1871 BOOL bInScan
1872 ) 1872 )
1873{ 1873{
1874 1874
@@ -1943,10 +1943,10 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
1943 sERP.byERP = 0; 1943 sERP.byERP = 0;
1944 } 1944 }
1945 1945
1946 pBSSList = BSSpAddrIsInBSSList((HANDLE)pDevice, sFrame.pHdr->sA3.abyAddr3, sFrame.pSSID); 1946 pBSSList = BSSpAddrIsInBSSList((void *)pDevice, sFrame.pHdr->sA3.abyAddr3, sFrame.pSSID);
1947 if (pBSSList == NULL) { 1947 if (pBSSList == NULL) {
1948 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Beacon/insert: RxChannel = : %d\n", byCurrChannel); 1948 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Beacon/insert: RxChannel = : %d\n", byCurrChannel);
1949 BSSbInsertToBSSList((HANDLE)pDevice, 1949 BSSbInsertToBSSList((void *)pDevice,
1950 sFrame.pHdr->sA3.abyAddr3, 1950 sFrame.pHdr->sA3.abyAddr3,
1951 *sFrame.pqwTimestamp, 1951 *sFrame.pqwTimestamp,
1952 *sFrame.pwBeaconInterval, 1952 *sFrame.pwBeaconInterval,
@@ -1962,12 +1962,12 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
1962 sFrame.pIE_Quiet, 1962 sFrame.pIE_Quiet,
1963 sFrame.len - WLAN_HDR_ADDR3_LEN, 1963 sFrame.len - WLAN_HDR_ADDR3_LEN,
1964 sFrame.pHdr->sA4.abyAddr4, // payload of beacon 1964 sFrame.pHdr->sA4.abyAddr4, // payload of beacon
1965 (HANDLE)pRxPacket 1965 (void *)pRxPacket
1966 ); 1966 );
1967 } 1967 }
1968 else { 1968 else {
1969// DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"update bcn: RxChannel = : %d\n", byCurrChannel); 1969// DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"update bcn: RxChannel = : %d\n", byCurrChannel);
1970 BSSbUpdateToBSSList((HANDLE)pDevice, 1970 BSSbUpdateToBSSList((void *)pDevice,
1971 *sFrame.pqwTimestamp, 1971 *sFrame.pqwTimestamp,
1972 *sFrame.pwBeaconInterval, 1972 *sFrame.pwBeaconInterval,
1973 *sFrame.pwCapInfo, 1973 *sFrame.pwCapInfo,
@@ -1984,7 +1984,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
1984 pBSSList, 1984 pBSSList,
1985 sFrame.len - WLAN_HDR_ADDR3_LEN, 1985 sFrame.len - WLAN_HDR_ADDR3_LEN,
1986 sFrame.pHdr->sA4.abyAddr4, // payload of probresponse 1986 sFrame.pHdr->sA4.abyAddr4, // payload of probresponse
1987 (HANDLE)pRxPacket 1987 (void *)pRxPacket
1988 ); 1988 );
1989 1989
1990 } 1990 }
@@ -2091,7 +2091,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2091 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pBSSList->abyExtSuppRates, 2091 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pBSSList->abyExtSuppRates,
2092 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 2092 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
2093 uRateLen); 2093 uRateLen);
2094 RATEvParseMaxRate( (PVOID)pDevice, 2094 RATEvParseMaxRate( (void *)pDevice,
2095 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2095 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2096 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 2096 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
2097 TRUE, 2097 TRUE,
@@ -2256,7 +2256,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2256 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates, 2256 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates,
2257 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2257 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2258 WLAN_RATES_MAXLEN_11B); 2258 WLAN_RATES_MAXLEN_11B);
2259 RATEvParseMaxRate( (PVOID)pDevice, 2259 RATEvParseMaxRate( (void *)pDevice,
2260 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2260 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2261 NULL, 2261 NULL,
2262 TRUE, 2262 TRUE,
@@ -2277,7 +2277,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2277 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates, 2277 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates,
2278 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2278 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2279 WLAN_RATES_MAXLEN_11B); 2279 WLAN_RATES_MAXLEN_11B);
2280 RATEvParseMaxRate( (PVOID)pDevice, 2280 RATEvParseMaxRate( (void *)pDevice,
2281 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2281 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2282 NULL, 2282 NULL,
2283 TRUE, 2283 TRUE,
@@ -2353,7 +2353,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2353 // set highest basic rate 2353 // set highest basic rate
2354 // s_vSetHighestBasicRate(pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates); 2354 // s_vSetHighestBasicRate(pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates);
2355 // Prepare beacon frame 2355 // Prepare beacon frame
2356 bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt); 2356 bMgrPrepareBeaconToSend((void *)pDevice, pMgmt);
2357 // } 2357 // }
2358 }; 2358 };
2359 } 2359 }
@@ -2384,10 +2384,10 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2384 * CMD_STATUS 2384 * CMD_STATUS
2385 * 2385 *
2386-*/ 2386-*/
2387VOID 2387void
2388vMgrCreateOwnIBSS( 2388vMgrCreateOwnIBSS(
2389 IN HANDLE hDeviceContext, 2389 void *hDeviceContext,
2390 OUT PCMD_STATUS pStatus 2390 PCMD_STATUS pStatus
2391 ) 2391 )
2392{ 2392{
2393 PSDevice pDevice = (PSDevice)hDeviceContext; 2393 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -2485,7 +2485,7 @@ vMgrCreateOwnIBSS(
2485 2485
2486 // set basic rate 2486 // set basic rate
2487 2487
2488 RATEvParseMaxRate((PVOID)pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2488 RATEvParseMaxRate((void *)pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2489 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, TRUE, 2489 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, TRUE,
2490 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate, 2490 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
2491 &byTopCCKBasicRate, &byTopOFDMBasicRate); 2491 &byTopCCKBasicRate, &byTopOFDMBasicRate);
@@ -2629,7 +2629,7 @@ vMgrCreateOwnIBSS(
2629 2629
2630 pMgmt->eCurrState = WMAC_STATE_STARTED; 2630 pMgmt->eCurrState = WMAC_STATE_STARTED;
2631 // Prepare beacon to send 2631 // Prepare beacon to send
2632 if (bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt)) { 2632 if (bMgrPrepareBeaconToSend((void *)pDevice, pMgmt)) {
2633 *pStatus = CMD_STATUS_SUCCESS; 2633 *pStatus = CMD_STATUS_SUCCESS;
2634 } 2634 }
2635 2635
@@ -2651,10 +2651,10 @@ vMgrCreateOwnIBSS(
2651 * 2651 *
2652-*/ 2652-*/
2653 2653
2654VOID 2654void
2655vMgrJoinBSSBegin( 2655vMgrJoinBSSBegin(
2656 IN HANDLE hDeviceContext, 2656 void *hDeviceContext,
2657 OUT PCMD_STATUS pStatus 2657 PCMD_STATUS pStatus
2658 ) 2658 )
2659{ 2659{
2660 2660
@@ -2781,7 +2781,7 @@ vMgrJoinBSSBegin(
2781 } 2781 }
2782 } 2782 }
2783 2783
2784 RATEvParseMaxRate((PVOID)pDevice, pItemRates, pItemExtRates, TRUE, 2784 RATEvParseMaxRate((void *)pDevice, pItemRates, pItemExtRates, TRUE,
2785 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate, 2785 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
2786 &byTopCCKBasicRate, &byTopOFDMBasicRate); 2786 &byTopCCKBasicRate, &byTopOFDMBasicRate);
2787 2787
@@ -2802,12 +2802,12 @@ vMgrJoinBSSBegin(
2802 // Add current BSS to Candidate list 2802 // Add current BSS to Candidate list
2803 // This should only works for WPA2 BSS, and WPA2 BSS check must be done before. 2803 // This should only works for WPA2 BSS, and WPA2 BSS check must be done before.
2804 if (pMgmt->eAuthenMode == WMAC_AUTH_WPA2) { 2804 if (pMgmt->eAuthenMode == WMAC_AUTH_WPA2) {
2805 BOOL bResult = bAdd_PMKID_Candidate((HANDLE)pDevice, pMgmt->abyCurrBSSID, &pCurr->sRSNCapObj); 2805 BOOL bResult = bAdd_PMKID_Candidate((void *)pDevice, pMgmt->abyCurrBSSID, &pCurr->sRSNCapObj);
2806 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"bAdd_PMKID_Candidate: 1(%d)\n", bResult); 2806 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"bAdd_PMKID_Candidate: 1(%d)\n", bResult);
2807 if (bResult == FALSE) { 2807 if (bResult == FALSE) {
2808 vFlush_PMKID_Candidate((HANDLE)pDevice); 2808 vFlush_PMKID_Candidate((void *)pDevice);
2809 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"vFlush_PMKID_Candidate: 4\n"); 2809 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"vFlush_PMKID_Candidate: 4\n");
2810 bAdd_PMKID_Candidate((HANDLE)pDevice, pMgmt->abyCurrBSSID, &pCurr->sRSNCapObj); 2810 bAdd_PMKID_Candidate((void *)pDevice, pMgmt->abyCurrBSSID, &pCurr->sRSNCapObj);
2811 } 2811 }
2812 } 2812 }
2813 2813
@@ -2867,7 +2867,7 @@ vMgrJoinBSSBegin(
2867 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2867 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2868 WLAN_RATES_MAXLEN_11B); 2868 WLAN_RATES_MAXLEN_11B);
2869 // set basic rate 2869 // set basic rate
2870 RATEvParseMaxRate((PVOID)pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2870 RATEvParseMaxRate((void *)pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2871 NULL, TRUE, &wMaxBasicRate, &wMaxSuppRate, &wSuppRate, 2871 NULL, TRUE, &wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
2872 &byTopCCKBasicRate, &byTopOFDMBasicRate); 2872 &byTopCCKBasicRate, &byTopOFDMBasicRate);
2873 2873
@@ -2898,7 +2898,7 @@ vMgrJoinBSSBegin(
2898 // and if registry setting is short preamble we can turn on too. 2898 // and if registry setting is short preamble we can turn on too.
2899 2899
2900 // Prepare beacon 2900 // Prepare beacon
2901 bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt); 2901 bMgrPrepareBeaconToSend((void *)pDevice, pMgmt);
2902 } 2902 }
2903 else { 2903 else {
2904 pMgmt->eCurrState = WMAC_STATE_IDLE; 2904 pMgmt->eCurrState = WMAC_STATE_IDLE;
@@ -2920,12 +2920,12 @@ vMgrJoinBSSBegin(
2920 * 2920 *
2921-*/ 2921-*/
2922static 2922static
2923VOID 2923void
2924s_vMgrSynchBSS ( 2924s_vMgrSynchBSS (
2925 IN PSDevice pDevice, 2925 PSDevice pDevice,
2926 IN UINT uBSSMode, 2926 UINT uBSSMode,
2927 IN PKnownBSS pCurr, 2927 PKnownBSS pCurr,
2928 OUT PCMD_STATUS pStatus 2928 PCMD_STATUS pStatus
2929 ) 2929 )
2930{ 2930{
2931 CARD_PHY_TYPE ePhyType = PHY_TYPE_11B; 2931 CARD_PHY_TYPE ePhyType = PHY_TYPE_11B;
@@ -2967,7 +2967,7 @@ s_vMgrSynchBSS (
2967 pDevice->byPreambleType = 0; 2967 pDevice->byPreambleType = 0;
2968 pDevice->wBasicRate = 0; 2968 pDevice->wBasicRate = 0;
2969 // Set Basic Rate 2969 // Set Basic Rate
2970 CARDbAddBasicRate((PVOID)pDevice, RATE_1M); 2970 CARDbAddBasicRate((void *)pDevice, RATE_1M);
2971 // calculate TSF offset 2971 // calculate TSF offset
2972 // TSF Offset = Received Timestamp TSF - Marked Local's TSF 2972 // TSF Offset = Received Timestamp TSF - Marked Local's TSF
2973 CARDbUpdateTSF(pDevice, pCurr->byRxRate, pCurr->qwBSSTimestamp, pCurr->qwLocalTSF); 2973 CARDbUpdateTSF(pDevice, pCurr->byRxRate, pCurr->qwBSSTimestamp, pCurr->qwLocalTSF);
@@ -3088,9 +3088,9 @@ s_vMgrSynchBSS (
3088 3088
3089//mike add: fix NetworkManager 0.7.0 hidden ssid mode in WPA encryption 3089//mike add: fix NetworkManager 0.7.0 hidden ssid mode in WPA encryption
3090// ,need reset eAuthenMode and eEncryptionStatus 3090// ,need reset eAuthenMode and eEncryptionStatus
3091 static VOID Encyption_Rebuild( 3091 static void Encyption_Rebuild(
3092 IN PSDevice pDevice, 3092 PSDevice pDevice,
3093 IN PKnownBSS pCurr 3093 PKnownBSS pCurr
3094 ) 3094 )
3095 { 3095 {
3096 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 3096 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -3140,15 +3140,15 @@ s_vMgrSynchBSS (
3140 * 3140 *
3141 * 3141 *
3142 * Return Value: 3142 * Return Value:
3143 * VOID 3143 * void
3144 * 3144 *
3145-*/ 3145-*/
3146 3146
3147static 3147static
3148VOID 3148void
3149s_vMgrFormatTIM( 3149s_vMgrFormatTIM(
3150 IN PSMgmtObject pMgmt, 3150 PSMgmtObject pMgmt,
3151 IN PWLAN_IE_TIM pTIM 3151 PWLAN_IE_TIM pTIM
3152 ) 3152 )
3153{ 3153{
3154 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80}; 3154 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80};
@@ -3222,16 +3222,16 @@ s_vMgrFormatTIM(
3222static 3222static
3223PSTxMgmtPacket 3223PSTxMgmtPacket
3224s_MgrMakeBeacon( 3224s_MgrMakeBeacon(
3225 IN PSDevice pDevice, 3225 PSDevice pDevice,
3226 IN PSMgmtObject pMgmt, 3226 PSMgmtObject pMgmt,
3227 IN WORD wCurrCapInfo, 3227 WORD wCurrCapInfo,
3228 IN WORD wCurrBeaconPeriod, 3228 WORD wCurrBeaconPeriod,
3229 IN UINT uCurrChannel, 3229 UINT uCurrChannel,
3230 IN WORD wCurrATIMWinodw, 3230 WORD wCurrATIMWinodw,
3231 IN PWLAN_IE_SSID pCurrSSID, 3231 PWLAN_IE_SSID pCurrSSID,
3232 IN PBYTE pCurrBSSID, 3232 PBYTE pCurrBSSID,
3233 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 3233 PWLAN_IE_SUPP_RATES pCurrSuppRates,
3234 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 3234 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
3235 ) 3235 )
3236{ 3236{
3237 PSTxMgmtPacket pTxPacket = NULL; 3237 PSTxMgmtPacket pTxPacket = NULL;
@@ -3451,18 +3451,18 @@ s_MgrMakeBeacon(
3451 3451
3452PSTxMgmtPacket 3452PSTxMgmtPacket
3453s_MgrMakeProbeResponse( 3453s_MgrMakeProbeResponse(
3454 IN PSDevice pDevice, 3454 PSDevice pDevice,
3455 IN PSMgmtObject pMgmt, 3455 PSMgmtObject pMgmt,
3456 IN WORD wCurrCapInfo, 3456 WORD wCurrCapInfo,
3457 IN WORD wCurrBeaconPeriod, 3457 WORD wCurrBeaconPeriod,
3458 IN UINT uCurrChannel, 3458 UINT uCurrChannel,
3459 IN WORD wCurrATIMWinodw, 3459 WORD wCurrATIMWinodw,
3460 IN PBYTE pDstAddr, 3460 PBYTE pDstAddr,
3461 IN PWLAN_IE_SSID pCurrSSID, 3461 PWLAN_IE_SSID pCurrSSID,
3462 IN PBYTE pCurrBSSID, 3462 PBYTE pCurrBSSID,
3463 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 3463 PWLAN_IE_SUPP_RATES pCurrSuppRates,
3464 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates, 3464 PWLAN_IE_SUPP_RATES pCurrExtSuppRates,
3465 IN BYTE byPHYType 3465 BYTE byPHYType
3466 ) 3466 )
3467{ 3467{
3468 PSTxMgmtPacket pTxPacket = NULL; 3468 PSTxMgmtPacket pTxPacket = NULL;
@@ -3640,14 +3640,14 @@ s_MgrMakeProbeResponse(
3640 3640
3641PSTxMgmtPacket 3641PSTxMgmtPacket
3642s_MgrMakeAssocRequest( 3642s_MgrMakeAssocRequest(
3643 IN PSDevice pDevice, 3643 PSDevice pDevice,
3644 IN PSMgmtObject pMgmt, 3644 PSMgmtObject pMgmt,
3645 IN PBYTE pDAddr, 3645 PBYTE pDAddr,
3646 IN WORD wCurrCapInfo, 3646 WORD wCurrCapInfo,
3647 IN WORD wListenInterval, 3647 WORD wListenInterval,
3648 IN PWLAN_IE_SSID pCurrSSID, 3648 PWLAN_IE_SSID pCurrSSID,
3649 IN PWLAN_IE_SUPP_RATES pCurrRates, 3649 PWLAN_IE_SUPP_RATES pCurrRates,
3650 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 3650 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
3651 ) 3651 )
3652{ 3652{
3653 PSTxMgmtPacket pTxPacket = NULL; 3653 PSTxMgmtPacket pTxPacket = NULL;
@@ -3869,7 +3869,7 @@ s_MgrMakeAssocRequest(
3869 *pwPMKID = 0; // Initialize PMKID count 3869 *pwPMKID = 0; // Initialize PMKID count
3870 pbyRSN += 2; // Point to PMKID list 3870 pbyRSN += 2; // Point to PMKID list
3871 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) { 3871 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) {
3872 if ( !memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0], pMgmt->abyCurrBSSID, U_ETHER_ADDR_LEN)) { 3872 if ( !memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0], pMgmt->abyCurrBSSID, ETH_ALEN)) {
3873 (*pwPMKID) ++; 3873 (*pwPMKID) ++;
3874 memcpy(pbyRSN, pDevice->gsPMKID.BSSIDInfo[ii].PMKID, 16); 3874 memcpy(pbyRSN, pDevice->gsPMKID.BSSIDInfo[ii].PMKID, 16);
3875 pbyRSN += 16; 3875 pbyRSN += 16;
@@ -3915,14 +3915,14 @@ s_MgrMakeAssocRequest(
3915 3915
3916PSTxMgmtPacket 3916PSTxMgmtPacket
3917s_MgrMakeReAssocRequest( 3917s_MgrMakeReAssocRequest(
3918 IN PSDevice pDevice, 3918 PSDevice pDevice,
3919 IN PSMgmtObject pMgmt, 3919 PSMgmtObject pMgmt,
3920 IN PBYTE pDAddr, 3920 PBYTE pDAddr,
3921 IN WORD wCurrCapInfo, 3921 WORD wCurrCapInfo,
3922 IN WORD wListenInterval, 3922 WORD wListenInterval,
3923 IN PWLAN_IE_SSID pCurrSSID, 3923 PWLAN_IE_SSID pCurrSSID,
3924 IN PWLAN_IE_SUPP_RATES pCurrRates, 3924 PWLAN_IE_SUPP_RATES pCurrRates,
3925 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 3925 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
3926 ) 3926 )
3927{ 3927{
3928 PSTxMgmtPacket pTxPacket = NULL; 3928 PSTxMgmtPacket pTxPacket = NULL;
@@ -4125,7 +4125,7 @@ s_MgrMakeReAssocRequest(
4125 *pwPMKID = 0; // Initialize PMKID count 4125 *pwPMKID = 0; // Initialize PMKID count
4126 pbyRSN += 2; // Point to PMKID list 4126 pbyRSN += 2; // Point to PMKID list
4127 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) { 4127 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) {
4128 if ( !memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0], pMgmt->abyCurrBSSID, U_ETHER_ADDR_LEN)) { 4128 if ( !memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0], pMgmt->abyCurrBSSID, ETH_ALEN)) {
4129 (*pwPMKID) ++; 4129 (*pwPMKID) ++;
4130 memcpy(pbyRSN, pDevice->gsPMKID.BSSIDInfo[ii].PMKID, 16); 4130 memcpy(pbyRSN, pDevice->gsPMKID.BSSIDInfo[ii].PMKID, 16);
4131 pbyRSN += 16; 4131 pbyRSN += 16;
@@ -4167,14 +4167,14 @@ s_MgrMakeReAssocRequest(
4167 4167
4168PSTxMgmtPacket 4168PSTxMgmtPacket
4169s_MgrMakeAssocResponse( 4169s_MgrMakeAssocResponse(
4170 IN PSDevice pDevice, 4170 PSDevice pDevice,
4171 IN PSMgmtObject pMgmt, 4171 PSMgmtObject pMgmt,
4172 IN WORD wCurrCapInfo, 4172 WORD wCurrCapInfo,
4173 IN WORD wAssocStatus, 4173 WORD wAssocStatus,
4174 IN WORD wAssocAID, 4174 WORD wAssocAID,
4175 IN PBYTE pDstAddr, 4175 PBYTE pDstAddr,
4176 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 4176 PWLAN_IE_SUPP_RATES pCurrSuppRates,
4177 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 4177 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
4178 ) 4178 )
4179{ 4179{
4180 PSTxMgmtPacket pTxPacket = NULL; 4180 PSTxMgmtPacket pTxPacket = NULL;
@@ -4241,14 +4241,14 @@ s_MgrMakeAssocResponse(
4241 4241
4242PSTxMgmtPacket 4242PSTxMgmtPacket
4243s_MgrMakeReAssocResponse( 4243s_MgrMakeReAssocResponse(
4244 IN PSDevice pDevice, 4244 PSDevice pDevice,
4245 IN PSMgmtObject pMgmt, 4245 PSMgmtObject pMgmt,
4246 IN WORD wCurrCapInfo, 4246 WORD wCurrCapInfo,
4247 IN WORD wAssocStatus, 4247 WORD wAssocStatus,
4248 IN WORD wAssocAID, 4248 WORD wAssocAID,
4249 IN PBYTE pDstAddr, 4249 PBYTE pDstAddr,
4250 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 4250 PWLAN_IE_SUPP_RATES pCurrSuppRates,
4251 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 4251 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
4252 ) 4252 )
4253{ 4253{
4254 PSTxMgmtPacket pTxPacket = NULL; 4254 PSTxMgmtPacket pTxPacket = NULL;
@@ -4313,11 +4313,11 @@ s_MgrMakeReAssocResponse(
4313-*/ 4313-*/
4314 4314
4315static 4315static
4316VOID 4316void
4317s_vMgrRxProbeResponse( 4317s_vMgrRxProbeResponse(
4318 IN PSDevice pDevice, 4318 PSDevice pDevice,
4319 IN PSMgmtObject pMgmt, 4319 PSMgmtObject pMgmt,
4320 IN PSRxMgmtPacket pRxPacket 4320 PSRxMgmtPacket pRxPacket
4321 ) 4321 )
4322{ 4322{
4323 PKnownBSS pBSSList = NULL; 4323 PKnownBSS pBSSList = NULL;
@@ -4378,9 +4378,9 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4378 4378
4379 4379
4380 // update or insert the bss 4380 // update or insert the bss
4381 pBSSList = BSSpAddrIsInBSSList((HANDLE)pDevice, sFrame.pHdr->sA3.abyAddr3, sFrame.pSSID); 4381 pBSSList = BSSpAddrIsInBSSList((void *)pDevice, sFrame.pHdr->sA3.abyAddr3, sFrame.pSSID);
4382 if (pBSSList) { 4382 if (pBSSList) {
4383 BSSbUpdateToBSSList((HANDLE)pDevice, 4383 BSSbUpdateToBSSList((void *)pDevice,
4384 *sFrame.pqwTimestamp, 4384 *sFrame.pqwTimestamp,
4385 *sFrame.pwBeaconInterval, 4385 *sFrame.pwBeaconInterval,
4386 *sFrame.pwCapInfo, 4386 *sFrame.pwCapInfo,
@@ -4397,12 +4397,12 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4397 pBSSList, 4397 pBSSList,
4398 sFrame.len - WLAN_HDR_ADDR3_LEN, 4398 sFrame.len - WLAN_HDR_ADDR3_LEN,
4399 sFrame.pHdr->sA4.abyAddr4, // payload of probresponse 4399 sFrame.pHdr->sA4.abyAddr4, // payload of probresponse
4400 (HANDLE)pRxPacket 4400 (void *)pRxPacket
4401 ); 4401 );
4402 } 4402 }
4403 else { 4403 else {
4404 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Probe resp/insert: RxChannel = : %d\n", byCurrChannel); 4404 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Probe resp/insert: RxChannel = : %d\n", byCurrChannel);
4405 BSSbInsertToBSSList((HANDLE)pDevice, 4405 BSSbInsertToBSSList((void *)pDevice,
4406 sFrame.pHdr->sA3.abyAddr3, 4406 sFrame.pHdr->sA3.abyAddr3,
4407 *sFrame.pqwTimestamp, 4407 *sFrame.pqwTimestamp,
4408 *sFrame.pwBeaconInterval, 4408 *sFrame.pwBeaconInterval,
@@ -4418,7 +4418,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4418 sFrame.pIE_Quiet, 4418 sFrame.pIE_Quiet,
4419 sFrame.len - WLAN_HDR_ADDR3_LEN, 4419 sFrame.len - WLAN_HDR_ADDR3_LEN,
4420 sFrame.pHdr->sA4.abyAddr4, // payload of beacon 4420 sFrame.pHdr->sA4.abyAddr4, // payload of beacon
4421 (HANDLE)pRxPacket 4421 (void *)pRxPacket
4422 ); 4422 );
4423 } 4423 }
4424 return; 4424 return;
@@ -4438,11 +4438,11 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4438 4438
4439 4439
4440static 4440static
4441VOID 4441void
4442s_vMgrRxProbeRequest( 4442s_vMgrRxProbeRequest(
4443 IN PSDevice pDevice, 4443 PSDevice pDevice,
4444 IN PSMgmtObject pMgmt, 4444 PSMgmtObject pMgmt,
4445 IN PSRxMgmtPacket pRxPacket 4445 PSRxMgmtPacket pRxPacket
4446 ) 4446 )
4447{ 4447{
4448 WLAN_FR_PROBEREQ sFrame; 4448 WLAN_FR_PROBEREQ sFrame;
@@ -4534,11 +4534,11 @@ s_vMgrRxProbeRequest(
4534-*/ 4534-*/
4535 4535
4536 4536
4537VOID 4537void
4538vMgrRxManagePacket( 4538vMgrRxManagePacket(
4539 IN HANDLE hDeviceContext, 4539 void *hDeviceContext,
4540 IN PSMgmtObject pMgmt, 4540 PSMgmtObject pMgmt,
4541 IN PSRxMgmtPacket pRxPacket 4541 PSRxMgmtPacket pRxPacket
4542 ) 4542 )
4543{ 4543{
4544 PSDevice pDevice = (PSDevice)hDeviceContext; 4544 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -4685,8 +4685,8 @@ vMgrRxManagePacket(
4685-*/ 4685-*/
4686BOOL 4686BOOL
4687bMgrPrepareBeaconToSend( 4687bMgrPrepareBeaconToSend(
4688 IN HANDLE hDeviceContext, 4688 void *hDeviceContext,
4689 IN PSMgmtObject pMgmt 4689 PSMgmtObject pMgmt
4690 ) 4690 )
4691{ 4691{
4692 PSDevice pDevice = (PSDevice)hDeviceContext; 4692 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -4738,10 +4738,10 @@ bMgrPrepareBeaconToSend(
4738 * 4738 *
4739-*/ 4739-*/
4740static 4740static
4741VOID 4741void
4742s_vMgrLogStatus( 4742s_vMgrLogStatus(
4743 IN PSMgmtObject pMgmt, 4743 PSMgmtObject pMgmt,
4744 IN WORD wStatus 4744 WORD wStatus
4745 ) 4745 )
4746{ 4746{
4747 switch( wStatus ){ 4747 switch( wStatus ){
@@ -4809,9 +4809,9 @@ s_vMgrLogStatus(
4809-*/ 4809-*/
4810BOOL 4810BOOL
4811bAdd_PMKID_Candidate ( 4811bAdd_PMKID_Candidate (
4812 IN HANDLE hDeviceContext, 4812 void *hDeviceContext,
4813 IN PBYTE pbyBSSID, 4813 PBYTE pbyBSSID,
4814 IN PSRSNCapObject psRSNCapObj 4814 PSRSNCapObject psRSNCapObj
4815 ) 4815 )
4816{ 4816{
4817 PSDevice pDevice = (PSDevice)hDeviceContext; 4817 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -4831,7 +4831,7 @@ bAdd_PMKID_Candidate (
4831 // Update Old Candidate 4831 // Update Old Candidate
4832 for (ii = 0; ii < pDevice->gsPMKIDCandidate.NumCandidates; ii++) { 4832 for (ii = 0; ii < pDevice->gsPMKIDCandidate.NumCandidates; ii++) {
4833 pCandidateList = &pDevice->gsPMKIDCandidate.CandidateList[ii]; 4833 pCandidateList = &pDevice->gsPMKIDCandidate.CandidateList[ii];
4834 if ( !memcmp(pCandidateList->BSSID, pbyBSSID, U_ETHER_ADDR_LEN)) { 4834 if ( !memcmp(pCandidateList->BSSID, pbyBSSID, ETH_ALEN)) {
4835 if ((psRSNCapObj->bRSNCapExist == TRUE) && (psRSNCapObj->wRSNCap & BIT0)) { 4835 if ((psRSNCapObj->bRSNCapExist == TRUE) && (psRSNCapObj->wRSNCap & BIT0)) {
4836 pCandidateList->Flags |= NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED; 4836 pCandidateList->Flags |= NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED;
4837 } else { 4837 } else {
@@ -4848,7 +4848,7 @@ bAdd_PMKID_Candidate (
4848 } else { 4848 } else {
4849 pCandidateList->Flags &= ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED); 4849 pCandidateList->Flags &= ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED);
4850 } 4850 }
4851 memcpy(pCandidateList->BSSID, pbyBSSID, U_ETHER_ADDR_LEN); 4851 memcpy(pCandidateList->BSSID, pbyBSSID, ETH_ALEN);
4852 pDevice->gsPMKIDCandidate.NumCandidates++; 4852 pDevice->gsPMKIDCandidate.NumCandidates++;
4853 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"NumCandidates:%d\n", (int)pDevice->gsPMKIDCandidate.NumCandidates); 4853 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"NumCandidates:%d\n", (int)pDevice->gsPMKIDCandidate.NumCandidates);
4854 return TRUE; 4854 return TRUE;
@@ -4868,9 +4868,9 @@ bAdd_PMKID_Candidate (
4868 * Return Value: none. 4868 * Return Value: none.
4869 * 4869 *
4870-*/ 4870-*/
4871VOID 4871void
4872vFlush_PMKID_Candidate ( 4872vFlush_PMKID_Candidate (
4873 IN HANDLE hDeviceContext 4873 void *hDeviceContext
4874 ) 4874 )
4875{ 4875{
4876 PSDevice pDevice = (PSDevice)hDeviceContext; 4876 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -4883,10 +4883,10 @@ vFlush_PMKID_Candidate (
4883 4883
4884static BOOL 4884static BOOL
4885s_bCipherMatch ( 4885s_bCipherMatch (
4886 IN PKnownBSS pBSSNode, 4886 PKnownBSS pBSSNode,
4887 IN NDIS_802_11_ENCRYPTION_STATUS EncStatus, 4887 NDIS_802_11_ENCRYPTION_STATUS EncStatus,
4888 OUT PBYTE pbyCCSPK, 4888 PBYTE pbyCCSPK,
4889 OUT PBYTE pbyCCSGK 4889 PBYTE pbyCCSGK
4890 ) 4890 )
4891{ 4891{
4892 BYTE byMulticastCipher = KEY_CTL_INVALID; 4892 BYTE byMulticastCipher = KEY_CTL_INVALID;
diff --git a/drivers/staging/vt6655/wmgr.h b/drivers/staging/vt6655/wmgr.h
index 1c1f2ea5782c..9ae7e0d55bc4 100644
--- a/drivers/staging/vt6655/wmgr.h
+++ b/drivers/staging/vt6655/wmgr.h
@@ -249,7 +249,7 @@ typedef struct tagSRxMgmtPacket {
249typedef struct tagSMgmtObject 249typedef struct tagSMgmtObject
250{ 250{
251 251
252 PVOID pAdapter; 252 void * pAdapter;
253 // MAC address 253 // MAC address
254 BYTE abyMACAddr[WLAN_ADDR_LEN]; 254 BYTE abyMACAddr[WLAN_ADDR_LEN];
255 255
@@ -401,102 +401,102 @@ typedef struct tagSMgmtObject
401 401
402void 402void
403vMgrObjectInit( 403vMgrObjectInit(
404 IN HANDLE hDeviceContext 404 void *hDeviceContext
405 ); 405 );
406 406
407void 407void
408vMgrTimerInit( 408vMgrTimerInit(
409 IN HANDLE hDeviceContext 409 void *hDeviceContext
410 ); 410 );
411 411
412VOID 412void
413vMgrObjectReset( 413vMgrObjectReset(
414 IN HANDLE hDeviceContext 414 void *hDeviceContext
415 ); 415 );
416 416
417void 417void
418vMgrAssocBeginSta( 418vMgrAssocBeginSta(
419 IN HANDLE hDeviceContext, 419 void *hDeviceContext,
420 IN PSMgmtObject pMgmt, 420 PSMgmtObject pMgmt,
421 OUT PCMD_STATUS pStatus 421 PCMD_STATUS pStatus
422 ); 422 );
423 423
424VOID 424void
425vMgrReAssocBeginSta( 425vMgrReAssocBeginSta(
426 IN HANDLE hDeviceContext, 426 void *hDeviceContext,
427 IN PSMgmtObject pMgmt, 427 PSMgmtObject pMgmt,
428 OUT PCMD_STATUS pStatus 428 PCMD_STATUS pStatus
429 ); 429 );
430 430
431VOID 431void
432vMgrDisassocBeginSta( 432vMgrDisassocBeginSta(
433 IN HANDLE hDeviceContext, 433 void *hDeviceContext,
434 IN PSMgmtObject pMgmt, 434 PSMgmtObject pMgmt,
435 IN PBYTE abyDestAddress, 435 PBYTE abyDestAddress,
436 IN WORD wReason, 436 WORD wReason,
437 OUT PCMD_STATUS pStatus 437 PCMD_STATUS pStatus
438 ); 438 );
439 439
440VOID 440void
441vMgrAuthenBeginSta( 441vMgrAuthenBeginSta(
442 IN HANDLE hDeviceContext, 442 void *hDeviceContext,
443 IN PSMgmtObject pMgmt, 443 PSMgmtObject pMgmt,
444 OUT PCMD_STATUS pStatus 444 PCMD_STATUS pStatus
445 ); 445 );
446 446
447VOID 447void
448vMgrCreateOwnIBSS( 448vMgrCreateOwnIBSS(
449 IN HANDLE hDeviceContext, 449 void *hDeviceContext,
450 OUT PCMD_STATUS pStatus 450 PCMD_STATUS pStatus
451 ); 451 );
452 452
453VOID 453void
454vMgrJoinBSSBegin( 454vMgrJoinBSSBegin(
455 IN HANDLE hDeviceContext, 455 void *hDeviceContext,
456 OUT PCMD_STATUS pStatus 456 PCMD_STATUS pStatus
457 ); 457 );
458 458
459VOID 459void
460vMgrRxManagePacket( 460vMgrRxManagePacket(
461 IN HANDLE hDeviceContext, 461 void *hDeviceContext,
462 IN PSMgmtObject pMgmt, 462 PSMgmtObject pMgmt,
463 IN PSRxMgmtPacket pRxPacket 463 PSRxMgmtPacket pRxPacket
464 ); 464 );
465 465
466/* 466/*
467VOID 467void
468vMgrScanBegin( 468vMgrScanBegin(
469 IN HANDLE hDeviceContext, 469 void *hDeviceContext,
470 OUT PCMD_STATUS pStatus 470 PCMD_STATUS pStatus
471 ); 471 );
472*/ 472*/
473 473
474VOID 474void
475vMgrDeAuthenBeginSta( 475vMgrDeAuthenBeginSta(
476 IN HANDLE hDeviceContext, 476 void *hDeviceContext,
477 IN PSMgmtObject pMgmt, 477 PSMgmtObject pMgmt,
478 IN PBYTE abyDestAddress, 478 PBYTE abyDestAddress,
479 IN WORD wReason, 479 WORD wReason,
480 OUT PCMD_STATUS pStatus 480 PCMD_STATUS pStatus
481 ); 481 );
482 482
483BOOL 483BOOL
484bMgrPrepareBeaconToSend( 484bMgrPrepareBeaconToSend(
485 IN HANDLE hDeviceContext, 485 void *hDeviceContext,
486 IN PSMgmtObject pMgmt 486 PSMgmtObject pMgmt
487 ); 487 );
488 488
489 489
490BOOL 490BOOL
491bAdd_PMKID_Candidate ( 491bAdd_PMKID_Candidate (
492 IN HANDLE hDeviceContext, 492 void *hDeviceContext,
493 IN PBYTE pbyBSSID, 493 PBYTE pbyBSSID,
494 IN PSRSNCapObject psRSNCapObj 494 PSRSNCapObject psRSNCapObj
495 ); 495 );
496 496
497VOID 497void
498vFlush_PMKID_Candidate ( 498vFlush_PMKID_Candidate (
499 IN HANDLE hDeviceContext 499 void *hDeviceContext
500 ); 500 );
501 501
502#endif // __WMGR_H__ 502#endif // __WMGR_H__
diff --git a/drivers/staging/vt6655/wpa.c b/drivers/staging/vt6655/wpa.c
index 5da671418b52..da5c814e200e 100644
--- a/drivers/staging/vt6655/wpa.c
+++ b/drivers/staging/vt6655/wpa.c
@@ -68,9 +68,9 @@ const BYTE abyOUI05[4] = { 0x00, 0x50, 0xf2, 0x05 };
68 * 68 *
69-*/ 69-*/
70 70
71VOID 71void
72WPA_ClearRSN ( 72WPA_ClearRSN (
73 IN PKnownBSS pBSSList 73 PKnownBSS pBSSList
74 ) 74 )
75{ 75{
76 int ii; 76 int ii;
@@ -104,10 +104,10 @@ WPA_ClearRSN (
104 * Return Value: none. 104 * Return Value: none.
105 * 105 *
106-*/ 106-*/
107VOID 107void
108WPA_ParseRSN ( 108WPA_ParseRSN (
109 IN PKnownBSS pBSSList, 109 PKnownBSS pBSSList,
110 IN PWLAN_IE_RSN_EXT pRSN 110 PWLAN_IE_RSN_EXT pRSN
111 ) 111 )
112{ 112{
113 PWLAN_IE_RSN_AUTH pIE_RSN_Auth = NULL; 113 PWLAN_IE_RSN_AUTH pIE_RSN_Auth = NULL;
@@ -241,7 +241,7 @@ BOOL
241WPA_SearchRSN ( 241WPA_SearchRSN (
242 BYTE byCmd, 242 BYTE byCmd,
243 BYTE byEncrypt, 243 BYTE byEncrypt,
244 IN PKnownBSS pBSSList 244 PKnownBSS pBSSList
245 ) 245 )
246{ 246{
247 int ii; 247 int ii;
@@ -299,7 +299,7 @@ WPA_SearchRSN (
299-*/ 299-*/
300BOOL 300BOOL
301WPAb_Is_RSN ( 301WPAb_Is_RSN (
302 IN PWLAN_IE_RSN_EXT pRSN 302 PWLAN_IE_RSN_EXT pRSN
303 ) 303 )
304{ 304{
305 if (pRSN == NULL) 305 if (pRSN == NULL)
diff --git a/drivers/staging/vt6655/wpa.h b/drivers/staging/vt6655/wpa.h
index 9d9ce01d0c61..80d990b09d25 100644
--- a/drivers/staging/vt6655/wpa.h
+++ b/drivers/staging/vt6655/wpa.h
@@ -58,27 +58,27 @@
58 58
59/*--------------------- Export Functions --------------------------*/ 59/*--------------------- Export Functions --------------------------*/
60 60
61VOID 61void
62WPA_ClearRSN( 62WPA_ClearRSN(
63 IN PKnownBSS pBSSList 63 PKnownBSS pBSSList
64 ); 64 );
65 65
66VOID 66void
67WPA_ParseRSN( 67WPA_ParseRSN(
68 IN PKnownBSS pBSSList, 68 PKnownBSS pBSSList,
69 IN PWLAN_IE_RSN_EXT pRSN 69 PWLAN_IE_RSN_EXT pRSN
70 ); 70 );
71 71
72BOOL 72BOOL
73WPA_SearchRSN( 73WPA_SearchRSN(
74 BYTE byCmd, 74 BYTE byCmd,
75 BYTE byEncrypt, 75 BYTE byEncrypt,
76 IN PKnownBSS pBSSList 76 PKnownBSS pBSSList
77 ); 77 );
78 78
79BOOL 79BOOL
80WPAb_Is_RSN( 80WPAb_Is_RSN(
81 IN PWLAN_IE_RSN_EXT pRSN 81 PWLAN_IE_RSN_EXT pRSN
82 ); 82 );
83 83
84#endif // __WPA_H__ 84#endif // __WPA_H__
diff --git a/drivers/staging/vt6655/wpa2.c b/drivers/staging/vt6655/wpa2.c
index 931b6bd360e6..7a42a0aad7d2 100644
--- a/drivers/staging/vt6655/wpa2.c
+++ b/drivers/staging/vt6655/wpa2.c
@@ -72,9 +72,9 @@ const BYTE abyOUIPSK[4] = { 0x00, 0x0F, 0xAC, 0x02 };
72 * Return Value: none. 72 * Return Value: none.
73 * 73 *
74-*/ 74-*/
75VOID 75void
76WPA2_ClearRSN ( 76WPA2_ClearRSN (
77 IN PKnownBSS pBSSNode 77 PKnownBSS pBSSNode
78 ) 78 )
79{ 79{
80 int ii; 80 int ii;
@@ -107,10 +107,10 @@ WPA2_ClearRSN (
107 * Return Value: none. 107 * Return Value: none.
108 * 108 *
109-*/ 109-*/
110VOID 110void
111WPA2vParseRSN ( 111WPA2vParseRSN (
112 IN PKnownBSS pBSSNode, 112 PKnownBSS pBSSNode,
113 IN PWLAN_IE_RSN pRSN 113 PWLAN_IE_RSN pRSN
114 ) 114 )
115{ 115{
116 int i, j; 116 int i, j;
@@ -263,8 +263,8 @@ WPA2vParseRSN (
263-*/ 263-*/
264UINT 264UINT
265WPA2uSetIEs( 265WPA2uSetIEs(
266 IN PVOID pMgmtHandle, 266 void *pMgmtHandle,
267 OUT PWLAN_IE_RSN pRSNIEs 267 PWLAN_IE_RSN pRSNIEs
268 ) 268 )
269{ 269{
270 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle; 270 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle;
@@ -346,7 +346,7 @@ WPA2uSetIEs(
346 *pwPMKID = 0; // Initialize PMKID count 346 *pwPMKID = 0; // Initialize PMKID count
347 pbyBuffer = &pRSNIEs->abyRSN[20]; // Point to PMKID list 347 pbyBuffer = &pRSNIEs->abyRSN[20]; // Point to PMKID list
348 for (ii = 0; ii < pMgmt->gsPMKIDCache.BSSIDInfoCount; ii++) { 348 for (ii = 0; ii < pMgmt->gsPMKIDCache.BSSIDInfoCount; ii++) {
349 if ( !memcmp(&pMgmt->gsPMKIDCache.BSSIDInfo[ii].abyBSSID[0], pMgmt->abyCurrBSSID, U_ETHER_ADDR_LEN)) { 349 if ( !memcmp(&pMgmt->gsPMKIDCache.BSSIDInfo[ii].abyBSSID[0], pMgmt->abyCurrBSSID, ETH_ALEN)) {
350 (*pwPMKID) ++; 350 (*pwPMKID) ++;
351 memcpy(pbyBuffer, pMgmt->gsPMKIDCache.BSSIDInfo[ii].abyPMKID, 16); 351 memcpy(pbyBuffer, pMgmt->gsPMKIDCache.BSSIDInfo[ii].abyPMKID, 16);
352 pbyBuffer += 16; 352 pbyBuffer += 16;
diff --git a/drivers/staging/vt6655/wpa2.h b/drivers/staging/vt6655/wpa2.h
index e553b3869008..7200db37f430 100644
--- a/drivers/staging/vt6655/wpa2.h
+++ b/drivers/staging/vt6655/wpa2.h
@@ -58,21 +58,21 @@ typedef struct tagSPMKIDCache {
58 58
59/*--------------------- Export Functions --------------------------*/ 59/*--------------------- Export Functions --------------------------*/
60 60
61VOID 61void
62WPA2_ClearRSN ( 62WPA2_ClearRSN (
63 IN PKnownBSS pBSSNode 63 PKnownBSS pBSSNode
64 ); 64 );
65 65
66VOID 66void
67WPA2vParseRSN ( 67WPA2vParseRSN (
68 IN PKnownBSS pBSSNode, 68 PKnownBSS pBSSNode,
69 IN PWLAN_IE_RSN pRSN 69 PWLAN_IE_RSN pRSN
70 ); 70 );
71 71
72UINT 72UINT
73WPA2uSetIEs( 73WPA2uSetIEs(
74 IN PVOID pMgmtHandle, 74 void *pMgmtHandle,
75 OUT PWLAN_IE_RSN pRSNIEs 75 PWLAN_IE_RSN pRSNIEs
76 ); 76 );
77 77
78#endif // __WPA2_H__ 78#endif // __WPA2_H__
diff --git a/drivers/staging/vt6655/wpactl.c b/drivers/staging/vt6655/wpactl.c
index 574e0b0a9c28..22c2fab3f328 100644
--- a/drivers/staging/vt6655/wpactl.c
+++ b/drivers/staging/vt6655/wpactl.c
@@ -101,7 +101,7 @@ static int wpa_init_wpadev(PSDevice pDevice)
101 101
102 wpadev_priv = netdev_priv(pDevice->wpadev); 102 wpadev_priv = netdev_priv(pDevice->wpadev);
103 *wpadev_priv = *pDevice; 103 *wpadev_priv = *pDevice;
104 memcpy(pDevice->wpadev->dev_addr, dev->dev_addr, U_ETHER_ADDR_LEN); 104 memcpy(pDevice->wpadev->dev_addr, dev->dev_addr, ETH_ALEN);
105 pDevice->wpadev->base_addr = dev->base_addr; 105 pDevice->wpadev->base_addr = dev->base_addr;
106 pDevice->wpadev->irq = dev->irq; 106 pDevice->wpadev->irq = dev->irq;
107 pDevice->wpadev->mem_start = dev->mem_start; 107 pDevice->wpadev->mem_start = dev->mem_start;
@@ -496,7 +496,7 @@ static int wpa_set_disassociate(PSDevice pDevice,
496 spin_lock_irq(&pDevice->lock); 496 spin_lock_irq(&pDevice->lock);
497 if (pDevice->bLinkPass) { 497 if (pDevice->bLinkPass) {
498 if (!memcmp(param->addr, pMgmt->abyCurrBSSID, 6)) 498 if (!memcmp(param->addr, pMgmt->abyCurrBSSID, 6))
499 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_DISASSOCIATE, NULL); 499 bScheduleCommand((void *)pDevice, WLAN_CMD_DISASSOCIATE, NULL);
500 } 500 }
501 spin_unlock_irq(&pDevice->lock); 501 spin_unlock_irq(&pDevice->lock);
502 502
@@ -525,8 +525,8 @@ static int wpa_set_scan(PSDevice pDevice,
525 int ret = 0; 525 int ret = 0;
526 526
527 spin_lock_irq(&pDevice->lock); 527 spin_lock_irq(&pDevice->lock);
528 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 528 BSSvClearBSSList((void *)pDevice, pDevice->bLinkPass);
529 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 529 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
530 spin_unlock_irq(&pDevice->lock); 530 spin_unlock_irq(&pDevice->lock);
531 531
532 return ret; 532 return ret;
@@ -681,13 +681,12 @@ static int wpa_get_scan(PSDevice pDevice,
681 count++; 681 count++;
682 }; 682 };
683 683
684 pBuf = kmalloc(sizeof(struct viawget_scan_result) * count, (int)GFP_ATOMIC); 684 pBuf = kcalloc(count, sizeof(struct viawget_scan_result), (int)GFP_ATOMIC);
685 685
686 if (pBuf == NULL) { 686 if (pBuf == NULL) {
687 ret = -ENOMEM; 687 ret = -ENOMEM;
688 return ret; 688 return ret;
689 } 689 }
690 memset(pBuf, 0, sizeof(struct viawget_scan_result) * count);
691 scan_buf = (struct viawget_scan_result *)pBuf; 690 scan_buf = (struct viawget_scan_result *)pBuf;
692 pBSS = &(pMgmt->sBSSList[0]); 691 pBSS = &(pMgmt->sBSSList[0]);
693 for (ii = 0, jj = 0; ii < MAX_BSS_NUM ; ii++) { 692 for (ii = 0, jj = 0; ii < MAX_BSS_NUM ; ii++) {
@@ -786,7 +785,7 @@ static int wpa_set_associate(PSDevice pDevice,
786 memcpy(pMgmt->abyDesireBSSID, param->u.wpa_associate.bssid, 6); 785 memcpy(pMgmt->abyDesireBSSID, param->u.wpa_associate.bssid, 6);
787else 786else
788{ 787{
789 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pItemSSID->abySSID); 788 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, pItemSSID->abySSID);
790} 789}
791 790
792 if (param->u.wpa_associate.wpa_ie_len == 0) { 791 if (param->u.wpa_associate.wpa_ie_len == 0) {
@@ -870,11 +869,11 @@ if (!((pMgmt->eAuthenMode == WMAC_AUTH_SHAREKEY) ||
870 869
871 if (pCurr == NULL){ 870 if (pCurr == NULL){
872 printk("wpa_set_associate---->hidden mode site survey before associate.......\n"); 871 printk("wpa_set_associate---->hidden mode site survey before associate.......\n");
873 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 872 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID);
874 }; 873 };
875} 874}
876/****************************************************************/ 875/****************************************************************/
877 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 876 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
878 spin_unlock_irq(&pDevice->lock); 877 spin_unlock_irq(&pDevice->lock);
879 878
880 return ret; 879 return ret;
@@ -905,7 +904,7 @@ int wpa_ioctl(PSDevice pDevice, struct iw_point *p)
905 p->length > VIAWGET_WPA_MAX_BUF_SIZE || !p->pointer) 904 p->length > VIAWGET_WPA_MAX_BUF_SIZE || !p->pointer)
906 return -EINVAL; 905 return -EINVAL;
907 906
908 param = (struct viawget_wpa_param *) kmalloc((int)p->length, (int)GFP_KERNEL); 907 param = kmalloc((int)p->length, (int)GFP_KERNEL);
909 if (param == NULL) 908 if (param == NULL)
910 return -ENOMEM; 909 return -ENOMEM;
911 910
diff --git a/drivers/staging/vt6655/wroute.c b/drivers/staging/vt6655/wroute.c
index 1d02040e80e0..bf92fb9908fe 100644
--- a/drivers/staging/vt6655/wroute.c
+++ b/drivers/staging/vt6655/wroute.c
@@ -91,11 +91,11 @@ BOOL ROUTEbRelay (PSDevice pDevice, PBYTE pbySkbData, UINT uDataLen, UINT uNodeI
91 91
92 pHeadTD->m_td1TD1.byTCR = (TCR_EDP|TCR_STP); 92 pHeadTD->m_td1TD1.byTCR = (TCR_EDP|TCR_STP);
93 93
94 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)pbySkbData, U_HEADER_LEN); 94 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)pbySkbData, ETH_HLEN);
95 95
96 cbFrameBodySize = uDataLen - U_HEADER_LEN; 96 cbFrameBodySize = uDataLen - ETH_HLEN;
97 97
98 if (ntohs(pDevice->sTxEthHeader.wType) > MAX_DATA_LEN) { 98 if (ntohs(pDevice->sTxEthHeader.wType) > ETH_DATA_LEN) {
99 cbFrameBodySize += 8; 99 cbFrameBodySize += 8;
100 } 100 }
101 101
diff --git a/drivers/staging/vt6656/80211hdr.h b/drivers/staging/vt6656/80211hdr.h
index e5cee6fd0533..15c6ef1a635c 100644
--- a/drivers/staging/vt6656/80211hdr.h
+++ b/drivers/staging/vt6656/80211hdr.h
@@ -16,16 +16,13 @@
16 * with this program; if not, write to the Free Software Foundation, Inc., 16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 * 18 *
19 *
20 * File: 80211hdr.h 19 * File: 80211hdr.h
21 * 20 *
22 * Purpose: 802.11 MAC headers related pre-defines and macros. 21 * Purpose: 802.11 MAC headers related pre-defines and macros.
23 * 22 *
24 *
25 * Author: Lyndon Chen 23 * Author: Lyndon Chen
26 * 24 *
27 * Date: Apr 8, 2002 25 * Date: Apr 8, 2002
28 *
29 */ 26 */
30 27
31#ifndef __80211HDR_H__ 28#ifndef __80211HDR_H__
@@ -34,7 +31,8 @@
34#include "ttype.h" 31#include "ttype.h"
35 32
36/*--------------------- Export Definitions -------------------------*/ 33/*--------------------- Export Definitions -------------------------*/
37// bit type 34
35/* bit type */
38#define BIT0 0x00000001 36#define BIT0 0x00000001
39#define BIT1 0x00000002 37#define BIT1 0x00000002
40#define BIT2 0x00000004 38#define BIT2 0x00000004
@@ -68,7 +66,7 @@
68#define BIT30 0x40000000 66#define BIT30 0x40000000
69#define BIT31 0x80000000 67#define BIT31 0x80000000
70 68
71// 802.11 frame related, defined as 802.11 spec 69/* 802.11 frame related, defined as 802.11 spec */
72#define WLAN_ADDR_LEN 6 70#define WLAN_ADDR_LEN 6
73#define WLAN_CRC_LEN 4 71#define WLAN_CRC_LEN 4
74#define WLAN_CRC32_LEN 4 72#define WLAN_CRC32_LEN 4
@@ -80,13 +78,14 @@
80#define WLAN_HDR_ADDR4_LEN 30 78#define WLAN_HDR_ADDR4_LEN 30
81#define WLAN_IEHDR_LEN 2 79#define WLAN_IEHDR_LEN 2
82#define WLAN_SSID_MAXLEN 32 80#define WLAN_SSID_MAXLEN 32
83//#define WLAN_RATES_MAXLEN 255 81/* #define WLAN_RATES_MAXLEN 255 */
84#define WLAN_RATES_MAXLEN 16 82#define WLAN_RATES_MAXLEN 16
85#define WLAN_RATES_MAXLEN_11B 4 83#define WLAN_RATES_MAXLEN_11B 4
86#define WLAN_RSN_MAXLEN 32 84#define WLAN_RSN_MAXLEN 32
87#define WLAN_DATA_MAXLEN 2312 85#define WLAN_DATA_MAXLEN 2312
88#define WLAN_A3FR_MAXLEN (WLAN_HDR_ADDR3_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN) 86#define WLAN_A3FR_MAXLEN (WLAN_HDR_ADDR3_LEN \
89 87 + WLAN_DATA_MAXLEN \
88 + WLAN_CRC_LEN)
90 89
91#define WLAN_BEACON_FR_MAXLEN WLAN_A3FR_MAXLEN 90#define WLAN_BEACON_FR_MAXLEN WLAN_A3FR_MAXLEN
92#define WLAN_ATIM_FR_MAXLEN (WLAN_HDR_ADDR3_LEN + 0) 91#define WLAN_ATIM_FR_MAXLEN (WLAN_HDR_ADDR3_LEN + 0)
@@ -101,12 +100,11 @@
101#define WLAN_AUTHEN_FR_MAXLEN WLAN_A3FR_MAXLEN 100#define WLAN_AUTHEN_FR_MAXLEN WLAN_A3FR_MAXLEN
102#define WLAN_DEAUTHEN_FR_MAXLEN (WLAN_HDR_ADDR3_LEN + 2) 101#define WLAN_DEAUTHEN_FR_MAXLEN (WLAN_HDR_ADDR3_LEN + 2)
103 102
104
105#define WLAN_WEP_NKEYS 4 103#define WLAN_WEP_NKEYS 4
106#define WLAN_WEP40_KEYLEN 5 104#define WLAN_WEP40_KEYLEN 5
107#define WLAN_WEP104_KEYLEN 13 105#define WLAN_WEP104_KEYLEN 13
108#define WLAN_WEP232_KEYLEN 29 106#define WLAN_WEP232_KEYLEN 29
109//#define WLAN_WEPMAX_KEYLEN 29 107/* #define WLAN_WEPMAX_KEYLEN 29 */
110#define WLAN_WEPMAX_KEYLEN 32 108#define WLAN_WEPMAX_KEYLEN 32
111#define WLAN_CHALLENGE_IE_MAXLEN 255 109#define WLAN_CHALLENGE_IE_MAXLEN 255
112#define WLAN_CHALLENGE_IE_LEN 130 110#define WLAN_CHALLENGE_IE_LEN 130
@@ -115,7 +113,7 @@
115#define WLAN_WEP_ICV_LEN 4 113#define WLAN_WEP_ICV_LEN 4
116#define WLAN_FRAGS_MAX 16 114#define WLAN_FRAGS_MAX 16
117 115
118// Frame Type 116/* Frame Type */
119#define WLAN_TYPE_MGR 0x00 117#define WLAN_TYPE_MGR 0x00
120#define WLAN_TYPE_CTL 0x01 118#define WLAN_TYPE_CTL 0x01
121#define WLAN_TYPE_DATA 0x02 119#define WLAN_TYPE_DATA 0x02
@@ -124,8 +122,7 @@
124#define WLAN_FTYPE_CTL 0x01 122#define WLAN_FTYPE_CTL 0x01
125#define WLAN_FTYPE_DATA 0x02 123#define WLAN_FTYPE_DATA 0x02
126 124
127 125/* Frame Subtypes */
128// Frame Subtypes
129#define WLAN_FSTYPE_ASSOCREQ 0x00 126#define WLAN_FSTYPE_ASSOCREQ 0x00
130#define WLAN_FSTYPE_ASSOCRESP 0x01 127#define WLAN_FSTYPE_ASSOCRESP 0x01
131#define WLAN_FSTYPE_REASSOCREQ 0x02 128#define WLAN_FSTYPE_REASSOCREQ 0x02
@@ -139,7 +136,7 @@
139#define WLAN_FSTYPE_DEAUTHEN 0x0c 136#define WLAN_FSTYPE_DEAUTHEN 0x0c
140#define WLAN_FSTYPE_ACTION 0x0d 137#define WLAN_FSTYPE_ACTION 0x0d
141 138
142// Control 139/* Control */
143#define WLAN_FSTYPE_PSPOLL 0x0a 140#define WLAN_FSTYPE_PSPOLL 0x0a
144#define WLAN_FSTYPE_RTS 0x0b 141#define WLAN_FSTYPE_RTS 0x0b
145#define WLAN_FSTYPE_CTS 0x0c 142#define WLAN_FSTYPE_CTS 0x0c
@@ -147,7 +144,7 @@
147#define WLAN_FSTYPE_CFEND 0x0e 144#define WLAN_FSTYPE_CFEND 0x0e
148#define WLAN_FSTYPE_CFENDCFACK 0x0f 145#define WLAN_FSTYPE_CFENDCFACK 0x0f
149 146
150// Data 147/* Data */
151#define WLAN_FSTYPE_DATAONLY 0x00 148#define WLAN_FSTYPE_DATAONLY 0x00
152#define WLAN_FSTYPE_DATA_CFACK 0x01 149#define WLAN_FSTYPE_DATA_CFACK 0x01
153#define WLAN_FSTYPE_DATA_CFPOLL 0x02 150#define WLAN_FSTYPE_DATA_CFPOLL 0x02
@@ -157,13 +154,13 @@
157#define WLAN_FSTYPE_CFPOLL 0x06 154#define WLAN_FSTYPE_CFPOLL 0x06
158#define WLAN_FSTYPE_CFACK_CFPOLL 0x07 155#define WLAN_FSTYPE_CFACK_CFPOLL 0x07
159 156
160
161#ifdef __BIG_ENDIAN 157#ifdef __BIG_ENDIAN
162 158
163// GET & SET Frame Control bit 159/* GET & SET Frame Control bit */
164#define WLAN_GET_FC_PRVER(n) ((((WORD)(n) >> 8) & (BIT0 | BIT1)) 160#define WLAN_GET_FC_PRVER(n) ((((WORD)(n) >> 8) & (BIT0 | BIT1))
165#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n) >> 8) & (BIT2 | BIT3)) >> 2) 161#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n) >> 8) & (BIT2 | BIT3)) >> 2)
166#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n) >> 8) & (BIT4|BIT5|BIT6|BIT7)) >> 4) 162#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n) >> 8) \
163 & (BIT4|BIT5|BIT6|BIT7)) >> 4)
167#define WLAN_GET_FC_TODS(n) ((((WORD)(n) << 8) & (BIT8)) >> 8) 164#define WLAN_GET_FC_TODS(n) ((((WORD)(n) << 8) & (BIT8)) >> 8)
168#define WLAN_GET_FC_FROMDS(n) ((((WORD)(n) << 8) & (BIT9)) >> 9) 165#define WLAN_GET_FC_FROMDS(n) ((((WORD)(n) << 8) & (BIT9)) >> 9)
169#define WLAN_GET_FC_MOREFRAG(n) ((((WORD)(n) << 8) & (BIT10)) >> 10) 166#define WLAN_GET_FC_MOREFRAG(n) ((((WORD)(n) << 8) & (BIT10)) >> 10)
@@ -173,12 +170,12 @@
173#define WLAN_GET_FC_ISWEP(n) ((((WORD)(n) << 8) & (BIT14)) >> 14) 170#define WLAN_GET_FC_ISWEP(n) ((((WORD)(n) << 8) & (BIT14)) >> 14)
174#define WLAN_GET_FC_ORDER(n) ((((WORD)(n) << 8) & (BIT15)) >> 15) 171#define WLAN_GET_FC_ORDER(n) ((((WORD)(n) << 8) & (BIT15)) >> 15)
175 172
176// Sequence Field bit 173/* Sequence Field bit */
177#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n) >> 8) & (BIT0|BIT1|BIT2|BIT3)) 174#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n) >> 8) & (BIT0|BIT1|BIT2|BIT3))
178#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n) >> 8) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4) 175#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n) >> 8) \
179 176 & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
180 177
181// Capability Field bit 178/* Capability Field bit */
182#define WLAN_GET_CAP_INFO_ESS(n) (((n) >> 8) & BIT0) 179#define WLAN_GET_CAP_INFO_ESS(n) (((n) >> 8) & BIT0)
183#define WLAN_GET_CAP_INFO_IBSS(n) ((((n) >> 8) & BIT1) >> 1) 180#define WLAN_GET_CAP_INFO_IBSS(n) ((((n) >> 8) & BIT1) >> 1)
184#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) ((((n) >> 8) & BIT2) >> 2) 181#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) ((((n) >> 8) & BIT2) >> 2)
@@ -192,10 +189,9 @@
192#define WLAN_GET_CAP_INFO_DSSSOFDM(n) ((((n)) & BIT13) >> 13) 189#define WLAN_GET_CAP_INFO_DSSSOFDM(n) ((((n)) & BIT13) >> 13)
193#define WLAN_GET_CAP_INFO_GRPACK(n) ((((n)) & BIT14) >> 14) 190#define WLAN_GET_CAP_INFO_GRPACK(n) ((((n)) & BIT14) >> 14)
194 191
195
196#else 192#else
197 193
198// GET & SET Frame Control bit 194/* GET & SET Frame Control bit */
199#define WLAN_GET_FC_PRVER(n) (((WORD)(n)) & (BIT0 | BIT1)) 195#define WLAN_GET_FC_PRVER(n) (((WORD)(n)) & (BIT0 | BIT1))
200#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n)) & (BIT2 | BIT3)) >> 2) 196#define WLAN_GET_FC_FTYPE(n) ((((WORD)(n)) & (BIT2 | BIT3)) >> 2)
201#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4) 197#define WLAN_GET_FC_FSTYPE(n) ((((WORD)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4)
@@ -208,13 +204,11 @@
208#define WLAN_GET_FC_ISWEP(n) ((((WORD)(n)) & (BIT14)) >> 14) 204#define WLAN_GET_FC_ISWEP(n) ((((WORD)(n)) & (BIT14)) >> 14)
209#define WLAN_GET_FC_ORDER(n) ((((WORD)(n)) & (BIT15)) >> 15) 205#define WLAN_GET_FC_ORDER(n) ((((WORD)(n)) & (BIT15)) >> 15)
210 206
211 207/* Sequence Field bit */
212// Sequence Field bit
213#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n)) & (BIT0|BIT1|BIT2|BIT3)) 208#define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n)) & (BIT0|BIT1|BIT2|BIT3))
214#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4) 209#define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
215 210
216 211/* Capability Field bit */
217// Capability Field bit
218#define WLAN_GET_CAP_INFO_ESS(n) ((n) & BIT0) 212#define WLAN_GET_CAP_INFO_ESS(n) ((n) & BIT0)
219#define WLAN_GET_CAP_INFO_IBSS(n) (((n) & BIT1) >> 1) 213#define WLAN_GET_CAP_INFO_IBSS(n) (((n) & BIT1) >> 1)
220#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) (((n) & BIT2) >> 2) 214#define WLAN_GET_CAP_INFO_CFPOLLABLE(n) (((n) & BIT2) >> 2)
@@ -228,9 +222,7 @@
228#define WLAN_GET_CAP_INFO_DSSSOFDM(n) (((n) & BIT13) >> 13) 222#define WLAN_GET_CAP_INFO_DSSSOFDM(n) (((n) & BIT13) >> 13)
229#define WLAN_GET_CAP_INFO_GRPACK(n) (((n) & BIT14) >> 14) 223#define WLAN_GET_CAP_INFO_GRPACK(n) (((n) & BIT14) >> 14)
230 224
231 225#endif /* #ifdef __BIG_ENDIAN */
232#endif //#ifdef __BIG_ENDIAN
233
234 226
235#define WLAN_SET_CAP_INFO_ESS(n) (n) 227#define WLAN_SET_CAP_INFO_ESS(n) (n)
236#define WLAN_SET_CAP_INFO_IBSS(n) ((n) << 1) 228#define WLAN_SET_CAP_INFO_IBSS(n) ((n) << 1)
@@ -245,7 +237,6 @@
245#define WLAN_SET_CAP_INFO_DSSSOFDM(n) ((n) << 13) 237#define WLAN_SET_CAP_INFO_DSSSOFDM(n) ((n) << 13)
246#define WLAN_SET_CAP_INFO_GRPACK(n) ((n) << 14) 238#define WLAN_SET_CAP_INFO_GRPACK(n) ((n) << 14)
247 239
248
249#define WLAN_SET_FC_PRVER(n) ((WORD)(n)) 240#define WLAN_SET_FC_PRVER(n) ((WORD)(n))
250#define WLAN_SET_FC_FTYPE(n) (((WORD)(n)) << 2) 241#define WLAN_SET_FC_FTYPE(n) (((WORD)(n)) << 2)
251#define WLAN_SET_FC_FSTYPE(n) (((WORD)(n)) << 4) 242#define WLAN_SET_FC_FSTYPE(n) (((WORD)(n)) << 4)
@@ -261,7 +252,7 @@
261#define WLAN_SET_SEQ_FRGNUM(n) ((WORD)(n)) 252#define WLAN_SET_SEQ_FRGNUM(n) ((WORD)(n))
262#define WLAN_SET_SEQ_SEQNUM(n) (((WORD)(n)) << 4) 253#define WLAN_SET_SEQ_SEQNUM(n) (((WORD)(n)) << 4)
263 254
264// ERP Field bit 255/* ERP Field bit */
265 256
266#define WLAN_GET_ERP_NONERP_PRESENT(n) ((n) & BIT0) 257#define WLAN_GET_ERP_NONERP_PRESENT(n) ((n) & BIT0)
267#define WLAN_GET_ERP_USE_PROTECTION(n) (((n) & BIT1) >> 1) 258#define WLAN_GET_ERP_USE_PROTECTION(n) (((n) & BIT1) >> 1)
@@ -271,21 +262,19 @@
271#define WLAN_SET_ERP_USE_PROTECTION(n) ((n) << 1) 262#define WLAN_SET_ERP_USE_PROTECTION(n) ((n) << 1)
272#define WLAN_SET_ERP_BARKER_MODE(n) ((n) << 2) 263#define WLAN_SET_ERP_BARKER_MODE(n) ((n) << 2)
273 264
274 265/* Support & Basic Rates field */
275
276// Support & Basic Rates field
277#define WLAN_MGMT_IS_BASICRATE(b) ((b) & BIT7) 266#define WLAN_MGMT_IS_BASICRATE(b) ((b) & BIT7)
278#define WLAN_MGMT_GET_RATE(b) ((b) & ~BIT7) 267#define WLAN_MGMT_GET_RATE(b) ((b) & ~BIT7)
279 268
280// TIM field 269/* TIM field */
281#define WLAN_MGMT_IS_MULTICAST_TIM(b) ((b) & BIT0) 270#define WLAN_MGMT_IS_MULTICAST_TIM(b) ((b) & BIT0)
282#define WLAN_MGMT_GET_TIM_OFFSET(b) (((b) & ~BIT0) >> 1) 271#define WLAN_MGMT_GET_TIM_OFFSET(b) (((b) & ~BIT0) >> 1)
283 272
284// 3-Addr & 4-Addr 273/* 3-Addr & 4-Addr */
285#define WLAN_HDR_A3_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR3_LEN) 274#define WLAN_HDR_A3_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR3_LEN)
286#define WLAN_HDR_A4_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR4_LEN) 275#define WLAN_HDR_A4_DATA_PTR(p) (((PBYTE)(p)) + WLAN_HDR_ADDR4_LEN)
287 276
288// IEEE ADDR 277/* IEEE ADDR */
289#define IEEE_ADDR_UNIVERSAL 0x02 278#define IEEE_ADDR_UNIVERSAL 0x02
290#define IEEE_ADDR_GROUP 0x01 279#define IEEE_ADDR_GROUP 0x01
291 280
@@ -293,7 +282,7 @@ typedef struct {
293 BYTE abyAddr[6]; 282 BYTE abyAddr[6];
294} IEEE_ADDR, *PIEEE_ADDR; 283} IEEE_ADDR, *PIEEE_ADDR;
295 284
296// 802.11 Header Format 285/* 802.11 Header Format */
297 286
298typedef struct tagWLAN_80211HDR_A2 { 287typedef struct tagWLAN_80211HDR_A2 {
299 288
@@ -302,7 +291,7 @@ typedef struct tagWLAN_80211HDR_A2 {
302 BYTE abyAddr1[WLAN_ADDR_LEN]; 291 BYTE abyAddr1[WLAN_ADDR_LEN];
303 BYTE abyAddr2[WLAN_ADDR_LEN]; 292 BYTE abyAddr2[WLAN_ADDR_LEN];
304 293
305}__attribute__ ((__packed__)) 294} __attribute__ ((__packed__))
306WLAN_80211HDR_A2, *PWLAN_80211HDR_A2; 295WLAN_80211HDR_A2, *PWLAN_80211HDR_A2;
307 296
308typedef struct tagWLAN_80211HDR_A3 { 297typedef struct tagWLAN_80211HDR_A3 {
@@ -314,7 +303,7 @@ typedef struct tagWLAN_80211HDR_A3 {
314 BYTE abyAddr3[WLAN_ADDR_LEN]; 303 BYTE abyAddr3[WLAN_ADDR_LEN];
315 WORD wSeqCtl; 304 WORD wSeqCtl;
316 305
317}__attribute__ ((__packed__)) 306} __attribute__ ((__packed__))
318WLAN_80211HDR_A3, *PWLAN_80211HDR_A3; 307WLAN_80211HDR_A3, *PWLAN_80211HDR_A3;
319 308
320typedef struct tagWLAN_80211HDR_A4 { 309typedef struct tagWLAN_80211HDR_A4 {
@@ -327,10 +316,9 @@ typedef struct tagWLAN_80211HDR_A4 {
327 WORD wSeqCtl; 316 WORD wSeqCtl;
328 BYTE abyAddr4[WLAN_ADDR_LEN]; 317 BYTE abyAddr4[WLAN_ADDR_LEN];
329 318
330}__attribute__ ((__packed__)) 319} __attribute__ ((__packed__))
331WLAN_80211HDR_A4, *PWLAN_80211HDR_A4; 320WLAN_80211HDR_A4, *PWLAN_80211HDR_A4;
332 321
333
334typedef union tagUWLAN_80211HDR { 322typedef union tagUWLAN_80211HDR {
335 323
336 WLAN_80211HDR_A2 sA2; 324 WLAN_80211HDR_A2 sA2;
@@ -339,15 +327,10 @@ typedef union tagUWLAN_80211HDR {
339 327
340} UWLAN_80211HDR, *PUWLAN_80211HDR; 328} UWLAN_80211HDR, *PUWLAN_80211HDR;
341 329
342
343/*--------------------- Export Classes ----------------------------*/ 330/*--------------------- Export Classes ----------------------------*/
344 331
345/*--------------------- Export Variables --------------------------*/ 332/*--------------------- Export Variables --------------------------*/
346 333
347/*--------------------- Export Functions --------------------------*/ 334/*--------------------- Export Functions --------------------------*/
348 335
349 336#endif /* __80211HDR_H__ */
350
351#endif // __80211HDR_H__
352
353
diff --git a/drivers/staging/vt6656/80211mgr.c b/drivers/staging/vt6656/80211mgr.c
index 8fa1a8e5a21a..f24dc55e68f1 100644
--- a/drivers/staging/vt6656/80211mgr.c
+++ b/drivers/staging/vt6656/80211mgr.c
@@ -89,9 +89,9 @@ static int msglevel =MSG_LEVEL_INFO;
89 * 89 *
90-*/ 90-*/
91 91
92VOID 92void
93vMgrEncodeBeacon( 93vMgrEncodeBeacon(
94 IN PWLAN_FR_BEACON pFrame 94 PWLAN_FR_BEACON pFrame
95 ) 95 )
96{ 96{
97 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 97 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -121,9 +121,9 @@ vMgrEncodeBeacon(
121-*/ 121-*/
122 122
123 123
124VOID 124void
125vMgrDecodeBeacon( 125vMgrDecodeBeacon(
126 IN PWLAN_FR_BEACON pFrame 126 PWLAN_FR_BEACON pFrame
127 ) 127 )
128{ 128{
129 PWLAN_IE pItem; 129 PWLAN_IE pItem;
@@ -242,9 +242,9 @@ vMgrDecodeBeacon(
242-*/ 242-*/
243 243
244 244
245VOID 245void
246vMgrEncodeIBSSATIM( 246vMgrEncodeIBSSATIM(
247 IN PWLAN_FR_IBSSATIM pFrame 247 PWLAN_FR_IBSSATIM pFrame
248 ) 248 )
249{ 249{
250 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 250 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -265,9 +265,9 @@ vMgrEncodeIBSSATIM(
265 * 265 *
266-*/ 266-*/
267 267
268VOID 268void
269vMgrDecodeIBSSATIM( 269vMgrDecodeIBSSATIM(
270 IN PWLAN_FR_IBSSATIM pFrame 270 PWLAN_FR_IBSSATIM pFrame
271 ) 271 )
272{ 272{
273 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 273 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -287,9 +287,9 @@ vMgrDecodeIBSSATIM(
287 * 287 *
288-*/ 288-*/
289 289
290VOID 290void
291vMgrEncodeDisassociation( 291vMgrEncodeDisassociation(
292 IN PWLAN_FR_DISASSOC pFrame 292 PWLAN_FR_DISASSOC pFrame
293 ) 293 )
294{ 294{
295 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 295 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -315,9 +315,9 @@ vMgrEncodeDisassociation(
315 * 315 *
316-*/ 316-*/
317 317
318VOID 318void
319vMgrDecodeDisassociation( 319vMgrDecodeDisassociation(
320 IN PWLAN_FR_DISASSOC pFrame 320 PWLAN_FR_DISASSOC pFrame
321 ) 321 )
322{ 322{
323 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 323 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -341,9 +341,9 @@ vMgrDecodeDisassociation(
341-*/ 341-*/
342 342
343 343
344VOID 344void
345vMgrEncodeAssocRequest( 345vMgrEncodeAssocRequest(
346 IN PWLAN_FR_ASSOCREQ pFrame 346 PWLAN_FR_ASSOCREQ pFrame
347 ) 347 )
348{ 348{
349 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 349 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -368,9 +368,9 @@ vMgrEncodeAssocRequest(
368 * 368 *
369-*/ 369-*/
370 370
371VOID 371void
372vMgrDecodeAssocRequest( 372vMgrDecodeAssocRequest(
373 IN PWLAN_FR_ASSOCREQ pFrame 373 PWLAN_FR_ASSOCREQ pFrame
374 ) 374 )
375{ 375{
376 PWLAN_IE pItem; 376 PWLAN_IE pItem;
@@ -434,9 +434,9 @@ vMgrDecodeAssocRequest(
434 * 434 *
435-*/ 435-*/
436 436
437VOID 437void
438vMgrEncodeAssocResponse( 438vMgrEncodeAssocResponse(
439 IN PWLAN_FR_ASSOCRESP pFrame 439 PWLAN_FR_ASSOCRESP pFrame
440 ) 440 )
441{ 441{
442 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 442 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -466,9 +466,9 @@ vMgrEncodeAssocResponse(
466 * 466 *
467-*/ 467-*/
468 468
469VOID 469void
470vMgrDecodeAssocResponse( 470vMgrDecodeAssocResponse(
471 IN PWLAN_FR_ASSOCRESP pFrame 471 PWLAN_FR_ASSOCRESP pFrame
472 ) 472 )
473{ 473{
474 PWLAN_IE pItem; 474 PWLAN_IE pItem;
@@ -512,9 +512,9 @@ vMgrDecodeAssocResponse(
512 * 512 *
513-*/ 513-*/
514 514
515VOID 515void
516vMgrEncodeReassocRequest( 516vMgrEncodeReassocRequest(
517 IN PWLAN_FR_REASSOCREQ pFrame 517 PWLAN_FR_REASSOCREQ pFrame
518 ) 518 )
519{ 519{
520 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 520 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -544,9 +544,9 @@ vMgrEncodeReassocRequest(
544-*/ 544-*/
545 545
546 546
547VOID 547void
548vMgrDecodeReassocRequest( 548vMgrDecodeReassocRequest(
549 IN PWLAN_FR_REASSOCREQ pFrame 549 PWLAN_FR_REASSOCREQ pFrame
550 ) 550 )
551{ 551{
552 PWLAN_IE pItem; 552 PWLAN_IE pItem;
@@ -616,9 +616,9 @@ vMgrDecodeReassocRequest(
616-*/ 616-*/
617 617
618 618
619VOID 619void
620vMgrEncodeProbeRequest( 620vMgrEncodeProbeRequest(
621 IN PWLAN_FR_PROBEREQ pFrame 621 PWLAN_FR_PROBEREQ pFrame
622 ) 622 )
623{ 623{
624 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 624 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -637,9 +637,9 @@ vMgrEncodeProbeRequest(
637 * 637 *
638-*/ 638-*/
639 639
640VOID 640void
641vMgrDecodeProbeRequest( 641vMgrDecodeProbeRequest(
642 IN PWLAN_FR_PROBEREQ pFrame 642 PWLAN_FR_PROBEREQ pFrame
643 ) 643 )
644{ 644{
645 PWLAN_IE pItem; 645 PWLAN_IE pItem;
@@ -690,9 +690,9 @@ vMgrDecodeProbeRequest(
690-*/ 690-*/
691 691
692 692
693VOID 693void
694vMgrEncodeProbeResponse( 694vMgrEncodeProbeResponse(
695 IN PWLAN_FR_PROBERESP pFrame 695 PWLAN_FR_PROBERESP pFrame
696 ) 696 )
697{ 697{
698 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 698 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -724,9 +724,9 @@ vMgrEncodeProbeResponse(
724 * 724 *
725-*/ 725-*/
726 726
727VOID 727void
728vMgrDecodeProbeResponse( 728vMgrDecodeProbeResponse(
729 IN PWLAN_FR_PROBERESP pFrame 729 PWLAN_FR_PROBERESP pFrame
730 ) 730 )
731{ 731{
732 PWLAN_IE pItem; 732 PWLAN_IE pItem;
@@ -838,9 +838,9 @@ vMgrDecodeProbeResponse(
838 * 838 *
839-*/ 839-*/
840 840
841VOID 841void
842vMgrEncodeAuthen( 842vMgrEncodeAuthen(
843 IN PWLAN_FR_AUTHEN pFrame 843 PWLAN_FR_AUTHEN pFrame
844 ) 844 )
845{ 845{
846 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 846 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -869,9 +869,9 @@ vMgrEncodeAuthen(
869 * 869 *
870-*/ 870-*/
871 871
872VOID 872void
873vMgrDecodeAuthen( 873vMgrDecodeAuthen(
874 IN PWLAN_FR_AUTHEN pFrame 874 PWLAN_FR_AUTHEN pFrame
875 ) 875 )
876{ 876{
877 PWLAN_IE pItem; 877 PWLAN_IE pItem;
@@ -909,9 +909,9 @@ vMgrDecodeAuthen(
909 * 909 *
910-*/ 910-*/
911 911
912VOID 912void
913vMgrEncodeDeauthen( 913vMgrEncodeDeauthen(
914 IN PWLAN_FR_DEAUTHEN pFrame 914 PWLAN_FR_DEAUTHEN pFrame
915 ) 915 )
916{ 916{
917 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 917 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -936,9 +936,9 @@ vMgrEncodeDeauthen(
936 * 936 *
937-*/ 937-*/
938 938
939VOID 939void
940vMgrDecodeDeauthen( 940vMgrDecodeDeauthen(
941 IN PWLAN_FR_DEAUTHEN pFrame 941 PWLAN_FR_DEAUTHEN pFrame
942 ) 942 )
943{ 943{
944 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 944 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -962,9 +962,9 @@ vMgrDecodeDeauthen(
962 * 962 *
963-*/ 963-*/
964 964
965VOID 965void
966vMgrEncodeReassocResponse( 966vMgrEncodeReassocResponse(
967 IN PWLAN_FR_REASSOCRESP pFrame 967 PWLAN_FR_REASSOCRESP pFrame
968 ) 968 )
969{ 969{
970 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 970 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
@@ -995,9 +995,9 @@ vMgrEncodeReassocResponse(
995-*/ 995-*/
996 996
997 997
998VOID 998void
999vMgrDecodeReassocResponse( 999vMgrDecodeReassocResponse(
1000 IN PWLAN_FR_REASSOCRESP pFrame 1000 PWLAN_FR_REASSOCRESP pFrame
1001 ) 1001 )
1002{ 1002{
1003 PWLAN_IE pItem; 1003 PWLAN_IE pItem;
diff --git a/drivers/staging/vt6656/80211mgr.h b/drivers/staging/vt6656/80211mgr.h
index a4ea82492167..c140a957d9df 100644
--- a/drivers/staging/vt6656/80211mgr.h
+++ b/drivers/staging/vt6656/80211mgr.h
@@ -524,8 +524,8 @@ typedef struct _WLAN_IE_IBSS_DFS {
524// prototype structure, all mgmt frame types will start with these members 524// prototype structure, all mgmt frame types will start with these members
525typedef struct tagWLAN_FR_MGMT { 525typedef struct tagWLAN_FR_MGMT {
526 526
527 UINT uType; 527 unsigned int uType;
528 UINT len; 528 unsigned int len;
529 PBYTE pBuf; 529 PBYTE pBuf;
530 PUWLAN_80211HDR pHdr; 530 PUWLAN_80211HDR pHdr;
531 531
@@ -534,8 +534,8 @@ typedef struct tagWLAN_FR_MGMT {
534// Beacon frame 534// Beacon frame
535typedef struct tagWLAN_FR_BEACON { 535typedef struct tagWLAN_FR_BEACON {
536 536
537 UINT uType; 537 unsigned int uType;
538 UINT len; 538 unsigned int len;
539 PBYTE pBuf; 539 PBYTE pBuf;
540 PUWLAN_80211HDR pHdr; 540 PUWLAN_80211HDR pHdr;
541 // fixed fields 541 // fixed fields
@@ -566,8 +566,8 @@ typedef struct tagWLAN_FR_BEACON {
566// IBSS ATIM frame 566// IBSS ATIM frame
567typedef struct tagWLAN_FR_IBSSATIM { 567typedef struct tagWLAN_FR_IBSSATIM {
568 568
569 UINT uType; 569 unsigned int uType;
570 UINT len; 570 unsigned int len;
571 PBYTE pBuf; 571 PBYTE pBuf;
572 PUWLAN_80211HDR pHdr; 572 PUWLAN_80211HDR pHdr;
573 573
@@ -580,8 +580,8 @@ typedef struct tagWLAN_FR_IBSSATIM {
580// Disassociation 580// Disassociation
581typedef struct tagWLAN_FR_DISASSOC { 581typedef struct tagWLAN_FR_DISASSOC {
582 582
583 UINT uType; 583 unsigned int uType;
584 UINT len; 584 unsigned int len;
585 PBYTE pBuf; 585 PBYTE pBuf;
586 PUWLAN_80211HDR pHdr; 586 PUWLAN_80211HDR pHdr;
587 /*-- fixed fields -----------*/ 587 /*-- fixed fields -----------*/
@@ -593,8 +593,8 @@ typedef struct tagWLAN_FR_DISASSOC {
593// Association Request 593// Association Request
594typedef struct tagWLAN_FR_ASSOCREQ { 594typedef struct tagWLAN_FR_ASSOCREQ {
595 595
596 UINT uType; 596 unsigned int uType;
597 UINT len; 597 unsigned int len;
598 PBYTE pBuf; 598 PBYTE pBuf;
599 PUWLAN_80211HDR pHdr; 599 PUWLAN_80211HDR pHdr;
600 /*-- fixed fields -----------*/ 600 /*-- fixed fields -----------*/
@@ -617,8 +617,8 @@ typedef struct tagWLAN_FR_ASSOCREQ {
617// Association Response 617// Association Response
618typedef struct tagWLAN_FR_ASSOCRESP { 618typedef struct tagWLAN_FR_ASSOCRESP {
619 619
620 UINT uType; 620 unsigned int uType;
621 UINT len; 621 unsigned int len;
622 PBYTE pBuf; 622 PBYTE pBuf;
623 PUWLAN_80211HDR pHdr; 623 PUWLAN_80211HDR pHdr;
624 /*-- fixed fields -----------*/ 624 /*-- fixed fields -----------*/
@@ -634,8 +634,8 @@ typedef struct tagWLAN_FR_ASSOCRESP {
634// Reassociation Request 634// Reassociation Request
635typedef struct tagWLAN_FR_REASSOCREQ { 635typedef struct tagWLAN_FR_REASSOCREQ {
636 636
637 UINT uType; 637 unsigned int uType;
638 UINT len; 638 unsigned int len;
639 PBYTE pBuf; 639 PBYTE pBuf;
640 PUWLAN_80211HDR pHdr; 640 PUWLAN_80211HDR pHdr;
641 641
@@ -659,8 +659,8 @@ typedef struct tagWLAN_FR_REASSOCREQ {
659// Reassociation Response 659// Reassociation Response
660typedef struct tagWLAN_FR_REASSOCRESP { 660typedef struct tagWLAN_FR_REASSOCRESP {
661 661
662 UINT uType; 662 unsigned int uType;
663 UINT len; 663 unsigned int len;
664 PBYTE pBuf; 664 PBYTE pBuf;
665 PUWLAN_80211HDR pHdr; 665 PUWLAN_80211HDR pHdr;
666 /*-- fixed fields -----------*/ 666 /*-- fixed fields -----------*/
@@ -676,8 +676,8 @@ typedef struct tagWLAN_FR_REASSOCRESP {
676// Probe Request 676// Probe Request
677typedef struct tagWLAN_FR_PROBEREQ { 677typedef struct tagWLAN_FR_PROBEREQ {
678 678
679 UINT uType; 679 unsigned int uType;
680 UINT len; 680 unsigned int len;
681 PBYTE pBuf; 681 PBYTE pBuf;
682 PUWLAN_80211HDR pHdr; 682 PUWLAN_80211HDR pHdr;
683 /*-- fixed fields -----------*/ 683 /*-- fixed fields -----------*/
@@ -691,8 +691,8 @@ typedef struct tagWLAN_FR_PROBEREQ {
691// Probe Response 691// Probe Response
692typedef struct tagWLAN_FR_PROBERESP { 692typedef struct tagWLAN_FR_PROBERESP {
693 693
694 UINT uType; 694 unsigned int uType;
695 UINT len; 695 unsigned int len;
696 PBYTE pBuf; 696 PBYTE pBuf;
697 PUWLAN_80211HDR pHdr; 697 PUWLAN_80211HDR pHdr;
698 /*-- fixed fields -----------*/ 698 /*-- fixed fields -----------*/
@@ -720,8 +720,8 @@ typedef struct tagWLAN_FR_PROBERESP {
720// Authentication 720// Authentication
721typedef struct tagWLAN_FR_AUTHEN { 721typedef struct tagWLAN_FR_AUTHEN {
722 722
723 UINT uType; 723 unsigned int uType;
724 UINT len; 724 unsigned int len;
725 PBYTE pBuf; 725 PBYTE pBuf;
726 PUWLAN_80211HDR pHdr; 726 PUWLAN_80211HDR pHdr;
727 /*-- fixed fields -----------*/ 727 /*-- fixed fields -----------*/
@@ -736,8 +736,8 @@ typedef struct tagWLAN_FR_AUTHEN {
736// Deauthenication 736// Deauthenication
737typedef struct tagWLAN_FR_DEAUTHEN { 737typedef struct tagWLAN_FR_DEAUTHEN {
738 738
739 UINT uType; 739 unsigned int uType;
740 UINT len; 740 unsigned int len;
741 PBYTE pBuf; 741 PBYTE pBuf;
742 PUWLAN_80211HDR pHdr; 742 PUWLAN_80211HDR pHdr;
743 /*-- fixed fields -----------*/ 743 /*-- fixed fields -----------*/
@@ -748,114 +748,114 @@ typedef struct tagWLAN_FR_DEAUTHEN {
748} WLAN_FR_DEAUTHEN, *PWLAN_FR_DEAUTHEN; 748} WLAN_FR_DEAUTHEN, *PWLAN_FR_DEAUTHEN;
749 749
750/*--------------------- Export Functions --------------------------*/ 750/*--------------------- Export Functions --------------------------*/
751VOID 751void
752vMgrEncodeBeacon( 752vMgrEncodeBeacon(
753 IN PWLAN_FR_BEACON pFrame 753 PWLAN_FR_BEACON pFrame
754 ); 754 );
755 755
756VOID 756void
757vMgrDecodeBeacon( 757vMgrDecodeBeacon(
758 IN PWLAN_FR_BEACON pFrame 758 PWLAN_FR_BEACON pFrame
759 ); 759 );
760 760
761VOID 761void
762vMgrEncodeIBSSATIM( 762vMgrEncodeIBSSATIM(
763 IN PWLAN_FR_IBSSATIM pFrame 763 PWLAN_FR_IBSSATIM pFrame
764 ); 764 );
765 765
766VOID 766void
767vMgrDecodeIBSSATIM( 767vMgrDecodeIBSSATIM(
768 IN PWLAN_FR_IBSSATIM pFrame 768 PWLAN_FR_IBSSATIM pFrame
769 ); 769 );
770 770
771VOID 771void
772vMgrEncodeDisassociation( 772vMgrEncodeDisassociation(
773 IN PWLAN_FR_DISASSOC pFrame 773 PWLAN_FR_DISASSOC pFrame
774 ); 774 );
775 775
776VOID 776void
777vMgrDecodeDisassociation( 777vMgrDecodeDisassociation(
778 IN PWLAN_FR_DISASSOC pFrame 778 PWLAN_FR_DISASSOC pFrame
779 ); 779 );
780 780
781VOID 781void
782vMgrEncodeAssocRequest( 782vMgrEncodeAssocRequest(
783 IN PWLAN_FR_ASSOCREQ pFrame 783 PWLAN_FR_ASSOCREQ pFrame
784 ); 784 );
785 785
786VOID 786void
787vMgrDecodeAssocRequest( 787vMgrDecodeAssocRequest(
788 IN PWLAN_FR_ASSOCREQ pFrame 788 PWLAN_FR_ASSOCREQ pFrame
789 ); 789 );
790 790
791VOID 791void
792vMgrEncodeAssocResponse( 792vMgrEncodeAssocResponse(
793 IN PWLAN_FR_ASSOCRESP pFrame 793 PWLAN_FR_ASSOCRESP pFrame
794 ); 794 );
795 795
796VOID 796void
797vMgrDecodeAssocResponse( 797vMgrDecodeAssocResponse(
798 IN PWLAN_FR_ASSOCRESP pFrame 798 PWLAN_FR_ASSOCRESP pFrame
799 ); 799 );
800 800
801VOID 801void
802vMgrEncodeReassocRequest( 802vMgrEncodeReassocRequest(
803 IN PWLAN_FR_REASSOCREQ pFrame 803 PWLAN_FR_REASSOCREQ pFrame
804 ); 804 );
805 805
806VOID 806void
807vMgrDecodeReassocRequest( 807vMgrDecodeReassocRequest(
808 IN PWLAN_FR_REASSOCREQ pFrame 808 PWLAN_FR_REASSOCREQ pFrame
809 ); 809 );
810 810
811VOID 811void
812vMgrEncodeProbeRequest( 812vMgrEncodeProbeRequest(
813 IN PWLAN_FR_PROBEREQ pFrame 813 PWLAN_FR_PROBEREQ pFrame
814 ); 814 );
815 815
816VOID 816void
817vMgrDecodeProbeRequest( 817vMgrDecodeProbeRequest(
818 IN PWLAN_FR_PROBEREQ pFrame 818 PWLAN_FR_PROBEREQ pFrame
819 ); 819 );
820 820
821VOID 821void
822vMgrEncodeProbeResponse( 822vMgrEncodeProbeResponse(
823 IN PWLAN_FR_PROBERESP pFrame 823 PWLAN_FR_PROBERESP pFrame
824 ); 824 );
825 825
826VOID 826void
827vMgrDecodeProbeResponse( 827vMgrDecodeProbeResponse(
828 IN PWLAN_FR_PROBERESP pFrame 828 PWLAN_FR_PROBERESP pFrame
829 ); 829 );
830 830
831VOID 831void
832vMgrEncodeAuthen( 832vMgrEncodeAuthen(
833 IN PWLAN_FR_AUTHEN pFrame 833 PWLAN_FR_AUTHEN pFrame
834 ); 834 );
835 835
836VOID 836void
837vMgrDecodeAuthen( 837vMgrDecodeAuthen(
838 IN PWLAN_FR_AUTHEN pFrame 838 PWLAN_FR_AUTHEN pFrame
839 ); 839 );
840 840
841VOID 841void
842vMgrEncodeDeauthen( 842vMgrEncodeDeauthen(
843 IN PWLAN_FR_DEAUTHEN pFrame 843 PWLAN_FR_DEAUTHEN pFrame
844 ); 844 );
845 845
846VOID 846void
847vMgrDecodeDeauthen( 847vMgrDecodeDeauthen(
848 IN PWLAN_FR_DEAUTHEN pFrame 848 PWLAN_FR_DEAUTHEN pFrame
849 ); 849 );
850 850
851VOID 851void
852vMgrEncodeReassocResponse( 852vMgrEncodeReassocResponse(
853 IN PWLAN_FR_REASSOCRESP pFrame 853 PWLAN_FR_REASSOCRESP pFrame
854 ); 854 );
855 855
856VOID 856void
857vMgrDecodeReassocResponse( 857vMgrDecodeReassocResponse(
858 IN PWLAN_FR_REASSOCRESP pFrame 858 PWLAN_FR_REASSOCRESP pFrame
859 ); 859 );
860 860
861#endif// __80211MGR_H__ 861#endif// __80211MGR_H__
diff --git a/drivers/staging/vt6656/aes_ccmp.c b/drivers/staging/vt6656/aes_ccmp.c
index 401a7d267c90..b3d367b9bdc6 100644
--- a/drivers/staging/vt6656/aes_ccmp.c
+++ b/drivers/staging/vt6656/aes_ccmp.c
@@ -16,7 +16,6 @@
16 * with this program; if not, write to the Free Software Foundation, Inc., 16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 * 18 *
19 *
20 * File: aes_ccmp.c 19 * File: aes_ccmp.c
21 * 20 *
22 * Purpose: AES_CCMP decryption 21 * Purpose: AES_CCMP decryption
@@ -28,9 +27,7 @@
28 * Functions: 27 * Functions:
29 * AESbGenCCMP - Parsing RX-packet 28 * AESbGenCCMP - Parsing RX-packet
30 * 29 *
31 *
32 * Revision History: 30 * Revision History:
33 *
34 */ 31 */
35 32
36#include "device.h" 33#include "device.h"
@@ -46,62 +43,61 @@
46 * SBOX Table 43 * SBOX Table
47 */ 44 */
48 45
49BYTE sbox_table[256] = 46BYTE sbox_table[256] = {
50{ 47 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
510x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, 48 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
520xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, 49 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
530xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, 50 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
540x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, 51 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
550x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, 52 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
560x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, 53 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
570xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, 54 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
580x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, 55 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
590xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, 56 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
600x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, 57 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
610xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, 58 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
620xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, 59 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
630xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, 60 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
640x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, 61 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
650xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, 62 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
660x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
67}; 63};
68 64
69BYTE dot2_table[256] = { 65BYTE dot2_table[256] = {
700x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e, 66 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
710x20, 0x22, 0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e, 67 0x20, 0x22, 0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e,
720x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e, 68 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
730x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e, 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e, 69 0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e, 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e,
740x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e, 70 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e,
750xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae, 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe, 71 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae, 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe,
760xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce, 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde, 72 0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce, 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde,
770xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee, 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe, 73 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee, 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
780x1b, 0x19, 0x1f, 0x1d, 0x13, 0x11, 0x17, 0x15, 0x0b, 0x09, 0x0f, 0x0d, 0x03, 0x01, 0x07, 0x05, 74 0x1b, 0x19, 0x1f, 0x1d, 0x13, 0x11, 0x17, 0x15, 0x0b, 0x09, 0x0f, 0x0d, 0x03, 0x01, 0x07, 0x05,
790x3b, 0x39, 0x3f, 0x3d, 0x33, 0x31, 0x37, 0x35, 0x2b, 0x29, 0x2f, 0x2d, 0x23, 0x21, 0x27, 0x25, 75 0x3b, 0x39, 0x3f, 0x3d, 0x33, 0x31, 0x37, 0x35, 0x2b, 0x29, 0x2f, 0x2d, 0x23, 0x21, 0x27, 0x25,
800x5b, 0x59, 0x5f, 0x5d, 0x53, 0x51, 0x57, 0x55, 0x4b, 0x49, 0x4f, 0x4d, 0x43, 0x41, 0x47, 0x45, 76 0x5b, 0x59, 0x5f, 0x5d, 0x53, 0x51, 0x57, 0x55, 0x4b, 0x49, 0x4f, 0x4d, 0x43, 0x41, 0x47, 0x45,
810x7b, 0x79, 0x7f, 0x7d, 0x73, 0x71, 0x77, 0x75, 0x6b, 0x69, 0x6f, 0x6d, 0x63, 0x61, 0x67, 0x65, 77 0x7b, 0x79, 0x7f, 0x7d, 0x73, 0x71, 0x77, 0x75, 0x6b, 0x69, 0x6f, 0x6d, 0x63, 0x61, 0x67, 0x65,
820x9b, 0x99, 0x9f, 0x9d, 0x93, 0x91, 0x97, 0x95, 0x8b, 0x89, 0x8f, 0x8d, 0x83, 0x81, 0x87, 0x85, 78 0x9b, 0x99, 0x9f, 0x9d, 0x93, 0x91, 0x97, 0x95, 0x8b, 0x89, 0x8f, 0x8d, 0x83, 0x81, 0x87, 0x85,
830xbb, 0xb9, 0xbf, 0xbd, 0xb3, 0xb1, 0xb7, 0xb5, 0xab, 0xa9, 0xaf, 0xad, 0xa3, 0xa1, 0xa7, 0xa5, 79 0xbb, 0xb9, 0xbf, 0xbd, 0xb3, 0xb1, 0xb7, 0xb5, 0xab, 0xa9, 0xaf, 0xad, 0xa3, 0xa1, 0xa7, 0xa5,
840xdb, 0xd9, 0xdf, 0xdd, 0xd3, 0xd1, 0xd7, 0xd5, 0xcb, 0xc9, 0xcf, 0xcd, 0xc3, 0xc1, 0xc7, 0xc5, 80 0xdb, 0xd9, 0xdf, 0xdd, 0xd3, 0xd1, 0xd7, 0xd5, 0xcb, 0xc9, 0xcf, 0xcd, 0xc3, 0xc1, 0xc7, 0xc5,
850xfb, 0xf9, 0xff, 0xfd, 0xf3, 0xf1, 0xf7, 0xf5, 0xeb, 0xe9, 0xef, 0xed, 0xe3, 0xe1, 0xe7, 0xe5 81 0xfb, 0xf9, 0xff, 0xfd, 0xf3, 0xf1, 0xf7, 0xf5, 0xeb, 0xe9, 0xef, 0xed, 0xe3, 0xe1, 0xe7, 0xe5
86}; 82};
87 83
88BYTE dot3_table[256] = { 84BYTE dot3_table[256] = {
890x00, 0x03, 0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x18, 0x1b, 0x1e, 0x1d, 0x14, 0x17, 0x12, 0x11, 85 0x00, 0x03, 0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x18, 0x1b, 0x1e, 0x1d, 0x14, 0x17, 0x12, 0x11,
900x30, 0x33, 0x36, 0x35, 0x3c, 0x3f, 0x3a, 0x39, 0x28, 0x2b, 0x2e, 0x2d, 0x24, 0x27, 0x22, 0x21, 86 0x30, 0x33, 0x36, 0x35, 0x3c, 0x3f, 0x3a, 0x39, 0x28, 0x2b, 0x2e, 0x2d, 0x24, 0x27, 0x22, 0x21,
910x60, 0x63, 0x66, 0x65, 0x6c, 0x6f, 0x6a, 0x69, 0x78, 0x7b, 0x7e, 0x7d, 0x74, 0x77, 0x72, 0x71, 87 0x60, 0x63, 0x66, 0x65, 0x6c, 0x6f, 0x6a, 0x69, 0x78, 0x7b, 0x7e, 0x7d, 0x74, 0x77, 0x72, 0x71,
920x50, 0x53, 0x56, 0x55, 0x5c, 0x5f, 0x5a, 0x59, 0x48, 0x4b, 0x4e, 0x4d, 0x44, 0x47, 0x42, 0x41, 88 0x50, 0x53, 0x56, 0x55, 0x5c, 0x5f, 0x5a, 0x59, 0x48, 0x4b, 0x4e, 0x4d, 0x44, 0x47, 0x42, 0x41,
930xc0, 0xc3, 0xc6, 0xc5, 0xcc, 0xcf, 0xca, 0xc9, 0xd8, 0xdb, 0xde, 0xdd, 0xd4, 0xd7, 0xd2, 0xd1, 89 0xc0, 0xc3, 0xc6, 0xc5, 0xcc, 0xcf, 0xca, 0xc9, 0xd8, 0xdb, 0xde, 0xdd, 0xd4, 0xd7, 0xd2, 0xd1,
940xf0, 0xf3, 0xf6, 0xf5, 0xfc, 0xff, 0xfa, 0xf9, 0xe8, 0xeb, 0xee, 0xed, 0xe4, 0xe7, 0xe2, 0xe1, 90 0xf0, 0xf3, 0xf6, 0xf5, 0xfc, 0xff, 0xfa, 0xf9, 0xe8, 0xeb, 0xee, 0xed, 0xe4, 0xe7, 0xe2, 0xe1,
950xa0, 0xa3, 0xa6, 0xa5, 0xac, 0xaf, 0xaa, 0xa9, 0xb8, 0xbb, 0xbe, 0xbd, 0xb4, 0xb7, 0xb2, 0xb1, 91 0xa0, 0xa3, 0xa6, 0xa5, 0xac, 0xaf, 0xaa, 0xa9, 0xb8, 0xbb, 0xbe, 0xbd, 0xb4, 0xb7, 0xb2, 0xb1,
960x90, 0x93, 0x96, 0x95, 0x9c, 0x9f, 0x9a, 0x99, 0x88, 0x8b, 0x8e, 0x8d, 0x84, 0x87, 0x82, 0x81, 92 0x90, 0x93, 0x96, 0x95, 0x9c, 0x9f, 0x9a, 0x99, 0x88, 0x8b, 0x8e, 0x8d, 0x84, 0x87, 0x82, 0x81,
970x9b, 0x98, 0x9d, 0x9e, 0x97, 0x94, 0x91, 0x92, 0x83, 0x80, 0x85, 0x86, 0x8f, 0x8c, 0x89, 0x8a, 93 0x9b, 0x98, 0x9d, 0x9e, 0x97, 0x94, 0x91, 0x92, 0x83, 0x80, 0x85, 0x86, 0x8f, 0x8c, 0x89, 0x8a,
980xab, 0xa8, 0xad, 0xae, 0xa7, 0xa4, 0xa1, 0xa2, 0xb3, 0xb0, 0xb5, 0xb6, 0xbf, 0xbc, 0xb9, 0xba, 94 0xab, 0xa8, 0xad, 0xae, 0xa7, 0xa4, 0xa1, 0xa2, 0xb3, 0xb0, 0xb5, 0xb6, 0xbf, 0xbc, 0xb9, 0xba,
990xfb, 0xf8, 0xfd, 0xfe, 0xf7, 0xf4, 0xf1, 0xf2, 0xe3, 0xe0, 0xe5, 0xe6, 0xef, 0xec, 0xe9, 0xea, 95 0xfb, 0xf8, 0xfd, 0xfe, 0xf7, 0xf4, 0xf1, 0xf2, 0xe3, 0xe0, 0xe5, 0xe6, 0xef, 0xec, 0xe9, 0xea,
1000xcb, 0xc8, 0xcd, 0xce, 0xc7, 0xc4, 0xc1, 0xc2, 0xd3, 0xd0, 0xd5, 0xd6, 0xdf, 0xdc, 0xd9, 0xda, 96 0xcb, 0xc8, 0xcd, 0xce, 0xc7, 0xc4, 0xc1, 0xc2, 0xd3, 0xd0, 0xd5, 0xd6, 0xdf, 0xdc, 0xd9, 0xda,
1010x5b, 0x58, 0x5d, 0x5e, 0x57, 0x54, 0x51, 0x52, 0x43, 0x40, 0x45, 0x46, 0x4f, 0x4c, 0x49, 0x4a, 97 0x5b, 0x58, 0x5d, 0x5e, 0x57, 0x54, 0x51, 0x52, 0x43, 0x40, 0x45, 0x46, 0x4f, 0x4c, 0x49, 0x4a,
1020x6b, 0x68, 0x6d, 0x6e, 0x67, 0x64, 0x61, 0x62, 0x73, 0x70, 0x75, 0x76, 0x7f, 0x7c, 0x79, 0x7a, 98 0x6b, 0x68, 0x6d, 0x6e, 0x67, 0x64, 0x61, 0x62, 0x73, 0x70, 0x75, 0x76, 0x7f, 0x7c, 0x79, 0x7a,
1030x3b, 0x38, 0x3d, 0x3e, 0x37, 0x34, 0x31, 0x32, 0x23, 0x20, 0x25, 0x26, 0x2f, 0x2c, 0x29, 0x2a, 99 0x3b, 0x38, 0x3d, 0x3e, 0x37, 0x34, 0x31, 0x32, 0x23, 0x20, 0x25, 0x26, 0x2f, 0x2c, 0x29, 0x2a,
1040x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02, 0x13, 0x10, 0x15, 0x16, 0x1f, 0x1c, 0x19, 0x1a 100 0x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02, 0x13, 0x10, 0x15, 0x16, 0x1f, 0x1c, 0x19, 0x1a
105}; 101};
106 102
107/*--------------------- Static Functions --------------------------*/ 103/*--------------------- Static Functions --------------------------*/
@@ -112,120 +108,111 @@ BYTE dot3_table[256] = {
112 108
113void xor_128(BYTE *a, BYTE *b, BYTE *out) 109void xor_128(BYTE *a, BYTE *b, BYTE *out)
114{ 110{
115PDWORD dwPtrA = (PDWORD) a; 111 PDWORD dwPtrA = (PDWORD) a;
116PDWORD dwPtrB = (PDWORD) b; 112 PDWORD dwPtrB = (PDWORD) b;
117PDWORD dwPtrOut =(PDWORD) out; 113 PDWORD dwPtrOut = (PDWORD) out;
118 114
119 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++); 115 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++);
120 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++); 116 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++);
121 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++); 117 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++);
122 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++); 118 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++);
123} 119}
124 120
125 121
126void xor_32(BYTE *a, BYTE *b, BYTE *out) 122void xor_32(BYTE *a, BYTE *b, BYTE *out)
127{ 123{
128PDWORD dwPtrA = (PDWORD) a; 124 PDWORD dwPtrA = (PDWORD) a;
129PDWORD dwPtrB = (PDWORD) b; 125 PDWORD dwPtrB = (PDWORD) b;
130PDWORD dwPtrOut =(PDWORD) out; 126 PDWORD dwPtrOut = (PDWORD) out;
131 127
132 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++); 128 (*dwPtrOut++) = (*dwPtrA++) ^ (*dwPtrB++);
133} 129}
134 130
135void AddRoundKey(BYTE *key, int round) 131void AddRoundKey(BYTE *key, int round)
136{ 132{
137BYTE sbox_key[4]; 133 BYTE sbox_key[4];
138BYTE rcon_table[10] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36}; 134 BYTE rcon_table[10] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36};
139 135
140 sbox_key[0] = sbox_table[key[13]]; 136 sbox_key[0] = sbox_table[key[13]];
141 sbox_key[1] = sbox_table[key[14]]; 137 sbox_key[1] = sbox_table[key[14]];
142 sbox_key[2] = sbox_table[key[15]]; 138 sbox_key[2] = sbox_table[key[15]];
143 sbox_key[3] = sbox_table[key[12]]; 139 sbox_key[3] = sbox_table[key[12]];
144 140
145 key[0] = key[0] ^ rcon_table[round]; 141 key[0] = key[0] ^ rcon_table[round];
146 xor_32(&key[0], sbox_key, &key[0]); 142 xor_32(&key[0], sbox_key, &key[0]);
147 143
148 xor_32(&key[4], &key[0], &key[4]); 144 xor_32(&key[4], &key[0], &key[4]);
149 xor_32(&key[8], &key[4], &key[8]); 145 xor_32(&key[8], &key[4], &key[8]);
150 xor_32(&key[12], &key[8], &key[12]); 146 xor_32(&key[12], &key[8], &key[12]);
151} 147}
152 148
153void SubBytes(BYTE *in, BYTE *out) 149void SubBytes(BYTE *in, BYTE *out)
154{ 150{
155int i; 151 int i;
156 152
157 for (i=0; i< 16; i++) 153 for (i = 0; i < 16; i++)
158 { 154 out[i] = sbox_table[in[i]];
159 out[i] = sbox_table[in[i]];
160 }
161} 155}
162 156
163void ShiftRows(BYTE *in, BYTE *out) 157void ShiftRows(BYTE *in, BYTE *out)
164{ 158{
165 out[0] = in[0]; 159 out[0] = in[0];
166 out[1] = in[5]; 160 out[1] = in[5];
167 out[2] = in[10]; 161 out[2] = in[10];
168 out[3] = in[15]; 162 out[3] = in[15];
169 out[4] = in[4]; 163 out[4] = in[4];
170 out[5] = in[9]; 164 out[5] = in[9];
171 out[6] = in[14]; 165 out[6] = in[14];
172 out[7] = in[3]; 166 out[7] = in[3];
173 out[8] = in[8]; 167 out[8] = in[8];
174 out[9] = in[13]; 168 out[9] = in[13];
175 out[10] = in[2]; 169 out[10] = in[2];
176 out[11] = in[7]; 170 out[11] = in[7];
177 out[12] = in[12]; 171 out[12] = in[12];
178 out[13] = in[1]; 172 out[13] = in[1];
179 out[14] = in[6]; 173 out[14] = in[6];
180 out[15] = in[11]; 174 out[15] = in[11];
181} 175}
182 176
183void MixColumns(BYTE *in, BYTE *out) 177void MixColumns(BYTE *in, BYTE *out)
184{ 178{
185 179
186 out[0] = dot2_table[in[0]] ^ dot3_table[in[1]] ^ in[2] ^ in[3]; 180 out[0] = dot2_table[in[0]] ^ dot3_table[in[1]] ^ in[2] ^ in[3];
187 out[1] = in[0] ^ dot2_table[in[1]] ^ dot3_table[in[2]] ^ in[3]; 181 out[1] = in[0] ^ dot2_table[in[1]] ^ dot3_table[in[2]] ^ in[3];
188 out[2] = in[0] ^ in[1] ^ dot2_table[in[2]] ^ dot3_table[in[3]]; 182 out[2] = in[0] ^ in[1] ^ dot2_table[in[2]] ^ dot3_table[in[3]];
189 out[3] = dot3_table[in[0]] ^ in[1] ^ in[2] ^ dot2_table[in[3]]; 183 out[3] = dot3_table[in[0]] ^ in[1] ^ in[2] ^ dot2_table[in[3]];
190} 184}
191 185
192
193void AESv128(BYTE *key, BYTE *data, BYTE *ciphertext) 186void AESv128(BYTE *key, BYTE *data, BYTE *ciphertext)
194{ 187{
195int i; 188 int i;
196int round; 189 int round;
197BYTE TmpdataA[16]; 190 BYTE TmpdataA[16];
198BYTE TmpdataB[16]; 191 BYTE TmpdataB[16];
199BYTE abyRoundKey[16]; 192 BYTE abyRoundKey[16];
200 193
201 for(i=0; i<16; i++) 194 for (i = 0; i < 16; i++)
202 abyRoundKey[i] = key[i]; 195 abyRoundKey[i] = key[i];
203 196
204 for (round = 0; round < 11; round++) 197 for (round = 0; round < 11; round++) {
205 { 198 if (round == 0) {
206 if (round == 0) 199 xor_128(abyRoundKey, data, ciphertext);
207 { 200 AddRoundKey(abyRoundKey, round);
208 xor_128(abyRoundKey, data, ciphertext); 201 } else if (round == 10) {
209 AddRoundKey(abyRoundKey, round); 202 SubBytes(ciphertext, TmpdataA);
210 } 203 ShiftRows(TmpdataA, TmpdataB);
211 else if (round == 10) 204 xor_128(TmpdataB, abyRoundKey, ciphertext);
212 { 205 } else { /* round 1 ~ 9 */
213 SubBytes(ciphertext, TmpdataA); 206 SubBytes(ciphertext, TmpdataA);
214 ShiftRows(TmpdataA, TmpdataB); 207 ShiftRows(TmpdataA, TmpdataB);
215 xor_128(TmpdataB, abyRoundKey, ciphertext); 208 MixColumns(&TmpdataB[0], &TmpdataA[0]);
216 } 209 MixColumns(&TmpdataB[4], &TmpdataA[4]);
217 else // round 1 ~ 9 210 MixColumns(&TmpdataB[8], &TmpdataA[8]);
218 { 211 MixColumns(&TmpdataB[12], &TmpdataA[12]);
219 SubBytes(ciphertext, TmpdataA); 212 xor_128(TmpdataA, abyRoundKey, ciphertext);
220 ShiftRows(TmpdataA, TmpdataB); 213 AddRoundKey(abyRoundKey, round);
221 MixColumns(&TmpdataB[0], &TmpdataA[0]); 214 }
222 MixColumns(&TmpdataB[4], &TmpdataA[4]); 215 }
223 MixColumns(&TmpdataB[8], &TmpdataA[8]);
224 MixColumns(&TmpdataB[12], &TmpdataA[12]);
225 xor_128(TmpdataA, abyRoundKey, ciphertext);
226 AddRoundKey(abyRoundKey, round);
227 }
228 }
229 216
230} 217}
231 218
@@ -243,160 +230,157 @@ BYTE abyRoundKey[16];
243 * Return Value: MIC compare result 230 * Return Value: MIC compare result
244 * 231 *
245 */ 232 */
233
246BOOL AESbGenCCMP(PBYTE pbyRxKey, PBYTE pbyFrame, WORD wFrameSize) 234BOOL AESbGenCCMP(PBYTE pbyRxKey, PBYTE pbyFrame, WORD wFrameSize)
247{ 235{
248BYTE abyNonce[13]; 236 BYTE abyNonce[13];
249BYTE MIC_IV[16]; 237 BYTE MIC_IV[16];
250BYTE MIC_HDR1[16]; 238 BYTE MIC_HDR1[16];
251BYTE MIC_HDR2[16]; 239 BYTE MIC_HDR2[16];
252BYTE abyMIC[16]; 240 BYTE abyMIC[16];
253BYTE abyCTRPLD[16]; 241 BYTE abyCTRPLD[16];
254BYTE abyTmp[16]; 242 BYTE abyTmp[16];
255BYTE abyPlainText[16]; 243 BYTE abyPlainText[16];
256BYTE abyLastCipher[16]; 244 BYTE abyLastCipher[16];
257 245
258PS802_11Header pMACHeader = (PS802_11Header) pbyFrame; 246 PS802_11Header pMACHeader = (PS802_11Header) pbyFrame;
259PBYTE pbyIV; 247 PBYTE pbyIV;
260PBYTE pbyPayload; 248 PBYTE pbyPayload;
261WORD wHLen = 22; 249 WORD wHLen = 22;
262WORD wPayloadSize = wFrameSize - 8 - 8 - 4 - WLAN_HDR_ADDR3_LEN;//8 is IV, 8 is MIC, 4 is CRC 250 /* 8 is IV, 8 is MIC, 4 is CRC */
263BOOL bA4 = FALSE; 251 WORD wPayloadSize = wFrameSize - 8 - 8 - 4 - WLAN_HDR_ADDR3_LEN;
264BYTE byTmp; 252 BOOL bA4 = FALSE;
265WORD wCnt; 253 BYTE byTmp;
266int ii,jj,kk; 254 WORD wCnt;
267 255 int ii, jj, kk;
268 256
269 pbyIV = pbyFrame + WLAN_HDR_ADDR3_LEN; 257 pbyIV = pbyFrame + WLAN_HDR_ADDR3_LEN;
270 if ( WLAN_GET_FC_TODS(*(PWORD)pbyFrame) && 258 if (WLAN_GET_FC_TODS(*(PWORD) pbyFrame) &&
271 WLAN_GET_FC_FROMDS(*(PWORD)pbyFrame) ) { 259 WLAN_GET_FC_FROMDS(*(PWORD) pbyFrame)) {
272 bA4 = TRUE; 260 bA4 = TRUE;
273 pbyIV += 6; // 6 is 802.11 address4 261 pbyIV += 6; /* 6 is 802.11 address4 */
274 wHLen += 6; 262 wHLen += 6;
275 wPayloadSize -= 6; 263 wPayloadSize -= 6;
276 } 264 }
277 pbyPayload = pbyIV + 8; //IV-length 265 pbyPayload = pbyIV + 8; /* IV-length */
278 266
279 abyNonce[0] = 0x00; //now is 0, if Qos here will be priority 267 abyNonce[0] = 0x00; /* now is 0, if Qos here will be priority */
280 memcpy(&(abyNonce[1]), pMACHeader->abyAddr2, U_ETHER_ADDR_LEN); 268 memcpy(&(abyNonce[1]), pMACHeader->abyAddr2, ETH_ALEN);
281 abyNonce[7] = pbyIV[7]; 269 abyNonce[7] = pbyIV[7];
282 abyNonce[8] = pbyIV[6]; 270 abyNonce[8] = pbyIV[6];
283 abyNonce[9] = pbyIV[5]; 271 abyNonce[9] = pbyIV[5];
284 abyNonce[10] = pbyIV[4]; 272 abyNonce[10] = pbyIV[4];
285 abyNonce[11] = pbyIV[1]; 273 abyNonce[11] = pbyIV[1];
286 abyNonce[12] = pbyIV[0]; 274 abyNonce[12] = pbyIV[0];
287 275
288 //MIC_IV 276 /* MIC_IV */
289 MIC_IV[0] = 0x59; 277 MIC_IV[0] = 0x59;
290 memcpy(&(MIC_IV[1]), &(abyNonce[0]), 13); 278 memcpy(&(MIC_IV[1]), &(abyNonce[0]), 13);
291 MIC_IV[14] = (BYTE)(wPayloadSize >> 8); 279 MIC_IV[14] = (BYTE)(wPayloadSize >> 8);
292 MIC_IV[15] = (BYTE)(wPayloadSize & 0xff); 280 MIC_IV[15] = (BYTE)(wPayloadSize & 0xff);
293 281
294 //MIC_HDR1 282 /* MIC_HDR1 */
295 MIC_HDR1[0] = (BYTE)(wHLen >> 8); 283 MIC_HDR1[0] = (BYTE)(wHLen >> 8);
296 MIC_HDR1[1] = (BYTE)(wHLen & 0xff); 284 MIC_HDR1[1] = (BYTE)(wHLen & 0xff);
297 byTmp = (BYTE)(pMACHeader->wFrameCtl & 0xff); 285 byTmp = (BYTE)(pMACHeader->wFrameCtl & 0xff);
298 MIC_HDR1[2] = byTmp & 0x8f; 286 MIC_HDR1[2] = byTmp & 0x8f;
299 byTmp = (BYTE)(pMACHeader->wFrameCtl >> 8); 287 byTmp = (BYTE)(pMACHeader->wFrameCtl >> 8);
300 byTmp &= 0x87; 288 byTmp &= 0x87;
301 MIC_HDR1[3] = byTmp | 0x40; 289 MIC_HDR1[3] = byTmp | 0x40;
302 memcpy(&(MIC_HDR1[4]), pMACHeader->abyAddr1, U_ETHER_ADDR_LEN); 290 memcpy(&(MIC_HDR1[4]), pMACHeader->abyAddr1, ETH_ALEN);
303 memcpy(&(MIC_HDR1[10]), pMACHeader->abyAddr2, U_ETHER_ADDR_LEN); 291 memcpy(&(MIC_HDR1[10]), pMACHeader->abyAddr2, ETH_ALEN);
304 292
305 //MIC_HDR2 293 /* MIC_HDR2 */
306 memcpy(&(MIC_HDR2[0]), pMACHeader->abyAddr3, U_ETHER_ADDR_LEN); 294 memcpy(&(MIC_HDR2[0]), pMACHeader->abyAddr3, ETH_ALEN);
307 byTmp = (BYTE)(pMACHeader->wSeqCtl & 0xff); 295 byTmp = (BYTE)(pMACHeader->wSeqCtl & 0xff);
308 MIC_HDR2[6] = byTmp & 0x0f; 296 MIC_HDR2[6] = byTmp & 0x0f;
309 MIC_HDR2[7] = 0; 297 MIC_HDR2[7] = 0;
310 if ( bA4 ) { 298
311 memcpy(&(MIC_HDR2[8]), pMACHeader->abyAddr4, U_ETHER_ADDR_LEN); 299 if (bA4) {
312 } else { 300 memcpy(&(MIC_HDR2[8]), pMACHeader->abyAddr4, ETH_ALEN);
313 MIC_HDR2[8] = 0x00; 301 } else {
314 MIC_HDR2[9] = 0x00; 302 MIC_HDR2[8] = 0x00;
315 MIC_HDR2[10] = 0x00; 303 MIC_HDR2[9] = 0x00;
316 MIC_HDR2[11] = 0x00; 304 MIC_HDR2[10] = 0x00;
317 MIC_HDR2[12] = 0x00; 305 MIC_HDR2[11] = 0x00;
318 MIC_HDR2[13] = 0x00; 306 MIC_HDR2[12] = 0x00;
319 } 307 MIC_HDR2[13] = 0x00;
320 MIC_HDR2[14] = 0x00; 308 }
321 MIC_HDR2[15] = 0x00; 309 MIC_HDR2[14] = 0x00;
322 310 MIC_HDR2[15] = 0x00;
323 //CCMP 311
324 AESv128(pbyRxKey,MIC_IV,abyMIC); 312 /* CCMP */
325 for ( kk=0; kk<16; kk++ ) { 313 AESv128(pbyRxKey, MIC_IV, abyMIC);
326 abyTmp[kk] = MIC_HDR1[kk] ^ abyMIC[kk]; 314 for (kk = 0; kk < 16; kk++)
327 } 315 abyTmp[kk] = MIC_HDR1[kk] ^ abyMIC[kk];
328 AESv128(pbyRxKey,abyTmp,abyMIC); 316
329 for ( kk=0; kk<16; kk++ ) { 317 AESv128(pbyRxKey, abyTmp, abyMIC);
330 abyTmp[kk] = MIC_HDR2[kk] ^ abyMIC[kk]; 318 for (kk = 0; kk < 16; kk++)
331 } 319 abyTmp[kk] = MIC_HDR2[kk] ^ abyMIC[kk];
332 AESv128(pbyRxKey,abyTmp,abyMIC); 320
333 321 AESv128(pbyRxKey, abyTmp, abyMIC);
334 wCnt = 1; 322
335 abyCTRPLD[0] = 0x01; 323 wCnt = 1;
336 memcpy(&(abyCTRPLD[1]), &(abyNonce[0]), 13); 324 abyCTRPLD[0] = 0x01;
337 325 memcpy(&(abyCTRPLD[1]), &(abyNonce[0]), 13);
338 for(jj=wPayloadSize; jj>16; jj=jj-16) { 326
339 327 for (jj = wPayloadSize; jj > 16; jj = jj-16) {
340 abyCTRPLD[14] = (BYTE) (wCnt >> 8); 328
341 abyCTRPLD[15] = (BYTE) (wCnt & 0xff); 329 abyCTRPLD[14] = (BYTE) (wCnt >> 8);
342 330 abyCTRPLD[15] = (BYTE) (wCnt & 0xff);
343 AESv128(pbyRxKey,abyCTRPLD,abyTmp); 331
344 332 AESv128(pbyRxKey, abyCTRPLD, abyTmp);
345 for ( kk=0; kk<16; kk++ ) { 333
346 abyPlainText[kk] = abyTmp[kk] ^ pbyPayload[kk]; 334 for (kk = 0; kk < 16; kk++)
347 } 335 abyPlainText[kk] = abyTmp[kk] ^ pbyPayload[kk];
348 for ( kk=0; kk<16; kk++ ) { 336
349 abyTmp[kk] = abyMIC[kk] ^ abyPlainText[kk]; 337 for (kk = 0; kk < 16; kk++)
350 } 338 abyTmp[kk] = abyMIC[kk] ^ abyPlainText[kk];
351 AESv128(pbyRxKey,abyTmp,abyMIC); 339
352 340 AESv128(pbyRxKey, abyTmp, abyMIC);
353 memcpy(pbyPayload, abyPlainText, 16); 341
354 wCnt++; 342 memcpy(pbyPayload, abyPlainText, 16);
355 pbyPayload += 16; 343 wCnt++;
356 } //for wPayloadSize 344 pbyPayload += 16;
357 345 } /* for wPayloadSize */
358 //last payload 346
359 memcpy(&(abyLastCipher[0]), pbyPayload, jj); 347 /* last payload */
360 for ( ii=jj; ii<16; ii++ ) { 348 memcpy(&(abyLastCipher[0]), pbyPayload, jj);
361 abyLastCipher[ii] = 0x00; 349 for (ii = jj; ii < 16; ii++)
362 } 350 abyLastCipher[ii] = 0x00;
363 351
364 abyCTRPLD[14] = (BYTE) (wCnt >> 8); 352 abyCTRPLD[14] = (BYTE) (wCnt >> 8);
365 abyCTRPLD[15] = (BYTE) (wCnt & 0xff); 353 abyCTRPLD[15] = (BYTE) (wCnt & 0xff);
366 354
367 AESv128(pbyRxKey,abyCTRPLD,abyTmp); 355 AESv128(pbyRxKey, abyCTRPLD, abyTmp);
368 for ( kk=0; kk<16; kk++ ) { 356 for (kk = 0; kk < 16; kk++)
369 abyPlainText[kk] = abyTmp[kk] ^ abyLastCipher[kk]; 357 abyPlainText[kk] = abyTmp[kk] ^ abyLastCipher[kk];
370 } 358
371 memcpy(pbyPayload, abyPlainText, jj); 359 memcpy(pbyPayload, abyPlainText, jj);
372 pbyPayload += jj; 360 pbyPayload += jj;
373 361
374 //for MIC calculation 362 /* for MIC calculation */
375 for ( ii=jj; ii<16; ii++ ) { 363 for (ii = jj; ii < 16; ii++)
376 abyPlainText[ii] = 0x00; 364 abyPlainText[ii] = 0x00;
377 } 365 for (kk = 0; kk < 16; kk++)
378 for ( kk=0; kk<16; kk++ ) { 366 abyTmp[kk] = abyMIC[kk] ^ abyPlainText[kk];
379 abyTmp[kk] = abyMIC[kk] ^ abyPlainText[kk]; 367
380 } 368 AESv128(pbyRxKey, abyTmp, abyMIC);
381 AESv128(pbyRxKey,abyTmp,abyMIC); 369
382 370 /* => above is the calculated MIC */
383 //=>above is the calculate MIC 371
384 //-------------------------------------------- 372 wCnt = 0;
385 373 abyCTRPLD[14] = (BYTE) (wCnt >> 8);
386 wCnt = 0; 374 abyCTRPLD[15] = (BYTE) (wCnt & 0xff);
387 abyCTRPLD[14] = (BYTE) (wCnt >> 8); 375 AESv128(pbyRxKey, abyCTRPLD, abyTmp);
388 abyCTRPLD[15] = (BYTE) (wCnt & 0xff); 376
389 AESv128(pbyRxKey,abyCTRPLD,abyTmp); 377 for (kk = 0; kk < 8; kk++)
390 for ( kk=0; kk<8; kk++ ) { 378 abyTmp[kk] = abyTmp[kk] ^ pbyPayload[kk];
391 abyTmp[kk] = abyTmp[kk] ^ pbyPayload[kk]; 379
392 } 380 /* => above is the packet dec-MIC */
393 //=>above is the dec-MIC from packet 381
394 //-------------------------------------------- 382 if (!memcmp(abyMIC, abyTmp, 8))
395 383 return TRUE;
396 if ( !memcmp(abyMIC,abyTmp,8) ) { 384 else
397 return TRUE; 385 return FALSE;
398 } else {
399 return FALSE;
400 }
401
402} 386}
diff --git a/drivers/staging/vt6656/aes_ccmp.h b/drivers/staging/vt6656/aes_ccmp.h
index f2ba1d5aa1e5..353bd210a502 100644
--- a/drivers/staging/vt6656/aes_ccmp.h
+++ b/drivers/staging/vt6656/aes_ccmp.h
@@ -43,4 +43,4 @@
43/*--------------------- Export Functions --------------------------*/ 43/*--------------------- Export Functions --------------------------*/
44BOOL AESbGenCCMP(PBYTE pbyRxKey, PBYTE pbyFrame, WORD wFrameSize); 44BOOL AESbGenCCMP(PBYTE pbyRxKey, PBYTE pbyFrame, WORD wFrameSize);
45 45
46#endif //__AES_H__ 46#endif /* __AES_CCMP_H__ */
diff --git a/drivers/staging/vt6656/baseband.c b/drivers/staging/vt6656/baseband.c
index 7dc01dbfc6ff..d3de94f36c6e 100644
--- a/drivers/staging/vt6656/baseband.c
+++ b/drivers/staging/vt6656/baseband.c
@@ -662,11 +662,11 @@ const WORD awcFrameTime[MAX_RATE] =
662 662
663/* 663/*
664static 664static
665ULONG 665unsigned long
666s_ulGetLowSQ3(PSDevice pDevice); 666s_ulGetLowSQ3(PSDevice pDevice);
667 667
668static 668static
669ULONG 669unsigned long
670s_ulGetRatio(PSDevice pDevice); 670s_ulGetRatio(PSDevice pDevice);
671 671
672static 672static
@@ -689,19 +689,19 @@ s_vClearSQ3Value(PSDevice pDevice);
689 * Return Value: FrameTime 689 * Return Value: FrameTime
690 * 690 *
691 */ 691 */
692UINT 692unsigned int
693BBuGetFrameTime ( 693BBuGetFrameTime (
694 IN BYTE byPreambleType, 694 BYTE byPreambleType,
695 IN BYTE byPktType, 695 BYTE byPktType,
696 IN UINT cbFrameLength, 696 unsigned int cbFrameLength,
697 IN WORD wRate 697 WORD wRate
698 ) 698 )
699{ 699{
700 UINT uFrameTime; 700 unsigned int uFrameTime;
701 UINT uPreamble; 701 unsigned int uPreamble;
702 UINT uTmp; 702 unsigned int uTmp;
703 UINT uRateIdx = (UINT)wRate; 703 unsigned int uRateIdx = (unsigned int)wRate;
704 UINT uRate = 0; 704 unsigned int uRate = 0;
705 705
706 706
707 if (uRateIdx > RATE_54M) { 707 if (uRateIdx > RATE_54M) {
@@ -709,7 +709,7 @@ BBuGetFrameTime (
709 return 0; 709 return 0;
710 } 710 }
711 711
712 uRate = (UINT)awcFrameTime[uRateIdx]; 712 uRate = (unsigned int)awcFrameTime[uRateIdx];
713 713
714 if (uRateIdx <= 3) { //CCK mode 714 if (uRateIdx <= 3) { //CCK mode
715 715
@@ -756,20 +756,20 @@ BBuGetFrameTime (
756 * Return Value: none 756 * Return Value: none
757 * 757 *
758 */ 758 */
759VOID 759void
760BBvCaculateParameter ( 760BBvCaculateParameter (
761 IN PSDevice pDevice, 761 PSDevice pDevice,
762 IN UINT cbFrameLength, 762 unsigned int cbFrameLength,
763 IN WORD wRate, 763 WORD wRate,
764 IN BYTE byPacketType, 764 BYTE byPacketType,
765 OUT PWORD pwPhyLen, 765 PWORD pwPhyLen,
766 OUT PBYTE pbyPhySrv, 766 PBYTE pbyPhySrv,
767 OUT PBYTE pbyPhySgn 767 PBYTE pbyPhySgn
768 ) 768 )
769{ 769{
770 UINT cbBitCount; 770 unsigned int cbBitCount;
771 UINT cbUsCount = 0; 771 unsigned int cbUsCount = 0;
772 UINT cbTmp; 772 unsigned int cbTmp;
773 BOOL bExtBit; 773 BOOL bExtBit;
774 BYTE byPreambleType = pDevice->byPreambleType; 774 BYTE byPreambleType = pDevice->byPreambleType;
775 BOOL bCCK = pDevice->bCCK; 775 BOOL bCCK = pDevice->bCCK;
@@ -929,7 +929,7 @@ BBvCaculateParameter (
929 * Return Value: none 929 * Return Value: none
930 * 930 *
931 */ 931 */
932VOID 932void
933BBvSetAntennaMode (PSDevice pDevice, BYTE byAntennaMode) 933BBvSetAntennaMode (PSDevice pDevice, BYTE byAntennaMode)
934{ 934{
935 //{{ RobertYu: 20041124, ABG Mode, VC1/VC2 define, make the ANT_A, ANT_B inverted 935 //{{ RobertYu: 20041124, ABG Mode, VC1/VC2 define, make the ANT_A, ANT_B inverted
@@ -1274,7 +1274,7 @@ void BBvLoopbackOff (PSDevice pDevice)
1274 * Return Value: none 1274 * Return Value: none
1275 * 1275 *
1276 */ 1276 */
1277VOID 1277void
1278BBvSetShortSlotTime (PSDevice pDevice) 1278BBvSetShortSlotTime (PSDevice pDevice)
1279{ 1279{
1280 BYTE byBBVGA=0; 1280 BYTE byBBVGA=0;
@@ -1295,7 +1295,7 @@ BBvSetShortSlotTime (PSDevice pDevice)
1295} 1295}
1296 1296
1297 1297
1298VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData) 1298void BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
1299{ 1299{
1300 1300
1301 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0xE7, byData); 1301 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0xE7, byData);
@@ -1324,7 +1324,7 @@ VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
1324 * Return Value: none 1324 * Return Value: none
1325 * 1325 *
1326 */ 1326 */
1327VOID 1327void
1328BBvSoftwareReset (PSDevice pDevice) 1328BBvSoftwareReset (PSDevice pDevice)
1329{ 1329{
1330 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x50, 0x40); 1330 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x50, 0x40);
@@ -1345,14 +1345,14 @@ BBvSoftwareReset (PSDevice pDevice)
1345 * Return Value: none 1345 * Return Value: none
1346 * 1346 *
1347 */ 1347 */
1348VOID 1348void
1349BBvSetDeepSleep (PSDevice pDevice) 1349BBvSetDeepSleep (PSDevice pDevice)
1350{ 1350{
1351 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);//CR12 1351 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);//CR12
1352 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0D, 0xB9);//CR13 1352 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0D, 0xB9);//CR13
1353} 1353}
1354 1354
1355VOID 1355void
1356BBvExitDeepSleep (PSDevice pDevice) 1356BBvExitDeepSleep (PSDevice pDevice)
1357{ 1357{
1358 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0C, 0x00);//CR12 1358 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0C, 0x00);//CR12
@@ -1360,13 +1360,11 @@ BBvExitDeepSleep (PSDevice pDevice)
1360} 1360}
1361 1361
1362 1362
1363static 1363static unsigned long s_ulGetLowSQ3(PSDevice pDevice)
1364ULONG
1365s_ulGetLowSQ3(PSDevice pDevice)
1366{ 1364{
1367int ii; 1365 int ii;
1368ULONG ulSQ3 = 0; 1366 unsigned long ulSQ3 = 0;
1369ULONG ulMaxPacket; 1367 unsigned long ulMaxPacket;
1370 1368
1371 ulMaxPacket = pDevice->aulPktNum[RATE_54M]; 1369 ulMaxPacket = pDevice->aulPktNum[RATE_54M];
1372 if ( pDevice->aulPktNum[RATE_54M] != 0 ) { 1370 if ( pDevice->aulPktNum[RATE_54M] != 0 ) {
@@ -1382,16 +1380,12 @@ ULONG ulMaxPacket;
1382 return ulSQ3; 1380 return ulSQ3;
1383} 1381}
1384 1382
1385 1383static unsigned long s_ulGetRatio(PSDevice pDevice)
1386
1387static
1388ULONG
1389s_ulGetRatio (PSDevice pDevice)
1390{ 1384{
1391int ii,jj; 1385 int ii, jj;
1392ULONG ulRatio = 0; 1386 unsigned long ulRatio = 0;
1393ULONG ulMaxPacket; 1387 unsigned long ulMaxPacket;
1394ULONG ulPacketNum; 1388 unsigned long ulPacketNum;
1395 1389
1396 //This is a thousand-ratio 1390 //This is a thousand-ratio
1397 ulMaxPacket = pDevice->aulPktNum[RATE_54M]; 1391 ulMaxPacket = pDevice->aulPktNum[RATE_54M];
@@ -1445,7 +1439,7 @@ s_vClearSQ3Value (PSDevice pDevice)
1445 * 1439 *
1446 */ 1440 */
1447 1441
1448VOID 1442void
1449BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3) 1443BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
1450{ 1444{
1451 1445
@@ -1513,7 +1507,9 @@ BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
1513 if ( pDevice->byTMax == 0 ) 1507 if ( pDevice->byTMax == 0 )
1514 return; 1508 return;
1515 1509
1516 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_ANTENNA, NULL); 1510 bScheduleCommand((void *) pDevice,
1511 WLAN_CMD_CHANGE_ANTENNA,
1512 NULL);
1517 1513
1518 pDevice->byAntennaState = 1; 1514 pDevice->byAntennaState = 1;
1519 1515
@@ -1543,7 +1539,9 @@ BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
1543 ((pDevice->ulSQ3_State1 != 0) && (pDevice->ulSQ3_State0 != 0) && (pDevice->ulSQ3_State0 < pDevice->ulSQ3_State1)) 1539 ((pDevice->ulSQ3_State1 != 0) && (pDevice->ulSQ3_State0 != 0) && (pDevice->ulSQ3_State0 < pDevice->ulSQ3_State1))
1544 ) { 1540 ) {
1545 1541
1546 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_ANTENNA, NULL); 1542 bScheduleCommand((void *) pDevice,
1543 WLAN_CMD_CHANGE_ANTENNA,
1544 NULL);
1547 1545
1548 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ); 1546 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
1549 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ); 1547 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
@@ -1576,17 +1574,14 @@ BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
1576 * 1574 *
1577-*/ 1575-*/
1578 1576
1579VOID 1577void TimerSQ3CallBack(void *hDeviceContext)
1580TimerSQ3CallBack (
1581 IN HANDLE hDeviceContext
1582 )
1583{ 1578{
1584 PSDevice pDevice = (PSDevice)hDeviceContext; 1579 PSDevice pDevice = (PSDevice)hDeviceContext;
1585 1580
1586 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerSQ3CallBack..."); 1581 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerSQ3CallBack...");
1587 spin_lock_irq(&pDevice->lock); 1582 spin_lock_irq(&pDevice->lock);
1588 1583
1589 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_ANTENNA, NULL); 1584 bScheduleCommand((void *) pDevice, WLAN_CMD_CHANGE_ANTENNA, NULL);
1590 pDevice->byAntennaState = 0; 1585 pDevice->byAntennaState = 0;
1591 s_vClearSQ3Value(pDevice); 1586 s_vClearSQ3Value(pDevice);
1592 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ); 1587 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
@@ -1618,10 +1613,7 @@ TimerSQ3CallBack (
1618 * 1613 *
1619-*/ 1614-*/
1620 1615
1621VOID 1616void TimerSQ3Tmax3CallBack(void *hDeviceContext)
1622TimerSQ3Tmax3CallBack (
1623 IN HANDLE hDeviceContext
1624 )
1625{ 1617{
1626 PSDevice pDevice = (PSDevice)hDeviceContext; 1618 PSDevice pDevice = (PSDevice)hDeviceContext;
1627 1619
@@ -1639,7 +1631,7 @@ TimerSQ3Tmax3CallBack (
1639 return; 1631 return;
1640 } 1632 }
1641 1633
1642 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_ANTENNA, NULL); 1634 bScheduleCommand((void *) pDevice, WLAN_CMD_CHANGE_ANTENNA, NULL);
1643 pDevice->byAntennaState = 1; 1635 pDevice->byAntennaState = 1;
1644 del_timer(&pDevice->TimerSQ3Tmax3); 1636 del_timer(&pDevice->TimerSQ3Tmax3);
1645 del_timer(&pDevice->TimerSQ3Tmax2); 1637 del_timer(&pDevice->TimerSQ3Tmax2);
@@ -1650,10 +1642,10 @@ TimerSQ3Tmax3CallBack (
1650 return; 1642 return;
1651} 1643}
1652 1644
1653VOID 1645void
1654BBvUpdatePreEDThreshold( 1646BBvUpdatePreEDThreshold(
1655 IN PSDevice pDevice, 1647 PSDevice pDevice,
1656 IN BOOL bScanning) 1648 BOOL bScanning)
1657{ 1649{
1658 1650
1659 1651
diff --git a/drivers/staging/vt6656/baseband.h b/drivers/staging/vt6656/baseband.h
index e991a7e68d4a..bc4633d5fead 100644
--- a/drivers/staging/vt6656/baseband.h
+++ b/drivers/staging/vt6656/baseband.h
@@ -96,51 +96,44 @@
96 96
97/*--------------------- Export Functions --------------------------*/ 97/*--------------------- Export Functions --------------------------*/
98 98
99UINT 99unsigned int
100BBuGetFrameTime( 100BBuGetFrameTime(
101 IN BYTE byPreambleType, 101 BYTE byPreambleType,
102 IN BYTE byFreqType, 102 BYTE byFreqType,
103 IN UINT cbFrameLength, 103 unsigned int cbFrameLength,
104 IN WORD wRate 104 WORD wRate
105 ); 105 );
106 106
107VOID 107void
108BBvCaculateParameter ( 108BBvCaculateParameter (
109 IN PSDevice pDevice, 109 PSDevice pDevice,
110 IN UINT cbFrameLength, 110 unsigned int cbFrameLength,
111 IN WORD wRate, 111 WORD wRate,
112 IN BYTE byPacketType, 112 BYTE byPacketType,
113 OUT PWORD pwPhyLen, 113 PWORD pwPhyLen,
114 OUT PBYTE pbyPhySrv, 114 PBYTE pbyPhySrv,
115 OUT PBYTE pbyPhySgn 115 PBYTE pbyPhySgn
116 ); 116 );
117 117
118// timer for antenna diversity 118// timer for antenna diversity
119 119
120VOID 120void TimerSQ3CallBack(void *hDeviceContext);
121TimerSQ3CallBack ( 121void TimerSQ3Tmax3CallBack(void *hDeviceContext);
122 IN HANDLE hDeviceContext
123 );
124
125VOID
126TimerSQ3Tmax3CallBack (
127 IN HANDLE hDeviceContext
128 );
129 122
130VOID BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3); 123void BBvAntennaDiversity(PSDevice pDevice, BYTE byRxRate, BYTE bySQ3);
131void BBvLoopbackOn (PSDevice pDevice); 124void BBvLoopbackOn(PSDevice pDevice);
132void BBvLoopbackOff (PSDevice pDevice); 125void BBvLoopbackOff(PSDevice pDevice);
133void BBvSoftwareReset (PSDevice pDevice); 126void BBvSoftwareReset(PSDevice pDevice);
134 127
135void BBvSetShortSlotTime(PSDevice pDevice); 128void BBvSetShortSlotTime(PSDevice pDevice);
136VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData); 129void BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData);
137void BBvSetAntennaMode(PSDevice pDevice, BYTE byAntennaMode); 130void BBvSetAntennaMode(PSDevice pDevice, BYTE byAntennaMode);
138BOOL BBbVT3184Init (PSDevice pDevice); 131BOOL BBbVT3184Init (PSDevice pDevice);
139VOID BBvSetDeepSleep (PSDevice pDevice); 132void BBvSetDeepSleep(PSDevice pDevice);
140VOID BBvExitDeepSleep (PSDevice pDevice); 133void BBvExitDeepSleep(PSDevice pDevice);
141VOID BBvUpdatePreEDThreshold( 134void BBvUpdatePreEDThreshold(
142 IN PSDevice pDevice, 135 PSDevice pDevice,
143 IN BOOL bScanning 136 BOOL bScanning
144 ); 137 );
145 138
146#endif // __BASEBAND_H__ 139#endif /* __BASEBAND_H__ */
diff --git a/drivers/staging/vt6656/bssdb.c b/drivers/staging/vt6656/bssdb.c
index 6b1678bfd61a..36ed61b595ca 100644
--- a/drivers/staging/vt6656/bssdb.c
+++ b/drivers/staging/vt6656/bssdb.c
@@ -91,19 +91,13 @@ const WORD awHWRetry1[5][5] = {
91 91
92/*--------------------- Static Functions --------------------------*/ 92/*--------------------- Static Functions --------------------------*/
93 93
94VOID s_vCheckSensitivity( 94void s_vCheckSensitivity(void *hDeviceContext);
95 IN HANDLE hDeviceContext 95void s_vCheckPreEDThreshold(void *hDeviceContext);
96 );
97
98VOID s_vCheckPreEDThreshold(
99 IN HANDLE hDeviceContext
100 );
101 96
102#ifdef Calcu_LinkQual 97#ifdef Calcu_LinkQual
103VOID s_uCalculateLinkQual( 98void s_uCalculateLinkQual(void *hDeviceContext);
104 IN HANDLE hDeviceContext
105 );
106#endif 99#endif
100
107/*--------------------- Export Variables --------------------------*/ 101/*--------------------- Export Variables --------------------------*/
108 102
109 103
@@ -123,13 +117,10 @@ VOID s_uCalculateLinkQual(
123 * 117 *
124-*/ 118-*/
125 119
126PKnownBSS 120PKnownBSS BSSpSearchBSSList(void *hDeviceContext,
127BSSpSearchBSSList( 121 PBYTE pbyDesireBSSID,
128 IN HANDLE hDeviceContext, 122 PBYTE pbyDesireSSID,
129 IN PBYTE pbyDesireBSSID, 123 CARD_PHY_TYPE ePhyType)
130 IN PBYTE pbyDesireSSID,
131 IN CARD_PHY_TYPE ePhyType
132 )
133{ 124{
134 PSDevice pDevice = (PSDevice)hDeviceContext; 125 PSDevice pDevice = (PSDevice)hDeviceContext;
135 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 126 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -138,8 +129,8 @@ BSSpSearchBSSList(
138 PKnownBSS pCurrBSS = NULL; 129 PKnownBSS pCurrBSS = NULL;
139 PKnownBSS pSelect = NULL; 130 PKnownBSS pSelect = NULL;
140 BYTE ZeroBSSID[WLAN_BSSID_LEN]={0x00,0x00,0x00,0x00,0x00,0x00}; 131 BYTE ZeroBSSID[WLAN_BSSID_LEN]={0x00,0x00,0x00,0x00,0x00,0x00};
141 UINT ii = 0; 132 unsigned int ii = 0;
142 UINT jj = 0; //DavidWang 133 unsigned int jj = 0;
143 if (pbyDesireBSSID != NULL) { 134 if (pbyDesireBSSID != NULL) {
144 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BSSpSearchBSSList BSSID[%02X %02X %02X-%02X %02X %02X]\n", 135 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BSSpSearchBSSList BSSID[%02X %02X %02X-%02X %02X %02X]\n",
145 *pbyDesireBSSID,*(pbyDesireBSSID+1),*(pbyDesireBSSID+2), 136 *pbyDesireBSSID,*(pbyDesireBSSID+1),*(pbyDesireBSSID+2),
@@ -296,15 +287,11 @@ pDevice->bSameBSSMaxNum = jj;
296-*/ 287-*/
297 288
298 289
299VOID 290void BSSvClearBSSList(void *hDeviceContext, BOOL bKeepCurrBSSID)
300BSSvClearBSSList(
301 IN HANDLE hDeviceContext,
302 IN BOOL bKeepCurrBSSID
303 )
304{ 291{
305 PSDevice pDevice = (PSDevice)hDeviceContext; 292 PSDevice pDevice = (PSDevice)hDeviceContext;
306 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 293 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
307 UINT ii; 294 unsigned int ii;
308 295
309 for (ii = 0; ii < MAX_BSS_NUM; ii++) { 296 for (ii = 0; ii < MAX_BSS_NUM; ii++) {
310 if (bKeepCurrBSSID) { 297 if (bKeepCurrBSSID) {
@@ -342,17 +329,14 @@ BSSvClearBSSList(
342 * TRUE if found. 329 * TRUE if found.
343 * 330 *
344-*/ 331-*/
345PKnownBSS 332PKnownBSS BSSpAddrIsInBSSList(void *hDeviceContext,
346BSSpAddrIsInBSSList( 333 PBYTE abyBSSID,
347 IN HANDLE hDeviceContext, 334 PWLAN_IE_SSID pSSID)
348 IN PBYTE abyBSSID,
349 IN PWLAN_IE_SSID pSSID
350 )
351{ 335{
352 PSDevice pDevice = (PSDevice)hDeviceContext; 336 PSDevice pDevice = (PSDevice)hDeviceContext;
353 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 337 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
354 PKnownBSS pBSSList = NULL; 338 PKnownBSS pBSSList = NULL;
355 UINT ii; 339 unsigned int ii;
356 340
357 for (ii = 0; ii < MAX_BSS_NUM; ii++) { 341 for (ii = 0; ii < MAX_BSS_NUM; ii++) {
358 pBSSList = &(pMgmt->sBSSList[ii]); 342 pBSSList = &(pMgmt->sBSSList[ii]);
@@ -383,33 +367,30 @@ BSSpAddrIsInBSSList(
383 * 367 *
384-*/ 368-*/
385 369
386BOOL 370BOOL BSSbInsertToBSSList(void *hDeviceContext,
387BSSbInsertToBSSList ( 371 PBYTE abyBSSIDAddr,
388 IN HANDLE hDeviceContext, 372 QWORD qwTimestamp,
389 IN PBYTE abyBSSIDAddr, 373 WORD wBeaconInterval,
390 IN QWORD qwTimestamp, 374 WORD wCapInfo,
391 IN WORD wBeaconInterval, 375 BYTE byCurrChannel,
392 IN WORD wCapInfo, 376 PWLAN_IE_SSID pSSID,
393 IN BYTE byCurrChannel, 377 PWLAN_IE_SUPP_RATES pSuppRates,
394 IN PWLAN_IE_SSID pSSID, 378 PWLAN_IE_SUPP_RATES pExtSuppRates,
395 IN PWLAN_IE_SUPP_RATES pSuppRates, 379 PERPObject psERP,
396 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 380 PWLAN_IE_RSN pRSN,
397 IN PERPObject psERP, 381 PWLAN_IE_RSN_EXT pRSNWPA,
398 IN PWLAN_IE_RSN pRSN, 382 PWLAN_IE_COUNTRY pIE_Country,
399 IN PWLAN_IE_RSN_EXT pRSNWPA, 383 PWLAN_IE_QUIET pIE_Quiet,
400 IN PWLAN_IE_COUNTRY pIE_Country, 384 unsigned int uIELength,
401 IN PWLAN_IE_QUIET pIE_Quiet, 385 PBYTE pbyIEs,
402 IN UINT uIELength, 386 void *pRxPacketContext)
403 IN PBYTE pbyIEs,
404 IN HANDLE pRxPacketContext
405 )
406{ 387{
407 388
408 PSDevice pDevice = (PSDevice)hDeviceContext; 389 PSDevice pDevice = (PSDevice)hDeviceContext;
409 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 390 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
410 PSRxMgmtPacket pRxPacket = (PSRxMgmtPacket)pRxPacketContext; 391 PSRxMgmtPacket pRxPacket = (PSRxMgmtPacket)pRxPacketContext;
411 PKnownBSS pBSSList = NULL; 392 PKnownBSS pBSSList = NULL;
412 UINT ii; 393 unsigned int ii;
413 BOOL bParsingQuiet = FALSE; 394 BOOL bParsingQuiet = FALSE;
414 395
415 396
@@ -484,24 +465,27 @@ BSSbInsertToBSSList (
484 WPA_ClearRSN(pBSSList); 465 WPA_ClearRSN(pBSSList);
485 466
486 if (pRSNWPA != NULL) { 467 if (pRSNWPA != NULL) {
487 UINT uLen = pRSNWPA->len + 2; 468 unsigned int uLen = pRSNWPA->len + 2;
488 469
489 if (uLen <= (uIELength - (UINT)(ULONG_PTR)((PBYTE)pRSNWPA - pbyIEs))) { 470 if (uLen <= (uIELength -
490 pBSSList->wWPALen = uLen; 471 (unsigned int) (ULONG_PTR) ((PBYTE) pRSNWPA - pbyIEs))) {
491 memcpy(pBSSList->byWPAIE, pRSNWPA, uLen); 472 pBSSList->wWPALen = uLen;
492 WPA_ParseRSN(pBSSList, pRSNWPA); 473 memcpy(pBSSList->byWPAIE, pRSNWPA, uLen);
493 } 474 WPA_ParseRSN(pBSSList, pRSNWPA);
475 }
494 } 476 }
495 477
496 WPA2_ClearRSN(pBSSList); 478 WPA2_ClearRSN(pBSSList);
497 479
498 if (pRSN != NULL) { 480 if (pRSN != NULL) {
499 UINT uLen = pRSN->len + 2; 481 unsigned int uLen = pRSN->len + 2;
500 if (uLen <= (uIELength - (UINT)(ULONG_PTR)((PBYTE)pRSN - pbyIEs))) { 482
501 pBSSList->wRSNLen = uLen; 483 if (uLen <= (uIELength -
502 memcpy(pBSSList->byRSNIE, pRSN, uLen); 484 (unsigned int) (ULONG_PTR) ((PBYTE) pRSN - pbyIEs))) {
503 WPA2vParseRSN(pBSSList, pRSN); 485 pBSSList->wRSNLen = uLen;
504 } 486 memcpy(pBSSList->byRSNIE, pRSN, uLen);
487 WPA2vParseRSN(pBSSList, pRSN);
488 }
505 } 489 }
506 490
507 if ((pMgmt->eAuthenMode == WMAC_AUTH_WPA2) || (pBSSList->bWPA2Valid == TRUE)) { 491 if ((pMgmt->eAuthenMode == WMAC_AUTH_WPA2) || (pBSSList->bWPA2Valid == TRUE)) {
@@ -518,7 +502,9 @@ BSSbInsertToBSSList (
518 if ((bIs802_1x == TRUE) && (pSSID->len == ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->len) && 502 if ((bIs802_1x == TRUE) && (pSSID->len == ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->len) &&
519 ( !memcmp(pSSID->abySSID, ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySSID, pSSID->len))) { 503 ( !memcmp(pSSID->abySSID, ((PWLAN_IE_SSID)pMgmt->abyDesireSSID)->abySSID, pSSID->len))) {
520 504
521 bAdd_PMKID_Candidate((HANDLE)pDevice, pBSSList->abyBSSID, &pBSSList->sRSNCapObj); 505 bAdd_PMKID_Candidate((void *) pDevice,
506 pBSSList->abyBSSID,
507 &pBSSList->sRSNCapObj);
522 508
523 if ((pDevice->bLinkPass == TRUE) && (pMgmt->eCurrState == WMAC_STATE_ASSOC)) { 509 if ((pDevice->bLinkPass == TRUE) && (pMgmt->eCurrState == WMAC_STATE_ASSOC)) {
524 if ((KeybGetTransmitKey(&(pDevice->sKey), pDevice->abyBSSID, PAIRWISE_KEY, &pTransmitKey) == TRUE) || 510 if ((KeybGetTransmitKey(&(pDevice->sKey), pDevice->abyBSSID, PAIRWISE_KEY, &pTransmitKey) == TRUE) ||
@@ -602,33 +588,30 @@ BSSbInsertToBSSList (
602-*/ 588-*/
603// TODO: input structure modify 589// TODO: input structure modify
604 590
605BOOL 591BOOL BSSbUpdateToBSSList(void *hDeviceContext,
606BSSbUpdateToBSSList ( 592 QWORD qwTimestamp,
607 IN HANDLE hDeviceContext, 593 WORD wBeaconInterval,
608 IN QWORD qwTimestamp, 594 WORD wCapInfo,
609 IN WORD wBeaconInterval, 595 BYTE byCurrChannel,
610 IN WORD wCapInfo, 596 BOOL bChannelHit,
611 IN BYTE byCurrChannel, 597 PWLAN_IE_SSID pSSID,
612 IN BOOL bChannelHit, 598 PWLAN_IE_SUPP_RATES pSuppRates,
613 IN PWLAN_IE_SSID pSSID, 599 PWLAN_IE_SUPP_RATES pExtSuppRates,
614 IN PWLAN_IE_SUPP_RATES pSuppRates, 600 PERPObject psERP,
615 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 601 PWLAN_IE_RSN pRSN,
616 IN PERPObject psERP, 602 PWLAN_IE_RSN_EXT pRSNWPA,
617 IN PWLAN_IE_RSN pRSN, 603 PWLAN_IE_COUNTRY pIE_Country,
618 IN PWLAN_IE_RSN_EXT pRSNWPA, 604 PWLAN_IE_QUIET pIE_Quiet,
619 IN PWLAN_IE_COUNTRY pIE_Country, 605 PKnownBSS pBSSList,
620 IN PWLAN_IE_QUIET pIE_Quiet, 606 unsigned int uIELength,
621 IN PKnownBSS pBSSList, 607 PBYTE pbyIEs,
622 IN UINT uIELength, 608 void *pRxPacketContext)
623 IN PBYTE pbyIEs,
624 IN HANDLE pRxPacketContext
625 )
626{ 609{
627 int ii, jj; 610 int ii, jj;
628 PSDevice pDevice = (PSDevice)hDeviceContext; 611 PSDevice pDevice = (PSDevice)hDeviceContext;
629 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 612 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
630 PSRxMgmtPacket pRxPacket = (PSRxMgmtPacket)pRxPacketContext; 613 PSRxMgmtPacket pRxPacket = (PSRxMgmtPacket)pRxPacketContext;
631 LONG ldBm, ldBmSum; 614 signed long ldBm, ldBmSum;
632 BOOL bParsingQuiet = FALSE; 615 BOOL bParsingQuiet = FALSE;
633 // BYTE abyTmpSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 616 // BYTE abyTmpSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
634 617
@@ -687,24 +670,26 @@ BSSbUpdateToBSSList (
687 670
688 WPA_ClearRSN(pBSSList); //mike update 671 WPA_ClearRSN(pBSSList); //mike update
689 672
690 if (pRSNWPA != NULL) { 673 if (pRSNWPA != NULL) {
691 UINT uLen = pRSNWPA->len + 2; 674 unsigned int uLen = pRSNWPA->len + 2;
692 if (uLen <= (uIELength - (UINT)(ULONG_PTR)((PBYTE)pRSNWPA - pbyIEs))) { 675 if (uLen <= (uIELength -
693 pBSSList->wWPALen = uLen; 676 (unsigned int) (ULONG_PTR) ((PBYTE) pRSNWPA - pbyIEs))) {
694 memcpy(pBSSList->byWPAIE, pRSNWPA, uLen); 677 pBSSList->wWPALen = uLen;
695 WPA_ParseRSN(pBSSList, pRSNWPA); 678 memcpy(pBSSList->byWPAIE, pRSNWPA, uLen);
696 } 679 WPA_ParseRSN(pBSSList, pRSNWPA);
697 } 680 }
681 }
698 682
699 WPA2_ClearRSN(pBSSList); //mike update 683 WPA2_ClearRSN(pBSSList); //mike update
700 684
701 if (pRSN != NULL) { 685 if (pRSN != NULL) {
702 UINT uLen = pRSN->len + 2; 686 unsigned int uLen = pRSN->len + 2;
703 if (uLen <= (uIELength - (UINT)(ULONG_PTR)((PBYTE)pRSN - pbyIEs))) { 687 if (uLen <= (uIELength -
704 pBSSList->wRSNLen = uLen; 688 (unsigned int) (ULONG_PTR) ((PBYTE) pRSN - pbyIEs))) {
705 memcpy(pBSSList->byRSNIE, pRSN, uLen); 689 pBSSList->wRSNLen = uLen;
706 WPA2vParseRSN(pBSSList, pRSN); 690 memcpy(pBSSList->byRSNIE, pRSN, uLen);
707 } 691 WPA2vParseRSN(pBSSList, pRSN);
692 }
708 } 693 }
709 694
710 if (pRxPacket->uRSSI != 0) { 695 if (pRxPacket->uRSSI != 0) {
@@ -768,16 +753,13 @@ BSSbUpdateToBSSList (
768 * 753 *
769-*/ 754-*/
770 755
771BOOL 756BOOL BSSbIsSTAInNodeDB(void *hDeviceContext,
772BSSbIsSTAInNodeDB( 757 PBYTE abyDstAddr,
773 IN HANDLE hDeviceContext, 758 PUINT puNodeIndex)
774 IN PBYTE abyDstAddr,
775 OUT PUINT puNodeIndex
776 )
777{ 759{
778 PSDevice pDevice = (PSDevice)hDeviceContext; 760 PSDevice pDevice = (PSDevice)hDeviceContext;
779 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 761 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
780 UINT ii; 762 unsigned int ii;
781 763
782 // Index = 0 reserved for AP Node 764 // Index = 0 reserved for AP Node
783 for (ii = 1; ii < (MAX_NODE_NUM + 1); ii++) { 765 for (ii = 1; ii < (MAX_NODE_NUM + 1); ii++) {
@@ -804,18 +786,14 @@ BSSbIsSTAInNodeDB(
804 * None 786 * None
805 * 787 *
806-*/ 788-*/
807VOID 789void BSSvCreateOneNode(void *hDeviceContext, PUINT puNodeIndex)
808BSSvCreateOneNode(
809 IN HANDLE hDeviceContext,
810 OUT PUINT puNodeIndex
811 )
812{ 790{
813 791
814 PSDevice pDevice = (PSDevice)hDeviceContext; 792 PSDevice pDevice = (PSDevice)hDeviceContext;
815 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 793 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
816 UINT ii; 794 unsigned int ii;
817 UINT BigestCount = 0; 795 unsigned int BigestCount = 0;
818 UINT SelectIndex; 796 unsigned int SelectIndex;
819 struct sk_buff *skb; 797 struct sk_buff *skb;
820 // Index = 0 reserved for AP Node (In STA mode) 798 // Index = 0 reserved for AP Node (In STA mode)
821 // Index = 0 reserved for Broadcast/MultiCast (In AP mode) 799 // Index = 0 reserved for Broadcast/MultiCast (In AP mode)
@@ -869,11 +847,8 @@ BSSvCreateOneNode(
869 * None 847 * None
870 * 848 *
871-*/ 849-*/
872VOID 850
873BSSvRemoveOneNode( 851void BSSvRemoveOneNode(void *hDeviceContext, unsigned int uNodeIndex)
874 IN HANDLE hDeviceContext,
875 IN UINT uNodeIndex
876 )
877{ 852{
878 853
879 PSDevice pDevice = (PSDevice)hDeviceContext; 854 PSDevice pDevice = (PSDevice)hDeviceContext;
@@ -902,17 +877,14 @@ BSSvRemoveOneNode(
902 * 877 *
903-*/ 878-*/
904 879
905VOID 880void BSSvUpdateAPNode(void *hDeviceContext,
906BSSvUpdateAPNode( 881 PWORD pwCapInfo,
907 IN HANDLE hDeviceContext, 882 PWLAN_IE_SUPP_RATES pSuppRates,
908 IN PWORD pwCapInfo, 883 PWLAN_IE_SUPP_RATES pExtSuppRates)
909 IN PWLAN_IE_SUPP_RATES pSuppRates,
910 IN PWLAN_IE_SUPP_RATES pExtSuppRates
911 )
912{ 884{
913 PSDevice pDevice = (PSDevice)hDeviceContext; 885 PSDevice pDevice = (PSDevice)hDeviceContext;
914 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 886 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
915 UINT uRateLen = WLAN_RATES_MAXLEN; 887 unsigned int uRateLen = WLAN_RATES_MAXLEN;
916 888
917 memset(&pMgmt->sNodeDBTable[0], 0, sizeof(KnownNodeDB)); 889 memset(&pMgmt->sNodeDBTable[0], 0, sizeof(KnownNodeDB));
918 890
@@ -926,7 +898,7 @@ BSSvUpdateAPNode(
926 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pExtSuppRates, 898 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pExtSuppRates,
927 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 899 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
928 uRateLen); 900 uRateLen);
929 RATEvParseMaxRate((PVOID) pDevice, 901 RATEvParseMaxRate((void *) pDevice,
930 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 902 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
931 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 903 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
932 TRUE, 904 TRUE,
@@ -946,10 +918,6 @@ BSSvUpdateAPNode(
946 918
947}; 919};
948 920
949
950
951
952
953/*+ 921/*+
954 * 922 *
955 * Routine Description: 923 * Routine Description:
@@ -961,11 +929,7 @@ BSSvUpdateAPNode(
961 * 929 *
962-*/ 930-*/
963 931
964 932void BSSvAddMulticastNode(void *hDeviceContext)
965VOID
966BSSvAddMulticastNode(
967 IN HANDLE hDeviceContext
968 )
969{ 933{
970 PSDevice pDevice = (PSDevice)hDeviceContext; 934 PSDevice pDevice = (PSDevice)hDeviceContext;
971 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 935 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -976,7 +940,7 @@ BSSvAddMulticastNode(
976 pMgmt->sNodeDBTable[0].bActive = TRUE; 940 pMgmt->sNodeDBTable[0].bActive = TRUE;
977 pMgmt->sNodeDBTable[0].bPSEnable = FALSE; 941 pMgmt->sNodeDBTable[0].bPSEnable = FALSE;
978 skb_queue_head_init(&pMgmt->sNodeDBTable[0].sTxPSQueue); 942 skb_queue_head_init(&pMgmt->sNodeDBTable[0].sTxPSQueue);
979 RATEvParseMaxRate((PVOID) pDevice, 943 RATEvParseMaxRate((void *) pDevice,
980 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 944 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
981 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 945 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
982 TRUE, 946 TRUE,
@@ -991,10 +955,6 @@ BSSvAddMulticastNode(
991 955
992}; 956};
993 957
994
995
996
997
998/*+ 958/*+
999 * 959 *
1000 * Routine Description: 960 * Routine Description:
@@ -1008,19 +968,15 @@ BSSvAddMulticastNode(
1008 * 968 *
1009-*/ 969-*/
1010 970
1011 971void BSSvSecondCallBack(void *hDeviceContext)
1012VOID
1013BSSvSecondCallBack(
1014 IN HANDLE hDeviceContext
1015 )
1016{ 972{
1017 PSDevice pDevice = (PSDevice)hDeviceContext; 973 PSDevice pDevice = (PSDevice)hDeviceContext;
1018 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 974 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1019 UINT ii; 975 unsigned int ii;
1020 PWLAN_IE_SSID pItemSSID, pCurrSSID; 976 PWLAN_IE_SSID pItemSSID, pCurrSSID;
1021 UINT uSleepySTACnt = 0; 977 unsigned int uSleepySTACnt = 0;
1022 UINT uNonShortSlotSTACnt = 0; 978 unsigned int uNonShortSlotSTACnt = 0;
1023 UINT uLongPreambleSTACnt = 0; 979 unsigned int uLongPreambleSTACnt = 0;
1024 viawget_wpa_header *wpahdr; //DavidWang 980 viawget_wpa_header *wpahdr; //DavidWang
1025 981
1026 spin_lock_irq(&pDevice->lock); 982 spin_lock_irq(&pDevice->lock);
@@ -1080,7 +1036,7 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1080#endif 1036#endif
1081 1037
1082#ifdef Calcu_LinkQual 1038#ifdef Calcu_LinkQual
1083 s_uCalculateLinkQual((HANDLE)pDevice); 1039 s_uCalculateLinkQual((void *)pDevice);
1084#endif 1040#endif
1085 1041
1086 for (ii = 0; ii < (MAX_NODE_NUM + 1); ii++) { 1042 for (ii = 0; ii < (MAX_NODE_NUM + 1); ii++) {
@@ -1131,12 +1087,14 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1131*/ 1087*/
1132 if (ii > 0) { 1088 if (ii > 0) {
1133 // ii = 0 for multicast node (AP & Adhoc) 1089 // ii = 0 for multicast node (AP & Adhoc)
1134 RATEvTxRateFallBack((PVOID)pDevice, &(pMgmt->sNodeDBTable[ii])); 1090 RATEvTxRateFallBack((void *)pDevice,
1091 &(pMgmt->sNodeDBTable[ii]));
1135 } 1092 }
1136 else { 1093 else {
1137 // ii = 0 reserved for unicast AP node (Infra STA) 1094 // ii = 0 reserved for unicast AP node (Infra STA)
1138 if (pMgmt->eCurrMode == WMAC_MODE_ESS_STA) 1095 if (pMgmt->eCurrMode == WMAC_MODE_ESS_STA)
1139 RATEvTxRateFallBack((PVOID)pDevice, &(pMgmt->sNodeDBTable[ii])); 1096 RATEvTxRateFallBack((void *)pDevice,
1097 &(pMgmt->sNodeDBTable[ii]));
1140 } 1098 }
1141 1099
1142 } 1100 }
@@ -1177,14 +1135,14 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1177 if (pDevice->bShortSlotTime) { 1135 if (pDevice->bShortSlotTime) {
1178 pDevice->bShortSlotTime = FALSE; 1136 pDevice->bShortSlotTime = FALSE;
1179 BBvSetShortSlotTime(pDevice); 1137 BBvSetShortSlotTime(pDevice);
1180 vUpdateIFS((PVOID)pDevice); 1138 vUpdateIFS((void *)pDevice);
1181 } 1139 }
1182 } 1140 }
1183 else { 1141 else {
1184 if (!pDevice->bShortSlotTime) { 1142 if (!pDevice->bShortSlotTime) {
1185 pDevice->bShortSlotTime = TRUE; 1143 pDevice->bShortSlotTime = TRUE;
1186 BBvSetShortSlotTime(pDevice); 1144 BBvSetShortSlotTime(pDevice);
1187 vUpdateIFS((PVOID)pDevice); 1145 vUpdateIFS((void *)pDevice);
1188 } 1146 }
1189 } 1147 }
1190 1148
@@ -1224,14 +1182,16 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1224 // DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Callback inactive Count = [%d]\n", pMgmt->sNodeDBTable[0].uInActiveCount); 1182 // DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Callback inactive Count = [%d]\n", pMgmt->sNodeDBTable[0].uInActiveCount);
1225 1183
1226 if (pDevice->bUpdateBBVGA) { 1184 if (pDevice->bUpdateBBVGA) {
1227 // s_vCheckSensitivity((HANDLE) pDevice); 1185 /* s_vCheckSensitivity((void *) pDevice); */
1228 s_vCheckPreEDThreshold((HANDLE)pDevice); 1186 s_vCheckPreEDThreshold((void *) pDevice);
1229 } 1187 }
1230 1188
1231 if ((pMgmt->sNodeDBTable[0].uInActiveCount >= (LOST_BEACON_COUNT/2)) && 1189 if ((pMgmt->sNodeDBTable[0].uInActiveCount >= (LOST_BEACON_COUNT/2)) &&
1232 (pDevice->byBBVGACurrent != pDevice->abyBBVGA[0]) ) { 1190 (pDevice->byBBVGACurrent != pDevice->abyBBVGA[0]) ) {
1233 pDevice->byBBVGANew = pDevice->abyBBVGA[0]; 1191 pDevice->byBBVGANew = pDevice->abyBBVGA[0];
1234 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_BBSENSITIVITY, NULL); 1192 bScheduleCommand((void *) pDevice,
1193 WLAN_CMD_CHANGE_BBSENSITIVITY,
1194 NULL);
1235 } 1195 }
1236 1196
1237 if (pMgmt->sNodeDBTable[0].uInActiveCount >= LOST_BEACON_COUNT) { 1197 if (pMgmt->sNodeDBTable[0].uInActiveCount >= LOST_BEACON_COUNT) {
@@ -1279,9 +1239,13 @@ DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bRoaming %d, !\n", pDevice->bRoaming );
1279DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bIsRoaming %d, !\n", pDevice->bIsRoaming ); 1239DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bIsRoaming %d, !\n", pDevice->bIsRoaming );
1280 if ((pDevice->bRoaming == TRUE)&&(pDevice->bIsRoaming == TRUE)){ 1240 if ((pDevice->bRoaming == TRUE)&&(pDevice->bIsRoaming == TRUE)){
1281 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Fast Roaming ...\n"); 1241 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Fast Roaming ...\n");
1282 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 1242 BSSvClearBSSList((void *) pDevice, pDevice->bLinkPass);
1283 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 1243 bScheduleCommand((void *) pDevice,
1284 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID); 1244 WLAN_CMD_BSSID_SCAN,
1245 pMgmt->abyDesireSSID);
1246 bScheduleCommand((void *) pDevice,
1247 WLAN_CMD_SSID,
1248 pMgmt->abyDesireSSID);
1285 pDevice->uAutoReConnectTime = 0; 1249 pDevice->uAutoReConnectTime = 0;
1286 pDevice->uIsroamingTime = 0; 1250 pDevice->uIsroamingTime = 0;
1287 pDevice->bRoaming = FALSE; 1251 pDevice->bRoaming = FALSE;
@@ -1324,10 +1288,14 @@ else {
1324 pDevice->eEncryptionStatus = pDevice->eOldEncryptionStatus; 1288 pDevice->eEncryptionStatus = pDevice->eOldEncryptionStatus;
1325 1289
1326 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Roaming ...\n"); 1290 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Roaming ...\n");
1327 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 1291 BSSvClearBSSList((void *) pDevice, pDevice->bLinkPass);
1328 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 1292 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
1329 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 1293 bScheduleCommand((void *) pDevice,
1330 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID); 1294 WLAN_CMD_BSSID_SCAN,
1295 pMgmt->abyDesireSSID);
1296 bScheduleCommand((void *) pDevice,
1297 WLAN_CMD_SSID,
1298 pMgmt->abyDesireSSID);
1331 pDevice->uAutoReConnectTime = 0; 1299 pDevice->uAutoReConnectTime = 0;
1332 } 1300 }
1333 } 1301 }
@@ -1343,17 +1311,17 @@ else {
1343 else { 1311 else {
1344 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Adhoc re-scaning ...\n"); 1312 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Adhoc re-scaning ...\n");
1345 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 1313 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
1346 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 1314 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
1347 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 1315 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
1348 pDevice->uAutoReConnectTime = 0; 1316 pDevice->uAutoReConnectTime = 0;
1349 }; 1317 };
1350 } 1318 }
1351 if (pMgmt->eCurrState == WMAC_STATE_JOINTED) { 1319 if (pMgmt->eCurrState == WMAC_STATE_JOINTED) {
1352 1320
1353 if (pDevice->bUpdateBBVGA) { 1321 if (pDevice->bUpdateBBVGA) {
1354 //s_vCheckSensitivity((HANDLE) pDevice); 1322 /* s_vCheckSensitivity((void *) pDevice); */
1355 s_vCheckPreEDThreshold((HANDLE)pDevice); 1323 s_vCheckPreEDThreshold((void *) pDevice);
1356 } 1324 }
1357 if (pMgmt->sNodeDBTable[0].uInActiveCount >=ADHOC_LOST_BEACON_COUNT) { 1325 if (pMgmt->sNodeDBTable[0].uInActiveCount >=ADHOC_LOST_BEACON_COUNT) {
1358 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Lost other STA beacon [%d] sec, started !\n", pMgmt->sNodeDBTable[0].uInActiveCount); 1326 DBG_PRT(MSG_LEVEL_NOTICE, KERN_INFO "Lost other STA beacon [%d] sec, started !\n", pMgmt->sNodeDBTable[0].uInActiveCount);
1359 pMgmt->sNodeDBTable[0].uInActiveCount = 0; 1327 pMgmt->sNodeDBTable[0].uInActiveCount = 0;
@@ -1377,9 +1345,6 @@ else {
1377 return; 1345 return;
1378} 1346}
1379 1347
1380
1381
1382
1383/*+ 1348/*+
1384 * 1349 *
1385 * Routine Description: 1350 * Routine Description:
@@ -1393,30 +1358,23 @@ else {
1393 * 1358 *
1394-*/ 1359-*/
1395 1360
1396 1361void BSSvUpdateNodeTxCounter(void *hDeviceContext,
1397 1362 PSStatCounter pStatistic,
1398VOID 1363 BYTE byTSR,
1399BSSvUpdateNodeTxCounter( 1364 BYTE byPktNO)
1400 IN HANDLE hDeviceContext,
1401 IN PSStatCounter pStatistic,
1402 IN BYTE byTSR,
1403 IN BYTE byPktNO
1404 )
1405{ 1365{
1406 PSDevice pDevice = (PSDevice)hDeviceContext; 1366 PSDevice pDevice = (PSDevice)hDeviceContext;
1407 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1367 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1408 UINT uNodeIndex = 0; 1368 unsigned int uNodeIndex = 0;
1409 BYTE byTxRetry; 1369 BYTE byTxRetry;
1410 WORD wRate; 1370 WORD wRate;
1411 WORD wFallBackRate = RATE_1M; 1371 WORD wFallBackRate = RATE_1M;
1412 BYTE byFallBack; 1372 BYTE byFallBack;
1413 UINT ii; 1373 unsigned int ii;
1414 PBYTE pbyDestAddr; 1374 PBYTE pbyDestAddr;
1415 BYTE byPktNum; 1375 BYTE byPktNum;
1416 WORD wFIFOCtl; 1376 WORD wFIFOCtl;
1417 1377
1418
1419
1420 byPktNum = (byPktNO & 0x0F) >> 4; 1378 byPktNum = (byPktNO & 0x0F) >> 4;
1421 byTxRetry = (byTSR & 0xF0) >> 4; 1379 byTxRetry = (byTSR & 0xF0) >> 4;
1422 wRate = (WORD) (byPktNO & 0xF0) >> 4; 1380 wRate = (WORD) (byPktNO & 0xF0) >> 4;
@@ -1483,11 +1441,13 @@ BSSvUpdateNodeTxCounter(
1483 } 1441 }
1484 }; 1442 };
1485 1443
1486 if ((pMgmt->eCurrMode == WMAC_MODE_IBSS_STA) || 1444 if ((pMgmt->eCurrMode == WMAC_MODE_IBSS_STA) ||
1487 (pMgmt->eCurrMode == WMAC_MODE_ESS_AP)) { 1445 (pMgmt->eCurrMode == WMAC_MODE_ESS_AP)) {
1488 1446
1489 if (BSSbIsSTAInNodeDB((HANDLE)pDevice, pbyDestAddr, &uNodeIndex)){ 1447 if (BSSbIsSTAInNodeDB((void *) pDevice,
1490 pMgmt->sNodeDBTable[uNodeIndex].uTxAttempts += 1; 1448 pbyDestAddr,
1449 &uNodeIndex)) {
1450 pMgmt->sNodeDBTable[uNodeIndex].uTxAttempts += 1;
1491 if ( !(byTSR & (TSR_TMO | TSR_RETRYTMO))) { 1451 if ( !(byTSR & (TSR_TMO | TSR_RETRYTMO))) {
1492 // transmit success, TxAttempts at least plus one 1452 // transmit success, TxAttempts at least plus one
1493 pMgmt->sNodeDBTable[uNodeIndex].uTxOk[MAX_RATE]++; 1453 pMgmt->sNodeDBTable[uNodeIndex].uTxOk[MAX_RATE]++;
@@ -1542,9 +1502,6 @@ BSSvUpdateNodeTxCounter(
1542 1502
1543} 1503}
1544 1504
1545
1546
1547
1548/*+ 1505/*+
1549 * 1506 *
1550 * Routine Description: 1507 * Routine Description:
@@ -1563,18 +1520,13 @@ BSSvUpdateNodeTxCounter(
1563 * 1520 *
1564-*/ 1521-*/
1565 1522
1566 1523void BSSvClearNodeDBTable(void *hDeviceContext,
1567VOID 1524 unsigned int uStartIndex)
1568BSSvClearNodeDBTable(
1569 IN HANDLE hDeviceContext,
1570 IN UINT uStartIndex
1571 )
1572
1573{ 1525{
1574 PSDevice pDevice = (PSDevice)hDeviceContext; 1526 PSDevice pDevice = (PSDevice)hDeviceContext;
1575 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1527 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1576 struct sk_buff *skb; 1528 struct sk_buff *skb;
1577 UINT ii; 1529 unsigned int ii;
1578 1530
1579 for (ii = uStartIndex; ii < (MAX_NODE_NUM + 1); ii++) { 1531 for (ii = uStartIndex; ii < (MAX_NODE_NUM + 1); ii++) {
1580 if (pMgmt->sNodeDBTable[ii].bActive) { 1532 if (pMgmt->sNodeDBTable[ii].bActive) {
@@ -1592,10 +1544,7 @@ BSSvClearNodeDBTable(
1592 return; 1544 return;
1593}; 1545};
1594 1546
1595 1547void s_vCheckSensitivity(void *hDeviceContext)
1596VOID s_vCheckSensitivity(
1597 IN HANDLE hDeviceContext
1598 )
1599{ 1548{
1600 PSDevice pDevice = (PSDevice)hDeviceContext; 1549 PSDevice pDevice = (PSDevice)hDeviceContext;
1601 PKnownBSS pBSSList = NULL; 1550 PKnownBSS pBSSList = NULL;
@@ -1606,9 +1555,9 @@ VOID s_vCheckSensitivity(
1606 ((pMgmt->eCurrMode == WMAC_MODE_IBSS_STA) && (pMgmt->eCurrState == WMAC_STATE_JOINTED))) { 1555 ((pMgmt->eCurrMode == WMAC_MODE_IBSS_STA) && (pMgmt->eCurrState == WMAC_STATE_JOINTED))) {
1607 pBSSList = BSSpAddrIsInBSSList(pDevice, pMgmt->abyCurrBSSID, (PWLAN_IE_SSID)pMgmt->abyCurrSSID); 1556 pBSSList = BSSpAddrIsInBSSList(pDevice, pMgmt->abyCurrBSSID, (PWLAN_IE_SSID)pMgmt->abyCurrSSID);
1608 if (pBSSList != NULL) { 1557 if (pBSSList != NULL) {
1609 // Updata BB Reg if RSSI is too strong. 1558 /* Update BB register if RSSI is too strong */
1610 LONG LocalldBmAverage = 0; 1559 signed long LocalldBmAverage = 0;
1611 LONG uNumofdBm = 0; 1560 signed long uNumofdBm = 0;
1612 for (ii = 0; ii < RSSI_STAT_COUNT; ii++) { 1561 for (ii = 0; ii < RSSI_STAT_COUNT; ii++) {
1613 if (pBSSList->ldBmAverage[ii] != 0) { 1562 if (pBSSList->ldBmAverage[ii] != 0) {
1614 uNumofdBm ++; 1563 uNumofdBm ++;
@@ -1627,7 +1576,9 @@ VOID s_vCheckSensitivity(
1627 if (pDevice->byBBVGANew != pDevice->byBBVGACurrent) { 1576 if (pDevice->byBBVGANew != pDevice->byBBVGACurrent) {
1628 pDevice->uBBVGADiffCount++; 1577 pDevice->uBBVGADiffCount++;
1629 if (pDevice->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) 1578 if (pDevice->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD)
1630 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_CHANGE_BBSENSITIVITY, NULL); 1579 bScheduleCommand((void *) pDevice,
1580 WLAN_CMD_CHANGE_BBSENSITIVITY,
1581 NULL);
1631 } else { 1582 } else {
1632 pDevice->uBBVGADiffCount = 0; 1583 pDevice->uBBVGADiffCount = 0;
1633 } 1584 }
@@ -1637,14 +1588,12 @@ VOID s_vCheckSensitivity(
1637} 1588}
1638 1589
1639#ifdef Calcu_LinkQual 1590#ifdef Calcu_LinkQual
1640VOID s_uCalculateLinkQual( 1591void s_uCalculateLinkQual(void *hDeviceContext)
1641 IN HANDLE hDeviceContext
1642 )
1643{ 1592{
1644 PSDevice pDevice = (PSDevice)hDeviceContext; 1593 PSDevice pDevice = (PSDevice)hDeviceContext;
1645 ULONG TxOkRatio, TxCnt; 1594 unsigned long TxOkRatio, TxCnt;
1646 ULONG RxOkRatio,RxCnt; 1595 unsigned long RxOkRatio, RxCnt;
1647 ULONG RssiRatio; 1596 unsigned long RssiRatio;
1648 long ldBm; 1597 long ldBm;
1649 1598
1650TxCnt = pDevice->scStatistic.TxNoRetryOkCount + 1599TxCnt = pDevice->scStatistic.TxNoRetryOkCount +
@@ -1685,14 +1634,11 @@ else
1685} 1634}
1686#endif 1635#endif
1687 1636
1688VOID 1637void BSSvClearAnyBSSJoinRecord(void *hDeviceContext)
1689BSSvClearAnyBSSJoinRecord (
1690 IN HANDLE hDeviceContext
1691 )
1692{ 1638{
1693 PSDevice pDevice = (PSDevice)hDeviceContext; 1639 PSDevice pDevice = (PSDevice)hDeviceContext;
1694 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1640 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1695 UINT ii; 1641 unsigned int ii;
1696 1642
1697 for (ii = 0; ii < MAX_BSS_NUM; ii++) { 1643 for (ii = 0; ii < MAX_BSS_NUM; ii++) {
1698 pMgmt->sBSSList[ii].bSelected = FALSE; 1644 pMgmt->sBSSList[ii].bSelected = FALSE;
@@ -1700,9 +1646,7 @@ BSSvClearAnyBSSJoinRecord (
1700 return; 1646 return;
1701} 1647}
1702 1648
1703VOID s_vCheckPreEDThreshold( 1649void s_vCheckPreEDThreshold(void *hDeviceContext)
1704 IN HANDLE hDeviceContext
1705 )
1706{ 1650{
1707 PSDevice pDevice = (PSDevice)hDeviceContext; 1651 PSDevice pDevice = (PSDevice)hDeviceContext;
1708 PKnownBSS pBSSList = NULL; 1652 PKnownBSS pBSSList = NULL;
diff --git a/drivers/staging/vt6656/bssdb.h b/drivers/staging/vt6656/bssdb.h
index f365b6b8bf6a..9686d8600d63 100644
--- a/drivers/staging/vt6656/bssdb.h
+++ b/drivers/staging/vt6656/bssdb.h
@@ -97,10 +97,10 @@ typedef struct tagKnownBSS {
97 // BSS info 97 // BSS info
98 BOOL bActive; 98 BOOL bActive;
99 BYTE abyBSSID[WLAN_BSSID_LEN]; 99 BYTE abyBSSID[WLAN_BSSID_LEN];
100 UINT uChannel; 100 unsigned int uChannel;
101 BYTE abySuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 101 BYTE abySuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
102 BYTE abyExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 102 BYTE abyExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
103 UINT uRSSI; 103 unsigned int uRSSI;
104 BYTE bySQ; 104 BYTE bySQ;
105 WORD wBeaconInterval; 105 WORD wBeaconInterval;
106 WORD wCapInfo; 106 WORD wCapInfo;
@@ -109,9 +109,9 @@ typedef struct tagKnownBSS {
109 109
110// WORD wATIMWindow; 110// WORD wATIMWindow;
111 BYTE byRSSIStatCnt; 111 BYTE byRSSIStatCnt;
112 LONG ldBmMAX; 112 signed long ldBmMAX;
113 LONG ldBmAverage[RSSI_STAT_COUNT]; 113 signed long ldBmAverage[RSSI_STAT_COUNT];
114 LONG ldBmAverRange; 114 signed long ldBmAverRange;
115 //For any BSSID selection improvment 115 //For any BSSID selection improvment
116 BOOL bSelected; 116 BOOL bSelected;
117 117
@@ -141,9 +141,9 @@ typedef struct tagKnownBSS {
141 WORD wRSNLen; 141 WORD wRSNLen;
142 142
143 // Clear count 143 // Clear count
144 UINT uClearCount; 144 unsigned int uClearCount;
145// BYTE abyIEs[WLAN_BEACON_FR_MAXLEN]; 145// BYTE abyIEs[WLAN_BEACON_FR_MAXLEN];
146 UINT uIELength; 146 unsigned int uIELength;
147 QWORD qwBSSTimestamp; 147 QWORD qwBSSTimestamp;
148 QWORD qwLocalTSF; // local TSF timer 148 QWORD qwLocalTSF; // local TSF timer
149 149
@@ -178,7 +178,7 @@ typedef struct tagKnownNodeDB {
178 BOOL bShortPreamble; 178 BOOL bShortPreamble;
179 BOOL bERPExist; 179 BOOL bERPExist;
180 BOOL bShortSlotTime; 180 BOOL bShortSlotTime;
181 UINT uInActiveCount; 181 unsigned int uInActiveCount;
182 WORD wMaxBasicRate; //Get from byTopOFDMBasicRate or byTopCCKBasicRate which depends on packetTyp. 182 WORD wMaxBasicRate; //Get from byTopOFDMBasicRate or byTopCCKBasicRate which depends on packetTyp.
183 WORD wMaxSuppRate; //Records the highest supported rate getting from SuppRates IE and ExtSuppRates IE in Beacon. 183 WORD wMaxSuppRate; //Records the highest supported rate getting from SuppRates IE and ExtSuppRates IE in Beacon.
184 WORD wSuppRate; 184 WORD wSuppRate;
@@ -194,166 +194,114 @@ typedef struct tagKnownNodeDB {
194 BOOL bPSEnable; 194 BOOL bPSEnable;
195 BOOL bRxPSPoll; 195 BOOL bRxPSPoll;
196 BYTE byAuthSequence; 196 BYTE byAuthSequence;
197 ULONG ulLastRxJiffer; 197 unsigned long ulLastRxJiffer;
198 BYTE bySuppRate; 198 BYTE bySuppRate;
199 DWORD dwFlags; 199 DWORD dwFlags;
200 WORD wEnQueueCnt; 200 WORD wEnQueueCnt;
201 201
202 BOOL bOnFly; 202 BOOL bOnFly;
203 ULONGLONG KeyRSC; 203 unsigned long long KeyRSC;
204 BYTE byKeyIndex; 204 BYTE byKeyIndex;
205 DWORD dwKeyIndex; 205 DWORD dwKeyIndex;
206 BYTE byCipherSuite; 206 BYTE byCipherSuite;
207 DWORD dwTSC47_16; 207 DWORD dwTSC47_16;
208 WORD wTSC15_0; 208 WORD wTSC15_0;
209 UINT uWepKeyLength; 209 unsigned int uWepKeyLength;
210 BYTE abyWepKey[WLAN_WEPMAX_KEYLEN]; 210 BYTE abyWepKey[WLAN_WEPMAX_KEYLEN];
211 // 211 //
212 // Auto rate fallback vars 212 // Auto rate fallback vars
213 BOOL bIsInFallback; 213 BOOL bIsInFallback;
214 UINT uAverageRSSI; 214 unsigned int uAverageRSSI;
215 UINT uRateRecoveryTimeout; 215 unsigned int uRateRecoveryTimeout;
216 UINT uRatePollTimeout; 216 unsigned int uRatePollTimeout;
217 UINT uTxFailures; 217 unsigned int uTxFailures;
218 UINT uTxAttempts; 218 unsigned int uTxAttempts;
219 219
220 UINT uTxRetry; 220 unsigned int uTxRetry;
221 UINT uFailureRatio; 221 unsigned int uFailureRatio;
222 UINT uRetryRatio; 222 unsigned int uRetryRatio;
223 UINT uTxOk[MAX_RATE+1]; 223 unsigned int uTxOk[MAX_RATE+1];
224 UINT uTxFail[MAX_RATE+1]; 224 unsigned int uTxFail[MAX_RATE+1];
225 UINT uTimeCount; 225 unsigned int uTimeCount;
226 226
227} KnownNodeDB, *PKnownNodeDB; 227} KnownNodeDB, *PKnownNodeDB;
228 228
229
230/*--------------------- Export Functions --------------------------*/ 229/*--------------------- Export Functions --------------------------*/
231 230
232 231PKnownBSS BSSpSearchBSSList(void *hDeviceContext,
233 232 PBYTE pbyDesireBSSID,
234PKnownBSS 233 PBYTE pbyDesireSSID,
235BSSpSearchBSSList( 234 CARD_PHY_TYPE ePhyType);
236 IN HANDLE hDeviceContext, 235
237 IN PBYTE pbyDesireBSSID, 236PKnownBSS BSSpAddrIsInBSSList(void *hDeviceContext,
238 IN PBYTE pbyDesireSSID, 237 PBYTE abyBSSID,
239 IN CARD_PHY_TYPE ePhyType 238 PWLAN_IE_SSID pSSID);
240 ); 239
241 240void BSSvClearBSSList(void *hDeviceContext, BOOL bKeepCurrBSSID);
242PKnownBSS 241
243BSSpAddrIsInBSSList( 242BOOL BSSbInsertToBSSList(void *hDeviceContext,
244 IN HANDLE hDeviceContext, 243 PBYTE abyBSSIDAddr,
245 IN PBYTE abyBSSID, 244 QWORD qwTimestamp,
246 IN PWLAN_IE_SSID pSSID 245 WORD wBeaconInterval,
247 ); 246 WORD wCapInfo,
248 247 BYTE byCurrChannel,
249VOID 248 PWLAN_IE_SSID pSSID,
250BSSvClearBSSList( 249 PWLAN_IE_SUPP_RATES pSuppRates,
251 IN HANDLE hDeviceContext, 250 PWLAN_IE_SUPP_RATES pExtSuppRates,
252 IN BOOL bKeepCurrBSSID 251 PERPObject psERP,
253 ); 252 PWLAN_IE_RSN pRSN,
254 253 PWLAN_IE_RSN_EXT pRSNWPA,
255BOOL 254 PWLAN_IE_COUNTRY pIE_Country,
256BSSbInsertToBSSList( 255 PWLAN_IE_QUIET pIE_Quiet,
257 IN HANDLE hDeviceContext, 256 unsigned int uIELength,
258 IN PBYTE abyBSSIDAddr, 257 PBYTE pbyIEs,
259 IN QWORD qwTimestamp, 258 void *pRxPacketContext);
260 IN WORD wBeaconInterval, 259
261 IN WORD wCapInfo, 260BOOL BSSbUpdateToBSSList(void *hDeviceContext,
262 IN BYTE byCurrChannel, 261 QWORD qwTimestamp,
263 IN PWLAN_IE_SSID pSSID, 262 WORD wBeaconInterval,
264 IN PWLAN_IE_SUPP_RATES pSuppRates, 263 WORD wCapInfo,
265 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 264 BYTE byCurrChannel,
266 IN PERPObject psERP, 265 BOOL bChannelHit,
267 IN PWLAN_IE_RSN pRSN, 266 PWLAN_IE_SSID pSSID,
268 IN PWLAN_IE_RSN_EXT pRSNWPA, 267 PWLAN_IE_SUPP_RATES pSuppRates,
269 IN PWLAN_IE_COUNTRY pIE_Country, 268 PWLAN_IE_SUPP_RATES pExtSuppRates,
270 IN PWLAN_IE_QUIET pIE_Quiet, 269 PERPObject psERP,
271 IN UINT uIELength, 270 PWLAN_IE_RSN pRSN,
272 IN PBYTE pbyIEs, 271 PWLAN_IE_RSN_EXT pRSNWPA,
273 IN HANDLE pRxPacketContext 272 PWLAN_IE_COUNTRY pIE_Country,
274 ); 273 PWLAN_IE_QUIET pIE_Quiet,
275 274 PKnownBSS pBSSList,
276 275 unsigned int uIELength,
277BOOL 276 PBYTE pbyIEs,
278BSSbUpdateToBSSList( 277 void *pRxPacketContext);
279 IN HANDLE hDeviceContext, 278
280 IN QWORD qwTimestamp, 279BOOL BSSbIsSTAInNodeDB(void *hDeviceContext,
281 IN WORD wBeaconInterval, 280 PBYTE abyDstAddr,
282 IN WORD wCapInfo, 281 PUINT puNodeIndex);
283 IN BYTE byCurrChannel, 282
284 IN BOOL bChannelHit, 283void BSSvCreateOneNode(void *hDeviceContext, PUINT puNodeIndex);
285 IN PWLAN_IE_SSID pSSID, 284
286 IN PWLAN_IE_SUPP_RATES pSuppRates, 285void BSSvUpdateAPNode(void *hDeviceContext,
287 IN PWLAN_IE_SUPP_RATES pExtSuppRates, 286 PWORD pwCapInfo,
288 IN PERPObject psERP, 287 PWLAN_IE_SUPP_RATES pItemRates,
289 IN PWLAN_IE_RSN pRSN, 288 PWLAN_IE_SUPP_RATES pExtSuppRates);
290 IN PWLAN_IE_RSN_EXT pRSNWPA, 289
291 IN PWLAN_IE_COUNTRY pIE_Country, 290void BSSvSecondCallBack(void *hDeviceContext);
292 IN PWLAN_IE_QUIET pIE_Quiet, 291
293 IN PKnownBSS pBSSList, 292void BSSvUpdateNodeTxCounter(void *hDeviceContext,
294 IN UINT uIELength, 293 PSStatCounter pStatistic,
295 IN PBYTE pbyIEs, 294 BYTE byTSR,
296 IN HANDLE pRxPacketContext 295 BYTE byPktNO);
297 ); 296
298 297void BSSvRemoveOneNode(void *hDeviceContext,
299 298 unsigned int uNodeIndex);
300BOOL 299
301BSSbIsSTAInNodeDB( 300void BSSvAddMulticastNode(void *hDeviceContext);
302 IN HANDLE hDeviceContext, 301
303 IN PBYTE abyDstAddr, 302void BSSvClearNodeDBTable(void *hDeviceContext,
304 OUT PUINT puNodeIndex 303 unsigned int uStartIndex);
305 ); 304
306 305void BSSvClearAnyBSSJoinRecord(void *hDeviceContext);
307VOID 306
308BSSvCreateOneNode( 307#endif /* __BSSDB_H__ */
309 IN HANDLE hDeviceContext,
310 OUT PUINT puNodeIndex
311 );
312
313VOID
314BSSvUpdateAPNode(
315 IN HANDLE hDeviceContext,
316 IN PWORD pwCapInfo,
317 IN PWLAN_IE_SUPP_RATES pItemRates,
318 IN PWLAN_IE_SUPP_RATES pExtSuppRates
319 );
320
321
322VOID
323BSSvSecondCallBack(
324 IN HANDLE hDeviceContext
325 );
326
327
328VOID
329BSSvUpdateNodeTxCounter(
330 IN HANDLE hDeviceContext,
331 IN PSStatCounter pStatistic,
332 IN BYTE byTSR,
333 IN BYTE byPktNO
334 );
335
336VOID
337BSSvRemoveOneNode(
338 IN HANDLE hDeviceContext,
339 IN UINT uNodeIndex
340 );
341
342VOID
343BSSvAddMulticastNode(
344 IN HANDLE hDeviceContext
345 );
346
347
348VOID
349BSSvClearNodeDBTable(
350 IN HANDLE hDeviceContext,
351 IN UINT uStartIndex
352 );
353
354VOID
355BSSvClearAnyBSSJoinRecord(
356 IN HANDLE hDeviceContext
357 );
358
359#endif //__BSSDB_H__
diff --git a/drivers/staging/vt6656/card.c b/drivers/staging/vt6656/card.c
index d73efeea2d5c..fe4ec913ffea 100644
--- a/drivers/staging/vt6656/card.c
+++ b/drivers/staging/vt6656/card.c
@@ -95,7 +95,7 @@ const WORD cwRXBCNTSFOff[MAX_RATE] =
95 * Return Value: TRUE if succeeded; FALSE if failed. 95 * Return Value: TRUE if succeeded; FALSE if failed.
96 * 96 *
97 */ 97 */
98BOOL CARDbSetMediaChannel (PVOID pDeviceHandler, UINT uConnectionChannel) 98BOOL CARDbSetMediaChannel(void *pDeviceHandler, unsigned int uConnectionChannel)
99{ 99{
100PSDevice pDevice = (PSDevice) pDeviceHandler; 100PSDevice pDevice = (PSDevice) pDeviceHandler;
101BOOL bResult = TRUE; 101BOOL bResult = TRUE;
@@ -156,11 +156,10 @@ BOOL bResult = TRUE;
156 * Return Value: response Control frame rate 156 * Return Value: response Control frame rate
157 * 157 *
158 */ 158 */
159static 159static WORD swGetCCKControlRate(void *pDeviceHandler, WORD wRateIdx)
160WORD swGetCCKControlRate(PVOID pDeviceHandler, WORD wRateIdx)
161{ 160{
162 PSDevice pDevice = (PSDevice) pDeviceHandler; 161 PSDevice pDevice = (PSDevice) pDeviceHandler;
163 UINT ui = (UINT)wRateIdx; 162 unsigned int ui = (unsigned int)wRateIdx;
164 while (ui > RATE_1M) { 163 while (ui > RATE_1M) {
165 if (pDevice->wBasicRate & ((WORD)1 << ui)) { 164 if (pDevice->wBasicRate & ((WORD)1 << ui)) {
166 return (WORD)ui; 165 return (WORD)ui;
@@ -183,11 +182,10 @@ WORD swGetCCKControlRate(PVOID pDeviceHandler, WORD wRateIdx)
183 * Return Value: response Control frame rate 182 * Return Value: response Control frame rate
184 * 183 *
185 */ 184 */
186static 185static WORD swGetOFDMControlRate(void *pDeviceHandler, WORD wRateIdx)
187WORD swGetOFDMControlRate (PVOID pDeviceHandler, WORD wRateIdx)
188{ 186{
189 PSDevice pDevice = (PSDevice) pDeviceHandler; 187 PSDevice pDevice = (PSDevice) pDeviceHandler;
190 UINT ui = (UINT)wRateIdx; 188 unsigned int ui = (unsigned int)wRateIdx;
191 189
192 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BASIC RATE: %X\n", pDevice->wBasicRate); 190 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BASIC RATE: %X\n", pDevice->wBasicRate);
193 191
@@ -222,12 +220,12 @@ WORD swGetOFDMControlRate (PVOID pDeviceHandler, WORD wRateIdx)
222 * Return Value: none 220 * Return Value: none
223 * 221 *
224 */ 222 */
225VOID 223void
226CARDvCaculateOFDMRParameter ( 224CARDvCaculateOFDMRParameter (
227 IN WORD wRate, 225 WORD wRate,
228 IN BYTE byBBType, 226 BYTE byBBType,
229 OUT PBYTE pbyTxRate, 227 PBYTE pbyTxRate,
230 OUT PBYTE pbyRsvTime 228 PBYTE pbyRsvTime
231 ) 229 )
232{ 230{
233 switch (wRate) { 231 switch (wRate) {
@@ -334,7 +332,7 @@ CARDvCaculateOFDMRParameter (
334 * Return Value: None. 332 * Return Value: None.
335 * 333 *
336 */ 334 */
337void CARDvSetRSPINF (PVOID pDeviceHandler, BYTE byBBType) 335void CARDvSetRSPINF(void *pDeviceHandler, BYTE byBBType)
338{ 336{
339 PSDevice pDevice = (PSDevice) pDeviceHandler; 337 PSDevice pDevice = (PSDevice) pDeviceHandler;
340 BYTE abyServ[4] = {0,0,0,0}; // For CCK 338 BYTE abyServ[4] = {0,0,0,0}; // For CCK
@@ -486,7 +484,7 @@ void CARDvSetRSPINF (PVOID pDeviceHandler, BYTE byBBType)
486 * Return Value: None. 484 * Return Value: None.
487 * 485 *
488 */ 486 */
489void vUpdateIFS (PVOID pDeviceHandler) 487void vUpdateIFS(void *pDeviceHandler)
490{ 488{
491 PSDevice pDevice = (PSDevice) pDeviceHandler; 489 PSDevice pDevice = (PSDevice) pDeviceHandler;
492 //Set SIFS, DIFS, EIFS, SlotTime, CwMin 490 //Set SIFS, DIFS, EIFS, SlotTime, CwMin
@@ -510,7 +508,7 @@ void vUpdateIFS (PVOID pDeviceHandler)
510 else {// PK_TYPE_11GA & PK_TYPE_11GB 508 else {// PK_TYPE_11GA & PK_TYPE_11GB
511 BYTE byRate = 0; 509 BYTE byRate = 0;
512 BOOL bOFDMRate = FALSE; 510 BOOL bOFDMRate = FALSE;
513 UINT ii = 0; 511 unsigned int ii = 0;
514 PWLAN_IE_SUPP_RATES pItemRates = NULL; 512 PWLAN_IE_SUPP_RATES pItemRates = NULL;
515 513
516 pDevice->uSIFS = C_SIFS_BG; 514 pDevice->uSIFS = C_SIFS_BG;
@@ -571,7 +569,7 @@ void vUpdateIFS (PVOID pDeviceHandler)
571 &byMaxMin); 569 &byMaxMin);
572} 570}
573 571
574void CARDvUpdateBasicTopRate (PVOID pDeviceHandler) 572void CARDvUpdateBasicTopRate(void *pDeviceHandler)
575{ 573{
576PSDevice pDevice = (PSDevice) pDeviceHandler; 574PSDevice pDevice = (PSDevice) pDeviceHandler;
577BYTE byTopOFDM = RATE_24M, byTopCCK = RATE_1M; 575BYTE byTopOFDM = RATE_24M, byTopCCK = RATE_1M;
@@ -610,7 +608,7 @@ BYTE ii;
610 * Return Value: TRUE if succeeded; FALSE if failed. 608 * Return Value: TRUE if succeeded; FALSE if failed.
611 * 609 *
612 */ 610 */
613BOOL CARDbAddBasicRate (PVOID pDeviceHandler, WORD wRateIdx) 611BOOL CARDbAddBasicRate(void *pDeviceHandler, WORD wRateIdx)
614{ 612{
615PSDevice pDevice = (PSDevice) pDeviceHandler; 613PSDevice pDevice = (PSDevice) pDeviceHandler;
616WORD wRate = (WORD)(1<<wRateIdx); 614WORD wRate = (WORD)(1<<wRateIdx);
@@ -623,7 +621,7 @@ WORD wRate = (WORD)(1<<wRateIdx);
623 return(TRUE); 621 return(TRUE);
624} 622}
625 623
626BOOL CARDbIsOFDMinBasicRate (PVOID pDeviceHandler) 624BOOL CARDbIsOFDMinBasicRate(void *pDeviceHandler)
627{ 625{
628PSDevice pDevice = (PSDevice) pDeviceHandler; 626PSDevice pDevice = (PSDevice) pDeviceHandler;
629int ii; 627int ii;
@@ -635,7 +633,7 @@ int ii;
635 return FALSE; 633 return FALSE;
636} 634}
637 635
638BYTE CARDbyGetPktType (PVOID pDeviceHandler) 636BYTE CARDbyGetPktType(void *pDeviceHandler)
639{ 637{
640 PSDevice pDevice = (PSDevice) pDeviceHandler; 638 PSDevice pDevice = (PSDevice) pDeviceHandler;
641 639
@@ -707,7 +705,8 @@ QWORD CARDqGetTSFOffset (BYTE byRxRate, QWORD qwTSF1, QWORD qwTSF2)
707 * Return Value: none 705 * Return Value: none
708 * 706 *
709 */ 707 */
710void CARDvAdjustTSF (PVOID pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp, QWORD qwLocalTSF) 708void CARDvAdjustTSF(void *pDeviceHandler, BYTE byRxRate,
709 QWORD qwBSSTimestamp, QWORD qwLocalTSF)
711{ 710{
712 711
713 PSDevice pDevice = (PSDevice) pDeviceHandler; 712 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -756,7 +755,7 @@ void CARDvAdjustTSF (PVOID pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp,
756 * Return Value: TRUE if success; otherwise FALSE 755 * Return Value: TRUE if success; otherwise FALSE
757 * 756 *
758 */ 757 */
759BOOL CARDbGetCurrentTSF (PVOID pDeviceHandler, PQWORD pqwCurrTSF) 758BOOL CARDbGetCurrentTSF(void *pDeviceHandler, PQWORD pqwCurrTSF)
760{ 759{
761 PSDevice pDevice = (PSDevice) pDeviceHandler; 760 PSDevice pDevice = (PSDevice) pDeviceHandler;
762 761
@@ -778,7 +777,7 @@ BOOL CARDbGetCurrentTSF (PVOID pDeviceHandler, PQWORD pqwCurrTSF)
778 * Return Value: TRUE if success; otherwise FALSE 777 * Return Value: TRUE if success; otherwise FALSE
779 * 778 *
780 */ 779 */
781BOOL CARDbClearCurrentTSF(PVOID pDeviceHandler) 780BOOL CARDbClearCurrentTSF(void *pDeviceHandler)
782{ 781{
783 PSDevice pDevice = (PSDevice) pDeviceHandler; 782 PSDevice pDevice = (PSDevice) pDeviceHandler;
784 783
@@ -807,9 +806,9 @@ BOOL CARDbClearCurrentTSF(PVOID pDeviceHandler)
807QWORD CARDqGetNextTBTT (QWORD qwTSF, WORD wBeaconInterval) 806QWORD CARDqGetNextTBTT (QWORD qwTSF, WORD wBeaconInterval)
808{ 807{
809 808
810 UINT uLowNextTBTT; 809 unsigned int uLowNextTBTT;
811 UINT uHighRemain, uLowRemain; 810 unsigned int uHighRemain, uLowRemain;
812 UINT uBeaconInterval; 811 unsigned int uBeaconInterval;
813 812
814 uBeaconInterval = wBeaconInterval * 1024; 813 uBeaconInterval = wBeaconInterval * 1024;
815 // Next TBTT = ((local_current_TSF / beacon_interval) + 1 ) * beacon_interval 814 // Next TBTT = ((local_current_TSF / beacon_interval) + 1 ) * beacon_interval
@@ -844,7 +843,7 @@ QWORD CARDqGetNextTBTT (QWORD qwTSF, WORD wBeaconInterval)
844 * Return Value: none 843 * Return Value: none
845 * 844 *
846 */ 845 */
847void CARDvSetFirstNextTBTT (PVOID pDeviceHandler, WORD wBeaconInterval) 846void CARDvSetFirstNextTBTT(void *pDeviceHandler, WORD wBeaconInterval)
848{ 847{
849 848
850 PSDevice pDevice = (PSDevice) pDeviceHandler; 849 PSDevice pDevice = (PSDevice) pDeviceHandler;
@@ -898,7 +897,8 @@ void CARDvSetFirstNextTBTT (PVOID pDeviceHandler, WORD wBeaconInterval)
898 * Return Value: none 897 * Return Value: none
899 * 898 *
900 */ 899 */
901void CARDvUpdateNextTBTT (PVOID pDeviceHandler, QWORD qwTSF, WORD wBeaconInterval) 900void CARDvUpdateNextTBTT(void *pDeviceHandler, QWORD qwTSF,
901 WORD wBeaconInterval)
902{ 902{
903 PSDevice pDevice = (PSDevice) pDeviceHandler; 903 PSDevice pDevice = (PSDevice) pDeviceHandler;
904 DWORD dwLoTBTT,dwHiTBTT; 904 DWORD dwLoTBTT,dwHiTBTT;
@@ -945,7 +945,7 @@ void CARDvUpdateNextTBTT (PVOID pDeviceHandler, QWORD qwTSF, WORD wBeaconInterva
945 * Return Value: TRUE if success; otherwise FALSE 945 * Return Value: TRUE if success; otherwise FALSE
946 * 946 *
947 */ 947 */
948BOOL CARDbRadioPowerOff (PVOID pDeviceHandler) 948BOOL CARDbRadioPowerOff(void *pDeviceHandler)
949{ 949{
950PSDevice pDevice = (PSDevice) pDeviceHandler; 950PSDevice pDevice = (PSDevice) pDeviceHandler;
951BOOL bResult = TRUE; 951BOOL bResult = TRUE;
@@ -986,7 +986,7 @@ BOOL bResult = TRUE;
986 * Return Value: TRUE if success; otherwise FALSE 986 * Return Value: TRUE if success; otherwise FALSE
987 * 987 *
988 */ 988 */
989BOOL CARDbRadioPowerOn (PVOID pDeviceHandler) 989BOOL CARDbRadioPowerOn(void *pDeviceHandler)
990{ 990{
991PSDevice pDevice = (PSDevice) pDeviceHandler; 991PSDevice pDevice = (PSDevice) pDeviceHandler;
992BOOL bResult = TRUE; 992BOOL bResult = TRUE;
@@ -1019,7 +1019,7 @@ BOOL bResult = TRUE;
1019 return bResult; 1019 return bResult;
1020} 1020}
1021 1021
1022void CARDvSetBSSMode (PVOID pDeviceHandler) 1022void CARDvSetBSSMode(void *pDeviceHandler)
1023{ 1023{
1024 PSDevice pDevice = (PSDevice) pDeviceHandler; 1024 PSDevice pDevice = (PSDevice) pDeviceHandler;
1025 // Set BB and packet type at the same time.//{{RobertYu:20050222, AL7230 have two TX PA output, only connet to b/g now 1025 // Set BB and packet type at the same time.//{{RobertYu:20050222, AL7230 have two TX PA output, only connet to b/g now
@@ -1080,10 +1080,10 @@ void CARDvSetBSSMode (PVOID pDeviceHandler)
1080-*/ 1080-*/
1081BOOL 1081BOOL
1082CARDbChannelSwitch ( 1082CARDbChannelSwitch (
1083 IN PVOID pDeviceHandler, 1083 void *pDeviceHandler,
1084 IN BYTE byMode, 1084 BYTE byMode,
1085 IN BYTE byNewChannel, 1085 BYTE byNewChannel,
1086 IN BYTE byCount 1086 BYTE byCount
1087 ) 1087 )
1088{ 1088{
1089 PSDevice pDevice = (PSDevice) pDeviceHandler; 1089 PSDevice pDevice = (PSDevice) pDeviceHandler;
diff --git a/drivers/staging/vt6656/card.h b/drivers/staging/vt6656/card.h
index aa90c2cb4461..6c91343d0d14 100644
--- a/drivers/staging/vt6656/card.h
+++ b/drivers/staging/vt6656/card.h
@@ -33,63 +33,57 @@
33 33
34/*--------------------- Export Definitions -------------------------*/ 34/*--------------------- Export Definitions -------------------------*/
35 35
36
37/*--------------------- Export Classes ----------------------------*/ 36/*--------------------- Export Classes ----------------------------*/
38 37
39// Init card type 38/* init card type */
40 39
41typedef enum _CARD_PHY_TYPE { 40typedef enum _CARD_PHY_TYPE {
42 41 PHY_TYPE_AUTO = 0,
43 PHY_TYPE_AUTO=0,
44 PHY_TYPE_11B, 42 PHY_TYPE_11B,
45 PHY_TYPE_11G, 43 PHY_TYPE_11G,
46 PHY_TYPE_11A 44 PHY_TYPE_11A
47} CARD_PHY_TYPE, *PCARD_PHY_TYPE; 45} CARD_PHY_TYPE, *PCARD_PHY_TYPE;
48 46
49typedef enum _CARD_OP_MODE { 47typedef enum _CARD_OP_MODE {
50 48 OP_MODE_INFRASTRUCTURE = 0,
51 OP_MODE_INFRASTRUCTURE=0,
52 OP_MODE_ADHOC, 49 OP_MODE_ADHOC,
53 OP_MODE_AP, 50 OP_MODE_AP,
54 OP_MODE_UNKNOWN 51 OP_MODE_UNKNOWN
55} CARD_OP_MODE, *PCARD_OP_MODE; 52} CARD_OP_MODE, *PCARD_OP_MODE;
56 53
57#define CB_MAX_CHANNEL_24G 14 54#define CB_MAX_CHANNEL_24G 14
58//#define CB_MAX_CHANNEL_5G 24 55/* #define CB_MAX_CHANNEL_5G 24 */
59#define CB_MAX_CHANNEL_5G 42 //[20050104] add channel9(5045MHz), 41==>42 56#define CB_MAX_CHANNEL_5G 42 /* add channel9(5045MHz), 41==>42 */
60#define CB_MAX_CHANNEL (CB_MAX_CHANNEL_24G+CB_MAX_CHANNEL_5G) 57#define CB_MAX_CHANNEL (CB_MAX_CHANNEL_24G+CB_MAX_CHANNEL_5G)
61 58
62/*--------------------- Export Variables --------------------------*/ 59/*--------------------- Export Variables --------------------------*/
63 60
64/*--------------------- Export Functions --------------------------*/ 61/*--------------------- Export Functions --------------------------*/
65 62
66BOOL CARDbSetMediaChannel(PVOID pDeviceHandler, UINT uConnectionChannel); 63BOOL CARDbSetMediaChannel(void *pDeviceHandler,
67void CARDvSetRSPINF(PVOID pDeviceHandler, BYTE byBBType); 64 unsigned int uConnectionChannel);
68void vUpdateIFS(PVOID pDeviceHandler); 65void CARDvSetRSPINF(void *pDeviceHandler, BYTE byBBType);
69void CARDvUpdateBasicTopRate(PVOID pDeviceHandler); 66void vUpdateIFS(void *pDeviceHandler);
70BOOL CARDbAddBasicRate(PVOID pDeviceHandler, WORD wRateIdx); 67void CARDvUpdateBasicTopRate(void *pDeviceHandler);
71BOOL CARDbIsOFDMinBasicRate(PVOID pDeviceHandler); 68BOOL CARDbAddBasicRate(void *pDeviceHandler, WORD wRateIdx);
72void CARDvAdjustTSF(PVOID pDeviceHandler, BYTE byRxRate, QWORD qwBSSTimestamp, QWORD qwLocalTSF); 69BOOL CARDbIsOFDMinBasicRate(void *pDeviceHandler);
73BOOL CARDbGetCurrentTSF (PVOID pDeviceHandler, PQWORD pqwCurrTSF); 70void CARDvAdjustTSF(void *pDeviceHandler, BYTE byRxRate,
74BOOL CARDbClearCurrentTSF(PVOID pDeviceHandler); 71 QWORD qwBSSTimestamp, QWORD qwLocalTSF);
75void CARDvSetFirstNextTBTT(PVOID pDeviceHandler, WORD wBeaconInterval); 72BOOL CARDbGetCurrentTSF(void *pDeviceHandler, PQWORD pqwCurrTSF);
76void CARDvUpdateNextTBTT(PVOID pDeviceHandler, QWORD qwTSF, WORD wBeaconInterval); 73BOOL CARDbClearCurrentTSF(void *pDeviceHandler);
74void CARDvSetFirstNextTBTT(void *pDeviceHandler, WORD wBeaconInterval);
75void CARDvUpdateNextTBTT(void *pDeviceHandler, QWORD qwTSF,
76 WORD wBeaconInterval);
77QWORD CARDqGetNextTBTT(QWORD qwTSF, WORD wBeaconInterval); 77QWORD CARDqGetNextTBTT(QWORD qwTSF, WORD wBeaconInterval);
78QWORD CARDqGetTSFOffset(BYTE byRxRate, QWORD qwTSF1, QWORD qwTSF2); 78QWORD CARDqGetTSFOffset(BYTE byRxRate, QWORD qwTSF1, QWORD qwTSF2);
79BOOL CARDbRadioPowerOff(PVOID pDeviceHandler); 79BOOL CARDbRadioPowerOff(void *pDeviceHandler);
80BOOL CARDbRadioPowerOn(PVOID pDeviceHandler); 80BOOL CARDbRadioPowerOn(void *pDeviceHandler);
81BYTE CARDbyGetPktType(PVOID pDeviceHandler); 81BYTE CARDbyGetPktType(void *pDeviceHandler);
82void CARDvSetBSSMode(PVOID pDeviceHandler); 82void CARDvSetBSSMode(void *pDeviceHandler);
83
84BOOL
85CARDbChannelSwitch (
86 IN PVOID pDeviceHandler,
87 IN BYTE byMode,
88 IN BYTE byNewChannel,
89 IN BYTE byCount
90 );
91
92#endif // __CARD_H__
93
94 83
84BOOL CARDbChannelSwitch(void *pDeviceHandler,
85 BYTE byMode,
86 BYTE byNewChannel,
87 BYTE byCount);
95 88
89#endif /* __CARD_H__ */
diff --git a/drivers/staging/vt6656/channel.c b/drivers/staging/vt6656/channel.c
index f7136b0073bb..f49b6e133394 100644
--- a/drivers/staging/vt6656/channel.c
+++ b/drivers/staging/vt6656/channel.c
@@ -116,7 +116,7 @@ static SChannelTblElement sChannelTbl[CB_MAX_CHANNEL+1] =
116static struct 116static struct
117{ 117{
118 BYTE byChannelCountryCode; /* The country code */ 118 BYTE byChannelCountryCode; /* The country code */
119 CHAR chCountryCode[2]; 119 char chCountryCode[2];
120 BYTE bChannelIdxList[CB_MAX_CHANNEL]; /* Available channels Index */ 120 BYTE bChannelIdxList[CB_MAX_CHANNEL]; /* Available channels Index */
121 BYTE byPower[CB_MAX_CHANNEL]; 121 BYTE byPower[CB_MAX_CHANNEL];
122} ChannelRuleTab[] = 122} ChannelRuleTab[] =
@@ -389,7 +389,7 @@ static struct
389// 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56) 389// 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56)
390 ************************************************************************/ 390 ************************************************************************/
391BOOL 391BOOL
392ChannelValid(UINT CountryCode, UINT ChannelIndex) 392ChannelValid(unsigned int CountryCode, unsigned int ChannelIndex)
393{ 393{
394 BOOL bValid; 394 BOOL bValid;
395 395
@@ -425,8 +425,8 @@ exit:
425 ************************************************************************/ 425 ************************************************************************/
426BOOL 426BOOL
427CHvChannelGetList ( 427CHvChannelGetList (
428 IN UINT uCountryCodeIdx, 428 unsigned int uCountryCodeIdx,
429 OUT PBYTE pbyChannelTable 429 PBYTE pbyChannelTable
430 ) 430 )
431{ 431{
432 if (uCountryCodeIdx >= CCODE_MAX) { 432 if (uCountryCodeIdx >= CCODE_MAX) {
@@ -437,11 +437,11 @@ CHvChannelGetList (
437} 437}
438 438
439 439
440VOID CHvInitChannelTable (PVOID pDeviceHandler) 440void CHvInitChannelTable(void *pDeviceHandler)
441{ 441{
442 PSDevice pDevice = (PSDevice) pDeviceHandler; 442 PSDevice pDevice = (PSDevice) pDeviceHandler;
443 BOOL bMultiBand = FALSE; 443 BOOL bMultiBand = FALSE;
444 UINT ii; 444 unsigned int ii;
445 445
446 for(ii=1;ii<=CB_MAX_CHANNEL;ii++) { 446 for(ii=1;ii<=CB_MAX_CHANNEL;ii++) {
447 sChannelTbl[ii].bValid = FALSE; 447 sChannelTbl[ii].bValid = FALSE;
diff --git a/drivers/staging/vt6656/channel.h b/drivers/staging/vt6656/channel.h
index 2306b2025656..91c2ffc6f1f0 100644
--- a/drivers/staging/vt6656/channel.h
+++ b/drivers/staging/vt6656/channel.h
@@ -37,21 +37,21 @@
37/*--------------------- Export Classes ----------------------------*/ 37/*--------------------- Export Classes ----------------------------*/
38typedef struct tagSChannelTblElement { 38typedef struct tagSChannelTblElement {
39 BYTE byChannelNumber; 39 BYTE byChannelNumber;
40 UINT uFrequency; 40 unsigned int uFrequency;
41 BOOL bValid; 41 BOOL bValid;
42}SChannelTblElement, *PSChannelTblElement; 42}SChannelTblElement, *PSChannelTblElement;
43 43
44/*--------------------- Export Variables --------------------------*/ 44/*--------------------- Export Variables --------------------------*/
45 45
46/*--------------------- Export Functions --------------------------*/ 46/*--------------------- Export Functions --------------------------*/
47BOOL ChannelValid(UINT CountryCode, UINT ChannelNum); 47BOOL ChannelValid(unsigned int CountryCode, unsigned int ChannelNum);
48VOID CHvInitChannelTable (PVOID pDeviceHandler); 48void CHvInitChannelTable(void *pDeviceHandler);
49BYTE CHbyGetChannelMapping(BYTE byChannelNumber); 49BYTE CHbyGetChannelMapping(BYTE byChannelNumber);
50 50
51BOOL 51BOOL
52CHvChannelGetList ( 52CHvChannelGetList (
53 IN UINT uCountryCodeIdx, 53 unsigned int uCountryCodeIdx,
54 OUT PBYTE pbyChannelTable 54 PBYTE pbyChannelTable
55 ); 55 );
56 56
57#endif /* _REGULATE_H_ */ 57#endif /* _REGULATE_H_ */
diff --git a/drivers/staging/vt6656/control.c b/drivers/staging/vt6656/control.c
index 7dba7710e593..8aab6718ff47 100644
--- a/drivers/staging/vt6656/control.c
+++ b/drivers/staging/vt6656/control.c
@@ -30,11 +30,13 @@
30 * CONTROLnsRequestIn - Read variable length bytes from MEM/BB/MAC/EEPROM 30 * CONTROLnsRequestIn - Read variable length bytes from MEM/BB/MAC/EEPROM
31 * ControlvWriteByte - Write one byte to MEM/BB/MAC/EEPROM 31 * ControlvWriteByte - Write one byte to MEM/BB/MAC/EEPROM
32 * ControlvReadByte - Read one byte from MEM/BB/MAC/EEPROM 32 * ControlvReadByte - Read one byte from MEM/BB/MAC/EEPROM
33 * ControlvMaskByte - Read one byte from MEM/BB/MAC/EEPROM and clear/set some bits in the same address 33 * ControlvMaskByte - Read one byte from MEM/BB/MAC/EEPROM and clear/set
34 * some bits in the same address
34 * 35 *
35 * Revision History: 36 * Revision History:
36 * 04-05-2004 Jerry Chen: Initial release 37 * 04-05-2004 Jerry Chen: Initial release
37 * 11-24-2004 Warren Hsu: Add ControlvWriteByte,ControlvReadByte,ControlvMaskByte 38 * 11-24-2004 Warren Hsu: Add ControlvWriteByte, ControlvReadByte,
39 * ControlvMaskByte
38 * 40 *
39 */ 41 */
40 42
@@ -42,8 +44,8 @@
42#include "rndis.h" 44#include "rndis.h"
43 45
44/*--------------------- Static Definitions -------------------------*/ 46/*--------------------- Static Definitions -------------------------*/
45//static int msglevel =MSG_LEVEL_INFO; 47/* static int msglevel =MSG_LEVEL_INFO; */
46//static int msglevel =MSG_LEVEL_DEBUG; 48/* static int msglevel =MSG_LEVEL_DEBUG; */
47/*--------------------- Static Classes ----------------------------*/ 49/*--------------------- Static Classes ----------------------------*/
48 50
49/*--------------------- Static Variables --------------------------*/ 51/*--------------------- Static Variables --------------------------*/
@@ -54,56 +56,43 @@
54 56
55/*--------------------- Export Functions --------------------------*/ 57/*--------------------- Export Functions --------------------------*/
56 58
57 59void ControlvWriteByte(PSDevice pDevice, BYTE byRegType, BYTE byRegOfs,
58void ControlvWriteByte(PSDevice pDevice, BYTE byRegType, BYTE byRegOfs, BYTE byData) 60 BYTE byData)
59{ 61{
60BYTE byData1; 62 BYTE byData1;
61 63 byData1 = byData;
62 byData1 = byData; 64 CONTROLnsRequestOut(pDevice,
63 65 MESSAGE_TYPE_WRITE,
64 CONTROLnsRequestOut(pDevice, 66 byRegOfs,
65 MESSAGE_TYPE_WRITE, 67 byRegType,
66 byRegOfs, 68 1,
67 byRegType, 69 &byData1);
68 1,
69 &byData1
70 );
71
72} 70}
73 71
74 72void ControlvReadByte(PSDevice pDevice, BYTE byRegType, BYTE byRegOfs,
75void ControlvReadByte(PSDevice pDevice, BYTE byRegType, BYTE byRegOfs, PBYTE pbyData) 73 PBYTE pbyData)
76{ 74{
77NTSTATUS ntStatus; 75 NTSTATUS ntStatus;
78BYTE byData1; 76 BYTE byData1;
79 77 ntStatus = CONTROLnsRequestIn(pDevice,
80 78 MESSAGE_TYPE_READ,
81 ntStatus = CONTROLnsRequestIn(pDevice, 79 byRegOfs,
82 MESSAGE_TYPE_READ, 80 byRegType,
83 byRegOfs, 81 1,
84 byRegType, 82 &byData1);
85 1, 83 *pbyData = byData1;
86 &byData1);
87
88 *pbyData = byData1;
89
90} 84}
91 85
92 86void ControlvMaskByte(PSDevice pDevice, BYTE byRegType, BYTE byRegOfs,
93 87 BYTE byMask, BYTE byData)
94void ControlvMaskByte(PSDevice pDevice, BYTE byRegType, BYTE byRegOfs, BYTE byMask, BYTE byData)
95{ 88{
96BYTE pbyData[2]; 89 BYTE pbyData[2];
97 90 pbyData[0] = byData;
98 pbyData[0] = byData; 91 pbyData[1] = byMask;
99 pbyData[1] = byMask; 92 CONTROLnsRequestOut(pDevice,
100 93 MESSAGE_TYPE_WRITE_MASK,
101 CONTROLnsRequestOut(pDevice, 94 byRegOfs,
102 MESSAGE_TYPE_WRITE_MASK, 95 byRegType,
103 byRegOfs, 96 2,
104 byRegType, 97 pbyData);
105 2,
106 pbyData
107 );
108
109} 98}
diff --git a/drivers/staging/vt6656/control.h b/drivers/staging/vt6656/control.h
index 4d9a777a7064..146b450e13d0 100644
--- a/drivers/staging/vt6656/control.h
+++ b/drivers/staging/vt6656/control.h
@@ -54,30 +54,27 @@
54/*--------------------- Export Functions --------------------------*/ 54/*--------------------- Export Functions --------------------------*/
55 55
56void ControlvWriteByte( 56void ControlvWriteByte(
57 IN PSDevice pDevice, 57 PSDevice pDevice,
58 IN BYTE byRegType, 58 BYTE byRegType,
59 IN BYTE byRegOfs, 59 BYTE byRegOfs,
60 IN BYTE byData 60 BYTE byData
61 ); 61 );
62 62
63 63
64void ControlvReadByte( 64void ControlvReadByte(
65 IN PSDevice pDevice, 65 PSDevice pDevice,
66 IN BYTE byRegType, 66 BYTE byRegType,
67 IN BYTE byRegOfs, 67 BYTE byRegOfs,
68 IN PBYTE pbyData 68 PBYTE pbyData
69 ); 69 );
70 70
71 71
72void ControlvMaskByte( 72void ControlvMaskByte(
73 IN PSDevice pDevice, 73 PSDevice pDevice,
74 IN BYTE byRegType, 74 BYTE byRegType,
75 IN BYTE byRegOfs, 75 BYTE byRegOfs,
76 IN BYTE byMask, 76 BYTE byMask,
77 IN BYTE byData 77 BYTE byData
78 ); 78 );
79 79
80#endif // __RCV_H__ 80#endif /* __CONTROL_H__ */
81
82
83
diff --git a/drivers/staging/vt6656/datarate.c b/drivers/staging/vt6656/datarate.c
index 968feb466b0c..2e183ddbfd0e 100644
--- a/drivers/staging/vt6656/datarate.c
+++ b/drivers/staging/vt6656/datarate.c
@@ -65,16 +65,9 @@ const BYTE acbyIERate[MAX_RATE] =
65 65
66/*--------------------- Static Functions --------------------------*/ 66/*--------------------- Static Functions --------------------------*/
67 67
68VOID s_vResetCounter ( 68void s_vResetCounter(PKnownNodeDB psNodeDBTable);
69 IN PKnownNodeDB psNodeDBTable
70 );
71 69
72 70void s_vResetCounter(PKnownNodeDB psNodeDBTable)
73
74VOID
75s_vResetCounter (
76 IN PKnownNodeDB psNodeDBTable
77 )
78{ 71{
79 BYTE ii; 72 BYTE ii;
80 73
@@ -107,7 +100,7 @@ s_vResetCounter (
107-*/ 100-*/
108BYTE 101BYTE
109DATARATEbyGetRateIdx ( 102DATARATEbyGetRateIdx (
110 IN BYTE byRate 103 BYTE byRate
111 ) 104 )
112{ 105{
113 BYTE ii; 106 BYTE ii;
@@ -161,7 +154,7 @@ DATARATEbyGetRateIdx (
161-*/ 154-*/
162WORD 155WORD
163RATEwGetRateIdx( 156RATEwGetRateIdx(
164 IN BYTE byRate 157 BYTE byRate
165 ) 158 )
166{ 159{
167 WORD ii; 160 WORD ii;
@@ -195,25 +188,24 @@ RATEwGetRateIdx(
195 * Return Value: none 188 * Return Value: none
196 * 189 *
197-*/ 190-*/
198VOID 191void RATEvParseMaxRate(
199RATEvParseMaxRate ( 192 void *pDeviceHandler,
200 IN PVOID pDeviceHandler, 193 PWLAN_IE_SUPP_RATES pItemRates,
201 IN PWLAN_IE_SUPP_RATES pItemRates, 194 PWLAN_IE_SUPP_RATES pItemExtRates,
202 IN PWLAN_IE_SUPP_RATES pItemExtRates, 195 BOOL bUpdateBasicRate,
203 IN BOOL bUpdateBasicRate, 196 PWORD pwMaxBasicRate,
204 OUT PWORD pwMaxBasicRate, 197 PWORD pwMaxSuppRate,
205 OUT PWORD pwMaxSuppRate, 198 PWORD pwSuppRate,
206 OUT PWORD pwSuppRate, 199 PBYTE pbyTopCCKRate,
207 OUT PBYTE pbyTopCCKRate, 200 PBYTE pbyTopOFDMRate
208 OUT PBYTE pbyTopOFDMRate
209 ) 201 )
210{ 202{
211PSDevice pDevice = (PSDevice) pDeviceHandler; 203PSDevice pDevice = (PSDevice) pDeviceHandler;
212UINT ii; 204unsigned int ii;
213BYTE byHighSuppRate = 0; 205BYTE byHighSuppRate = 0;
214BYTE byRate = 0; 206BYTE byRate = 0;
215WORD wOldBasicRate = pDevice->wBasicRate; 207WORD wOldBasicRate = pDevice->wBasicRate;
216UINT uRateLen; 208unsigned int uRateLen;
217 209
218 210
219 if (pItemRates == NULL) 211 if (pItemRates == NULL)
@@ -236,7 +228,7 @@ UINT uRateLen;
236 if (WLAN_MGMT_IS_BASICRATE(byRate) && 228 if (WLAN_MGMT_IS_BASICRATE(byRate) &&
237 (bUpdateBasicRate == TRUE)) { 229 (bUpdateBasicRate == TRUE)) {
238 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate 230 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate
239 CARDbAddBasicRate((PVOID)pDevice, RATEwGetRateIdx(byRate)); 231 CARDbAddBasicRate((void *)pDevice, RATEwGetRateIdx(byRate));
240 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", RATEwGetRateIdx(byRate)); 232 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", RATEwGetRateIdx(byRate));
241 } 233 }
242 byRate = (BYTE)(pItemRates->abyRates[ii]&0x7F); 234 byRate = (BYTE)(pItemRates->abyRates[ii]&0x7F);
@@ -249,7 +241,7 @@ UINT uRateLen;
249 if ((pItemExtRates != NULL) && (pItemExtRates->byElementID == WLAN_EID_EXTSUPP_RATES) && 241 if ((pItemExtRates != NULL) && (pItemExtRates->byElementID == WLAN_EID_EXTSUPP_RATES) &&
250 (pDevice->byBBType != BB_TYPE_11B)) { 242 (pDevice->byBBType != BB_TYPE_11B)) {
251 243
252 UINT uExtRateLen = pItemExtRates->len; 244 unsigned int uExtRateLen = pItemExtRates->len;
253 245
254 if (uExtRateLen > WLAN_RATES_MAXLEN) 246 if (uExtRateLen > WLAN_RATES_MAXLEN)
255 uExtRateLen = WLAN_RATES_MAXLEN; 247 uExtRateLen = WLAN_RATES_MAXLEN;
@@ -259,7 +251,7 @@ UINT uRateLen;
259 // select highest basic rate 251 // select highest basic rate
260 if (WLAN_MGMT_IS_BASICRATE(pItemExtRates->abyRates[ii])) { 252 if (WLAN_MGMT_IS_BASICRATE(pItemExtRates->abyRates[ii])) {
261 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate 253 // Add to basic rate set, update pDevice->byTopCCKBasicRate and pDevice->byTopOFDMBasicRate
262 CARDbAddBasicRate((PVOID)pDevice, RATEwGetRateIdx(byRate)); 254 CARDbAddBasicRate((void *)pDevice, RATEwGetRateIdx(byRate));
263 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", RATEwGetRateIdx(byRate)); 255 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ParseMaxRate AddBasicRate: %d\n", RATEwGetRateIdx(byRate));
264 } 256 }
265 byRate = (BYTE)(pItemExtRates->abyRates[ii]&0x7F); 257 byRate = (BYTE)(pItemExtRates->abyRates[ii]&0x7F);
@@ -272,7 +264,8 @@ UINT uRateLen;
272 } 264 }
273 } //if(pItemExtRates != NULL) 265 } //if(pItemExtRates != NULL)
274 266
275 if ((pDevice->byPacketType == PK_TYPE_11GB) && CARDbIsOFDMinBasicRate((PVOID)pDevice)) { 267 if ((pDevice->byPacketType == PK_TYPE_11GB)
268 && CARDbIsOFDMinBasicRate((void *)pDevice)) {
276 pDevice->byPacketType = PK_TYPE_11GA; 269 pDevice->byPacketType = PK_TYPE_11GA;
277 } 270 }
278 271
@@ -284,7 +277,7 @@ UINT uRateLen;
284 else 277 else
285 *pwMaxBasicRate = pDevice->byTopOFDMBasicRate; 278 *pwMaxBasicRate = pDevice->byTopOFDMBasicRate;
286 if (wOldBasicRate != pDevice->wBasicRate) 279 if (wOldBasicRate != pDevice->wBasicRate)
287 CARDvSetRSPINF((PVOID)pDevice, pDevice->byBBType); 280 CARDvSetRSPINF((void *)pDevice, pDevice->byBBType);
288 281
289 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Exit ParseMaxRate\n"); 282 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Exit ParseMaxRate\n");
290} 283}
@@ -308,17 +301,17 @@ UINT uRateLen;
308#define AUTORATE_TXCNT_THRESHOLD 20 301#define AUTORATE_TXCNT_THRESHOLD 20
309#define AUTORATE_INC_THRESHOLD 30 302#define AUTORATE_INC_THRESHOLD 30
310 303
311VOID 304void
312RATEvTxRateFallBack ( 305RATEvTxRateFallBack(
313 IN PVOID pDeviceHandler, 306 void *pDeviceHandler,
314 IN PKnownNodeDB psNodeDBTable 307 PKnownNodeDB psNodeDBTable
315 ) 308 )
316{ 309{
317PSDevice pDevice = (PSDevice) pDeviceHandler; 310PSDevice pDevice = (PSDevice) pDeviceHandler;
318PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 311PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
319#if 1 //mike fixed old: use packet lose ratio algorithm to control rate 312#if 1 //mike fixed old: use packet lose ratio algorithm to control rate
320WORD wIdxDownRate = 0; 313WORD wIdxDownRate = 0;
321UINT ii; 314unsigned int ii;
322BOOL bAutoRate[MAX_RATE] = {TRUE,TRUE,TRUE,TRUE,FALSE,FALSE,TRUE,TRUE,TRUE,TRUE,TRUE,TRUE}; 315BOOL bAutoRate[MAX_RATE] = {TRUE,TRUE,TRUE,TRUE,FALSE,FALSE,TRUE,TRUE,TRUE,TRUE,TRUE,TRUE};
323DWORD dwThroughputTbl[MAX_RATE] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540}; 316DWORD dwThroughputTbl[MAX_RATE] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540};
324DWORD dwThroughput = 0; 317DWORD dwThroughput = 0;
@@ -399,7 +392,7 @@ DWORD dwTxDiff = 0;
399#else //mike fixed new: use differ-signal strength to control rate 392#else //mike fixed new: use differ-signal strength to control rate
400WORD wIdxUpRate = 0; 393WORD wIdxUpRate = 0;
401BOOL bAutoRate[MAX_RATE] = {TRUE,TRUE,TRUE,TRUE,FALSE,FALSE,TRUE,TRUE,TRUE,TRUE,TRUE,TRUE}; 394BOOL bAutoRate[MAX_RATE] = {TRUE,TRUE,TRUE,TRUE,FALSE,FALSE,TRUE,TRUE,TRUE,TRUE,TRUE,TRUE};
402UINT ii; 395unsigned int ii;
403long ldBm; 396long ldBm;
404 397
405 if (pMgmt->eScanState != WMAC_NO_SCANNING) { 398 if (pMgmt->eScanState != WMAC_NO_SCANNING) {
@@ -473,12 +466,12 @@ if (wIdxUpRate == RATE_54M ) { //11a/g
473-*/ 466-*/
474BYTE 467BYTE
475RATEuSetIE ( 468RATEuSetIE (
476 IN PWLAN_IE_SUPP_RATES pSrcRates, 469 PWLAN_IE_SUPP_RATES pSrcRates,
477 IN PWLAN_IE_SUPP_RATES pDstRates, 470 PWLAN_IE_SUPP_RATES pDstRates,
478 IN UINT uRateLen 471 unsigned int uRateLen
479 ) 472 )
480{ 473{
481 UINT ii, uu, uRateCnt = 0; 474 unsigned int ii, uu, uRateCnt = 0;
482 475
483 if ((pSrcRates == NULL) || (pDstRates == NULL)) 476 if ((pSrcRates == NULL) || (pDstRates == NULL))
484 return 0; 477 return 0;
diff --git a/drivers/staging/vt6656/datarate.h b/drivers/staging/vt6656/datarate.h
index 68f206e2707b..c6f5163ff9b8 100644
--- a/drivers/staging/vt6656/datarate.h
+++ b/drivers/staging/vt6656/datarate.h
@@ -69,42 +69,41 @@
69 69
70 70
71 71
72VOID 72void
73RATEvParseMaxRate( 73RATEvParseMaxRate(
74 IN PVOID pDeviceHandler, 74 void *pDeviceHandler,
75 IN PWLAN_IE_SUPP_RATES pItemRates, 75 PWLAN_IE_SUPP_RATES pItemRates,
76 IN PWLAN_IE_SUPP_RATES pItemExtRates, 76 PWLAN_IE_SUPP_RATES pItemExtRates,
77 IN BOOL bUpdateBasicRate, 77 BOOL bUpdateBasicRate,
78 OUT PWORD pwMaxBasicRate, 78 PWORD pwMaxBasicRate,
79 OUT PWORD pwMaxSuppRate, 79 PWORD pwMaxSuppRate,
80 OUT PWORD pwSuppRate, 80 PWORD pwSuppRate,
81 OUT PBYTE pbyTopCCKRate, 81 PBYTE pbyTopCCKRate,
82 OUT PBYTE pbyTopOFDMRate 82 PBYTE pbyTopOFDMRate
83 ); 83 );
84 84
85VOID 85void
86RATEvTxRateFallBack( 86RATEvTxRateFallBack(
87 IN PVOID pDeviceHandler, 87 void *pDeviceHandler,
88 IN PKnownNodeDB psNodeDBTable 88 PKnownNodeDB psNodeDBTable
89 ); 89 );
90 90
91BYTE 91BYTE
92RATEuSetIE( 92RATEuSetIE(
93 IN PWLAN_IE_SUPP_RATES pSrcRates, 93 PWLAN_IE_SUPP_RATES pSrcRates,
94 IN PWLAN_IE_SUPP_RATES pDstRates, 94 PWLAN_IE_SUPP_RATES pDstRates,
95 IN UINT uRateLen 95 unsigned int uRateLen
96 ); 96 );
97 97
98WORD 98WORD
99RATEwGetRateIdx( 99RATEwGetRateIdx(
100 IN BYTE byRate 100 BYTE byRate
101 ); 101 );
102 102
103 103
104BYTE 104BYTE
105DATARATEbyGetRateIdx( 105DATARATEbyGetRateIdx(
106 IN BYTE byRate 106 BYTE byRate
107 ); 107 );
108 108
109 109#endif /* __DATARATE_H__ */
110#endif //__DATARATE_H__
diff --git a/drivers/staging/vt6656/desc.h b/drivers/staging/vt6656/desc.h
index f10530fcc99b..07f794ec6db2 100644
--- a/drivers/staging/vt6656/desc.h
+++ b/drivers/staging/vt6656/desc.h
@@ -206,8 +206,8 @@ typedef const SRrvTime_atim *PCSRrvTime_atim;
206typedef struct tagSRTSData { 206typedef struct tagSRTSData {
207 WORD wFrameControl; 207 WORD wFrameControl;
208 WORD wDurationID; 208 WORD wDurationID;
209 BYTE abyRA[U_ETHER_ADDR_LEN]; 209 BYTE abyRA[ETH_ALEN];
210 BYTE abyTA[U_ETHER_ADDR_LEN]; 210 BYTE abyTA[ETH_ALEN];
211}__attribute__ ((__packed__)) 211}__attribute__ ((__packed__))
212SRTSData, *PSRTSData; 212SRTSData, *PSRTSData;
213typedef const SRTSData *PCSRTSData; 213typedef const SRTSData *PCSRTSData;
@@ -282,7 +282,7 @@ typedef const SRTS_a_FB *PCSRTS_a_FB;
282typedef struct tagSCTSData { 282typedef struct tagSCTSData {
283 WORD wFrameControl; 283 WORD wFrameControl;
284 WORD wDurationID; 284 WORD wDurationID;
285 BYTE abyRA[U_ETHER_ADDR_LEN]; 285 BYTE abyRA[ETH_ALEN];
286 WORD wReserved; 286 WORD wReserved;
287}__attribute__ ((__packed__)) 287}__attribute__ ((__packed__))
288SCTSData, *PSCTSData; 288SCTSData, *PSCTSData;
@@ -436,8 +436,4 @@ SKeyEntry;
436 436
437/*--------------------- Export Functions --------------------------*/ 437/*--------------------- Export Functions --------------------------*/
438 438
439 439#endif /* __DESC_H__ */
440
441
442#endif // __DESC_H__
443
diff --git a/drivers/staging/vt6656/device.h b/drivers/staging/vt6656/device.h
index 8b541d1d0e23..ef9fd97d3ca7 100644
--- a/drivers/staging/vt6656/device.h
+++ b/drivers/staging/vt6656/device.h
@@ -107,7 +107,7 @@
107#define MAC_MAX_CONTEXT_REG (256+128) 107#define MAC_MAX_CONTEXT_REG (256+128)
108 108
109#define MAX_MULTICAST_ADDRESS_NUM 32 109#define MAX_MULTICAST_ADDRESS_NUM 32
110#define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * U_ETHER_ADDR_LEN) 110#define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * ETH_ALEN)
111 111
112 112
113//#define OP_MODE_INFRASTRUCTURE 0 113//#define OP_MODE_INFRASTRUCTURE 0
@@ -209,9 +209,9 @@ typedef enum _CONTEXT_TYPE {
209// RCB (Receive Control Block) 209// RCB (Receive Control Block)
210typedef struct _RCB 210typedef struct _RCB
211{ 211{
212 PVOID Next; 212 void *Next;
213 LONG Ref; 213 signed long Ref;
214 PVOID pDevice; 214 void *pDevice;
215 struct urb *pUrb; 215 struct urb *pUrb;
216 SRxMgmtPacket sMngPacket; 216 SRxMgmtPacket sMngPacket;
217 struct sk_buff* skb; 217 struct sk_buff* skb;
@@ -222,34 +222,33 @@ typedef struct _RCB
222 222
223// used to track bulk out irps 223// used to track bulk out irps
224typedef struct _USB_SEND_CONTEXT { 224typedef struct _USB_SEND_CONTEXT {
225 PVOID pDevice; 225 void *pDevice;
226 struct sk_buff *pPacket; 226 struct sk_buff *pPacket;
227 struct urb *pUrb; 227 struct urb *pUrb;
228 UINT uBufLen; 228 unsigned int uBufLen;
229 CONTEXT_TYPE Type; 229 CONTEXT_TYPE Type;
230 SEthernetHeader sEthHeader; 230 SEthernetHeader sEthHeader;
231 PVOID Next; 231 void *Next;
232 BOOL bBoolInUse; 232 BOOL bBoolInUse;
233 UCHAR Data[MAX_TOTAL_SIZE_WITH_ALL_HEADERS]; 233 unsigned char Data[MAX_TOTAL_SIZE_WITH_ALL_HEADERS];
234} USB_SEND_CONTEXT, *PUSB_SEND_CONTEXT; 234} USB_SEND_CONTEXT, *PUSB_SEND_CONTEXT;
235 235
236 236
237//structure got from configuration file as user desired default setting. 237/* structure got from configuration file as user-desired default settings */
238typedef struct _DEFAULT_CONFIG{ 238typedef struct _DEFAULT_CONFIG {
239 INT ZoneType; 239 signed int ZoneType;
240 INT eConfigMode; 240 signed int eConfigMode;
241 INT eAuthenMode; //open/wep/wpa 241 signed int eAuthenMode; /* open/wep/wpa */
242 INT bShareKeyAlgorithm; //open-open/open-sharekey/wep-sharekey 242 signed int bShareKeyAlgorithm; /* open-open/{open,wep}-sharekey */
243 INT keyidx; //wepkey index 243 signed int keyidx; /* wepkey index */
244 INT eEncryptionStatus; 244 signed int eEncryptionStatus;
245 245} DEFAULT_CONFIG, *PDEFAULT_CONFIG;
246}DEFAULT_CONFIG,*PDEFAULT_CONFIG;
247 246
248// 247//
249// Structure to keep track of usb interrupt packets 248// Structure to keep track of usb interrupt packets
250// 249//
251typedef struct { 250typedef struct {
252 UINT uDataLen; 251 unsigned int uDataLen;
253 PBYTE pDataBuf; 252 PBYTE pDataBuf;
254// struct urb *pUrb; 253// struct urb *pUrb;
255 BOOL bInUse; 254 BOOL bInUse;
@@ -296,7 +295,7 @@ typedef enum __DEVICE_NDIS_STATUS {
296#define NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED 0x01 295#define NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED 0x01
297 296
298// PMKID Structures 297// PMKID Structures
299typedef UCHAR NDIS_802_11_PMKID_VALUE[16]; 298typedef unsigned char NDIS_802_11_PMKID_VALUE[16];
300 299
301 300
302typedef enum _NDIS_802_11_WEP_STATUS 301typedef enum _NDIS_802_11_WEP_STATUS
@@ -328,7 +327,7 @@ typedef enum _NDIS_802_11_STATUS_TYPE
328//Added new types for PMKID Candidate lists. 327//Added new types for PMKID Candidate lists.
329typedef struct _PMKID_CANDIDATE { 328typedef struct _PMKID_CANDIDATE {
330 NDIS_802_11_MAC_ADDRESS BSSID; 329 NDIS_802_11_MAC_ADDRESS BSSID;
331 ULONG Flags; 330 unsigned long Flags;
332} PMKID_CANDIDATE, *PPMKID_CANDIDATE; 331} PMKID_CANDIDATE, *PPMKID_CANDIDATE;
333 332
334 333
@@ -339,15 +338,15 @@ typedef struct _BSSID_INFO
339} BSSID_INFO, *PBSSID_INFO; 338} BSSID_INFO, *PBSSID_INFO;
340 339
341typedef struct tagSPMKID { 340typedef struct tagSPMKID {
342 ULONG Length; 341 unsigned long Length;
343 ULONG BSSIDInfoCount; 342 unsigned long BSSIDInfoCount;
344 BSSID_INFO BSSIDInfo[MAX_BSSIDINFO_4_PMKID]; 343 BSSID_INFO BSSIDInfo[MAX_BSSIDINFO_4_PMKID];
345} SPMKID, *PSPMKID; 344} SPMKID, *PSPMKID;
346 345
347typedef struct tagSPMKIDCandidateEvent { 346typedef struct tagSPMKIDCandidateEvent {
348 NDIS_802_11_STATUS_TYPE StatusType; 347 NDIS_802_11_STATUS_TYPE StatusType;
349 ULONG Version; // Version of the structure 348 unsigned long Version; /* Version of the structure */
350 ULONG NumCandidates; // No. of pmkid candidates 349 unsigned long NumCandidates; /* No. of pmkid candidates */
351 PMKID_CANDIDATE CandidateList[MAX_PMKIDLIST]; 350 PMKID_CANDIDATE CandidateList[MAX_PMKIDLIST];
352} SPMKIDCandidateEvent, *PSPMKIDCandidateEvent; 351} SPMKIDCandidateEvent, *PSPMKIDCandidateEvent;
353 352
@@ -369,7 +368,7 @@ typedef struct tagSQuietControl {
369// The receive duplicate detection cache entry 368// The receive duplicate detection cache entry
370typedef struct tagSCacheEntry{ 369typedef struct tagSCacheEntry{
371 WORD wFmSequence; 370 WORD wFmSequence;
372 BYTE abyAddr2[U_ETHER_ADDR_LEN]; 371 BYTE abyAddr2[ETH_ALEN];
373 WORD wFrameCtl; 372 WORD wFrameCtl;
374} SCacheEntry, *PSCacheEntry; 373} SCacheEntry, *PSCacheEntry;
375 374
@@ -377,7 +376,7 @@ typedef struct tagSCache{
377/* The receive cache is updated circularly. The next entry to be written is 376/* The receive cache is updated circularly. The next entry to be written is
378 * indexed by the "InPtr". 377 * indexed by the "InPtr".
379*/ 378*/
380 UINT uInPtr; // Place to use next 379 unsigned int uInPtr; /* Place to use next */
381 SCacheEntry asCacheEntry[DUPLICATE_RX_CACHE_LENGTH]; 380 SCacheEntry asCacheEntry[DUPLICATE_RX_CACHE_LENGTH];
382} SCache, *PSCache; 381} SCache, *PSCache;
383 382
@@ -387,11 +386,11 @@ typedef struct tagSDeFragControlBlock
387{ 386{
388 WORD wSequence; 387 WORD wSequence;
389 WORD wFragNum; 388 WORD wFragNum;
390 BYTE abyAddr2[U_ETHER_ADDR_LEN]; 389 BYTE abyAddr2[ETH_ALEN];
391 UINT uLifetime; 390 unsigned int uLifetime;
392 struct sk_buff* skb; 391 struct sk_buff* skb;
393 PBYTE pbyRxBuffer; 392 PBYTE pbyRxBuffer;
394 UINT cbFrameLength; 393 unsigned int cbFrameLength;
395 BOOL bInUse; 394 BOOL bInUse;
396} SDeFragControlBlock, *PSDeFragControlBlock; 395} SDeFragControlBlock, *PSDeFragControlBlock;
397 396
@@ -435,7 +434,7 @@ typedef struct __device_opt {
435 int short_retry; 434 int short_retry;
436 int long_retry; 435 int long_retry;
437 int bbp_type; 436 int bbp_type;
438 U32 flags; 437 u32 flags;
439} OPTIONS, *POPTIONS; 438} OPTIONS, *POPTIONS;
440 439
441 440
@@ -453,25 +452,25 @@ typedef struct __device_info {
453 struct tasklet_struct ReadWorkItem; 452 struct tasklet_struct ReadWorkItem;
454 struct tasklet_struct RxMngWorkItem; 453 struct tasklet_struct RxMngWorkItem;
455 454
456 U32 rx_buf_sz; 455 u32 rx_buf_sz;
457 int multicast_limit; 456 int multicast_limit;
458 BYTE byRxMode; 457 BYTE byRxMode;
459 458
460 spinlock_t lock; 459 spinlock_t lock;
461 460
462 U32 rx_bytes; 461 u32 rx_bytes;
463 462
464 BYTE byRevId; 463 BYTE byRevId;
465 464
466 U32 flags; 465 u32 flags;
467 ULONG Flags; 466 unsigned long Flags;
468 467
469 SCache sDupRxCache; 468 SCache sDupRxCache;
470 469
471 SDeFragControlBlock sRxDFCB[CB_MAX_RX_FRAG]; 470 SDeFragControlBlock sRxDFCB[CB_MAX_RX_FRAG];
472 UINT cbDFCB; 471 unsigned int cbDFCB;
473 UINT cbFreeDFCB; 472 unsigned int cbFreeDFCB;
474 UINT uCurrentDFCBIdx; 473 unsigned int uCurrentDFCBIdx;
475 474
476 // +++USB 475 // +++USB
477 476
@@ -479,29 +478,29 @@ typedef struct __device_info {
479 struct urb *pInterruptURB; 478 struct urb *pInterruptURB;
480 struct usb_ctrlrequest sUsbCtlRequest; 479 struct usb_ctrlrequest sUsbCtlRequest;
481 480
482 UINT int_interval; 481 unsigned int int_interval;
483 // 482 //
484 // Variables to track resources for the BULK In Pipe 483 // Variables to track resources for the BULK In Pipe
485 // 484 //
486 PRCB pRCBMem; 485 PRCB pRCBMem;
487 PRCB apRCB[CB_MAX_RX_DESC]; 486 PRCB apRCB[CB_MAX_RX_DESC];
488 UINT cbRD; 487 unsigned int cbRD;
489 PRCB FirstRecvFreeList; 488 PRCB FirstRecvFreeList;
490 PRCB LastRecvFreeList; 489 PRCB LastRecvFreeList;
491 UINT NumRecvFreeList; 490 unsigned int NumRecvFreeList;
492 PRCB FirstRecvMngList; 491 PRCB FirstRecvMngList;
493 PRCB LastRecvMngList; 492 PRCB LastRecvMngList;
494 UINT NumRecvMngList; 493 unsigned int NumRecvMngList;
495 BOOL bIsRxWorkItemQueued; 494 BOOL bIsRxWorkItemQueued;
496 BOOL bIsRxMngWorkItemQueued; 495 BOOL bIsRxMngWorkItemQueued;
497 ULONG ulRcvRefCount; // number of packets that have not been returned back 496 unsigned long ulRcvRefCount; /* packets that have not returned back */
498 497
499 // 498 //
500 // Variables to track resources for the BULK Out Pipe 499 // Variables to track resources for the BULK Out Pipe
501 // 500 //
502 501
503 PUSB_SEND_CONTEXT apTD[CB_MAX_TX_DESC]; 502 PUSB_SEND_CONTEXT apTD[CB_MAX_TX_DESC];
504 UINT cbTD; 503 unsigned int cbTD;
505 504
506 // 505 //
507 // Variables to track resources for the Interript In Pipe 506 // Variables to track resources for the Interript In Pipe
@@ -518,20 +517,20 @@ typedef struct __device_info {
518 // 517 //
519 // Statistic for USB 518 // Statistic for USB
520 // protect with spinlock 519 // protect with spinlock
521 ULONG ulBulkInPosted; 520 unsigned long ulBulkInPosted;
522 ULONG ulBulkInError; 521 unsigned long ulBulkInError;
523 ULONG ulBulkInContCRCError; 522 unsigned long ulBulkInContCRCError;
524 ULONG ulBulkInBytesRead; 523 unsigned long ulBulkInBytesRead;
525 524
526 ULONG ulBulkOutPosted; 525 unsigned long ulBulkOutPosted;
527 ULONG ulBulkOutError; 526 unsigned long ulBulkOutError;
528 ULONG ulBulkOutContCRCError; 527 unsigned long ulBulkOutContCRCError;
529 ULONG ulBulkOutBytesWrite; 528 unsigned long ulBulkOutBytesWrite;
530 529
531 ULONG ulIntInPosted; 530 unsigned long ulIntInPosted;
532 ULONG ulIntInError; 531 unsigned long ulIntInError;
533 ULONG ulIntInContCRCError; 532 unsigned long ulIntInContCRCError;
534 ULONG ulIntInBytesRead; 533 unsigned long ulIntInBytesRead;
535 534
536 535
537 // Version control 536 // Version control
@@ -547,10 +546,10 @@ typedef struct __device_info {
547 BYTE byOriginalZonetype; 546 BYTE byOriginalZonetype;
548 547
549 BOOL bLinkPass; // link status: OK or fail 548 BOOL bLinkPass; // link status: OK or fail
550 BYTE abyCurrentNetAddr[U_ETHER_ADDR_LEN]; 549 BYTE abyCurrentNetAddr[ETH_ALEN];
551 BYTE abyPermanentNetAddr[U_ETHER_ADDR_LEN]; 550 BYTE abyPermanentNetAddr[ETH_ALEN];
552 // SW network address 551 // SW network address
553// BYTE abySoftwareNetAddr[U_ETHER_ADDR_LEN]; 552 /* u8 abySoftwareNetAddr[ETH_ALEN]; */
554 BOOL bExistSWNetAddr; 553 BOOL bExistSWNetAddr;
555 554
556 // Adapter statistics 555 // Adapter statistics
@@ -561,24 +560,24 @@ typedef struct __device_info {
561 // 560 //
562 // Maintain statistical debug info. 561 // Maintain statistical debug info.
563 // 562 //
564 ULONG packetsReceived; 563 unsigned long packetsReceived;
565 ULONG packetsReceivedDropped; 564 unsigned long packetsReceivedDropped;
566 ULONG packetsReceivedOverflow; 565 unsigned long packetsReceivedOverflow;
567 ULONG packetsSent; 566 unsigned long packetsSent;
568 ULONG packetsSentDropped; 567 unsigned long packetsSentDropped;
569 ULONG SendContextsInUse; 568 unsigned long SendContextsInUse;
570 ULONG RcvBuffersInUse; 569 unsigned long RcvBuffersInUse;
571 570
572 571
573 // 802.11 management 572 // 802.11 management
574 SMgmtObject sMgmtObj; 573 SMgmtObject sMgmtObj;
575 574
576 QWORD qwCurrTSF; 575 QWORD qwCurrTSF;
577 UINT cbBulkInMax; 576 unsigned int cbBulkInMax;
578 BOOL bPSRxBeacon; 577 BOOL bPSRxBeacon;
579 578
580 // 802.11 MAC specific 579 // 802.11 MAC specific
581 UINT uCurrRSSI; 580 unsigned int uCurrRSSI;
582 BYTE byCurrSQ; 581 BYTE byCurrSQ;
583 582
584 583
@@ -599,30 +598,31 @@ typedef struct __device_info {
599 598
600 BOOL bDiversityRegCtlON; 599 BOOL bDiversityRegCtlON;
601 BOOL bDiversityEnable; 600 BOOL bDiversityEnable;
602 ULONG ulDiversityNValue; 601 unsigned long ulDiversityNValue;
603 ULONG ulDiversityMValue; 602 unsigned long ulDiversityMValue;
604 BYTE byTMax; 603 BYTE byTMax;
605 BYTE byTMax2; 604 BYTE byTMax2;
606 BYTE byTMax3; 605 BYTE byTMax3;
607 ULONG ulSQ3TH; 606 unsigned long ulSQ3TH;
608 607
609 ULONG uDiversityCnt; 608 unsigned long uDiversityCnt;
610 BYTE byAntennaState; 609 BYTE byAntennaState;
611 ULONG ulRatio_State0; 610 unsigned long ulRatio_State0;
612 ULONG ulRatio_State1; 611 unsigned long ulRatio_State1;
613 ULONG ulSQ3_State0; 612 unsigned long ulSQ3_State0;
614 ULONG ulSQ3_State1; 613 unsigned long ulSQ3_State1;
615 614
616 ULONG aulSQ3Val[MAX_RATE]; 615 unsigned long aulSQ3Val[MAX_RATE];
617 ULONG aulPktNum[MAX_RATE]; 616 unsigned long aulPktNum[MAX_RATE];
618 617
619 // IFS & Cw 618 /* IFS & Cw */
620 UINT uSIFS; //Current SIFS 619 unsigned int uSIFS; /* Current SIFS */
621 UINT uDIFS; //Current DIFS 620 unsigned int uDIFS; /* Current DIFS */
622 UINT uEIFS; //Current EIFS 621 unsigned int uEIFS; /* Current EIFS */
623 UINT uSlot; //Current SlotTime 622 unsigned int uSlot; /* Current SlotTime */
624 UINT uCwMin; //Current CwMin 623 unsigned int uCwMin; /* Current CwMin */
625 UINT uCwMax; //CwMax is fixed on 1023. 624 unsigned int uCwMax; /* CwMax is fixed on 1023 */
625
626 // PHY parameter 626 // PHY parameter
627 BYTE bySIFS; 627 BYTE bySIFS;
628 BYTE byDIFS; 628 BYTE byDIFS;
@@ -647,7 +647,7 @@ typedef struct __device_info {
647 647
648 BYTE byMinChannel; 648 BYTE byMinChannel;
649 BYTE byMaxChannel; 649 BYTE byMaxChannel;
650 UINT uConnectionRate; 650 unsigned int uConnectionRate;
651 651
652 BYTE byPreambleType; 652 BYTE byPreambleType;
653 BYTE byShortPreamble; 653 BYTE byShortPreamble;
@@ -671,8 +671,8 @@ typedef struct __device_info {
671 CARD_OP_MODE eOPMode; 671 CARD_OP_MODE eOPMode;
672 BOOL bBSSIDFilter; 672 BOOL bBSSIDFilter;
673 WORD wMaxTransmitMSDULifetime; 673 WORD wMaxTransmitMSDULifetime;
674 BYTE abyBSSID[U_ETHER_ADDR_LEN]; 674 BYTE abyBSSID[ETH_ALEN];
675 BYTE abyDesireBSSID[U_ETHER_ADDR_LEN]; 675 BYTE abyDesireBSSID[ETH_ALEN];
676 WORD wCTSDuration; // update while speed change 676 WORD wCTSDuration; // update while speed change
677 WORD wACKDuration; // update while speed change 677 WORD wACKDuration; // update while speed change
678 WORD wRTSTransmitLen; // update while speed change 678 WORD wRTSTransmitLen; // update while speed change
@@ -701,7 +701,7 @@ typedef struct __device_info {
701 WORD wListenInterval; 701 WORD wListenInterval;
702 BOOL bPWBitOn; 702 BOOL bPWBitOn;
703 WMAC_POWER_MODE ePSMode; 703 WMAC_POWER_MODE ePSMode;
704 ULONG ulPSModeWaitTx; 704 unsigned long ulPSModeWaitTx;
705 BOOL bPSModeTxBurst; 705 BOOL bPSModeTxBurst;
706 706
707 // Beacon releated 707 // Beacon releated
@@ -710,7 +710,7 @@ typedef struct __device_info {
710 BOOL bBeaconSent; 710 BOOL bBeaconSent;
711 BOOL bFixRate; 711 BOOL bFixRate;
712 BYTE byCurrentCh; 712 BYTE byCurrentCh;
713 UINT uScanTime; 713 unsigned int uScanTime;
714 714
715 CMD_STATE eCommandState; 715 CMD_STATE eCommandState;
716 716
@@ -721,15 +721,15 @@ typedef struct __device_info {
721 BOOL bStopBeacon; 721 BOOL bStopBeacon;
722 BOOL bStopDataPkt; 722 BOOL bStopDataPkt;
723 BOOL bStopTx0Pkt; 723 BOOL bStopTx0Pkt;
724 UINT uAutoReConnectTime; 724 unsigned int uAutoReConnectTime;
725 UINT uIsroamingTime; 725 unsigned int uIsroamingTime;
726 726
727 // 802.11 counter 727 // 802.11 counter
728 728
729 CMD_ITEM eCmdQueue[CMD_Q_SIZE]; 729 CMD_ITEM eCmdQueue[CMD_Q_SIZE];
730 UINT uCmdDequeueIdx; 730 unsigned int uCmdDequeueIdx;
731 UINT uCmdEnqueueIdx; 731 unsigned int uCmdEnqueueIdx;
732 UINT cbFreeCmdQueue; 732 unsigned int cbFreeCmdQueue;
733 BOOL bCmdRunning; 733 BOOL bCmdRunning;
734 BOOL bCmdClear; 734 BOOL bCmdClear;
735 BOOL bNeedRadioOFF; 735 BOOL bNeedRadioOFF;
@@ -741,7 +741,7 @@ typedef struct __device_info {
741 BYTE bSameBSSCurNum; //DavidWang 741 BYTE bSameBSSCurNum; //DavidWang
742 BOOL bRoaming; 742 BOOL bRoaming;
743 BOOL b11hEable; 743 BOOL b11hEable;
744 ULONG ulTxPower; 744 unsigned long ulTxPower;
745 745
746 // Encryption 746 // Encryption
747 NDIS_802_11_WEP_STATUS eEncryptionStatus; 747 NDIS_802_11_WEP_STATUS eEncryptionStatus;
@@ -762,11 +762,11 @@ typedef struct __device_info {
762 BOOL bAES; 762 BOOL bAES;
763 BYTE byCntMeasure; 763 BYTE byCntMeasure;
764 764
765 UINT uKeyLength; 765 unsigned int uKeyLength;
766 BYTE abyKey[WLAN_WEP232_KEYLEN]; 766 BYTE abyKey[WLAN_WEP232_KEYLEN];
767 767
768 // for AP mode 768 // for AP mode
769 UINT uAssocCount; 769 unsigned int uAssocCount;
770 BOOL bMoreData; 770 BOOL bMoreData;
771 771
772 // QoS 772 // QoS
@@ -781,11 +781,11 @@ typedef struct __device_info {
781 781
782 // For Update BaseBand VGA Gain Offset 782 // For Update BaseBand VGA Gain Offset
783 BOOL bUpdateBBVGA; 783 BOOL bUpdateBBVGA;
784 UINT uBBVGADiffCount; 784 unsigned int uBBVGADiffCount;
785 BYTE byBBVGANew; 785 BYTE byBBVGANew;
786 BYTE byBBVGACurrent; 786 BYTE byBBVGACurrent;
787 BYTE abyBBVGA[BB_VGA_LEVEL]; 787 BYTE abyBBVGA[BB_VGA_LEVEL];
788 LONG ldBmThreshold[BB_VGA_LEVEL]; 788 signed long ldBmThreshold[BB_VGA_LEVEL];
789 789
790 BYTE byBBPreEDRSSI; 790 BYTE byBBPreEDRSSI;
791 BYTE byBBPreEDIndex; 791 BYTE byBBPreEDIndex;
@@ -813,7 +813,7 @@ typedef struct __device_info {
813//2007-0115-01<Add>by MikeLiu 813//2007-0115-01<Add>by MikeLiu
814#ifdef TxInSleep 814#ifdef TxInSleep
815 struct timer_list sTimerTxData; 815 struct timer_list sTimerTxData;
816 ULONG nTxDataTimeCout; 816 unsigned long nTxDataTimeCout;
817 BOOL fTxDataInSleep; 817 BOOL fTxDataInSleep;
818 BOOL IsTxDataTrigger; 818 BOOL IsTxDataTrigger;
819#endif 819#endif
@@ -826,9 +826,9 @@ typedef struct __device_info {
826 826
827 SEthernetHeader sTxEthHeader; 827 SEthernetHeader sTxEthHeader;
828 SEthernetHeader sRxEthHeader; 828 SEthernetHeader sRxEthHeader;
829 BYTE abyBroadcastAddr[U_ETHER_ADDR_LEN]; 829 BYTE abyBroadcastAddr[ETH_ALEN];
830 BYTE abySNAP_RFC1042[U_ETHER_ADDR_LEN]; 830 BYTE abySNAP_RFC1042[ETH_ALEN];
831 BYTE abySNAP_Bridgetunnel[U_ETHER_ADDR_LEN]; 831 BYTE abySNAP_Bridgetunnel[ETH_ALEN];
832 832
833 // Pre-Authentication & PMK cache 833 // Pre-Authentication & PMK cache
834 SPMKID gsPMKID; 834 SPMKID gsPMKID;
@@ -864,7 +864,7 @@ typedef struct __device_info {
864 struct net_device *apdev; 864 struct net_device *apdev;
865 int (*tx_80211)(struct sk_buff *skb, struct net_device *dev); 865 int (*tx_80211)(struct sk_buff *skb, struct net_device *dev);
866#endif 866#endif
867 UINT uChannel; 867 unsigned int uChannel;
868 868
869 struct iw_statistics wstats; // wireless stats 869 struct iw_statistics wstats; // wireless stats
870 BOOL bCommit; 870 BOOL bCommit;
@@ -929,7 +929,9 @@ typedef struct __device_info {
929 929
930/*--------------------- Export Functions --------------------------*/ 930/*--------------------- Export Functions --------------------------*/
931 931
932//BOOL device_dma0_xmit(PSDevice pDevice, struct sk_buff *skb, UINT uNodeIndex); 932/* BOOL device_dma0_xmit(PSDevice pDevice, struct sk_buff *skb,
933 * unsigned int uNodeIndex);
934 */
933BOOL device_alloc_frag_buf(PSDevice pDevice, PSDeFragControlBlock pDeF); 935BOOL device_alloc_frag_buf(PSDevice pDevice, PSDeFragControlBlock pDeF);
934 936
935#endif 937#endif
diff --git a/drivers/staging/vt6656/dpc.c b/drivers/staging/vt6656/dpc.c
index 835c6d6967bf..9afe76cacef5 100644
--- a/drivers/staging/vt6656/dpc.c
+++ b/drivers/staging/vt6656/dpc.c
@@ -74,70 +74,69 @@ const BYTE acbyRxRate[MAX_RATE] =
74 74
75/*--------------------- Static Functions --------------------------*/ 75/*--------------------- Static Functions --------------------------*/
76 76
77static BYTE s_byGetRateIdx(IN BYTE byRate); 77static BYTE s_byGetRateIdx(BYTE byRate);
78
79 78
80static 79static
81VOID 80void
82s_vGetDASA( 81s_vGetDASA(
83 IN PBYTE pbyRxBufferAddr, 82 PBYTE pbyRxBufferAddr,
84 OUT PUINT pcbHeaderSize, 83 PUINT pcbHeaderSize,
85 OUT PSEthernetHeader psEthHeader 84 PSEthernetHeader psEthHeader
86 ); 85 );
87 86
88static 87static
89VOID 88void
90s_vProcessRxMACHeader ( 89s_vProcessRxMACHeader (
91 IN PSDevice pDevice, 90 PSDevice pDevice,
92 IN PBYTE pbyRxBufferAddr, 91 PBYTE pbyRxBufferAddr,
93 IN UINT cbPacketSize, 92 unsigned int cbPacketSize,
94 IN BOOL bIsWEP, 93 BOOL bIsWEP,
95 IN BOOL bExtIV, 94 BOOL bExtIV,
96 OUT PUINT pcbHeadSize 95 PUINT pcbHeadSize
97 ); 96 );
98 97
99static BOOL s_bAPModeRxCtl( 98static BOOL s_bAPModeRxCtl(
100 IN PSDevice pDevice, 99 PSDevice pDevice,
101 IN PBYTE pbyFrame, 100 PBYTE pbyFrame,
102 IN INT iSANodeIndex 101 signed int iSANodeIndex
103 ); 102 );
104 103
105 104
106 105
107static BOOL s_bAPModeRxData ( 106static BOOL s_bAPModeRxData (
108 IN PSDevice pDevice, 107 PSDevice pDevice,
109 IN struct sk_buff* skb, 108 struct sk_buff *skb,
110 IN UINT FrameSize, 109 unsigned int FrameSize,
111 IN UINT cbHeaderOffset, 110 unsigned int cbHeaderOffset,
112 IN INT iSANodeIndex, 111 signed int iSANodeIndex,
113 IN INT iDANodeIndex 112 signed int iDANodeIndex
114 ); 113 );
115 114
116 115
117static BOOL s_bHandleRxEncryption( 116static BOOL s_bHandleRxEncryption(
118 IN PSDevice pDevice, 117 PSDevice pDevice,
119 IN PBYTE pbyFrame, 118 PBYTE pbyFrame,
120 IN UINT FrameSize, 119 unsigned int FrameSize,
121 IN PBYTE pbyRsr, 120 PBYTE pbyRsr,
122 OUT PBYTE pbyNewRsr, 121 PBYTE pbyNewRsr,
123 OUT PSKeyItem *pKeyOut, 122 PSKeyItem * pKeyOut,
124 int * pbExtIV, 123 int * pbExtIV,
125 OUT PWORD pwRxTSC15_0, 124 PWORD pwRxTSC15_0,
126 OUT PDWORD pdwRxTSC47_16 125 PDWORD pdwRxTSC47_16
127 ); 126 );
128 127
129static BOOL s_bHostWepRxEncryption( 128static BOOL s_bHostWepRxEncryption(
130 129
131 IN PSDevice pDevice, 130 PSDevice pDevice,
132 IN PBYTE pbyFrame, 131 PBYTE pbyFrame,
133 IN UINT FrameSize, 132 unsigned int FrameSize,
134 IN PBYTE pbyRsr, 133 PBYTE pbyRsr,
135 IN BOOL bOnFly, 134 BOOL bOnFly,
136 IN PSKeyItem pKey, 135 PSKeyItem pKey,
137 OUT PBYTE pbyNewRsr, 136 PBYTE pbyNewRsr,
138 int * pbExtIV, 137 int * pbExtIV,
139 OUT PWORD pwRxTSC15_0, 138 PWORD pwRxTSC15_0,
140 OUT PDWORD pdwRxTSC47_16 139 PDWORD pdwRxTSC47_16
141 140
142 ); 141 );
143 142
@@ -161,18 +160,18 @@ static BOOL s_bHostWepRxEncryption(
161 * 160 *
162-*/ 161-*/
163static 162static
164VOID 163void
165s_vProcessRxMACHeader ( 164s_vProcessRxMACHeader (
166 IN PSDevice pDevice, 165 PSDevice pDevice,
167 IN PBYTE pbyRxBufferAddr, 166 PBYTE pbyRxBufferAddr,
168 IN UINT cbPacketSize, 167 unsigned int cbPacketSize,
169 IN BOOL bIsWEP, 168 BOOL bIsWEP,
170 IN BOOL bExtIV, 169 BOOL bExtIV,
171 OUT PUINT pcbHeadSize 170 PUINT pcbHeadSize
172 ) 171 )
173{ 172{
174 PBYTE pbyRxBuffer; 173 PBYTE pbyRxBuffer;
175 UINT cbHeaderSize = 0; 174 unsigned int cbHeaderSize = 0;
176 PWORD pwType; 175 PWORD pwType;
177 PS802_11Header pMACHeader; 176 PS802_11Header pMACHeader;
178 int ii; 177 int ii;
@@ -234,11 +233,11 @@ s_vProcessRxMACHeader (
234 } 233 }
235 } 234 }
236 235
237 cbHeaderSize -= (U_ETHER_ADDR_LEN * 2); 236 cbHeaderSize -= (ETH_ALEN * 2);
238 pbyRxBuffer = (PBYTE) (pbyRxBufferAddr + cbHeaderSize); 237 pbyRxBuffer = (PBYTE) (pbyRxBufferAddr + cbHeaderSize);
239 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) 238 for (ii = 0; ii < ETH_ALEN; ii++)
240 *pbyRxBuffer++ = pDevice->sRxEthHeader.abyDstAddr[ii]; 239 *pbyRxBuffer++ = pDevice->sRxEthHeader.abyDstAddr[ii];
241 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) 240 for (ii = 0; ii < ETH_ALEN; ii++)
242 *pbyRxBuffer++ = pDevice->sRxEthHeader.abySrcAddr[ii]; 241 *pbyRxBuffer++ = pDevice->sRxEthHeader.abySrcAddr[ii];
243 242
244 *pcbHeadSize = cbHeaderSize; 243 *pcbHeadSize = cbHeaderSize;
@@ -247,7 +246,7 @@ s_vProcessRxMACHeader (
247 246
248 247
249 248
250static BYTE s_byGetRateIdx (IN BYTE byRate) 249static BYTE s_byGetRateIdx(BYTE byRate)
251{ 250{
252 BYTE byRateIdx; 251 BYTE byRateIdx;
253 252
@@ -260,50 +259,55 @@ static BYTE s_byGetRateIdx (IN BYTE byRate)
260 259
261 260
262static 261static
263VOID 262void
264s_vGetDASA ( 263s_vGetDASA (
265 IN PBYTE pbyRxBufferAddr, 264 PBYTE pbyRxBufferAddr,
266 OUT PUINT pcbHeaderSize, 265 PUINT pcbHeaderSize,
267 OUT PSEthernetHeader psEthHeader 266 PSEthernetHeader psEthHeader
268 ) 267 )
269{ 268{
270 UINT cbHeaderSize = 0; 269 unsigned int cbHeaderSize = 0;
271 PS802_11Header pMACHeader; 270 PS802_11Header pMACHeader;
272 int ii; 271 int ii;
273 272
274 pMACHeader = (PS802_11Header) (pbyRxBufferAddr + cbHeaderSize); 273 pMACHeader = (PS802_11Header) (pbyRxBufferAddr + cbHeaderSize);
275 274
276 if ((pMACHeader->wFrameCtl & FC_TODS) == 0) { 275 if ((pMACHeader->wFrameCtl & FC_TODS) == 0) {
277 if (pMACHeader->wFrameCtl & FC_FROMDS) { 276 if (pMACHeader->wFrameCtl & FC_FROMDS) {
278 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 277 for (ii = 0; ii < ETH_ALEN; ii++) {
279 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr1[ii]; 278 psEthHeader->abyDstAddr[ii] =
280 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr3[ii]; 279 pMACHeader->abyAddr1[ii];
281 } 280 psEthHeader->abySrcAddr[ii] =
282 } 281 pMACHeader->abyAddr3[ii];
283 else { 282 }
284 // IBSS mode 283 } else {
285 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 284 /* IBSS mode */
286 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr1[ii]; 285 for (ii = 0; ii < ETH_ALEN; ii++) {
287 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr2[ii]; 286 psEthHeader->abyDstAddr[ii] =
288 } 287 pMACHeader->abyAddr1[ii];
289 } 288 psEthHeader->abySrcAddr[ii] =
290 } 289 pMACHeader->abyAddr2[ii];
291 else { 290 }
292 // Is AP mode.. 291 }
293 if (pMACHeader->wFrameCtl & FC_FROMDS) { 292 } else {
294 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 293 /* Is AP mode.. */
295 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr3[ii]; 294 if (pMACHeader->wFrameCtl & FC_FROMDS) {
296 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr4[ii]; 295 for (ii = 0; ii < ETH_ALEN; ii++) {
297 cbHeaderSize += 6; 296 psEthHeader->abyDstAddr[ii] =
298 } 297 pMACHeader->abyAddr3[ii];
299 } 298 psEthHeader->abySrcAddr[ii] =
300 else { 299 pMACHeader->abyAddr4[ii];
301 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) { 300 cbHeaderSize += 6;
302 psEthHeader->abyDstAddr[ii] = pMACHeader->abyAddr3[ii]; 301 }
303 psEthHeader->abySrcAddr[ii] = pMACHeader->abyAddr2[ii]; 302 } else {
304 } 303 for (ii = 0; ii < ETH_ALEN; ii++) {
305 } 304 psEthHeader->abyDstAddr[ii] =
306 }; 305 pMACHeader->abyAddr3[ii];
306 psEthHeader->abySrcAddr[ii] =
307 pMACHeader->abyAddr2[ii];
308 }
309 }
310 };
307 *pcbHeaderSize = cbHeaderSize; 311 *pcbHeaderSize = cbHeaderSize;
308} 312}
309 313
@@ -312,9 +316,9 @@ s_vGetDASA (
312 316
313BOOL 317BOOL
314RXbBulkInProcessData ( 318RXbBulkInProcessData (
315 IN PSDevice pDevice, 319 PSDevice pDevice,
316 IN PRCB pRCB, 320 PRCB pRCB,
317 IN ULONG BytesToIndicate 321 unsigned long BytesToIndicate
318 ) 322 )
319{ 323{
320 324
@@ -329,26 +333,26 @@ RXbBulkInProcessData (
329 PQWORD pqwTSFTime; 333 PQWORD pqwTSFTime;
330 PBYTE pbyFrame; 334 PBYTE pbyFrame;
331 BOOL bDeFragRx = FALSE; 335 BOOL bDeFragRx = FALSE;
332 UINT cbHeaderOffset; 336 unsigned int cbHeaderOffset;
333 UINT FrameSize; 337 unsigned int FrameSize;
334 WORD wEtherType = 0; 338 WORD wEtherType = 0;
335 INT iSANodeIndex = -1; 339 signed int iSANodeIndex = -1;
336 INT iDANodeIndex = -1; 340 signed int iDANodeIndex = -1;
337 UINT ii; 341 unsigned int ii;
338 UINT cbIVOffset; 342 unsigned int cbIVOffset;
339 PBYTE pbyRxSts; 343 PBYTE pbyRxSts;
340 PBYTE pbyRxRate; 344 PBYTE pbyRxRate;
341 PBYTE pbySQ; 345 PBYTE pbySQ;
342#ifdef Calcu_LinkQual 346#ifdef Calcu_LinkQual
343 PBYTE pby3SQ; 347 PBYTE pby3SQ;
344#endif 348#endif
345 UINT cbHeaderSize; 349 unsigned int cbHeaderSize;
346 PSKeyItem pKey = NULL; 350 PSKeyItem pKey = NULL;
347 WORD wRxTSC15_0 = 0; 351 WORD wRxTSC15_0 = 0;
348 DWORD dwRxTSC47_16 = 0; 352 DWORD dwRxTSC47_16 = 0;
349 SKeyItem STempKey; 353 SKeyItem STempKey;
350 // 802.11h RPI 354 // 802.11h RPI
351 //LONG ldBm = 0; 355 /* signed long ldBm = 0; */
352 BOOL bIsWEP = FALSE; 356 BOOL bIsWEP = FALSE;
353 BOOL bExtIV = FALSE; 357 BOOL bExtIV = FALSE;
354 DWORD dwWbkStatus; 358 DWORD dwWbkStatus;
@@ -368,7 +372,7 @@ RXbBulkInProcessData (
368 372
369 //[31:16]RcvByteCount ( not include 4-byte Status ) 373 //[31:16]RcvByteCount ( not include 4-byte Status )
370 dwWbkStatus = *( (PDWORD)(skb->data) ); 374 dwWbkStatus = *( (PDWORD)(skb->data) );
371 FrameSize = (UINT)(dwWbkStatus >> 16); 375 FrameSize = (unsigned int)(dwWbkStatus >> 16);
372 FrameSize += 4; 376 FrameSize += 4;
373 377
374 if (BytesToIndicate != FrameSize) { 378 if (BytesToIndicate != FrameSize) {
@@ -930,9 +934,9 @@ RXbBulkInProcessData (
930 if (bIsWEP) { 934 if (bIsWEP) {
931 WORD wLocalTSC15_0 = 0; 935 WORD wLocalTSC15_0 = 0;
932 DWORD dwLocalTSC47_16 = 0; 936 DWORD dwLocalTSC47_16 = 0;
933 ULONGLONG RSC = 0; 937 unsigned long long RSC = 0;
934 // endian issues 938 // endian issues
935 RSC = *((ULONGLONG *) &(pKey->KeyRSC)); 939 RSC = *((unsigned long long *) &(pKey->KeyRSC));
936 wLocalTSC15_0 = (WORD) RSC; 940 wLocalTSC15_0 = (WORD) RSC;
937 dwLocalTSC47_16 = (DWORD) (RSC>>16); 941 dwLocalTSC47_16 = (DWORD) (RSC>>16);
938 942
@@ -1017,9 +1021,9 @@ RXbBulkInProcessData (
1017 1021
1018 1022
1019static BOOL s_bAPModeRxCtl ( 1023static BOOL s_bAPModeRxCtl (
1020 IN PSDevice pDevice, 1024 PSDevice pDevice,
1021 IN PBYTE pbyFrame, 1025 PBYTE pbyFrame,
1022 IN INT iSANodeIndex 1026 signed int iSANodeIndex
1023 ) 1027 )
1024{ 1028{
1025 PS802_11Header p802_11Header; 1029 PS802_11Header p802_11Header;
@@ -1065,7 +1069,9 @@ static BOOL s_bAPModeRxCtl (
1065 // delcare received ps-poll event 1069 // delcare received ps-poll event
1066 if (IS_CTL_PSPOLL(pbyFrame)) { 1070 if (IS_CTL_PSPOLL(pbyFrame)) {
1067 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE; 1071 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE;
1068 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 1072 bScheduleCommand((void *) pDevice,
1073 WLAN_CMD_RX_PSPOLL,
1074 NULL);
1069 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 1\n"); 1075 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 1\n");
1070 } 1076 }
1071 else { 1077 else {
@@ -1074,7 +1080,9 @@ static BOOL s_bAPModeRxCtl (
1074 if (!IS_FC_POWERMGT(pbyFrame)) { 1080 if (!IS_FC_POWERMGT(pbyFrame)) {
1075 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE; 1081 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE;
1076 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE; 1082 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE;
1077 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 1083 bScheduleCommand((void *) pDevice,
1084 WLAN_CMD_RX_PSPOLL,
1085 NULL);
1078 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 2\n"); 1086 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 2\n");
1079 } 1087 }
1080 } 1088 }
@@ -1090,7 +1098,9 @@ static BOOL s_bAPModeRxCtl (
1090 if (pMgmt->sNodeDBTable[iSANodeIndex].wEnQueueCnt > 0) { 1098 if (pMgmt->sNodeDBTable[iSANodeIndex].wEnQueueCnt > 0) {
1091 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE; 1099 pMgmt->sNodeDBTable[iSANodeIndex].bPSEnable = FALSE;
1092 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE; 1100 pMgmt->sNodeDBTable[iSANodeIndex].bRxPSPoll = TRUE;
1093 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 1101 bScheduleCommand((void *) pDevice,
1102 WLAN_CMD_RX_PSPOLL,
1103 NULL);
1094 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 3\n"); 1104 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dpc: WLAN_CMD_RX_PSPOLL 3\n");
1095 1105
1096 } 1106 }
@@ -1139,18 +1149,18 @@ static BOOL s_bAPModeRxCtl (
1139} 1149}
1140 1150
1141static BOOL s_bHandleRxEncryption ( 1151static BOOL s_bHandleRxEncryption (
1142 IN PSDevice pDevice, 1152 PSDevice pDevice,
1143 IN PBYTE pbyFrame, 1153 PBYTE pbyFrame,
1144 IN UINT FrameSize, 1154 unsigned int FrameSize,
1145 IN PBYTE pbyRsr, 1155 PBYTE pbyRsr,
1146 OUT PBYTE pbyNewRsr, 1156 PBYTE pbyNewRsr,
1147 OUT PSKeyItem *pKeyOut, 1157 PSKeyItem * pKeyOut,
1148 int * pbExtIV, 1158 int * pbExtIV,
1149 OUT PWORD pwRxTSC15_0, 1159 PWORD pwRxTSC15_0,
1150 OUT PDWORD pdwRxTSC47_16 1160 PDWORD pdwRxTSC47_16
1151 ) 1161 )
1152{ 1162{
1153 UINT PayloadLen = FrameSize; 1163 unsigned int PayloadLen = FrameSize;
1154 PBYTE pbyIV; 1164 PBYTE pbyIV;
1155 BYTE byKeyIdx; 1165 BYTE byKeyIdx;
1156 PSKeyItem pKey = NULL; 1166 PSKeyItem pKey = NULL;
@@ -1285,20 +1295,20 @@ static BOOL s_bHandleRxEncryption (
1285 1295
1286 1296
1287static BOOL s_bHostWepRxEncryption ( 1297static BOOL s_bHostWepRxEncryption (
1288 IN PSDevice pDevice, 1298 PSDevice pDevice,
1289 IN PBYTE pbyFrame, 1299 PBYTE pbyFrame,
1290 IN UINT FrameSize, 1300 unsigned int FrameSize,
1291 IN PBYTE pbyRsr, 1301 PBYTE pbyRsr,
1292 IN BOOL bOnFly, 1302 BOOL bOnFly,
1293 IN PSKeyItem pKey, 1303 PSKeyItem pKey,
1294 OUT PBYTE pbyNewRsr, 1304 PBYTE pbyNewRsr,
1295 int * pbExtIV, 1305 int * pbExtIV,
1296 OUT PWORD pwRxTSC15_0, 1306 PWORD pwRxTSC15_0,
1297 OUT PDWORD pdwRxTSC47_16 1307 PDWORD pdwRxTSC47_16
1298 ) 1308 )
1299{ 1309{
1300 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1310 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1301 UINT PayloadLen = FrameSize; 1311 unsigned int PayloadLen = FrameSize;
1302 PBYTE pbyIV; 1312 PBYTE pbyIV;
1303 BYTE byKeyIdx; 1313 BYTE byKeyIdx;
1304 BYTE byDecMode = KEY_CTL_WEP; 1314 BYTE byDecMode = KEY_CTL_WEP;
@@ -1417,12 +1427,12 @@ static BOOL s_bHostWepRxEncryption (
1417 1427
1418 1428
1419static BOOL s_bAPModeRxData ( 1429static BOOL s_bAPModeRxData (
1420 IN PSDevice pDevice, 1430 PSDevice pDevice,
1421 IN struct sk_buff* skb, 1431 struct sk_buff *skb,
1422 IN UINT FrameSize, 1432 unsigned int FrameSize,
1423 IN UINT cbHeaderOffset, 1433 unsigned int cbHeaderOffset,
1424 IN INT iSANodeIndex, 1434 signed int iSANodeIndex,
1425 IN INT iDANodeIndex 1435 signed int iDANodeIndex
1426 ) 1436 )
1427 1437
1428{ 1438{
@@ -1493,7 +1503,8 @@ static BOOL s_bAPModeRxData (
1493 iDANodeIndex = 0; 1503 iDANodeIndex = 0;
1494 1504
1495 if ((pDevice->uAssocCount > 1) && (iDANodeIndex >= 0)) { 1505 if ((pDevice->uAssocCount > 1) && (iDANodeIndex >= 0)) {
1496 bRelayPacketSend(pDevice, (PBYTE)(skb->data + cbHeaderOffset), FrameSize, (UINT)iDANodeIndex); 1506 bRelayPacketSend(pDevice, (PBYTE) (skb->data + cbHeaderOffset),
1507 FrameSize, (unsigned int) iDANodeIndex);
1497 } 1508 }
1498 1509
1499 if (bRelayOnly) 1510 if (bRelayOnly)
@@ -1509,10 +1520,7 @@ static BOOL s_bAPModeRxData (
1509 1520
1510 1521
1511 1522
1512VOID 1523void RXvWorkItem(void *Context)
1513RXvWorkItem(
1514 PVOID Context
1515 )
1516{ 1524{
1517 PSDevice pDevice = (PSDevice) Context; 1525 PSDevice pDevice = (PSDevice) Context;
1518 NTSTATUS ntStatus; 1526 NTSTATUS ntStatus;
@@ -1535,10 +1543,10 @@ RXvWorkItem(
1535} 1543}
1536 1544
1537 1545
1538VOID 1546void
1539RXvFreeRCB( 1547RXvFreeRCB(
1540 IN PRCB pRCB, 1548 PRCB pRCB,
1541 IN BOOL bReAllocSkb 1549 BOOL bReAllocSkb
1542 ) 1550 )
1543{ 1551{
1544 PSDevice pDevice = (PSDevice)pRCB->pDevice; 1552 PSDevice pDevice = (PSDevice)pRCB->pDevice;
@@ -1575,10 +1583,7 @@ RXvFreeRCB(
1575} 1583}
1576 1584
1577 1585
1578VOID 1586void RXvMngWorkItem(void *Context)
1579RXvMngWorkItem(
1580 PVOID Context
1581 )
1582{ 1587{
1583 PSDevice pDevice = (PSDevice) Context; 1588 PSDevice pDevice = (PSDevice) Context;
1584 PRCB pRCB=NULL; 1589 PRCB pRCB=NULL;
@@ -1598,7 +1603,7 @@ RXvMngWorkItem(
1598 } 1603 }
1599 ASSERT(pRCB);// cannot be NULL 1604 ASSERT(pRCB);// cannot be NULL
1600 pRxPacket = &(pRCB->sMngPacket); 1605 pRxPacket = &(pRCB->sMngPacket);
1601 vMgrRxManagePacket((HANDLE)pDevice, &(pDevice->sMgmtObj), pRxPacket); 1606 vMgrRxManagePacket((void *) pDevice, &(pDevice->sMgmtObj), pRxPacket);
1602 pRCB->Ref--; 1607 pRCB->Ref--;
1603 if(pRCB->Ref == 0) { 1608 if(pRCB->Ref == 0) {
1604 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"RxvFreeMng %d %d\n",pDevice->NumRecvFreeList, pDevice->NumRecvMngList); 1609 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"RxvFreeMng %d %d\n",pDevice->NumRecvFreeList, pDevice->NumRecvMngList);
diff --git a/drivers/staging/vt6656/dpc.h b/drivers/staging/vt6656/dpc.h
index df148b453966..d4fca43af4fe 100644
--- a/drivers/staging/vt6656/dpc.h
+++ b/drivers/staging/vt6656/dpc.h
@@ -41,30 +41,21 @@
41 41
42/*--------------------- Export Functions --------------------------*/ 42/*--------------------- Export Functions --------------------------*/
43 43
44VOID 44void RXvWorkItem(void *Context);
45RXvWorkItem(
46 PVOID Context
47 );
48 45
49VOID 46void RXvMngWorkItem(void *Context);
50RXvMngWorkItem(
51 PVOID Context
52 );
53 47
54VOID 48void
55RXvFreeRCB( 49RXvFreeRCB(
56 IN PRCB pRCB, 50 PRCB pRCB,
57 IN BOOL bReAllocSkb 51 BOOL bReAllocSkb
58 ); 52 );
59 53
60BOOL 54BOOL
61RXbBulkInProcessData( 55RXbBulkInProcessData(
62 IN PSDevice pDevice, 56 PSDevice pDevice,
63 IN PRCB pRCB, 57 PRCB pRCB,
64 IN ULONG BytesToIndicate 58 unsigned long BytesToIndicate
65 ); 59 );
66 60
67#endif // __RXTX_H__ 61#endif /* __RXTX_H__ */
68
69
70
diff --git a/drivers/staging/vt6656/firmware.c b/drivers/staging/vt6656/firmware.c
index 585b6b12c5ba..e1f96d7086f7 100644
--- a/drivers/staging/vt6656/firmware.c
+++ b/drivers/staging/vt6656/firmware.c
@@ -770,7 +770,7 @@ const BYTE abyFirmware[] = {
770 770
771BOOL 771BOOL
772FIRMWAREbDownload( 772FIRMWAREbDownload(
773 IN PSDevice pDevice 773 PSDevice pDevice
774 ) 774 )
775{ 775{
776 NDIS_STATUS NdisStatus; 776 NDIS_STATUS NdisStatus;
@@ -820,7 +820,7 @@ FIRMWAREbDownload(
820 820
821BOOL 821BOOL
822FIRMWAREbBrach2Sram( 822FIRMWAREbBrach2Sram(
823 IN PSDevice pDevice 823 PSDevice pDevice
824 ) 824 )
825{ 825{
826 NDIS_STATUS NdisStatus; 826 NDIS_STATUS NdisStatus;
@@ -845,7 +845,7 @@ FIRMWAREbBrach2Sram(
845 845
846BOOL 846BOOL
847FIRMWAREbCheckVersion( 847FIRMWAREbCheckVersion(
848 IN PSDevice pDevice 848 PSDevice pDevice
849 ) 849 )
850{ 850{
851 NTSTATUS ntStatus; 851 NTSTATUS ntStatus;
diff --git a/drivers/staging/vt6656/firmware.h b/drivers/staging/vt6656/firmware.h
index 97f8559f2a55..b2f5b5818a93 100644
--- a/drivers/staging/vt6656/firmware.h
+++ b/drivers/staging/vt6656/firmware.h
@@ -43,18 +43,17 @@
43 43
44BOOL 44BOOL
45FIRMWAREbDownload( 45FIRMWAREbDownload(
46 IN PSDevice pDevice 46 PSDevice pDevice
47 ); 47 );
48 48
49BOOL 49BOOL
50FIRMWAREbBrach2Sram( 50FIRMWAREbBrach2Sram(
51 IN PSDevice pDevice 51 PSDevice pDevice
52 ); 52 );
53 53
54BOOL 54BOOL
55FIRMWAREbCheckVersion( 55FIRMWAREbCheckVersion(
56 IN PSDevice pDevice 56 PSDevice pDevice
57 ); 57 );
58 58
59 59#endif /* __FIRMWARE_H__ */
60#endif // __FIRMWARE_H__
diff --git a/drivers/staging/vt6656/hostap.c b/drivers/staging/vt6656/hostap.c
index 1078d616c497..f70e922a615b 100644
--- a/drivers/staging/vt6656/hostap.c
+++ b/drivers/staging/vt6656/hostap.c
@@ -91,10 +91,9 @@ static int hostap_enable_hostapd(PSDevice pDevice, int rtnl_locked)
91 91
92 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "%s: Enabling hostapd mode\n", dev->name); 92 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "%s: Enabling hostapd mode\n", dev->name);
93 93
94 pDevice->apdev = (struct net_device *)kmalloc(sizeof(struct net_device), GFP_KERNEL); 94 pDevice->apdev = kzalloc(sizeof(struct net_device), GFP_KERNEL);
95 if (pDevice->apdev == NULL) 95 if (pDevice->apdev == NULL)
96 return -ENOMEM; 96 return -ENOMEM;
97 memset(pDevice->apdev, 0, sizeof(struct net_device));
98 97
99 apdev_priv = netdev_priv(pDevice->apdev); 98 apdev_priv = netdev_priv(pDevice->apdev);
100 *apdev_priv = *pDevice; 99 *apdev_priv = *pDevice;
@@ -178,7 +177,7 @@ static int hostap_disable_hostapd(PSDevice pDevice, int rtnl_locked)
178 * 177 *
179 */ 178 */
180 179
181int hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked) 180int vt6656_hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked)
182{ 181{
183 if (val < 0 || val > 1) 182 if (val < 0 || val > 1)
184 return -EINVAL; 183 return -EINVAL;
@@ -211,7 +210,7 @@ int hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked)
211static int hostap_remove_sta(PSDevice pDevice, 210static int hostap_remove_sta(PSDevice pDevice,
212 struct viawget_hostapd_param *param) 211 struct viawget_hostapd_param *param)
213{ 212{
214 UINT uNodeIndex; 213 unsigned int uNodeIndex;
215 214
216 215
217 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) { 216 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) {
@@ -240,7 +239,7 @@ static int hostap_add_sta(PSDevice pDevice,
240 struct viawget_hostapd_param *param) 239 struct viawget_hostapd_param *param)
241{ 240{
242 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 241 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
243 UINT uNodeIndex; 242 unsigned int uNodeIndex;
244 243
245 244
246 if (!BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) { 245 if (!BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) {
@@ -300,7 +299,7 @@ static int hostap_get_info_sta(PSDevice pDevice,
300 struct viawget_hostapd_param *param) 299 struct viawget_hostapd_param *param)
301{ 300{
302 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 301 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
303 UINT uNodeIndex; 302 unsigned int uNodeIndex;
304 303
305 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) { 304 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) {
306 param->u.get_info_sta.inactive_sec = 305 param->u.get_info_sta.inactive_sec =
@@ -334,7 +333,7 @@ static int hostap_reset_txexc_sta(PSDevice pDevice,
334 struct viawget_hostapd_param *param) 333 struct viawget_hostapd_param *param)
335{ 334{
336 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 335 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
337 UINT uNodeIndex; 336 unsigned int uNodeIndex;
338 337
339 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) { 338 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) {
340 pMgmt->sNodeDBTable[uNodeIndex].uTxAttempts = 0; 339 pMgmt->sNodeDBTable[uNodeIndex].uTxAttempts = 0;
@@ -364,13 +363,13 @@ static int hostap_set_flags_sta(PSDevice pDevice,
364 struct viawget_hostapd_param *param) 363 struct viawget_hostapd_param *param)
365{ 364{
366 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 365 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
367 UINT uNodeIndex; 366 unsigned int uNodeIndex;
368 367
369 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) { 368 if (BSSbIsSTAInNodeDB(pDevice, param->sta_addr, &uNodeIndex)) {
370 pMgmt->sNodeDBTable[uNodeIndex].dwFlags |= param->u.set_flags_sta.flags_or; 369 pMgmt->sNodeDBTable[uNodeIndex].dwFlags |= param->u.set_flags_sta.flags_or;
371 pMgmt->sNodeDBTable[uNodeIndex].dwFlags &= param->u.set_flags_sta.flags_and; 370 pMgmt->sNodeDBTable[uNodeIndex].dwFlags &= param->u.set_flags_sta.flags_and;
372 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " dwFlags = %x \n", 371 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " dwFlags = %x\n",
373 (UINT)pMgmt->sNodeDBTable[uNodeIndex].dwFlags); 372 (unsigned int) pMgmt->sNodeDBTable[uNodeIndex].dwFlags);
374 } 373 }
375 else { 374 else {
376 return -ENOENT; 375 return -ENOENT;
@@ -744,7 +743,7 @@ static int hostap_get_encryption(PSDevice pDevice,
744 743
745/* 744/*
746 * Description: 745 * Description:
747 * hostap_ioctl main function supported for hostap deamon. 746 * vt6656_hostap_ioctl main function supported for hostap deamon.
748 * 747 *
749 * Parameters: 748 * Parameters:
750 * In: 749 * In:
@@ -756,7 +755,7 @@ static int hostap_get_encryption(PSDevice pDevice,
756 * 755 *
757 */ 756 */
758 757
759int hostap_ioctl(PSDevice pDevice, struct iw_point *p) 758int vt6656_hostap_ioctl(PSDevice pDevice, struct iw_point *p)
760{ 759{
761 struct viawget_hostapd_param *param; 760 struct viawget_hostapd_param *param;
762 int ret = 0; 761 int ret = 0;
@@ -766,7 +765,7 @@ int hostap_ioctl(PSDevice pDevice, struct iw_point *p)
766 p->length > VIAWGET_HOSTAPD_MAX_BUF_SIZE || !p->pointer) 765 p->length > VIAWGET_HOSTAPD_MAX_BUF_SIZE || !p->pointer)
767 return -EINVAL; 766 return -EINVAL;
768 767
769 param = (struct viawget_hostapd_param *) kmalloc((int)p->length, (int)GFP_KERNEL); 768 param = kmalloc((int)p->length, (int)GFP_KERNEL);
770 if (param == NULL) 769 if (param == NULL)
771 return -ENOMEM; 770 return -ENOMEM;
772 771
@@ -844,7 +843,7 @@ int hostap_ioctl(PSDevice pDevice, struct iw_point *p)
844 return -EOPNOTSUPP; 843 return -EOPNOTSUPP;
845 844
846 default: 845 default:
847 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "hostap_ioctl: unknown cmd=%d\n", 846 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "vt6656_hostap_ioctl: unknown cmd=%d\n",
848 (int)param->cmd); 847 (int)param->cmd);
849 return -EOPNOTSUPP; 848 return -EOPNOTSUPP;
850 break; 849 break;
diff --git a/drivers/staging/vt6656/hostap.h b/drivers/staging/vt6656/hostap.h
index 8fd667b542be..b660aee1ca0e 100644
--- a/drivers/staging/vt6656/hostap.h
+++ b/drivers/staging/vt6656/hostap.h
@@ -61,10 +61,7 @@
61#define ARPHRD_IEEE80211 801 61#define ARPHRD_IEEE80211 801
62#endif 62#endif
63 63
64int hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked); 64int vt6656_hostap_set_hostapd(PSDevice pDevice, int val, int rtnl_locked);
65int hostap_ioctl(PSDevice pDevice, struct iw_point *p); 65int vt6656_hostap_ioctl(PSDevice pDevice, struct iw_point *p);
66
67#endif // __HOSTAP_H__
68
69
70 66
67#endif /* __HOSTAP_H__ */
diff --git a/drivers/staging/vt6656/int.c b/drivers/staging/vt6656/int.c
index 35053be6900d..89f5b18bdf1f 100644
--- a/drivers/staging/vt6656/int.c
+++ b/drivers/staging/vt6656/int.c
@@ -41,8 +41,8 @@
41#include "usbpipe.h" 41#include "usbpipe.h"
42 42
43/*--------------------- Static Definitions -------------------------*/ 43/*--------------------- Static Definitions -------------------------*/
44//static int msglevel =MSG_LEVEL_DEBUG; 44/* static int msglevel = MSG_LEVEL_DEBUG; */
45static int msglevel =MSG_LEVEL_INFO; 45static int msglevel = MSG_LEVEL_INFO;
46 46
47 47
48/*--------------------- Static Classes ----------------------------*/ 48/*--------------------- Static Classes ----------------------------*/
@@ -74,120 +74,151 @@ static int msglevel =MSG_LEVEL_INFO;
74 * 74 *
75 * Notes: 75 * Notes:
76 * 76 *
77 * USB reads are by nature 'Blocking', and when in a read, the device looks like it's 77 * USB reads are by nature 'Blocking', and when in a read, the device looks
78 * in a 'stall' condition, so we deliberately time out every second if we've gotten no data 78 * like it's in a 'stall' condition, so we deliberately time out every second
79 * if we've gotten no data
79 * 80 *
80-*/ 81-*/
81VOID 82void INTvWorkItem(void *Context)
82INTvWorkItem(
83 PVOID Context
84 )
85{ 83{
86 PSDevice pDevice = (PSDevice) Context; 84 PSDevice pDevice = (PSDevice) Context;
87 NTSTATUS ntStatus; 85 NTSTATUS ntStatus;
88 86
89 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->Interrupt Polling Thread\n"); 87 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->Interrupt Polling Thread\n");
90
91 spin_lock_irq(&pDevice->lock);
92 if (pDevice->fKillEventPollingThread != TRUE) {
93 ntStatus = PIPEnsInterruptRead(pDevice);
94 }
95 spin_unlock_irq(&pDevice->lock);
96
97 }
98 88
89 spin_lock_irq(&pDevice->lock);
90 if (pDevice->fKillEventPollingThread != TRUE)
91 ntStatus = PIPEnsInterruptRead(pDevice);
92 spin_unlock_irq(&pDevice->lock);
93}
99 94
100NTSTATUS 95NTSTATUS
101INTnsProcessData( 96INTnsProcessData(PSDevice pDevice)
102 IN PSDevice pDevice
103 )
104{ 97{
105 NTSTATUS status = STATUS_SUCCESS; 98 NTSTATUS status = STATUS_SUCCESS;
106 PSINTData pINTData; 99 PSINTData pINTData;
107 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 100 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
108 struct net_device_stats* pStats = &pDevice->stats; 101 struct net_device_stats *pStats = &pDevice->stats;
109 102
110 103 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->s_nsInterruptProcessData\n");
111 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->s_nsInterruptProcessData\n"); 104
112 105 pINTData = (PSINTData) pDevice->intBuf.pDataBuf;
113 pINTData = (PSINTData) pDevice->intBuf.pDataBuf; 106 if (pINTData->byTSR0 & TSR_VALID) {
114 if (pINTData->byTSR0 & TSR_VALID) { 107 STAvUpdateTDStatCounter(&(pDevice->scStatistic),
115 STAvUpdateTDStatCounter (&(pDevice->scStatistic), (BYTE) (pINTData->byPkt0 & 0x0F), (BYTE) (pINTData->byPkt0>>4), pINTData->byTSR0); 108 (BYTE) (pINTData->byPkt0 & 0x0F),
116 BSSvUpdateNodeTxCounter (pDevice, &(pDevice->scStatistic), pINTData->byTSR0, pINTData->byPkt0); 109 (BYTE) (pINTData->byPkt0>>4),
117 //DBG_PRN_GRP01(("TSR0 %02x\n", pINTData->byTSR0)); 110 pINTData->byTSR0);
118 } 111 BSSvUpdateNodeTxCounter(pDevice,
119 if (pINTData->byTSR1 & TSR_VALID) { 112 &(pDevice->scStatistic),
120 STAvUpdateTDStatCounter (&(pDevice->scStatistic), (BYTE) (pINTData->byPkt1 & 0x0F), (BYTE) (pINTData->byPkt1>>4), pINTData->byTSR1); 113 pINTData->byTSR0,
121 BSSvUpdateNodeTxCounter (pDevice, &(pDevice->scStatistic), pINTData->byTSR1, pINTData->byPkt1); 114 pINTData->byPkt0);
122 //DBG_PRN_GRP01(("TSR1 %02x\n", pINTData->byTSR1)); 115 /*DBG_PRN_GRP01(("TSR0 %02x\n", pINTData->byTSR0));*/
123 } 116 }
124 if (pINTData->byTSR2 & TSR_VALID) { 117 if (pINTData->byTSR1 & TSR_VALID) {
125 STAvUpdateTDStatCounter (&(pDevice->scStatistic), (BYTE) (pINTData->byPkt2 & 0x0F), (BYTE) (pINTData->byPkt2>>4), pINTData->byTSR2); 118 STAvUpdateTDStatCounter(&(pDevice->scStatistic),
126 BSSvUpdateNodeTxCounter (pDevice, &(pDevice->scStatistic), pINTData->byTSR2, pINTData->byPkt2); 119 (BYTE) (pINTData->byPkt1 & 0x0F),
127 //DBG_PRN_GRP01(("TSR2 %02x\n", pINTData->byTSR2)); 120 (BYTE) (pINTData->byPkt1>>4),
128 } 121 pINTData->byTSR1);
129 if (pINTData->byTSR3 & TSR_VALID) { 122 BSSvUpdateNodeTxCounter(pDevice,
130 STAvUpdateTDStatCounter (&(pDevice->scStatistic), (BYTE) (pINTData->byPkt3 & 0x0F), (BYTE) (pINTData->byPkt3>>4), pINTData->byTSR3); 123 &(pDevice->scStatistic),
131 BSSvUpdateNodeTxCounter (pDevice, &(pDevice->scStatistic), pINTData->byTSR3, pINTData->byPkt3); 124 pINTData->byTSR1,
132 //DBG_PRN_GRP01(("TSR3 %02x\n", pINTData->byTSR3)); 125 pINTData->byPkt1);
133 } 126 /*DBG_PRN_GRP01(("TSR1 %02x\n", pINTData->byTSR1));*/
134 if ( pINTData->byISR0 != 0 ) { 127 }
135 if (pINTData->byISR0 & ISR_BNTX) { 128 if (pINTData->byTSR2 & TSR_VALID) {
136 129 STAvUpdateTDStatCounter(&(pDevice->scStatistic),
137 if (pDevice->eOPMode == OP_MODE_AP) { 130 (BYTE) (pINTData->byPkt2 & 0x0F),
138 if(pMgmt->byDTIMCount > 0) { 131 (BYTE) (pINTData->byPkt2>>4),
139 pMgmt->byDTIMCount --; 132 pINTData->byTSR2);
140 pMgmt->sNodeDBTable[0].bRxPSPoll = FALSE; 133 BSSvUpdateNodeTxCounter(pDevice,
141 } else if(pMgmt->byDTIMCount == 0) { 134 &(pDevice->scStatistic),
142 // check if mutltcast tx bufferring 135 pINTData->byTSR2,
143 pMgmt->byDTIMCount = pMgmt->byDTIMPeriod - 1; 136 pINTData->byPkt2);
144 pMgmt->sNodeDBTable[0].bRxPSPoll = TRUE; 137 /*DBG_PRN_GRP01(("TSR2 %02x\n", pINTData->byTSR2));*/
145 if (pMgmt->sNodeDBTable[0].bPSEnable) { 138 }
146 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RX_PSPOLL, NULL); 139 if (pINTData->byTSR3 & TSR_VALID) {
147 } 140 STAvUpdateTDStatCounter(&(pDevice->scStatistic),
148 } 141 (BYTE) (pINTData->byPkt3 & 0x0F),
149 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_BECON_SEND, NULL); 142 (BYTE) (pINTData->byPkt3>>4),
150 } // if (pDevice->eOPMode == OP_MODE_AP) 143 pINTData->byTSR3);
151 144 BSSvUpdateNodeTxCounter(pDevice,
152 pDevice->bBeaconSent = TRUE; 145 &(pDevice->scStatistic),
153 } else { 146 pINTData->byTSR3,
154 pDevice->bBeaconSent = FALSE; 147 pINTData->byPkt3);
155 } 148 /*DBG_PRN_GRP01(("TSR3 %02x\n", pINTData->byTSR3));*/
156 if (pINTData->byISR0 & ISR_TBTT) { 149 }
157 if ( pDevice->bEnablePSMode ) { 150 if (pINTData->byISR0 != 0) {
158 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_TBTT_WAKEUP, NULL); 151 if (pINTData->byISR0 & ISR_BNTX) {
159 } 152 if (pDevice->eOPMode == OP_MODE_AP) {
160 if ( pDevice->bChannelSwitch ) { 153 if (pMgmt->byDTIMCount > 0) {
161 pDevice->byChannelSwitchCount--; 154 pMgmt->byDTIMCount--;
162 if ( pDevice->byChannelSwitchCount == 0 ) { 155 pMgmt->sNodeDBTable[0].bRxPSPoll =
163 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_11H_CHSW, NULL); 156 FALSE;
164 } 157 } else if (pMgmt->byDTIMCount == 0) {
165 } 158 /* check if mutltcast tx bufferring */
166 } 159 pMgmt->byDTIMCount =
167 LODWORD(pDevice->qwCurrTSF) = pINTData->dwLoTSF; 160 pMgmt->byDTIMPeriod-1;
168 HIDWORD(pDevice->qwCurrTSF) = pINTData->dwHiTSF; 161 pMgmt->sNodeDBTable[0].bRxPSPoll = TRUE;
169 //DBG_PRN_GRP01(("ISR0 = %02x ,LoTsf = %08x,HiTsf = %08x\n", pINTData->byISR0, pINTData->dwLoTSF,pINTData->dwHiTSF)); 162 if (pMgmt->sNodeDBTable[0].bPSEnable)
170 163 bScheduleCommand((void *) pDevice,
171 STAvUpdate802_11Counter(&pDevice->s802_11Counter, &pDevice->scStatistic, pINTData->byRTSSuccess, 164 WLAN_CMD_RX_PSPOLL,
172 pINTData->byRTSFail, pINTData->byACKFail, pINTData->byFCSErr ); 165 NULL);
173 STAvUpdateIsrStatCounter(&pDevice->scStatistic, pINTData->byISR0, pINTData->byISR1); 166 }
174 167 bScheduleCommand((void *) pDevice,
175 } 168 WLAN_CMD_BECON_SEND,
176 169 NULL);
177 if ( pINTData->byISR1 != 0 ) { 170 } /* if (pDevice->eOPMode == OP_MODE_AP) */
178 if (pINTData->byISR1 & ISR_GPIO3) { 171 pDevice->bBeaconSent = TRUE;
179 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_RADIO, NULL); 172 } else {
180 } 173 pDevice->bBeaconSent = FALSE;
181 } 174 }
182 pDevice->intBuf.uDataLen = 0; 175 if (pINTData->byISR0 & ISR_TBTT) {
183 pDevice->intBuf.bInUse = FALSE; 176 if (pDevice->bEnablePSMode)
184 177 bScheduleCommand((void *) pDevice,
185 pStats->tx_packets = pDevice->scStatistic.ullTsrOK; 178 WLAN_CMD_TBTT_WAKEUP,
186 pStats->tx_bytes = pDevice->scStatistic.ullTxDirectedBytes + 179 NULL);
187 pDevice->scStatistic.ullTxMulticastBytes + 180 if (pDevice->bChannelSwitch) {
188 pDevice->scStatistic.ullTxBroadcastBytes; 181 pDevice->byChannelSwitchCount--;
189 pStats->tx_errors = pDevice->scStatistic.dwTsrErr; 182 if (pDevice->byChannelSwitchCount == 0)
190 pStats->tx_dropped = pDevice->scStatistic.dwTsrErr; 183 bScheduleCommand((void *) pDevice,
191 184 WLAN_CMD_11H_CHSW,
192 return status; 185 NULL);
186 }
187 }
188 LODWORD(pDevice->qwCurrTSF) = pINTData->dwLoTSF;
189 HIDWORD(pDevice->qwCurrTSF) = pINTData->dwHiTSF;
190 /*DBG_PRN_GRP01(("ISR0 = %02x ,
191 LoTsf = %08x,
192 HiTsf = %08x\n",
193 pINTData->byISR0,
194 pINTData->dwLoTSF,
195 pINTData->dwHiTSF)); */
196
197 STAvUpdate802_11Counter(&pDevice->s802_11Counter,
198 &pDevice->scStatistic,
199 pINTData->byRTSSuccess,
200 pINTData->byRTSFail,
201 pINTData->byACKFail,
202 pINTData->byFCSErr);
203 STAvUpdateIsrStatCounter(&pDevice->scStatistic,
204 pINTData->byISR0,
205 pINTData->byISR1);
206 }
207
208 if (pINTData->byISR1 != 0)
209 if (pINTData->byISR1 & ISR_GPIO3)
210 bScheduleCommand((void *) pDevice,
211 WLAN_CMD_RADIO,
212 NULL);
213 pDevice->intBuf.uDataLen = 0;
214 pDevice->intBuf.bInUse = FALSE;
215
216 pStats->tx_packets = pDevice->scStatistic.ullTsrOK;
217 pStats->tx_bytes = pDevice->scStatistic.ullTxDirectedBytes +
218 pDevice->scStatistic.ullTxMulticastBytes +
219 pDevice->scStatistic.ullTxBroadcastBytes;
220 pStats->tx_errors = pDevice->scStatistic.dwTsrErr;
221 pStats->tx_dropped = pDevice->scStatistic.dwTsrErr;
222
223 return status;
193} 224}
diff --git a/drivers/staging/vt6656/int.h b/drivers/staging/vt6656/int.h
index 15e815a35967..cdf355130de7 100644
--- a/drivers/staging/vt6656/int.h
+++ b/drivers/staging/vt6656/int.h
@@ -67,17 +67,11 @@ SINTData, *PSINTData;
67 67
68/*--------------------- Export Functions --------------------------*/ 68/*--------------------- Export Functions --------------------------*/
69 69
70VOID 70void INTvWorkItem(void *Context);
71INTvWorkItem(
72 PVOID Context
73 );
74 71
75NTSTATUS 72NTSTATUS
76INTnsProcessData( 73INTnsProcessData(
77 IN PSDevice pDevice 74 PSDevice pDevice
78 ); 75 );
79 76
80#endif // __INT_H__ 77#endif /* __INT_H__ */
81
82
83
diff --git a/drivers/staging/vt6656/iocmd.h b/drivers/staging/vt6656/iocmd.h
index 49bfe15f1335..fbba1d53e49d 100644
--- a/drivers/staging/vt6656/iocmd.h
+++ b/drivers/staging/vt6656/iocmd.h
@@ -37,12 +37,6 @@
37#define DEF 37#define DEF
38#endif 38#endif
39 39
40//typedef int BOOL;
41//typedef uint32_t u32;
42//typedef uint16_t u16;
43//typedef uint8_t u8;
44
45
46// ioctl Command code 40// ioctl Command code
47#define MAGIC_CODE 0x3142 41#define MAGIC_CODE 0x3142
48#define IOCTL_CMD_TEST (SIOCDEVPRIVATE + 0) 42#define IOCTL_CMD_TEST (SIOCDEVPRIVATE + 0)
@@ -50,7 +44,6 @@
50#define IOCTL_CMD_HOSTAPD (SIOCDEVPRIVATE + 2) 44#define IOCTL_CMD_HOSTAPD (SIOCDEVPRIVATE + 2)
51#define IOCTL_CMD_WPA (SIOCDEVPRIVATE + 3) 45#define IOCTL_CMD_WPA (SIOCDEVPRIVATE + 3)
52 46
53
54typedef enum tagWMAC_CMD { 47typedef enum tagWMAC_CMD {
55 48
56 WLAN_CMD_BSS_SCAN, 49 WLAN_CMD_BSS_SCAN,
@@ -90,7 +83,6 @@ typedef enum tagWZONETYPE {
90#define ADHOC_STARTED 1 83#define ADHOC_STARTED 1
91#define ADHOC_JOINTED 2 84#define ADHOC_JOINTED 2
92 85
93
94#define PHY80211a 0 86#define PHY80211a 0
95#define PHY80211b 1 87#define PHY80211b 1
96#define PHY80211g 2 88#define PHY80211g 2
@@ -109,10 +101,10 @@ typedef enum tagWZONETYPE {
109// 101//
110#pragma pack(1) 102#pragma pack(1)
111typedef struct tagSCmdRequest { 103typedef struct tagSCmdRequest {
112 U8 name[16]; 104 u8 name[16];
113 void *data; 105 void *data;
114 U16 wResult; 106 u16 wResult;
115 U16 wCmdCode; 107 u16 wCmdCode;
116} SCmdRequest, *PSCmdRequest; 108} SCmdRequest, *PSCmdRequest;
117 109
118// 110//
@@ -121,21 +113,20 @@ typedef struct tagSCmdRequest {
121 113
122typedef struct tagSCmdScan { 114typedef struct tagSCmdScan {
123 115
124 U8 ssid[SSID_MAXLEN + 2]; 116 u8 ssid[SSID_MAXLEN + 2];
125 117
126} SCmdScan, *PSCmdScan; 118} SCmdScan, *PSCmdScan;
127 119
128
129// 120//
130// BSS Join 121// BSS Join
131// 122//
132 123
133typedef struct tagSCmdBSSJoin { 124typedef struct tagSCmdBSSJoin {
134 125
135 U16 wBSSType; 126 u16 wBSSType;
136 U16 wBBPType; 127 u16 wBBPType;
137 U8 ssid[SSID_MAXLEN + 2]; 128 u8 ssid[SSID_MAXLEN + 2];
138 U32 uChannel; 129 u32 uChannel;
139 BOOL bPSEnable; 130 BOOL bPSEnable;
140 BOOL bShareKeyAuth; 131 BOOL bShareKeyAuth;
141 132
@@ -155,83 +146,80 @@ typedef struct tagSCmdZoneTypeSet {
155#ifdef WPA_SM_Transtatus 146#ifdef WPA_SM_Transtatus
156typedef struct tagSWPAResult { 147typedef struct tagSWPAResult {
157 char ifname[100]; 148 char ifname[100];
158 U8 proto; 149 u8 proto;
159 U8 key_mgmt; 150 u8 key_mgmt;
160 U8 eap_type; 151 u8 eap_type;
161 BOOL authenticated; 152 BOOL authenticated;
162} SWPAResult, *PSWPAResult; 153} SWPAResult, *PSWPAResult;
163#endif 154#endif
164 155
165typedef struct tagSCmdStartAP { 156typedef struct tagSCmdStartAP {
166 157
167 U16 wBSSType; 158 u16 wBSSType;
168 U16 wBBPType; 159 u16 wBBPType;
169 U8 ssid[SSID_MAXLEN + 2]; 160 u8 ssid[SSID_MAXLEN + 2];
170 U32 uChannel; 161 u32 uChannel;
171 U32 uBeaconInt; 162 u32 uBeaconInt;
172 BOOL bShareKeyAuth; 163 BOOL bShareKeyAuth;
173 U8 byBasicRate; 164 u8 byBasicRate;
174 165
175} SCmdStartAP, *PSCmdStartAP; 166} SCmdStartAP, *PSCmdStartAP;
176 167
177
178typedef struct tagSCmdSetWEP { 168typedef struct tagSCmdSetWEP {
179 169
180 BOOL bEnableWep; 170 BOOL bEnableWep;
181 U8 byKeyIndex; 171 u8 byKeyIndex;
182 U8 abyWepKey[WEP_NKEYS][WEP_KEYMAXLEN]; 172 u8 abyWepKey[WEP_NKEYS][WEP_KEYMAXLEN];
183 BOOL bWepKeyAvailable[WEP_NKEYS]; 173 BOOL bWepKeyAvailable[WEP_NKEYS];
184 U32 auWepKeyLength[WEP_NKEYS]; 174 u32 auWepKeyLength[WEP_NKEYS];
185 175
186} SCmdSetWEP, *PSCmdSetWEP; 176} SCmdSetWEP, *PSCmdSetWEP;
187 177
188
189
190typedef struct tagSBSSIDItem { 178typedef struct tagSBSSIDItem {
191 179
192 U32 uChannel; 180 u32 uChannel;
193 U8 abyBSSID[BSSID_LEN]; 181 u8 abyBSSID[BSSID_LEN];
194 U8 abySSID[SSID_MAXLEN + 1]; 182 u8 abySSID[SSID_MAXLEN + 1];
195 U16 wBeaconInterval; 183 u16 wBeaconInterval;
196 U16 wCapInfo; 184 u16 wCapInfo;
197 U8 byNetType; 185 u8 byNetType;
198 BOOL bWEPOn; 186 BOOL bWEPOn;
199 U32 uRSSI; 187 u32 uRSSI;
200 188
201} SBSSIDItem; 189} SBSSIDItem;
202 190
203 191
204typedef struct tagSBSSIDList { 192typedef struct tagSBSSIDList {
205 193
206 U32 uItem; 194 u32 uItem;
207 SBSSIDItem sBSSIDList[0]; 195 SBSSIDItem sBSSIDList[0];
208} SBSSIDList, *PSBSSIDList; 196} SBSSIDList, *PSBSSIDList;
209 197
210 198
211typedef struct tagSNodeItem { 199typedef struct tagSNodeItem {
212 // STA info 200 // STA info
213 U16 wAID; 201 u16 wAID;
214 U8 abyMACAddr[6]; 202 u8 abyMACAddr[6];
215 U16 wTxDataRate; 203 u16 wTxDataRate;
216 U16 wInActiveCount; 204 u16 wInActiveCount;
217 U16 wEnQueueCnt; 205 u16 wEnQueueCnt;
218 U16 wFlags; 206 u16 wFlags;
219 BOOL bPWBitOn; 207 BOOL bPWBitOn;
220 U8 byKeyIndex; 208 u8 byKeyIndex;
221 U16 wWepKeyLength; 209 u16 wWepKeyLength;
222 U8 abyWepKey[WEP_KEYMAXLEN]; 210 u8 abyWepKey[WEP_KEYMAXLEN];
223 // Auto rate fallback vars 211 // Auto rate fallback vars
224 BOOL bIsInFallback; 212 BOOL bIsInFallback;
225 U32 uTxFailures; 213 u32 uTxFailures;
226 U32 uTxAttempts; 214 u32 uTxAttempts;
227 U16 wFailureRatio; 215 u16 wFailureRatio;
228 216
229} SNodeItem; 217} SNodeItem;
230 218
231 219
232typedef struct tagSNodeList { 220typedef struct tagSNodeList {
233 221
234 U32 uItem; 222 u32 uItem;
235 SNodeItem sNodeList[0]; 223 SNodeItem sNodeList[0];
236 224
237} SNodeList, *PSNodeList; 225} SNodeList, *PSNodeList;
@@ -240,12 +228,12 @@ typedef struct tagSNodeList {
240typedef struct tagSCmdLinkStatus { 228typedef struct tagSCmdLinkStatus {
241 229
242 BOOL bLink; 230 BOOL bLink;
243 U16 wBSSType; 231 u16 wBSSType;
244 U8 byState; 232 u8 byState;
245 U8 abyBSSID[BSSID_LEN]; 233 u8 abyBSSID[BSSID_LEN];
246 U8 abySSID[SSID_MAXLEN + 2]; 234 u8 abySSID[SSID_MAXLEN + 2];
247 U32 uChannel; 235 u32 uChannel;
248 U32 uLinkRate; 236 u32 uLinkRate;
249 237
250} SCmdLinkStatus, *PSCmdLinkStatus; 238} SCmdLinkStatus, *PSCmdLinkStatus;
251 239
@@ -253,18 +241,18 @@ typedef struct tagSCmdLinkStatus {
253// 802.11 counter 241// 802.11 counter
254// 242//
255typedef struct tagSDot11MIBCount { 243typedef struct tagSDot11MIBCount {
256 U32 TransmittedFragmentCount; 244 u32 TransmittedFragmentCount;
257 U32 MulticastTransmittedFrameCount; 245 u32 MulticastTransmittedFrameCount;
258 U32 FailedCount; 246 u32 FailedCount;
259 U32 RetryCount; 247 u32 RetryCount;
260 U32 MultipleRetryCount; 248 u32 MultipleRetryCount;
261 U32 RTSSuccessCount; 249 u32 RTSSuccessCount;
262 U32 RTSFailureCount; 250 u32 RTSFailureCount;
263 U32 ACKFailureCount; 251 u32 ACKFailureCount;
264 U32 FrameDuplicateCount; 252 u32 FrameDuplicateCount;
265 U32 ReceivedFragmentCount; 253 u32 ReceivedFragmentCount;
266 U32 MulticastReceivedFrameCount; 254 u32 MulticastReceivedFrameCount;
267 U32 FCSErrorCount; 255 u32 FCSErrorCount;
268} SDot11MIBCount, *PSDot11MIBCount; 256} SDot11MIBCount, *PSDot11MIBCount;
269 257
270 258
@@ -276,119 +264,115 @@ typedef struct tagSStatMIBCount {
276 // 264 //
277 // ISR status count 265 // ISR status count
278 // 266 //
279 U32 dwIsrTx0OK; 267 u32 dwIsrTx0OK;
280 U32 dwIsrTx1OK; 268 u32 dwIsrTx1OK;
281 U32 dwIsrBeaconTxOK; 269 u32 dwIsrBeaconTxOK;
282 U32 dwIsrRxOK; 270 u32 dwIsrRxOK;
283 U32 dwIsrTBTTInt; 271 u32 dwIsrTBTTInt;
284 U32 dwIsrSTIMERInt; 272 u32 dwIsrSTIMERInt;
285 U32 dwIsrUnrecoverableError; 273 u32 dwIsrUnrecoverableError;
286 U32 dwIsrSoftInterrupt; 274 u32 dwIsrSoftInterrupt;
287 U32 dwIsrRxNoBuf; 275 u32 dwIsrRxNoBuf;
288 ///////////////////////////////////// 276 /////////////////////////////////////
289 277
290 U32 dwIsrUnknown; // unknown interrupt count 278 u32 dwIsrUnknown; /* unknown interrupt count */
291 279
292 // RSR status count 280 // RSR status count
293 // 281 //
294 U32 dwRsrFrmAlgnErr; 282 u32 dwRsrFrmAlgnErr;
295 U32 dwRsrErr; 283 u32 dwRsrErr;
296 U32 dwRsrCRCErr; 284 u32 dwRsrCRCErr;
297 U32 dwRsrCRCOk; 285 u32 dwRsrCRCOk;
298 U32 dwRsrBSSIDOk; 286 u32 dwRsrBSSIDOk;
299 U32 dwRsrADDROk; 287 u32 dwRsrADDROk;
300 U32 dwRsrICVOk; 288 u32 dwRsrICVOk;
301 U32 dwNewRsrShortPreamble; 289 u32 dwNewRsrShortPreamble;
302 U32 dwRsrLong; 290 u32 dwRsrLong;
303 U32 dwRsrRunt; 291 u32 dwRsrRunt;
304 292
305 U32 dwRsrRxControl; 293 u32 dwRsrRxControl;
306 U32 dwRsrRxData; 294 u32 dwRsrRxData;
307 U32 dwRsrRxManage; 295 u32 dwRsrRxManage;
308 296
309 U32 dwRsrRxPacket; 297 u32 dwRsrRxPacket;
310 U32 dwRsrRxOctet; 298 u32 dwRsrRxOctet;
311 U32 dwRsrBroadcast; 299 u32 dwRsrBroadcast;
312 U32 dwRsrMulticast; 300 u32 dwRsrMulticast;
313 U32 dwRsrDirected; 301 u32 dwRsrDirected;
314 // 64-bit OID 302 // 64-bit OID
315 U32 ullRsrOK; 303 u32 ullRsrOK;
316 304
317 // for some optional OIDs (64 bits) and DMI support 305 // for some optional OIDs (64 bits) and DMI support
318 U32 ullRxBroadcastBytes; 306 u32 ullRxBroadcastBytes;
319 U32 ullRxMulticastBytes; 307 u32 ullRxMulticastBytes;
320 U32 ullRxDirectedBytes; 308 u32 ullRxDirectedBytes;
321 U32 ullRxBroadcastFrames; 309 u32 ullRxBroadcastFrames;
322 U32 ullRxMulticastFrames; 310 u32 ullRxMulticastFrames;
323 U32 ullRxDirectedFrames; 311 u32 ullRxDirectedFrames;
324 312
325 U32 dwRsrRxFragment; 313 u32 dwRsrRxFragment;
326 U32 dwRsrRxFrmLen64; 314 u32 dwRsrRxFrmLen64;
327 U32 dwRsrRxFrmLen65_127; 315 u32 dwRsrRxFrmLen65_127;
328 U32 dwRsrRxFrmLen128_255; 316 u32 dwRsrRxFrmLen128_255;
329 U32 dwRsrRxFrmLen256_511; 317 u32 dwRsrRxFrmLen256_511;
330 U32 dwRsrRxFrmLen512_1023; 318 u32 dwRsrRxFrmLen512_1023;
331 U32 dwRsrRxFrmLen1024_1518; 319 u32 dwRsrRxFrmLen1024_1518;
332 320
333 // TSR0,1 status count 321 // TSR0,1 status count
334 // 322 //
335 U32 dwTsrTotalRetry[2]; // total collision retry count 323 u32 dwTsrTotalRetry[2]; /* total collision retry count */
336 U32 dwTsrOnceRetry[2]; // this packet only occur one collision 324 u32 dwTsrOnceRetry[2]; /* this packet had one collision */
337 U32 dwTsrMoreThanOnceRetry[2]; // this packet occur more than one collision 325 u32 dwTsrMoreThanOnceRetry[2]; /* this packet had many collisions */
338 U32 dwTsrRetry[2]; // this packet has ever occur collision, 326 u32 dwTsrRetry[2]; /* this packet has ever occur collision,
339 // that is (dwTsrOnceCollision0 + dwTsrMoreThanOnceCollision0) 327 * that is (dwTsrOnceCollision0 plus
340 U32 dwTsrACKData[2]; 328 * dwTsrMoreThanOnceCollision0) */
341 U32 dwTsrErr[2]; 329 u32 dwTsrACKData[2];
342 U32 dwAllTsrOK[2]; 330 u32 dwTsrErr[2];
343 U32 dwTsrRetryTimeout[2]; 331 u32 dwAllTsrOK[2];
344 U32 dwTsrTransmitTimeout[2]; 332 u32 dwTsrRetryTimeout[2];
345 333 u32 dwTsrTransmitTimeout[2];
346 U32 dwTsrTxPacket[2]; 334
347 U32 dwTsrTxOctet[2]; 335 u32 dwTsrTxPacket[2];
348 U32 dwTsrBroadcast[2]; 336 u32 dwTsrTxOctet[2];
349 U32 dwTsrMulticast[2]; 337 u32 dwTsrBroadcast[2];
350 U32 dwTsrDirected[2]; 338 u32 dwTsrMulticast[2];
339 u32 dwTsrDirected[2];
351 340
352 // RD/TD count 341 // RD/TD count
353 U32 dwCntRxFrmLength; 342 u32 dwCntRxFrmLength;
354 U32 dwCntTxBufLength; 343 u32 dwCntTxBufLength;
355 344
356 U8 abyCntRxPattern[16]; 345 u8 abyCntRxPattern[16];
357 U8 abyCntTxPattern[16]; 346 u8 abyCntTxPattern[16];
358 347
359 // Software check.... 348 /* Software check.... */
360 U32 dwCntRxDataErr; // rx buffer data software compare CRC err count 349 u32 dwCntRxDataErr; /* rx buffer data CRC err count */
361 U32 dwCntDecryptErr; // rx buffer data software compare CRC err count 350 u32 dwCntDecryptErr; /* rx buffer data CRC err count */
362 U32 dwCntRxICVErr; // rx buffer data software compare CRC err count 351 u32 dwCntRxICVErr; /* rx buffer data CRC err count */
363 U32 idxRxErrorDesc; // index for rx data error RD 352 u32 idxRxErrorDesc; /* index for rx data error RD */
364 353
365 // 64-bit OID 354 /* 64-bit OID */
366 U32 ullTsrOK[2]; 355 u32 ullTsrOK[2];
367 356
368 // for some optional OIDs (64 bits) and DMI support 357 // for some optional OIDs (64 bits) and DMI support
369 U32 ullTxBroadcastFrames[2]; 358 u32 ullTxBroadcastFrames[2];
370 U32 ullTxMulticastFrames[2]; 359 u32 ullTxMulticastFrames[2];
371 U32 ullTxDirectedFrames[2]; 360 u32 ullTxDirectedFrames[2];
372 U32 ullTxBroadcastBytes[2]; 361 u32 ullTxBroadcastBytes[2];
373 U32 ullTxMulticastBytes[2]; 362 u32 ullTxMulticastBytes[2];
374 U32 ullTxDirectedBytes[2]; 363 u32 ullTxDirectedBytes[2];
375} SStatMIBCount, *PSStatMIBCount; 364} SStatMIBCount, *PSStatMIBCount;
376 365
377
378
379
380typedef struct tagSCmdValue { 366typedef struct tagSCmdValue {
381 367
382 U32 dwValue; 368 u32 dwValue;
383 369
384} SCmdValue, *PSCmdValue; 370} SCmdValue, *PSCmdValue;
385 371
386
387// 372//
388// hostapd & viawget ioctl related 373// hostapd & viawget ioctl related
389// 374//
390 375
391
392// VIAGWET_IOCTL_HOSTAPD ioctl() cmd: 376// VIAGWET_IOCTL_HOSTAPD ioctl() cmd:
393enum { 377enum {
394 VIAWGET_HOSTAPD_FLUSH = 1, 378 VIAWGET_HOSTAPD_FLUSH = 1,
@@ -405,71 +389,62 @@ enum {
405 VIAWGET_HOSTAPD_STA_CLEAR_STATS = 12, 389 VIAWGET_HOSTAPD_STA_CLEAR_STATS = 12,
406}; 390};
407 391
408
409#define VIAWGET_HOSTAPD_GENERIC_ELEMENT_HDR_LEN \ 392#define VIAWGET_HOSTAPD_GENERIC_ELEMENT_HDR_LEN \
410((int) (&((struct viawget_hostapd_param *) 0)->u.generic_elem.data)) 393((int) (&((struct viawget_hostapd_param *) 0)->u.generic_elem.data))
411 394
412// Maximum length for algorithm names (-1 for nul termination) used in ioctl() 395// Maximum length for algorithm names (-1 for nul termination) used in ioctl()
413 396
414
415
416struct viawget_hostapd_param { 397struct viawget_hostapd_param {
417 U32 cmd; 398 u32 cmd;
418 U8 sta_addr[6]; 399 u8 sta_addr[6];
419 union { 400 union {
420 struct { 401 struct {
421 U16 aid; 402 u16 aid;
422 U16 capability; 403 u16 capability;
423 U8 tx_supp_rates; 404 u8 tx_supp_rates;
424 } add_sta; 405 } add_sta;
425 struct { 406 struct {
426 U32 inactive_sec; 407 u32 inactive_sec;
427 } get_info_sta; 408 } get_info_sta;
428 struct { 409 struct {
429 U8 alg; 410 u8 alg;
430 U32 flags; 411 u32 flags;
431 U32 err; 412 u32 err;
432 U8 idx; 413 u8 idx;
433 U8 seq[8]; 414 u8 seq[8];
434 U16 key_len; 415 u16 key_len;
435 U8 key[0]; 416 u8 key[0];
436 } crypt; 417 } crypt;
437 struct { 418 struct {
438 U32 flags_and; 419 u32 flags_and;
439 U32 flags_or; 420 u32 flags_or;
440 } set_flags_sta; 421 } set_flags_sta;
441 struct { 422 struct {
442 U16 rid; 423 u16 rid;
443 U16 len; 424 u16 len;
444 U8 data[0]; 425 u8 data[0];
445 } rid; 426 } rid;
446 struct { 427 struct {
447 U8 len; 428 u8 len;
448 U8 data[0]; 429 u8 data[0];
449 } generic_elem; 430 } generic_elem;
450 struct { 431 struct {
451 U16 cmd; 432 u16 cmd;
452 U16 reason_code; 433 u16 reason_code;
453 } mlme; 434 } mlme;
454 struct { 435 struct {
455 U8 ssid_len; 436 u8 ssid_len;
456 U8 ssid[32]; 437 u8 ssid[32];
457 } scan_req; 438 } scan_req;
458 } u; 439 } u;
459}; 440};
460 441
461
462
463/*--------------------- Export Classes ----------------------------*/ 442/*--------------------- Export Classes ----------------------------*/
464 443
465/*--------------------- Export Variables --------------------------*/ 444/*--------------------- Export Variables --------------------------*/
466 445
467
468/*--------------------- Export Types ------------------------------*/ 446/*--------------------- Export Types ------------------------------*/
469 447
470
471/*--------------------- Export Functions --------------------------*/ 448/*--------------------- Export Functions --------------------------*/
472 449
473 450#endif /* __IOCMD_H__ */
474
475#endif //__IOCMD_H__
diff --git a/drivers/staging/vt6656/ioctl.c b/drivers/staging/vt6656/ioctl.c
index 6f33005a615f..19a84b66b097 100644
--- a/drivers/staging/vt6656/ioctl.c
+++ b/drivers/staging/vt6656/ioctl.c
@@ -72,16 +72,16 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
72 SNodeList sNodeList; 72 SNodeList sNodeList;
73 PSBSSIDList pList; 73 PSBSSIDList pList;
74 PSNodeList pNodeList; 74 PSNodeList pNodeList;
75 UINT cbListCount; 75 unsigned int cbListCount;
76 PKnownBSS pBSS; 76 PKnownBSS pBSS;
77 PKnownNodeDB pNode; 77 PKnownNodeDB pNode;
78 UINT ii, jj; 78 unsigned int ii, jj;
79 SCmdLinkStatus sLinkStatus; 79 SCmdLinkStatus sLinkStatus;
80 BYTE abySuppRates[] = {WLAN_EID_SUPP_RATES, 4, 0x02, 0x04, 0x0B, 0x16}; 80 BYTE abySuppRates[] = {WLAN_EID_SUPP_RATES, 4, 0x02, 0x04, 0x0B, 0x16};
81 BYTE abyNullAddr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; 81 BYTE abyNullAddr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
82 DWORD dwKeyIndex= 0; 82 DWORD dwKeyIndex= 0;
83 BYTE abyScanSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 83 BYTE abyScanSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
84 LONG ldBm; 84 signed long ldBm;
85 85
86 pReq->wResult = 0; 86 pReq->wResult = 0;
87 87
@@ -100,16 +100,21 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
100 memcpy(abyScanSSID, pItemSSID, pItemSSID->len + WLAN_IEHDR_LEN); 100 memcpy(abyScanSSID, pItemSSID, pItemSSID->len + WLAN_IEHDR_LEN);
101 } 101 }
102 spin_lock_irq(&pDevice->lock); 102 spin_lock_irq(&pDevice->lock);
103 if (memcmp(pMgmt->abyCurrBSSID, &abyNullAddr[0], 6) == 0)
104 BSSvClearBSSList((HANDLE)pDevice, FALSE);
105 else
106 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass);
107 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_BSS_SCAN..begin \n");
108 103
109 if (pItemSSID->len != 0) 104 if (memcmp(pMgmt->abyCurrBSSID, &abyNullAddr[0], 6) == 0)
110 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, abyScanSSID); 105 BSSvClearBSSList((void *) pDevice, FALSE);
111 else 106 else
112 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 107 BSSvClearBSSList((void *) pDevice, pDevice->bLinkPass);
108
109 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "WLAN_CMD_BSS_SCAN..begin\n");
110
111 if (pItemSSID->len != 0)
112 bScheduleCommand((void *) pDevice,
113 WLAN_CMD_BSSID_SCAN,
114 abyScanSSID);
115 else
116 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
117
113 spin_unlock_irq(&pDevice->lock); 118 spin_unlock_irq(&pDevice->lock);
114 break; 119 break;
115 120
@@ -207,8 +212,10 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
207 netif_stop_queue(pDevice->dev); 212 netif_stop_queue(pDevice->dev);
208 spin_lock_irq(&pDevice->lock); 213 spin_lock_irq(&pDevice->lock);
209 pMgmt->eCurrState = WMAC_STATE_IDLE; 214 pMgmt->eCurrState = WMAC_STATE_IDLE;
210 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 215 bScheduleCommand((void *) pDevice,
211 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 216 WLAN_CMD_BSSID_SCAN,
217 pMgmt->abyDesireSSID);
218 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
212 spin_unlock_irq(&pDevice->lock); 219 spin_unlock_irq(&pDevice->lock);
213 break; 220 break;
214 221
@@ -330,7 +337,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
330 pList->sBSSIDList[ii].wBeaconInterval = pBSS->wBeaconInterval; 337 pList->sBSSIDList[ii].wBeaconInterval = pBSS->wBeaconInterval;
331 pList->sBSSIDList[ii].wCapInfo = pBSS->wCapInfo; 338 pList->sBSSIDList[ii].wCapInfo = pBSS->wCapInfo;
332 RFvRSSITodBm(pDevice, (BYTE)(pBSS->uRSSI), &ldBm); 339 RFvRSSITodBm(pDevice, (BYTE)(pBSS->uRSSI), &ldBm);
333 pList->sBSSIDList[ii].uRSSI = (UINT)ldBm; 340 pList->sBSSIDList[ii].uRSSI = (unsigned int) ldBm;
334// pList->sBSSIDList[ii].uRSSI = pBSS->uRSSI; 341// pList->sBSSIDList[ii].uRSSI = pBSS->uRSSI;
335 memcpy(pList->sBSSIDList[ii].abyBSSID, pBSS->abyBSSID, WLAN_BSSID_LEN); 342 memcpy(pList->sBSSIDList[ii].abyBSSID, pBSS->abyBSSID, WLAN_BSSID_LEN);
336 pItemSSID = (PWLAN_IE_SSID)pBSS->abySSID; 343 pItemSSID = (PWLAN_IE_SSID)pBSS->abySSID;
@@ -412,7 +419,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
412 break; 419 break;
413 }; 420 };
414 if (sValue.dwValue == 1) { 421 if (sValue.dwValue == 1) {
415 if (hostap_set_hostapd(pDevice, 1, 1) == 0){ 422 if (vt6656_hostap_set_hostapd(pDevice, 1, 1) == 0){
416 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enable HOSTAP\n"); 423 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enable HOSTAP\n");
417 } 424 }
418 else { 425 else {
@@ -421,7 +428,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
421 } 428 }
422 } 429 }
423 else { 430 else {
424 hostap_set_hostapd(pDevice, 0, 1); 431 vt6656_hostap_set_hostapd(pDevice, 0, 1);
425 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disable HOSTAP\n"); 432 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Disable HOSTAP\n");
426 } 433 }
427 434
@@ -480,7 +487,9 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
480 }; 487 };
481 if (sValue.dwValue == 1) { 488 if (sValue.dwValue == 1) {
482 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "up wpadev\n"); 489 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "up wpadev\n");
483 memcpy(pDevice->wpadev->dev_addr, pDevice->dev->dev_addr, U_ETHER_ADDR_LEN); 490 memcpy(pDevice->wpadev->dev_addr,
491 pDevice->dev->dev_addr,
492 ETH_ALEN);
484 pDevice->bWPADEVUp = TRUE; 493 pDevice->bWPADEVUp = TRUE;
485 } 494 }
486 else { 495 else {
@@ -574,7 +583,7 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq) {
574 583
575 netif_stop_queue(pDevice->dev); 584 netif_stop_queue(pDevice->dev);
576 spin_lock_irq(&pDevice->lock); 585 spin_lock_irq(&pDevice->lock);
577 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RUN_AP, NULL); 586 bScheduleCommand((void *) pDevice, WLAN_CMD_RUN_AP, NULL);
578 spin_unlock_irq(&pDevice->lock); 587 spin_unlock_irq(&pDevice->lock);
579 break; 588 break;
580 589
diff --git a/drivers/staging/vt6656/ioctl.h b/drivers/staging/vt6656/ioctl.h
index 07d228399c3c..caa4ac963d93 100644
--- a/drivers/staging/vt6656/ioctl.h
+++ b/drivers/staging/vt6656/ioctl.h
@@ -43,15 +43,12 @@
43int private_ioctl(PSDevice pDevice, struct ifreq *rq); 43int private_ioctl(PSDevice pDevice, struct ifreq *rq);
44 44
45/* 45/*
46VOID vConfigWEPKey ( 46void vConfigWEPKey (
47 IN PSDevice pDevice, 47 PSDevice pDevice,
48 IN DWORD dwKeyIndex, 48 DWORD dwKeyIndex,
49 IN PBYTE pbyKey, 49 PBYTE pbyKey,
50 IN ULONG uKeyLength 50 unsigned long uKeyLength
51 ); 51 );
52*/ 52*/
53 53
54#endif // __IOCTL_H__ 54#endif /* __IOCTL_H__ */
55
56
57
diff --git a/drivers/staging/vt6656/iowpa.h b/drivers/staging/vt6656/iowpa.h
index 5750b5b548e8..da03edcbacb0 100644
--- a/drivers/staging/vt6656/iowpa.h
+++ b/drivers/staging/vt6656/iowpa.h
@@ -153,6 +153,4 @@ struct viawget_scan_result {
153 153
154/*--------------------- Export Functions --------------------------*/ 154/*--------------------- Export Functions --------------------------*/
155 155
156 156#endif /* __IOWPA_H__ */
157
158#endif //__IOWPA_H__
diff --git a/drivers/staging/vt6656/iwctl.c b/drivers/staging/vt6656/iwctl.c
index b7c6a22fe321..fa40522d4a9a 100644
--- a/drivers/staging/vt6656/iwctl.c
+++ b/drivers/staging/vt6656/iwctl.c
@@ -209,9 +209,9 @@ if(pDevice->byReAssocCount > 0) { //reject scan when re-associating!
209 209
210 spin_lock_irq(&pDevice->lock); 210 spin_lock_irq(&pDevice->lock);
211 211
212 #ifdef update_BssList 212#ifdef update_BssList
213 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 213 BSSvClearBSSList((void *) pDevice, pDevice->bLinkPass);
214 #endif 214#endif
215 215
216//mike add: active scan OR passive scan OR desire_ssid scan 216//mike add: active scan OR passive scan OR desire_ssid scan
217 if(wrq->length == sizeof(struct iw_scan_req)) { 217 if(wrq->length == sizeof(struct iw_scan_req)) {
@@ -229,7 +229,7 @@ if(pDevice->byReAssocCount > 0) { //reject scan when re-associating!
229 pMgmt->eScanType = WMAC_SCAN_PASSIVE; 229 pMgmt->eScanType = WMAC_SCAN_PASSIVE;
230 PRINT_K("SIOCSIWSCAN:[desired_ssid=%s,len=%d]\n",((PWLAN_IE_SSID)abyScanSSID)->abySSID, 230 PRINT_K("SIOCSIWSCAN:[desired_ssid=%s,len=%d]\n",((PWLAN_IE_SSID)abyScanSSID)->abySSID,
231 ((PWLAN_IE_SSID)abyScanSSID)->len); 231 ((PWLAN_IE_SSID)abyScanSSID)->len);
232 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, abyScanSSID); 232 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, abyScanSSID);
233 spin_unlock_irq(&pDevice->lock); 233 spin_unlock_irq(&pDevice->lock);
234 234
235 return 0; 235 return 0;
@@ -244,7 +244,7 @@ if(pDevice->byReAssocCount > 0) { //reject scan when re-associating!
244 244
245 pMgmt->eScanType = WMAC_SCAN_PASSIVE; 245 pMgmt->eScanType = WMAC_SCAN_PASSIVE;
246 //printk("SIOCSIWSCAN:WLAN_CMD_BSSID_SCAN\n"); 246 //printk("SIOCSIWSCAN:WLAN_CMD_BSSID_SCAN\n");
247 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 247 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
248 spin_unlock_irq(&pDevice->lock); 248 spin_unlock_irq(&pDevice->lock);
249 249
250 return 0; 250 return 0;
@@ -758,7 +758,6 @@ int iwctl_siwap(struct net_device *dev,
758 if (wrq->sa_family != ARPHRD_ETHER) 758 if (wrq->sa_family != ARPHRD_ETHER)
759 rc = -EINVAL; 759 rc = -EINVAL;
760 else { 760 else {
761 memset(pMgmt->abyDesireBSSID, 0xFF, 6);
762 memcpy(pMgmt->abyDesireBSSID, wrq->sa_data, 6); 761 memcpy(pMgmt->abyDesireBSSID, wrq->sa_data, 6);
763 762
764 //mike :add 763 //mike :add
@@ -770,7 +769,7 @@ int iwctl_siwap(struct net_device *dev,
770 //mike add: if desired AP is hidden ssid(there are two same BSSID in list), 769 //mike add: if desired AP is hidden ssid(there are two same BSSID in list),
771 // then ignore,because you don't known which one to be connect with?? 770 // then ignore,because you don't known which one to be connect with??
772 { 771 {
773 UINT ii , uSameBssidNum=0; 772 unsigned int ii, uSameBssidNum = 0;
774 for (ii = 0; ii < MAX_BSS_NUM; ii++) { 773 for (ii = 0; ii < MAX_BSS_NUM; ii++) {
775 if (pMgmt->sBSSList[ii].bActive && 774 if (pMgmt->sBSSList[ii].bActive &&
776 IS_ETH_ADDRESS_EQUAL(pMgmt->sBSSList[ii].abyBSSID,pMgmt->abyDesireBSSID)) { 775 IS_ETH_ADDRESS_EQUAL(pMgmt->sBSSList[ii].abyBSSID,pMgmt->abyDesireBSSID)) {
@@ -934,9 +933,8 @@ int iwctl_siwessid(struct net_device *dev,
934 { 933 {
935 PKnownBSS pCurr = NULL; 934 PKnownBSS pCurr = NULL;
936 BYTE abyTmpDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 935 BYTE abyTmpDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
937 UINT ii , uSameBssidNum=0; 936 unsigned int ii, uSameBssidNum = 0;
938 937
939 memset(abyTmpDesireSSID,0,sizeof(abyTmpDesireSSID));
940 memcpy(abyTmpDesireSSID,pMgmt->abyDesireSSID,sizeof(abyTmpDesireSSID)); 938 memcpy(abyTmpDesireSSID,pMgmt->abyDesireSSID,sizeof(abyTmpDesireSSID));
941 pCurr = BSSpSearchBSSList(pDevice, 939 pCurr = BSSpSearchBSSList(pDevice,
942 NULL, 940 NULL,
@@ -946,10 +944,14 @@ int iwctl_siwessid(struct net_device *dev,
946 944
947 if (pCurr == NULL){ 945 if (pCurr == NULL){
948 PRINT_K("SIOCSIWESSID:hidden ssid site survey before associate.......\n"); 946 PRINT_K("SIOCSIWESSID:hidden ssid site survey before associate.......\n");
949 vResetCommandTimer((HANDLE) pDevice); 947 vResetCommandTimer((void *) pDevice);
950 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 948 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
951 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 949 bScheduleCommand((void *) pDevice,
952 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID); 950 WLAN_CMD_BSSID_SCAN,
951 pMgmt->abyDesireSSID);
952 bScheduleCommand((void *) pDevice,
953 WLAN_CMD_SSID,
954 pMgmt->abyDesireSSID);
953 } 955 }
954 else { //mike:to find out if that desired SSID is a hidden-ssid AP , 956 else { //mike:to find out if that desired SSID is a hidden-ssid AP ,
955 // by means of judging if there are two same BSSID exist in list ? 957 // by means of judging if there are two same BSSID exist in list ?
@@ -961,10 +963,14 @@ int iwctl_siwessid(struct net_device *dev,
961 } 963 }
962 if(uSameBssidNum >= 2) { //hit: desired AP is in hidden ssid mode!!! 964 if(uSameBssidNum >= 2) { //hit: desired AP is in hidden ssid mode!!!
963 PRINT_K("SIOCSIWESSID:hidden ssid directly associate.......\n"); 965 PRINT_K("SIOCSIWESSID:hidden ssid directly associate.......\n");
964 vResetCommandTimer((HANDLE) pDevice); 966 vResetCommandTimer((void *) pDevice);
965 pMgmt->eScanType = WMAC_SCAN_PASSIVE; //this scan type,you'll submit scan result! 967 pMgmt->eScanType = WMAC_SCAN_PASSIVE; //this scan type,you'll submit scan result!
966 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 968 bScheduleCommand((void *) pDevice,
967 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, pMgmt->abyDesireSSID); 969 WLAN_CMD_BSSID_SCAN,
970 pMgmt->abyDesireSSID);
971 bScheduleCommand((void *) pDevice,
972 WLAN_CMD_SSID,
973 pMgmt->abyDesireSSID);
968 } 974 }
969 } 975 }
970 } 976 }
@@ -1434,7 +1440,7 @@ int iwctl_giwencode(struct net_device *dev,
1434 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1440 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1435 int rc = 0; 1441 int rc = 0;
1436 char abyKey[WLAN_WEP232_KEYLEN]; 1442 char abyKey[WLAN_WEP232_KEYLEN];
1437 UINT index = (UINT)(wrq->flags & IW_ENCODE_INDEX); 1443 unsigned int index = (unsigned int)(wrq->flags & IW_ENCODE_INDEX);
1438 PSKeyItem pKey = NULL; 1444 PSKeyItem pKey = NULL;
1439 1445
1440 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWENCODE\n"); 1446 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWENCODE\n");
@@ -1480,7 +1486,7 @@ int iwctl_giwencode(struct net_device *dev,
1480 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1486 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1481 char abyKey[WLAN_WEP232_KEYLEN]; 1487 char abyKey[WLAN_WEP232_KEYLEN];
1482 1488
1483 UINT index = (UINT)(wrq->flags & IW_ENCODE_INDEX); 1489 unsigned int index = (unsigned int)(wrq->flags & IW_ENCODE_INDEX);
1484 PSKeyItem pKey = NULL; 1490 PSKeyItem pKey = NULL;
1485 1491
1486 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWENCODE\n"); 1492 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " SIOCGIWENCODE\n");
@@ -1556,11 +1562,11 @@ int iwctl_siwpower(struct net_device *dev,
1556 } 1562 }
1557 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) { 1563 if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
1558 pDevice->ePSMode = WMAC_POWER_FAST; 1564 pDevice->ePSMode = WMAC_POWER_FAST;
1559 PSvEnablePowerSaving((HANDLE)pDevice, pMgmt->wListenInterval); 1565 PSvEnablePowerSaving((void *) pDevice, pMgmt->wListenInterval);
1560 1566
1561 } else if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_PERIOD) { 1567 } else if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_PERIOD) {
1562 pDevice->ePSMode = WMAC_POWER_FAST; 1568 pDevice->ePSMode = WMAC_POWER_FAST;
1563 PSvEnablePowerSaving((HANDLE)pDevice, pMgmt->wListenInterval); 1569 PSvEnablePowerSaving((void *) pDevice, pMgmt->wListenInterval);
1564 } 1570 }
1565 switch (wrq->flags & IW_POWER_MODE) { 1571 switch (wrq->flags & IW_POWER_MODE) {
1566 case IW_POWER_UNICAST_R: 1572 case IW_POWER_UNICAST_R:
@@ -2009,12 +2015,16 @@ int iwctl_siwmlme(struct net_device *dev,
2009 case IW_MLME_DEAUTH: 2015 case IW_MLME_DEAUTH:
2010 //this command seems to be not complete,please test it --einsnliu 2016 //this command seems to be not complete,please test it --einsnliu
2011 //printk("iwctl_siwmlme--->send DEAUTH\n"); 2017 //printk("iwctl_siwmlme--->send DEAUTH\n");
2012 //bScheduleCommand((HANDLE) pDevice, WLAN_CMD_DEAUTH, (PBYTE)&reason); 2018 /* bScheduleCommand((void *) pDevice,
2019 WLAN_CMD_DEAUTH,
2020 (PBYTE)&reason); */
2013 //break; 2021 //break;
2014 case IW_MLME_DISASSOC: 2022 case IW_MLME_DISASSOC:
2015 if(pDevice->bLinkPass == TRUE){ 2023 if(pDevice->bLinkPass == TRUE){
2016 PRINT_K("iwctl_siwmlme--->send DISASSOCIATE\n"); 2024 PRINT_K("iwctl_siwmlme--->send DISASSOCIATE\n");
2017 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_DISASSOCIATE, NULL); 2025 bScheduleCommand((void *) pDevice,
2026 WLAN_CMD_DISASSOCIATE,
2027 NULL);
2018 } 2028 }
2019 break; 2029 break;
2020 default: 2030 default:
diff --git a/drivers/staging/vt6656/iwctl.h b/drivers/staging/vt6656/iwctl.h
index 3096de0ba1bd..df9a4cf3baac 100644
--- a/drivers/staging/vt6656/iwctl.h
+++ b/drivers/staging/vt6656/iwctl.h
@@ -223,7 +223,4 @@ int iwctl_siwmlme(struct net_device *dev,
223extern const struct iw_handler_def iwctl_handler_def; 223extern const struct iw_handler_def iwctl_handler_def;
224extern const struct iw_priv_args iwctl_private_args; 224extern const struct iw_priv_args iwctl_private_args;
225 225
226#endif // __IWCTL_H__ 226#endif /* __IWCTL_H__ */
227
228
229
diff --git a/drivers/staging/vt6656/key.c b/drivers/staging/vt6656/key.c
index 13fc69a1a084..b0890c181e7d 100644
--- a/drivers/staging/vt6656/key.c
+++ b/drivers/staging/vt6656/key.c
@@ -60,8 +60,8 @@ static int msglevel =MSG_LEVEL_INFO;
60/*--------------------- Static Variables --------------------------*/ 60/*--------------------- Static Variables --------------------------*/
61 61
62/*--------------------- Static Functions --------------------------*/ 62/*--------------------- Static Functions --------------------------*/
63static VOID 63static void s_vCheckKeyTableValid(void *pDeviceHandler,
64s_vCheckKeyTableValid (PVOID pDeviceHandler, PSKeyManagement pTable) 64 PSKeyManagement pTable)
65{ 65{
66 PSDevice pDevice = (PSDevice) pDeviceHandler; 66 PSDevice pDevice = (PSDevice) pDeviceHandler;
67 int i; 67 int i;
@@ -112,7 +112,7 @@ s_vCheckKeyTableValid (PVOID pDeviceHandler, PSKeyManagement pTable)
112 * Return Value: none 112 * Return Value: none
113 * 113 *
114 */ 114 */
115VOID KeyvInitTable(PVOID pDeviceHandler, PSKeyManagement pTable) 115void KeyvInitTable(void *pDeviceHandler, PSKeyManagement pTable)
116{ 116{
117 PSDevice pDevice = (PSDevice) pDeviceHandler; 117 PSDevice pDevice = (PSDevice) pDeviceHandler;
118 int i; 118 int i;
@@ -123,10 +123,12 @@ VOID KeyvInitTable(PVOID pDeviceHandler, PSKeyManagement pTable)
123 for (i=0;i<MAX_KEY_TABLE;i++) { 123 for (i=0;i<MAX_KEY_TABLE;i++) {
124 pTable->KeyTable[i].bInUse = FALSE; 124 pTable->KeyTable[i].bInUse = FALSE;
125 pTable->KeyTable[i].PairwiseKey.bKeyValid = FALSE; 125 pTable->KeyTable[i].PairwiseKey.bKeyValid = FALSE;
126 pTable->KeyTable[i].PairwiseKey.pvKeyTable = (PVOID)&pTable->KeyTable[i]; 126 pTable->KeyTable[i].PairwiseKey.pvKeyTable =
127 (void *)&pTable->KeyTable[i];
127 for (jj=0; jj < MAX_GROUP_KEY; jj++) { 128 for (jj=0; jj < MAX_GROUP_KEY; jj++) {
128 pTable->KeyTable[i].GroupKey[jj].bKeyValid = FALSE; 129 pTable->KeyTable[i].GroupKey[jj].bKeyValid = FALSE;
129 pTable->KeyTable[i].GroupKey[jj].pvKeyTable = (PVOID) &(pTable->KeyTable[i]); 130 pTable->KeyTable[i].GroupKey[jj].pvKeyTable =
131 (void *) &(pTable->KeyTable[i]);
130 } 132 }
131 pTable->KeyTable[i].wKeyCtl = 0; 133 pTable->KeyTable[i].wKeyCtl = 0;
132 pTable->KeyTable[i].dwGTKeyIndex = 0; 134 pTable->KeyTable[i].dwGTKeyIndex = 0;
@@ -162,12 +164,8 @@ VOID KeyvInitTable(PVOID pDeviceHandler, PSKeyManagement pTable)
162 * Return Value: TRUE if found otherwise FALSE 164 * Return Value: TRUE if found otherwise FALSE
163 * 165 *
164 */ 166 */
165BOOL KeybGetKey ( 167BOOL KeybGetKey(PSKeyManagement pTable, PBYTE pbyBSSID, DWORD dwKeyIndex,
166 IN PSKeyManagement pTable, 168 PSKeyItem *pKey)
167 IN PBYTE pbyBSSID,
168 IN DWORD dwKeyIndex,
169 OUT PSKeyItem *pKey
170 )
171{ 169{
172 int i; 170 int i;
173 171
@@ -220,12 +218,12 @@ BOOL KeybGetKey (
220 * Return Value: TRUE if success otherwise FALSE 218 * Return Value: TRUE if success otherwise FALSE
221 * 219 *
222 */ 220 */
223BOOL KeybSetKey ( 221BOOL KeybSetKey(
224 PVOID pDeviceHandler, 222 void *pDeviceHandler,
225 PSKeyManagement pTable, 223 PSKeyManagement pTable,
226 PBYTE pbyBSSID, 224 PBYTE pbyBSSID,
227 DWORD dwKeyIndex, 225 DWORD dwKeyIndex,
228 ULONG uKeyLength, 226 unsigned long uKeyLength,
229 PQWORD pKeyRSC, 227 PQWORD pKeyRSC,
230 PBYTE pbyKey, 228 PBYTE pbyKey,
231 BYTE byKeyDecMode 229 BYTE byKeyDecMode
@@ -233,9 +231,9 @@ BOOL KeybSetKey (
233{ 231{
234 PSDevice pDevice = (PSDevice) pDeviceHandler; 232 PSDevice pDevice = (PSDevice) pDeviceHandler;
235 int i,j; 233 int i,j;
236 UINT ii; 234 unsigned int ii;
237 PSKeyItem pKey; 235 PSKeyItem pKey;
238 UINT uKeyIdx; 236 unsigned int uKeyIdx;
239 237
240 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetKey: %lX\n", dwKeyIndex); 238 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetKey: %lX\n", dwKeyIndex);
241 239
@@ -312,7 +310,7 @@ BOOL KeybSetKey (
312 } 310 }
313 } 311 }
314 if (j < (MAX_KEY_TABLE-1)) { 312 if (j < (MAX_KEY_TABLE-1)) {
315 memcpy(pTable->KeyTable[j].abyBSSID,pbyBSSID,U_ETHER_ADDR_LEN); 313 memcpy(pTable->KeyTable[j].abyBSSID, pbyBSSID, ETH_ALEN);
316 pTable->KeyTable[j].bInUse = TRUE; 314 pTable->KeyTable[j].bInUse = TRUE;
317 if ((dwKeyIndex & PAIRWISE_KEY) != 0) { 315 if ((dwKeyIndex & PAIRWISE_KEY) != 0) {
318 // Pairwise key 316 // Pairwise key
@@ -393,8 +391,8 @@ BOOL KeybSetKey (
393 * Return Value: TRUE if success otherwise FALSE 391 * Return Value: TRUE if success otherwise FALSE
394 * 392 *
395 */ 393 */
396BOOL KeybRemoveKey ( 394BOOL KeybRemoveKey(
397 PVOID pDeviceHandler, 395 void *pDeviceHandler,
398 PSKeyManagement pTable, 396 PSKeyManagement pTable,
399 PBYTE pbyBSSID, 397 PBYTE pbyBSSID,
400 DWORD dwKeyIndex 398 DWORD dwKeyIndex
@@ -474,8 +472,8 @@ BOOL KeybRemoveKey (
474 * Return Value: TRUE if success otherwise FALSE 472 * Return Value: TRUE if success otherwise FALSE
475 * 473 *
476 */ 474 */
477BOOL KeybRemoveAllKey ( 475BOOL KeybRemoveAllKey(
478 PVOID pDeviceHandler, 476 void *pDeviceHandler,
479 PSKeyManagement pTable, 477 PSKeyManagement pTable,
480 PBYTE pbyBSSID 478 PBYTE pbyBSSID
481 ) 479 )
@@ -510,8 +508,8 @@ BOOL KeybRemoveAllKey (
510 * Return Value: TRUE if success otherwise FALSE 508 * Return Value: TRUE if success otherwise FALSE
511 * 509 *
512 */ 510 */
513VOID KeyvRemoveWEPKey ( 511void KeyvRemoveWEPKey(
514 PVOID pDeviceHandler, 512 void *pDeviceHandler,
515 PSKeyManagement pTable, 513 PSKeyManagement pTable,
516 DWORD dwKeyIndex 514 DWORD dwKeyIndex
517 ) 515 )
@@ -533,8 +531,8 @@ VOID KeyvRemoveWEPKey (
533 return; 531 return;
534} 532}
535 533
536VOID KeyvRemoveAllWEPKey ( 534void KeyvRemoveAllWEPKey(
537 PVOID pDeviceHandler, 535 void *pDeviceHandler,
538 PSKeyManagement pTable 536 PSKeyManagement pTable
539 ) 537 )
540{ 538{
@@ -561,12 +559,8 @@ VOID KeyvRemoveAllWEPKey (
561 * Return Value: TRUE if found otherwise FALSE 559 * Return Value: TRUE if found otherwise FALSE
562 * 560 *
563 */ 561 */
564BOOL KeybGetTransmitKey ( 562BOOL KeybGetTransmitKey(PSKeyManagement pTable, PBYTE pbyBSSID, DWORD dwKeyType,
565 IN PSKeyManagement pTable, 563 PSKeyItem *pKey)
566 IN PBYTE pbyBSSID,
567 IN DWORD dwKeyType,
568 OUT PSKeyItem *pKey
569 )
570{ 564{
571 int i, ii; 565 int i, ii;
572 566
@@ -641,10 +635,7 @@ BOOL KeybGetTransmitKey (
641 * Return Value: TRUE if found otherwise FALSE 635 * Return Value: TRUE if found otherwise FALSE
642 * 636 *
643 */ 637 */
644BOOL KeybCheckPairewiseKey ( 638BOOL KeybCheckPairewiseKey(PSKeyManagement pTable, PSKeyItem *pKey)
645 IN PSKeyManagement pTable,
646 OUT PSKeyItem *pKey
647 )
648{ 639{
649 int i; 640 int i;
650 641
@@ -675,23 +666,23 @@ BOOL KeybCheckPairewiseKey (
675 * Return Value: TRUE if success otherwise FALSE 666 * Return Value: TRUE if success otherwise FALSE
676 * 667 *
677 */ 668 */
678BOOL KeybSetDefaultKey ( 669BOOL KeybSetDefaultKey(
679 PVOID pDeviceHandler, 670 void *pDeviceHandler,
680 PSKeyManagement pTable, 671 PSKeyManagement pTable,
681 DWORD dwKeyIndex, 672 DWORD dwKeyIndex,
682 ULONG uKeyLength, 673 unsigned long uKeyLength,
683 PQWORD pKeyRSC, 674 PQWORD pKeyRSC,
684 PBYTE pbyKey, 675 PBYTE pbyKey,
685 BYTE byKeyDecMode 676 BYTE byKeyDecMode
686 ) 677 )
687{ 678{
688 PSDevice pDevice = (PSDevice) pDeviceHandler; 679 PSDevice pDevice = (PSDevice) pDeviceHandler;
689 UINT ii; 680 unsigned int ii;
690 PSKeyItem pKey; 681 PSKeyItem pKey;
691 UINT uKeyIdx; 682 unsigned int uKeyIdx;
692
693 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetDefaultKey: %1x, %d \n", (int)dwKeyIndex, (int)uKeyLength);
694 683
684 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Enter KeybSetDefaultKey: %1x, %d\n",
685 (int) dwKeyIndex, (int) uKeyLength);
695 686
696 if ((dwKeyIndex & PAIRWISE_KEY) != 0) { // Pairwise key 687 if ((dwKeyIndex & PAIRWISE_KEY) != 0) { // Pairwise key
697 return (FALSE); 688 return (FALSE);
@@ -700,7 +691,7 @@ BOOL KeybSetDefaultKey (
700 } 691 }
701 692
702 pTable->KeyTable[MAX_KEY_TABLE-1].bInUse = TRUE; 693 pTable->KeyTable[MAX_KEY_TABLE-1].bInUse = TRUE;
703 for(ii=0;ii<U_ETHER_ADDR_LEN;ii++) 694 for (ii = 0; ii < ETH_ALEN; ii++)
704 pTable->KeyTable[MAX_KEY_TABLE-1].abyBSSID[ii] = 0xFF; 695 pTable->KeyTable[MAX_KEY_TABLE-1].abyBSSID[ii] = 0xFF;
705 696
706 // Group key 697 // Group key
@@ -783,11 +774,11 @@ BOOL KeybSetDefaultKey (
783 * Return Value: TRUE if success otherwise FALSE 774 * Return Value: TRUE if success otherwise FALSE
784 * 775 *
785 */ 776 */
786BOOL KeybSetAllGroupKey ( 777BOOL KeybSetAllGroupKey(
787 PVOID pDeviceHandler, 778 void *pDeviceHandler,
788 PSKeyManagement pTable, 779 PSKeyManagement pTable,
789 DWORD dwKeyIndex, 780 DWORD dwKeyIndex,
790 ULONG uKeyLength, 781 unsigned long uKeyLength,
791 PQWORD pKeyRSC, 782 PQWORD pKeyRSC,
792 PBYTE pbyKey, 783 PBYTE pbyKey,
793 BYTE byKeyDecMode 784 BYTE byKeyDecMode
@@ -795,9 +786,9 @@ BOOL KeybSetAllGroupKey (
795{ 786{
796 PSDevice pDevice = (PSDevice) pDeviceHandler; 787 PSDevice pDevice = (PSDevice) pDeviceHandler;
797 int i; 788 int i;
798 UINT ii; 789 unsigned int ii;
799 PSKeyItem pKey; 790 PSKeyItem pKey;
800 UINT uKeyIdx; 791 unsigned int uKeyIdx;
801 792
802 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetAllGroupKey: %lX\n", dwKeyIndex); 793 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Enter KeybSetAllGroupKey: %lX\n", dwKeyIndex);
803 794
diff --git a/drivers/staging/vt6656/key.h b/drivers/staging/vt6656/key.h
index b15a64cb3868..f749c7a027d3 100644
--- a/drivers/staging/vt6656/key.h
+++ b/drivers/staging/vt6656/key.h
@@ -58,7 +58,7 @@
58typedef struct tagSKeyItem 58typedef struct tagSKeyItem
59{ 59{
60 BOOL bKeyValid; 60 BOOL bKeyValid;
61 ULONG uKeyLength; 61 unsigned long uKeyLength;
62 BYTE abyKey[MAX_KEY_LEN]; 62 BYTE abyKey[MAX_KEY_LEN];
63 QWORD KeyRSC; 63 QWORD KeyRSC;
64 DWORD dwTSC47_16; 64 DWORD dwTSC47_16;
@@ -66,12 +66,12 @@ typedef struct tagSKeyItem
66 BYTE byCipherSuite; 66 BYTE byCipherSuite;
67 BYTE byReserved0; 67 BYTE byReserved0;
68 DWORD dwKeyIndex; 68 DWORD dwKeyIndex;
69 PVOID pvKeyTable; 69 void *pvKeyTable;
70} SKeyItem, *PSKeyItem; //64 70} SKeyItem, *PSKeyItem; //64
71 71
72typedef struct tagSKeyTable 72typedef struct tagSKeyTable
73{ 73{
74 BYTE abyBSSID[U_ETHER_ADDR_LEN]; //6 74 BYTE abyBSSID[ETH_ALEN]; /* 6 */
75 BYTE byReserved0[2]; //8 75 BYTE byReserved0[2]; //8
76 SKeyItem PairwiseKey; 76 SKeyItem PairwiseKey;
77 SKeyItem GroupKey[MAX_GROUP_KEY]; //64*5 = 320, 320+8=328 77 SKeyItem GroupKey[MAX_GROUP_KEY]; //64*5 = 320, 320+8=328
@@ -97,81 +97,69 @@ typedef struct tagSKeyManagement
97 97
98/*--------------------- Export Functions --------------------------*/ 98/*--------------------- Export Functions --------------------------*/
99 99
100VOID KeyvInitTable(PVOID pDeviceHandler, PSKeyManagement pTable); 100void KeyvInitTable(void *pDeviceHandler, PSKeyManagement pTable);
101 101
102BOOL KeybGetKey( 102BOOL KeybGetKey(PSKeyManagement pTable, PBYTE pbyBSSID, DWORD dwKeyIndex,
103 IN PSKeyManagement pTable, 103 PSKeyItem *pKey);
104 IN PBYTE pbyBSSID,
105 IN DWORD dwKeyIndex,
106 OUT PSKeyItem *pKey
107 );
108 104
109BOOL KeybSetKey( 105BOOL KeybSetKey(
110 PVOID pDeviceHandler, 106 void *pDeviceHandler,
111 PSKeyManagement pTable, 107 PSKeyManagement pTable,
112 PBYTE pbyBSSID, 108 PBYTE pbyBSSID,
113 DWORD dwKeyIndex, 109 DWORD dwKeyIndex,
114 ULONG uKeyLength, 110 unsigned long uKeyLength,
115 PQWORD pKeyRSC, 111 PQWORD pKeyRSC,
116 PBYTE pbyKey, 112 PBYTE pbyKey,
117 BYTE byKeyDecMode 113 BYTE byKeyDecMode
118 ); 114 );
119 115
120BOOL KeybRemoveKey( 116BOOL KeybRemoveKey(
121 PVOID pDeviceHandler, 117 void *pDeviceHandler,
122 PSKeyManagement pTable, 118 PSKeyManagement pTable,
123 PBYTE pbyBSSID, 119 PBYTE pbyBSSID,
124 DWORD dwKeyIndex 120 DWORD dwKeyIndex
125 ); 121 );
126 122
127BOOL KeybRemoveAllKey ( 123BOOL KeybRemoveAllKey(
128 PVOID pDeviceHandler, 124 void *pDeviceHandler,
129 PSKeyManagement pTable, 125 PSKeyManagement pTable,
130 PBYTE pbyBSSID 126 PBYTE pbyBSSID
131 ); 127 );
132 128
133VOID KeyvRemoveWEPKey( 129void KeyvRemoveWEPKey(
134 PVOID pDeviceHandler, 130 void *pDeviceHandler,
135 PSKeyManagement pTable, 131 PSKeyManagement pTable,
136 DWORD dwKeyIndex 132 DWORD dwKeyIndex
137 ); 133 );
138 134
139VOID KeyvRemoveAllWEPKey( 135void KeyvRemoveAllWEPKey(
140 PVOID pDeviceHandler, 136 void *pDeviceHandler,
141 PSKeyManagement pTable 137 PSKeyManagement pTable
142 ); 138 );
143 139
144BOOL KeybGetTransmitKey( 140BOOL KeybGetTransmitKey(PSKeyManagement pTable, PBYTE pbyBSSID, DWORD dwKeyType,
145 IN PSKeyManagement pTable, 141 PSKeyItem *pKey);
146 IN PBYTE pbyBSSID,
147 IN DWORD dwKeyType,
148 OUT PSKeyItem *pKey
149 );
150 142
151BOOL KeybCheckPairewiseKey( 143BOOL KeybCheckPairewiseKey(PSKeyManagement pTable, PSKeyItem *pKey);
152 IN PSKeyManagement pTable,
153 OUT PSKeyItem *pKey
154 );
155 144
156BOOL KeybSetDefaultKey ( 145BOOL KeybSetDefaultKey(
157 PVOID pDeviceHandler, 146 void *pDeviceHandler,
158 PSKeyManagement pTable, 147 PSKeyManagement pTable,
159 DWORD dwKeyIndex, 148 DWORD dwKeyIndex,
160 ULONG uKeyLength, 149 unsigned long uKeyLength,
161 PQWORD pKeyRSC, 150 PQWORD pKeyRSC,
162 PBYTE pbyKey, 151 PBYTE pbyKey,
163 BYTE byKeyDecMode 152 BYTE byKeyDecMode
164 ); 153 );
165 154
166BOOL KeybSetAllGroupKey ( 155BOOL KeybSetAllGroupKey(
167 PVOID pDeviceHandler, 156 void *pDeviceHandler,
168 PSKeyManagement pTable, 157 PSKeyManagement pTable,
169 DWORD dwKeyIndex, 158 DWORD dwKeyIndex,
170 ULONG uKeyLength, 159 unsigned long uKeyLength,
171 PQWORD pKeyRSC, 160 PQWORD pKeyRSC,
172 PBYTE pbyKey, 161 PBYTE pbyKey,
173 BYTE byKeyDecMode 162 BYTE byKeyDecMode
174 ); 163 );
175 164
176#endif // __KEY_H__ 165#endif /* __KEY_H__ */
177
diff --git a/drivers/staging/vt6656/mac.c b/drivers/staging/vt6656/mac.c
index 55a798668fa5..0ab3db025f33 100644
--- a/drivers/staging/vt6656/mac.c
+++ b/drivers/staging/vt6656/mac.c
@@ -70,7 +70,7 @@ static int msglevel =MSG_LEVEL_INFO;
70 */ 70 */
71void MACvSetMultiAddrByHash (PSDevice pDevice, BYTE byHashIdx) 71void MACvSetMultiAddrByHash (PSDevice pDevice, BYTE byHashIdx)
72{ 72{
73 UINT uByteIdx; 73 unsigned int uByteIdx;
74 BYTE byBitMask; 74 BYTE byBitMask;
75 BYTE pbyData[2]; 75 BYTE pbyData[2];
76 76
@@ -110,7 +110,7 @@ void MACvSetMultiAddrByHash (PSDevice pDevice, BYTE byHashIdx)
110 * Return Value: none 110 * Return Value: none
111 * 111 *
112 */ 112 */
113VOID MACvWriteMultiAddr (PSDevice pDevice, UINT uByteIdx, BYTE byData) 113void MACvWriteMultiAddr(PSDevice pDevice, unsigned int uByteIdx, BYTE byData)
114{ 114{
115 BYTE byData1; 115 BYTE byData1;
116 116
@@ -199,7 +199,7 @@ BYTE pbyData[4];
199 * Return Value: none 199 * Return Value: none
200 * 200 *
201 */ 201 */
202void MACvDisableKeyEntry (PSDevice pDevice, UINT uEntryIdx) 202void MACvDisableKeyEntry(PSDevice pDevice, unsigned int uEntryIdx)
203{ 203{
204WORD wOffset; 204WORD wOffset;
205BYTE byData; 205BYTE byData;
@@ -239,7 +239,9 @@ BYTE byData;
239 * Return Value: none 239 * Return Value: none
240 * 240 *
241 */ 241 */
242void MACvSetKeyEntry (PSDevice pDevice, WORD wKeyCtl, UINT uEntryIdx, UINT uKeyIdx, PBYTE pbyAddr, PDWORD pdwKey) 242void MACvSetKeyEntry(PSDevice pDevice, WORD wKeyCtl,
243 unsigned int uEntryIdx, unsigned int uKeyIdx,
244 PBYTE pbyAddr, PDWORD pdwKey)
243{ 245{
244PBYTE pbyKey; 246PBYTE pbyKey;
245WORD wOffset; 247WORD wOffset;
@@ -247,10 +249,6 @@ DWORD dwData1,dwData2;
247int ii; 249int ii;
248BYTE pbyData[24]; 250BYTE pbyData[24];
249 251
250
251
252
253
254 if ( pDevice->byLocalID <= MAC_REVISION_A1 ) { 252 if ( pDevice->byLocalID <= MAC_REVISION_A1 ) {
255 if ( pDevice->sMgmtObj.byCSSPK == KEY_CTL_CCMP ) 253 if ( pDevice->sMgmtObj.byCSSPK == KEY_CTL_CCMP )
256 return; 254 return;
diff --git a/drivers/staging/vt6656/mac.h b/drivers/staging/vt6656/mac.h
index fe99e3df2a51..775c70928ec7 100644
--- a/drivers/staging/vt6656/mac.h
+++ b/drivers/staging/vt6656/mac.h
@@ -421,12 +421,13 @@
421/*--------------------- Export Functions --------------------------*/ 421/*--------------------- Export Functions --------------------------*/
422 422
423void MACvSetMultiAddrByHash (PSDevice pDevice, BYTE byHashIdx); 423void MACvSetMultiAddrByHash (PSDevice pDevice, BYTE byHashIdx);
424VOID MACvWriteMultiAddr (PSDevice pDevice, UINT uByteIdx, BYTE byData); 424void MACvWriteMultiAddr(PSDevice pDevice, unsigned int uByteIdx, BYTE byData);
425BOOL MACbShutdown(PSDevice pDevice);; 425BOOL MACbShutdown(PSDevice pDevice);;
426void MACvSetBBType(PSDevice pDevice,BYTE byType); 426void MACvSetBBType(PSDevice pDevice,BYTE byType);
427void MACvSetMISCFifo (PSDevice pDevice, WORD wOffset, DWORD dwData); 427void MACvSetMISCFifo (PSDevice pDevice, WORD wOffset, DWORD dwData);
428void MACvDisableKeyEntry(PSDevice pDevice, UINT uEntryIdx); 428void MACvDisableKeyEntry(PSDevice pDevice, unsigned int uEntryIdx);
429void MACvSetKeyEntry(PSDevice pDevice, WORD wKeyCtl, UINT uEntryIdx, UINT uKeyIdx, PBYTE pbyAddr, PDWORD pdwKey); 429void MACvSetKeyEntry(PSDevice pDevice, WORD wKeyCtl, unsigned int uEntryIdx,
430 unsigned int uKeyIdx, PBYTE pbyAddr, PDWORD pdwKey);
430 431
431void MACvRegBitsOff(PSDevice pDevice, BYTE byRegOfs, BYTE byBits); 432void MACvRegBitsOff(PSDevice pDevice, BYTE byRegOfs, BYTE byBits);
432void MACvRegBitsOn(PSDevice pDevice, BYTE byRegOfs, BYTE byBits); 433void MACvRegBitsOn(PSDevice pDevice, BYTE byRegOfs, BYTE byBits);
@@ -439,4 +440,4 @@ void MACvEnableBarkerPreambleMd(PSDevice pDevice);
439void MACvDisableBarkerPreambleMd(PSDevice pDevice); 440void MACvDisableBarkerPreambleMd(PSDevice pDevice);
440void MACvWriteBeaconInterval(PSDevice pDevice, WORD wInterval); 441void MACvWriteBeaconInterval(PSDevice pDevice, WORD wInterval);
441 442
442#endif // __MAC_H__ 443#endif /* __MAC_H__ */
diff --git a/drivers/staging/vt6656/main_usb.c b/drivers/staging/vt6656/main_usb.c
index 49270db98fbb..098b0455e325 100644
--- a/drivers/staging/vt6656/main_usb.c
+++ b/drivers/staging/vt6656/main_usb.c
@@ -26,7 +26,7 @@
26 * 26 *
27 * Functions: 27 * Functions:
28 * 28 *
29 * vntwusb_found1 - module initial (insmod) driver entry 29 * vt6656_probe - module initial (insmod) driver entry
30 * device_remove1 - module remove entry 30 * device_remove1 - module remove entry
31 * device_open - allocate dma/descripter resource & initial mac/bbp function 31 * device_open - allocate dma/descripter resource & initial mac/bbp function
32 * device_xmit - asynchrous data tx function 32 * device_xmit - asynchrous data tx function
@@ -222,15 +222,11 @@ DEVICE_PARAM(b80211hEnable, "802.11h mode");
222// Static vars definitions 222// Static vars definitions
223// 223//
224 224
225 225static struct usb_device_id vt6656_table[] __devinitdata = {
226
227static struct usb_device_id vntwusb_table[] = {
228 {USB_DEVICE(VNT_USB_VENDOR_ID, VNT_USB_PRODUCT_ID)}, 226 {USB_DEVICE(VNT_USB_VENDOR_ID, VNT_USB_PRODUCT_ID)},
229 {} 227 {}
230}; 228};
231 229
232
233
234// Frequency list (map channels to frequencies) 230// Frequency list (map channels to frequencies)
235/* 231/*
236static const long frequency_list[] = { 232static const long frequency_list[] = {
@@ -250,15 +246,17 @@ static const long frequency_list[] = {
250static const struct iw_handler_def iwctl_handler_def; 246static const struct iw_handler_def iwctl_handler_def;
251*/ 247*/
252 248
249/*--------------------- Static Functions --------------------------*/
253 250
251static int vt6656_probe(struct usb_interface *intf,
252 const struct usb_device_id *id);
253static void vt6656_disconnect(struct usb_interface *intf);
254 254
255/*--------------------- Static Functions --------------------------*/
256static int vntwusb_found1(struct usb_interface *intf, const struct usb_device_id *id);
257static void vntwusb_disconnect(struct usb_interface *intf);
258#ifdef CONFIG_PM /* Minimal support for suspend and resume */ 255#ifdef CONFIG_PM /* Minimal support for suspend and resume */
259static int vntwusb_suspend(struct usb_interface *intf, pm_message_t message); 256static int vt6656_suspend(struct usb_interface *intf, pm_message_t message);
260static int vntwusb_resume(struct usb_interface *intf); 257static int vt6656_resume(struct usb_interface *intf);
261#endif 258#endif /* CONFIG_PM */
259
262static struct net_device_stats *device_get_stats(struct net_device *dev); 260static struct net_device_stats *device_get_stats(struct net_device *dev);
263static int device_open(struct net_device *dev); 261static int device_open(struct net_device *dev);
264static int device_xmit(struct sk_buff *skb, struct net_device *dev); 262static int device_xmit(struct sk_buff *skb, struct net_device *dev);
@@ -279,8 +277,10 @@ static void device_free_frag_bufs(PSDevice pDevice);
279static BOOL device_alloc_bufs(PSDevice pDevice); 277static BOOL device_alloc_bufs(PSDevice pDevice);
280 278
281static int Read_config_file(PSDevice pDevice); 279static int Read_config_file(PSDevice pDevice);
282static UCHAR *Config_FileOperation(PSDevice pDevice); 280static unsigned char *Config_FileOperation(PSDevice pDevice);
283static int Config_FileGetParameter(UCHAR *string, UCHAR *dest,UCHAR *source); 281static int Config_FileGetParameter(unsigned char *string,
282 unsigned char *dest,
283 unsigned char *source);
284 284
285//2008-0714<Add>by Mike Liu 285//2008-0714<Add>by Mike Liu
286static BOOL device_release_WPADEV(PSDevice pDevice); 286static BOOL device_release_WPADEV(PSDevice pDevice);
@@ -297,14 +297,13 @@ static void usb_device_reset(PSDevice pDevice);
297static void 297static void
298device_set_options(PSDevice pDevice) { 298device_set_options(PSDevice pDevice) {
299 299
300 BYTE abyBroadcastAddr[U_ETHER_ADDR_LEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 300 BYTE abyBroadcastAddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
301 BYTE abySNAP_RFC1042[U_ETHER_ADDR_LEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00}; 301 BYTE abySNAP_RFC1042[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00};
302 BYTE abySNAP_Bridgetunnel[U_ETHER_ADDR_LEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8}; 302 u8 abySNAP_Bridgetunnel[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8};
303
304 303
305 memcpy(pDevice->abyBroadcastAddr, abyBroadcastAddr, U_ETHER_ADDR_LEN); 304 memcpy(pDevice->abyBroadcastAddr, abyBroadcastAddr, ETH_ALEN);
306 memcpy(pDevice->abySNAP_RFC1042, abySNAP_RFC1042, U_ETHER_ADDR_LEN); 305 memcpy(pDevice->abySNAP_RFC1042, abySNAP_RFC1042, ETH_ALEN);
307 memcpy(pDevice->abySNAP_Bridgetunnel, abySNAP_Bridgetunnel, U_ETHER_ADDR_LEN); 306 memcpy(pDevice->abySNAP_Bridgetunnel, abySNAP_Bridgetunnel, ETH_ALEN);
308 307
309 pDevice->cbTD = TX_DESC_DEF0; 308 pDevice->cbTD = TX_DESC_DEF0;
310 pDevice->cbRD = RX_DESC_DEF0; 309 pDevice->cbRD = RX_DESC_DEF0;
@@ -334,20 +333,20 @@ device_set_options(PSDevice pDevice) {
334} 333}
335 334
336 335
337static VOID device_init_diversity_timer(PSDevice pDevice) { 336static void device_init_diversity_timer(PSDevice pDevice)
338 337{
339 init_timer(&pDevice->TimerSQ3Tmax1); 338 init_timer(&pDevice->TimerSQ3Tmax1);
340 pDevice->TimerSQ3Tmax1.data = (ULONG)pDevice; 339 pDevice->TimerSQ3Tmax1.data = (unsigned long)pDevice;
341 pDevice->TimerSQ3Tmax1.function = (TimerFunction)TimerSQ3CallBack; 340 pDevice->TimerSQ3Tmax1.function = (TimerFunction)TimerSQ3CallBack;
342 pDevice->TimerSQ3Tmax1.expires = RUN_AT(HZ); 341 pDevice->TimerSQ3Tmax1.expires = RUN_AT(HZ);
343 342
344 init_timer(&pDevice->TimerSQ3Tmax2); 343 init_timer(&pDevice->TimerSQ3Tmax2);
345 pDevice->TimerSQ3Tmax2.data = (ULONG)pDevice; 344 pDevice->TimerSQ3Tmax2.data = (unsigned long)pDevice;
346 pDevice->TimerSQ3Tmax2.function = (TimerFunction)TimerSQ3CallBack; 345 pDevice->TimerSQ3Tmax2.function = (TimerFunction)TimerSQ3CallBack;
347 pDevice->TimerSQ3Tmax2.expires = RUN_AT(HZ); 346 pDevice->TimerSQ3Tmax2.expires = RUN_AT(HZ);
348 347
349 init_timer(&pDevice->TimerSQ3Tmax3); 348 init_timer(&pDevice->TimerSQ3Tmax3);
350 pDevice->TimerSQ3Tmax3.data = (ULONG)pDevice; 349 pDevice->TimerSQ3Tmax3.data = (unsigned long)pDevice;
351 pDevice->TimerSQ3Tmax3.function = (TimerFunction)TimerSQ3Tmax3CallBack; 350 pDevice->TimerSQ3Tmax3.function = (TimerFunction)TimerSQ3Tmax3CallBack;
352 pDevice->TimerSQ3Tmax3.expires = RUN_AT(HZ); 351 pDevice->TimerSQ3Tmax3.expires = RUN_AT(HZ);
353 352
@@ -361,11 +360,11 @@ static VOID device_init_diversity_timer(PSDevice pDevice) {
361 360
362static BOOL device_init_registers(PSDevice pDevice, DEVICE_INIT_TYPE InitType) 361static BOOL device_init_registers(PSDevice pDevice, DEVICE_INIT_TYPE InitType)
363{ 362{
364 BYTE abyBroadcastAddr[U_ETHER_ADDR_LEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 363 u8 abyBroadcastAddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
365 BYTE abySNAP_RFC1042[U_ETHER_ADDR_LEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00}; 364 u8 abySNAP_RFC1042[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00};
366 BYTE abySNAP_Bridgetunnel[U_ETHER_ADDR_LEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8}; 365 u8 abySNAP_Bridgetunnel[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8};
367 BYTE byAntenna; 366 BYTE byAntenna;
368 UINT ii; 367 unsigned int ii;
369 CMD_CARD_INIT sInitCmd; 368 CMD_CARD_INIT sInitCmd;
370 NTSTATUS ntStatus = STATUS_SUCCESS; 369 NTSTATUS ntStatus = STATUS_SUCCESS;
371 RSP_CARD_INIT sInitRsp; 370 RSP_CARD_INIT sInitRsp;
@@ -377,10 +376,12 @@ static BOOL device_init_registers(PSDevice pDevice, DEVICE_INIT_TYPE InitType)
377 376
378 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "---->INIbInitAdapter. [%d][%d]\n", InitType, pDevice->byPacketType); 377 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "---->INIbInitAdapter. [%d][%d]\n", InitType, pDevice->byPacketType);
379 spin_lock_irq(&pDevice->lock); 378 spin_lock_irq(&pDevice->lock);
380 if (InitType == DEVICE_INIT_COLD) { 379 if (InitType == DEVICE_INIT_COLD) {
381 memcpy(pDevice->abyBroadcastAddr, abyBroadcastAddr, U_ETHER_ADDR_LEN); 380 memcpy(pDevice->abyBroadcastAddr, abyBroadcastAddr, ETH_ALEN);
382 memcpy(pDevice->abySNAP_RFC1042, abySNAP_RFC1042, U_ETHER_ADDR_LEN); 381 memcpy(pDevice->abySNAP_RFC1042, abySNAP_RFC1042, ETH_ALEN);
383 memcpy(pDevice->abySNAP_Bridgetunnel, abySNAP_Bridgetunnel, U_ETHER_ADDR_LEN); 382 memcpy(pDevice->abySNAP_Bridgetunnel,
383 abySNAP_Bridgetunnel,
384 ETH_ALEN);
384 385
385 if ( !FIRMWAREbCheckVersion(pDevice) ) { 386 if ( !FIRMWAREbCheckVersion(pDevice) ) {
386 if (FIRMWAREbDownload(pDevice) == TRUE) { 387 if (FIRMWAREbDownload(pDevice) == TRUE) {
@@ -605,7 +606,9 @@ static BOOL device_init_registers(PSDevice pDevice, DEVICE_INIT_TYPE InitType)
605 606
606 // get Permanent network address 607 // get Permanent network address
607 memcpy(pDevice->abyPermanentNetAddr,&(sInitRsp.byNetAddr[0]),6); 608 memcpy(pDevice->abyPermanentNetAddr,&(sInitRsp.byNetAddr[0]),6);
608 memcpy(pDevice->abyCurrentNetAddr, pDevice->abyPermanentNetAddr, U_ETHER_ADDR_LEN); 609 memcpy(pDevice->abyCurrentNetAddr,
610 pDevice->abyPermanentNetAddr,
611 ETH_ALEN);
609 612
610 // if exist SW network address, use SW network address. 613 // if exist SW network address, use SW network address.
611 614
@@ -712,7 +715,8 @@ static BOOL device_release_WPADEV(PSDevice pDevice)
712} 715}
713 716
714#ifdef CONFIG_PM /* Minimal support for suspend and resume */ 717#ifdef CONFIG_PM /* Minimal support for suspend and resume */
715static int vntwusb_suspend(struct usb_interface *intf, pm_message_t message) 718
719static int vt6656_suspend(struct usb_interface *intf, pm_message_t message)
716{ 720{
717 PSDevice pDevice = usb_get_intfdata(intf); 721 PSDevice pDevice = usb_get_intfdata(intf);
718 struct net_device *dev = pDevice->dev; 722 struct net_device *dev = pDevice->dev;
@@ -727,7 +731,7 @@ if(dev != NULL) {
727 return 0; 731 return 0;
728} 732}
729 733
730static int vntwusb_resume(struct usb_interface *intf) 734static int vt6656_resume(struct usb_interface *intf)
731{ 735{
732 PSDevice pDevice = usb_get_intfdata(intf); 736 PSDevice pDevice = usb_get_intfdata(intf);
733 struct net_device *dev = pDevice->dev; 737 struct net_device *dev = pDevice->dev;
@@ -742,8 +746,8 @@ static int vntwusb_resume(struct usb_interface *intf)
742 } 746 }
743 return 0; 747 return 0;
744} 748}
745#endif
746 749
750#endif /* CONFIG_PM */
747 751
748static const struct net_device_ops device_netdev_ops = { 752static const struct net_device_ops device_netdev_ops = {
749 .ndo_open = device_open, 753 .ndo_open = device_open,
@@ -755,10 +759,10 @@ static const struct net_device_ops device_netdev_ops = {
755}; 759};
756 760
757 761
758static int 762static int __devinit
759vntwusb_found1(struct usb_interface *intf, const struct usb_device_id *id) 763vt6656_probe(struct usb_interface *intf, const struct usb_device_id *id)
760{ 764{
761 BYTE fake_mac[U_ETHER_ADDR_LEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x01};//fake MAC address 765 u8 fake_mac[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x01};
762 struct usb_device *udev = interface_to_usbdev(intf); 766 struct usb_device *udev = interface_to_usbdev(intf);
763 int rc = 0; 767 int rc = 0;
764 struct net_device *netdev = NULL; 768 struct net_device *netdev = NULL;
@@ -789,7 +793,7 @@ vntwusb_found1(struct usb_interface *intf, const struct usb_device_id *id)
789 spin_lock_init(&pDevice->lock); 793 spin_lock_init(&pDevice->lock);
790 794
791 pDevice->tx_80211 = device_dma0_tx_80211; 795 pDevice->tx_80211 = device_dma0_tx_80211;
792 pDevice->sMgmtObj.pAdapter = (PVOID)pDevice; 796 pDevice->sMgmtObj.pAdapter = (void *)pDevice;
793 797
794 netdev->netdev_ops = &device_netdev_ops; 798 netdev->netdev_ops = &device_netdev_ops;
795 799
@@ -799,7 +803,7 @@ vntwusb_found1(struct usb_interface *intf, const struct usb_device_id *id)
799 //2007-0821-01<Add>by MikeLiu 803 //2007-0821-01<Add>by MikeLiu
800 usb_set_intfdata(intf, pDevice); 804 usb_set_intfdata(intf, pDevice);
801 SET_NETDEV_DEV(netdev, &intf->dev); 805 SET_NETDEV_DEV(netdev, &intf->dev);
802 memcpy(pDevice->dev->dev_addr, fake_mac, U_ETHER_ADDR_LEN); //use fake mac address 806 memcpy(pDevice->dev->dev_addr, fake_mac, ETH_ALEN);
803 rc = register_netdev(netdev); 807 rc = register_netdev(netdev);
804 if (rc != 0) { 808 if (rc != 0) {
805 printk(KERN_ERR DEVICE_NAME " Failed to register netdev\n"); 809 printk(KERN_ERR DEVICE_NAME " Failed to register netdev\n");
@@ -841,7 +845,8 @@ err_nomem:
841} 845}
842 846
843 847
844static VOID device_free_tx_bufs(PSDevice pDevice) { 848static void device_free_tx_bufs(PSDevice pDevice)
849{
845 PUSB_SEND_CONTEXT pTxContext; 850 PUSB_SEND_CONTEXT pTxContext;
846 int ii; 851 int ii;
847 852
@@ -860,7 +865,8 @@ static VOID device_free_tx_bufs(PSDevice pDevice) {
860} 865}
861 866
862 867
863static VOID device_free_rx_bufs(PSDevice pDevice) { 868static void device_free_rx_bufs(PSDevice pDevice)
869{
864 PRCB pRCB; 870 PRCB pRCB;
865 int ii; 871 int ii;
866 872
@@ -892,8 +898,8 @@ static void usb_device_reset(PSDevice pDevice)
892 return ; 898 return ;
893} 899}
894 900
895static VOID device_free_int_bufs(PSDevice pDevice) { 901static void device_free_int_bufs(PSDevice pDevice)
896 902{
897 if (pDevice->intBuf.pDataBuf != NULL) 903 if (pDevice->intBuf.pDataBuf != NULL)
898 kfree(pDevice->intBuf.pDataBuf); 904 kfree(pDevice->intBuf.pDataBuf);
899 return; 905 return;
@@ -915,7 +921,7 @@ static BOOL device_alloc_bufs(PSDevice pDevice) {
915 goto free_tx; 921 goto free_tx;
916 } 922 }
917 pDevice->apTD[ii] = pTxContext; 923 pDevice->apTD[ii] = pTxContext;
918 pTxContext->pDevice = (PVOID) pDevice; 924 pTxContext->pDevice = (void *) pDevice;
919 //allocate URBs 925 //allocate URBs
920 pTxContext->pUrb = usb_alloc_urb(0, GFP_ATOMIC); 926 pTxContext->pUrb = usb_alloc_urb(0, GFP_ATOMIC);
921 if (pTxContext->pUrb == NULL) { 927 if (pTxContext->pUrb == NULL) {
@@ -944,7 +950,7 @@ static BOOL device_alloc_bufs(PSDevice pDevice) {
944 for (ii = 0; ii < pDevice->cbRD; ii++) { 950 for (ii = 0; ii < pDevice->cbRD; ii++) {
945 951
946 pDevice->apRCB[ii] = pRCB; 952 pDevice->apRCB[ii] = pRCB;
947 pRCB->pDevice = (PVOID) pDevice; 953 pRCB->pDevice = (void *) pDevice;
948 //allocate URBs 954 //allocate URBs
949 pRCB->pUrb = usb_alloc_urb(0, GFP_ATOMIC); 955 pRCB->pUrb = usb_alloc_urb(0, GFP_ATOMIC);
950 956
@@ -1102,8 +1108,8 @@ static int device_open(struct net_device *dev) {
1102 // Init for Key Management 1108 // Init for Key Management
1103 1109
1104 KeyvInitTable(pDevice,&pDevice->sKey); 1110 KeyvInitTable(pDevice,&pDevice->sKey);
1105 memcpy(pDevice->sMgmtObj.abyMACAddr, pDevice->abyCurrentNetAddr, U_ETHER_ADDR_LEN); 1111 memcpy(pDevice->sMgmtObj.abyMACAddr, pDevice->abyCurrentNetAddr, ETH_ALEN);
1106 memcpy(pDevice->dev->dev_addr, pDevice->abyCurrentNetAddr, U_ETHER_ADDR_LEN); 1112 memcpy(pDevice->dev->dev_addr, pDevice->abyCurrentNetAddr, ETH_ALEN);
1107 pDevice->bStopTx0Pkt = FALSE; 1113 pDevice->bStopTx0Pkt = FALSE;
1108 pDevice->bStopDataPkt = FALSE; 1114 pDevice->bStopDataPkt = FALSE;
1109 pDevice->bRoaming = FALSE; //DavidWang 1115 pDevice->bRoaming = FALSE; //DavidWang
@@ -1154,12 +1160,12 @@ static int device_open(struct net_device *dev) {
1154 } 1160 }
1155 1161
1156 if (pDevice->sMgmtObj.eConfigMode == WMAC_CONFIG_AP) { 1162 if (pDevice->sMgmtObj.eConfigMode == WMAC_CONFIG_AP) {
1157 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RUN_AP, NULL); 1163 bScheduleCommand((void *) pDevice, WLAN_CMD_RUN_AP, NULL);
1158 } 1164 }
1159 else { 1165 else {
1160 //mike:mark@2008-11-10 1166 //mike:mark@2008-11-10
1161 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_BSSID_SCAN, NULL); 1167 bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL);
1162 //bScheduleCommand((HANDLE)pDevice, WLAN_CMD_SSID, NULL); 1168 /* bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL); */
1163 } 1169 }
1164 1170
1165 1171
@@ -1216,7 +1222,7 @@ static int device_close(struct net_device *dev) {
1216 1222
1217//2007-1121-02<Add>by EinsnLiu 1223//2007-1121-02<Add>by EinsnLiu
1218 if (pDevice->bLinkPass) { 1224 if (pDevice->bLinkPass) {
1219 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_DISASSOCIATE, NULL); 1225 bScheduleCommand((void *) pDevice, WLAN_CMD_DISASSOCIATE, NULL);
1220 mdelay(30); 1226 mdelay(30);
1221 } 1227 }
1222//End Add 1228//End Add
@@ -1285,8 +1291,7 @@ device_release_WPADEV(pDevice);
1285} 1291}
1286 1292
1287 1293
1288static void vntwusb_disconnect(struct usb_interface *intf) 1294static void __devexit vt6656_disconnect(struct usb_interface *intf)
1289
1290{ 1295{
1291 1296
1292 PSDevice pDevice = usb_get_intfdata(intf); 1297 PSDevice pDevice = usb_get_intfdata(intf);
@@ -1333,7 +1338,7 @@ device_release_WPADEV(pDevice);
1333static int device_dma0_tx_80211(struct sk_buff *skb, struct net_device *dev) { 1338static int device_dma0_tx_80211(struct sk_buff *skb, struct net_device *dev) {
1334 PSDevice pDevice=netdev_priv(dev); 1339 PSDevice pDevice=netdev_priv(dev);
1335 PBYTE pbMPDU; 1340 PBYTE pbMPDU;
1336 UINT cbMPDULen = 0; 1341 unsigned int cbMPDULen = 0;
1337 1342
1338 1343
1339 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_dma0_tx_80211\n"); 1344 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_dma0_tx_80211\n");
@@ -1408,24 +1413,27 @@ static inline u32 ether_crc(int length, unsigned char *data)
1408} 1413}
1409 1414
1410//find out the start position of str2 from str1 1415//find out the start position of str2 from str1
1411static UCHAR *kstrstr(const UCHAR *str1,const UCHAR *str2) { 1416static unsigned char *kstrstr(const unsigned char *str1,
1412 int str1_len=strlen(str1); 1417 const unsigned char *str2) {
1413 int str2_len=strlen(str2); 1418 int str1_len = strlen(str1);
1419 int str2_len = strlen(str2);
1414 1420
1415 while (str1_len >= str2_len) { 1421 while (str1_len >= str2_len) {
1416 str1_len--; 1422 str1_len--;
1417 if(memcmp(str1,str2,str2_len)==0) 1423 if(memcmp(str1,str2,str2_len)==0)
1418 return (UCHAR *)str1; 1424 return (unsigned char *) str1;
1419 str1++; 1425 str1++;
1420 } 1426 }
1421 return NULL; 1427 return NULL;
1422} 1428}
1423 1429
1424static int Config_FileGetParameter(UCHAR *string, UCHAR *dest,UCHAR *source) 1430static int Config_FileGetParameter(unsigned char *string,
1431 unsigned char *dest,
1432 unsigned char *source)
1425{ 1433{
1426 UCHAR buf1[100]; 1434 unsigned char buf1[100];
1427 UCHAR buf2[100]; 1435 unsigned char buf2[100];
1428 UCHAR *start_p=NULL,*end_p=NULL,*tmp_p=NULL; 1436 unsigned char *start_p = NULL, *end_p = NULL, *tmp_p = NULL;
1429 int ii; 1437 int ii;
1430 1438
1431 memset(buf1,0,100); 1439 memset(buf1,0,100);
@@ -1434,7 +1442,8 @@ static int Config_FileGetParameter(UCHAR *string, UCHAR *dest,UCHAR *source)
1434 source+=strlen(buf1); 1442 source+=strlen(buf1);
1435 1443
1436//find target string start point 1444//find target string start point
1437 if((start_p = kstrstr(source,buf1))==NULL) 1445 start_p = kstrstr(source,buf1);
1446 if (start_p == NULL)
1438 return FALSE; 1447 return FALSE;
1439 1448
1440//check if current config line is marked by "#" ?? 1449//check if current config line is marked by "#" ??
@@ -1446,7 +1455,8 @@ for(ii=1;;ii++) {
1446} 1455}
1447 1456
1448//find target string end point 1457//find target string end point
1449 if((end_p = kstrstr(start_p,"\n"))==NULL) { //cann't find "\n",but don't care 1458 end_p = kstrstr(start_p,"\n");
1459 if (end_p == NULL) { //can't find "\n",but don't care
1450 end_p=start_p+strlen(start_p); //no include "\n" 1460 end_p=start_p+strlen(start_p); //no include "\n"
1451 } 1461 }
1452 1462
@@ -1455,7 +1465,8 @@ for(ii=1;;ii++) {
1455 buf2[end_p-start_p]='\0'; 1465 buf2[end_p-start_p]='\0';
1456 1466
1457 //find value 1467 //find value
1458 if((start_p = kstrstr(buf2,"="))==NULL) 1468 start_p = kstrstr(buf2,"=");
1469 if (start_p == NULL)
1459 return FALSE; 1470 return FALSE;
1460 memset(buf1,0,100); 1471 memset(buf1,0,100);
1461 strcpy(buf1,start_p+1); 1472 strcpy(buf1,start_p+1);
@@ -1474,13 +1485,14 @@ for(ii=1;;ii++) {
1474} 1485}
1475 1486
1476//if read fail,return NULL,or return data pointer; 1487//if read fail,return NULL,or return data pointer;
1477static UCHAR *Config_FileOperation(PSDevice pDevice) { 1488static unsigned char *Config_FileOperation(PSDevice pDevice)
1478 UCHAR *config_path=CONFIG_PATH; 1489{
1479 UCHAR *buffer=NULL; 1490 unsigned char *config_path = CONFIG_PATH;
1491 unsigned char *buffer = NULL;
1480 struct file *filp=NULL; 1492 struct file *filp=NULL;
1481 mm_segment_t old_fs = get_fs(); 1493 mm_segment_t old_fs = get_fs();
1482 //int oldfsuid=0,oldfsgid=0; 1494 //int oldfsuid=0,oldfsgid=0;
1483 int result=0; 1495 int result = 0;
1484 1496
1485 set_fs (KERNEL_DS); 1497 set_fs (KERNEL_DS);
1486 /* Can't do this anymore, so we rely on correct filesystem permissions: 1498 /* Can't do this anymore, so we rely on correct filesystem permissions:
@@ -1505,7 +1517,7 @@ static UCHAR *Config_FileOperation(PSDevice pDevice) {
1505 goto error1; 1517 goto error1;
1506 } 1518 }
1507 1519
1508 buffer = (UCHAR *)kmalloc(1024, GFP_KERNEL); 1520 buffer = kmalloc(1024, GFP_KERNEL);
1509 if(buffer==NULL) { 1521 if(buffer==NULL) {
1510 printk("alllocate mem for file fail?\n"); 1522 printk("alllocate mem for file fail?\n");
1511 result = -1; 1523 result = -1;
@@ -1539,16 +1551,17 @@ if(result!=0) {
1539 1551
1540//return --->-1:fail; >=0:successful 1552//return --->-1:fail; >=0:successful
1541static int Read_config_file(PSDevice pDevice) { 1553static int Read_config_file(PSDevice pDevice) {
1542 int result=0; 1554 int result = 0;
1543 UCHAR tmpbuffer[100]; 1555 unsigned char tmpbuffer[100];
1544 UCHAR *buffer=NULL; 1556 unsigned char *buffer = NULL;
1545 1557
1546 //init config setting 1558 //init config setting
1547 pDevice->config_file.ZoneType = -1; 1559 pDevice->config_file.ZoneType = -1;
1548 pDevice->config_file.eAuthenMode = -1; 1560 pDevice->config_file.eAuthenMode = -1;
1549 pDevice->config_file.eEncryptionStatus = -1; 1561 pDevice->config_file.eEncryptionStatus = -1;
1550 1562
1551 if((buffer=Config_FileOperation(pDevice)) ==NULL) { 1563 buffer = Config_FileOperation(pDevice);
1564 if (buffer == NULL) {
1552 result =-1; 1565 result =-1;
1553 return result; 1566 return result;
1554 } 1567 }
@@ -2064,7 +2077,7 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
2064 rc = 0; 2077 rc = 0;
2065 } 2078 }
2066 2079
2067 rc = hostap_ioctl(pDevice, &wrq->u.data); 2080 rc = vt6656_hostap_ioctl(pDevice, &wrq->u.data);
2068 break; 2081 break;
2069 2082
2070 case IOCTL_CMD_WPA: 2083 case IOCTL_CMD_WPA:
@@ -2094,16 +2107,16 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
2094 if (pMgmt->eConfigMode == WMAC_CONFIG_AP) { 2107 if (pMgmt->eConfigMode == WMAC_CONFIG_AP) {
2095 netif_stop_queue(pDevice->dev); 2108 netif_stop_queue(pDevice->dev);
2096 spin_lock_irq(&pDevice->lock); 2109 spin_lock_irq(&pDevice->lock);
2097 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_RUN_AP, NULL); 2110 bScheduleCommand((void *) pDevice, WLAN_CMD_RUN_AP, NULL);
2098 spin_unlock_irq(&pDevice->lock); 2111 spin_unlock_irq(&pDevice->lock);
2099 } 2112 }
2100 else { 2113 else {
2101 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Commit the settings\n"); 2114 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Commit the settings\n");
2102 spin_lock_irq(&pDevice->lock); 2115 spin_lock_irq(&pDevice->lock);
2103//2007-1121-01<Modify>by EinsnLiu 2116//2007-1121-01<Modify>by EinsnLiu
2104 if (pDevice->bLinkPass&& 2117 if (pDevice->bLinkPass &&
2105 memcmp(pMgmt->abyCurrSSID,pMgmt->abyDesireSSID,WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN)) { 2118 memcmp(pMgmt->abyCurrSSID,pMgmt->abyDesireSSID,WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN)) {
2106 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_DISASSOCIATE, NULL); 2119 bScheduleCommand((void *) pDevice, WLAN_CMD_DISASSOCIATE, NULL);
2107 } else { 2120 } else {
2108 pDevice->bLinkPass = FALSE; 2121 pDevice->bLinkPass = FALSE;
2109 pMgmt->eCurrState = WMAC_STATE_IDLE; 2122 pMgmt->eCurrState = WMAC_STATE_IDLE;
@@ -2114,10 +2127,14 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
2114 netif_stop_queue(pDevice->dev); 2127 netif_stop_queue(pDevice->dev);
2115#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 2128#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
2116 pMgmt->eScanType = WMAC_SCAN_ACTIVE; 2129 pMgmt->eScanType = WMAC_SCAN_ACTIVE;
2117 if(pDevice->bWPASuppWextEnabled !=TRUE) 2130 if (!pDevice->bWPASuppWextEnabled)
2118#endif 2131#endif
2119 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 2132 bScheduleCommand((void *) pDevice,
2120 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 2133 WLAN_CMD_BSSID_SCAN,
2134 pMgmt->abyDesireSSID);
2135 bScheduleCommand((void *) pDevice,
2136 WLAN_CMD_SSID,
2137 NULL);
2121 spin_unlock_irq(&pDevice->lock); 2138 spin_unlock_irq(&pDevice->lock);
2122 } 2139 }
2123 pDevice->bCommit = FALSE; 2140 pDevice->bCommit = FALSE;
@@ -2153,35 +2170,29 @@ static int ethtool_ioctl(struct net_device *dev, void *useraddr)
2153 2170
2154/*------------------------------------------------------------------*/ 2171/*------------------------------------------------------------------*/
2155 2172
2173MODULE_DEVICE_TABLE(usb, vt6656_table);
2156 2174
2157MODULE_DEVICE_TABLE(usb, vntwusb_table); 2175static struct usb_driver vt6656_driver = {
2158 2176 .name = DEVICE_NAME,
2159 2177 .probe = vt6656_probe,
2160static struct usb_driver vntwusb_driver = { 2178 .disconnect = vt6656_disconnect,
2161 .name = DEVICE_NAME, 2179 .id_table = vt6656_table,
2162 .probe = vntwusb_found1,
2163 .disconnect = vntwusb_disconnect,
2164 .id_table = vntwusb_table,
2165
2166//2008-0920-01<Add>by MikeLiu
2167//for supporting S3 & S4 function
2168#ifdef CONFIG_PM 2180#ifdef CONFIG_PM
2169 .suspend = vntwusb_suspend, 2181 .suspend = vt6656_suspend,
2170 .resume = vntwusb_resume, 2182 .resume = vt6656_resume,
2171#endif 2183#endif /* CONFIG_PM */
2172}; 2184};
2173 2185
2174static int __init vntwusb_init_module(void) 2186static int __init vt6656_init_module(void)
2175{ 2187{
2176 printk(KERN_NOTICE DEVICE_FULL_DRV_NAM " " DEVICE_VERSION); 2188 printk(KERN_NOTICE DEVICE_FULL_DRV_NAM " " DEVICE_VERSION);
2177 return usb_register(&vntwusb_driver); 2189 return usb_register(&vt6656_driver);
2178} 2190}
2179 2191
2180static void __exit vntwusb_cleanup_module(void) 2192static void __exit vt6656_cleanup_module(void)
2181{ 2193{
2182 usb_deregister(&vntwusb_driver); 2194 usb_deregister(&vt6656_driver);
2183} 2195}
2184 2196
2185module_init(vntwusb_init_module); 2197module_init(vt6656_init_module);
2186module_exit(vntwusb_cleanup_module); 2198module_exit(vt6656_cleanup_module);
2187
diff --git a/drivers/staging/vt6656/mib.c b/drivers/staging/vt6656/mib.c
index 910e610b7cc0..b694fc86d740 100644
--- a/drivers/staging/vt6656/mib.c
+++ b/drivers/staging/vt6656/mib.c
@@ -152,33 +152,36 @@ void STAvUpdateIsrStatCounter (PSStatCounter pStatistic, BYTE byIsr0, BYTE byIsr
152 * Return Value: none 152 * Return Value: none
153 * 153 *
154 */ 154 */
155void STAvUpdateRDStatCounter (PSStatCounter pStatistic, 155void STAvUpdateRDStatCounter(PSStatCounter pStatistic,
156 BYTE byRSR, BYTE byNewRSR, BYTE byRxSts, BYTE byRxRate, 156 BYTE byRSR, BYTE byNewRSR,
157 PBYTE pbyBuffer, UINT cbFrameLength) 157 BYTE byRxSts, BYTE byRxRate,
158 PBYTE pbyBuffer, unsigned int cbFrameLength)
158{ 159{
159 //need change 160 /* need change */
160 PS802_11Header pHeader = (PS802_11Header)pbyBuffer; 161 PS802_11Header pHeader = (PS802_11Header)pbyBuffer;
161 162
162 if (byRSR & RSR_ADDROK) 163 if (byRSR & RSR_ADDROK)
163 pStatistic->dwRsrADDROk++; 164 pStatistic->dwRsrADDROk++;
164 if (byRSR & RSR_CRCOK) { 165 if (byRSR & RSR_CRCOK) {
165 pStatistic->dwRsrCRCOk++; 166 pStatistic->dwRsrCRCOk++;
167 pStatistic->ullRsrOK++;
166 168
167 pStatistic->ullRsrOK++; 169 if (cbFrameLength >= ETH_ALEN) {
168 170 /* update counters in case of successful transmission */
169 if (cbFrameLength >= U_ETHER_ADDR_LEN) {
170 // update counters in case that successful transmit
171 if (byRSR & RSR_ADDRBROAD) { 171 if (byRSR & RSR_ADDRBROAD) {
172 pStatistic->ullRxBroadcastFrames++; 172 pStatistic->ullRxBroadcastFrames++;
173 pStatistic->ullRxBroadcastBytes += (ULONGLONG)cbFrameLength; 173 pStatistic->ullRxBroadcastBytes +=
174 (unsigned long long) cbFrameLength;
174 } 175 }
175 else if (byRSR & RSR_ADDRMULTI) { 176 else if (byRSR & RSR_ADDRMULTI) {
176 pStatistic->ullRxMulticastFrames++; 177 pStatistic->ullRxMulticastFrames++;
177 pStatistic->ullRxMulticastBytes += (ULONGLONG)cbFrameLength; 178 pStatistic->ullRxMulticastBytes +=
179 (unsigned long long) cbFrameLength;
178 } 180 }
179 else { 181 else {
180 pStatistic->ullRxDirectedFrames++; 182 pStatistic->ullRxDirectedFrames++;
181 pStatistic->ullRxDirectedBytes += (ULONGLONG)cbFrameLength; 183 pStatistic->ullRxDirectedBytes +=
184 (unsigned long long) cbFrameLength;
182 } 185 }
183 } 186 }
184 } 187 }
@@ -188,87 +191,114 @@ void STAvUpdateRDStatCounter (PSStatCounter pStatistic,
188 if(byRSR & RSR_CRCOK) { 191 if(byRSR & RSR_CRCOK) {
189 pStatistic->CustomStat.ullRsr11MCRCOk++; 192 pStatistic->CustomStat.ullRsr11MCRCOk++;
190 } 193 }
191 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"11M: ALL[%d], OK[%d]:[%02x]\n", (INT)pStatistic->CustomStat.ullRsr11M, (INT)pStatistic->CustomStat.ullRsr11MCRCOk, byRSR); 194 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "11M: ALL[%d], OK[%d]:[%02x]\n",
195 (signed int) pStatistic->CustomStat.ullRsr11M,
196 (signed int) pStatistic->CustomStat.ullRsr11MCRCOk, byRSR);
192 } 197 }
193 else if(byRxRate==11) { 198 else if(byRxRate==11) {
194 pStatistic->CustomStat.ullRsr5M++; 199 pStatistic->CustomStat.ullRsr5M++;
195 if(byRSR & RSR_CRCOK) { 200 if(byRSR & RSR_CRCOK) {
196 pStatistic->CustomStat.ullRsr5MCRCOk++; 201 pStatistic->CustomStat.ullRsr5MCRCOk++;
197 } 202 }
198 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" 5M: ALL[%d], OK[%d]:[%02x]\n", (INT)pStatistic->CustomStat.ullRsr5M, (INT)pStatistic->CustomStat.ullRsr5MCRCOk, byRSR); 203 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " 5M: ALL[%d], OK[%d]:[%02x]\n",
204 (signed int) pStatistic->CustomStat.ullRsr5M,
205 (signed int) pStatistic->CustomStat.ullRsr5MCRCOk, byRSR);
199 } 206 }
200 else if(byRxRate==4) { 207 else if(byRxRate==4) {
201 pStatistic->CustomStat.ullRsr2M++; 208 pStatistic->CustomStat.ullRsr2M++;
202 if(byRSR & RSR_CRCOK) { 209 if(byRSR & RSR_CRCOK) {
203 pStatistic->CustomStat.ullRsr2MCRCOk++; 210 pStatistic->CustomStat.ullRsr2MCRCOk++;
204 } 211 }
205 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" 2M: ALL[%d], OK[%d]:[%02x]\n", (INT)pStatistic->CustomStat.ullRsr2M, (INT)pStatistic->CustomStat.ullRsr2MCRCOk, byRSR); 212 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " 2M: ALL[%d], OK[%d]:[%02x]\n",
213 (signed int) pStatistic->CustomStat.ullRsr2M,
214 (signed int) pStatistic->CustomStat.ullRsr2MCRCOk, byRSR);
206 } 215 }
207 else if(byRxRate==2){ 216 else if(byRxRate==2){
208 pStatistic->CustomStat.ullRsr1M++; 217 pStatistic->CustomStat.ullRsr1M++;
209 if(byRSR & RSR_CRCOK) { 218 if(byRSR & RSR_CRCOK) {
210 pStatistic->CustomStat.ullRsr1MCRCOk++; 219 pStatistic->CustomStat.ullRsr1MCRCOk++;
211 } 220 }
212 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" 1M: ALL[%d], OK[%d]:[%02x]\n", (INT)pStatistic->CustomStat.ullRsr1M, (INT)pStatistic->CustomStat.ullRsr1MCRCOk, byRSR); 221 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " 1M: ALL[%d], OK[%d]:[%02x]\n",
222 (signed int) pStatistic->CustomStat.ullRsr1M,
223 (signed int) pStatistic->CustomStat.ullRsr1MCRCOk, byRSR);
213 } 224 }
214 else if(byRxRate==12){ 225 else if(byRxRate==12){
215 pStatistic->CustomStat.ullRsr6M++; 226 pStatistic->CustomStat.ullRsr6M++;
216 if(byRSR & RSR_CRCOK) { 227 if(byRSR & RSR_CRCOK) {
217 pStatistic->CustomStat.ullRsr6MCRCOk++; 228 pStatistic->CustomStat.ullRsr6MCRCOk++;
218 } 229 }
219 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" 6M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr6M, (INT)pStatistic->CustomStat.ullRsr6MCRCOk); 230 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " 6M: ALL[%d], OK[%d]\n",
231 (signed int) pStatistic->CustomStat.ullRsr6M,
232 (signed int) pStatistic->CustomStat.ullRsr6MCRCOk);
220 } 233 }
221 else if(byRxRate==18){ 234 else if(byRxRate==18){
222 pStatistic->CustomStat.ullRsr9M++; 235 pStatistic->CustomStat.ullRsr9M++;
223 if(byRSR & RSR_CRCOK) { 236 if(byRSR & RSR_CRCOK) {
224 pStatistic->CustomStat.ullRsr9MCRCOk++; 237 pStatistic->CustomStat.ullRsr9MCRCOk++;
225 } 238 }
226 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" 9M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr9M, (INT)pStatistic->CustomStat.ullRsr9MCRCOk); 239 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " 9M: ALL[%d], OK[%d]\n",
240 (signed int) pStatistic->CustomStat.ullRsr9M,
241 (signed int) pStatistic->CustomStat.ullRsr9MCRCOk);
227 } 242 }
228 else if(byRxRate==24){ 243 else if(byRxRate==24){
229 pStatistic->CustomStat.ullRsr12M++; 244 pStatistic->CustomStat.ullRsr12M++;
230 if(byRSR & RSR_CRCOK) { 245 if(byRSR & RSR_CRCOK) {
231 pStatistic->CustomStat.ullRsr12MCRCOk++; 246 pStatistic->CustomStat.ullRsr12MCRCOk++;
232 } 247 }
233 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"12M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr12M, (INT)pStatistic->CustomStat.ullRsr12MCRCOk); 248 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "12M: ALL[%d], OK[%d]\n",
249 (signed int) pStatistic->CustomStat.ullRsr12M,
250 (signed int) pStatistic->CustomStat.ullRsr12MCRCOk);
234 } 251 }
235 else if(byRxRate==36){ 252 else if(byRxRate==36){
236 pStatistic->CustomStat.ullRsr18M++; 253 pStatistic->CustomStat.ullRsr18M++;
237 if(byRSR & RSR_CRCOK) { 254 if(byRSR & RSR_CRCOK) {
238 pStatistic->CustomStat.ullRsr18MCRCOk++; 255 pStatistic->CustomStat.ullRsr18MCRCOk++;
239 } 256 }
240 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"18M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr18M, (INT)pStatistic->CustomStat.ullRsr18MCRCOk); 257 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "18M: ALL[%d], OK[%d]\n",
258 (signed int) pStatistic->CustomStat.ullRsr18M,
259 (signed int) pStatistic->CustomStat.ullRsr18MCRCOk);
241 } 260 }
242 else if(byRxRate==48){ 261 else if(byRxRate==48){
243 pStatistic->CustomStat.ullRsr24M++; 262 pStatistic->CustomStat.ullRsr24M++;
244 if(byRSR & RSR_CRCOK) { 263 if(byRSR & RSR_CRCOK) {
245 pStatistic->CustomStat.ullRsr24MCRCOk++; 264 pStatistic->CustomStat.ullRsr24MCRCOk++;
246 } 265 }
247 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"24M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr24M, (INT)pStatistic->CustomStat.ullRsr24MCRCOk); 266 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "24M: ALL[%d], OK[%d]\n",
267 (signed int) pStatistic->CustomStat.ullRsr24M,
268 (signed int) pStatistic->CustomStat.ullRsr24MCRCOk);
248 } 269 }
249 else if(byRxRate==72){ 270 else if(byRxRate==72){
250 pStatistic->CustomStat.ullRsr36M++; 271 pStatistic->CustomStat.ullRsr36M++;
251 if(byRSR & RSR_CRCOK) { 272 if(byRSR & RSR_CRCOK) {
252 pStatistic->CustomStat.ullRsr36MCRCOk++; 273 pStatistic->CustomStat.ullRsr36MCRCOk++;
253 } 274 }
254 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"36M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr36M, (INT)pStatistic->CustomStat.ullRsr36MCRCOk); 275 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "36M: ALL[%d], OK[%d]\n",
276 (signed int) pStatistic->CustomStat.ullRsr36M,
277 (signed int) pStatistic->CustomStat.ullRsr36MCRCOk);
255 } 278 }
256 else if(byRxRate==96){ 279 else if(byRxRate==96){
257 pStatistic->CustomStat.ullRsr48M++; 280 pStatistic->CustomStat.ullRsr48M++;
258 if(byRSR & RSR_CRCOK) { 281 if(byRSR & RSR_CRCOK) {
259 pStatistic->CustomStat.ullRsr48MCRCOk++; 282 pStatistic->CustomStat.ullRsr48MCRCOk++;
260 } 283 }
261 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"48M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr48M, (INT)pStatistic->CustomStat.ullRsr48MCRCOk); 284 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "48M: ALL[%d], OK[%d]\n",
285 (signed int) pStatistic->CustomStat.ullRsr48M,
286 (signed int) pStatistic->CustomStat.ullRsr48MCRCOk);
262 } 287 }
263 else if(byRxRate==108){ 288 else if(byRxRate==108){
264 pStatistic->CustomStat.ullRsr54M++; 289 pStatistic->CustomStat.ullRsr54M++;
265 if(byRSR & RSR_CRCOK) { 290 if(byRSR & RSR_CRCOK) {
266 pStatistic->CustomStat.ullRsr54MCRCOk++; 291 pStatistic->CustomStat.ullRsr54MCRCOk++;
267 } 292 }
268 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"54M: ALL[%d], OK[%d]\n", (INT)pStatistic->CustomStat.ullRsr54M, (INT)pStatistic->CustomStat.ullRsr54MCRCOk); 293 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "54M: ALL[%d], OK[%d]\n",
294 (signed int) pStatistic->CustomStat.ullRsr54M,
295 (signed int) pStatistic->CustomStat.ullRsr54MCRCOk);
269 } 296 }
270 else { 297 else {
271 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Unknown: Total[%d], CRCOK[%d]\n", (INT)pStatistic->dwRsrRxPacket+1, (INT)pStatistic->dwRsrCRCOk); 298 DBG_PRT(MSG_LEVEL_DEBUG,
299 KERN_INFO "Unknown: Total[%d], CRCOK[%d]\n",
300 (signed int) pStatistic->dwRsrRxPacket+1,
301 (signed int)pStatistic->dwRsrCRCOk);
272 } 302 }
273 303
274 if (byRSR & RSR_BSSIDOK) 304 if (byRSR & RSR_BSSIDOK)
@@ -370,7 +400,7 @@ STAvUpdateRDStatCounterEx (
370 BYTE byRxSts, 400 BYTE byRxSts,
371 BYTE byRxRate, 401 BYTE byRxRate,
372 PBYTE pbyBuffer, 402 PBYTE pbyBuffer,
373 UINT cbFrameLength 403 unsigned int cbFrameLength
374 ) 404 )
375{ 405{
376 STAvUpdateRDStatCounter( 406 STAvUpdateRDStatCounter(
@@ -510,19 +540,22 @@ STAvUpdate802_11Counter(
510 ) 540 )
511{ 541{
512 //p802_11Counter->TransmittedFragmentCount 542 //p802_11Counter->TransmittedFragmentCount
513 p802_11Counter->MulticastTransmittedFrameCount = (ULONGLONG) (pStatistic->dwTsrBroadcast + 543 p802_11Counter->MulticastTransmittedFrameCount =
514 pStatistic->dwTsrMulticast); 544 (unsigned long long) (pStatistic->dwTsrBroadcast +
515 p802_11Counter->FailedCount = (ULONGLONG) (pStatistic->dwTsrErr); 545 pStatistic->dwTsrMulticast);
516 p802_11Counter->RetryCount = (ULONGLONG) (pStatistic->dwTsrRetry); 546 p802_11Counter->FailedCount = (unsigned long long) (pStatistic->dwTsrErr);
517 p802_11Counter->MultipleRetryCount = (ULONGLONG) (pStatistic->dwTsrMoreThanOnceRetry); 547 p802_11Counter->RetryCount = (unsigned long long) (pStatistic->dwTsrRetry);
548 p802_11Counter->MultipleRetryCount =
549 (unsigned long long) (pStatistic->dwTsrMoreThanOnceRetry);
518 //p802_11Counter->FrameDuplicateCount 550 //p802_11Counter->FrameDuplicateCount
519 p802_11Counter->RTSSuccessCount += (ULONGLONG) byRTSSuccess; 551 p802_11Counter->RTSSuccessCount += (unsigned long long) byRTSSuccess;
520 p802_11Counter->RTSFailureCount += (ULONGLONG) byRTSFail; 552 p802_11Counter->RTSFailureCount += (unsigned long long) byRTSFail;
521 p802_11Counter->ACKFailureCount += (ULONGLONG) byACKFail; 553 p802_11Counter->ACKFailureCount += (unsigned long long) byACKFail;
522 p802_11Counter->FCSErrorCount += (ULONGLONG) byFCSErr; 554 p802_11Counter->FCSErrorCount += (unsigned long long) byFCSErr;
523 //p802_11Counter->ReceivedFragmentCount 555 //p802_11Counter->ReceivedFragmentCount
524 p802_11Counter->MulticastReceivedFrameCount = (ULONGLONG) (pStatistic->dwRsrBroadcast + 556 p802_11Counter->MulticastReceivedFrameCount =
525 pStatistic->dwRsrMulticast); 557 (unsigned long long) (pStatistic->dwRsrBroadcast +
558 pStatistic->dwRsrMulticast);
526} 559}
527 560
528/* 561/*
diff --git a/drivers/staging/vt6656/mib.h b/drivers/staging/vt6656/mib.h
index ac996d2cd911..0455ec9d327d 100644
--- a/drivers/staging/vt6656/mib.h
+++ b/drivers/staging/vt6656/mib.h
@@ -52,32 +52,34 @@ typedef struct tagSUSBCounter {
52 52
53 53
54typedef struct tagSDot11Counters { 54typedef struct tagSDot11Counters {
55// ULONG Length; // Length of structure 55 /* unsigned long Length; // Length of structure */
56 ULONGLONG TransmittedFragmentCount; 56 unsigned long long TransmittedFragmentCount;
57 ULONGLONG MulticastTransmittedFrameCount; 57 unsigned long long MulticastTransmittedFrameCount;
58 ULONGLONG FailedCount; 58 unsigned long long FailedCount;
59 ULONGLONG RetryCount; 59 unsigned long long RetryCount;
60 ULONGLONG MultipleRetryCount; 60 unsigned long long MultipleRetryCount;
61 ULONGLONG RTSSuccessCount; 61 unsigned long long RTSSuccessCount;
62 ULONGLONG RTSFailureCount; 62 unsigned long long RTSFailureCount;
63 ULONGLONG ACKFailureCount; 63 unsigned long long ACKFailureCount;
64 ULONGLONG FrameDuplicateCount; 64 unsigned long long FrameDuplicateCount;
65 ULONGLONG ReceivedFragmentCount; 65 unsigned long long ReceivedFragmentCount;
66 ULONGLONG MulticastReceivedFrameCount; 66 unsigned long long MulticastReceivedFrameCount;
67 ULONGLONG FCSErrorCount; 67 unsigned long long FCSErrorCount;
68 ULONGLONG TKIPLocalMICFailures; 68 unsigned long long TKIPLocalMICFailures;
69 ULONGLONG TKIPRemoteMICFailures; 69 unsigned long long TKIPRemoteMICFailures;
70 ULONGLONG TKIPICVErrors; 70 unsigned long long TKIPICVErrors;
71 ULONGLONG TKIPCounterMeasuresInvoked; 71 unsigned long long TKIPCounterMeasuresInvoked;
72 ULONGLONG TKIPReplays; 72 unsigned long long TKIPReplays;
73 ULONGLONG CCMPFormatErrors; 73 unsigned long long CCMPFormatErrors;
74 ULONGLONG CCMPReplays; 74 unsigned long long CCMPReplays;
75 ULONGLONG CCMPDecryptErrors; 75 unsigned long long CCMPDecryptErrors;
76 ULONGLONG FourWayHandshakeFailures; 76 unsigned long long FourWayHandshakeFailures;
77// ULONGLONG WEPUndecryptableCount; 77 /*
78// ULONGLONG WEPICVErrorCount; 78 * unsigned long long WEPUndecryptableCount;
79// ULONGLONG DecryptSuccessCount; 79 * unsigned long long WEPICVErrorCount;
80// ULONGLONG DecryptFailureCount; 80 * unsigned long long DecryptSuccessCount;
81 * unsigned long long DecryptFailureCount;
82 */
81} SDot11Counters, *PSDot11Counters; 83} SDot11Counters, *PSDot11Counters;
82 84
83 85
@@ -85,15 +87,15 @@ typedef struct tagSDot11Counters {
85// MIB2 counter 87// MIB2 counter
86// 88//
87typedef struct tagSMib2Counter { 89typedef struct tagSMib2Counter {
88 LONG ifIndex; 90 signed long ifIndex;
89 char ifDescr[256]; // max size 255 plus zero ending 91 char ifDescr[256]; // max size 255 plus zero ending
90 // e.g. "interface 1" 92 // e.g. "interface 1"
91 LONG ifType; 93 signed long ifType;
92 LONG ifMtu; 94 signed long ifMtu;
93 DWORD ifSpeed; 95 DWORD ifSpeed;
94 BYTE ifPhysAddress[U_ETHER_ADDR_LEN]; 96 BYTE ifPhysAddress[ETH_ALEN];
95 LONG ifAdminStatus; 97 signed long ifAdminStatus;
96 LONG ifOperStatus; 98 signed long ifOperStatus;
97 DWORD ifLastChange; 99 DWORD ifLastChange;
98 DWORD ifInOctets; 100 DWORD ifInOctets;
99 DWORD ifInUcastPkts; 101 DWORD ifInUcastPkts;
@@ -124,7 +126,7 @@ typedef struct tagSMib2Counter {
124// RMON counter 126// RMON counter
125// 127//
126typedef struct tagSRmonCounter { 128typedef struct tagSRmonCounter {
127 LONG etherStatsIndex; 129 signed long etherStatsIndex;
128 DWORD etherStatsDataSource; 130 DWORD etherStatsDataSource;
129 DWORD etherStatsDropEvents; 131 DWORD etherStatsDropEvents;
130 DWORD etherStatsOctets; 132 DWORD etherStatsOctets;
@@ -151,37 +153,37 @@ typedef struct tagSRmonCounter {
151// Custom counter 153// Custom counter
152// 154//
153typedef struct tagSCustomCounters { 155typedef struct tagSCustomCounters {
154 ULONG Length; 156 unsigned long Length;
155 157
156 ULONGLONG ullTsrAllOK; 158 unsigned long long ullTsrAllOK;
157 159
158 ULONGLONG ullRsr11M; 160 unsigned long long ullRsr11M;
159 ULONGLONG ullRsr5M; 161 unsigned long long ullRsr5M;
160 ULONGLONG ullRsr2M; 162 unsigned long long ullRsr2M;
161 ULONGLONG ullRsr1M; 163 unsigned long long ullRsr1M;
162 164
163 ULONGLONG ullRsr11MCRCOk; 165 unsigned long long ullRsr11MCRCOk;
164 ULONGLONG ullRsr5MCRCOk; 166 unsigned long long ullRsr5MCRCOk;
165 ULONGLONG ullRsr2MCRCOk; 167 unsigned long long ullRsr2MCRCOk;
166 ULONGLONG ullRsr1MCRCOk; 168 unsigned long long ullRsr1MCRCOk;
167 169
168 ULONGLONG ullRsr54M; 170 unsigned long long ullRsr54M;
169 ULONGLONG ullRsr48M; 171 unsigned long long ullRsr48M;
170 ULONGLONG ullRsr36M; 172 unsigned long long ullRsr36M;
171 ULONGLONG ullRsr24M; 173 unsigned long long ullRsr24M;
172 ULONGLONG ullRsr18M; 174 unsigned long long ullRsr18M;
173 ULONGLONG ullRsr12M; 175 unsigned long long ullRsr12M;
174 ULONGLONG ullRsr9M; 176 unsigned long long ullRsr9M;
175 ULONGLONG ullRsr6M; 177 unsigned long long ullRsr6M;
176 178
177 ULONGLONG ullRsr54MCRCOk; 179 unsigned long long ullRsr54MCRCOk;
178 ULONGLONG ullRsr48MCRCOk; 180 unsigned long long ullRsr48MCRCOk;
179 ULONGLONG ullRsr36MCRCOk; 181 unsigned long long ullRsr36MCRCOk;
180 ULONGLONG ullRsr24MCRCOk; 182 unsigned long long ullRsr24MCRCOk;
181 ULONGLONG ullRsr18MCRCOk; 183 unsigned long long ullRsr18MCRCOk;
182 ULONGLONG ullRsr12MCRCOk; 184 unsigned long long ullRsr12MCRCOk;
183 ULONGLONG ullRsr9MCRCOk; 185 unsigned long long ullRsr9MCRCOk;
184 ULONGLONG ullRsr6MCRCOk; 186 unsigned long long ullRsr6MCRCOk;
185 187
186} SCustomCounters, *PSCustomCounters; 188} SCustomCounters, *PSCustomCounters;
187 189
@@ -190,7 +192,7 @@ typedef struct tagSCustomCounters {
190// Custom counter 192// Custom counter
191// 193//
192typedef struct tagSISRCounters { 194typedef struct tagSISRCounters {
193 ULONG Length; 195 unsigned long Length;
194 196
195 DWORD dwIsrTx0OK; 197 DWORD dwIsrTx0OK;
196 DWORD dwIsrAC0TxOK; 198 DWORD dwIsrAC0TxOK;
@@ -231,7 +233,7 @@ typedef struct tagSTxPktInfo {
231 BYTE byBroadMultiUni; 233 BYTE byBroadMultiUni;
232 WORD wLength; 234 WORD wLength;
233 WORD wFIFOCtl; 235 WORD wFIFOCtl;
234 BYTE abyDestAddr[U_ETHER_ADDR_LEN]; 236 BYTE abyDestAddr[ETH_ALEN];
235} STxPktInfo, *PSTxPktInfo; 237} STxPktInfo, *PSTxPktInfo;
236 238
237 239
@@ -277,15 +279,15 @@ typedef struct tagSStatCounter {
277 DWORD dwRsrMulticast; 279 DWORD dwRsrMulticast;
278 DWORD dwRsrDirected; 280 DWORD dwRsrDirected;
279 // 64-bit OID 281 // 64-bit OID
280 ULONGLONG ullRsrOK; 282 unsigned long long ullRsrOK;
281 283
282 // for some optional OIDs (64 bits) and DMI support 284 // for some optional OIDs (64 bits) and DMI support
283 ULONGLONG ullRxBroadcastBytes; 285 unsigned long long ullRxBroadcastBytes;
284 ULONGLONG ullRxMulticastBytes; 286 unsigned long long ullRxMulticastBytes;
285 ULONGLONG ullRxDirectedBytes; 287 unsigned long long ullRxDirectedBytes;
286 ULONGLONG ullRxBroadcastFrames; 288 unsigned long long ullRxBroadcastFrames;
287 ULONGLONG ullRxMulticastFrames; 289 unsigned long long ullRxMulticastFrames;
288 ULONGLONG ullRxDirectedFrames; 290 unsigned long long ullRxDirectedFrames;
289 291
290 DWORD dwRsrRxFragment; 292 DWORD dwRsrRxFragment;
291 DWORD dwRsrRxFrmLen64; 293 DWORD dwRsrRxFrmLen64;
@@ -330,15 +332,15 @@ typedef struct tagSStatCounter {
330 332
331 333
332 // 64-bit OID 334 // 64-bit OID
333 ULONGLONG ullTsrOK; 335 unsigned long long ullTsrOK;
334 336
335 // for some optional OIDs (64 bits) and DMI support 337 // for some optional OIDs (64 bits) and DMI support
336 ULONGLONG ullTxBroadcastFrames; 338 unsigned long long ullTxBroadcastFrames;
337 ULONGLONG ullTxMulticastFrames; 339 unsigned long long ullTxMulticastFrames;
338 ULONGLONG ullTxDirectedFrames; 340 unsigned long long ullTxDirectedFrames;
339 ULONGLONG ullTxBroadcastBytes; 341 unsigned long long ullTxBroadcastBytes;
340 ULONGLONG ullTxMulticastBytes; 342 unsigned long long ullTxMulticastBytes;
341 ULONGLONG ullTxDirectedBytes; 343 unsigned long long ullTxDirectedBytes;
342 344
343 // for autorate 345 // for autorate
344 DWORD dwTxOk[MAX_RATE+1]; 346 DWORD dwTxOk[MAX_RATE+1];
@@ -356,15 +358,15 @@ typedef struct tagSStatCounter {
356 358
357 #ifdef Calcu_LinkQual 359 #ifdef Calcu_LinkQual
358 //Tx count: 360 //Tx count:
359 ULONG TxNoRetryOkCount; //success tx no retry ! 361 unsigned long TxNoRetryOkCount; /* success tx no retry ! */
360 ULONG TxRetryOkCount; //success tx but retry ! 362 unsigned long TxRetryOkCount; /* success tx but retry ! */
361 ULONG TxFailCount; //fail tx ? 363 unsigned long TxFailCount; /* fail tx ? */
362 //Rx count: 364 //Rx count:
363 ULONG RxOkCnt; //success rx ! 365 unsigned long RxOkCnt; /* success rx ! */
364 ULONG RxFcsErrCnt; //fail rx ? 366 unsigned long RxFcsErrCnt; /* fail rx ? */
365 //statistic 367 //statistic
366 ULONG SignalStren; 368 unsigned long SignalStren;
367 ULONG LinkQuality; 369 unsigned long LinkQuality;
368 #endif 370 #endif
369 371
370} SStatCounter, *PSStatCounter; 372} SStatCounter, *PSStatCounter;
@@ -382,13 +384,14 @@ void STAvClearAllCounter(PSStatCounter pStatistic);
382void STAvUpdateIsrStatCounter (PSStatCounter pStatistic, BYTE byIsr0, BYTE byIsr1); 384void STAvUpdateIsrStatCounter (PSStatCounter pStatistic, BYTE byIsr0, BYTE byIsr1);
383 385
384void STAvUpdateRDStatCounter(PSStatCounter pStatistic, 386void STAvUpdateRDStatCounter(PSStatCounter pStatistic,
385 BYTE byRSR, BYTE byNewRSR, BYTE byRxSts, BYTE byRxRate, 387 BYTE byRSR, BYTE byNewRSR, BYTE byRxSts,
386 PBYTE pbyBuffer, UINT cbFrameLength); 388 BYTE byRxRate, PBYTE pbyBuffer,
389 unsigned int cbFrameLength);
387 390
388void STAvUpdateRDStatCounterEx(PSStatCounter pStatistic, 391void STAvUpdateRDStatCounterEx(PSStatCounter pStatistic,
389 BYTE byRSR, BYTE byNewRSR, BYTE byRxSts, BYTE byRxRate, 392 BYTE byRSR, BYTE byNewRSR, BYTE byRxSts,
390 PBYTE pbyBuffer, UINT cbFrameLength); 393 BYTE byRxRate, PBYTE pbyBuffer,
391 394 unsigned int cbFrameLength);
392 395
393void 396void
394STAvUpdateTDStatCounter ( 397STAvUpdateTDStatCounter (
@@ -417,7 +420,4 @@ STAvUpdateUSBCounter(
417 NTSTATUS ntStatus 420 NTSTATUS ntStatus
418 ); 421 );
419 422
420#endif // __MIB_H__ 423#endif /* __MIB_H__ */
421
422
423
diff --git a/drivers/staging/vt6656/michael.c b/drivers/staging/vt6656/michael.c
index c930e0cdb853..671a8cf33e23 100644
--- a/drivers/staging/vt6656/michael.c
+++ b/drivers/staging/vt6656/michael.c
@@ -48,20 +48,23 @@
48 48
49/*--------------------- Static Functions --------------------------*/ 49/*--------------------- Static Functions --------------------------*/
50/* 50/*
51static DWORD s_dwGetUINT32(BYTE * p); // Get DWORD from 4 bytes LSByte first 51 * static DWORD s_dwGetUINT32(BYTE * p); Get DWORD from
52static VOID s_vPutUINT32(BYTE* p, DWORD val); // Put DWORD into 4 bytes LSByte first 52 * 4 bytes LSByte first
53*/ 53 * static void s_vPutUINT32(BYTE* p, DWORD val); Put DWORD into
54static VOID s_vClear(void); // Clear the internal message, 54 * 4 bytes LSByte first
55 // resets the object to the state just after construction. 55 */
56static VOID s_vSetKey(DWORD dwK0, DWORD dwK1); 56static void s_vClear(void); /* Clear the internal message,
57static VOID s_vAppendByte(BYTE b); // Add a single byte to the internal message 57 * resets the object to the
58 * state just after construction. */
59static void s_vSetKey(DWORD dwK0, DWORD dwK1);
60static void s_vAppendByte(BYTE b); /* Add a single byte to the internal
61 * message */
58 62
59/*--------------------- Export Variables --------------------------*/ 63/*--------------------- Export Variables --------------------------*/
60static DWORD L, R; // Current state 64static DWORD L, R; /* Current state */
61 65static DWORD K0, K1; /* Key */
62static DWORD K0, K1; // Key 66static DWORD M; /* Message accumulator (single word) */
63static DWORD M; // Message accumulator (single word) 67static unsigned int nBytesInM; /* # bytes in M */
64static UINT nBytesInM; // # bytes in M
65 68
66/*--------------------- Export Functions --------------------------*/ 69/*--------------------- Export Functions --------------------------*/
67 70
@@ -69,113 +72,105 @@ static UINT nBytesInM; // # bytes in M
69static DWORD s_dwGetUINT32 (BYTE * p) 72static DWORD s_dwGetUINT32 (BYTE * p)
70// Convert from BYTE[] to DWORD in a portable way 73// Convert from BYTE[] to DWORD in a portable way
71{ 74{
72 DWORD res = 0; 75 DWORD res = 0;
73 UINT i; 76 unsigned int i;
74 for(i=0; i<4; i++ ) 77 for(i=0; i<4; i++ )
75 { 78 res |= (*p++) << (8*i);
76 res |= (*p++) << (8*i); 79 return res;
77 }
78 return res;
79} 80}
80 81
81static VOID s_vPutUINT32 (BYTE* p, DWORD val) 82static void s_vPutUINT32(BYTE *p, DWORD val)
82// Convert from DWORD to BYTE[] in a portable way 83// Convert from DWORD to BYTE[] in a portable way
83{ 84{
84 UINT i; 85 unsigned int i;
85 for(i=0; i<4; i++ ) 86 for(i=0; i<4; i++ ) {
86 { 87 *p++ = (BYTE) (val & 0xff);
87 *p++ = (BYTE) (val & 0xff); 88 val >>= 8;
88 val >>= 8; 89 }
89 }
90} 90}
91*/ 91*/
92 92
93static VOID s_vClear (void) 93static void s_vClear(void)
94{ 94{
95 // Reset the state to the empty message. 95 /* Reset the state to the empty message. */
96 L = K0; 96 L = K0;
97 R = K1; 97 R = K1;
98 nBytesInM = 0; 98 nBytesInM = 0;
99 M = 0; 99 M = 0;
100} 100}
101 101
102static VOID s_vSetKey (DWORD dwK0, DWORD dwK1) 102static void s_vSetKey(DWORD dwK0, DWORD dwK1)
103{ 103{
104 // Set the key 104 /* Set the key */
105 K0 = dwK0; 105 K0 = dwK0;
106 K1 = dwK1; 106 K1 = dwK1;
107 // and reset the message 107 /* and reset the message */
108 s_vClear(); 108 s_vClear();
109} 109}
110 110
111static VOID s_vAppendByte (BYTE b) 111static void s_vAppendByte(BYTE b)
112{ 112{
113 // Append the byte to our word-sized buffer 113 /* Append the byte to our word-sized buffer */
114 M |= b << (8*nBytesInM); 114 M |= b << (8*nBytesInM);
115 nBytesInM++; 115 nBytesInM++;
116 // Process the word if it is full. 116 /* Process the word if it is full. */
117 if( nBytesInM >= 4 ) 117 if (nBytesInM >= 4) {
118 { 118 L ^= M;
119 L ^= M; 119 R ^= ROL32(L, 17);
120 R ^= ROL32( L, 17 ); 120 L += R;
121 L += R; 121 R ^= ((L & 0xff00ff00) >> 8) | ((L & 0x00ff00ff) << 8);
122 R ^= ((L & 0xff00ff00) >> 8) | ((L & 0x00ff00ff) << 8); 122 L += R;
123 L += R; 123 R ^= ROL32(L, 3);
124 R ^= ROL32( L, 3 ); 124 L += R;
125 L += R; 125 R ^= ROR32(L, 2);
126 R ^= ROR32( L, 2 ); 126 L += R;
127 L += R; 127 /* Clear the buffer */
128 // Clear the buffer 128 M = 0;
129 M = 0; 129 nBytesInM = 0;
130 nBytesInM = 0; 130 }
131 }
132} 131}
133 132
134VOID MIC_vInit (DWORD dwK0, DWORD dwK1) 133void MIC_vInit(DWORD dwK0, DWORD dwK1)
135{ 134{
136 // Set the key 135 /* Set the key */
137 s_vSetKey(dwK0, dwK1); 136 s_vSetKey(dwK0, dwK1);
138} 137}
139 138
140 139
141VOID MIC_vUnInit (void) 140void MIC_vUnInit(void)
142{ 141{
143 // Wipe the key material 142 /* Wipe the key material */
144 K0 = 0; 143 K0 = 0;
145 K1 = 0; 144 K1 = 0;
146 145
147 // And the other fields as well. 146 /* And the other fields as well. */
148 //Note that this sets (L,R) to (K0,K1) which is just fine. 147 /* Note that this sets (L,R) to (K0,K1) which is just fine. */
149 s_vClear(); 148 s_vClear();
150} 149}
151 150
152VOID MIC_vAppend (PBYTE src, UINT nBytes) 151void MIC_vAppend(PBYTE src, unsigned int nBytes)
153{ 152{
154 // This is simple 153 /* This is simple */
155 while (nBytes > 0) 154 while (nBytes > 0) {
156 { 155 s_vAppendByte(*src++);
157 s_vAppendByte(*src++); 156 nBytes--;
158 nBytes--; 157 }
159 }
160} 158}
161 159
162VOID MIC_vGetMIC (PDWORD pdwL, PDWORD pdwR) 160void MIC_vGetMIC(PDWORD pdwL, PDWORD pdwR)
163{ 161{
164 // Append the minimum padding 162 /* Append the minimum padding */
165 s_vAppendByte(0x5a); 163 s_vAppendByte(0x5a);
166 s_vAppendByte(0); 164 s_vAppendByte(0);
167 s_vAppendByte(0); 165 s_vAppendByte(0);
168 s_vAppendByte(0); 166 s_vAppendByte(0);
169 s_vAppendByte(0); 167 s_vAppendByte(0);
170 // and then zeroes until the length is a multiple of 4 168 /* and then zeroes until the length is a multiple of 4 */
171 while( nBytesInM != 0 ) 169 while (nBytesInM != 0)
172 { 170 s_vAppendByte(0);
173 s_vAppendByte(0); 171 /* The s_vAppendByte function has already computed the result. */
174 } 172 *pdwL = L;
175 // The s_vAppendByte function has already computed the result. 173 *pdwR = R;
176 *pdwL = L; 174 /* Reset to the empty message. */
177 *pdwR = R; 175 s_vClear();
178 // Reset to the empty message.
179 s_vClear();
180} 176}
181
diff --git a/drivers/staging/vt6656/michael.h b/drivers/staging/vt6656/michael.h
index 3f79b52832d1..3ab60928ef35 100644
--- a/drivers/staging/vt6656/michael.h
+++ b/drivers/staging/vt6656/michael.h
@@ -35,16 +35,16 @@
35 35
36/*--------------------- Export Types ------------------------------*/ 36/*--------------------- Export Types ------------------------------*/
37 37
38VOID MIC_vInit(DWORD dwK0, DWORD dwK1); 38void MIC_vInit(DWORD dwK0, DWORD dwK1);
39 39
40VOID MIC_vUnInit(void); 40void MIC_vUnInit(void);
41 41
42// Append bytes to the message to be MICed 42// Append bytes to the message to be MICed
43VOID MIC_vAppend(PBYTE src, UINT nBytes); 43void MIC_vAppend(PBYTE src, unsigned int nBytes);
44 44
45// Get the MIC result. Destination should accept 8 bytes of result. 45// Get the MIC result. Destination should accept 8 bytes of result.
46// This also resets the message to empty. 46// This also resets the message to empty.
47VOID MIC_vGetMIC(PDWORD pdwL, PDWORD pdwR); 47void MIC_vGetMIC(PDWORD pdwL, PDWORD pdwR);
48 48
49/*--------------------- Export Macros ------------------------------*/ 49/*--------------------- Export Macros ------------------------------*/
50 50
@@ -53,6 +53,4 @@ VOID MIC_vGetMIC(PDWORD pdwL, PDWORD pdwR);
53 ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) ) 53 ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) )
54#define ROR32( A, n ) ROL32( (A), 32-(n) ) 54#define ROR32( A, n ) ROL32( (A), 32-(n) )
55 55
56#endif //__MICHAEL_H__ 56#endif /* __MICHAEL_H__ */
57
58
diff --git a/drivers/staging/vt6656/power.c b/drivers/staging/vt6656/power.c
index b5702b098e18..766c5be6fd22 100644
--- a/drivers/staging/vt6656/power.c
+++ b/drivers/staging/vt6656/power.c
@@ -50,19 +50,14 @@
50 50
51/*--------------------- Static Definitions -------------------------*/ 51/*--------------------- Static Definitions -------------------------*/
52 52
53
54
55
56/*--------------------- Static Classes ----------------------------*/ 53/*--------------------- Static Classes ----------------------------*/
57 54
58/*--------------------- Static Variables --------------------------*/ 55/*--------------------- Static Variables --------------------------*/
59static int msglevel =MSG_LEVEL_INFO; 56static int msglevel =MSG_LEVEL_INFO;
60/*--------------------- Static Functions --------------------------*/ 57/*--------------------- Static Functions --------------------------*/
61 58
62
63/*--------------------- Export Variables --------------------------*/ 59/*--------------------- Export Variables --------------------------*/
64 60
65
66/*--------------------- Export Functions --------------------------*/ 61/*--------------------- Export Functions --------------------------*/
67 62
68/*+ 63/*+
@@ -75,12 +70,8 @@ static int msglevel =MSG_LEVEL_INFO;
75 * 70 *
76-*/ 71-*/
77 72
78 73void PSvEnablePowerSaving(void *hDeviceContext,
79VOID 74 WORD wListenInterval)
80PSvEnablePowerSaving(
81 IN HANDLE hDeviceContext,
82 IN WORD wListenInterval
83 )
84{ 75{
85 PSDevice pDevice = (PSDevice)hDeviceContext; 76 PSDevice pDevice = (PSDevice)hDeviceContext;
86 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 77 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -128,7 +119,7 @@ PSvEnablePowerSaving(
128 pDevice->bEnablePSMode = TRUE; 119 pDevice->bEnablePSMode = TRUE;
129 120
130 if (pDevice->eOPMode == OP_MODE_ADHOC) { 121 if (pDevice->eOPMode == OP_MODE_ADHOC) {
131// bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt); 122 /* bMgrPrepareBeaconToSend((void *) pDevice, pMgmt); */
132 } 123 }
133 // We don't send null pkt in ad hoc mode since beacon will handle this. 124 // We don't send null pkt in ad hoc mode since beacon will handle this.
134 else if (pDevice->eOPMode == OP_MODE_INFRASTRUCTURE) { 125 else if (pDevice->eOPMode == OP_MODE_INFRASTRUCTURE) {
@@ -139,11 +130,6 @@ PSvEnablePowerSaving(
139 return; 130 return;
140} 131}
141 132
142
143
144
145
146
147/*+ 133/*+
148 * 134 *
149 * Routine Description: 135 * Routine Description:
@@ -154,10 +140,7 @@ PSvEnablePowerSaving(
154 * 140 *
155-*/ 141-*/
156 142
157VOID 143void PSvDisablePowerSaving(void *hDeviceContext)
158PSvDisablePowerSaving(
159 IN HANDLE hDeviceContext
160 )
161{ 144{
162 PSDevice pDevice = (PSDevice)hDeviceContext; 145 PSDevice pDevice = (PSDevice)hDeviceContext;
163// PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 146// PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -187,7 +170,6 @@ PSvDisablePowerSaving(
187 return; 170 return;
188} 171}
189 172
190
191/*+ 173/*+
192 * 174 *
193 * Routine Description: 175 * Routine Description:
@@ -198,13 +180,9 @@ PSvDisablePowerSaving(
198 * FALSE, if fail 180 * FALSE, if fail
199-*/ 181-*/
200 182
201 183BOOL PSbConsiderPowerDown(void *hDeviceContext,
202BOOL 184 BOOL bCheckRxDMA,
203PSbConsiderPowerDown( 185 BOOL bCheckCountToWakeUp)
204 IN HANDLE hDeviceContext,
205 IN BOOL bCheckRxDMA,
206 IN BOOL bCheckCountToWakeUp
207 )
208{ 186{
209 PSDevice pDevice = (PSDevice)hDeviceContext; 187 PSDevice pDevice = (PSDevice)hDeviceContext;
210 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 188 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -248,8 +226,6 @@ PSbConsiderPowerDown(
248 return TRUE; 226 return TRUE;
249} 227}
250 228
251
252
253/*+ 229/*+
254 * 230 *
255 * Routine Description: 231 * Routine Description:
@@ -260,12 +236,7 @@ PSbConsiderPowerDown(
260 * 236 *
261-*/ 237-*/
262 238
263 239void PSvSendPSPOLL(void *hDeviceContext)
264
265VOID
266PSvSendPSPOLL(
267 IN HANDLE hDeviceContext
268 )
269{ 240{
270 PSDevice pDevice = (PSDevice)hDeviceContext; 241 PSDevice pDevice = (PSDevice)hDeviceContext;
271 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 242 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -297,8 +268,6 @@ PSvSendPSPOLL(
297 return; 268 return;
298} 269}
299 270
300
301
302/*+ 271/*+
303 * 272 *
304 * Routine Description: 273 * Routine Description:
@@ -308,10 +277,8 @@ PSvSendPSPOLL(
308 * None. 277 * None.
309 * 278 *
310-*/ 279-*/
311BOOL 280
312PSbSendNullPacket( 281BOOL PSbSendNullPacket(void *hDeviceContext)
313 IN HANDLE hDeviceContext
314 )
315{ 282{
316 PSDevice pDevice = (PSDevice)hDeviceContext; 283 PSDevice pDevice = (PSDevice)hDeviceContext;
317 PSTxMgmtPacket pTxPacket = NULL; 284 PSTxMgmtPacket pTxPacket = NULL;
@@ -388,10 +355,7 @@ PSbSendNullPacket(
388 * 355 *
389-*/ 356-*/
390 357
391BOOL 358BOOL PSbIsNextTBTTWakeUp(void *hDeviceContext)
392PSbIsNextTBTTWakeUp(
393 IN HANDLE hDeviceContext
394 )
395{ 359{
396 360
397 PSDevice pDevice = (PSDevice)hDeviceContext; 361 PSDevice pDevice = (PSDevice)hDeviceContext;
diff --git a/drivers/staging/vt6656/power.h b/drivers/staging/vt6656/power.h
index c33c93a86f5e..50792bb8c978 100644
--- a/drivers/staging/vt6656/power.h
+++ b/drivers/staging/vt6656/power.h
@@ -45,40 +45,17 @@
45 45
46/*--------------------- Export Functions --------------------------*/ 46/*--------------------- Export Functions --------------------------*/
47 47
48// IN PSDevice pDevice 48/* PSDevice pDevice */
49// IN PSDevice hDeviceContext 49/* PSDevice hDeviceContext */
50 50
51BOOL 51BOOL PSbConsiderPowerDown(void *hDeviceContext,
52PSbConsiderPowerDown( 52 BOOL bCheckRxDMA,
53 IN HANDLE hDeviceContext, 53 BOOL bCheckCountToWakeUp);
54 IN BOOL bCheckRxDMA,
55 IN BOOL bCheckCountToWakeUp
56 );
57 54
58VOID 55void PSvDisablePowerSaving(void *hDeviceContext);
59PSvDisablePowerSaving( 56void PSvEnablePowerSaving(void *hDeviceContext, WORD wListenInterval);
60 IN HANDLE hDeviceContext 57void PSvSendPSPOLL(void *hDeviceContext);
61 ); 58BOOL PSbSendNullPacket(void *hDeviceContext);
59BOOL PSbIsNextTBTTWakeUp(void *hDeviceContext);
62 60
63VOID 61#endif /* __POWER_H__ */
64PSvEnablePowerSaving(
65 IN HANDLE hDeviceContext,
66 IN WORD wListenInterval
67 );
68
69VOID
70PSvSendPSPOLL(
71 IN HANDLE hDeviceContext
72 );
73
74BOOL
75PSbSendNullPacket(
76 IN HANDLE hDeviceContext
77 );
78
79BOOL
80PSbIsNextTBTTWakeUp(
81 IN HANDLE hDeviceContext
82 );
83
84#endif //__POWER_H__
diff --git a/drivers/staging/vt6656/rc4.c b/drivers/staging/vt6656/rc4.c
index e6c61312fd28..5c3c2d0552b4 100644
--- a/drivers/staging/vt6656/rc4.c
+++ b/drivers/staging/vt6656/rc4.c
@@ -32,56 +32,56 @@
32 32
33#include "rc4.h" 33#include "rc4.h"
34 34
35VOID rc4_init(PRC4Ext pRC4, PBYTE pbyKey, UINT cbKey_len) 35void rc4_init(PRC4Ext pRC4, PBYTE pbyKey, unsigned int cbKey_len)
36{ 36{
37 UINT ust1, ust2; 37 unsigned int ust1, ust2;
38 UINT keyindex; 38 unsigned int keyindex;
39 UINT stateindex; 39 unsigned int stateindex;
40 PBYTE pbyst; 40 PBYTE pbyst;
41 UINT idx; 41 unsigned int idx;
42 42
43 pbyst = pRC4->abystate; 43 pbyst = pRC4->abystate;
44 pRC4->ux = 0; 44 pRC4->ux = 0;
45 pRC4->uy = 0; 45 pRC4->uy = 0;
46 for (idx = 0; idx < 256; idx++) 46 for (idx = 0; idx < 256; idx++)
47 pbyst[idx] = (BYTE)idx; 47 pbyst[idx] = (BYTE)idx;
48 keyindex = 0; 48 keyindex = 0;
49 stateindex = 0; 49 stateindex = 0;
50 for (idx = 0; idx < 256; idx++) { 50 for (idx = 0; idx < 256; idx++) {
51 ust1 = pbyst[idx]; 51 ust1 = pbyst[idx];
52 stateindex = (stateindex + pbyKey[keyindex] + ust1) & 0xff; 52 stateindex = (stateindex + pbyKey[keyindex] + ust1) & 0xff;
53 ust2 = pbyst[stateindex]; 53 ust2 = pbyst[stateindex];
54 pbyst[stateindex] = (BYTE)ust1; 54 pbyst[stateindex] = (BYTE)ust1;
55 pbyst[idx] = (BYTE)ust2; 55 pbyst[idx] = (BYTE)ust2;
56 if (++keyindex >= cbKey_len) 56 if (++keyindex >= cbKey_len)
57 keyindex = 0; 57 keyindex = 0;
58 } 58 }
59} 59}
60 60
61UINT rc4_byte(PRC4Ext pRC4) 61unsigned int rc4_byte(PRC4Ext pRC4)
62{ 62{
63 UINT ux; 63 unsigned int ux;
64 UINT uy; 64 unsigned int uy;
65 UINT ustx, usty; 65 unsigned int ustx, usty;
66 PBYTE pbyst; 66 PBYTE pbyst;
67 67
68 pbyst = pRC4->abystate; 68 pbyst = pRC4->abystate;
69 ux = (pRC4->ux + 1) & 0xff; 69 ux = (pRC4->ux + 1) & 0xff;
70 ustx = pbyst[ux]; 70 ustx = pbyst[ux];
71 uy = (ustx + pRC4->uy) & 0xff; 71 uy = (ustx + pRC4->uy) & 0xff;
72 usty = pbyst[uy]; 72 usty = pbyst[uy];
73 pRC4->ux = ux; 73 pRC4->ux = ux;
74 pRC4->uy = uy; 74 pRC4->uy = uy;
75 pbyst[uy] = (BYTE)ustx; 75 pbyst[uy] = (BYTE)ustx;
76 pbyst[ux] = (BYTE)usty; 76 pbyst[ux] = (BYTE)usty;
77 77
78 return pbyst[(ustx + usty) & 0xff]; 78 return pbyst[(ustx + usty) & 0xff];
79} 79}
80 80
81VOID rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest, 81void rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest,
82 PBYTE pbySrc, UINT cbData_len) 82 PBYTE pbySrc, unsigned int cbData_len)
83{ 83{
84 UINT ii; 84 unsigned int ii;
85 for (ii = 0; ii < cbData_len; ii++) 85 for (ii = 0; ii < cbData_len; ii++)
86 pbyDest[ii] = (BYTE)(pbySrc[ii] ^ rc4_byte(pRC4)); 86 pbyDest[ii] = (BYTE)(pbySrc[ii] ^ rc4_byte(pRC4));
87} 87}
diff --git a/drivers/staging/vt6656/rc4.h b/drivers/staging/vt6656/rc4.h
index bf607c9d446a..d447879c8f99 100644
--- a/drivers/staging/vt6656/rc4.h
+++ b/drivers/staging/vt6656/rc4.h
@@ -35,13 +35,14 @@
35/*--------------------- Export Definitions -------------------------*/ 35/*--------------------- Export Definitions -------------------------*/
36/*--------------------- Export Types ------------------------------*/ 36/*--------------------- Export Types ------------------------------*/
37typedef struct { 37typedef struct {
38 UINT ux; 38 unsigned int ux;
39 UINT uy; 39 unsigned int uy;
40 BYTE abystate[256]; 40 BYTE abystate[256];
41} RC4Ext, *PRC4Ext; 41} RC4Ext, *PRC4Ext;
42 42
43VOID rc4_init(PRC4Ext pRC4, PBYTE pbyKey, UINT cbKey_len); 43void rc4_init(PRC4Ext pRC4, PBYTE pbyKey, unsigned int cbKey_len);
44UINT rc4_byte(PRC4Ext pRC4); 44unsigned int rc4_byte(PRC4Ext pRC4);
45void rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest, PBYTE pbySrc, UINT cbData_len); 45void rc4_encrypt(PRC4Ext pRC4, PBYTE pbyDest, PBYTE pbySrc,
46 unsigned int cbData_len);
46 47
47#endif //__RC4_H__ 48#endif /* __RC4_H__ */
diff --git a/drivers/staging/vt6656/rf.c b/drivers/staging/vt6656/rf.c
index 405c4f71b5fd..3fd0478a9a54 100644
--- a/drivers/staging/vt6656/rf.c
+++ b/drivers/staging/vt6656/rf.c
@@ -757,9 +757,9 @@ BOOL IFRFbWriteEmbeded (PSDevice pDevice, DWORD dwData)
757 * 757 *
758 */ 758 */
759BOOL RFbSetPower ( 759BOOL RFbSetPower (
760 IN PSDevice pDevice, 760 PSDevice pDevice,
761 IN UINT uRATE, 761 unsigned int uRATE,
762 IN UINT uCH 762 unsigned int uCH
763 ) 763 )
764{ 764{
765BOOL bResult = TRUE; 765BOOL bResult = TRUE;
@@ -811,9 +811,9 @@ BYTE byPwr = pDevice->byCCKPwr;
811 * 811 *
812 */ 812 */
813BOOL RFbRawSetPower ( 813BOOL RFbRawSetPower (
814 IN PSDevice pDevice, 814 PSDevice pDevice,
815 IN BYTE byPwr, 815 BYTE byPwr,
816 IN UINT uRATE 816 unsigned int uRATE
817 ) 817 )
818{ 818{
819BOOL bResult = TRUE; 819BOOL bResult = TRUE;
@@ -954,16 +954,16 @@ BOOL bResult = TRUE;
954 * Return Value: none 954 * Return Value: none
955 * 955 *
956-*/ 956-*/
957VOID 957void
958RFvRSSITodBm ( 958RFvRSSITodBm (
959 IN PSDevice pDevice, 959 PSDevice pDevice,
960 IN BYTE byCurrRSSI, 960 BYTE byCurrRSSI,
961 long * pldBm 961 long * pldBm
962 ) 962 )
963{ 963{
964 BYTE byIdx = (((byCurrRSSI & 0xC0) >> 6) & 0x03); 964 BYTE byIdx = (((byCurrRSSI & 0xC0) >> 6) & 0x03);
965 LONG b = (byCurrRSSI & 0x3F); 965 signed long b = (byCurrRSSI & 0x3F);
966 LONG a = 0; 966 signed long a = 0;
967 BYTE abyAIROHARF[4] = {0, 18, 0, 40}; 967 BYTE abyAIROHARF[4] = {0, 18, 0, 40};
968 968
969 switch (pDevice->byRFType) { 969 switch (pDevice->byRFType) {
@@ -984,9 +984,9 @@ RFvRSSITodBm (
984 984
985 985
986 986
987VOID 987void
988RFbRFTableDownload ( 988RFbRFTableDownload (
989 IN PSDevice pDevice 989 PSDevice pDevice
990 ) 990 )
991{ 991{
992WORD wLength1 = 0,wLength2 = 0 ,wLength3 = 0; 992WORD wLength1 = 0,wLength2 = 0 ,wLength3 = 0;
@@ -1133,9 +1133,9 @@ BYTE abyArray[256];
1133 1133
1134// RobertYu:20060412, TWIF1.11 adjust LO Current for 11b mode 1134// RobertYu:20060412, TWIF1.11 adjust LO Current for 11b mode
1135BOOL s_bVT3226D0_11bLoCurrentAdjust( 1135BOOL s_bVT3226D0_11bLoCurrentAdjust(
1136 IN PSDevice pDevice, 1136 PSDevice pDevice,
1137 IN BYTE byChannel, 1137 BYTE byChannel,
1138 IN BOOL b11bMode ) 1138 BOOL b11bMode)
1139{ 1139{
1140 BOOL bResult; 1140 BOOL bResult;
1141 1141
diff --git a/drivers/staging/vt6656/rf.h b/drivers/staging/vt6656/rf.h
index 55d882f78f20..d4f8b94132b9 100644
--- a/drivers/staging/vt6656/rf.h
+++ b/drivers/staging/vt6656/rf.h
@@ -65,36 +65,33 @@ extern const BYTE RFaby11aChannelIndex[200];
65 65
66BOOL IFRFbWriteEmbeded(PSDevice pDevice, DWORD dwData); 66BOOL IFRFbWriteEmbeded(PSDevice pDevice, DWORD dwData);
67BOOL RFbSetPower ( 67BOOL RFbSetPower (
68 IN PSDevice pDevice, 68 PSDevice pDevice,
69 IN UINT uRATE, 69 unsigned int uRATE,
70 IN UINT uCH 70 unsigned int uCH
71 ); 71 );
72 72
73BOOL RFbRawSetPower( 73BOOL RFbRawSetPower(
74 IN PSDevice pDevice, 74 PSDevice pDevice,
75 IN BYTE byPwr, 75 BYTE byPwr,
76 IN UINT uRATE 76 unsigned int uRATE
77 ); 77 );
78 78
79VOID 79void
80RFvRSSITodBm ( 80RFvRSSITodBm (
81 IN PSDevice pDevice, 81 PSDevice pDevice,
82 IN BYTE byCurrRSSI, 82 BYTE byCurrRSSI,
83 long * pldBm 83 long * pldBm
84 ); 84 );
85 85
86VOID 86void
87RFbRFTableDownload ( 87RFbRFTableDownload (
88 IN PSDevice pDevice 88 PSDevice pDevice
89 ); 89 );
90 90
91BOOL s_bVT3226D0_11bLoCurrentAdjust( 91BOOL s_bVT3226D0_11bLoCurrentAdjust(
92 IN PSDevice pDevice, 92 PSDevice pDevice,
93 IN BYTE byChannel, 93 BYTE byChannel,
94 IN BOOL b11bMode 94 BOOL b11bMode
95 ); 95 );
96 96
97#endif // __RF_H__ 97#endif /* __RF_H__ */
98
99
100
diff --git a/drivers/staging/vt6656/rndis.h b/drivers/staging/vt6656/rndis.h
index 1d32d81079b6..ac842dd13a68 100644
--- a/drivers/staging/vt6656/rndis.h
+++ b/drivers/staging/vt6656/rndis.h
@@ -158,5 +158,4 @@ typedef struct _CMD_CHANGE_BBTYPE
158 158
159/*--------------------- Export Functions --------------------------*/ 159/*--------------------- Export Functions --------------------------*/
160 160
161 161#endif /* _RNDIS_H_ */
162#endif // _RNDIS_H_
diff --git a/drivers/staging/vt6656/rxtx.c b/drivers/staging/vt6656/rxtx.c
index a2ce6fad8ee5..3e7e56649a5f 100644
--- a/drivers/staging/vt6656/rxtx.c
+++ b/drivers/staging/vt6656/rxtx.c
@@ -113,181 +113,173 @@ const WORD wFB_Opt1[2][5] = {
113/*--------------------- Static Functions --------------------------*/ 113/*--------------------- Static Functions --------------------------*/
114 114
115static 115static
116VOID 116void
117s_vSaveTxPktInfo( 117s_vSaveTxPktInfo(
118 IN PSDevice pDevice, 118 PSDevice pDevice,
119 IN BYTE byPktNum, 119 BYTE byPktNum,
120 IN PBYTE pbyDestAddr, 120 PBYTE pbyDestAddr,
121 IN WORD wPktLength, 121 WORD wPktLength,
122 IN WORD wFIFOCtl 122 WORD wFIFOCtl
123); 123);
124 124
125static 125static
126PVOID 126void *
127s_vGetFreeContext( 127s_vGetFreeContext(
128 PSDevice pDevice 128 PSDevice pDevice
129 ); 129 );
130 130
131 131
132static 132static
133VOID 133void
134s_vGenerateTxParameter( 134s_vGenerateTxParameter(
135 IN PSDevice pDevice, 135 PSDevice pDevice,
136 IN BYTE byPktType, 136 BYTE byPktType,
137 IN WORD wCurrentRate, 137 WORD wCurrentRate,
138 IN PVOID pTxBufHead, 138 void *pTxBufHead,
139 IN PVOID pvRrvTime, 139 void *pvRrvTime,
140 IN PVOID pvRTS, 140 void *pvRTS,
141 IN PVOID pvCTS, 141 void *pvCTS,
142 IN UINT cbFrameSize, 142 unsigned int cbFrameSize,
143 IN BOOL bNeedACK, 143 BOOL bNeedACK,
144 IN UINT uDMAIdx, 144 unsigned int uDMAIdx,
145 IN PSEthernetHeader psEthHeader 145 PSEthernetHeader psEthHeader
146 ); 146 );
147 147
148 148
149static 149static unsigned int s_uFillDataHead(
150UINT 150 PSDevice pDevice,
151s_uFillDataHead ( 151 BYTE byPktType,
152 IN PSDevice pDevice, 152 WORD wCurrentRate,
153 IN BYTE byPktType, 153 void *pTxDataHead,
154 IN WORD wCurrentRate, 154 unsigned int cbFrameLength,
155 IN PVOID pTxDataHead, 155 unsigned int uDMAIdx,
156 IN UINT cbFrameLength, 156 BOOL bNeedAck,
157 IN UINT uDMAIdx, 157 unsigned int uFragIdx,
158 IN BOOL bNeedAck, 158 unsigned int cbLastFragmentSize,
159 IN UINT uFragIdx, 159 unsigned int uMACfragNum,
160 IN UINT cbLastFragmentSize, 160 BYTE byFBOption
161 IN UINT uMACfragNum,
162 IN BYTE byFBOption
163 ); 161 );
164 162
165 163
166 164
167 165
168static 166static
169VOID 167void
170s_vGenerateMACHeader ( 168s_vGenerateMACHeader (
171 IN PSDevice pDevice, 169 PSDevice pDevice,
172 IN PBYTE pbyBufferAddr, 170 PBYTE pbyBufferAddr,
173 IN WORD wDuration, 171 WORD wDuration,
174 IN PSEthernetHeader psEthHeader, 172 PSEthernetHeader psEthHeader,
175 IN BOOL bNeedEncrypt, 173 BOOL bNeedEncrypt,
176 IN WORD wFragType, 174 WORD wFragType,
177 IN UINT uDMAIdx, 175 unsigned int uDMAIdx,
178 IN UINT uFragIdx 176 unsigned int uFragIdx
179 ); 177 );
180 178
181static 179static
182VOID 180void
183s_vFillTxKey( 181s_vFillTxKey(
184 IN PSDevice pDevice, 182 PSDevice pDevice,
185 IN PBYTE pbyBuf, 183 PBYTE pbyBuf,
186 IN PBYTE pbyIVHead, 184 PBYTE pbyIVHead,
187 IN PSKeyItem pTransmitKey, 185 PSKeyItem pTransmitKey,
188 IN PBYTE pbyHdrBuf, 186 PBYTE pbyHdrBuf,
189 IN WORD wPayloadLen, 187 WORD wPayloadLen,
190 OUT PBYTE pMICHDR 188 PBYTE pMICHDR
191 ); 189 );
192 190
193static 191static
194VOID 192void
195s_vSWencryption ( 193s_vSWencryption (
196 IN PSDevice pDevice, 194 PSDevice pDevice,
197 IN PSKeyItem pTransmitKey, 195 PSKeyItem pTransmitKey,
198 IN PBYTE pbyPayloadHead, 196 PBYTE pbyPayloadHead,
199 IN WORD wPayloadSize 197 WORD wPayloadSize
200 ); 198 );
201 199
202static 200static unsigned int s_uGetTxRsvTime(
203UINT 201 PSDevice pDevice,
204s_uGetTxRsvTime ( 202 BYTE byPktType,
205 IN PSDevice pDevice, 203 unsigned int cbFrameLength,
206 IN BYTE byPktType, 204 WORD wRate,
207 IN UINT cbFrameLength, 205 BOOL bNeedAck
208 IN WORD wRate,
209 IN BOOL bNeedAck
210 ); 206 );
211 207
212 208
213static 209static unsigned int s_uGetRTSCTSRsvTime(
214UINT 210 PSDevice pDevice,
215s_uGetRTSCTSRsvTime ( 211 BYTE byRTSRsvType,
216 IN PSDevice pDevice, 212 BYTE byPktType,
217 IN BYTE byRTSRsvType, 213 unsigned int cbFrameLength,
218 IN BYTE byPktType, 214 WORD wCurrentRate
219 IN UINT cbFrameLength,
220 IN WORD wCurrentRate
221 ); 215 );
222 216
223static 217static
224VOID 218void
225s_vFillCTSHead ( 219s_vFillCTSHead (
226 IN PSDevice pDevice, 220 PSDevice pDevice,
227 IN UINT uDMAIdx, 221 unsigned int uDMAIdx,
228 IN BYTE byPktType, 222 BYTE byPktType,
229 IN PVOID pvCTS, 223 void *pvCTS,
230 IN UINT cbFrameLength, 224 unsigned int cbFrameLength,
231 IN BOOL bNeedAck, 225 BOOL bNeedAck,
232 IN BOOL bDisCRC, 226 BOOL bDisCRC,
233 IN WORD wCurrentRate, 227 WORD wCurrentRate,
234 IN BYTE byFBOption 228 BYTE byFBOption
235 ); 229 );
236 230
237static 231static
238VOID 232void
239s_vFillRTSHead( 233s_vFillRTSHead(
240 IN PSDevice pDevice, 234 PSDevice pDevice,
241 IN BYTE byPktType, 235 BYTE byPktType,
242 IN PVOID pvRTS, 236 void *pvRTS,
243 IN UINT cbFrameLength, 237 unsigned int cbFrameLength,
244 IN BOOL bNeedAck, 238 BOOL bNeedAck,
245 IN BOOL bDisCRC, 239 BOOL bDisCRC,
246 IN PSEthernetHeader psEthHeader, 240 PSEthernetHeader psEthHeader,
247 IN WORD wCurrentRate, 241 WORD wCurrentRate,
248 IN BYTE byFBOption 242 BYTE byFBOption
249 ); 243 );
250 244
251static 245static unsigned int s_uGetDataDuration(
252UINT 246 PSDevice pDevice,
253s_uGetDataDuration ( 247 BYTE byDurType,
254 IN PSDevice pDevice, 248 unsigned int cbFrameLength,
255 IN BYTE byDurType, 249 BYTE byPktType,
256 IN UINT cbFrameLength, 250 WORD wRate,
257 IN BYTE byPktType, 251 BOOL bNeedAck,
258 IN WORD wRate, 252 unsigned int uFragIdx,
259 IN BOOL bNeedAck, 253 unsigned int cbLastFragmentSize,
260 IN UINT uFragIdx, 254 unsigned int uMACfragNum,
261 IN UINT cbLastFragmentSize, 255 BYTE byFBOption
262 IN UINT uMACfragNum,
263 IN BYTE byFBOption
264 ); 256 );
265 257
266 258
267static 259static
268UINT 260unsigned int
269s_uGetRTSCTSDuration ( 261s_uGetRTSCTSDuration (
270 IN PSDevice pDevice, 262 PSDevice pDevice,
271 IN BYTE byDurType, 263 BYTE byDurType,
272 IN UINT cbFrameLength, 264 unsigned int cbFrameLength,
273 IN BYTE byPktType, 265 BYTE byPktType,
274 IN WORD wRate, 266 WORD wRate,
275 IN BOOL bNeedAck, 267 BOOL bNeedAck,
276 IN BYTE byFBOption 268 BYTE byFBOption
277 ); 269 );
278 270
279 271
280/*--------------------- Export Variables --------------------------*/ 272/*--------------------- Export Variables --------------------------*/
281 273
282static 274static
283PVOID 275void *
284s_vGetFreeContext( 276s_vGetFreeContext(
285 PSDevice pDevice 277 PSDevice pDevice
286 ) 278 )
287{ 279{
288 PUSB_SEND_CONTEXT pContext = NULL; 280 PUSB_SEND_CONTEXT pContext = NULL;
289 PUSB_SEND_CONTEXT pReturnContext = NULL; 281 PUSB_SEND_CONTEXT pReturnContext = NULL;
290 UINT ii; 282 unsigned int ii;
291 283
292 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"GetFreeContext()\n"); 284 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"GetFreeContext()\n");
293 285
@@ -302,12 +294,12 @@ s_vGetFreeContext(
302 if ( ii == pDevice->cbTD ) { 294 if ( ii == pDevice->cbTD ) {
303 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"No Free Tx Context\n"); 295 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"No Free Tx Context\n");
304 } 296 }
305 return ((PVOID) pReturnContext); 297 return (void *) pReturnContext;
306} 298}
307 299
308 300
309static 301static
310VOID 302void
311s_vSaveTxPktInfo(PSDevice pDevice, BYTE byPktNum, PBYTE pbyDestAddr, WORD wPktLength, WORD wFIFOCtl) 303s_vSaveTxPktInfo(PSDevice pDevice, BYTE byPktNum, PBYTE pbyDestAddr, WORD wPktLength, WORD wFIFOCtl)
312{ 304{
313 PSStatCounter pStatistic=&(pDevice->scStatistic); 305 PSStatCounter pStatistic=&(pDevice->scStatistic);
@@ -322,22 +314,24 @@ s_vSaveTxPktInfo(PSDevice pDevice, BYTE byPktNum, PBYTE pbyDestAddr, WORD wPktLe
322 314
323 pStatistic->abyTxPktInfo[byPktNum].wLength = wPktLength; 315 pStatistic->abyTxPktInfo[byPktNum].wLength = wPktLength;
324 pStatistic->abyTxPktInfo[byPktNum].wFIFOCtl = wFIFOCtl; 316 pStatistic->abyTxPktInfo[byPktNum].wFIFOCtl = wFIFOCtl;
325 memcpy(pStatistic->abyTxPktInfo[byPktNum].abyDestAddr, pbyDestAddr, U_ETHER_ADDR_LEN); 317 memcpy(pStatistic->abyTxPktInfo[byPktNum].abyDestAddr,
318 pbyDestAddr,
319 ETH_ALEN);
326} 320}
327 321
328 322
329 323
330 324
331static 325static
332VOID 326void
333s_vFillTxKey ( 327s_vFillTxKey (
334 IN PSDevice pDevice, 328 PSDevice pDevice,
335 IN PBYTE pbyBuf, 329 PBYTE pbyBuf,
336 IN PBYTE pbyIVHead, 330 PBYTE pbyIVHead,
337 IN PSKeyItem pTransmitKey, 331 PSKeyItem pTransmitKey,
338 IN PBYTE pbyHdrBuf, 332 PBYTE pbyHdrBuf,
339 IN WORD wPayloadLen, 333 WORD wPayloadLen,
340 OUT PBYTE pMICHDR 334 PBYTE pMICHDR
341 ) 335 )
342{ 336{
343 PDWORD pdwIV = (PDWORD) pbyIVHead; 337 PDWORD pdwIV = (PDWORD) pbyIVHead;
@@ -446,15 +440,15 @@ s_vFillTxKey (
446 440
447 441
448static 442static
449VOID 443void
450s_vSWencryption ( 444s_vSWencryption (
451 IN PSDevice pDevice, 445 PSDevice pDevice,
452 IN PSKeyItem pTransmitKey, 446 PSKeyItem pTransmitKey,
453 IN PBYTE pbyPayloadHead, 447 PBYTE pbyPayloadHead,
454 IN WORD wPayloadSize 448 WORD wPayloadSize
455 ) 449 )
456{ 450{
457 UINT cbICVlen = 4; 451 unsigned int cbICVlen = 4;
458 DWORD dwICV = 0xFFFFFFFFL; 452 DWORD dwICV = 0xFFFFFFFFL;
459 PDWORD pdwICV; 453 PDWORD pdwICV;
460 454
@@ -495,16 +489,16 @@ s_vSWencryption (
495 PK_TYPE_11GA 3 489 PK_TYPE_11GA 3
496*/ 490*/
497static 491static
498UINT 492unsigned int
499s_uGetTxRsvTime ( 493s_uGetTxRsvTime (
500 IN PSDevice pDevice, 494 PSDevice pDevice,
501 IN BYTE byPktType, 495 BYTE byPktType,
502 IN UINT cbFrameLength, 496 unsigned int cbFrameLength,
503 IN WORD wRate, 497 WORD wRate,
504 IN BOOL bNeedAck 498 BOOL bNeedAck
505 ) 499 )
506{ 500{
507 UINT uDataTime, uAckTime; 501 unsigned int uDataTime, uAckTime;
508 502
509 uDataTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, cbFrameLength, wRate); 503 uDataTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, cbFrameLength, wRate);
510 if (byPktType == PK_TYPE_11B) {//llb,CCK mode 504 if (byPktType == PK_TYPE_11B) {//llb,CCK mode
@@ -523,16 +517,16 @@ s_uGetTxRsvTime (
523 517
524//byFreqType: 0=>5GHZ 1=>2.4GHZ 518//byFreqType: 0=>5GHZ 1=>2.4GHZ
525static 519static
526UINT 520unsigned int
527s_uGetRTSCTSRsvTime ( 521s_uGetRTSCTSRsvTime (
528 IN PSDevice pDevice, 522 PSDevice pDevice,
529 IN BYTE byRTSRsvType, 523 BYTE byRTSRsvType,
530 IN BYTE byPktType, 524 BYTE byPktType,
531 IN UINT cbFrameLength, 525 unsigned int cbFrameLength,
532 IN WORD wCurrentRate 526 WORD wCurrentRate
533 ) 527 )
534{ 528{
535 UINT uRrvTime , uRTSTime, uCTSTime, uAckTime, uDataTime; 529 unsigned int uRrvTime , uRTSTime, uCTSTime, uAckTime, uDataTime;
536 530
537 uRrvTime = uRTSTime = uCTSTime = uAckTime = uDataTime = 0; 531 uRrvTime = uRTSTime = uCTSTime = uAckTime = uDataTime = 0;
538 532
@@ -565,23 +559,22 @@ s_uGetRTSCTSRsvTime (
565 559
566//byFreqType 0: 5GHz, 1:2.4Ghz 560//byFreqType 0: 5GHz, 1:2.4Ghz
567static 561static
568UINT 562unsigned int
569s_uGetDataDuration ( 563s_uGetDataDuration (
570 IN PSDevice pDevice, 564 PSDevice pDevice,
571 IN BYTE byDurType, 565 BYTE byDurType,
572 IN UINT cbFrameLength, 566 unsigned int cbFrameLength,
573 IN BYTE byPktType, 567 BYTE byPktType,
574 IN WORD wRate, 568 WORD wRate,
575 IN BOOL bNeedAck, 569 BOOL bNeedAck,
576 IN UINT uFragIdx, 570 unsigned int uFragIdx,
577 IN UINT cbLastFragmentSize, 571 unsigned int cbLastFragmentSize,
578 IN UINT uMACfragNum, 572 unsigned int uMACfragNum,
579 IN BYTE byFBOption 573 BYTE byFBOption
580 ) 574 )
581{ 575{
582 BOOL bLastFrag = 0; 576 BOOL bLastFrag = 0;
583 UINT uAckTime =0, uNextPktTime = 0; 577 unsigned int uAckTime = 0, uNextPktTime = 0;
584
585 578
586 if (uFragIdx == (uMACfragNum-1)) { 579 if (uFragIdx == (uMACfragNum-1)) {
587 bLastFrag = 1; 580 bLastFrag = 1;
@@ -735,18 +728,18 @@ s_uGetDataDuration (
735 728
736//byFreqType: 0=>5GHZ 1=>2.4GHZ 729//byFreqType: 0=>5GHZ 1=>2.4GHZ
737static 730static
738UINT 731unsigned int
739s_uGetRTSCTSDuration ( 732s_uGetRTSCTSDuration (
740 IN PSDevice pDevice, 733 PSDevice pDevice,
741 IN BYTE byDurType, 734 BYTE byDurType,
742 IN UINT cbFrameLength, 735 unsigned int cbFrameLength,
743 IN BYTE byPktType, 736 BYTE byPktType,
744 IN WORD wRate, 737 WORD wRate,
745 IN BOOL bNeedAck, 738 BOOL bNeedAck,
746 IN BYTE byFBOption 739 BYTE byFBOption
747 ) 740 )
748{ 741{
749 UINT uCTSTime = 0, uDurTime = 0; 742 unsigned int uCTSTime = 0, uDurTime = 0;
750 743
751 744
752 switch (byDurType) { 745 switch (byDurType) {
@@ -834,19 +827,19 @@ s_uGetRTSCTSDuration (
834 827
835 828
836static 829static
837UINT 830unsigned int
838s_uFillDataHead ( 831s_uFillDataHead (
839 IN PSDevice pDevice, 832 PSDevice pDevice,
840 IN BYTE byPktType, 833 BYTE byPktType,
841 IN WORD wCurrentRate, 834 WORD wCurrentRate,
842 IN PVOID pTxDataHead, 835 void *pTxDataHead,
843 IN UINT cbFrameLength, 836 unsigned int cbFrameLength,
844 IN UINT uDMAIdx, 837 unsigned int uDMAIdx,
845 IN BOOL bNeedAck, 838 BOOL bNeedAck,
846 IN UINT uFragIdx, 839 unsigned int uFragIdx,
847 IN UINT cbLastFragmentSize, 840 unsigned int cbLastFragmentSize,
848 IN UINT uMACfragNum, 841 unsigned int uMACfragNum,
849 IN BYTE byFBOption 842 BYTE byFBOption
850 ) 843 )
851{ 844{
852 845
@@ -979,20 +972,20 @@ s_uFillDataHead (
979 972
980 973
981static 974static
982VOID 975void
983s_vFillRTSHead ( 976s_vFillRTSHead (
984 IN PSDevice pDevice, 977 PSDevice pDevice,
985 IN BYTE byPktType, 978 BYTE byPktType,
986 IN PVOID pvRTS, 979 void *pvRTS,
987 IN UINT cbFrameLength, 980 unsigned int cbFrameLength,
988 IN BOOL bNeedAck, 981 BOOL bNeedAck,
989 IN BOOL bDisCRC, 982 BOOL bDisCRC,
990 IN PSEthernetHeader psEthHeader, 983 PSEthernetHeader psEthHeader,
991 IN WORD wCurrentRate, 984 WORD wCurrentRate,
992 IN BYTE byFBOption 985 BYTE byFBOption
993 ) 986 )
994{ 987{
995 UINT uRTSFrameLen = 20; 988 unsigned int uRTSFrameLen = 20;
996 WORD wLen = 0x0000; 989 WORD wLen = 0x0000;
997 990
998 if (pvRTS == NULL) 991 if (pvRTS == NULL)
@@ -1026,18 +1019,27 @@ s_vFillRTSHead (
1026 pBuf->Data.wDurationID = pBuf->wDuration_aa; 1019 pBuf->Data.wDurationID = pBuf->wDuration_aa;
1027 //Get RTS Frame body 1020 //Get RTS Frame body
1028 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4 1021 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4
1029 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 1022
1030 (pDevice->eOPMode == OP_MODE_AP)) { 1023 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1031 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1024 (pDevice->eOPMode == OP_MODE_AP)) {
1032 } 1025 memcpy(&(pBuf->Data.abyRA[0]),
1026 &(psEthHeader->abyDstAddr[0]),
1027 ETH_ALEN);
1028 }
1033 else { 1029 else {
1034 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1030 memcpy(&(pBuf->Data.abyRA[0]),
1035 } 1031 &(pDevice->abyBSSID[0]),
1036 if (pDevice->eOPMode == OP_MODE_AP) { 1032 ETH_ALEN);
1037 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1033 }
1038 } 1034 if (pDevice->eOPMode == OP_MODE_AP) {
1035 memcpy(&(pBuf->Data.abyTA[0]),
1036 &(pDevice->abyBSSID[0]),
1037 ETH_ALEN);
1038 }
1039 else { 1039 else {
1040 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1040 memcpy(&(pBuf->Data.abyTA[0]),
1041 &(psEthHeader->abySrcAddr[0]),
1042 ETH_ALEN);
1041 } 1043 }
1042 } 1044 }
1043 else { 1045 else {
@@ -1063,19 +1065,27 @@ s_vFillRTSHead (
1063 //Get RTS Frame body 1065 //Get RTS Frame body
1064 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4 1066 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4
1065 1067
1066 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 1068 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1067 (pDevice->eOPMode == OP_MODE_AP)) { 1069 (pDevice->eOPMode == OP_MODE_AP)) {
1068 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1070 memcpy(&(pBuf->Data.abyRA[0]),
1069 } 1071 &(psEthHeader->abyDstAddr[0]),
1072 ETH_ALEN);
1073 }
1070 else { 1074 else {
1071 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1075 memcpy(&(pBuf->Data.abyRA[0]),
1076 &(pDevice->abyBSSID[0]),
1077 ETH_ALEN);
1072 } 1078 }
1073 1079
1074 if (pDevice->eOPMode == OP_MODE_AP) { 1080 if (pDevice->eOPMode == OP_MODE_AP) {
1075 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1081 memcpy(&(pBuf->Data.abyTA[0]),
1076 } 1082 &(pDevice->abyBSSID[0]),
1083 ETH_ALEN);
1084 }
1077 else { 1085 else {
1078 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1086 memcpy(&(pBuf->Data.abyTA[0]),
1087 &(psEthHeader->abySrcAddr[0]),
1088 ETH_ALEN);
1079 } 1089 }
1080 1090
1081 } // if (byFBOption == AUTO_FB_NONE) 1091 } // if (byFBOption == AUTO_FB_NONE)
@@ -1094,20 +1104,26 @@ s_vFillRTSHead (
1094 //Get RTS Frame body 1104 //Get RTS Frame body
1095 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4 1105 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4
1096 1106
1097 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 1107 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1098 (pDevice->eOPMode == OP_MODE_AP)) { 1108 (pDevice->eOPMode == OP_MODE_AP)) {
1099 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1109 memcpy(&(pBuf->Data.abyRA[0]),
1100 } 1110 &(psEthHeader->abyDstAddr[0]),
1101 else { 1111 ETH_ALEN);
1102 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1112 } else {
1103 } 1113 memcpy(&(pBuf->Data.abyRA[0]),
1104 1114 &(pDevice->abyBSSID[0]),
1105 if (pDevice->eOPMode == OP_MODE_AP) { 1115 ETH_ALEN);
1106 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1116 }
1107 } 1117
1108 else { 1118 if (pDevice->eOPMode == OP_MODE_AP) {
1109 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1119 memcpy(&(pBuf->Data.abyTA[0]),
1110 } 1120 &(pDevice->abyBSSID[0]),
1121 ETH_ALEN);
1122 } else {
1123 memcpy(&(pBuf->Data.abyTA[0]),
1124 &(psEthHeader->abySrcAddr[0]),
1125 ETH_ALEN);
1126 }
1111 1127
1112 } 1128 }
1113 else { 1129 else {
@@ -1125,19 +1141,25 @@ s_vFillRTSHead (
1125 //Get RTS Frame body 1141 //Get RTS Frame body
1126 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4 1142 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4
1127 1143
1128 if ((pDevice->eOPMode == OP_MODE_ADHOC) || 1144 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1129 (pDevice->eOPMode == OP_MODE_AP)) { 1145 (pDevice->eOPMode == OP_MODE_AP)) {
1130 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1146 memcpy(&(pBuf->Data.abyRA[0]),
1131 } 1147 &(psEthHeader->abyDstAddr[0]),
1132 else { 1148 ETH_ALEN);
1133 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1149 } else {
1134 } 1150 memcpy(&(pBuf->Data.abyRA[0]),
1135 if (pDevice->eOPMode == OP_MODE_AP) { 1151 &(pDevice->abyBSSID[0]),
1136 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1152 ETH_ALEN);
1137 } 1153 }
1138 else { 1154 if (pDevice->eOPMode == OP_MODE_AP) {
1139 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1155 memcpy(&(pBuf->Data.abyTA[0]),
1140 } 1156 &(pDevice->abyBSSID[0]),
1157 ETH_ALEN);
1158 } else {
1159 memcpy(&(pBuf->Data.abyTA[0]),
1160 &(psEthHeader->abySrcAddr[0]),
1161 ETH_ALEN);
1162 }
1141 } 1163 }
1142 } 1164 }
1143 else if (byPktType == PK_TYPE_11B) { 1165 else if (byPktType == PK_TYPE_11B) {
@@ -1153,39 +1175,45 @@ s_vFillRTSHead (
1153 //Get RTS Frame body 1175 //Get RTS Frame body
1154 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4 1176 pBuf->Data.wFrameControl = TYPE_CTL_RTS;//0x00B4
1155 1177
1156 1178 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1157 if ((pDevice->eOPMode == OP_MODE_ADHOC) ||
1158 (pDevice->eOPMode == OP_MODE_AP)) { 1179 (pDevice->eOPMode == OP_MODE_AP)) {
1159 memcpy(&(pBuf->Data.abyRA[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1180 memcpy(&(pBuf->Data.abyRA[0]),
1181 &(psEthHeader->abyDstAddr[0]),
1182 ETH_ALEN);
1160 } 1183 }
1161 else { 1184 else {
1162 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1185 memcpy(&(pBuf->Data.abyRA[0]),
1186 &(pDevice->abyBSSID[0]),
1187 ETH_ALEN);
1163 } 1188 }
1164 1189
1165 if (pDevice->eOPMode == OP_MODE_AP) { 1190 if (pDevice->eOPMode == OP_MODE_AP) {
1166 memcpy(&(pBuf->Data.abyTA[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1191 memcpy(&(pBuf->Data.abyTA[0]),
1167 } 1192 &(pDevice->abyBSSID[0]),
1168 else { 1193 ETH_ALEN);
1169 memcpy(&(pBuf->Data.abyTA[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1194 } else {
1195 memcpy(&(pBuf->Data.abyTA[0]),
1196 &(psEthHeader->abySrcAddr[0]),
1197 ETH_ALEN);
1170 } 1198 }
1171 } 1199 }
1172} 1200}
1173 1201
1174static 1202static
1175VOID 1203void
1176s_vFillCTSHead ( 1204s_vFillCTSHead (
1177 IN PSDevice pDevice, 1205 PSDevice pDevice,
1178 IN UINT uDMAIdx, 1206 unsigned int uDMAIdx,
1179 IN BYTE byPktType, 1207 BYTE byPktType,
1180 IN PVOID pvCTS, 1208 void *pvCTS,
1181 IN UINT cbFrameLength, 1209 unsigned int cbFrameLength,
1182 IN BOOL bNeedAck, 1210 BOOL bNeedAck,
1183 IN BOOL bDisCRC, 1211 BOOL bDisCRC,
1184 IN WORD wCurrentRate, 1212 WORD wCurrentRate,
1185 IN BYTE byFBOption 1213 BYTE byFBOption
1186 ) 1214 )
1187{ 1215{
1188 UINT uCTSFrameLen = 14; 1216 unsigned int uCTSFrameLen = 14;
1189 WORD wLen = 0x0000; 1217 WORD wLen = 0x0000;
1190 1218
1191 if (pvCTS == NULL) { 1219 if (pvCTS == NULL) {
@@ -1222,7 +1250,9 @@ s_vFillCTSHead (
1222 pBuf->Data.wDurationID = pBuf->wDuration_ba; 1250 pBuf->Data.wDurationID = pBuf->wDuration_ba;
1223 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4 1251 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4
1224 pBuf->Data.wReserved = 0x0000; 1252 pBuf->Data.wReserved = 0x0000;
1225 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyCurrentNetAddr[0]), U_ETHER_ADDR_LEN); 1253 memcpy(&(pBuf->Data.abyRA[0]),
1254 &(pDevice->abyCurrentNetAddr[0]),
1255 ETH_ALEN);
1226 } else { //if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA) 1256 } else { //if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA)
1227 PSCTS pBuf = (PSCTS)pvCTS; 1257 PSCTS pBuf = (PSCTS)pvCTS;
1228 //Get SignalField,ServiceField,Length 1258 //Get SignalField,ServiceField,Length
@@ -1239,16 +1269,13 @@ s_vFillCTSHead (
1239 pBuf->Data.wDurationID = pBuf->wDuration_ba; 1269 pBuf->Data.wDurationID = pBuf->wDuration_ba;
1240 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4 1270 pBuf->Data.wFrameControl = TYPE_CTL_CTS;//0x00C4
1241 pBuf->Data.wReserved = 0x0000; 1271 pBuf->Data.wReserved = 0x0000;
1242 memcpy(&(pBuf->Data.abyRA[0]), &(pDevice->abyCurrentNetAddr[0]), U_ETHER_ADDR_LEN); 1272 memcpy(&(pBuf->Data.abyRA[0]),
1273 &(pDevice->abyCurrentNetAddr[0]),
1274 ETH_ALEN);
1243 } 1275 }
1244 } 1276 }
1245} 1277}
1246 1278
1247
1248
1249
1250
1251
1252/*+ 1279/*+
1253 * 1280 *
1254 * Description: 1281 * Description:
@@ -1271,24 +1298,24 @@ s_vFillCTSHead (
1271 * Return Value: none 1298 * Return Value: none
1272 * 1299 *
1273-*/ 1300-*/
1274// UINT cbFrameSize,//Hdr+Payload+FCS 1301
1275static 1302static
1276VOID 1303void
1277s_vGenerateTxParameter ( 1304s_vGenerateTxParameter (
1278 IN PSDevice pDevice, 1305 PSDevice pDevice,
1279 IN BYTE byPktType, 1306 BYTE byPktType,
1280 IN WORD wCurrentRate, 1307 WORD wCurrentRate,
1281 IN PVOID pTxBufHead, 1308 void *pTxBufHead,
1282 IN PVOID pvRrvTime, 1309 void *pvRrvTime,
1283 IN PVOID pvRTS, 1310 void *pvRTS,
1284 IN PVOID pvCTS, 1311 void *pvCTS,
1285 IN UINT cbFrameSize, 1312 unsigned int cbFrameSize,
1286 IN BOOL bNeedACK, 1313 BOOL bNeedACK,
1287 IN UINT uDMAIdx, 1314 unsigned int uDMAIdx,
1288 IN PSEthernetHeader psEthHeader 1315 PSEthernetHeader psEthHeader
1289 ) 1316 )
1290{ 1317{
1291 UINT cbMACHdLen = WLAN_HDR_ADDR3_LEN; //24 1318 unsigned int cbMACHdLen = WLAN_HDR_ADDR3_LEN; /* 24 */
1292 WORD wFifoCtl; 1319 WORD wFifoCtl;
1293 BOOL bDisCRC = FALSE; 1320 BOOL bDisCRC = FALSE;
1294 BYTE byFBOption = AUTO_FB_NONE; 1321 BYTE byFBOption = AUTO_FB_NONE;
@@ -1386,44 +1413,45 @@ s_vGenerateTxParameter (
1386/* 1413/*
1387 PBYTE pbyBuffer,//point to pTxBufHead 1414 PBYTE pbyBuffer,//point to pTxBufHead
1388 WORD wFragType,//00:Non-Frag, 01:Start, 02:Mid, 03:Last 1415 WORD wFragType,//00:Non-Frag, 01:Start, 02:Mid, 03:Last
1389 UINT cbFragmentSize,//Hdr+payoad+FCS 1416 unsigned int cbFragmentSize,//Hdr+payoad+FCS
1390*/ 1417*/
1391 1418
1392 1419
1393BOOL 1420BOOL
1394s_bPacketToWirelessUsb( 1421s_bPacketToWirelessUsb(
1395 IN PSDevice pDevice, 1422 PSDevice pDevice,
1396 IN BYTE byPktType, 1423 BYTE byPktType,
1397 IN PBYTE usbPacketBuf, 1424 PBYTE usbPacketBuf,
1398 IN BOOL bNeedEncryption, 1425 BOOL bNeedEncryption,
1399 IN UINT uSkbPacketLen, 1426 unsigned int uSkbPacketLen,
1400 IN UINT uDMAIdx, 1427 unsigned int uDMAIdx,
1401 IN PSEthernetHeader psEthHeader, 1428 PSEthernetHeader psEthHeader,
1402 IN PBYTE pPacket, 1429 PBYTE pPacket,
1403 IN PSKeyItem pTransmitKey, 1430 PSKeyItem pTransmitKey,
1404 IN UINT uNodeIndex, 1431 unsigned int uNodeIndex,
1405 IN WORD wCurrentRate, 1432 WORD wCurrentRate,
1406 OUT UINT *pcbHeaderLen, 1433 unsigned int *pcbHeaderLen,
1407 OUT UINT *pcbTotalLen 1434 unsigned int *pcbTotalLen
1408 ) 1435 )
1409{ 1436{
1410 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1437 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1411 UINT cbFrameSize,cbFrameBodySize; 1438 unsigned int cbFrameSize, cbFrameBodySize;
1412 PTX_BUFFER pTxBufHead; 1439 PTX_BUFFER pTxBufHead;
1413 UINT cb802_1_H_len; 1440 unsigned int cb802_1_H_len;
1414 UINT cbIVlen=0,cbICVlen=0,cbMIClen=0,cbMACHdLen=0,cbFCSlen=4; 1441 unsigned int cbIVlen = 0, cbICVlen = 0, cbMIClen = 0,
1415 UINT cbMICHDR = 0; 1442 cbMACHdLen = 0, cbFCSlen = 4;
1443 unsigned int cbMICHDR = 0;
1416 BOOL bNeedACK,bRTS; 1444 BOOL bNeedACK,bRTS;
1417 PBYTE pbyType,pbyMacHdr,pbyIVHead,pbyPayloadHead,pbyTxBufferAddr; 1445 PBYTE pbyType,pbyMacHdr,pbyIVHead,pbyPayloadHead,pbyTxBufferAddr;
1418 BYTE abySNAP_RFC1042[6] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00}; 1446 BYTE abySNAP_RFC1042[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00};
1419 BYTE abySNAP_Bridgetunnel[6] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8}; 1447 BYTE abySNAP_Bridgetunnel[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8};
1420 UINT uDuration; 1448 unsigned int uDuration;
1421 UINT cbHeaderLength= 0,uPadding = 0; 1449 unsigned int cbHeaderLength = 0, uPadding = 0;
1422 PVOID pvRrvTime; 1450 void *pvRrvTime;
1423 PSMICHDRHead pMICHDR; 1451 PSMICHDRHead pMICHDR;
1424 PVOID pvRTS; 1452 void *pvRTS;
1425 PVOID pvCTS; 1453 void *pvCTS;
1426 PVOID pvTxDataHd; 1454 void *pvTxDataHd;
1427 BYTE byFBOption = AUTO_FB_NONE,byFragType; 1455 BYTE byFBOption = AUTO_FB_NONE,byFragType;
1428 WORD wTxBufSize; 1456 WORD wTxBufSize;
1429 DWORD dwMICKey0,dwMICKey1,dwMIC_Priority,dwCRC; 1457 DWORD dwMICKey0,dwMICKey1,dwMIC_Priority,dwCRC;
@@ -1455,7 +1483,7 @@ s_bPacketToWirelessUsb(
1455 cb802_1_H_len = 0; 1483 cb802_1_H_len = 0;
1456 } 1484 }
1457 1485
1458 cbFrameBodySize = uSkbPacketLen - U_HEADER_LEN + cb802_1_H_len; 1486 cbFrameBodySize = uSkbPacketLen - ETH_HLEN + cb802_1_H_len;
1459 1487
1460 //Set packet type 1488 //Set packet type
1461 pTxBufHead->wFIFOCtl |= (WORD)(byPktType<<8); 1489 pTxBufHead->wFIFOCtl |= (WORD)(byPktType<<8);
@@ -1658,7 +1686,8 @@ s_bPacketToWirelessUsb(
1658 1686
1659 1687
1660 //Fill FIFO,RrvTime,RTS,and CTS 1688 //Fill FIFO,RrvTime,RTS,and CTS
1661 s_vGenerateTxParameter(pDevice, byPktType, wCurrentRate, (PVOID)pbyTxBufferAddr, pvRrvTime, pvRTS, pvCTS, 1689 s_vGenerateTxParameter(pDevice, byPktType, wCurrentRate,
1690 (void *)pbyTxBufferAddr, pvRrvTime, pvRTS, pvCTS,
1662 cbFrameSize, bNeedACK, uDMAIdx, psEthHeader); 1691 cbFrameSize, bNeedACK, uDMAIdx, psEthHeader);
1663 //Fill DataHead 1692 //Fill DataHead
1664 uDuration = s_uFillDataHead(pDevice, byPktType, wCurrentRate, pvTxDataHd, cbFrameSize, uDMAIdx, bNeedACK, 1693 uDuration = s_uFillDataHead(pDevice, byPktType, wCurrentRate, pvTxDataHd, cbFrameSize, uDMAIdx, bNeedACK,
@@ -1700,13 +1729,13 @@ s_bPacketToWirelessUsb(
1700 if (pPacket != NULL) { 1729 if (pPacket != NULL) {
1701 // Copy the Packet into a tx Buffer 1730 // Copy the Packet into a tx Buffer
1702 memcpy((pbyPayloadHead + cb802_1_H_len), 1731 memcpy((pbyPayloadHead + cb802_1_H_len),
1703 (pPacket + U_HEADER_LEN), 1732 (pPacket + ETH_HLEN),
1704 uSkbPacketLen - U_HEADER_LEN 1733 uSkbPacketLen - ETH_HLEN
1705 ); 1734 );
1706 1735
1707 } else { 1736 } else {
1708 // while bRelayPacketSend psEthHeader is point to header+payload 1737 // while bRelayPacketSend psEthHeader is point to header+payload
1709 memcpy((pbyPayloadHead + cb802_1_H_len), ((PBYTE)psEthHeader)+U_HEADER_LEN, uSkbPacketLen - U_HEADER_LEN); 1738 memcpy((pbyPayloadHead + cb802_1_H_len), ((PBYTE)psEthHeader) + ETH_HLEN, uSkbPacketLen - ETH_HLEN);
1710 } 1739 }
1711 1740
1712 ASSERT(uLength == cbNdisBodySize); 1741 ASSERT(uLength == cbNdisBodySize);
@@ -1772,7 +1801,7 @@ s_bPacketToWirelessUsb(
1772 } 1801 }
1773 1802
1774 if (pDevice->bSoftwareGenCrcErr == TRUE) { 1803 if (pDevice->bSoftwareGenCrcErr == TRUE) {
1775 UINT cbLen; 1804 unsigned int cbLen;
1776 PDWORD pdwCRC; 1805 PDWORD pdwCRC;
1777 1806
1778 dwCRC = 0xFFFFFFFFL; 1807 dwCRC = 0xFFFFFFFFL;
@@ -1820,16 +1849,16 @@ s_bPacketToWirelessUsb(
1820 * 1849 *
1821-*/ 1850-*/
1822 1851
1823VOID 1852void
1824s_vGenerateMACHeader ( 1853s_vGenerateMACHeader (
1825 IN PSDevice pDevice, 1854 PSDevice pDevice,
1826 IN PBYTE pbyBufferAddr, 1855 PBYTE pbyBufferAddr,
1827 IN WORD wDuration, 1856 WORD wDuration,
1828 IN PSEthernetHeader psEthHeader, 1857 PSEthernetHeader psEthHeader,
1829 IN BOOL bNeedEncrypt, 1858 BOOL bNeedEncrypt,
1830 IN WORD wFragType, 1859 WORD wFragType,
1831 IN UINT uDMAIdx, 1860 unsigned int uDMAIdx,
1832 IN UINT uFragIdx 1861 unsigned int uFragIdx
1833 ) 1862 )
1834{ 1863{
1835 PS802_11Header pMACHeader = (PS802_11Header)pbyBufferAddr; 1864 PS802_11Header pMACHeader = (PS802_11Header)pbyBufferAddr;
@@ -1843,21 +1872,35 @@ s_vGenerateMACHeader (
1843 } 1872 }
1844 1873
1845 if (pDevice->eOPMode == OP_MODE_AP) { 1874 if (pDevice->eOPMode == OP_MODE_AP) {
1846 memcpy(&(pMACHeader->abyAddr1[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1875 memcpy(&(pMACHeader->abyAddr1[0]),
1847 memcpy(&(pMACHeader->abyAddr2[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1876 &(psEthHeader->abyDstAddr[0]),
1848 memcpy(&(pMACHeader->abyAddr3[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1877 ETH_ALEN);
1878 memcpy(&(pMACHeader->abyAddr2[0]), &(pDevice->abyBSSID[0]), ETH_ALEN);
1879 memcpy(&(pMACHeader->abyAddr3[0]),
1880 &(psEthHeader->abySrcAddr[0]),
1881 ETH_ALEN);
1849 pMACHeader->wFrameCtl |= FC_FROMDS; 1882 pMACHeader->wFrameCtl |= FC_FROMDS;
1850 } 1883 } else {
1851 else { 1884 if (pDevice->eOPMode == OP_MODE_ADHOC) {
1852 if (pDevice->eOPMode == OP_MODE_ADHOC) { 1885 memcpy(&(pMACHeader->abyAddr1[0]),
1853 memcpy(&(pMACHeader->abyAddr1[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1886 &(psEthHeader->abyDstAddr[0]),
1854 memcpy(&(pMACHeader->abyAddr2[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1887 ETH_ALEN);
1855 memcpy(&(pMACHeader->abyAddr3[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1888 memcpy(&(pMACHeader->abyAddr2[0]),
1856 } 1889 &(psEthHeader->abySrcAddr[0]),
1857 else { 1890 ETH_ALEN);
1858 memcpy(&(pMACHeader->abyAddr3[0]), &(psEthHeader->abyDstAddr[0]), U_ETHER_ADDR_LEN); 1891 memcpy(&(pMACHeader->abyAddr3[0]),
1859 memcpy(&(pMACHeader->abyAddr2[0]), &(psEthHeader->abySrcAddr[0]), U_ETHER_ADDR_LEN); 1892 &(pDevice->abyBSSID[0]),
1860 memcpy(&(pMACHeader->abyAddr1[0]), &(pDevice->abyBSSID[0]), U_ETHER_ADDR_LEN); 1893 ETH_ALEN);
1894 } else {
1895 memcpy(&(pMACHeader->abyAddr3[0]),
1896 &(psEthHeader->abyDstAddr[0]),
1897 ETH_ALEN);
1898 memcpy(&(pMACHeader->abyAddr2[0]),
1899 &(psEthHeader->abySrcAddr[0]),
1900 ETH_ALEN);
1901 memcpy(&(pMACHeader->abyAddr1[0]),
1902 &(pDevice->abyBSSID[0]),
1903 ETH_ALEN);
1861 pMACHeader->wFrameCtl |= FC_TODS; 1904 pMACHeader->wFrameCtl |= FC_TODS;
1862 } 1905 }
1863 } 1906 }
@@ -1908,34 +1951,34 @@ s_vGenerateMACHeader (
1908-*/ 1951-*/
1909 1952
1910CMD_STATUS csMgmt_xmit( 1953CMD_STATUS csMgmt_xmit(
1911 IN PSDevice pDevice, 1954 PSDevice pDevice,
1912 IN PSTxMgmtPacket pPacket 1955 PSTxMgmtPacket pPacket
1913 ) 1956 )
1914{ 1957{
1915 BYTE byPktType; 1958 BYTE byPktType;
1916 PBYTE pbyTxBufferAddr; 1959 PBYTE pbyTxBufferAddr;
1917 PVOID pvRTS; 1960 void *pvRTS;
1918 PSCTS pCTS; 1961 PSCTS pCTS;
1919 PVOID pvTxDataHd; 1962 void *pvTxDataHd;
1920 UINT uDuration; 1963 unsigned int uDuration;
1921 UINT cbReqCount; 1964 unsigned int cbReqCount;
1922 PS802_11Header pMACHeader; 1965 PS802_11Header pMACHeader;
1923 UINT cbHeaderSize; 1966 unsigned int cbHeaderSize;
1924 UINT cbFrameBodySize; 1967 unsigned int cbFrameBodySize;
1925 BOOL bNeedACK; 1968 BOOL bNeedACK;
1926 BOOL bIsPSPOLL = FALSE; 1969 BOOL bIsPSPOLL = FALSE;
1927 PSTxBufHead pTxBufHead; 1970 PSTxBufHead pTxBufHead;
1928 UINT cbFrameSize; 1971 unsigned int cbFrameSize;
1929 UINT cbIVlen = 0; 1972 unsigned int cbIVlen = 0;
1930 UINT cbICVlen = 0; 1973 unsigned int cbICVlen = 0;
1931 UINT cbMIClen = 0; 1974 unsigned int cbMIClen = 0;
1932 UINT cbFCSlen = 4; 1975 unsigned int cbFCSlen = 4;
1933 UINT uPadding = 0; 1976 unsigned int uPadding = 0;
1934 WORD wTxBufSize; 1977 WORD wTxBufSize;
1935 UINT cbMacHdLen; 1978 unsigned int cbMacHdLen;
1936 SEthernetHeader sEthHeader; 1979 SEthernetHeader sEthHeader;
1937 PVOID pvRrvTime; 1980 void *pvRrvTime;
1938 PVOID pMICHDR; 1981 void *pMICHDR;
1939 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1982 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1940 WORD wCurrentRate = RATE_1M; 1983 WORD wCurrentRate = RATE_1M;
1941 PTX_BUFFER pTX_Buffer; 1984 PTX_BUFFER pTX_Buffer;
@@ -2087,10 +2130,15 @@ CMD_STATUS csMgmt_xmit(
2087 cbHeaderSize = wTxBufSize + sizeof(SRrvTime_ab) + sizeof(STxDataHead_ab); 2130 cbHeaderSize = wTxBufSize + sizeof(SRrvTime_ab) + sizeof(STxDataHead_ab);
2088 } 2131 }
2089 2132
2090 memset((PVOID)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderSize - wTxBufSize)); 2133 memset((void *)(pbyTxBufferAddr + wTxBufSize), 0,
2134 (cbHeaderSize - wTxBufSize));
2091 2135
2092 memcpy(&(sEthHeader.abyDstAddr[0]), &(pPacket->p80211Header->sA3.abyAddr1[0]), U_ETHER_ADDR_LEN); 2136 memcpy(&(sEthHeader.abyDstAddr[0]),
2093 memcpy(&(sEthHeader.abySrcAddr[0]), &(pPacket->p80211Header->sA3.abyAddr2[0]), U_ETHER_ADDR_LEN); 2137 &(pPacket->p80211Header->sA3.abyAddr1[0]),
2138 ETH_ALEN);
2139 memcpy(&(sEthHeader.abySrcAddr[0]),
2140 &(pPacket->p80211Header->sA3.abyAddr2[0]),
2141 ETH_ALEN);
2094 //========================= 2142 //=========================
2095 // No Fragmentation 2143 // No Fragmentation
2096 //========================= 2144 //=========================
@@ -2197,20 +2245,20 @@ CMD_STATUS csMgmt_xmit(
2197 2245
2198CMD_STATUS 2246CMD_STATUS
2199csBeacon_xmit( 2247csBeacon_xmit(
2200 IN PSDevice pDevice, 2248 PSDevice pDevice,
2201 IN PSTxMgmtPacket pPacket 2249 PSTxMgmtPacket pPacket
2202 ) 2250 )
2203{ 2251{
2204 2252
2205 UINT cbFrameSize = pPacket->cbMPDULen + WLAN_FCS_LEN; 2253 unsigned int cbFrameSize = pPacket->cbMPDULen + WLAN_FCS_LEN;
2206 UINT cbHeaderSize = 0; 2254 unsigned int cbHeaderSize = 0;
2207 WORD wTxBufSize = sizeof(STxShortBufHead); 2255 WORD wTxBufSize = sizeof(STxShortBufHead);
2208 PSTxShortBufHead pTxBufHead; 2256 PSTxShortBufHead pTxBufHead;
2209 PS802_11Header pMACHeader; 2257 PS802_11Header pMACHeader;
2210 PSTxDataHead_ab pTxDataHead; 2258 PSTxDataHead_ab pTxDataHead;
2211 WORD wCurrentRate; 2259 WORD wCurrentRate;
2212 UINT cbFrameBodySize; 2260 unsigned int cbFrameBodySize;
2213 UINT cbReqCount; 2261 unsigned int cbReqCount;
2214 PBEACON_BUFFER pTX_Buffer; 2262 PBEACON_BUFFER pTX_Buffer;
2215 PBYTE pbyTxBufferAddr; 2263 PBYTE pbyTxBufferAddr;
2216 PUSB_SEND_CONTEXT pContext; 2264 PUSB_SEND_CONTEXT pContext;
@@ -2288,50 +2336,50 @@ csBeacon_xmit(
2288 2336
2289 2337
2290 2338
2291VOID 2339void
2292vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb) { 2340vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb) {
2293 2341
2294 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 2342 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
2295 BYTE byPktType; 2343 BYTE byPktType;
2296 PBYTE pbyTxBufferAddr; 2344 PBYTE pbyTxBufferAddr;
2297 PVOID pvRTS; 2345 void *pvRTS;
2298 PVOID pvCTS; 2346 void *pvCTS;
2299 PVOID pvTxDataHd; 2347 void *pvTxDataHd;
2300 UINT uDuration; 2348 unsigned int uDuration;
2301 UINT cbReqCount; 2349 unsigned int cbReqCount;
2302 PS802_11Header pMACHeader; 2350 PS802_11Header pMACHeader;
2303 UINT cbHeaderSize; 2351 unsigned int cbHeaderSize;
2304 UINT cbFrameBodySize; 2352 unsigned int cbFrameBodySize;
2305 BOOL bNeedACK; 2353 BOOL bNeedACK;
2306 BOOL bIsPSPOLL = FALSE; 2354 BOOL bIsPSPOLL = FALSE;
2307 PSTxBufHead pTxBufHead; 2355 PSTxBufHead pTxBufHead;
2308 UINT cbFrameSize; 2356 unsigned int cbFrameSize;
2309 UINT cbIVlen = 0; 2357 unsigned int cbIVlen = 0;
2310 UINT cbICVlen = 0; 2358 unsigned int cbICVlen = 0;
2311 UINT cbMIClen = 0; 2359 unsigned int cbMIClen = 0;
2312 UINT cbFCSlen = 4; 2360 unsigned int cbFCSlen = 4;
2313 UINT uPadding = 0; 2361 unsigned int uPadding = 0;
2314 UINT cbMICHDR = 0; 2362 unsigned int cbMICHDR = 0;
2315 UINT uLength = 0; 2363 unsigned int uLength = 0;
2316 DWORD dwMICKey0, dwMICKey1; 2364 DWORD dwMICKey0, dwMICKey1;
2317 DWORD dwMIC_Priority; 2365 DWORD dwMIC_Priority;
2318 PDWORD pdwMIC_L; 2366 PDWORD pdwMIC_L;
2319 PDWORD pdwMIC_R; 2367 PDWORD pdwMIC_R;
2320 WORD wTxBufSize; 2368 WORD wTxBufSize;
2321 UINT cbMacHdLen; 2369 unsigned int cbMacHdLen;
2322 SEthernetHeader sEthHeader; 2370 SEthernetHeader sEthHeader;
2323 PVOID pvRrvTime; 2371 void *pvRrvTime;
2324 PVOID pMICHDR; 2372 void *pMICHDR;
2325 WORD wCurrentRate = RATE_1M; 2373 WORD wCurrentRate = RATE_1M;
2326 PUWLAN_80211HDR p80211Header; 2374 PUWLAN_80211HDR p80211Header;
2327 UINT uNodeIndex = 0; 2375 unsigned int uNodeIndex = 0;
2328 BOOL bNodeExist = FALSE; 2376 BOOL bNodeExist = FALSE;
2329 SKeyItem STempKey; 2377 SKeyItem STempKey;
2330 PSKeyItem pTransmitKey = NULL; 2378 PSKeyItem pTransmitKey = NULL;
2331 PBYTE pbyIVHead; 2379 PBYTE pbyIVHead;
2332 PBYTE pbyPayloadHead; 2380 PBYTE pbyPayloadHead;
2333 PBYTE pbyMacHdr; 2381 PBYTE pbyMacHdr;
2334 UINT cbExtSuppRate = 0; 2382 unsigned int cbExtSuppRate = 0;
2335 PTX_BUFFER pTX_Buffer; 2383 PTX_BUFFER pTX_Buffer;
2336 PUSB_SEND_CONTEXT pContext; 2384 PUSB_SEND_CONTEXT pContext;
2337// PWLAN_IE pItem; 2385// PWLAN_IE pItem;
@@ -2520,9 +2568,14 @@ vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb) {
2520 pvTxDataHd = (PSTxDataHead_ab) (pbyTxBufferAddr + wTxBufSize + sizeof(SRrvTime_ab) + cbMICHDR); 2568 pvTxDataHd = (PSTxDataHead_ab) (pbyTxBufferAddr + wTxBufSize + sizeof(SRrvTime_ab) + cbMICHDR);
2521 cbHeaderSize = wTxBufSize + sizeof(SRrvTime_ab) + cbMICHDR + sizeof(STxDataHead_ab); 2569 cbHeaderSize = wTxBufSize + sizeof(SRrvTime_ab) + cbMICHDR + sizeof(STxDataHead_ab);
2522 } 2570 }
2523 memset((PVOID)(pbyTxBufferAddr + wTxBufSize), 0, (cbHeaderSize - wTxBufSize)); 2571 memset((void *)(pbyTxBufferAddr + wTxBufSize), 0,
2524 memcpy(&(sEthHeader.abyDstAddr[0]), &(p80211Header->sA3.abyAddr1[0]), U_ETHER_ADDR_LEN); 2572 (cbHeaderSize - wTxBufSize));
2525 memcpy(&(sEthHeader.abySrcAddr[0]), &(p80211Header->sA3.abyAddr2[0]), U_ETHER_ADDR_LEN); 2573 memcpy(&(sEthHeader.abyDstAddr[0]),
2574 &(p80211Header->sA3.abyAddr1[0]),
2575 ETH_ALEN);
2576 memcpy(&(sEthHeader.abySrcAddr[0]),
2577 &(p80211Header->sA3.abyAddr2[0]),
2578 ETH_ALEN);
2526 //========================= 2579 //=========================
2527 // No Fragmentation 2580 // No Fragmentation
2528 //========================= 2581 //=========================
@@ -2692,21 +2745,21 @@ vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb) {
2692 2745
2693NTSTATUS 2746NTSTATUS
2694nsDMA_tx_packet( 2747nsDMA_tx_packet(
2695 IN PSDevice pDevice, 2748 PSDevice pDevice,
2696 IN UINT uDMAIdx, 2749 unsigned int uDMAIdx,
2697 IN struct sk_buff *skb 2750 struct sk_buff *skb
2698 ) 2751 )
2699{ 2752{
2700 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 2753 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
2701 UINT BytesToWrite =0,uHeaderLen = 0; 2754 unsigned int BytesToWrite = 0, uHeaderLen = 0;
2702 UINT uNodeIndex = 0; 2755 unsigned int uNodeIndex = 0;
2703 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80}; 2756 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80};
2704 WORD wAID; 2757 WORD wAID;
2705 BYTE byPktType; 2758 BYTE byPktType;
2706 BOOL bNeedEncryption = FALSE; 2759 BOOL bNeedEncryption = FALSE;
2707 PSKeyItem pTransmitKey = NULL; 2760 PSKeyItem pTransmitKey = NULL;
2708 SKeyItem STempKey; 2761 SKeyItem STempKey;
2709 UINT ii; 2762 unsigned int ii;
2710 BOOL bTKIP_UseGTK = FALSE; 2763 BOOL bTKIP_UseGTK = FALSE;
2711 BOOL bNeedDeAuth = FALSE; 2764 BOOL bNeedDeAuth = FALSE;
2712 PBYTE pbyBSSID; 2765 PBYTE pbyBSSID;
@@ -2714,7 +2767,7 @@ nsDMA_tx_packet(
2714 PUSB_SEND_CONTEXT pContext; 2767 PUSB_SEND_CONTEXT pContext;
2715 BOOL fConvertedPacket; 2768 BOOL fConvertedPacket;
2716 PTX_BUFFER pTX_Buffer; 2769 PTX_BUFFER pTX_Buffer;
2717 UINT status; 2770 unsigned int status;
2718 WORD wKeepRate = pDevice->wCurrentRate; 2771 WORD wKeepRate = pDevice->wCurrentRate;
2719 struct net_device_stats* pStats = &pDevice->stats; 2772 struct net_device_stats* pStats = &pDevice->stats;
2720//#ifdef WPA_SM_Transtatus 2773//#ifdef WPA_SM_Transtatus
@@ -2796,7 +2849,7 @@ nsDMA_tx_packet(
2796 return STATUS_RESOURCES; 2849 return STATUS_RESOURCES;
2797 } 2850 }
2798 2851
2799 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)(skb->data), U_HEADER_LEN); 2852 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)(skb->data), ETH_HLEN);
2800 2853
2801//mike add:station mode check eapol-key challenge---> 2854//mike add:station mode check eapol-key challenge--->
2802{ 2855{
@@ -2805,10 +2858,10 @@ nsDMA_tx_packet(
2805 BYTE Descriptor_type; 2858 BYTE Descriptor_type;
2806 WORD Key_info; 2859 WORD Key_info;
2807 2860
2808 Protocol_Version = skb->data[U_HEADER_LEN]; 2861 Protocol_Version = skb->data[ETH_HLEN];
2809 Packet_Type = skb->data[U_HEADER_LEN+1]; 2862 Packet_Type = skb->data[ETH_HLEN+1];
2810 Descriptor_type = skb->data[U_HEADER_LEN+1+1+2]; 2863 Descriptor_type = skb->data[ETH_HLEN+1+1+2];
2811 Key_info = (skb->data[U_HEADER_LEN+1+1+2+1] << 8)|(skb->data[U_HEADER_LEN+1+1+2+2]); 2864 Key_info = (skb->data[ETH_HLEN+1+1+2+1] << 8)|(skb->data[ETH_HLEN+1+1+2+2]);
2812 if (pDevice->sTxEthHeader.wType == TYPE_PKT_802_1x) { 2865 if (pDevice->sTxEthHeader.wType == TYPE_PKT_802_1x) {
2813 if(((Protocol_Version==1) ||(Protocol_Version==2)) && 2866 if(((Protocol_Version==1) ||(Protocol_Version==2)) &&
2814 (Packet_Type==3)) { //802.1x OR eapol-key challenge frame transfer 2867 (Packet_Type==3)) { //802.1x OR eapol-key challenge frame transfer
@@ -2971,10 +3024,12 @@ nsDMA_tx_packet(
2971 } 3024 }
2972 } 3025 }
2973 3026
2974 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "dma_tx: pDevice->wCurrentRate = %d \n", pDevice->wCurrentRate); 3027 DBG_PRT(MSG_LEVEL_DEBUG,
3028 KERN_INFO "dma_tx: pDevice->wCurrentRate = %d\n",
3029 pDevice->wCurrentRate);
2975 3030
2976 if (wKeepRate != pDevice->wCurrentRate) { 3031 if (wKeepRate != pDevice->wCurrentRate) {
2977 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_SETPOWER, NULL); 3032 bScheduleCommand((void *) pDevice, WLAN_CMD_SETPOWER, NULL);
2978 } 3033 }
2979 3034
2980 if (pDevice->wCurrentRate <= RATE_11M) { 3035 if (pDevice->wCurrentRate <= RATE_11M) {
@@ -3057,7 +3112,9 @@ nsDMA_tx_packet(
3057 3112
3058 if ( pDevice->bEnablePSMode == TRUE ) { 3113 if ( pDevice->bEnablePSMode == TRUE ) {
3059 if ( !pDevice->bPSModeTxBurst ) { 3114 if ( !pDevice->bPSModeTxBurst ) {
3060 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_MAC_DISPOWERSAVING, NULL); 3115 bScheduleCommand((void *) pDevice,
3116 WLAN_CMD_MAC_DISPOWERSAVING,
3117 NULL);
3061 pDevice->bPSModeTxBurst = TRUE; 3118 pDevice->bPSModeTxBurst = TRUE;
3062 } 3119 }
3063 } 3120 }
@@ -3077,7 +3134,7 @@ nsDMA_tx_packet(
3077 if (bNeedDeAuth == TRUE) { 3134 if (bNeedDeAuth == TRUE) {
3078 WORD wReason = WLAN_MGMT_REASON_MIC_FAILURE; 3135 WORD wReason = WLAN_MGMT_REASON_MIC_FAILURE;
3079 3136
3080 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_DEAUTH, (PBYTE)&wReason); 3137 bScheduleCommand((void *) pDevice, WLAN_CMD_DEAUTH, (PBYTE) &wReason);
3081 } 3138 }
3082 3139
3083 if(status!=STATUS_PENDING) { 3140 if(status!=STATUS_PENDING) {
@@ -3110,14 +3167,14 @@ nsDMA_tx_packet(
3110 3167
3111BOOL 3168BOOL
3112bRelayPacketSend ( 3169bRelayPacketSend (
3113 IN PSDevice pDevice, 3170 PSDevice pDevice,
3114 IN PBYTE pbySkbData, 3171 PBYTE pbySkbData,
3115 IN UINT uDataLen, 3172 unsigned int uDataLen,
3116 IN UINT uNodeIndex 3173 unsigned int uNodeIndex
3117 ) 3174 )
3118{ 3175{
3119 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 3176 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
3120 UINT BytesToWrite =0,uHeaderLen = 0; 3177 unsigned int BytesToWrite = 0, uHeaderLen = 0;
3121 BYTE byPktType = PK_TYPE_11B; 3178 BYTE byPktType = PK_TYPE_11B;
3122 BOOL bNeedEncryption = FALSE; 3179 BOOL bNeedEncryption = FALSE;
3123 SKeyItem STempKey; 3180 SKeyItem STempKey;
@@ -3127,7 +3184,7 @@ bRelayPacketSend (
3127 BYTE byPktTyp; 3184 BYTE byPktTyp;
3128 BOOL fConvertedPacket; 3185 BOOL fConvertedPacket;
3129 PTX_BUFFER pTX_Buffer; 3186 PTX_BUFFER pTX_Buffer;
3130 UINT status; 3187 unsigned int status;
3131 WORD wKeepRate = pDevice->wCurrentRate; 3188 WORD wKeepRate = pDevice->wCurrentRate;
3132 3189
3133 3190
@@ -3138,7 +3195,7 @@ bRelayPacketSend (
3138 return FALSE; 3195 return FALSE;
3139 } 3196 }
3140 3197
3141 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)pbySkbData, U_HEADER_LEN); 3198 memcpy(pDevice->sTxEthHeader.abyDstAddr, (PBYTE)pbySkbData, ETH_HLEN);
3142 3199
3143 if (pDevice->bEncryptionEnable == TRUE) { 3200 if (pDevice->bEncryptionEnable == TRUE) {
3144 bNeedEncryption = TRUE; 3201 bNeedEncryption = TRUE;
@@ -3197,9 +3254,8 @@ bRelayPacketSend (
3197 pDevice->wCurrentRate = pMgmt->sNodeDBTable[uNodeIndex].wTxDataRate; 3254 pDevice->wCurrentRate = pMgmt->sNodeDBTable[uNodeIndex].wTxDataRate;
3198 } 3255 }
3199 3256
3200
3201 if (wKeepRate != pDevice->wCurrentRate) { 3257 if (wKeepRate != pDevice->wCurrentRate) {
3202 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SETPOWER, NULL); 3258 bScheduleCommand((void *) pDevice, WLAN_CMD_SETPOWER, NULL);
3203 } 3259 }
3204 3260
3205 if (pDevice->wCurrentRate <= RATE_11M) 3261 if (pDevice->wCurrentRate <= RATE_11M)
diff --git a/drivers/staging/vt6656/rxtx.h b/drivers/staging/vt6656/rxtx.h
index 6bc22d371c1e..f90de42d7abe 100644
--- a/drivers/staging/vt6656/rxtx.h
+++ b/drivers/staging/vt6656/rxtx.h
@@ -43,8 +43,8 @@
43typedef struct tagSRTSDataF { 43typedef struct tagSRTSDataF {
44 WORD wFrameControl; 44 WORD wFrameControl;
45 WORD wDurationID; 45 WORD wDurationID;
46 BYTE abyRA[U_ETHER_ADDR_LEN]; 46 BYTE abyRA[ETH_ALEN];
47 BYTE abyTA[U_ETHER_ADDR_LEN]; 47 BYTE abyTA[ETH_ALEN];
48} SRTSDataF, *PSRTSDataF; 48} SRTSDataF, *PSRTSDataF;
49 49
50// 50//
@@ -53,7 +53,7 @@ typedef struct tagSRTSDataF {
53typedef struct tagSCTSDataF { 53typedef struct tagSCTSDataF {
54 WORD wFrameControl; 54 WORD wFrameControl;
55 WORD wDurationID; 55 WORD wDurationID;
56 BYTE abyRA[U_ETHER_ADDR_LEN]; 56 BYTE abyRA[ETH_ALEN];
57 WORD wReserved; 57 WORD wReserved;
58} SCTSDataF, *PSCTSDataF; 58} SCTSDataF, *PSCTSDataF;
59 59
@@ -667,28 +667,28 @@ typedef struct tagSBEACON_BUFFER
667 667
668BOOL 668BOOL
669bPacketToWirelessUsb( 669bPacketToWirelessUsb(
670 IN PSDevice pDevice, 670 PSDevice pDevice,
671 IN BYTE byPktType, 671 BYTE byPktType,
672 IN PBYTE usbPacketBuf, 672 PBYTE usbPacketBuf,
673 IN BOOL bNeedEncrypt, 673 BOOL bNeedEncrypt,
674 IN UINT cbPayloadSize, 674 unsigned int cbPayloadSize,
675 IN UINT uDMAIdx, 675 unsigned int uDMAIdx,
676 IN PSEthernetHeader psEthHeader, 676 PSEthernetHeader psEthHeader,
677 IN PBYTE pPacket, 677 PBYTE pPacket,
678 IN PSKeyItem pTransmitKey, 678 PSKeyItem pTransmitKey,
679 IN UINT uNodeIndex, 679 unsigned int uNodeIndex,
680 IN WORD wCurrentRate, 680 WORD wCurrentRate,
681 OUT UINT *pcbHeaderLen, 681 unsigned int *pcbHeaderLen,
682 OUT UINT *pcbTotalLen 682 unsigned int *pcbTotalLen
683 ); 683 );
684 684
685VOID vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb); 685void vDMA0_tx_80211(PSDevice pDevice, struct sk_buff *skb);
686NTSTATUS nsDMA_tx_packet(PSDevice pDevice, UINT uDMAIdx, struct sk_buff *skb); 686NTSTATUS nsDMA_tx_packet(PSDevice pDevice,
687 unsigned int uDMAIdx,
688 struct sk_buff *skb);
687CMD_STATUS csMgmt_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket); 689CMD_STATUS csMgmt_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket);
688CMD_STATUS csBeacon_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket); 690CMD_STATUS csBeacon_xmit(PSDevice pDevice, PSTxMgmtPacket pPacket);
689BOOL bRelayPacketSend(PSDevice pDevice, PBYTE pbySkbData, UINT uDataLen, UINT uNodeIndex); 691BOOL bRelayPacketSend(PSDevice pDevice, PBYTE pbySkbData,
690 692 unsigned int uDataLen, unsigned int uNodeIndex);
691#endif // __RXTX_H__
692
693
694 693
694#endif /* __RXTX_H__ */
diff --git a/drivers/staging/vt6656/srom.h b/drivers/staging/vt6656/srom.h
index 4c89e7ad6b4c..dba21a54414b 100644
--- a/drivers/staging/vt6656/srom.h
+++ b/drivers/staging/vt6656/srom.h
@@ -124,4 +124,4 @@ typedef struct tagSSromReg {
124 124
125/*--------------------- Export Functions --------------------------*/ 125/*--------------------- Export Functions --------------------------*/
126 126
127#endif // __EEPROM_H__ 127#endif /* __EEPROM_H__ */
diff --git a/drivers/staging/vt6656/tcrc.c b/drivers/staging/vt6656/tcrc.c
index 5f0c74763f87..e25021e850a0 100644
--- a/drivers/staging/vt6656/tcrc.c
+++ b/drivers/staging/vt6656/tcrc.c
@@ -41,7 +41,7 @@
41 41
42/*--------------------- Static Variables --------------------------*/ 42/*--------------------- Static Variables --------------------------*/
43 43
44// 32-bit CRC table 44/* 32-bit CRC table */
45static const DWORD s_adwCrc32Table[256] = { 45static const DWORD s_adwCrc32Table[256] = {
46 0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL, 46 0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL,
47 0x076DC419L, 0x706AF48FL, 0xE963A535L, 0x9E6495A3L, 47 0x076DC419L, 0x706AF48FL, 0xE963A535L, 0x9E6495A3L,
@@ -132,17 +132,18 @@ static const DWORD s_adwCrc32Table[256] = {
132 * Return Value: CRC-32 132 * Return Value: CRC-32
133 * 133 *
134-*/ 134-*/
135DWORD CRCdwCrc32 (PBYTE pbyData, UINT cbByte, DWORD dwCrcSeed) 135DWORD CRCdwCrc32(PBYTE pbyData, unsigned int cbByte, DWORD dwCrcSeed)
136{ 136{
137 DWORD dwCrc; 137 DWORD dwCrc;
138 138
139 dwCrc = dwCrcSeed; 139 dwCrc = dwCrcSeed;
140 while (cbByte--) { 140 while (cbByte--) {
141 dwCrc = s_adwCrc32Table[(BYTE)((dwCrc ^ (*pbyData)) & 0xFF)] ^ (dwCrc >> 8); 141 dwCrc = s_adwCrc32Table[(BYTE)((dwCrc ^ (*pbyData)) & 0xFF)] ^
142 pbyData++; 142 (dwCrc >> 8);
143 } 143 pbyData++;
144 }
144 145
145 return dwCrc; 146 return dwCrc;
146} 147}
147 148
148 149
@@ -164,7 +165,7 @@ DWORD CRCdwCrc32 (PBYTE pbyData, UINT cbByte, DWORD dwCrcSeed)
164 * Return Value: CRC-32 165 * Return Value: CRC-32
165 * 166 *
166-*/ 167-*/
167DWORD CRCdwGetCrc32 (PBYTE pbyData, UINT cbByte) 168DWORD CRCdwGetCrc32(PBYTE pbyData, unsigned int cbByte)
168{ 169{
169 return ~CRCdwCrc32(pbyData, cbByte, 0xFFFFFFFFL); 170 return ~CRCdwCrc32(pbyData, cbByte, 0xFFFFFFFFL);
170} 171}
@@ -190,7 +191,7 @@ DWORD CRCdwGetCrc32 (PBYTE pbyData, UINT cbByte)
190 * Return Value: CRC-32 191 * Return Value: CRC-32
191 * 192 *
192-*/ 193-*/
193DWORD CRCdwGetCrc32Ex(PBYTE pbyData, UINT cbByte, DWORD dwPreCRC) 194DWORD CRCdwGetCrc32Ex(PBYTE pbyData, unsigned int cbByte, DWORD dwPreCRC)
194{ 195{
195 return CRCdwCrc32(pbyData, cbByte, dwPreCRC); 196 return CRCdwCrc32(pbyData, cbByte, dwPreCRC);
196} 197}
diff --git a/drivers/staging/vt6656/tcrc.h b/drivers/staging/vt6656/tcrc.h
index 5faa48b0a748..4dfd01e477a4 100644
--- a/drivers/staging/vt6656/tcrc.h
+++ b/drivers/staging/vt6656/tcrc.h
@@ -43,11 +43,8 @@
43 43
44/*--------------------- Export Functions --------------------------*/ 44/*--------------------- Export Functions --------------------------*/
45 45
46DWORD CRCdwCrc32(PBYTE pbyData, UINT cbByte, DWORD dwCrcSeed); 46DWORD CRCdwCrc32(PBYTE pbyData, unsigned int cbByte, DWORD dwCrcSeed);
47DWORD CRCdwGetCrc32(PBYTE pbyData, UINT cbByte); 47DWORD CRCdwGetCrc32(PBYTE pbyData, unsigned int cbByte);
48DWORD CRCdwGetCrc32Ex(PBYTE pbyData, UINT cbByte, DWORD dwPreCRC); 48DWORD CRCdwGetCrc32Ex(PBYTE pbyData, unsigned int cbByte, DWORD dwPreCRC);
49
50#endif // __TCRC_H__
51
52
53 49
50#endif /* __TCRC_H__ */
diff --git a/drivers/staging/vt6656/tether.c b/drivers/staging/vt6656/tether.c
index c90b469ad545..4f368f174b21 100644
--- a/drivers/staging/vt6656/tether.c
+++ b/drivers/staging/vt6656/tether.c
@@ -61,25 +61,25 @@
61 * Return Value: Hash value 61 * Return Value: Hash value
62 * 62 *
63 */ 63 */
64BYTE ETHbyGetHashIndexByCrc32 (PBYTE pbyMultiAddr) 64BYTE ETHbyGetHashIndexByCrc32(PBYTE pbyMultiAddr)
65{ 65{
66 int ii; 66 int ii;
67 BYTE byTmpHash; 67 BYTE byTmpHash;
68 BYTE byHash = 0; 68 BYTE byHash = 0;
69 69
70 // get the least 6-bits from CRC generator 70 /* get the least 6-bits from CRC generator */
71 byTmpHash = (BYTE)(CRCdwCrc32(pbyMultiAddr, U_ETHER_ADDR_LEN, 71 byTmpHash = (BYTE)(CRCdwCrc32(pbyMultiAddr, ETH_ALEN,
72 0xFFFFFFFFL) & 0x3F); 72 0xFFFFFFFFL) & 0x3F);
73 // reverse most bit to least bit 73 /* reverse most bit to least bit */
74 for (ii = 0; ii < (sizeof(byTmpHash) * 8); ii++) { 74 for (ii = 0; ii < (sizeof(byTmpHash) * 8); ii++) {
75 byHash <<= 1; 75 byHash <<= 1;
76 if (byTmpHash & 0x01) 76 if (byTmpHash & 0x01)
77 byHash |= 1; 77 byHash |= 1;
78 byTmpHash >>= 1; 78 byTmpHash >>= 1;
79 } 79 }
80 80
81 // adjust 6-bits to the right most 81 /* adjust 6-bits to the right most */
82 return (byHash >> 2); 82 return byHash >> 2;
83} 83}
84 84
85 85
@@ -96,14 +96,13 @@ BYTE ETHbyGetHashIndexByCrc32 (PBYTE pbyMultiAddr)
96 * Return Value: TRUE if ok; FALSE if error. 96 * Return Value: TRUE if ok; FALSE if error.
97 * 97 *
98 */ 98 */
99BOOL ETHbIsBufferCrc32Ok (PBYTE pbyBuffer, UINT cbFrameLength) 99BOOL ETHbIsBufferCrc32Ok(PBYTE pbyBuffer, unsigned int cbFrameLength)
100{ 100{
101 DWORD dwCRC; 101 DWORD dwCRC;
102 102
103 dwCRC = CRCdwGetCrc32(pbyBuffer, cbFrameLength - 4); 103 dwCRC = CRCdwGetCrc32(pbyBuffer, cbFrameLength - 4);
104 if (cpu_to_le32(*((PDWORD)(pbyBuffer + cbFrameLength - 4))) != dwCRC) { 104 if (cpu_to_le32(*((PDWORD)(pbyBuffer + cbFrameLength - 4))) != dwCRC)
105 return FALSE; 105 return FALSE;
106 } 106 return TRUE;
107 return TRUE;
108} 107}
109 108
diff --git a/drivers/staging/vt6656/tether.h b/drivers/staging/vt6656/tether.h
index 5a3c326436c6..d63586d5cdb2 100644
--- a/drivers/staging/vt6656/tether.h
+++ b/drivers/staging/vt6656/tether.h
@@ -29,26 +29,24 @@
29#ifndef __TETHER_H__ 29#ifndef __TETHER_H__
30#define __TETHER_H__ 30#define __TETHER_H__
31 31
32#include <linux/if_ether.h>
32#include "ttype.h" 33#include "ttype.h"
33 34
34/*--------------------- Export Definitions -------------------------*/ 35/*--------------------- Export Definitions -------------------------*/
35// 36//
36// constants 37// constants
37// 38//
38#define U_ETHER_ADDR_LEN 6 // Ethernet address length
39#define U_TYPE_LEN 2 //
40#define U_CRC_LEN 4 // 39#define U_CRC_LEN 4 //
41#define U_HEADER_LEN (U_ETHER_ADDR_LEN * 2 + U_TYPE_LEN) 40#define U_ETHER_ADDR_STR_LEN (ETH_ALEN * 2 + 1)
42#define U_ETHER_ADDR_STR_LEN (U_ETHER_ADDR_LEN * 2 + 1)
43 // Ethernet address string length 41 // Ethernet address string length
44 42
45#define MIN_DATA_LEN 46 // min data length 43#define MIN_DATA_LEN 46 // min data length
46#define MAX_DATA_LEN 1500 // max data length 44#define MAX_DATA_LEN 1500 // max data length
47 45
48#define MIN_PACKET_LEN (MIN_DATA_LEN + U_HEADER_LEN) 46#define MIN_PACKET_LEN (MIN_DATA_LEN + ETH_HLEN)
49 // 60 47 // 60
50 // min total packet length (tx) 48 // min total packet length (tx)
51#define MAX_PACKET_LEN (MAX_DATA_LEN + U_HEADER_LEN) 49#define MAX_PACKET_LEN (MAX_DATA_LEN + ETH_HLEN)
52 // 1514 50 // 1514
53 // max total packet length (tx) 51 // max total packet length (tx)
54 52
@@ -167,8 +165,8 @@
167// Ethernet packet 165// Ethernet packet
168// 166//
169typedef struct tagSEthernetHeader { 167typedef struct tagSEthernetHeader {
170 BYTE abyDstAddr[U_ETHER_ADDR_LEN]; 168 BYTE abyDstAddr[ETH_ALEN];
171 BYTE abySrcAddr[U_ETHER_ADDR_LEN]; 169 BYTE abySrcAddr[ETH_ALEN];
172 WORD wType; 170 WORD wType;
173}__attribute__ ((__packed__)) 171}__attribute__ ((__packed__))
174SEthernetHeader, *PSEthernetHeader; 172SEthernetHeader, *PSEthernetHeader;
@@ -178,8 +176,8 @@ SEthernetHeader, *PSEthernetHeader;
178// 802_3 packet 176// 802_3 packet
179// 177//
180typedef struct tagS802_3Header { 178typedef struct tagS802_3Header {
181 BYTE abyDstAddr[U_ETHER_ADDR_LEN]; 179 BYTE abyDstAddr[ETH_ALEN];
182 BYTE abySrcAddr[U_ETHER_ADDR_LEN]; 180 BYTE abySrcAddr[ETH_ALEN];
183 WORD wLen; 181 WORD wLen;
184}__attribute__ ((__packed__)) 182}__attribute__ ((__packed__))
185S802_3Header, *PS802_3Header; 183S802_3Header, *PS802_3Header;
@@ -190,11 +188,11 @@ S802_3Header, *PS802_3Header;
190typedef struct tagS802_11Header { 188typedef struct tagS802_11Header {
191 WORD wFrameCtl; 189 WORD wFrameCtl;
192 WORD wDurationID; 190 WORD wDurationID;
193 BYTE abyAddr1[U_ETHER_ADDR_LEN]; 191 BYTE abyAddr1[ETH_ALEN];
194 BYTE abyAddr2[U_ETHER_ADDR_LEN]; 192 BYTE abyAddr2[ETH_ALEN];
195 BYTE abyAddr3[U_ETHER_ADDR_LEN]; 193 BYTE abyAddr3[ETH_ALEN];
196 WORD wSeqCtl; 194 WORD wSeqCtl;
197 BYTE abyAddr4[U_ETHER_ADDR_LEN]; 195 BYTE abyAddr4[ETH_ALEN];
198}__attribute__ ((__packed__)) 196}__attribute__ ((__packed__))
199S802_11Header, *PS802_11Header; 197S802_11Header, *PS802_11Header;
200 198
@@ -228,9 +226,6 @@ S802_11Header, *PS802_11Header;
228 226
229BYTE ETHbyGetHashIndexByCrc32(PBYTE pbyMultiAddr); 227BYTE ETHbyGetHashIndexByCrc32(PBYTE pbyMultiAddr);
230//BYTE ETHbyGetHashIndexByCrc(PBYTE pbyMultiAddr); 228//BYTE ETHbyGetHashIndexByCrc(PBYTE pbyMultiAddr);
231BOOL ETHbIsBufferCrc32Ok(PBYTE pbyBuffer, UINT cbFrameLength); 229BOOL ETHbIsBufferCrc32Ok(PBYTE pbyBuffer, unsigned int cbFrameLength);
232
233#endif // __TETHER_H__
234
235
236 230
231#endif /* __TETHER_H__ */
diff --git a/drivers/staging/vt6656/tkip.c b/drivers/staging/vt6656/tkip.c
index 8ca154080e98..f83af5913aa6 100644
--- a/drivers/staging/vt6656/tkip.c
+++ b/drivers/staging/vt6656/tkip.c
@@ -183,7 +183,7 @@ unsigned int rotr1(unsigned int a)
183 * Return Value: none 183 * Return Value: none
184 * 184 *
185 */ 185 */
186VOID TKIPvMixKey( 186void TKIPvMixKey(
187 PBYTE pbyTKey, 187 PBYTE pbyTKey,
188 PBYTE pbyTA, 188 PBYTE pbyTA,
189 WORD wTSC15_0, 189 WORD wTSC15_0,
diff --git a/drivers/staging/vt6656/tkip.h b/drivers/staging/vt6656/tkip.h
index 847ecdf97ee8..47c3a853b92a 100644
--- a/drivers/staging/vt6656/tkip.h
+++ b/drivers/staging/vt6656/tkip.h
@@ -46,7 +46,7 @@
46 46
47/*--------------------- Export Functions --------------------------*/ 47/*--------------------- Export Functions --------------------------*/
48 48
49VOID TKIPvMixKey( 49void TKIPvMixKey(
50 PBYTE pbyTKey, 50 PBYTE pbyTKey,
51 PBYTE pbyTA, 51 PBYTE pbyTA,
52 WORD wTSC15_0, 52 WORD wTSC15_0,
@@ -54,7 +54,4 @@ VOID TKIPvMixKey(
54 PBYTE pbyRC4Key 54 PBYTE pbyRC4Key
55 ); 55 );
56 56
57#endif // __TKIP_H__ 57#endif /* __TKIP_H__ */
58
59
60
diff --git a/drivers/staging/vt6656/tmacro.h b/drivers/staging/vt6656/tmacro.h
index e96c140de052..3c81e2b0791d 100644
--- a/drivers/staging/vt6656/tmacro.h
+++ b/drivers/staging/vt6656/tmacro.h
@@ -57,6 +57,4 @@
57#define MAKEDWORD(lw, hw) ((DWORD)(((WORD)(lw)) | (((DWORD)((WORD)(hw))) << 16))) 57#define MAKEDWORD(lw, hw) ((DWORD)(((WORD)(lw)) | (((DWORD)((WORD)(hw))) << 16)))
58#endif 58#endif
59 59
60#endif // __TMACRO_H__ 60#endif /* __TMACRO_H__ */
61
62
diff --git a/drivers/staging/vt6656/ttype.h b/drivers/staging/vt6656/ttype.h
index 9ee3f436fc3d..c27f9858e2e9 100644
--- a/drivers/staging/vt6656/ttype.h
+++ b/drivers/staging/vt6656/ttype.h
@@ -26,25 +26,11 @@
26 * 26 *
27 */ 27 */
28 28
29
30#ifndef __TTYPE_H__ 29#ifndef __TTYPE_H__
31#define __TTYPE_H__ 30#define __TTYPE_H__
32 31
33
34/******* Common definitions and typedefs ***********************************/ 32/******* Common definitions and typedefs ***********************************/
35 33
36#ifndef VOID
37#define VOID void
38#endif
39
40#ifndef IN
41#define IN
42#endif
43
44#ifndef OUT
45#define OUT
46#endif
47
48//2007-0115-05<Add>by MikeLiu 34//2007-0115-05<Add>by MikeLiu
49#ifndef TxInSleep 35#ifndef TxInSleep
50#define TxInSleep 36#define TxInSleep
@@ -52,7 +38,6 @@
52 38
53//DavidWang 39//DavidWang
54 40
55
56//2007-0814-01<Add>by MikeLiu 41//2007-0814-01<Add>by MikeLiu
57#ifndef Safe_Close 42#ifndef Safe_Close
58#define Safe_Close 43#define Safe_Close
@@ -72,11 +57,6 @@ typedef int BOOL;
72#define FALSE 0 57#define FALSE 0
73#endif 58#endif
74 59
75
76#if !defined(SUCCESS)
77#define SUCCESS 0
78#endif
79
80//2007-0809-01<Add>by MikeLiu 60//2007-0809-01<Add>by MikeLiu
81#ifndef update_BssList 61#ifndef update_BssList
82#define update_BssList 62#define update_BssList
@@ -92,31 +72,6 @@ typedef int BOOL;
92 72
93/****** Simple typedefs ***************************************************/ 73/****** Simple typedefs ***************************************************/
94 74
95/* These lines assume that your compiler's longs are 32 bits and
96 * shorts are 16 bits. It is already assumed that chars are 8 bits,
97 * but it doesn't matter if they're signed or unsigned.
98 */
99
100typedef signed char I8; /* 8-bit signed integer */
101
102typedef unsigned char U8; /* 8-bit unsigned integer */
103typedef unsigned short U16; /* 16-bit unsigned integer */
104typedef unsigned long U32; /* 32-bit unsigned integer */
105
106
107typedef char CHAR;
108typedef signed short SHORT;
109typedef signed int INT;
110typedef signed long LONG;
111
112typedef unsigned char UCHAR;
113typedef unsigned short USHORT;
114typedef unsigned int UINT;
115typedef unsigned long ULONG;
116typedef unsigned long long ULONGLONG; //64 bit
117
118
119
120typedef unsigned char BYTE; // 8-bit 75typedef unsigned char BYTE; // 8-bit
121typedef unsigned short WORD; // 16-bit 76typedef unsigned short WORD; // 16-bit
122typedef unsigned long DWORD; // 32-bit 77typedef unsigned long DWORD; // 32-bit
@@ -133,7 +88,6 @@ typedef union tagUQuadWord {
133} UQuadWord; 88} UQuadWord;
134typedef UQuadWord QWORD; // 64-bit 89typedef UQuadWord QWORD; // 64-bit
135 90
136
137/****** Common pointer types ***********************************************/ 91/****** Common pointer types ***********************************************/
138 92
139typedef unsigned long ULONG_PTR; // 32-bit 93typedef unsigned long ULONG_PTR; // 32-bit
@@ -150,13 +104,4 @@ typedef DWORD * PDWORD;
150 104
151typedef QWORD * PQWORD; 105typedef QWORD * PQWORD;
152 106
153typedef void * PVOID; 107#endif /* __TTYPE_H__ */
154
155// handle declaration
156#ifdef STRICT
157typedef void *HANDLE;
158#else
159typedef PVOID HANDLE;
160#endif
161
162#endif // __TTYPE_H__
diff --git a/drivers/staging/vt6656/upc.h b/drivers/staging/vt6656/upc.h
index acd1b661490d..b33aba4b12c9 100644
--- a/drivers/staging/vt6656/upc.h
+++ b/drivers/staging/vt6656/upc.h
@@ -141,7 +141,7 @@
141 141
142#define PCAvDelayByIO(uDelayUnit) { \ 142#define PCAvDelayByIO(uDelayUnit) { \
143 BYTE byData; \ 143 BYTE byData; \
144 ULONG ii; \ 144 unsigned long ii; \
145 \ 145 \
146 if (uDelayUnit <= 50) { \ 146 if (uDelayUnit <= 50) { \
147 udelay(uDelayUnit); \ 147 udelay(uDelayUnit); \
@@ -159,8 +159,4 @@
159 159
160/*--------------------- Export Functions --------------------------*/ 160/*--------------------- Export Functions --------------------------*/
161 161
162 162#endif /* __UPC_H__ */
163
164
165#endif // __UPC_H__
166
diff --git a/drivers/staging/vt6656/usbpipe.c b/drivers/staging/vt6656/usbpipe.c
index 65e91a332a66..fd2355e34fb0 100644
--- a/drivers/staging/vt6656/usbpipe.c
+++ b/drivers/staging/vt6656/usbpipe.c
@@ -71,36 +71,36 @@ static int msglevel =MSG_LEVEL_INFO;
71 71
72/*--------------------- Static Functions --------------------------*/ 72/*--------------------- Static Functions --------------------------*/
73static 73static
74VOID 74void
75s_nsInterruptUsbIoCompleteRead( 75s_nsInterruptUsbIoCompleteRead(
76 IN struct urb *urb 76 struct urb *urb
77 ); 77 );
78 78
79 79
80static 80static
81VOID 81void
82s_nsBulkInUsbIoCompleteRead( 82s_nsBulkInUsbIoCompleteRead(
83 IN struct urb *urb 83 struct urb *urb
84 ); 84 );
85 85
86 86
87static 87static
88VOID 88void
89s_nsBulkOutIoCompleteWrite( 89s_nsBulkOutIoCompleteWrite(
90 IN struct urb *urb 90 struct urb *urb
91 ); 91 );
92 92
93 93
94static 94static
95VOID 95void
96s_nsControlInUsbIoCompleteRead( 96s_nsControlInUsbIoCompleteRead(
97 IN struct urb *urb 97 struct urb *urb
98 ); 98 );
99 99
100static 100static
101VOID 101void
102s_nsControlInUsbIoCompleteWrite( 102s_nsControlInUsbIoCompleteWrite(
103 IN struct urb *urb 103 struct urb *urb
104 ); 104 );
105 105
106/*--------------------- Export Variables --------------------------*/ 106/*--------------------- Export Variables --------------------------*/
@@ -111,12 +111,12 @@ s_nsControlInUsbIoCompleteWrite(
111 111
112NTSTATUS 112NTSTATUS
113PIPEnsControlOutAsyn( 113PIPEnsControlOutAsyn(
114 IN PSDevice pDevice, 114 PSDevice pDevice,
115 IN BYTE byRequest, 115 BYTE byRequest,
116 IN WORD wValue, 116 WORD wValue,
117 IN WORD wIndex, 117 WORD wIndex,
118 IN WORD wLength, 118 WORD wLength,
119 IN PBYTE pbyBuffer 119 PBYTE pbyBuffer
120 ) 120 )
121{ 121{
122 NTSTATUS ntStatus; 122 NTSTATUS ntStatus;
@@ -142,7 +142,7 @@ PIPEnsControlOutAsyn(
142 0x40, // RequestType 142 0x40, // RequestType
143 wValue, 143 wValue,
144 wIndex, 144 wIndex,
145 (PVOID) pbyBuffer, 145 (void *) pbyBuffer,
146 wLength, 146 wLength,
147 HZ 147 HZ
148 ); 148 );
@@ -162,12 +162,12 @@ PIPEnsControlOutAsyn(
162 162
163NTSTATUS 163NTSTATUS
164PIPEnsControlOut( 164PIPEnsControlOut(
165 IN PSDevice pDevice, 165 PSDevice pDevice,
166 IN BYTE byRequest, 166 BYTE byRequest,
167 IN WORD wValue, 167 WORD wValue,
168 IN WORD wIndex, 168 WORD wIndex,
169 IN WORD wLength, 169 WORD wLength,
170 IN PBYTE pbyBuffer 170 PBYTE pbyBuffer
171 ) 171 )
172{ 172{
173 NTSTATUS ntStatus = 0; 173 NTSTATUS ntStatus = 0;
@@ -193,7 +193,8 @@ PIPEnsControlOut(
193 usb_sndctrlpipe(pDevice->usb , 0), (char *) &pDevice->sUsbCtlRequest, 193 usb_sndctrlpipe(pDevice->usb , 0), (char *) &pDevice->sUsbCtlRequest,
194 pbyBuffer, wLength, s_nsControlInUsbIoCompleteWrite, pDevice); 194 pbyBuffer, wLength, s_nsControlInUsbIoCompleteWrite, pDevice);
195 195
196 if ((ntStatus = usb_submit_urb(pDevice->pControlURB, GFP_ATOMIC)) != 0) { 196 ntStatus = usb_submit_urb(pDevice->pControlURB, GFP_ATOMIC);
197 if (ntStatus != 0) {
197 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"control send request submission failed: %d\n", ntStatus); 198 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"control send request submission failed: %d\n", ntStatus);
198 return STATUS_FAILURE; 199 return STATUS_FAILURE;
199 } 200 }
@@ -223,12 +224,12 @@ PIPEnsControlOut(
223 224
224NTSTATUS 225NTSTATUS
225PIPEnsControlIn( 226PIPEnsControlIn(
226 IN PSDevice pDevice, 227 PSDevice pDevice,
227 IN BYTE byRequest, 228 BYTE byRequest,
228 IN WORD wValue, 229 WORD wValue,
229 IN WORD wIndex, 230 WORD wIndex,
230 IN WORD wLength, 231 WORD wLength,
231 IN OUT PBYTE pbyBuffer 232 PBYTE pbyBuffer
232 ) 233 )
233{ 234{
234 NTSTATUS ntStatus = 0; 235 NTSTATUS ntStatus = 0;
@@ -251,7 +252,8 @@ PIPEnsControlIn(
251 usb_rcvctrlpipe(pDevice->usb , 0), (char *) &pDevice->sUsbCtlRequest, 252 usb_rcvctrlpipe(pDevice->usb , 0), (char *) &pDevice->sUsbCtlRequest,
252 pbyBuffer, wLength, s_nsControlInUsbIoCompleteRead, pDevice); 253 pbyBuffer, wLength, s_nsControlInUsbIoCompleteRead, pDevice);
253 254
254 if ((ntStatus = usb_submit_urb(pDevice->pControlURB, GFP_ATOMIC)) != 0) { 255 ntStatus = usb_submit_urb(pDevice->pControlURB, GFP_ATOMIC);
256 if (ntStatus != 0) {
255 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"control request submission failed: %d\n", ntStatus); 257 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"control request submission failed: %d\n", ntStatus);
256 }else { 258 }else {
257 MP_SET_FLAG(pDevice, fMP_CONTROL_READS); 259 MP_SET_FLAG(pDevice, fMP_CONTROL_READS);
@@ -277,9 +279,9 @@ PIPEnsControlIn(
277} 279}
278 280
279static 281static
280VOID 282void
281s_nsControlInUsbIoCompleteWrite( 283s_nsControlInUsbIoCompleteWrite(
282 IN struct urb *urb 284 struct urb *urb
283 ) 285 )
284{ 286{
285 PSDevice pDevice; 287 PSDevice pDevice;
@@ -318,9 +320,9 @@ s_nsControlInUsbIoCompleteWrite(
318 * 320 *
319 */ 321 */
320static 322static
321VOID 323void
322s_nsControlInUsbIoCompleteRead( 324s_nsControlInUsbIoCompleteRead(
323 IN struct urb *urb 325 struct urb *urb
324 ) 326 )
325{ 327{
326 PSDevice pDevice; 328 PSDevice pDevice;
@@ -360,7 +362,7 @@ s_nsControlInUsbIoCompleteRead(
360 */ 362 */
361NTSTATUS 363NTSTATUS
362PIPEnsInterruptRead( 364PIPEnsInterruptRead(
363 IN PSDevice pDevice 365 PSDevice pDevice
364 ) 366 )
365{ 367{
366 NTSTATUS ntStatus = STATUS_FAILURE; 368 NTSTATUS ntStatus = STATUS_FAILURE;
@@ -383,7 +385,7 @@ PIPEnsInterruptRead(
383 usb_fill_int_urb(pDevice->pInterruptURB, 385 usb_fill_int_urb(pDevice->pInterruptURB,
384 pDevice->usb, 386 pDevice->usb,
385 usb_rcvintpipe(pDevice->usb, 1), 387 usb_rcvintpipe(pDevice->usb, 1),
386 (PVOID) pDevice->intBuf.pDataBuf, 388 (void *) pDevice->intBuf.pDataBuf,
387 MAX_INTERRUPT_SIZE, 389 MAX_INTERRUPT_SIZE,
388 s_nsInterruptUsbIoCompleteRead, 390 s_nsInterruptUsbIoCompleteRead,
389 pDevice, 391 pDevice,
@@ -394,7 +396,7 @@ PIPEnsInterruptRead(
394 usb_fill_int_urb(pDevice->pInterruptURB, 396 usb_fill_int_urb(pDevice->pInterruptURB,
395 pDevice->usb, 397 pDevice->usb,
396 usb_rcvintpipe(pDevice->usb, 1), 398 usb_rcvintpipe(pDevice->usb, 1),
397 (PVOID) pDevice->intBuf.pDataBuf, 399 (void *) pDevice->intBuf.pDataBuf,
398 MAX_INTERRUPT_SIZE, 400 MAX_INTERRUPT_SIZE,
399 s_nsInterruptUsbIoCompleteRead, 401 s_nsInterruptUsbIoCompleteRead,
400 pDevice, 402 pDevice,
@@ -407,14 +409,15 @@ PIPEnsInterruptRead(
407usb_fill_bulk_urb(pDevice->pInterruptURB, 409usb_fill_bulk_urb(pDevice->pInterruptURB,
408 pDevice->usb, 410 pDevice->usb,
409 usb_rcvbulkpipe(pDevice->usb, 1), 411 usb_rcvbulkpipe(pDevice->usb, 1),
410 (PVOID) pDevice->intBuf.pDataBuf, 412 (void *) pDevice->intBuf.pDataBuf,
411 MAX_INTERRUPT_SIZE, 413 MAX_INTERRUPT_SIZE,
412 s_nsInterruptUsbIoCompleteRead, 414 s_nsInterruptUsbIoCompleteRead,
413 pDevice); 415 pDevice);
414#endif 416#endif
415#endif 417#endif
416 418
417 if ((ntStatus = usb_submit_urb(pDevice->pInterruptURB, GFP_ATOMIC)) != 0) { 419 ntStatus = usb_submit_urb(pDevice->pInterruptURB, GFP_ATOMIC);
420 if (ntStatus != 0) {
418 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit int URB failed %d\n", ntStatus); 421 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit int URB failed %d\n", ntStatus);
419 } 422 }
420 423
@@ -438,9 +441,9 @@ usb_fill_bulk_urb(pDevice->pInterruptURB,
438 * 441 *
439 */ 442 */
440static 443static
441VOID 444void
442s_nsInterruptUsbIoCompleteRead( 445s_nsInterruptUsbIoCompleteRead(
443 IN struct urb *urb 446 struct urb *urb
444 ) 447 )
445 448
446{ 449{
@@ -481,12 +484,11 @@ s_nsInterruptUsbIoCompleteRead(
481 pDevice->fKillEventPollingThread = TRUE; 484 pDevice->fKillEventPollingThread = TRUE;
482// } 485// }
483 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"IntUSBIoCompleteControl STATUS = %d\n", ntStatus ); 486 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"IntUSBIoCompleteControl STATUS = %d\n", ntStatus );
484 } 487 } else {
485 else { 488 pDevice->ulIntInBytesRead += (unsigned long) urb->actual_length;
486 pDevice->ulIntInBytesRead += (ULONG)urb->actual_length; 489 pDevice->ulIntInContCRCError = 0;
487 pDevice->ulIntInContCRCError = 0; 490 pDevice->bEventAvailable = TRUE;
488 pDevice->bEventAvailable = TRUE; 491 INTnsProcessData(pDevice);
489 INTnsProcessData(pDevice);
490 } 492 }
491 493
492 STAvUpdateUSBCounter(&pDevice->scStatistic.USB_InterruptStat, ntStatus); 494 STAvUpdateUSBCounter(&pDevice->scStatistic.USB_InterruptStat, ntStatus);
@@ -494,7 +496,8 @@ s_nsInterruptUsbIoCompleteRead(
494 496
495 if (pDevice->fKillEventPollingThread != TRUE) { 497 if (pDevice->fKillEventPollingThread != TRUE) {
496 #if 0 //reserve int URB submit 498 #if 0 //reserve int URB submit
497 if ((ntStatus = usb_submit_urb(urb, GFP_ATOMIC)) != 0) { 499 ntStatus = usb_submit_urb(urb, GFP_ATOMIC);
500 if (ntStatus != 0) {
498 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Re-Submit int URB failed %d\n", ntStatus); 501 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Re-Submit int URB failed %d\n", ntStatus);
499 } 502 }
500 #else //replace int URB submit by bulk transfer 503 #else //replace int URB submit by bulk transfer
@@ -502,12 +505,13 @@ s_nsInterruptUsbIoCompleteRead(
502 usb_fill_bulk_urb(pDevice->pInterruptURB, 505 usb_fill_bulk_urb(pDevice->pInterruptURB,
503 pDevice->usb, 506 pDevice->usb,
504 usb_rcvbulkpipe(pDevice->usb, 1), 507 usb_rcvbulkpipe(pDevice->usb, 1),
505 (PVOID) pDevice->intBuf.pDataBuf, 508 (void *) pDevice->intBuf.pDataBuf,
506 MAX_INTERRUPT_SIZE, 509 MAX_INTERRUPT_SIZE,
507 s_nsInterruptUsbIoCompleteRead, 510 s_nsInterruptUsbIoCompleteRead,
508 pDevice); 511 pDevice);
509 512
510 if ((ntStatus = usb_submit_urb(pDevice->pInterruptURB, GFP_ATOMIC)) != 0) { 513 ntStatus = usb_submit_urb(pDevice->pInterruptURB, GFP_ATOMIC);
514 if (ntStatus != 0) {
511 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit int URB failed %d\n", ntStatus); 515 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit int URB failed %d\n", ntStatus);
512 } 516 }
513 517
@@ -538,8 +542,8 @@ s_nsInterruptUsbIoCompleteRead(
538 */ 542 */
539NTSTATUS 543NTSTATUS
540PIPEnsBulkInUsbRead( 544PIPEnsBulkInUsbRead(
541 IN PSDevice pDevice, 545 PSDevice pDevice,
542 IN PRCB pRCB 546 PRCB pRCB
543 ) 547 )
544{ 548{
545 NTSTATUS ntStatus= 0; 549 NTSTATUS ntStatus= 0;
@@ -567,12 +571,13 @@ PIPEnsBulkInUsbRead(
567 usb_fill_bulk_urb(pUrb, 571 usb_fill_bulk_urb(pUrb,
568 pDevice->usb, 572 pDevice->usb,
569 usb_rcvbulkpipe(pDevice->usb, 2), 573 usb_rcvbulkpipe(pDevice->usb, 2),
570 (PVOID) (pRCB->skb->data), 574 (void *) (pRCB->skb->data),
571 MAX_TOTAL_SIZE_WITH_ALL_HEADERS, 575 MAX_TOTAL_SIZE_WITH_ALL_HEADERS,
572 s_nsBulkInUsbIoCompleteRead, 576 s_nsBulkInUsbIoCompleteRead,
573 pRCB); 577 pRCB);
574 578
575 if((ntStatus = usb_submit_urb(pUrb, GFP_ATOMIC)) != 0){ 579 ntStatus = usb_submit_urb(pUrb, GFP_ATOMIC);
580 if (ntStatus != 0) {
576 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit Rx URB failed %d\n", ntStatus); 581 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit Rx URB failed %d\n", ntStatus);
577 return STATUS_FAILURE ; 582 return STATUS_FAILURE ;
578 } 583 }
@@ -600,15 +605,15 @@ PIPEnsBulkInUsbRead(
600 * 605 *
601 */ 606 */
602static 607static
603VOID 608void
604s_nsBulkInUsbIoCompleteRead( 609s_nsBulkInUsbIoCompleteRead(
605 IN struct urb *urb 610 struct urb *urb
606 ) 611 )
607 612
608{ 613{
609 PRCB pRCB = (PRCB)urb->context; 614 PRCB pRCB = (PRCB)urb->context;
610 PSDevice pDevice = (PSDevice)pRCB->pDevice; 615 PSDevice pDevice = (PSDevice)pRCB->pDevice;
611 ULONG bytesRead; 616 unsigned long bytesRead;
612 BOOL bIndicateReceive = FALSE; 617 BOOL bIndicateReceive = FALSE;
613 BOOL bReAllocSkb = FALSE; 618 BOOL bReAllocSkb = FALSE;
614 NTSTATUS status; 619 NTSTATUS status;
@@ -681,8 +686,8 @@ s_nsBulkInUsbIoCompleteRead(
681 */ 686 */
682NDIS_STATUS 687NDIS_STATUS
683PIPEnsSendBulkOut( 688PIPEnsSendBulkOut(
684 IN PSDevice pDevice, 689 PSDevice pDevice,
685 IN PUSB_SEND_CONTEXT pContext 690 PUSB_SEND_CONTEXT pContext
686 ) 691 )
687{ 692{
688 NTSTATUS status; 693 NTSTATUS status;
@@ -712,13 +717,14 @@ PIPEnsSendBulkOut(
712 usb_fill_bulk_urb( 717 usb_fill_bulk_urb(
713 pUrb, 718 pUrb,
714 pDevice->usb, 719 pDevice->usb,
715 usb_sndbulkpipe(pDevice->usb, 3), 720 usb_sndbulkpipe(pDevice->usb, 3),
716 (PVOID) &(pContext->Data[0]), 721 (void *) &(pContext->Data[0]),
717 pContext->uBufLen, 722 pContext->uBufLen,
718 s_nsBulkOutIoCompleteWrite, 723 s_nsBulkOutIoCompleteWrite,
719 pContext); 724 pContext);
720 725
721 if((status = usb_submit_urb(pUrb, GFP_ATOMIC))!=0) 726 status = usb_submit_urb(pUrb, GFP_ATOMIC);
727 if (status != 0)
722 { 728 {
723 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit Tx URB failed %d\n", status); 729 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Submit Tx URB failed %d\n", status);
724 return STATUS_FAILURE; 730 return STATUS_FAILURE;
@@ -759,15 +765,15 @@ PIPEnsSendBulkOut(
759 * 765 *
760 */ 766 */
761static 767static
762VOID 768void
763s_nsBulkOutIoCompleteWrite( 769s_nsBulkOutIoCompleteWrite(
764 IN struct urb *urb 770 struct urb *urb
765 ) 771 )
766{ 772{
767 PSDevice pDevice; 773 PSDevice pDevice;
768 NTSTATUS status; 774 NTSTATUS status;
769 CONTEXT_TYPE ContextType; 775 CONTEXT_TYPE ContextType;
770 ULONG ulBufLen; 776 unsigned long ulBufLen;
771 PUSB_SEND_CONTEXT pContext; 777 PUSB_SEND_CONTEXT pContext;
772 778
773 779
diff --git a/drivers/staging/vt6656/usbpipe.h b/drivers/staging/vt6656/usbpipe.h
index c422d1d08730..f852b39027a5 100644
--- a/drivers/staging/vt6656/usbpipe.h
+++ b/drivers/staging/vt6656/usbpipe.h
@@ -43,34 +43,34 @@
43 43
44NTSTATUS 44NTSTATUS
45PIPEnsControlOut( 45PIPEnsControlOut(
46 IN PSDevice pDevice, 46 PSDevice pDevice,
47 IN BYTE byRequest, 47 BYTE byRequest,
48 IN WORD wValue, 48 WORD wValue,
49 IN WORD wIndex, 49 WORD wIndex,
50 IN WORD wLength, 50 WORD wLength,
51 IN PBYTE pbyBuffer 51 PBYTE pbyBuffer
52 ); 52 );
53 53
54 54
55 55
56NTSTATUS 56NTSTATUS
57PIPEnsControlOutAsyn( 57PIPEnsControlOutAsyn(
58 IN PSDevice pDevice, 58 PSDevice pDevice,
59 IN BYTE byRequest, 59 BYTE byRequest,
60 IN WORD wValue, 60 WORD wValue,
61 IN WORD wIndex, 61 WORD wIndex,
62 IN WORD wLength, 62 WORD wLength,
63 IN PBYTE pbyBuffer 63 PBYTE pbyBuffer
64 ); 64 );
65 65
66NTSTATUS 66NTSTATUS
67PIPEnsControlIn( 67PIPEnsControlIn(
68 IN PSDevice pDevice, 68 PSDevice pDevice,
69 IN BYTE byRequest, 69 BYTE byRequest,
70 IN WORD wValue, 70 WORD wValue,
71 IN WORD wIndex, 71 WORD wIndex,
72 IN WORD wLength, 72 WORD wLength,
73 IN OUT PBYTE pbyBuffer 73 PBYTE pbyBuffer
74 ); 74 );
75 75
76 76
@@ -78,22 +78,19 @@ PIPEnsControlIn(
78 78
79NTSTATUS 79NTSTATUS
80PIPEnsInterruptRead( 80PIPEnsInterruptRead(
81 IN PSDevice pDevice 81 PSDevice pDevice
82 ); 82 );
83 83
84NTSTATUS 84NTSTATUS
85PIPEnsBulkInUsbRead( 85PIPEnsBulkInUsbRead(
86 IN PSDevice pDevice, 86 PSDevice pDevice,
87 IN PRCB pRCB 87 PRCB pRCB
88 ); 88 );
89 89
90NTSTATUS 90NTSTATUS
91PIPEnsSendBulkOut( 91PIPEnsSendBulkOut(
92 IN PSDevice pDevice, 92 PSDevice pDevice,
93 IN PUSB_SEND_CONTEXT pContext 93 PUSB_SEND_CONTEXT pContext
94 ); 94 );
95 95
96#endif // __USBPIPE_H__ 96#endif /* __USBPIPE_H__ */
97
98
99
diff --git a/drivers/staging/vt6656/wcmd.c b/drivers/staging/vt6656/wcmd.c
index 51b2dcfbab91..72e21b6f0e88 100644
--- a/drivers/staging/vt6656/wcmd.c
+++ b/drivers/staging/vt6656/wcmd.c
@@ -69,21 +69,21 @@ static int msglevel =MSG_LEVEL_INFO;
69/*--------------------- Static Functions --------------------------*/ 69/*--------------------- Static Functions --------------------------*/
70 70
71static 71static
72VOID 72void
73s_vProbeChannel( 73s_vProbeChannel(
74 IN PSDevice pDevice 74 PSDevice pDevice
75 ); 75 );
76 76
77 77
78static 78static
79PSTxMgmtPacket 79PSTxMgmtPacket
80s_MgrMakeProbeRequest( 80s_MgrMakeProbeRequest(
81 IN PSDevice pDevice, 81 PSDevice pDevice,
82 IN PSMgmtObject pMgmt, 82 PSMgmtObject pMgmt,
83 IN PBYTE pScanBSSID, 83 PBYTE pScanBSSID,
84 IN PWLAN_IE_SSID pSSID, 84 PWLAN_IE_SSID pSSID,
85 IN PWLAN_IE_SUPP_RATES pCurrRates, 85 PWLAN_IE_SUPP_RATES pCurrRates,
86 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 86 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
87 ); 87 );
88 88
89 89
@@ -94,18 +94,12 @@ s_bCommandComplete (
94 ); 94 );
95 95
96 96
97static 97static BOOL s_bClearBSSID_SCAN(void *hDeviceContext);
98BOOL s_bClearBSSID_SCAN (
99 IN HANDLE hDeviceContext
100 );
101 98
102/*--------------------- Export Variables --------------------------*/ 99/*--------------------- Export Variables --------------------------*/
103 100
104
105/*--------------------- Export Functions --------------------------*/ 101/*--------------------- Export Functions --------------------------*/
106 102
107
108
109/* 103/*
110 * Description: 104 * Description:
111 * Stop AdHoc beacon during scan process 105 * Stop AdHoc beacon during scan process
@@ -119,6 +113,7 @@ BOOL s_bClearBSSID_SCAN (
119 * Return Value: none 113 * Return Value: none
120 * 114 *
121 */ 115 */
116
122static 117static
123void 118void
124vAdHocBeaconStop(PSDevice pDevice) 119vAdHocBeaconStop(PSDevice pDevice)
@@ -210,9 +205,9 @@ vAdHocBeaconRestart(PSDevice pDevice)
210-*/ 205-*/
211 206
212static 207static
213VOID 208void
214s_vProbeChannel( 209s_vProbeChannel(
215 IN PSDevice pDevice 210 PSDevice pDevice
216 ) 211 )
217{ 212{
218 //1M, 2M, 5M, 11M, 18M, 24M, 36M, 54M 213 //1M, 2M, 5M, 11M, 18M, 24M, 36M, 54M
@@ -224,7 +219,7 @@ s_vProbeChannel(
224 PBYTE pbyRate; 219 PBYTE pbyRate;
225 PSTxMgmtPacket pTxPacket; 220 PSTxMgmtPacket pTxPacket;
226 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 221 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
227 UINT ii; 222 unsigned int ii;
228 223
229 224
230 if (pDevice->byBBType == BB_TYPE_11A) { 225 if (pDevice->byBBType == BB_TYPE_11A) {
@@ -275,12 +270,12 @@ s_vProbeChannel(
275 270
276PSTxMgmtPacket 271PSTxMgmtPacket
277s_MgrMakeProbeRequest( 272s_MgrMakeProbeRequest(
278 IN PSDevice pDevice, 273 PSDevice pDevice,
279 IN PSMgmtObject pMgmt, 274 PSMgmtObject pMgmt,
280 IN PBYTE pScanBSSID, 275 PBYTE pScanBSSID,
281 IN PWLAN_IE_SSID pSSID, 276 PWLAN_IE_SSID pSSID,
282 IN PWLAN_IE_SUPP_RATES pCurrRates, 277 PWLAN_IE_SUPP_RATES pCurrRates,
283 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 278 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
284 279
285 ) 280 )
286{ 281{
@@ -321,41 +316,27 @@ s_MgrMakeProbeRequest(
321 return pTxPacket; 316 return pTxPacket;
322} 317}
323 318
324 319void vCommandTimerWait(void *hDeviceContext, unsigned int MSecond)
325
326
327
328VOID
329vCommandTimerWait(
330 IN HANDLE hDeviceContext,
331 IN UINT MSecond
332 )
333{ 320{
334 PSDevice pDevice = (PSDevice)hDeviceContext; 321 PSDevice pDevice = (PSDevice)hDeviceContext;
335 322
336 init_timer(&pDevice->sTimerCommand); 323 init_timer(&pDevice->sTimerCommand);
337 pDevice->sTimerCommand.data = (ULONG)pDevice; 324 pDevice->sTimerCommand.data = (unsigned long)pDevice;
338 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand; 325 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand;
339 // RUN_AT :1 msec ~= (HZ/1024) 326 // RUN_AT :1 msec ~= (HZ/1024)
340 pDevice->sTimerCommand.expires = (UINT)RUN_AT((MSecond * HZ) >> 10); 327 pDevice->sTimerCommand.expires = (unsigned int)RUN_AT((MSecond * HZ) >> 10);
341 add_timer(&pDevice->sTimerCommand); 328 add_timer(&pDevice->sTimerCommand);
342 return; 329 return;
343} 330}
344 331
345 332void vRunCommand(void *hDeviceContext)
346
347
348VOID
349vRunCommand(
350 IN HANDLE hDeviceContext
351 )
352{ 333{
353 PSDevice pDevice = (PSDevice)hDeviceContext; 334 PSDevice pDevice = (PSDevice)hDeviceContext;
354 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 335 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
355 PWLAN_IE_SSID pItemSSID; 336 PWLAN_IE_SSID pItemSSID;
356 PWLAN_IE_SSID pItemSSIDCurr; 337 PWLAN_IE_SSID pItemSSIDCurr;
357 CMD_STATUS Status; 338 CMD_STATUS Status;
358 UINT ii; 339 unsigned int ii;
359 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80}; 340 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80};
360 struct sk_buff *skb; 341 struct sk_buff *skb;
361 BYTE byData; 342 BYTE byData;
@@ -435,7 +416,8 @@ vRunCommand(
435 pMgmt->abyScanBSSID[5] = 0xFF; 416 pMgmt->abyScanBSSID[5] = 0xFF;
436 pItemSSID->byElementID = WLAN_EID_SSID; 417 pItemSSID->byElementID = WLAN_EID_SSID;
437 // clear bssid list 418 // clear bssid list
438 // BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 419 /* BSSvClearBSSList((void *) pDevice,
420 pDevice->bLinkPass); */
439 pMgmt->eScanState = WMAC_IS_SCANNING; 421 pMgmt->eScanState = WMAC_IS_SCANNING;
440 pDevice->byScanBBType = pDevice->byBBType; //lucas 422 pDevice->byScanBBType = pDevice->byBBType; //lucas
441 pDevice->bStopDataPkt = TRUE; 423 pDevice->bStopDataPkt = TRUE;
@@ -480,11 +462,11 @@ vRunCommand(
480 (pMgmt->uScanChannel < CB_MAX_CHANNEL_24G)) { 462 (pMgmt->uScanChannel < CB_MAX_CHANNEL_24G)) {
481 s_vProbeChannel(pDevice); 463 s_vProbeChannel(pDevice);
482 spin_unlock_irq(&pDevice->lock); 464 spin_unlock_irq(&pDevice->lock);
483 vCommandTimerWait((HANDLE)pDevice, 100); 465 vCommandTimerWait((void *) pDevice, 100);
484 return; 466 return;
485 } else { 467 } else {
486 spin_unlock_irq(&pDevice->lock); 468 spin_unlock_irq(&pDevice->lock);
487 vCommandTimerWait((HANDLE)pDevice, WCMD_PASSIVE_SCAN_TIME); 469 vCommandTimerWait((void *) pDevice, WCMD_PASSIVE_SCAN_TIME);
488 return; 470 return;
489 } 471 }
490 472
@@ -552,7 +534,11 @@ vRunCommand(
552 534
553 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Send Disassociation Packet..\n"); 535 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Send Disassociation Packet..\n");
554 // reason = 8 : disassoc because sta has left 536 // reason = 8 : disassoc because sta has left
555 vMgrDisassocBeginSta((HANDLE)pDevice, pMgmt, pMgmt->abyCurrBSSID, (8), &Status); 537 vMgrDisassocBeginSta((void *) pDevice,
538 pMgmt,
539 pMgmt->abyCurrBSSID,
540 (8),
541 &Status);
556 pDevice->bLinkPass = FALSE; 542 pDevice->bLinkPass = FALSE;
557 ControlvMaskByte(pDevice,MESSAGE_REQUEST_MACREG,MAC_REG_PAPEDELAY,LEDSTS_STS,LEDSTS_SLOW); 543 ControlvMaskByte(pDevice,MESSAGE_REQUEST_MACREG,MAC_REG_PAPEDELAY,LEDSTS_STS,LEDSTS_SLOW);
558 // unlock command busy 544 // unlock command busy
@@ -614,22 +600,26 @@ vRunCommand(
614 // set initial state 600 // set initial state
615 pMgmt->eCurrState = WMAC_STATE_IDLE; 601 pMgmt->eCurrState = WMAC_STATE_IDLE;
616 pMgmt->eCurrMode = WMAC_MODE_STANDBY; 602 pMgmt->eCurrMode = WMAC_MODE_STANDBY;
617 PSvDisablePowerSaving((HANDLE)pDevice); 603 PSvDisablePowerSaving((void *) pDevice);
618 BSSvClearNodeDBTable(pDevice, 0); 604 BSSvClearNodeDBTable(pDevice, 0);
619 vMgrJoinBSSBegin((HANDLE)pDevice, &Status); 605 vMgrJoinBSSBegin((void *) pDevice, &Status);
620 // if Infra mode 606 // if Infra mode
621 if ((pMgmt->eCurrMode == WMAC_MODE_ESS_STA) && (pMgmt->eCurrState == WMAC_STATE_JOINTED)) { 607 if ((pMgmt->eCurrMode == WMAC_MODE_ESS_STA) && (pMgmt->eCurrState == WMAC_STATE_JOINTED)) {
622 // Call mgr to begin the deauthentication 608 // Call mgr to begin the deauthentication
623 // reason = (3) beacuse sta has left ESS 609 // reason = (3) beacuse sta has left ESS
624 if (pMgmt->eCurrState>= WMAC_STATE_AUTH) { 610 if (pMgmt->eCurrState >= WMAC_STATE_AUTH) {
625 vMgrDeAuthenBeginSta((HANDLE)pDevice, pMgmt, pMgmt->abyCurrBSSID, (3), &Status); 611 vMgrDeAuthenBeginSta((void *)pDevice,
626 } 612 pMgmt,
613 pMgmt->abyCurrBSSID,
614 (3),
615 &Status);
616 }
627 // Call mgr to begin the authentication 617 // Call mgr to begin the authentication
628 vMgrAuthenBeginSta((HANDLE)pDevice, pMgmt, &Status); 618 vMgrAuthenBeginSta((void *) pDevice, pMgmt, &Status);
629 if (Status == CMD_STATUS_SUCCESS) { 619 if (Status == CMD_STATUS_SUCCESS) {
630 pDevice->byLinkWaitCount = 0; 620 pDevice->byLinkWaitCount = 0;
631 pDevice->eCommandState = WLAN_AUTHENTICATE_WAIT; 621 pDevice->eCommandState = WLAN_AUTHENTICATE_WAIT;
632 vCommandTimerWait((HANDLE)pDevice, AUTHENTICATE_TIMEOUT); 622 vCommandTimerWait((void *) pDevice, AUTHENTICATE_TIMEOUT);
633 spin_unlock_irq(&pDevice->lock); 623 spin_unlock_irq(&pDevice->lock);
634 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" Set eCommandState = WLAN_AUTHENTICATE_WAIT\n"); 624 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" Set eCommandState = WLAN_AUTHENTICATE_WAIT\n");
635 return; 625 return;
@@ -648,10 +638,12 @@ vRunCommand(
648 } 638 }
649 else { 639 else {
650 // start own IBSS 640 // start own IBSS
651 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "CreateOwn IBSS by CurrMode = IBSS_STA \n"); 641 DBG_PRT(MSG_LEVEL_DEBUG,
652 vMgrCreateOwnIBSS((HANDLE)pDevice, &Status); 642 KERN_INFO "CreateOwn IBSS by CurrMode = IBSS_STA\n");
643 vMgrCreateOwnIBSS((void *) pDevice, &Status);
653 if (Status != CMD_STATUS_SUCCESS){ 644 if (Status != CMD_STATUS_SUCCESS){
654 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " WLAN_CMD_IBSS_CREATE fail ! \n"); 645 DBG_PRT(MSG_LEVEL_DEBUG,
646 KERN_INFO "WLAN_CMD_IBSS_CREATE fail!\n");
655 }; 647 };
656 BSSvAddMulticastNode(pDevice); 648 BSSvAddMulticastNode(pDevice);
657 } 649 }
@@ -662,10 +654,12 @@ vRunCommand(
662 if (pMgmt->eConfigMode == WMAC_CONFIG_IBSS_STA || 654 if (pMgmt->eConfigMode == WMAC_CONFIG_IBSS_STA ||
663 pMgmt->eConfigMode == WMAC_CONFIG_AUTO) { 655 pMgmt->eConfigMode == WMAC_CONFIG_AUTO) {
664 // start own IBSS 656 // start own IBSS
665 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "CreateOwn IBSS by CurrMode = STANDBY \n"); 657 DBG_PRT(MSG_LEVEL_DEBUG,
666 vMgrCreateOwnIBSS((HANDLE)pDevice, &Status); 658 KERN_INFO "CreateOwn IBSS by CurrMode = STANDBY\n");
659 vMgrCreateOwnIBSS((void *) pDevice, &Status);
667 if (Status != CMD_STATUS_SUCCESS){ 660 if (Status != CMD_STATUS_SUCCESS){
668 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" WLAN_CMD_IBSS_CREATE fail ! \n"); 661 DBG_PRT(MSG_LEVEL_DEBUG,
662 KERN_INFO "WLAN_CMD_IBSS_CREATE fail!\n");
669 }; 663 };
670 BSSvAddMulticastNode(pDevice); 664 BSSvAddMulticastNode(pDevice);
671 s_bClearBSSID_SCAN(pDevice); 665 s_bClearBSSID_SCAN(pDevice);
@@ -701,12 +695,12 @@ vRunCommand(
701 pDevice->byLinkWaitCount = 0; 695 pDevice->byLinkWaitCount = 0;
702 // Call mgr to begin the association 696 // Call mgr to begin the association
703 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_AUTH\n"); 697 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_AUTH\n");
704 vMgrAssocBeginSta((HANDLE)pDevice, pMgmt, &Status); 698 vMgrAssocBeginSta((void *) pDevice, pMgmt, &Status);
705 if (Status == CMD_STATUS_SUCCESS) { 699 if (Status == CMD_STATUS_SUCCESS) {
706 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCommandState = WLAN_ASSOCIATE_WAIT\n"); 700 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCommandState = WLAN_ASSOCIATE_WAIT\n");
707 pDevice->byLinkWaitCount = 0; 701 pDevice->byLinkWaitCount = 0;
708 pDevice->eCommandState = WLAN_ASSOCIATE_WAIT; 702 pDevice->eCommandState = WLAN_ASSOCIATE_WAIT;
709 vCommandTimerWait((HANDLE)pDevice, ASSOCIATE_TIMEOUT); 703 vCommandTimerWait((void *) pDevice, ASSOCIATE_TIMEOUT);
710 spin_unlock_irq(&pDevice->lock); 704 spin_unlock_irq(&pDevice->lock);
711 return; 705 return;
712 } 706 }
@@ -718,7 +712,7 @@ vRunCommand(
718 pDevice->byLinkWaitCount ++; 712 pDevice->byLinkWaitCount ++;
719 printk("WLAN_AUTHENTICATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount); 713 printk("WLAN_AUTHENTICATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount);
720 spin_unlock_irq(&pDevice->lock); 714 spin_unlock_irq(&pDevice->lock);
721 vCommandTimerWait((HANDLE)pDevice, AUTHENTICATE_TIMEOUT/2); 715 vCommandTimerWait((void *) pDevice, AUTHENTICATE_TIMEOUT/2);
722 return; 716 return;
723 } 717 }
724 pDevice->byLinkWaitCount = 0; 718 pDevice->byLinkWaitCount = 0;
@@ -742,7 +736,8 @@ vRunCommand(
742 if (pMgmt->eCurrState == WMAC_STATE_ASSOC) { 736 if (pMgmt->eCurrState == WMAC_STATE_ASSOC) {
743 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_ASSOC\n"); 737 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_ASSOC\n");
744 if (pDevice->ePSMode != WMAC_POWER_CAM) { 738 if (pDevice->ePSMode != WMAC_POWER_CAM) {
745 PSvEnablePowerSaving((HANDLE)pDevice, pMgmt->wListenInterval); 739 PSvEnablePowerSaving((void *) pDevice,
740 pMgmt->wListenInterval);
746 } 741 }
747/* 742/*
748 if (pMgmt->eAuthenMode >= WMAC_AUTH_WPA) { 743 if (pMgmt->eAuthenMode >= WMAC_AUTH_WPA) {
@@ -765,7 +760,7 @@ vRunCommand(
765 // printk("Re-initial TxDataTimer****\n"); 760 // printk("Re-initial TxDataTimer****\n");
766 del_timer(&pDevice->sTimerTxData); 761 del_timer(&pDevice->sTimerTxData);
767 init_timer(&pDevice->sTimerTxData); 762 init_timer(&pDevice->sTimerTxData);
768 pDevice->sTimerTxData.data = (ULONG)pDevice; 763 pDevice->sTimerTxData.data = (unsigned long) pDevice;
769 pDevice->sTimerTxData.function = (TimerFunction)BSSvSecondTxData; 764 pDevice->sTimerTxData.function = (TimerFunction)BSSvSecondTxData;
770 pDevice->sTimerTxData.expires = RUN_AT(10*HZ); //10s callback 765 pDevice->sTimerTxData.expires = RUN_AT(10*HZ); //10s callback
771 pDevice->fTxDataInSleep = FALSE; 766 pDevice->fTxDataInSleep = FALSE;
@@ -786,7 +781,7 @@ vRunCommand(
786 pDevice->byLinkWaitCount ++; 781 pDevice->byLinkWaitCount ++;
787 printk("WLAN_ASSOCIATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount); 782 printk("WLAN_ASSOCIATE_WAIT:wait %d times!!\n",pDevice->byLinkWaitCount);
788 spin_unlock_irq(&pDevice->lock); 783 spin_unlock_irq(&pDevice->lock);
789 vCommandTimerWait((HANDLE)pDevice, ASSOCIATE_TIMEOUT/2); 784 vCommandTimerWait((void *) pDevice, ASSOCIATE_TIMEOUT/2);
790 return; 785 return;
791 } 786 }
792 pDevice->byLinkWaitCount = 0; 787 pDevice->byLinkWaitCount = 0;
@@ -823,9 +818,10 @@ vRunCommand(
823 pMgmt->eCurrState = WMAC_STATE_IDLE; 818 pMgmt->eCurrState = WMAC_STATE_IDLE;
824 pDevice->bFixRate = FALSE; 819 pDevice->bFixRate = FALSE;
825 820
826 vMgrCreateOwnIBSS((HANDLE)pDevice, &Status); 821 vMgrCreateOwnIBSS((void *) pDevice, &Status);
827 if (Status != CMD_STATUS_SUCCESS){ 822 if (Status != CMD_STATUS_SUCCESS) {
828 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " vMgrCreateOwnIBSS fail ! \n"); 823 DBG_PRT(MSG_LEVEL_DEBUG,
824 KERN_INFO "vMgrCreateOwnIBSS fail!\n");
829 }; 825 };
830 // alway turn off unicast bit 826 // alway turn off unicast bit
831 MACvRegBitsOff(pDevice, MAC_REG_RCR, RCR_UNICAST); 827 MACvRegBitsOff(pDevice, MAC_REG_RCR, RCR_UNICAST);
@@ -948,7 +944,11 @@ vRunCommand(
948 944
949 if (pDevice->bLinkPass == TRUE) { 945 if (pDevice->bLinkPass == TRUE) {
950 // reason = 8 : disassoc because sta has left 946 // reason = 8 : disassoc because sta has left
951 vMgrDisassocBeginSta((HANDLE)pDevice, pMgmt, pMgmt->abyCurrBSSID, (8), &Status); 947 vMgrDisassocBeginSta((void *) pDevice,
948 pMgmt,
949 pMgmt->abyCurrBSSID,
950 (8),
951 &Status);
952 pDevice->bLinkPass = FALSE; 952 pDevice->bLinkPass = FALSE;
953 // unlock command busy 953 // unlock command busy
954 pMgmt->eCurrState = WMAC_STATE_IDLE; 954 pMgmt->eCurrState = WMAC_STATE_IDLE;
@@ -1185,18 +1185,15 @@ s_bCommandComplete (
1185 break; 1185 break;
1186 1186
1187 } 1187 }
1188 1188 vCommandTimerWait((void *) pDevice, 0);
1189 vCommandTimerWait((HANDLE)pDevice, 0);
1190 } 1189 }
1191 1190
1192 return TRUE; 1191 return TRUE;
1193} 1192}
1194 1193
1195BOOL bScheduleCommand ( 1194BOOL bScheduleCommand(void *hDeviceContext,
1196 IN HANDLE hDeviceContext, 1195 CMD_CODE eCommand,
1197 IN CMD_CODE eCommand, 1196 PBYTE pbyItem0)
1198 IN PBYTE pbyItem0
1199 )
1200{ 1197{
1201 PSDevice pDevice = (PSDevice)hDeviceContext; 1198 PSDevice pDevice = (PSDevice)hDeviceContext;
1202 1199
@@ -1264,14 +1261,11 @@ BOOL bScheduleCommand (
1264 * Return Value: TRUE if success; otherwise FALSE 1261 * Return Value: TRUE if success; otherwise FALSE
1265 * 1262 *
1266 */ 1263 */
1267static 1264static BOOL s_bClearBSSID_SCAN(void *hDeviceContext)
1268BOOL s_bClearBSSID_SCAN (
1269 IN HANDLE hDeviceContext
1270 )
1271{ 1265{
1272 PSDevice pDevice = (PSDevice)hDeviceContext; 1266 PSDevice pDevice = (PSDevice)hDeviceContext;
1273 UINT uCmdDequeueIdx = pDevice->uCmdDequeueIdx; 1267 unsigned int uCmdDequeueIdx = pDevice->uCmdDequeueIdx;
1274 UINT ii; 1268 unsigned int ii;
1275 1269
1276 if ((pDevice->cbFreeCmdQueue < CMD_Q_SIZE) && (uCmdDequeueIdx != pDevice->uCmdEnqueueIdx)) { 1270 if ((pDevice->cbFreeCmdQueue < CMD_Q_SIZE) && (uCmdDequeueIdx != pDevice->uCmdEnqueueIdx)) {
1277 for (ii = 0; ii < (CMD_Q_SIZE - pDevice->cbFreeCmdQueue); ii ++) { 1271 for (ii = 0; ii < (CMD_Q_SIZE - pDevice->cbFreeCmdQueue); ii ++) {
@@ -1287,10 +1281,7 @@ BOOL s_bClearBSSID_SCAN (
1287 1281
1288 1282
1289//mike add:reset command timer 1283//mike add:reset command timer
1290VOID 1284void vResetCommandTimer(void *hDeviceContext)
1291vResetCommandTimer(
1292 IN HANDLE hDeviceContext
1293 )
1294{ 1285{
1295 PSDevice pDevice = (PSDevice)hDeviceContext; 1286 PSDevice pDevice = (PSDevice)hDeviceContext;
1296 1287
@@ -1298,7 +1289,7 @@ vResetCommandTimer(
1298 del_timer(&pDevice->sTimerCommand); 1289 del_timer(&pDevice->sTimerCommand);
1299 //init timer 1290 //init timer
1300 init_timer(&pDevice->sTimerCommand); 1291 init_timer(&pDevice->sTimerCommand);
1301 pDevice->sTimerCommand.data = (ULONG)pDevice; 1292 pDevice->sTimerCommand.data = (unsigned long)pDevice;
1302 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand; 1293 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand;
1303 pDevice->sTimerCommand.expires = RUN_AT(HZ); 1294 pDevice->sTimerCommand.expires = RUN_AT(HZ);
1304 pDevice->cbFreeCmdQueue = CMD_Q_SIZE; 1295 pDevice->cbFreeCmdQueue = CMD_Q_SIZE;
@@ -1311,10 +1302,7 @@ vResetCommandTimer(
1311 1302
1312//2007-0115-08<Add>by MikeLiu 1303//2007-0115-08<Add>by MikeLiu
1313#ifdef TxInSleep 1304#ifdef TxInSleep
1314VOID 1305void BSSvSecondTxData(void *hDeviceContext)
1315BSSvSecondTxData(
1316 IN HANDLE hDeviceContext
1317 )
1318{ 1306{
1319 PSDevice pDevice = (PSDevice)hDeviceContext; 1307 PSDevice pDevice = (PSDevice)hDeviceContext;
1320 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1308 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
diff --git a/drivers/staging/vt6656/wcmd.h b/drivers/staging/vt6656/wcmd.h
index 90d672b462b1..09c4411c6891 100644
--- a/drivers/staging/vt6656/wcmd.h
+++ b/drivers/staging/vt6656/wcmd.h
@@ -105,46 +105,32 @@ typedef enum tagCMD_STATE {
105 WLAN_CMD_IDLE 105 WLAN_CMD_IDLE
106} CMD_STATE, *PCMD_STATE; 106} CMD_STATE, *PCMD_STATE;
107 107
108
109
110/*--------------------- Export Classes ----------------------------*/ 108/*--------------------- Export Classes ----------------------------*/
111 109
112/*--------------------- Export Variables --------------------------*/ 110/*--------------------- Export Variables --------------------------*/
113 111
114
115/*--------------------- Export Types ------------------------------*/ 112/*--------------------- Export Types ------------------------------*/
116 113
117
118/*--------------------- Export Functions --------------------------*/ 114/*--------------------- Export Functions --------------------------*/
119VOID
120vResetCommandTimer(
121 IN HANDLE hDeviceContext
122 );
123 115
124BOOL 116void vResetCommandTimer(void *hDeviceContext);
125bScheduleCommand( 117
126 IN HANDLE hDeviceContext, 118BOOL bScheduleCommand(void *hDeviceContext,
127 IN CMD_CODE eCommand, 119 CMD_CODE eCommand,
128 IN PBYTE pbyItem0 120 PBYTE pbyItem0);
129 ); 121
122void vRunCommand(void *hDeviceContext);
130 123
131VOID
132vRunCommand(
133 IN HANDLE hDeviceContext
134 );
135/* 124/*
136VOID 125void
137WCMDvCommandThread( 126WCMDvCommandThread(
138 PVOID Context 127 void * Context
139 ); 128 );
140*/ 129*/
141 130
142//2007-0115-09<Add>by MikeLiu 131//2007-0115-09<Add>by MikeLiu
143#ifdef TxInSleep 132#ifdef TxInSleep
144VOID 133void BSSvSecondTxData(void *hDeviceContext);
145BSSvSecondTxData(
146 IN HANDLE hDeviceContext
147 );
148#endif 134#endif
149 135
150#endif //__WCMD_H__ 136#endif /* __WCMD_H__ */
diff --git a/drivers/staging/vt6656/wctl.c b/drivers/staging/vt6656/wctl.c
index 40986da1e4a2..857ce0bc00a4 100644
--- a/drivers/staging/vt6656/wctl.c
+++ b/drivers/staging/vt6656/wctl.c
@@ -69,8 +69,8 @@
69 69
70BOOL WCTLbIsDuplicate (PSCache pCache, PS802_11Header pMACHeader) 70BOOL WCTLbIsDuplicate (PSCache pCache, PS802_11Header pMACHeader)
71{ 71{
72 UINT uIndex; 72 unsigned int uIndex;
73 UINT ii; 73 unsigned int ii;
74 PSCacheEntry pCacheEntry; 74 PSCacheEntry pCacheEntry;
75 75
76 if (IS_FC_RETRY(pMACHeader)) { 76 if (IS_FC_RETRY(pMACHeader)) {
@@ -91,7 +91,7 @@ BOOL WCTLbIsDuplicate (PSCache pCache, PS802_11Header pMACHeader)
91 /* Not fount in cache - insert */ 91 /* Not fount in cache - insert */
92 pCacheEntry = &pCache->asCacheEntry[pCache->uInPtr]; 92 pCacheEntry = &pCache->asCacheEntry[pCache->uInPtr];
93 pCacheEntry->wFmSequence = pMACHeader->wSeqCtl; 93 pCacheEntry->wFmSequence = pMACHeader->wSeqCtl;
94 memcpy(&(pCacheEntry->abyAddr2[0]), &(pMACHeader->abyAddr2[0]), U_ETHER_ADDR_LEN); 94 memcpy(&(pCacheEntry->abyAddr2[0]), &(pMACHeader->abyAddr2[0]), ETH_ALEN);
95 pCacheEntry->wFrameCtl = pMACHeader->wFrameCtl; 95 pCacheEntry->wFrameCtl = pMACHeader->wFrameCtl;
96 ADD_ONE_WITH_WRAP_AROUND(pCache->uInPtr, DUPLICATE_RX_CACHE_LENGTH); 96 ADD_ONE_WITH_WRAP_AROUND(pCache->uInPtr, DUPLICATE_RX_CACHE_LENGTH);
97 return FALSE; 97 return FALSE;
@@ -111,9 +111,9 @@ BOOL WCTLbIsDuplicate (PSCache pCache, PS802_11Header pMACHeader)
111 * Return Value: index number in Defragment Database 111 * Return Value: index number in Defragment Database
112 * 112 *
113 */ 113 */
114UINT WCTLuSearchDFCB (PSDevice pDevice, PS802_11Header pMACHeader) 114unsigned int WCTLuSearchDFCB(PSDevice pDevice, PS802_11Header pMACHeader)
115{ 115{
116UINT ii; 116 unsigned int ii;
117 117
118 for(ii=0;ii<pDevice->cbDFCB;ii++) { 118 for(ii=0;ii<pDevice->cbDFCB;ii++) {
119 if ((pDevice->sRxDFCB[ii].bInUse == TRUE) && 119 if ((pDevice->sRxDFCB[ii].bInUse == TRUE) &&
@@ -141,9 +141,9 @@ UINT ii;
141 * Return Value: index number in Defragment Database 141 * Return Value: index number in Defragment Database
142 * 142 *
143 */ 143 */
144UINT WCTLuInsertDFCB (PSDevice pDevice, PS802_11Header pMACHeader) 144unsigned int WCTLuInsertDFCB(PSDevice pDevice, PS802_11Header pMACHeader)
145{ 145{
146UINT ii; 146 unsigned int ii;
147 147
148 if (pDevice->cbFreeDFCB == 0) 148 if (pDevice->cbFreeDFCB == 0)
149 return(pDevice->cbDFCB); 149 return(pDevice->cbDFCB);
@@ -154,7 +154,9 @@ UINT ii;
154 pDevice->sRxDFCB[ii].bInUse = TRUE; 154 pDevice->sRxDFCB[ii].bInUse = TRUE;
155 pDevice->sRxDFCB[ii].wSequence = (pMACHeader->wSeqCtl >> 4); 155 pDevice->sRxDFCB[ii].wSequence = (pMACHeader->wSeqCtl >> 4);
156 pDevice->sRxDFCB[ii].wFragNum = (pMACHeader->wSeqCtl & 0x000F); 156 pDevice->sRxDFCB[ii].wFragNum = (pMACHeader->wSeqCtl & 0x000F);
157 memcpy(&(pDevice->sRxDFCB[ii].abyAddr2[0]), &(pMACHeader->abyAddr2[0]), U_ETHER_ADDR_LEN); 157 memcpy(&(pDevice->sRxDFCB[ii].abyAddr2[0]),
158 &(pMACHeader->abyAddr2[0]),
159 ETH_ALEN);
158 return(ii); 160 return(ii);
159 } 161 }
160 } 162 }
@@ -178,9 +180,10 @@ UINT ii;
178 * Return Value: TRUE if it is valid fragment packet and we have resource to defragment; otherwise FALSE 180 * Return Value: TRUE if it is valid fragment packet and we have resource to defragment; otherwise FALSE
179 * 181 *
180 */ 182 */
181BOOL WCTLbHandleFragment (PSDevice pDevice, PS802_11Header pMACHeader, UINT cbFrameLength, BOOL bWEP, BOOL bExtIV) 183BOOL WCTLbHandleFragment(PSDevice pDevice, PS802_11Header pMACHeader,
184 unsigned int cbFrameLength, BOOL bWEP, BOOL bExtIV)
182{ 185{
183UINT uHeaderSize; 186unsigned int uHeaderSize;
184 187
185 188
186 if (bWEP == TRUE) { 189 if (bWEP == TRUE) {
diff --git a/drivers/staging/vt6656/wctl.h b/drivers/staging/vt6656/wctl.h
index a1ac4791bfd3..7270af68c89d 100644
--- a/drivers/staging/vt6656/wctl.h
+++ b/drivers/staging/vt6656/wctl.h
@@ -90,7 +90,6 @@
90 (uVar)++; \ 90 (uVar)++; \
91} 91}
92 92
93
94/*--------------------- Export Classes ----------------------------*/ 93/*--------------------- Export Classes ----------------------------*/
95 94
96/*--------------------- Export Variables --------------------------*/ 95/*--------------------- Export Variables --------------------------*/
@@ -98,11 +97,9 @@
98/*--------------------- Export Functions --------------------------*/ 97/*--------------------- Export Functions --------------------------*/
99 98
100BOOL WCTLbIsDuplicate(PSCache pCache, PS802_11Header pMACHeader); 99BOOL WCTLbIsDuplicate(PSCache pCache, PS802_11Header pMACHeader);
101BOOL WCTLbHandleFragment(PSDevice pDevice, PS802_11Header pMACHeader, UINT cbFrameLength, BOOL bWEP, BOOL bExtIV); 100BOOL WCTLbHandleFragment(PSDevice pDevice, PS802_11Header pMACHeader,
102UINT WCTLuSearchDFCB(PSDevice pDevice, PS802_11Header pMACHeader); 101 unsigned int cbFrameLength, BOOL bWEP, BOOL bExtIV);
103UINT WCTLuInsertDFCB(PSDevice pDevice, PS802_11Header pMACHeader); 102unsigned int WCTLuSearchDFCB(PSDevice pDevice, PS802_11Header pMACHeader);
104 103unsigned int WCTLuInsertDFCB(PSDevice pDevice, PS802_11Header pMACHeader);
105#endif // __WCTL_H__
106
107
108 104
105#endif /* __WCTL_H__ */
diff --git a/drivers/staging/vt6656/wmgr.c b/drivers/staging/vt6656/wmgr.c
index 330aea69d231..93c15f0580fe 100644
--- a/drivers/staging/vt6656/wmgr.c
+++ b/drivers/staging/vt6656/wmgr.c
@@ -94,160 +94,160 @@ static int msglevel =MSG_LEVEL_INFO;
94/*--------------------- Static Functions --------------------------*/ 94/*--------------------- Static Functions --------------------------*/
95//2008-0730-01<Add>by MikeLiu 95//2008-0730-01<Add>by MikeLiu
96static BOOL ChannelExceedZoneType( 96static BOOL ChannelExceedZoneType(
97 IN PSDevice pDevice, 97 PSDevice pDevice,
98 IN BYTE byCurrChannel 98 BYTE byCurrChannel
99 ); 99 );
100 100
101// Association/diassociation functions 101// Association/diassociation functions
102static 102static
103PSTxMgmtPacket 103PSTxMgmtPacket
104s_MgrMakeAssocRequest( 104s_MgrMakeAssocRequest(
105 IN PSDevice pDevice, 105 PSDevice pDevice,
106 IN PSMgmtObject pMgmt, 106 PSMgmtObject pMgmt,
107 IN PBYTE pDAddr, 107 PBYTE pDAddr,
108 IN WORD wCurrCapInfo, 108 WORD wCurrCapInfo,
109 IN WORD wListenInterval, 109 WORD wListenInterval,
110 IN PWLAN_IE_SSID pCurrSSID, 110 PWLAN_IE_SSID pCurrSSID,
111 IN PWLAN_IE_SUPP_RATES pCurrRates, 111 PWLAN_IE_SUPP_RATES pCurrRates,
112 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 112 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
113 ); 113 );
114 114
115static 115static
116VOID 116void
117s_vMgrRxAssocRequest( 117s_vMgrRxAssocRequest(
118 IN PSDevice pDevice, 118 PSDevice pDevice,
119 IN PSMgmtObject pMgmt, 119 PSMgmtObject pMgmt,
120 IN PSRxMgmtPacket pRxPacket, 120 PSRxMgmtPacket pRxPacket,
121 IN UINT uNodeIndex 121 unsigned int uNodeIndex
122 ); 122 );
123 123
124static 124static
125PSTxMgmtPacket 125PSTxMgmtPacket
126s_MgrMakeReAssocRequest( 126s_MgrMakeReAssocRequest(
127 IN PSDevice pDevice, 127 PSDevice pDevice,
128 IN PSMgmtObject pMgmt, 128 PSMgmtObject pMgmt,
129 IN PBYTE pDAddr, 129 PBYTE pDAddr,
130 IN WORD wCurrCapInfo, 130 WORD wCurrCapInfo,
131 IN WORD wListenInterval, 131 WORD wListenInterval,
132 IN PWLAN_IE_SSID pCurrSSID, 132 PWLAN_IE_SSID pCurrSSID,
133 IN PWLAN_IE_SUPP_RATES pCurrRates, 133 PWLAN_IE_SUPP_RATES pCurrRates,
134 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 134 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
135 ); 135 );
136 136
137static 137static
138VOID 138void
139s_vMgrRxAssocResponse( 139s_vMgrRxAssocResponse(
140 IN PSDevice pDevice, 140 PSDevice pDevice,
141 IN PSMgmtObject pMgmt, 141 PSMgmtObject pMgmt,
142 IN PSRxMgmtPacket pRxPacket, 142 PSRxMgmtPacket pRxPacket,
143 IN BOOL bReAssocType 143 BOOL bReAssocType
144 ); 144 );
145 145
146static 146static
147VOID 147void
148s_vMgrRxDisassociation( 148s_vMgrRxDisassociation(
149 IN PSDevice pDevice, 149 PSDevice pDevice,
150 IN PSMgmtObject pMgmt, 150 PSMgmtObject pMgmt,
151 IN PSRxMgmtPacket pRxPacket 151 PSRxMgmtPacket pRxPacket
152 ); 152 );
153 153
154// Authentication/deauthen functions 154// Authentication/deauthen functions
155static 155static
156VOID 156void
157s_vMgrRxAuthenSequence_1( 157s_vMgrRxAuthenSequence_1(
158 IN PSDevice pDevice, 158 PSDevice pDevice,
159 IN PSMgmtObject pMgmt, 159 PSMgmtObject pMgmt,
160 IN PWLAN_FR_AUTHEN pFrame 160 PWLAN_FR_AUTHEN pFrame
161 ); 161 );
162 162
163static 163static
164VOID 164void
165s_vMgrRxAuthenSequence_2( 165s_vMgrRxAuthenSequence_2(
166 IN PSDevice pDevice, 166 PSDevice pDevice,
167 IN PSMgmtObject pMgmt, 167 PSMgmtObject pMgmt,
168 IN PWLAN_FR_AUTHEN pFrame 168 PWLAN_FR_AUTHEN pFrame
169 ); 169 );
170 170
171static 171static
172VOID 172void
173s_vMgrRxAuthenSequence_3( 173s_vMgrRxAuthenSequence_3(
174 IN PSDevice pDevice, 174 PSDevice pDevice,
175 IN PSMgmtObject pMgmt, 175 PSMgmtObject pMgmt,
176 IN PWLAN_FR_AUTHEN pFrame 176 PWLAN_FR_AUTHEN pFrame
177 ); 177 );
178 178
179static 179static
180VOID 180void
181s_vMgrRxAuthenSequence_4( 181s_vMgrRxAuthenSequence_4(
182 IN PSDevice pDevice, 182 PSDevice pDevice,
183 IN PSMgmtObject pMgmt, 183 PSMgmtObject pMgmt,
184 IN PWLAN_FR_AUTHEN pFrame 184 PWLAN_FR_AUTHEN pFrame
185 ); 185 );
186 186
187static 187static
188VOID 188void
189s_vMgrRxAuthentication( 189s_vMgrRxAuthentication(
190 IN PSDevice pDevice, 190 PSDevice pDevice,
191 IN PSMgmtObject pMgmt, 191 PSMgmtObject pMgmt,
192 IN PSRxMgmtPacket pRxPacket 192 PSRxMgmtPacket pRxPacket
193 ); 193 );
194 194
195static 195static
196VOID 196void
197s_vMgrRxDeauthentication( 197s_vMgrRxDeauthentication(
198 IN PSDevice pDevice, 198 PSDevice pDevice,
199 IN PSMgmtObject pMgmt, 199 PSMgmtObject pMgmt,
200 IN PSRxMgmtPacket pRxPacket 200 PSRxMgmtPacket pRxPacket
201 ); 201 );
202 202
203// Scan functions 203// Scan functions
204// probe request/response functions 204// probe request/response functions
205static 205static
206VOID 206void
207s_vMgrRxProbeRequest( 207s_vMgrRxProbeRequest(
208 IN PSDevice pDevice, 208 PSDevice pDevice,
209 IN PSMgmtObject pMgmt, 209 PSMgmtObject pMgmt,
210 IN PSRxMgmtPacket pRxPacket 210 PSRxMgmtPacket pRxPacket
211 ); 211 );
212 212
213static 213static
214VOID 214void
215s_vMgrRxProbeResponse( 215s_vMgrRxProbeResponse(
216 IN PSDevice pDevice, 216 PSDevice pDevice,
217 IN PSMgmtObject pMgmt, 217 PSMgmtObject pMgmt,
218 IN PSRxMgmtPacket pRxPacket 218 PSRxMgmtPacket pRxPacket
219 ); 219 );
220 220
221// beacon functions 221// beacon functions
222static 222static
223VOID 223void
224s_vMgrRxBeacon( 224s_vMgrRxBeacon(
225 IN PSDevice pDevice, 225 PSDevice pDevice,
226 IN PSMgmtObject pMgmt, 226 PSMgmtObject pMgmt,
227 IN PSRxMgmtPacket pRxPacket, 227 PSRxMgmtPacket pRxPacket,
228 IN BOOL bInScan 228 BOOL bInScan
229 ); 229 );
230 230
231static 231static
232VOID 232void
233s_vMgrFormatTIM( 233s_vMgrFormatTIM(
234 IN PSMgmtObject pMgmt, 234 PSMgmtObject pMgmt,
235 IN PWLAN_IE_TIM pTIM 235 PWLAN_IE_TIM pTIM
236 ); 236 );
237 237
238static 238static
239PSTxMgmtPacket 239PSTxMgmtPacket
240s_MgrMakeBeacon( 240s_MgrMakeBeacon(
241 IN PSDevice pDevice, 241 PSDevice pDevice,
242 IN PSMgmtObject pMgmt, 242 PSMgmtObject pMgmt,
243 IN WORD wCurrCapInfo, 243 WORD wCurrCapInfo,
244 IN WORD wCurrBeaconPeriod, 244 WORD wCurrBeaconPeriod,
245 IN UINT uCurrChannel, 245 unsigned int uCurrChannel,
246 IN WORD wCurrATIMWinodw, 246 WORD wCurrATIMWinodw,
247 IN PWLAN_IE_SSID pCurrSSID, 247 PWLAN_IE_SSID pCurrSSID,
248 IN PBYTE pCurrBSSID, 248 PBYTE pCurrBSSID,
249 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 249 PWLAN_IE_SUPP_RATES pCurrSuppRates,
250 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 250 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
251 ); 251 );
252 252
253 253
@@ -255,88 +255,84 @@ s_MgrMakeBeacon(
255static 255static
256PSTxMgmtPacket 256PSTxMgmtPacket
257s_MgrMakeAssocResponse( 257s_MgrMakeAssocResponse(
258 IN PSDevice pDevice, 258 PSDevice pDevice,
259 IN PSMgmtObject pMgmt, 259 PSMgmtObject pMgmt,
260 IN WORD wCurrCapInfo, 260 WORD wCurrCapInfo,
261 IN WORD wAssocStatus, 261 WORD wAssocStatus,
262 IN WORD wAssocAID, 262 WORD wAssocAID,
263 IN PBYTE pDstAddr, 263 PBYTE pDstAddr,
264 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 264 PWLAN_IE_SUPP_RATES pCurrSuppRates,
265 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 265 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
266 ); 266 );
267 267
268// ReAssociation response 268// ReAssociation response
269static 269static
270PSTxMgmtPacket 270PSTxMgmtPacket
271s_MgrMakeReAssocResponse( 271s_MgrMakeReAssocResponse(
272 IN PSDevice pDevice, 272 PSDevice pDevice,
273 IN PSMgmtObject pMgmt, 273 PSMgmtObject pMgmt,
274 IN WORD wCurrCapInfo, 274 WORD wCurrCapInfo,
275 IN WORD wAssocStatus, 275 WORD wAssocStatus,
276 IN WORD wAssocAID, 276 WORD wAssocAID,
277 IN PBYTE pDstAddr, 277 PBYTE pDstAddr,
278 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 278 PWLAN_IE_SUPP_RATES pCurrSuppRates,
279 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 279 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
280 ); 280 );
281 281
282// Probe response 282// Probe response
283static 283static
284PSTxMgmtPacket 284PSTxMgmtPacket
285s_MgrMakeProbeResponse( 285s_MgrMakeProbeResponse(
286 IN PSDevice pDevice, 286 PSDevice pDevice,
287 IN PSMgmtObject pMgmt, 287 PSMgmtObject pMgmt,
288 IN WORD wCurrCapInfo, 288 WORD wCurrCapInfo,
289 IN WORD wCurrBeaconPeriod, 289 WORD wCurrBeaconPeriod,
290 IN UINT uCurrChannel, 290 unsigned int uCurrChannel,
291 IN WORD wCurrATIMWinodw, 291 WORD wCurrATIMWinodw,
292 IN PBYTE pDstAddr, 292 PBYTE pDstAddr,
293 IN PWLAN_IE_SSID pCurrSSID, 293 PWLAN_IE_SSID pCurrSSID,
294 IN PBYTE pCurrBSSID, 294 PBYTE pCurrBSSID,
295 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 295 PWLAN_IE_SUPP_RATES pCurrSuppRates,
296 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates, 296 PWLAN_IE_SUPP_RATES pCurrExtSuppRates,
297 IN BYTE byPHYType 297 BYTE byPHYType
298 ); 298 );
299 299
300// received status 300// received status
301static 301static
302VOID 302void
303s_vMgrLogStatus( 303s_vMgrLogStatus(
304 IN PSMgmtObject pMgmt, 304 PSMgmtObject pMgmt,
305 IN WORD wStatus 305 WORD wStatus
306 ); 306 );
307 307
308 308
309static 309static
310VOID 310void
311s_vMgrSynchBSS ( 311s_vMgrSynchBSS (
312 IN PSDevice pDevice, 312 PSDevice pDevice,
313 IN UINT uBSSMode, 313 unsigned int uBSSMode,
314 IN PKnownBSS pCurr, 314 PKnownBSS pCurr,
315 OUT PCMD_STATUS pStatus 315 PCMD_STATUS pStatus
316 ); 316 );
317 317
318 318
319static BOOL 319static BOOL
320s_bCipherMatch ( 320s_bCipherMatch (
321 IN PKnownBSS pBSSNode, 321 PKnownBSS pBSSNode,
322 IN NDIS_802_11_ENCRYPTION_STATUS EncStatus, 322 NDIS_802_11_ENCRYPTION_STATUS EncStatus,
323 OUT PBYTE pbyCCSPK, 323 PBYTE pbyCCSPK,
324 OUT PBYTE pbyCCSGK 324 PBYTE pbyCCSGK
325 ); 325 );
326 326
327 static VOID Encyption_Rebuild( 327 static void Encyption_Rebuild(
328 IN PSDevice pDevice, 328 PSDevice pDevice,
329 IN PKnownBSS pCurr 329 PKnownBSS pCurr
330 ); 330 );
331 331
332
333
334/*--------------------- Export Variables --------------------------*/ 332/*--------------------- Export Variables --------------------------*/
335 333
336
337/*--------------------- Export Functions --------------------------*/ 334/*--------------------- Export Functions --------------------------*/
338 335
339
340/*+ 336/*+
341 * 337 *
342 * Routine Description: 338 * Routine Description:
@@ -347,10 +343,7 @@ s_bCipherMatch (
347 * 343 *
348-*/ 344-*/
349 345
350VOID 346void vMgrObjectInit(void *hDeviceContext)
351vMgrObjectInit(
352 IN HANDLE hDeviceContext
353 )
354{ 347{
355 PSDevice pDevice = (PSDevice)hDeviceContext; 348 PSDevice pDevice = (PSDevice)hDeviceContext;
356 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 349 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -368,22 +361,22 @@ vMgrObjectInit(
368 pMgmt->byCSSPK = KEY_CTL_NONE; 361 pMgmt->byCSSPK = KEY_CTL_NONE;
369 pMgmt->byCSSGK = KEY_CTL_NONE; 362 pMgmt->byCSSGK = KEY_CTL_NONE;
370 pMgmt->wIBSSBeaconPeriod = DEFAULT_IBSS_BI; 363 pMgmt->wIBSSBeaconPeriod = DEFAULT_IBSS_BI;
371 BSSvClearBSSList((HANDLE)pDevice, FALSE); 364 BSSvClearBSSList((void *) pDevice, FALSE);
372 365
373 init_timer(&pMgmt->sTimerSecondCallback); 366 init_timer(&pMgmt->sTimerSecondCallback);
374 pMgmt->sTimerSecondCallback.data = (ULONG)pDevice; 367 pMgmt->sTimerSecondCallback.data = (unsigned long)pDevice;
375 pMgmt->sTimerSecondCallback.function = (TimerFunction)BSSvSecondCallBack; 368 pMgmt->sTimerSecondCallback.function = (TimerFunction)BSSvSecondCallBack;
376 pMgmt->sTimerSecondCallback.expires = RUN_AT(HZ); 369 pMgmt->sTimerSecondCallback.expires = RUN_AT(HZ);
377 370
378 init_timer(&pDevice->sTimerCommand); 371 init_timer(&pDevice->sTimerCommand);
379 pDevice->sTimerCommand.data = (ULONG)pDevice; 372 pDevice->sTimerCommand.data = (unsigned long)pDevice;
380 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand; 373 pDevice->sTimerCommand.function = (TimerFunction)vRunCommand;
381 pDevice->sTimerCommand.expires = RUN_AT(HZ); 374 pDevice->sTimerCommand.expires = RUN_AT(HZ);
382 375
383//2007-0115-10<Add>by MikeLiu 376//2007-0115-10<Add>by MikeLiu
384 #ifdef TxInSleep 377 #ifdef TxInSleep
385 init_timer(&pDevice->sTimerTxData); 378 init_timer(&pDevice->sTimerTxData);
386 pDevice->sTimerTxData.data = (ULONG)pDevice; 379 pDevice->sTimerTxData.data = (unsigned long)pDevice;
387 pDevice->sTimerTxData.function = (TimerFunction)BSSvSecondTxData; 380 pDevice->sTimerTxData.function = (TimerFunction)BSSvSecondTxData;
388 pDevice->sTimerTxData.expires = RUN_AT(10*HZ); //10s callback 381 pDevice->sTimerTxData.expires = RUN_AT(10*HZ); //10s callback
389 pDevice->fTxDataInSleep = FALSE; 382 pDevice->fTxDataInSleep = FALSE;
@@ -401,8 +394,6 @@ vMgrObjectInit(
401 return; 394 return;
402} 395}
403 396
404
405
406/*+ 397/*+
407 * 398 *
408 * Routine Description: 399 * Routine Description:
@@ -414,13 +405,9 @@ vMgrObjectInit(
414 * 405 *
415-*/ 406-*/
416 407
417 408void vMgrAssocBeginSta(void *hDeviceContext,
418VOID 409 PSMgmtObject pMgmt,
419vMgrAssocBeginSta( 410 PCMD_STATUS pStatus)
420 IN HANDLE hDeviceContext,
421 IN PSMgmtObject pMgmt,
422 OUT PCMD_STATUS pStatus
423 )
424{ 411{
425 PSDevice pDevice = (PSDevice)hDeviceContext; 412 PSDevice pDevice = (PSDevice)hDeviceContext;
426 PSTxMgmtPacket pTxPacket; 413 PSTxMgmtPacket pTxPacket;
@@ -491,12 +478,9 @@ vMgrAssocBeginSta(
491 * 478 *
492-*/ 479-*/
493 480
494VOID 481void vMgrReAssocBeginSta(void *hDeviceContext,
495vMgrReAssocBeginSta( 482 PSMgmtObject pMgmt,
496 IN HANDLE hDeviceContext, 483 PCMD_STATUS pStatus)
497 IN PSMgmtObject pMgmt,
498 OUT PCMD_STATUS pStatus
499 )
500{ 484{
501 PSDevice pDevice = (PSDevice)hDeviceContext; 485 PSDevice pDevice = (PSDevice)hDeviceContext;
502 PSTxMgmtPacket pTxPacket; 486 PSTxMgmtPacket pTxPacket;
@@ -570,14 +554,11 @@ vMgrReAssocBeginSta(
570 * 554 *
571-*/ 555-*/
572 556
573VOID 557void vMgrDisassocBeginSta(void *hDeviceContext,
574vMgrDisassocBeginSta( 558 PSMgmtObject pMgmt,
575 IN HANDLE hDeviceContext, 559 PBYTE abyDestAddress,
576 IN PSMgmtObject pMgmt, 560 WORD wReason,
577 IN PBYTE abyDestAddress, 561 PCMD_STATUS pStatus)
578 IN WORD wReason,
579 OUT PCMD_STATUS pStatus
580 )
581{ 562{
582 PSDevice pDevice = (PSDevice)hDeviceContext; 563 PSDevice pDevice = (PSDevice)hDeviceContext;
583 PSTxMgmtPacket pTxPacket = NULL; 564 PSTxMgmtPacket pTxPacket = NULL;
@@ -633,12 +614,12 @@ vMgrDisassocBeginSta(
633-*/ 614-*/
634 615
635static 616static
636VOID 617void
637s_vMgrRxAssocRequest( 618s_vMgrRxAssocRequest(
638 IN PSDevice pDevice, 619 PSDevice pDevice,
639 IN PSMgmtObject pMgmt, 620 PSMgmtObject pMgmt,
640 IN PSRxMgmtPacket pRxPacket, 621 PSRxMgmtPacket pRxPacket,
641 IN UINT uNodeIndex 622 unsigned int uNodeIndex
642 ) 623 )
643{ 624{
644 WLAN_FR_ASSOCREQ sFrame; 625 WLAN_FR_ASSOCREQ sFrame;
@@ -646,7 +627,7 @@ s_vMgrRxAssocRequest(
646 PSTxMgmtPacket pTxPacket; 627 PSTxMgmtPacket pTxPacket;
647 WORD wAssocStatus = 0; 628 WORD wAssocStatus = 0;
648 WORD wAssocAID = 0; 629 WORD wAssocAID = 0;
649 UINT uRateLen = WLAN_RATES_MAXLEN; 630 unsigned int uRateLen = WLAN_RATES_MAXLEN;
650 BYTE abyCurrSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 631 BYTE abyCurrSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
651 BYTE abyCurrExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 632 BYTE abyCurrExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
652 633
@@ -691,7 +672,7 @@ s_vMgrRxAssocRequest(
691 } 672 }
692 673
693 674
694 RATEvParseMaxRate((PVOID)pDevice, 675 RATEvParseMaxRate((void *)pDevice,
695 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates, 676 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates,
696 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates, 677 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates,
697 FALSE, // do not change our basic rate 678 FALSE, // do not change our basic rate
@@ -789,12 +770,12 @@ s_vMgrRxAssocRequest(
789-*/ 770-*/
790 771
791static 772static
792VOID 773void
793s_vMgrRxReAssocRequest( 774s_vMgrRxReAssocRequest(
794 IN PSDevice pDevice, 775 PSDevice pDevice,
795 IN PSMgmtObject pMgmt, 776 PSMgmtObject pMgmt,
796 IN PSRxMgmtPacket pRxPacket, 777 PSRxMgmtPacket pRxPacket,
797 IN UINT uNodeIndex 778 unsigned int uNodeIndex
798 ) 779 )
799{ 780{
800 WLAN_FR_REASSOCREQ sFrame; 781 WLAN_FR_REASSOCREQ sFrame;
@@ -802,7 +783,7 @@ s_vMgrRxReAssocRequest(
802 PSTxMgmtPacket pTxPacket; 783 PSTxMgmtPacket pTxPacket;
803 WORD wAssocStatus = 0; 784 WORD wAssocStatus = 0;
804 WORD wAssocAID = 0; 785 WORD wAssocAID = 0;
805 UINT uRateLen = WLAN_RATES_MAXLEN; 786 unsigned int uRateLen = WLAN_RATES_MAXLEN;
806 BYTE abyCurrSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 787 BYTE abyCurrSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
807 BYTE abyCurrExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 788 BYTE abyCurrExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
808 789
@@ -844,7 +825,7 @@ s_vMgrRxReAssocRequest(
844 } 825 }
845 826
846 827
847 RATEvParseMaxRate((PVOID)pDevice, 828 RATEvParseMaxRate((void *)pDevice,
848 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates, 829 (PWLAN_IE_SUPP_RATES)abyCurrSuppRates,
849 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates, 830 (PWLAN_IE_SUPP_RATES)abyCurrExtSuppRates,
850 FALSE, // do not change our basic rate 831 FALSE, // do not change our basic rate
@@ -936,12 +917,12 @@ s_vMgrRxReAssocRequest(
936-*/ 917-*/
937 918
938static 919static
939VOID 920void
940s_vMgrRxAssocResponse( 921s_vMgrRxAssocResponse(
941 IN PSDevice pDevice, 922 PSDevice pDevice,
942 IN PSMgmtObject pMgmt, 923 PSMgmtObject pMgmt,
943 IN PSRxMgmtPacket pRxPacket, 924 PSRxMgmtPacket pRxPacket,
944 IN BOOL bReAssocType 925 BOOL bReAssocType
945 ) 926 )
946{ 927{
947 WLAN_FR_ASSOCRESP sFrame; 928 WLAN_FR_ASSOCRESP sFrame;
@@ -958,12 +939,12 @@ s_vMgrRxAssocResponse(
958 sFrame.pBuf = (PBYTE)pRxPacket->p80211Header; 939 sFrame.pBuf = (PBYTE)pRxPacket->p80211Header;
959 // decode the frame 940 // decode the frame
960 vMgrDecodeAssocResponse(&sFrame); 941 vMgrDecodeAssocResponse(&sFrame);
961 if ((sFrame.pwCapInfo == 0) || 942 if ((sFrame.pwCapInfo == NULL)
962 (sFrame.pwStatus == 0) || 943 || (sFrame.pwStatus == NULL)
963 (sFrame.pwAid == 0) || 944 || (sFrame.pwAid == NULL)
964 (sFrame.pSuppRates == 0)){ 945 || (sFrame.pSuppRates == NULL)) {
965 DBG_PORT80(0xCC); 946 DBG_PORT80(0xCC);
966 return; 947 return;
967 }; 948 };
968 949
969 pMgmt->sAssocInfo.AssocInfo.ResponseFixedIEs.Capabilities = *(sFrame.pwCapInfo); 950 pMgmt->sAssocInfo.AssocInfo.ResponseFixedIEs.Capabilities = *(sFrame.pwCapInfo);
@@ -987,7 +968,10 @@ s_vMgrRxAssocResponse(
987 }; 968 };
988 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Association Successful, AID=%d.\n", pMgmt->wCurrAID & ~(BIT14|BIT15)); 969 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Association Successful, AID=%d.\n", pMgmt->wCurrAID & ~(BIT14|BIT15));
989 pMgmt->eCurrState = WMAC_STATE_ASSOC; 970 pMgmt->eCurrState = WMAC_STATE_ASSOC;
990 BSSvUpdateAPNode((HANDLE)pDevice, sFrame.pwCapInfo, sFrame.pSuppRates, sFrame.pExtSuppRates); 971 BSSvUpdateAPNode((void *) pDevice,
972 sFrame.pwCapInfo,
973 sFrame.pSuppRates,
974 sFrame.pExtSuppRates);
991 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID; 975 pItemSSID = (PWLAN_IE_SSID)pMgmt->abyCurrSSID;
992 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Link with AP(SSID): %s\n", pItemSSID->abySSID); 976 DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Link with AP(SSID): %s\n", pItemSSID->abySSID);
993 pDevice->bLinkPass = TRUE; 977 pDevice->bLinkPass = TRUE;
@@ -1089,8 +1073,6 @@ if(pMgmt->eCurrState == WMAC_STATE_ASSOC)
1089 return; 1073 return;
1090} 1074}
1091 1075
1092
1093
1094/*+ 1076/*+
1095 * 1077 *
1096 * Routine Description: 1078 * Routine Description:
@@ -1102,12 +1084,9 @@ if(pMgmt->eCurrState == WMAC_STATE_ASSOC)
1102 * 1084 *
1103-*/ 1085-*/
1104 1086
1105VOID 1087void vMgrAuthenBeginSta(void *hDeviceContext,
1106vMgrAuthenBeginSta( 1088 PSMgmtObject pMgmt,
1107 IN HANDLE hDeviceContext, 1089 PCMD_STATUS pStatus)
1108 IN PSMgmtObject pMgmt,
1109 OUT PCMD_STATUS pStatus
1110 )
1111{ 1090{
1112 PSDevice pDevice = (PSDevice)hDeviceContext; 1091 PSDevice pDevice = (PSDevice)hDeviceContext;
1113 WLAN_FR_AUTHEN sFrame; 1092 WLAN_FR_AUTHEN sFrame;
@@ -1147,8 +1126,6 @@ vMgrAuthenBeginSta(
1147 return ; 1126 return ;
1148} 1127}
1149 1128
1150
1151
1152/*+ 1129/*+
1153 * 1130 *
1154 * Routine Description: 1131 * Routine Description:
@@ -1160,14 +1137,11 @@ vMgrAuthenBeginSta(
1160 * 1137 *
1161-*/ 1138-*/
1162 1139
1163VOID 1140void vMgrDeAuthenBeginSta(void *hDeviceContext,
1164vMgrDeAuthenBeginSta( 1141 PSMgmtObject pMgmt,
1165 IN HANDLE hDeviceContext, 1142 PBYTE abyDestAddress,
1166 IN PSMgmtObject pMgmt, 1143 WORD wReason,
1167 IN PBYTE abyDestAddress, 1144 PCMD_STATUS pStatus)
1168 IN WORD wReason,
1169 OUT PCMD_STATUS pStatus
1170 )
1171{ 1145{
1172 PSDevice pDevice = (PSDevice)hDeviceContext; 1146 PSDevice pDevice = (PSDevice)hDeviceContext;
1173 WLAN_FR_DEAUTHEN sFrame; 1147 WLAN_FR_DEAUTHEN sFrame;
@@ -1217,11 +1191,11 @@ vMgrDeAuthenBeginSta(
1217-*/ 1191-*/
1218 1192
1219static 1193static
1220VOID 1194void
1221s_vMgrRxAuthentication( 1195s_vMgrRxAuthentication(
1222 IN PSDevice pDevice, 1196 PSDevice pDevice,
1223 IN PSMgmtObject pMgmt, 1197 PSMgmtObject pMgmt,
1224 IN PSRxMgmtPacket pRxPacket 1198 PSRxMgmtPacket pRxPacket
1225 ) 1199 )
1226{ 1200{
1227 WLAN_FR_AUTHEN sFrame; 1201 WLAN_FR_AUTHEN sFrame;
@@ -1275,15 +1249,15 @@ s_vMgrRxAuthentication(
1275 1249
1276 1250
1277static 1251static
1278VOID 1252void
1279s_vMgrRxAuthenSequence_1( 1253s_vMgrRxAuthenSequence_1(
1280 IN PSDevice pDevice, 1254 PSDevice pDevice,
1281 IN PSMgmtObject pMgmt, 1255 PSMgmtObject pMgmt,
1282 IN PWLAN_FR_AUTHEN pFrame 1256 PWLAN_FR_AUTHEN pFrame
1283 ) 1257 )
1284{ 1258{
1285 PSTxMgmtPacket pTxPacket = NULL; 1259 PSTxMgmtPacket pTxPacket = NULL;
1286 UINT uNodeIndex; 1260 unsigned int uNodeIndex;
1287 WLAN_FR_AUTHEN sFrame; 1261 WLAN_FR_AUTHEN sFrame;
1288 PSKeyItem pTransmitKey; 1262 PSKeyItem pTransmitKey;
1289 1263
@@ -1381,11 +1355,11 @@ s_vMgrRxAuthenSequence_1(
1381-*/ 1355-*/
1382 1356
1383static 1357static
1384VOID 1358void
1385s_vMgrRxAuthenSequence_2( 1359s_vMgrRxAuthenSequence_2(
1386 IN PSDevice pDevice, 1360 PSDevice pDevice,
1387 IN PSMgmtObject pMgmt, 1361 PSMgmtObject pMgmt,
1388 IN PWLAN_FR_AUTHEN pFrame 1362 PWLAN_FR_AUTHEN pFrame
1389 ) 1363 )
1390{ 1364{
1391 WLAN_FR_AUTHEN sFrame; 1365 WLAN_FR_AUTHEN sFrame;
@@ -1405,12 +1379,11 @@ s_vMgrRxAuthenSequence_2(
1405 s_vMgrLogStatus(pMgmt, cpu_to_le16((*(pFrame->pwStatus)))); 1379 s_vMgrLogStatus(pMgmt, cpu_to_le16((*(pFrame->pwStatus))));
1406 pMgmt->eCurrState = WMAC_STATE_IDLE; 1380 pMgmt->eCurrState = WMAC_STATE_IDLE;
1407 } 1381 }
1408 if (pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) { 1382 if (pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT) {
1409// spin_unlock_irq(&pDevice->lock); 1383 /* spin_unlock_irq(&pDevice->lock);
1410// vCommandTimerWait((HANDLE)pDevice, 0); 1384 vCommandTimerWait((void *) pDevice, 0);
1411// spin_lock_irq(&pDevice->lock); 1385 spin_lock_irq(&pDevice->lock); */
1412 } 1386 }
1413
1414 break; 1387 break;
1415 1388
1416 case WLAN_AUTH_ALG_SHAREDKEY: 1389 case WLAN_AUTH_ALG_SHAREDKEY:
@@ -1453,9 +1426,9 @@ s_vMgrRxAuthenSequence_2(
1453 else { 1426 else {
1454 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Mgt:rx Auth_reply sequence_2 status error ...\n"); 1427 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Mgt:rx Auth_reply sequence_2 status error ...\n");
1455 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) { 1428 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) {
1456// spin_unlock_irq(&pDevice->lock); 1429 /* spin_unlock_irq(&pDevice->lock);
1457// vCommandTimerWait((HANDLE)pDevice, 0); 1430 vCommandTimerWait((void *) pDevice, 0);
1458// spin_lock_irq(&pDevice->lock); 1431 spin_lock_irq(&pDevice->lock); */
1459 } 1432 }
1460 s_vMgrLogStatus(pMgmt, cpu_to_le16((*(pFrame->pwStatus)))); 1433 s_vMgrLogStatus(pMgmt, cpu_to_le16((*(pFrame->pwStatus))));
1461 } 1434 }
@@ -1483,16 +1456,16 @@ s_vMgrRxAuthenSequence_2(
1483-*/ 1456-*/
1484 1457
1485static 1458static
1486VOID 1459void
1487s_vMgrRxAuthenSequence_3( 1460s_vMgrRxAuthenSequence_3(
1488 IN PSDevice pDevice, 1461 PSDevice pDevice,
1489 IN PSMgmtObject pMgmt, 1462 PSMgmtObject pMgmt,
1490 IN PWLAN_FR_AUTHEN pFrame 1463 PWLAN_FR_AUTHEN pFrame
1491 ) 1464 )
1492{ 1465{
1493 PSTxMgmtPacket pTxPacket = NULL; 1466 PSTxMgmtPacket pTxPacket = NULL;
1494 UINT uStatusCode = 0 ; 1467 unsigned int uStatusCode = 0 ;
1495 UINT uNodeIndex = 0; 1468 unsigned int uNodeIndex = 0;
1496 WLAN_FR_AUTHEN sFrame; 1469 WLAN_FR_AUTHEN sFrame;
1497 1470
1498 if (!WLAN_GET_FC_ISWEP(pFrame->pHdr->sA3.wFrameCtl)) { 1471 if (!WLAN_GET_FC_ISWEP(pFrame->pHdr->sA3.wFrameCtl)) {
@@ -1571,11 +1544,11 @@ reply:
1571 * 1544 *
1572-*/ 1545-*/
1573static 1546static
1574VOID 1547void
1575s_vMgrRxAuthenSequence_4( 1548s_vMgrRxAuthenSequence_4(
1576 IN PSDevice pDevice, 1549 PSDevice pDevice,
1577 IN PSMgmtObject pMgmt, 1550 PSMgmtObject pMgmt,
1578 IN PWLAN_FR_AUTHEN pFrame 1551 PWLAN_FR_AUTHEN pFrame
1579 ) 1552 )
1580{ 1553{
1581 1554
@@ -1591,11 +1564,10 @@ s_vMgrRxAuthenSequence_4(
1591 } 1564 }
1592 1565
1593 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) { 1566 if ( pDevice->eCommandState == WLAN_AUTHENTICATE_WAIT ) {
1594// spin_unlock_irq(&pDevice->lock); 1567 /* spin_unlock_irq(&pDevice->lock);
1595// vCommandTimerWait((HANDLE)pDevice, 0); 1568 vCommandTimerWait((void *) pDevice, 0);
1596// spin_lock_irq(&pDevice->lock); 1569 spin_lock_irq(&pDevice->lock); */
1597 } 1570 }
1598
1599} 1571}
1600 1572
1601/*+ 1573/*+
@@ -1610,15 +1582,15 @@ s_vMgrRxAuthenSequence_4(
1610-*/ 1582-*/
1611 1583
1612static 1584static
1613VOID 1585void
1614s_vMgrRxDisassociation( 1586s_vMgrRxDisassociation(
1615 IN PSDevice pDevice, 1587 PSDevice pDevice,
1616 IN PSMgmtObject pMgmt, 1588 PSMgmtObject pMgmt,
1617 IN PSRxMgmtPacket pRxPacket 1589 PSRxMgmtPacket pRxPacket
1618 ) 1590 )
1619{ 1591{
1620 WLAN_FR_DISASSOC sFrame; 1592 WLAN_FR_DISASSOC sFrame;
1621 UINT uNodeIndex = 0; 1593 unsigned int uNodeIndex = 0;
1622 CMD_STATUS CmdStatus; 1594 CMD_STATUS CmdStatus;
1623 viawget_wpa_header *wpahdr; 1595 viawget_wpa_header *wpahdr;
1624 1596
@@ -1700,15 +1672,15 @@ s_vMgrRxDisassociation(
1700-*/ 1672-*/
1701 1673
1702static 1674static
1703VOID 1675void
1704s_vMgrRxDeauthentication( 1676s_vMgrRxDeauthentication(
1705 IN PSDevice pDevice, 1677 PSDevice pDevice,
1706 IN PSMgmtObject pMgmt, 1678 PSMgmtObject pMgmt,
1707 IN PSRxMgmtPacket pRxPacket 1679 PSRxMgmtPacket pRxPacket
1708 ) 1680 )
1709{ 1681{
1710 WLAN_FR_DEAUTHEN sFrame; 1682 WLAN_FR_DEAUTHEN sFrame;
1711 UINT uNodeIndex = 0; 1683 unsigned int uNodeIndex = 0;
1712 viawget_wpa_header *wpahdr; 1684 viawget_wpa_header *wpahdr;
1713 1685
1714 1686
@@ -1791,8 +1763,8 @@ s_vMgrRxDeauthentication(
1791-*/ 1763-*/
1792static BOOL 1764static BOOL
1793ChannelExceedZoneType( 1765ChannelExceedZoneType(
1794 IN PSDevice pDevice, 1766 PSDevice pDevice,
1795 IN BYTE byCurrChannel 1767 BYTE byCurrChannel
1796 ) 1768 )
1797{ 1769{
1798 BOOL exceed=FALSE; 1770 BOOL exceed=FALSE;
@@ -1826,12 +1798,12 @@ ChannelExceedZoneType(
1826-*/ 1798-*/
1827 1799
1828static 1800static
1829VOID 1801void
1830s_vMgrRxBeacon( 1802s_vMgrRxBeacon(
1831 IN PSDevice pDevice, 1803 PSDevice pDevice,
1832 IN PSMgmtObject pMgmt, 1804 PSMgmtObject pMgmt,
1833 IN PSRxMgmtPacket pRxPacket, 1805 PSRxMgmtPacket pRxPacket,
1834 IN BOOL bInScan 1806 BOOL bInScan
1835 ) 1807 )
1836{ 1808{
1837 1809
@@ -1845,17 +1817,17 @@ s_vMgrRxBeacon(
1845 BOOL bUpdateTSF = FALSE; 1817 BOOL bUpdateTSF = FALSE;
1846 BOOL bIsAPBeacon = FALSE; 1818 BOOL bIsAPBeacon = FALSE;
1847 BOOL bIsChannelEqual = FALSE; 1819 BOOL bIsChannelEqual = FALSE;
1848 UINT uLocateByteIndex; 1820 unsigned int uLocateByteIndex;
1849 BYTE byTIMBitOn = 0; 1821 BYTE byTIMBitOn = 0;
1850 WORD wAIDNumber = 0; 1822 WORD wAIDNumber = 0;
1851 UINT uNodeIndex; 1823 unsigned int uNodeIndex;
1852 QWORD qwTimestamp, qwLocalTSF; 1824 QWORD qwTimestamp, qwLocalTSF;
1853 QWORD qwCurrTSF; 1825 QWORD qwCurrTSF;
1854 WORD wStartIndex = 0; 1826 WORD wStartIndex = 0;
1855 WORD wAIDIndex = 0; 1827 WORD wAIDIndex = 0;
1856 BYTE byCurrChannel = pRxPacket->byRxChannel; 1828 BYTE byCurrChannel = pRxPacket->byRxChannel;
1857 ERPObject sERP; 1829 ERPObject sERP;
1858 UINT uRateLen = WLAN_RATES_MAXLEN; 1830 unsigned int uRateLen = WLAN_RATES_MAXLEN;
1859 BOOL bChannelHit = FALSE; 1831 BOOL bChannelHit = FALSE;
1860 BYTE byOldPreambleType; 1832 BYTE byOldPreambleType;
1861 1833
@@ -1871,14 +1843,14 @@ s_vMgrRxBeacon(
1871 // decode the beacon frame 1843 // decode the beacon frame
1872 vMgrDecodeBeacon(&sFrame); 1844 vMgrDecodeBeacon(&sFrame);
1873 1845
1874 if ((sFrame.pwBeaconInterval == 0) || 1846 if ((sFrame.pwBeaconInterval == NULL)
1875 (sFrame.pwCapInfo == 0) || 1847 || (sFrame.pwCapInfo == NULL)
1876 (sFrame.pSSID == 0) || 1848 || (sFrame.pSSID == NULL)
1877 (sFrame.pSuppRates == 0) ) { 1849 || (sFrame.pSuppRates == NULL)) {
1878 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Rx beacon frame error\n");
1879 return;
1880 };
1881 1850
1851 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Rx beacon frame error\n");
1852 return;
1853 };
1882 1854
1883 if( byCurrChannel > CB_MAX_CHANNEL_24G ) 1855 if( byCurrChannel > CB_MAX_CHANNEL_24G )
1884 { 1856 {
@@ -1913,10 +1885,12 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
1913 sERP.byERP = 0; 1885 sERP.byERP = 0;
1914 } 1886 }
1915 1887
1916 pBSSList = BSSpAddrIsInBSSList((HANDLE)pDevice, sFrame.pHdr->sA3.abyAddr3, sFrame.pSSID); 1888 pBSSList = BSSpAddrIsInBSSList((void *) pDevice,
1889 sFrame.pHdr->sA3.abyAddr3,
1890 sFrame.pSSID);
1917 if (pBSSList == NULL) { 1891 if (pBSSList == NULL) {
1918 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Beacon/insert: RxChannel = : %d\n", byCurrChannel); 1892 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Beacon/insert: RxChannel = : %d\n", byCurrChannel);
1919 BSSbInsertToBSSList((HANDLE)pDevice, 1893 BSSbInsertToBSSList((void *) pDevice,
1920 sFrame.pHdr->sA3.abyAddr3, 1894 sFrame.pHdr->sA3.abyAddr3,
1921 *sFrame.pqwTimestamp, 1895 *sFrame.pqwTimestamp,
1922 *sFrame.pwBeaconInterval, 1896 *sFrame.pwBeaconInterval,
@@ -1932,12 +1906,11 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
1932 sFrame.pIE_Quiet, 1906 sFrame.pIE_Quiet,
1933 sFrame.len - WLAN_HDR_ADDR3_LEN, 1907 sFrame.len - WLAN_HDR_ADDR3_LEN,
1934 sFrame.pHdr->sA4.abyAddr4, // payload of beacon 1908 sFrame.pHdr->sA4.abyAddr4, // payload of beacon
1935 (HANDLE)pRxPacket 1909 (void *) pRxPacket);
1936 );
1937 } 1910 }
1938 else { 1911 else {
1939// DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"update bcn: RxChannel = : %d\n", byCurrChannel); 1912// DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"update bcn: RxChannel = : %d\n", byCurrChannel);
1940 BSSbUpdateToBSSList((HANDLE)pDevice, 1913 BSSbUpdateToBSSList((void *) pDevice,
1941 *sFrame.pqwTimestamp, 1914 *sFrame.pqwTimestamp,
1942 *sFrame.pwBeaconInterval, 1915 *sFrame.pwBeaconInterval,
1943 *sFrame.pwCapInfo, 1916 *sFrame.pwCapInfo,
@@ -1954,8 +1927,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
1954 pBSSList, 1927 pBSSList,
1955 sFrame.len - WLAN_HDR_ADDR3_LEN, 1928 sFrame.len - WLAN_HDR_ADDR3_LEN,
1956 sFrame.pHdr->sA4.abyAddr4, // payload of probresponse 1929 sFrame.pHdr->sA4.abyAddr4, // payload of probresponse
1957 (HANDLE)pRxPacket 1930 (void *) pRxPacket);
1958 );
1959 1931
1960 } 1932 }
1961 1933
@@ -2089,7 +2061,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2089 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pBSSList->abyExtSuppRates, 2061 pMgmt->abyCurrExtSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)pBSSList->abyExtSuppRates,
2090 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 2062 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
2091 uRateLen); 2063 uRateLen);
2092 RATEvParseMaxRate( (PVOID)pDevice, 2064 RATEvParseMaxRate((void *)pDevice,
2093 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2065 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2094 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, 2066 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates,
2095 TRUE, 2067 TRUE,
@@ -2152,9 +2124,9 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2152 if (bTSFLargeDiff) 2124 if (bTSFLargeDiff)
2153 bUpdateTSF = TRUE; 2125 bUpdateTSF = TRUE;
2154 2126
2155 if ((pDevice->bEnablePSMode == TRUE) &&(sFrame.pTIM != 0)) { 2127 if ((pDevice->bEnablePSMode == TRUE) && (sFrame.pTIM)) {
2156 2128
2157 // deal with DTIM, analysis TIM 2129 /* deal with DTIM, analysis TIM */
2158 pMgmt->bMulticastTIM = WLAN_MGMT_IS_MULTICAST_TIM(sFrame.pTIM->byBitMapCtl) ? TRUE : FALSE ; 2130 pMgmt->bMulticastTIM = WLAN_MGMT_IS_MULTICAST_TIM(sFrame.pTIM->byBitMapCtl) ? TRUE : FALSE ;
2159 pMgmt->byDTIMCount = sFrame.pTIM->byDTIMCount; 2131 pMgmt->byDTIMCount = sFrame.pTIM->byDTIMCount;
2160 pMgmt->byDTIMPeriod = sFrame.pTIM->byDTIMPeriod; 2132 pMgmt->byDTIMPeriod = sFrame.pTIM->byDTIMPeriod;
@@ -2227,7 +2199,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2227 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates, 2199 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates,
2228 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2200 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2229 WLAN_RATES_MAXLEN_11B); 2201 WLAN_RATES_MAXLEN_11B);
2230 RATEvParseMaxRate( (PVOID)pDevice, 2202 RATEvParseMaxRate((void *)pDevice,
2231 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2203 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2232 NULL, 2204 NULL,
2233 TRUE, 2205 TRUE,
@@ -2248,7 +2220,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2248 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates, 2220 pMgmt->abyCurrSuppRates[1] = RATEuSetIE((PWLAN_IE_SUPP_RATES)sFrame.pSuppRates,
2249 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2221 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2250 WLAN_RATES_MAXLEN_11B); 2222 WLAN_RATES_MAXLEN_11B);
2251 RATEvParseMaxRate( (PVOID)pDevice, 2223 RATEvParseMaxRate((void *)pDevice,
2252 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2224 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2253 NULL, 2225 NULL,
2254 TRUE, 2226 TRUE,
@@ -2324,7 +2296,7 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2324 // set highest basic rate 2296 // set highest basic rate
2325 // s_vSetHighestBasicRate(pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates); 2297 // s_vSetHighestBasicRate(pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates);
2326 // Prepare beacon frame 2298 // Prepare beacon frame
2327 bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt); 2299 bMgrPrepareBeaconToSend((void *) pDevice, pMgmt);
2328 // } 2300 // }
2329 }; 2301 };
2330 } 2302 }
@@ -2341,8 +2313,6 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2341 return; 2313 return;
2342} 2314}
2343 2315
2344
2345
2346/*+ 2316/*+
2347 * 2317 *
2348 * Routine Description: 2318 * Routine Description:
@@ -2355,11 +2325,9 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
2355 * CMD_STATUS 2325 * CMD_STATUS
2356 * 2326 *
2357-*/ 2327-*/
2358VOID 2328
2359vMgrCreateOwnIBSS( 2329void vMgrCreateOwnIBSS(void *hDeviceContext,
2360 IN HANDLE hDeviceContext, 2330 PCMD_STATUS pStatus)
2361 OUT PCMD_STATUS pStatus
2362 )
2363{ 2331{
2364 PSDevice pDevice = (PSDevice)hDeviceContext; 2332 PSDevice pDevice = (PSDevice)hDeviceContext;
2365 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 2333 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -2368,7 +2336,7 @@ vMgrCreateOwnIBSS(
2368 BYTE byTopCCKBasicRate; 2336 BYTE byTopCCKBasicRate;
2369 BYTE byTopOFDMBasicRate; 2337 BYTE byTopOFDMBasicRate;
2370 QWORD qwCurrTSF; 2338 QWORD qwCurrTSF;
2371 UINT ii; 2339 unsigned int ii;
2372 BYTE abyRATE[] = {0x82, 0x84, 0x8B, 0x96, 0x24, 0x30, 0x48, 0x6C, 0x0C, 0x12, 0x18, 0x60}; 2340 BYTE abyRATE[] = {0x82, 0x84, 0x8B, 0x96, 0x24, 0x30, 0x48, 0x6C, 0x0C, 0x12, 0x18, 0x60};
2373 BYTE abyCCK_RATE[] = {0x82, 0x84, 0x8B, 0x96}; 2341 BYTE abyCCK_RATE[] = {0x82, 0x84, 0x8B, 0x96};
2374 BYTE abyOFDM_RATE[] = {0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6C}; 2342 BYTE abyOFDM_RATE[] = {0x0C, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6C};
@@ -2466,7 +2434,8 @@ vMgrCreateOwnIBSS(
2466 2434
2467 // set basic rate 2435 // set basic rate
2468 2436
2469 RATEvParseMaxRate((PVOID)pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2437 RATEvParseMaxRate((void *)pDevice,
2438 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2470 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, TRUE, 2439 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrExtSuppRates, TRUE,
2471 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate, 2440 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
2472 &byTopCCKBasicRate, &byTopOFDMBasicRate); 2441 &byTopCCKBasicRate, &byTopOFDMBasicRate);
@@ -2608,13 +2577,11 @@ vMgrCreateOwnIBSS(
2608 2577
2609 pMgmt->eCurrState = WMAC_STATE_STARTED; 2578 pMgmt->eCurrState = WMAC_STATE_STARTED;
2610 // Prepare beacon to send 2579 // Prepare beacon to send
2611 if (bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt)) { 2580 if (bMgrPrepareBeaconToSend((void *) pDevice, pMgmt))
2612 *pStatus = CMD_STATUS_SUCCESS; 2581 *pStatus = CMD_STATUS_SUCCESS;
2613 }
2614 return ;
2615}
2616
2617 2582
2583 return;
2584}
2618 2585
2619/*+ 2586/*+
2620 * 2587 *
@@ -2629,21 +2596,16 @@ vMgrCreateOwnIBSS(
2629 * 2596 *
2630-*/ 2597-*/
2631 2598
2632VOID 2599void vMgrJoinBSSBegin(void *hDeviceContext, PCMD_STATUS pStatus)
2633vMgrJoinBSSBegin(
2634 IN HANDLE hDeviceContext,
2635 OUT PCMD_STATUS pStatus
2636 )
2637{ 2600{
2638
2639 PSDevice pDevice = (PSDevice)hDeviceContext; 2601 PSDevice pDevice = (PSDevice)hDeviceContext;
2640 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 2602 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
2641 PKnownBSS pCurr = NULL; 2603 PKnownBSS pCurr = NULL;
2642 UINT ii, uu; 2604 unsigned int ii, uu;
2643 PWLAN_IE_SUPP_RATES pItemRates = NULL; 2605 PWLAN_IE_SUPP_RATES pItemRates = NULL;
2644 PWLAN_IE_SUPP_RATES pItemExtRates = NULL; 2606 PWLAN_IE_SUPP_RATES pItemExtRates = NULL;
2645 PWLAN_IE_SSID pItemSSID; 2607 PWLAN_IE_SSID pItemSSID;
2646 UINT uRateLen = WLAN_RATES_MAXLEN; 2608 unsigned int uRateLen = WLAN_RATES_MAXLEN;
2647 WORD wMaxBasicRate = RATE_1M; 2609 WORD wMaxBasicRate = RATE_1M;
2648 WORD wMaxSuppRate = RATE_1M; 2610 WORD wMaxSuppRate = RATE_1M;
2649 WORD wSuppRate; 2611 WORD wSuppRate;
@@ -2743,9 +2705,10 @@ vMgrJoinBSSBegin(
2743 uRateLen); 2705 uRateLen);
2744 // Stuffing Rate IE 2706 // Stuffing Rate IE
2745 if ((pItemExtRates->len > 0) && (pItemRates->len < 8)) { 2707 if ((pItemExtRates->len > 0) && (pItemRates->len < 8)) {
2746 for (ii = 0; ii < (UINT)(8 - pItemRates->len); ) { 2708 for (ii = 0; ii < (unsigned int) (8 - pItemRates->len); ) {
2747 pItemRates->abyRates[pItemRates->len + ii] = pItemExtRates->abyRates[ii]; 2709 pItemRates->abyRates[pItemRates->len + ii] =
2748 ii ++; 2710 pItemExtRates->abyRates[ii];
2711 ii++;
2749 if (pItemExtRates->len <= ii) 2712 if (pItemExtRates->len <= ii)
2750 break; 2713 break;
2751 } 2714 }
@@ -2760,7 +2723,7 @@ vMgrJoinBSSBegin(
2760 } 2723 }
2761 } 2724 }
2762 2725
2763 RATEvParseMaxRate((PVOID)pDevice, pItemRates, pItemExtRates, TRUE, 2726 RATEvParseMaxRate((void *)pDevice, pItemRates, pItemExtRates, TRUE,
2764 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate, 2727 &wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
2765 &byTopCCKBasicRate, &byTopOFDMBasicRate); 2728 &byTopCCKBasicRate, &byTopOFDMBasicRate);
2766 vUpdateIFS(pDevice); 2729 vUpdateIFS(pDevice);
@@ -2781,12 +2744,17 @@ vMgrJoinBSSBegin(
2781 // Add current BSS to Candidate list 2744 // Add current BSS to Candidate list
2782 // This should only works for WPA2 BSS, and WPA2 BSS check must be done before. 2745 // This should only works for WPA2 BSS, and WPA2 BSS check must be done before.
2783 if (pMgmt->eAuthenMode == WMAC_AUTH_WPA2) { 2746 if (pMgmt->eAuthenMode == WMAC_AUTH_WPA2) {
2784 BOOL bResult = bAdd_PMKID_Candidate((HANDLE)pDevice, pMgmt->abyCurrBSSID, &pCurr->sRSNCapObj); 2747 BOOL bResult = bAdd_PMKID_Candidate((void *) pDevice,
2748 pMgmt->abyCurrBSSID,
2749 &pCurr->sRSNCapObj);
2785 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"bAdd_PMKID_Candidate: 1(%d)\n", bResult); 2750 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"bAdd_PMKID_Candidate: 1(%d)\n", bResult);
2786 if (bResult == FALSE) { 2751 if (bResult == FALSE) {
2787 vFlush_PMKID_Candidate((HANDLE)pDevice); 2752 vFlush_PMKID_Candidate((void *) pDevice);
2788 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"vFlush_PMKID_Candidate: 4\n"); 2753 DBG_PRT(MSG_LEVEL_DEBUG,
2789 bAdd_PMKID_Candidate((HANDLE)pDevice, pMgmt->abyCurrBSSID, &pCurr->sRSNCapObj); 2754 KERN_INFO "vFlush_PMKID_Candidate: 4\n");
2755 bAdd_PMKID_Candidate((void *) pDevice,
2756 pMgmt->abyCurrBSSID,
2757 &pCurr->sRSNCapObj);
2790 } 2758 }
2791 } 2759 }
2792 2760
@@ -2899,7 +2867,8 @@ vMgrJoinBSSBegin(
2899 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2867 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2900 WLAN_RATES_MAXLEN_11B); 2868 WLAN_RATES_MAXLEN_11B);
2901 // set basic rate 2869 // set basic rate
2902 RATEvParseMaxRate((PVOID)pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates, 2870 RATEvParseMaxRate((void *)pDevice,
2871 (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
2903 NULL, TRUE, &wMaxBasicRate, &wMaxSuppRate, &wSuppRate, 2872 NULL, TRUE, &wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
2904 &byTopCCKBasicRate, &byTopOFDMBasicRate); 2873 &byTopCCKBasicRate, &byTopOFDMBasicRate);
2905 vUpdateIFS(pDevice); 2874 vUpdateIFS(pDevice);
@@ -2938,7 +2907,7 @@ vMgrJoinBSSBegin(
2938 CARDvSetRSPINF(pDevice, (BYTE)pDevice->byBBType); 2907 CARDvSetRSPINF(pDevice, (BYTE)pDevice->byBBType);
2939 2908
2940 // Prepare beacon 2909 // Prepare beacon
2941 bMgrPrepareBeaconToSend((HANDLE)pDevice, pMgmt); 2910 bMgrPrepareBeaconToSend((void *) pDevice, pMgmt);
2942 } 2911 }
2943 else { 2912 else {
2944 pMgmt->eCurrState = WMAC_STATE_IDLE; 2913 pMgmt->eCurrState = WMAC_STATE_IDLE;
@@ -2960,12 +2929,12 @@ vMgrJoinBSSBegin(
2960 * 2929 *
2961-*/ 2930-*/
2962static 2931static
2963VOID 2932void
2964s_vMgrSynchBSS ( 2933s_vMgrSynchBSS (
2965 IN PSDevice pDevice, 2934 PSDevice pDevice,
2966 IN UINT uBSSMode, 2935 unsigned int uBSSMode,
2967 IN PKnownBSS pCurr, 2936 PKnownBSS pCurr,
2968 OUT PCMD_STATUS pStatus 2937 PCMD_STATUS pStatus
2969 ) 2938 )
2970{ 2939{
2971 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 2940 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
@@ -3004,7 +2973,7 @@ s_vMgrSynchBSS (
3004 pDevice->byPreambleType = 0; 2973 pDevice->byPreambleType = 0;
3005 pDevice->wBasicRate = 0; 2974 pDevice->wBasicRate = 0;
3006 // Set Basic Rate 2975 // Set Basic Rate
3007 CARDbAddBasicRate((PVOID)pDevice, RATE_1M); 2976 CARDbAddBasicRate((void *)pDevice, RATE_1M);
3008 2977
3009 // calculate TSF offset 2978 // calculate TSF offset
3010 // TSF Offset = Received Timestamp TSF - Marked Local's TSF 2979 // TSF Offset = Received Timestamp TSF - Marked Local's TSF
@@ -3122,13 +3091,13 @@ s_vMgrSynchBSS (
3122 3091
3123//mike add: fix NetworkManager 0.7.0 hidden ssid mode in WPA encryption 3092//mike add: fix NetworkManager 0.7.0 hidden ssid mode in WPA encryption
3124// ,need reset eAuthenMode and eEncryptionStatus 3093// ,need reset eAuthenMode and eEncryptionStatus
3125 static VOID Encyption_Rebuild( 3094 static void Encyption_Rebuild(
3126 IN PSDevice pDevice, 3095 PSDevice pDevice,
3127 IN PKnownBSS pCurr 3096 PKnownBSS pCurr
3128 ) 3097 )
3129 { 3098 {
3130 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 3099 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
3131 // UINT ii , uSameBssidNum=0; 3100 /* unsigned int ii, uSameBssidNum=0; */
3132 3101
3133 // for (ii = 0; ii < MAX_BSS_NUM; ii++) { 3102 // for (ii = 0; ii < MAX_BSS_NUM; ii++) {
3134 // if (pMgmt->sBSSList[ii].bActive && 3103 // if (pMgmt->sBSSList[ii].bActive &&
@@ -3174,20 +3143,20 @@ s_vMgrSynchBSS (
3174 * 3143 *
3175 * 3144 *
3176 * Return Value: 3145 * Return Value:
3177 * VOID 3146 * void
3178 * 3147 *
3179-*/ 3148-*/
3180 3149
3181static 3150static
3182VOID 3151void
3183s_vMgrFormatTIM( 3152s_vMgrFormatTIM(
3184 IN PSMgmtObject pMgmt, 3153 PSMgmtObject pMgmt,
3185 IN PWLAN_IE_TIM pTIM 3154 PWLAN_IE_TIM pTIM
3186 ) 3155 )
3187{ 3156{
3188 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80}; 3157 BYTE byMask[8] = {1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80};
3189 BYTE byMap; 3158 BYTE byMap;
3190 UINT ii, jj; 3159 unsigned int ii, jj;
3191 BOOL bStartFound = FALSE; 3160 BOOL bStartFound = FALSE;
3192 BOOL bMulticast = FALSE; 3161 BOOL bMulticast = FALSE;
3193 WORD wStartIndex = 0; 3162 WORD wStartIndex = 0;
@@ -3256,16 +3225,16 @@ s_vMgrFormatTIM(
3256static 3225static
3257PSTxMgmtPacket 3226PSTxMgmtPacket
3258s_MgrMakeBeacon( 3227s_MgrMakeBeacon(
3259 IN PSDevice pDevice, 3228 PSDevice pDevice,
3260 IN PSMgmtObject pMgmt, 3229 PSMgmtObject pMgmt,
3261 IN WORD wCurrCapInfo, 3230 WORD wCurrCapInfo,
3262 IN WORD wCurrBeaconPeriod, 3231 WORD wCurrBeaconPeriod,
3263 IN UINT uCurrChannel, 3232 unsigned int uCurrChannel,
3264 IN WORD wCurrATIMWinodw, 3233 WORD wCurrATIMWinodw,
3265 IN PWLAN_IE_SSID pCurrSSID, 3234 PWLAN_IE_SSID pCurrSSID,
3266 IN PBYTE pCurrBSSID, 3235 PBYTE pCurrBSSID,
3267 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 3236 PWLAN_IE_SUPP_RATES pCurrSuppRates,
3268 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 3237 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
3269 ) 3238 )
3270{ 3239{
3271 PSTxMgmtPacket pTxPacket = NULL; 3240 PSTxMgmtPacket pTxPacket = NULL;
@@ -3430,18 +3399,18 @@ s_MgrMakeBeacon(
3430 3399
3431PSTxMgmtPacket 3400PSTxMgmtPacket
3432s_MgrMakeProbeResponse( 3401s_MgrMakeProbeResponse(
3433 IN PSDevice pDevice, 3402 PSDevice pDevice,
3434 IN PSMgmtObject pMgmt, 3403 PSMgmtObject pMgmt,
3435 IN WORD wCurrCapInfo, 3404 WORD wCurrCapInfo,
3436 IN WORD wCurrBeaconPeriod, 3405 WORD wCurrBeaconPeriod,
3437 IN UINT uCurrChannel, 3406 unsigned int uCurrChannel,
3438 IN WORD wCurrATIMWinodw, 3407 WORD wCurrATIMWinodw,
3439 IN PBYTE pDstAddr, 3408 PBYTE pDstAddr,
3440 IN PWLAN_IE_SSID pCurrSSID, 3409 PWLAN_IE_SSID pCurrSSID,
3441 IN PBYTE pCurrBSSID, 3410 PBYTE pCurrBSSID,
3442 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 3411 PWLAN_IE_SUPP_RATES pCurrSuppRates,
3443 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates, 3412 PWLAN_IE_SUPP_RATES pCurrExtSuppRates,
3444 IN BYTE byPHYType 3413 BYTE byPHYType
3445 ) 3414 )
3446{ 3415{
3447 PSTxMgmtPacket pTxPacket = NULL; 3416 PSTxMgmtPacket pTxPacket = NULL;
@@ -3562,14 +3531,14 @@ s_MgrMakeProbeResponse(
3562 3531
3563PSTxMgmtPacket 3532PSTxMgmtPacket
3564s_MgrMakeAssocRequest( 3533s_MgrMakeAssocRequest(
3565 IN PSDevice pDevice, 3534 PSDevice pDevice,
3566 IN PSMgmtObject pMgmt, 3535 PSMgmtObject pMgmt,
3567 IN PBYTE pDAddr, 3536 PBYTE pDAddr,
3568 IN WORD wCurrCapInfo, 3537 WORD wCurrCapInfo,
3569 IN WORD wListenInterval, 3538 WORD wListenInterval,
3570 IN PWLAN_IE_SSID pCurrSSID, 3539 PWLAN_IE_SSID pCurrSSID,
3571 IN PWLAN_IE_SUPP_RATES pCurrRates, 3540 PWLAN_IE_SUPP_RATES pCurrRates,
3572 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 3541 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
3573 ) 3542 )
3574{ 3543{
3575 PSTxMgmtPacket pTxPacket = NULL; 3544 PSTxMgmtPacket pTxPacket = NULL;
@@ -3704,7 +3673,7 @@ s_MgrMakeAssocRequest(
3704 } else if (((pMgmt->eAuthenMode == WMAC_AUTH_WPA2) || 3673 } else if (((pMgmt->eAuthenMode == WMAC_AUTH_WPA2) ||
3705 (pMgmt->eAuthenMode == WMAC_AUTH_WPA2PSK)) && 3674 (pMgmt->eAuthenMode == WMAC_AUTH_WPA2PSK)) &&
3706 (pMgmt->pCurrBSS != NULL)) { 3675 (pMgmt->pCurrBSS != NULL)) {
3707 UINT ii; 3676 unsigned int ii;
3708 PWORD pwPMKID; 3677 PWORD pwPMKID;
3709 3678
3710 // WPA IE 3679 // WPA IE
@@ -3773,13 +3742,17 @@ s_MgrMakeAssocRequest(
3773 pwPMKID = (PWORD)pbyRSN; // Point to PMKID count 3742 pwPMKID = (PWORD)pbyRSN; // Point to PMKID count
3774 *pwPMKID = 0; // Initialize PMKID count 3743 *pwPMKID = 0; // Initialize PMKID count
3775 pbyRSN += 2; // Point to PMKID list 3744 pbyRSN += 2; // Point to PMKID list
3776 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) { 3745 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) {
3777 if ( !memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0], pMgmt->abyCurrBSSID, U_ETHER_ADDR_LEN)) { 3746 if (!memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0],
3778 (*pwPMKID) ++; 3747 pMgmt->abyCurrBSSID,
3779 memcpy(pbyRSN, pDevice->gsPMKID.BSSIDInfo[ii].PMKID, 16); 3748 ETH_ALEN)) {
3780 pbyRSN += 16; 3749 (*pwPMKID)++;
3781 } 3750 memcpy(pbyRSN,
3782 } 3751 pDevice->gsPMKID.BSSIDInfo[ii].PMKID,
3752 16);
3753 pbyRSN += 16;
3754 }
3755 }
3783 if (*pwPMKID != 0) { 3756 if (*pwPMKID != 0) {
3784 sFrame.pRSN->len += (2 + (*pwPMKID)*16); 3757 sFrame.pRSN->len += (2 + (*pwPMKID)*16);
3785 } 3758 }
@@ -3820,14 +3793,14 @@ s_MgrMakeAssocRequest(
3820 3793
3821PSTxMgmtPacket 3794PSTxMgmtPacket
3822s_MgrMakeReAssocRequest( 3795s_MgrMakeReAssocRequest(
3823 IN PSDevice pDevice, 3796 PSDevice pDevice,
3824 IN PSMgmtObject pMgmt, 3797 PSMgmtObject pMgmt,
3825 IN PBYTE pDAddr, 3798 PBYTE pDAddr,
3826 IN WORD wCurrCapInfo, 3799 WORD wCurrCapInfo,
3827 IN WORD wListenInterval, 3800 WORD wListenInterval,
3828 IN PWLAN_IE_SSID pCurrSSID, 3801 PWLAN_IE_SSID pCurrSSID,
3829 IN PWLAN_IE_SUPP_RATES pCurrRates, 3802 PWLAN_IE_SUPP_RATES pCurrRates,
3830 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 3803 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
3831 ) 3804 )
3832{ 3805{
3833 PSTxMgmtPacket pTxPacket = NULL; 3806 PSTxMgmtPacket pTxPacket = NULL;
@@ -3960,7 +3933,7 @@ s_MgrMakeReAssocRequest(
3960 } else if (((pMgmt->eAuthenMode == WMAC_AUTH_WPA2) || 3933 } else if (((pMgmt->eAuthenMode == WMAC_AUTH_WPA2) ||
3961 (pMgmt->eAuthenMode == WMAC_AUTH_WPA2PSK)) && 3934 (pMgmt->eAuthenMode == WMAC_AUTH_WPA2PSK)) &&
3962 (pMgmt->pCurrBSS != NULL)) { 3935 (pMgmt->pCurrBSS != NULL)) {
3963 UINT ii; 3936 unsigned int ii;
3964 PWORD pwPMKID; 3937 PWORD pwPMKID;
3965 3938
3966 /* WPA IE */ 3939 /* WPA IE */
@@ -4030,10 +4003,14 @@ s_MgrMakeReAssocRequest(
4030 *pwPMKID = 0; // Initialize PMKID count 4003 *pwPMKID = 0; // Initialize PMKID count
4031 pbyRSN += 2; // Point to PMKID list 4004 pbyRSN += 2; // Point to PMKID list
4032 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) { 4005 for (ii = 0; ii < pDevice->gsPMKID.BSSIDInfoCount; ii++) {
4033 if ( !memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0], pMgmt->abyCurrBSSID, U_ETHER_ADDR_LEN)) { 4006 if (!memcmp(&pDevice->gsPMKID.BSSIDInfo[ii].BSSID[0],
4034 (*pwPMKID) ++; 4007 pMgmt->abyCurrBSSID,
4035 memcpy(pbyRSN, pDevice->gsPMKID.BSSIDInfo[ii].PMKID, 16); 4008 ETH_ALEN)) {
4036 pbyRSN += 16; 4009 (*pwPMKID)++;
4010 memcpy(pbyRSN,
4011 pDevice->gsPMKID.BSSIDInfo[ii].PMKID,
4012 16);
4013 pbyRSN += 16;
4037 } 4014 }
4038 } 4015 }
4039 if (*pwPMKID != 0) { 4016 if (*pwPMKID != 0) {
@@ -4057,8 +4034,6 @@ s_MgrMakeReAssocRequest(
4057 return pTxPacket; 4034 return pTxPacket;
4058} 4035}
4059 4036
4060
4061
4062/*+ 4037/*+
4063 * 4038 *
4064 * Routine Description: 4039 * Routine Description:
@@ -4070,17 +4045,16 @@ s_MgrMakeReAssocRequest(
4070 * 4045 *
4071-*/ 4046-*/
4072 4047
4073
4074PSTxMgmtPacket 4048PSTxMgmtPacket
4075s_MgrMakeAssocResponse( 4049s_MgrMakeAssocResponse(
4076 IN PSDevice pDevice, 4050 PSDevice pDevice,
4077 IN PSMgmtObject pMgmt, 4051 PSMgmtObject pMgmt,
4078 IN WORD wCurrCapInfo, 4052 WORD wCurrCapInfo,
4079 IN WORD wAssocStatus, 4053 WORD wAssocStatus,
4080 IN WORD wAssocAID, 4054 WORD wAssocAID,
4081 IN PBYTE pDstAddr, 4055 PBYTE pDstAddr,
4082 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 4056 PWLAN_IE_SUPP_RATES pCurrSuppRates,
4083 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 4057 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
4084 ) 4058 )
4085{ 4059{
4086 PSTxMgmtPacket pTxPacket = NULL; 4060 PSTxMgmtPacket pTxPacket = NULL;
@@ -4147,14 +4121,14 @@ s_MgrMakeAssocResponse(
4147 4121
4148PSTxMgmtPacket 4122PSTxMgmtPacket
4149s_MgrMakeReAssocResponse( 4123s_MgrMakeReAssocResponse(
4150 IN PSDevice pDevice, 4124 PSDevice pDevice,
4151 IN PSMgmtObject pMgmt, 4125 PSMgmtObject pMgmt,
4152 IN WORD wCurrCapInfo, 4126 WORD wCurrCapInfo,
4153 IN WORD wAssocStatus, 4127 WORD wAssocStatus,
4154 IN WORD wAssocAID, 4128 WORD wAssocAID,
4155 IN PBYTE pDstAddr, 4129 PBYTE pDstAddr,
4156 IN PWLAN_IE_SUPP_RATES pCurrSuppRates, 4130 PWLAN_IE_SUPP_RATES pCurrSuppRates,
4157 IN PWLAN_IE_SUPP_RATES pCurrExtSuppRates 4131 PWLAN_IE_SUPP_RATES pCurrExtSuppRates
4158 ) 4132 )
4159{ 4133{
4160 PSTxMgmtPacket pTxPacket = NULL; 4134 PSTxMgmtPacket pTxPacket = NULL;
@@ -4219,11 +4193,11 @@ s_MgrMakeReAssocResponse(
4219-*/ 4193-*/
4220 4194
4221static 4195static
4222VOID 4196void
4223s_vMgrRxProbeResponse( 4197s_vMgrRxProbeResponse(
4224 IN PSDevice pDevice, 4198 PSDevice pDevice,
4225 IN PSMgmtObject pMgmt, 4199 PSMgmtObject pMgmt,
4226 IN PSRxMgmtPacket pRxPacket 4200 PSRxMgmtPacket pRxPacket
4227 ) 4201 )
4228{ 4202{
4229 PKnownBSS pBSSList = NULL; 4203 PKnownBSS pBSSList = NULL;
@@ -4239,14 +4213,16 @@ s_vMgrRxProbeResponse(
4239 sFrame.pBuf = (PBYTE)pRxPacket->p80211Header; 4213 sFrame.pBuf = (PBYTE)pRxPacket->p80211Header;
4240 vMgrDecodeProbeResponse(&sFrame); 4214 vMgrDecodeProbeResponse(&sFrame);
4241 4215
4242 if ((sFrame.pqwTimestamp == 0) || 4216 if ((sFrame.pqwTimestamp == NULL)
4243 (sFrame.pwBeaconInterval == 0) || 4217 || (sFrame.pwBeaconInterval == NULL)
4244 (sFrame.pwCapInfo == 0) || 4218 || (sFrame.pwCapInfo == NULL)
4245 (sFrame.pSSID == 0) || 4219 || (sFrame.pSSID == NULL)
4246 (sFrame.pSuppRates == 0)) { 4220 || (sFrame.pSuppRates == NULL)) {
4247 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Probe resp:Fail addr:[%p] \n", pRxPacket->p80211Header); 4221
4248 DBG_PORT80(0xCC); 4222 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Probe resp:Fail addr:[%p]\n",
4249 return; 4223 pRxPacket->p80211Header);
4224 DBG_PORT80(0xCC);
4225 return;
4250 }; 4226 };
4251 4227
4252 if(sFrame.pSSID->len == 0) 4228 if(sFrame.pSSID->len == 0)
@@ -4256,22 +4232,23 @@ s_vMgrRxProbeResponse(
4256 //{{ RobertYu:20050201, 11a byCurrChannel != sFrame.pDSParms->byCurrChannel mapping 4232 //{{ RobertYu:20050201, 11a byCurrChannel != sFrame.pDSParms->byCurrChannel mapping
4257 if( byCurrChannel > CB_MAX_CHANNEL_24G ) 4233 if( byCurrChannel > CB_MAX_CHANNEL_24G )
4258 { 4234 {
4259 if (sFrame.pDSParms != 0) { 4235 if (sFrame.pDSParms) {
4260 if (byCurrChannel == RFaby11aChannelIndex[sFrame.pDSParms->byCurrChannel-1]) 4236 if (byCurrChannel ==
4261 bChannelHit = TRUE; 4237 RFaby11aChannelIndex[sFrame.pDSParms->byCurrChannel-1])
4262 byCurrChannel = RFaby11aChannelIndex[sFrame.pDSParms->byCurrChannel-1]; 4238 bChannelHit = TRUE;
4239 byCurrChannel =
4240 RFaby11aChannelIndex[sFrame.pDSParms->byCurrChannel-1];
4263 } else { 4241 } else {
4264 bChannelHit = TRUE; 4242 bChannelHit = TRUE;
4265 } 4243 }
4266
4267 } else { 4244 } else {
4268 if (sFrame.pDSParms != 0) { 4245 if (sFrame.pDSParms) {
4269 if (byCurrChannel == sFrame.pDSParms->byCurrChannel) 4246 if (byCurrChannel == sFrame.pDSParms->byCurrChannel)
4270 bChannelHit = TRUE; 4247 bChannelHit = TRUE;
4271 byCurrChannel = sFrame.pDSParms->byCurrChannel; 4248 byCurrChannel = sFrame.pDSParms->byCurrChannel;
4272 } else { 4249 } else {
4273 bChannelHit = TRUE; 4250 bChannelHit = TRUE;
4274 } 4251 }
4275 } 4252 }
4276 //RobertYu:20050201 4253 //RobertYu:20050201
4277 4254
@@ -4279,7 +4256,7 @@ s_vMgrRxProbeResponse(
4279if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE) 4256if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4280 return; 4257 return;
4281 4258
4282 if (sFrame.pERP != NULL) { 4259 if (sFrame.pERP) {
4283 sERP.byERP = sFrame.pERP->byContext; 4260 sERP.byERP = sFrame.pERP->byContext;
4284 sERP.bERPExist = TRUE; 4261 sERP.bERPExist = TRUE;
4285 } else { 4262 } else {
@@ -4289,31 +4266,32 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4289 4266
4290 4267
4291 // update or insert the bss 4268 // update or insert the bss
4292 pBSSList = BSSpAddrIsInBSSList((HANDLE)pDevice, sFrame.pHdr->sA3.abyAddr3, sFrame.pSSID); 4269 pBSSList = BSSpAddrIsInBSSList((void *) pDevice,
4270 sFrame.pHdr->sA3.abyAddr3,
4271 sFrame.pSSID);
4293 if (pBSSList) { 4272 if (pBSSList) {
4294 BSSbUpdateToBSSList((HANDLE)pDevice, 4273 BSSbUpdateToBSSList((void *) pDevice,
4295 *sFrame.pqwTimestamp, 4274 *sFrame.pqwTimestamp,
4296 *sFrame.pwBeaconInterval, 4275 *sFrame.pwBeaconInterval,
4297 *sFrame.pwCapInfo, 4276 *sFrame.pwCapInfo,
4298 byCurrChannel, 4277 byCurrChannel,
4299 bChannelHit, 4278 bChannelHit,
4300 sFrame.pSSID, 4279 sFrame.pSSID,
4301 sFrame.pSuppRates, 4280 sFrame.pSuppRates,
4302 sFrame.pExtSuppRates, 4281 sFrame.pExtSuppRates,
4303 &sERP, 4282 &sERP,
4304 sFrame.pRSN, 4283 sFrame.pRSN,
4305 sFrame.pRSNWPA, 4284 sFrame.pRSNWPA,
4306 sFrame.pIE_Country, 4285 sFrame.pIE_Country,
4307 sFrame.pIE_Quiet, 4286 sFrame.pIE_Quiet,
4308 pBSSList, 4287 pBSSList,
4309 sFrame.len - WLAN_HDR_ADDR3_LEN, 4288 sFrame.len - WLAN_HDR_ADDR3_LEN,
4310 sFrame.pHdr->sA4.abyAddr4, // payload of probresponse 4289 /* payload of probresponse */
4311 (HANDLE)pRxPacket 4290 sFrame.pHdr->sA4.abyAddr4,
4312 ); 4291 (void *) pRxPacket);
4313 } 4292 } else {
4314 else {
4315 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Probe resp/insert: RxChannel = : %d\n", byCurrChannel); 4293 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Probe resp/insert: RxChannel = : %d\n", byCurrChannel);
4316 BSSbInsertToBSSList((HANDLE)pDevice, 4294 BSSbInsertToBSSList((void *) pDevice,
4317 sFrame.pHdr->sA3.abyAddr3, 4295 sFrame.pHdr->sA3.abyAddr3,
4318 *sFrame.pqwTimestamp, 4296 *sFrame.pqwTimestamp,
4319 *sFrame.pwBeaconInterval, 4297 *sFrame.pwBeaconInterval,
@@ -4328,9 +4306,8 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4328 sFrame.pIE_Country, 4306 sFrame.pIE_Country,
4329 sFrame.pIE_Quiet, 4307 sFrame.pIE_Quiet,
4330 sFrame.len - WLAN_HDR_ADDR3_LEN, 4308 sFrame.len - WLAN_HDR_ADDR3_LEN,
4331 sFrame.pHdr->sA4.abyAddr4, // payload of beacon 4309 sFrame.pHdr->sA4.abyAddr4, /* payload of beacon */
4332 (HANDLE)pRxPacket 4310 (void *) pRxPacket);
4333 );
4334 } 4311 }
4335 return; 4312 return;
4336 4313
@@ -4349,11 +4326,11 @@ if(ChannelExceedZoneType(pDevice,byCurrChannel)==TRUE)
4349 4326
4350 4327
4351static 4328static
4352VOID 4329void
4353s_vMgrRxProbeRequest( 4330s_vMgrRxProbeRequest(
4354 IN PSDevice pDevice, 4331 PSDevice pDevice,
4355 IN PSMgmtObject pMgmt, 4332 PSMgmtObject pMgmt,
4356 IN PSRxMgmtPacket pRxPacket 4333 PSRxMgmtPacket pRxPacket
4357 ) 4334 )
4358{ 4335{
4359 WLAN_FR_PROBEREQ sFrame; 4336 WLAN_FR_PROBEREQ sFrame;
@@ -4426,10 +4403,6 @@ s_vMgrRxProbeRequest(
4426 return; 4403 return;
4427} 4404}
4428 4405
4429
4430
4431
4432
4433/*+ 4406/*+
4434 * 4407 *
4435 * Routine Description: 4408 * Routine Description:
@@ -4444,17 +4417,13 @@ s_vMgrRxProbeRequest(
4444 * 4417 *
4445-*/ 4418-*/
4446 4419
4447 4420void vMgrRxManagePacket(void *hDeviceContext,
4448VOID 4421 PSMgmtObject pMgmt,
4449vMgrRxManagePacket( 4422 PSRxMgmtPacket pRxPacket)
4450 IN HANDLE hDeviceContext,
4451 IN PSMgmtObject pMgmt,
4452 IN PSRxMgmtPacket pRxPacket
4453 )
4454{ 4423{
4455 PSDevice pDevice = (PSDevice)hDeviceContext; 4424 PSDevice pDevice = (PSDevice)hDeviceContext;
4456 BOOL bInScan = FALSE; 4425 BOOL bInScan = FALSE;
4457 UINT uNodeIndex = 0; 4426 unsigned int uNodeIndex = 0;
4458 NODE_STATE eNodeState = 0; 4427 NODE_STATE eNodeState = 0;
4459 CMD_STATUS Status; 4428 CMD_STATUS Status;
4460 4429
@@ -4583,9 +4552,6 @@ vMgrRxManagePacket(
4583 return; 4552 return;
4584} 4553}
4585 4554
4586
4587
4588
4589/*+ 4555/*+
4590 * 4556 *
4591 * Routine Description: 4557 * Routine Description:
@@ -4597,11 +4563,7 @@ vMgrRxManagePacket(
4597 * TRUE if success; FALSE if failed. 4563 * TRUE if success; FALSE if failed.
4598 * 4564 *
4599-*/ 4565-*/
4600BOOL 4566BOOL bMgrPrepareBeaconToSend(void *hDeviceContext, PSMgmtObject pMgmt)
4601bMgrPrepareBeaconToSend(
4602 IN HANDLE hDeviceContext,
4603 IN PSMgmtObject pMgmt
4604 )
4605{ 4567{
4606 PSDevice pDevice = (PSDevice)hDeviceContext; 4568 PSDevice pDevice = (PSDevice)hDeviceContext;
4607 PSTxMgmtPacket pTxPacket; 4569 PSTxMgmtPacket pTxPacket;
@@ -4653,10 +4615,10 @@ bMgrPrepareBeaconToSend(
4653 * 4615 *
4654-*/ 4616-*/
4655static 4617static
4656VOID 4618void
4657s_vMgrLogStatus( 4619s_vMgrLogStatus(
4658 IN PSMgmtObject pMgmt, 4620 PSMgmtObject pMgmt,
4659 IN WORD wStatus 4621 WORD wStatus
4660 ) 4622 )
4661{ 4623{
4662 switch( wStatus ){ 4624 switch( wStatus ){
@@ -4705,7 +4667,6 @@ s_vMgrLogStatus(
4705 } 4667 }
4706} 4668}
4707 4669
4708
4709/* 4670/*
4710 * 4671 *
4711 * Description: 4672 * Description:
@@ -4722,16 +4683,14 @@ s_vMgrLogStatus(
4722 * Return Value: none. 4683 * Return Value: none.
4723 * 4684 *
4724-*/ 4685-*/
4725BOOL 4686
4726bAdd_PMKID_Candidate ( 4687BOOL bAdd_PMKID_Candidate(void *hDeviceContext,
4727 IN HANDLE hDeviceContext, 4688 PBYTE pbyBSSID,
4728 IN PBYTE pbyBSSID, 4689 PSRSNCapObject psRSNCapObj)
4729 IN PSRSNCapObject psRSNCapObj
4730 )
4731{ 4690{
4732 PSDevice pDevice = (PSDevice)hDeviceContext; 4691 PSDevice pDevice = (PSDevice)hDeviceContext;
4733 PPMKID_CANDIDATE pCandidateList; 4692 PPMKID_CANDIDATE pCandidateList;
4734 UINT ii = 0; 4693 unsigned int ii = 0;
4735 4694
4736 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"bAdd_PMKID_Candidate START: (%d)\n", (int)pDevice->gsPMKIDCandidate.NumCandidates); 4695 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"bAdd_PMKID_Candidate START: (%d)\n", (int)pDevice->gsPMKIDCandidate.NumCandidates);
4737 4696
@@ -4745,13 +4704,16 @@ bAdd_PMKID_Candidate (
4745 4704
4746 // Update Old Candidate 4705 // Update Old Candidate
4747 for (ii = 0; ii < pDevice->gsPMKIDCandidate.NumCandidates; ii++) { 4706 for (ii = 0; ii < pDevice->gsPMKIDCandidate.NumCandidates; ii++) {
4748 pCandidateList = &pDevice->gsPMKIDCandidate.CandidateList[ii]; 4707 pCandidateList = &pDevice->gsPMKIDCandidate.CandidateList[ii];
4749 if ( !memcmp(pCandidateList->BSSID, pbyBSSID, U_ETHER_ADDR_LEN)) { 4708 if (!memcmp(pCandidateList->BSSID, pbyBSSID, ETH_ALEN)) {
4750 if ((psRSNCapObj->bRSNCapExist == TRUE) && (psRSNCapObj->wRSNCap & BIT0)) { 4709 if ((psRSNCapObj->bRSNCapExist == TRUE)
4751 pCandidateList->Flags |= NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED; 4710 && (psRSNCapObj->wRSNCap & BIT0)) {
4752 } else { 4711 pCandidateList->Flags |=
4753 pCandidateList->Flags &= ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED); 4712 NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED;
4754 } 4713 } else {
4714 pCandidateList->Flags &=
4715 ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED);
4716 }
4755 return TRUE; 4717 return TRUE;
4756 } 4718 }
4757 } 4719 }
@@ -4763,7 +4725,7 @@ bAdd_PMKID_Candidate (
4763 } else { 4725 } else {
4764 pCandidateList->Flags &= ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED); 4726 pCandidateList->Flags &= ~(NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED);
4765 } 4727 }
4766 memcpy(pCandidateList->BSSID, pbyBSSID, U_ETHER_ADDR_LEN); 4728 memcpy(pCandidateList->BSSID, pbyBSSID, ETH_ALEN);
4767 pDevice->gsPMKIDCandidate.NumCandidates++; 4729 pDevice->gsPMKIDCandidate.NumCandidates++;
4768 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"NumCandidates:%d\n", (int)pDevice->gsPMKIDCandidate.NumCandidates); 4730 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"NumCandidates:%d\n", (int)pDevice->gsPMKIDCandidate.NumCandidates);
4769 return TRUE; 4731 return TRUE;
@@ -4783,10 +4745,8 @@ bAdd_PMKID_Candidate (
4783 * Return Value: none. 4745 * Return Value: none.
4784 * 4746 *
4785-*/ 4747-*/
4786VOID 4748
4787vFlush_PMKID_Candidate ( 4749void vFlush_PMKID_Candidate(void *hDeviceContext)
4788 IN HANDLE hDeviceContext
4789 )
4790{ 4750{
4791 PSDevice pDevice = (PSDevice)hDeviceContext; 4751 PSDevice pDevice = (PSDevice)hDeviceContext;
4792 4752
@@ -4798,10 +4758,10 @@ vFlush_PMKID_Candidate (
4798 4758
4799static BOOL 4759static BOOL
4800s_bCipherMatch ( 4760s_bCipherMatch (
4801 IN PKnownBSS pBSSNode, 4761 PKnownBSS pBSSNode,
4802 IN NDIS_802_11_ENCRYPTION_STATUS EncStatus, 4762 NDIS_802_11_ENCRYPTION_STATUS EncStatus,
4803 OUT PBYTE pbyCCSPK, 4763 PBYTE pbyCCSPK,
4804 OUT PBYTE pbyCCSGK 4764 PBYTE pbyCCSGK
4805 ) 4765 )
4806{ 4766{
4807 BYTE byMulticastCipher = KEY_CTL_INVALID; 4767 BYTE byMulticastCipher = KEY_CTL_INVALID;
diff --git a/drivers/staging/vt6656/wmgr.h b/drivers/staging/vt6656/wmgr.h
index c682a7fcbefa..1e5b916aea1d 100644
--- a/drivers/staging/vt6656/wmgr.h
+++ b/drivers/staging/vt6656/wmgr.h
@@ -84,37 +84,37 @@
84//mike define: make timer to expire after desired times 84//mike define: make timer to expire after desired times
85#define timer_expire(timer,next_tick) mod_timer(&timer, RUN_AT(next_tick)) 85#define timer_expire(timer,next_tick) mod_timer(&timer, RUN_AT(next_tick))
86 86
87typedef void (*TimerFunction)(ULONG); 87typedef void (*TimerFunction)(unsigned long);
88 88
89 89
90//+++ NDIS related 90//+++ NDIS related
91 91
92typedef UCHAR NDIS_802_11_MAC_ADDRESS[6]; 92typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN];
93typedef struct _NDIS_802_11_AI_REQFI 93typedef struct _NDIS_802_11_AI_REQFI
94{ 94{
95 USHORT Capabilities; 95 unsigned short Capabilities;
96 USHORT ListenInterval; 96 unsigned short ListenInterval;
97 NDIS_802_11_MAC_ADDRESS CurrentAPAddress; 97 NDIS_802_11_MAC_ADDRESS CurrentAPAddress;
98} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; 98} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI;
99 99
100typedef struct _NDIS_802_11_AI_RESFI 100typedef struct _NDIS_802_11_AI_RESFI
101{ 101{
102 USHORT Capabilities; 102 unsigned short Capabilities;
103 USHORT StatusCode; 103 unsigned short StatusCode;
104 USHORT AssociationId; 104 unsigned short AssociationId;
105} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; 105} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI;
106 106
107typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION 107typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION
108{ 108{
109 ULONG Length; 109 unsigned long Length;
110 USHORT AvailableRequestFixedIEs; 110 unsigned short AvailableRequestFixedIEs;
111 NDIS_802_11_AI_REQFI RequestFixedIEs; 111 NDIS_802_11_AI_REQFI RequestFixedIEs;
112 ULONG RequestIELength; 112 unsigned long RequestIELength;
113 ULONG OffsetRequestIEs; 113 unsigned long OffsetRequestIEs;
114 USHORT AvailableResponseFixedIEs; 114 unsigned short AvailableResponseFixedIEs;
115 NDIS_802_11_AI_RESFI ResponseFixedIEs; 115 NDIS_802_11_AI_RESFI ResponseFixedIEs;
116 ULONG ResponseIELength; 116 unsigned long ResponseIELength;
117 ULONG OffsetResponseIEs; 117 unsigned long OffsetResponseIEs;
118} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; 118} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION;
119 119
120 120
@@ -123,7 +123,7 @@ typedef struct tagSAssocInfo {
123 NDIS_802_11_ASSOCIATION_INFORMATION AssocInfo; 123 NDIS_802_11_ASSOCIATION_INFORMATION AssocInfo;
124 BYTE abyIEs[WLAN_BEACON_FR_MAXLEN+WLAN_BEACON_FR_MAXLEN]; 124 BYTE abyIEs[WLAN_BEACON_FR_MAXLEN+WLAN_BEACON_FR_MAXLEN];
125 // store ReqIEs set by OID_802_11_ASSOCIATION_INFORMATION 125 // store ReqIEs set by OID_802_11_ASSOCIATION_INFORMATION
126 ULONG RequestIELength; 126 unsigned long RequestIELength;
127 BYTE abyReqIEs[WLAN_BEACON_FR_MAXLEN]; 127 BYTE abyReqIEs[WLAN_BEACON_FR_MAXLEN];
128} SAssocInfo, *PSAssocInfo; 128} SAssocInfo, *PSAssocInfo;
129//--- 129//---
@@ -222,8 +222,8 @@ typedef enum tagWMAC_POWER_MODE {
222typedef struct tagSTxMgmtPacket { 222typedef struct tagSTxMgmtPacket {
223 223
224 PUWLAN_80211HDR p80211Header; 224 PUWLAN_80211HDR p80211Header;
225 UINT cbMPDULen; 225 unsigned int cbMPDULen;
226 UINT cbPayloadLen; 226 unsigned int cbPayloadLen;
227 227
228} STxMgmtPacket, *PSTxMgmtPacket; 228} STxMgmtPacket, *PSTxMgmtPacket;
229 229
@@ -233,9 +233,9 @@ typedef struct tagSRxMgmtPacket {
233 233
234 PUWLAN_80211HDR p80211Header; 234 PUWLAN_80211HDR p80211Header;
235 QWORD qwLocalTSF; 235 QWORD qwLocalTSF;
236 UINT cbMPDULen; 236 unsigned int cbMPDULen;
237 UINT cbPayloadLen; 237 unsigned int cbPayloadLen;
238 UINT uRSSI; 238 unsigned int uRSSI;
239 BYTE bySQ; 239 BYTE bySQ;
240 BYTE byRxRate; 240 BYTE byRxRate;
241 BYTE byRxChannel; 241 BYTE byRxChannel;
@@ -246,8 +246,7 @@ typedef struct tagSRxMgmtPacket {
246 246
247typedef struct tagSMgmtObject 247typedef struct tagSMgmtObject
248{ 248{
249 249 void *pAdapter;
250 PVOID pAdapter;
251 // MAC address 250 // MAC address
252 BYTE abyMACAddr[WLAN_ADDR_LEN]; 251 BYTE abyMACAddr[WLAN_ADDR_LEN];
253 252
@@ -273,21 +272,21 @@ typedef struct tagSMgmtObject
273 BOOL bCurrBSSIDFilterOn; 272 BOOL bCurrBSSIDFilterOn;
274 273
275 // Current state vars 274 // Current state vars
276 UINT uCurrChannel; 275 unsigned int uCurrChannel;
277 BYTE abyCurrSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 276 BYTE abyCurrSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
278 BYTE abyCurrExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 277 BYTE abyCurrExtSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
279 BYTE abyCurrSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 278 BYTE abyCurrSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
280 BYTE abyCurrBSSID[WLAN_BSSID_LEN]; 279 BYTE abyCurrBSSID[WLAN_BSSID_LEN];
281 WORD wCurrCapInfo; 280 WORD wCurrCapInfo;
282 WORD wCurrAID; 281 WORD wCurrAID;
283 UINT uRSSITrigger; 282 unsigned int uRSSITrigger;
284 WORD wCurrATIMWindow; 283 WORD wCurrATIMWindow;
285 WORD wCurrBeaconPeriod; 284 WORD wCurrBeaconPeriod;
286 BOOL bIsDS; 285 BOOL bIsDS;
287 BYTE byERPContext; 286 BYTE byERPContext;
288 287
289 CMD_STATE eCommandState; 288 CMD_STATE eCommandState;
290 UINT uScanChannel; 289 unsigned int uScanChannel;
291 290
292 // Desire joinning BSS vars 291 // Desire joinning BSS vars
293 BYTE abyDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 292 BYTE abyDesireSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
@@ -302,22 +301,22 @@ typedef struct tagSMgmtObject
302 // Adhoc or AP configuration vars 301 // Adhoc or AP configuration vars
303 WORD wIBSSBeaconPeriod; 302 WORD wIBSSBeaconPeriod;
304 WORD wIBSSATIMWindow; 303 WORD wIBSSATIMWindow;
305 UINT uIBSSChannel; 304 unsigned int uIBSSChannel;
306 BYTE abyIBSSSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1]; 305 BYTE abyIBSSSuppRates[WLAN_IEHDR_LEN + WLAN_RATES_MAXLEN + 1];
307 BYTE byAPBBType; 306 BYTE byAPBBType;
308 BYTE abyWPAIE[MAX_WPA_IE_LEN]; 307 BYTE abyWPAIE[MAX_WPA_IE_LEN];
309 WORD wWPAIELen; 308 WORD wWPAIELen;
310 309
311 UINT uAssocCount; 310 unsigned int uAssocCount;
312 BOOL bMoreData; 311 BOOL bMoreData;
313 312
314 // Scan state vars 313 // Scan state vars
315 WMAC_SCAN_STATE eScanState; 314 WMAC_SCAN_STATE eScanState;
316 WMAC_SCAN_TYPE eScanType; 315 WMAC_SCAN_TYPE eScanType;
317 UINT uScanStartCh; 316 unsigned int uScanStartCh;
318 UINT uScanEndCh; 317 unsigned int uScanEndCh;
319 WORD wScanSteps; 318 WORD wScanSteps;
320 UINT uScanBSSType; 319 unsigned int uScanBSSType;
321 // Desire scannig vars 320 // Desire scannig vars
322 BYTE abyScanSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1]; 321 BYTE abyScanSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
323 BYTE abyScanBSSID[WLAN_BSSID_LEN]; 322 BYTE abyScanBSSID[WLAN_BSSID_LEN];
@@ -345,8 +344,8 @@ typedef struct tagSMgmtObject
345 BYTE abyPSTxMap[MAX_NODE_NUM + 1]; 344 BYTE abyPSTxMap[MAX_NODE_NUM + 1];
346 345
347 // managment command related 346 // managment command related
348 UINT uCmdBusy; 347 unsigned int uCmdBusy;
349 UINT uCmdHostAPBusy; 348 unsigned int uCmdHostAPBusy;
350 349
351 // managment packet pool 350 // managment packet pool
352 PBYTE pbyMgmtPacketPool; 351 PBYTE pbyMgmtPacketPool;
@@ -390,7 +389,7 @@ typedef struct tagSMgmtObject
390 BOOL bSwitchChannel; 389 BOOL bSwitchChannel;
391 BYTE byNewChannel; 390 BYTE byNewChannel;
392 PWLAN_IE_MEASURE_REP pCurrMeasureEIDRep; 391 PWLAN_IE_MEASURE_REP pCurrMeasureEIDRep;
393 UINT uLengthOfRepEIDs; 392 unsigned int uLengthOfRepEIDs;
394 BYTE abyCurrentMSRReq[sizeof(STxMgmtPacket) + WLAN_A3FR_MAXLEN]; 393 BYTE abyCurrentMSRReq[sizeof(STxMgmtPacket) + WLAN_A3FR_MAXLEN];
395 BYTE abyCurrentMSRRep[sizeof(STxMgmtPacket) + WLAN_A3FR_MAXLEN]; 394 BYTE abyCurrentMSRRep[sizeof(STxMgmtPacket) + WLAN_A3FR_MAXLEN];
396 BYTE abyIECountry[WLAN_A3FR_MAXLEN]; 395 BYTE abyIECountry[WLAN_A3FR_MAXLEN];
@@ -401,102 +400,61 @@ typedef struct tagSMgmtObject
401 400
402} SMgmtObject, *PSMgmtObject; 401} SMgmtObject, *PSMgmtObject;
403 402
404
405/*--------------------- Export Macros ------------------------------*/ 403/*--------------------- Export Macros ------------------------------*/
406 404
407
408/*--------------------- Export Functions --------------------------*/ 405/*--------------------- Export Functions --------------------------*/
409 406
407void vMgrObjectInit(void *hDeviceContext);
410 408
411void 409void vMgrAssocBeginSta(void *hDeviceContext,
412vMgrObjectInit( 410 PSMgmtObject pMgmt,
413 IN HANDLE hDeviceContext 411 PCMD_STATUS pStatus);
414 );
415 412
413void vMgrReAssocBeginSta(void *hDeviceContext,
414 PSMgmtObject pMgmt,
415 PCMD_STATUS pStatus);
416 416
417void 417void vMgrDisassocBeginSta(void *hDeviceContext,
418vMgrAssocBeginSta( 418 PSMgmtObject pMgmt,
419 IN HANDLE hDeviceContext, 419 PBYTE abyDestAddress,
420 IN PSMgmtObject pMgmt, 420 WORD wReason,
421 OUT PCMD_STATUS pStatus 421 PCMD_STATUS pStatus);
422 );
423 422
424VOID 423void vMgrAuthenBeginSta(void *hDeviceContext,
425vMgrReAssocBeginSta( 424 PSMgmtObject pMgmt,
426 IN HANDLE hDeviceContext, 425 PCMD_STATUS pStatus);
427 IN PSMgmtObject pMgmt,
428 OUT PCMD_STATUS pStatus
429 );
430 426
431VOID 427void vMgrCreateOwnIBSS(void *hDeviceContext,
432vMgrDisassocBeginSta( 428 PCMD_STATUS pStatus);
433 IN HANDLE hDeviceContext,
434 IN PSMgmtObject pMgmt,
435 IN PBYTE abyDestAddress,
436 IN WORD wReason,
437 OUT PCMD_STATUS pStatus
438 );
439 429
440VOID 430void vMgrJoinBSSBegin(void *hDeviceContext,
441vMgrAuthenBeginSta( 431 PCMD_STATUS pStatus);
442 IN HANDLE hDeviceContext,
443 IN PSMgmtObject pMgmt,
444 OUT PCMD_STATUS pStatus
445 );
446 432
447VOID 433void vMgrRxManagePacket(void *hDeviceContext,
448vMgrCreateOwnIBSS( 434 PSMgmtObject pMgmt,
449 IN HANDLE hDeviceContext, 435 PSRxMgmtPacket pRxPacket);
450 OUT PCMD_STATUS pStatus
451 );
452
453VOID
454vMgrJoinBSSBegin(
455 IN HANDLE hDeviceContext,
456 OUT PCMD_STATUS pStatus
457 );
458
459VOID
460vMgrRxManagePacket(
461 IN HANDLE hDeviceContext,
462 IN PSMgmtObject pMgmt,
463 IN PSRxMgmtPacket pRxPacket
464 );
465 436
466/* 437/*
467VOID 438void
468vMgrScanBegin( 439vMgrScanBegin(
469 IN HANDLE hDeviceContext, 440 void *hDeviceContext,
470 OUT PCMD_STATUS pStatus 441 PCMD_STATUS pStatus
471 ); 442 );
472*/ 443*/
473 444
474VOID 445void vMgrDeAuthenBeginSta(void *hDeviceContext,
475vMgrDeAuthenBeginSta( 446 PSMgmtObject pMgmt,
476 IN HANDLE hDeviceContext, 447 PBYTE abyDestAddress,
477 IN PSMgmtObject pMgmt, 448 WORD wReason,
478 IN PBYTE abyDestAddress, 449 PCMD_STATUS pStatus);
479 IN WORD wReason,
480 OUT PCMD_STATUS pStatus
481 );
482 450
483BOOL 451BOOL bMgrPrepareBeaconToSend(void *hDeviceContext,
484bMgrPrepareBeaconToSend( 452 PSMgmtObject pMgmt);
485 IN HANDLE hDeviceContext,
486 IN PSMgmtObject pMgmt
487 );
488 453
454BOOL bAdd_PMKID_Candidate(void *hDeviceContext,
455 PBYTE pbyBSSID,
456 PSRSNCapObject psRSNCapObj);
489 457
490BOOL 458void vFlush_PMKID_Candidate(void *hDeviceContext);
491bAdd_PMKID_Candidate (
492 IN HANDLE hDeviceContext,
493 IN PBYTE pbyBSSID,
494 IN PSRSNCapObject psRSNCapObj
495 );
496
497VOID
498vFlush_PMKID_Candidate (
499 IN HANDLE hDeviceContext
500 );
501 459
502#endif // __WMGR_H__ 460#endif /* __WMGR_H__ */
diff --git a/drivers/staging/vt6656/wpa.c b/drivers/staging/vt6656/wpa.c
index 5da671418b52..1fa6c9b88ed3 100644
--- a/drivers/staging/vt6656/wpa.c
+++ b/drivers/staging/vt6656/wpa.c
@@ -68,9 +68,9 @@ const BYTE abyOUI05[4] = { 0x00, 0x50, 0xf2, 0x05 };
68 * 68 *
69-*/ 69-*/
70 70
71VOID 71void
72WPA_ClearRSN ( 72WPA_ClearRSN (
73 IN PKnownBSS pBSSList 73 PKnownBSS pBSSList
74 ) 74 )
75{ 75{
76 int ii; 76 int ii;
@@ -104,10 +104,10 @@ WPA_ClearRSN (
104 * Return Value: none. 104 * Return Value: none.
105 * 105 *
106-*/ 106-*/
107VOID 107void
108WPA_ParseRSN ( 108WPA_ParseRSN (
109 IN PKnownBSS pBSSList, 109 PKnownBSS pBSSList,
110 IN PWLAN_IE_RSN_EXT pRSN 110 PWLAN_IE_RSN_EXT pRSN
111 ) 111 )
112{ 112{
113 PWLAN_IE_RSN_AUTH pIE_RSN_Auth = NULL; 113 PWLAN_IE_RSN_AUTH pIE_RSN_Auth = NULL;
@@ -241,7 +241,7 @@ BOOL
241WPA_SearchRSN ( 241WPA_SearchRSN (
242 BYTE byCmd, 242 BYTE byCmd,
243 BYTE byEncrypt, 243 BYTE byEncrypt,
244 IN PKnownBSS pBSSList 244 PKnownBSS pBSSList
245 ) 245 )
246{ 246{
247 int ii; 247 int ii;
@@ -299,7 +299,7 @@ WPA_SearchRSN (
299-*/ 299-*/
300BOOL 300BOOL
301WPAb_Is_RSN ( 301WPAb_Is_RSN (
302 IN PWLAN_IE_RSN_EXT pRSN 302 PWLAN_IE_RSN_EXT pRSN
303 ) 303 )
304{ 304{
305 if (pRSN == NULL) 305 if (pRSN == NULL)
diff --git a/drivers/staging/vt6656/wpa.h b/drivers/staging/vt6656/wpa.h
index 9d9ce01d0c61..889489adbb81 100644
--- a/drivers/staging/vt6656/wpa.h
+++ b/drivers/staging/vt6656/wpa.h
@@ -58,27 +58,27 @@
58 58
59/*--------------------- Export Functions --------------------------*/ 59/*--------------------- Export Functions --------------------------*/
60 60
61VOID 61void
62WPA_ClearRSN( 62WPA_ClearRSN(
63 IN PKnownBSS pBSSList 63 PKnownBSS pBSSList
64 ); 64 );
65 65
66VOID 66void
67WPA_ParseRSN( 67WPA_ParseRSN(
68 IN PKnownBSS pBSSList, 68 PKnownBSS pBSSList,
69 IN PWLAN_IE_RSN_EXT pRSN 69 PWLAN_IE_RSN_EXT pRSN
70 ); 70 );
71 71
72BOOL 72BOOL
73WPA_SearchRSN( 73WPA_SearchRSN(
74 BYTE byCmd, 74 BYTE byCmd,
75 BYTE byEncrypt, 75 BYTE byEncrypt,
76 IN PKnownBSS pBSSList 76 PKnownBSS pBSSList
77 ); 77 );
78 78
79BOOL 79BOOL
80WPAb_Is_RSN( 80WPAb_Is_RSN(
81 IN PWLAN_IE_RSN_EXT pRSN 81 PWLAN_IE_RSN_EXT pRSN
82 ); 82 );
83 83
84#endif // __WPA_H__ 84#endif /* __WPA_H__ */
diff --git a/drivers/staging/vt6656/wpa2.c b/drivers/staging/vt6656/wpa2.c
index fa3aeedfb278..6d13190885d1 100644
--- a/drivers/staging/vt6656/wpa2.c
+++ b/drivers/staging/vt6656/wpa2.c
@@ -71,9 +71,9 @@ const BYTE abyOUIPSK[4] = { 0x00, 0x0F, 0xAC, 0x02 };
71 * Return Value: none. 71 * Return Value: none.
72 * 72 *
73-*/ 73-*/
74VOID 74void
75WPA2_ClearRSN ( 75WPA2_ClearRSN (
76 IN PKnownBSS pBSSNode 76 PKnownBSS pBSSNode
77 ) 77 )
78{ 78{
79 int ii; 79 int ii;
@@ -106,10 +106,10 @@ WPA2_ClearRSN (
106 * Return Value: none. 106 * Return Value: none.
107 * 107 *
108-*/ 108-*/
109VOID 109void
110WPA2vParseRSN ( 110WPA2vParseRSN (
111 IN PKnownBSS pBSSNode, 111 PKnownBSS pBSSNode,
112 IN PWLAN_IE_RSN pRSN 112 PWLAN_IE_RSN pRSN
113 ) 113 )
114{ 114{
115 int i, j; 115 int i, j;
@@ -260,15 +260,14 @@ WPA2vParseRSN (
260 * Return Value: length of IEs. 260 * Return Value: length of IEs.
261 * 261 *
262-*/ 262-*/
263UINT 263unsigned int
264WPA2uSetIEs( 264WPA2uSetIEs(void *pMgmtHandle,
265 IN PVOID pMgmtHandle, 265 PWLAN_IE_RSN pRSNIEs
266 OUT PWLAN_IE_RSN pRSNIEs
267 ) 266 )
268{ 267{
269 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle; 268 PSMgmtObject pMgmt = (PSMgmtObject) pMgmtHandle;
270 PBYTE pbyBuffer = NULL; 269 PBYTE pbyBuffer = NULL;
271 UINT ii = 0; 270 unsigned int ii = 0;
272 PWORD pwPMKID = NULL; 271 PWORD pwPMKID = NULL;
273 272
274 if (pRSNIEs == NULL) { 273 if (pRSNIEs == NULL) {
@@ -337,20 +336,25 @@ WPA2uSetIEs(
337 } 336 }
338 pRSNIEs->len +=2; 337 pRSNIEs->len +=2;
339 338
340 if ((pMgmt->gsPMKIDCache.BSSIDInfoCount > 0) && 339 if ((pMgmt->gsPMKIDCache.BSSIDInfoCount > 0) &&
341 (pMgmt->bRoaming == TRUE) && 340 (pMgmt->bRoaming == TRUE) &&
342 (pMgmt->eAuthenMode == WMAC_AUTH_WPA2)) { 341 (pMgmt->eAuthenMode == WMAC_AUTH_WPA2)) {
343 // RSN PMKID 342 /* RSN PMKID, pointer to PMKID count */
344 pwPMKID = (PWORD)(&pRSNIEs->abyRSN[18]); // Point to PMKID count 343 pwPMKID = (PWORD)(&pRSNIEs->abyRSN[18]);
345 *pwPMKID = 0; // Initialize PMKID count 344 *pwPMKID = 0; /* Initialize PMKID count */
346 pbyBuffer = &pRSNIEs->abyRSN[20]; // Point to PMKID list 345 pbyBuffer = &pRSNIEs->abyRSN[20]; /* Point to PMKID list */
347 for (ii = 0; ii < pMgmt->gsPMKIDCache.BSSIDInfoCount; ii++) { 346 for (ii = 0; ii < pMgmt->gsPMKIDCache.BSSIDInfoCount; ii++) {
348 if ( !memcmp(&pMgmt->gsPMKIDCache.BSSIDInfo[ii].abyBSSID[0], pMgmt->abyCurrBSSID, U_ETHER_ADDR_LEN)) { 347 if (!memcmp(&pMgmt->
349 (*pwPMKID) ++; 348 gsPMKIDCache.BSSIDInfo[ii].abyBSSID[0],
350 memcpy(pbyBuffer, pMgmt->gsPMKIDCache.BSSIDInfo[ii].abyPMKID, 16); 349 pMgmt->abyCurrBSSID,
351 pbyBuffer += 16; 350 ETH_ALEN)) {
352 } 351 (*pwPMKID)++;
353 } 352 memcpy(pbyBuffer,
353 pMgmt->gsPMKIDCache.BSSIDInfo[ii].abyPMKID,
354 16);
355 pbyBuffer += 16;
356 }
357 }
354 if (*pwPMKID != 0) { 358 if (*pwPMKID != 0) {
355 pRSNIEs->len += (2 + (*pwPMKID)*16); 359 pRSNIEs->len += (2 + (*pwPMKID)*16);
356 } else { 360 } else {
diff --git a/drivers/staging/vt6656/wpa2.h b/drivers/staging/vt6656/wpa2.h
index e553b3869008..429a910a5c50 100644
--- a/drivers/staging/vt6656/wpa2.h
+++ b/drivers/staging/vt6656/wpa2.h
@@ -45,7 +45,7 @@ typedef struct tagsPMKIDInfo {
45} PMKIDInfo, *PPMKIDInfo; 45} PMKIDInfo, *PPMKIDInfo;
46 46
47typedef struct tagSPMKIDCache { 47typedef struct tagSPMKIDCache {
48 ULONG BSSIDInfoCount; 48 unsigned long BSSIDInfoCount;
49 PMKIDInfo BSSIDInfo[MAX_PMKID_CACHE]; 49 PMKIDInfo BSSIDInfo[MAX_PMKID_CACHE];
50} SPMKIDCache, *PSPMKIDCache; 50} SPMKIDCache, *PSPMKIDCache;
51 51
@@ -58,21 +58,21 @@ typedef struct tagSPMKIDCache {
58 58
59/*--------------------- Export Functions --------------------------*/ 59/*--------------------- Export Functions --------------------------*/
60 60
61VOID 61void
62WPA2_ClearRSN ( 62WPA2_ClearRSN (
63 IN PKnownBSS pBSSNode 63 PKnownBSS pBSSNode
64 ); 64 );
65 65
66VOID 66void
67WPA2vParseRSN ( 67WPA2vParseRSN (
68 IN PKnownBSS pBSSNode, 68 PKnownBSS pBSSNode,
69 IN PWLAN_IE_RSN pRSN 69 PWLAN_IE_RSN pRSN
70 ); 70 );
71 71
72UINT 72unsigned int
73WPA2uSetIEs( 73WPA2uSetIEs(
74 IN PVOID pMgmtHandle, 74 void *pMgmtHandle,
75 OUT PWLAN_IE_RSN pRSNIEs 75 PWLAN_IE_RSN pRSNIEs
76 ); 76 );
77 77
78#endif // __WPA2_H__ 78#endif /* __WPA2_H__ */
diff --git a/drivers/staging/vt6656/wpactl.c b/drivers/staging/vt6656/wpactl.c
index 4555bc0448b9..961f583368a1 100644
--- a/drivers/staging/vt6656/wpactl.c
+++ b/drivers/staging/vt6656/wpactl.c
@@ -103,7 +103,7 @@ static int wpa_init_wpadev(PSDevice pDevice)
103 103
104 wpadev_priv = netdev_priv(pDevice->wpadev); 104 wpadev_priv = netdev_priv(pDevice->wpadev);
105 *wpadev_priv = *pDevice; 105 *wpadev_priv = *pDevice;
106 memcpy(pDevice->wpadev->dev_addr, dev->dev_addr, U_ETHER_ADDR_LEN); 106 memcpy(pDevice->wpadev->dev_addr, dev->dev_addr, ETH_ALEN);
107 pDevice->wpadev->base_addr = dev->base_addr; 107 pDevice->wpadev->base_addr = dev->base_addr;
108 pDevice->wpadev->irq = dev->irq; 108 pDevice->wpadev->irq = dev->irq;
109 pDevice->wpadev->mem_start = dev->mem_start; 109 pDevice->wpadev->mem_start = dev->mem_start;
@@ -489,7 +489,7 @@ static int wpa_set_disassociate(PSDevice pDevice,
489 spin_lock_irq(&pDevice->lock); 489 spin_lock_irq(&pDevice->lock);
490 if (pDevice->bLinkPass) { 490 if (pDevice->bLinkPass) {
491 if (!memcmp(param->addr, pMgmt->abyCurrBSSID, 6)) 491 if (!memcmp(param->addr, pMgmt->abyCurrBSSID, 6))
492 bScheduleCommand((HANDLE)pDevice, WLAN_CMD_DISASSOCIATE, NULL); 492 bScheduleCommand((void *) pDevice, WLAN_CMD_DISASSOCIATE, NULL);
493 } 493 }
494 spin_unlock_irq(&pDevice->lock); 494 spin_unlock_irq(&pDevice->lock);
495 495
@@ -513,7 +513,7 @@ static int wpa_set_disassociate(PSDevice pDevice,
513 */ 513 */
514 514
515static int wpa_set_scan(PSDevice pDevice, 515static int wpa_set_scan(PSDevice pDevice,
516 struct viawget_wpa_param *param) 516 struct viawget_wpa_param *param)
517{ 517{
518 int ret = 0; 518 int ret = 0;
519 519
@@ -531,9 +531,11 @@ memcpy(pItemSSID->abySSID, param->u.scan_req.ssid, param->u.scan_req.ssid_len);
531pItemSSID->len = param->u.scan_req.ssid_len; 531pItemSSID->len = param->u.scan_req.ssid_len;
532 532
533 spin_lock_irq(&pDevice->lock); 533 spin_lock_irq(&pDevice->lock);
534 BSSvClearBSSList((HANDLE)pDevice, pDevice->bLinkPass); 534 BSSvClearBSSList((void *) pDevice, pDevice->bLinkPass);
535 // bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, NULL); 535 /* bScheduleCommand((void *) pDevice, WLAN_CMD_BSSID_SCAN, NULL); */
536 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 536 bScheduleCommand((void *) pDevice,
537 WLAN_CMD_BSSID_SCAN,
538 pMgmt->abyDesireSSID);
537 spin_unlock_irq(&pDevice->lock); 539 spin_unlock_irq(&pDevice->lock);
538 540
539 return ret; 541 return ret;
@@ -676,13 +678,12 @@ static int wpa_get_scan(PSDevice pDevice,
676 count++; 678 count++;
677 }; 679 };
678 680
679 pBuf = kmalloc(sizeof(struct viawget_scan_result) * count, (int)GFP_ATOMIC); 681 pBuf = kcalloc(count, sizeof(struct viawget_scan_result), (int)GFP_ATOMIC);
680 682
681 if (pBuf == NULL) { 683 if (pBuf == NULL) {
682 ret = -ENOMEM; 684 ret = -ENOMEM;
683 return ret; 685 return ret;
684 } 686 }
685 memset(pBuf, 0, sizeof(struct viawget_scan_result) * count);
686 scan_buf = (struct viawget_scan_result *)pBuf; 687 scan_buf = (struct viawget_scan_result *)pBuf;
687 pBSS = &(pMgmt->sBSSList[0]); 688 pBSS = &(pMgmt->sBSSList[0]);
688 for (ii = 0, jj = 0; ii < MAX_BSS_NUM ; ii++) { 689 for (ii = 0, jj = 0; ii < MAX_BSS_NUM ; ii++) {
@@ -886,12 +887,14 @@ static int wpa_set_associate(PSDevice pDevice,
886 887
887 if (pCurr == NULL){ 888 if (pCurr == NULL){
888 printk("wpa_set_associate---->hidden mode site survey before associate.......\n"); 889 printk("wpa_set_associate---->hidden mode site survey before associate.......\n");
889 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_BSSID_SCAN, pMgmt->abyDesireSSID); 890 bScheduleCommand((void *) pDevice,
891 WLAN_CMD_BSSID_SCAN,
892 pMgmt->abyDesireSSID);
890 }; 893 };
891} 894}
892/****************************************************************/ 895/****************************************************************/
893 896
894 bScheduleCommand((HANDLE) pDevice, WLAN_CMD_SSID, NULL); 897 bScheduleCommand((void *) pDevice, WLAN_CMD_SSID, NULL);
895 spin_unlock_irq(&pDevice->lock); 898 spin_unlock_irq(&pDevice->lock);
896 899
897 return ret; 900 return ret;
@@ -922,7 +925,7 @@ int wpa_ioctl(PSDevice pDevice, struct iw_point *p)
922 p->length > VIAWGET_WPA_MAX_BUF_SIZE || !p->pointer) 925 p->length > VIAWGET_WPA_MAX_BUF_SIZE || !p->pointer)
923 return -EINVAL; 926 return -EINVAL;
924 927
925 param = (struct viawget_wpa_param *) kmalloc((int)p->length, (int)GFP_KERNEL); 928 param = kmalloc((int)p->length, (int)GFP_KERNEL);
926 if (param == NULL) 929 if (param == NULL)
927 return -ENOMEM; 930 return -ENOMEM;
928 931
diff --git a/drivers/staging/vt6656/wpactl.h b/drivers/staging/vt6656/wpactl.h
index 56179f01311a..00c8451ab50b 100644
--- a/drivers/staging/vt6656/wpactl.h
+++ b/drivers/staging/vt6656/wpactl.h
@@ -52,9 +52,7 @@ typedef enum { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE,
52#define GENERIC_INFO_ELEM 0xdd 52#define GENERIC_INFO_ELEM 0xdd
53#define RSN_INFO_ELEM 0x30 53#define RSN_INFO_ELEM 0x30
54 54
55 55typedef unsigned long long NDIS_802_11_KEY_RSC;
56
57typedef ULONGLONG NDIS_802_11_KEY_RSC;
58 56
59/*--------------------- Export Classes ----------------------------*/ 57/*--------------------- Export Classes ----------------------------*/
60 58
@@ -66,7 +64,4 @@ int wpa_set_wpadev(PSDevice pDevice, int val);
66int wpa_ioctl(PSDevice pDevice, struct iw_point *p); 64int wpa_ioctl(PSDevice pDevice, struct iw_point *p);
67int wpa_set_keys(PSDevice pDevice, void *ctx, BOOL fcpfkernel); 65int wpa_set_keys(PSDevice pDevice, void *ctx, BOOL fcpfkernel);
68 66
69#endif // __WPACL_H__ 67#endif /* __WPACL_H__ */
70
71
72
diff --git a/drivers/staging/wavelan/Kconfig b/drivers/staging/wavelan/Kconfig
deleted file mode 100644
index af655668c2a7..000000000000
--- a/drivers/staging/wavelan/Kconfig
+++ /dev/null
@@ -1,38 +0,0 @@
1config WAVELAN
2 tristate "AT&T/Lucent old WaveLAN & DEC RoamAbout DS ISA support"
3 depends on ISA && WLAN
4 select WIRELESS_EXT
5 select WEXT_SPY
6 select WEXT_PRIV
7 ---help---
8 The Lucent WaveLAN (formerly NCR and AT&T; or DEC RoamAbout DS) is
9 a Radio LAN (wireless Ethernet-like Local Area Network) using the
10 radio frequencies 900 MHz and 2.4 GHz.
11
12 If you want to use an ISA WaveLAN card under Linux, say Y and read
13 the Ethernet-HOWTO, available from
14 <http://www.tldp.org/docs.html#howto>. Some more specific
15 information is contained in
16 <file:Documentation/networking/wavelan.txt> and in the source code
17 <file:drivers/net/wireless/wavelan.p.h>.
18
19 You will also need the wireless tools package available from
20 <http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>.
21 Please read the man pages contained therein.
22
23 To compile this driver as a module, choose M here: the module will be
24 called wavelan.
25
26config PCMCIA_WAVELAN
27 tristate "AT&T/Lucent old WaveLAN Pcmcia wireless support"
28 depends on PCMCIA && WLAN
29 select WIRELESS_EXT
30 select WEXT_SPY
31 select WEXT_PRIV
32 help
33 Say Y here if you intend to attach an AT&T/Lucent Wavelan PCMCIA
34 (PC-card) wireless Ethernet networking card to your computer. This
35 driver is for the non-IEEE-802.11 Wavelan cards.
36
37 To compile this driver as a module, choose M here: the module will be
38 called wavelan_cs. If unsure, say N.
diff --git a/drivers/staging/wavelan/Makefile b/drivers/staging/wavelan/Makefile
deleted file mode 100644
index 1cde17c69a43..000000000000
--- a/drivers/staging/wavelan/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
1obj-$(CONFIG_WAVELAN) += wavelan.o
2obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan_cs.o
diff --git a/drivers/staging/wavelan/TODO b/drivers/staging/wavelan/TODO
deleted file mode 100644
index 9bd15a2f6d9e..000000000000
--- a/drivers/staging/wavelan/TODO
+++ /dev/null
@@ -1,7 +0,0 @@
1TODO:
2 - step up and maintain this driver to ensure that it continues
3 to work. Having the hardware for this is pretty much a
4 requirement. If this does not happen, the will be removed in
5 the 2.6.35 kernel release.
6
7Please send patches to Greg Kroah-Hartman <greg@kroah.com>.
diff --git a/drivers/staging/wavelan/i82586.h b/drivers/staging/wavelan/i82586.h
deleted file mode 100644
index 5f65b250646f..000000000000
--- a/drivers/staging/wavelan/i82586.h
+++ /dev/null
@@ -1,413 +0,0 @@
1/*
2 * Intel 82586 IEEE 802.3 Ethernet LAN Coprocessor.
3 *
4 * See:
5 * Intel Microcommunications 1991
6 * p1-1 to p1-37
7 * Intel order No. 231658
8 * ISBN 1-55512-119-5
9 *
10 * Unfortunately, the above chapter mentions neither
11 * the System Configuration Pointer (SCP) nor the
12 * Intermediate System Configuration Pointer (ISCP),
13 * so we probably need to look elsewhere for the
14 * whole story -- some recommend the "Intel LAN
15 * Components manual" but I have neither a copy
16 * nor a full reference. But "elsewhere" may be
17 * in the same publication...
18 * The description of a later device, the
19 * "82596CA High-Performance 32-Bit Local Area Network
20 * Coprocessor", (ibid. p1-38 to p1-109) does mention
21 * the SCP and ISCP and also has an i82586 compatibility
22 * mode. Even more useful is "AP-235 An 82586 Data Link
23 * Driver" (ibid. p1-337 to p1-417).
24 */
25
26#define I82586_MEMZ (64 * 1024)
27
28#define I82586_SCP_ADDR (I82586_MEMZ - sizeof(scp_t))
29
30#define ADDR_LEN 6
31#define I82586NULL 0xFFFF
32
33#define toff(t,p,f) (unsigned short)((void *)(&((t *)((void *)0 + (p)))->f) - (void *)0)
34
35/*
36 * System Configuration Pointer (SCP).
37 */
38typedef struct scp_t scp_t;
39struct scp_t
40{
41 unsigned short scp_sysbus; /* 82586 bus width: */
42#define SCP_SY_16BBUS (0x0 << 0) /* 16 bits */
43#define SCP_SY_8BBUS (0x1 << 0) /* 8 bits. */
44 unsigned short scp_junk[2]; /* Unused */
45 unsigned short scp_iscpl; /* lower 16 bits of ISCP_ADDR */
46 unsigned short scp_iscph; /* upper 16 bits of ISCP_ADDR */
47};
48
49/*
50 * Intermediate System Configuration Pointer (ISCP).
51 */
52typedef struct iscp_t iscp_t;
53struct iscp_t
54{
55 unsigned short iscp_busy; /* set by CPU before first CA, */
56 /* cleared by 82586 after read. */
57 unsigned short iscp_offset; /* offset of SCB */
58 unsigned short iscp_basel; /* base of SCB */
59 unsigned short iscp_baseh; /* " */
60};
61
62/*
63 * System Control Block (SCB).
64 * The 82586 writes its status to scb_status and then
65 * raises an interrupt to alert the CPU.
66 * The CPU writes a command to scb_command and
67 * then issues a Channel Attention (CA) to alert the 82586.
68 */
69typedef struct scb_t scb_t;
70struct scb_t
71{
72 unsigned short scb_status; /* Status of 82586 */
73#define SCB_ST_INT (0xF << 12) /* Some of: */
74#define SCB_ST_CX (0x1 << 15) /* Cmd completed */
75#define SCB_ST_FR (0x1 << 14) /* Frame received */
76#define SCB_ST_CNA (0x1 << 13) /* Cmd unit not active */
77#define SCB_ST_RNR (0x1 << 12) /* Rcv unit not ready */
78#define SCB_ST_JUNK0 (0x1 << 11) /* 0 */
79#define SCB_ST_CUS (0x7 << 8) /* Cmd unit status */
80#define SCB_ST_CUS_IDLE (0 << 8) /* Idle */
81#define SCB_ST_CUS_SUSP (1 << 8) /* Suspended */
82#define SCB_ST_CUS_ACTV (2 << 8) /* Active */
83#define SCB_ST_JUNK1 (0x1 << 7) /* 0 */
84#define SCB_ST_RUS (0x7 << 4) /* Rcv unit status */
85#define SCB_ST_RUS_IDLE (0 << 4) /* Idle */
86#define SCB_ST_RUS_SUSP (1 << 4) /* Suspended */
87#define SCB_ST_RUS_NRES (2 << 4) /* No resources */
88#define SCB_ST_RUS_RDY (4 << 4) /* Ready */
89 unsigned short scb_command; /* Next command */
90#define SCB_CMD_ACK_CX (0x1 << 15) /* Ack cmd completion */
91#define SCB_CMD_ACK_FR (0x1 << 14) /* Ack frame received */
92#define SCB_CMD_ACK_CNA (0x1 << 13) /* Ack CU not active */
93#define SCB_CMD_ACK_RNR (0x1 << 12) /* Ack RU not ready */
94#define SCB_CMD_JUNKX (0x1 << 11) /* Unused */
95#define SCB_CMD_CUC (0x7 << 8) /* Command Unit command */
96#define SCB_CMD_CUC_NOP (0 << 8) /* Nop */
97#define SCB_CMD_CUC_GO (1 << 8) /* Start cbl_offset */
98#define SCB_CMD_CUC_RES (2 << 8) /* Resume execution */
99#define SCB_CMD_CUC_SUS (3 << 8) /* Suspend " */
100#define SCB_CMD_CUC_ABT (4 << 8) /* Abort " */
101#define SCB_CMD_RESET (0x1 << 7) /* Reset chip (hardware) */
102#define SCB_CMD_RUC (0x7 << 4) /* Receive Unit command */
103#define SCB_CMD_RUC_NOP (0 << 4) /* Nop */
104#define SCB_CMD_RUC_GO (1 << 4) /* Start rfa_offset */
105#define SCB_CMD_RUC_RES (2 << 4) /* Resume reception */
106#define SCB_CMD_RUC_SUS (3 << 4) /* Suspend " */
107#define SCB_CMD_RUC_ABT (4 << 4) /* Abort " */
108 unsigned short scb_cbl_offset; /* Offset of first command unit */
109 /* Action Command */
110 unsigned short scb_rfa_offset; /* Offset of first Receive */
111 /* Frame Descriptor in the */
112 /* Receive Frame Area */
113 unsigned short scb_crcerrs; /* Properly aligned frames */
114 /* received with a CRC error */
115 unsigned short scb_alnerrs; /* Misaligned frames received */
116 /* with a CRC error */
117 unsigned short scb_rscerrs; /* Frames lost due to no space */
118 unsigned short scb_ovrnerrs; /* Frames lost due to slow bus */
119};
120
121#define scboff(p,f) toff(scb_t, p, f)
122
123/*
124 * The eight Action Commands.
125 */
126typedef enum acmd_e acmd_e;
127enum acmd_e
128{
129 acmd_nop = 0, /* Do nothing */
130 acmd_ia_setup = 1, /* Load an (ethernet) address into the */
131 /* 82586 */
132 acmd_configure = 2, /* Update the 82586 operating parameters */
133 acmd_mc_setup = 3, /* Load a list of (ethernet) multicast */
134 /* addresses into the 82586 */
135 acmd_transmit = 4, /* Transmit a frame */
136 acmd_tdr = 5, /* Perform a Time Domain Reflectometer */
137 /* test on the serial link */
138 acmd_dump = 6, /* Copy 82586 registers to memory */
139 acmd_diagnose = 7, /* Run an internal self test */
140};
141
142/*
143 * Generic Action Command header.
144 */
145typedef struct ach_t ach_t;
146struct ach_t
147{
148 unsigned short ac_status; /* Command status: */
149#define AC_SFLD_C (0x1 << 15) /* Command completed */
150#define AC_SFLD_B (0x1 << 14) /* Busy executing */
151#define AC_SFLD_OK (0x1 << 13) /* Completed error free */
152#define AC_SFLD_A (0x1 << 12) /* Command aborted */
153#define AC_SFLD_FAIL (0x1 << 11) /* Selftest failed */
154#define AC_SFLD_S10 (0x1 << 10) /* No carrier sense */
155 /* during transmission */
156#define AC_SFLD_S9 (0x1 << 9) /* Tx unsuccessful: */
157 /* (stopped) lost CTS */
158#define AC_SFLD_S8 (0x1 << 8) /* Tx unsuccessful: */
159 /* (stopped) slow DMA */
160#define AC_SFLD_S7 (0x1 << 7) /* Tx deferred: */
161 /* other link traffic */
162#define AC_SFLD_S6 (0x1 << 6) /* Heart Beat: collision */
163 /* detect after last tx */
164#define AC_SFLD_S5 (0x1 << 5) /* Tx stopped: */
165 /* excessive collisions */
166#define AC_SFLD_MAXCOL (0xF << 0) /* Collision count */
167 unsigned short ac_command; /* Command specifier: */
168#define AC_CFLD_EL (0x1 << 15) /* End of command list */
169#define AC_CFLD_S (0x1 << 14) /* Suspend on completion */
170#define AC_CFLD_I (0x1 << 13) /* Interrupt on completion */
171#define AC_CFLD_CMD (0x7 << 0) /* acmd_e */
172 unsigned short ac_link; /* Next Action Command */
173};
174
175#define acoff(p,f) toff(ach_t, p, f)
176
177/*
178 * The Nop Action Command.
179 */
180typedef struct ac_nop_t ac_nop_t;
181struct ac_nop_t
182{
183 ach_t nop_h;
184};
185
186/*
187 * The IA-Setup Action Command.
188 */
189typedef struct ac_ias_t ac_ias_t;
190struct ac_ias_t
191{
192 ach_t ias_h;
193 unsigned char ias_addr[ADDR_LEN]; /* The (ethernet) address */
194};
195
196/*
197 * The Configure Action Command.
198 */
199typedef struct ac_cfg_t ac_cfg_t;
200struct ac_cfg_t
201{
202 ach_t cfg_h;
203 unsigned char cfg_byte_cnt; /* Size foll data: 4-12 */
204#define AC_CFG_BYTE_CNT(v) (((v) & 0xF) << 0)
205 unsigned char cfg_fifolim; /* FIFO threshold */
206#define AC_CFG_FIFOLIM(v) (((v) & 0xF) << 0)
207 unsigned char cfg_byte8;
208#define AC_CFG_SAV_BF(v) (((v) & 0x1) << 7) /* Save rxd bad frames */
209#define AC_CFG_SRDY(v) (((v) & 0x1) << 6) /* SRDY/ARDY pin means */
210 /* external sync. */
211 unsigned char cfg_byte9;
212#define AC_CFG_ELPBCK(v) (((v) & 0x1) << 7) /* External loopback */
213#define AC_CFG_ILPBCK(v) (((v) & 0x1) << 6) /* Internal loopback */
214#define AC_CFG_PRELEN(v) (((v) & 0x3) << 4) /* Preamble length */
215#define AC_CFG_PLEN_2 0 /* 2 bytes */
216#define AC_CFG_PLEN_4 1 /* 4 bytes */
217#define AC_CFG_PLEN_8 2 /* 8 bytes */
218#define AC_CFG_PLEN_16 3 /* 16 bytes */
219#define AC_CFG_ALOC(v) (((v) & 0x1) << 3) /* Addr/len data is */
220 /* explicit in buffers */
221#define AC_CFG_ADDRLEN(v) (((v) & 0x7) << 0) /* Bytes per address */
222 unsigned char cfg_byte10;
223#define AC_CFG_BOFMET(v) (((v) & 0x1) << 7) /* Use alternate expo. */
224 /* backoff method */
225#define AC_CFG_ACR(v) (((v) & 0x7) << 4) /* Accelerated cont. res. */
226#define AC_CFG_LINPRIO(v) (((v) & 0x7) << 0) /* Linear priority */
227 unsigned char cfg_ifs; /* Interframe spacing */
228 unsigned char cfg_slotl; /* Slot time (low byte) */
229 unsigned char cfg_byte13;
230#define AC_CFG_RETRYNUM(v) (((v) & 0xF) << 4) /* Max. collision retry */
231#define AC_CFG_SLTTMHI(v) (((v) & 0x7) << 0) /* Slot time (high bits) */
232 unsigned char cfg_byte14;
233#define AC_CFG_FLGPAD(v) (((v) & 0x1) << 7) /* Pad with HDLC flags */
234#define AC_CFG_BTSTF(v) (((v) & 0x1) << 6) /* Do HDLC bitstuffing */
235#define AC_CFG_CRC16(v) (((v) & 0x1) << 5) /* 16 bit CCITT CRC */
236#define AC_CFG_NCRC(v) (((v) & 0x1) << 4) /* Insert no CRC */
237#define AC_CFG_TNCRS(v) (((v) & 0x1) << 3) /* Tx even if no carrier */
238#define AC_CFG_MANCH(v) (((v) & 0x1) << 2) /* Manchester coding */
239#define AC_CFG_BCDIS(v) (((v) & 0x1) << 1) /* Disable broadcast */
240#define AC_CFG_PRM(v) (((v) & 0x1) << 0) /* Promiscuous mode */
241 unsigned char cfg_byte15;
242#define AC_CFG_ICDS(v) (((v) & 0x1) << 7) /* Internal collision */
243 /* detect source */
244#define AC_CFG_CDTF(v) (((v) & 0x7) << 4) /* Collision detect */
245 /* filter in bit times */
246#define AC_CFG_ICSS(v) (((v) & 0x1) << 3) /* Internal carrier */
247 /* sense source */
248#define AC_CFG_CSTF(v) (((v) & 0x7) << 0) /* Carrier sense */
249 /* filter in bit times */
250 unsigned short cfg_min_frm_len;
251#define AC_CFG_MNFRM(v) (((v) & 0xFF) << 0) /* Min. bytes/frame (<= 255) */
252};
253
254/*
255 * The MC-Setup Action Command.
256 */
257typedef struct ac_mcs_t ac_mcs_t;
258struct ac_mcs_t
259{
260 ach_t mcs_h;
261 unsigned short mcs_cnt; /* No. of bytes of MC addresses */
262#if 0
263 unsigned char mcs_data[ADDR_LEN]; /* The first MC address .. */
264 ...
265#endif
266};
267
268#define I82586_MAX_MULTICAST_ADDRESSES 128 /* Hardware hashed filter */
269
270/*
271 * The Transmit Action Command.
272 */
273typedef struct ac_tx_t ac_tx_t;
274struct ac_tx_t
275{
276 ach_t tx_h;
277 unsigned short tx_tbd_offset; /* Address of list of buffers. */
278#if 0
279Linux packets are passed down with the destination MAC address
280and length/type field already prepended to the data,
281so we do not need to insert it. Consistent with this
282we must also set the AC_CFG_ALOC(..) flag during the
283ac_cfg_t action command.
284 unsigned char tx_addr[ADDR_LEN]; /* The frame dest. address */
285 unsigned short tx_length; /* The frame length */
286#endif /* 0 */
287};
288
289/*
290 * The Time Domain Reflectometer Action Command.
291 */
292typedef struct ac_tdr_t ac_tdr_t;
293struct ac_tdr_t
294{
295 ach_t tdr_h;
296 unsigned short tdr_result; /* Result. */
297#define AC_TDR_LNK_OK (0x1 << 15) /* No link problem */
298#define AC_TDR_XCVR_PRB (0x1 << 14) /* Txcvr cable problem */
299#define AC_TDR_ET_OPN (0x1 << 13) /* Open on the link */
300#define AC_TDR_ET_SRT (0x1 << 12) /* Short on the link */
301#define AC_TDR_TIME (0x7FF << 0) /* Distance to problem */
302 /* site in transmit */
303 /* clock cycles */
304};
305
306/*
307 * The Dump Action Command.
308 */
309typedef struct ac_dmp_t ac_dmp_t;
310struct ac_dmp_t
311{
312 ach_t dmp_h;
313 unsigned short dmp_offset; /* Result. */
314};
315
316/*
317 * Size of the result of the dump command.
318 */
319#define DUMPBYTES 170
320
321/*
322 * The Diagnose Action Command.
323 */
324typedef struct ac_dgn_t ac_dgn_t;
325struct ac_dgn_t
326{
327 ach_t dgn_h;
328};
329
330/*
331 * Transmit Buffer Descriptor (TBD).
332 */
333typedef struct tbd_t tbd_t;
334struct tbd_t
335{
336 unsigned short tbd_status; /* Written by the CPU */
337#define TBD_STATUS_EOF (0x1 << 15) /* This TBD is the */
338 /* last for this frame */
339#define TBD_STATUS_ACNT (0x3FFF << 0) /* Actual count of data */
340 /* bytes in this buffer */
341 unsigned short tbd_next_bd_offset; /* Next in list */
342 unsigned short tbd_bufl; /* Buffer address (low) */
343 unsigned short tbd_bufh; /* " " (high) */
344};
345
346/*
347 * Receive Buffer Descriptor (RBD).
348 */
349typedef struct rbd_t rbd_t;
350struct rbd_t
351{
352 unsigned short rbd_status; /* Written by the 82586 */
353#define RBD_STATUS_EOF (0x1 << 15) /* This RBD is the */
354 /* last for this frame */
355#define RBD_STATUS_F (0x1 << 14) /* ACNT field is valid */
356#define RBD_STATUS_ACNT (0x3FFF << 0) /* Actual no. of data */
357 /* bytes in this buffer */
358 unsigned short rbd_next_rbd_offset; /* Next rbd in list */
359 unsigned short rbd_bufl; /* Data pointer (low) */
360 unsigned short rbd_bufh; /* " " (high) */
361 unsigned short rbd_el_size; /* EL+Data buf. size */
362#define RBD_EL (0x1 << 15) /* This BD is the */
363 /* last in the list */
364#define RBD_SIZE (0x3FFF << 0) /* No. of bytes the */
365 /* buffer can hold */
366};
367
368#define rbdoff(p,f) toff(rbd_t, p, f)
369
370/*
371 * Frame Descriptor (FD).
372 */
373typedef struct fd_t fd_t;
374struct fd_t
375{
376 unsigned short fd_status; /* Written by the 82586 */
377#define FD_STATUS_C (0x1 << 15) /* Completed storing frame */
378#define FD_STATUS_B (0x1 << 14) /* FD was consumed by RU */
379#define FD_STATUS_OK (0x1 << 13) /* Frame rxd successfully */
380#define FD_STATUS_S11 (0x1 << 11) /* CRC error */
381#define FD_STATUS_S10 (0x1 << 10) /* Alignment error */
382#define FD_STATUS_S9 (0x1 << 9) /* Ran out of resources */
383#define FD_STATUS_S8 (0x1 << 8) /* Rx DMA overrun */
384#define FD_STATUS_S7 (0x1 << 7) /* Frame too short */
385#define FD_STATUS_S6 (0x1 << 6) /* No EOF flag */
386 unsigned short fd_command; /* Command */
387#define FD_COMMAND_EL (0x1 << 15) /* Last FD in list */
388#define FD_COMMAND_S (0x1 << 14) /* Suspend RU after rx */
389 unsigned short fd_link_offset; /* Next FD */
390 unsigned short fd_rbd_offset; /* First RBD (data) */
391 /* Prepared by CPU, */
392 /* updated by 82586 */
393#if 0
394I think the rest is unused since we
395have set AC_CFG_ALOC(..). However, just
396in case, we leave the space.
397#endif /* 0 */
398 unsigned char fd_dest[ADDR_LEN]; /* Destination address */
399 /* Written by 82586 */
400 unsigned char fd_src[ADDR_LEN]; /* Source address */
401 /* Written by 82586 */
402 unsigned short fd_length; /* Frame length or type */
403 /* Written by 82586 */
404};
405
406#define fdoff(p,f) toff(fd_t, p, f)
407
408/*
409 * This software may only be used and distributed
410 * according to the terms of the GNU General Public License.
411 *
412 * For more details, see wavelan.c.
413 */
diff --git a/drivers/staging/wavelan/wavelan.c b/drivers/staging/wavelan/wavelan.c
deleted file mode 100644
index f44ef351647b..000000000000
--- a/drivers/staging/wavelan/wavelan.c
+++ /dev/null
@@ -1,4383 +0,0 @@
1/*
2 * WaveLAN ISA driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 * Original copyright follows (also see the end of this file).
8 * See wavelan.p.h for details.
9 *
10 *
11 *
12 * AT&T GIS (nee NCR) WaveLAN card:
13 * An Ethernet-like radio transceiver
14 * controlled by an Intel 82586 coprocessor.
15 */
16
17#include "wavelan.p.h" /* Private header */
18
19/************************* MISC SUBROUTINES **************************/
20/*
21 * Subroutines which won't fit in one of the following category
22 * (WaveLAN modem or i82586)
23 */
24
25/*------------------------------------------------------------------*/
26/*
27 * Translate irq number to PSA irq parameter
28 */
29static u8 wv_irq_to_psa(int irq)
30{
31 if (irq < 0 || irq >= ARRAY_SIZE(irqvals))
32 return 0;
33
34 return irqvals[irq];
35}
36
37/*------------------------------------------------------------------*/
38/*
39 * Translate PSA irq parameter to irq number
40 */
41static int __init wv_psa_to_irq(u8 irqval)
42{
43 int i;
44
45 for (i = 0; i < ARRAY_SIZE(irqvals); i++)
46 if (irqvals[i] == irqval)
47 return i;
48
49 return -1;
50}
51
52/********************* HOST ADAPTER SUBROUTINES *********************/
53/*
54 * Useful subroutines to manage the WaveLAN ISA interface
55 *
56 * One major difference with the PCMCIA hardware (except the port mapping)
57 * is that we have to keep the state of the Host Control Register
58 * because of the interrupt enable & bus size flags.
59 */
60
61/*------------------------------------------------------------------*/
62/*
63 * Read from card's Host Adaptor Status Register.
64 */
65static inline u16 hasr_read(unsigned long ioaddr)
66{
67 return (inw(HASR(ioaddr)));
68} /* hasr_read */
69
70/*------------------------------------------------------------------*/
71/*
72 * Write to card's Host Adapter Command Register.
73 */
74static inline void hacr_write(unsigned long ioaddr, u16 hacr)
75{
76 outw(hacr, HACR(ioaddr));
77} /* hacr_write */
78
79/*------------------------------------------------------------------*/
80/*
81 * Write to card's Host Adapter Command Register. Include a delay for
82 * those times when it is needed.
83 */
84static void hacr_write_slow(unsigned long ioaddr, u16 hacr)
85{
86 hacr_write(ioaddr, hacr);
87 /* delay might only be needed sometimes */
88 mdelay(1);
89} /* hacr_write_slow */
90
91/*------------------------------------------------------------------*/
92/*
93 * Set the channel attention bit.
94 */
95static inline void set_chan_attn(unsigned long ioaddr, u16 hacr)
96{
97 hacr_write(ioaddr, hacr | HACR_CA);
98} /* set_chan_attn */
99
100/*------------------------------------------------------------------*/
101/*
102 * Reset, and then set host adaptor into default mode.
103 */
104static inline void wv_hacr_reset(unsigned long ioaddr)
105{
106 hacr_write_slow(ioaddr, HACR_RESET);
107 hacr_write(ioaddr, HACR_DEFAULT);
108} /* wv_hacr_reset */
109
110/*------------------------------------------------------------------*/
111/*
112 * Set the I/O transfer over the ISA bus to 8-bit mode
113 */
114static inline void wv_16_off(unsigned long ioaddr, u16 hacr)
115{
116 hacr &= ~HACR_16BITS;
117 hacr_write(ioaddr, hacr);
118} /* wv_16_off */
119
120/*------------------------------------------------------------------*/
121/*
122 * Set the I/O transfer over the ISA bus to 8-bit mode
123 */
124static inline void wv_16_on(unsigned long ioaddr, u16 hacr)
125{
126 hacr |= HACR_16BITS;
127 hacr_write(ioaddr, hacr);
128} /* wv_16_on */
129
130/*------------------------------------------------------------------*/
131/*
132 * Disable interrupts on the WaveLAN hardware.
133 * (called by wv_82586_stop())
134 */
135static inline void wv_ints_off(struct net_device * dev)
136{
137 net_local *lp = netdev_priv(dev);
138 unsigned long ioaddr = dev->base_addr;
139
140 lp->hacr &= ~HACR_INTRON;
141 hacr_write(ioaddr, lp->hacr);
142} /* wv_ints_off */
143
144/*------------------------------------------------------------------*/
145/*
146 * Enable interrupts on the WaveLAN hardware.
147 * (called by wv_hw_reset())
148 */
149static inline void wv_ints_on(struct net_device * dev)
150{
151 net_local *lp = netdev_priv(dev);
152 unsigned long ioaddr = dev->base_addr;
153
154 lp->hacr |= HACR_INTRON;
155 hacr_write(ioaddr, lp->hacr);
156} /* wv_ints_on */
157
158/******************* MODEM MANAGEMENT SUBROUTINES *******************/
159/*
160 * Useful subroutines to manage the modem of the WaveLAN
161 */
162
163/*------------------------------------------------------------------*/
164/*
165 * Read the Parameter Storage Area from the WaveLAN card's memory
166 */
167/*
168 * Read bytes from the PSA.
169 */
170static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */
171 u8 * b, /* buffer to fill */
172 int n)
173{ /* size to read */
174 wv_16_off(ioaddr, hacr);
175
176 while (n-- > 0) {
177 outw(o, PIOR2(ioaddr));
178 o++;
179 *b++ = inb(PIOP2(ioaddr));
180 }
181
182 wv_16_on(ioaddr, hacr);
183} /* psa_read */
184
185/*------------------------------------------------------------------*/
186/*
187 * Write the Parameter Storage Area to the WaveLAN card's memory.
188 */
189static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */
190 u8 * b, /* Buffer in memory */
191 int n)
192{ /* Length of buffer */
193 int count = 0;
194
195 wv_16_off(ioaddr, hacr);
196
197 while (n-- > 0) {
198 outw(o, PIOR2(ioaddr));
199 o++;
200
201 outb(*b, PIOP2(ioaddr));
202 b++;
203
204 /* Wait for the memory to finish its write cycle */
205 count = 0;
206 while ((count++ < 100) &&
207 (hasr_read(ioaddr) & HASR_PSA_BUSY)) mdelay(1);
208 }
209
210 wv_16_on(ioaddr, hacr);
211} /* psa_write */
212
213#ifdef SET_PSA_CRC
214/*------------------------------------------------------------------*/
215/*
216 * Calculate the PSA CRC
217 * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code
218 * NOTE: By specifying a length including the CRC position the
219 * returned value should be zero. (i.e. a correct checksum in the PSA)
220 *
221 * The Windows drivers don't use the CRC, but the AP and the PtP tool
222 * depend on it.
223 */
224static u16 psa_crc(u8 * psa, /* The PSA */
225 int size)
226{ /* Number of short for CRC */
227 int byte_cnt; /* Loop on the PSA */
228 u16 crc_bytes = 0; /* Data in the PSA */
229 int bit_cnt; /* Loop on the bits of the short */
230
231 for (byte_cnt = 0; byte_cnt < size; byte_cnt++) {
232 crc_bytes ^= psa[byte_cnt]; /* Its an xor */
233
234 for (bit_cnt = 1; bit_cnt < 9; bit_cnt++) {
235 if (crc_bytes & 0x0001)
236 crc_bytes = (crc_bytes >> 1) ^ 0xA001;
237 else
238 crc_bytes >>= 1;
239 }
240 }
241
242 return crc_bytes;
243} /* psa_crc */
244#endif /* SET_PSA_CRC */
245
246/*------------------------------------------------------------------*/
247/*
248 * update the checksum field in the Wavelan's PSA
249 */
250static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u16 hacr)
251{
252#ifdef SET_PSA_CRC
253 psa_t psa;
254 u16 crc;
255
256 /* read the parameter storage area */
257 psa_read(ioaddr, hacr, 0, (unsigned char *) &psa, sizeof(psa));
258
259 /* update the checksum */
260 crc = psa_crc((unsigned char *) &psa,
261 sizeof(psa) - sizeof(psa.psa_crc[0]) -
262 sizeof(psa.psa_crc[1])
263 - sizeof(psa.psa_crc_status));
264
265 psa.psa_crc[0] = crc & 0xFF;
266 psa.psa_crc[1] = (crc & 0xFF00) >> 8;
267
268 /* Write it ! */
269 psa_write(ioaddr, hacr, (char *) &psa.psa_crc - (char *) &psa,
270 (unsigned char *) &psa.psa_crc, 2);
271
272#ifdef DEBUG_IOCTL_INFO
273 printk(KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n",
274 dev->name, psa.psa_crc[0], psa.psa_crc[1]);
275
276 /* Check again (luxury !) */
277 crc = psa_crc((unsigned char *) &psa,
278 sizeof(psa) - sizeof(psa.psa_crc_status));
279
280 if (crc != 0)
281 printk(KERN_WARNING
282 "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n",
283 dev->name);
284#endif /* DEBUG_IOCTL_INFO */
285#endif /* SET_PSA_CRC */
286} /* update_psa_checksum */
287
288/*------------------------------------------------------------------*/
289/*
290 * Write 1 byte to the MMC.
291 */
292static void mmc_out(unsigned long ioaddr, u16 o, u8 d)
293{
294 int count = 0;
295
296 /* Wait for MMC to go idle */
297 while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
298 udelay(10);
299
300 outw((u16) (((u16) d << 8) | (o << 1) | 1), MMCR(ioaddr));
301}
302
303/*------------------------------------------------------------------*/
304/*
305 * Routine to write bytes to the Modem Management Controller.
306 * We start at the end because it is the way it should be!
307 */
308static void mmc_write(unsigned long ioaddr, u8 o, u8 * b, int n)
309{
310 o += n;
311 b += n;
312
313 while (n-- > 0)
314 mmc_out(ioaddr, --o, *(--b));
315} /* mmc_write */
316
317/*------------------------------------------------------------------*/
318/*
319 * Read a byte from the MMC.
320 * Optimised version for 1 byte, avoid using memory.
321 */
322static u8 mmc_in(unsigned long ioaddr, u16 o)
323{
324 int count = 0;
325
326 while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
327 udelay(10);
328 outw(o << 1, MMCR(ioaddr));
329
330 while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
331 udelay(10);
332 return (u8) (inw(MMCR(ioaddr)) >> 8);
333}
334
335/*------------------------------------------------------------------*/
336/*
337 * Routine to read bytes from the Modem Management Controller.
338 * The implementation is complicated by a lack of address lines,
339 * which prevents decoding of the low-order bit.
340 * (code has just been moved in the above function)
341 * We start at the end because it is the way it should be!
342 */
343static inline void mmc_read(unsigned long ioaddr, u8 o, u8 * b, int n)
344{
345 o += n;
346 b += n;
347
348 while (n-- > 0)
349 *(--b) = mmc_in(ioaddr, --o);
350} /* mmc_read */
351
352/*------------------------------------------------------------------*/
353/*
354 * Get the type of encryption available.
355 */
356static inline int mmc_encr(unsigned long ioaddr)
357{ /* I/O port of the card */
358 int temp;
359
360 temp = mmc_in(ioaddr, mmroff(0, mmr_des_avail));
361 if ((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES))
362 return 0;
363 else
364 return temp;
365}
366
367/*------------------------------------------------------------------*/
368/*
369 * Wait for the frequency EEPROM to complete a command.
370 * I hope this one will be optimally inlined.
371 */
372static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */
373 int delay, /* Base delay to wait for */
374 int number)
375{ /* Number of time to wait */
376 int count = 0; /* Wait only a limited time */
377
378 while ((count++ < number) &&
379 (mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
380 MMR_FEE_STATUS_BUSY)) udelay(delay);
381}
382
383/*------------------------------------------------------------------*/
384/*
385 * Read bytes from the Frequency EEPROM (frequency select cards).
386 */
387static void fee_read(unsigned long ioaddr, /* I/O port of the card */
388 u16 o, /* destination offset */
389 u16 * b, /* data buffer */
390 int n)
391{ /* number of registers */
392 b += n; /* Position at the end of the area */
393
394 /* Write the address */
395 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
396
397 /* Loop on all buffer */
398 while (n-- > 0) {
399 /* Write the read command */
400 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
401 MMW_FEE_CTRL_READ);
402
403 /* Wait until EEPROM is ready (should be quick). */
404 fee_wait(ioaddr, 10, 100);
405
406 /* Read the value. */
407 *--b = ((mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)) << 8) |
408 mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
409 }
410}
411
412
413/*------------------------------------------------------------------*/
414/*
415 * Write bytes from the Frequency EEPROM (frequency select cards).
416 * This is a bit complicated, because the frequency EEPROM has to
417 * be unprotected and the write enabled.
418 * Jean II
419 */
420static void fee_write(unsigned long ioaddr, /* I/O port of the card */
421 u16 o, /* destination offset */
422 u16 * b, /* data buffer */
423 int n)
424{ /* number of registers */
425 b += n; /* Position at the end of the area. */
426
427#ifdef EEPROM_IS_PROTECTED /* disabled */
428#ifdef DOESNT_SEEM_TO_WORK /* disabled */
429 /* Ask to read the protected register */
430 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD);
431
432 fee_wait(ioaddr, 10, 100);
433
434 /* Read the protected register. */
435 printk("Protected 2: %02X-%02X\n",
436 mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)),
437 mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
438#endif /* DOESNT_SEEM_TO_WORK */
439
440 /* Enable protected register. */
441 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
442 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN);
443
444 fee_wait(ioaddr, 10, 100);
445
446 /* Unprotect area. */
447 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n);
448 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
449#ifdef DOESNT_SEEM_TO_WORK /* disabled */
450 /* or use: */
451 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR);
452#endif /* DOESNT_SEEM_TO_WORK */
453
454 fee_wait(ioaddr, 10, 100);
455#endif /* EEPROM_IS_PROTECTED */
456
457 /* Write enable. */
458 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
459 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN);
460
461 fee_wait(ioaddr, 10, 100);
462
463 /* Write the EEPROM address. */
464 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
465
466 /* Loop on all buffer */
467 while (n-- > 0) {
468 /* Write the value. */
469 mmc_out(ioaddr, mmwoff(0, mmw_fee_data_h), (*--b) >> 8);
470 mmc_out(ioaddr, mmwoff(0, mmw_fee_data_l), *b & 0xFF);
471
472 /* Write the write command. */
473 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
474 MMW_FEE_CTRL_WRITE);
475
476 /* WaveLAN documentation says to wait at least 10 ms for EEBUSY = 0 */
477 mdelay(10);
478 fee_wait(ioaddr, 10, 100);
479 }
480
481 /* Write disable. */
482 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS);
483 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS);
484
485 fee_wait(ioaddr, 10, 100);
486
487#ifdef EEPROM_IS_PROTECTED /* disabled */
488 /* Reprotect EEPROM. */
489 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x00);
490 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
491
492 fee_wait(ioaddr, 10, 100);
493#endif /* EEPROM_IS_PROTECTED */
494}
495
496/************************ I82586 SUBROUTINES *************************/
497/*
498 * Useful subroutines to manage the Ethernet controller
499 */
500
501/*------------------------------------------------------------------*/
502/*
503 * Read bytes from the on-board RAM.
504 * Why does inlining this function make it fail?
505 */
506static /*inline */ void obram_read(unsigned long ioaddr,
507 u16 o, u8 * b, int n)
508{
509 outw(o, PIOR1(ioaddr));
510 insw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
511}
512
513/*------------------------------------------------------------------*/
514/*
515 * Write bytes to the on-board RAM.
516 */
517static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n)
518{
519 outw(o, PIOR1(ioaddr));
520 outsw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
521}
522
523/*------------------------------------------------------------------*/
524/*
525 * Acknowledge the reading of the status issued by the i82586.
526 */
527static void wv_ack(struct net_device * dev)
528{
529 net_local *lp = netdev_priv(dev);
530 unsigned long ioaddr = dev->base_addr;
531 u16 scb_cs;
532 int i;
533
534 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
535 (unsigned char *) &scb_cs, sizeof(scb_cs));
536 scb_cs &= SCB_ST_INT;
537
538 if (scb_cs == 0)
539 return;
540
541 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
542 (unsigned char *) &scb_cs, sizeof(scb_cs));
543
544 set_chan_attn(ioaddr, lp->hacr);
545
546 for (i = 1000; i > 0; i--) {
547 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
548 (unsigned char *) &scb_cs, sizeof(scb_cs));
549 if (scb_cs == 0)
550 break;
551
552 udelay(10);
553 }
554 udelay(100);
555
556#ifdef DEBUG_CONFIG_ERROR
557 if (i <= 0)
558 printk(KERN_INFO
559 "%s: wv_ack(): board not accepting command.\n",
560 dev->name);
561#endif
562}
563
564/*------------------------------------------------------------------*/
565/*
566 * Set channel attention bit and busy wait until command has
567 * completed, then acknowledge completion of the command.
568 */
569static int wv_synchronous_cmd(struct net_device * dev, const char *str)
570{
571 net_local *lp = netdev_priv(dev);
572 unsigned long ioaddr = dev->base_addr;
573 u16 scb_cmd;
574 ach_t cb;
575 int i;
576
577 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
578 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
579 (unsigned char *) &scb_cmd, sizeof(scb_cmd));
580
581 set_chan_attn(ioaddr, lp->hacr);
582
583 for (i = 1000; i > 0; i--) {
584 obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb,
585 sizeof(cb));
586 if (cb.ac_status & AC_SFLD_C)
587 break;
588
589 udelay(10);
590 }
591 udelay(100);
592
593 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK)) {
594#ifdef DEBUG_CONFIG_ERROR
595 printk(KERN_INFO "%s: %s failed; status = 0x%x\n",
596 dev->name, str, cb.ac_status);
597#endif
598#ifdef DEBUG_I82586_SHOW
599 wv_scb_show(ioaddr);
600#endif
601 return -1;
602 }
603
604 /* Ack the status */
605 wv_ack(dev);
606
607 return 0;
608}
609
610/*------------------------------------------------------------------*/
611/*
612 * Configuration commands completion interrupt.
613 * Check if done, and if OK.
614 */
615static int
616wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
617{
618 unsigned short mcs_addr;
619 unsigned short status;
620 int ret;
621
622#ifdef DEBUG_INTERRUPT_TRACE
623 printk(KERN_DEBUG "%s: ->wv_config_complete()\n", dev->name);
624#endif
625
626 mcs_addr = lp->tx_first_in_use + sizeof(ac_tx_t) + sizeof(ac_nop_t)
627 + sizeof(tbd_t) + sizeof(ac_cfg_t) + sizeof(ac_ias_t);
628
629 /* Read the status of the last command (set mc list). */
630 obram_read(ioaddr, acoff(mcs_addr, ac_status),
631 (unsigned char *) &status, sizeof(status));
632
633 /* If not completed -> exit */
634 if ((status & AC_SFLD_C) == 0)
635 ret = 0; /* Not ready to be scrapped */
636 else {
637#ifdef DEBUG_CONFIG_ERROR
638 unsigned short cfg_addr;
639 unsigned short ias_addr;
640
641 /* Check mc_config command */
642 if ((status & AC_SFLD_OK) != AC_SFLD_OK)
643 printk(KERN_INFO
644 "%s: wv_config_complete(): set_multicast_address failed; status = 0x%x\n",
645 dev->name, status);
646
647 /* check ia-config command */
648 ias_addr = mcs_addr - sizeof(ac_ias_t);
649 obram_read(ioaddr, acoff(ias_addr, ac_status),
650 (unsigned char *) &status, sizeof(status));
651 if ((status & AC_SFLD_OK) != AC_SFLD_OK)
652 printk(KERN_INFO
653 "%s: wv_config_complete(): set_MAC_address failed; status = 0x%x\n",
654 dev->name, status);
655
656 /* Check config command. */
657 cfg_addr = ias_addr - sizeof(ac_cfg_t);
658 obram_read(ioaddr, acoff(cfg_addr, ac_status),
659 (unsigned char *) &status, sizeof(status));
660 if ((status & AC_SFLD_OK) != AC_SFLD_OK)
661 printk(KERN_INFO
662 "%s: wv_config_complete(): configure failed; status = 0x%x\n",
663 dev->name, status);
664#endif /* DEBUG_CONFIG_ERROR */
665
666 ret = 1; /* Ready to be scrapped */
667 }
668
669#ifdef DEBUG_INTERRUPT_TRACE
670 printk(KERN_DEBUG "%s: <-wv_config_complete() - %d\n", dev->name,
671 ret);
672#endif
673 return ret;
674}
675
676/*------------------------------------------------------------------*/
677/*
678 * Command completion interrupt.
679 * Reclaim as many freed tx buffers as we can.
680 * (called in wavelan_interrupt()).
681 * Note : the spinlock is already grabbed for us.
682 */
683static int wv_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
684{
685 int nreaped = 0;
686
687#ifdef DEBUG_INTERRUPT_TRACE
688 printk(KERN_DEBUG "%s: ->wv_complete()\n", dev->name);
689#endif
690
691 /* Loop on all the transmit buffers */
692 while (lp->tx_first_in_use != I82586NULL) {
693 unsigned short tx_status;
694
695 /* Read the first transmit buffer */
696 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status),
697 (unsigned char *) &tx_status,
698 sizeof(tx_status));
699
700 /* If not completed -> exit */
701 if ((tx_status & AC_SFLD_C) == 0)
702 break;
703
704 /* Hack for reconfiguration */
705 if (tx_status == 0xFFFF)
706 if (!wv_config_complete(dev, ioaddr, lp))
707 break; /* Not completed */
708
709 /* We now remove this buffer */
710 nreaped++;
711 --lp->tx_n_in_use;
712
713/*
714if (lp->tx_n_in_use > 0)
715 printk("%c", "0123456789abcdefghijk"[lp->tx_n_in_use]);
716*/
717
718 /* Was it the last one? */
719 if (lp->tx_n_in_use <= 0)
720 lp->tx_first_in_use = I82586NULL;
721 else {
722 /* Next one in the chain */
723 lp->tx_first_in_use += TXBLOCKZ;
724 if (lp->tx_first_in_use >=
725 OFFSET_CU +
726 NTXBLOCKS * TXBLOCKZ) lp->tx_first_in_use -=
727 NTXBLOCKS * TXBLOCKZ;
728 }
729
730 /* Hack for reconfiguration */
731 if (tx_status == 0xFFFF)
732 continue;
733
734 /* Now, check status of the finished command */
735 if (tx_status & AC_SFLD_OK) {
736 int ncollisions;
737
738 dev->stats.tx_packets++;
739 ncollisions = tx_status & AC_SFLD_MAXCOL;
740 dev->stats.collisions += ncollisions;
741#ifdef DEBUG_TX_INFO
742 if (ncollisions > 0)
743 printk(KERN_DEBUG
744 "%s: wv_complete(): tx completed after %d collisions.\n",
745 dev->name, ncollisions);
746#endif
747 } else {
748 dev->stats.tx_errors++;
749 if (tx_status & AC_SFLD_S10) {
750 dev->stats.tx_carrier_errors++;
751#ifdef DEBUG_TX_FAIL
752 printk(KERN_DEBUG
753 "%s: wv_complete(): tx error: no CS.\n",
754 dev->name);
755#endif
756 }
757 if (tx_status & AC_SFLD_S9) {
758 dev->stats.tx_carrier_errors++;
759#ifdef DEBUG_TX_FAIL
760 printk(KERN_DEBUG
761 "%s: wv_complete(): tx error: lost CTS.\n",
762 dev->name);
763#endif
764 }
765 if (tx_status & AC_SFLD_S8) {
766 dev->stats.tx_fifo_errors++;
767#ifdef DEBUG_TX_FAIL
768 printk(KERN_DEBUG
769 "%s: wv_complete(): tx error: slow DMA.\n",
770 dev->name);
771#endif
772 }
773 if (tx_status & AC_SFLD_S6) {
774 dev->stats.tx_heartbeat_errors++;
775#ifdef DEBUG_TX_FAIL
776 printk(KERN_DEBUG
777 "%s: wv_complete(): tx error: heart beat.\n",
778 dev->name);
779#endif
780 }
781 if (tx_status & AC_SFLD_S5) {
782 dev->stats.tx_aborted_errors++;
783#ifdef DEBUG_TX_FAIL
784 printk(KERN_DEBUG
785 "%s: wv_complete(): tx error: too many collisions.\n",
786 dev->name);
787#endif
788 }
789 }
790
791#ifdef DEBUG_TX_INFO
792 printk(KERN_DEBUG
793 "%s: wv_complete(): tx completed, tx_status 0x%04x\n",
794 dev->name, tx_status);
795#endif
796 }
797
798#ifdef DEBUG_INTERRUPT_INFO
799 if (nreaped > 1)
800 printk(KERN_DEBUG "%s: wv_complete(): reaped %d\n",
801 dev->name, nreaped);
802#endif
803
804 /*
805 * Inform upper layers.
806 */
807 if (lp->tx_n_in_use < NTXBLOCKS - 1) {
808 netif_wake_queue(dev);
809 }
810#ifdef DEBUG_INTERRUPT_TRACE
811 printk(KERN_DEBUG "%s: <-wv_complete()\n", dev->name);
812#endif
813 return nreaped;
814}
815
816/*------------------------------------------------------------------*/
817/*
818 * Reconfigure the i82586, or at least ask for it.
819 * Because wv_82586_config uses a transmission buffer, we must do it
820 * when we are sure that there is one left, so we do it now
821 * or in wavelan_packet_xmit() (I can't find any better place,
822 * wavelan_interrupt is not an option), so you may experience
823 * delays sometimes.
824 */
825static void wv_82586_reconfig(struct net_device * dev)
826{
827 net_local *lp = netdev_priv(dev);
828 unsigned long flags;
829
830 /* Arm the flag, will be cleard in wv_82586_config() */
831 lp->reconfig_82586 = 1;
832
833 /* Check if we can do it now ! */
834 if((netif_running(dev)) && !(netif_queue_stopped(dev))) {
835 spin_lock_irqsave(&lp->spinlock, flags);
836 /* May fail */
837 wv_82586_config(dev);
838 spin_unlock_irqrestore(&lp->spinlock, flags);
839 }
840 else {
841#ifdef DEBUG_CONFIG_INFO
842 printk(KERN_DEBUG
843 "%s: wv_82586_reconfig(): delayed (state = %lX)\n",
844 dev->name, dev->state);
845#endif
846 }
847}
848
849/********************* DEBUG & INFO SUBROUTINES *********************/
850/*
851 * This routine is used in the code to show information for debugging.
852 * Most of the time, it dumps the contents of hardware structures.
853 */
854
855#ifdef DEBUG_PSA_SHOW
856/*------------------------------------------------------------------*/
857/*
858 * Print the formatted contents of the Parameter Storage Area.
859 */
860static void wv_psa_show(psa_t * p)
861{
862 printk(KERN_DEBUG "##### WaveLAN PSA contents: #####\n");
863 printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n",
864 p->psa_io_base_addr_1,
865 p->psa_io_base_addr_2,
866 p->psa_io_base_addr_3, p->psa_io_base_addr_4);
867 printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n",
868 p->psa_rem_boot_addr_1,
869 p->psa_rem_boot_addr_2, p->psa_rem_boot_addr_3);
870 printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params);
871 printk("psa_int_req_no: %d\n", p->psa_int_req_no);
872#ifdef DEBUG_SHOW_UNUSED
873 printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0);
874#endif /* DEBUG_SHOW_UNUSED */
875 printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr);
876 printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr);
877 printk(KERN_DEBUG "psa_univ_local_sel: %d, ",
878 p->psa_univ_local_sel);
879 printk("psa_comp_number: %d, ", p->psa_comp_number);
880 printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set);
881 printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ",
882 p->psa_feature_select);
883 printk("psa_subband/decay_update_prm: %d\n", p->psa_subband);
884 printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr);
885 printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay);
886 printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0],
887 p->psa_nwid[1]);
888 printk("psa_nwid_select: %d\n", p->psa_nwid_select);
889 printk(KERN_DEBUG "psa_encryption_select: %d, ",
890 p->psa_encryption_select);
891 printk
892 ("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
893 p->psa_encryption_key[0], p->psa_encryption_key[1],
894 p->psa_encryption_key[2], p->psa_encryption_key[3],
895 p->psa_encryption_key[4], p->psa_encryption_key[5],
896 p->psa_encryption_key[6], p->psa_encryption_key[7]);
897 printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width);
898 printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ",
899 p->psa_call_code[0]);
900 printk
901 ("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
902 p->psa_call_code[0], p->psa_call_code[1], p->psa_call_code[2],
903 p->psa_call_code[3], p->psa_call_code[4], p->psa_call_code[5],
904 p->psa_call_code[6], p->psa_call_code[7]);
905#ifdef DEBUG_SHOW_UNUSED
906 printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n",
907 p->psa_reserved[0],
908 p->psa_reserved[1]);
909#endif /* DEBUG_SHOW_UNUSED */
910 printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status);
911 printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]);
912 printk("psa_crc_status: 0x%02x\n", p->psa_crc_status);
913} /* wv_psa_show */
914#endif /* DEBUG_PSA_SHOW */
915
916#ifdef DEBUG_MMC_SHOW
917/*------------------------------------------------------------------*/
918/*
919 * Print the formatted status of the Modem Management Controller.
920 * This function needs to be completed.
921 */
922static void wv_mmc_show(struct net_device * dev)
923{
924 unsigned long ioaddr = dev->base_addr;
925 net_local *lp = netdev_priv(dev);
926 mmr_t m;
927
928 /* Basic check */
929 if (hasr_read(ioaddr) & HASR_NO_CLK) {
930 printk(KERN_WARNING
931 "%s: wv_mmc_show: modem not connected\n",
932 dev->name);
933 return;
934 }
935
936 /* Read the mmc */
937 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
938 mmc_read(ioaddr, 0, (u8 *) & m, sizeof(m));
939 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
940
941 /* Don't forget to update statistics */
942 lp->wstats.discard.nwid +=
943 (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
944
945 printk(KERN_DEBUG "##### WaveLAN modem status registers: #####\n");
946#ifdef DEBUG_SHOW_UNUSED
947 printk(KERN_DEBUG
948 "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
949 m.mmr_unused0[0], m.mmr_unused0[1], m.mmr_unused0[2],
950 m.mmr_unused0[3], m.mmr_unused0[4], m.mmr_unused0[5],
951 m.mmr_unused0[6], m.mmr_unused0[7]);
952#endif /* DEBUG_SHOW_UNUSED */
953 printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n",
954 m.mmr_des_avail, m.mmr_des_status);
955#ifdef DEBUG_SHOW_UNUSED
956 printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n",
957 m.mmr_unused1[0],
958 m.mmr_unused1[1],
959 m.mmr_unused1[2], m.mmr_unused1[3], m.mmr_unused1[4]);
960#endif /* DEBUG_SHOW_UNUSED */
961 printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n",
962 m.mmr_dce_status,
963 (m.
964 mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ?
965 "energy detected," : "",
966 (m.
967 mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ?
968 "loop test indicated," : "",
969 (m.
970 mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ?
971 "transmitter on," : "",
972 (m.
973 mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ?
974 "jabber timer expired," : "");
975 printk(KERN_DEBUG "Dsp ID: %02X\n", m.mmr_dsp_id);
976#ifdef DEBUG_SHOW_UNUSED
977 printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n",
978 m.mmr_unused2[0], m.mmr_unused2[1]);
979#endif /* DEBUG_SHOW_UNUSED */
980 printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n",
981 (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l,
982 (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
983 printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n",
984 m.mmr_thr_pre_set & MMR_THR_PRE_SET,
985 (m.
986 mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" :
987 "below");
988 printk(KERN_DEBUG "signal_lvl: %d [%s], ",
989 m.mmr_signal_lvl & MMR_SIGNAL_LVL,
990 (m.
991 mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" :
992 "no new msg");
993 printk("silence_lvl: %d [%s], ",
994 m.mmr_silence_lvl & MMR_SILENCE_LVL,
995 (m.
996 mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" :
997 "no new update");
998 printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL,
999 (m.
1000 mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" :
1001 "Antenna 0");
1002#ifdef DEBUG_SHOW_UNUSED
1003 printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l);
1004#endif /* DEBUG_SHOW_UNUSED */
1005} /* wv_mmc_show */
1006#endif /* DEBUG_MMC_SHOW */
1007
1008#ifdef DEBUG_I82586_SHOW
1009/*------------------------------------------------------------------*/
1010/*
1011 * Print the last block of the i82586 memory.
1012 */
1013static void wv_scb_show(unsigned long ioaddr)
1014{
1015 scb_t scb;
1016
1017 obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
1018 sizeof(scb));
1019
1020 printk(KERN_DEBUG "##### WaveLAN system control block: #####\n");
1021
1022 printk(KERN_DEBUG "status: ");
1023 printk("stat 0x%x[%s%s%s%s] ",
1024 (scb.
1025 scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA |
1026 SCB_ST_RNR)) >> 12,
1027 (scb.
1028 scb_status & SCB_ST_CX) ? "command completion interrupt," :
1029 "", (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
1030 (scb.
1031 scb_status & SCB_ST_CNA) ? "command unit not active," : "",
1032 (scb.
1033 scb_status & SCB_ST_RNR) ? "receiving unit not ready," :
1034 "");
1035 printk("cus 0x%x[%s%s%s] ", (scb.scb_status & SCB_ST_CUS) >> 8,
1036 ((scb.scb_status & SCB_ST_CUS) ==
1037 SCB_ST_CUS_IDLE) ? "idle" : "",
1038 ((scb.scb_status & SCB_ST_CUS) ==
1039 SCB_ST_CUS_SUSP) ? "suspended" : "",
1040 ((scb.scb_status & SCB_ST_CUS) ==
1041 SCB_ST_CUS_ACTV) ? "active" : "");
1042 printk("rus 0x%x[%s%s%s%s]\n", (scb.scb_status & SCB_ST_RUS) >> 4,
1043 ((scb.scb_status & SCB_ST_RUS) ==
1044 SCB_ST_RUS_IDLE) ? "idle" : "",
1045 ((scb.scb_status & SCB_ST_RUS) ==
1046 SCB_ST_RUS_SUSP) ? "suspended" : "",
1047 ((scb.scb_status & SCB_ST_RUS) ==
1048 SCB_ST_RUS_NRES) ? "no resources" : "",
1049 ((scb.scb_status & SCB_ST_RUS) ==
1050 SCB_ST_RUS_RDY) ? "ready" : "");
1051
1052 printk(KERN_DEBUG "command: ");
1053 printk("ack 0x%x[%s%s%s%s] ",
1054 (scb.
1055 scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR |
1056 SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
1057 (scb.
1058 scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
1059 (scb.
1060 scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
1061 (scb.
1062 scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
1063 (scb.
1064 scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : "");
1065 printk("cuc 0x%x[%s%s%s%s%s] ",
1066 (scb.scb_command & SCB_CMD_CUC) >> 8,
1067 ((scb.scb_command & SCB_CMD_CUC) ==
1068 SCB_CMD_CUC_NOP) ? "nop" : "",
1069 ((scb.scb_command & SCB_CMD_CUC) ==
1070 SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
1071 ((scb.scb_command & SCB_CMD_CUC) ==
1072 SCB_CMD_CUC_RES) ? "resume execution" : "",
1073 ((scb.scb_command & SCB_CMD_CUC) ==
1074 SCB_CMD_CUC_SUS) ? "suspend execution" : "",
1075 ((scb.scb_command & SCB_CMD_CUC) ==
1076 SCB_CMD_CUC_ABT) ? "abort execution" : "");
1077 printk("ruc 0x%x[%s%s%s%s%s]\n",
1078 (scb.scb_command & SCB_CMD_RUC) >> 4,
1079 ((scb.scb_command & SCB_CMD_RUC) ==
1080 SCB_CMD_RUC_NOP) ? "nop" : "",
1081 ((scb.scb_command & SCB_CMD_RUC) ==
1082 SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
1083 ((scb.scb_command & SCB_CMD_RUC) ==
1084 SCB_CMD_RUC_RES) ? "resume reception" : "",
1085 ((scb.scb_command & SCB_CMD_RUC) ==
1086 SCB_CMD_RUC_SUS) ? "suspend reception" : "",
1087 ((scb.scb_command & SCB_CMD_RUC) ==
1088 SCB_CMD_RUC_ABT) ? "abort reception" : "");
1089
1090 printk(KERN_DEBUG "cbl_offset 0x%x ", scb.scb_cbl_offset);
1091 printk("rfa_offset 0x%x\n", scb.scb_rfa_offset);
1092
1093 printk(KERN_DEBUG "crcerrs %d ", scb.scb_crcerrs);
1094 printk("alnerrs %d ", scb.scb_alnerrs);
1095 printk("rscerrs %d ", scb.scb_rscerrs);
1096 printk("ovrnerrs %d\n", scb.scb_ovrnerrs);
1097}
1098
1099/*------------------------------------------------------------------*/
1100/*
1101 * Print the formatted status of the i82586's receive unit.
1102 */
1103static void wv_ru_show(struct net_device * dev)
1104{
1105 printk(KERN_DEBUG
1106 "##### WaveLAN i82586 receiver unit status: #####\n");
1107 printk(KERN_DEBUG "ru:");
1108 /*
1109 * Not implemented yet
1110 */
1111 printk("\n");
1112} /* wv_ru_show */
1113
1114/*------------------------------------------------------------------*/
1115/*
1116 * Display info about one control block of the i82586 memory.
1117 */
1118static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p)
1119{
1120 unsigned long ioaddr;
1121 ac_tx_t actx;
1122
1123 ioaddr = dev->base_addr;
1124
1125 printk("%d: 0x%x:", i, p);
1126
1127 obram_read(ioaddr, p, (unsigned char *) &actx, sizeof(actx));
1128 printk(" status=0x%x,", actx.tx_h.ac_status);
1129 printk(" command=0x%x,", actx.tx_h.ac_command);
1130
1131 /*
1132 {
1133 tbd_t tbd;
1134
1135 obram_read(ioaddr, actx.tx_tbd_offset, (unsigned char *)&tbd, sizeof(tbd));
1136 printk(" tbd_status=0x%x,", tbd.tbd_status);
1137 }
1138 */
1139
1140 printk("|");
1141}
1142
1143/*------------------------------------------------------------------*/
1144/*
1145 * Print status of the command unit of the i82586.
1146 */
1147static void wv_cu_show(struct net_device * dev)
1148{
1149 net_local *lp = netdev_priv(dev);
1150 unsigned int i;
1151 u16 p;
1152
1153 printk(KERN_DEBUG
1154 "##### WaveLAN i82586 command unit status: #####\n");
1155
1156 printk(KERN_DEBUG);
1157 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++) {
1158 wv_cu_show_one(dev, lp, i, p);
1159
1160 p += TXBLOCKZ;
1161 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1162 p -= NTXBLOCKS * TXBLOCKZ;
1163 }
1164 printk("\n");
1165}
1166#endif /* DEBUG_I82586_SHOW */
1167
1168#ifdef DEBUG_DEVICE_SHOW
1169/*------------------------------------------------------------------*/
1170/*
1171 * Print the formatted status of the WaveLAN PCMCIA device driver.
1172 */
1173static void wv_dev_show(struct net_device * dev)
1174{
1175 printk(KERN_DEBUG "dev:");
1176 printk(" state=%lX,", dev->state);
1177 printk(" trans_start=%ld,", dev->trans_start);
1178 printk(" flags=0x%x,", dev->flags);
1179 printk("\n");
1180} /* wv_dev_show */
1181
1182/*------------------------------------------------------------------*/
1183/*
1184 * Print the formatted status of the WaveLAN PCMCIA device driver's
1185 * private information.
1186 */
1187static void wv_local_show(struct net_device * dev)
1188{
1189 net_local *lp;
1190
1191 lp = netdev_priv(dev);
1192
1193 printk(KERN_DEBUG "local:");
1194 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
1195 printk(" hacr=0x%x,", lp->hacr);
1196 printk(" rx_head=0x%x,", lp->rx_head);
1197 printk(" rx_last=0x%x,", lp->rx_last);
1198 printk(" tx_first_free=0x%x,", lp->tx_first_free);
1199 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
1200 printk("\n");
1201} /* wv_local_show */
1202#endif /* DEBUG_DEVICE_SHOW */
1203
1204#if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO)
1205/*------------------------------------------------------------------*/
1206/*
1207 * Dump packet header (and content if necessary) on the screen
1208 */
1209static inline void wv_packet_info(u8 * p, /* Packet to dump */
1210 int length, /* Length of the packet */
1211 char *msg1, /* Name of the device */
1212 char *msg2)
1213{ /* Name of the function */
1214 int i;
1215 int maxi;
1216
1217 printk(KERN_DEBUG
1218 "%s: %s(): dest %pM, length %d\n",
1219 msg1, msg2, p, length);
1220 printk(KERN_DEBUG
1221 "%s: %s(): src %pM, type 0x%02X%02X\n",
1222 msg1, msg2, &p[6], p[12], p[13]);
1223
1224#ifdef DEBUG_PACKET_DUMP
1225
1226 printk(KERN_DEBUG "data=\"");
1227
1228 if ((maxi = length) > DEBUG_PACKET_DUMP)
1229 maxi = DEBUG_PACKET_DUMP;
1230 for (i = 14; i < maxi; i++)
1231 if (p[i] >= ' ' && p[i] <= '~')
1232 printk(" %c", p[i]);
1233 else
1234 printk("%02X", p[i]);
1235 if (maxi < length)
1236 printk("..");
1237 printk("\"\n");
1238 printk(KERN_DEBUG "\n");
1239#endif /* DEBUG_PACKET_DUMP */
1240}
1241#endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */
1242
1243/*------------------------------------------------------------------*/
1244/*
1245 * This is the information which is displayed by the driver at startup.
1246 * There are lots of flags for configuring it to your liking.
1247 */
1248static void wv_init_info(struct net_device * dev)
1249{
1250 short ioaddr = dev->base_addr;
1251 net_local *lp = netdev_priv(dev);
1252 psa_t psa;
1253
1254 /* Read the parameter storage area */
1255 psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
1256
1257#ifdef DEBUG_PSA_SHOW
1258 wv_psa_show(&psa);
1259#endif
1260#ifdef DEBUG_MMC_SHOW
1261 wv_mmc_show(dev);
1262#endif
1263#ifdef DEBUG_I82586_SHOW
1264 wv_cu_show(dev);
1265#endif
1266
1267#ifdef DEBUG_BASIC_SHOW
1268 /* Now, let's go for the basic stuff. */
1269 printk(KERN_NOTICE "%s: WaveLAN at %#x, %pM, IRQ %d",
1270 dev->name, ioaddr, dev->dev_addr, dev->irq);
1271
1272 /* Print current network ID. */
1273 if (psa.psa_nwid_select)
1274 printk(", nwid 0x%02X-%02X", psa.psa_nwid[0],
1275 psa.psa_nwid[1]);
1276 else
1277 printk(", nwid off");
1278
1279 /* If 2.00 card */
1280 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
1281 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
1282 unsigned short freq;
1283
1284 /* Ask the EEPROM to read the frequency from the first area. */
1285 fee_read(ioaddr, 0x00, &freq, 1);
1286
1287 /* Print frequency */
1288 printk(", 2.00, %ld", (freq >> 6) + 2400L);
1289
1290 /* Hack! */
1291 if (freq & 0x20)
1292 printk(".5");
1293 } else {
1294 printk(", PC");
1295 switch (psa.psa_comp_number) {
1296 case PSA_COMP_PC_AT_915:
1297 case PSA_COMP_PC_AT_2400:
1298 printk("-AT");
1299 break;
1300 case PSA_COMP_PC_MC_915:
1301 case PSA_COMP_PC_MC_2400:
1302 printk("-MC");
1303 break;
1304 case PSA_COMP_PCMCIA_915:
1305 printk("MCIA");
1306 break;
1307 default:
1308 printk("?");
1309 }
1310 printk(", ");
1311 switch (psa.psa_subband) {
1312 case PSA_SUBBAND_915:
1313 printk("915");
1314 break;
1315 case PSA_SUBBAND_2425:
1316 printk("2425");
1317 break;
1318 case PSA_SUBBAND_2460:
1319 printk("2460");
1320 break;
1321 case PSA_SUBBAND_2484:
1322 printk("2484");
1323 break;
1324 case PSA_SUBBAND_2430_5:
1325 printk("2430.5");
1326 break;
1327 default:
1328 printk("?");
1329 }
1330 }
1331
1332 printk(" MHz\n");
1333#endif /* DEBUG_BASIC_SHOW */
1334
1335#ifdef DEBUG_VERSION_SHOW
1336 /* Print version information */
1337 printk(KERN_NOTICE "%s", version);
1338#endif
1339} /* wv_init_info */
1340
1341/********************* IOCTL, STATS & RECONFIG *********************/
1342/*
1343 * We found here routines that are called by Linux on different
1344 * occasions after the configuration and not for transmitting data
1345 * These may be called when the user use ifconfig, /proc/net/dev
1346 * or wireless extensions
1347 */
1348
1349
1350/*------------------------------------------------------------------*/
1351/*
1352 * Set or clear the multicast filter for this adaptor.
1353 * num_addrs == -1 Promiscuous mode, receive all packets
1354 * num_addrs == 0 Normal mode, clear multicast list
1355 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1356 * and do best-effort filtering.
1357 */
1358static void wavelan_set_multicast_list(struct net_device * dev)
1359{
1360 net_local *lp = netdev_priv(dev);
1361
1362#ifdef DEBUG_IOCTL_TRACE
1363 printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n",
1364 dev->name);
1365#endif
1366
1367#ifdef DEBUG_IOCTL_INFO
1368 printk(KERN_DEBUG
1369 "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n",
1370 dev->name, dev->flags, netdev_mc_count(dev));
1371#endif
1372
1373 /* Are we asking for promiscuous mode,
1374 * or all multicast addresses (we don't have that!)
1375 * or too many multicast addresses for the hardware filter? */
1376 if ((dev->flags & IFF_PROMISC) ||
1377 (dev->flags & IFF_ALLMULTI) ||
1378 (netdev_mc_count(dev) > I82586_MAX_MULTICAST_ADDRESSES)) {
1379 /*
1380 * Enable promiscuous mode: receive all packets.
1381 */
1382 if (!lp->promiscuous) {
1383 lp->promiscuous = 1;
1384 lp->mc_count = 0;
1385
1386 wv_82586_reconfig(dev);
1387 }
1388 } else
1389 /* Are there multicast addresses to send? */
1390 if (!netdev_mc_empty(dev)) {
1391 /*
1392 * Disable promiscuous mode, but receive all packets
1393 * in multicast list
1394 */
1395#ifdef MULTICAST_AVOID
1396 if (lp->promiscuous || (netdev_mc_count(dev) != lp->mc_count))
1397#endif
1398 {
1399 lp->promiscuous = 0;
1400 lp->mc_count = netdev_mc_count(dev);
1401
1402 wv_82586_reconfig(dev);
1403 }
1404 } else {
1405 /*
1406 * Switch to normal mode: disable promiscuous mode and
1407 * clear the multicast list.
1408 */
1409 if (lp->promiscuous || lp->mc_count == 0) {
1410 lp->promiscuous = 0;
1411 lp->mc_count = 0;
1412
1413 wv_82586_reconfig(dev);
1414 }
1415 }
1416#ifdef DEBUG_IOCTL_TRACE
1417 printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n",
1418 dev->name);
1419#endif
1420}
1421
1422/*------------------------------------------------------------------*/
1423/*
1424 * This function doesn't exist.
1425 * (Note : it was a nice way to test the reconfigure stuff...)
1426 */
1427#ifdef SET_MAC_ADDRESS
1428static int wavelan_set_mac_address(struct net_device * dev, void *addr)
1429{
1430 struct sockaddr *mac = addr;
1431
1432 /* Copy the address. */
1433 memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE);
1434
1435 /* Reconfigure the beast. */
1436 wv_82586_reconfig(dev);
1437
1438 return 0;
1439}
1440#endif /* SET_MAC_ADDRESS */
1441
1442
1443/*------------------------------------------------------------------*/
1444/*
1445 * Frequency setting (for hardware capable of it)
1446 * It's a bit complicated and you don't really want to look into it.
1447 * (called in wavelan_ioctl)
1448 */
1449static int wv_set_frequency(unsigned long ioaddr, /* I/O port of the card */
1450 iw_freq * frequency)
1451{
1452 const int BAND_NUM = 10; /* Number of bands */
1453 long freq = 0L; /* offset to 2.4 GHz in .5 MHz */
1454#ifdef DEBUG_IOCTL_INFO
1455 int i;
1456#endif
1457
1458 /* Setting by frequency */
1459 /* Theoretically, you may set any frequency between
1460 * the two limits with a 0.5 MHz precision. In practice,
1461 * I don't want you to have trouble with local regulations.
1462 */
1463 if ((frequency->e == 1) &&
1464 (frequency->m >= (int) 2.412e8)
1465 && (frequency->m <= (int) 2.487e8)) {
1466 freq = ((frequency->m / 10000) - 24000L) / 5;
1467 }
1468
1469 /* Setting by channel (same as wfreqsel) */
1470 /* Warning: each channel is 22 MHz wide, so some of the channels
1471 * will interfere. */
1472 if ((frequency->e == 0) && (frequency->m < BAND_NUM)) {
1473 /* Get frequency offset. */
1474 freq = channel_bands[frequency->m] >> 1;
1475 }
1476
1477 /* Verify that the frequency is allowed. */
1478 if (freq != 0L) {
1479 u16 table[10]; /* Authorized frequency table */
1480
1481 /* Read the frequency table. */
1482 fee_read(ioaddr, 0x71, table, 10);
1483
1484#ifdef DEBUG_IOCTL_INFO
1485 printk(KERN_DEBUG "Frequency table: ");
1486 for (i = 0; i < 10; i++) {
1487 printk(" %04X", table[i]);
1488 }
1489 printk("\n");
1490#endif
1491
1492 /* Look in the table to see whether the frequency is allowed. */
1493 if (!(table[9 - ((freq - 24) / 16)] &
1494 (1 << ((freq - 24) % 16)))) return -EINVAL; /* not allowed */
1495 } else
1496 return -EINVAL;
1497
1498 /* if we get a usable frequency */
1499 if (freq != 0L) {
1500 unsigned short area[16];
1501 unsigned short dac[2];
1502 unsigned short area_verify[16];
1503 unsigned short dac_verify[2];
1504 /* Corresponding gain (in the power adjust value table)
1505 * See AT&T WaveLAN Data Manual, REF 407-024689/E, page 3-8
1506 * and WCIN062D.DOC, page 6.2.9. */
1507 unsigned short power_limit[] = { 40, 80, 120, 160, 0 };
1508 int power_band = 0; /* Selected band */
1509 unsigned short power_adjust; /* Correct value */
1510
1511 /* Search for the gain. */
1512 power_band = 0;
1513 while ((freq > power_limit[power_band]) &&
1514 (power_limit[++power_band] != 0));
1515
1516 /* Read the first area. */
1517 fee_read(ioaddr, 0x00, area, 16);
1518
1519 /* Read the DAC. */
1520 fee_read(ioaddr, 0x60, dac, 2);
1521
1522 /* Read the new power adjust value. */
1523 fee_read(ioaddr, 0x6B - (power_band >> 1), &power_adjust,
1524 1);
1525 if (power_band & 0x1)
1526 power_adjust >>= 8;
1527 else
1528 power_adjust &= 0xFF;
1529
1530#ifdef DEBUG_IOCTL_INFO
1531 printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
1532 for (i = 0; i < 16; i++) {
1533 printk(" %04X", area[i]);
1534 }
1535 printk("\n");
1536
1537 printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
1538 dac[0], dac[1]);
1539#endif
1540
1541 /* Frequency offset (for info only) */
1542 area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F);
1543
1544 /* Receiver Principle main divider coefficient */
1545 area[3] = (freq >> 1) + 2400L - 352L;
1546 area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1547
1548 /* Transmitter Main divider coefficient */
1549 area[13] = (freq >> 1) + 2400L;
1550 area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1551
1552 /* Other parts of the area are flags, bit streams or unused. */
1553
1554 /* Set the value in the DAC. */
1555 dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80);
1556 dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF);
1557
1558 /* Write the first area. */
1559 fee_write(ioaddr, 0x00, area, 16);
1560
1561 /* Write the DAC. */
1562 fee_write(ioaddr, 0x60, dac, 2);
1563
1564 /* We now should verify here that the writing of the EEPROM went OK. */
1565
1566 /* Reread the first area. */
1567 fee_read(ioaddr, 0x00, area_verify, 16);
1568
1569 /* Reread the DAC. */
1570 fee_read(ioaddr, 0x60, dac_verify, 2);
1571
1572 /* Compare. */
1573 if (memcmp(area, area_verify, 16 * 2) ||
1574 memcmp(dac, dac_verify, 2 * 2)) {
1575#ifdef DEBUG_IOCTL_ERROR
1576 printk(KERN_INFO
1577 "WaveLAN: wv_set_frequency: unable to write new frequency to EEPROM(?).\n");
1578#endif
1579 return -EOPNOTSUPP;
1580 }
1581
1582 /* We must download the frequency parameters to the
1583 * synthesizers (from the EEPROM - area 1)
1584 * Note: as the EEPROM is automatically decremented, we set the end
1585 * if the area... */
1586 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x0F);
1587 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
1588 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1589
1590 /* Wait until the download is finished. */
1591 fee_wait(ioaddr, 100, 100);
1592
1593 /* We must now download the power adjust value (gain) to
1594 * the synthesizers (from the EEPROM - area 7 - DAC). */
1595 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x61);
1596 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
1597 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1598
1599 /* Wait for the download to finish. */
1600 fee_wait(ioaddr, 100, 100);
1601
1602#ifdef DEBUG_IOCTL_INFO
1603 /* Verification of what we have done */
1604
1605 printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
1606 for (i = 0; i < 16; i++) {
1607 printk(" %04X", area_verify[i]);
1608 }
1609 printk("\n");
1610
1611 printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
1612 dac_verify[0], dac_verify[1]);
1613#endif
1614
1615 return 0;
1616 } else
1617 return -EINVAL; /* Bah, never get there... */
1618}
1619
1620/*------------------------------------------------------------------*/
1621/*
1622 * Give the list of available frequencies.
1623 */
1624static int wv_frequency_list(unsigned long ioaddr, /* I/O port of the card */
1625 iw_freq * list, /* List of frequencies to fill */
1626 int max)
1627{ /* Maximum number of frequencies */
1628 u16 table[10]; /* Authorized frequency table */
1629 long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */
1630 int i; /* index in the table */
1631 int c = 0; /* Channel number */
1632
1633 /* Read the frequency table. */
1634 fee_read(ioaddr, 0x71 /* frequency table */ , table, 10);
1635
1636 /* Check all frequencies. */
1637 i = 0;
1638 for (freq = 0; freq < 150; freq++)
1639 /* Look in the table if the frequency is allowed */
1640 if (table[9 - (freq / 16)] & (1 << (freq % 16))) {
1641 /* Compute approximate channel number */
1642 while ((c < ARRAY_SIZE(channel_bands)) &&
1643 (((channel_bands[c] >> 1) - 24) < freq))
1644 c++;
1645 list[i].i = c; /* Set the list index */
1646
1647 /* put in the list */
1648 list[i].m = (((freq + 24) * 5) + 24000L) * 10000;
1649 list[i++].e = 1;
1650
1651 /* Check number. */
1652 if (i >= max)
1653 return (i);
1654 }
1655
1656 return (i);
1657}
1658
1659#ifdef IW_WIRELESS_SPY
1660/*------------------------------------------------------------------*/
1661/*
1662 * Gather wireless spy statistics: for each packet, compare the source
1663 * address with our list, and if they match, get the statistics.
1664 * Sorry, but this function really needs the wireless extensions.
1665 */
1666static inline void wl_spy_gather(struct net_device * dev,
1667 u8 * mac, /* MAC address */
1668 u8 * stats) /* Statistics to gather */
1669{
1670 struct iw_quality wstats;
1671
1672 wstats.qual = stats[2] & MMR_SGNL_QUAL;
1673 wstats.level = stats[0] & MMR_SIGNAL_LVL;
1674 wstats.noise = stats[1] & MMR_SILENCE_LVL;
1675 wstats.updated = 0x7;
1676
1677 /* Update spy records */
1678 wireless_spy_update(dev, mac, &wstats);
1679}
1680#endif /* IW_WIRELESS_SPY */
1681
1682#ifdef HISTOGRAM
1683/*------------------------------------------------------------------*/
1684/*
1685 * This function calculates a histogram of the signal level.
1686 * As the noise is quite constant, it's like doing it on the SNR.
1687 * We have defined a set of interval (lp->his_range), and each time
1688 * the level goes in that interval, we increment the count (lp->his_sum).
1689 * With this histogram you may detect if one WaveLAN is really weak,
1690 * or you may also calculate the mean and standard deviation of the level.
1691 */
1692static inline void wl_his_gather(struct net_device * dev, u8 * stats)
1693{ /* Statistics to gather */
1694 net_local *lp = netdev_priv(dev);
1695 u8 level = stats[0] & MMR_SIGNAL_LVL;
1696 int i;
1697
1698 /* Find the correct interval. */
1699 i = 0;
1700 while ((i < (lp->his_number - 1))
1701 && (level >= lp->his_range[i++]));
1702
1703 /* Increment interval counter. */
1704 (lp->his_sum[i])++;
1705}
1706#endif /* HISTOGRAM */
1707
1708/*------------------------------------------------------------------*/
1709/*
1710 * Wireless Handler : get protocol name
1711 */
1712static int wavelan_get_name(struct net_device *dev,
1713 struct iw_request_info *info,
1714 union iwreq_data *wrqu,
1715 char *extra)
1716{
1717 strcpy(wrqu->name, "WaveLAN");
1718 return 0;
1719}
1720
1721/*------------------------------------------------------------------*/
1722/*
1723 * Wireless Handler : set NWID
1724 */
1725static int wavelan_set_nwid(struct net_device *dev,
1726 struct iw_request_info *info,
1727 union iwreq_data *wrqu,
1728 char *extra)
1729{
1730 unsigned long ioaddr = dev->base_addr;
1731 net_local *lp = netdev_priv(dev); /* lp is not unused */
1732 psa_t psa;
1733 mm_t m;
1734 unsigned long flags;
1735 int ret = 0;
1736
1737 /* Disable interrupts and save flags. */
1738 spin_lock_irqsave(&lp->spinlock, flags);
1739
1740 /* Set NWID in WaveLAN. */
1741 if (!wrqu->nwid.disabled) {
1742 /* Set NWID in psa */
1743 psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8;
1744 psa.psa_nwid[1] = wrqu->nwid.value & 0xFF;
1745 psa.psa_nwid_select = 0x01;
1746 psa_write(ioaddr, lp->hacr,
1747 (char *) psa.psa_nwid - (char *) &psa,
1748 (unsigned char *) psa.psa_nwid, 3);
1749
1750 /* Set NWID in mmc. */
1751 m.w.mmw_netw_id_l = psa.psa_nwid[1];
1752 m.w.mmw_netw_id_h = psa.psa_nwid[0];
1753 mmc_write(ioaddr,
1754 (char *) &m.w.mmw_netw_id_l -
1755 (char *) &m,
1756 (unsigned char *) &m.w.mmw_netw_id_l, 2);
1757 mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), 0x00);
1758 } else {
1759 /* Disable NWID in the psa. */
1760 psa.psa_nwid_select = 0x00;
1761 psa_write(ioaddr, lp->hacr,
1762 (char *) &psa.psa_nwid_select -
1763 (char *) &psa,
1764 (unsigned char *) &psa.psa_nwid_select,
1765 1);
1766
1767 /* Disable NWID in the mmc (no filtering). */
1768 mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel),
1769 MMW_LOOPT_SEL_DIS_NWID);
1770 }
1771 /* update the Wavelan checksum */
1772 update_psa_checksum(dev, ioaddr, lp->hacr);
1773
1774 /* Enable interrupts and restore flags. */
1775 spin_unlock_irqrestore(&lp->spinlock, flags);
1776
1777 return ret;
1778}
1779
1780/*------------------------------------------------------------------*/
1781/*
1782 * Wireless Handler : get NWID
1783 */
1784static int wavelan_get_nwid(struct net_device *dev,
1785 struct iw_request_info *info,
1786 union iwreq_data *wrqu,
1787 char *extra)
1788{
1789 unsigned long ioaddr = dev->base_addr;
1790 net_local *lp = netdev_priv(dev); /* lp is not unused */
1791 psa_t psa;
1792 unsigned long flags;
1793 int ret = 0;
1794
1795 /* Disable interrupts and save flags. */
1796 spin_lock_irqsave(&lp->spinlock, flags);
1797
1798 /* Read the NWID. */
1799 psa_read(ioaddr, lp->hacr,
1800 (char *) psa.psa_nwid - (char *) &psa,
1801 (unsigned char *) psa.psa_nwid, 3);
1802 wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1];
1803 wrqu->nwid.disabled = !(psa.psa_nwid_select);
1804 wrqu->nwid.fixed = 1; /* Superfluous */
1805
1806 /* Enable interrupts and restore flags. */
1807 spin_unlock_irqrestore(&lp->spinlock, flags);
1808
1809 return ret;
1810}
1811
1812/*------------------------------------------------------------------*/
1813/*
1814 * Wireless Handler : set frequency
1815 */
1816static int wavelan_set_freq(struct net_device *dev,
1817 struct iw_request_info *info,
1818 union iwreq_data *wrqu,
1819 char *extra)
1820{
1821 unsigned long ioaddr = dev->base_addr;
1822 net_local *lp = netdev_priv(dev); /* lp is not unused */
1823 unsigned long flags;
1824 int ret;
1825
1826 /* Disable interrupts and save flags. */
1827 spin_lock_irqsave(&lp->spinlock, flags);
1828
1829 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
1830 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
1831 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
1832 ret = wv_set_frequency(ioaddr, &(wrqu->freq));
1833 else
1834 ret = -EOPNOTSUPP;
1835
1836 /* Enable interrupts and restore flags. */
1837 spin_unlock_irqrestore(&lp->spinlock, flags);
1838
1839 return ret;
1840}
1841
1842/*------------------------------------------------------------------*/
1843/*
1844 * Wireless Handler : get frequency
1845 */
1846static int wavelan_get_freq(struct net_device *dev,
1847 struct iw_request_info *info,
1848 union iwreq_data *wrqu,
1849 char *extra)
1850{
1851 unsigned long ioaddr = dev->base_addr;
1852 net_local *lp = netdev_priv(dev); /* lp is not unused */
1853 psa_t psa;
1854 unsigned long flags;
1855 int ret = 0;
1856
1857 /* Disable interrupts and save flags. */
1858 spin_lock_irqsave(&lp->spinlock, flags);
1859
1860 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable).
1861 * Does it work for everybody, especially old cards? */
1862 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
1863 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
1864 unsigned short freq;
1865
1866 /* Ask the EEPROM to read the frequency from the first area. */
1867 fee_read(ioaddr, 0x00, &freq, 1);
1868 wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000;
1869 wrqu->freq.e = 1;
1870 } else {
1871 psa_read(ioaddr, lp->hacr,
1872 (char *) &psa.psa_subband - (char *) &psa,
1873 (unsigned char *) &psa.psa_subband, 1);
1874
1875 if (psa.psa_subband <= 4) {
1876 wrqu->freq.m = fixed_bands[psa.psa_subband];
1877 wrqu->freq.e = (psa.psa_subband != 0);
1878 } else
1879 ret = -EOPNOTSUPP;
1880 }
1881
1882 /* Enable interrupts and restore flags. */
1883 spin_unlock_irqrestore(&lp->spinlock, flags);
1884
1885 return ret;
1886}
1887
1888/*------------------------------------------------------------------*/
1889/*
1890 * Wireless Handler : set level threshold
1891 */
1892static int wavelan_set_sens(struct net_device *dev,
1893 struct iw_request_info *info,
1894 union iwreq_data *wrqu,
1895 char *extra)
1896{
1897 unsigned long ioaddr = dev->base_addr;
1898 net_local *lp = netdev_priv(dev); /* lp is not unused */
1899 psa_t psa;
1900 unsigned long flags;
1901 int ret = 0;
1902
1903 /* Disable interrupts and save flags. */
1904 spin_lock_irqsave(&lp->spinlock, flags);
1905
1906 /* Set the level threshold. */
1907 /* We should complain loudly if wrqu->sens.fixed = 0, because we
1908 * can't set auto mode... */
1909 psa.psa_thr_pre_set = wrqu->sens.value & 0x3F;
1910 psa_write(ioaddr, lp->hacr,
1911 (char *) &psa.psa_thr_pre_set - (char *) &psa,
1912 (unsigned char *) &psa.psa_thr_pre_set, 1);
1913 /* update the Wavelan checksum */
1914 update_psa_checksum(dev, ioaddr, lp->hacr);
1915 mmc_out(ioaddr, mmwoff(0, mmw_thr_pre_set),
1916 psa.psa_thr_pre_set);
1917
1918 /* Enable interrupts and restore flags. */
1919 spin_unlock_irqrestore(&lp->spinlock, flags);
1920
1921 return ret;
1922}
1923
1924/*------------------------------------------------------------------*/
1925/*
1926 * Wireless Handler : get level threshold
1927 */
1928static int wavelan_get_sens(struct net_device *dev,
1929 struct iw_request_info *info,
1930 union iwreq_data *wrqu,
1931 char *extra)
1932{
1933 unsigned long ioaddr = dev->base_addr;
1934 net_local *lp = netdev_priv(dev); /* lp is not unused */
1935 psa_t psa;
1936 unsigned long flags;
1937 int ret = 0;
1938
1939 /* Disable interrupts and save flags. */
1940 spin_lock_irqsave(&lp->spinlock, flags);
1941
1942 /* Read the level threshold. */
1943 psa_read(ioaddr, lp->hacr,
1944 (char *) &psa.psa_thr_pre_set - (char *) &psa,
1945 (unsigned char *) &psa.psa_thr_pre_set, 1);
1946 wrqu->sens.value = psa.psa_thr_pre_set & 0x3F;
1947 wrqu->sens.fixed = 1;
1948
1949 /* Enable interrupts and restore flags. */
1950 spin_unlock_irqrestore(&lp->spinlock, flags);
1951
1952 return ret;
1953}
1954
1955/*------------------------------------------------------------------*/
1956/*
1957 * Wireless Handler : set encryption key
1958 */
1959static int wavelan_set_encode(struct net_device *dev,
1960 struct iw_request_info *info,
1961 union iwreq_data *wrqu,
1962 char *extra)
1963{
1964 unsigned long ioaddr = dev->base_addr;
1965 net_local *lp = netdev_priv(dev); /* lp is not unused */
1966 unsigned long flags;
1967 psa_t psa;
1968 int ret = 0;
1969
1970 /* Disable interrupts and save flags. */
1971 spin_lock_irqsave(&lp->spinlock, flags);
1972
1973 /* Check if capable of encryption */
1974 if (!mmc_encr(ioaddr)) {
1975 ret = -EOPNOTSUPP;
1976 }
1977
1978 /* Check the size of the key */
1979 if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) {
1980 ret = -EINVAL;
1981 }
1982
1983 if(!ret) {
1984 /* Basic checking... */
1985 if (wrqu->encoding.length == 8) {
1986 /* Copy the key in the driver */
1987 memcpy(psa.psa_encryption_key, extra,
1988 wrqu->encoding.length);
1989 psa.psa_encryption_select = 1;
1990
1991 psa_write(ioaddr, lp->hacr,
1992 (char *) &psa.psa_encryption_select -
1993 (char *) &psa,
1994 (unsigned char *) &psa.
1995 psa_encryption_select, 8 + 1);
1996
1997 mmc_out(ioaddr, mmwoff(0, mmw_encr_enable),
1998 MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE);
1999 mmc_write(ioaddr, mmwoff(0, mmw_encr_key),
2000 (unsigned char *) &psa.
2001 psa_encryption_key, 8);
2002 }
2003
2004 /* disable encryption */
2005 if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
2006 psa.psa_encryption_select = 0;
2007 psa_write(ioaddr, lp->hacr,
2008 (char *) &psa.psa_encryption_select -
2009 (char *) &psa,
2010 (unsigned char *) &psa.
2011 psa_encryption_select, 1);
2012
2013 mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), 0);
2014 }
2015 /* update the Wavelan checksum */
2016 update_psa_checksum(dev, ioaddr, lp->hacr);
2017 }
2018
2019 /* Enable interrupts and restore flags. */
2020 spin_unlock_irqrestore(&lp->spinlock, flags);
2021
2022 return ret;
2023}
2024
2025/*------------------------------------------------------------------*/
2026/*
2027 * Wireless Handler : get encryption key
2028 */
2029static int wavelan_get_encode(struct net_device *dev,
2030 struct iw_request_info *info,
2031 union iwreq_data *wrqu,
2032 char *extra)
2033{
2034 unsigned long ioaddr = dev->base_addr;
2035 net_local *lp = netdev_priv(dev); /* lp is not unused */
2036 psa_t psa;
2037 unsigned long flags;
2038 int ret = 0;
2039
2040 /* Disable interrupts and save flags. */
2041 spin_lock_irqsave(&lp->spinlock, flags);
2042
2043 /* Check if encryption is available */
2044 if (!mmc_encr(ioaddr)) {
2045 ret = -EOPNOTSUPP;
2046 } else {
2047 /* Read the encryption key */
2048 psa_read(ioaddr, lp->hacr,
2049 (char *) &psa.psa_encryption_select -
2050 (char *) &psa,
2051 (unsigned char *) &psa.
2052 psa_encryption_select, 1 + 8);
2053
2054 /* encryption is enabled ? */
2055 if (psa.psa_encryption_select)
2056 wrqu->encoding.flags = IW_ENCODE_ENABLED;
2057 else
2058 wrqu->encoding.flags = IW_ENCODE_DISABLED;
2059 wrqu->encoding.flags |= mmc_encr(ioaddr);
2060
2061 /* Copy the key to the user buffer */
2062 wrqu->encoding.length = 8;
2063 memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length);
2064 }
2065
2066 /* Enable interrupts and restore flags. */
2067 spin_unlock_irqrestore(&lp->spinlock, flags);
2068
2069 return ret;
2070}
2071
2072/*------------------------------------------------------------------*/
2073/*
2074 * Wireless Handler : get range info
2075 */
2076static int wavelan_get_range(struct net_device *dev,
2077 struct iw_request_info *info,
2078 union iwreq_data *wrqu,
2079 char *extra)
2080{
2081 unsigned long ioaddr = dev->base_addr;
2082 net_local *lp = netdev_priv(dev); /* lp is not unused */
2083 struct iw_range *range = (struct iw_range *) extra;
2084 unsigned long flags;
2085 int ret = 0;
2086
2087 /* Set the length (very important for backward compatibility) */
2088 wrqu->data.length = sizeof(struct iw_range);
2089
2090 /* Set all the info we don't care or don't know about to zero */
2091 memset(range, 0, sizeof(struct iw_range));
2092
2093 /* Set the Wireless Extension versions */
2094 range->we_version_compiled = WIRELESS_EXT;
2095 range->we_version_source = 9;
2096
2097 /* Set information in the range struct. */
2098 range->throughput = 1.6 * 1000 * 1000; /* don't argue on this ! */
2099 range->min_nwid = 0x0000;
2100 range->max_nwid = 0xFFFF;
2101
2102 range->sensitivity = 0x3F;
2103 range->max_qual.qual = MMR_SGNL_QUAL;
2104 range->max_qual.level = MMR_SIGNAL_LVL;
2105 range->max_qual.noise = MMR_SILENCE_LVL;
2106 range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */
2107 /* Need to get better values for those two */
2108 range->avg_qual.level = 30;
2109 range->avg_qual.noise = 8;
2110
2111 range->num_bitrates = 1;
2112 range->bitrate[0] = 2000000; /* 2 Mb/s */
2113
2114 /* Event capability (kernel + driver) */
2115 range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) |
2116 IW_EVENT_CAPA_MASK(0x8B04));
2117 range->event_capa[1] = IW_EVENT_CAPA_K_1;
2118
2119 /* Disable interrupts and save flags. */
2120 spin_lock_irqsave(&lp->spinlock, flags);
2121
2122 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
2123 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
2124 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
2125 range->num_channels = 10;
2126 range->num_frequency = wv_frequency_list(ioaddr, range->freq,
2127 IW_MAX_FREQUENCIES);
2128 } else
2129 range->num_channels = range->num_frequency = 0;
2130
2131 /* Encryption supported ? */
2132 if (mmc_encr(ioaddr)) {
2133 range->encoding_size[0] = 8; /* DES = 64 bits key */
2134 range->num_encoding_sizes = 1;
2135 range->max_encoding_tokens = 1; /* Only one key possible */
2136 } else {
2137 range->num_encoding_sizes = 0;
2138 range->max_encoding_tokens = 0;
2139 }
2140
2141 /* Enable interrupts and restore flags. */
2142 spin_unlock_irqrestore(&lp->spinlock, flags);
2143
2144 return ret;
2145}
2146
2147/*------------------------------------------------------------------*/
2148/*
2149 * Wireless Private Handler : set quality threshold
2150 */
2151static int wavelan_set_qthr(struct net_device *dev,
2152 struct iw_request_info *info,
2153 union iwreq_data *wrqu,
2154 char *extra)
2155{
2156 unsigned long ioaddr = dev->base_addr;
2157 net_local *lp = netdev_priv(dev); /* lp is not unused */
2158 psa_t psa;
2159 unsigned long flags;
2160
2161 /* Disable interrupts and save flags. */
2162 spin_lock_irqsave(&lp->spinlock, flags);
2163
2164 psa.psa_quality_thr = *(extra) & 0x0F;
2165 psa_write(ioaddr, lp->hacr,
2166 (char *) &psa.psa_quality_thr - (char *) &psa,
2167 (unsigned char *) &psa.psa_quality_thr, 1);
2168 /* update the Wavelan checksum */
2169 update_psa_checksum(dev, ioaddr, lp->hacr);
2170 mmc_out(ioaddr, mmwoff(0, mmw_quality_thr),
2171 psa.psa_quality_thr);
2172
2173 /* Enable interrupts and restore flags. */
2174 spin_unlock_irqrestore(&lp->spinlock, flags);
2175
2176 return 0;
2177}
2178
2179/*------------------------------------------------------------------*/
2180/*
2181 * Wireless Private Handler : get quality threshold
2182 */
2183static int wavelan_get_qthr(struct net_device *dev,
2184 struct iw_request_info *info,
2185 union iwreq_data *wrqu,
2186 char *extra)
2187{
2188 unsigned long ioaddr = dev->base_addr;
2189 net_local *lp = netdev_priv(dev); /* lp is not unused */
2190 psa_t psa;
2191 unsigned long flags;
2192
2193 /* Disable interrupts and save flags. */
2194 spin_lock_irqsave(&lp->spinlock, flags);
2195
2196 psa_read(ioaddr, lp->hacr,
2197 (char *) &psa.psa_quality_thr - (char *) &psa,
2198 (unsigned char *) &psa.psa_quality_thr, 1);
2199 *(extra) = psa.psa_quality_thr & 0x0F;
2200
2201 /* Enable interrupts and restore flags. */
2202 spin_unlock_irqrestore(&lp->spinlock, flags);
2203
2204 return 0;
2205}
2206
2207#ifdef HISTOGRAM
2208/*------------------------------------------------------------------*/
2209/*
2210 * Wireless Private Handler : set histogram
2211 */
2212static int wavelan_set_histo(struct net_device *dev,
2213 struct iw_request_info *info,
2214 union iwreq_data *wrqu,
2215 char *extra)
2216{
2217 net_local *lp = netdev_priv(dev); /* lp is not unused */
2218
2219 /* Check the number of intervals. */
2220 if (wrqu->data.length > 16) {
2221 return(-E2BIG);
2222 }
2223
2224 /* Disable histo while we copy the addresses.
2225 * As we don't disable interrupts, we need to do this */
2226 lp->his_number = 0;
2227
2228 /* Are there ranges to copy? */
2229 if (wrqu->data.length > 0) {
2230 /* Copy interval ranges to the driver */
2231 memcpy(lp->his_range, extra, wrqu->data.length);
2232
2233 {
2234 int i;
2235 printk(KERN_DEBUG "Histo :");
2236 for(i = 0; i < wrqu->data.length; i++)
2237 printk(" %d", lp->his_range[i]);
2238 printk("\n");
2239 }
2240
2241 /* Reset result structure. */
2242 memset(lp->his_sum, 0x00, sizeof(long) * 16);
2243 }
2244
2245 /* Now we can set the number of ranges */
2246 lp->his_number = wrqu->data.length;
2247
2248 return(0);
2249}
2250
2251/*------------------------------------------------------------------*/
2252/*
2253 * Wireless Private Handler : get histogram
2254 */
2255static int wavelan_get_histo(struct net_device *dev,
2256 struct iw_request_info *info,
2257 union iwreq_data *wrqu,
2258 char *extra)
2259{
2260 net_local *lp = netdev_priv(dev); /* lp is not unused */
2261
2262 /* Set the number of intervals. */
2263 wrqu->data.length = lp->his_number;
2264
2265 /* Give back the distribution statistics */
2266 if(lp->his_number > 0)
2267 memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number);
2268
2269 return(0);
2270}
2271#endif /* HISTOGRAM */
2272
2273/*------------------------------------------------------------------*/
2274/*
2275 * Structures to export the Wireless Handlers
2276 */
2277
2278static const iw_handler wavelan_handler[] =
2279{
2280 NULL, /* SIOCSIWNAME */
2281 wavelan_get_name, /* SIOCGIWNAME */
2282 wavelan_set_nwid, /* SIOCSIWNWID */
2283 wavelan_get_nwid, /* SIOCGIWNWID */
2284 wavelan_set_freq, /* SIOCSIWFREQ */
2285 wavelan_get_freq, /* SIOCGIWFREQ */
2286 NULL, /* SIOCSIWMODE */
2287 NULL, /* SIOCGIWMODE */
2288 wavelan_set_sens, /* SIOCSIWSENS */
2289 wavelan_get_sens, /* SIOCGIWSENS */
2290 NULL, /* SIOCSIWRANGE */
2291 wavelan_get_range, /* SIOCGIWRANGE */
2292 NULL, /* SIOCSIWPRIV */
2293 NULL, /* SIOCGIWPRIV */
2294 NULL, /* SIOCSIWSTATS */
2295 NULL, /* SIOCGIWSTATS */
2296 iw_handler_set_spy, /* SIOCSIWSPY */
2297 iw_handler_get_spy, /* SIOCGIWSPY */
2298 iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
2299 iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
2300 NULL, /* SIOCSIWAP */
2301 NULL, /* SIOCGIWAP */
2302 NULL, /* -- hole -- */
2303 NULL, /* SIOCGIWAPLIST */
2304 NULL, /* -- hole -- */
2305 NULL, /* -- hole -- */
2306 NULL, /* SIOCSIWESSID */
2307 NULL, /* SIOCGIWESSID */
2308 NULL, /* SIOCSIWNICKN */
2309 NULL, /* SIOCGIWNICKN */
2310 NULL, /* -- hole -- */
2311 NULL, /* -- hole -- */
2312 NULL, /* SIOCSIWRATE */
2313 NULL, /* SIOCGIWRATE */
2314 NULL, /* SIOCSIWRTS */
2315 NULL, /* SIOCGIWRTS */
2316 NULL, /* SIOCSIWFRAG */
2317 NULL, /* SIOCGIWFRAG */
2318 NULL, /* SIOCSIWTXPOW */
2319 NULL, /* SIOCGIWTXPOW */
2320 NULL, /* SIOCSIWRETRY */
2321 NULL, /* SIOCGIWRETRY */
2322 /* Bummer ! Why those are only at the end ??? */
2323 wavelan_set_encode, /* SIOCSIWENCODE */
2324 wavelan_get_encode, /* SIOCGIWENCODE */
2325};
2326
2327static const iw_handler wavelan_private_handler[] =
2328{
2329 wavelan_set_qthr, /* SIOCIWFIRSTPRIV */
2330 wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */
2331#ifdef HISTOGRAM
2332 wavelan_set_histo, /* SIOCIWFIRSTPRIV + 2 */
2333 wavelan_get_histo, /* SIOCIWFIRSTPRIV + 3 */
2334#endif /* HISTOGRAM */
2335};
2336
2337static const struct iw_priv_args wavelan_private_args[] = {
2338/*{ cmd, set_args, get_args, name } */
2339 { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" },
2340 { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" },
2341 { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" },
2342 { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" },
2343};
2344
2345static const struct iw_handler_def wavelan_handler_def =
2346{
2347 .num_standard = ARRAY_SIZE(wavelan_handler),
2348 .num_private = ARRAY_SIZE(wavelan_private_handler),
2349 .num_private_args = ARRAY_SIZE(wavelan_private_args),
2350 .standard = wavelan_handler,
2351 .private = wavelan_private_handler,
2352 .private_args = wavelan_private_args,
2353 .get_wireless_stats = wavelan_get_wireless_stats,
2354};
2355
2356/*------------------------------------------------------------------*/
2357/*
2358 * Get wireless statistics.
2359 * Called by /proc/net/wireless
2360 */
2361static iw_stats *wavelan_get_wireless_stats(struct net_device * dev)
2362{
2363 unsigned long ioaddr = dev->base_addr;
2364 net_local *lp = netdev_priv(dev);
2365 mmr_t m;
2366 iw_stats *wstats;
2367 unsigned long flags;
2368
2369#ifdef DEBUG_IOCTL_TRACE
2370 printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n",
2371 dev->name);
2372#endif
2373
2374 /* Check */
2375 if (lp == (net_local *) NULL)
2376 return (iw_stats *) NULL;
2377
2378 /* Disable interrupts and save flags. */
2379 spin_lock_irqsave(&lp->spinlock, flags);
2380
2381 wstats = &lp->wstats;
2382
2383 /* Get data from the mmc. */
2384 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
2385
2386 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1);
2387 mmc_read(ioaddr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l,
2388 2);
2389 mmc_read(ioaddr, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set,
2390 4);
2391
2392 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
2393
2394 /* Copy data to wireless stuff. */
2395 wstats->status = m.mmr_dce_status & MMR_DCE_STATUS;
2396 wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL;
2397 wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL;
2398 wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL;
2399 wstats->qual.updated = (((m. mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7)
2400 | ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6)
2401 | ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5));
2402 wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2403 wstats->discard.code = 0L;
2404 wstats->discard.misc = 0L;
2405
2406 /* Enable interrupts and restore flags. */
2407 spin_unlock_irqrestore(&lp->spinlock, flags);
2408
2409#ifdef DEBUG_IOCTL_TRACE
2410 printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n",
2411 dev->name);
2412#endif
2413 return &lp->wstats;
2414}
2415
2416/************************* PACKET RECEPTION *************************/
2417/*
2418 * This part deals with receiving the packets.
2419 * The interrupt handler gets an interrupt when a packet has been
2420 * successfully received and calls this part.
2421 */
2422
2423/*------------------------------------------------------------------*/
2424/*
2425 * This routine does the actual copying of data (including the Ethernet
2426 * header structure) from the WaveLAN card to an sk_buff chain that
2427 * will be passed up to the network interface layer. NOTE: we
2428 * currently don't handle trailer protocols (neither does the rest of
2429 * the network interface), so if that is needed, it will (at least in
2430 * part) be added here. The contents of the receive ring buffer are
2431 * copied to a message chain that is then passed to the kernel.
2432 *
2433 * Note: if any errors occur, the packet is "dropped on the floor".
2434 * (called by wv_packet_rcv())
2435 */
2436static void
2437wv_packet_read(struct net_device * dev, u16 buf_off, int sksize)
2438{
2439 net_local *lp = netdev_priv(dev);
2440 unsigned long ioaddr = dev->base_addr;
2441 struct sk_buff *skb;
2442
2443#ifdef DEBUG_RX_TRACE
2444 printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n",
2445 dev->name, buf_off, sksize);
2446#endif
2447
2448 /* Allocate buffer for the data */
2449 if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *) NULL) {
2450#ifdef DEBUG_RX_ERROR
2451 printk(KERN_INFO
2452 "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC).\n",
2453 dev->name, sksize);
2454#endif
2455 dev->stats.rx_dropped++;
2456 return;
2457 }
2458
2459 /* Copy the packet to the buffer. */
2460 obram_read(ioaddr, buf_off, skb_put(skb, sksize), sksize);
2461 skb->protocol = eth_type_trans(skb, dev);
2462
2463#ifdef DEBUG_RX_INFO
2464 wv_packet_info(skb_mac_header(skb), sksize, dev->name,
2465 "wv_packet_read");
2466#endif /* DEBUG_RX_INFO */
2467
2468 /* Statistics-gathering and associated stuff.
2469 * It seem a bit messy with all the define, but it's really
2470 * simple... */
2471 if (
2472#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
2473 (lp->spy_data.spy_number > 0) ||
2474#endif /* IW_WIRELESS_SPY */
2475#ifdef HISTOGRAM
2476 (lp->his_number > 0) ||
2477#endif /* HISTOGRAM */
2478 0) {
2479 u8 stats[3]; /* signal level, noise level, signal quality */
2480
2481 /* Read signal level, silence level and signal quality bytes */
2482 /* Note: in the PCMCIA hardware, these are part of the frame.
2483 * It seems that for the ISA hardware, it's nowhere to be
2484 * found in the frame, so I'm obliged to do this (it has a
2485 * side effect on /proc/net/wireless).
2486 * Any ideas?
2487 */
2488 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
2489 mmc_read(ioaddr, mmroff(0, mmr_signal_lvl), stats, 3);
2490 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
2491
2492#ifdef DEBUG_RX_INFO
2493 printk(KERN_DEBUG
2494 "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n",
2495 dev->name, stats[0] & 0x3F, stats[1] & 0x3F,
2496 stats[2] & 0x0F);
2497#endif
2498
2499 /* Spying stuff */
2500#ifdef IW_WIRELESS_SPY
2501 wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE,
2502 stats);
2503#endif /* IW_WIRELESS_SPY */
2504#ifdef HISTOGRAM
2505 wl_his_gather(dev, stats);
2506#endif /* HISTOGRAM */
2507 }
2508
2509 /*
2510 * Hand the packet to the network module.
2511 */
2512 netif_rx(skb);
2513
2514 /* Keep statistics up to date */
2515 dev->stats.rx_packets++;
2516 dev->stats.rx_bytes += sksize;
2517
2518#ifdef DEBUG_RX_TRACE
2519 printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name);
2520#endif
2521}
2522
2523/*------------------------------------------------------------------*/
2524/*
2525 * Transfer as many packets as we can
2526 * from the device RAM.
2527 * (called in wavelan_interrupt()).
2528 * Note : the spinlock is already grabbed for us.
2529 */
2530static void wv_receive(struct net_device * dev)
2531{
2532 unsigned long ioaddr = dev->base_addr;
2533 net_local *lp = netdev_priv(dev);
2534 fd_t fd;
2535 rbd_t rbd;
2536 int nreaped = 0;
2537
2538#ifdef DEBUG_RX_TRACE
2539 printk(KERN_DEBUG "%s: ->wv_receive()\n", dev->name);
2540#endif
2541
2542 /* Loop on each received packet. */
2543 for (;;) {
2544 obram_read(ioaddr, lp->rx_head, (unsigned char *) &fd,
2545 sizeof(fd));
2546
2547 /* Note about the status :
2548 * It start up to be 0 (the value we set). Then, when the RU
2549 * grab the buffer to prepare for reception, it sets the
2550 * FD_STATUS_B flag. When the RU has finished receiving the
2551 * frame, it clears FD_STATUS_B, set FD_STATUS_C to indicate
2552 * completion and set the other flags to indicate the eventual
2553 * errors. FD_STATUS_OK indicates that the reception was OK.
2554 */
2555
2556 /* If the current frame is not complete, we have reached the end. */
2557 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
2558 break; /* This is how we exit the loop. */
2559
2560 nreaped++;
2561
2562 /* Check whether frame was correctly received. */
2563 if ((fd.fd_status & FD_STATUS_OK) == FD_STATUS_OK) {
2564 /* Does the frame contain a pointer to the data? Let's check. */
2565 if (fd.fd_rbd_offset != I82586NULL) {
2566 /* Read the receive buffer descriptor */
2567 obram_read(ioaddr, fd.fd_rbd_offset,
2568 (unsigned char *) &rbd,
2569 sizeof(rbd));
2570
2571#ifdef DEBUG_RX_ERROR
2572 if ((rbd.rbd_status & RBD_STATUS_EOF) !=
2573 RBD_STATUS_EOF) printk(KERN_INFO
2574 "%s: wv_receive(): missing EOF flag.\n",
2575 dev->name);
2576
2577 if ((rbd.rbd_status & RBD_STATUS_F) !=
2578 RBD_STATUS_F) printk(KERN_INFO
2579 "%s: wv_receive(): missing F flag.\n",
2580 dev->name);
2581#endif /* DEBUG_RX_ERROR */
2582
2583 /* Read the packet and transmit to Linux */
2584 wv_packet_read(dev, rbd.rbd_bufl,
2585 rbd.
2586 rbd_status &
2587 RBD_STATUS_ACNT);
2588 }
2589#ifdef DEBUG_RX_ERROR
2590 else /* if frame has no data */
2591 printk(KERN_INFO
2592 "%s: wv_receive(): frame has no data.\n",
2593 dev->name);
2594#endif
2595 } else { /* If reception was no successful */
2596
2597 dev->stats.rx_errors++;
2598
2599#ifdef DEBUG_RX_INFO
2600 printk(KERN_DEBUG
2601 "%s: wv_receive(): frame not received successfully (%X).\n",
2602 dev->name, fd.fd_status);
2603#endif
2604
2605#ifdef DEBUG_RX_ERROR
2606 if ((fd.fd_status & FD_STATUS_S6) != 0)
2607 printk(KERN_INFO
2608 "%s: wv_receive(): no EOF flag.\n",
2609 dev->name);
2610#endif
2611
2612 if ((fd.fd_status & FD_STATUS_S7) != 0) {
2613 dev->stats.rx_length_errors++;
2614#ifdef DEBUG_RX_FAIL
2615 printk(KERN_DEBUG
2616 "%s: wv_receive(): frame too short.\n",
2617 dev->name);
2618#endif
2619 }
2620
2621 if ((fd.fd_status & FD_STATUS_S8) != 0) {
2622 dev->stats.rx_over_errors++;
2623#ifdef DEBUG_RX_FAIL
2624 printk(KERN_DEBUG
2625 "%s: wv_receive(): rx DMA overrun.\n",
2626 dev->name);
2627#endif
2628 }
2629
2630 if ((fd.fd_status & FD_STATUS_S9) != 0) {
2631 dev->stats.rx_fifo_errors++;
2632#ifdef DEBUG_RX_FAIL
2633 printk(KERN_DEBUG
2634 "%s: wv_receive(): ran out of resources.\n",
2635 dev->name);
2636#endif
2637 }
2638
2639 if ((fd.fd_status & FD_STATUS_S10) != 0) {
2640 dev->stats.rx_frame_errors++;
2641#ifdef DEBUG_RX_FAIL
2642 printk(KERN_DEBUG
2643 "%s: wv_receive(): alignment error.\n",
2644 dev->name);
2645#endif
2646 }
2647
2648 if ((fd.fd_status & FD_STATUS_S11) != 0) {
2649 dev->stats.rx_crc_errors++;
2650#ifdef DEBUG_RX_FAIL
2651 printk(KERN_DEBUG
2652 "%s: wv_receive(): CRC error.\n",
2653 dev->name);
2654#endif
2655 }
2656 }
2657
2658 fd.fd_status = 0;
2659 obram_write(ioaddr, fdoff(lp->rx_head, fd_status),
2660 (unsigned char *) &fd.fd_status,
2661 sizeof(fd.fd_status));
2662
2663 fd.fd_command = FD_COMMAND_EL;
2664 obram_write(ioaddr, fdoff(lp->rx_head, fd_command),
2665 (unsigned char *) &fd.fd_command,
2666 sizeof(fd.fd_command));
2667
2668 fd.fd_command = 0;
2669 obram_write(ioaddr, fdoff(lp->rx_last, fd_command),
2670 (unsigned char *) &fd.fd_command,
2671 sizeof(fd.fd_command));
2672
2673 lp->rx_last = lp->rx_head;
2674 lp->rx_head = fd.fd_link_offset;
2675 } /* for(;;) -> loop on all frames */
2676
2677#ifdef DEBUG_RX_INFO
2678 if (nreaped > 1)
2679 printk(KERN_DEBUG "%s: wv_receive(): reaped %d\n",
2680 dev->name, nreaped);
2681#endif
2682#ifdef DEBUG_RX_TRACE
2683 printk(KERN_DEBUG "%s: <-wv_receive()\n", dev->name);
2684#endif
2685}
2686
2687/*********************** PACKET TRANSMISSION ***********************/
2688/*
2689 * This part deals with sending packets through the WaveLAN.
2690 *
2691 */
2692
2693/*------------------------------------------------------------------*/
2694/*
2695 * This routine fills in the appropriate registers and memory
2696 * locations on the WaveLAN card and starts the card off on
2697 * the transmit.
2698 *
2699 * The principle:
2700 * Each block contains a transmit command, a NOP command,
2701 * a transmit block descriptor and a buffer.
2702 * The CU read the transmit block which point to the tbd,
2703 * read the tbd and the content of the buffer.
2704 * When it has finish with it, it goes to the next command
2705 * which in our case is the NOP. The NOP points on itself,
2706 * so the CU stop here.
2707 * When we add the next block, we modify the previous nop
2708 * to make it point on the new tx command.
2709 * Simple, isn't it ?
2710 *
2711 * (called in wavelan_packet_xmit())
2712 */
2713static int wv_packet_write(struct net_device * dev, void *buf, short length)
2714{
2715 net_local *lp = netdev_priv(dev);
2716 unsigned long ioaddr = dev->base_addr;
2717 unsigned short txblock;
2718 unsigned short txpred;
2719 unsigned short tx_addr;
2720 unsigned short nop_addr;
2721 unsigned short tbd_addr;
2722 unsigned short buf_addr;
2723 ac_tx_t tx;
2724 ac_nop_t nop;
2725 tbd_t tbd;
2726 int clen = length;
2727 unsigned long flags;
2728
2729#ifdef DEBUG_TX_TRACE
2730 printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name,
2731 length);
2732#endif
2733
2734 spin_lock_irqsave(&lp->spinlock, flags);
2735
2736 /* Check nothing bad has happened */
2737 if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
2738#ifdef DEBUG_TX_ERROR
2739 printk(KERN_INFO "%s: wv_packet_write(): Tx queue full.\n",
2740 dev->name);
2741#endif
2742 spin_unlock_irqrestore(&lp->spinlock, flags);
2743 return 1;
2744 }
2745
2746 /* Calculate addresses of next block and previous block. */
2747 txblock = lp->tx_first_free;
2748 txpred = txblock - TXBLOCKZ;
2749 if (txpred < OFFSET_CU)
2750 txpred += NTXBLOCKS * TXBLOCKZ;
2751 lp->tx_first_free += TXBLOCKZ;
2752 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2753 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
2754
2755 lp->tx_n_in_use++;
2756
2757 /* Calculate addresses of the different parts of the block. */
2758 tx_addr = txblock;
2759 nop_addr = tx_addr + sizeof(tx);
2760 tbd_addr = nop_addr + sizeof(nop);
2761 buf_addr = tbd_addr + sizeof(tbd);
2762
2763 /*
2764 * Transmit command
2765 */
2766 tx.tx_h.ac_status = 0;
2767 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
2768 (unsigned char *) &tx.tx_h.ac_status,
2769 sizeof(tx.tx_h.ac_status));
2770
2771 /*
2772 * NOP command
2773 */
2774 nop.nop_h.ac_status = 0;
2775 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
2776 (unsigned char *) &nop.nop_h.ac_status,
2777 sizeof(nop.nop_h.ac_status));
2778 nop.nop_h.ac_link = nop_addr;
2779 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
2780 (unsigned char *) &nop.nop_h.ac_link,
2781 sizeof(nop.nop_h.ac_link));
2782
2783 /*
2784 * Transmit buffer descriptor
2785 */
2786 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & clen);
2787 tbd.tbd_next_bd_offset = I82586NULL;
2788 tbd.tbd_bufl = buf_addr;
2789 tbd.tbd_bufh = 0;
2790 obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, sizeof(tbd));
2791
2792 /*
2793 * Data
2794 */
2795 obram_write(ioaddr, buf_addr, buf, length);
2796
2797 /*
2798 * Overwrite the predecessor NOP link
2799 * so that it points to this txblock.
2800 */
2801 nop_addr = txpred + sizeof(tx);
2802 nop.nop_h.ac_status = 0;
2803 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
2804 (unsigned char *) &nop.nop_h.ac_status,
2805 sizeof(nop.nop_h.ac_status));
2806 nop.nop_h.ac_link = txblock;
2807 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
2808 (unsigned char *) &nop.nop_h.ac_link,
2809 sizeof(nop.nop_h.ac_link));
2810
2811 /* Make sure the watchdog will keep quiet for a while */
2812 dev->trans_start = jiffies;
2813
2814 /* Keep stats up to date. */
2815 dev->stats.tx_bytes += length;
2816
2817 if (lp->tx_first_in_use == I82586NULL)
2818 lp->tx_first_in_use = txblock;
2819
2820 if (lp->tx_n_in_use < NTXBLOCKS - 1)
2821 netif_wake_queue(dev);
2822
2823 spin_unlock_irqrestore(&lp->spinlock, flags);
2824
2825#ifdef DEBUG_TX_INFO
2826 wv_packet_info((u8 *) buf, length, dev->name,
2827 "wv_packet_write");
2828#endif /* DEBUG_TX_INFO */
2829
2830#ifdef DEBUG_TX_TRACE
2831 printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name);
2832#endif
2833
2834 return 0;
2835}
2836
2837/*------------------------------------------------------------------*/
2838/*
2839 * This routine is called when we want to send a packet (NET3 callback)
2840 * In this routine, we check if the harware is ready to accept
2841 * the packet. We also prevent reentrance. Then we call the function
2842 * to send the packet.
2843 */
2844static netdev_tx_t wavelan_packet_xmit(struct sk_buff *skb,
2845 struct net_device * dev)
2846{
2847 net_local *lp = netdev_priv(dev);
2848 unsigned long flags;
2849 char data[ETH_ZLEN];
2850
2851#ifdef DEBUG_TX_TRACE
2852 printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name,
2853 (unsigned) skb);
2854#endif
2855
2856 /*
2857 * Block a timer-based transmit from overlapping.
2858 * In other words, prevent reentering this routine.
2859 */
2860 netif_stop_queue(dev);
2861
2862 /* If somebody has asked to reconfigure the controller,
2863 * we can do it now.
2864 */
2865 if (lp->reconfig_82586) {
2866 spin_lock_irqsave(&lp->spinlock, flags);
2867 wv_82586_config(dev);
2868 spin_unlock_irqrestore(&lp->spinlock, flags);
2869 /* Check that we can continue */
2870 if (lp->tx_n_in_use == (NTXBLOCKS - 1))
2871 return NETDEV_TX_BUSY;
2872 }
2873
2874 /* Do we need some padding? */
2875 /* Note : on wireless the propagation time is in the order of 1us,
2876 * and we don't have the Ethernet specific requirement of beeing
2877 * able to detect collisions, therefore in theory we don't really
2878 * need to pad. Jean II */
2879 if (skb->len < ETH_ZLEN) {
2880 memset(data, 0, ETH_ZLEN);
2881 skb_copy_from_linear_data(skb, data, skb->len);
2882 /* Write packet on the card */
2883 if(wv_packet_write(dev, data, ETH_ZLEN))
2884 return NETDEV_TX_BUSY; /* We failed */
2885 }
2886 else if(wv_packet_write(dev, skb->data, skb->len))
2887 return NETDEV_TX_BUSY; /* We failed */
2888
2889
2890 dev_kfree_skb(skb);
2891
2892#ifdef DEBUG_TX_TRACE
2893 printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name);
2894#endif
2895 return NETDEV_TX_OK;
2896}
2897
2898/*********************** HARDWARE CONFIGURATION ***********************/
2899/*
2900 * This part does the real job of starting and configuring the hardware.
2901 */
2902
2903/*--------------------------------------------------------------------*/
2904/*
2905 * Routine to initialize the Modem Management Controller.
2906 * (called by wv_hw_reset())
2907 */
2908static int wv_mmc_init(struct net_device * dev)
2909{
2910 unsigned long ioaddr = dev->base_addr;
2911 net_local *lp = netdev_priv(dev);
2912 psa_t psa;
2913 mmw_t m;
2914 int configured;
2915
2916#ifdef DEBUG_CONFIG_TRACE
2917 printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name);
2918#endif
2919
2920 /* Read the parameter storage area. */
2921 psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
2922
2923#ifdef USE_PSA_CONFIG
2924 configured = psa.psa_conf_status & 1;
2925#else
2926 configured = 0;
2927#endif
2928
2929 /* Is the PSA is not configured */
2930 if (!configured) {
2931 /* User will be able to configure NWID later (with iwconfig). */
2932 psa.psa_nwid[0] = 0;
2933 psa.psa_nwid[1] = 0;
2934
2935 /* no NWID checking since NWID is not set */
2936 psa.psa_nwid_select = 0;
2937
2938 /* Disable encryption */
2939 psa.psa_encryption_select = 0;
2940
2941 /* Set to standard values:
2942 * 0x04 for AT,
2943 * 0x01 for MCA,
2944 * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document)
2945 */
2946 if (psa.psa_comp_number & 1)
2947 psa.psa_thr_pre_set = 0x01;
2948 else
2949 psa.psa_thr_pre_set = 0x04;
2950 psa.psa_quality_thr = 0x03;
2951
2952 /* It is configured */
2953 psa.psa_conf_status |= 1;
2954
2955#ifdef USE_PSA_CONFIG
2956 /* Write the psa. */
2957 psa_write(ioaddr, lp->hacr,
2958 (char *) psa.psa_nwid - (char *) &psa,
2959 (unsigned char *) psa.psa_nwid, 4);
2960 psa_write(ioaddr, lp->hacr,
2961 (char *) &psa.psa_thr_pre_set - (char *) &psa,
2962 (unsigned char *) &psa.psa_thr_pre_set, 1);
2963 psa_write(ioaddr, lp->hacr,
2964 (char *) &psa.psa_quality_thr - (char *) &psa,
2965 (unsigned char *) &psa.psa_quality_thr, 1);
2966 psa_write(ioaddr, lp->hacr,
2967 (char *) &psa.psa_conf_status - (char *) &psa,
2968 (unsigned char *) &psa.psa_conf_status, 1);
2969 /* update the Wavelan checksum */
2970 update_psa_checksum(dev, ioaddr, lp->hacr);
2971#endif
2972 }
2973
2974 /* Zero the mmc structure. */
2975 memset(&m, 0x00, sizeof(m));
2976
2977 /* Copy PSA info to the mmc. */
2978 m.mmw_netw_id_l = psa.psa_nwid[1];
2979 m.mmw_netw_id_h = psa.psa_nwid[0];
2980
2981 if (psa.psa_nwid_select & 1)
2982 m.mmw_loopt_sel = 0x00;
2983 else
2984 m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID;
2985
2986 memcpy(&m.mmw_encr_key, &psa.psa_encryption_key,
2987 sizeof(m.mmw_encr_key));
2988
2989 if (psa.psa_encryption_select)
2990 m.mmw_encr_enable =
2991 MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE;
2992 else
2993 m.mmw_encr_enable = 0;
2994
2995 m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F;
2996 m.mmw_quality_thr = psa.psa_quality_thr & 0x0F;
2997
2998 /*
2999 * Set default modem control parameters.
3000 * See NCR document 407-0024326 Rev. A.
3001 */
3002 m.mmw_jabber_enable = 0x01;
3003 m.mmw_freeze = 0;
3004 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
3005 m.mmw_ifs = 0x20;
3006 m.mmw_mod_delay = 0x04;
3007 m.mmw_jam_time = 0x38;
3008
3009 m.mmw_des_io_invert = 0;
3010 m.mmw_decay_prm = 0;
3011 m.mmw_decay_updat_prm = 0;
3012
3013 /* Write all info to MMC. */
3014 mmc_write(ioaddr, 0, (u8 *) & m, sizeof(m));
3015
3016 /* The following code starts the modem of the 2.00 frequency
3017 * selectable cards at power on. It's not strictly needed for the
3018 * following boots.
3019 * The original patch was by Joe Finney for the PCMCIA driver, but
3020 * I've cleaned it up a bit and added documentation.
3021 * Thanks to Loeke Brederveld from Lucent for the info.
3022 */
3023
3024 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable)
3025 * Does it work for everybody, especially old cards? */
3026 /* Note: WFREQSEL verifies that it is able to read a sensible
3027 * frequency from EEPROM (address 0x00) and that MMR_FEE_STATUS_ID
3028 * is 0xA (Xilinx version) or 0xB (Ariadne version).
3029 * My test is more crude but does work. */
3030 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
3031 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
3032 /* We must download the frequency parameters to the
3033 * synthesizers (from the EEPROM - area 1)
3034 * Note: as the EEPROM is automatically decremented, we set the end
3035 * if the area... */
3036 m.mmw_fee_addr = 0x0F;
3037 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3038 mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
3039 (unsigned char *) &m.mmw_fee_ctrl, 2);
3040
3041 /* Wait until the download is finished. */
3042 fee_wait(ioaddr, 100, 100);
3043
3044#ifdef DEBUG_CONFIG_INFO
3045 /* The frequency was in the last word downloaded. */
3046 mmc_read(ioaddr, (char *) &m.mmw_fee_data_l - (char *) &m,
3047 (unsigned char *) &m.mmw_fee_data_l, 2);
3048
3049 /* Print some info for the user. */
3050 printk(KERN_DEBUG
3051 "%s: WaveLAN 2.00 recognised (frequency select). Current frequency = %ld\n",
3052 dev->name,
3053 ((m.
3054 mmw_fee_data_h << 4) | (m.mmw_fee_data_l >> 4)) *
3055 5 / 2 + 24000L);
3056#endif
3057
3058 /* We must now download the power adjust value (gain) to
3059 * the synthesizers (from the EEPROM - area 7 - DAC). */
3060 m.mmw_fee_addr = 0x61;
3061 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3062 mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
3063 (unsigned char *) &m.mmw_fee_ctrl, 2);
3064
3065 /* Wait until the download is finished. */
3066 }
3067 /* if 2.00 card */
3068#ifdef DEBUG_CONFIG_TRACE
3069 printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name);
3070#endif
3071 return 0;
3072}
3073
3074/*------------------------------------------------------------------*/
3075/*
3076 * Construct the fd and rbd structures.
3077 * Start the receive unit.
3078 * (called by wv_hw_reset())
3079 */
3080static int wv_ru_start(struct net_device * dev)
3081{
3082 net_local *lp = netdev_priv(dev);
3083 unsigned long ioaddr = dev->base_addr;
3084 u16 scb_cs;
3085 fd_t fd;
3086 rbd_t rbd;
3087 u16 rx;
3088 u16 rx_next;
3089 int i;
3090
3091#ifdef DEBUG_CONFIG_TRACE
3092 printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name);
3093#endif
3094
3095 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
3096 (unsigned char *) &scb_cs, sizeof(scb_cs));
3097 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
3098 return 0;
3099
3100 lp->rx_head = OFFSET_RU;
3101
3102 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next) {
3103 rx_next =
3104 (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
3105
3106 fd.fd_status = 0;
3107 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
3108 fd.fd_link_offset = rx_next;
3109 fd.fd_rbd_offset = rx + sizeof(fd);
3110 obram_write(ioaddr, rx, (unsigned char *) &fd, sizeof(fd));
3111
3112 rbd.rbd_status = 0;
3113 rbd.rbd_next_rbd_offset = I82586NULL;
3114 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
3115 rbd.rbd_bufh = 0;
3116 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
3117 obram_write(ioaddr, rx + sizeof(fd),
3118 (unsigned char *) &rbd, sizeof(rbd));
3119
3120 lp->rx_last = rx;
3121 }
3122
3123 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset),
3124 (unsigned char *) &lp->rx_head, sizeof(lp->rx_head));
3125
3126 scb_cs = SCB_CMD_RUC_GO;
3127 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3128 (unsigned char *) &scb_cs, sizeof(scb_cs));
3129
3130 set_chan_attn(ioaddr, lp->hacr);
3131
3132 for (i = 1000; i > 0; i--) {
3133 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
3134 (unsigned char *) &scb_cs, sizeof(scb_cs));
3135 if (scb_cs == 0)
3136 break;
3137
3138 udelay(10);
3139 }
3140
3141 if (i <= 0) {
3142#ifdef DEBUG_CONFIG_ERROR
3143 printk(KERN_INFO
3144 "%s: wavelan_ru_start(): board not accepting command.\n",
3145 dev->name);
3146#endif
3147 return -1;
3148 }
3149#ifdef DEBUG_CONFIG_TRACE
3150 printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name);
3151#endif
3152 return 0;
3153}
3154
3155/*------------------------------------------------------------------*/
3156/*
3157 * Initialise the transmit blocks.
3158 * Start the command unit executing the NOP
3159 * self-loop of the first transmit block.
3160 *
3161 * Here we create the list of send buffers used to transmit packets
3162 * between the PC and the command unit. For each buffer, we create a
3163 * buffer descriptor (pointing on the buffer), a transmit command
3164 * (pointing to the buffer descriptor) and a NOP command.
3165 * The transmit command is linked to the NOP, and the NOP to itself.
3166 * When we will have finished executing the transmit command, we will
3167 * then loop on the NOP. By releasing the NOP link to a new command,
3168 * we may send another buffer.
3169 *
3170 * (called by wv_hw_reset())
3171 */
3172static int wv_cu_start(struct net_device * dev)
3173{
3174 net_local *lp = netdev_priv(dev);
3175 unsigned long ioaddr = dev->base_addr;
3176 int i;
3177 u16 txblock;
3178 u16 first_nop;
3179 u16 scb_cs;
3180
3181#ifdef DEBUG_CONFIG_TRACE
3182 printk(KERN_DEBUG "%s: ->wv_cu_start()\n", dev->name);
3183#endif
3184
3185 lp->tx_first_free = OFFSET_CU;
3186 lp->tx_first_in_use = I82586NULL;
3187
3188 for (i = 0, txblock = OFFSET_CU;
3189 i < NTXBLOCKS; i++, txblock += TXBLOCKZ) {
3190 ac_tx_t tx;
3191 ac_nop_t nop;
3192 tbd_t tbd;
3193 unsigned short tx_addr;
3194 unsigned short nop_addr;
3195 unsigned short tbd_addr;
3196 unsigned short buf_addr;
3197
3198 tx_addr = txblock;
3199 nop_addr = tx_addr + sizeof(tx);
3200 tbd_addr = nop_addr + sizeof(nop);
3201 buf_addr = tbd_addr + sizeof(tbd);
3202
3203 tx.tx_h.ac_status = 0;
3204 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
3205 tx.tx_h.ac_link = nop_addr;
3206 tx.tx_tbd_offset = tbd_addr;
3207 obram_write(ioaddr, tx_addr, (unsigned char *) &tx,
3208 sizeof(tx));
3209
3210 nop.nop_h.ac_status = 0;
3211 nop.nop_h.ac_command = acmd_nop;
3212 nop.nop_h.ac_link = nop_addr;
3213 obram_write(ioaddr, nop_addr, (unsigned char *) &nop,
3214 sizeof(nop));
3215
3216 tbd.tbd_status = TBD_STATUS_EOF;
3217 tbd.tbd_next_bd_offset = I82586NULL;
3218 tbd.tbd_bufl = buf_addr;
3219 tbd.tbd_bufh = 0;
3220 obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd,
3221 sizeof(tbd));
3222 }
3223
3224 first_nop =
3225 OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
3226 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset),
3227 (unsigned char *) &first_nop, sizeof(first_nop));
3228
3229 scb_cs = SCB_CMD_CUC_GO;
3230 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3231 (unsigned char *) &scb_cs, sizeof(scb_cs));
3232
3233 set_chan_attn(ioaddr, lp->hacr);
3234
3235 for (i = 1000; i > 0; i--) {
3236 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
3237 (unsigned char *) &scb_cs, sizeof(scb_cs));
3238 if (scb_cs == 0)
3239 break;
3240
3241 udelay(10);
3242 }
3243
3244 if (i <= 0) {
3245#ifdef DEBUG_CONFIG_ERROR
3246 printk(KERN_INFO
3247 "%s: wavelan_cu_start(): board not accepting command.\n",
3248 dev->name);
3249#endif
3250 return -1;
3251 }
3252
3253 lp->tx_n_in_use = 0;
3254 netif_start_queue(dev);
3255#ifdef DEBUG_CONFIG_TRACE
3256 printk(KERN_DEBUG "%s: <-wv_cu_start()\n", dev->name);
3257#endif
3258 return 0;
3259}
3260
3261/*------------------------------------------------------------------*/
3262/*
3263 * This routine does a standard configuration of the WaveLAN
3264 * controller (i82586).
3265 *
3266 * It initialises the scp, iscp and scb structure
3267 * The first two are just pointers to the next.
3268 * The last one is used for basic configuration and for basic
3269 * communication (interrupt status).
3270 *
3271 * (called by wv_hw_reset())
3272 */
3273static int wv_82586_start(struct net_device * dev)
3274{
3275 net_local *lp = netdev_priv(dev);
3276 unsigned long ioaddr = dev->base_addr;
3277 scp_t scp; /* system configuration pointer */
3278 iscp_t iscp; /* intermediate scp */
3279 scb_t scb; /* system control block */
3280 ach_t cb; /* Action command header */
3281 u8 zeroes[512];
3282 int i;
3283
3284#ifdef DEBUG_CONFIG_TRACE
3285 printk(KERN_DEBUG "%s: ->wv_82586_start()\n", dev->name);
3286#endif
3287
3288 /*
3289 * Clear the onboard RAM.
3290 */
3291 memset(&zeroes[0], 0x00, sizeof(zeroes));
3292 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
3293 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
3294
3295 /*
3296 * Construct the command unit structures:
3297 * scp, iscp, scb, cb.
3298 */
3299 memset(&scp, 0x00, sizeof(scp));
3300 scp.scp_sysbus = SCP_SY_16BBUS;
3301 scp.scp_iscpl = OFFSET_ISCP;
3302 obram_write(ioaddr, OFFSET_SCP, (unsigned char *) &scp,
3303 sizeof(scp));
3304
3305 memset(&iscp, 0x00, sizeof(iscp));
3306 iscp.iscp_busy = 1;
3307 iscp.iscp_offset = OFFSET_SCB;
3308 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
3309 sizeof(iscp));
3310
3311 /* Our first command is to reset the i82586. */
3312 memset(&scb, 0x00, sizeof(scb));
3313 scb.scb_command = SCB_CMD_RESET;
3314 scb.scb_cbl_offset = OFFSET_CU;
3315 scb.scb_rfa_offset = OFFSET_RU;
3316 obram_write(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
3317 sizeof(scb));
3318
3319 set_chan_attn(ioaddr, lp->hacr);
3320
3321 /* Wait for command to finish. */
3322 for (i = 1000; i > 0; i--) {
3323 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
3324 sizeof(iscp));
3325
3326 if (iscp.iscp_busy == (unsigned short) 0)
3327 break;
3328
3329 udelay(10);
3330 }
3331
3332 if (i <= 0) {
3333#ifdef DEBUG_CONFIG_ERROR
3334 printk(KERN_INFO
3335 "%s: wv_82586_start(): iscp_busy timeout.\n",
3336 dev->name);
3337#endif
3338 return -1;
3339 }
3340
3341 /* Check command completion. */
3342 for (i = 15; i > 0; i--) {
3343 obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
3344 sizeof(scb));
3345
3346 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
3347 break;
3348
3349 udelay(10);
3350 }
3351
3352 if (i <= 0) {
3353#ifdef DEBUG_CONFIG_ERROR
3354 printk(KERN_INFO
3355 "%s: wv_82586_start(): status: expected 0x%02x, got 0x%02x.\n",
3356 dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
3357#endif
3358 return -1;
3359 }
3360
3361 wv_ack(dev);
3362
3363 /* Set the action command header. */
3364 memset(&cb, 0x00, sizeof(cb));
3365 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
3366 cb.ac_link = OFFSET_CU;
3367 obram_write(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
3368
3369 if (wv_synchronous_cmd(dev, "diag()") == -1)
3370 return -1;
3371
3372 obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
3373 if (cb.ac_status & AC_SFLD_FAIL) {
3374#ifdef DEBUG_CONFIG_ERROR
3375 printk(KERN_INFO
3376 "%s: wv_82586_start(): i82586 Self Test failed.\n",
3377 dev->name);
3378#endif
3379 return -1;
3380 }
3381#ifdef DEBUG_I82586_SHOW
3382 wv_scb_show(ioaddr);
3383#endif
3384
3385#ifdef DEBUG_CONFIG_TRACE
3386 printk(KERN_DEBUG "%s: <-wv_82586_start()\n", dev->name);
3387#endif
3388 return 0;
3389}
3390
3391/*------------------------------------------------------------------*/
3392/*
3393 * This routine does a standard configuration of the WaveLAN
3394 * controller (i82586).
3395 *
3396 * This routine is a violent hack. We use the first free transmit block
3397 * to make our configuration. In the buffer area, we create the three
3398 * configuration commands (linked). We make the previous NOP point to
3399 * the beginning of the buffer instead of the tx command. After, we go
3400 * as usual to the NOP command.
3401 * Note that only the last command (mc_set) will generate an interrupt.
3402 *
3403 * (called by wv_hw_reset(), wv_82586_reconfig(), wavelan_packet_xmit())
3404 */
3405static void wv_82586_config(struct net_device * dev)
3406{
3407 net_local *lp = netdev_priv(dev);
3408 unsigned long ioaddr = dev->base_addr;
3409 unsigned short txblock;
3410 unsigned short txpred;
3411 unsigned short tx_addr;
3412 unsigned short nop_addr;
3413 unsigned short tbd_addr;
3414 unsigned short cfg_addr;
3415 unsigned short ias_addr;
3416 unsigned short mcs_addr;
3417 ac_tx_t tx;
3418 ac_nop_t nop;
3419 ac_cfg_t cfg; /* Configure action */
3420 ac_ias_t ias; /* IA-setup action */
3421 ac_mcs_t mcs; /* Multicast setup */
3422 struct netdev_hw_addr *ha;
3423
3424#ifdef DEBUG_CONFIG_TRACE
3425 printk(KERN_DEBUG "%s: ->wv_82586_config()\n", dev->name);
3426#endif
3427
3428 /* Check nothing bad has happened */
3429 if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
3430#ifdef DEBUG_CONFIG_ERROR
3431 printk(KERN_INFO "%s: wv_82586_config(): Tx queue full.\n",
3432 dev->name);
3433#endif
3434 return;
3435 }
3436
3437 /* Calculate addresses of next block and previous block. */
3438 txblock = lp->tx_first_free;
3439 txpred = txblock - TXBLOCKZ;
3440 if (txpred < OFFSET_CU)
3441 txpred += NTXBLOCKS * TXBLOCKZ;
3442 lp->tx_first_free += TXBLOCKZ;
3443 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
3444 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
3445
3446 lp->tx_n_in_use++;
3447
3448 /* Calculate addresses of the different parts of the block. */
3449 tx_addr = txblock;
3450 nop_addr = tx_addr + sizeof(tx);
3451 tbd_addr = nop_addr + sizeof(nop);
3452 cfg_addr = tbd_addr + sizeof(tbd_t); /* beginning of the buffer */
3453 ias_addr = cfg_addr + sizeof(cfg);
3454 mcs_addr = ias_addr + sizeof(ias);
3455
3456 /*
3457 * Transmit command
3458 */
3459 tx.tx_h.ac_status = 0xFFFF; /* Fake completion value */
3460 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
3461 (unsigned char *) &tx.tx_h.ac_status,
3462 sizeof(tx.tx_h.ac_status));
3463
3464 /*
3465 * NOP command
3466 */
3467 nop.nop_h.ac_status = 0;
3468 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
3469 (unsigned char *) &nop.nop_h.ac_status,
3470 sizeof(nop.nop_h.ac_status));
3471 nop.nop_h.ac_link = nop_addr;
3472 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
3473 (unsigned char *) &nop.nop_h.ac_link,
3474 sizeof(nop.nop_h.ac_link));
3475
3476 /* Create a configure action. */
3477 memset(&cfg, 0x00, sizeof(cfg));
3478
3479 /*
3480 * For Linux we invert AC_CFG_ALOC() so as to conform
3481 * to the way that net packets reach us from above.
3482 * (See also ac_tx_t.)
3483 *
3484 * Updated from Wavelan Manual WCIN085B
3485 */
3486 cfg.cfg_byte_cnt =
3487 AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
3488 cfg.cfg_fifolim = AC_CFG_FIFOLIM(4);
3489 cfg.cfg_byte8 = AC_CFG_SAV_BF(1) | AC_CFG_SRDY(0);
3490 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
3491 AC_CFG_ILPBCK(0) |
3492 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
3493 AC_CFG_ALOC(1) | AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
3494 cfg.cfg_byte10 = AC_CFG_BOFMET(1) |
3495 AC_CFG_ACR(6) | AC_CFG_LINPRIO(0);
3496 cfg.cfg_ifs = 0x20;
3497 cfg.cfg_slotl = 0x0C;
3498 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) | AC_CFG_SLTTMHI(0);
3499 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
3500 AC_CFG_BTSTF(0) |
3501 AC_CFG_CRC16(0) |
3502 AC_CFG_NCRC(0) |
3503 AC_CFG_TNCRS(1) |
3504 AC_CFG_MANCH(0) |
3505 AC_CFG_BCDIS(0) | AC_CFG_PRM(lp->promiscuous);
3506 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
3507 AC_CFG_CDTF(0) | AC_CFG_ICSS(0) | AC_CFG_CSTF(0);
3508/*
3509 cfg.cfg_min_frm_len = AC_CFG_MNFRM(64);
3510*/
3511 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
3512
3513 cfg.cfg_h.ac_command = (AC_CFLD_CMD & acmd_configure);
3514 cfg.cfg_h.ac_link = ias_addr;
3515 obram_write(ioaddr, cfg_addr, (unsigned char *) &cfg, sizeof(cfg));
3516
3517 /* Set up the MAC address */
3518 memset(&ias, 0x00, sizeof(ias));
3519 ias.ias_h.ac_command = (AC_CFLD_CMD & acmd_ia_setup);
3520 ias.ias_h.ac_link = mcs_addr;
3521 memcpy(&ias.ias_addr[0], (unsigned char *) &dev->dev_addr[0],
3522 sizeof(ias.ias_addr));
3523 obram_write(ioaddr, ias_addr, (unsigned char *) &ias, sizeof(ias));
3524
3525 /* Initialize adapter's Ethernet multicast addresses */
3526 memset(&mcs, 0x00, sizeof(mcs));
3527 mcs.mcs_h.ac_command = AC_CFLD_I | (AC_CFLD_CMD & acmd_mc_setup);
3528 mcs.mcs_h.ac_link = nop_addr;
3529 mcs.mcs_cnt = WAVELAN_ADDR_SIZE * lp->mc_count;
3530 obram_write(ioaddr, mcs_addr, (unsigned char *) &mcs, sizeof(mcs));
3531
3532 /* Any address to set? */
3533 if (lp->mc_count) {
3534 netdev_for_each_mc_addr(ha, dev)
3535 outsw(PIOP1(ioaddr), (u16 *) ha->addr,
3536 WAVELAN_ADDR_SIZE >> 1);
3537
3538#ifdef DEBUG_CONFIG_INFO
3539 printk(KERN_DEBUG
3540 "%s: wv_82586_config(): set %d multicast addresses:\n",
3541 dev->name, lp->mc_count);
3542 netdev_for_each_mc_addr(ha, dev)
3543 printk(KERN_DEBUG " %pM\n", ha->addr);
3544#endif
3545 }
3546
3547 /*
3548 * Overwrite the predecessor NOP link
3549 * so that it points to the configure action.
3550 */
3551 nop_addr = txpred + sizeof(tx);
3552 nop.nop_h.ac_status = 0;
3553 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
3554 (unsigned char *) &nop.nop_h.ac_status,
3555 sizeof(nop.nop_h.ac_status));
3556 nop.nop_h.ac_link = cfg_addr;
3557 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
3558 (unsigned char *) &nop.nop_h.ac_link,
3559 sizeof(nop.nop_h.ac_link));
3560
3561 /* Job done, clear the flag */
3562 lp->reconfig_82586 = 0;
3563
3564 if (lp->tx_first_in_use == I82586NULL)
3565 lp->tx_first_in_use = txblock;
3566
3567 if (lp->tx_n_in_use == (NTXBLOCKS - 1))
3568 netif_stop_queue(dev);
3569
3570#ifdef DEBUG_CONFIG_TRACE
3571 printk(KERN_DEBUG "%s: <-wv_82586_config()\n", dev->name);
3572#endif
3573}
3574
3575/*------------------------------------------------------------------*/
3576/*
3577 * This routine, called by wavelan_close(), gracefully stops the
3578 * WaveLAN controller (i82586).
3579 * (called by wavelan_close())
3580 */
3581static void wv_82586_stop(struct net_device * dev)
3582{
3583 net_local *lp = netdev_priv(dev);
3584 unsigned long ioaddr = dev->base_addr;
3585 u16 scb_cmd;
3586
3587#ifdef DEBUG_CONFIG_TRACE
3588 printk(KERN_DEBUG "%s: ->wv_82586_stop()\n", dev->name);
3589#endif
3590
3591 /* Suspend both command unit and receive unit. */
3592 scb_cmd =
3593 (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC &
3594 SCB_CMD_RUC_SUS);
3595 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3596 (unsigned char *) &scb_cmd, sizeof(scb_cmd));
3597 set_chan_attn(ioaddr, lp->hacr);
3598
3599 /* No more interrupts */
3600 wv_ints_off(dev);
3601
3602#ifdef DEBUG_CONFIG_TRACE
3603 printk(KERN_DEBUG "%s: <-wv_82586_stop()\n", dev->name);
3604#endif
3605}
3606
3607/*------------------------------------------------------------------*/
3608/*
3609 * Totally reset the WaveLAN and restart it.
3610 * Performs the following actions:
3611 * 1. A power reset (reset DMA)
3612 * 2. Initialize the radio modem (using wv_mmc_init)
3613 * 3. Reset & Configure LAN controller (using wv_82586_start)
3614 * 4. Start the LAN controller's command unit
3615 * 5. Start the LAN controller's receive unit
3616 * (called by wavelan_interrupt(), wavelan_watchdog() & wavelan_open())
3617 */
3618static int wv_hw_reset(struct net_device * dev)
3619{
3620 net_local *lp = netdev_priv(dev);
3621 unsigned long ioaddr = dev->base_addr;
3622
3623#ifdef DEBUG_CONFIG_TRACE
3624 printk(KERN_DEBUG "%s: ->wv_hw_reset(dev=0x%x)\n", dev->name,
3625 (unsigned int) dev);
3626#endif
3627
3628 /* Increase the number of resets done. */
3629 lp->nresets++;
3630
3631 wv_hacr_reset(ioaddr);
3632 lp->hacr = HACR_DEFAULT;
3633
3634 if ((wv_mmc_init(dev) < 0) || (wv_82586_start(dev) < 0))
3635 return -1;
3636
3637 /* Enable the card to send interrupts. */
3638 wv_ints_on(dev);
3639
3640 /* Start card functions */
3641 if (wv_cu_start(dev) < 0)
3642 return -1;
3643
3644 /* Setup the controller and parameters */
3645 wv_82586_config(dev);
3646
3647 /* Finish configuration with the receive unit */
3648 if (wv_ru_start(dev) < 0)
3649 return -1;
3650
3651#ifdef DEBUG_CONFIG_TRACE
3652 printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name);
3653#endif
3654 return 0;
3655}
3656
3657/*------------------------------------------------------------------*/
3658/*
3659 * Check if there is a WaveLAN at the specific base address.
3660 * As a side effect, this reads the MAC address.
3661 * (called in wavelan_probe() and init_module())
3662 */
3663static int wv_check_ioaddr(unsigned long ioaddr, u8 * mac)
3664{
3665 int i; /* Loop counter */
3666
3667 /* Check if the base address if available. */
3668 if (!request_region(ioaddr, sizeof(ha_t), "wavelan probe"))
3669 return -EBUSY; /* ioaddr already used */
3670
3671 /* Reset host interface */
3672 wv_hacr_reset(ioaddr);
3673
3674 /* Read the MAC address from the parameter storage area. */
3675 psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_univ_mac_addr),
3676 mac, 6);
3677
3678 release_region(ioaddr, sizeof(ha_t));
3679
3680 /*
3681 * Check the first three octets of the address for the manufacturer's code.
3682 * Note: if this can't find your WaveLAN card, you've got a
3683 * non-NCR/AT&T/Lucent ISA card. See wavelan.p.h for detail on
3684 * how to configure your card.
3685 */
3686 for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++)
3687 if ((mac[0] == MAC_ADDRESSES[i][0]) &&
3688 (mac[1] == MAC_ADDRESSES[i][1]) &&
3689 (mac[2] == MAC_ADDRESSES[i][2]))
3690 return 0;
3691
3692#ifdef DEBUG_CONFIG_INFO
3693 printk(KERN_WARNING
3694 "WaveLAN (0x%3X): your MAC address might be %02X:%02X:%02X.\n",
3695 ioaddr, mac[0], mac[1], mac[2]);
3696#endif
3697 return -ENODEV;
3698}
3699
3700/************************ INTERRUPT HANDLING ************************/
3701
3702/*
3703 * This function is the interrupt handler for the WaveLAN card. This
3704 * routine will be called whenever:
3705 */
3706static irqreturn_t wavelan_interrupt(int irq, void *dev_id)
3707{
3708 struct net_device *dev;
3709 unsigned long ioaddr;
3710 net_local *lp;
3711 u16 hasr;
3712 u16 status;
3713 u16 ack_cmd;
3714
3715 dev = dev_id;
3716
3717#ifdef DEBUG_INTERRUPT_TRACE
3718 printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name);
3719#endif
3720
3721 lp = netdev_priv(dev);
3722 ioaddr = dev->base_addr;
3723
3724#ifdef DEBUG_INTERRUPT_INFO
3725 /* Check state of our spinlock */
3726 if(spin_is_locked(&lp->spinlock))
3727 printk(KERN_DEBUG
3728 "%s: wavelan_interrupt(): spinlock is already locked !!!\n",
3729 dev->name);
3730#endif
3731
3732 /* Prevent reentrancy. We need to do that because we may have
3733 * multiple interrupt handler running concurrently.
3734 * It is safe because interrupts are disabled before acquiring
3735 * the spinlock. */
3736 spin_lock(&lp->spinlock);
3737
3738 /* We always had spurious interrupts at startup, but lately I
3739 * saw them comming *between* the request_irq() and the
3740 * spin_lock_irqsave() in wavelan_open(), so the spinlock
3741 * protection is no enough.
3742 * So, we also check lp->hacr that will tell us is we enabled
3743 * irqs or not (see wv_ints_on()).
3744 * We can't use netif_running(dev) because we depend on the
3745 * proper processing of the irq generated during the config. */
3746
3747 /* Which interrupt it is ? */
3748 hasr = hasr_read(ioaddr);
3749
3750#ifdef DEBUG_INTERRUPT_INFO
3751 printk(KERN_INFO
3752 "%s: wavelan_interrupt(): hasr 0x%04x; hacr 0x%04x.\n",
3753 dev->name, hasr, lp->hacr);
3754#endif
3755
3756 /* Check modem interrupt */
3757 if ((hasr & HASR_MMC_INTR) && (lp->hacr & HACR_MMC_INT_ENABLE)) {
3758 u8 dce_status;
3759
3760 /*
3761 * Interrupt from the modem management controller.
3762 * This will clear it -- ignored for now.
3763 */
3764 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status,
3765 sizeof(dce_status));
3766
3767#ifdef DEBUG_INTERRUPT_ERROR
3768 printk(KERN_INFO
3769 "%s: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n",
3770 dev->name, dce_status);
3771#endif
3772 }
3773
3774 /* Check if not controller interrupt */
3775 if (((hasr & HASR_82586_INTR) == 0) ||
3776 ((lp->hacr & HACR_82586_INT_ENABLE) == 0)) {
3777#ifdef DEBUG_INTERRUPT_ERROR
3778 printk(KERN_INFO
3779 "%s: wavelan_interrupt(): interrupt not coming from i82586 - hasr 0x%04x.\n",
3780 dev->name, hasr);
3781#endif
3782 spin_unlock (&lp->spinlock);
3783 return IRQ_NONE;
3784 }
3785
3786 /* Read interrupt data. */
3787 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
3788 (unsigned char *) &status, sizeof(status));
3789
3790 /*
3791 * Acknowledge the interrupt(s).
3792 */
3793 ack_cmd = status & SCB_ST_INT;
3794 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3795 (unsigned char *) &ack_cmd, sizeof(ack_cmd));
3796 set_chan_attn(ioaddr, lp->hacr);
3797
3798#ifdef DEBUG_INTERRUPT_INFO
3799 printk(KERN_DEBUG "%s: wavelan_interrupt(): status 0x%04x.\n",
3800 dev->name, status);
3801#endif
3802
3803 /* Command completed. */
3804 if ((status & SCB_ST_CX) == SCB_ST_CX) {
3805#ifdef DEBUG_INTERRUPT_INFO
3806 printk(KERN_DEBUG
3807 "%s: wavelan_interrupt(): command completed.\n",
3808 dev->name);
3809#endif
3810 wv_complete(dev, ioaddr, lp);
3811 }
3812
3813 /* Frame received. */
3814 if ((status & SCB_ST_FR) == SCB_ST_FR) {
3815#ifdef DEBUG_INTERRUPT_INFO
3816 printk(KERN_DEBUG
3817 "%s: wavelan_interrupt(): received packet.\n",
3818 dev->name);
3819#endif
3820 wv_receive(dev);
3821 }
3822
3823 /* Check the state of the command unit. */
3824 if (((status & SCB_ST_CNA) == SCB_ST_CNA) ||
3825 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) &&
3826 (netif_running(dev)))) {
3827#ifdef DEBUG_INTERRUPT_ERROR
3828 printk(KERN_INFO
3829 "%s: wavelan_interrupt(): CU inactive -- restarting\n",
3830 dev->name);
3831#endif
3832 wv_hw_reset(dev);
3833 }
3834
3835 /* Check the state of the command unit. */
3836 if (((status & SCB_ST_RNR) == SCB_ST_RNR) ||
3837 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) &&
3838 (netif_running(dev)))) {
3839#ifdef DEBUG_INTERRUPT_ERROR
3840 printk(KERN_INFO
3841 "%s: wavelan_interrupt(): RU not ready -- restarting\n",
3842 dev->name);
3843#endif
3844 wv_hw_reset(dev);
3845 }
3846
3847 /* Release spinlock */
3848 spin_unlock (&lp->spinlock);
3849
3850#ifdef DEBUG_INTERRUPT_TRACE
3851 printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name);
3852#endif
3853 return IRQ_HANDLED;
3854}
3855
3856/*------------------------------------------------------------------*/
3857/*
3858 * Watchdog: when we start a transmission, a timer is set for us in the
3859 * kernel. If the transmission completes, this timer is disabled. If
3860 * the timer expires, we are called and we try to unlock the hardware.
3861 */
3862static void wavelan_watchdog(struct net_device * dev)
3863{
3864 net_local *lp = netdev_priv(dev);
3865 u_long ioaddr = dev->base_addr;
3866 unsigned long flags;
3867 unsigned int nreaped;
3868
3869#ifdef DEBUG_INTERRUPT_TRACE
3870 printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name);
3871#endif
3872
3873#ifdef DEBUG_INTERRUPT_ERROR
3874 printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n",
3875 dev->name);
3876#endif
3877
3878 /* Check that we came here for something */
3879 if (lp->tx_n_in_use <= 0) {
3880 return;
3881 }
3882
3883 spin_lock_irqsave(&lp->spinlock, flags);
3884
3885 /* Try to see if some buffers are not free (in case we missed
3886 * an interrupt */
3887 nreaped = wv_complete(dev, ioaddr, lp);
3888
3889#ifdef DEBUG_INTERRUPT_INFO
3890 printk(KERN_DEBUG
3891 "%s: wavelan_watchdog(): %d reaped, %d remain.\n",
3892 dev->name, nreaped, lp->tx_n_in_use);
3893#endif
3894
3895#ifdef DEBUG_PSA_SHOW
3896 {
3897 psa_t psa;
3898 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
3899 wv_psa_show(&psa);
3900 }
3901#endif
3902#ifdef DEBUG_MMC_SHOW
3903 wv_mmc_show(dev);
3904#endif
3905#ifdef DEBUG_I82586_SHOW
3906 wv_cu_show(dev);
3907#endif
3908
3909 /* If no buffer has been freed */
3910 if (nreaped == 0) {
3911#ifdef DEBUG_INTERRUPT_ERROR
3912 printk(KERN_INFO
3913 "%s: wavelan_watchdog(): cleanup failed, trying reset\n",
3914 dev->name);
3915#endif
3916 wv_hw_reset(dev);
3917 }
3918
3919 /* At this point, we should have some free Tx buffer ;-) */
3920 if (lp->tx_n_in_use < NTXBLOCKS - 1)
3921 netif_wake_queue(dev);
3922
3923 spin_unlock_irqrestore(&lp->spinlock, flags);
3924
3925#ifdef DEBUG_INTERRUPT_TRACE
3926 printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name);
3927#endif
3928}
3929
3930/********************* CONFIGURATION CALLBACKS *********************/
3931/*
3932 * Here are the functions called by the Linux networking code (NET3)
3933 * for initialization, configuration and deinstallations of the
3934 * WaveLAN ISA hardware.
3935 */
3936
3937/*------------------------------------------------------------------*/
3938/*
3939 * Configure and start up the WaveLAN PCMCIA adaptor.
3940 * Called by NET3 when it "opens" the device.
3941 */
3942static int wavelan_open(struct net_device * dev)
3943{
3944 net_local *lp = netdev_priv(dev);
3945 unsigned long flags;
3946
3947#ifdef DEBUG_CALLBACK_TRACE
3948 printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
3949 (unsigned int) dev);
3950#endif
3951
3952 /* Check irq */
3953 if (dev->irq == 0) {
3954#ifdef DEBUG_CONFIG_ERROR
3955 printk(KERN_WARNING "%s: wavelan_open(): no IRQ\n",
3956 dev->name);
3957#endif
3958 return -ENXIO;
3959 }
3960
3961 if (request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN", dev) != 0)
3962 {
3963#ifdef DEBUG_CONFIG_ERROR
3964 printk(KERN_WARNING "%s: wavelan_open(): invalid IRQ\n",
3965 dev->name);
3966#endif
3967 return -EAGAIN;
3968 }
3969
3970 spin_lock_irqsave(&lp->spinlock, flags);
3971
3972 if (wv_hw_reset(dev) != -1) {
3973 netif_start_queue(dev);
3974 } else {
3975 free_irq(dev->irq, dev);
3976#ifdef DEBUG_CONFIG_ERROR
3977 printk(KERN_INFO
3978 "%s: wavelan_open(): impossible to start the card\n",
3979 dev->name);
3980#endif
3981 spin_unlock_irqrestore(&lp->spinlock, flags);
3982 return -EAGAIN;
3983 }
3984 spin_unlock_irqrestore(&lp->spinlock, flags);
3985
3986#ifdef DEBUG_CALLBACK_TRACE
3987 printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name);
3988#endif
3989 return 0;
3990}
3991
3992/*------------------------------------------------------------------*/
3993/*
3994 * Shut down the WaveLAN ISA card.
3995 * Called by NET3 when it "closes" the device.
3996 */
3997static int wavelan_close(struct net_device * dev)
3998{
3999 net_local *lp = netdev_priv(dev);
4000 unsigned long flags;
4001
4002#ifdef DEBUG_CALLBACK_TRACE
4003 printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
4004 (unsigned int) dev);
4005#endif
4006
4007 netif_stop_queue(dev);
4008
4009 /*
4010 * Flush the Tx and disable Rx.
4011 */
4012 spin_lock_irqsave(&lp->spinlock, flags);
4013 wv_82586_stop(dev);
4014 spin_unlock_irqrestore(&lp->spinlock, flags);
4015
4016 free_irq(dev->irq, dev);
4017
4018#ifdef DEBUG_CALLBACK_TRACE
4019 printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name);
4020#endif
4021 return 0;
4022}
4023
4024static const struct net_device_ops wavelan_netdev_ops = {
4025 .ndo_open = wavelan_open,
4026 .ndo_stop = wavelan_close,
4027 .ndo_start_xmit = wavelan_packet_xmit,
4028 .ndo_set_multicast_list = wavelan_set_multicast_list,
4029 .ndo_tx_timeout = wavelan_watchdog,
4030 .ndo_change_mtu = eth_change_mtu,
4031 .ndo_validate_addr = eth_validate_addr,
4032#ifdef SET_MAC_ADDRESS
4033 .ndo_set_mac_address = wavelan_set_mac_address
4034#else
4035 .ndo_set_mac_address = eth_mac_addr,
4036#endif
4037};
4038
4039
4040/*------------------------------------------------------------------*/
4041/*
4042 * Probe an I/O address, and if the WaveLAN is there configure the
4043 * device structure
4044 * (called by wavelan_probe() and via init_module()).
4045 */
4046static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr)
4047{
4048 u8 irq_mask;
4049 int irq;
4050 net_local *lp;
4051 mac_addr mac;
4052 int err;
4053
4054 if (!request_region(ioaddr, sizeof(ha_t), "wavelan"))
4055 return -EADDRINUSE;
4056
4057 err = wv_check_ioaddr(ioaddr, mac);
4058 if (err)
4059 goto out;
4060
4061 memcpy(dev->dev_addr, mac, 6);
4062
4063 dev->base_addr = ioaddr;
4064
4065#ifdef DEBUG_CALLBACK_TRACE
4066 printk(KERN_DEBUG "%s: ->wavelan_config(dev=0x%x, ioaddr=0x%lx)\n",
4067 dev->name, (unsigned int) dev, ioaddr);
4068#endif
4069
4070 /* Check IRQ argument on command line. */
4071 if (dev->irq != 0) {
4072 irq_mask = wv_irq_to_psa(dev->irq);
4073
4074 if (irq_mask == 0) {
4075#ifdef DEBUG_CONFIG_ERROR
4076 printk(KERN_WARNING
4077 "%s: wavelan_config(): invalid IRQ %d ignored.\n",
4078 dev->name, dev->irq);
4079#endif
4080 dev->irq = 0;
4081 } else {
4082#ifdef DEBUG_CONFIG_INFO
4083 printk(KERN_DEBUG
4084 "%s: wavelan_config(): changing IRQ to %d\n",
4085 dev->name, dev->irq);
4086#endif
4087 psa_write(ioaddr, HACR_DEFAULT,
4088 psaoff(0, psa_int_req_no), &irq_mask, 1);
4089 /* update the Wavelan checksum */
4090 update_psa_checksum(dev, ioaddr, HACR_DEFAULT);
4091 wv_hacr_reset(ioaddr);
4092 }
4093 }
4094
4095 psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_int_req_no),
4096 &irq_mask, 1);
4097 if ((irq = wv_psa_to_irq(irq_mask)) == -1) {
4098#ifdef DEBUG_CONFIG_ERROR
4099 printk(KERN_INFO
4100 "%s: wavelan_config(): could not wavelan_map_irq(%d).\n",
4101 dev->name, irq_mask);
4102#endif
4103 err = -EAGAIN;
4104 goto out;
4105 }
4106
4107 dev->irq = irq;
4108
4109 dev->mem_start = 0x0000;
4110 dev->mem_end = 0x0000;
4111 dev->if_port = 0;
4112
4113 /* Initialize device structures */
4114 memset(netdev_priv(dev), 0, sizeof(net_local));
4115 lp = netdev_priv(dev);
4116
4117 /* Back link to the device structure. */
4118 lp->dev = dev;
4119 /* Add the device at the beginning of the linked list. */
4120 lp->next = wavelan_list;
4121 wavelan_list = lp;
4122
4123 lp->hacr = HACR_DEFAULT;
4124
4125 /* Multicast stuff */
4126 lp->promiscuous = 0;
4127 lp->mc_count = 0;
4128
4129 /* Init spinlock */
4130 spin_lock_init(&lp->spinlock);
4131
4132 dev->netdev_ops = &wavelan_netdev_ops;
4133 dev->watchdog_timeo = WATCHDOG_JIFFIES;
4134 dev->wireless_handlers = &wavelan_handler_def;
4135 lp->wireless_data.spy_data = &lp->spy_data;
4136 dev->wireless_data = &lp->wireless_data;
4137
4138 dev->mtu = WAVELAN_MTU;
4139
4140 /* Display nice information. */
4141 wv_init_info(dev);
4142
4143#ifdef DEBUG_CALLBACK_TRACE
4144 printk(KERN_DEBUG "%s: <-wavelan_config()\n", dev->name);
4145#endif
4146 return 0;
4147out:
4148 release_region(ioaddr, sizeof(ha_t));
4149 return err;
4150}
4151
4152/*------------------------------------------------------------------*/
4153/*
4154 * Check for a network adaptor of this type. Return '0' iff one
4155 * exists. There seem to be different interpretations of
4156 * the initial value of dev->base_addr.
4157 * We follow the example in drivers/net/ne.c.
4158 * (called in "Space.c")
4159 */
4160struct net_device * __init wavelan_probe(int unit)
4161{
4162 struct net_device *dev;
4163 short base_addr;
4164 int def_irq;
4165 int i;
4166 int r = 0;
4167
4168 /* compile-time check the sizes of structures */
4169 BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE);
4170 BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE);
4171 BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE);
4172 BUILD_BUG_ON(sizeof(ha_t) != HA_SIZE);
4173
4174 dev = alloc_etherdev(sizeof(net_local));
4175 if (!dev)
4176 return ERR_PTR(-ENOMEM);
4177
4178 sprintf(dev->name, "eth%d", unit);
4179 netdev_boot_setup_check(dev);
4180 base_addr = dev->base_addr;
4181 def_irq = dev->irq;
4182
4183#ifdef DEBUG_CALLBACK_TRACE
4184 printk(KERN_DEBUG
4185 "%s: ->wavelan_probe(dev=%p (base_addr=0x%x))\n",
4186 dev->name, dev, (unsigned int) dev->base_addr);
4187#endif
4188
4189 /* Don't probe at all. */
4190 if (base_addr < 0) {
4191#ifdef DEBUG_CONFIG_ERROR
4192 printk(KERN_WARNING
4193 "%s: wavelan_probe(): invalid base address\n",
4194 dev->name);
4195#endif
4196 r = -ENXIO;
4197 } else if (base_addr > 0x100) { /* Check a single specified location. */
4198 r = wavelan_config(dev, base_addr);
4199#ifdef DEBUG_CONFIG_INFO
4200 if (r != 0)
4201 printk(KERN_DEBUG
4202 "%s: wavelan_probe(): no device at specified base address (0x%X) or address already in use\n",
4203 dev->name, base_addr);
4204#endif
4205
4206#ifdef DEBUG_CALLBACK_TRACE
4207 printk(KERN_DEBUG "%s: <-wavelan_probe()\n", dev->name);
4208#endif
4209 } else { /* Scan all possible addresses of the WaveLAN hardware. */
4210 for (i = 0; i < ARRAY_SIZE(iobase); i++) {
4211 dev->irq = def_irq;
4212 if (wavelan_config(dev, iobase[i]) == 0) {
4213#ifdef DEBUG_CALLBACK_TRACE
4214 printk(KERN_DEBUG
4215 "%s: <-wavelan_probe()\n",
4216 dev->name);
4217#endif
4218 break;
4219 }
4220 }
4221 if (i == ARRAY_SIZE(iobase))
4222 r = -ENODEV;
4223 }
4224 if (r)
4225 goto out;
4226 r = register_netdev(dev);
4227 if (r)
4228 goto out1;
4229 return dev;
4230out1:
4231 release_region(dev->base_addr, sizeof(ha_t));
4232 wavelan_list = wavelan_list->next;
4233out:
4234 free_netdev(dev);
4235 return ERR_PTR(r);
4236}
4237
4238/****************************** MODULE ******************************/
4239/*
4240 * Module entry point: insertion and removal
4241 */
4242
4243#ifdef MODULE
4244/*------------------------------------------------------------------*/
4245/*
4246 * Insertion of the module
4247 * I'm now quite proud of the multi-device support.
4248 */
4249int __init init_module(void)
4250{
4251 int ret = -EIO; /* Return error if no cards found */
4252 int i;
4253
4254#ifdef DEBUG_MODULE_TRACE
4255 printk(KERN_DEBUG "-> init_module()\n");
4256#endif
4257
4258 /* If probing is asked */
4259 if (io[0] == 0) {
4260#ifdef DEBUG_CONFIG_ERROR
4261 printk(KERN_WARNING
4262 "WaveLAN init_module(): doing device probing (bad !)\n");
4263 printk(KERN_WARNING
4264 "Specify base addresses while loading module to correct the problem\n");
4265#endif
4266
4267 /* Copy the basic set of address to be probed. */
4268 for (i = 0; i < ARRAY_SIZE(iobase); i++)
4269 io[i] = iobase[i];
4270 }
4271
4272
4273 /* Loop on all possible base addresses. */
4274 for (i = 0; i < ARRAY_SIZE(io) && io[i] != 0; i++) {
4275 struct net_device *dev = alloc_etherdev(sizeof(net_local));
4276 if (!dev)
4277 break;
4278 if (name[i])
4279 strcpy(dev->name, name[i]); /* Copy name */
4280 dev->base_addr = io[i];
4281 dev->irq = irq[i];
4282
4283 /* Check if there is something at this base address. */
4284 if (wavelan_config(dev, io[i]) == 0) {
4285 if (register_netdev(dev) != 0) {
4286 release_region(dev->base_addr, sizeof(ha_t));
4287 wavelan_list = wavelan_list->next;
4288 } else {
4289 ret = 0;
4290 continue;
4291 }
4292 }
4293 free_netdev(dev);
4294 }
4295
4296#ifdef DEBUG_CONFIG_ERROR
4297 if (!wavelan_list)
4298 printk(KERN_WARNING
4299 "WaveLAN init_module(): no device found\n");
4300#endif
4301
4302#ifdef DEBUG_MODULE_TRACE
4303 printk(KERN_DEBUG "<- init_module()\n");
4304#endif
4305 return ret;
4306}
4307
4308/*------------------------------------------------------------------*/
4309/*
4310 * Removal of the module
4311 */
4312void cleanup_module(void)
4313{
4314#ifdef DEBUG_MODULE_TRACE
4315 printk(KERN_DEBUG "-> cleanup_module()\n");
4316#endif
4317
4318 /* Loop on all devices and release them. */
4319 while (wavelan_list) {
4320 struct net_device *dev = wavelan_list->dev;
4321
4322#ifdef DEBUG_CONFIG_INFO
4323 printk(KERN_DEBUG
4324 "%s: cleanup_module(): removing device at 0x%x\n",
4325 dev->name, (unsigned int) dev);
4326#endif
4327 unregister_netdev(dev);
4328
4329 release_region(dev->base_addr, sizeof(ha_t));
4330 wavelan_list = wavelan_list->next;
4331
4332 free_netdev(dev);
4333 }
4334
4335#ifdef DEBUG_MODULE_TRACE
4336 printk(KERN_DEBUG "<- cleanup_module()\n");
4337#endif
4338}
4339#endif /* MODULE */
4340MODULE_LICENSE("GPL");
4341
4342/*
4343 * This software may only be used and distributed
4344 * according to the terms of the GNU General Public License.
4345 *
4346 * This software was developed as a component of the
4347 * Linux operating system.
4348 * It is based on other device drivers and information
4349 * either written or supplied by:
4350 * Ajay Bakre (bakre@paul.rutgers.edu),
4351 * Donald Becker (becker@scyld.com),
4352 * Loeke Brederveld (Loeke.Brederveld@Utrecht.NCR.com),
4353 * Anders Klemets (klemets@it.kth.se),
4354 * Vladimir V. Kolpakov (w@stier.koenig.ru),
4355 * Marc Meertens (Marc.Meertens@Utrecht.NCR.com),
4356 * Pauline Middelink (middelin@polyware.iaf.nl),
4357 * Robert Morris (rtm@das.harvard.edu),
4358 * Jean Tourrilhes (jt@hplb.hpl.hp.com),
4359 * Girish Welling (welling@paul.rutgers.edu),
4360 *
4361 * Thanks go also to:
4362 * James Ashton (jaa101@syseng.anu.edu.au),
4363 * Alan Cox (alan@lxorguk.ukuu.org.uk),
4364 * Allan Creighton (allanc@cs.usyd.edu.au),
4365 * Matthew Geier (matthew@cs.usyd.edu.au),
4366 * Remo di Giovanni (remo@cs.usyd.edu.au),
4367 * Eckhard Grah (grah@wrcs1.urz.uni-wuppertal.de),
4368 * Vipul Gupta (vgupta@cs.binghamton.edu),
4369 * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM),
4370 * Tim Nicholson (tim@cs.usyd.edu.au),
4371 * Ian Parkin (ian@cs.usyd.edu.au),
4372 * John Rosenberg (johnr@cs.usyd.edu.au),
4373 * George Rossi (george@phm.gov.au),
4374 * Arthur Scott (arthur@cs.usyd.edu.au),
4375 * Peter Storey,
4376 * for their assistance and advice.
4377 *
4378 * Please send bug reports, updates, comments to:
4379 *
4380 * Bruce Janson Email: bruce@cs.usyd.edu.au
4381 * Basser Department of Computer Science Phone: +61-2-9351-3423
4382 * University of Sydney, N.S.W., 2006, AUSTRALIA Fax: +61-2-9351-3838
4383 */
diff --git a/drivers/staging/wavelan/wavelan.h b/drivers/staging/wavelan/wavelan.h
deleted file mode 100644
index 9ab360558ffd..000000000000
--- a/drivers/staging/wavelan/wavelan.h
+++ /dev/null
@@ -1,370 +0,0 @@
1/*
2 * WaveLAN ISA driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 * Original copyright follows. See wavelan.p.h for details.
8 *
9 * This file contains the declarations for the WaveLAN hardware. Note that
10 * the WaveLAN ISA includes a i82586 controller (see definitions in
11 * file i82586.h).
12 *
13 * The main difference between the ISA hardware and the PCMCIA one is
14 * the Ethernet controller (i82586 instead of i82593).
15 * The i82586 allows multiple transmit buffers. The PSA needs to be accessed
16 * through the host interface.
17 */
18
19#ifndef _WAVELAN_H
20#define _WAVELAN_H
21
22/************************** MAGIC NUMBERS ***************************/
23
24/* Detection of the WaveLAN card is done by reading the MAC
25 * address from the card and checking it. If you have a non-AT&T
26 * product (OEM, like DEC RoamAbout, Digital Ocean, or Epson),
27 * you might need to modify this part to accommodate your hardware.
28 */
29static const char MAC_ADDRESSES[][3] =
30{
31 { 0x08, 0x00, 0x0E }, /* AT&T WaveLAN (standard) & DEC RoamAbout */
32 { 0x08, 0x00, 0x6A }, /* AT&T WaveLAN (alternate) */
33 { 0x00, 0x00, 0xE1 }, /* Hitachi Wavelan */
34 { 0x00, 0x60, 0x1D } /* Lucent Wavelan (another one) */
35 /* Add your card here and send me the patch! */
36};
37
38#define WAVELAN_ADDR_SIZE 6 /* Size of a MAC address */
39
40#define WAVELAN_MTU 1500 /* Maximum size of WaveLAN packet */
41
42#define MAXDATAZ (WAVELAN_ADDR_SIZE + WAVELAN_ADDR_SIZE + 2 + WAVELAN_MTU)
43
44/*
45 * Constants used to convert channels to frequencies
46 */
47
48/* Frequency available in the 2.0 modem, in units of 250 kHz
49 * (as read in the offset register of the dac area).
50 * Used to map channel numbers used by `wfreqsel' to frequencies
51 */
52static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
53 0xD0, 0xF0, 0xF8, 0x150 };
54
55/* Frequencies of the 1.0 modem (fixed frequencies).
56 * Use to map the PSA `subband' to a frequency
57 * Note : all frequencies apart from the first one need to be multiplied by 10
58 */
59static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
60
61
62
63/*************************** PC INTERFACE ****************************/
64
65/*
66 * Host Adaptor structure.
67 * (base is board port address).
68 */
69typedef union hacs_u hacs_u;
70union hacs_u
71{
72 unsigned short hu_command; /* Command register */
73#define HACR_RESET 0x0001 /* Reset board */
74#define HACR_CA 0x0002 /* Set Channel Attention for 82586 */
75#define HACR_16BITS 0x0004 /* 16-bit operation (0 => 8bits) */
76#define HACR_OUT0 0x0008 /* General purpose output pin 0 */
77 /* not used - must be 1 */
78#define HACR_OUT1 0x0010 /* General purpose output pin 1 */
79 /* not used - must be 1 */
80#define HACR_82586_INT_ENABLE 0x0020 /* Enable 82586 interrupts */
81#define HACR_MMC_INT_ENABLE 0x0040 /* Enable MMC interrupts */
82#define HACR_INTR_CLR_ENABLE 0x0080 /* Enable interrupt status read/clear */
83 unsigned short hu_status; /* Status Register */
84#define HASR_82586_INTR 0x0001 /* Interrupt request from 82586 */
85#define HASR_MMC_INTR 0x0002 /* Interrupt request from MMC */
86#define HASR_MMC_BUSY 0x0004 /* MMC busy indication */
87#define HASR_PSA_BUSY 0x0008 /* LAN parameter storage area busy */
88} __attribute__ ((packed));
89
90typedef struct ha_t ha_t;
91struct ha_t
92{
93 hacs_u ha_cs; /* Command and status registers */
94#define ha_command ha_cs.hu_command
95#define ha_status ha_cs.hu_status
96 unsigned short ha_mmcr; /* Modem Management Ctrl Register */
97 unsigned short ha_pior0; /* Program I/O Address Register Port 0 */
98 unsigned short ha_piop0; /* Program I/O Port 0 */
99 unsigned short ha_pior1; /* Program I/O Address Register Port 1 */
100 unsigned short ha_piop1; /* Program I/O Port 1 */
101 unsigned short ha_pior2; /* Program I/O Address Register Port 2 */
102 unsigned short ha_piop2; /* Program I/O Port 2 */
103};
104
105#define HA_SIZE 16
106
107#define hoff(p,f) (unsigned short)((void *)(&((ha_t *)((void *)0 + (p)))->f) - (void *)0)
108#define HACR(p) hoff(p, ha_command)
109#define HASR(p) hoff(p, ha_status)
110#define MMCR(p) hoff(p, ha_mmcr)
111#define PIOR0(p) hoff(p, ha_pior0)
112#define PIOP0(p) hoff(p, ha_piop0)
113#define PIOR1(p) hoff(p, ha_pior1)
114#define PIOP1(p) hoff(p, ha_piop1)
115#define PIOR2(p) hoff(p, ha_pior2)
116#define PIOP2(p) hoff(p, ha_piop2)
117
118/*
119 * Program I/O Mode Register values.
120 */
121#define STATIC_PIO 0 /* Mode 1: static mode */
122 /* RAM access ??? */
123#define AUTOINCR_PIO 1 /* Mode 2: auto increment mode */
124 /* RAM access ??? */
125#define AUTODECR_PIO 2 /* Mode 3: auto decrement mode */
126 /* RAM access ??? */
127#define PARAM_ACCESS_PIO 3 /* Mode 4: LAN parameter access mode */
128 /* Parameter access. */
129#define PIO_MASK 3 /* register mask */
130#define PIOM(cmd,piono) ((u_short)cmd << 10 << (piono * 2))
131
132#define HACR_DEFAULT (HACR_OUT0 | HACR_OUT1 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
133#define HACR_INTRON (HACR_82586_INT_ENABLE | HACR_MMC_INT_ENABLE | HACR_INTR_CLR_ENABLE)
134
135/************************** MEMORY LAYOUT **************************/
136
137/*
138 * Onboard 64 k RAM layout.
139 * (Offsets from 0x0000.)
140 */
141#define OFFSET_RU 0x0000 /* 75% memory */
142#define OFFSET_CU 0xC000 /* 25% memory */
143#define OFFSET_SCB (OFFSET_ISCP - sizeof(scb_t))
144#define OFFSET_ISCP (OFFSET_SCP - sizeof(iscp_t))
145#define OFFSET_SCP I82586_SCP_ADDR
146
147#define RXBLOCKZ (sizeof(fd_t) + sizeof(rbd_t) + MAXDATAZ)
148#define TXBLOCKZ (sizeof(ac_tx_t) + sizeof(ac_nop_t) + sizeof(tbd_t) + MAXDATAZ)
149
150#define NRXBLOCKS ((OFFSET_CU - OFFSET_RU) / RXBLOCKZ)
151#define NTXBLOCKS ((OFFSET_SCB - OFFSET_CU) / TXBLOCKZ)
152
153/********************** PARAMETER STORAGE AREA **********************/
154
155/*
156 * Parameter Storage Area (PSA).
157 */
158typedef struct psa_t psa_t;
159struct psa_t
160{
161 unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */
162 unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */
163 unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */
164 unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */
165 unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */
166 unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */
167 unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */
168 unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */
169 unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */
170 unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */
171
172 unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */
173 unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */
174 unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */
175#define PSA_UNIVERSAL 0 /* Universal (factory) */
176#define PSA_LOCAL 1 /* Local */
177 unsigned char psa_comp_number; /* [0x1D] Compatibility Number: */
178#define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */
179#define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */
180#define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */
181#define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */
182#define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */
183 unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */
184 unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */
185#define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */
186 unsigned char psa_subband; /* [0x20] Subband */
187#define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */
188#define PSA_SUBBAND_2425 1 /* 2425 MHz */
189#define PSA_SUBBAND_2460 2 /* 2460 MHz */
190#define PSA_SUBBAND_2484 3 /* 2484 MHz */
191#define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */
192 unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */
193 unsigned char psa_mod_delay; /* [0x22] Modem Delay (?) (reserved) */
194 unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */
195 unsigned char psa_nwid_select; /* [0x25] Network ID Select On/Off */
196 unsigned char psa_encryption_select; /* [0x26] Encryption On/Off */
197 unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */
198 unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */
199 unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */
200 unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */
201 unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */
202 unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/
203 unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */
204 unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */
205};
206
207#define PSA_SIZE 64
208
209/* Calculate offset of a field in the above structure.
210 * Warning: only even addresses are used. */
211#define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
212
213/******************** MODEM MANAGEMENT INTERFACE ********************/
214
215/*
216 * Modem Management Controller (MMC) write structure.
217 */
218typedef struct mmw_t mmw_t;
219struct mmw_t
220{
221 unsigned char mmw_encr_key[8]; /* encryption key */
222 unsigned char mmw_encr_enable; /* Enable or disable encryption. */
223#define MMW_ENCR_ENABLE_MODE 0x02 /* mode of security option */
224#define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option. */
225 unsigned char mmw_unused0[1]; /* unused */
226 unsigned char mmw_des_io_invert; /* encryption option */
227#define MMW_DES_IO_INVERT_RES 0x0F /* reserved */
228#define MMW_DES_IO_INVERT_CTRL 0xF0 /* control (?) (set to 0) */
229 unsigned char mmw_unused1[5]; /* unused */
230 unsigned char mmw_loopt_sel; /* looptest selection */
231#define MMW_LOOPT_SEL_DIS_NWID 0x40 /* Disable NWID filtering. */
232#define MMW_LOOPT_SEL_INT 0x20 /* Activate Attention Request. */
233#define MMW_LOOPT_SEL_LS 0x10 /* looptest, no collision avoidance */
234#define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */
235#define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */
236#define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */
237#define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */
238 unsigned char mmw_jabber_enable; /* jabber timer enable */
239 /* Abort transmissions > 200 ms */
240 unsigned char mmw_freeze; /* freeze or unfreeze signal level */
241 /* 0 : signal level & qual updated for every new message, 1 : frozen */
242 unsigned char mmw_anten_sel; /* antenna selection */
243#define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */
244#define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */
245 unsigned char mmw_ifs; /* inter frame spacing */
246 /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
247 unsigned char mmw_mod_delay; /* modem delay (synchro) */
248 unsigned char mmw_jam_time; /* jamming time (after collision) */
249 unsigned char mmw_unused2[1]; /* unused */
250 unsigned char mmw_thr_pre_set; /* level threshold preset */
251 /* Discard all packet with signal < this value (4) */
252 unsigned char mmw_decay_prm; /* decay parameters */
253 unsigned char mmw_decay_updat_prm; /* decay update parameters */
254 unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */
255 /* Discard all packet with quality < this value (3) */
256 unsigned char mmw_netw_id_l; /* NWID low order byte */
257 unsigned char mmw_netw_id_h; /* NWID high order byte */
258 /* Network ID or Domain : create virtual net on the air */
259
260 /* 2.0 Hardware extension - frequency selection support */
261 unsigned char mmw_mode_select; /* for analog tests (set to 0) */
262 unsigned char mmw_unused3[1]; /* unused */
263 unsigned char mmw_fee_ctrl; /* frequency EEPROM control */
264#define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions. */
265#define MMW_FEE_CTRL_DWLD 0x08 /* Download EEPROM to mmc. */
266#define MMW_FEE_CTRL_CMD 0x07 /* EEPROM commands: */
267#define MMW_FEE_CTRL_READ 0x06 /* Read */
268#define MMW_FEE_CTRL_WREN 0x04 /* Write enable */
269#define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address. */
270#define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses. */
271#define MMW_FEE_CTRL_WDS 0x04 /* Write disable */
272#define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */
273#define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */
274#define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers. */
275#define MMW_FEE_CTRL_PRWRITE 0x15 /* Write address in protect register */
276#define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */
277 /* Never issue the PRDS command: it's irreversible! */
278
279 unsigned char mmw_fee_addr; /* EEPROM address */
280#define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel. */
281#define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */
282#define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */
283#define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */
284#define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */
285#define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */
286
287 unsigned char mmw_fee_data_l; /* Write data to EEPROM. */
288 unsigned char mmw_fee_data_h; /* high octet */
289 unsigned char mmw_ext_ant; /* Setting for external antenna */
290#define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */
291#define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */
292#define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */
293#define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */
294#define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */
295} __attribute__ ((packed));
296
297#define MMW_SIZE 37
298
299#define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
300
301/*
302 * Modem Management Controller (MMC) read structure.
303 */
304typedef struct mmr_t mmr_t;
305struct mmr_t
306{
307 unsigned char mmr_unused0[8]; /* unused */
308 unsigned char mmr_des_status; /* encryption status */
309 unsigned char mmr_des_avail; /* encryption available (0x55 read) */
310#define MMR_DES_AVAIL_DES 0x55 /* DES available */
311#define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */
312 unsigned char mmr_des_io_invert; /* des I/O invert register */
313 unsigned char mmr_unused1[5]; /* unused */
314 unsigned char mmr_dce_status; /* DCE status */
315#define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */
316#define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */
317#define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */
318#define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */
319#define MMR_DCE_STATUS 0x0F /* mask to get the bits */
320 unsigned char mmr_dsp_id; /* DSP ID (AA = Daedalus rev A) */
321 unsigned char mmr_unused2[2]; /* unused */
322 unsigned char mmr_correct_nwid_l; /* # of correct NWIDs rxd (low) */
323 unsigned char mmr_correct_nwid_h; /* # of correct NWIDs rxd (high) */
324 /* Warning: read high-order octet first! */
325 unsigned char mmr_wrong_nwid_l; /* # of wrong NWIDs rxd (low) */
326 unsigned char mmr_wrong_nwid_h; /* # of wrong NWIDs rxd (high) */
327 unsigned char mmr_thr_pre_set; /* level threshold preset */
328#define MMR_THR_PRE_SET 0x3F /* level threshold preset */
329#define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */
330 unsigned char mmr_signal_lvl; /* signal level */
331#define MMR_SIGNAL_LVL 0x3F /* signal level */
332#define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */
333 unsigned char mmr_silence_lvl; /* silence level (noise) */
334#define MMR_SILENCE_LVL 0x3F /* silence level */
335#define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */
336 unsigned char mmr_sgnl_qual; /* signal quality */
337#define MMR_SGNL_QUAL 0x0F /* signal quality */
338#define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */
339 unsigned char mmr_netw_id_l; /* NWID low order byte (?) */
340 unsigned char mmr_unused3[3]; /* unused */
341
342 /* 2.0 Hardware extension - frequency selection support */
343 unsigned char mmr_fee_status; /* Status of frequency EEPROM */
344#define MMR_FEE_STATUS_ID 0xF0 /* Modem revision ID */
345#define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */
346#define MMR_FEE_STATUS_BUSY 0x04 /* EEPROM busy */
347 unsigned char mmr_unused4[1]; /* unused */
348 unsigned char mmr_fee_data_l; /* Read data from EEPROM (low) */
349 unsigned char mmr_fee_data_h; /* Read data from EEPROM (high) */
350} __attribute__ ((packed));
351
352#define MMR_SIZE 36
353
354#define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
355
356/* Make the two above structures one */
357typedef union mm_t
358{
359 struct mmw_t w; /* Write to the mmc */
360 struct mmr_t r; /* Read from the mmc */
361} mm_t;
362
363#endif /* _WAVELAN_H */
364
365/*
366 * This software may only be used and distributed
367 * according to the terms of the GNU General Public License.
368 *
369 * For more details, see wavelan.c.
370 */
diff --git a/drivers/staging/wavelan/wavelan.p.h b/drivers/staging/wavelan/wavelan.p.h
deleted file mode 100644
index dbe8de6e5f52..000000000000
--- a/drivers/staging/wavelan/wavelan.p.h
+++ /dev/null
@@ -1,696 +0,0 @@
1/*
2 * WaveLAN ISA driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 *
8 * This file contains all definitions and declarations necessary for the
9 * WaveLAN ISA driver. This file is a private header, so it should
10 * be included only in wavelan.c!
11 */
12
13#ifndef WAVELAN_P_H
14#define WAVELAN_P_H
15
16/************************** DOCUMENTATION ***************************/
17/*
18 * This driver provides a Linux interface to the WaveLAN ISA hardware.
19 * The WaveLAN is a product of Lucent (http://www.wavelan.com/).
20 * This division was formerly part of NCR and then AT&T.
21 * WaveLANs are also distributed by DEC (RoamAbout DS) and Digital Ocean.
22 *
23 * To learn how to use this driver, read the NET3 HOWTO.
24 * If you want to exploit the many other functionalities, read the comments
25 * in the code.
26 *
27 * This driver is the result of the effort of many people (see below).
28 */
29
30/* ------------------------ SPECIFIC NOTES ------------------------ */
31/*
32 * Web page
33 * --------
34 * I try to maintain a web page with the Wireless LAN Howto at :
35 * http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
36 *
37 * SMP
38 * ---
39 * We now are SMP compliant (I eventually fixed the remaining bugs).
40 * The driver has been tested on a dual P6-150 and survived my usual
41 * set of torture tests.
42 * Anyway, I spent enough time chasing interrupt re-entrancy during
43 * errors or reconfigure, and I designed the locked/unlocked sections
44 * of the driver with great care, and with the recent addition of
45 * the spinlock (thanks to the new API), we should be quite close to
46 * the truth.
47 * The SMP/IRQ locking is quite coarse and conservative (i.e. not fast),
48 * but better safe than sorry (especially at 2 Mb/s ;-).
49 *
50 * I have also looked into disabling only our interrupt on the card
51 * (via HACR) instead of all interrupts in the processor (via cli),
52 * so that other driver are not impacted, and it look like it's
53 * possible, but it's very tricky to do right (full of races). As
54 * the gain would be mostly for SMP systems, it can wait...
55 *
56 * Debugging and options
57 * ---------------------
58 * You will find below a set of '#define" allowing a very fine control
59 * on the driver behaviour and the debug messages printed.
60 * The main options are :
61 * o SET_PSA_CRC, to have your card correctly recognised by
62 * an access point and the Point-to-Point diagnostic tool.
63 * o USE_PSA_CONFIG, to read configuration from the PSA (EEprom)
64 * (otherwise we always start afresh with some defaults)
65 *
66 * wavelan.o is too darned big
67 * ---------------------------
68 * That's true! There is a very simple way to reduce the driver
69 * object by 33%! Comment out the following line:
70 * #include <linux/wireless.h>
71 * Other compile options can also reduce the size of it...
72 *
73 * MAC address and hardware detection:
74 * -----------------------------------
75 * The detection code for the WaveLAN checks that the first three
76 * octets of the MAC address fit the company code. This type of
77 * detection works well for AT&T cards (because the AT&T code is
78 * hardcoded in wavelan.h), but of course will fail for other
79 * manufacturers.
80 *
81 * If you are sure that your card is derived from the WaveLAN,
82 * here is the way to configure it:
83 * 1) Get your MAC address
84 * a) With your card utilities (wfreqsel, instconf, etc.)
85 * b) With the driver:
86 * o compile the kernel with DEBUG_CONFIG_INFO enabled
87 * o Boot and look the card messages
88 * 2) Set your MAC code (3 octets) in MAC_ADDRESSES[][3] (wavelan.h)
89 * 3) Compile and verify
90 * 4) Send me the MAC code. I will include it in the next version.
91 *
92 */
93
94/* --------------------- WIRELESS EXTENSIONS --------------------- */
95/*
96 * This driver is the first to support "wireless extensions".
97 * This set of extensions provides a standard way to control the wireless
98 * characteristics of the hardware. Applications such as mobile IP may
99 * take advantage of it.
100 *
101 * It might be a good idea as well to fetch the wireless tools to
102 * configure the device and play a bit.
103 */
104
105/* ---------------------------- FILES ---------------------------- */
106/*
107 * wavelan.c: actual code for the driver: C functions
108 *
109 * wavelan.p.h: private header: local types and variables for driver
110 *
111 * wavelan.h: description of the hardware interface and structs
112 *
113 * i82586.h: description of the Ethernet controller
114 */
115
116/* --------------------------- HISTORY --------------------------- */
117/*
118 * This is based on information in the drivers' headers. It may not be
119 * accurate, and I guarantee only my best effort.
120 *
121 * The history of the WaveLAN drivers is as complicated as the history of
122 * the WaveLAN itself (NCR -> AT&T -> Lucent).
123 *
124 * It all started with Anders Klemets <klemets@paul.rutgers.edu>
125 * writing a WaveLAN ISA driver for the Mach microkernel. Girish
126 * Welling <welling@paul.rutgers.edu> had also worked on it.
127 * Keith Moore modified this for the PCMCIA hardware.
128 *
129 * Robert Morris <rtm@das.harvard.edu> ported these two drivers to BSDI
130 * and added specific PCMCIA support (there is currently no equivalent
131 * of the PCMCIA package under BSD).
132 *
133 * Jim Binkley <jrb@cs.pdx.edu> ported both BSDI drivers to FreeBSD.
134 *
135 * Bruce Janson <bruce@cs.usyd.edu.au> ported the BSDI ISA driver to Linux.
136 *
137 * Anthony D. Joseph <adj@lcs.mit.edu> started to modify Bruce's driver
138 * (with help of the BSDI PCMCIA driver) for PCMCIA.
139 * Yunzhou Li <yunzhou@strat.iol.unh.edu> finished this work.
140 * Joe Finney <joe@comp.lancs.ac.uk> patched the driver to start
141 * 2.00 cards correctly (2.4 GHz with frequency selection).
142 * David Hinds <dahinds@users.sourceforge.net> integrated the whole in his
143 * PCMCIA package (and bug corrections).
144 *
145 * I (Jean Tourrilhes - jt@hplb.hpl.hp.com) then started to make some
146 * patches to the PCMCIA driver. Later, I added code in the ISA driver
147 * for Wireless Extensions and full support of frequency selection
148 * cards. Then, I did the same to the PCMCIA driver, and did some
149 * reorganisation. Finally, I came back to the ISA driver to
150 * upgrade it at the same level as the PCMCIA one and reorganise
151 * the code.
152 * Loeke Brederveld <lbrederv@wavelan.com> from Lucent has given me
153 * much needed information on the WaveLAN hardware.
154 */
155
156/* The original copyrights and literature mention others' names and
157 * credits. I don't know what their part in this development was.
158 */
159
160/* By the way, for the copyright and legal stuff:
161 * almost everybody wrote code under the GNU or BSD license (or similar),
162 * and want their original copyright to remain somewhere in the
163 * code (for myself, I go with the GPL).
164 * Nobody wants to take responsibility for anything, except the fame.
165 */
166
167/* --------------------------- CREDITS --------------------------- */
168/*
169 * This software was developed as a component of the
170 * Linux operating system.
171 * It is based on other device drivers and information
172 * either written or supplied by:
173 * Ajay Bakre <bakre@paul.rutgers.edu>,
174 * Donald Becker <becker@cesdis.gsfc.nasa.gov>,
175 * Loeke Brederveld <Loeke.Brederveld@Utrecht.NCR.com>,
176 * Brent Elphick <belphick@uwaterloo.ca>,
177 * Anders Klemets <klemets@it.kth.se>,
178 * Vladimir V. Kolpakov <w@stier.koenig.ru>,
179 * Marc Meertens <Marc.Meertens@Utrecht.NCR.com>,
180 * Pauline Middelink <middelin@polyware.iaf.nl>,
181 * Robert Morris <rtm@das.harvard.edu>,
182 * Jean Tourrilhes <jt@hpl.hp.com>,
183 * Girish Welling <welling@paul.rutgers.edu>,
184 * Clark Woodworth <clark@hiway1.exit109.com>
185 * Yongguang Zhang <ygz@isl.hrl.hac.com>
186 *
187 * Thanks go also to:
188 * James Ashton <jaa101@syseng.anu.edu.au>,
189 * Alan Cox <alan@lxorguk.ukuu.org.uk>,
190 * Allan Creighton <allanc@cs.usyd.edu.au>,
191 * Matthew Geier <matthew@cs.usyd.edu.au>,
192 * Remo di Giovanni <remo@cs.usyd.edu.au>,
193 * Eckhard Grah <grah@wrcs1.urz.uni-wuppertal.de>,
194 * Vipul Gupta <vgupta@cs.binghamton.edu>,
195 * Mark Hagan <mhagan@wtcpost.daytonoh.NCR.COM>,
196 * Tim Nicholson <tim@cs.usyd.edu.au>,
197 * Ian Parkin <ian@cs.usyd.edu.au>,
198 * John Rosenberg <johnr@cs.usyd.edu.au>,
199 * George Rossi <george@phm.gov.au>,
200 * Arthur Scott <arthur@cs.usyd.edu.au>,
201 * Stanislav Sinyagin <stas@isf.ru>
202 * and Peter Storey for their assistance and advice.
203 *
204 * Additional Credits:
205 *
206 * My development has been done initially under Debian 1.1 (Linux 2.0.x)
207 * and now under Debian 2.2, initially with an HP Vectra XP/60, and now
208 * an HP Vectra XP/90.
209 *
210 */
211
212/* ------------------------- IMPROVEMENTS ------------------------- */
213/*
214 * I proudly present:
215 *
216 * Changes made in first pre-release:
217 * ----------------------------------
218 * - reorganisation of the code, function name change
219 * - creation of private header (wavelan.p.h)
220 * - reorganised debug messages
221 * - more comments, history, etc.
222 * - mmc_init: configure the PSA if not done
223 * - mmc_init: correct default value of level threshold for PCMCIA
224 * - mmc_init: 2.00 detection better code for 2.00 initialization
225 * - better info at startup
226 * - IRQ setting (note: this setting is permanent)
227 * - watchdog: change strategy (and solve module removal problems)
228 * - add wireless extensions (ioctl and get_wireless_stats)
229 * get/set nwid/frequency on fly, info for /proc/net/wireless
230 * - more wireless extensions: SETSPY and GETSPY
231 * - make wireless extensions optional
232 * - private ioctl to set/get quality and level threshold, histogram
233 * - remove /proc/net/wavelan
234 * - suppress useless stuff from lp (net_local)
235 * - kernel 2.1 support (copy_to/from_user instead of memcpy_to/fromfs)
236 * - add message level (debug stuff in /var/adm/debug and errors not
237 * displayed at console and still in /var/adm/messages)
238 * - multi device support
239 * - start fixing the probe (init code)
240 * - more inlines
241 * - man page
242 * - many other minor details and cleanups
243 *
244 * Changes made in second pre-release:
245 * -----------------------------------
246 * - clean up init code (probe and module init)
247 * - better multiple device support (module)
248 * - name assignment (module)
249 *
250 * Changes made in third pre-release:
251 * ----------------------------------
252 * - be more conservative on timers
253 * - preliminary support for multicast (I still lack some details)
254 *
255 * Changes made in fourth pre-release:
256 * -----------------------------------
257 * - multicast (revisited and finished)
258 * - avoid reset in set_multicast_list (a really big hack)
259 * if somebody could apply this code for other i82586 based drivers
260 * - share onboard memory 75% RU and 25% CU (instead of 50/50)
261 *
262 * Changes made for release in 2.1.15:
263 * -----------------------------------
264 * - change the detection code for multi manufacturer code support
265 *
266 * Changes made for release in 2.1.17:
267 * -----------------------------------
268 * - update to wireless extensions changes
269 * - silly bug in card initial configuration (psa_conf_status)
270 *
271 * Changes made for release in 2.1.27 & 2.0.30:
272 * --------------------------------------------
273 * - small bug in debug code (probably not the last one...)
274 * - remove extern keyword for wavelan_probe()
275 * - level threshold is now a standard wireless extension (version 4 !)
276 * - modules parameters types (new module interface)
277 *
278 * Changes made for release in 2.1.36:
279 * -----------------------------------
280 * - byte count stats (courtesy of David Hinds)
281 * - remove dev_tint stuff (courtesy of David Hinds)
282 * - encryption setting from Brent Elphick (thanks a lot!)
283 * - 'ioaddr' to 'u_long' for the Alpha (thanks to Stanislav Sinyagin)
284 *
285 * Other changes (not by me) :
286 * -------------------------
287 * - Spelling and gramar "rectification".
288 *
289 * Changes made for release in 2.0.37 & 2.2.2 :
290 * ------------------------------------------
291 * - Correct status in /proc/net/wireless
292 * - Set PSA CRC to make PtP diagnostic tool happy (Bob Gray)
293 * - Module init code don't fail if we found at least one card in
294 * the address list (Karlis Peisenieks)
295 * - Missing parenthesis (Christopher Peterson)
296 * - Correct i82586 configuration parameters
297 * - Encryption initialisation bug (Robert McCormack)
298 * - New mac addresses detected in the probe
299 * - Increase watchdog for busy environments
300 *
301 * Changes made for release in 2.0.38 & 2.2.7 :
302 * ------------------------------------------
303 * - Correct the reception logic to better report errors and avoid
304 * sending bogus packet up the stack
305 * - Delay RU config to avoid corrupting first received packet
306 * - Change config completion code (to actually check something)
307 * - Avoid reading out of bound in skbuf to transmit
308 * - Rectify a lot of (useless) debugging code
309 * - Change the way to `#ifdef SET_PSA_CRC'
310 *
311 * Changes made for release in 2.2.11 & 2.3.13 :
312 * -------------------------------------------
313 * - Change e-mail and web page addresses
314 * - Watchdog timer is now correctly expressed in HZ, not in jiffies
315 * - Add channel number to the list of frequencies in range
316 * - Add the (short) list of bit-rates in range
317 * - Developp a new sensitivity... (sens.value & sens.fixed)
318 *
319 * Changes made for release in 2.2.14 & 2.3.23 :
320 * -------------------------------------------
321 * - Fix check for root permission (break instead of exit)
322 * - New nwid & encoding setting (Wireless Extension 9)
323 *
324 * Changes made for release in 2.3.49 :
325 * ----------------------------------
326 * - Indentation reformating (Alan)
327 * - Update to new network API (softnet - 2.3.43) :
328 * o replace dev->tbusy (Alan)
329 * o replace dev->tstart (Alan)
330 * o remove dev->interrupt (Alan)
331 * o add SMP locking via spinlock in splxx (me)
332 * o add spinlock in interrupt handler (me)
333 * o use kernel watchdog instead of ours (me)
334 * o increase watchdog timeout (kernel is more sensitive) (me)
335 * o verify that all the changes make sense and work (me)
336 * - Fixup a potential gotcha when reconfiguring and thighten a bit
337 * the interactions with Tx queue.
338 *
339 * Changes made for release in 2.4.0 :
340 * ---------------------------------
341 * - Fix spinlock stupid bugs that I left in. The driver is now SMP
342 * compliant and doesn't lockup at startup.
343 *
344 * Changes made for release in 2.5.2 :
345 * ---------------------------------
346 * - Use new driver API for Wireless Extensions :
347 * o got rid of wavelan_ioctl()
348 * o use a bunch of iw_handler instead
349 *
350 * Changes made for release in 2.5.35 :
351 * ----------------------------------
352 * - Set dev->trans_start to avoid filling the logs
353 * - Handle better spurious/bogus interrupt
354 * - Avoid deadlocks in mmc_out()/mmc_in()
355 *
356 * Wishes & dreams:
357 * ----------------
358 * - roaming (see Pcmcia driver)
359 */
360
361/***************************** INCLUDES *****************************/
362
363#include <linux/module.h>
364
365#include <linux/kernel.h>
366#include <linux/sched.h>
367#include <linux/types.h>
368#include <linux/fcntl.h>
369#include <linux/interrupt.h>
370#include <linux/stat.h>
371#include <linux/ptrace.h>
372#include <linux/ioport.h>
373#include <linux/in.h>
374#include <linux/string.h>
375#include <linux/delay.h>
376#include <linux/bitops.h>
377#include <asm/system.h>
378#include <asm/io.h>
379#include <asm/dma.h>
380#include <asm/uaccess.h>
381#include <linux/errno.h>
382#include <linux/netdevice.h>
383#include <linux/etherdevice.h>
384#include <linux/skbuff.h>
385#include <linux/slab.h>
386#include <linux/timer.h>
387#include <linux/init.h>
388
389#include <linux/wireless.h> /* Wireless extensions */
390#include <net/iw_handler.h> /* Wireless handlers */
391
392/* WaveLAN declarations */
393#include "i82586.h"
394#include "wavelan.h"
395
396/************************** DRIVER OPTIONS **************************/
397/*
398 * `#define' or `#undef' the following constant to change the behaviour
399 * of the driver...
400 */
401#undef SET_PSA_CRC /* Calculate and set the CRC on PSA (slower) */
402#define USE_PSA_CONFIG /* Use info from the PSA. */
403#undef EEPROM_IS_PROTECTED /* doesn't seem to be necessary */
404#define MULTICAST_AVOID /* Avoid extra multicast (I'm sceptical). */
405#undef SET_MAC_ADDRESS /* Experimental */
406
407/* Warning: this stuff will slow down the driver. */
408#define WIRELESS_SPY /* Enable spying addresses. */
409#undef HISTOGRAM /* Enable histogram of signal level. */
410
411/****************************** DEBUG ******************************/
412
413#undef DEBUG_MODULE_TRACE /* module insertion/removal */
414#undef DEBUG_CALLBACK_TRACE /* calls made by Linux */
415#undef DEBUG_INTERRUPT_TRACE /* calls to handler */
416#undef DEBUG_INTERRUPT_INFO /* type of interrupt and so on */
417#define DEBUG_INTERRUPT_ERROR /* problems */
418#undef DEBUG_CONFIG_TRACE /* Trace the config functions. */
419#undef DEBUG_CONFIG_INFO /* what's going on */
420#define DEBUG_CONFIG_ERROR /* errors on configuration */
421#undef DEBUG_TX_TRACE /* transmission calls */
422#undef DEBUG_TX_INFO /* header of the transmitted packet */
423#undef DEBUG_TX_FAIL /* Normal failure conditions */
424#define DEBUG_TX_ERROR /* Unexpected conditions */
425#undef DEBUG_RX_TRACE /* transmission calls */
426#undef DEBUG_RX_INFO /* header of the received packet */
427#undef DEBUG_RX_FAIL /* Normal failure conditions */
428#define DEBUG_RX_ERROR /* Unexpected conditions */
429
430#undef DEBUG_PACKET_DUMP /* Dump packet on the screen if defined to 32. */
431#undef DEBUG_IOCTL_TRACE /* misc. call by Linux */
432#undef DEBUG_IOCTL_INFO /* various debugging info */
433#define DEBUG_IOCTL_ERROR /* what's going wrong */
434#define DEBUG_BASIC_SHOW /* Show basic startup info. */
435#undef DEBUG_VERSION_SHOW /* Print version info. */
436#undef DEBUG_PSA_SHOW /* Dump PSA to screen. */
437#undef DEBUG_MMC_SHOW /* Dump mmc to screen. */
438#undef DEBUG_SHOW_UNUSED /* Show unused fields too. */
439#undef DEBUG_I82586_SHOW /* Show i82586 status. */
440#undef DEBUG_DEVICE_SHOW /* Show device parameters. */
441
442/************************ CONSTANTS & MACROS ************************/
443
444#ifdef DEBUG_VERSION_SHOW
445static const char *version = "wavelan.c : v24 (SMP + wireless extensions) 11/12/01\n";
446#endif
447
448/* Watchdog temporisation */
449#define WATCHDOG_JIFFIES (512*HZ/100)
450
451/* ------------------------ PRIVATE IOCTL ------------------------ */
452
453#define SIOCSIPQTHR SIOCIWFIRSTPRIV /* Set quality threshold */
454#define SIOCGIPQTHR SIOCIWFIRSTPRIV + 1 /* Get quality threshold */
455
456#define SIOCSIPHISTO SIOCIWFIRSTPRIV + 2 /* Set histogram ranges */
457#define SIOCGIPHISTO SIOCIWFIRSTPRIV + 3 /* Get histogram values */
458
459/****************************** TYPES ******************************/
460
461/* Shortcuts */
462typedef struct iw_statistics iw_stats;
463typedef struct iw_quality iw_qual;
464typedef struct iw_freq iw_freq;typedef struct net_local net_local;
465typedef struct timer_list timer_list;
466
467/* Basic types */
468typedef u_char mac_addr[WAVELAN_ADDR_SIZE]; /* Hardware address */
469
470/*
471 * Static specific data for the interface.
472 *
473 * For each network interface, Linux keeps data in two structures: "device"
474 * keeps the generic data (same format for everybody) and "net_local" keeps
475 * additional specific data.
476 */
477struct net_local
478{
479 net_local * next; /* linked list of the devices */
480 struct net_device * dev; /* reverse link */
481 spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
482 int nresets; /* number of hardware resets */
483 u_char reconfig_82586; /* We need to reconfigure the controller. */
484 u_char promiscuous; /* promiscuous mode */
485 int mc_count; /* number of multicast addresses */
486 u_short hacr; /* current host interface state */
487
488 int tx_n_in_use;
489 u_short rx_head;
490 u_short rx_last;
491 u_short tx_first_free;
492 u_short tx_first_in_use;
493
494 iw_stats wstats; /* Wireless-specific statistics */
495
496 struct iw_spy_data spy_data;
497 struct iw_public_data wireless_data;
498
499#ifdef HISTOGRAM
500 int his_number; /* number of intervals */
501 u_char his_range[16]; /* boundaries of interval ]n-1; n] */
502 u_long his_sum[16]; /* sum in interval */
503#endif /* HISTOGRAM */
504};
505
506/**************************** PROTOTYPES ****************************/
507
508/* ----------------------- MISC. SUBROUTINES ------------------------ */
509static u_char
510 wv_irq_to_psa(int);
511static int
512 wv_psa_to_irq(u_char);
513/* ------------------- HOST ADAPTER SUBROUTINES ------------------- */
514static inline u_short /* data */
515 hasr_read(u_long); /* Read the host interface: base address */
516static inline void
517 hacr_write(u_long, /* Write to host interface: base address */
518 u_short), /* data */
519 hacr_write_slow(u_long,
520 u_short),
521 set_chan_attn(u_long, /* ioaddr */
522 u_short), /* hacr */
523 wv_hacr_reset(u_long), /* ioaddr */
524 wv_16_off(u_long, /* ioaddr */
525 u_short), /* hacr */
526 wv_16_on(u_long, /* ioaddr */
527 u_short), /* hacr */
528 wv_ints_off(struct net_device *),
529 wv_ints_on(struct net_device *);
530/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */
531static void
532 psa_read(u_long, /* Read the Parameter Storage Area. */
533 u_short, /* hacr */
534 int, /* offset in PSA */
535 u_char *, /* buffer to fill */
536 int), /* size to read */
537 psa_write(u_long, /* Write to the PSA. */
538 u_short, /* hacr */
539 int, /* offset in PSA */
540 u_char *, /* buffer in memory */
541 int); /* length of buffer */
542static inline void
543 mmc_out(u_long, /* Write 1 byte to the Modem Manag Control. */
544 u_short,
545 u_char),
546 mmc_write(u_long, /* Write n bytes to the MMC. */
547 u_char,
548 u_char *,
549 int);
550static inline u_char /* Read 1 byte from the MMC. */
551 mmc_in(u_long,
552 u_short);
553static inline void
554 mmc_read(u_long, /* Read n bytes from the MMC. */
555 u_char,
556 u_char *,
557 int),
558 fee_wait(u_long, /* Wait for frequency EEPROM: base address */
559 int, /* base delay to wait for */
560 int); /* time to wait */
561static void
562 fee_read(u_long, /* Read the frequency EEPROM: base address */
563 u_short, /* destination offset */
564 u_short *, /* data buffer */
565 int); /* number of registers */
566/* ---------------------- I82586 SUBROUTINES ----------------------- */
567static /*inline*/ void
568 obram_read(u_long, /* ioaddr */
569 u_short, /* o */
570 u_char *, /* b */
571 int); /* n */
572static inline void
573 obram_write(u_long, /* ioaddr */
574 u_short, /* o */
575 u_char *, /* b */
576 int); /* n */
577static void
578 wv_ack(struct net_device *);
579static inline int
580 wv_synchronous_cmd(struct net_device *,
581 const char *),
582 wv_config_complete(struct net_device *,
583 u_long,
584 net_local *);
585static int
586 wv_complete(struct net_device *,
587 u_long,
588 net_local *);
589static inline void
590 wv_82586_reconfig(struct net_device *);
591/* ------------------- DEBUG & INFO SUBROUTINES ------------------- */
592#ifdef DEBUG_I82586_SHOW
593static void
594 wv_scb_show(unsigned short);
595#endif
596static inline void
597 wv_init_info(struct net_device *); /* display startup info */
598/* ------------------- IOCTL, STATS & RECONFIG ------------------- */
599static iw_stats *
600 wavelan_get_wireless_stats(struct net_device *);
601static void
602 wavelan_set_multicast_list(struct net_device *);
603/* ----------------------- PACKET RECEPTION ----------------------- */
604static inline void
605 wv_packet_read(struct net_device *, /* Read a packet from a frame. */
606 u_short,
607 int),
608 wv_receive(struct net_device *); /* Read all packets waiting. */
609/* --------------------- PACKET TRANSMISSION --------------------- */
610static inline int
611 wv_packet_write(struct net_device *, /* Write a packet to the Tx buffer. */
612 void *,
613 short);
614static netdev_tx_t
615 wavelan_packet_xmit(struct sk_buff *, /* Send a packet. */
616 struct net_device *);
617/* -------------------- HARDWARE CONFIGURATION -------------------- */
618static inline int
619 wv_mmc_init(struct net_device *), /* Initialize the modem. */
620 wv_ru_start(struct net_device *), /* Start the i82586 receiver unit. */
621 wv_cu_start(struct net_device *), /* Start the i82586 command unit. */
622 wv_82586_start(struct net_device *); /* Start the i82586. */
623static void
624 wv_82586_config(struct net_device *); /* Configure the i82586. */
625static inline void
626 wv_82586_stop(struct net_device *);
627static int
628 wv_hw_reset(struct net_device *), /* Reset the WaveLAN hardware. */
629 wv_check_ioaddr(u_long, /* ioaddr */
630 u_char *); /* mac address (read) */
631/* ---------------------- INTERRUPT HANDLING ---------------------- */
632static irqreturn_t
633 wavelan_interrupt(int, /* interrupt handler */
634 void *);
635static void
636 wavelan_watchdog(struct net_device *); /* transmission watchdog */
637/* ------------------- CONFIGURATION CALLBACKS ------------------- */
638static int
639 wavelan_open(struct net_device *), /* Open the device. */
640 wavelan_close(struct net_device *), /* Close the device. */
641 wavelan_config(struct net_device *, unsigned short);/* Configure one device. */
642extern struct net_device *wavelan_probe(int unit); /* See Space.c. */
643
644/**************************** VARIABLES ****************************/
645
646/*
647 * This is the root of the linked list of WaveLAN drivers
648 * It is use to verify that we don't reuse the same base address
649 * for two different drivers and to clean up when removing the module.
650 */
651static net_local * wavelan_list = (net_local *) NULL;
652
653/*
654 * This table is used to translate the PSA value to IRQ number
655 * and vice versa.
656 */
657static u_char irqvals[] =
658{
659 0, 0, 0, 0x01,
660 0x02, 0x04, 0, 0x08,
661 0, 0, 0x10, 0x20,
662 0x40, 0, 0, 0x80,
663};
664
665/*
666 * Table of the available I/O addresses (base addresses) for WaveLAN
667 */
668static unsigned short iobase[] =
669{
670#if 0
671 /* Leave out 0x3C0 for now -- seems to clash with some video
672 * controllers.
673 * Leave out the others too -- we will always use 0x390 and leave
674 * 0x300 for the Ethernet device.
675 * Jean II: 0x3E0 is fine as well.
676 */
677 0x300, 0x390, 0x3E0, 0x3C0
678#endif /* 0 */
679 0x390, 0x3E0
680};
681
682#ifdef MODULE
683/* Parameters set by insmod */
684static int io[4];
685static int irq[4];
686static char *name[4];
687module_param_array(io, int, NULL, 0);
688module_param_array(irq, int, NULL, 0);
689module_param_array(name, charp, NULL, 0);
690
691MODULE_PARM_DESC(io, "WaveLAN I/O base address(es),required");
692MODULE_PARM_DESC(irq, "WaveLAN IRQ number(s)");
693MODULE_PARM_DESC(name, "WaveLAN interface neme(s)");
694#endif /* MODULE */
695
696#endif /* WAVELAN_P_H */
diff --git a/drivers/staging/wavelan/wavelan_cs.c b/drivers/staging/wavelan/wavelan_cs.c
deleted file mode 100644
index e3bb40be4306..000000000000
--- a/drivers/staging/wavelan/wavelan_cs.c
+++ /dev/null
@@ -1,4601 +0,0 @@
1/*
2 * Wavelan Pcmcia driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 * Original copyright follow. See wavelan_cs.p.h for details.
8 *
9 * This code is derived from Anthony D. Joseph's code and all the changes here
10 * are also under the original copyright below.
11 *
12 * This code supports version 2.00 of WaveLAN/PCMCIA cards (2.4GHz), and
13 * can work on Linux 2.0.36 with support of David Hinds' PCMCIA Card Services
14 *
15 * Joe Finney (joe@comp.lancs.ac.uk) at Lancaster University in UK added
16 * critical code in the routine to initialize the Modem Management Controller.
17 *
18 * Thanks to Alan Cox and Bruce Janson for their advice.
19 *
20 * -- Yunzhou Li (scip4166@nus.sg)
21 *
22#ifdef WAVELAN_ROAMING
23 * Roaming support added 07/22/98 by Justin Seger (jseger@media.mit.edu)
24 * based on patch by Joe Finney from Lancaster University.
25#endif
26 *
27 * Lucent (formerly AT&T GIS, formerly NCR) WaveLAN PCMCIA card: An
28 * Ethernet-like radio transceiver controlled by an Intel 82593 coprocessor.
29 *
30 * A non-shared memory PCMCIA ethernet driver for linux
31 *
32 * ISA version modified to support PCMCIA by Anthony Joseph (adj@lcs.mit.edu)
33 *
34 *
35 * Joseph O'Sullivan & John Langford (josullvn@cs.cmu.edu & jcl@cs.cmu.edu)
36 *
37 * Apr 2 '98 made changes to bring the i82593 control/int handling in line
38 * with offical specs...
39 *
40 ****************************************************************************
41 * Copyright 1995
42 * Anthony D. Joseph
43 * Massachusetts Institute of Technology
44 *
45 * Permission to use, copy, modify, and distribute this program
46 * for any purpose and without fee is hereby granted, provided
47 * that this copyright and permission notice appear on all copies
48 * and supporting documentation, the name of M.I.T. not be used
49 * in advertising or publicity pertaining to distribution of the
50 * program without specific prior permission, and notice be given
51 * in supporting documentation that copying and distribution is
52 * by permission of M.I.T. M.I.T. makes no representations about
53 * the suitability of this software for any purpose. It is pro-
54 * vided "as is" without express or implied warranty.
55 ****************************************************************************
56 *
57 */
58
59/* Do *NOT* add other headers here, you are guaranteed to be wrong - Jean II */
60#include "wavelan_cs.p.h" /* Private header */
61
62#ifdef WAVELAN_ROAMING
63static void wl_cell_expiry(unsigned long data);
64static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp);
65static void wv_nwid_filter(unsigned char mode, net_local *lp);
66#endif /* WAVELAN_ROAMING */
67
68/************************* MISC SUBROUTINES **************************/
69/*
70 * Subroutines which won't fit in one of the following category
71 * (wavelan modem or i82593)
72 */
73
74/******************* MODEM MANAGEMENT SUBROUTINES *******************/
75/*
76 * Useful subroutines to manage the modem of the wavelan
77 */
78
79/*------------------------------------------------------------------*/
80/*
81 * Read from card's Host Adaptor Status Register.
82 */
83static inline u_char
84hasr_read(u_long base)
85{
86 return(inb(HASR(base)));
87} /* hasr_read */
88
89/*------------------------------------------------------------------*/
90/*
91 * Write to card's Host Adapter Command Register.
92 */
93static inline void
94hacr_write(u_long base,
95 u_char hacr)
96{
97 outb(hacr, HACR(base));
98} /* hacr_write */
99
100/*------------------------------------------------------------------*/
101/*
102 * Write to card's Host Adapter Command Register. Include a delay for
103 * those times when it is needed.
104 */
105static void
106hacr_write_slow(u_long base,
107 u_char hacr)
108{
109 hacr_write(base, hacr);
110 /* delay might only be needed sometimes */
111 mdelay(1);
112} /* hacr_write_slow */
113
114/*------------------------------------------------------------------*/
115/*
116 * Read the Parameter Storage Area from the WaveLAN card's memory
117 */
118static void
119psa_read(struct net_device * dev,
120 int o, /* offset in PSA */
121 u_char * b, /* buffer to fill */
122 int n) /* size to read */
123{
124 net_local *lp = netdev_priv(dev);
125 u_char __iomem *ptr = lp->mem + PSA_ADDR + (o << 1);
126
127 while(n-- > 0)
128 {
129 *b++ = readb(ptr);
130 /* Due to a lack of address decode pins, the WaveLAN PCMCIA card
131 * only supports reading even memory addresses. That means the
132 * increment here MUST be two.
133 * Because of that, we can't use memcpy_fromio()...
134 */
135 ptr += 2;
136 }
137} /* psa_read */
138
139/*------------------------------------------------------------------*/
140/*
141 * Write the Parameter Storage Area to the WaveLAN card's memory
142 */
143static void
144psa_write(struct net_device * dev,
145 int o, /* Offset in psa */
146 u_char * b, /* Buffer in memory */
147 int n) /* Length of buffer */
148{
149 net_local *lp = netdev_priv(dev);
150 u_char __iomem *ptr = lp->mem + PSA_ADDR + (o << 1);
151 int count = 0;
152 unsigned int base = dev->base_addr;
153 /* As there seem to have no flag PSA_BUSY as in the ISA model, we are
154 * oblige to verify this address to know when the PSA is ready... */
155 volatile u_char __iomem *verify = lp->mem + PSA_ADDR +
156 (psaoff(0, psa_comp_number) << 1);
157
158 /* Authorize writing to PSA */
159 hacr_write(base, HACR_PWR_STAT | HACR_ROM_WEN);
160
161 while(n-- > 0)
162 {
163 /* write to PSA */
164 writeb(*b++, ptr);
165 ptr += 2;
166
167 /* I don't have the spec, so I don't know what the correct
168 * sequence to write is. This hack seem to work for me... */
169 count = 0;
170 while((readb(verify) != PSA_COMP_PCMCIA_915) && (count++ < 100))
171 mdelay(1);
172 }
173
174 /* Put the host interface back in standard state */
175 hacr_write(base, HACR_DEFAULT);
176} /* psa_write */
177
178#ifdef SET_PSA_CRC
179/*------------------------------------------------------------------*/
180/*
181 * Calculate the PSA CRC
182 * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code
183 * NOTE: By specifying a length including the CRC position the
184 * returned value should be zero. (i.e. a correct checksum in the PSA)
185 *
186 * The Windows drivers don't use the CRC, but the AP and the PtP tool
187 * depend on it.
188 */
189static u_short
190psa_crc(unsigned char * psa, /* The PSA */
191 int size) /* Number of short for CRC */
192{
193 int byte_cnt; /* Loop on the PSA */
194 u_short crc_bytes = 0; /* Data in the PSA */
195 int bit_cnt; /* Loop on the bits of the short */
196
197 for(byte_cnt = 0; byte_cnt < size; byte_cnt++ )
198 {
199 crc_bytes ^= psa[byte_cnt]; /* Its an xor */
200
201 for(bit_cnt = 1; bit_cnt < 9; bit_cnt++ )
202 {
203 if(crc_bytes & 0x0001)
204 crc_bytes = (crc_bytes >> 1) ^ 0xA001;
205 else
206 crc_bytes >>= 1 ;
207 }
208 }
209
210 return crc_bytes;
211} /* psa_crc */
212#endif /* SET_PSA_CRC */
213
214/*------------------------------------------------------------------*/
215/*
216 * update the checksum field in the Wavelan's PSA
217 */
218static void
219update_psa_checksum(struct net_device * dev)
220{
221#ifdef SET_PSA_CRC
222 psa_t psa;
223 u_short crc;
224
225 /* read the parameter storage area */
226 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
227
228 /* update the checksum */
229 crc = psa_crc((unsigned char *) &psa,
230 sizeof(psa) - sizeof(psa.psa_crc[0]) - sizeof(psa.psa_crc[1])
231 - sizeof(psa.psa_crc_status));
232
233 psa.psa_crc[0] = crc & 0xFF;
234 psa.psa_crc[1] = (crc & 0xFF00) >> 8;
235
236 /* Write it ! */
237 psa_write(dev, (char *)&psa.psa_crc - (char *)&psa,
238 (unsigned char *)&psa.psa_crc, 2);
239
240#ifdef DEBUG_IOCTL_INFO
241 printk (KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n",
242 dev->name, psa.psa_crc[0], psa.psa_crc[1]);
243
244 /* Check again (luxury !) */
245 crc = psa_crc((unsigned char *) &psa,
246 sizeof(psa) - sizeof(psa.psa_crc_status));
247
248 if(crc != 0)
249 printk(KERN_WARNING "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n", dev->name);
250#endif /* DEBUG_IOCTL_INFO */
251#endif /* SET_PSA_CRC */
252} /* update_psa_checksum */
253
254/*------------------------------------------------------------------*/
255/*
256 * Write 1 byte to the MMC.
257 */
258static void
259mmc_out(u_long base,
260 u_short o,
261 u_char d)
262{
263 int count = 0;
264
265 /* Wait for MMC to go idle */
266 while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
267 udelay(10);
268
269 outb((u_char)((o << 1) | MMR_MMI_WR), MMR(base));
270 outb(d, MMD(base));
271}
272
273/*------------------------------------------------------------------*/
274/*
275 * Routine to write bytes to the Modem Management Controller.
276 * We start by the end because it is the way it should be !
277 */
278static void
279mmc_write(u_long base,
280 u_char o,
281 u_char * b,
282 int n)
283{
284 o += n;
285 b += n;
286
287 while(n-- > 0 )
288 mmc_out(base, --o, *(--b));
289} /* mmc_write */
290
291/*------------------------------------------------------------------*/
292/*
293 * Read 1 byte from the MMC.
294 * Optimised version for 1 byte, avoid using memory...
295 */
296static u_char
297mmc_in(u_long base,
298 u_short o)
299{
300 int count = 0;
301
302 while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
303 udelay(10);
304 outb(o << 1, MMR(base)); /* Set the read address */
305
306 outb(0, MMD(base)); /* Required dummy write */
307
308 while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
309 udelay(10);
310 return (u_char) (inb(MMD(base))); /* Now do the actual read */
311}
312
313/*------------------------------------------------------------------*/
314/*
315 * Routine to read bytes from the Modem Management Controller.
316 * The implementation is complicated by a lack of address lines,
317 * which prevents decoding of the low-order bit.
318 * (code has just been moved in the above function)
319 * We start by the end because it is the way it should be !
320 */
321static void
322mmc_read(u_long base,
323 u_char o,
324 u_char * b,
325 int n)
326{
327 o += n;
328 b += n;
329
330 while(n-- > 0)
331 *(--b) = mmc_in(base, --o);
332} /* mmc_read */
333
334/*------------------------------------------------------------------*/
335/*
336 * Get the type of encryption available...
337 */
338static inline int
339mmc_encr(u_long base) /* i/o port of the card */
340{
341 int temp;
342
343 temp = mmc_in(base, mmroff(0, mmr_des_avail));
344 if((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES))
345 return 0;
346 else
347 return temp;
348}
349
350/*------------------------------------------------------------------*/
351/*
352 * Wait for the frequency EEprom to complete a command...
353 */
354static void
355fee_wait(u_long base, /* i/o port of the card */
356 int delay, /* Base delay to wait for */
357 int number) /* Number of time to wait */
358{
359 int count = 0; /* Wait only a limited time */
360
361 while((count++ < number) &&
362 (mmc_in(base, mmroff(0, mmr_fee_status)) & MMR_FEE_STATUS_BUSY))
363 udelay(delay);
364}
365
366/*------------------------------------------------------------------*/
367/*
368 * Read bytes from the Frequency EEprom (frequency select cards).
369 */
370static void
371fee_read(u_long base, /* i/o port of the card */
372 u_short o, /* destination offset */
373 u_short * b, /* data buffer */
374 int n) /* number of registers */
375{
376 b += n; /* Position at the end of the area */
377
378 /* Write the address */
379 mmc_out(base, mmwoff(0, mmw_fee_addr), o + n - 1);
380
381 /* Loop on all buffer */
382 while(n-- > 0)
383 {
384 /* Write the read command */
385 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_READ);
386
387 /* Wait until EEprom is ready (should be quick !) */
388 fee_wait(base, 10, 100);
389
390 /* Read the value */
391 *--b = ((mmc_in(base, mmroff(0, mmr_fee_data_h)) << 8) |
392 mmc_in(base, mmroff(0, mmr_fee_data_l)));
393 }
394}
395
396
397/*------------------------------------------------------------------*/
398/*
399 * Write bytes from the Frequency EEprom (frequency select cards).
400 * This is a bit complicated, because the frequency eeprom has to
401 * be unprotected and the write enabled.
402 * Jean II
403 */
404static void
405fee_write(u_long base, /* i/o port of the card */
406 u_short o, /* destination offset */
407 u_short * b, /* data buffer */
408 int n) /* number of registers */
409{
410 b += n; /* Position at the end of the area */
411
412#ifdef EEPROM_IS_PROTECTED /* disabled */
413#ifdef DOESNT_SEEM_TO_WORK /* disabled */
414 /* Ask to read the protected register */
415 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD);
416
417 fee_wait(base, 10, 100);
418
419 /* Read the protected register */
420 printk("Protected 2 : %02X-%02X\n",
421 mmc_in(base, mmroff(0, mmr_fee_data_h)),
422 mmc_in(base, mmroff(0, mmr_fee_data_l)));
423#endif /* DOESNT_SEEM_TO_WORK */
424
425 /* Enable protected register */
426 mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
427 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN);
428
429 fee_wait(base, 10, 100);
430
431 /* Unprotect area */
432 mmc_out(base, mmwoff(0, mmw_fee_addr), o + n);
433 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
434#ifdef DOESNT_SEEM_TO_WORK /* disabled */
435 /* Or use : */
436 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR);
437#endif /* DOESNT_SEEM_TO_WORK */
438
439 fee_wait(base, 10, 100);
440#endif /* EEPROM_IS_PROTECTED */
441
442 /* Write enable */
443 mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
444 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN);
445
446 fee_wait(base, 10, 100);
447
448 /* Write the EEprom address */
449 mmc_out(base, mmwoff(0, mmw_fee_addr), o + n - 1);
450
451 /* Loop on all buffer */
452 while(n-- > 0)
453 {
454 /* Write the value */
455 mmc_out(base, mmwoff(0, mmw_fee_data_h), (*--b) >> 8);
456 mmc_out(base, mmwoff(0, mmw_fee_data_l), *b & 0xFF);
457
458 /* Write the write command */
459 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WRITE);
460
461 /* Wavelan doc says : wait at least 10 ms for EEBUSY = 0 */
462 mdelay(10);
463 fee_wait(base, 10, 100);
464 }
465
466 /* Write disable */
467 mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS);
468 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS);
469
470 fee_wait(base, 10, 100);
471
472#ifdef EEPROM_IS_PROTECTED /* disabled */
473 /* Reprotect EEprom */
474 mmc_out(base, mmwoff(0, mmw_fee_addr), 0x00);
475 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
476
477 fee_wait(base, 10, 100);
478#endif /* EEPROM_IS_PROTECTED */
479}
480
481/******************* WaveLAN Roaming routines... ********************/
482
483#ifdef WAVELAN_ROAMING /* Conditional compile, see wavelan_cs.h */
484
485static unsigned char WAVELAN_BEACON_ADDRESS[] = {0x09,0x00,0x0e,0x20,0x03,0x00};
486
487static void wv_roam_init(struct net_device *dev)
488{
489 net_local *lp= netdev_priv(dev);
490
491 /* Do not remove this unless you have a good reason */
492 printk(KERN_NOTICE "%s: Warning, you have enabled roaming on"
493 " device %s !\n", dev->name, dev->name);
494 printk(KERN_NOTICE "Roaming is currently an experimental unsupported feature"
495 " of the Wavelan driver.\n");
496 printk(KERN_NOTICE "It may work, but may also make the driver behave in"
497 " erratic ways or crash.\n");
498
499 lp->wavepoint_table.head=NULL; /* Initialise WavePoint table */
500 lp->wavepoint_table.num_wavepoints=0;
501 lp->wavepoint_table.locked=0;
502 lp->curr_point=NULL; /* No default WavePoint */
503 lp->cell_search=0;
504
505 lp->cell_timer.data=(long)lp; /* Start cell expiry timer */
506 lp->cell_timer.function=wl_cell_expiry;
507 lp->cell_timer.expires=jiffies+CELL_TIMEOUT;
508 add_timer(&lp->cell_timer);
509
510 wv_nwid_filter(NWID_PROMISC,lp) ; /* Enter NWID promiscuous mode */
511 /* to build up a good WavePoint */
512 /* table... */
513 printk(KERN_DEBUG "WaveLAN: Roaming enabled on device %s\n",dev->name);
514}
515
516static void wv_roam_cleanup(struct net_device *dev)
517{
518 wavepoint_history *ptr,*old_ptr;
519 net_local *lp= netdev_priv(dev);
520
521 printk(KERN_DEBUG "WaveLAN: Roaming Disabled on device %s\n",dev->name);
522
523 /* Fixme : maybe we should check that the timer exist before deleting it */
524 del_timer(&lp->cell_timer); /* Remove cell expiry timer */
525 ptr=lp->wavepoint_table.head; /* Clear device's WavePoint table */
526 while(ptr!=NULL)
527 {
528 old_ptr=ptr;
529 ptr=ptr->next;
530 wl_del_wavepoint(old_ptr,lp);
531 }
532}
533
534/* Enable/Disable NWID promiscuous mode on a given device */
535static void wv_nwid_filter(unsigned char mode, net_local *lp)
536{
537 mm_t m;
538 unsigned long flags;
539
540#ifdef WAVELAN_ROAMING_DEBUG
541 printk(KERN_DEBUG "WaveLAN: NWID promisc %s, device %s\n",(mode==NWID_PROMISC) ? "on" : "off", lp->dev->name);
542#endif
543
544 /* Disable interrupts & save flags */
545 spin_lock_irqsave(&lp->spinlock, flags);
546
547 m.w.mmw_loopt_sel = (mode==NWID_PROMISC) ? MMW_LOOPT_SEL_DIS_NWID : 0x00;
548 mmc_write(lp->dev->base_addr, (char *)&m.w.mmw_loopt_sel - (char *)&m, (unsigned char *)&m.w.mmw_loopt_sel, 1);
549
550 if(mode==NWID_PROMISC)
551 lp->cell_search=1;
552 else
553 lp->cell_search=0;
554
555 /* ReEnable interrupts & restore flags */
556 spin_unlock_irqrestore(&lp->spinlock, flags);
557}
558
559/* Find a record in the WavePoint table matching a given NWID */
560static wavepoint_history *wl_roam_check(unsigned short nwid, net_local *lp)
561{
562 wavepoint_history *ptr=lp->wavepoint_table.head;
563
564 while(ptr!=NULL){
565 if(ptr->nwid==nwid)
566 return ptr;
567 ptr=ptr->next;
568 }
569 return NULL;
570}
571
572/* Create a new wavepoint table entry */
573static wavepoint_history *wl_new_wavepoint(unsigned short nwid, unsigned char seq, net_local* lp)
574{
575 wavepoint_history *new_wavepoint;
576
577#ifdef WAVELAN_ROAMING_DEBUG
578 printk(KERN_DEBUG "WaveLAN: New Wavepoint, NWID:%.4X\n",nwid);
579#endif
580
581 if(lp->wavepoint_table.num_wavepoints==MAX_WAVEPOINTS)
582 return NULL;
583
584 new_wavepoint = kmalloc(sizeof(wavepoint_history),GFP_ATOMIC);
585 if(new_wavepoint==NULL)
586 return NULL;
587
588 new_wavepoint->nwid=nwid; /* New WavePoints NWID */
589 new_wavepoint->average_fast=0; /* Running Averages..*/
590 new_wavepoint->average_slow=0;
591 new_wavepoint->qualptr=0; /* Start of ringbuffer */
592 new_wavepoint->last_seq=seq-1; /* Last sequence no.seen */
593 memset(new_wavepoint->sigqual,0,WAVEPOINT_HISTORY);/* Empty ringbuffer */
594
595 new_wavepoint->next=lp->wavepoint_table.head;/* Add to wavepoint table */
596 new_wavepoint->prev=NULL;
597
598 if(lp->wavepoint_table.head!=NULL)
599 lp->wavepoint_table.head->prev=new_wavepoint;
600
601 lp->wavepoint_table.head=new_wavepoint;
602
603 lp->wavepoint_table.num_wavepoints++; /* no. of visible wavepoints */
604
605 return new_wavepoint;
606}
607
608/* Remove a wavepoint entry from WavePoint table */
609static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp)
610{
611 if(wavepoint==NULL)
612 return;
613
614 if(lp->curr_point==wavepoint)
615 lp->curr_point=NULL;
616
617 if(wavepoint->prev!=NULL)
618 wavepoint->prev->next=wavepoint->next;
619
620 if(wavepoint->next!=NULL)
621 wavepoint->next->prev=wavepoint->prev;
622
623 if(lp->wavepoint_table.head==wavepoint)
624 lp->wavepoint_table.head=wavepoint->next;
625
626 lp->wavepoint_table.num_wavepoints--;
627 kfree(wavepoint);
628}
629
630/* Timer callback function - checks WavePoint table for stale entries */
631static void wl_cell_expiry(unsigned long data)
632{
633 net_local *lp=(net_local *)data;
634 wavepoint_history *wavepoint=lp->wavepoint_table.head,*old_point;
635
636#if WAVELAN_ROAMING_DEBUG > 1
637 printk(KERN_DEBUG "WaveLAN: Wavepoint timeout, dev %s\n",lp->dev->name);
638#endif
639
640 if(lp->wavepoint_table.locked)
641 {
642#if WAVELAN_ROAMING_DEBUG > 1
643 printk(KERN_DEBUG "WaveLAN: Wavepoint table locked...\n");
644#endif
645
646 lp->cell_timer.expires=jiffies+1; /* If table in use, come back later */
647 add_timer(&lp->cell_timer);
648 return;
649 }
650
651 while(wavepoint!=NULL)
652 {
653 if(time_after(jiffies, wavepoint->last_seen + CELL_TIMEOUT))
654 {
655#ifdef WAVELAN_ROAMING_DEBUG
656 printk(KERN_DEBUG "WaveLAN: Bye bye %.4X\n",wavepoint->nwid);
657#endif
658
659 old_point=wavepoint;
660 wavepoint=wavepoint->next;
661 wl_del_wavepoint(old_point,lp);
662 }
663 else
664 wavepoint=wavepoint->next;
665 }
666 lp->cell_timer.expires=jiffies+CELL_TIMEOUT;
667 add_timer(&lp->cell_timer);
668}
669
670/* Update SNR history of a wavepoint */
671static void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqual, unsigned char seq)
672{
673 int i=0,num_missed=0,ptr=0;
674 int average_fast=0,average_slow=0;
675
676 num_missed=(seq-wavepoint->last_seq)%WAVEPOINT_HISTORY;/* Have we missed
677 any beacons? */
678 if(num_missed)
679 for(i=0;i<num_missed;i++)
680 {
681 wavepoint->sigqual[wavepoint->qualptr++]=0; /* If so, enter them as 0's */
682 wavepoint->qualptr %=WAVEPOINT_HISTORY; /* in the ringbuffer. */
683 }
684 wavepoint->last_seen=jiffies; /* Add beacon to history */
685 wavepoint->last_seq=seq;
686 wavepoint->sigqual[wavepoint->qualptr++]=sigqual;
687 wavepoint->qualptr %=WAVEPOINT_HISTORY;
688 ptr=(wavepoint->qualptr-WAVEPOINT_FAST_HISTORY+WAVEPOINT_HISTORY)%WAVEPOINT_HISTORY;
689
690 for(i=0;i<WAVEPOINT_FAST_HISTORY;i++) /* Update running averages */
691 {
692 average_fast+=wavepoint->sigqual[ptr++];
693 ptr %=WAVEPOINT_HISTORY;
694 }
695
696 average_slow=average_fast;
697 for(i=WAVEPOINT_FAST_HISTORY;i<WAVEPOINT_HISTORY;i++)
698 {
699 average_slow+=wavepoint->sigqual[ptr++];
700 ptr %=WAVEPOINT_HISTORY;
701 }
702
703 wavepoint->average_fast=average_fast/WAVEPOINT_FAST_HISTORY;
704 wavepoint->average_slow=average_slow/WAVEPOINT_HISTORY;
705}
706
707/* Perform a handover to a new WavePoint */
708static void wv_roam_handover(wavepoint_history *wavepoint, net_local *lp)
709{
710 unsigned int base = lp->dev->base_addr;
711 mm_t m;
712 unsigned long flags;
713
714 if(wavepoint==lp->curr_point) /* Sanity check... */
715 {
716 wv_nwid_filter(!NWID_PROMISC,lp);
717 return;
718 }
719
720#ifdef WAVELAN_ROAMING_DEBUG
721 printk(KERN_DEBUG "WaveLAN: Doing handover to %.4X, dev %s\n",wavepoint->nwid,lp->dev->name);
722#endif
723
724 /* Disable interrupts & save flags */
725 spin_lock_irqsave(&lp->spinlock, flags);
726
727 m.w.mmw_netw_id_l = wavepoint->nwid & 0xFF;
728 m.w.mmw_netw_id_h = (wavepoint->nwid & 0xFF00) >> 8;
729
730 mmc_write(base, (char *)&m.w.mmw_netw_id_l - (char *)&m, (unsigned char *)&m.w.mmw_netw_id_l, 2);
731
732 /* ReEnable interrupts & restore flags */
733 spin_unlock_irqrestore(&lp->spinlock, flags);
734
735 wv_nwid_filter(!NWID_PROMISC,lp);
736 lp->curr_point=wavepoint;
737}
738
739/* Called when a WavePoint beacon is received */
740static void wl_roam_gather(struct net_device * dev,
741 u_char * hdr, /* Beacon header */
742 u_char * stats) /* SNR, Signal quality
743 of packet */
744{
745 wavepoint_beacon *beacon= (wavepoint_beacon *)hdr; /* Rcvd. Beacon */
746 unsigned short nwid=ntohs(beacon->nwid);
747 unsigned short sigqual=stats[2] & MMR_SGNL_QUAL; /* SNR of beacon */
748 wavepoint_history *wavepoint=NULL; /* WavePoint table entry */
749 net_local *lp = netdev_priv(dev); /* Device info */
750
751#ifdef I_NEED_THIS_FEATURE
752 /* Some people don't need this, some other may need it */
753 nwid=nwid^ntohs(beacon->domain_id);
754#endif
755
756#if WAVELAN_ROAMING_DEBUG > 1
757 printk(KERN_DEBUG "WaveLAN: beacon, dev %s:\n",dev->name);
758 printk(KERN_DEBUG "Domain: %.4X NWID: %.4X SigQual=%d\n",ntohs(beacon->domain_id),nwid,sigqual);
759#endif
760
761 lp->wavepoint_table.locked=1; /* <Mutex> */
762
763 wavepoint=wl_roam_check(nwid,lp); /* Find WavePoint table entry */
764 if(wavepoint==NULL) /* If no entry, Create a new one... */
765 {
766 wavepoint=wl_new_wavepoint(nwid,beacon->seq,lp);
767 if(wavepoint==NULL)
768 goto out;
769 }
770 if(lp->curr_point==NULL) /* If this is the only WavePoint, */
771 wv_roam_handover(wavepoint, lp); /* Jump on it! */
772
773 wl_update_history(wavepoint, sigqual, beacon->seq); /* Update SNR history
774 stats. */
775
776 if(lp->curr_point->average_slow < SEARCH_THRESH_LOW) /* If our current */
777 if(!lp->cell_search) /* WavePoint is getting faint, */
778 wv_nwid_filter(NWID_PROMISC,lp); /* start looking for a new one */
779
780 if(wavepoint->average_slow >
781 lp->curr_point->average_slow + WAVELAN_ROAMING_DELTA)
782 wv_roam_handover(wavepoint, lp); /* Handover to a better WavePoint */
783
784 if(lp->curr_point->average_slow > SEARCH_THRESH_HIGH) /* If our SNR is */
785 if(lp->cell_search) /* getting better, drop out of cell search mode */
786 wv_nwid_filter(!NWID_PROMISC,lp);
787
788out:
789 lp->wavepoint_table.locked=0; /* </MUTEX> :-) */
790}
791
792/* Test this MAC frame a WavePoint beacon */
793static inline int WAVELAN_BEACON(unsigned char *data)
794{
795 wavepoint_beacon *beacon= (wavepoint_beacon *)data;
796 static const wavepoint_beacon beacon_template={0xaa,0xaa,0x03,0x08,0x00,0x0e,0x20,0x03,0x00};
797
798 if(memcmp(beacon,&beacon_template,9)==0)
799 return 1;
800 else
801 return 0;
802}
803#endif /* WAVELAN_ROAMING */
804
805/************************ I82593 SUBROUTINES *************************/
806/*
807 * Useful subroutines to manage the Ethernet controller
808 */
809
810/*------------------------------------------------------------------*/
811/*
812 * Routine to synchronously send a command to the i82593 chip.
813 * Should be called with interrupts disabled.
814 * (called by wv_packet_write(), wv_ru_stop(), wv_ru_start(),
815 * wv_82593_config() & wv_diag())
816 */
817static int
818wv_82593_cmd(struct net_device * dev,
819 char * str,
820 int cmd,
821 int result)
822{
823 unsigned int base = dev->base_addr;
824 int status;
825 int wait_completed;
826 long spin;
827
828 /* Spin until the chip finishes executing its current command (if any) */
829 spin = 1000;
830 do
831 {
832 /* Time calibration of the loop */
833 udelay(10);
834
835 /* Read the interrupt register */
836 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
837 status = inb(LCSR(base));
838 }
839 while(((status & SR3_EXEC_STATE_MASK) != SR3_EXEC_IDLE) && (spin-- > 0));
840
841 /* If the interrupt hasn't been posted */
842 if (spin < 0) {
843#ifdef DEBUG_INTERRUPT_ERROR
844 printk(KERN_INFO "wv_82593_cmd: %s timeout (previous command), status 0x%02x\n",
845 str, status);
846#endif
847 return(FALSE);
848 }
849
850 /* Issue the command to the controller */
851 outb(cmd, LCCR(base));
852
853 /* If we don't have to check the result of the command
854 * Note : this mean that the irq handler will deal with that */
855 if(result == SR0_NO_RESULT)
856 return(TRUE);
857
858 /* We are waiting for command completion */
859 wait_completed = TRUE;
860
861 /* Busy wait while the LAN controller executes the command. */
862 spin = 1000;
863 do
864 {
865 /* Time calibration of the loop */
866 udelay(10);
867
868 /* Read the interrupt register */
869 outb(CR0_STATUS_0 | OP0_NOP, LCCR(base));
870 status = inb(LCSR(base));
871
872 /* Check if there was an interrupt posted */
873 if((status & SR0_INTERRUPT))
874 {
875 /* Acknowledge the interrupt */
876 outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
877
878 /* Check if interrupt is a command completion */
879 if(((status & SR0_BOTH_RX_TX) != SR0_BOTH_RX_TX) &&
880 ((status & SR0_BOTH_RX_TX) != 0x0) &&
881 !(status & SR0_RECEPTION))
882 {
883 /* Signal command completion */
884 wait_completed = FALSE;
885 }
886 else
887 {
888 /* Note : Rx interrupts will be handled later, because we can
889 * handle multiple Rx packets at once */
890#ifdef DEBUG_INTERRUPT_INFO
891 printk(KERN_INFO "wv_82593_cmd: not our interrupt\n");
892#endif
893 }
894 }
895 }
896 while(wait_completed && (spin-- > 0));
897
898 /* If the interrupt hasn't be posted */
899 if(wait_completed)
900 {
901#ifdef DEBUG_INTERRUPT_ERROR
902 printk(KERN_INFO "wv_82593_cmd: %s timeout, status 0x%02x\n",
903 str, status);
904#endif
905 return(FALSE);
906 }
907
908 /* Check the return code returned by the card (see above) against
909 * the expected return code provided by the caller */
910 if((status & SR0_EVENT_MASK) != result)
911 {
912#ifdef DEBUG_INTERRUPT_ERROR
913 printk(KERN_INFO "wv_82593_cmd: %s failed, status = 0x%x\n",
914 str, status);
915#endif
916 return(FALSE);
917 }
918
919 return(TRUE);
920} /* wv_82593_cmd */
921
922/*------------------------------------------------------------------*/
923/*
924 * This routine does a 593 op-code number 7, and obtains the diagnose
925 * status for the WaveLAN.
926 */
927static inline int
928wv_diag(struct net_device * dev)
929{
930 return(wv_82593_cmd(dev, "wv_diag(): diagnose",
931 OP0_DIAGNOSE, SR0_DIAGNOSE_PASSED));
932} /* wv_diag */
933
934/*------------------------------------------------------------------*/
935/*
936 * Routine to read len bytes from the i82593's ring buffer, starting at
937 * chip address addr. The results read from the chip are stored in buf.
938 * The return value is the address to use for next the call.
939 */
940static int
941read_ringbuf(struct net_device * dev,
942 int addr,
943 char * buf,
944 int len)
945{
946 unsigned int base = dev->base_addr;
947 int ring_ptr = addr;
948 int chunk_len;
949 char * buf_ptr = buf;
950
951 /* Get all the buffer */
952 while(len > 0)
953 {
954 /* Position the Program I/O Register at the ring buffer pointer */
955 outb(ring_ptr & 0xff, PIORL(base));
956 outb(((ring_ptr >> 8) & PIORH_MASK), PIORH(base));
957
958 /* First, determine how much we can read without wrapping around the
959 ring buffer */
960 if((addr + len) < (RX_BASE + RX_SIZE))
961 chunk_len = len;
962 else
963 chunk_len = RX_BASE + RX_SIZE - addr;
964 insb(PIOP(base), buf_ptr, chunk_len);
965 buf_ptr += chunk_len;
966 len -= chunk_len;
967 ring_ptr = (ring_ptr - RX_BASE + chunk_len) % RX_SIZE + RX_BASE;
968 }
969 return(ring_ptr);
970} /* read_ringbuf */
971
972/*------------------------------------------------------------------*/
973/*
974 * Reconfigure the i82593, or at least ask for it...
975 * Because wv_82593_config use the transmission buffer, we must do it
976 * when we are sure that there is no transmission, so we do it now
977 * or in wavelan_packet_xmit() (I can't find any better place,
978 * wavelan_interrupt is not an option...), so you may experience
979 * some delay sometime...
980 */
981static void
982wv_82593_reconfig(struct net_device * dev)
983{
984 net_local * lp = netdev_priv(dev);
985 struct pcmcia_device * link = lp->link;
986 unsigned long flags;
987
988 /* Arm the flag, will be cleard in wv_82593_config() */
989 lp->reconfig_82593 = TRUE;
990
991 /* Check if we can do it now ! */
992 if((link->open) && (netif_running(dev)) && !(netif_queue_stopped(dev)))
993 {
994 spin_lock_irqsave(&lp->spinlock, flags); /* Disable interrupts */
995 wv_82593_config(dev);
996 spin_unlock_irqrestore(&lp->spinlock, flags); /* Re-enable interrupts */
997 }
998 else
999 {
1000#ifdef DEBUG_IOCTL_INFO
1001 printk(KERN_DEBUG
1002 "%s: wv_82593_reconfig(): delayed (state = %lX, link = %d)\n",
1003 dev->name, dev->state, link->open);
1004#endif
1005 }
1006}
1007
1008/********************* DEBUG & INFO SUBROUTINES *********************/
1009/*
1010 * This routines are used in the code to show debug informations.
1011 * Most of the time, it dump the content of hardware structures...
1012 */
1013
1014#ifdef DEBUG_PSA_SHOW
1015/*------------------------------------------------------------------*/
1016/*
1017 * Print the formatted contents of the Parameter Storage Area.
1018 */
1019static void
1020wv_psa_show(psa_t * p)
1021{
1022 printk(KERN_DEBUG "##### wavelan psa contents: #####\n");
1023 printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n",
1024 p->psa_io_base_addr_1,
1025 p->psa_io_base_addr_2,
1026 p->psa_io_base_addr_3,
1027 p->psa_io_base_addr_4);
1028 printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n",
1029 p->psa_rem_boot_addr_1,
1030 p->psa_rem_boot_addr_2,
1031 p->psa_rem_boot_addr_3);
1032 printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params);
1033 printk("psa_int_req_no: %d\n", p->psa_int_req_no);
1034#ifdef DEBUG_SHOW_UNUSED
1035 printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0);
1036#endif /* DEBUG_SHOW_UNUSED */
1037 printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr);
1038 printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr);
1039 printk(KERN_DEBUG "psa_univ_local_sel: %d, ", p->psa_univ_local_sel);
1040 printk("psa_comp_number: %d, ", p->psa_comp_number);
1041 printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set);
1042 printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ",
1043 p->psa_feature_select);
1044 printk("psa_subband/decay_update_prm: %d\n", p->psa_subband);
1045 printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr);
1046 printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay);
1047 printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0], p->psa_nwid[1]);
1048 printk("psa_nwid_select: %d\n", p->psa_nwid_select);
1049 printk(KERN_DEBUG "psa_encryption_select: %d, ", p->psa_encryption_select);
1050 printk("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
1051 p->psa_encryption_key[0],
1052 p->psa_encryption_key[1],
1053 p->psa_encryption_key[2],
1054 p->psa_encryption_key[3],
1055 p->psa_encryption_key[4],
1056 p->psa_encryption_key[5],
1057 p->psa_encryption_key[6],
1058 p->psa_encryption_key[7]);
1059 printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width);
1060 printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ",
1061 p->psa_call_code[0]);
1062 printk("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
1063 p->psa_call_code[0],
1064 p->psa_call_code[1],
1065 p->psa_call_code[2],
1066 p->psa_call_code[3],
1067 p->psa_call_code[4],
1068 p->psa_call_code[5],
1069 p->psa_call_code[6],
1070 p->psa_call_code[7]);
1071#ifdef DEBUG_SHOW_UNUSED
1072 printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n",
1073 p->psa_reserved[0],
1074 p->psa_reserved[1]);
1075#endif /* DEBUG_SHOW_UNUSED */
1076 printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status);
1077 printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]);
1078 printk("psa_crc_status: 0x%02x\n", p->psa_crc_status);
1079} /* wv_psa_show */
1080#endif /* DEBUG_PSA_SHOW */
1081
1082#ifdef DEBUG_MMC_SHOW
1083/*------------------------------------------------------------------*/
1084/*
1085 * Print the formatted status of the Modem Management Controller.
1086 * This function need to be completed...
1087 */
1088static void
1089wv_mmc_show(struct net_device * dev)
1090{
1091 unsigned int base = dev->base_addr;
1092 net_local * lp = netdev_priv(dev);
1093 mmr_t m;
1094
1095 /* Basic check */
1096 if(hasr_read(base) & HASR_NO_CLK)
1097 {
1098 printk(KERN_WARNING "%s: wv_mmc_show: modem not connected\n",
1099 dev->name);
1100 return;
1101 }
1102
1103 spin_lock_irqsave(&lp->spinlock, flags);
1104
1105 /* Read the mmc */
1106 mmc_out(base, mmwoff(0, mmw_freeze), 1);
1107 mmc_read(base, 0, (u_char *)&m, sizeof(m));
1108 mmc_out(base, mmwoff(0, mmw_freeze), 0);
1109
1110 /* Don't forget to update statistics */
1111 lp->wstats.discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
1112
1113 spin_unlock_irqrestore(&lp->spinlock, flags);
1114
1115 printk(KERN_DEBUG "##### wavelan modem status registers: #####\n");
1116#ifdef DEBUG_SHOW_UNUSED
1117 printk(KERN_DEBUG "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
1118 m.mmr_unused0[0],
1119 m.mmr_unused0[1],
1120 m.mmr_unused0[2],
1121 m.mmr_unused0[3],
1122 m.mmr_unused0[4],
1123 m.mmr_unused0[5],
1124 m.mmr_unused0[6],
1125 m.mmr_unused0[7]);
1126#endif /* DEBUG_SHOW_UNUSED */
1127 printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n",
1128 m.mmr_des_avail, m.mmr_des_status);
1129#ifdef DEBUG_SHOW_UNUSED
1130 printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n",
1131 m.mmr_unused1[0],
1132 m.mmr_unused1[1],
1133 m.mmr_unused1[2],
1134 m.mmr_unused1[3],
1135 m.mmr_unused1[4]);
1136#endif /* DEBUG_SHOW_UNUSED */
1137 printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n",
1138 m.mmr_dce_status,
1139 (m.mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ? "energy detected,":"",
1140 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ?
1141 "loop test indicated," : "",
1142 (m.mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ? "transmitter on," : "",
1143 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ?
1144 "jabber timer expired," : "");
1145 printk(KERN_DEBUG "Dsp ID: %02X\n",
1146 m.mmr_dsp_id);
1147#ifdef DEBUG_SHOW_UNUSED
1148 printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n",
1149 m.mmr_unused2[0],
1150 m.mmr_unused2[1]);
1151#endif /* DEBUG_SHOW_UNUSED */
1152 printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n",
1153 (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l,
1154 (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
1155 printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n",
1156 m.mmr_thr_pre_set & MMR_THR_PRE_SET,
1157 (m.mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" : "below");
1158 printk(KERN_DEBUG "signal_lvl: %d [%s], ",
1159 m.mmr_signal_lvl & MMR_SIGNAL_LVL,
1160 (m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" : "no new msg");
1161 printk("silence_lvl: %d [%s], ", m.mmr_silence_lvl & MMR_SILENCE_LVL,
1162 (m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" : "no new update");
1163 printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL,
1164 (m.mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" : "Antenna 0");
1165#ifdef DEBUG_SHOW_UNUSED
1166 printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l);
1167#endif /* DEBUG_SHOW_UNUSED */
1168} /* wv_mmc_show */
1169#endif /* DEBUG_MMC_SHOW */
1170
1171#ifdef DEBUG_I82593_SHOW
1172/*------------------------------------------------------------------*/
1173/*
1174 * Print the formatted status of the i82593's receive unit.
1175 */
1176static void
1177wv_ru_show(struct net_device * dev)
1178{
1179 net_local *lp = netdev_priv(dev);
1180
1181 printk(KERN_DEBUG "##### wavelan i82593 receiver status: #####\n");
1182 printk(KERN_DEBUG "ru: rfp %d stop %d", lp->rfp, lp->stop);
1183 /*
1184 * Not implemented yet...
1185 */
1186 printk("\n");
1187} /* wv_ru_show */
1188#endif /* DEBUG_I82593_SHOW */
1189
1190#ifdef DEBUG_DEVICE_SHOW
1191/*------------------------------------------------------------------*/
1192/*
1193 * Print the formatted status of the WaveLAN PCMCIA device driver.
1194 */
1195static void
1196wv_dev_show(struct net_device * dev)
1197{
1198 printk(KERN_DEBUG "dev:");
1199 printk(" state=%lX,", dev->state);
1200 printk(" trans_start=%ld,", dev->trans_start);
1201 printk(" flags=0x%x,", dev->flags);
1202 printk("\n");
1203} /* wv_dev_show */
1204
1205/*------------------------------------------------------------------*/
1206/*
1207 * Print the formatted status of the WaveLAN PCMCIA device driver's
1208 * private information.
1209 */
1210static void
1211wv_local_show(struct net_device * dev)
1212{
1213 net_local *lp = netdev_priv(dev);
1214
1215 printk(KERN_DEBUG "local:");
1216 /*
1217 * Not implemented yet...
1218 */
1219 printk("\n");
1220} /* wv_local_show */
1221#endif /* DEBUG_DEVICE_SHOW */
1222
1223#if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO)
1224/*------------------------------------------------------------------*/
1225/*
1226 * Dump packet header (and content if necessary) on the screen
1227 */
1228static void
1229wv_packet_info(u_char * p, /* Packet to dump */
1230 int length, /* Length of the packet */
1231 char * msg1, /* Name of the device */
1232 char * msg2) /* Name of the function */
1233{
1234 int i;
1235 int maxi;
1236
1237 printk(KERN_DEBUG "%s: %s(): dest %pM, length %d\n",
1238 msg1, msg2, p, length);
1239 printk(KERN_DEBUG "%s: %s(): src %pM, type 0x%02X%02X\n",
1240 msg1, msg2, &p[6], p[12], p[13]);
1241
1242#ifdef DEBUG_PACKET_DUMP
1243
1244 printk(KERN_DEBUG "data=\"");
1245
1246 if((maxi = length) > DEBUG_PACKET_DUMP)
1247 maxi = DEBUG_PACKET_DUMP;
1248 for(i = 14; i < maxi; i++)
1249 if(p[i] >= ' ' && p[i] <= '~')
1250 printk(" %c", p[i]);
1251 else
1252 printk("%02X", p[i]);
1253 if(maxi < length)
1254 printk("..");
1255 printk("\"\n");
1256 printk(KERN_DEBUG "\n");
1257#endif /* DEBUG_PACKET_DUMP */
1258}
1259#endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */
1260
1261/*------------------------------------------------------------------*/
1262/*
1263 * This is the information which is displayed by the driver at startup
1264 * There is a lot of flag to configure it at your will...
1265 */
1266static void
1267wv_init_info(struct net_device * dev)
1268{
1269 unsigned int base = dev->base_addr;
1270 psa_t psa;
1271
1272 /* Read the parameter storage area */
1273 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
1274
1275#ifdef DEBUG_PSA_SHOW
1276 wv_psa_show(&psa);
1277#endif
1278#ifdef DEBUG_MMC_SHOW
1279 wv_mmc_show(dev);
1280#endif
1281#ifdef DEBUG_I82593_SHOW
1282 wv_ru_show(dev);
1283#endif
1284
1285#ifdef DEBUG_BASIC_SHOW
1286 /* Now, let's go for the basic stuff */
1287 printk(KERN_NOTICE "%s: WaveLAN: port %#x, irq %d, hw_addr %pM",
1288 dev->name, base, dev->irq, dev->dev_addr);
1289
1290 /* Print current network id */
1291 if(psa.psa_nwid_select)
1292 printk(", nwid 0x%02X-%02X", psa.psa_nwid[0], psa.psa_nwid[1]);
1293 else
1294 printk(", nwid off");
1295
1296 /* If 2.00 card */
1297 if(!(mmc_in(base, mmroff(0, mmr_fee_status)) &
1298 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
1299 {
1300 unsigned short freq;
1301
1302 /* Ask the EEprom to read the frequency from the first area */
1303 fee_read(base, 0x00 /* 1st area - frequency... */,
1304 &freq, 1);
1305
1306 /* Print frequency */
1307 printk(", 2.00, %ld", (freq >> 6) + 2400L);
1308
1309 /* Hack !!! */
1310 if(freq & 0x20)
1311 printk(".5");
1312 }
1313 else
1314 {
1315 printk(", PCMCIA, ");
1316 switch (psa.psa_subband)
1317 {
1318 case PSA_SUBBAND_915:
1319 printk("915");
1320 break;
1321 case PSA_SUBBAND_2425:
1322 printk("2425");
1323 break;
1324 case PSA_SUBBAND_2460:
1325 printk("2460");
1326 break;
1327 case PSA_SUBBAND_2484:
1328 printk("2484");
1329 break;
1330 case PSA_SUBBAND_2430_5:
1331 printk("2430.5");
1332 break;
1333 default:
1334 printk("unknown");
1335 }
1336 }
1337
1338 printk(" MHz\n");
1339#endif /* DEBUG_BASIC_SHOW */
1340
1341#ifdef DEBUG_VERSION_SHOW
1342 /* Print version information */
1343 printk(KERN_NOTICE "%s", version);
1344#endif
1345} /* wv_init_info */
1346
1347/********************* IOCTL, STATS & RECONFIG *********************/
1348/*
1349 * We found here routines that are called by Linux on differents
1350 * occasions after the configuration and not for transmitting data
1351 * These may be called when the user use ifconfig, /proc/net/dev
1352 * or wireless extensions
1353 */
1354
1355
1356/*------------------------------------------------------------------*/
1357/*
1358 * Set or clear the multicast filter for this adaptor.
1359 * num_addrs == -1 Promiscuous mode, receive all packets
1360 * num_addrs == 0 Normal mode, clear multicast list
1361 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1362 * and do best-effort filtering.
1363 */
1364
1365static void
1366wavelan_set_multicast_list(struct net_device * dev)
1367{
1368 net_local * lp = netdev_priv(dev);
1369
1370#ifdef DEBUG_IOCTL_TRACE
1371 printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n", dev->name);
1372#endif
1373
1374#ifdef DEBUG_IOCTL_INFO
1375 printk(KERN_DEBUG "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n",
1376 dev->name, dev->flags, netdev_mc_count(dev));
1377#endif
1378
1379 if(dev->flags & IFF_PROMISC)
1380 {
1381 /*
1382 * Enable promiscuous mode: receive all packets.
1383 */
1384 if(!lp->promiscuous)
1385 {
1386 lp->promiscuous = 1;
1387 lp->allmulticast = 0;
1388 lp->mc_count = 0;
1389
1390 wv_82593_reconfig(dev);
1391 }
1392 }
1393 else
1394 /* If all multicast addresses
1395 * or too much multicast addresses for the hardware filter */
1396 if((dev->flags & IFF_ALLMULTI) ||
1397 (netdev_mc_count(dev) > I82593_MAX_MULTICAST_ADDRESSES))
1398 {
1399 /*
1400 * Disable promiscuous mode, but active the all multicast mode
1401 */
1402 if(!lp->allmulticast)
1403 {
1404 lp->promiscuous = 0;
1405 lp->allmulticast = 1;
1406 lp->mc_count = 0;
1407
1408 wv_82593_reconfig(dev);
1409 }
1410 }
1411 else
1412 /* If there is some multicast addresses to send */
1413 if (!netdev_mc_empty(dev)) {
1414 /*
1415 * Disable promiscuous mode, but receive all packets
1416 * in multicast list
1417 */
1418#ifdef MULTICAST_AVOID
1419 if(lp->promiscuous || lp->allmulticast ||
1420 (netdev_mc_count(dev) != lp->mc_count))
1421#endif
1422 {
1423 lp->promiscuous = 0;
1424 lp->allmulticast = 0;
1425 lp->mc_count = netdev_mc_count(dev);
1426
1427 wv_82593_reconfig(dev);
1428 }
1429 }
1430 else
1431 {
1432 /*
1433 * Switch to normal mode: disable promiscuous mode and
1434 * clear the multicast list.
1435 */
1436 if(lp->promiscuous || lp->mc_count == 0)
1437 {
1438 lp->promiscuous = 0;
1439 lp->allmulticast = 0;
1440 lp->mc_count = 0;
1441
1442 wv_82593_reconfig(dev);
1443 }
1444 }
1445#ifdef DEBUG_IOCTL_TRACE
1446 printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n", dev->name);
1447#endif
1448}
1449
1450/*------------------------------------------------------------------*/
1451/*
1452 * This function doesn't exist...
1453 * (Note : it was a nice way to test the reconfigure stuff...)
1454 */
1455#ifdef SET_MAC_ADDRESS
1456static int
1457wavelan_set_mac_address(struct net_device * dev,
1458 void * addr)
1459{
1460 struct sockaddr * mac = addr;
1461
1462 /* Copy the address */
1463 memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE);
1464
1465 /* Reconfig the beast */
1466 wv_82593_reconfig(dev);
1467
1468 return 0;
1469}
1470#endif /* SET_MAC_ADDRESS */
1471
1472
1473/*------------------------------------------------------------------*/
1474/*
1475 * Frequency setting (for hardware able of it)
1476 * It's a bit complicated and you don't really want to look into it...
1477 */
1478static int
1479wv_set_frequency(u_long base, /* i/o port of the card */
1480 iw_freq * frequency)
1481{
1482 const int BAND_NUM = 10; /* Number of bands */
1483 long freq = 0L; /* offset to 2.4 GHz in .5 MHz */
1484#ifdef DEBUG_IOCTL_INFO
1485 int i;
1486#endif
1487
1488 /* Setting by frequency */
1489 /* Theoritically, you may set any frequency between
1490 * the two limits with a 0.5 MHz precision. In practice,
1491 * I don't want you to have trouble with local
1492 * regulations... */
1493 if((frequency->e == 1) &&
1494 (frequency->m >= (int) 2.412e8) && (frequency->m <= (int) 2.487e8))
1495 {
1496 freq = ((frequency->m / 10000) - 24000L) / 5;
1497 }
1498
1499 /* Setting by channel (same as wfreqsel) */
1500 /* Warning : each channel is 22MHz wide, so some of the channels
1501 * will interfere... */
1502 if((frequency->e == 0) &&
1503 (frequency->m >= 0) && (frequency->m < BAND_NUM))
1504 {
1505 /* Get frequency offset. */
1506 freq = channel_bands[frequency->m] >> 1;
1507 }
1508
1509 /* Verify if the frequency is allowed */
1510 if(freq != 0L)
1511 {
1512 u_short table[10]; /* Authorized frequency table */
1513
1514 /* Read the frequency table */
1515 fee_read(base, 0x71 /* frequency table */,
1516 table, 10);
1517
1518#ifdef DEBUG_IOCTL_INFO
1519 printk(KERN_DEBUG "Frequency table :");
1520 for(i = 0; i < 10; i++)
1521 {
1522 printk(" %04X",
1523 table[i]);
1524 }
1525 printk("\n");
1526#endif
1527
1528 /* Look in the table if the frequency is allowed */
1529 if(!(table[9 - ((freq - 24) / 16)] &
1530 (1 << ((freq - 24) % 16))))
1531 return -EINVAL; /* not allowed */
1532 }
1533 else
1534 return -EINVAL;
1535
1536 /* If we get a usable frequency */
1537 if(freq != 0L)
1538 {
1539 unsigned short area[16];
1540 unsigned short dac[2];
1541 unsigned short area_verify[16];
1542 unsigned short dac_verify[2];
1543 /* Corresponding gain (in the power adjust value table)
1544 * see AT&T Wavelan Data Manual, REF 407-024689/E, page 3-8
1545 * & WCIN062D.DOC, page 6.2.9 */
1546 unsigned short power_limit[] = { 40, 80, 120, 160, 0 };
1547 int power_band = 0; /* Selected band */
1548 unsigned short power_adjust; /* Correct value */
1549
1550 /* Search for the gain */
1551 power_band = 0;
1552 while((freq > power_limit[power_band]) &&
1553 (power_limit[++power_band] != 0))
1554 ;
1555
1556 /* Read the first area */
1557 fee_read(base, 0x00,
1558 area, 16);
1559
1560 /* Read the DAC */
1561 fee_read(base, 0x60,
1562 dac, 2);
1563
1564 /* Read the new power adjust value */
1565 fee_read(base, 0x6B - (power_band >> 1),
1566 &power_adjust, 1);
1567 if(power_band & 0x1)
1568 power_adjust >>= 8;
1569 else
1570 power_adjust &= 0xFF;
1571
1572#ifdef DEBUG_IOCTL_INFO
1573 printk(KERN_DEBUG "Wavelan EEprom Area 1 :");
1574 for(i = 0; i < 16; i++)
1575 {
1576 printk(" %04X",
1577 area[i]);
1578 }
1579 printk("\n");
1580
1581 printk(KERN_DEBUG "Wavelan EEprom DAC : %04X %04X\n",
1582 dac[0], dac[1]);
1583#endif
1584
1585 /* Frequency offset (for info only...) */
1586 area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F);
1587
1588 /* Receiver Principle main divider coefficient */
1589 area[3] = (freq >> 1) + 2400L - 352L;
1590 area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1591
1592 /* Transmitter Main divider coefficient */
1593 area[13] = (freq >> 1) + 2400L;
1594 area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1595
1596 /* Others part of the area are flags, bit streams or unused... */
1597
1598 /* Set the value in the DAC */
1599 dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80);
1600 dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF);
1601
1602 /* Write the first area */
1603 fee_write(base, 0x00,
1604 area, 16);
1605
1606 /* Write the DAC */
1607 fee_write(base, 0x60,
1608 dac, 2);
1609
1610 /* We now should verify here that the EEprom writing was ok */
1611
1612 /* ReRead the first area */
1613 fee_read(base, 0x00,
1614 area_verify, 16);
1615
1616 /* ReRead the DAC */
1617 fee_read(base, 0x60,
1618 dac_verify, 2);
1619
1620 /* Compare */
1621 if(memcmp(area, area_verify, 16 * 2) ||
1622 memcmp(dac, dac_verify, 2 * 2))
1623 {
1624#ifdef DEBUG_IOCTL_ERROR
1625 printk(KERN_INFO "Wavelan: wv_set_frequency : unable to write new frequency to EEprom (?)\n");
1626#endif
1627 return -EOPNOTSUPP;
1628 }
1629
1630 /* We must download the frequency parameters to the
1631 * synthetisers (from the EEprom - area 1)
1632 * Note : as the EEprom is auto decremented, we set the end
1633 * if the area... */
1634 mmc_out(base, mmwoff(0, mmw_fee_addr), 0x0F);
1635 mmc_out(base, mmwoff(0, mmw_fee_ctrl),
1636 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1637
1638 /* Wait until the download is finished */
1639 fee_wait(base, 100, 100);
1640
1641 /* We must now download the power adjust value (gain) to
1642 * the synthetisers (from the EEprom - area 7 - DAC) */
1643 mmc_out(base, mmwoff(0, mmw_fee_addr), 0x61);
1644 mmc_out(base, mmwoff(0, mmw_fee_ctrl),
1645 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1646
1647 /* Wait until the download is finished */
1648 fee_wait(base, 100, 100);
1649
1650#ifdef DEBUG_IOCTL_INFO
1651 /* Verification of what we have done... */
1652
1653 printk(KERN_DEBUG "Wavelan EEprom Area 1 :");
1654 for(i = 0; i < 16; i++)
1655 {
1656 printk(" %04X",
1657 area_verify[i]);
1658 }
1659 printk("\n");
1660
1661 printk(KERN_DEBUG "Wavelan EEprom DAC : %04X %04X\n",
1662 dac_verify[0], dac_verify[1]);
1663#endif
1664
1665 return 0;
1666 }
1667 else
1668 return -EINVAL; /* Bah, never get there... */
1669}
1670
1671/*------------------------------------------------------------------*/
1672/*
1673 * Give the list of available frequencies
1674 */
1675static int
1676wv_frequency_list(u_long base, /* i/o port of the card */
1677 iw_freq * list, /* List of frequency to fill */
1678 int max) /* Maximum number of frequencies */
1679{
1680 u_short table[10]; /* Authorized frequency table */
1681 long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */
1682 int i; /* index in the table */
1683 const int BAND_NUM = 10; /* Number of bands */
1684 int c = 0; /* Channel number */
1685
1686 /* Read the frequency table */
1687 fee_read(base, 0x71 /* frequency table */,
1688 table, 10);
1689
1690 /* Look all frequencies */
1691 i = 0;
1692 for(freq = 0; freq < 150; freq++)
1693 /* Look in the table if the frequency is allowed */
1694 if(table[9 - (freq / 16)] & (1 << (freq % 16)))
1695 {
1696 /* Compute approximate channel number */
1697 while((((channel_bands[c] >> 1) - 24) < freq) &&
1698 (c < BAND_NUM))
1699 c++;
1700 list[i].i = c; /* Set the list index */
1701
1702 /* put in the list */
1703 list[i].m = (((freq + 24) * 5) + 24000L) * 10000;
1704 list[i++].e = 1;
1705
1706 /* Check number */
1707 if(i >= max)
1708 return(i);
1709 }
1710
1711 return(i);
1712}
1713
1714#ifdef IW_WIRELESS_SPY
1715/*------------------------------------------------------------------*/
1716/*
1717 * Gather wireless spy statistics : for each packet, compare the source
1718 * address with out list, and if match, get the stats...
1719 * Sorry, but this function really need wireless extensions...
1720 */
1721static inline void
1722wl_spy_gather(struct net_device * dev,
1723 u_char * mac, /* MAC address */
1724 u_char * stats) /* Statistics to gather */
1725{
1726 struct iw_quality wstats;
1727
1728 wstats.qual = stats[2] & MMR_SGNL_QUAL;
1729 wstats.level = stats[0] & MMR_SIGNAL_LVL;
1730 wstats.noise = stats[1] & MMR_SILENCE_LVL;
1731 wstats.updated = 0x7;
1732
1733 /* Update spy records */
1734 wireless_spy_update(dev, mac, &wstats);
1735}
1736#endif /* IW_WIRELESS_SPY */
1737
1738#ifdef HISTOGRAM
1739/*------------------------------------------------------------------*/
1740/*
1741 * This function calculate an histogram on the signal level.
1742 * As the noise is quite constant, it's like doing it on the SNR.
1743 * We have defined a set of interval (lp->his_range), and each time
1744 * the level goes in that interval, we increment the count (lp->his_sum).
1745 * With this histogram you may detect if one wavelan is really weak,
1746 * or you may also calculate the mean and standard deviation of the level...
1747 */
1748static inline void
1749wl_his_gather(struct net_device * dev,
1750 u_char * stats) /* Statistics to gather */
1751{
1752 net_local * lp = netdev_priv(dev);
1753 u_char level = stats[0] & MMR_SIGNAL_LVL;
1754 int i;
1755
1756 /* Find the correct interval */
1757 i = 0;
1758 while((i < (lp->his_number - 1)) && (level >= lp->his_range[i++]))
1759 ;
1760
1761 /* Increment interval counter */
1762 (lp->his_sum[i])++;
1763}
1764#endif /* HISTOGRAM */
1765
1766static void wl_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1767{
1768 strncpy(info->driver, "wavelan_cs", sizeof(info->driver)-1);
1769}
1770
1771static const struct ethtool_ops ops = {
1772 .get_drvinfo = wl_get_drvinfo
1773};
1774
1775/*------------------------------------------------------------------*/
1776/*
1777 * Wireless Handler : get protocol name
1778 */
1779static int wavelan_get_name(struct net_device *dev,
1780 struct iw_request_info *info,
1781 union iwreq_data *wrqu,
1782 char *extra)
1783{
1784 strcpy(wrqu->name, "WaveLAN");
1785 return 0;
1786}
1787
1788/*------------------------------------------------------------------*/
1789/*
1790 * Wireless Handler : set NWID
1791 */
1792static int wavelan_set_nwid(struct net_device *dev,
1793 struct iw_request_info *info,
1794 union iwreq_data *wrqu,
1795 char *extra)
1796{
1797 unsigned int base = dev->base_addr;
1798 net_local *lp = netdev_priv(dev);
1799 psa_t psa;
1800 mm_t m;
1801 unsigned long flags;
1802 int ret = 0;
1803
1804 /* Disable interrupts and save flags. */
1805 spin_lock_irqsave(&lp->spinlock, flags);
1806
1807 /* Set NWID in WaveLAN. */
1808 if (!wrqu->nwid.disabled) {
1809 /* Set NWID in psa */
1810 psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8;
1811 psa.psa_nwid[1] = wrqu->nwid.value & 0xFF;
1812 psa.psa_nwid_select = 0x01;
1813 psa_write(dev,
1814 (char *) psa.psa_nwid - (char *) &psa,
1815 (unsigned char *) psa.psa_nwid, 3);
1816
1817 /* Set NWID in mmc. */
1818 m.w.mmw_netw_id_l = psa.psa_nwid[1];
1819 m.w.mmw_netw_id_h = psa.psa_nwid[0];
1820 mmc_write(base,
1821 (char *) &m.w.mmw_netw_id_l -
1822 (char *) &m,
1823 (unsigned char *) &m.w.mmw_netw_id_l, 2);
1824 mmc_out(base, mmwoff(0, mmw_loopt_sel), 0x00);
1825 } else {
1826 /* Disable NWID in the psa. */
1827 psa.psa_nwid_select = 0x00;
1828 psa_write(dev,
1829 (char *) &psa.psa_nwid_select -
1830 (char *) &psa,
1831 (unsigned char *) &psa.psa_nwid_select,
1832 1);
1833
1834 /* Disable NWID in the mmc (no filtering). */
1835 mmc_out(base, mmwoff(0, mmw_loopt_sel),
1836 MMW_LOOPT_SEL_DIS_NWID);
1837 }
1838 /* update the Wavelan checksum */
1839 update_psa_checksum(dev);
1840
1841 /* Enable interrupts and restore flags. */
1842 spin_unlock_irqrestore(&lp->spinlock, flags);
1843
1844 return ret;
1845}
1846
1847/*------------------------------------------------------------------*/
1848/*
1849 * Wireless Handler : get NWID
1850 */
1851static int wavelan_get_nwid(struct net_device *dev,
1852 struct iw_request_info *info,
1853 union iwreq_data *wrqu,
1854 char *extra)
1855{
1856 net_local *lp = netdev_priv(dev);
1857 psa_t psa;
1858 unsigned long flags;
1859 int ret = 0;
1860
1861 /* Disable interrupts and save flags. */
1862 spin_lock_irqsave(&lp->spinlock, flags);
1863
1864 /* Read the NWID. */
1865 psa_read(dev,
1866 (char *) psa.psa_nwid - (char *) &psa,
1867 (unsigned char *) psa.psa_nwid, 3);
1868 wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1];
1869 wrqu->nwid.disabled = !(psa.psa_nwid_select);
1870 wrqu->nwid.fixed = 1; /* Superfluous */
1871
1872 /* Enable interrupts and restore flags. */
1873 spin_unlock_irqrestore(&lp->spinlock, flags);
1874
1875 return ret;
1876}
1877
1878/*------------------------------------------------------------------*/
1879/*
1880 * Wireless Handler : set frequency
1881 */
1882static int wavelan_set_freq(struct net_device *dev,
1883 struct iw_request_info *info,
1884 union iwreq_data *wrqu,
1885 char *extra)
1886{
1887 unsigned int base = dev->base_addr;
1888 net_local *lp = netdev_priv(dev);
1889 unsigned long flags;
1890 int ret;
1891
1892 /* Disable interrupts and save flags. */
1893 spin_lock_irqsave(&lp->spinlock, flags);
1894
1895 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
1896 if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
1897 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
1898 ret = wv_set_frequency(base, &(wrqu->freq));
1899 else
1900 ret = -EOPNOTSUPP;
1901
1902 /* Enable interrupts and restore flags. */
1903 spin_unlock_irqrestore(&lp->spinlock, flags);
1904
1905 return ret;
1906}
1907
1908/*------------------------------------------------------------------*/
1909/*
1910 * Wireless Handler : get frequency
1911 */
1912static int wavelan_get_freq(struct net_device *dev,
1913 struct iw_request_info *info,
1914 union iwreq_data *wrqu,
1915 char *extra)
1916{
1917 unsigned int base = dev->base_addr;
1918 net_local *lp = netdev_priv(dev);
1919 psa_t psa;
1920 unsigned long flags;
1921 int ret = 0;
1922
1923 /* Disable interrupts and save flags. */
1924 spin_lock_irqsave(&lp->spinlock, flags);
1925
1926 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable).
1927 * Does it work for everybody, especially old cards? */
1928 if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
1929 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
1930 unsigned short freq;
1931
1932 /* Ask the EEPROM to read the frequency from the first area. */
1933 fee_read(base, 0x00, &freq, 1);
1934 wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000;
1935 wrqu->freq.e = 1;
1936 } else {
1937 psa_read(dev,
1938 (char *) &psa.psa_subband - (char *) &psa,
1939 (unsigned char *) &psa.psa_subband, 1);
1940
1941 if (psa.psa_subband <= 4) {
1942 wrqu->freq.m = fixed_bands[psa.psa_subband];
1943 wrqu->freq.e = (psa.psa_subband != 0);
1944 } else
1945 ret = -EOPNOTSUPP;
1946 }
1947
1948 /* Enable interrupts and restore flags. */
1949 spin_unlock_irqrestore(&lp->spinlock, flags);
1950
1951 return ret;
1952}
1953
1954/*------------------------------------------------------------------*/
1955/*
1956 * Wireless Handler : set level threshold
1957 */
1958static int wavelan_set_sens(struct net_device *dev,
1959 struct iw_request_info *info,
1960 union iwreq_data *wrqu,
1961 char *extra)
1962{
1963 unsigned int base = dev->base_addr;
1964 net_local *lp = netdev_priv(dev);
1965 psa_t psa;
1966 unsigned long flags;
1967 int ret = 0;
1968
1969 /* Disable interrupts and save flags. */
1970 spin_lock_irqsave(&lp->spinlock, flags);
1971
1972 /* Set the level threshold. */
1973 /* We should complain loudly if wrqu->sens.fixed = 0, because we
1974 * can't set auto mode... */
1975 psa.psa_thr_pre_set = wrqu->sens.value & 0x3F;
1976 psa_write(dev,
1977 (char *) &psa.psa_thr_pre_set - (char *) &psa,
1978 (unsigned char *) &psa.psa_thr_pre_set, 1);
1979 /* update the Wavelan checksum */
1980 update_psa_checksum(dev);
1981 mmc_out(base, mmwoff(0, mmw_thr_pre_set),
1982 psa.psa_thr_pre_set);
1983
1984 /* Enable interrupts and restore flags. */
1985 spin_unlock_irqrestore(&lp->spinlock, flags);
1986
1987 return ret;
1988}
1989
1990/*------------------------------------------------------------------*/
1991/*
1992 * Wireless Handler : get level threshold
1993 */
1994static int wavelan_get_sens(struct net_device *dev,
1995 struct iw_request_info *info,
1996 union iwreq_data *wrqu,
1997 char *extra)
1998{
1999 net_local *lp = netdev_priv(dev);
2000 psa_t psa;
2001 unsigned long flags;
2002 int ret = 0;
2003
2004 /* Disable interrupts and save flags. */
2005 spin_lock_irqsave(&lp->spinlock, flags);
2006
2007 /* Read the level threshold. */
2008 psa_read(dev,
2009 (char *) &psa.psa_thr_pre_set - (char *) &psa,
2010 (unsigned char *) &psa.psa_thr_pre_set, 1);
2011 wrqu->sens.value = psa.psa_thr_pre_set & 0x3F;
2012 wrqu->sens.fixed = 1;
2013
2014 /* Enable interrupts and restore flags. */
2015 spin_unlock_irqrestore(&lp->spinlock, flags);
2016
2017 return ret;
2018}
2019
2020/*------------------------------------------------------------------*/
2021/*
2022 * Wireless Handler : set encryption key
2023 */
2024static int wavelan_set_encode(struct net_device *dev,
2025 struct iw_request_info *info,
2026 union iwreq_data *wrqu,
2027 char *extra)
2028{
2029 unsigned int base = dev->base_addr;
2030 net_local *lp = netdev_priv(dev);
2031 unsigned long flags;
2032 psa_t psa;
2033 int ret = 0;
2034
2035 /* Disable interrupts and save flags. */
2036 spin_lock_irqsave(&lp->spinlock, flags);
2037
2038 /* Check if capable of encryption */
2039 if (!mmc_encr(base)) {
2040 ret = -EOPNOTSUPP;
2041 }
2042
2043 /* Check the size of the key */
2044 if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) {
2045 ret = -EINVAL;
2046 }
2047
2048 if(!ret) {
2049 /* Basic checking... */
2050 if (wrqu->encoding.length == 8) {
2051 /* Copy the key in the driver */
2052 memcpy(psa.psa_encryption_key, extra,
2053 wrqu->encoding.length);
2054 psa.psa_encryption_select = 1;
2055
2056 psa_write(dev,
2057 (char *) &psa.psa_encryption_select -
2058 (char *) &psa,
2059 (unsigned char *) &psa.
2060 psa_encryption_select, 8 + 1);
2061
2062 mmc_out(base, mmwoff(0, mmw_encr_enable),
2063 MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE);
2064 mmc_write(base, mmwoff(0, mmw_encr_key),
2065 (unsigned char *) &psa.
2066 psa_encryption_key, 8);
2067 }
2068
2069 /* disable encryption */
2070 if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
2071 psa.psa_encryption_select = 0;
2072 psa_write(dev,
2073 (char *) &psa.psa_encryption_select -
2074 (char *) &psa,
2075 (unsigned char *) &psa.
2076 psa_encryption_select, 1);
2077
2078 mmc_out(base, mmwoff(0, mmw_encr_enable), 0);
2079 }
2080 /* update the Wavelan checksum */
2081 update_psa_checksum(dev);
2082 }
2083
2084 /* Enable interrupts and restore flags. */
2085 spin_unlock_irqrestore(&lp->spinlock, flags);
2086
2087 return ret;
2088}
2089
2090/*------------------------------------------------------------------*/
2091/*
2092 * Wireless Handler : get encryption key
2093 */
2094static int wavelan_get_encode(struct net_device *dev,
2095 struct iw_request_info *info,
2096 union iwreq_data *wrqu,
2097 char *extra)
2098{
2099 unsigned int base = dev->base_addr;
2100 net_local *lp = netdev_priv(dev);
2101 psa_t psa;
2102 unsigned long flags;
2103 int ret = 0;
2104
2105 /* Disable interrupts and save flags. */
2106 spin_lock_irqsave(&lp->spinlock, flags);
2107
2108 /* Check if encryption is available */
2109 if (!mmc_encr(base)) {
2110 ret = -EOPNOTSUPP;
2111 } else {
2112 /* Read the encryption key */
2113 psa_read(dev,
2114 (char *) &psa.psa_encryption_select -
2115 (char *) &psa,
2116 (unsigned char *) &psa.
2117 psa_encryption_select, 1 + 8);
2118
2119 /* encryption is enabled ? */
2120 if (psa.psa_encryption_select)
2121 wrqu->encoding.flags = IW_ENCODE_ENABLED;
2122 else
2123 wrqu->encoding.flags = IW_ENCODE_DISABLED;
2124 wrqu->encoding.flags |= mmc_encr(base);
2125
2126 /* Copy the key to the user buffer */
2127 wrqu->encoding.length = 8;
2128 memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length);
2129 }
2130
2131 /* Enable interrupts and restore flags. */
2132 spin_unlock_irqrestore(&lp->spinlock, flags);
2133
2134 return ret;
2135}
2136
2137#ifdef WAVELAN_ROAMING_EXT
2138/*------------------------------------------------------------------*/
2139/*
2140 * Wireless Handler : set ESSID (domain)
2141 */
2142static int wavelan_set_essid(struct net_device *dev,
2143 struct iw_request_info *info,
2144 union iwreq_data *wrqu,
2145 char *extra)
2146{
2147 net_local *lp = netdev_priv(dev);
2148 unsigned long flags;
2149 int ret = 0;
2150
2151 /* Disable interrupts and save flags. */
2152 spin_lock_irqsave(&lp->spinlock, flags);
2153
2154 /* Check if disable */
2155 if(wrqu->data.flags == 0)
2156 lp->filter_domains = 0;
2157 else {
2158 char essid[IW_ESSID_MAX_SIZE + 1];
2159 char * endp;
2160
2161 /* Terminate the string */
2162 memcpy(essid, extra, wrqu->data.length);
2163 essid[IW_ESSID_MAX_SIZE] = '\0';
2164
2165#ifdef DEBUG_IOCTL_INFO
2166 printk(KERN_DEBUG "SetEssid : ``%s''\n", essid);
2167#endif /* DEBUG_IOCTL_INFO */
2168
2169 /* Convert to a number (note : Wavelan specific) */
2170 lp->domain_id = simple_strtoul(essid, &endp, 16);
2171 /* Has it worked ? */
2172 if(endp > essid)
2173 lp->filter_domains = 1;
2174 else {
2175 lp->filter_domains = 0;
2176 ret = -EINVAL;
2177 }
2178 }
2179
2180 /* Enable interrupts and restore flags. */
2181 spin_unlock_irqrestore(&lp->spinlock, flags);
2182
2183 return ret;
2184}
2185
2186/*------------------------------------------------------------------*/
2187/*
2188 * Wireless Handler : get ESSID (domain)
2189 */
2190static int wavelan_get_essid(struct net_device *dev,
2191 struct iw_request_info *info,
2192 union iwreq_data *wrqu,
2193 char *extra)
2194{
2195 net_local *lp = netdev_priv(dev);
2196
2197 /* Is the domain ID active ? */
2198 wrqu->data.flags = lp->filter_domains;
2199
2200 /* Copy Domain ID into a string (Wavelan specific) */
2201 /* Sound crazy, be we can't have a snprintf in the kernel !!! */
2202 sprintf(extra, "%lX", lp->domain_id);
2203 extra[IW_ESSID_MAX_SIZE] = '\0';
2204
2205 /* Set the length */
2206 wrqu->data.length = strlen(extra);
2207
2208 return 0;
2209}
2210
2211/*------------------------------------------------------------------*/
2212/*
2213 * Wireless Handler : set AP address
2214 */
2215static int wavelan_set_wap(struct net_device *dev,
2216 struct iw_request_info *info,
2217 union iwreq_data *wrqu,
2218 char *extra)
2219{
2220#ifdef DEBUG_IOCTL_INFO
2221 printk(KERN_DEBUG "Set AP to : %pM\n", wrqu->ap_addr.sa_data);
2222#endif /* DEBUG_IOCTL_INFO */
2223
2224 return -EOPNOTSUPP;
2225}
2226
2227/*------------------------------------------------------------------*/
2228/*
2229 * Wireless Handler : get AP address
2230 */
2231static int wavelan_get_wap(struct net_device *dev,
2232 struct iw_request_info *info,
2233 union iwreq_data *wrqu,
2234 char *extra)
2235{
2236 /* Should get the real McCoy instead of own Ethernet address */
2237 memcpy(wrqu->ap_addr.sa_data, dev->dev_addr, WAVELAN_ADDR_SIZE);
2238 wrqu->ap_addr.sa_family = ARPHRD_ETHER;
2239
2240 return -EOPNOTSUPP;
2241}
2242#endif /* WAVELAN_ROAMING_EXT */
2243
2244#ifdef WAVELAN_ROAMING
2245/*------------------------------------------------------------------*/
2246/*
2247 * Wireless Handler : set mode
2248 */
2249static int wavelan_set_mode(struct net_device *dev,
2250 struct iw_request_info *info,
2251 union iwreq_data *wrqu,
2252 char *extra)
2253{
2254 net_local *lp = netdev_priv(dev);
2255 unsigned long flags;
2256 int ret = 0;
2257
2258 /* Disable interrupts and save flags. */
2259 spin_lock_irqsave(&lp->spinlock, flags);
2260
2261 /* Check mode */
2262 switch(wrqu->mode) {
2263 case IW_MODE_ADHOC:
2264 if(do_roaming) {
2265 wv_roam_cleanup(dev);
2266 do_roaming = 0;
2267 }
2268 break;
2269 case IW_MODE_INFRA:
2270 if(!do_roaming) {
2271 wv_roam_init(dev);
2272 do_roaming = 1;
2273 }
2274 break;
2275 default:
2276 ret = -EINVAL;
2277 }
2278
2279 /* Enable interrupts and restore flags. */
2280 spin_unlock_irqrestore(&lp->spinlock, flags);
2281
2282 return ret;
2283}
2284
2285/*------------------------------------------------------------------*/
2286/*
2287 * Wireless Handler : get mode
2288 */
2289static int wavelan_get_mode(struct net_device *dev,
2290 struct iw_request_info *info,
2291 union iwreq_data *wrqu,
2292 char *extra)
2293{
2294 if(do_roaming)
2295 wrqu->mode = IW_MODE_INFRA;
2296 else
2297 wrqu->mode = IW_MODE_ADHOC;
2298
2299 return 0;
2300}
2301#endif /* WAVELAN_ROAMING */
2302
2303/*------------------------------------------------------------------*/
2304/*
2305 * Wireless Handler : get range info
2306 */
2307static int wavelan_get_range(struct net_device *dev,
2308 struct iw_request_info *info,
2309 union iwreq_data *wrqu,
2310 char *extra)
2311{
2312 unsigned int base = dev->base_addr;
2313 net_local *lp = netdev_priv(dev);
2314 struct iw_range *range = (struct iw_range *) extra;
2315 unsigned long flags;
2316 int ret = 0;
2317
2318 /* Set the length (very important for backward compatibility) */
2319 wrqu->data.length = sizeof(struct iw_range);
2320
2321 /* Set all the info we don't care or don't know about to zero */
2322 memset(range, 0, sizeof(struct iw_range));
2323
2324 /* Set the Wireless Extension versions */
2325 range->we_version_compiled = WIRELESS_EXT;
2326 range->we_version_source = 9;
2327
2328 /* Set information in the range struct. */
2329 range->throughput = 1.4 * 1000 * 1000; /* don't argue on this ! */
2330 range->min_nwid = 0x0000;
2331 range->max_nwid = 0xFFFF;
2332
2333 range->sensitivity = 0x3F;
2334 range->max_qual.qual = MMR_SGNL_QUAL;
2335 range->max_qual.level = MMR_SIGNAL_LVL;
2336 range->max_qual.noise = MMR_SILENCE_LVL;
2337 range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */
2338 /* Need to get better values for those two */
2339 range->avg_qual.level = 30;
2340 range->avg_qual.noise = 8;
2341
2342 range->num_bitrates = 1;
2343 range->bitrate[0] = 2000000; /* 2 Mb/s */
2344
2345 /* Event capability (kernel + driver) */
2346 range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) |
2347 IW_EVENT_CAPA_MASK(0x8B04) |
2348 IW_EVENT_CAPA_MASK(0x8B06));
2349 range->event_capa[1] = IW_EVENT_CAPA_K_1;
2350
2351 /* Disable interrupts and save flags. */
2352 spin_lock_irqsave(&lp->spinlock, flags);
2353
2354 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
2355 if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
2356 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
2357 range->num_channels = 10;
2358 range->num_frequency = wv_frequency_list(base, range->freq,
2359 IW_MAX_FREQUENCIES);
2360 } else
2361 range->num_channels = range->num_frequency = 0;
2362
2363 /* Encryption supported ? */
2364 if (mmc_encr(base)) {
2365 range->encoding_size[0] = 8; /* DES = 64 bits key */
2366 range->num_encoding_sizes = 1;
2367 range->max_encoding_tokens = 1; /* Only one key possible */
2368 } else {
2369 range->num_encoding_sizes = 0;
2370 range->max_encoding_tokens = 0;
2371 }
2372
2373 /* Enable interrupts and restore flags. */
2374 spin_unlock_irqrestore(&lp->spinlock, flags);
2375
2376 return ret;
2377}
2378
2379/*------------------------------------------------------------------*/
2380/*
2381 * Wireless Private Handler : set quality threshold
2382 */
2383static int wavelan_set_qthr(struct net_device *dev,
2384 struct iw_request_info *info,
2385 union iwreq_data *wrqu,
2386 char *extra)
2387{
2388 unsigned int base = dev->base_addr;
2389 net_local *lp = netdev_priv(dev);
2390 psa_t psa;
2391 unsigned long flags;
2392
2393 /* Disable interrupts and save flags. */
2394 spin_lock_irqsave(&lp->spinlock, flags);
2395
2396 psa.psa_quality_thr = *(extra) & 0x0F;
2397 psa_write(dev,
2398 (char *) &psa.psa_quality_thr - (char *) &psa,
2399 (unsigned char *) &psa.psa_quality_thr, 1);
2400 /* update the Wavelan checksum */
2401 update_psa_checksum(dev);
2402 mmc_out(base, mmwoff(0, mmw_quality_thr),
2403 psa.psa_quality_thr);
2404
2405 /* Enable interrupts and restore flags. */
2406 spin_unlock_irqrestore(&lp->spinlock, flags);
2407
2408 return 0;
2409}
2410
2411/*------------------------------------------------------------------*/
2412/*
2413 * Wireless Private Handler : get quality threshold
2414 */
2415static int wavelan_get_qthr(struct net_device *dev,
2416 struct iw_request_info *info,
2417 union iwreq_data *wrqu,
2418 char *extra)
2419{
2420 net_local *lp = netdev_priv(dev);
2421 psa_t psa;
2422 unsigned long flags;
2423
2424 /* Disable interrupts and save flags. */
2425 spin_lock_irqsave(&lp->spinlock, flags);
2426
2427 psa_read(dev,
2428 (char *) &psa.psa_quality_thr - (char *) &psa,
2429 (unsigned char *) &psa.psa_quality_thr, 1);
2430 *(extra) = psa.psa_quality_thr & 0x0F;
2431
2432 /* Enable interrupts and restore flags. */
2433 spin_unlock_irqrestore(&lp->spinlock, flags);
2434
2435 return 0;
2436}
2437
2438#ifdef WAVELAN_ROAMING
2439/*------------------------------------------------------------------*/
2440/*
2441 * Wireless Private Handler : set roaming
2442 */
2443static int wavelan_set_roam(struct net_device *dev,
2444 struct iw_request_info *info,
2445 union iwreq_data *wrqu,
2446 char *extra)
2447{
2448 net_local *lp = netdev_priv(dev);
2449 unsigned long flags;
2450
2451 /* Disable interrupts and save flags. */
2452 spin_lock_irqsave(&lp->spinlock, flags);
2453
2454 /* Note : should check if user == root */
2455 if(do_roaming && (*extra)==0)
2456 wv_roam_cleanup(dev);
2457 else if(do_roaming==0 && (*extra)!=0)
2458 wv_roam_init(dev);
2459
2460 do_roaming = (*extra);
2461
2462 /* Enable interrupts and restore flags. */
2463 spin_unlock_irqrestore(&lp->spinlock, flags);
2464
2465 return 0;
2466}
2467
2468/*------------------------------------------------------------------*/
2469/*
2470 * Wireless Private Handler : get quality threshold
2471 */
2472static int wavelan_get_roam(struct net_device *dev,
2473 struct iw_request_info *info,
2474 union iwreq_data *wrqu,
2475 char *extra)
2476{
2477 *(extra) = do_roaming;
2478
2479 return 0;
2480}
2481#endif /* WAVELAN_ROAMING */
2482
2483#ifdef HISTOGRAM
2484/*------------------------------------------------------------------*/
2485/*
2486 * Wireless Private Handler : set histogram
2487 */
2488static int wavelan_set_histo(struct net_device *dev,
2489 struct iw_request_info *info,
2490 union iwreq_data *wrqu,
2491 char *extra)
2492{
2493 net_local *lp = netdev_priv(dev);
2494
2495 /* Check the number of intervals. */
2496 if (wrqu->data.length > 16) {
2497 return(-E2BIG);
2498 }
2499
2500 /* Disable histo while we copy the addresses.
2501 * As we don't disable interrupts, we need to do this */
2502 lp->his_number = 0;
2503
2504 /* Are there ranges to copy? */
2505 if (wrqu->data.length > 0) {
2506 /* Copy interval ranges to the driver */
2507 memcpy(lp->his_range, extra, wrqu->data.length);
2508
2509 {
2510 int i;
2511 printk(KERN_DEBUG "Histo :");
2512 for(i = 0; i < wrqu->data.length; i++)
2513 printk(" %d", lp->his_range[i]);
2514 printk("\n");
2515 }
2516
2517 /* Reset result structure. */
2518 memset(lp->his_sum, 0x00, sizeof(long) * 16);
2519 }
2520
2521 /* Now we can set the number of ranges */
2522 lp->his_number = wrqu->data.length;
2523
2524 return(0);
2525}
2526
2527/*------------------------------------------------------------------*/
2528/*
2529 * Wireless Private Handler : get histogram
2530 */
2531static int wavelan_get_histo(struct net_device *dev,
2532 struct iw_request_info *info,
2533 union iwreq_data *wrqu,
2534 char *extra)
2535{
2536 net_local *lp = netdev_priv(dev);
2537
2538 /* Set the number of intervals. */
2539 wrqu->data.length = lp->his_number;
2540
2541 /* Give back the distribution statistics */
2542 if(lp->his_number > 0)
2543 memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number);
2544
2545 return(0);
2546}
2547#endif /* HISTOGRAM */
2548
2549/*------------------------------------------------------------------*/
2550/*
2551 * Structures to export the Wireless Handlers
2552 */
2553
2554static const struct iw_priv_args wavelan_private_args[] = {
2555/*{ cmd, set_args, get_args, name } */
2556 { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" },
2557 { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" },
2558 { SIOCSIPROAM, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setroam" },
2559 { SIOCGIPROAM, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getroam" },
2560 { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" },
2561 { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" },
2562};
2563
2564static const iw_handler wavelan_handler[] =
2565{
2566 NULL, /* SIOCSIWNAME */
2567 wavelan_get_name, /* SIOCGIWNAME */
2568 wavelan_set_nwid, /* SIOCSIWNWID */
2569 wavelan_get_nwid, /* SIOCGIWNWID */
2570 wavelan_set_freq, /* SIOCSIWFREQ */
2571 wavelan_get_freq, /* SIOCGIWFREQ */
2572#ifdef WAVELAN_ROAMING
2573 wavelan_set_mode, /* SIOCSIWMODE */
2574 wavelan_get_mode, /* SIOCGIWMODE */
2575#else /* WAVELAN_ROAMING */
2576 NULL, /* SIOCSIWMODE */
2577 NULL, /* SIOCGIWMODE */
2578#endif /* WAVELAN_ROAMING */
2579 wavelan_set_sens, /* SIOCSIWSENS */
2580 wavelan_get_sens, /* SIOCGIWSENS */
2581 NULL, /* SIOCSIWRANGE */
2582 wavelan_get_range, /* SIOCGIWRANGE */
2583 NULL, /* SIOCSIWPRIV */
2584 NULL, /* SIOCGIWPRIV */
2585 NULL, /* SIOCSIWSTATS */
2586 NULL, /* SIOCGIWSTATS */
2587 iw_handler_set_spy, /* SIOCSIWSPY */
2588 iw_handler_get_spy, /* SIOCGIWSPY */
2589 iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
2590 iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
2591#ifdef WAVELAN_ROAMING_EXT
2592 wavelan_set_wap, /* SIOCSIWAP */
2593 wavelan_get_wap, /* SIOCGIWAP */
2594 NULL, /* -- hole -- */
2595 NULL, /* SIOCGIWAPLIST */
2596 NULL, /* -- hole -- */
2597 NULL, /* -- hole -- */
2598 wavelan_set_essid, /* SIOCSIWESSID */
2599 wavelan_get_essid, /* SIOCGIWESSID */
2600#else /* WAVELAN_ROAMING_EXT */
2601 NULL, /* SIOCSIWAP */
2602 NULL, /* SIOCGIWAP */
2603 NULL, /* -- hole -- */
2604 NULL, /* SIOCGIWAPLIST */
2605 NULL, /* -- hole -- */
2606 NULL, /* -- hole -- */
2607 NULL, /* SIOCSIWESSID */
2608 NULL, /* SIOCGIWESSID */
2609#endif /* WAVELAN_ROAMING_EXT */
2610 NULL, /* SIOCSIWNICKN */
2611 NULL, /* SIOCGIWNICKN */
2612 NULL, /* -- hole -- */
2613 NULL, /* -- hole -- */
2614 NULL, /* SIOCSIWRATE */
2615 NULL, /* SIOCGIWRATE */
2616 NULL, /* SIOCSIWRTS */
2617 NULL, /* SIOCGIWRTS */
2618 NULL, /* SIOCSIWFRAG */
2619 NULL, /* SIOCGIWFRAG */
2620 NULL, /* SIOCSIWTXPOW */
2621 NULL, /* SIOCGIWTXPOW */
2622 NULL, /* SIOCSIWRETRY */
2623 NULL, /* SIOCGIWRETRY */
2624 wavelan_set_encode, /* SIOCSIWENCODE */
2625 wavelan_get_encode, /* SIOCGIWENCODE */
2626};
2627
2628static const iw_handler wavelan_private_handler[] =
2629{
2630 wavelan_set_qthr, /* SIOCIWFIRSTPRIV */
2631 wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */
2632#ifdef WAVELAN_ROAMING
2633 wavelan_set_roam, /* SIOCIWFIRSTPRIV + 2 */
2634 wavelan_get_roam, /* SIOCIWFIRSTPRIV + 3 */
2635#else /* WAVELAN_ROAMING */
2636 NULL, /* SIOCIWFIRSTPRIV + 2 */
2637 NULL, /* SIOCIWFIRSTPRIV + 3 */
2638#endif /* WAVELAN_ROAMING */
2639#ifdef HISTOGRAM
2640 wavelan_set_histo, /* SIOCIWFIRSTPRIV + 4 */
2641 wavelan_get_histo, /* SIOCIWFIRSTPRIV + 5 */
2642#endif /* HISTOGRAM */
2643};
2644
2645static const struct iw_handler_def wavelan_handler_def =
2646{
2647 .num_standard = ARRAY_SIZE(wavelan_handler),
2648 .num_private = ARRAY_SIZE(wavelan_private_handler),
2649 .num_private_args = ARRAY_SIZE(wavelan_private_args),
2650 .standard = wavelan_handler,
2651 .private = wavelan_private_handler,
2652 .private_args = wavelan_private_args,
2653 .get_wireless_stats = wavelan_get_wireless_stats,
2654};
2655
2656/*------------------------------------------------------------------*/
2657/*
2658 * Get wireless statistics
2659 * Called by /proc/net/wireless...
2660 */
2661static iw_stats *
2662wavelan_get_wireless_stats(struct net_device * dev)
2663{
2664 unsigned int base = dev->base_addr;
2665 net_local * lp = netdev_priv(dev);
2666 mmr_t m;
2667 iw_stats * wstats;
2668 unsigned long flags;
2669
2670#ifdef DEBUG_IOCTL_TRACE
2671 printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n", dev->name);
2672#endif
2673
2674 /* Disable interrupts & save flags */
2675 spin_lock_irqsave(&lp->spinlock, flags);
2676
2677 wstats = &lp->wstats;
2678
2679 /* Get data from the mmc */
2680 mmc_out(base, mmwoff(0, mmw_freeze), 1);
2681
2682 mmc_read(base, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1);
2683 mmc_read(base, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, 2);
2684 mmc_read(base, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set, 4);
2685
2686 mmc_out(base, mmwoff(0, mmw_freeze), 0);
2687
2688 /* Copy data to wireless stuff */
2689 wstats->status = m.mmr_dce_status & MMR_DCE_STATUS;
2690 wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL;
2691 wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL;
2692 wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL;
2693 wstats->qual.updated = (((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7) |
2694 ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6) |
2695 ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5));
2696 wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2697 wstats->discard.code = 0L;
2698 wstats->discard.misc = 0L;
2699
2700 /* ReEnable interrupts & restore flags */
2701 spin_unlock_irqrestore(&lp->spinlock, flags);
2702
2703#ifdef DEBUG_IOCTL_TRACE
2704 printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n", dev->name);
2705#endif
2706 return &lp->wstats;
2707}
2708
2709/************************* PACKET RECEPTION *************************/
2710/*
2711 * This part deal with receiving the packets.
2712 * The interrupt handler get an interrupt when a packet has been
2713 * successfully received and called this part...
2714 */
2715
2716/*------------------------------------------------------------------*/
2717/*
2718 * Calculate the starting address of the frame pointed to by the receive
2719 * frame pointer and verify that the frame seem correct
2720 * (called by wv_packet_rcv())
2721 */
2722static int
2723wv_start_of_frame(struct net_device * dev,
2724 int rfp, /* end of frame */
2725 int wrap) /* start of buffer */
2726{
2727 unsigned int base = dev->base_addr;
2728 int rp;
2729 int len;
2730
2731 rp = (rfp - 5 + RX_SIZE) % RX_SIZE;
2732 outb(rp & 0xff, PIORL(base));
2733 outb(((rp >> 8) & PIORH_MASK), PIORH(base));
2734 len = inb(PIOP(base));
2735 len |= inb(PIOP(base)) << 8;
2736
2737 /* Sanity checks on size */
2738 /* Frame too big */
2739 if(len > MAXDATAZ + 100)
2740 {
2741#ifdef DEBUG_RX_ERROR
2742 printk(KERN_INFO "%s: wv_start_of_frame: Received frame too large, rfp %d len 0x%x\n",
2743 dev->name, rfp, len);
2744#endif
2745 return(-1);
2746 }
2747
2748 /* Frame too short */
2749 if(len < 7)
2750 {
2751#ifdef DEBUG_RX_ERROR
2752 printk(KERN_INFO "%s: wv_start_of_frame: Received null frame, rfp %d len 0x%x\n",
2753 dev->name, rfp, len);
2754#endif
2755 return(-1);
2756 }
2757
2758 /* Wrap around buffer */
2759 if(len > ((wrap - (rfp - len) + RX_SIZE) % RX_SIZE)) /* magic formula ! */
2760 {
2761#ifdef DEBUG_RX_ERROR
2762 printk(KERN_INFO "%s: wv_start_of_frame: wrap around buffer, wrap %d rfp %d len 0x%x\n",
2763 dev->name, wrap, rfp, len);
2764#endif
2765 return(-1);
2766 }
2767
2768 return((rp - len + RX_SIZE) % RX_SIZE);
2769} /* wv_start_of_frame */
2770
2771/*------------------------------------------------------------------*/
2772/*
2773 * This routine does the actual copy of data (including the ethernet
2774 * header structure) from the WaveLAN card to an sk_buff chain that
2775 * will be passed up to the network interface layer. NOTE: We
2776 * currently don't handle trailer protocols (neither does the rest of
2777 * the network interface), so if that is needed, it will (at least in
2778 * part) be added here. The contents of the receive ring buffer are
2779 * copied to a message chain that is then passed to the kernel.
2780 *
2781 * Note: if any errors occur, the packet is "dropped on the floor"
2782 * (called by wv_packet_rcv())
2783 */
2784static void
2785wv_packet_read(struct net_device * dev,
2786 int fd_p,
2787 int sksize)
2788{
2789 net_local * lp = netdev_priv(dev);
2790 struct sk_buff * skb;
2791
2792#ifdef DEBUG_RX_TRACE
2793 printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n",
2794 dev->name, fd_p, sksize);
2795#endif
2796
2797 /* Allocate some buffer for the new packet */
2798 if((skb = dev_alloc_skb(sksize+2)) == (struct sk_buff *) NULL)
2799 {
2800#ifdef DEBUG_RX_ERROR
2801 printk(KERN_INFO "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC)\n",
2802 dev->name, sksize);
2803#endif
2804 dev->stats.rx_dropped++;
2805 /*
2806 * Not only do we want to return here, but we also need to drop the
2807 * packet on the floor to clear the interrupt.
2808 */
2809 return;
2810 }
2811
2812 skb_reserve(skb, 2);
2813 fd_p = read_ringbuf(dev, fd_p, (char *) skb_put(skb, sksize), sksize);
2814 skb->protocol = eth_type_trans(skb, dev);
2815
2816#ifdef DEBUG_RX_INFO
2817 wv_packet_info(skb_mac_header(skb), sksize, dev->name, "wv_packet_read");
2818#endif /* DEBUG_RX_INFO */
2819
2820 /* Statistics gathering & stuff associated.
2821 * It seem a bit messy with all the define, but it's really simple... */
2822 if(
2823#ifdef IW_WIRELESS_SPY
2824 (lp->spy_data.spy_number > 0) ||
2825#endif /* IW_WIRELESS_SPY */
2826#ifdef HISTOGRAM
2827 (lp->his_number > 0) ||
2828#endif /* HISTOGRAM */
2829#ifdef WAVELAN_ROAMING
2830 (do_roaming) ||
2831#endif /* WAVELAN_ROAMING */
2832 0)
2833 {
2834 u_char stats[3]; /* Signal level, Noise level, Signal quality */
2835
2836 /* read signal level, silence level and signal quality bytes */
2837 fd_p = read_ringbuf(dev, (fd_p + 4) % RX_SIZE + RX_BASE,
2838 stats, 3);
2839#ifdef DEBUG_RX_INFO
2840 printk(KERN_DEBUG "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n",
2841 dev->name, stats[0] & 0x3F, stats[1] & 0x3F, stats[2] & 0x0F);
2842#endif
2843
2844#ifdef WAVELAN_ROAMING
2845 if(do_roaming)
2846 if(WAVELAN_BEACON(skb->data))
2847 wl_roam_gather(dev, skb->data, stats);
2848#endif /* WAVELAN_ROAMING */
2849
2850#ifdef WIRELESS_SPY
2851 wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE, stats);
2852#endif /* WIRELESS_SPY */
2853#ifdef HISTOGRAM
2854 wl_his_gather(dev, stats);
2855#endif /* HISTOGRAM */
2856 }
2857
2858 /*
2859 * Hand the packet to the Network Module
2860 */
2861 netif_rx(skb);
2862
2863 /* Keep stats up to date */
2864 dev->stats.rx_packets++;
2865 dev->stats.rx_bytes += sksize;
2866
2867#ifdef DEBUG_RX_TRACE
2868 printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name);
2869#endif
2870 return;
2871}
2872
2873/*------------------------------------------------------------------*/
2874/*
2875 * This routine is called by the interrupt handler to initiate a
2876 * packet transfer from the card to the network interface layer above
2877 * this driver. This routine checks if a buffer has been successfully
2878 * received by the WaveLAN card. If so, the routine wv_packet_read is
2879 * called to do the actual transfer of the card's data including the
2880 * ethernet header into a packet consisting of an sk_buff chain.
2881 * (called by wavelan_interrupt())
2882 * Note : the spinlock is already grabbed for us and irq are disabled.
2883 */
2884static void
2885wv_packet_rcv(struct net_device * dev)
2886{
2887 unsigned int base = dev->base_addr;
2888 net_local * lp = netdev_priv(dev);
2889 int newrfp;
2890 int rp;
2891 int len;
2892 int f_start;
2893 int status;
2894 int i593_rfp;
2895 int stat_ptr;
2896 u_char c[4];
2897
2898#ifdef DEBUG_RX_TRACE
2899 printk(KERN_DEBUG "%s: ->wv_packet_rcv()\n", dev->name);
2900#endif
2901
2902 /* Get the new receive frame pointer from the i82593 chip */
2903 outb(CR0_STATUS_2 | OP0_NOP, LCCR(base));
2904 i593_rfp = inb(LCSR(base));
2905 i593_rfp |= inb(LCSR(base)) << 8;
2906 i593_rfp %= RX_SIZE;
2907
2908 /* Get the new receive frame pointer from the WaveLAN card.
2909 * It is 3 bytes more than the increment of the i82593 receive
2910 * frame pointer, for each packet. This is because it includes the
2911 * 3 roaming bytes added by the mmc.
2912 */
2913 newrfp = inb(RPLL(base));
2914 newrfp |= inb(RPLH(base)) << 8;
2915 newrfp %= RX_SIZE;
2916
2917#ifdef DEBUG_RX_INFO
2918 printk(KERN_DEBUG "%s: wv_packet_rcv(): i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
2919 dev->name, i593_rfp, lp->stop, newrfp, lp->rfp);
2920#endif
2921
2922#ifdef DEBUG_RX_ERROR
2923 /* If no new frame pointer... */
2924 if(lp->overrunning || newrfp == lp->rfp)
2925 printk(KERN_INFO "%s: wv_packet_rcv(): no new frame: i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
2926 dev->name, i593_rfp, lp->stop, newrfp, lp->rfp);
2927#endif
2928
2929 /* Read all frames (packets) received */
2930 while(newrfp != lp->rfp)
2931 {
2932 /* A frame is composed of the packet, followed by a status word,
2933 * the length of the frame (word) and the mmc info (SNR & qual).
2934 * It's because the length is at the end that we can only scan
2935 * frames backward. */
2936
2937 /* Find the first frame by skipping backwards over the frames */
2938 rp = newrfp; /* End of last frame */
2939 while(((f_start = wv_start_of_frame(dev, rp, newrfp)) != lp->rfp) &&
2940 (f_start != -1))
2941 rp = f_start;
2942
2943 /* If we had a problem */
2944 if(f_start == -1)
2945 {
2946#ifdef DEBUG_RX_ERROR
2947 printk(KERN_INFO "wavelan_cs: cannot find start of frame ");
2948 printk(" i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
2949 i593_rfp, lp->stop, newrfp, lp->rfp);
2950#endif
2951 lp->rfp = rp; /* Get to the last usable frame */
2952 continue;
2953 }
2954
2955 /* f_start point to the beggining of the first frame received
2956 * and rp to the beggining of the next one */
2957
2958 /* Read status & length of the frame */
2959 stat_ptr = (rp - 7 + RX_SIZE) % RX_SIZE;
2960 stat_ptr = read_ringbuf(dev, stat_ptr, c, 4);
2961 status = c[0] | (c[1] << 8);
2962 len = c[2] | (c[3] << 8);
2963
2964 /* Check status */
2965 if((status & RX_RCV_OK) != RX_RCV_OK)
2966 {
2967 dev->stats.rx_errors++;
2968 if(status & RX_NO_SFD)
2969 dev->stats.rx_frame_errors++;
2970 if(status & RX_CRC_ERR)
2971 dev->stats.rx_crc_errors++;
2972 if(status & RX_OVRRUN)
2973 dev->stats.rx_over_errors++;
2974
2975#ifdef DEBUG_RX_FAIL
2976 printk(KERN_DEBUG "%s: wv_packet_rcv(): packet not received ok, status = 0x%x\n",
2977 dev->name, status);
2978#endif
2979 }
2980 else
2981 /* Read the packet and transmit to Linux */
2982 wv_packet_read(dev, f_start, len - 2);
2983
2984 /* One frame has been processed, skip it */
2985 lp->rfp = rp;
2986 }
2987
2988 /*
2989 * Update the frame stop register, but set it to less than
2990 * the full 8K to allow space for 3 bytes of signal strength
2991 * per packet.
2992 */
2993 lp->stop = (i593_rfp + RX_SIZE - ((RX_SIZE / 64) * 3)) % RX_SIZE;
2994 outb(OP0_SWIT_TO_PORT_1 | CR0_CHNL, LCCR(base));
2995 outb(CR1_STOP_REG_UPDATE | (lp->stop >> RX_SIZE_SHIFT), LCCR(base));
2996 outb(OP1_SWIT_TO_PORT_0, LCCR(base));
2997
2998#ifdef DEBUG_RX_TRACE
2999 printk(KERN_DEBUG "%s: <-wv_packet_rcv()\n", dev->name);
3000#endif
3001}
3002
3003/*********************** PACKET TRANSMISSION ***********************/
3004/*
3005 * This part deal with sending packet through the wavelan
3006 * We copy the packet to the send buffer and then issue the send
3007 * command to the i82593. The result of this operation will be
3008 * checked in wavelan_interrupt()
3009 */
3010
3011/*------------------------------------------------------------------*/
3012/*
3013 * This routine fills in the appropriate registers and memory
3014 * locations on the WaveLAN card and starts the card off on
3015 * the transmit.
3016 * (called in wavelan_packet_xmit())
3017 */
3018static void
3019wv_packet_write(struct net_device * dev,
3020 void * buf,
3021 short length)
3022{
3023 net_local * lp = netdev_priv(dev);
3024 unsigned int base = dev->base_addr;
3025 unsigned long flags;
3026 int clen = length;
3027 register u_short xmtdata_base = TX_BASE;
3028
3029#ifdef DEBUG_TX_TRACE
3030 printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name, length);
3031#endif
3032
3033 spin_lock_irqsave(&lp->spinlock, flags);
3034
3035 /* Write the length of data buffer followed by the buffer */
3036 outb(xmtdata_base & 0xff, PIORL(base));
3037 outb(((xmtdata_base >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3038 outb(clen & 0xff, PIOP(base)); /* lsb */
3039 outb(clen >> 8, PIOP(base)); /* msb */
3040
3041 /* Send the data */
3042 outsb(PIOP(base), buf, clen);
3043
3044 /* Indicate end of transmit chain */
3045 outb(OP0_NOP, PIOP(base));
3046 /* josullvn@cs.cmu.edu: need to send a second NOP for alignment... */
3047 outb(OP0_NOP, PIOP(base));
3048
3049 /* Reset the transmit DMA pointer */
3050 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3051 hacr_write(base, HACR_DEFAULT);
3052 /* Send the transmit command */
3053 wv_82593_cmd(dev, "wv_packet_write(): transmit",
3054 OP0_TRANSMIT, SR0_NO_RESULT);
3055
3056 /* Make sure the watchdog will keep quiet for a while */
3057 dev->trans_start = jiffies;
3058
3059 /* Keep stats up to date */
3060 dev->stats.tx_bytes += length;
3061
3062 spin_unlock_irqrestore(&lp->spinlock, flags);
3063
3064#ifdef DEBUG_TX_INFO
3065 wv_packet_info((u_char *) buf, length, dev->name, "wv_packet_write");
3066#endif /* DEBUG_TX_INFO */
3067
3068#ifdef DEBUG_TX_TRACE
3069 printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name);
3070#endif
3071}
3072
3073/*------------------------------------------------------------------*/
3074/*
3075 * This routine is called when we want to send a packet (NET3 callback)
3076 * In this routine, we check if the harware is ready to accept
3077 * the packet. We also prevent reentrance. Then, we call the function
3078 * to send the packet...
3079 */
3080static netdev_tx_t
3081wavelan_packet_xmit(struct sk_buff * skb,
3082 struct net_device * dev)
3083{
3084 net_local * lp = netdev_priv(dev);
3085 unsigned long flags;
3086
3087#ifdef DEBUG_TX_TRACE
3088 printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name,
3089 (unsigned) skb);
3090#endif
3091
3092 /*
3093 * Block a timer-based transmit from overlapping a previous transmit.
3094 * In other words, prevent reentering this routine.
3095 */
3096 netif_stop_queue(dev);
3097
3098 /* If somebody has asked to reconfigure the controller,
3099 * we can do it now */
3100 if(lp->reconfig_82593)
3101 {
3102 spin_lock_irqsave(&lp->spinlock, flags); /* Disable interrupts */
3103 wv_82593_config(dev);
3104 spin_unlock_irqrestore(&lp->spinlock, flags); /* Re-enable interrupts */
3105 /* Note : the configure procedure was totally synchronous,
3106 * so the Tx buffer is now free */
3107 }
3108
3109 /* Check if we need some padding */
3110 /* Note : on wireless the propagation time is in the order of 1us,
3111 * and we don't have the Ethernet specific requirement of beeing
3112 * able to detect collisions, therefore in theory we don't really
3113 * need to pad. Jean II */
3114 if (skb_padto(skb, ETH_ZLEN))
3115 return NETDEV_TX_OK;
3116
3117 wv_packet_write(dev, skb->data, skb->len);
3118
3119 dev_kfree_skb(skb);
3120
3121#ifdef DEBUG_TX_TRACE
3122 printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name);
3123#endif
3124 return NETDEV_TX_OK;
3125}
3126
3127/********************** HARDWARE CONFIGURATION **********************/
3128/*
3129 * This part do the real job of starting and configuring the hardware.
3130 */
3131
3132/*------------------------------------------------------------------*/
3133/*
3134 * Routine to initialize the Modem Management Controller.
3135 * (called by wv_hw_config())
3136 */
3137static int
3138wv_mmc_init(struct net_device * dev)
3139{
3140 unsigned int base = dev->base_addr;
3141 psa_t psa;
3142 mmw_t m;
3143 int configured;
3144 int i; /* Loop counter */
3145
3146#ifdef DEBUG_CONFIG_TRACE
3147 printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name);
3148#endif
3149
3150 /* Read the parameter storage area */
3151 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
3152
3153 /*
3154 * Check the first three octets of the MAC addr for the manufacturer's code.
3155 * Note: If you get the error message below, you've got a
3156 * non-NCR/AT&T/Lucent PCMCIA cards, see wavelan_cs.h for detail on
3157 * how to configure your card...
3158 */
3159 for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++)
3160 if ((psa.psa_univ_mac_addr[0] == MAC_ADDRESSES[i][0]) &&
3161 (psa.psa_univ_mac_addr[1] == MAC_ADDRESSES[i][1]) &&
3162 (psa.psa_univ_mac_addr[2] == MAC_ADDRESSES[i][2]))
3163 break;
3164
3165 /* If we have not found it... */
3166 if (i == ARRAY_SIZE(MAC_ADDRESSES))
3167 {
3168#ifdef DEBUG_CONFIG_ERRORS
3169 printk(KERN_WARNING "%s: wv_mmc_init(): Invalid MAC address: %02X:%02X:%02X:...\n",
3170 dev->name, psa.psa_univ_mac_addr[0],
3171 psa.psa_univ_mac_addr[1], psa.psa_univ_mac_addr[2]);
3172#endif
3173 return FALSE;
3174 }
3175
3176 /* Get the MAC address */
3177 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
3178
3179#ifdef USE_PSA_CONFIG
3180 configured = psa.psa_conf_status & 1;
3181#else
3182 configured = 0;
3183#endif
3184
3185 /* Is the PSA is not configured */
3186 if(!configured)
3187 {
3188 /* User will be able to configure NWID after (with iwconfig) */
3189 psa.psa_nwid[0] = 0;
3190 psa.psa_nwid[1] = 0;
3191
3192 /* As NWID is not set : no NWID checking */
3193 psa.psa_nwid_select = 0;
3194
3195 /* Disable encryption */
3196 psa.psa_encryption_select = 0;
3197
3198 /* Set to standard values
3199 * 0x04 for AT,
3200 * 0x01 for MCA,
3201 * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document)
3202 */
3203 if (psa.psa_comp_number & 1)
3204 psa.psa_thr_pre_set = 0x01;
3205 else
3206 psa.psa_thr_pre_set = 0x04;
3207 psa.psa_quality_thr = 0x03;
3208
3209 /* It is configured */
3210 psa.psa_conf_status |= 1;
3211
3212#ifdef USE_PSA_CONFIG
3213 /* Write the psa */
3214 psa_write(dev, (char *)psa.psa_nwid - (char *)&psa,
3215 (unsigned char *)psa.psa_nwid, 4);
3216 psa_write(dev, (char *)&psa.psa_thr_pre_set - (char *)&psa,
3217 (unsigned char *)&psa.psa_thr_pre_set, 1);
3218 psa_write(dev, (char *)&psa.psa_quality_thr - (char *)&psa,
3219 (unsigned char *)&psa.psa_quality_thr, 1);
3220 psa_write(dev, (char *)&psa.psa_conf_status - (char *)&psa,
3221 (unsigned char *)&psa.psa_conf_status, 1);
3222 /* update the Wavelan checksum */
3223 update_psa_checksum(dev);
3224#endif /* USE_PSA_CONFIG */
3225 }
3226
3227 /* Zero the mmc structure */
3228 memset(&m, 0x00, sizeof(m));
3229
3230 /* Copy PSA info to the mmc */
3231 m.mmw_netw_id_l = psa.psa_nwid[1];
3232 m.mmw_netw_id_h = psa.psa_nwid[0];
3233
3234 if(psa.psa_nwid_select & 1)
3235 m.mmw_loopt_sel = 0x00;
3236 else
3237 m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID;
3238
3239 memcpy(&m.mmw_encr_key, &psa.psa_encryption_key,
3240 sizeof(m.mmw_encr_key));
3241
3242 if(psa.psa_encryption_select)
3243 m.mmw_encr_enable = MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE;
3244 else
3245 m.mmw_encr_enable = 0;
3246
3247 m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F;
3248 m.mmw_quality_thr = psa.psa_quality_thr & 0x0F;
3249
3250 /*
3251 * Set default modem control parameters.
3252 * See NCR document 407-0024326 Rev. A.
3253 */
3254 m.mmw_jabber_enable = 0x01;
3255 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
3256 m.mmw_ifs = 0x20;
3257 m.mmw_mod_delay = 0x04;
3258 m.mmw_jam_time = 0x38;
3259
3260 m.mmw_des_io_invert = 0;
3261 m.mmw_freeze = 0;
3262 m.mmw_decay_prm = 0;
3263 m.mmw_decay_updat_prm = 0;
3264
3265 /* Write all info to mmc */
3266 mmc_write(base, 0, (u_char *)&m, sizeof(m));
3267
3268 /* The following code start the modem of the 2.00 frequency
3269 * selectable cards at power on. It's not strictly needed for the
3270 * following boots...
3271 * The original patch was by Joe Finney for the PCMCIA driver, but
3272 * I've cleaned it a bit and add documentation.
3273 * Thanks to Loeke Brederveld from Lucent for the info.
3274 */
3275
3276 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable)
3277 * (does it work for everybody ? - especially old cards...) */
3278 /* Note : WFREQSEL verify that it is able to read from EEprom
3279 * a sensible frequency (address 0x00) + that MMR_FEE_STATUS_ID
3280 * is 0xA (Xilinx version) or 0xB (Ariadne version).
3281 * My test is more crude but do work... */
3282 if(!(mmc_in(base, mmroff(0, mmr_fee_status)) &
3283 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
3284 {
3285 /* We must download the frequency parameters to the
3286 * synthetisers (from the EEprom - area 1)
3287 * Note : as the EEprom is auto decremented, we set the end
3288 * if the area... */
3289 m.mmw_fee_addr = 0x0F;
3290 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3291 mmc_write(base, (char *)&m.mmw_fee_ctrl - (char *)&m,
3292 (unsigned char *)&m.mmw_fee_ctrl, 2);
3293
3294 /* Wait until the download is finished */
3295 fee_wait(base, 100, 100);
3296
3297#ifdef DEBUG_CONFIG_INFO
3298 /* The frequency was in the last word downloaded... */
3299 mmc_read(base, (char *)&m.mmw_fee_data_l - (char *)&m,
3300 (unsigned char *)&m.mmw_fee_data_l, 2);
3301
3302 /* Print some info for the user */
3303 printk(KERN_DEBUG "%s: Wavelan 2.00 recognised (frequency select) : Current frequency = %ld\n",
3304 dev->name,
3305 ((m.mmw_fee_data_h << 4) |
3306 (m.mmw_fee_data_l >> 4)) * 5 / 2 + 24000L);
3307#endif
3308
3309 /* We must now download the power adjust value (gain) to
3310 * the synthetisers (from the EEprom - area 7 - DAC) */
3311 m.mmw_fee_addr = 0x61;
3312 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3313 mmc_write(base, (char *)&m.mmw_fee_ctrl - (char *)&m,
3314 (unsigned char *)&m.mmw_fee_ctrl, 2);
3315
3316 /* Wait until the download is finished */
3317 } /* if 2.00 card */
3318
3319#ifdef DEBUG_CONFIG_TRACE
3320 printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name);
3321#endif
3322 return TRUE;
3323}
3324
3325/*------------------------------------------------------------------*/
3326/*
3327 * Routine to gracefully turn off reception, and wait for any commands
3328 * to complete.
3329 * (called in wv_ru_start() and wavelan_close() and wavelan_event())
3330 */
3331static int
3332wv_ru_stop(struct net_device * dev)
3333{
3334 unsigned int base = dev->base_addr;
3335 net_local * lp = netdev_priv(dev);
3336 unsigned long flags;
3337 int status;
3338 int spin;
3339
3340#ifdef DEBUG_CONFIG_TRACE
3341 printk(KERN_DEBUG "%s: ->wv_ru_stop()\n", dev->name);
3342#endif
3343
3344 spin_lock_irqsave(&lp->spinlock, flags);
3345
3346 /* First, send the LAN controller a stop receive command */
3347 wv_82593_cmd(dev, "wv_graceful_shutdown(): stop-rcv",
3348 OP0_STOP_RCV, SR0_NO_RESULT);
3349
3350 /* Then, spin until the receive unit goes idle */
3351 spin = 300;
3352 do
3353 {
3354 udelay(10);
3355 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
3356 status = inb(LCSR(base));
3357 }
3358 while(((status & SR3_RCV_STATE_MASK) != SR3_RCV_IDLE) && (spin-- > 0));
3359
3360 /* Now, spin until the chip finishes executing its current command */
3361 do
3362 {
3363 udelay(10);
3364 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
3365 status = inb(LCSR(base));
3366 }
3367 while(((status & SR3_EXEC_STATE_MASK) != SR3_EXEC_IDLE) && (spin-- > 0));
3368
3369 spin_unlock_irqrestore(&lp->spinlock, flags);
3370
3371 /* If there was a problem */
3372 if(spin <= 0)
3373 {
3374#ifdef DEBUG_CONFIG_ERRORS
3375 printk(KERN_INFO "%s: wv_ru_stop(): The chip doesn't want to stop...\n",
3376 dev->name);
3377#endif
3378 return FALSE;
3379 }
3380
3381#ifdef DEBUG_CONFIG_TRACE
3382 printk(KERN_DEBUG "%s: <-wv_ru_stop()\n", dev->name);
3383#endif
3384 return TRUE;
3385} /* wv_ru_stop */
3386
3387/*------------------------------------------------------------------*/
3388/*
3389 * This routine starts the receive unit running. First, it checks if
3390 * the card is actually ready. Then the card is instructed to receive
3391 * packets again.
3392 * (called in wv_hw_reset() & wavelan_open())
3393 */
3394static int
3395wv_ru_start(struct net_device * dev)
3396{
3397 unsigned int base = dev->base_addr;
3398 net_local * lp = netdev_priv(dev);
3399 unsigned long flags;
3400
3401#ifdef DEBUG_CONFIG_TRACE
3402 printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name);
3403#endif
3404
3405 /*
3406 * We need to start from a quiescent state. To do so, we could check
3407 * if the card is already running, but instead we just try to shut
3408 * it down. First, we disable reception (in case it was already enabled).
3409 */
3410 if(!wv_ru_stop(dev))
3411 return FALSE;
3412
3413 spin_lock_irqsave(&lp->spinlock, flags);
3414
3415 /* Now we know that no command is being executed. */
3416
3417 /* Set the receive frame pointer and stop pointer */
3418 lp->rfp = 0;
3419 outb(OP0_SWIT_TO_PORT_1 | CR0_CHNL, LCCR(base));
3420
3421 /* Reset ring management. This sets the receive frame pointer to 1 */
3422 outb(OP1_RESET_RING_MNGMT, LCCR(base));
3423
3424#if 0
3425 /* XXX the i82593 manual page 6-4 seems to indicate that the stop register
3426 should be set as below */
3427 /* outb(CR1_STOP_REG_UPDATE|((RX_SIZE - 0x40)>> RX_SIZE_SHIFT),LCCR(base));*/
3428#elif 0
3429 /* but I set it 0 instead */
3430 lp->stop = 0;
3431#else
3432 /* but I set it to 3 bytes per packet less than 8K */
3433 lp->stop = (0 + RX_SIZE - ((RX_SIZE / 64) * 3)) % RX_SIZE;
3434#endif
3435 outb(CR1_STOP_REG_UPDATE | (lp->stop >> RX_SIZE_SHIFT), LCCR(base));
3436 outb(OP1_INT_ENABLE, LCCR(base));
3437 outb(OP1_SWIT_TO_PORT_0, LCCR(base));
3438
3439 /* Reset receive DMA pointer */
3440 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3441 hacr_write_slow(base, HACR_DEFAULT);
3442
3443 /* Receive DMA on channel 1 */
3444 wv_82593_cmd(dev, "wv_ru_start(): rcv-enable",
3445 CR0_CHNL | OP0_RCV_ENABLE, SR0_NO_RESULT);
3446
3447#ifdef DEBUG_I82593_SHOW
3448 {
3449 int status;
3450 int opri;
3451 int spin = 10000;
3452
3453 /* spin until the chip starts receiving */
3454 do
3455 {
3456 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
3457 status = inb(LCSR(base));
3458 if(spin-- <= 0)
3459 break;
3460 }
3461 while(((status & SR3_RCV_STATE_MASK) != SR3_RCV_ACTIVE) &&
3462 ((status & SR3_RCV_STATE_MASK) != SR3_RCV_READY));
3463 printk(KERN_DEBUG "rcv status is 0x%x [i:%d]\n",
3464 (status & SR3_RCV_STATE_MASK), i);
3465 }
3466#endif
3467
3468 spin_unlock_irqrestore(&lp->spinlock, flags);
3469
3470#ifdef DEBUG_CONFIG_TRACE
3471 printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name);
3472#endif
3473 return TRUE;
3474}
3475
3476/*------------------------------------------------------------------*/
3477/*
3478 * This routine does a standard config of the WaveLAN controller (i82593).
3479 * In the ISA driver, this is integrated in wavelan_hardware_reset()
3480 * (called by wv_hw_config(), wv_82593_reconfig() & wavelan_packet_xmit())
3481 */
3482static int
3483wv_82593_config(struct net_device * dev)
3484{
3485 unsigned int base = dev->base_addr;
3486 net_local * lp = netdev_priv(dev);
3487 struct i82593_conf_block cfblk;
3488 int ret = TRUE;
3489
3490#ifdef DEBUG_CONFIG_TRACE
3491 printk(KERN_DEBUG "%s: ->wv_82593_config()\n", dev->name);
3492#endif
3493
3494 /* Create & fill i82593 config block
3495 *
3496 * Now conform to Wavelan document WCIN085B
3497 */
3498 memset(&cfblk, 0x00, sizeof(struct i82593_conf_block));
3499 cfblk.d6mod = FALSE; /* Run in i82593 advanced mode */
3500 cfblk.fifo_limit = 5; /* = 56 B rx and 40 B tx fifo thresholds */
3501 cfblk.forgnesi = FALSE; /* 0=82C501, 1=AMD7992B compatibility */
3502 cfblk.fifo_32 = 1;
3503 cfblk.throttle_enb = FALSE;
3504 cfblk.contin = TRUE; /* enable continuous mode */
3505 cfblk.cntrxint = FALSE; /* enable continuous mode receive interrupts */
3506 cfblk.addr_len = WAVELAN_ADDR_SIZE;
3507 cfblk.acloc = TRUE; /* Disable source addr insertion by i82593 */
3508 cfblk.preamb_len = 0; /* 2 bytes preamble (SFD) */
3509 cfblk.loopback = FALSE;
3510 cfblk.lin_prio = 0; /* conform to 802.3 backoff algorithm */
3511 cfblk.exp_prio = 5; /* conform to 802.3 backoff algorithm */
3512 cfblk.bof_met = 1; /* conform to 802.3 backoff algorithm */
3513 cfblk.ifrm_spc = 0x20 >> 4; /* 32 bit times interframe spacing */
3514 cfblk.slottim_low = 0x20 >> 5; /* 32 bit times slot time */
3515 cfblk.slottim_hi = 0x0;
3516 cfblk.max_retr = 15;
3517 cfblk.prmisc = ((lp->promiscuous) ? TRUE: FALSE); /* Promiscuous mode */
3518 cfblk.bc_dis = FALSE; /* Enable broadcast reception */
3519 cfblk.crs_1 = TRUE; /* Transmit without carrier sense */
3520 cfblk.nocrc_ins = FALSE; /* i82593 generates CRC */
3521 cfblk.crc_1632 = FALSE; /* 32-bit Autodin-II CRC */
3522 cfblk.crs_cdt = FALSE; /* CD not to be interpreted as CS */
3523 cfblk.cs_filter = 0; /* CS is recognized immediately */
3524 cfblk.crs_src = FALSE; /* External carrier sense */
3525 cfblk.cd_filter = 0; /* CD is recognized immediately */
3526 cfblk.min_fr_len = ETH_ZLEN >> 2; /* Minimum frame length 64 bytes */
3527 cfblk.lng_typ = FALSE; /* Length field > 1500 = type field */
3528 cfblk.lng_fld = TRUE; /* Disable 802.3 length field check */
3529 cfblk.rxcrc_xf = TRUE; /* Don't transfer CRC to memory */
3530 cfblk.artx = TRUE; /* Disable automatic retransmission */
3531 cfblk.sarec = TRUE; /* Disable source addr trig of CD */
3532 cfblk.tx_jabber = TRUE; /* Disable jabber jam sequence */
3533 cfblk.hash_1 = FALSE; /* Use bits 0-5 in mc address hash */
3534 cfblk.lbpkpol = TRUE; /* Loopback pin active high */
3535 cfblk.fdx = FALSE; /* Disable full duplex operation */
3536 cfblk.dummy_6 = 0x3f; /* all ones */
3537 cfblk.mult_ia = FALSE; /* No multiple individual addresses */
3538 cfblk.dis_bof = FALSE; /* Disable the backoff algorithm ?! */
3539 cfblk.dummy_1 = TRUE; /* set to 1 */
3540 cfblk.tx_ifs_retrig = 3; /* Hmm... Disabled */
3541#ifdef MULTICAST_ALL
3542 cfblk.mc_all = (lp->allmulticast ? TRUE: FALSE); /* Allow all multicasts */
3543#else
3544 cfblk.mc_all = FALSE; /* No multicast all mode */
3545#endif
3546 cfblk.rcv_mon = 0; /* Monitor mode disabled */
3547 cfblk.frag_acpt = TRUE; /* Do not accept fragments */
3548 cfblk.tstrttrs = FALSE; /* No start transmission threshold */
3549 cfblk.fretx = TRUE; /* FIFO automatic retransmission */
3550 cfblk.syncrqs = FALSE; /* Synchronous DRQ deassertion... */
3551 cfblk.sttlen = TRUE; /* 6 byte status registers */
3552 cfblk.rx_eop = TRUE; /* Signal EOP on packet reception */
3553 cfblk.tx_eop = TRUE; /* Signal EOP on packet transmission */
3554 cfblk.rbuf_size = RX_SIZE>>11; /* Set receive buffer size */
3555 cfblk.rcvstop = TRUE; /* Enable Receive Stop Register */
3556
3557#ifdef DEBUG_I82593_SHOW
3558 print_hex_dump(KERN_DEBUG, "wavelan_cs: config block: ", DUMP_PREFIX_NONE,
3559 16, 1, &cfblk, sizeof(struct i82593_conf_block), false);
3560#endif
3561
3562 /* Copy the config block to the i82593 */
3563 outb(TX_BASE & 0xff, PIORL(base));
3564 outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3565 outb(sizeof(struct i82593_conf_block) & 0xff, PIOP(base)); /* lsb */
3566 outb(sizeof(struct i82593_conf_block) >> 8, PIOP(base)); /* msb */
3567 outsb(PIOP(base), (char *) &cfblk, sizeof(struct i82593_conf_block));
3568
3569 /* reset transmit DMA pointer */
3570 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3571 hacr_write(base, HACR_DEFAULT);
3572 if(!wv_82593_cmd(dev, "wv_82593_config(): configure",
3573 OP0_CONFIGURE, SR0_CONFIGURE_DONE))
3574 ret = FALSE;
3575
3576 /* Initialize adapter's ethernet MAC address */
3577 outb(TX_BASE & 0xff, PIORL(base));
3578 outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3579 outb(WAVELAN_ADDR_SIZE, PIOP(base)); /* byte count lsb */
3580 outb(0, PIOP(base)); /* byte count msb */
3581 outsb(PIOP(base), &dev->dev_addr[0], WAVELAN_ADDR_SIZE);
3582
3583 /* reset transmit DMA pointer */
3584 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3585 hacr_write(base, HACR_DEFAULT);
3586 if(!wv_82593_cmd(dev, "wv_82593_config(): ia-setup",
3587 OP0_IA_SETUP, SR0_IA_SETUP_DONE))
3588 ret = FALSE;
3589
3590#ifdef WAVELAN_ROAMING
3591 /* If roaming is enabled, join the "Beacon Request" multicast group... */
3592 /* But only if it's not in there already! */
3593 if(do_roaming)
3594 dev_mc_add(dev, WAVELAN_BEACON_ADDRESS);
3595#endif /* WAVELAN_ROAMING */
3596
3597 /* If any multicast address to set */
3598 if(lp->mc_count)
3599 {
3600 struct netdev_hw_addr *ha;
3601 int addrs_len = WAVELAN_ADDR_SIZE * lp->mc_count;
3602
3603#ifdef DEBUG_CONFIG_INFO
3604 printk(KERN_DEBUG "%s: wv_hw_config(): set %d multicast addresses:\n",
3605 dev->name, lp->mc_count);
3606 netdev_for_each_mc_addr(ha, dev)
3607 printk(KERN_DEBUG " %pM\n", ha->addr);
3608#endif
3609
3610 /* Initialize adapter's ethernet multicast addresses */
3611 outb(TX_BASE & 0xff, PIORL(base));
3612 outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3613 outb(addrs_len & 0xff, PIOP(base)); /* byte count lsb */
3614 outb((addrs_len >> 8), PIOP(base)); /* byte count msb */
3615 netdev_for_each_mc_addr(ha, dev)
3616 outsb(PIOP(base), ha->addr, dev->addr_len);
3617
3618 /* reset transmit DMA pointer */
3619 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3620 hacr_write(base, HACR_DEFAULT);
3621 if(!wv_82593_cmd(dev, "wv_82593_config(): mc-setup",
3622 OP0_MC_SETUP, SR0_MC_SETUP_DONE))
3623 ret = FALSE;
3624 /* remember to avoid repeated reset */
3625 lp->mc_count = netdev_mc_count(dev);
3626 }
3627
3628 /* Job done, clear the flag */
3629 lp->reconfig_82593 = FALSE;
3630
3631#ifdef DEBUG_CONFIG_TRACE
3632 printk(KERN_DEBUG "%s: <-wv_82593_config()\n", dev->name);
3633#endif
3634 return(ret);
3635}
3636
3637/*------------------------------------------------------------------*/
3638/*
3639 * Read the Access Configuration Register, perform a software reset,
3640 * and then re-enable the card's software.
3641 *
3642 * If I understand correctly : reset the pcmcia interface of the
3643 * wavelan.
3644 * (called by wv_config())
3645 */
3646static int
3647wv_pcmcia_reset(struct net_device * dev)
3648{
3649 int i;
3650 conf_reg_t reg = { 0, CS_READ, CISREG_COR, 0 };
3651 struct pcmcia_device * link = ((net_local *)netdev_priv(dev))->link;
3652
3653#ifdef DEBUG_CONFIG_TRACE
3654 printk(KERN_DEBUG "%s: ->wv_pcmcia_reset()\n", dev->name);
3655#endif
3656
3657 i = pcmcia_access_configuration_register(link, &reg);
3658 if (i != 0)
3659 return FALSE;
3660
3661#ifdef DEBUG_CONFIG_INFO
3662 printk(KERN_DEBUG "%s: wavelan_pcmcia_reset(): Config reg is 0x%x\n",
3663 dev->name, (u_int) reg.Value);
3664#endif
3665
3666 reg.Action = CS_WRITE;
3667 reg.Value = reg.Value | COR_SW_RESET;
3668 i = pcmcia_access_configuration_register(link, &reg);
3669 if (i != 0)
3670 return FALSE;
3671
3672 reg.Action = CS_WRITE;
3673 reg.Value = COR_LEVEL_IRQ | COR_CONFIG;
3674 i = pcmcia_access_configuration_register(link, &reg);
3675 if (i != 0)
3676 return FALSE;
3677
3678#ifdef DEBUG_CONFIG_TRACE
3679 printk(KERN_DEBUG "%s: <-wv_pcmcia_reset()\n", dev->name);
3680#endif
3681 return TRUE;
3682}
3683
3684/*------------------------------------------------------------------*/
3685/*
3686 * wavelan_hw_config() is called after a CARD_INSERTION event is
3687 * received, to configure the wavelan hardware.
3688 * Note that the reception will be enabled in wavelan->open(), so the
3689 * device is configured but idle...
3690 * Performs the following actions:
3691 * 1. A pcmcia software reset (using wv_pcmcia_reset())
3692 * 2. A power reset (reset DMA)
3693 * 3. Reset the LAN controller
3694 * 4. Initialize the radio modem (using wv_mmc_init)
3695 * 5. Configure LAN controller (using wv_82593_config)
3696 * 6. Perform a diagnostic on the LAN controller
3697 * (called by wavelan_event() & wv_hw_reset())
3698 */
3699static int
3700wv_hw_config(struct net_device * dev)
3701{
3702 net_local * lp = netdev_priv(dev);
3703 unsigned int base = dev->base_addr;
3704 unsigned long flags;
3705 int ret = FALSE;
3706
3707#ifdef DEBUG_CONFIG_TRACE
3708 printk(KERN_DEBUG "%s: ->wv_hw_config()\n", dev->name);
3709#endif
3710
3711 /* compile-time check the sizes of structures */
3712 BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE);
3713 BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE);
3714 BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE);
3715
3716 /* Reset the pcmcia interface */
3717 if(wv_pcmcia_reset(dev) == FALSE)
3718 return FALSE;
3719
3720 /* Disable interrupts */
3721 spin_lock_irqsave(&lp->spinlock, flags);
3722
3723 /* Disguised goto ;-) */
3724 do
3725 {
3726 /* Power UP the module + reset the modem + reset host adapter
3727 * (in fact, reset DMA channels) */
3728 hacr_write_slow(base, HACR_RESET);
3729 hacr_write(base, HACR_DEFAULT);
3730
3731 /* Check if the module has been powered up... */
3732 if(hasr_read(base) & HASR_NO_CLK)
3733 {
3734#ifdef DEBUG_CONFIG_ERRORS
3735 printk(KERN_WARNING "%s: wv_hw_config(): modem not connected or not a wavelan card\n",
3736 dev->name);
3737#endif
3738 break;
3739 }
3740
3741 /* initialize the modem */
3742 if(wv_mmc_init(dev) == FALSE)
3743 {
3744#ifdef DEBUG_CONFIG_ERRORS
3745 printk(KERN_WARNING "%s: wv_hw_config(): Can't configure the modem\n",
3746 dev->name);
3747#endif
3748 break;
3749 }
3750
3751 /* reset the LAN controller (i82593) */
3752 outb(OP0_RESET, LCCR(base));
3753 mdelay(1); /* A bit crude ! */
3754
3755 /* Initialize the LAN controller */
3756 if(wv_82593_config(dev) == FALSE)
3757 {
3758#ifdef DEBUG_CONFIG_ERRORS
3759 printk(KERN_INFO "%s: wv_hw_config(): i82593 init failed\n",
3760 dev->name);
3761#endif
3762 break;
3763 }
3764
3765 /* Diagnostic */
3766 if(wv_diag(dev) == FALSE)
3767 {
3768#ifdef DEBUG_CONFIG_ERRORS
3769 printk(KERN_INFO "%s: wv_hw_config(): i82593 diagnostic failed\n",
3770 dev->name);
3771#endif
3772 break;
3773 }
3774
3775 /*
3776 * insert code for loopback test here
3777 */
3778
3779 /* The device is now configured */
3780 lp->configured = 1;
3781 ret = TRUE;
3782 }
3783 while(0);
3784
3785 /* Re-enable interrupts */
3786 spin_unlock_irqrestore(&lp->spinlock, flags);
3787
3788#ifdef DEBUG_CONFIG_TRACE
3789 printk(KERN_DEBUG "%s: <-wv_hw_config()\n", dev->name);
3790#endif
3791 return(ret);
3792}
3793
3794/*------------------------------------------------------------------*/
3795/*
3796 * Totally reset the wavelan and restart it.
3797 * Performs the following actions:
3798 * 1. Call wv_hw_config()
3799 * 2. Start the LAN controller's receive unit
3800 * (called by wavelan_event(), wavelan_watchdog() and wavelan_open())
3801 */
3802static void
3803wv_hw_reset(struct net_device * dev)
3804{
3805 net_local * lp = netdev_priv(dev);
3806
3807#ifdef DEBUG_CONFIG_TRACE
3808 printk(KERN_DEBUG "%s: ->wv_hw_reset()\n", dev->name);
3809#endif
3810
3811 lp->nresets++;
3812 lp->configured = 0;
3813
3814 /* Call wv_hw_config() for most of the reset & init stuff */
3815 if(wv_hw_config(dev) == FALSE)
3816 return;
3817
3818 /* start receive unit */
3819 wv_ru_start(dev);
3820
3821#ifdef DEBUG_CONFIG_TRACE
3822 printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name);
3823#endif
3824}
3825
3826/*------------------------------------------------------------------*/
3827/*
3828 * wv_pcmcia_config() is called after a CARD_INSERTION event is
3829 * received, to configure the PCMCIA socket, and to make the ethernet
3830 * device available to the system.
3831 * (called by wavelan_event())
3832 */
3833static int
3834wv_pcmcia_config(struct pcmcia_device * link)
3835{
3836 struct net_device * dev = (struct net_device *) link->priv;
3837 int i;
3838 win_req_t req;
3839 memreq_t mem;
3840 net_local * lp = netdev_priv(dev);
3841
3842
3843#ifdef DEBUG_CONFIG_TRACE
3844 printk(KERN_DEBUG "->wv_pcmcia_config(0x%p)\n", link);
3845#endif
3846
3847 do
3848 {
3849 i = pcmcia_request_io(link, &link->io);
3850 if (i != 0)
3851 break;
3852
3853 i = pcmcia_request_interrupt(link, wavelan_interrupt);
3854 if (!i)
3855 break;
3856
3857 /*
3858 * This actually configures the PCMCIA socket -- setting up
3859 * the I/O windows and the interrupt mapping.
3860 */
3861 link->conf.ConfigIndex = 1;
3862 i = pcmcia_request_configuration(link, &link->conf);
3863 if (i != 0)
3864 break;
3865
3866 /*
3867 * Allocate a small memory window. Note that the struct pcmcia_device
3868 * structure provides space for one window handle -- if your
3869 * device needs several windows, you'll need to keep track of
3870 * the handles in your private data structure, link->priv.
3871 */
3872 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
3873 req.Base = req.Size = 0;
3874 req.AccessSpeed = mem_speed;
3875 i = pcmcia_request_window(link, &req, &link->win);
3876 if (i != 0)
3877 break;
3878
3879 lp->mem = ioremap(req.Base, req.Size);
3880 dev->mem_start = (u_long)lp->mem;
3881 dev->mem_end = dev->mem_start + req.Size;
3882
3883 mem.CardOffset = 0; mem.Page = 0;
3884 i = pcmcia_map_mem_page(link, link->win, &mem);
3885 if (i != 0)
3886 break;
3887
3888 /* Feed device with this info... */
3889 dev->irq = link->irq;
3890 dev->base_addr = link->io.BasePort1;
3891 netif_start_queue(dev);
3892
3893#ifdef DEBUG_CONFIG_INFO
3894 printk(KERN_DEBUG "wv_pcmcia_config: MEMSTART %p IRQ %d IOPORT 0x%x\n",
3895 lp->mem, dev->irq, (u_int) dev->base_addr);
3896#endif
3897
3898 SET_NETDEV_DEV(dev, &link->dev);
3899 i = register_netdev(dev);
3900 if(i != 0)
3901 {
3902#ifdef DEBUG_CONFIG_ERRORS
3903 printk(KERN_INFO "wv_pcmcia_config(): register_netdev() failed\n");
3904#endif
3905 break;
3906 }
3907 }
3908 while(0); /* Humm... Disguised goto !!! */
3909
3910 /* If any step failed, release any partially configured state */
3911 if(i != 0)
3912 {
3913 wv_pcmcia_release(link);
3914 return FALSE;
3915 }
3916
3917 strcpy(((net_local *) netdev_priv(dev))->node.dev_name, dev->name);
3918 link->dev_node = &((net_local *) netdev_priv(dev))->node;
3919
3920#ifdef DEBUG_CONFIG_TRACE
3921 printk(KERN_DEBUG "<-wv_pcmcia_config()\n");
3922#endif
3923 return TRUE;
3924}
3925
3926/*------------------------------------------------------------------*/
3927/*
3928 * After a card is removed, wv_pcmcia_release() will unregister the net
3929 * device, and release the PCMCIA configuration. If the device is
3930 * still open, this will be postponed until it is closed.
3931 */
3932static void
3933wv_pcmcia_release(struct pcmcia_device *link)
3934{
3935 struct net_device * dev = (struct net_device *) link->priv;
3936 net_local * lp = netdev_priv(dev);
3937
3938#ifdef DEBUG_CONFIG_TRACE
3939 printk(KERN_DEBUG "%s: -> wv_pcmcia_release(0x%p)\n", dev->name, link);
3940#endif
3941
3942 iounmap(lp->mem);
3943 pcmcia_disable_device(link);
3944
3945#ifdef DEBUG_CONFIG_TRACE
3946 printk(KERN_DEBUG "%s: <- wv_pcmcia_release()\n", dev->name);
3947#endif
3948}
3949
3950/************************ INTERRUPT HANDLING ************************/
3951
3952/*
3953 * This function is the interrupt handler for the WaveLAN card. This
3954 * routine will be called whenever:
3955 * 1. A packet is received.
3956 * 2. A packet has successfully been transferred and the unit is
3957 * ready to transmit another packet.
3958 * 3. A command has completed execution.
3959 */
3960static irqreturn_t
3961wavelan_interrupt(int irq,
3962 void * dev_id)
3963{
3964 struct net_device * dev = dev_id;
3965 net_local * lp;
3966 unsigned int base;
3967 int status0;
3968 u_int tx_status;
3969
3970#ifdef DEBUG_INTERRUPT_TRACE
3971 printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name);
3972#endif
3973
3974 lp = netdev_priv(dev);
3975 base = dev->base_addr;
3976
3977#ifdef DEBUG_INTERRUPT_INFO
3978 /* Check state of our spinlock (it should be cleared) */
3979 if(spin_is_locked(&lp->spinlock))
3980 printk(KERN_DEBUG
3981 "%s: wavelan_interrupt(): spinlock is already locked !!!\n",
3982 dev->name);
3983#endif
3984
3985 /* Prevent reentrancy. We need to do that because we may have
3986 * multiple interrupt handler running concurrently.
3987 * It is safe because interrupts are disabled before aquiring
3988 * the spinlock. */
3989 spin_lock(&lp->spinlock);
3990
3991 /* Treat all pending interrupts */
3992 while(1)
3993 {
3994 /* ---------------- INTERRUPT CHECKING ---------------- */
3995 /*
3996 * Look for the interrupt and verify the validity
3997 */
3998 outb(CR0_STATUS_0 | OP0_NOP, LCCR(base));
3999 status0 = inb(LCSR(base));
4000
4001#ifdef DEBUG_INTERRUPT_INFO
4002 printk(KERN_DEBUG "status0 0x%x [%s => 0x%x]", status0,
4003 (status0&SR0_INTERRUPT)?"int":"no int",status0&~SR0_INTERRUPT);
4004 if(status0&SR0_INTERRUPT)
4005 {
4006 printk(" [%s => %d]\n", (status0 & SR0_CHNL) ? "chnl" :
4007 ((status0 & SR0_EXECUTION) ? "cmd" :
4008 ((status0 & SR0_RECEPTION) ? "recv" : "unknown")),
4009 (status0 & SR0_EVENT_MASK));
4010 }
4011 else
4012 printk("\n");
4013#endif
4014
4015 /* Return if no actual interrupt from i82593 (normal exit) */
4016 if(!(status0 & SR0_INTERRUPT))
4017 break;
4018
4019 /* If interrupt is both Rx and Tx or none...
4020 * This code in fact is there to catch the spurious interrupt
4021 * when you remove the wavelan pcmcia card from the socket */
4022 if(((status0 & SR0_BOTH_RX_TX) == SR0_BOTH_RX_TX) ||
4023 ((status0 & SR0_BOTH_RX_TX) == 0x0))
4024 {
4025#ifdef DEBUG_INTERRUPT_INFO
4026 printk(KERN_INFO "%s: wv_interrupt(): bogus interrupt (or from dead card) : %X\n",
4027 dev->name, status0);
4028#endif
4029 /* Acknowledge the interrupt */
4030 outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
4031 break;
4032 }
4033
4034 /* ----------------- RECEIVING PACKET ----------------- */
4035 /*
4036 * When the wavelan signal the reception of a new packet,
4037 * we call wv_packet_rcv() to copy if from the buffer and
4038 * send it to NET3
4039 */
4040 if(status0 & SR0_RECEPTION)
4041 {
4042#ifdef DEBUG_INTERRUPT_INFO
4043 printk(KERN_DEBUG "%s: wv_interrupt(): receive\n", dev->name);
4044#endif
4045
4046 if((status0 & SR0_EVENT_MASK) == SR0_STOP_REG_HIT)
4047 {
4048#ifdef DEBUG_INTERRUPT_ERROR
4049 printk(KERN_INFO "%s: wv_interrupt(): receive buffer overflow\n",
4050 dev->name);
4051#endif
4052 dev->stats.rx_over_errors++;
4053 lp->overrunning = 1;
4054 }
4055
4056 /* Get the packet */
4057 wv_packet_rcv(dev);
4058 lp->overrunning = 0;
4059
4060 /* Acknowledge the interrupt */
4061 outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
4062 continue;
4063 }
4064
4065 /* ---------------- COMMAND COMPLETION ---------------- */
4066 /*
4067 * Interrupts issued when the i82593 has completed a command.
4068 * Most likely : transmission done
4069 */
4070
4071 /* If a transmission has been done */
4072 if((status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_DONE ||
4073 (status0 & SR0_EVENT_MASK) == SR0_RETRANSMIT_DONE ||
4074 (status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_NO_CRC_DONE)
4075 {
4076#ifdef DEBUG_TX_ERROR
4077 if((status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_NO_CRC_DONE)
4078 printk(KERN_INFO "%s: wv_interrupt(): packet transmitted without CRC.\n",
4079 dev->name);
4080#endif
4081
4082 /* Get transmission status */
4083 tx_status = inb(LCSR(base));
4084 tx_status |= (inb(LCSR(base)) << 8);
4085#ifdef DEBUG_INTERRUPT_INFO
4086 printk(KERN_DEBUG "%s: wv_interrupt(): transmission done\n",
4087 dev->name);
4088 {
4089 u_int rcv_bytes;
4090 u_char status3;
4091 rcv_bytes = inb(LCSR(base));
4092 rcv_bytes |= (inb(LCSR(base)) << 8);
4093 status3 = inb(LCSR(base));
4094 printk(KERN_DEBUG "tx_status 0x%02x rcv_bytes 0x%02x status3 0x%x\n",
4095 tx_status, rcv_bytes, (u_int) status3);
4096 }
4097#endif
4098 /* Check for possible errors */
4099 if((tx_status & TX_OK) != TX_OK)
4100 {
4101 dev->stats.tx_errors++;
4102
4103 if(tx_status & TX_FRTL)
4104 {
4105#ifdef DEBUG_TX_ERROR
4106 printk(KERN_INFO "%s: wv_interrupt(): frame too long\n",
4107 dev->name);
4108#endif
4109 }
4110 if(tx_status & TX_UND_RUN)
4111 {
4112#ifdef DEBUG_TX_FAIL
4113 printk(KERN_DEBUG "%s: wv_interrupt(): DMA underrun\n",
4114 dev->name);
4115#endif
4116 dev->stats.tx_aborted_errors++;
4117 }
4118 if(tx_status & TX_LOST_CTS)
4119 {
4120#ifdef DEBUG_TX_FAIL
4121 printk(KERN_DEBUG "%s: wv_interrupt(): no CTS\n", dev->name);
4122#endif
4123 dev->stats.tx_carrier_errors++;
4124 }
4125 if(tx_status & TX_LOST_CRS)
4126 {
4127#ifdef DEBUG_TX_FAIL
4128 printk(KERN_DEBUG "%s: wv_interrupt(): no carrier\n",
4129 dev->name);
4130#endif
4131 dev->stats.tx_carrier_errors++;
4132 }
4133 if(tx_status & TX_HRT_BEAT)
4134 {
4135#ifdef DEBUG_TX_FAIL
4136 printk(KERN_DEBUG "%s: wv_interrupt(): heart beat\n", dev->name);
4137#endif
4138 dev->stats.tx_heartbeat_errors++;
4139 }
4140 if(tx_status & TX_DEFER)
4141 {
4142#ifdef DEBUG_TX_FAIL
4143 printk(KERN_DEBUG "%s: wv_interrupt(): channel jammed\n",
4144 dev->name);
4145#endif
4146 }
4147 /* Ignore late collisions since they're more likely to happen
4148 * here (the WaveLAN design prevents the LAN controller from
4149 * receiving while it is transmitting). We take action only when
4150 * the maximum retransmit attempts is exceeded.
4151 */
4152 if(tx_status & TX_COLL)
4153 {
4154 if(tx_status & TX_MAX_COL)
4155 {
4156#ifdef DEBUG_TX_FAIL
4157 printk(KERN_DEBUG "%s: wv_interrupt(): channel congestion\n",
4158 dev->name);
4159#endif
4160 if(!(tx_status & TX_NCOL_MASK))
4161 {
4162 dev->stats.collisions += 0x10;
4163 }
4164 }
4165 }
4166 } /* if(!(tx_status & TX_OK)) */
4167
4168 dev->stats.collisions += (tx_status & TX_NCOL_MASK);
4169 dev->stats.tx_packets++;
4170
4171 netif_wake_queue(dev);
4172 outb(CR0_INT_ACK | OP0_NOP, LCCR(base)); /* Acknowledge the interrupt */
4173 }
4174 else /* if interrupt = transmit done or retransmit done */
4175 {
4176#ifdef DEBUG_INTERRUPT_ERROR
4177 printk(KERN_INFO "wavelan_cs: unknown interrupt, status0 = %02x\n",
4178 status0);
4179#endif
4180 outb(CR0_INT_ACK | OP0_NOP, LCCR(base)); /* Acknowledge the interrupt */
4181 }
4182 } /* while(1) */
4183
4184 spin_unlock(&lp->spinlock);
4185
4186#ifdef DEBUG_INTERRUPT_TRACE
4187 printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name);
4188#endif
4189
4190 /* We always return IRQ_HANDLED, because we will receive empty
4191 * interrupts under normal operations. Anyway, it doesn't matter
4192 * as we are dealing with an ISA interrupt that can't be shared.
4193 *
4194 * Explanation : under heavy receive, the following happens :
4195 * ->wavelan_interrupt()
4196 * (status0 & SR0_INTERRUPT) != 0
4197 * ->wv_packet_rcv()
4198 * (status0 & SR0_INTERRUPT) != 0
4199 * ->wv_packet_rcv()
4200 * (status0 & SR0_INTERRUPT) == 0 // i.e. no more event
4201 * <-wavelan_interrupt()
4202 * ->wavelan_interrupt()
4203 * (status0 & SR0_INTERRUPT) == 0 // i.e. empty interrupt
4204 * <-wavelan_interrupt()
4205 * Jean II */
4206 return IRQ_HANDLED;
4207} /* wv_interrupt */
4208
4209/*------------------------------------------------------------------*/
4210/*
4211 * Watchdog: when we start a transmission, a timer is set for us in the
4212 * kernel. If the transmission completes, this timer is disabled. If
4213 * the timer expires, we are called and we try to unlock the hardware.
4214 *
4215 * Note : This watchdog is move clever than the one in the ISA driver,
4216 * because it try to abort the current command before reseting
4217 * everything...
4218 * On the other hand, it's a bit simpler, because we don't have to
4219 * deal with the multiple Tx buffers...
4220 */
4221static void
4222wavelan_watchdog(struct net_device * dev)
4223{
4224 net_local * lp = netdev_priv(dev);
4225 unsigned int base = dev->base_addr;
4226 unsigned long flags;
4227 int aborted = FALSE;
4228
4229#ifdef DEBUG_INTERRUPT_TRACE
4230 printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name);
4231#endif
4232
4233#ifdef DEBUG_INTERRUPT_ERROR
4234 printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n",
4235 dev->name);
4236#endif
4237
4238 spin_lock_irqsave(&lp->spinlock, flags);
4239
4240 /* Ask to abort the current command */
4241 outb(OP0_ABORT, LCCR(base));
4242
4243 /* Wait for the end of the command (a bit hackish) */
4244 if(wv_82593_cmd(dev, "wavelan_watchdog(): abort",
4245 OP0_NOP | CR0_STATUS_3, SR0_EXECUTION_ABORTED))
4246 aborted = TRUE;
4247
4248 /* Release spinlock here so that wv_hw_reset() can grab it */
4249 spin_unlock_irqrestore(&lp->spinlock, flags);
4250
4251 /* Check if we were successful in aborting it */
4252 if(!aborted)
4253 {
4254 /* It seem that it wasn't enough */
4255#ifdef DEBUG_INTERRUPT_ERROR
4256 printk(KERN_INFO "%s: wavelan_watchdog: abort failed, trying reset\n",
4257 dev->name);
4258#endif
4259 wv_hw_reset(dev);
4260 }
4261
4262#ifdef DEBUG_PSA_SHOW
4263 {
4264 psa_t psa;
4265 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
4266 wv_psa_show(&psa);
4267 }
4268#endif
4269#ifdef DEBUG_MMC_SHOW
4270 wv_mmc_show(dev);
4271#endif
4272#ifdef DEBUG_I82593_SHOW
4273 wv_ru_show(dev);
4274#endif
4275
4276 /* We are no more waiting for something... */
4277 netif_wake_queue(dev);
4278
4279#ifdef DEBUG_INTERRUPT_TRACE
4280 printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name);
4281#endif
4282}
4283
4284/********************* CONFIGURATION CALLBACKS *********************/
4285/*
4286 * Here are the functions called by the pcmcia package (cardmgr) and
4287 * linux networking (NET3) for initialization, configuration and
4288 * deinstallations of the Wavelan Pcmcia Hardware.
4289 */
4290
4291/*------------------------------------------------------------------*/
4292/*
4293 * Configure and start up the WaveLAN PCMCIA adaptor.
4294 * Called by NET3 when it "open" the device.
4295 */
4296static int
4297wavelan_open(struct net_device * dev)
4298{
4299 net_local * lp = netdev_priv(dev);
4300 struct pcmcia_device * link = lp->link;
4301 unsigned int base = dev->base_addr;
4302
4303#ifdef DEBUG_CALLBACK_TRACE
4304 printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
4305 (unsigned int) dev);
4306#endif
4307
4308 /* Check if the modem is powered up (wavelan_close() power it down */
4309 if(hasr_read(base) & HASR_NO_CLK)
4310 {
4311 /* Power up (power up time is 250us) */
4312 hacr_write(base, HACR_DEFAULT);
4313
4314 /* Check if the module has been powered up... */
4315 if(hasr_read(base) & HASR_NO_CLK)
4316 {
4317#ifdef DEBUG_CONFIG_ERRORS
4318 printk(KERN_WARNING "%s: wavelan_open(): modem not connected\n",
4319 dev->name);
4320#endif
4321 return FALSE;
4322 }
4323 }
4324
4325 /* Start reception and declare the driver ready */
4326 if(!lp->configured)
4327 return FALSE;
4328 if(!wv_ru_start(dev))
4329 wv_hw_reset(dev); /* If problem : reset */
4330 netif_start_queue(dev);
4331
4332 /* Mark the device as used */
4333 link->open++;
4334
4335#ifdef WAVELAN_ROAMING
4336 if(do_roaming)
4337 wv_roam_init(dev);
4338#endif /* WAVELAN_ROAMING */
4339
4340#ifdef DEBUG_CALLBACK_TRACE
4341 printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name);
4342#endif
4343 return 0;
4344}
4345
4346/*------------------------------------------------------------------*/
4347/*
4348 * Shutdown the WaveLAN PCMCIA adaptor.
4349 * Called by NET3 when it "close" the device.
4350 */
4351static int
4352wavelan_close(struct net_device * dev)
4353{
4354 struct pcmcia_device * link = ((net_local *)netdev_priv(dev))->link;
4355 unsigned int base = dev->base_addr;
4356
4357#ifdef DEBUG_CALLBACK_TRACE
4358 printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
4359 (unsigned int) dev);
4360#endif
4361
4362 /* If the device isn't open, then nothing to do */
4363 if(!link->open)
4364 {
4365#ifdef DEBUG_CONFIG_INFO
4366 printk(KERN_DEBUG "%s: wavelan_close(): device not open\n", dev->name);
4367#endif
4368 return 0;
4369 }
4370
4371#ifdef WAVELAN_ROAMING
4372 /* Cleanup of roaming stuff... */
4373 if(do_roaming)
4374 wv_roam_cleanup(dev);
4375#endif /* WAVELAN_ROAMING */
4376
4377 link->open--;
4378
4379 /* If the card is still present */
4380 if(netif_running(dev))
4381 {
4382 netif_stop_queue(dev);
4383
4384 /* Stop receiving new messages and wait end of transmission */
4385 wv_ru_stop(dev);
4386
4387 /* Power down the module */
4388 hacr_write(base, HACR_DEFAULT & (~HACR_PWR_STAT));
4389 }
4390
4391#ifdef DEBUG_CALLBACK_TRACE
4392 printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name);
4393#endif
4394 return 0;
4395}
4396
4397static const struct net_device_ops wavelan_netdev_ops = {
4398 .ndo_open = wavelan_open,
4399 .ndo_stop = wavelan_close,
4400 .ndo_start_xmit = wavelan_packet_xmit,
4401 .ndo_set_multicast_list = wavelan_set_multicast_list,
4402#ifdef SET_MAC_ADDRESS
4403 .ndo_set_mac_address = wavelan_set_mac_address,
4404#endif
4405 .ndo_tx_timeout = wavelan_watchdog,
4406 .ndo_change_mtu = eth_change_mtu,
4407 .ndo_validate_addr = eth_validate_addr,
4408};
4409
4410/*------------------------------------------------------------------*/
4411/*
4412 * wavelan_attach() creates an "instance" of the driver, allocating
4413 * local data structures for one device (one interface). The device
4414 * is registered with Card Services.
4415 *
4416 * The dev_link structure is initialized, but we don't actually
4417 * configure the card at this point -- we wait until we receive a
4418 * card insertion event.
4419 */
4420static int
4421wavelan_probe(struct pcmcia_device *p_dev)
4422{
4423 struct net_device * dev; /* Interface generic data */
4424 net_local * lp; /* Interface specific data */
4425 int ret;
4426
4427#ifdef DEBUG_CALLBACK_TRACE
4428 printk(KERN_DEBUG "-> wavelan_attach()\n");
4429#endif
4430
4431 /* The io structure describes IO port mapping */
4432 p_dev->io.NumPorts1 = 8;
4433 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
4434 p_dev->io.IOAddrLines = 3;
4435
4436 /* General socket configuration */
4437 p_dev->conf.Attributes = CONF_ENABLE_IRQ;
4438 p_dev->conf.IntType = INT_MEMORY_AND_IO;
4439
4440 /* Allocate the generic data structure */
4441 dev = alloc_etherdev(sizeof(net_local));
4442 if (!dev)
4443 return -ENOMEM;
4444
4445 p_dev->priv = dev;
4446
4447 lp = netdev_priv(dev);
4448
4449 /* Init specific data */
4450 lp->configured = 0;
4451 lp->reconfig_82593 = FALSE;
4452 lp->nresets = 0;
4453 /* Multicast stuff */
4454 lp->promiscuous = 0;
4455 lp->allmulticast = 0;
4456 lp->mc_count = 0;
4457
4458 /* Init spinlock */
4459 spin_lock_init(&lp->spinlock);
4460
4461 /* back links */
4462 lp->dev = dev;
4463
4464 /* wavelan NET3 callbacks */
4465 dev->netdev_ops = &wavelan_netdev_ops;
4466 dev->watchdog_timeo = WATCHDOG_JIFFIES;
4467 SET_ETHTOOL_OPS(dev, &ops);
4468
4469 dev->wireless_handlers = &wavelan_handler_def;
4470 lp->wireless_data.spy_data = &lp->spy_data;
4471 dev->wireless_data = &lp->wireless_data;
4472
4473 /* Other specific data */
4474 dev->mtu = WAVELAN_MTU;
4475
4476 ret = wv_pcmcia_config(p_dev);
4477 if (ret)
4478 return ret;
4479
4480 ret = wv_hw_config(dev);
4481 if (ret) {
4482 pcmcia_disable_device(p_dev);
4483 return ret;
4484 }
4485
4486 wv_init_info(dev);
4487
4488#ifdef DEBUG_CALLBACK_TRACE
4489 printk(KERN_DEBUG "<- wavelan_attach()\n");
4490#endif
4491
4492 return 0;
4493}
4494
4495/*------------------------------------------------------------------*/
4496/*
4497 * This deletes a driver "instance". The device is de-registered with
4498 * Card Services. If it has been released, all local data structures
4499 * are freed. Otherwise, the structures will be freed when the device
4500 * is released.
4501 */
4502static void
4503wavelan_detach(struct pcmcia_device *link)
4504{
4505#ifdef DEBUG_CALLBACK_TRACE
4506 printk(KERN_DEBUG "-> wavelan_detach(0x%p)\n", link);
4507#endif
4508
4509 /* Some others haven't done their job : give them another chance */
4510 wv_pcmcia_release(link);
4511
4512 /* Free pieces */
4513 if(link->priv)
4514 {
4515 struct net_device * dev = (struct net_device *) link->priv;
4516
4517 /* Remove ourselves from the kernel list of ethernet devices */
4518 /* Warning : can't be called from interrupt, timer or wavelan_close() */
4519 if (link->dev_node)
4520 unregister_netdev(dev);
4521 link->dev_node = NULL;
4522 ((net_local *)netdev_priv(dev))->link = NULL;
4523 ((net_local *)netdev_priv(dev))->dev = NULL;
4524 free_netdev(dev);
4525 }
4526
4527#ifdef DEBUG_CALLBACK_TRACE
4528 printk(KERN_DEBUG "<- wavelan_detach()\n");
4529#endif
4530}
4531
4532static int wavelan_suspend(struct pcmcia_device *link)
4533{
4534 struct net_device * dev = (struct net_device *) link->priv;
4535
4536 /* NB: wavelan_close will be called, but too late, so we are
4537 * obliged to close nicely the wavelan here. David, could you
4538 * close the device before suspending them ? And, by the way,
4539 * could you, on resume, add a "route add -net ..." after the
4540 * ifconfig up ? Thanks... */
4541
4542 /* Stop receiving new messages and wait end of transmission */
4543 wv_ru_stop(dev);
4544
4545 if (link->open)
4546 netif_device_detach(dev);
4547
4548 /* Power down the module */
4549 hacr_write(dev->base_addr, HACR_DEFAULT & (~HACR_PWR_STAT));
4550
4551 return 0;
4552}
4553
4554static int wavelan_resume(struct pcmcia_device *link)
4555{
4556 struct net_device * dev = (struct net_device *) link->priv;
4557
4558 if (link->open) {
4559 wv_hw_reset(dev);
4560 netif_device_attach(dev);
4561 }
4562
4563 return 0;
4564}
4565
4566
4567static struct pcmcia_device_id wavelan_ids[] = {
4568 PCMCIA_DEVICE_PROD_ID12("AT&T","WaveLAN/PCMCIA", 0xe7c5affd, 0x1bc50975),
4569 PCMCIA_DEVICE_PROD_ID12("Digital", "RoamAbout/DS", 0x9999ab35, 0x00d05e06),
4570 PCMCIA_DEVICE_PROD_ID12("Lucent Technologies", "WaveLAN/PCMCIA", 0x23eb9949, 0x1bc50975),
4571 PCMCIA_DEVICE_PROD_ID12("NCR", "WaveLAN/PCMCIA", 0x24358cd4, 0x1bc50975),
4572 PCMCIA_DEVICE_NULL,
4573};
4574MODULE_DEVICE_TABLE(pcmcia, wavelan_ids);
4575
4576static struct pcmcia_driver wavelan_driver = {
4577 .owner = THIS_MODULE,
4578 .drv = {
4579 .name = "wavelan_cs",
4580 },
4581 .probe = wavelan_probe,
4582 .remove = wavelan_detach,
4583 .id_table = wavelan_ids,
4584 .suspend = wavelan_suspend,
4585 .resume = wavelan_resume,
4586};
4587
4588static int __init
4589init_wavelan_cs(void)
4590{
4591 return pcmcia_register_driver(&wavelan_driver);
4592}
4593
4594static void __exit
4595exit_wavelan_cs(void)
4596{
4597 pcmcia_unregister_driver(&wavelan_driver);
4598}
4599
4600module_init(init_wavelan_cs);
4601module_exit(exit_wavelan_cs);
diff --git a/drivers/staging/wavelan/wavelan_cs.h b/drivers/staging/wavelan/wavelan_cs.h
deleted file mode 100644
index 2e4bfe4147c6..000000000000
--- a/drivers/staging/wavelan/wavelan_cs.h
+++ /dev/null
@@ -1,386 +0,0 @@
1/*
2 * Wavelan Pcmcia driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganization and extension of the driver.
7 * Original copyright follow. See wavelan_cs.h for details.
8 *
9 * This file contain the declarations of the Wavelan hardware. Note that
10 * the Pcmcia Wavelan include a i82593 controller (see definitions in
11 * file i82593.h).
12 *
13 * The main difference between the pcmcia hardware and the ISA one is
14 * the Ethernet Controller (i82593 instead of i82586). The i82593 allow
15 * only one send buffer. The PSA (Parameter Storage Area : EEprom for
16 * permanent storage of various info) is memory mapped, but not the
17 * MMI (Modem Management Interface).
18 */
19
20/*
21 * Definitions for the AT&T GIS (formerly NCR) WaveLAN PCMCIA card:
22 * An Ethernet-like radio transceiver controlled by an Intel 82593
23 * coprocessor.
24 *
25 *
26 ****************************************************************************
27 * Copyright 1995
28 * Anthony D. Joseph
29 * Massachusetts Institute of Technology
30 *
31 * Permission to use, copy, modify, and distribute this program
32 * for any purpose and without fee is hereby granted, provided
33 * that this copyright and permission notice appear on all copies
34 * and supporting documentation, the name of M.I.T. not be used
35 * in advertising or publicity pertaining to distribution of the
36 * program without specific prior permission, and notice be given
37 * in supporting documentation that copying and distribution is
38 * by permission of M.I.T. M.I.T. makes no representations about
39 * the suitability of this software for any purpose. It is pro-
40 * vided "as is" without express or implied warranty.
41 ****************************************************************************
42 *
43 *
44 * Credits:
45 * Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht for
46 * providing extremely useful information about WaveLAN PCMCIA hardware
47 *
48 * This driver is based upon several other drivers, in particular:
49 * David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter
50 * Bruce Janson's Linux driver for the AT-bus WaveLAN adapter
51 * Anders Klemets' PCMCIA WaveLAN adapter driver
52 * Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter
53 */
54
55#ifndef _WAVELAN_CS_H
56#define _WAVELAN_CS_H
57
58/************************** MAGIC NUMBERS ***************************/
59
60/* The detection of the wavelan card is made by reading the MAC address
61 * from the card and checking it. If you have a non AT&T product (OEM,
62 * like DEC RoamAbout, or Digital Ocean, Epson, ...), you must modify this
63 * part to accommodate your hardware...
64 */
65static const unsigned char MAC_ADDRESSES[][3] =
66{
67 { 0x08, 0x00, 0x0E }, /* AT&T Wavelan (standard) & DEC RoamAbout */
68 { 0x08, 0x00, 0x6A }, /* AT&T Wavelan (alternate) */
69 { 0x00, 0x00, 0xE1 }, /* Hitachi Wavelan */
70 { 0x00, 0x60, 0x1D } /* Lucent Wavelan (another one) */
71 /* Add your card here and send me the patch ! */
72};
73
74/*
75 * Constants used to convert channels to frequencies
76 */
77
78/* Frequency available in the 2.0 modem, in units of 250 kHz
79 * (as read in the offset register of the dac area).
80 * Used to map channel numbers used by `wfreqsel' to frequencies
81 */
82static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
83 0xD0, 0xF0, 0xF8, 0x150 };
84
85/* Frequencies of the 1.0 modem (fixed frequencies).
86 * Use to map the PSA `subband' to a frequency
87 * Note : all frequencies apart from the first one need to be multiplied by 10
88 */
89static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
90
91
92/*************************** PC INTERFACE ****************************/
93
94/* WaveLAN host interface definitions */
95
96#define LCCR(base) (base) /* LAN Controller Command Register */
97#define LCSR(base) (base) /* LAN Controller Status Register */
98#define HACR(base) (base+0x1) /* Host Adapter Command Register */
99#define HASR(base) (base+0x1) /* Host Adapter Status Register */
100#define PIORL(base) (base+0x2) /* Program I/O Register Low */
101#define RPLL(base) (base+0x2) /* Receive Pointer Latched Low */
102#define PIORH(base) (base+0x3) /* Program I/O Register High */
103#define RPLH(base) (base+0x3) /* Receive Pointer Latched High */
104#define PIOP(base) (base+0x4) /* Program I/O Port */
105#define MMR(base) (base+0x6) /* MMI Address Register */
106#define MMD(base) (base+0x7) /* MMI Data Register */
107
108/* Host Adaptor Command Register bit definitions */
109
110#define HACR_LOF (1 << 3) /* Lock Out Flag, toggle every 250ms */
111#define HACR_PWR_STAT (1 << 4) /* Power State, 1=active, 0=sleep */
112#define HACR_TX_DMA_RESET (1 << 5) /* Reset transmit DMA ptr on high */
113#define HACR_RX_DMA_RESET (1 << 6) /* Reset receive DMA ptr on high */
114#define HACR_ROM_WEN (1 << 7) /* EEPROM write enabled when true */
115
116#define HACR_RESET (HACR_TX_DMA_RESET | HACR_RX_DMA_RESET)
117#define HACR_DEFAULT (HACR_PWR_STAT)
118
119/* Host Adapter Status Register bit definitions */
120
121#define HASR_MMI_BUSY (1 << 2) /* MMI is busy when true */
122#define HASR_LOF (1 << 3) /* Lock out flag status */
123#define HASR_NO_CLK (1 << 4) /* active when modem not connected */
124
125/* Miscellaneous bit definitions */
126
127#define PIORH_SEL_TX (1 << 5) /* PIOR points to 0=rx/1=tx buffer */
128#define MMR_MMI_WR (1 << 0) /* Next MMI cycle is 0=read, 1=write */
129#define PIORH_MASK 0x1f /* only low 5 bits are significant */
130#define RPLH_MASK 0x1f /* only low 5 bits are significant */
131#define MMI_ADDR_MASK 0x7e /* Bits 1-6 of MMR are significant */
132
133/* Attribute Memory map */
134
135#define CIS_ADDR 0x0000 /* Card Information Status Register */
136#define PSA_ADDR 0x0e00 /* Parameter Storage Area address */
137#define EEPROM_ADDR 0x1000 /* EEPROM address (unused ?) */
138#define COR_ADDR 0x4000 /* Configuration Option Register */
139
140/* Configuration Option Register bit definitions */
141
142#define COR_CONFIG (1 << 0) /* Config Index, 0 when unconfigured */
143#define COR_SW_RESET (1 << 7) /* Software Reset on true */
144#define COR_LEVEL_IRQ (1 << 6) /* Level IRQ */
145
146/* Local Memory map */
147
148#define RX_BASE 0x0000 /* Receive memory, 8 kB */
149#define TX_BASE 0x2000 /* Transmit memory, 2 kB */
150#define UNUSED_BASE 0x2800 /* Unused, 22 kB */
151#define RX_SIZE (TX_BASE-RX_BASE) /* Size of receive area */
152#define RX_SIZE_SHIFT 6 /* Bits to shift in stop register */
153
154#define TRUE 1
155#define FALSE 0
156
157#define MOD_ENAL 1
158#define MOD_PROM 2
159
160/* Size of a MAC address */
161#define WAVELAN_ADDR_SIZE 6
162
163/* Maximum size of Wavelan packet */
164#define WAVELAN_MTU 1500
165
166#define MAXDATAZ (6 + 6 + 2 + WAVELAN_MTU)
167
168/********************** PARAMETER STORAGE AREA **********************/
169
170/*
171 * Parameter Storage Area (PSA).
172 */
173typedef struct psa_t psa_t;
174struct psa_t
175{
176 /* For the PCMCIA Adapter, locations 0x00-0x0F are unused and fixed at 00 */
177 unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */
178 unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */
179 unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */
180 unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */
181 unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */
182 unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */
183 unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */
184 unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */
185 unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */
186 unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */
187
188 unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */
189 unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */
190 unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */
191#define PSA_UNIVERSAL 0 /* Universal (factory) */
192#define PSA_LOCAL 1 /* Local */
193 unsigned char psa_comp_number; /* [0x1D] Compatability Number: */
194#define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */
195#define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */
196#define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */
197#define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */
198#define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */
199 unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */
200 unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */
201#define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */
202 unsigned char psa_subband; /* [0x20] Subband */
203#define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */
204#define PSA_SUBBAND_2425 1 /* 2425 MHz */
205#define PSA_SUBBAND_2460 2 /* 2460 MHz */
206#define PSA_SUBBAND_2484 3 /* 2484 MHz */
207#define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */
208 unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */
209 unsigned char psa_mod_delay; /* [0x22] Modem Delay ??? (reserved) */
210 unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */
211 unsigned char psa_nwid_select; /* [0x25] Network ID Select On Off */
212 unsigned char psa_encryption_select; /* [0x26] Encryption On Off */
213 unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */
214 unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */
215 unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */
216 unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */
217 unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */
218 unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/
219 unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */
220 unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */
221};
222
223/* Size for structure checking (if padding is correct) */
224#define PSA_SIZE 64
225
226/* Calculate offset of a field in the above structure
227 * Warning : only even addresses are used */
228#define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
229
230/******************** MODEM MANAGEMENT INTERFACE ********************/
231
232/*
233 * Modem Management Controller (MMC) write structure.
234 */
235typedef struct mmw_t mmw_t;
236struct mmw_t
237{
238 unsigned char mmw_encr_key[8]; /* encryption key */
239 unsigned char mmw_encr_enable; /* enable/disable encryption */
240#define MMW_ENCR_ENABLE_MODE 0x02 /* Mode of security option */
241#define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option */
242 unsigned char mmw_unused0[1]; /* unused */
243 unsigned char mmw_des_io_invert; /* Encryption option */
244#define MMW_DES_IO_INVERT_RES 0x0F /* Reserved */
245#define MMW_DES_IO_INVERT_CTRL 0xF0 /* Control ??? (set to 0) */
246 unsigned char mmw_unused1[5]; /* unused */
247 unsigned char mmw_loopt_sel; /* looptest selection */
248#define MMW_LOOPT_SEL_DIS_NWID 0x40 /* disable NWID filtering */
249#define MMW_LOOPT_SEL_INT 0x20 /* activate Attention Request */
250#define MMW_LOOPT_SEL_LS 0x10 /* looptest w/o collision avoidance */
251#define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */
252#define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */
253#define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */
254#define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */
255 unsigned char mmw_jabber_enable; /* jabber timer enable */
256 /* Abort transmissions > 200 ms */
257 unsigned char mmw_freeze; /* freeze / unfreeeze signal level */
258 /* 0 : signal level & qual updated for every new message, 1 : frozen */
259 unsigned char mmw_anten_sel; /* antenna selection */
260#define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */
261#define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */
262 unsigned char mmw_ifs; /* inter frame spacing */
263 /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
264 unsigned char mmw_mod_delay; /* modem delay (synchro) */
265 unsigned char mmw_jam_time; /* jamming time (after collision) */
266 unsigned char mmw_unused2[1]; /* unused */
267 unsigned char mmw_thr_pre_set; /* level threshold preset */
268 /* Discard all packet with signal < this value (4) */
269 unsigned char mmw_decay_prm; /* decay parameters */
270 unsigned char mmw_decay_updat_prm; /* decay update parameterz */
271 unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */
272 /* Discard all packet with quality < this value (3) */
273 unsigned char mmw_netw_id_l; /* NWID low order byte */
274 unsigned char mmw_netw_id_h; /* NWID high order byte */
275 /* Network ID or Domain : create virtual net on the air */
276
277 /* 2.0 Hardware extension - frequency selection support */
278 unsigned char mmw_mode_select; /* for analog tests (set to 0) */
279 unsigned char mmw_unused3[1]; /* unused */
280 unsigned char mmw_fee_ctrl; /* frequency eeprom control */
281#define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions */
282#define MMW_FEE_CTRL_DWLD 0x08 /* Download eeprom to mmc */
283#define MMW_FEE_CTRL_CMD 0x07 /* EEprom commands : */
284#define MMW_FEE_CTRL_READ 0x06 /* Read */
285#define MMW_FEE_CTRL_WREN 0x04 /* Write enable */
286#define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address */
287#define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses */
288#define MMW_FEE_CTRL_WDS 0x04 /* Write disable */
289#define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */
290#define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */
291#define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers */
292#define MMW_FEE_CTRL_PRWRITE 0x15 /* Write addr in protect register */
293#define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */
294 /* Never issue this command (PRDS) : it's irreversible !!! */
295
296 unsigned char mmw_fee_addr; /* EEprom address */
297#define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel */
298#define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */
299#define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */
300#define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */
301#define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */
302#define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */
303
304 unsigned char mmw_fee_data_l; /* Write data to EEprom */
305 unsigned char mmw_fee_data_h; /* high octet */
306 unsigned char mmw_ext_ant; /* Setting for external antenna */
307#define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */
308#define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */
309#define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */
310#define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */
311#define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */
312} __attribute__((packed));
313
314/* Size for structure checking (if padding is correct) */
315#define MMW_SIZE 37
316
317/* Calculate offset of a field in the above structure */
318#define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
319
320
321/*
322 * Modem Management Controller (MMC) read structure.
323 */
324typedef struct mmr_t mmr_t;
325struct mmr_t
326{
327 unsigned char mmr_unused0[8]; /* unused */
328 unsigned char mmr_des_status; /* encryption status */
329 unsigned char mmr_des_avail; /* encryption available (0x55 read) */
330#define MMR_DES_AVAIL_DES 0x55 /* DES available */
331#define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */
332 unsigned char mmr_des_io_invert; /* des I/O invert register */
333 unsigned char mmr_unused1[5]; /* unused */
334 unsigned char mmr_dce_status; /* DCE status */
335#define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */
336#define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */
337#define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */
338#define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */
339#define MMR_DCE_STATUS 0x0F /* mask to get the bits */
340 unsigned char mmr_dsp_id; /* DSP id (AA = Daedalus rev A) */
341 unsigned char mmr_unused2[2]; /* unused */
342 unsigned char mmr_correct_nwid_l; /* # of correct NWID's rxd (low) */
343 unsigned char mmr_correct_nwid_h; /* # of correct NWID's rxd (high) */
344 /* Warning : Read high order octet first !!! */
345 unsigned char mmr_wrong_nwid_l; /* # of wrong NWID's rxd (low) */
346 unsigned char mmr_wrong_nwid_h; /* # of wrong NWID's rxd (high) */
347 unsigned char mmr_thr_pre_set; /* level threshold preset */
348#define MMR_THR_PRE_SET 0x3F /* level threshold preset */
349#define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */
350 unsigned char mmr_signal_lvl; /* signal level */
351#define MMR_SIGNAL_LVL 0x3F /* signal level */
352#define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */
353 unsigned char mmr_silence_lvl; /* silence level (noise) */
354#define MMR_SILENCE_LVL 0x3F /* silence level */
355#define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */
356 unsigned char mmr_sgnl_qual; /* signal quality */
357#define MMR_SGNL_QUAL 0x0F /* signal quality */
358#define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */
359 unsigned char mmr_netw_id_l; /* NWID low order byte ??? */
360 unsigned char mmr_unused3[3]; /* unused */
361
362 /* 2.0 Hardware extension - frequency selection support */
363 unsigned char mmr_fee_status; /* Status of frequency eeprom */
364#define MMR_FEE_STATUS_ID 0xF0 /* Modem revision id */
365#define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */
366#define MMR_FEE_STATUS_BUSY 0x04 /* EEprom busy */
367 unsigned char mmr_unused4[1]; /* unused */
368 unsigned char mmr_fee_data_l; /* Read data from eeprom (low) */
369 unsigned char mmr_fee_data_h; /* Read data from eeprom (high) */
370};
371
372/* Size for structure checking (if padding is correct) */
373#define MMR_SIZE 36
374
375/* Calculate offset of a field in the above structure */
376#define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
377
378
379/* Make the two above structures one */
380typedef union mm_t
381{
382 struct mmw_t w; /* Write to the mmc */
383 struct mmr_t r; /* Read from the mmc */
384} mm_t;
385
386#endif /* _WAVELAN_CS_H */
diff --git a/drivers/staging/wavelan/wavelan_cs.p.h b/drivers/staging/wavelan/wavelan_cs.p.h
deleted file mode 100644
index 8fbfaa8a5a67..000000000000
--- a/drivers/staging/wavelan/wavelan_cs.p.h
+++ /dev/null
@@ -1,766 +0,0 @@
1/*
2 * Wavelan Pcmcia driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 *
8 * This file contain all definition and declarations necessary for the
9 * wavelan pcmcia driver. This file is a private header, so it should
10 * be included only on wavelan_cs.c !!!
11 */
12
13#ifndef WAVELAN_CS_P_H
14#define WAVELAN_CS_P_H
15
16/************************** DOCUMENTATION **************************/
17/*
18 * This driver provide a Linux interface to the Wavelan Pcmcia hardware
19 * The Wavelan is a product of Lucent (http://www.wavelan.com/).
20 * This division was formerly part of NCR and then AT&T.
21 * Wavelan are also distributed by DEC (RoamAbout DS)...
22 *
23 * To know how to use this driver, read the PCMCIA HOWTO.
24 * If you want to exploit the many other fonctionalities, look comments
25 * in the code...
26 *
27 * This driver is the result of the effort of many peoples (see below).
28 */
29
30/* ------------------------ SPECIFIC NOTES ------------------------ */
31/*
32 * Web page
33 * --------
34 * I try to maintain a web page with the Wireless LAN Howto at :
35 * http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
36 *
37 * SMP
38 * ---
39 * We now are SMP compliant (I eventually fixed the remaining bugs).
40 * The driver has been tested on a dual P6-150 and survived my usual
41 * set of torture tests.
42 * Anyway, I spent enough time chasing interrupt re-entrancy during
43 * errors or reconfigure, and I designed the locked/unlocked sections
44 * of the driver with great care, and with the recent addition of
45 * the spinlock (thanks to the new API), we should be quite close to
46 * the truth.
47 * The SMP/IRQ locking is quite coarse and conservative (i.e. not fast),
48 * but better safe than sorry (especially at 2 Mb/s ;-).
49 *
50 * I have also looked into disabling only our interrupt on the card
51 * (via HACR) instead of all interrupts in the processor (via cli),
52 * so that other driver are not impacted, and it look like it's
53 * possible, but it's very tricky to do right (full of races). As
54 * the gain would be mostly for SMP systems, it can wait...
55 *
56 * Debugging and options
57 * ---------------------
58 * You will find below a set of '#define" allowing a very fine control
59 * on the driver behaviour and the debug messages printed.
60 * The main options are :
61 * o WAVELAN_ROAMING, for the experimental roaming support.
62 * o SET_PSA_CRC, to have your card correctly recognised by
63 * an access point and the Point-to-Point diagnostic tool.
64 * o USE_PSA_CONFIG, to read configuration from the PSA (EEprom)
65 * (otherwise we always start afresh with some defaults)
66 *
67 * wavelan_cs.o is darn too big
68 * -------------------------
69 * That's true ! There is a very simple way to reduce the driver
70 * object by 33% (yes !). Comment out the following line :
71 * #include <linux/wireless.h>
72 * Other compile options can also reduce the size of it...
73 *
74 * MAC address and hardware detection :
75 * ----------------------------------
76 * The detection code of the wavelan chech that the first 3
77 * octets of the MAC address fit the company code. This type of
78 * detection work well for AT&T cards (because the AT&T code is
79 * hardcoded in wavelan_cs.h), but of course will fail for other
80 * manufacturer.
81 *
82 * If you are sure that your card is derived from the wavelan,
83 * here is the way to configure it :
84 * 1) Get your MAC address
85 * a) With your card utilities (wfreqsel, instconf, ...)
86 * b) With the driver :
87 * o compile the kernel with DEBUG_CONFIG_INFO enabled
88 * o Boot and look the card messages
89 * 2) Set your MAC code (3 octets) in MAC_ADDRESSES[][3] (wavelan_cs.h)
90 * 3) Compile & verify
91 * 4) Send me the MAC code - I will include it in the next version...
92 *
93 */
94
95/* --------------------- WIRELESS EXTENSIONS --------------------- */
96/*
97 * This driver is the first one to support "wireless extensions".
98 * This set of extensions provide you some way to control the wireless
99 * caracteristics of the hardware in a standard way and support for
100 * applications for taking advantage of it (like Mobile IP).
101 *
102 * It might be a good idea as well to fetch the wireless tools to
103 * configure the device and play a bit.
104 */
105
106/* ---------------------------- FILES ---------------------------- */
107/*
108 * wavelan_cs.c : The actual code for the driver - C functions
109 *
110 * wavelan_cs.p.h : Private header : local types / vars for the driver
111 *
112 * wavelan_cs.h : Description of the hardware interface & structs
113 *
114 * i82593.h : Description if the Ethernet controller
115 */
116
117/* --------------------------- HISTORY --------------------------- */
118/*
119 * The history of the Wavelan drivers is as complicated as history of
120 * the Wavelan itself (NCR -> AT&T -> Lucent).
121 *
122 * All started with Anders Klemets <klemets@paul.rutgers.edu>,
123 * writing a Wavelan ISA driver for the MACH microkernel. Girish
124 * Welling <welling@paul.rutgers.edu> had also worked on it.
125 * Keith Moore modify this for the Pcmcia hardware.
126 *
127 * Robert Morris <rtm@das.harvard.edu> port these two drivers to BSDI
128 * and add specific Pcmcia support (there is currently no equivalent
129 * of the PCMCIA package under BSD...).
130 *
131 * Jim Binkley <jrb@cs.pdx.edu> port both BSDI drivers to FreeBSD.
132 *
133 * Bruce Janson <bruce@cs.usyd.edu.au> port the BSDI ISA driver to Linux.
134 *
135 * Anthony D. Joseph <adj@lcs.mit.edu> started modify Bruce driver
136 * (with help of the BSDI PCMCIA driver) for PCMCIA.
137 * Yunzhou Li <yunzhou@strat.iol.unh.edu> finished is work.
138 * Joe Finney <joe@comp.lancs.ac.uk> patched the driver to start
139 * correctly 2.00 cards (2.4 GHz with frequency selection).
140 * David Hinds <dahinds@users.sourceforge.net> integrated the whole in his
141 * Pcmcia package (+ bug corrections).
142 *
143 * I (Jean Tourrilhes - jt@hplb.hpl.hp.com) then started to make some
144 * patchs to the Pcmcia driver. After, I added code in the ISA driver
145 * for Wireless Extensions and full support of frequency selection
146 * cards. Now, I'm doing the same to the Pcmcia driver + some
147 * reorganisation.
148 * Loeke Brederveld <lbrederv@wavelan.com> from Lucent has given me
149 * much needed informations on the Wavelan hardware.
150 */
151
152/* By the way : for the copyright & legal stuff :
153 * Almost everybody wrote code under GNU or BSD license (or alike),
154 * and want that their original copyright remain somewhere in the
155 * code (for myself, I go with the GPL).
156 * Nobody want to take responsibility for anything, except the fame...
157 */
158
159/* --------------------------- CREDITS --------------------------- */
160/*
161 * Credits:
162 * Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht and
163 * Loeke Brederveld of Lucent for providing extremely useful
164 * information about WaveLAN PCMCIA hardware
165 *
166 * This driver is based upon several other drivers, in particular:
167 * David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter
168 * Bruce Janson's Linux driver for the AT-bus WaveLAN adapter
169 * Anders Klemets' PCMCIA WaveLAN adapter driver
170 * Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter
171 *
172 * Additional Credits:
173 *
174 * This software was originally developed under Linux 1.2.3
175 * (Slackware 2.0 distribution).
176 * And then under Linux 2.0.x (Debian 1.1 -> 2.2 - pcmcia 2.8.18+)
177 * with an HP OmniBook 4000 and then a 5500.
178 *
179 * It is based on other device drivers and information either written
180 * or supplied by:
181 * James Ashton (jaa101@syseng.anu.edu.au),
182 * Ajay Bakre (bakre@paul.rutgers.edu),
183 * Donald Becker (becker@super.org),
184 * Jim Binkley <jrb@cs.pdx.edu>,
185 * Loeke Brederveld <lbrederv@wavelan.com>,
186 * Allan Creighton (allanc@cs.su.oz.au),
187 * Brent Elphick <belphick@uwaterloo.ca>,
188 * Joe Finney <joe@comp.lancs.ac.uk>,
189 * Matthew Geier (matthew@cs.su.oz.au),
190 * Remo di Giovanni (remo@cs.su.oz.au),
191 * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM),
192 * David Hinds <dahinds@users.sourceforge.net>,
193 * Jan Hoogendoorn (c/o marteijn@lucent.com),
194 * Bruce Janson <bruce@cs.usyd.edu.au>,
195 * Anthony D. Joseph <adj@lcs.mit.edu>,
196 * Anders Klemets (klemets@paul.rutgers.edu),
197 * Yunzhou Li <yunzhou@strat.iol.unh.edu>,
198 * Marc Meertens (mmeertens@lucent.com),
199 * Keith Moore,
200 * Robert Morris (rtm@das.harvard.edu),
201 * Ian Parkin (ian@cs.su.oz.au),
202 * John Rosenberg (johnr@cs.su.oz.au),
203 * George Rossi (george@phm.gov.au),
204 * Arthur Scott (arthur@cs.su.oz.au),
205 * Stanislav Sinyagin <stas@isf.ru>
206 * Peter Storey,
207 * Jean Tourrilhes <jt@hpl.hp.com>,
208 * Girish Welling (welling@paul.rutgers.edu)
209 * Clark Woodworth <clark@hiway1.exit109.com>
210 * Yongguang Zhang <ygz@isl.hrl.hac.com>...
211 */
212
213/* ------------------------- IMPROVEMENTS ------------------------- */
214/*
215 * I proudly present :
216 *
217 * Changes made in 2.8.22 :
218 * ----------------------
219 * - improved wv_set_multicast_list
220 * - catch spurious interrupt
221 * - correct release of the device
222 *
223 * Changes mades in release :
224 * ------------------------
225 * - Reorganisation of the code, function name change
226 * - Creation of private header (wavelan_cs.h)
227 * - Reorganised debug messages
228 * - More comments, history, ...
229 * - Configure earlier (in "insert" instead of "open")
230 * and do things only once
231 * - mmc_init : configure the PSA if not done
232 * - mmc_init : 2.00 detection better code for 2.00 init
233 * - better info at startup
234 * - Correct a HUGE bug (volatile & uncalibrated busy loop)
235 * in wv_82593_cmd => config speedup
236 * - Stop receiving & power down on close (and power up on open)
237 * use "ifconfig down" & "ifconfig up ; route add -net ..."
238 * - Send packets : add watchdog instead of pooling
239 * - Receive : check frame wrap around & try to recover some frames
240 * - wavelan_set_multicast_list : avoid reset
241 * - add wireless extensions (ioctl & get_wireless_stats)
242 * get/set nwid/frequency on fly, info for /proc/net/wireless
243 * - Suppress useless stuff from lp (net_local), but add link
244 * - More inlines
245 * - Lot of others minor details & cleanups
246 *
247 * Changes made in second release :
248 * ------------------------------
249 * - Optimise wv_85893_reconfig stuff, fix potential problems
250 * - Change error values for ioctl
251 * - Non blocking wv_ru_stop() + call wv_reset() in case of problems
252 * - Remove development printk from wavelan_watchdog()
253 * - Remove of the watchdog to wavelan_close instead of wavelan_release
254 * fix potential problems...
255 * - Start debugging suspend stuff (but it's still a bit weird)
256 * - Debug & optimize dump header/packet in Rx & Tx (debug)
257 * - Use "readb" and "writeb" to be kernel 2.1 compliant
258 * - Better handling of bogus interrupts
259 * - Wireless extension : SETSPY and GETSPY
260 * - Remove old stuff (stats - for those needing it, just ask me...)
261 * - Make wireless extensions optional
262 *
263 * Changes made in third release :
264 * -----------------------------
265 * - cleanups & typos
266 * - modif wireless ext (spy -> only one pointer)
267 * - new private ioctl to set/get quality & level threshold
268 * - Init : correct default value of level threshold for pcmcia
269 * - kill watchdog in hw_reset
270 * - more 2.1 support (copy_to/from_user instead of memcpy_to/fromfs)
271 * - Add message level (debug stuff in /var/adm/debug & errors not
272 * displayed at console and still in /var/adm/messages)
273 *
274 * Changes made in fourth release :
275 * ------------------------------
276 * - multicast support (yes !) thanks to Yongguang Zhang.
277 *
278 * Changes made in fifth release (2.9.0) :
279 * -------------------------------------
280 * - Revisited multicast code (it was mostly wrong).
281 * - protect code in wv_82593_reconfig with dev->tbusy (oups !)
282 *
283 * Changes made in sixth release (2.9.1a) :
284 * --------------------------------------
285 * - Change the detection code for multi manufacturer code support
286 * - Correct bug (hang kernel) in init when we were "rejecting" a card
287 *
288 * Changes made in seventh release (2.9.1b) :
289 * ----------------------------------------
290 * - Update to wireless extensions changes
291 * - Silly bug in card initial configuration (psa_conf_status)
292 *
293 * Changes made in eigth release :
294 * -----------------------------
295 * - Small bug in debug code (probably not the last one...)
296 * - 1.2.13 support (thanks to Clark Woodworth)
297 *
298 * Changes made for release in 2.9.2b :
299 * ----------------------------------
300 * - Level threshold is now a standard wireless extension (version 4 !)
301 * - modules parameters types for kernel > 2.1.17
302 * - updated man page
303 * - Others cleanup from David Hinds
304 *
305 * Changes made for release in 2.9.5 :
306 * ---------------------------------
307 * - byte count stats (courtesy of David Hinds)
308 * - Remove dev_tint stuff (courtesy of David Hinds)
309 * - Others cleanup from David Hinds
310 * - Encryption setting from Brent Elphick (thanks a lot !)
311 * - 'base' to 'u_long' for the Alpha (thanks to Stanislav Sinyagin)
312 *
313 * Changes made for release in 2.9.6 :
314 * ---------------------------------
315 * - fix bug : no longuer disable watchdog in case of bogus interrupt
316 * - increase timeout in config code for picky hardware
317 * - mask unused bits in status (Wireless Extensions)
318 *
319 * Changes integrated by Justin Seger <jseger@MIT.EDU> & David Hinds :
320 * -----------------------------------------------------------------
321 * - Roaming "hack" from Joe Finney <joe@comp.lancs.ac.uk>
322 * - PSA CRC code from Bob Gray <rgray@bald.cs.dartmouth.edu>
323 * - Better initialisation of the i82593 controller
324 * from Joseph K. O'Sullivan <josullvn+@cs.cmu.edu>
325 *
326 * Changes made for release in 3.0.10 :
327 * ----------------------------------
328 * - Fix eject "hang" of the driver under 2.2.X :
329 * o create wv_flush_stale_links()
330 * o Rename wavelan_release to wv_pcmcia_release & move up
331 * o move unregister_netdev to wavelan_detach()
332 * o wavelan_release() no longer call wavelan_detach()
333 * o Suppress "release" timer
334 * o Other cleanups & fixes
335 * - New MAC address in the probe
336 * - Reorg PSA_CRC code (endian neutral & cleaner)
337 * - Correct initialisation of the i82593 from Lucent manual
338 * - Put back the watchdog, with larger timeout
339 * - TRANSMIT_NO_CRC is a "normal" error, so recover from it
340 * from Derrick J Brashear <shadow@dementia.org>
341 * - Better handling of TX and RX normal failure conditions
342 * - #ifdef out all the roaming code
343 * - Add ESSID & "AP current address" ioctl stubs
344 * - General cleanup of the code
345 *
346 * Changes made for release in 3.0.13 :
347 * ----------------------------------
348 * - Re-enable compilation of roaming code by default, but with
349 * do_roaming = 0
350 * - Nuke `nwid=nwid^ntohs(beacon->domain_id)' in wl_roam_gather
351 * at the demand of John Carol Langford <jcl@gs176.sp.cs.cmu.edu>
352 * - Introduced WAVELAN_ROAMING_EXT for incomplete ESSID stuff.
353 *
354 * Changes made for release in 3.0.15 :
355 * ----------------------------------
356 * - Change e-mail and web page addresses
357 * - Watchdog timer is now correctly expressed in HZ, not in jiffies
358 * - Add channel number to the list of frequencies in range
359 * - Add the (short) list of bit-rates in range
360 * - Developp a new sensitivity... (sens.value & sens.fixed)
361 *
362 * Changes made for release in 3.1.2 :
363 * ---------------------------------
364 * - Fix check for root permission (break instead of exit)
365 * - New nwid & encoding setting (Wireless Extension 9)
366 *
367 * Changes made for release in 3.1.12 :
368 * ----------------------------------
369 * - reworked wv_82593_cmd to avoid using the IRQ handler and doing
370 * ugly things with interrupts.
371 * - Add IRQ protection in 82593_config/ru_start/ru_stop/watchdog
372 * - Update to new network API (softnet - 2.3.43) :
373 * o replace dev->tbusy (David + me)
374 * o replace dev->tstart (David + me)
375 * o remove dev->interrupt (David)
376 * o add SMP locking via spinlock in splxx (me)
377 * o add spinlock in interrupt handler (me)
378 * o use kernel watchdog instead of ours (me)
379 * o verify that all the changes make sense and work (me)
380 * - Re-sync kernel/pcmcia versions (not much actually)
381 * - A few other cleanups (David & me)...
382 *
383 * Changes made for release in 3.1.22 :
384 * ----------------------------------
385 * - Check that SMP works, remove annoying log message
386 *
387 * Changes made for release in 3.1.24 :
388 * ----------------------------------
389 * - Fix unfrequent card lockup when watchdog was reseting the hardware :
390 * o control first busy loop in wv_82593_cmd()
391 * o Extend spinlock protection in wv_hw_config()
392 *
393 * Changes made for release in 3.1.33 :
394 * ----------------------------------
395 * - Optional use new driver API for Wireless Extensions :
396 * o got rid of wavelan_ioctl()
397 * o use a bunch of iw_handler instead
398 *
399 * Changes made for release in 3.2.1 :
400 * ---------------------------------
401 * - Set dev->trans_start to avoid filling the logs
402 * (and generating useless abort commands)
403 * - Avoid deadlocks in mmc_out()/mmc_in()
404 *
405 * Wishes & dreams:
406 * ----------------
407 * - Cleanup and integrate the roaming code
408 * (std debug, set DomainID, decay avg and co...)
409 */
410
411/***************************** INCLUDES *****************************/
412
413/* Linux headers that we need */
414#include <linux/module.h>
415#include <linux/kernel.h>
416#include <linux/init.h>
417#include <linux/sched.h>
418#include <linux/ptrace.h>
419#include <linux/slab.h>
420#include <linux/string.h>
421#include <linux/timer.h>
422#include <linux/interrupt.h>
423#include <linux/spinlock.h>
424#include <linux/in.h>
425#include <linux/delay.h>
426#include <linux/bitops.h>
427#include <asm/uaccess.h>
428#include <asm/io.h>
429#include <asm/system.h>
430
431#include <linux/netdevice.h>
432#include <linux/etherdevice.h>
433#include <linux/skbuff.h>
434#include <linux/if_arp.h>
435#include <linux/ioport.h>
436#include <linux/fcntl.h>
437#include <linux/ethtool.h>
438#include <linux/wireless.h> /* Wireless extensions */
439#include <net/iw_handler.h> /* New driver API */
440
441/* Pcmcia headers that we need */
442#include <pcmcia/cs_types.h>
443#include <pcmcia/cs.h>
444#include <pcmcia/cistpl.h>
445#include <pcmcia/cisreg.h>
446#include <pcmcia/ds.h>
447
448/* Wavelan declarations */
449#include <linux/i82593.h> /* Definitions for the Intel chip */
450
451#include "wavelan_cs.h" /* Others bits of the hardware */
452
453/************************** DRIVER OPTIONS **************************/
454/*
455 * `#define' or `#undef' the following constant to change the behaviour
456 * of the driver...
457 */
458#define WAVELAN_ROAMING /* Include experimental roaming code */
459#undef WAVELAN_ROAMING_EXT /* Enable roaming wireless extensions */
460#undef SET_PSA_CRC /* Set the CRC in PSA (slower) */
461#define USE_PSA_CONFIG /* Use info from the PSA */
462#undef EEPROM_IS_PROTECTED /* Doesn't seem to be necessary */
463#define MULTICAST_AVOID /* Avoid extra multicast (I'm sceptical) */
464#undef SET_MAC_ADDRESS /* Experimental */
465
466/* Warning : these stuff will slow down the driver... */
467#define WIRELESS_SPY /* Enable spying addresses */
468#undef HISTOGRAM /* Enable histogram of sig level... */
469
470/****************************** DEBUG ******************************/
471
472#undef DEBUG_MODULE_TRACE /* Module insertion/removal */
473#undef DEBUG_CALLBACK_TRACE /* Calls made by Linux */
474#undef DEBUG_INTERRUPT_TRACE /* Calls to handler */
475#undef DEBUG_INTERRUPT_INFO /* type of interrupt & so on */
476#define DEBUG_INTERRUPT_ERROR /* problems */
477#undef DEBUG_CONFIG_TRACE /* Trace the config functions */
478#undef DEBUG_CONFIG_INFO /* What's going on... */
479#define DEBUG_CONFIG_ERRORS /* Errors on configuration */
480#undef DEBUG_TX_TRACE /* Transmission calls */
481#undef DEBUG_TX_INFO /* Header of the transmitted packet */
482#undef DEBUG_TX_FAIL /* Normal failure conditions */
483#define DEBUG_TX_ERROR /* Unexpected conditions */
484#undef DEBUG_RX_TRACE /* Transmission calls */
485#undef DEBUG_RX_INFO /* Header of the transmitted packet */
486#undef DEBUG_RX_FAIL /* Normal failure conditions */
487#define DEBUG_RX_ERROR /* Unexpected conditions */
488#undef DEBUG_PACKET_DUMP /* Dump packet on the screen */
489#undef DEBUG_IOCTL_TRACE /* Misc call by Linux */
490#undef DEBUG_IOCTL_INFO /* Various debug info */
491#define DEBUG_IOCTL_ERROR /* What's going wrong */
492#define DEBUG_BASIC_SHOW /* Show basic startup info */
493#undef DEBUG_VERSION_SHOW /* Print version info */
494#undef DEBUG_PSA_SHOW /* Dump psa to screen */
495#undef DEBUG_MMC_SHOW /* Dump mmc to screen */
496#undef DEBUG_SHOW_UNUSED /* Show also unused fields */
497#undef DEBUG_I82593_SHOW /* Show i82593 status */
498#undef DEBUG_DEVICE_SHOW /* Show device parameters */
499
500/************************ CONSTANTS & MACROS ************************/
501
502#ifdef DEBUG_VERSION_SHOW
503static const char *version = "wavelan_cs.c : v24 (SMP + wireless extensions) 11/1/02\n";
504#endif
505
506/* Watchdog temporisation */
507#define WATCHDOG_JIFFIES (256*HZ/100)
508
509/* Fix a bug in some old wireless extension definitions */
510#ifndef IW_ESSID_MAX_SIZE
511#define IW_ESSID_MAX_SIZE 32
512#endif
513
514/* ------------------------ PRIVATE IOCTL ------------------------ */
515
516#define SIOCSIPQTHR SIOCIWFIRSTPRIV /* Set quality threshold */
517#define SIOCGIPQTHR SIOCIWFIRSTPRIV + 1 /* Get quality threshold */
518#define SIOCSIPROAM SIOCIWFIRSTPRIV + 2 /* Set roaming state */
519#define SIOCGIPROAM SIOCIWFIRSTPRIV + 3 /* Get roaming state */
520
521#define SIOCSIPHISTO SIOCIWFIRSTPRIV + 4 /* Set histogram ranges */
522#define SIOCGIPHISTO SIOCIWFIRSTPRIV + 5 /* Get histogram values */
523
524/*************************** WaveLAN Roaming **************************/
525#ifdef WAVELAN_ROAMING /* Conditional compile, see above in options */
526
527#define WAVELAN_ROAMING_DEBUG 0 /* 1 = Trace of handover decisions */
528 /* 2 = Info on each beacon rcvd... */
529#define MAX_WAVEPOINTS 7 /* Max visible at one time */
530#define WAVEPOINT_HISTORY 5 /* SNR sample history slow search */
531#define WAVEPOINT_FAST_HISTORY 2 /* SNR sample history fast search */
532#define SEARCH_THRESH_LOW 10 /* SNR to enter cell search */
533#define SEARCH_THRESH_HIGH 13 /* SNR to leave cell search */
534#define WAVELAN_ROAMING_DELTA 1 /* Hysteresis value (+/- SNR) */
535#define CELL_TIMEOUT 2*HZ /* in jiffies */
536
537#define FAST_CELL_SEARCH 1 /* Boolean values... */
538#define NWID_PROMISC 1 /* for code clarity. */
539
540typedef struct wavepoint_beacon
541{
542 unsigned char dsap, /* Unused */
543 ssap, /* Unused */
544 ctrl, /* Unused */
545 O,U,I, /* Unused */
546 spec_id1, /* Unused */
547 spec_id2, /* Unused */
548 pdu_type, /* Unused */
549 seq; /* WavePoint beacon sequence number */
550 __be16 domain_id, /* WavePoint Domain ID */
551 nwid; /* WavePoint NWID */
552} wavepoint_beacon;
553
554typedef struct wavepoint_history
555{
556 unsigned short nwid; /* WavePoint's NWID */
557 int average_slow; /* SNR running average */
558 int average_fast; /* SNR running average */
559 unsigned char sigqual[WAVEPOINT_HISTORY]; /* Ringbuffer of recent SNR's */
560 unsigned char qualptr; /* Index into ringbuffer */
561 unsigned char last_seq; /* Last seq. no seen for WavePoint */
562 struct wavepoint_history *next; /* Next WavePoint in table */
563 struct wavepoint_history *prev; /* Previous WavePoint in table */
564 unsigned long last_seen; /* Time of last beacon recvd, jiffies */
565} wavepoint_history;
566
567struct wavepoint_table
568{
569 wavepoint_history *head; /* Start of ringbuffer */
570 int num_wavepoints; /* No. of WavePoints visible */
571 unsigned char locked; /* Table lock */
572};
573
574#endif /* WAVELAN_ROAMING */
575
576/****************************** TYPES ******************************/
577
578/* Shortcuts */
579typedef struct iw_statistics iw_stats;
580typedef struct iw_quality iw_qual;
581typedef struct iw_freq iw_freq;
582typedef struct net_local net_local;
583typedef struct timer_list timer_list;
584
585/* Basic types */
586typedef u_char mac_addr[WAVELAN_ADDR_SIZE]; /* Hardware address */
587
588/*
589 * Static specific data for the interface.
590 *
591 * For each network interface, Linux keep data in two structure. "device"
592 * keep the generic data (same format for everybody) and "net_local" keep
593 * the additional specific data.
594 */
595struct net_local
596{
597 dev_node_t node; /* ???? What is this stuff ???? */
598 struct net_device * dev; /* Reverse link... */
599 spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
600 struct pcmcia_device * link; /* pcmcia structure */
601 int nresets; /* Number of hw resets */
602 u_char configured; /* If it is configured */
603 u_char reconfig_82593; /* Need to reconfigure the controller */
604 u_char promiscuous; /* Promiscuous mode */
605 u_char allmulticast; /* All Multicast mode */
606 int mc_count; /* Number of multicast addresses */
607
608 int stop; /* Current i82593 Stop Hit Register */
609 int rfp; /* Last DMA machine receive pointer */
610 int overrunning; /* Receiver overrun flag */
611
612 iw_stats wstats; /* Wireless specific stats */
613
614 struct iw_spy_data spy_data;
615 struct iw_public_data wireless_data;
616
617#ifdef HISTOGRAM
618 int his_number; /* Number of intervals */
619 u_char his_range[16]; /* Boundaries of interval ]n-1; n] */
620 u_long his_sum[16]; /* Sum in interval */
621#endif /* HISTOGRAM */
622#ifdef WAVELAN_ROAMING
623 u_long domain_id; /* Domain ID we lock on for roaming */
624 int filter_domains; /* Check Domain ID of beacon found */
625 struct wavepoint_table wavepoint_table; /* Table of visible WavePoints*/
626 wavepoint_history * curr_point; /* Current wavepoint */
627 int cell_search; /* Searching for new cell? */
628 struct timer_list cell_timer; /* Garbage collection */
629#endif /* WAVELAN_ROAMING */
630 void __iomem *mem;
631};
632
633/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */
634static inline u_char /* data */
635 hasr_read(u_long); /* Read the host interface : base address */
636static void
637 hacr_write(u_long, /* Write to host interface : base address */
638 u_char), /* data */
639 hacr_write_slow(u_long,
640 u_char);
641static void
642 psa_read(struct net_device *, /* Read the Parameter Storage Area */
643 int, /* offset in PSA */
644 u_char *, /* buffer to fill */
645 int), /* size to read */
646 psa_write(struct net_device *, /* Write to the PSA */
647 int, /* Offset in psa */
648 u_char *, /* Buffer in memory */
649 int); /* Length of buffer */
650static void
651 mmc_out(u_long, /* Write 1 byte to the Modem Manag Control */
652 u_short,
653 u_char),
654 mmc_write(u_long, /* Write n bytes to the MMC */
655 u_char,
656 u_char *,
657 int);
658static u_char /* Read 1 byte from the MMC */
659 mmc_in(u_long,
660 u_short);
661static void
662 mmc_read(u_long, /* Read n bytes from the MMC */
663 u_char,
664 u_char *,
665 int),
666 fee_wait(u_long, /* Wait for frequency EEprom : base address */
667 int, /* Base delay to wait for */
668 int); /* Number of time to wait */
669static void
670 fee_read(u_long, /* Read the frequency EEprom : base address */
671 u_short, /* destination offset */
672 u_short *, /* data buffer */
673 int); /* number of registers */
674/* ---------------------- I82593 SUBROUTINES ----------------------- */
675static int
676 wv_82593_cmd(struct net_device *, /* synchronously send a command to i82593 */
677 char *,
678 int,
679 int);
680static inline int
681 wv_diag(struct net_device *); /* Diagnostique the i82593 */
682static int
683 read_ringbuf(struct net_device *, /* Read a receive buffer */
684 int,
685 char *,
686 int);
687static void
688 wv_82593_reconfig(struct net_device *); /* Reconfigure the controller */
689/* ------------------- DEBUG & INFO SUBROUTINES ------------------- */
690static void
691 wv_init_info(struct net_device *); /* display startup info */
692/* ------------------- IOCTL, STATS & RECONFIG ------------------- */
693static iw_stats *
694 wavelan_get_wireless_stats(struct net_device *);
695/* ----------------------- PACKET RECEPTION ----------------------- */
696static int
697 wv_start_of_frame(struct net_device *, /* Seek beggining of current frame */
698 int, /* end of frame */
699 int); /* start of buffer */
700static void
701 wv_packet_read(struct net_device *, /* Read a packet from a frame */
702 int,
703 int),
704 wv_packet_rcv(struct net_device *); /* Read all packets waiting */
705/* --------------------- PACKET TRANSMISSION --------------------- */
706static void
707 wv_packet_write(struct net_device *, /* Write a packet to the Tx buffer */
708 void *,
709 short);
710static netdev_tx_t
711 wavelan_packet_xmit(struct sk_buff *, /* Send a packet */
712 struct net_device *);
713/* -------------------- HARDWARE CONFIGURATION -------------------- */
714static int
715 wv_mmc_init(struct net_device *); /* Initialize the modem */
716static int
717 wv_ru_stop(struct net_device *), /* Stop the i82593 receiver unit */
718 wv_ru_start(struct net_device *); /* Start the i82593 receiver unit */
719static int
720 wv_82593_config(struct net_device *); /* Configure the i82593 */
721static int
722 wv_pcmcia_reset(struct net_device *); /* Reset the pcmcia interface */
723static int
724 wv_hw_config(struct net_device *); /* Reset & configure the whole hardware */
725static void
726 wv_hw_reset(struct net_device *); /* Same, + start receiver unit */
727static int
728 wv_pcmcia_config(struct pcmcia_device *); /* Configure the pcmcia interface */
729static void
730 wv_pcmcia_release(struct pcmcia_device *);/* Remove a device */
731/* ---------------------- INTERRUPT HANDLING ---------------------- */
732static irqreturn_t
733 wavelan_interrupt(int, /* Interrupt handler */
734 void *);
735static void
736 wavelan_watchdog(struct net_device *); /* Transmission watchdog */
737/* ------------------- CONFIGURATION CALLBACKS ------------------- */
738static int
739 wavelan_open(struct net_device *), /* Open the device */
740 wavelan_close(struct net_device *); /* Close the device */
741static void
742 wavelan_detach(struct pcmcia_device *p_dev); /* Destroy a removed device */
743
744/**************************** VARIABLES ****************************/
745
746/*
747 * Parameters that can be set with 'insmod'
748 * The exact syntax is 'insmod wavelan_cs.o <var>=<value>'
749 */
750
751/* Shared memory speed, in ns */
752static int mem_speed = 0;
753
754/* New module interface */
755module_param(mem_speed, int, 0);
756
757#ifdef WAVELAN_ROAMING /* Conditional compile, see above in options */
758/* Enable roaming mode ? No ! Please keep this to 0 */
759static int do_roaming = 0;
760module_param(do_roaming, bool, 0);
761#endif /* WAVELAN_ROAMING */
762
763MODULE_LICENSE("GPL");
764
765#endif /* WAVELAN_CS_P_H */
766
diff --git a/drivers/staging/winbond/README b/drivers/staging/winbond/TODO
index cb944e4bf174..8c1baaf6d8ad 100644
--- a/drivers/staging/winbond/README
+++ b/drivers/staging/winbond/TODO
@@ -2,10 +2,11 @@ TODO:
2 - sparse cleanups 2 - sparse cleanups
3 - checkpatch cleanups 3 - checkpatch cleanups
4 - kerneldoc cleanups 4 - kerneldoc cleanups
5 - fix severeCamelCaseInfestation
5 - remove typedefs 6 - remove typedefs
6 - remove unused ioctls 7 - remove unused ioctls
7 - use cfg80211 for regulatory stuff 8 - use cfg80211 for regulatory stuff
8 - fix 4k stack problems 9 - fix 4k stack problems
9 10
10Please send patches to Greg Kroah-Hartman <greg@kroah.com> and 11Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
11Pavel Machek <pavel@suse.cz> 12Pavel Machek <pavel@ucw.cz>
diff --git a/drivers/staging/winbond/core.h b/drivers/staging/winbond/core.h
index 0a2060bf4f94..b87d6c07600f 100644
--- a/drivers/staging/winbond/core.h
+++ b/drivers/staging/winbond/core.h
@@ -12,14 +12,16 @@
12#define WB_MAX_LINK_NAME_LEN 40 12#define WB_MAX_LINK_NAME_LEN 40
13 13
14struct wbsoft_priv { 14struct wbsoft_priv {
15 u32 adapterIndex; // 20060703.4 Add for using padapterContext global adapter point 15 u32 adapterIndex; /* 20060703.4 Add for using padapterContext
16 global adapter point */
16 17
17 struct wb_local_para sLocalPara; // Myself connected parameters 18 struct wb_local_para sLocalPara; /* Myself connected
19 parameters */
18 20
19 MLME_FRAME sMlmeFrame; // connect to peerSTA parameters 21 MLME_FRAME sMlmeFrame; /* connect to peerSTA parameters */
20 22
21 struct wb35_mto_params sMtoPara; // MTO_struct ... 23 struct wb35_mto_params sMtoPara; /* MTO_struct ... */
22 struct hw_data sHwData; //For HAL 24 struct hw_data sHwData; /*For HAL */
23 struct wb35_mds Mds; 25 struct wb35_mds Mds;
24 26
25 spinlock_t SpinLock; 27 spinlock_t SpinLock;
@@ -30,7 +32,7 @@ struct wbsoft_priv {
30 u32 TxByteCount; 32 u32 TxByteCount;
31 33
32 struct sk_buff *packet_return; 34 struct sk_buff *packet_return;
33 s32 netif_state_stop; // 1: stop 0: normal 35 s32 netif_state_stop; /* 1: stop 0: normal */
34 struct iw_statistics iw_stats; 36 struct iw_statistics iw_stats;
35 37
36 u8 LinkName[WB_MAX_LINK_NAME_LEN]; 38 u8 LinkName[WB_MAX_LINK_NAME_LEN];
diff --git a/drivers/staging/winbond/localpara.h b/drivers/staging/winbond/localpara.h
index fcf6a0442dc2..d7980575bed1 100644
--- a/drivers/staging/winbond/localpara.h
+++ b/drivers/staging/winbond/localpara.h
@@ -1,263 +1,267 @@
1#ifndef __WINBOND_LOCALPARA_H 1#ifndef __WINBOND_LOCALPARA_H
2#define __WINBOND_LOCALPARA_H 2#define __WINBOND_LOCALPARA_H
3 3
4//============================================================= 4/*
5// LocalPara.h - 5 * =============================================================
6//============================================================= 6 * LocalPara.h -
7 * =============================================================
8 */
7 9
8#include "mac_structures.h" 10#include "mac_structures.h"
9 11
10//Define the local ability 12/* Define the local ability */
11 13
12#define LOCAL_DEFAULT_BEACON_PERIOD 100 //ms 14#define LOCAL_DEFAULT_BEACON_PERIOD 100 /* ms */
13#define LOCAL_DEFAULT_ATIM_WINDOW 0 15#define LOCAL_DEFAULT_ATIM_WINDOW 0
14#define LOCAL_DEFAULT_ERP_CAPABILITY 0x0431 //0x0001: ESS 16#define LOCAL_DEFAULT_ERP_CAPABILITY 0x0431 /*
15 //0x0010: Privacy 17 * 0x0001: ESS
16 //0x0020: short preamble 18 * 0x0010: Privacy
17 //0x0400: short slot time 19 * 0x0020: short preamble
18#define LOCAL_DEFAULT_LISTEN_INTERVAL 5 20 * 0x0400: short slot time
21 */
22#define LOCAL_DEFAULT_LISTEN_INTERVAL 5
19 23
20//#define LOCAL_DEFAULT_24_CHANNEL_NUM 11 // channel 1..11 24#define LOCAL_DEFAULT_24_CHANNEL_NUM 13 /* channel 1..13 */
21#define LOCAL_DEFAULT_24_CHANNEL_NUM 13 // channel 1..13 25#define LOCAL_DEFAULT_5_CHANNEL_NUM 8 /* channel 36..64 */
22#define LOCAL_DEFAULT_5_CHANNEL_NUM 8 // channel 36..64
23 26
24#define LOCAL_USA_24_CHANNEL_NUM 11 27#define LOCAL_USA_24_CHANNEL_NUM 11
25#define LOCAL_USA_5_CHANNEL_NUM 12 28#define LOCAL_USA_5_CHANNEL_NUM 12
26#define LOCAL_EUROPE_24_CHANNEL_NUM 13 29#define LOCAL_EUROPE_24_CHANNEL_NUM 13
27#define LOCAL_EUROPE_5_CHANNEL_NUM 19 30#define LOCAL_EUROPE_5_CHANNEL_NUM 19
28#define LOCAL_JAPAN_24_CHANNEL_NUM 14 31#define LOCAL_JAPAN_24_CHANNEL_NUM 14
29#define LOCAL_JAPAN_5_CHANNEL_NUM 11 32#define LOCAL_JAPAN_5_CHANNEL_NUM 11
30#define LOCAL_UNKNOWN_24_CHANNEL_NUM 14 33#define LOCAL_UNKNOWN_24_CHANNEL_NUM 14
31#define LOCAL_UNKNOWN_5_CHANNEL_NUM 34 //not include 165 34#define LOCAL_UNKNOWN_5_CHANNEL_NUM 34 /* not include 165 */
32 35
33 36#define psLOCAL (&(adapter->sLocalPara))
34#define psLOCAL (&(adapter->sLocalPara))
35 37
36#define MODE_802_11_BG 0 38#define MODE_802_11_BG 0
37#define MODE_802_11_A 1 39#define MODE_802_11_A 1
38#define MODE_802_11_ABG 2 40#define MODE_802_11_ABG 2
39#define MODE_802_11_BG_IBSS 3 41#define MODE_802_11_BG_IBSS 3
40#define MODE_802_11_B 4 42#define MODE_802_11_B 4
41#define MODE_AUTO 255 43#define MODE_AUTO 255
42 44
43#define BAND_TYPE_DSSS 0 45#define BAND_TYPE_DSSS 0
44#define BAND_TYPE_OFDM_24 1 46#define BAND_TYPE_OFDM_24 1
45#define BAND_TYPE_OFDM_5 2 47#define BAND_TYPE_OFDM_5 2
46 48
47//refer Bitmap2RateValue table 49/* refer Bitmap2RateValue table */
48#define LOCAL_ALL_SUPPORTED_RATES_BITMAP 0x130c1a66 //the bitmap value of all the H/W supported rates 50
49 //1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 51/* the bitmap value of all the H/W supported rates: */
50#define LOCAL_OFDM_SUPPORTED_RATES_BITMAP 0x130c1240 //the bitmap value of all the H/W supported rates 52/* 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 */
51 //except to non-OFDM rates 53#define LOCAL_ALL_SUPPORTED_RATES_BITMAP 0x130c1a66
52 //6, 9, 12, 18, 24, 36, 48, 54 54/* the bitmap value of all the H/W supported rates except to non-OFDM rates: */
53 55/* 6, 9, 12, 18, 24, 36, 48, 54 */
54#define LOCAL_11B_SUPPORTED_RATE_BITMAP 0x826 56#define LOCAL_OFDM_SUPPORTED_RATES_BITMAP 0x130c1240
55#define LOCAL_11B_BASIC_RATE_BITMAP 0x826 57#define LOCAL_11B_SUPPORTED_RATE_BITMAP 0x826
56#define LOCAL_11B_OPERATION_RATE_BITMAP 0x826 58#define LOCAL_11B_BASIC_RATE_BITMAP 0x826
57#define LOCAL_11G_BASIC_RATE_BITMAP 0x826 //1, 2, 5.5, 11 59#define LOCAL_11B_OPERATION_RATE_BITMAP 0x826
58#define LOCAL_11G_OPERATION_RATE_BITMAP 0x130c1240 //6, 9, 12, 18, 24, 36, 48, 54 60#define LOCAL_11G_BASIC_RATE_BITMAP 0x826 /* 1, 2, 5.5, 11 */
59#define LOCAL_11A_BASIC_RATE_BITMAP 0x01001040 //6, 12, 24 61#define LOCAL_11G_OPERATION_RATE_BITMAP 0x130c1240 /* 6, 9, 12, 18, 24, 36, 48, 54 */
60#define LOCAL_11A_OPERATION_RATE_BITMAP 0x120c0200 //9, 18, 36, 48, 54 62#define LOCAL_11A_BASIC_RATE_BITMAP 0x01001040 /* 6, 12, 24 */
61 63#define LOCAL_11A_OPERATION_RATE_BITMAP 0x120c0200 /* 9, 18, 36, 48, 54 */
62 64
63 65
64#define PWR_ACTIVE 0 66#define PWR_ACTIVE 0
65#define PWR_SAVE 1 67#define PWR_SAVE 1
66#define PWR_TX_IDLE_CYCLE 6 68#define PWR_TX_IDLE_CYCLE 6
67 69
68//bPreambleMode and bSlotTimeMode 70/* bPreambleMode and bSlotTimeMode */
69#define AUTO_MODE 0 71#define AUTO_MODE 0
70#define LONG_MODE 1 72#define LONG_MODE 1
71 73
72//Region definition 74/* Region definition */
73#define REGION_AUTO 0xff 75#define REGION_AUTO 0xff
74#define REGION_UNKNOWN 0 76#define REGION_UNKNOWN 0
75#define REGION_EUROPE 1 //ETSI 77#define REGION_EUROPE 1 /* ETSI */
76#define REGION_JAPAN 2 //MKK 78#define REGION_JAPAN 2 /* MKK */
77#define REGION_USA 3 //FCC 79#define REGION_USA 3 /* FCC */
78#define REGION_FRANCE 4 //FRANCE 80#define REGION_FRANCE 4 /* FRANCE */
79#define REGION_SPAIN 5 //SPAIN 81#define REGION_SPAIN 5 /* SPAIN */
80#define REGION_ISRAEL 6 //ISRAEL 82#define REGION_ISRAEL 6 /* ISRAEL */
81//#define REGION_CANADA 7 //IC
82 83
83#define MAX_BSS_DESCRIPT_ELEMENT 32 84#define MAX_BSS_DESCRIPT_ELEMENT 32
84#define MAX_PMKID_CandidateList 16 85#define MAX_PMKID_CandidateList 16
85 86
86//High byte : Event number, low byte : reason 87/*
87//Event definition 88 * High byte : Event number, low byte : reason
88//-- SME/MLME event 89 * Event definition
89#define EVENT_RCV_DEAUTH 0x0100 90 * -- SME/MLME event
90#define EVENT_JOIN_FAIL 0x0200 91 */
91#define EVENT_AUTH_FAIL 0x0300 92#define EVENT_RCV_DEAUTH 0x0100
92#define EVENT_ASSOC_FAIL 0x0400 93#define EVENT_JOIN_FAIL 0x0200
93#define EVENT_LOST_SIGNAL 0x0500 94#define EVENT_AUTH_FAIL 0x0300
94#define EVENT_BSS_DESCRIPT_LACK 0x0600 95#define EVENT_ASSOC_FAIL 0x0400
95#define EVENT_COUNTERMEASURE 0x0700 96#define EVENT_LOST_SIGNAL 0x0500
96#define EVENT_JOIN_FILTER 0x0800 97#define EVENT_BSS_DESCRIPT_LACK 0x0600
97//-- TX/RX event 98#define EVENT_COUNTERMEASURE 0x0700
98#define EVENT_RX_BUFF_UNAVAILABLE 0x4100 99#define EVENT_JOIN_FILTER 0x0800
99 100/* -- TX/RX event */
100#define EVENT_CONNECT 0x8100 101#define EVENT_RX_BUFF_UNAVAILABLE 0x4100
101#define EVENT_DISCONNECT 0x8200 102
102#define EVENT_SCAN_REQ 0x8300 103#define EVENT_CONNECT 0x8100
103 104#define EVENT_DISCONNECT 0x8200
104//Reason of Event 105#define EVENT_SCAN_REQ 0x8300
106
107/* Reason of Event */
105#define EVENT_REASON_FILTER_BASIC_RATE 0x0001 108#define EVENT_REASON_FILTER_BASIC_RATE 0x0001
106#define EVENT_REASON_FILTER_PRIVACY 0x0002 109#define EVENT_REASON_FILTER_PRIVACY 0x0002
107#define EVENT_REASON_FILTER_AUTH_MODE 0x0003 110#define EVENT_REASON_FILTER_AUTH_MODE 0x0003
108#define EVENT_REASON_TIMEOUT 0x00ff 111#define EVENT_REASON_TIMEOUT 0x00ff
109 112
110// 20061108 WPS IE buffer 113/* Due to[E id][Length][OUI][Data] may be 257 bytes */
111#define MAX_IE_APPEND_SIZE 256 + 4 // Due to [E id][Length][OUI][Data] may 257 bytes 114#define MAX_IE_APPEND_SIZE (256 + 4)
112 115
113struct chan_info 116struct chan_info {
114{ 117 u8 band;
115 u8 band; 118 u8 ChanNo;
116 u8 ChanNo;
117}; 119};
118 120
119struct radio_off 121struct radio_off {
120{ 122 u8 boHwRadioOff;
121 u8 boHwRadioOff; 123 u8 boSwRadioOff;
122 u8 boSwRadioOff;
123}; 124};
124 125
125//=========================================================================== 126struct wb_local_para {
126struct wb_local_para 127 /* read from EPROM, manufacture set for each NetCard */
127{ 128 u8 PermanentAddress[MAC_ADDR_LENGTH + 2];
128 u8 PermanentAddress[ MAC_ADDR_LENGTH + 2 ]; // read from EPROM, manufacture set for each NetCard 129 /* the driver will use this one actually. */
129 u8 ThisMacAddress[ MAC_ADDR_LENGTH + 2 ]; // the driver will use actually. 130 u8 ThisMacAddress[MAC_ADDR_LENGTH + 2];
130 131 u32 MTUsize; /* Ind to Uplayer, Max transmission unit size */
131 u32 MTUsize; // Ind to Uplayer, Max transmission unit size 132 u8 region_INF; /* region setting from INF */
132 133 u8 region; /* real region setting of the device */
133 u8 region_INF; //region setting from INF 134 u8 Reserved_1[2];
134 u8 region; //real region setting of the device 135
135 u8 Reserved_1[2]; 136 /* power-save variables */
136 137 u8 iPowerSaveMode; /* 0 indicates on, 1 indicates off */
137 //// power-save variables 138 u8 ATIMmode;
138 u8 iPowerSaveMode; // 0 indicates it is on, 1 indicates it is off 139 u8 ExcludeUnencrypted;
139 u8 ATIMmode; 140 /* Unit ime count for the decision to enter PS mode */
140 u8 ExcludeUnencrypted; 141 u16 CheckCountForPS;
141 142 u8 boHasTxActivity;/* tx activity has occurred */
142 u16 CheckCountForPS; //Unit ime count for the decision to enter PS mode 143 u8 boMacPsValid; /* Power save mode obtained from H/W is valid or not */
143 u8 boHasTxActivity; //tx activity has occurred 144
144 u8 boMacPsValid; //Power save mode obtained from H/W is valid or not 145 /* Rate */
145 146 u8 TxRateMode; /*
146 //// Rate 147 * Initial, input from Registry,
147 u8 TxRateMode; // Initial, input from Registry, may be updated by GUI 148 * may be updated by GUI
148 //Tx Rate Mode: auto(DTO on), max, 1M, 2M, .. 149 * Tx Rate Mode: auto(DTO on), max, 1M, 2M, ..
149 u8 CurrentTxRate; // The current Tx rate 150 */
150 u8 CurrentTxRateForMng; // The current Tx rate for management frames 151 u8 CurrentTxRate; /* The current Tx rate */
151 // It will be decided before connection succeeds. 152 u8 CurrentTxRateForMng; /*
152 u8 CurrentTxFallbackRate; 153 * The current Tx rate for management
153 154 * frames. It will be decided before
154 //for Rate handler 155 * connection succeeds.
155 u8 BRateSet[32]; //basic rate set 156 */
156 u8 SRateSet[32]; //support rate set 157 u8 CurrentTxFallbackRate;
157 158
158 u8 NumOfBRate; 159 /* for Rate handler */
159 u8 NumOfSRate; 160 u8 BRateSet[32]; /* basic rate set */
160 u8 NumOfDsssRateInSRate; //number of DSSS rates in supported rate set 161 u8 SRateSet[32]; /* support rate set */
161 u8 reserved1; 162
162 163 u8 NumOfBRate;
163 u32 dwBasicRateBitmap; //bit map of basic rates 164 u8 NumOfSRate;
164 u32 dwSupportRateBitmap; //bit map of all support rates including 165 u8 NumOfDsssRateInSRate; /* number of DSSS rates in supported rate set */
165 //basic and operational rates 166 u8 reserved1;
166 167
167 ////For SME/MLME handler 168 u32 dwBasicRateBitmap; /* bit map of basic rates */
168 u16 wOldSTAindex; // valid when boHandover=TRUE, store old connected STA index 169
169 u16 wConnectedSTAindex; // Index of peerly connected AP or IBSS in 170 u32 dwSupportRateBitmap; /* bit map of all support rates including basic and operational rates */
170 // the descriptionset. 171
171 u16 Association_ID; // The Association ID in the (Re)Association 172
172 // Response frame. 173 /* For SME/MLME handler */
173 u16 ListenInterval; // The listen interval when SME invoking MLME_ 174
174 // (Re)Associate_Request(). 175 u16 wOldSTAindex; /* valid when boHandover=TRUE, store old connected STA index */
175 176 u16 wConnectedSTAindex; /* Index of peerly connected AP or IBSS in the descriptionset. */
176 struct radio_off RadioOffStatus; 177 u16 Association_ID; /* The Association ID in the (Re)Association Response frame. */
177 u8 Reserved0[2]; 178 u16 ListenInterval; /* The listen interval when SME invoking MLME_ (Re)Associate_Request(). */
178 179
179 u8 boMsRadioOff; // Ndis demands to be true when set Disassoc. OID and be false when set SSID OID. 180 struct radio_off RadioOffStatus;
180 u8 bAntennaNo; //which antenna 181 u8 Reserved0[2];
181 u8 bConnectFlag; //the connect status flag for roaming task 182 u8 boMsRadioOff; /* Ndis demands to be true when set Disassoc. OID and be false when set SSID OID. */
182 183 u8 bAntennaNo; /* which antenna */
183 u8 RoamStatus; 184 u8 bConnectFlag; /* the connect status flag for roaming task */
184 u8 reserved7[3]; 185
185 186 u8 RoamStatus;
186 struct chan_info CurrentChan; //Current channel no. and channel band. It may be changed by scanning. 187 u8 reserved7[3];
187 u8 boHandover; // Roaming, Hnadover to other AP. 188
188 u8 boCCAbusy; 189 struct chan_info CurrentChan; /* Current channel no. and channel band. It may be changed by scanning. */
189 190 u8 boHandover; /* Roaming, Hnadover to other AP. */
190 u16 CWMax; // It may not be the real value that H/W used 191 u8 boCCAbusy;
191 u8 CWMin; // 255: set according to 802.11 spec. 192
192 u8 reserved2; 193 u16 CWMax; /* It may not be the real value that H/W used */
193 194 u8 CWMin; /* 255: set according to 802.11 spec. */
194 //11G: 195 u8 reserved2;
195 u8 bMacOperationMode; // operation in 802.11b or 802.11g 196
196 u8 bSlotTimeMode; //AUTO, s32 197 /* 11G: */
197 u8 bPreambleMode; //AUTO, s32 198 u8 bMacOperationMode; /* operation in 802.11b or 802.11g */
198 u8 boNonERPpresent; 199 u8 bSlotTimeMode; /* AUTO, s32 */
199 200 u8 bPreambleMode; /* AUTO, s32 */
200 u8 boProtectMechanism; // H/W will take the necessary action based on this variable 201 u8 boNonERPpresent;
201 u8 boShortPreamble; // H/W will take the necessary action based on this variable 202
202 u8 boShortSlotTime; // H/W will take the necessary action based on this variable 203 u8 boProtectMechanism; /* H/W will take the necessary action based on this variable */
203 u8 reserved_3; 204 u8 boShortPreamble; /* Same here */
204 205 u8 boShortSlotTime; /* Same here */
205 u32 RSN_IE_Bitmap; //added by WS 206 u8 reserved_3;
206 u32 RSN_OUI_Type; //added by WS 207
207 208 u32 RSN_IE_Bitmap;
208 //For the BSSID 209 u32 RSN_OUI_Type;
209 u8 HwBssid[MAC_ADDR_LENGTH + 2]; 210
210 u32 HwBssidValid; 211 /* For the BSSID */
211 212 u8 HwBssid[MAC_ADDR_LENGTH + 2];
212 //For scan list 213 u32 HwBssidValid;
213 u8 BssListCount; //Total count of valid descriptor indexes 214
214 u8 boReceiveUncorrectInfo; //important settings in beacon/probe resp. have been changed 215 /* For scan list */
215 u8 NoOfJoinerInIbss; 216 u8 BssListCount; /* Total count of valid descriptor indexes */
216 u8 reserved_4; 217 u8 boReceiveUncorrectInfo; /* important settings in beacon/probe resp. have been changed */
217 218 u8 NoOfJoinerInIbss;
218 u8 BssListIndex[ (MAX_BSS_DESCRIPT_ELEMENT+3) & ~0x03 ]; //Store the valid descriptor indexes obtained from scannings 219 u8 reserved_4;
219 u8 JoinerInIbss[ (MAX_BSS_DESCRIPT_ELEMENT+3) & ~0x03 ]; //save the BssDescriptor index in this 220
220 //IBSS. The index 0 is local descriptor 221 /* Store the valid descriptor indexes obtained from scannings */
221 //(psLOCAL->wConnectedSTAindex). 222 u8 BssListIndex[(MAX_BSS_DESCRIPT_ELEMENT + 3) & ~0x03];
222 //If CONNECTED : NoOfJoinerInIbss >=2 223 /*
223 // else : NoOfJoinerInIbss <=1 224 * Save the BssDescriptor index in this IBSS.
224 225 * The index 0 is local descriptor (psLOCAL->wConnectedSTAindex).
225 //// General Statistics, count at Rx_handler or Tx_callback interrupt handler 226 * If CONNECTED : NoOfJoinerInIbss >= 2
226 u64 GS_XMIT_OK; // Good Frames Transmitted 227 * else : NoOfJoinerInIbss <= 1
227 u64 GS_RCV_OK; // Good Frames Received 228 */
228 u32 GS_RCV_ERROR; // Frames received with crc error 229 u8 JoinerInIbss[(MAX_BSS_DESCRIPT_ELEMENT + 3) & ~0x03];
229 u32 GS_XMIT_ERROR; // Bad Frames Transmitted 230
230 u32 GS_RCV_NO_BUFFER; // Receive Buffer underrun 231 /* General Statistics, count at Rx_handler or Tx_callback interrupt handler */
231 u32 GS_XMIT_ONE_COLLISION; // one collision 232 u64 GS_XMIT_OK; /* Good Frames Transmitted */
232 u32 GS_XMIT_MORE_COLLISIONS;// more collisions 233 u64 GS_RCV_OK; /* Good Frames Received */
233 234 u32 GS_RCV_ERROR; /* Frames received with crc error */
234 //================================================================ 235 u32 GS_XMIT_ERROR; /* Bad Frames Transmitted */
235 // Statistics (no matter whether it had done successfully) -wkchen 236 u32 GS_RCV_NO_BUFFER; /* Receive Buffer underrun */
236 //================================================================ 237 u32 GS_XMIT_ONE_COLLISION; /* one collision */
237 u32 _NumRxMSDU; 238 u32 GS_XMIT_MORE_COLLISIONS;/* more collisions */
238 u32 _NumTxMSDU; 239
239 u32 _dot11WEPExcludedCount; 240 /*
240 u32 _dot11WEPUndecryptableCount; 241 * ================================================================
241 u32 _dot11FrameDuplicateCount; 242 * Statistics (no matter whether it had done successfully) -wkchen
242 243 * ================================================================
243 struct chan_info IbssChanSetting; // 2B. Start IBSS Channel setting by registry or WWU. 244 */
244 u8 reserved_5[2]; //It may not be used after considering RF type, 245 u32 _NumRxMSDU;
245 //region and modulation type. 246 u32 _NumTxMSDU;
246 247 u32 _dot11WEPExcludedCount;
247 u8 reserved_6[2]; //two variables are for wep key error detection added by ws 02/02/04 248 u32 _dot11WEPUndecryptableCount;
248 249 u32 _dot11FrameDuplicateCount;
249 u32 bWepKeyError; 250
250 u32 bToSelfPacketReceived; 251 struct chan_info IbssChanSetting; /* 2B. Start IBSS Channel setting by registry or WWU. */
251 u32 WepKeyDetectTimerCount; 252 u8 reserved_5[2]; /* It may not be used after considering RF type, region and modulation type. */
252 253
253 u16 SignalLostTh; 254 u8 reserved_6[2]; /* two variables are for wep key error detection */
254 u16 SignalRoamTh; 255 u32 bWepKeyError;
255 256 u32 bToSelfPacketReceived;
256 // 20061108 WPS IE Append 257 u32 WepKeyDetectTimerCount;
258
259 u16 SignalLostTh;
260 u16 SignalRoamTh;
261
257 u8 IE_Append_data[MAX_IE_APPEND_SIZE]; 262 u8 IE_Append_data[MAX_IE_APPEND_SIZE];
258 u16 IE_Append_size; 263 u16 IE_Append_size;
259 u16 reserved_7; 264 u16 reserved_7;
260
261}; 265};
262 266
263#endif 267#endif
diff --git a/drivers/staging/winbond/mac_structures.h b/drivers/staging/winbond/mac_structures.h
index 0d1619601c0b..7441015cb187 100644
--- a/drivers/staging/winbond/mac_structures.h
+++ b/drivers/staging/winbond/mac_structures.h
@@ -1,4 +1,4 @@
1//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
2// MAC_Structures.h 2// MAC_Structures.h
3// 3//
4// This file contains the definitions and data structures used by SW-MAC. 4// This file contains the definitions and data structures used by SW-MAC.
@@ -16,24 +16,24 @@
16// Deleted some unused. 16// Deleted some unused.
17// 20021129 PD43 Austin 17// 20021129 PD43 Austin
18// 20030617 increase the 802.11g definition 18// 20030617 increase the 802.11g definition
19//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 19//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
20 20
21#ifndef _MAC_Structures_H_ 21#ifndef _MAC_Structures_H_
22#define _MAC_Structures_H_ 22#define _MAC_Structures_H_
23 23
24#include <linux/skbuff.h> 24#include <linux/skbuff.h>
25 25
26//========================================================= 26/*=========================================================
27// Some miscellaneous definitions 27// Some miscellaneous definitions
28//----- 28//-----*/
29#define MAX_CHANNELS 30 29#define MAX_CHANNELS 30
30#define MAC_ADDR_LENGTH 6 30#define MAC_ADDR_LENGTH 6
31#define MAX_WEP_KEY_SIZE 16 // 128 bits 31#define MAX_WEP_KEY_SIZE 16 /* 128 bits */
32#define MAX_802_11_FRAGMENT_NUMBER 10 // By spec 32#define MAX_802_11_FRAGMENT_NUMBER 10 /* By spec */
33 33
34//======================================================== 34/* ========================================================
35// 802.11 Frame define 35// 802.11 Frame define
36//----- 36//----- */
37#define MASK_PROTOCOL_VERSION_TYPE 0x0F 37#define MASK_PROTOCOL_VERSION_TYPE 0x0F
38#define MASK_FRAGMENT_NUMBER 0x000F 38#define MASK_FRAGMENT_NUMBER 0x000F
39#define SEQUENCE_NUMBER_SHIFT 4 39#define SEQUENCE_NUMBER_SHIFT 4
@@ -41,8 +41,8 @@
41#define DOT_11_MAC_HEADER_SIZE 24 41#define DOT_11_MAC_HEADER_SIZE 24
42#define DOT_11_SNAP_SIZE 6 42#define DOT_11_SNAP_SIZE 6
43#define DOT_11_DURATION_OFFSET 2 43#define DOT_11_DURATION_OFFSET 2
44#define DOT_11_SEQUENCE_OFFSET 22 //Sequence control offset 44#define DOT_11_SEQUENCE_OFFSET 22 /* Sequence control offset */
45#define DOT_11_TYPE_OFFSET 30 //The start offset of 802.11 Frame// 45#define DOT_11_TYPE_OFFSET 30 /* The start offset of 802.11 Frame// */
46#define DOT_11_DATA_OFFSET 24 46#define DOT_11_DATA_OFFSET 24
47#define DOT_11_DA_OFFSET 4 47#define DOT_11_DA_OFFSET 4
48#define DOT_3_TYPE_ARP 0x80F3 48#define DOT_3_TYPE_ARP 0x80F3
@@ -54,7 +54,7 @@
54#define MAX_ETHERNET_PACKET_SIZE 1514 54#define MAX_ETHERNET_PACKET_SIZE 1514
55 55
56 56
57//----- management : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) 57/* ----- management : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) */
58#define MAC_SUBTYPE_MNGMNT_ASSOC_REQUEST 0x00 58#define MAC_SUBTYPE_MNGMNT_ASSOC_REQUEST 0x00
59#define MAC_SUBTYPE_MNGMNT_ASSOC_RESPONSE 0x10 59#define MAC_SUBTYPE_MNGMNT_ASSOC_RESPONSE 0x10
60#define MAC_SUBTYPE_MNGMNT_REASSOC_REQUEST 0x20 60#define MAC_SUBTYPE_MNGMNT_REASSOC_REQUEST 0x20
@@ -67,7 +67,7 @@
67#define MAC_SUBTYPE_MNGMNT_AUTHENTICATION 0xB0 67#define MAC_SUBTYPE_MNGMNT_AUTHENTICATION 0xB0
68#define MAC_SUBTYPE_MNGMNT_DEAUTHENTICATION 0xC0 68#define MAC_SUBTYPE_MNGMNT_DEAUTHENTICATION 0xC0
69 69
70//----- control : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) 70/* ----- control : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) */
71#define MAC_SUBTYPE_CONTROL_PSPOLL 0xA4 71#define MAC_SUBTYPE_CONTROL_PSPOLL 0xA4
72#define MAC_SUBTYPE_CONTROL_RTS 0xB4 72#define MAC_SUBTYPE_CONTROL_RTS 0xB4
73#define MAC_SUBTYPE_CONTROL_CTS 0xC4 73#define MAC_SUBTYPE_CONTROL_CTS 0xC4
@@ -75,7 +75,7 @@
75#define MAC_SUBTYPE_CONTROL_CFEND 0xE4 75#define MAC_SUBTYPE_CONTROL_CFEND 0xE4
76#define MAC_SUBTYPE_CONTROL_CFEND_CFACK 0xF4 76#define MAC_SUBTYPE_CONTROL_CFEND_CFACK 0xF4
77 77
78//----- data : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) 78/* ----- data : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) */
79#define MAC_SUBTYPE_DATA 0x08 79#define MAC_SUBTYPE_DATA 0x08
80#define MAC_SUBTYPE_DATA_CFACK 0x18 80#define MAC_SUBTYPE_DATA_CFACK 0x18
81#define MAC_SUBTYPE_DATA_CFPOLL 0x28 81#define MAC_SUBTYPE_DATA_CFPOLL 0x28
@@ -85,12 +85,12 @@
85#define MAC_SUBTYPE_DATA_CFPOLL_NULL 0x68 85#define MAC_SUBTYPE_DATA_CFPOLL_NULL 0x68
86#define MAC_SUBTYPE_DATA_CFACK_CFPOLL_NULL 0x78 86#define MAC_SUBTYPE_DATA_CFACK_CFPOLL_NULL 0x78
87 87
88//----- Frame Type of Bits (2, 3) 88/* ----- Frame Type of Bits (2, 3) */
89#define MAC_TYPE_MANAGEMENT 0x00 89#define MAC_TYPE_MANAGEMENT 0x00
90#define MAC_TYPE_CONTROL 0x04 90#define MAC_TYPE_CONTROL 0x04
91#define MAC_TYPE_DATA 0x08 91#define MAC_TYPE_DATA 0x08
92 92
93//----- definitions for Management Frame Element ID (1 BYTE) 93/* ----- definitions for Management Frame Element ID (1 BYTE) */
94#define ELEMENT_ID_SSID 0 94#define ELEMENT_ID_SSID 0
95#define ELEMENT_ID_SUPPORTED_RATES 1 95#define ELEMENT_ID_SUPPORTED_RATES 1
96#define ELEMENT_ID_FH_PARAMETER_SET 2 96#define ELEMENT_ID_FH_PARAMETER_SET 2
@@ -116,13 +116,6 @@
116#define WLAN_MAX_PAIRWISE_CIPHER_SUITE_COUNT ((u16) 6) 116#define WLAN_MAX_PAIRWISE_CIPHER_SUITE_COUNT ((u16) 6)
117#define WLAN_MAX_AUTH_KEY_MGT_SUITE_LIST_COUNT ((u16) 2) 117#define WLAN_MAX_AUTH_KEY_MGT_SUITE_LIST_COUNT ((u16) 2)
118 118
119//========================================================
120typedef enum enum_PowerManagementMode
121{
122 ACTIVE = 0,
123 POWER_SAVE
124} WB_PM_Mode, *PWB_PM_MODE;
125
126//=================================================================== 119//===================================================================
127// Reason Code (Table 18): indicate the reason of DisAssoc, DeAuthen 120// Reason Code (Table 18): indicate the reason of DisAssoc, DeAuthen
128// length of ReasonCode is 2 Octs. 121// length of ReasonCode is 2 Octs.
@@ -137,7 +130,7 @@ typedef enum enum_PowerManagementMode
137#define REASON_CLASS3_FRAME_FROM_NONASSO_STA 7 130#define REASON_CLASS3_FRAME_FROM_NONASSO_STA 7
138#define DISASS_REASON_LEFT_BSS 8 131#define DISASS_REASON_LEFT_BSS 8
139#define REASON_NOT_AUTH_YET 9 132#define REASON_NOT_AUTH_YET 9
140//802.11i define 133/* 802.11i define */
141#define REASON_INVALID_IE 13 134#define REASON_INVALID_IE 13
142#define REASON_MIC_ERROR 14 135#define REASON_MIC_ERROR 14
143#define REASON_4WAY_HANDSHAKE_TIMEOUT 15 136#define REASON_4WAY_HANDSHAKE_TIMEOUT 15
@@ -182,13 +175,12 @@ enum enum_MMPDUResultCode
182} WB_MMPDURESULTCODE, *PWB_MMPDURESULTCODE; 175} WB_MMPDURESULTCODE, *PWB_MMPDURESULTCODE;
183*/ 176*/
184 177
185//=========================================================== 178/*===========================================================
186// enum_TxRate -- 179// enum_TxRate --
187// Define the transmission constants based on W89C32 MAC 180// Define the transmission constants based on W89C32 MAC
188// target specification. 181// target specification.
189//=========================================================== 182//===========================================================*/
190typedef enum enum_TxRate 183typedef enum enum_TxRate {
191{
192 TXRATE_1M = 0, 184 TXRATE_1M = 0,
193 TXRATE_2MLONG = 2, 185 TXRATE_2MLONG = 2,
194 TXRATE_2MSHORT = 3, 186 TXRATE_2MSHORT = 3,
@@ -196,7 +188,7 @@ typedef enum enum_TxRate
196 TXRATE_55MSHORT = 5, 188 TXRATE_55MSHORT = 5,
197 TXRATE_11MLONG = 6, 189 TXRATE_11MLONG = 6,
198 TXRATE_11MSHORT = 7, 190 TXRATE_11MSHORT = 7,
199 TXRATE_AUTO = 255 // PD43 20021108 191 TXRATE_AUTO = 255 /* PD43 20021108 */
200} WB_TXRATE, *PWB_TXRATE; 192} WB_TXRATE, *PWB_TXRATE;
201 193
202 194
@@ -232,7 +224,7 @@ typedef enum enum_TxRate
232#define RATE_54M 108 224#define RATE_54M 108
233#define RATE_MAX 255 225#define RATE_MAX 255
234 226
235//CAPABILITY 227/* CAPABILITY */
236#define CAPABILITY_ESS_BIT 0x0001 228#define CAPABILITY_ESS_BIT 0x0001
237#define CAPABILITY_IBSS_BIT 0x0002 229#define CAPABILITY_IBSS_BIT 0x0002
238#define CAPABILITY_CF_POLL_BIT 0x0004 230#define CAPABILITY_CF_POLL_BIT 0x0004
@@ -245,53 +237,48 @@ typedef enum enum_TxRate
245#define CAPABILITY_DSSS_OFDM_BIT 0x2000 237#define CAPABILITY_DSSS_OFDM_BIT 0x2000
246 238
247 239
248struct Capability_Information_Element 240struct Capability_Information_Element {
249{ 241 union {
250 union 242 u16 __attribute__ ((packed)) wValue;
251 { 243 #ifdef _BIG_ENDIAN_ /* 20060926 add by anson's endian */
252 u16 __attribute__ ((packed)) wValue; 244 struct _Capability {
253 #ifdef _BIG_ENDIAN_ //20060926 add by anson's endian 245 /* -- 11G -- */
254 struct _Capability 246 u8 Reserved3:2;
255 { 247 u8 DSSS_OFDM:1;
256 //-- 11G -- 248 u8 Reserved2:2;
257 u8 Reserved3 : 2; 249 u8 Short_Slot_Time:1;
258 u8 DSSS_OFDM : 1; 250 u8 Reserved1:2;
259 u8 Reserved2 : 2; 251 u8 Channel_Agility:1;
260 u8 Short_Slot_Time : 1; 252 u8 PBCC:1;
261 u8 Reserved1 : 2; 253 u8 ShortPreamble:1;
262 u8 Channel_Agility : 1; 254 u8 CF_Privacy:1;
263 u8 PBCC : 1; 255 u8 CF_Poll_Request:1;
264 u8 ShortPreamble : 1; 256 u8 CF_Pollable:1;
265 u8 CF_Privacy : 1; 257 u8 IBSS:1;
266 u8 CF_Poll_Request : 1; 258 u8 ESS:1;
267 u8 CF_Pollable : 1;
268 u8 IBSS : 1;
269 u8 ESS : 1;
270 } __attribute__ ((packed)) Capability; 259 } __attribute__ ((packed)) Capability;
271 #else 260 #else
272 struct _Capability 261 struct _Capability {
273 { 262 u8 ESS:1;
274 u8 ESS : 1; 263 u8 IBSS:1;
275 u8 IBSS : 1; 264 u8 CF_Pollable:1;
276 u8 CF_Pollable : 1; 265 u8 CF_Poll_Request:1;
277 u8 CF_Poll_Request : 1; 266 u8 CF_Privacy:1;
278 u8 CF_Privacy : 1; 267 u8 ShortPreamble:1;
279 u8 ShortPreamble : 1; 268 u8 PBCC:1;
280 u8 PBCC : 1; 269 u8 Channel_Agility:1;
281 u8 Channel_Agility : 1; 270 u8 Reserved1:2;
282 u8 Reserved1 : 2; 271 /* -- 11G -- */
283 //-- 11G -- 272 u8 Short_Slot_Time:1;
284 u8 Short_Slot_Time : 1; 273 u8 Reserved2:2;
285 u8 Reserved2 : 2; 274 u8 DSSS_OFDM:1;
286 u8 DSSS_OFDM : 1; 275 u8 Reserved3:2;
287 u8 Reserved3 : 2;
288 } __attribute__ ((packed)) Capability; 276 } __attribute__ ((packed)) Capability;
289 #endif 277 #endif
290 }__attribute__ ((packed)) ; 278 } __attribute__ ((packed)) ;
291}__attribute__ ((packed)); 279} __attribute__ ((packed));
292 280
293struct FH_Parameter_Set_Element 281struct FH_Parameter_Set_Element {
294{
295 u8 Element_ID; 282 u8 Element_ID;
296 u8 Length; 283 u8 Length;
297 u8 Dwell_Time[2]; 284 u8 Dwell_Time[2];
@@ -300,39 +287,34 @@ struct FH_Parameter_Set_Element
300 u8 Hop_Index; 287 u8 Hop_Index;
301}; 288};
302 289
303struct DS_Parameter_Set_Element 290struct DS_Parameter_Set_Element {
304{
305 u8 Element_ID; 291 u8 Element_ID;
306 u8 Length; 292 u8 Length;
307 u8 Current_Channel; 293 u8 Current_Channel;
308}; 294};
309 295
310struct Supported_Rates_Element 296struct Supported_Rates_Element {
311{
312 u8 Element_ID; 297 u8 Element_ID;
313 u8 Length; 298 u8 Length;
314 u8 SupportedRates[8]; 299 u8 SupportedRates[8];
315}__attribute__ ((packed)); 300} __attribute__ ((packed));
316 301
317struct SSID_Element 302struct SSID_Element {
318{
319 u8 Element_ID; 303 u8 Element_ID;
320 u8 Length; 304 u8 Length;
321 u8 SSID[32]; 305 u8 SSID[32];
322}__attribute__ ((packed)) ; 306} __attribute__ ((packed)) ;
323 307
324struct CF_Parameter_Set_Element 308struct CF_Parameter_Set_Element {
325{
326 u8 Element_ID; 309 u8 Element_ID;
327 u8 Length; 310 u8 Length;
328 u8 CFP_Count; 311 u8 CFP_Count;
329 u8 CFP_Period; 312 u8 CFP_Period;
330 u8 CFP_MaxDuration[2]; // in Time Units 313 u8 CFP_MaxDuration[2]; /* in Time Units */
331 u8 CFP_DurRemaining[2]; // in time units 314 u8 CFP_DurRemaining[2]; /* in time units */
332}; 315};
333 316
334struct TIM_Element 317struct TIM_Element {
335{
336 u8 Element_ID; 318 u8 Element_ID;
337 u8 Length; 319 u8 Length;
338 u8 DTIM_Count; 320 u8 DTIM_Count;
@@ -341,24 +323,21 @@ struct TIM_Element
341 u8 Partial_Virtual_Bitmap[251]; 323 u8 Partial_Virtual_Bitmap[251];
342}; 324};
343 325
344struct IBSS_Parameter_Set_Element 326struct IBSS_Parameter_Set_Element {
345{
346 u8 Element_ID; 327 u8 Element_ID;
347 u8 Length; 328 u8 Length;
348 u8 ATIM_Window[2]; 329 u8 ATIM_Window[2];
349}; 330};
350 331
351struct Challenge_Text_Element 332struct Challenge_Text_Element {
352{
353 u8 Element_ID; 333 u8 Element_ID;
354 u8 Length; 334 u8 Length;
355 u8 Challenge_Text[253]; 335 u8 Challenge_Text[253];
356}; 336};
357 337
358struct PHY_Parameter_Set_Element 338struct PHY_Parameter_Set_Element {
359{ 339/* int aSlotTime; */
360// int aSlotTime; 340/* int aSifsTime; */
361// int aSifsTime;
362 s32 aCCATime; 341 s32 aCCATime;
363 s32 aRxTxTurnaroundTime; 342 s32 aRxTxTurnaroundTime;
364 s32 aTxPLCPDelay; 343 s32 aTxPLCPDelay;
@@ -374,18 +353,17 @@ struct PHY_Parameter_Set_Element
374 s32 aPLCPHeaderLength; 353 s32 aPLCPHeaderLength;
375 s32 aMPDUDurationFactor; 354 s32 aMPDUDurationFactor;
376 s32 aMPDUMaxLength; 355 s32 aMPDUMaxLength;
377// int aCWmin; 356/* int aCWmin; */
378// int aCWmax; 357/* int aCWmax; */
379}; 358};
380 359
381//-- 11G -- 360/* -- 11G -- */
382struct ERP_Information_Element 361struct ERP_Information_Element {
383{
384 u8 Element_ID; 362 u8 Element_ID;
385 u8 Length; 363 u8 Length;
386 #ifdef _BIG_ENDIAN_ //20060926 add by anson's endian 364 #ifdef _BIG_ENDIAN_ /* 20060926 add by anson's endian */
387 u8 Reserved:5; //20060926 add by anson 365 u8 Reserved:5; /* 20060926 add by anson */
388 u8 Barker_Preamble_Mode:1; 366 u8 Barker_Preamble_Mode:1;
389 u8 Use_Protection:1; 367 u8 Use_Protection:1;
390 u8 NonERP_Present:1; 368 u8 NonERP_Present:1;
391 #else 369 #else
@@ -396,54 +374,53 @@ struct ERP_Information_Element
396 #endif 374 #endif
397}; 375};
398 376
399struct Extended_Supported_Rates_Element 377struct Extended_Supported_Rates_Element {
400{
401 u8 Element_ID; 378 u8 Element_ID;
402 u8 Length; 379 u8 Length;
403 u8 ExtendedSupportedRates[255]; 380 u8 ExtendedSupportedRates[255];
404}__attribute__ ((packed)); 381} __attribute__ ((packed));
405 382
406//WPA(802.11i draft 3.0) 383/* WPA(802.11i draft 3.0) */
407#define VERSION_WPA 1 384#define VERSION_WPA 1
408#ifdef _WPA2_ 385#ifdef _WPA2_
409#define VERSION_WPA2 1 386#define VERSION_WPA2 1
410#endif //end def _WPA2_ 387#endif /* end def _WPA2_ */
411#define OUI_WPA 0x00F25000 //WPA2.0 OUI=00:50:F2, the MSB is reserved for suite type 388#define OUI_WPA 0x00F25000 /* WPA2.0 OUI=00:50:F2, the MSB is reserved for suite type */
412#ifdef _WPA2_ 389#ifdef _WPA2_
413#define OUI_WPA2 0x00AC0F00 // for wpa2 change to 0x00ACOF04 by Ws 26/04/04 390#define OUI_WPA2 0x00AC0F00 /* for wpa2 change to 0x00ACOF04 by Ws 26/04/04 */
414#endif //end def _WPA2_ 391#endif /* end def _WPA2_ */
415 392
416#define OUI_WPA_ADDITIONAL 0x01 393#define OUI_WPA_ADDITIONAL 0x01
417#define WLAN_MIN_RSN_WPA_LENGTH 6 //added by ws 09/10/04 394#define WLAN_MIN_RSN_WPA_LENGTH 6 /* added by ws 09/10/04 */
418#ifdef _WPA2_ 395#ifdef _WPA2_
419#define WLAN_MIN_RSN_WPA2_LENGTH 2 // Fix to 2 09/14/05 396#define WLAN_MIN_RSN_WPA2_LENGTH 2 /* Fix to 2 09/14/05 */
420#endif //end def _WPA2_ 397#endif /* end def _WPA2_ */
421 398
422#define oui_wpa (u32)(OUI_WPA|OUI_WPA_ADDITIONAL) 399#define oui_wpa (u32)(OUI_WPA|OUI_WPA_ADDITIONAL)
423 400
424#define WPA_OUI_BIG ((u32) 0x01F25000)//added by ws 09/23/04 401#define WPA_OUI_BIG ((u32) 0x01F25000)/* added by ws 09/23/04 */
425#define WPA_OUI_LITTLE ((u32) 0x01F25001)//added by ws 09/23/04 402#define WPA_OUI_LITTLE ((u32) 0x01F25001)/* added by ws 09/23/04 */
426 403
427#define WPA_WPS_OUI cpu_to_le32(0x04F25000) // 20061108 For WPS. It's little endian. Big endian is 0x0050F204 404#define WPA_WPS_OUI cpu_to_le32(0x04F25000) /* 20061108 For WPS. It's little endian. Big endian is 0x0050F204 */
428 405
429//-----WPA2----- 406/* -----WPA2----- */
430#ifdef _WPA2_ 407#ifdef _WPA2_
431#define WPA2_OUI_BIG ((u32)0x01AC0F00) 408#define WPA2_OUI_BIG ((u32)0x01AC0F00)
432#define WPA2_OUI_LITTLE ((u32)0x01AC0F01) 409#define WPA2_OUI_LITTLE ((u32)0x01AC0F01)
433#endif //end def _WPA2_ 410#endif /* end def _WPA2_ */
434 411
435//Authentication suite 412/* Authentication suite */
436#define OUI_AUTH_WPA_NONE 0x00 //for WPA_NONE 413#define OUI_AUTH_WPA_NONE 0x00 /* for WPA_NONE */
437#define OUI_AUTH_8021X 0x01 414#define OUI_AUTH_8021X 0x01
438#define OUI_AUTH_PSK 0x02 415#define OUI_AUTH_PSK 0x02
439//Cipher suite 416/* Cipher suite */
440#define OUI_CIPHER_GROUP_KEY 0x00 //added by ws 05/21/04 417#define OUI_CIPHER_GROUP_KEY 0x00 /* added by ws 05/21/04 */
441#define OUI_CIPHER_WEP_40 0x01 418#define OUI_CIPHER_WEP_40 0x01
442#define OUI_CIPHER_TKIP 0x02 419#define OUI_CIPHER_TKIP 0x02
443#define OUI_CIPHER_CCMP 0x04 420#define OUI_CIPHER_CCMP 0x04
444#define OUI_CIPHER_WEP_104 0x05 421#define OUI_CIPHER_WEP_104 0x05
445 422
446typedef struct _SUITE_SELECTOR_ 423struct suite_selector
447{ 424{
448 union 425 union
449 { 426 {
@@ -454,35 +431,35 @@ typedef struct _SUITE_SELECTOR_
454 u8 Type; 431 u8 Type;
455 }SuitSelector; 432 }SuitSelector;
456 }; 433 };
457}SUITE_SELECTOR; 434};
458 435
459//-- WPA -- 436//-- WPA --
460struct RSN_Information_Element 437struct RSN_Information_Element
461{ 438{
462 u8 Element_ID; 439 u8 Element_ID;
463 u8 Length; 440 u8 Length;
464 SUITE_SELECTOR OuiWPAAdditional;//WPA version 2.0 additional field, and should be 00:50:F2:01 441 struct suite_selector OuiWPAAdditional; /* WPA version 2.0 additional field, and should be 00:50:F2:01 */
465 u16 Version; 442 u16 Version;
466 SUITE_SELECTOR GroupKeySuite; 443 struct suite_selector GroupKeySuite;
467 u16 PairwiseKeySuiteCount; 444 u16 PairwiseKeySuiteCount;
468 SUITE_SELECTOR PairwiseKeySuite[1]; 445 struct suite_selector PairwiseKeySuite[1];
469}__attribute__ ((packed)); 446}__attribute__ ((packed));
470struct RSN_Auth_Sub_Information_Element 447struct RSN_Auth_Sub_Information_Element
471{ 448{
472 u16 AuthKeyMngtSuiteCount; 449 u16 AuthKeyMngtSuiteCount;
473 SUITE_SELECTOR AuthKeyMngtSuite[1]; 450 struct suite_selector AuthKeyMngtSuite[1];
474}__attribute__ ((packed)); 451}__attribute__ ((packed));
475 452
476//-- WPA2 -- 453/* -- WPA2 -- */
477struct RSN_Capability_Element 454struct RSN_Capability_Element
478{ 455{
479 union 456 union
480 { 457 {
481 u16 __attribute__ ((packed)) wValue; 458 u16 __attribute__ ((packed)) wValue;
482 #ifdef _BIG_ENDIAN_ //20060927 add by anson's endian 459 #ifdef _BIG_ENDIAN_ /* 20060927 add by anson's endian */
483 struct _RSN_Capability 460 struct _RSN_Capability
484 { 461 {
485 u16 __attribute__ ((packed)) Reserved2 : 8; // 20051201 462 u16 __attribute__ ((packed)) Reserved2 : 8; /* 20051201 */
486 u16 __attribute__ ((packed)) Reserved1 : 2; 463 u16 __attribute__ ((packed)) Reserved1 : 2;
487 u16 __attribute__ ((packed)) GTK_Replay_Counter : 2; 464 u16 __attribute__ ((packed)) GTK_Replay_Counter : 2;
488 u16 __attribute__ ((packed)) PTK_Replay_Counter : 2; 465 u16 __attribute__ ((packed)) PTK_Replay_Counter : 2;
@@ -497,7 +474,7 @@ struct RSN_Capability_Element
497 u16 __attribute__ ((packed)) PTK_Replay_Counter : 2; 474 u16 __attribute__ ((packed)) PTK_Replay_Counter : 2;
498 u16 __attribute__ ((packed)) GTK_Replay_Counter : 2; 475 u16 __attribute__ ((packed)) GTK_Replay_Counter : 2;
499 u16 __attribute__ ((packed)) Reserved1 : 2; 476 u16 __attribute__ ((packed)) Reserved1 : 2;
500 u16 __attribute__ ((packed)) Reserved2 : 8; // 20051201 477 u16 __attribute__ ((packed)) Reserved2 : 8; /* 20051201 */
501 }__attribute__ ((packed)) RSN_Capability; 478 }__attribute__ ((packed)) RSN_Capability;
502 #endif 479 #endif
503 480
@@ -505,43 +482,43 @@ struct RSN_Capability_Element
505}__attribute__ ((packed)) ; 482}__attribute__ ((packed)) ;
506 483
507#ifdef _WPA2_ 484#ifdef _WPA2_
508typedef struct _PMKID 485struct pmkid
509{ 486{
510 u8 pValue[16]; 487 u8 pValue[16];
511}PMKID; 488};
512 489
513struct WPA2_RSN_Information_Element 490struct WPA2_RSN_Information_Element
514{ 491{
515 u8 Element_ID; 492 u8 Element_ID;
516 u8 Length; 493 u8 Length;
517 u16 Version; 494 u16 Version;
518 SUITE_SELECTOR GroupKeySuite; 495 struct suite_selector GroupKeySuite;
519 u16 PairwiseKeySuiteCount; 496 u16 PairwiseKeySuiteCount;
520 SUITE_SELECTOR PairwiseKeySuite[1]; 497 struct suite_selector PairwiseKeySuite[1];
521 498
522}__attribute__ ((packed)); 499}__attribute__ ((packed));
523 500
524struct WPA2_RSN_Auth_Sub_Information_Element 501struct WPA2_RSN_Auth_Sub_Information_Element
525{ 502{
526 u16 AuthKeyMngtSuiteCount; 503 u16 AuthKeyMngtSuiteCount;
527 SUITE_SELECTOR AuthKeyMngtSuite[1]; 504 struct suite_selector AuthKeyMngtSuite[1];
528}__attribute__ ((packed)); 505}__attribute__ ((packed));
529 506
530 507
531struct PMKID_Information_Element 508struct PMKID_Information_Element
532{ 509{
533 u16 PMKID_Count; 510 u16 PMKID_Count;
534 PMKID pmkid [16] ; 511 struct pmkid pmkid[16];
535}__attribute__ ((packed)); 512}__attribute__ ((packed));
536 513
537#endif //enddef _WPA2_ 514#endif /* enddef _WPA2_ */
538//============================================================ 515/*============================================================
539// MAC Frame structure (different type) and subfield structure 516// MAC Frame structure (different type) and subfield structure
540//============================================================ 517//============================================================*/
541struct MAC_frame_control 518struct MAC_frame_control
542{ 519{
543 u8 mac_frame_info; // a combination of the [Protocol Version, Control Type, Control Subtype] 520 u8 mac_frame_info; /* a combination of the [Protocol Version, Control Type, Control Subtype]*/
544 #ifdef _BIG_ENDIAN_ //20060927 add by anson's endian 521 #ifdef _BIG_ENDIAN_ /* 20060927 add by anson's endian */
545 u8 order:1; 522 u8 order:1;
546 u8 WEP:1; 523 u8 WEP:1;
547 u8 more_data:1; 524 u8 more_data:1;
@@ -563,24 +540,24 @@ struct MAC_frame_control
563} __attribute__ ((packed)); 540} __attribute__ ((packed));
564 541
565struct Management_Frame { 542struct Management_Frame {
566 struct MAC_frame_control frame_control; // 2B, ToDS,FromDS,MoreFrag,MoreData,Order=0 543 struct MAC_frame_control frame_control; /* 2B, ToDS,FromDS,MoreFrag,MoreData,Order=0 */
567 u16 duration; 544 u16 duration;
568 u8 DA[MAC_ADDR_LENGTH]; // Addr1 545 u8 DA[MAC_ADDR_LENGTH]; /* Addr1 */
569 u8 SA[MAC_ADDR_LENGTH]; // Addr2 546 u8 SA[MAC_ADDR_LENGTH]; /* Addr2 */
570 u8 BSSID[MAC_ADDR_LENGTH]; // Addr3 547 u8 BSSID[MAC_ADDR_LENGTH]; /* Addr3 */
571 u16 Sequence_Control; 548 u16 Sequence_Control;
572 // Management Frame Body <= 325 bytes 549 /* Management Frame Body <= 325 bytes */
573 // FCS 4 bytes 550 /* FCS 4 bytes */
574}__attribute__ ((packed)); 551} __attribute__ ((packed));
575 552
576// SW-MAC don't Tx/Rx Control-Frame, HW-MAC do it. 553/* SW-MAC don't Tx/Rx Control-Frame, HW-MAC do it. */
577struct Control_Frame { 554struct Control_Frame {
578 struct MAC_frame_control frame_control; // ToDS,FromDS,MoreFrag,Retry,MoreData,WEP,Order=0 555 struct MAC_frame_control frame_control; /* ToDS,FromDS,MoreFrag,Retry,MoreData,WEP,Order=0 */
579 u16 duration; 556 u16 duration;
580 u8 RA[MAC_ADDR_LENGTH]; 557 u8 RA[MAC_ADDR_LENGTH];
581 u8 TA[MAC_ADDR_LENGTH]; 558 u8 TA[MAC_ADDR_LENGTH];
582 u16 FCS; 559 u16 FCS;
583}__attribute__ ((packed)); 560} __attribute__ ((packed));
584 561
585struct Data_Frame { 562struct Data_Frame {
586 struct MAC_frame_control frame_control; 563 struct MAC_frame_control frame_control;
@@ -589,32 +566,29 @@ struct Data_Frame {
589 u8 Addr2[MAC_ADDR_LENGTH]; 566 u8 Addr2[MAC_ADDR_LENGTH];
590 u8 Addr3[MAC_ADDR_LENGTH]; 567 u8 Addr3[MAC_ADDR_LENGTH];
591 u16 Sequence_Control; 568 u16 Sequence_Control;
592 u8 Addr4[MAC_ADDR_LENGTH]; // only exist when ToDS=FromDS=1 569 u8 Addr4[MAC_ADDR_LENGTH]; /* only exist when ToDS=FromDS=1 */
593 // Data Frame Body <= 2312 570 /* Data Frame Body <= 2312 */
594 // FCS 571 /* FCS */
595}__attribute__ ((packed)); 572} __attribute__ ((packed));
596 573
597struct Disassociation_Frame_Body 574struct Disassociation_Frame_Body {
598{
599 u16 reasonCode; 575 u16 reasonCode;
600}__attribute__ ((packed)); 576} __attribute__ ((packed));
601 577
602struct Association_Request_Frame_Body 578struct Association_Request_Frame_Body {
603{
604 u16 capability_information; 579 u16 capability_information;
605 u16 listenInterval; 580 u16 listenInterval;
606 u8 Current_AP_Address[MAC_ADDR_LENGTH];//for reassociation only 581 u8 Current_AP_Address[MAC_ADDR_LENGTH];/* for reassociation only */
607 // SSID (2+32 bytes) 582 /* SSID (2+32 bytes) */
608 // Supported_Rates (2+8 bytes) 583 /* Supported_Rates (2+8 bytes) */
609}__attribute__ ((packed)); 584} __attribute__ ((packed));
610 585
611struct Association_Response_Frame_Body 586struct Association_Response_Frame_Body {
612{
613 u16 capability_information; 587 u16 capability_information;
614 u16 statusCode; 588 u16 statusCode;
615 u16 Association_ID; 589 u16 Association_ID;
616 struct Supported_Rates_Element supportedRates; 590 struct Supported_Rates_Element supportedRates;
617}__attribute__ ((packed)); 591} __attribute__ ((packed));
618 592
619/*struct Reassociation_Request_Frame_Body 593/*struct Reassociation_Request_Frame_Body
620{ 594{
@@ -624,44 +598,40 @@ struct Association_Response_Frame_Body
624 // SSID (2+32 bytes) 598 // SSID (2+32 bytes)
625 // Supported_Rates (2+8 bytes) 599 // Supported_Rates (2+8 bytes)
626};*/ 600};*/
627// eliminated by WS 07/22/04 comboined with associateion request frame. 601/* eliminated by WS 07/22/04 comboined with associateion request frame. */
628 602
629struct Reassociation_Response_Frame_Body 603struct Reassociation_Response_Frame_Body {
630{
631 u16 capability_information; 604 u16 capability_information;
632 u16 statusCode; 605 u16 statusCode;
633 u16 Association_ID; 606 u16 Association_ID;
634 struct Supported_Rates_Element supportedRates; 607 struct Supported_Rates_Element supportedRates;
635}__attribute__ ((packed)); 608} __attribute__ ((packed));
636 609
637struct Deauthentication_Frame_Body 610struct Deauthentication_Frame_Body {
638{
639 u16 reasonCode; 611 u16 reasonCode;
640}__attribute__ ((packed)); 612} __attribute__ ((packed));
641 613
642 614
643struct Probe_Response_Frame_Body 615struct Probe_Response_Frame_Body {
644{
645 u16 Timestamp; 616 u16 Timestamp;
646 u16 Beacon_Interval; 617 u16 Beacon_Interval;
647 u16 Capability_Information; 618 u16 Capability_Information;
648 // SSID 619 /* SSID
649 // Supported_Rates 620 // Supported_Rates
650 // PHY parameter Set (DS Parameters) 621 // PHY parameter Set (DS Parameters)
651 // CF parameter Set 622 // CF parameter Set
652 // IBSS parameter Set 623 // IBSS parameter Set */
653}__attribute__ ((packed)); 624} __attribute__ ((packed));
654 625
655struct Authentication_Frame_Body 626struct Authentication_Frame_Body {
656{
657 u16 algorithmNumber; 627 u16 algorithmNumber;
658 u16 sequenceNumber; 628 u16 sequenceNumber;
659 u16 statusCode; 629 u16 statusCode;
660 // NB: don't include ChallengeText in this structure 630 /* NB: don't include ChallengeText in this structure
661 // struct Challenge_Text_Element sChallengeTextElement; // wkchen added 631 // struct Challenge_Text_Element sChallengeTextElement; // wkchen added */
662}__attribute__ ((packed)); 632} __attribute__ ((packed));
663 633
664 634
665#endif // _MAC_Structure_H_ 635#endif /* _MAC_Structure_H_ */
666 636
667 637
diff --git a/drivers/staging/winbond/mds.c b/drivers/staging/winbond/mds.c
index 37e0c185d113..e8320a6f59af 100644
--- a/drivers/staging/winbond/mds.c
+++ b/drivers/staging/winbond/mds.c
@@ -6,7 +6,7 @@
6#include "wblinux_f.h" 6#include "wblinux_f.h"
7 7
8unsigned char 8unsigned char
9Mds_initial(struct wbsoft_priv * adapter) 9Mds_initial(struct wbsoft_priv *adapter)
10{ 10{
11 struct wb35_mds *pMds = &adapter->Mds; 11 struct wb35_mds *pMds = &adapter->Mds;
12 12
@@ -18,7 +18,7 @@ Mds_initial(struct wbsoft_priv * adapter)
18} 18}
19 19
20void 20void
21Mds_Destroy(struct wbsoft_priv * adapter) 21Mds_Destroy(struct wbsoft_priv *adapter)
22{ 22{
23} 23}
24 24
@@ -43,53 +43,53 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor
43 pT01 = (PT01_DESCRIPTOR)(buffer+4); 43 pT01 = (PT01_DESCRIPTOR)(buffer+4);
44 pNextT00 = (PT00_DESCRIPTOR)(buffer+OffsetSize); 44 pNextT00 = (PT00_DESCRIPTOR)(buffer+OffsetSize);
45 45
46 if( buffer[ DOT_11_DA_OFFSET+8 ] & 0x1 ) // +8 for USB hdr 46 if( buffer[ DOT_11_DA_OFFSET+8 ] & 0x1 ) /* +8 for USB hdr */
47 boGroupAddr = true; 47 boGroupAddr = true;
48 48
49 //======================================== 49 /******************************************
50 // Set RTS/CTS mechanism 50 * Set RTS/CTS mechanism
51 //======================================== 51 ******************************************/
52 if (!boGroupAddr) 52 if (!boGroupAddr)
53 { 53 {
54 //NOTE : If the protection mode is enabled and the MSDU will be fragmented, 54 /* NOTE : If the protection mode is enabled and the MSDU will be fragmented,
55 // the tx rates of MPDUs will all be DSSS rates. So it will not use 55 * the tx rates of MPDUs will all be DSSS rates. So it will not use
56 // CTS-to-self in this case. CTS-To-self will only be used when without 56 * CTS-to-self in this case. CTS-To-self will only be used when without
57 // fragmentation. -- 20050112 57 * fragmentation. -- 20050112 */
58 BodyLen = (u16)pT00->T00_frame_length; //include 802.11 header 58 BodyLen = (u16)pT00->T00_frame_length; /* include 802.11 header */
59 BodyLen += 4; //CRC 59 BodyLen += 4; /* CRC */
60 60
61 if( BodyLen >= CURRENT_RTS_THRESHOLD ) 61 if( BodyLen >= CURRENT_RTS_THRESHOLD )
62 RTS_on = true; // Using RTS 62 RTS_on = true; /* Using RTS */
63 else 63 else
64 { 64 {
65 if( pT01->T01_modulation_type ) // Is using OFDM 65 if( pT01->T01_modulation_type ) /* Is using OFDM */
66 { 66 {
67 if( CURRENT_PROTECT_MECHANISM ) // Is using protect 67 if( CURRENT_PROTECT_MECHANISM ) /* Is using protect */
68 CTS_on = true; // Using CTS 68 CTS_on = true; /* Using CTS */
69 } 69 }
70 } 70 }
71 } 71 }
72 72
73 if( RTS_on || CTS_on ) 73 if( RTS_on || CTS_on )
74 { 74 {
75 if( pT01->T01_modulation_type) // Is using OFDM 75 if( pT01->T01_modulation_type) /* Is using OFDM */
76 { 76 {
77 //CTS duration 77 /* CTS duration
78 // 2 SIFS + DATA transmit time + 1 ACK 78 * 2 SIFS + DATA transmit time + 1 ACK
79 // ACK Rate : 24 Mega bps 79 * ACK Rate : 24 Mega bps
80 // ACK frame length = 14 bytes 80 * ACK frame length = 14 bytes */
81 Duration = 2*DEFAULT_SIFSTIME + 81 Duration = 2*DEFAULT_SIFSTIME +
82 2*PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION + 82 2*PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION +
83 ((BodyLen*8 + 22 + Rate*4 - 1)/(Rate*4))*Tsym + 83 ((BodyLen*8 + 22 + Rate*4 - 1)/(Rate*4))*Tsym +
84 ((112 + 22 + 95)/96)*Tsym; 84 ((112 + 22 + 95)/96)*Tsym;
85 } 85 }
86 else //DSSS 86 else /* DSSS */
87 { 87 {
88 //CTS duration 88 /* CTS duration
89 // 2 SIFS + DATA transmit time + 1 ACK 89 * 2 SIFS + DATA transmit time + 1 ACK
90 // Rate : ?? Mega bps 90 * Rate : ?? Mega bps
91 // ACK frame length = 14 bytes 91 * ACK frame length = 14 bytes */
92 if( pT01->T01_plcp_header_length ) //long preamble 92 if( pT01->T01_plcp_header_length ) /* long preamble */
93 Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*2; 93 Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*2;
94 else 94 else
95 Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*2; 95 Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*2;
@@ -100,21 +100,21 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor
100 100
101 if( RTS_on ) 101 if( RTS_on )
102 { 102 {
103 if( pT01->T01_modulation_type ) // Is using OFDM 103 if( pT01->T01_modulation_type ) /* Is using OFDM */
104 { 104 {
105 //CTS + 1 SIFS + CTS duration 105 /* CTS + 1 SIFS + CTS duration
106 //CTS Rate : 24 Mega bps 106 * CTS Rate : 24 Mega bps
107 //CTS frame length = 14 bytes 107 * CTS frame length = 14 bytes */
108 Duration += (DEFAULT_SIFSTIME + 108 Duration += (DEFAULT_SIFSTIME +
109 PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION + 109 PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION +
110 ((112 + 22 + 95)/96)*Tsym); 110 ((112 + 22 + 95)/96)*Tsym);
111 } 111 }
112 else 112 else
113 { 113 {
114 //CTS + 1 SIFS + CTS duration 114 /* CTS + 1 SIFS + CTS duration
115 //CTS Rate : ?? Mega bps 115 * CTS Rate : ?? Mega bps
116 //CTS frame length = 14 bytes 116 * CTS frame length = 14 bytes */
117 if( pT01->T01_plcp_header_length ) //long preamble 117 if( pT01->T01_plcp_header_length ) /* long preamble */
118 Duration += LONG_PREAMBLE_PLUS_PLCPHEADER_TIME; 118 Duration += LONG_PREAMBLE_PLUS_PLCPHEADER_TIME;
119 else 119 else
120 Duration += SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME; 120 Duration += SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME;
@@ -123,15 +123,15 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor
123 } 123 }
124 } 124 }
125 125
126 // Set the value into USB descriptor 126 /* Set the value into USB descriptor */
127 pT01->T01_add_rts = RTS_on ? 1 : 0; 127 pT01->T01_add_rts = RTS_on ? 1 : 0;
128 pT01->T01_add_cts = CTS_on ? 1 : 0; 128 pT01->T01_add_cts = CTS_on ? 1 : 0;
129 pT01->T01_rts_cts_duration = Duration; 129 pT01->T01_rts_cts_duration = Duration;
130 } 130 }
131 131
132 //===================================== 132 /******************************************
133 // Fill the more fragment descriptor 133 * Fill the more fragment descriptor
134 //===================================== 134 ******************************************/
135 if( boGroupAddr ) 135 if( boGroupAddr )
136 Duration = 0; 136 Duration = 0;
137 else 137 else
@@ -139,14 +139,14 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor
139 for( i=pDes->FragmentCount-1; i>0; i-- ) 139 for( i=pDes->FragmentCount-1; i>0; i-- )
140 { 140 {
141 NextBodyLen = (u16)pNextT00->T00_frame_length; 141 NextBodyLen = (u16)pNextT00->T00_frame_length;
142 NextBodyLen += 4; //CRC 142 NextBodyLen += 4; /* CRC */
143 143
144 if( pT01->T01_modulation_type ) 144 if( pT01->T01_modulation_type )
145 { 145 {
146 //OFDM 146 /* OFDM
147 // data transmit time + 3 SIFS + 2 ACK 147 * data transmit time + 3 SIFS + 2 ACK
148 // Rate : ??Mega bps 148 * Rate : ??Mega bps
149 // ACK frame length = 14 bytes, tx rate = 24M 149 * ACK frame length = 14 bytes, tx rate = 24M */
150 Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION * 3; 150 Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION * 3;
151 Duration += (((NextBodyLen*8 + 22 + Rate*4 - 1)/(Rate*4)) * Tsym + 151 Duration += (((NextBodyLen*8 + 22 + Rate*4 - 1)/(Rate*4)) * Tsym +
152 (((2*14)*8 + 22 + 95)/96)*Tsym + 152 (((2*14)*8 + 22 + 95)/96)*Tsym +
@@ -154,12 +154,12 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor
154 } 154 }
155 else 155 else
156 { 156 {
157 //DSSS 157 /* DSSS
158 // data transmit time + 2 ACK + 3 SIFS 158 * data transmit time + 2 ACK + 3 SIFS
159 // Rate : ??Mega bps 159 * Rate : ??Mega bps
160 // ACK frame length = 14 bytes 160 * ACK frame length = 14 bytes
161 //TODO : 161 * TODO : */
162 if( pT01->T01_plcp_header_length ) //long preamble 162 if( pT01->T01_plcp_header_length ) /* long preamble */
163 Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*3; 163 Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*3;
164 else 164 else
165 Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*3; 165 Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*3;
@@ -168,39 +168,39 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor
168 DEFAULT_SIFSTIME*3 ); 168 DEFAULT_SIFSTIME*3 );
169 } 169 }
170 170
171 ((u16 *)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration 171 ((u16 *)buffer)[5] = cpu_to_le16(Duration); /* 4 USHOR for skip 8B USB, 2USHORT=FC + Duration */
172 172
173 //----20061009 add by anson's endian 173 /* ----20061009 add by anson's endian */
174 pNextT00->value = cpu_to_le32(pNextT00->value); 174 pNextT00->value = cpu_to_le32(pNextT00->value);
175 pT01->value = cpu_to_le32( pT01->value ); 175 pT01->value = cpu_to_le32( pT01->value );
176 //----end 20061009 add by anson's endian 176 /* ----end 20061009 add by anson's endian */
177 177
178 buffer += OffsetSize; 178 buffer += OffsetSize;
179 pT01 = (PT01_DESCRIPTOR)(buffer+4); 179 pT01 = (PT01_DESCRIPTOR)(buffer+4);
180 if (i != 1) //The last fragment will not have the next fragment 180 if (i != 1) /* The last fragment will not have the next fragment */
181 pNextT00 = (PT00_DESCRIPTOR)(buffer+OffsetSize); 181 pNextT00 = (PT00_DESCRIPTOR)(buffer+OffsetSize);
182 } 182 }
183 183
184 //===================================== 184 /*******************************************
185 // Fill the last fragment descriptor 185 * Fill the last fragment descriptor
186 //===================================== 186 *******************************************/
187 if( pT01->T01_modulation_type ) 187 if( pT01->T01_modulation_type )
188 { 188 {
189 //OFDM 189 /* OFDM
190 // 1 SIFS + 1 ACK 190 * 1 SIFS + 1 ACK
191 // Rate : 24 Mega bps 191 * Rate : 24 Mega bps
192 // ACK frame length = 14 bytes 192 * ACK frame length = 14 bytes */
193 Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION; 193 Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION;
194 //The Tx rate of ACK use 24M 194 /* The Tx rate of ACK use 24M */
195 Duration += (((112 + 22 + 95)/96)*Tsym + DEFAULT_SIFSTIME ); 195 Duration += (((112 + 22 + 95)/96)*Tsym + DEFAULT_SIFSTIME );
196 } 196 }
197 else 197 else
198 { 198 {
199 // DSSS 199 /* DSSS
200 // 1 ACK + 1 SIFS 200 * 1 ACK + 1 SIFS
201 // Rate : ?? Mega bps 201 * Rate : ?? Mega bps
202 // ACK frame length = 14 bytes(112 bits) 202 * ACK frame length = 14 bytes(112 bits) */
203 if( pT01->T01_plcp_header_length ) //long preamble 203 if( pT01->T01_plcp_header_length ) /* long preamble */
204 Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME; 204 Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME;
205 else 205 else
206 Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME; 206 Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME;
@@ -209,14 +209,14 @@ static void Mds_DurationSet(struct wbsoft_priv *adapter, struct wb35_descriptor
209 } 209 }
210 } 210 }
211 211
212 ((u16 *)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration 212 ((u16 *)buffer)[5] = cpu_to_le16(Duration); /* 4 USHOR for skip 8B USB, 2USHORT=FC + Duration */
213 pT00->value = cpu_to_le32(pT00->value); 213 pT00->value = cpu_to_le32(pT00->value);
214 pT01->value = cpu_to_le32(pT01->value); 214 pT01->value = cpu_to_le32(pT01->value);
215 //--end 20061009 add 215 /* --end 20061009 add */
216 216
217} 217}
218 218
219// The function return the 4n size of usb pk 219/* The function return the 4n size of usb pk */
220static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDes, u8 *TargetBuffer) 220static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDes, u8 *TargetBuffer)
221{ 221{
222 PT00_DESCRIPTOR pT00; 222 PT00_DESCRIPTOR pT00;
@@ -229,8 +229,8 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe
229 u8 buf_index, FragmentCount = 0; 229 u8 buf_index, FragmentCount = 0;
230 230
231 231
232 // Copy fragment body 232 /* Copy fragment body */
233 buffer = TargetBuffer; // shift 8B usb + 24B 802.11 233 buffer = TargetBuffer; /* shift 8B usb + 24B 802.11 */
234 SizeLeft = pDes->buffer_total_size; 234 SizeLeft = pDes->buffer_total_size;
235 buf_index = pDes->buffer_start_index; 235 buf_index = pDes->buffer_start_index;
236 236
@@ -240,35 +240,35 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe
240 CopySize = SizeLeft; 240 CopySize = SizeLeft;
241 if (SizeLeft > pDes->FragmentThreshold) { 241 if (SizeLeft > pDes->FragmentThreshold) {
242 CopySize = pDes->FragmentThreshold; 242 CopySize = pDes->FragmentThreshold;
243 pT00->T00_frame_length = 24 + CopySize;//Set USB length 243 pT00->T00_frame_length = 24 + CopySize; /* Set USB length */
244 } else 244 } else
245 pT00->T00_frame_length = 24 + SizeLeft;//Set USB length 245 pT00->T00_frame_length = 24 + SizeLeft; /* Set USB length */
246 246
247 SizeLeft -= CopySize; 247 SizeLeft -= CopySize;
248 248
249 // 1 Byte operation 249 /* 1 Byte operation */
250 pctmp = (u8 *)( buffer + 8 + DOT_11_SEQUENCE_OFFSET ); 250 pctmp = (u8 *)( buffer + 8 + DOT_11_SEQUENCE_OFFSET );
251 *pctmp &= 0xf0; 251 *pctmp &= 0xf0;
252 *pctmp |= FragmentCount;//931130.5.m 252 *pctmp |= FragmentCount; /* 931130.5.m */
253 if( !FragmentCount ) 253 if( !FragmentCount )
254 pT00->T00_first_mpdu = 1; 254 pT00->T00_first_mpdu = 1;
255 255
256 buffer += 32; // 8B usb + 24B 802.11 header 256 buffer += 32; /* 8B usb + 24B 802.11 header */
257 Size += 32; 257 Size += 32;
258 258
259 // Copy into buffer 259 /* Copy into buffer */
260 stmp = CopySize + 3; 260 stmp = CopySize + 3;
261 stmp &= ~0x03;//4n Alignment 261 stmp &= ~0x03; /* 4n Alignment */
262 Size += stmp;// Current 4n offset of mpdu 262 Size += stmp; /* Current 4n offset of mpdu */
263 263
264 while (CopySize) { 264 while (CopySize) {
265 // Copy body 265 /* Copy body */
266 src_buffer = pDes->buffer_address[buf_index]; 266 src_buffer = pDes->buffer_address[buf_index];
267 CopyLeft = CopySize; 267 CopyLeft = CopySize;
268 if (CopySize >= pDes->buffer_size[buf_index]) { 268 if (CopySize >= pDes->buffer_size[buf_index]) {
269 CopyLeft = pDes->buffer_size[buf_index]; 269 CopyLeft = pDes->buffer_size[buf_index];
270 270
271 // Get the next buffer of descriptor 271 /* Get the next buffer of descriptor */
272 buf_index++; 272 buf_index++;
273 buf_index %= MAX_DESCRIPTOR_BUFFER_INDEX; 273 buf_index %= MAX_DESCRIPTOR_BUFFER_INDEX;
274 } else { 274 } else {
@@ -283,14 +283,14 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe
283 CopySize -= CopyLeft; 283 CopySize -= CopyLeft;
284 } 284 }
285 285
286 // 931130.5.n 286 /* 931130.5.n */
287 if (pMds->MicAdd) { 287 if (pMds->MicAdd) {
288 if (!SizeLeft) { 288 if (!SizeLeft) {
289 pMds->MicWriteAddress[ pMds->MicWriteIndex ] = buffer - pMds->MicAdd; 289 pMds->MicWriteAddress[ pMds->MicWriteIndex ] = buffer - pMds->MicAdd;
290 pMds->MicWriteSize[ pMds->MicWriteIndex ] = pMds->MicAdd; 290 pMds->MicWriteSize[ pMds->MicWriteIndex ] = pMds->MicAdd;
291 pMds->MicAdd = 0; 291 pMds->MicAdd = 0;
292 } 292 }
293 else if( SizeLeft < 8 ) //931130.5.p 293 else if( SizeLeft < 8 ) /* 931130.5.p */
294 { 294 {
295 pMds->MicAdd = SizeLeft; 295 pMds->MicAdd = SizeLeft;
296 pMds->MicWriteAddress[ pMds->MicWriteIndex ] = buffer - ( 8 - SizeLeft ); 296 pMds->MicWriteAddress[ pMds->MicWriteIndex ] = buffer - ( 8 - SizeLeft );
@@ -299,10 +299,10 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe
299 } 299 }
300 } 300 }
301 301
302 // Does it need to generate the new header for next mpdu? 302 /* Does it need to generate the new header for next mpdu? */
303 if (SizeLeft) { 303 if (SizeLeft) {
304 buffer = TargetBuffer + Size; // Get the next 4n start address 304 buffer = TargetBuffer + Size; /* Get the next 4n start address */
305 memcpy( buffer, TargetBuffer, 32 );//Copy 8B USB +24B 802.11 305 memcpy( buffer, TargetBuffer, 32 ); /* Copy 8B USB +24B 802.11 */
306 pT00 = (PT00_DESCRIPTOR)buffer; 306 pT00 = (PT00_DESCRIPTOR)buffer;
307 pT00->T00_first_mpdu = 0; 307 pT00->T00_first_mpdu = 0;
308 } 308 }
@@ -312,16 +312,16 @@ static u16 Mds_BodyCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDe
312 312
313 pT00->T00_last_mpdu = 1; 313 pT00->T00_last_mpdu = 1;
314 pT00->T00_IsLastMpdu = 1; 314 pT00->T00_IsLastMpdu = 1;
315 buffer = (u8 *)pT00 + 8; // +8 for USB hdr 315 buffer = (u8 *)pT00 + 8; /* +8 for USB hdr */
316 buffer[1] &= ~0x04; // Clear more frag bit of 802.11 frame control 316 buffer[1] &= ~0x04; /* Clear more frag bit of 802.11 frame control */
317 pDes->FragmentCount = FragmentCount; // Update the correct fragment number 317 pDes->FragmentCount = FragmentCount; /* Update the correct fragment number */
318 return Size; 318 return Size;
319} 319}
320 320
321static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor *pDes, u8 *TargetBuffer) 321static void Mds_HeaderCopy(struct wbsoft_priv *adapter, struct wb35_descriptor *pDes, u8 *TargetBuffer)
322{ 322{
323 struct wb35_mds *pMds = &adapter->Mds; 323 struct wb35_mds *pMds = &adapter->Mds;
324 u8 *src_buffer = pDes->buffer_address[0];//931130.5.g 324 u8 *src_buffer = pDes->buffer_address[0]; /* 931130.5.g */
325 PT00_DESCRIPTOR pT00; 325 PT00_DESCRIPTOR pT00;
326 PT01_DESCRIPTOR pT01; 326 PT01_DESCRIPTOR pT01;
327 u16 stmp; 327 u16 stmp;
@@ -330,44 +330,44 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor
330 330
331 331
332 stmp = pDes->buffer_total_size; 332 stmp = pDes->buffer_total_size;
333 // 333 /*
334 // Set USB header 8 byte 334 * Set USB header 8 byte
335 // 335 */
336 pT00 = (PT00_DESCRIPTOR)TargetBuffer; 336 pT00 = (PT00_DESCRIPTOR)TargetBuffer;
337 TargetBuffer += 4; 337 TargetBuffer += 4;
338 pT01 = (PT01_DESCRIPTOR)TargetBuffer; 338 pT01 = (PT01_DESCRIPTOR)TargetBuffer;
339 TargetBuffer += 4; 339 TargetBuffer += 4;
340 340
341 pT00->value = 0;// Clear 341 pT00->value = 0; /* Clear */
342 pT01->value = 0;// Clear 342 pT01->value = 0; /* Clear */
343 343
344 pT00->T00_tx_packet_id = pDes->Descriptor_ID;// Set packet ID 344 pT00->T00_tx_packet_id = pDes->Descriptor_ID; /* Set packet ID */
345 pT00->T00_header_length = 24;// Set header length 345 pT00->T00_header_length = 24; /* Set header length */
346 pT01->T01_retry_abort_ebable = 1;//921013 931130.5.h 346 pT01->T01_retry_abort_ebable = 1; /* 921013 931130.5.h */
347 347
348 // Key ID setup 348 /* Key ID setup */
349 pT01->T01_wep_id = 0; 349 pT01->T01_wep_id = 0;
350 350
351 FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; //Do not fragment 351 FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; /* Do not fragment */
352 // Copy full data, the 1'st buffer contain all the data 931130.5.j 352 /* Copy full data, the 1'st buffer contain all the data 931130.5.j */
353 memcpy( TargetBuffer, src_buffer, DOT_11_MAC_HEADER_SIZE );// Copy header 353 memcpy( TargetBuffer, src_buffer, DOT_11_MAC_HEADER_SIZE ); /* Copy header */
354 pDes->buffer_address[0] = src_buffer + DOT_11_MAC_HEADER_SIZE; 354 pDes->buffer_address[0] = src_buffer + DOT_11_MAC_HEADER_SIZE;
355 pDes->buffer_total_size -= DOT_11_MAC_HEADER_SIZE; 355 pDes->buffer_total_size -= DOT_11_MAC_HEADER_SIZE;
356 pDes->buffer_size[0] = pDes->buffer_total_size; 356 pDes->buffer_size[0] = pDes->buffer_total_size;
357 357
358 // Set fragment threshold 358 /* Set fragment threshold */
359 FragmentThreshold -= (DOT_11_MAC_HEADER_SIZE + 4); 359 FragmentThreshold -= (DOT_11_MAC_HEADER_SIZE + 4);
360 pDes->FragmentThreshold = FragmentThreshold; 360 pDes->FragmentThreshold = FragmentThreshold;
361 361
362 // Set more frag bit 362 /* Set more frag bit */
363 TargetBuffer[1] |= 0x04;// Set more frag bit 363 TargetBuffer[1] |= 0x04; /* Set more frag bit */
364 364
365 // 365 /*
366 // Set tx rate 366 * Set tx rate
367 // 367 */
368 stmp = *(u16 *)(TargetBuffer+30); // 2n alignment address 368 stmp = *(u16 *)(TargetBuffer+30); /* 2n alignment address */
369 369
370 //Use basic rate 370 /* Use basic rate */
371 ctmp1 = ctmpf = CURRENT_TX_RATE_FOR_MNG; 371 ctmp1 = ctmpf = CURRENT_TX_RATE_FOR_MNG;
372 372
373 pDes->TxRate = ctmp1; 373 pDes->TxRate = ctmp1;
@@ -381,10 +381,10 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor
381 if( i == 1 ) 381 if( i == 1 )
382 ctmp1 = ctmpf; 382 ctmp1 = ctmpf;
383 383
384 pMds->TxRate[pDes->Descriptor_ID][i] = ctmp1; // backup the ta rate and fall back rate 384 pMds->TxRate[pDes->Descriptor_ID][i] = ctmp1; /* backup the ta rate and fall back rate */
385 385
386 if( ctmp1 == 108) ctmp2 = 7; 386 if( ctmp1 == 108) ctmp2 = 7;
387 else if( ctmp1 == 96 ) ctmp2 = 6; // Rate convert for USB 387 else if( ctmp1 == 96 ) ctmp2 = 6; /* Rate convert for USB */
388 else if( ctmp1 == 72 ) ctmp2 = 5; 388 else if( ctmp1 == 72 ) ctmp2 = 5;
389 else if( ctmp1 == 48 ) ctmp2 = 4; 389 else if( ctmp1 == 48 ) ctmp2 = 4;
390 else if( ctmp1 == 36 ) ctmp2 = 3; 390 else if( ctmp1 == 36 ) ctmp2 = 3;
@@ -394,7 +394,7 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor
394 else if( ctmp1 == 22 ) ctmp2 = 3; 394 else if( ctmp1 == 22 ) ctmp2 = 3;
395 else if( ctmp1 == 11 ) ctmp2 = 2; 395 else if( ctmp1 == 11 ) ctmp2 = 2;
396 else if( ctmp1 == 4 ) ctmp2 = 1; 396 else if( ctmp1 == 4 ) ctmp2 = 1;
397 else ctmp2 = 0; // if( ctmp1 == 2 ) or default 397 else ctmp2 = 0; /* if( ctmp1 == 2 ) or default */
398 398
399 if( i == 0 ) 399 if( i == 0 )
400 pT01->T01_transmit_rate = ctmp2; 400 pT01->T01_transmit_rate = ctmp2;
@@ -402,21 +402,21 @@ static void Mds_HeaderCopy(struct wbsoft_priv * adapter, struct wb35_descriptor
402 pT01->T01_fall_back_rate = ctmp2; 402 pT01->T01_fall_back_rate = ctmp2;
403 } 403 }
404 404
405 // 405 /*
406 // Set preamble type 406 * Set preamble type
407 // 407 */
408 if ((pT01->T01_modulation_type == 0) && (pT01->T01_transmit_rate == 0)) // RATE_1M 408 if ((pT01->T01_modulation_type == 0) && (pT01->T01_transmit_rate == 0)) /* RATE_1M */
409 pDes->PreambleMode = WLAN_PREAMBLE_TYPE_LONG; 409 pDes->PreambleMode = WLAN_PREAMBLE_TYPE_LONG;
410 else 410 else
411 pDes->PreambleMode = CURRENT_PREAMBLE_MODE; 411 pDes->PreambleMode = CURRENT_PREAMBLE_MODE;
412 pT01->T01_plcp_header_length = pDes->PreambleMode; // Set preamble 412 pT01->T01_plcp_header_length = pDes->PreambleMode; /* Set preamble */
413 413
414} 414}
415 415
416void 416void
417Mds_Tx(struct wbsoft_priv * adapter) 417Mds_Tx(struct wbsoft_priv *adapter)
418{ 418{
419 struct hw_data * pHwData = &adapter->sHwData; 419 struct hw_data *pHwData = &adapter->sHwData;
420 struct wb35_mds *pMds = &adapter->Mds; 420 struct wb35_mds *pMds = &adapter->Mds;
421 struct wb35_descriptor TxDes; 421 struct wb35_descriptor TxDes;
422 struct wb35_descriptor *pTxDes = &TxDes; 422 struct wb35_descriptor *pTxDes = &TxDes;
@@ -431,21 +431,21 @@ Mds_Tx(struct wbsoft_priv * adapter)
431 if (!hal_driver_init_OK(pHwData)) 431 if (!hal_driver_init_OK(pHwData))
432 return; 432 return;
433 433
434 //Only one thread can be run here 434 /* Only one thread can be run here */
435 if (atomic_inc_return(&pMds->TxThreadCount) != 1) 435 if (atomic_inc_return(&pMds->TxThreadCount) != 1)
436 goto cleanup; 436 goto cleanup;
437 437
438 // Start to fill the data 438 /* Start to fill the data */
439 do { 439 do {
440 FillIndex = pMds->TxFillIndex; 440 FillIndex = pMds->TxFillIndex;
441 if (pMds->TxOwner[FillIndex]) { // Is owned by software 0:Yes 1:No 441 if (pMds->TxOwner[FillIndex]) { /* Is owned by software 0:Yes 1:No */
442#ifdef _PE_TX_DUMP_ 442#ifdef _PE_TX_DUMP_
443 printk("[Mds_Tx] Tx Owner is H/W.\n"); 443 printk("[Mds_Tx] Tx Owner is H/W.\n");
444#endif 444#endif
445 break; 445 break;
446 } 446 }
447 447
448 XmitBufAddress = pMds->pTxBuffer + (MAX_USB_TX_BUFFER * FillIndex); //Get buffer 448 XmitBufAddress = pMds->pTxBuffer + (MAX_USB_TX_BUFFER * FillIndex); /* Get buffer */
449 XmitBufSize = 0; 449 XmitBufSize = 0;
450 FillCount = 0; 450 FillCount = 0;
451 do { 451 do {
@@ -453,37 +453,37 @@ Mds_Tx(struct wbsoft_priv * adapter)
453 if (!PacketSize) 453 if (!PacketSize)
454 break; 454 break;
455 455
456 //For Check the buffer resource 456 /* For Check the buffer resource */
457 FragmentThreshold = CURRENT_FRAGMENT_THRESHOLD; 457 FragmentThreshold = CURRENT_FRAGMENT_THRESHOLD;
458 //931130.5.b 458 /* 931130.5.b */
459 FragmentCount = PacketSize/FragmentThreshold + 1; 459 FragmentCount = PacketSize/FragmentThreshold + 1;
460 stmp = PacketSize + FragmentCount*32 + 8;//931130.5.c 8:MIC 460 stmp = PacketSize + FragmentCount*32 + 8; /* 931130.5.c 8:MIC */
461 if ((XmitBufSize + stmp) >= MAX_USB_TX_BUFFER) { 461 if ((XmitBufSize + stmp) >= MAX_USB_TX_BUFFER) {
462 printk("[Mds_Tx] Excess max tx buffer.\n"); 462 printk("[Mds_Tx] Excess max tx buffer.\n");
463 break; // buffer is not enough 463 break; /* buffer is not enough */
464 } 464 }
465 465
466 466
467 // 467 /*
468 // Start transmitting 468 * Start transmitting
469 // 469 */
470 BufferFilled = true; 470 BufferFilled = true;
471 471
472 /* Leaves first u8 intact */ 472 /* Leaves first u8 intact */
473 memset((u8 *)pTxDes + 1, 0, sizeof(struct wb35_descriptor) - 1); 473 memset((u8 *)pTxDes + 1, 0, sizeof(struct wb35_descriptor) - 1);
474 474
475 TxDesIndex = pMds->TxDesIndex;//Get the current ID 475 TxDesIndex = pMds->TxDesIndex; /* Get the current ID */
476 pTxDes->Descriptor_ID = TxDesIndex; 476 pTxDes->Descriptor_ID = TxDesIndex;
477 pMds->TxDesFrom[ TxDesIndex ] = 2;//Storing the information of source comming from 477 pMds->TxDesFrom[ TxDesIndex ] = 2; /* Storing the information of source comming from */
478 pMds->TxDesIndex++; 478 pMds->TxDesIndex++;
479 pMds->TxDesIndex %= MAX_USB_TX_DESCRIPTOR; 479 pMds->TxDesIndex %= MAX_USB_TX_DESCRIPTOR;
480 480
481 MLME_GetNextPacket( adapter, pTxDes ); 481 MLME_GetNextPacket( adapter, pTxDes );
482 482
483 // Copy header. 8byte USB + 24byte 802.11Hdr. Set TxRate, Preamble type 483 /* Copy header. 8byte USB + 24byte 802.11Hdr. Set TxRate, Preamble type */
484 Mds_HeaderCopy( adapter, pTxDes, XmitBufAddress ); 484 Mds_HeaderCopy( adapter, pTxDes, XmitBufAddress );
485 485
486 // For speed up Key setting 486 /* For speed up Key setting */
487 if (pTxDes->EapFix) { 487 if (pTxDes->EapFix) {
488#ifdef _PE_TX_DUMP_ 488#ifdef _PE_TX_DUMP_
489 printk("35: EPA 4th frame detected. Size = %d\n", PacketSize); 489 printk("35: EPA 4th frame detected. Size = %d\n", PacketSize);
@@ -491,41 +491,41 @@ Mds_Tx(struct wbsoft_priv * adapter)
491 pHwData->IsKeyPreSet = 1; 491 pHwData->IsKeyPreSet = 1;
492 } 492 }
493 493
494 // Copy (fragment) frame body, and set USB, 802.11 hdr flag 494 /* Copy (fragment) frame body, and set USB, 802.11 hdr flag */
495 CurrentSize = Mds_BodyCopy(adapter, pTxDes, XmitBufAddress); 495 CurrentSize = Mds_BodyCopy(adapter, pTxDes, XmitBufAddress);
496 496
497 // Set RTS/CTS and Normal duration field into buffer 497 /* Set RTS/CTS and Normal duration field into buffer */
498 Mds_DurationSet(adapter, pTxDes, XmitBufAddress); 498 Mds_DurationSet(adapter, pTxDes, XmitBufAddress);
499 499
500 //Shift to the next address 500 /* Shift to the next address */
501 XmitBufSize += CurrentSize; 501 XmitBufSize += CurrentSize;
502 XmitBufAddress += CurrentSize; 502 XmitBufAddress += CurrentSize;
503 503
504#ifdef _IBSS_BEACON_SEQ_STICK_ 504#ifdef _IBSS_BEACON_SEQ_STICK_
505 if ((XmitBufAddress[ DOT_11_DA_OFFSET+8 ] & 0xfc) != MAC_SUBTYPE_MNGMNT_PROBE_REQUEST) // +8 for USB hdr 505 if ((XmitBufAddress[ DOT_11_DA_OFFSET+8 ] & 0xfc) != MAC_SUBTYPE_MNGMNT_PROBE_REQUEST) /* +8 for USB hdr */
506#endif 506#endif
507 pMds->TxToggle = true; 507 pMds->TxToggle = true;
508 508
509 // Get packet to transmit completed, 1:TESTSTA 2:MLME 3: Ndis data 509 /* Get packet to transmit completed, 1:TESTSTA 2:MLME 3: Ndis data */
510 MLME_SendComplete(adapter, 0, true); 510 MLME_SendComplete(adapter, 0, true);
511 511
512 // Software TSC count 20060214 512 /* Software TSC count 20060214 */
513 pMds->TxTsc++; 513 pMds->TxTsc++;
514 if (pMds->TxTsc == 0) 514 if (pMds->TxTsc == 0)
515 pMds->TxTsc_2++; 515 pMds->TxTsc_2++;
516 516
517 FillCount++; // 20060928 517 FillCount++; /* 20060928 */
518 } while (HAL_USB_MODE_BURST(pHwData)); // End of multiple MSDU copy loop. false = single true = multiple sending 518 } while (HAL_USB_MODE_BURST(pHwData)); /* End of multiple MSDU copy loop. false = single true = multiple sending */
519 519
520 // Move to the next one, if necessary 520 /* Move to the next one, if necessary */
521 if (BufferFilled) { 521 if (BufferFilled) {
522 // size setting 522 /* size setting */
523 pMds->TxBufferSize[ FillIndex ] = XmitBufSize; 523 pMds->TxBufferSize[ FillIndex ] = XmitBufSize;
524 524
525 // 20060928 set Tx count 525 /* 20060928 set Tx count */
526 pMds->TxCountInBuffer[FillIndex] = FillCount; 526 pMds->TxCountInBuffer[FillIndex] = FillCount;
527 527
528 // Set owner flag 528 /* Set owner flag */
529 pMds->TxOwner[FillIndex] = 1; 529 pMds->TxOwner[FillIndex] = 1;
530 530
531 pMds->TxFillIndex++; 531 pMds->TxFillIndex++;
@@ -534,14 +534,14 @@ Mds_Tx(struct wbsoft_priv * adapter)
534 } else 534 } else
535 break; 535 break;
536 536
537 if (!PacketSize) // No more pk for transmitting 537 if (!PacketSize) /* No more pk for transmitting */
538 break; 538 break;
539 539
540 } while(true); 540 } while(true);
541 541
542 // 542 /*
543 // Start to send by lower module 543 * Start to send by lower module
544 // 544 */
545 if (!pHwData->IsKeyPreSet) 545 if (!pHwData->IsKeyPreSet)
546 Wb35Tx_start(adapter); 546 Wb35Tx_start(adapter);
547 547
@@ -550,28 +550,28 @@ Mds_Tx(struct wbsoft_priv * adapter)
550} 550}
551 551
552void 552void
553Mds_SendComplete(struct wbsoft_priv * adapter, PT02_DESCRIPTOR pT02) 553Mds_SendComplete(struct wbsoft_priv *adapter, PT02_DESCRIPTOR pT02)
554{ 554{
555 struct wb35_mds *pMds = &adapter->Mds; 555 struct wb35_mds *pMds = &adapter->Mds;
556 struct hw_data * pHwData = &adapter->sHwData; 556 struct hw_data *pHwData = &adapter->sHwData;
557 u8 PacketId = (u8)pT02->T02_Tx_PktID; 557 u8 PacketId = (u8)pT02->T02_Tx_PktID;
558 unsigned char SendOK = true; 558 unsigned char SendOK = true;
559 u8 RetryCount, TxRate; 559 u8 RetryCount, TxRate;
560 560
561 if (pT02->T02_IgnoreResult) // Don't care the result 561 if (pT02->T02_IgnoreResult) /* Don't care the result */
562 return; 562 return;
563 if (pT02->T02_IsLastMpdu) { 563 if (pT02->T02_IsLastMpdu) {
564 //TODO: DTO -- get the retry count and fragment count 564 /* TODO: DTO -- get the retry count and fragment count */
565 // Tx rate 565 /* Tx rate */
566 TxRate = pMds->TxRate[ PacketId ][ 0 ]; 566 TxRate = pMds->TxRate[ PacketId ][ 0 ];
567 RetryCount = (u8)pT02->T02_MPDU_Cnt; 567 RetryCount = (u8)pT02->T02_MPDU_Cnt;
568 if (pT02->value & FLAG_ERROR_TX_MASK) { 568 if (pT02->value & FLAG_ERROR_TX_MASK) {
569 SendOK = false; 569 SendOK = false;
570 570
571 if (pT02->T02_transmit_abort || pT02->T02_out_of_MaxTxMSDULiftTime) { 571 if (pT02->T02_transmit_abort || pT02->T02_out_of_MaxTxMSDULiftTime) {
572 //retry error 572 /* retry error */
573 pHwData->dto_tx_retry_count += (RetryCount+1); 573 pHwData->dto_tx_retry_count += (RetryCount+1);
574 //[for tx debug] 574 /* [for tx debug] */
575 if (RetryCount<7) 575 if (RetryCount<7)
576 pHwData->tx_retry_count[RetryCount] += RetryCount; 576 pHwData->tx_retry_count[RetryCount] += RetryCount;
577 else 577 else
@@ -583,7 +583,7 @@ Mds_SendComplete(struct wbsoft_priv * adapter, PT02_DESCRIPTOR pT02)
583 } 583 }
584 pHwData->dto_tx_frag_count += (RetryCount+1); 584 pHwData->dto_tx_frag_count += (RetryCount+1);
585 585
586 //[for tx debug] 586 /* [for tx debug] */
587 if (pT02->T02_transmit_abort_due_to_TBTT) 587 if (pT02->T02_transmit_abort_due_to_TBTT)
588 pHwData->tx_TBTT_start_count++; 588 pHwData->tx_TBTT_start_count++;
589 if (pT02->T02_transmit_without_encryption_due_to_wep_on_false) 589 if (pT02->T02_transmit_without_encryption_due_to_wep_on_false)
@@ -596,7 +596,7 @@ Mds_SendComplete(struct wbsoft_priv * adapter, PT02_DESCRIPTOR pT02)
596 MTO_SetTxCount(adapter, TxRate, RetryCount); 596 MTO_SetTxCount(adapter, TxRate, RetryCount);
597 } 597 }
598 598
599 // Clear send result buffer 599 /* Clear send result buffer */
600 pMds->TxResult[ PacketId ] = 0; 600 pMds->TxResult[ PacketId ] = 0;
601 } else 601 } else
602 pMds->TxResult[ PacketId ] |= ((u16)(pT02->value & 0x0ffff)); 602 pMds->TxResult[ PacketId ] |= ((u16)(pT02->value & 0x0ffff));
diff --git a/drivers/staging/winbond/mds_f.h b/drivers/staging/winbond/mds_f.h
index e09dd4b879d4..20e97bfe01e9 100644
--- a/drivers/staging/winbond/mds_f.h
+++ b/drivers/staging/winbond/mds_f.h
@@ -4,17 +4,17 @@
4#include "wbhal_s.h" 4#include "wbhal_s.h"
5#include "core.h" 5#include "core.h"
6 6
7unsigned char Mds_initial( struct wbsoft_priv *adapter ); 7unsigned char Mds_initial(struct wbsoft_priv *adapter);
8void Mds_Destroy( struct wbsoft_priv *adapter ); 8void Mds_Destroy(struct wbsoft_priv *adapter);
9void Mds_Tx( struct wbsoft_priv *adapter ); 9void Mds_Tx(struct wbsoft_priv *adapter);
10void Mds_SendComplete( struct wbsoft_priv *adapter, PT02_DESCRIPTOR pT02 ); 10void Mds_SendComplete(struct wbsoft_priv *adapter, PT02_DESCRIPTOR pt02);
11void Mds_MpduProcess( struct wbsoft_priv *adapter, struct wb35_descriptor *pRxDes ); 11void Mds_MpduProcess(struct wbsoft_priv *adapter, struct wb35_descriptor *prxdes);
12extern void DataDmp(u8 *pdata, u32 len, u32 offset); 12extern void DataDmp(u8 *pdata, u32 len, u32 offset);
13 13
14// For data frame sending 20060802 14/* For data frame sending */
15u16 MDS_GetPacketSize( struct wbsoft_priv *adapter ); 15u16 MDS_GetPacketSize(struct wbsoft_priv *adapter);
16void MDS_GetNextPacket( struct wbsoft_priv *adapter, struct wb35_descriptor *pDes ); 16void MDS_GetNextPacket(struct wbsoft_priv *adapter, struct wb35_descriptor *pdes);
17void MDS_GetNextPacketComplete( struct wbsoft_priv *adapter, struct wb35_descriptor *pDes ); 17void MDS_GetNextPacketComplete(struct wbsoft_priv *adapter, struct wb35_descriptor *pdes);
18void MDS_SendResult( struct wbsoft_priv *adapter, u8 PacketId, unsigned char SendOK ); 18void MDS_SendResult(struct wbsoft_priv *adapter, u8 packetid, unsigned char sendok);
19 19
20#endif 20#endif
diff --git a/drivers/staging/winbond/mds_s.h b/drivers/staging/winbond/mds_s.h
index 217ff0819a93..89328c5dbdad 100644
--- a/drivers/staging/winbond/mds_s.h
+++ b/drivers/staging/winbond/mds_s.h
@@ -15,122 +15,121 @@ enum {
15 WLAN_PREAMBLE_TYPE_LONG, 15 WLAN_PREAMBLE_TYPE_LONG,
16}; 16};
17 17
18//////////////////////////////////////////////////////////////////////////////////////////////////////// 18/*****************************************************************************/
19#define MAX_USB_TX_DESCRIPTOR 15 // IS89C35 ability 19#define MAX_USB_TX_DESCRIPTOR 15 /* IS89C35 ability */
20#define MAX_USB_TX_BUFFER_NUMBER 4 // Virtual pre-buffer number of MAX_USB_TX_BUFFER 20#define MAX_USB_TX_BUFFER_NUMBER 4 /* Virtual pre-buffer number of MAX_USB_TX_BUFFER */
21#define MAX_USB_TX_BUFFER 4096 // IS89C35 ability 4n alignment is required for hardware 21#define MAX_USB_TX_BUFFER 4096 /* IS89C35 ability 4n alignment is required for hardware */
22 22
23#define AUTH_REQUEST_PAIRWISE_ERROR 0 // _F flag setting 23#define AUTH_REQUEST_PAIRWISE_ERROR 0 /* _F flag setting */
24#define AUTH_REQUEST_GROUP_ERROR 1 // _F flag setting 24#define AUTH_REQUEST_GROUP_ERROR 1 /* _F flag setting */
25 25
26#define CURRENT_FRAGMENT_THRESHOLD (adapter->Mds.TxFragmentThreshold & ~0x1) 26#define CURRENT_FRAGMENT_THRESHOLD (adapter->Mds.TxFragmentThreshold & ~0x1)
27#define CURRENT_PREAMBLE_MODE psLOCAL->boShortPreamble?WLAN_PREAMBLE_TYPE_SHORT:WLAN_PREAMBLE_TYPE_LONG 27#define CURRENT_PREAMBLE_MODE (psLOCAL->boShortPreamble ? WLAN_PREAMBLE_TYPE_SHORT : WLAN_PREAMBLE_TYPE_LONG)
28#define CURRENT_TX_RATE_FOR_MNG adapter->sLocalPara.CurrentTxRateForMng 28#define CURRENT_TX_RATE_FOR_MNG (adapter->sLocalPara.CurrentTxRateForMng)
29#define CURRENT_PROTECT_MECHANISM psLOCAL->boProtectMechanism 29#define CURRENT_PROTECT_MECHANISM (psLOCAL->boProtectMechanism)
30#define CURRENT_RTS_THRESHOLD adapter->Mds.TxRTSThreshold 30#define CURRENT_RTS_THRESHOLD (adapter->Mds.TxRTSThreshold)
31 31
32#define MIB_GS_XMIT_OK_INC adapter->sLocalPara.GS_XMIT_OK++ 32#define MIB_GS_XMIT_OK_INC (adapter->sLocalPara.GS_XMIT_OK++)
33#define MIB_GS_RCV_OK_INC adapter->sLocalPara.GS_RCV_OK++ 33#define MIB_GS_RCV_OK_INC (adapter->sLocalPara.GS_RCV_OK++)
34#define MIB_GS_XMIT_ERROR_INC adapter->sLocalPara.GS_XMIT_ERROR 34#define MIB_GS_XMIT_ERROR_INC (adapter->sLocalPara.GS_XMIT_ERROR)
35 35
36//---------- TX ----------------------------------- 36/* ---------- TX ----------------------------------- */
37#define ETHERNET_TX_DESCRIPTORS MAX_USB_TX_BUFFER_NUMBER 37#define ETHERNET_TX_DESCRIPTORS MAX_USB_TX_BUFFER_NUMBER
38 38
39//---------- RX ------------------------------------ 39/* ---------- RX ----------------------------------- */
40#define ETHERNET_RX_DESCRIPTORS 8 //It's not necessary to allocate more than 2 in sync indicate 40#define ETHERNET_RX_DESCRIPTORS 8 /* It's not necessary to allocate more than 2 in sync indicate */
41 41
42//================================================================ 42/*
43// Configration default value 43 * ================================================================
44//================================================================ 44 * Configration default value
45#define DEFAULT_MULTICASTLISTMAX 32 // standard 45 * ================================================================
46#define DEFAULT_TX_BURSTLENGTH 3 // 32 Longwords 46 */
47#define DEFAULT_RX_BURSTLENGTH 3 // 32 Longwords 47#define DEFAULT_MULTICASTLISTMAX 32 /* standard */
48#define DEFAULT_TX_THRESHOLD 0 // Full Packet 48#define DEFAULT_TX_BURSTLENGTH 3 /* 32 Longwords */
49#define DEFAULT_RX_THRESHOLD 0 // Full Packet 49#define DEFAULT_RX_BURSTLENGTH 3 /* 32 Longwords */
50#define DEFAULT_MAXTXRATE 6 // 11 Mbps (Long) 50#define DEFAULT_TX_THRESHOLD 0 /* Full Packet */
51#define DEFAULT_CHANNEL 3 // Chennel 3 51#define DEFAULT_RX_THRESHOLD 0 /* Full Packet */
52#define DEFAULT_RTSThreshold 2347 // Disable RTS 52#define DEFAULT_MAXTXRATE 6 /* 11 Mbps (Long) */
53//#define DEFAULT_PME 1 // Enable 53#define DEFAULT_CHANNEL 3 /* Chennel 3 */
54#define DEFAULT_PME 0 // Disable 54#define DEFAULT_RTSThreshold 2347 /* Disable RTS */
55#define DEFAULT_SIFSTIME 10 55#define DEFAULT_PME 0 /* Disable */
56#define DEFAULT_ACKTIME_1ML 304 // 148+44+112 911220 by LCC 56#define DEFAULT_SIFSTIME 10
57#define DEFAULT_ACKTIME_2ML 248 // 148+44+56 911220 by LCC 57#define DEFAULT_ACKTIME_1ML 304 /* 148 + 44 + 112 */
58#define DEFAULT_FRAGMENT_THRESHOLD 2346 // No fragment 58#define DEFAULT_ACKTIME_2ML 248 /* 148 + 44 + 56 */
59#define DEFAULT_PREAMBLE_LENGTH 72 59#define DEFAULT_FRAGMENT_THRESHOLD 2346 /* No fragment */
60#define DEFAULT_PREAMBLE_LENGTH 72
60#define DEFAULT_PLCPHEADERTIME_LENGTH 24 61#define DEFAULT_PLCPHEADERTIME_LENGTH 24
61 62
62/*------------------------------------------------------------------------ 63/*
63 0.96 sec since time unit of the R03 for the current, W89C32 is about 60ns 64 * ------------------------------------------------------------------------
64 instead of 960 ns. This shall be fixed in the future W89C32 65 * 0.96 sec since time unit of the R03 for the current, W89C32 is about 60ns
65 -------------------------------------------------------------------------*/ 66 * instead of 960 ns. This shall be fixed in the future W89C32
66#define DEFAULT_MAX_RECEIVE_TIME 16440000 67 * -------------------------------------------------------------------------
68 */
69#define DEFAULT_MAX_RECEIVE_TIME 16440000
67 70
68#define RX_BUF_SIZE 2352 // 600 // For 301 must be multiple of 8 71#define RX_BUF_SIZE 2352 /* 600 - For 301 must be multiple of 8 */
69#define MAX_RX_DESCRIPTORS 18 // Rx Layer 2 72#define MAX_RX_DESCRIPTORS 18 /* Rx Layer 2 */
70 73
74/* For brand-new rx system */
75#define MDS_ID_IGNORE ETHERNET_RX_DESCRIPTORS
71 76
72// For brand-new rx system 77/* For Tx Packet status classify */
73#define MDS_ID_IGNORE ETHERNET_RX_DESCRIPTORS 78#define PACKET_FREE_TO_USE 0
74 79#define PACKET_COME_FROM_NDIS 0x08
75// For Tx Packet status classify 80#define PACKET_COME_FROM_MLME 0x80
76#define PACKET_FREE_TO_USE 0 81#define PACKET_SEND_COMPLETE 0xff
77#define PACKET_COME_FROM_NDIS 0x08
78#define PACKET_COME_FROM_MLME 0x80
79#define PACKET_SEND_COMPLETE 0xff
80 82
81struct wb35_mds { 83struct wb35_mds {
82 // For Tx usage 84 /* For Tx usage */
83 u8 TxOwner[ ((MAX_USB_TX_BUFFER_NUMBER + 3) & ~0x03) ]; 85 u8 TxOwner[((MAX_USB_TX_BUFFER_NUMBER + 3) & ~0x03)];
84 u8 *pTxBuffer; 86 u8 *pTxBuffer;
85 u16 TxBufferSize[ ((MAX_USB_TX_BUFFER_NUMBER + 1) & ~0x01) ]; 87 u16 TxBufferSize[((MAX_USB_TX_BUFFER_NUMBER + 1) & ~0x01)];
86 u8 TxDesFrom[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ];//931130.4.u // 1: MLME 2: NDIS control 3: NDIS data 88 u8 TxDesFrom[((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03)];/* 1: MLME 2: NDIS control 3: NDIS data */
87 u8 TxCountInBuffer[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ]; // 20060928 89 u8 TxCountInBuffer[((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03)];
88 90
89 u8 TxFillIndex;//the next index of TxBuffer can be used 91 u8 TxFillIndex; /* the next index of TxBuffer can be used */
90 u8 TxDesIndex;//The next index of TxDes can be used 92 u8 TxDesIndex; /* The next index of TxDes can be used */
91 u8 ScanTxPause; //data Tx pause because the scanning is progressing, but probe request Tx won't. 93 u8 ScanTxPause; /* data Tx pause because the scanning is progressing, but probe request Tx won't. */
92 u8 TxPause;//For pause the Mds_Tx modult 94 u8 TxPause; /*For pause the Mds_Tx modult */
93 95
94 atomic_t TxThreadCount;//For thread counting 931130.4.v 96 atomic_t TxThreadCount; /* For thread counting */
95//950301 delete due to HW
96// atomic_t TxConcurrentCount;//931130.4.w
97 97
98 u16 TxResult[ ((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01) ];//Collect the sending result of Mpdu 98 u16 TxResult[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)];/* Collect the sending result of Mpdu */
99 99
100 u8 MicRedundant[8]; // For tmp use 100 u8 MicRedundant[8]; /* For tmp use */
101 u8 *MicWriteAddress[2]; //The start address to fill the Mic, use 2 point due to Mic maybe fragment 101 u8 *MicWriteAddress[2]; /* The start address to fill the Mic, use 2 point due to Mic maybe fragment */
102 102
103 u16 MicWriteSize[2]; //931130.4.x 103 u16 MicWriteSize[2];
104 104
105 u16 MicAdd; // If want to add the Mic, this variable equal to 8 105 u16 MicAdd; /* If want to add the Mic, this variable equal to 8 */
106 u16 MicWriteIndex;//The number of MicWriteAddress 931130.4.y 106 u16 MicWriteIndex; /* The number of MicWriteAddress */
107 107
108 u8 TxRate[ ((MAX_USB_TX_DESCRIPTOR+1)&~0x01) ][2]; // [0] current tx rate, [1] fall back rate 108 u8 TxRate[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)][2]; /* [0] current tx rate, [1] fall back rate */
109 u8 TxInfo[ ((MAX_USB_TX_DESCRIPTOR+1)&~0x01) ]; //Store information for callback function 109 u8 TxInfo[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)]; /*Store information for callback function */
110 110
111 //WKCHEN added for scanning mechanism 111 /* for scanning mechanism */
112 u8 TxToggle; //It is TRUE if there are tx activities in some time interval 112 u8 TxToggle; /* It is TRUE if there are tx activities in some time interval */
113 u8 Reserved_[3]; 113 u8 Reserved_[3];
114 114
115 //---------- for Tx Parameter 115 /* ---- for Tx Parameter */
116 u16 TxFragmentThreshold; // For frame body only 116 u16 TxFragmentThreshold; /* For frame body only */
117 u16 TxRTSThreshold; 117 u16 TxRTSThreshold;
118 118
119 u32 MaxReceiveTime;//911220.3 Add 119 u32 MaxReceiveTime;
120
121 // depend on OS,
122 u32 MulticastListNo;
123 u32 PacketFilter; // Setting by NDIS, the current packet filter in use.
124 u8 MulticastAddressesArray[DEFAULT_MULTICASTLISTMAX][MAC_ADDR_LENGTH];
125 120
126 //COUNTERMEASURE 121 /* depend on OS, */
127 u8 bMICfailCount; 122 u32 MulticastListNo;
128 u8 boCounterMeasureBlock; 123 u32 PacketFilter; /* Setting by NDIS, the current packet filter in use. */
129 u8 reserved_4[2]; 124 u8 MulticastAddressesArray[DEFAULT_MULTICASTLISTMAX][MAC_ADDR_LENGTH];
130 125
131 u32 TxTsc; // 20060214 126 /* COUNTERMEASURE */
132 u32 TxTsc_2; // 20060214 127 u8 bMICfailCount;
128 u8 boCounterMeasureBlock;
129 u8 reserved_4[2];
133 130
131 u32 TxTsc;
132 u32 TxTsc_2;
134}; 133};
135 134
136#endif 135#endif
diff --git a/drivers/staging/winbond/mlme_s.h b/drivers/staging/winbond/mlme_s.h
index 1217a1c025e5..a7ef3c78022e 100644
--- a/drivers/staging/winbond/mlme_s.h
+++ b/drivers/staging/winbond/mlme_s.h
@@ -7,28 +7,29 @@
7#include "mac_structures.h" 7#include "mac_structures.h"
8#include "mds_s.h" 8#include "mds_s.h"
9 9
10//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 10/*
11// Mlme.h 11 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
12// Define the related definitions of MLME module 12 * Mlme.h
13// history -- 01/14/03' created 13 * Define the related definitions of MLME module
14// 14 *
15//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 15 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
16 16 */
17#define AUTH_REJECT_REASON_CHALLENGE_FAIL 1 17
18 18#define AUTH_REJECT_REASON_CHALLENGE_FAIL 1
19//====== the state of MLME module 19
20#define INACTIVE 0x0 20/* the state of MLME module */
21#define IDLE_SCAN 0x1 21#define INACTIVE 0x0
22 22#define IDLE_SCAN 0x1
23//====== the state of MLME/ESS module 23
24#define STATE_1 0x2 24/* the state of MLME/ESS module */
25#define AUTH_REQ 0x3 25#define STATE_1 0x2
26#define AUTH_WEP 0x4 26#define AUTH_REQ 0x3
27#define STATE_2 0x5 27#define AUTH_WEP 0x4
28#define ASSOC_REQ 0x6 28#define STATE_2 0x5
29#define STATE_3 0x7 29#define ASSOC_REQ 0x6
30 30#define STATE_3 0x7
31//====== the state of MLME/IBSS module 31
32/* the state of MLME/IBSS module */
32#define IBSS_JOIN_SYNC 0x8 33#define IBSS_JOIN_SYNC 0x8
33#define IBSS_AUTH_REQ 0x9 34#define IBSS_AUTH_REQ 0x9
34#define IBSS_AUTH_CHANLGE 0xa 35#define IBSS_AUTH_CHANLGE 0xa
@@ -38,159 +39,150 @@
38 39
39 40
40 41
41//========================================= 42/*
42//depend on D5C(MAC timing control 03 register): MaxTxMSDULifeTime default 0x80000us 43 * =========================================
43#define AUTH_FAIL_TIMEOUT 550 44 * depend on D5C(MAC timing control 03 register):
44#define ASSOC_FAIL_TIMEOUT 550 45 * MaxTxMSDULifeTime default 0x80000us
46 */
47#define AUTH_FAIL_TIMEOUT 550
48#define ASSOC_FAIL_TIMEOUT 550
45#define REASSOC_FAIL_TIMEOUT 550 49#define REASSOC_FAIL_TIMEOUT 550
46 50
47 51/* MLME task global CONSTANTS, STRUCTURE, variables */
48 52
49// 53/* =========================================
50// MLME task global CONSTANTS, STRUCTURE, variables 54 * enum_ResultCode --
51// 55 * Result code returned from MLME to SME.
52 56 * =========================================
53 57 */
54///////////////////////////////////////////////////////////// 58#define MLME_SUCCESS 0 /* follow spec. */
55// enum_ResultCode -- 59#define INVALID_PARAMETERS 1 /* Not following spec. */
56// Result code returned from MLME to SME. 60#define NOT_SUPPPORTED 2
57// 61#define TIMEOUT 3
58///////////////////////////////////////////////////////////// 62#define TOO_MANY_SIMULTANEOUS_REQUESTS 4
59// PD43 20030829 Modifiled 63#define REFUSED 5
60//#define SUCCESS 0 64#define BSS_ALREADY_STARTED_OR_JOINED 6
61#define MLME_SUCCESS 0 //follow spec. 65#define TRANSMIT_FRAME_FAIL 7
62#define INVALID_PARAMETERS 1 //Not following spec. 66#define NO_BSS_FOUND 8
63#define NOT_SUPPPORTED 2 67#define RETRY 9
64#define TIMEOUT 3 68#define GIVE_UP 10
65#define TOO_MANY_SIMULTANEOUS_REQUESTS 4 69
66#define REFUSED 5 70
67#define BSS_ALREADY_STARTED_OR_JOINED 6 71#define OPEN_AUTH 0
68#define TRANSMIT_FRAME_FAIL 7 72#define SHARE_AUTH 1
69#define NO_BSS_FOUND 8 73#define ANY_AUTH 2
70#define RETRY 9 74#define WPA_AUTH 3 /* for WPA */
71#define GIVE_UP 10 75#define WPAPSK_AUTH 4
72 76#define WPANONE_AUTH 5
73
74#define OPEN_AUTH 0
75#define SHARE_AUTH 1
76#define ANY_AUTH 2
77#define WPA_AUTH 3 //for WPA
78#define WPAPSK_AUTH 4
79#define WPANONE_AUTH 5
80///////////////////////////////////////////// added by ws 04/19/04
81#ifdef _WPA2_ 77#ifdef _WPA2_
82#define WPA2_AUTH 6//for WPA2 78#define WPA2_AUTH 6 /* for WPA2 */
83#define WPA2PSK_AUTH 7 79#define WPA2PSK_AUTH 7
84#endif //end def _WPA2_ 80#endif /* end def _WPA2_ */
85 81
86////////////////////////////////////////////////////////////////// 82/*
87//define the msg type of MLME module 83 * =========================================
88////////////////////////////////////////////////////////////////// 84 * define the msg type of MLME module
89//-------------------------------------------------------- 85 * =========================================
90//from SME 86 */
91 87
92#define MLMEMSG_AUTH_REQ 0x0b 88/* from SME */
93#define MLMEMSG_DEAUTH_REQ 0x0c 89#define MLMEMSG_AUTH_REQ 0x0b
94#define MLMEMSG_ASSOC_REQ 0x0d 90#define MLMEMSG_DEAUTH_REQ 0x0c
95#define MLMEMSG_REASSOC_REQ 0x0e 91#define MLMEMSG_ASSOC_REQ 0x0d
96#define MLMEMSG_DISASSOC_REQ 0x0f 92#define MLMEMSG_REASSOC_REQ 0x0e
97#define MLMEMSG_START_IBSS_REQ 0x10 93#define MLMEMSG_DISASSOC_REQ 0x0f
98#define MLMEMSG_IBSS_NET_CFM 0x11 94#define MLMEMSG_START_IBSS_REQ 0x10
99 95#define MLMEMSG_IBSS_NET_CFM 0x11
100//from RX : 96
101#define MLMEMSG_RCV_MLMEFRAME 0x20 97/* from RX */
102#define MLMEMSG_RCV_ASSOCRSP 0x22 98#define MLMEMSG_RCV_MLMEFRAME 0x20
103#define MLMEMSG_RCV_REASSOCRSP 0x24 99#define MLMEMSG_RCV_ASSOCRSP 0x22
104#define MLMEMSG_RCV_DISASSOC 0x2b 100#define MLMEMSG_RCV_REASSOCRSP 0x24
105#define MLMEMSG_RCV_AUTH 0x2c 101#define MLMEMSG_RCV_DISASSOC 0x2b
106#define MLMEMSG_RCV_DEAUTH 0x2d 102#define MLMEMSG_RCV_AUTH 0x2c
107 103#define MLMEMSG_RCV_DEAUTH 0x2d
108 104
109//from TX callback 105
110#define MLMEMSG_TX_CALLBACK 0x40 106/* from TX callback */
111#define MLMEMSG_ASSOCREQ_CALLBACK 0x41 107#define MLMEMSG_TX_CALLBACK 0x40
112#define MLMEMSG_REASSOCREQ_CALLBACK 0x43 108#define MLMEMSG_ASSOCREQ_CALLBACK 0x41
113#define MLMEMSG_DISASSOC_CALLBACK 0x4a 109#define MLMEMSG_REASSOCREQ_CALLBACK 0x43
114#define MLMEMSG_AUTH_CALLBACK 0x4c 110#define MLMEMSG_DISASSOC_CALLBACK 0x4a
115#define MLMEMSG_DEAUTH_CALLBACK 0x4d 111#define MLMEMSG_AUTH_CALLBACK 0x4c
116 112#define MLMEMSG_DEAUTH_CALLBACK 0x4d
117//#define MLMEMSG_JOIN_FAIL 4 113
118//#define MLMEMSG_AUTHEN_FAIL 18 114#define MLMEMSG_TIMEOUT 0x50
119#define MLMEMSG_TIMEOUT 0x50 115
120 116/*
121/////////////////////////////////////////////////////////////////////////// 117 * ==============================================
122//Global data structures 118 * Global data structures
123#define MAX_NUM_TX_MMPDU 2 119 * ==============================================
124#define MAX_MMPDU_SIZE 1512 120 */
125#define MAX_NUM_RX_MMPDU 6 121#define MAX_NUM_TX_MMPDU 2
126 122#define MAX_MMPDU_SIZE 1512
127 123#define MAX_NUM_RX_MMPDU 6
128/////////////////////////////////////////////////////////////////////////// 124
129//MACRO 125
130#define boMLME_InactiveState(_AA_) (_AA_->wState==INACTIVE) 126/*
131#define boMLME_IdleScanState(_BB_) (_BB_->wState==IDLE_SCAN) 127 * ==============================================
132#define boMLME_FoundSTAinfo(_CC_) (_CC_->wState>=IDLE_SCAN) 128 * MACRO
133 129 * ==============================================
134typedef struct _MLME_FRAME 130 */
135{ 131#define boMLME_InactiveState(_AA_) (_AA_->wState == INACTIVE)
136 //NDIS_PACKET MLME_Packet; 132#define boMLME_IdleScanState(_BB_) (_BB_->wState == IDLE_SCAN)
137 s8 * pMMPDU; 133#define boMLME_FoundSTAinfo(_CC_) (_CC_->wState >= IDLE_SCAN)
138 u16 len; 134
139 u8 DataType; 135typedef struct _MLME_FRAME {
140 u8 IsInUsed; 136 s8 *pMMPDU;
137 u16 len;
138 u8 DataType;
139 u8 IsInUsed;
141 140
142 spinlock_t MLMESpinLock; 141 spinlock_t MLMESpinLock;
143 142
144 u8 TxMMPDU[MAX_NUM_TX_MMPDU][MAX_MMPDU_SIZE]; 143 u8 TxMMPDU[MAX_NUM_TX_MMPDU][MAX_MMPDU_SIZE];
145 u8 TxMMPDUInUse[ (MAX_NUM_TX_MMPDU+3) & ~0x03 ]; 144 u8 TxMMPDUInUse[(MAX_NUM_TX_MMPDU + 3) & ~0x03];
146 145
147 u16 wNumTxMMPDU; 146 u16 wNumTxMMPDU;
148 u16 wNumTxMMPDUDiscarded; 147 u16 wNumTxMMPDUDiscarded;
149 148
150 u8 RxMMPDU[MAX_NUM_RX_MMPDU][MAX_MMPDU_SIZE]; 149 u8 RxMMPDU[MAX_NUM_RX_MMPDU][MAX_MMPDU_SIZE];
151 u8 SaveRxBufSlotInUse[ (MAX_NUM_RX_MMPDU+3) & ~0x03 ]; 150 u8 SaveRxBufSlotInUse[(MAX_NUM_RX_MMPDU + 3) & ~0x03];
152 151
153 u16 wNumRxMMPDU; 152 u16 wNumRxMMPDU;
154 u16 wNumRxMMPDUDiscarded; 153 u16 wNumRxMMPDUDiscarded;
155 154
156 u16 wNumRxMMPDUInMLME; // Number of the Rx MMPDU 155 u16 wNumRxMMPDUInMLME; /* Number of the Rx MMPDU */
157 u16 reserved_1; // in MLME. 156 u16 reserved_1; /* in MLME. */
158 // excluding the discarded 157 /* excluding the discarded */
159} MLME_FRAME, *psMLME_FRAME; 158} MLME_FRAME, *psMLME_FRAME;
160 159
161typedef struct _AUTHREQ { 160typedef struct _AUTHREQ {
162 161
163 u8 peerMACaddr[MAC_ADDR_LENGTH]; 162 u8 peerMACaddr[MAC_ADDR_LENGTH];
164 u16 wAuthAlgorithm; 163 u16 wAuthAlgorithm;
165
166} MLME_AUTHREQ_PARA, *psMLME_AUTHREQ_PARA; 164} MLME_AUTHREQ_PARA, *psMLME_AUTHREQ_PARA;
167 165
168typedef struct _ASSOCREQ { 166typedef struct _ASSOCREQ {
169 u8 PeerSTAAddr[MAC_ADDR_LENGTH]; 167 u8 PeerSTAAddr[MAC_ADDR_LENGTH];
170 u16 CapabilityInfo; 168 u16 CapabilityInfo;
171 u16 ListenInterval; 169 u16 ListenInterval;
172 170} __attribute__ ((packed)) MLME_ASSOCREQ_PARA, *psMLME_ASSOCREQ_PARA;
173}__attribute__ ((packed)) MLME_ASSOCREQ_PARA, *psMLME_ASSOCREQ_PARA;
174 171
175typedef struct _REASSOCREQ { 172typedef struct _REASSOCREQ {
176 u8 NewAPAddr[MAC_ADDR_LENGTH]; 173 u8 NewAPAddr[MAC_ADDR_LENGTH];
177 u16 CapabilityInfo; 174 u16 CapabilityInfo;
178 u16 ListenInterval; 175 u16 ListenInterval;
179 176} __attribute__ ((packed)) MLME_REASSOCREQ_PARA, *psMLME_REASSOCREQ_PARA;
180}__attribute__ ((packed)) MLME_REASSOCREQ_PARA, *psMLME_REASSOCREQ_PARA;
181 177
182typedef struct _MLMECALLBACK { 178typedef struct _MLMECALLBACK {
183 179 u8 *psFramePtr;
184 u8 *psFramePtr; 180 u8 bResult;
185 u8 bResult;
186
187} MLME_TXCALLBACK, *psMLME_TXCALLBACK; 181} MLME_TXCALLBACK, *psMLME_TXCALLBACK;
188 182
189typedef struct _RXDATA 183typedef struct _RXDATA {
190{
191 s32 FrameLength; 184 s32 FrameLength;
192 u8 __attribute__ ((packed)) *pbFramePtr; 185 u8 __attribute__ ((packed)) *pbFramePtr;
193 186} __attribute__ ((packed)) RXDATA, *psRXDATA;
194}__attribute__ ((packed)) RXDATA, *psRXDATA;
195 187
196#endif 188#endif
diff --git a/drivers/staging/winbond/mlmetxrx.c b/drivers/staging/winbond/mlmetxrx.c
index f856b94a7810..dcd8a11b5d03 100644
--- a/drivers/staging/winbond/mlmetxrx.c
+++ b/drivers/staging/winbond/mlmetxrx.c
@@ -1,26 +1,26 @@
1//============================================================================ 1/* ============================================================================
2// Module Name: 2 Module Name:
3// MLMETxRx.C 3 MLMETxRx.C
4// 4
5// Description: 5 Description:
6// The interface between MDS (MAC Data Service) and MLME. 6 The interface between MDS (MAC Data Service) and MLME.
7// 7
8// Revision History: 8 Revision History:
9// -------------------------------------------------------------------------- 9 --------------------------------------------------------------------------
10// 200209 UN20 Jennifer Xu 10 200209 UN20 Jennifer Xu
11// Initial Release 11 Initial Release
12// 20021108 PD43 Austin Liu 12 20021108 PD43 Austin Liu
13// 20030117 PD43 Austin Liu 13 20030117 PD43 Austin Liu
14// Deleted MLMEReturnPacket and MLMEProcThread() 14 Deleted MLMEReturnPacket and MLMEProcThread()
15// 15
16// Copyright (c) 1996-2002 Winbond Electronics Corp. All Rights Reserved. 16 Copyright (c) 1996-2002 Winbond Electronics Corp. All Rights Reserved.
17//============================================================================ 17============================================================================ */
18#include "sysdef.h" 18#include "sysdef.h"
19 19
20#include "mds_f.h" 20#include "mds_f.h"
21 21
22//============================================================================= 22/* ============================================================================= */
23u8 MLMESendFrame(struct wbsoft_priv * adapter, u8 *pMMPDU, u16 len, u8 DataType) 23u8 MLMESendFrame(struct wbsoft_priv *adapter, u8 *pMMPDU, u16 len, u8 DataType)
24/* DataType : FRAME_TYPE_802_11_MANAGEMENT, FRAME_TYPE_802_11_MANAGEMENT_CHALLENGE, 24/* DataType : FRAME_TYPE_802_11_MANAGEMENT, FRAME_TYPE_802_11_MANAGEMENT_CHALLENGE,
25 FRAME_TYPE_802_11_DATA */ 25 FRAME_TYPE_802_11_DATA */
26{ 26{
@@ -30,17 +30,17 @@ u8 MLMESendFrame(struct wbsoft_priv * adapter, u8 *pMMPDU, u16 len, u8 DataType)
30 } 30 }
31 adapter->sMlmeFrame.IsInUsed = PACKET_COME_FROM_MLME; 31 adapter->sMlmeFrame.IsInUsed = PACKET_COME_FROM_MLME;
32 32
33 // Keep information for sending 33 /* Keep information for sending */
34 adapter->sMlmeFrame.pMMPDU = pMMPDU; 34 adapter->sMlmeFrame.pMMPDU = pMMPDU;
35 adapter->sMlmeFrame.DataType = DataType; 35 adapter->sMlmeFrame.DataType = DataType;
36 // len must be the last setting due to QUERY_SIZE_SECOND of Mds 36 /* len must be the last setting due to QUERY_SIZE_SECOND of Mds */
37 adapter->sMlmeFrame.len = len; 37 adapter->sMlmeFrame.len = len;
38 adapter->sMlmeFrame.wNumTxMMPDU++; 38 adapter->sMlmeFrame.wNumTxMMPDU++;
39 39
40 // H/W will enter power save by set the register. S/W don't send null frame 40 /* H/W will enter power save by set the register. S/W don't send null frame
41 //with PWRMgt bit enbled to enter power save now. 41 with PWRMgt bit enbled to enter power save now. */
42 42
43 // Transmit NDIS packet 43 /* Transmit NDIS packet */
44 Mds_Tx(adapter); 44 Mds_Tx(adapter);
45 return true; 45 return true;
46} 46}
@@ -60,7 +60,7 @@ static void MLMEfreeMMPDUBuffer(struct wbsoft_priv *adapter, s8 *pData)
60{ 60{
61 int i; 61 int i;
62 62
63 // Reclaim the data buffer 63 /* Reclaim the data buffer */
64 for (i = 0; i < MAX_NUM_TX_MMPDU; i++) { 64 for (i = 0; i < MAX_NUM_TX_MMPDU; i++) {
65 if (pData == (s8 *)&(adapter->sMlmeFrame.TxMMPDU[i])) 65 if (pData == (s8 *)&(adapter->sMlmeFrame.TxMMPDU[i]))
66 break; 66 break;
@@ -68,24 +68,24 @@ static void MLMEfreeMMPDUBuffer(struct wbsoft_priv *adapter, s8 *pData)
68 if (adapter->sMlmeFrame.TxMMPDUInUse[i]) 68 if (adapter->sMlmeFrame.TxMMPDUInUse[i])
69 adapter->sMlmeFrame.TxMMPDUInUse[i] = false; 69 adapter->sMlmeFrame.TxMMPDUInUse[i] = false;
70 else { 70 else {
71 // Something wrong 71 /* Something wrong
72 // PD43 Add debug code here??? 72 PD43 Add debug code here??? */
73 } 73 }
74} 74}
75 75
76void 76void
77MLME_SendComplete(struct wbsoft_priv * adapter, u8 PacketID, unsigned char SendOK) 77MLME_SendComplete(struct wbsoft_priv *adapter, u8 PacketID, unsigned char SendOK)
78{ 78{
79 MLME_TXCALLBACK TxCallback; 79 MLME_TXCALLBACK TxCallback;
80 80
81 // Reclaim the data buffer 81 /* Reclaim the data buffer */
82 adapter->sMlmeFrame.len = 0; 82 adapter->sMlmeFrame.len = 0;
83 MLMEfreeMMPDUBuffer( adapter, adapter->sMlmeFrame.pMMPDU ); 83 MLMEfreeMMPDUBuffer(adapter, adapter->sMlmeFrame.pMMPDU);
84 84
85 85
86 TxCallback.bResult = MLME_SUCCESS; 86 TxCallback.bResult = MLME_SUCCESS;
87 87
88 // Return resource 88 /* Return resource */
89 adapter->sMlmeFrame.IsInUsed = PACKET_FREE_TO_USE; 89 adapter->sMlmeFrame.IsInUsed = PACKET_FREE_TO_USE;
90} 90}
91 91
diff --git a/drivers/staging/winbond/mlmetxrx_f.h b/drivers/staging/winbond/mlmetxrx_f.h
index 6c04e3e03e31..d1aa2617d24b 100644
--- a/drivers/staging/winbond/mlmetxrx_f.h
+++ b/drivers/staging/winbond/mlmetxrx_f.h
@@ -1,10 +1,10 @@
1//================================================================ 1/* ================================================================
2// MLMETxRx.H -- 2// MLMETxRx.H --
3// 3//
4// Functions defined in MLMETxRx.c. 4// Functions defined in MLMETxRx.c.
5// 5//
6// Copyright (c) 2002 Winbond Electrics Corp. All Rights Reserved. 6// Copyright (c) 2002 Winbond Electrics Corp. All Rights Reserved.
7//================================================================ 7//================================================================ */
8#ifndef _MLMETXRX_H 8#ifndef _MLMETXRX_H
9#define _MLMETXRX_H 9#define _MLMETXRX_H
10 10
@@ -12,7 +12,7 @@
12 12
13void MLME_GetNextPacket(struct wbsoft_priv *adapter, struct wb35_descriptor *pDes); 13void MLME_GetNextPacket(struct wbsoft_priv *adapter, struct wb35_descriptor *pDes);
14u8 MLMESendFrame(struct wbsoft_priv *adapter, 14u8 MLMESendFrame(struct wbsoft_priv *adapter,
15 u8 * pMMPDU, u16 len, u8 DataType); 15 u8 *pMMPDU, u16 len, u8 DataType);
16 16
17void 17void
18MLME_SendComplete(struct wbsoft_priv *adapter, u8 PacketID, 18MLME_SendComplete(struct wbsoft_priv *adapter, u8 PacketID,
diff --git a/drivers/staging/winbond/mto.c b/drivers/staging/winbond/mto.c
index 5e7fa1cd0aea..9cd212783d61 100644
--- a/drivers/staging/winbond/mto.c
+++ b/drivers/staging/winbond/mto.c
@@ -1,222 +1,181 @@
1//============================================================================ 1/*
2// MTO.C - 2 * ============================================================================
3// 3 * MTO.C -
4// Description: 4 *
5// MAC Throughput Optimization for W89C33 802.11g WLAN STA. 5 * Description:
6// 6 * MAC Throughput Optimization for W89C33 802.11g WLAN STA.
7// The following MIB attributes or internal variables will be affected 7 *
8// while the MTO is being executed: 8 * The following MIB attributes or internal variables will be affected
9// dot11FragmentationThreshold, 9 * while the MTO is being executed:
10// dot11RTSThreshold, 10 * dot11FragmentationThreshold,
11// transmission rate and PLCP preamble type, 11 * dot11RTSThreshold,
12// CCA mode, 12 * transmission rate and PLCP preamble type,
13// antenna diversity. 13 * CCA mode,
14// 14 * antenna diversity.
15// Revision history: 15 *
16// -------------------------------------------------------------------------- 16 * Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
17// 20031227 UN20 Pete Chao 17 * ============================================================================
18// First draft 18 */
19// 20031229 Turbo copy from PD43 19
20// 20040210 Kevin revised
21// Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
22//============================================================================
23
24// LA20040210_DTO kevin
25#include "sysdef.h" 20#include "sysdef.h"
26#include "sme_api.h" 21#include "sme_api.h"
27#include "wbhal_f.h" 22#include "wbhal_f.h"
28 23
29// Declare SQ3 to rate and fragmentation threshold table 24/* Declare SQ3 to rate and fragmentation threshold table */
30// Declare fragmentation thresholds table 25/* Declare fragmentation thresholds table */
31#define MTO_MAX_FRAG_TH_LEVELS 5 26#define MTO_MAX_FRAG_TH_LEVELS 5
32#define MTO_MAX_DATA_RATE_LEVELS 12 27#define MTO_MAX_DATA_RATE_LEVELS 12
33 28
34u16 MTO_Frag_Th_Tbl[MTO_MAX_FRAG_TH_LEVELS] = 29u16 MTO_Frag_Th_Tbl[MTO_MAX_FRAG_TH_LEVELS] = {
35{ 30 256, 384, 512, 768, 1536
36 256, 384, 512, 768, 1536
37}; 31};
38 32
39// Declare data rate table 33/*
40//The following table will be changed at anytime if the opration rate supported by AP don't 34 * Declare data rate table:
41//match the table 35 * The following table will be changed at anytime if the opration rate
36 * supported by AP don't match the table
37 */
42static u8 MTO_Data_Rate_Tbl[MTO_MAX_DATA_RATE_LEVELS] = { 38static u8 MTO_Data_Rate_Tbl[MTO_MAX_DATA_RATE_LEVELS] = {
43 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 39 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108
44}; 40};
45 41
46static int TotalTxPkt = 0; 42static int TotalTxPkt;
47static int TotalTxPktRetry = 0; 43static int TotalTxPktRetry;
48static int retryrate_rec[MTO_MAX_DATA_RATE_LEVELS];//this record the retry rate at different data rate 44/* this record the retry rate at different data rate */
45static int retryrate_rec[MTO_MAX_DATA_RATE_LEVELS];
49 46
50static int PeriodTotalTxPkt = 0; 47static int PeriodTotalTxPkt;
51static int PeriodTotalTxPktRetry = 0; 48static int PeriodTotalTxPktRetry;
52 49
53static u8 boSparseTxTraffic = false; 50static u8 boSparseTxTraffic;
54 51
55void MTO_Init(struct wbsoft_priv *adapter); 52void MTO_Init(struct wbsoft_priv *adapter);
56void TxRateReductionCtrl(struct wbsoft_priv *adapter); 53void TxRateReductionCtrl(struct wbsoft_priv *adapter);
57/** 1.1.31.1000 Turbo modify */
58void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 t0, u8 index); 54void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 t0, u8 index);
59void MTO_TxFailed(struct wbsoft_priv *adapter); 55void MTO_TxFailed(struct wbsoft_priv *adapter);
60void hal_get_dto_para(struct wbsoft_priv *adapter, char *buffer); 56void hal_get_dto_para(struct wbsoft_priv *adapter, char *buffer);
61 57
62//=========================================================================== 58/*
63// MTO_Init -- 59 * ===========================================================================
64// 60 * MTO_Init --
65// Description: 61 *
66// Initialize MTO parameters. 62 * Description:
67// 63 * Initialize MTO parameters.
68// This function should be invoked during system initialization. 64 *
69// 65 * This function should be invoked during system initialization.
70// Arguments: 66 *
71// adapter - The pointer to the Miniport adapter Context 67 * Arguments:
72// 68 * adapter - The pointer to the Miniport adapter Context
73// Return Value: 69 * ===========================================================================
74// None 70 */
75//============================================================================
76void MTO_Init(struct wbsoft_priv *adapter) 71void MTO_Init(struct wbsoft_priv *adapter)
77{ 72{
78 int i; 73 int i;
79 74
80 //[WKCHEN]MTO_CCA_MODE_SETUP()= (u8) hal_get_cca_mode(MTO_HAL()); 75 MTO_PREAMBLE_TYPE() = MTO_PREAMBLE_SHORT; /* for test */
81 //[WKCHEN]MTO_CCA_MODE() = MTO_CCA_MODE_SETUP(); 76
82 77 MTO_CNT_ANT(0) = 0;
83 //MTO_PREAMBLE_TYPE() = MTO_PREAMBLE_LONG; 78 MTO_CNT_ANT(1) = 0;
84 MTO_PREAMBLE_TYPE() = MTO_PREAMBLE_SHORT; // for test 79 MTO_SQ_ANT(0) = 0;
85 80 MTO_SQ_ANT(1) = 0;
86 MTO_CNT_ANT(0) = 0; 81
87 MTO_CNT_ANT(1) = 0; 82 MTO_AGING_TIMEOUT() = 0;
88 MTO_SQ_ANT(0) = 0; 83
89 MTO_SQ_ANT(1) = 0; 84 /* The following parameters should be initialized to the values set by user */
90 85 MTO_RATE_LEVEL() = 0;
91 MTO_AGING_TIMEOUT() = 0; 86 MTO_FRAG_TH_LEVEL() = 4;
92 87 MTO_RTS_THRESHOLD() = MTO_FRAG_TH() + 1;
93 // The following parameters should be initialized to the values set by user 88 MTO_RTS_THRESHOLD_SETUP() = MTO_FRAG_TH() + 1;
94 // 89 MTO_RATE_CHANGE_ENABLE() = 1;
95 //MTO_RATE_LEVEL() = 10; 90 MTO_FRAG_CHANGE_ENABLE() = 0;
96 MTO_RATE_LEVEL() = 0; 91 MTO_POWER_CHANGE_ENABLE() = 1;
97 MTO_FRAG_TH_LEVEL() = 4; 92 MTO_PREAMBLE_CHANGE_ENABLE() = 1;
98 /** 1.1.23.1000 Turbo modify from -1 to +1 93 MTO_RTS_CHANGE_ENABLE() = 0;
99 MTO_RTS_THRESHOLD() = MTO_FRAG_TH() - 1; 94
100 MTO_RTS_THRESHOLD_SETUP() = MTO_FRAG_TH() - 1; 95 for (i = 0; i < MTO_MAX_DATA_RATE_LEVELS; i++)
101 */ 96 retryrate_rec[i] = 5;
102 MTO_RTS_THRESHOLD() = MTO_FRAG_TH() + 1;
103 MTO_RTS_THRESHOLD_SETUP() = MTO_FRAG_TH() + 1;
104 // 1.1.23.1000 Turbo add for mto change preamble from 0 to 1
105 MTO_RATE_CHANGE_ENABLE() = 1;
106 MTO_FRAG_CHANGE_ENABLE() = 0; // 1.1.29.1000 Turbo add don't support frag
107 //The default valud of ANTDIV_DEFAULT_ON will be decided by EEPROM
108 //#ifdef ANTDIV_DEFAULT_ON
109 //#else
110 //#endif
111 MTO_POWER_CHANGE_ENABLE() = 1;
112 MTO_PREAMBLE_CHANGE_ENABLE()= 1;
113 MTO_RTS_CHANGE_ENABLE() = 0; // 1.1.29.1000 Turbo add don't support frag
114 // 20040512 Turbo add
115 //old_antenna[0] = 1;
116 //old_antenna[1] = 0;
117 //old_antenna[2] = 1;
118 //old_antenna[3] = 0;
119 for (i=0;i<MTO_MAX_DATA_RATE_LEVELS;i++)
120 retryrate_rec[i]=5;
121 97
122 MTO_TXFLOWCOUNT() = 0; 98 MTO_TXFLOWCOUNT() = 0;
123 //--------- DTO threshold parameters ------------- 99 /* --------- DTO threshold parameters ------------- */
124 //MTOPARA_PERIODIC_CHECK_CYCLE() = 50; 100 MTOPARA_PERIODIC_CHECK_CYCLE() = 10;
125 MTOPARA_PERIODIC_CHECK_CYCLE() = 10; 101 MTOPARA_RSSI_TH_FOR_ANTDIV() = 10;
126 MTOPARA_RSSI_TH_FOR_ANTDIV() = 10; 102 MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() = 50;
127 MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() = 50; 103 MTOPARA_TXRATE_INC_TH() = 10;
128 MTOPARA_TXRATE_INC_TH() = 10; 104 MTOPARA_TXRATE_DEC_TH() = 30;
129 MTOPARA_TXRATE_DEC_TH() = 30; 105 MTOPARA_TXRATE_EQ_TH() = 40;
130 MTOPARA_TXRATE_EQ_TH() = 40; 106 MTOPARA_TXRATE_BACKOFF() = 12;
131 MTOPARA_TXRATE_BACKOFF() = 12; 107 MTOPARA_TXRETRYRATE_REDUCE() = 6;
132 MTOPARA_TXRETRYRATE_REDUCE() = 6; 108 if (MTO_TXPOWER_FROM_EEPROM == 0xff) {
133 if ( MTO_TXPOWER_FROM_EEPROM == 0xff) 109 switch (MTO_HAL()->phy_type) {
134 { 110 case RF_AIROHA_2230:
135 switch( MTO_HAL()->phy_type) 111 case RF_AIROHA_2230S:
136 { 112 MTOPARA_TXPOWER_INDEX() = 46; /* MAX-8 @@ Only for AL 2230 */
137 case RF_AIROHA_2230: 113 break;
138 case RF_AIROHA_2230S: // 20060420 Add this 114 case RF_AIROHA_7230:
139 MTOPARA_TXPOWER_INDEX() = 46; // MAX-8 // @@ Only for AL 2230 115 MTOPARA_TXPOWER_INDEX() = 49;
140 break; 116 break;
141 case RF_AIROHA_7230: 117 case RF_WB_242:
142 MTOPARA_TXPOWER_INDEX() = 49; 118 MTOPARA_TXPOWER_INDEX() = 10;
143 break; 119 break;
144 case RF_WB_242: 120 case RF_WB_242_1:
145 MTOPARA_TXPOWER_INDEX() = 10; 121 MTOPARA_TXPOWER_INDEX() = 24;
146 break; 122 break;
147 case RF_WB_242_1:
148 MTOPARA_TXPOWER_INDEX() = 24; // ->10 20060316.1 modify
149 break;
150 } 123 }
151 } 124 } else { /* follow the setting from EEPROM */
152 else //follow the setting from EEPROM
153 MTOPARA_TXPOWER_INDEX() = MTO_TXPOWER_FROM_EEPROM; 125 MTOPARA_TXPOWER_INDEX() = MTO_TXPOWER_FROM_EEPROM;
154 RFSynthesizer_SetPowerIndex(MTO_HAL(), (u8)MTOPARA_TXPOWER_INDEX()); 126 }
155 //------------------------------------------------ 127 RFSynthesizer_SetPowerIndex(MTO_HAL(), (u8) MTOPARA_TXPOWER_INDEX());
128 /* ------------------------------------------------ */
156 129
157 // For RSSI turning 20060808.4 Cancel load from EEPROM 130 /* For RSSI turning -- Cancel load from EEPROM */
158 MTO_DATA().RSSI_high = -41; 131 MTO_DATA().RSSI_high = -41;
159 MTO_DATA().RSSI_low = -60; 132 MTO_DATA().RSSI_low = -60;
160} 133}
161 134
162//=========================================================================== 135/* ===========================================================================
163// Description: 136 * Description:
164// If we enable DTO, we will ignore the tx count with different tx rate from 137 * If we enable DTO, we will ignore the tx count with different tx rate
165// DTO rate. This is because when we adjust DTO tx rate, there could be some 138 * from DTO rate. This is because when we adjust DTO tx rate, there could
166// packets in the tx queue with previous tx rate 139 * be some packets in the tx queue with previous tx rate
140 */
141
167void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 tx_rate, u8 index) 142void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 tx_rate, u8 index)
168{ 143{
169 MTO_TXFLOWCOUNT()++; 144 MTO_TXFLOWCOUNT()++;
170 if ((MTO_ENABLE==1) && (MTO_RATE_CHANGE_ENABLE()==1)) 145 if ((MTO_ENABLE == 1) && (MTO_RATE_CHANGE_ENABLE() == 1)) {
171 { 146 if (tx_rate == MTO_DATA_RATE()) {
172 if(tx_rate == MTO_DATA_RATE()) 147 if (index == 0) {
173 {
174 if (index == 0)
175 {
176 if (boSparseTxTraffic) 148 if (boSparseTxTraffic)
177 MTO_HAL()->dto_tx_frag_count += MTOPARA_PERIODIC_CHECK_CYCLE(); 149 MTO_HAL()->dto_tx_frag_count += MTOPARA_PERIODIC_CHECK_CYCLE();
178 else 150 else
179 MTO_HAL()->dto_tx_frag_count += 1; 151 MTO_HAL()->dto_tx_frag_count += 1;
180 } 152 } else {
181 else 153 if (index < 8) {
182 {
183 if (index<8)
184 {
185 MTO_HAL()->dto_tx_retry_count += index; 154 MTO_HAL()->dto_tx_retry_count += index;
186 MTO_HAL()->dto_tx_frag_count += (index+1); 155 MTO_HAL()->dto_tx_frag_count += (index + 1);
187 } 156 } else {
188 else
189 {
190 MTO_HAL()->dto_tx_retry_count += 7; 157 MTO_HAL()->dto_tx_retry_count += 7;
191 MTO_HAL()->dto_tx_frag_count += 7; 158 MTO_HAL()->dto_tx_frag_count += 7;
192 } 159 }
193 } 160 }
194 } 161 } else if (MTO_DATA_RATE() > 48 && tx_rate == 48) {
195 else if(MTO_DATA_RATE()>48 && tx_rate ==48) 162 /* for reducing data rate scheme, do not calculate different data rate. 3 is the reducing data rate at retry. */
196 {//ALFRED 163 if (index < 3) {
197 if (index<3) //for reduciing data rate scheme ,
198 //do not calcu different data rate
199 //3 is the reducing data rate at retry
200 {
201 MTO_HAL()->dto_tx_retry_count += index; 164 MTO_HAL()->dto_tx_retry_count += index;
202 MTO_HAL()->dto_tx_frag_count += (index+1); 165 MTO_HAL()->dto_tx_frag_count += (index + 1);
203 } 166 } else {
204 else
205 {
206 MTO_HAL()->dto_tx_retry_count += 3; 167 MTO_HAL()->dto_tx_retry_count += 3;
207 MTO_HAL()->dto_tx_frag_count += 3; 168 MTO_HAL()->dto_tx_frag_count += 3;
208 } 169 }
209 170
210 } 171 }
211 } 172 } else {
212 else
213 {
214 MTO_HAL()->dto_tx_retry_count += index; 173 MTO_HAL()->dto_tx_retry_count += index;
215 MTO_HAL()->dto_tx_frag_count += (index+1); 174 MTO_HAL()->dto_tx_frag_count += (index + 1);
216 } 175 }
217 TotalTxPkt ++; 176 TotalTxPkt++;
218 TotalTxPktRetry += (index+1); 177 TotalTxPktRetry += (index + 1);
219 178
220 PeriodTotalTxPkt ++; 179 PeriodTotalTxPkt++;
221 PeriodTotalTxPktRetry += (index+1); 180 PeriodTotalTxPktRetry += (index + 1);
222} 181}
diff --git a/drivers/staging/winbond/mto.h b/drivers/staging/winbond/mto.h
index fb4781d5781b..a0f659cf99ff 100644
--- a/drivers/staging/winbond/mto.h
+++ b/drivers/staging/winbond/mto.h
@@ -1,13 +1,10 @@
1//================================================================== 1/*
2// MTO.H 2 * ==================================================================
3// 3 * MTO.H
4// Revision history 4 *
5//================================= 5 * Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
6// 20030110 UN20 Pete Chao 6 * ==================================================================
7// Initial Release 7 */
8//
9// Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
10//==================================================================
11#ifndef __MTO_H__ 8#ifndef __MTO_H__
12#define __MTO_H__ 9#define __MTO_H__
13 10
@@ -15,115 +12,104 @@
15 12
16struct wbsoft_priv; 13struct wbsoft_priv;
17 14
18// LA20040210_DTO kevin
19//#define MTO_PREAMBLE_LONG 0
20//#define MTO_PREAMBLE_SHORT 1
21#define MTO_PREAMBLE_LONG WLAN_PREAMBLE_TYPE_LONG 15#define MTO_PREAMBLE_LONG WLAN_PREAMBLE_TYPE_LONG
22#define MTO_PREAMBLE_SHORT WLAN_PREAMBLE_TYPE_SHORT 16#define MTO_PREAMBLE_SHORT WLAN_PREAMBLE_TYPE_SHORT
23 17
24//============================================================================ 18/* Defines the parameters used in the MAC Throughput Optimization algorithm */
25// struct _MTOParameters --
26//
27// Defines the parameters used in the MAC Throughput Optimization algorithm
28//============================================================================
29struct wb35_mto_params { 19struct wb35_mto_params {
30 //--------- wkchen added ------------- 20 u32 TxFlowCount; /* to judge what kind the tx flow(sparse or busy) is */
31 u32 TxFlowCount; //to judge what kind the tx flow(sparse or busy) is
32 //------------------------------------------------
33 21
34 //--------- DTO threshold parameters ------------- 22 /* --------- DTO threshold parameters ------------- */
35 u16 DTO_PeriodicCheckCycle; 23 u16 DTO_PeriodicCheckCycle;
36 u16 DTO_RssiThForAntDiv; 24 u16 DTO_RssiThForAntDiv;
37 25
38 u16 DTO_TxCountThForCalcNewRate; 26 u16 DTO_TxCountThForCalcNewRate;
39 u16 DTO_TxRateIncTh; 27 u16 DTO_TxRateIncTh;
40 28
41 u16 DTO_TxRateDecTh; 29 u16 DTO_TxRateDecTh;
42 u16 DTO_TxRateEqTh; 30 u16 DTO_TxRateEqTh;
43 31
44 u16 DTO_TxRateBackOff; 32 u16 DTO_TxRateBackOff;
45 u16 DTO_TxRetryRateReduce; 33 u16 DTO_TxRetryRateReduce;
46 34
47 u16 DTO_TxPowerIndex; //0 ~ 31 35 u16 DTO_TxPowerIndex; /* 0 ~ 31 */
48 u16 reserved_1; 36 u16 reserved_1;
49 //------------------------------------------------ 37 /* ------------------------------------------------ */
50 38
51 u8 PowerChangeEnable; 39 u8 PowerChangeEnable;
52 u8 AntDiversityEnable; 40 u8 AntDiversityEnable;
53 u8 CCA_Mode; 41 u8 CCA_Mode;
54 u8 CCA_Mode_Setup; 42 u8 CCA_Mode_Setup;
55 u8 Preamble_Type; 43 u8 Preamble_Type;
56 u8 PreambleChangeEnable; 44 u8 PreambleChangeEnable;
57 45
58 u8 DataRateLevel; 46 u8 DataRateLevel;
59 u8 DataRateChangeEnable; 47 u8 DataRateChangeEnable;
60 u8 FragThresholdLevel; 48 u8 FragThresholdLevel;
61 u8 FragThresholdChangeEnable; 49 u8 FragThresholdChangeEnable;
62 50
63 u16 RTSThreshold; 51 u16 RTSThreshold;
64 u16 RTSThreshold_Setup; 52 u16 RTSThreshold_Setup;
65 53
66 u32 AvgIdleSlot; 54 u32 AvgIdleSlot;
67 u32 Pr_Interf; 55 u32 Pr_Interf;
68 u32 AvgGapBtwnInterf; 56 u32 AvgGapBtwnInterf;
69 57
70 u8 RTSChangeEnable; 58 u8 RTSChangeEnable;
71 u8 Ant_sel; 59 u8 Ant_sel;
72 u8 aging_timeout; 60 u8 aging_timeout;
73 u8 reserved_2; 61 u8 reserved_2;
74 62
75 u32 Cnt_Ant[2]; 63 u32 Cnt_Ant[2];
76 u32 SQ_Ant[2]; 64 u32 SQ_Ant[2];
77 65
78// 20040510 remove from globe vairable 66 u8 FallbackRateLevel;
79 u8 FallbackRateLevel; 67 u8 OfdmRateLevel;
80 u8 OfdmRateLevel;
81 68
82 u8 RatePolicy; 69 u8 RatePolicy;
83 u8 reserved_3[3]; 70 u8 reserved_3[3];
84
85 // For RSSI turning
86 s32 RSSI_high;
87 s32 RSSI_low;
88 71
72 /* For RSSI turning */
73 s32 RSSI_high;
74 s32 RSSI_low;
89}; 75};
90 76
91 77
92#define MTO_DATA() (adapter->sMtoPara) 78#define MTO_DATA() (adapter->sMtoPara)
93#define MTO_HAL() (&adapter->sHwData) 79#define MTO_HAL() (&adapter->sHwData)
94#define MTO_SET_PREAMBLE_TYPE(x) // 20040511 Turbo mark LM_PREAMBLE_TYPE(&pcore_data->lm_data) = (x) 80#define MTO_SET_PREAMBLE_TYPE(x) /* Turbo mark LM_PREAMBLE_TYPE(&pcore_data->lm_data) = (x) */
95#define MTO_ENABLE (adapter->sLocalPara.TxRateMode == RATE_AUTO) 81#define MTO_ENABLE (adapter->sLocalPara.TxRateMode == RATE_AUTO)
96#define MTO_TXPOWER_FROM_EEPROM (adapter->sHwData.PowerIndexFromEEPROM) 82#define MTO_TXPOWER_FROM_EEPROM (adapter->sHwData.PowerIndexFromEEPROM)
97#define LOCAL_ANTENNA_NO() (adapter->sLocalPara.bAntennaNo) 83#define LOCAL_ANTENNA_NO() (adapter->sLocalPara.bAntennaNo)
98#define LOCAL_IS_CONNECTED() (adapter->sLocalPara.wConnectedSTAindex != 0) 84#define LOCAL_IS_CONNECTED() (adapter->sLocalPara.wConnectedSTAindex != 0)
99#define MTO_INITTXRATE_MODE (adapter->sHwData.SoftwareSet&0x2) //bit 1 85#define MTO_INITTXRATE_MODE (adapter->sHwData.SoftwareSet&0x2) /* bit 1 */
100 86
101#define MTO_POWER_CHANGE_ENABLE() MTO_DATA().PowerChangeEnable 87#define MTO_POWER_CHANGE_ENABLE() MTO_DATA().PowerChangeEnable
102#define MTO_CCA_MODE() MTO_DATA().CCA_Mode 88#define MTO_CCA_MODE() MTO_DATA().CCA_Mode
103#define MTO_CCA_MODE_SETUP() MTO_DATA().CCA_Mode_Setup 89#define MTO_CCA_MODE_SETUP() MTO_DATA().CCA_Mode_Setup
104#define MTO_PREAMBLE_TYPE() MTO_DATA().Preamble_Type 90#define MTO_PREAMBLE_TYPE() MTO_DATA().Preamble_Type
105#define MTO_PREAMBLE_CHANGE_ENABLE() MTO_DATA().PreambleChangeEnable 91#define MTO_PREAMBLE_CHANGE_ENABLE() MTO_DATA().PreambleChangeEnable
106 92
107#define MTO_RATE_LEVEL() MTO_DATA().DataRateLevel 93#define MTO_RATE_LEVEL() MTO_DATA().DataRateLevel
108#define MTO_OFDM_RATE_LEVEL() MTO_DATA().OfdmRateLevel 94#define MTO_OFDM_RATE_LEVEL() MTO_DATA().OfdmRateLevel
109#define MTO_RATE_CHANGE_ENABLE() MTO_DATA().DataRateChangeEnable 95#define MTO_RATE_CHANGE_ENABLE() MTO_DATA().DataRateChangeEnable
110#define MTO_FRAG_TH_LEVEL() MTO_DATA().FragThresholdLevel 96#define MTO_FRAG_TH_LEVEL() MTO_DATA().FragThresholdLevel
111#define MTO_FRAG_CHANGE_ENABLE() MTO_DATA().FragThresholdChangeEnable 97#define MTO_FRAG_CHANGE_ENABLE() MTO_DATA().FragThresholdChangeEnable
112#define MTO_RTS_THRESHOLD() MTO_DATA().RTSThreshold 98#define MTO_RTS_THRESHOLD() MTO_DATA().RTSThreshold
113#define MTO_RTS_CHANGE_ENABLE() MTO_DATA().RTSChangeEnable 99#define MTO_RTS_CHANGE_ENABLE() MTO_DATA().RTSChangeEnable
114#define MTO_RTS_THRESHOLD_SETUP() MTO_DATA().RTSThreshold_Setup 100#define MTO_RTS_THRESHOLD_SETUP() MTO_DATA().RTSThreshold_Setup
115 101
116#define MTO_AVG_IDLE_SLOT() MTO_DATA().AvgIdleSlot 102#define MTO_AVG_IDLE_SLOT() MTO_DATA().AvgIdleSlot
117#define MTO_PR_INTERF() MTO_DATA().Pr_Interf 103#define MTO_PR_INTERF() MTO_DATA().Pr_Interf
118#define MTO_AVG_GAP_BTWN_INTERF() MTO_DATA().AvgGapBtwnInterf 104#define MTO_AVG_GAP_BTWN_INTERF() MTO_DATA().AvgGapBtwnInterf
119 105
120#define MTO_CNT_ANT(x) MTO_DATA().Cnt_Ant[(x)] 106#define MTO_CNT_ANT(x) MTO_DATA().Cnt_Ant[(x)]
121#define MTO_SQ_ANT(x) MTO_DATA().SQ_Ant[(x)] 107#define MTO_SQ_ANT(x) MTO_DATA().SQ_Ant[(x)]
122#define MTO_AGING_TIMEOUT() MTO_DATA().aging_timeout 108#define MTO_AGING_TIMEOUT() MTO_DATA().aging_timeout
123 109
110#define MTO_TXFLOWCOUNT() MTO_DATA().TxFlowCount
124 111
125#define MTO_TXFLOWCOUNT() MTO_DATA().TxFlowCount 112/* --------- DTO threshold parameters ------------- */
126//--------- DTO threshold parameters -------------
127#define MTOPARA_PERIODIC_CHECK_CYCLE() MTO_DATA().DTO_PeriodicCheckCycle 113#define MTOPARA_PERIODIC_CHECK_CYCLE() MTO_DATA().DTO_PeriodicCheckCycle
128#define MTOPARA_RSSI_TH_FOR_ANTDIV() MTO_DATA().DTO_RssiThForAntDiv 114#define MTOPARA_RSSI_TH_FOR_ANTDIV() MTO_DATA().DTO_RssiThForAntDiv
129#define MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() MTO_DATA().DTO_TxCountThForCalcNewRate 115#define MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() MTO_DATA().DTO_TxCountThForCalcNewRate
@@ -133,13 +119,13 @@ struct wb35_mto_params {
133#define MTOPARA_TXRATE_BACKOFF() MTO_DATA().DTO_TxRateBackOff 119#define MTOPARA_TXRATE_BACKOFF() MTO_DATA().DTO_TxRateBackOff
134#define MTOPARA_TXRETRYRATE_REDUCE() MTO_DATA().DTO_TxRetryRateReduce 120#define MTOPARA_TXRETRYRATE_REDUCE() MTO_DATA().DTO_TxRetryRateReduce
135#define MTOPARA_TXPOWER_INDEX() MTO_DATA().DTO_TxPowerIndex 121#define MTOPARA_TXPOWER_INDEX() MTO_DATA().DTO_TxPowerIndex
136//------------------------------------------------ 122/* ------------------------------------------------ */
137 123
138 124
139extern u16 MTO_Frag_Th_Tbl[]; 125extern u16 MTO_Frag_Th_Tbl[];
140 126
141#define MTO_DATA_RATE() MTO_Data_Rate_Tbl[MTO_RATE_LEVEL()] 127#define MTO_DATA_RATE() MTO_Data_Rate_Tbl[MTO_RATE_LEVEL()]
142#define MTO_FRAG_TH() MTO_Frag_Th_Tbl[MTO_FRAG_TH_LEVEL()] 128#define MTO_FRAG_TH() MTO_Frag_Th_Tbl[MTO_FRAG_TH_LEVEL()]
143 129
144extern void MTO_Init(struct wbsoft_priv *); 130extern void MTO_Init(struct wbsoft_priv *);
145extern void MTO_PeriodicTimerExpired(struct wbsoft_priv *); 131extern void MTO_PeriodicTimerExpired(struct wbsoft_priv *);
@@ -148,6 +134,5 @@ extern u8 MTO_GetTxRate(struct wbsoft_priv *adapter, u32 fpdu_len);
148extern u8 MTO_GetTxFallbackRate(struct wbsoft_priv *adapter); 134extern u8 MTO_GetTxFallbackRate(struct wbsoft_priv *adapter);
149extern void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 t0, u8 index); 135extern void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 t0, u8 index);
150 136
151#endif //__MTO_H__ 137#endif /* __MTO_H__ */
152
153 138
diff --git a/drivers/staging/winbond/phy_calibration.c b/drivers/staging/winbond/phy_calibration.c
index 8c56962ab80c..78935865df19 100644
--- a/drivers/staging/winbond/phy_calibration.c
+++ b/drivers/staging/winbond/phy_calibration.c
@@ -25,10 +25,7 @@
25#define FIXED(X) ((s32)((X) * 32768.0)) 25#define FIXED(X) ((s32)((X) * 32768.0))
26#define DEG2RAD(X) 0.017453 * (X) 26#define DEG2RAD(X) 0.017453 * (X)
27 27
28/****************** LOCAL TYPE DEFINITION SECTION ***************************/ 28static const s32 Angles[] =
29typedef s32 fixed; /* 16.16 fixed-point */
30
31static const fixed Angles[]=
32{ 29{
33 FIXED(DEG2RAD(45.0)), FIXED(DEG2RAD(26.565)), FIXED(DEG2RAD(14.0362)), 30 FIXED(DEG2RAD(45.0)), FIXED(DEG2RAD(26.565)), FIXED(DEG2RAD(14.0362)),
34 FIXED(DEG2RAD(7.12502)), FIXED(DEG2RAD(3.57633)), FIXED(DEG2RAD(1.78991)), 31 FIXED(DEG2RAD(7.12502)), FIXED(DEG2RAD(3.57633)), FIXED(DEG2RAD(1.78991)),
@@ -300,7 +297,7 @@ u32 _sqrt(u32 sqsum)
300/****************************************************************************/ 297/****************************************************************************/
301void _sin_cos(s32 angle, s32 *sin, s32 *cos) 298void _sin_cos(s32 angle, s32 *sin, s32 *cos)
302{ 299{
303 fixed X, Y, TargetAngle, CurrAngle; 300 s32 X, Y, TargetAngle, CurrAngle;
304 unsigned Step; 301 unsigned Step;
305 302
306 X=FIXED(AG_CONST); // AG_CONST * cos(0) 303 X=FIXED(AG_CONST); // AG_CONST * cos(0)
@@ -310,7 +307,7 @@ void _sin_cos(s32 angle, s32 *sin, s32 *cos)
310 307
311 for (Step=0; Step < 12; Step++) 308 for (Step=0; Step < 12; Step++)
312 { 309 {
313 fixed NewX; 310 s32 NewX;
314 311
315 if(TargetAngle > CurrAngle) 312 if(TargetAngle > CurrAngle)
316 { 313 {
diff --git a/drivers/staging/winbond/phy_calibration.h b/drivers/staging/winbond/phy_calibration.h
index 51c8fde81e2b..303203148839 100644
--- a/drivers/staging/winbond/phy_calibration.h
+++ b/drivers/staging/winbond/phy_calibration.h
@@ -3,105 +3,82 @@
3 3
4#include "wbhal_f.h" 4#include "wbhal_f.h"
5 5
6// 20031229 Turbo add 6#define REG_AGC_CTRL1 0x1000
7#define REG_AGC_CTRL1 0x1000 7#define REG_AGC_CTRL2 0x1004
8#define REG_AGC_CTRL2 0x1004 8#define REG_AGC_CTRL3 0x1008
9#define REG_AGC_CTRL3 0x1008 9#define REG_AGC_CTRL4 0x100C
10#define REG_AGC_CTRL4 0x100C 10#define REG_AGC_CTRL5 0x1010
11#define REG_AGC_CTRL5 0x1010 11#define REG_AGC_CTRL6 0x1014
12#define REG_AGC_CTRL6 0x1014 12#define REG_AGC_CTRL7 0x1018
13#define REG_AGC_CTRL7 0x1018 13#define REG_AGC_CTRL8 0x101C
14#define REG_AGC_CTRL8 0x101C 14#define REG_AGC_CTRL9 0x1020
15#define REG_AGC_CTRL9 0x1020 15#define REG_AGC_CTRL10 0x1024
16#define REG_AGC_CTRL10 0x1024 16#define REG_CCA_CTRL 0x1028
17#define REG_CCA_CTRL 0x1028 17#define REG_A_ACQ_CTRL 0x102C
18#define REG_A_ACQ_CTRL 0x102C 18#define REG_B_ACQ_CTRL 0x1030
19#define REG_B_ACQ_CTRL 0x1030 19#define REG_A_TXRX_CTRL 0x1034
20#define REG_A_TXRX_CTRL 0x1034 20#define REG_B_TXRX_CTRL 0x1038
21#define REG_B_TXRX_CTRL 0x1038 21#define REG_A_TX_COEF3 0x103C
22#define REG_A_TX_COEF3 0x103C 22#define REG_A_TX_COEF2 0x1040
23#define REG_A_TX_COEF2 0x1040 23#define REG_A_TX_COEF1 0x1044
24#define REG_A_TX_COEF1 0x1044 24#define REG_B_TX_COEF2 0x1048
25#define REG_B_TX_COEF2 0x1048 25#define REG_B_TX_COEF1 0x104C
26#define REG_B_TX_COEF1 0x104C 26#define REG_MODE_CTRL 0x1050
27#define REG_MODE_CTRL 0x1050 27#define REG_CALIB_DATA 0x1054
28#define REG_CALIB_DATA 0x1054 28#define REG_IQ_ALPHA 0x1058
29#define REG_IQ_ALPHA 0x1058 29#define REG_DC_CANCEL 0x105C
30#define REG_DC_CANCEL 0x105C 30#define REG_WTO_READ 0x1060
31#define REG_WTO_READ 0x1060 31#define REG_OFFSET_READ 0x1064
32#define REG_OFFSET_READ 0x1064 32#define REG_CALIB_READ1 0x1068
33#define REG_CALIB_READ1 0x1068 33#define REG_CALIB_READ2 0x106C
34#define REG_CALIB_READ2 0x106C 34#define REG_A_FREQ_EST 0x1070
35#define REG_A_FREQ_EST 0x1070 35
36 36
37 37#define MASK_AMER_OFF_REG BIT(31)
38 38
39 39#define MASK_BMER_OFF_REG BIT(31)
40// 20031101 Turbo add 40
41#define MASK_AMER_OFF_REG BIT(31) 41#define MASK_LNA_FIX_GAIN (BIT(3) | BIT(4))
42 42#define MASK_AGC_FIX BIT(1)
43#define MASK_BMER_OFF_REG BIT(31) 43
44 44#define MASK_AGC_FIX_GAIN 0xFF00
45#define MASK_LNA_FIX_GAIN (BIT(3)|BIT(4)) 45
46#define MASK_AGC_FIX BIT(1) 46#define MASK_ADC_DC_CAL_STR BIT(10)
47 47#define MASK_CALIB_START BIT(4)
48#define MASK_AGC_FIX_GAIN 0xFF00 48#define MASK_IQCAL_TONE_SEL (BIT(3) | BIT(2))
49 49#define MASK_IQCAL_MODE (BIT(1) | BIT(0))
50#define MASK_ADC_DC_CAL_STR BIT(10) 50
51#define MASK_CALIB_START BIT(4) 51#define MASK_TX_CAL_0 0xF0000000
52#define MASK_IQCAL_TONE_SEL (BIT(3)|BIT(2)) 52#define TX_CAL_0_SHIFT 28
53#define MASK_IQCAL_MODE (BIT(1)|BIT(0)) 53#define MASK_TX_CAL_1 0x0F000000
54 54#define TX_CAL_1_SHIFT 24
55#define MASK_TX_CAL_0 0xF0000000 55#define MASK_TX_CAL_2 0x00F00000
56#define TX_CAL_0_SHIFT 28 56#define TX_CAL_2_SHIFT 20
57#define MASK_TX_CAL_1 0x0F000000 57#define MASK_TX_CAL_3 0x000F0000
58#define TX_CAL_1_SHIFT 24 58#define TX_CAL_3_SHIFT 16
59#define MASK_TX_CAL_2 0x00F00000 59#define MASK_RX_CAL_0 0x0000F000
60#define TX_CAL_2_SHIFT 20 60#define RX_CAL_0_SHIFT 12
61#define MASK_TX_CAL_3 0x000F0000 61#define MASK_RX_CAL_1 0x00000F00
62#define TX_CAL_3_SHIFT 16 62#define RX_CAL_1_SHIFT 8
63#define MASK_RX_CAL_0 0x0000F000 63#define MASK_RX_CAL_2 0x000000F0
64#define RX_CAL_0_SHIFT 12 64#define RX_CAL_2_SHIFT 4
65#define MASK_RX_CAL_1 0x00000F00 65#define MASK_RX_CAL_3 0x0000000F
66#define RX_CAL_1_SHIFT 8 66#define RX_CAL_3_SHIFT 0
67#define MASK_RX_CAL_2 0x000000F0 67
68#define RX_CAL_2_SHIFT 4 68#define MASK_CANCEL_DC_I 0x3E0
69#define MASK_RX_CAL_3 0x0000000F 69#define CANCEL_DC_I_SHIFT 5
70#define RX_CAL_3_SHIFT 0 70#define MASK_CANCEL_DC_Q 0x01F
71 71#define CANCEL_DC_Q_SHIFT 0
72#define MASK_CANCEL_DC_I 0x3E0 72
73#define CANCEL_DC_I_SHIFT 5 73#define MASK_ADC_DC_CAL_I(x) (((x) & 0x0003FE00) >> 9)
74#define MASK_CANCEL_DC_Q 0x01F 74#define MASK_ADC_DC_CAL_Q(x) ((x) & 0x000001FF)
75#define CANCEL_DC_Q_SHIFT 0 75
76 76#define MASK_IQCAL_TONE_I 0x00001FFF
77// LA20040210 kevin 77#define SHIFT_IQCAL_TONE_I(x) ((x) >> 0)
78//#define MASK_ADC_DC_CAL_I(x) (((x)&0x1FE00)>>9) 78#define MASK_IQCAL_TONE_Q 0x03FFE000
79//#define MASK_ADC_DC_CAL_Q(x) ((x)&0x1FF) 79#define SHIFT_IQCAL_TONE_Q(x) ((x) >> 13)
80#define MASK_ADC_DC_CAL_I(x) (((x)&0x0003FE00)>>9) 80
81#define MASK_ADC_DC_CAL_Q(x) ((x)&0x000001FF) 81void phy_set_rf_data(struct hw_data *pHwData, u32 index, u32 value);
82 82#define phy_init_rf(_A) /* RFSynthesizer_initial(_A) */
83// LA20040210 kevin (Turbo has wrong definition)
84//#define MASK_IQCAL_TONE_I 0x7FFC000
85//#define SHIFT_IQCAL_TONE_I(x) ((x)>>13)
86//#define MASK_IQCAL_TONE_Q 0x1FFF
87//#define SHIFT_IQCAL_TONE_Q(x) ((x)>>0)
88#define MASK_IQCAL_TONE_I 0x00001FFF
89#define SHIFT_IQCAL_TONE_I(x) ((x)>>0)
90#define MASK_IQCAL_TONE_Q 0x03FFE000
91#define SHIFT_IQCAL_TONE_Q(x) ((x)>>13)
92
93// LA20040210 kevin (Turbo has wrong definition)
94//#define MASK_IQCAL_IMAGE_I 0x7FFC000
95//#define SHIFT_IQCAL_IMAGE_I(x) ((x)>>13)
96//#define MASK_IQCAL_IMAGE_Q 0x1FFF
97//#define SHIFT_IQCAL_IMAGE_Q(x) ((x)>>0)
98
99//#define MASK_IQCAL_IMAGE_I 0x00001FFF
100//#define SHIFT_IQCAL_IMAGE_I(x) ((x)>>0)
101//#define MASK_IQCAL_IMAGE_Q 0x03FFE000
102//#define SHIFT_IQCAL_IMAGE_Q(x) ((x)>>13)
103
104void phy_set_rf_data( struct hw_data * pHwData, u32 index, u32 value );
105#define phy_init_rf( _A ) //RFSynthesizer_initial( _A )
106 83
107#endif 84#endif
diff --git a/drivers/staging/winbond/reg.c b/drivers/staging/winbond/reg.c
index 5f5048af26a5..d9a8128b21f0 100644
--- a/drivers/staging/winbond/reg.c
+++ b/drivers/staging/winbond/reg.c
@@ -1,514 +1,452 @@
1#include "sysdef.h" 1#include "sysdef.h"
2#include "wbhal_f.h" 2#include "wbhal_f.h"
3 3
4/////////////////////////////////////////////////////////////////////////////////////////////////// 4/*
5// Original Phy.h 5 * ====================================================
6//***************************************************************************** 6 * Original Phy.h
7 7 * ====================================================
8/***************************************************************************** 8 */
9; For MAXIM2825/6/7 Ver. 331 or more
10; Edited by Tiger, Sep-17-2003
11; revised by Ben, Sep-18-2003
12
130x00 0x000a2
140x01 0x21cc0
15;0x02 0x13802
160x02 0x1383a
17
18;channe1 01 ; 0x03 0x30142 ; 0x04 0x0b333;
19;channe1 02 ;0x03 0x32141 ;0x04 0x08444;
20;channe1 03 ;0x03 0x32143 ;0x04 0x0aeee;
21;channe1 04 ;0x03 0x32142 ;0x04 0x0b333;
22;channe1 05 ;0x03 0x31141 ;0x04 0x08444;
23;channe1 06 ;
240x03 0x31143;
250x04 0x0aeee;
26;channe1 07 ;0x03 0x31142 ;0x04 0x0b333;
27;channe1 08 ;0x03 0x33141 ;0x04 0x08444;
28;channe1 09 ;0x03 0x33143 ;0x04 0x0aeee;
29;channe1 10 ;0x03 0x33142 ;0x04 0x0b333;
30;channe1 11 ;0x03 0x30941 ;0x04 0x08444;
31;channe1 12 ;0x03 0x30943 ;0x04 0x0aeee;
32;channe1 13 ;0x03 0x30942 ;0x04 0x0b333;
33
340x05 0x28986
350x06 0x18008
360x07 0x38400
370x08 0x05100; 100 Hz DC
38;0x08 0x05900; 30 KHz DC
390x09 0x24f08
400x0a 0x17e00, 0x17ea0
410x0b 0x37d80
420x0c 0x0c900 // 0x0ca00 (lager power 9db than 0x0c000), 0x0c000
43*****************************************************************************/
44// MAX2825 (pure b/g)
45u32 max2825_rf_data[] =
46{
47 (0x00<<18)|0x000a2,
48 (0x01<<18)|0x21cc0,
49 (0x02<<18)|0x13806,
50 (0x03<<18)|0x30142,
51 (0x04<<18)|0x0b333,
52 (0x05<<18)|0x289A6,
53 (0x06<<18)|0x18008,
54 (0x07<<18)|0x38000,
55 (0x08<<18)|0x05100,
56 (0x09<<18)|0x24f08,
57 (0x0A<<18)|0x14000,
58 (0x0B<<18)|0x37d80,
59 (0x0C<<18)|0x0c100 // 11a: 0x0c300, 11g: 0x0c100
60};
61 9
62u32 max2825_channel_data_24[][3] = 10/*
63{ 11 * ====================================================
64 {(0x03<<18)|0x30142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 01 12 * For MAXIM2825/6/7 Ver. 331 or more
65 {(0x03<<18)|0x32141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 02 13 *
66 {(0x03<<18)|0x32143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 03 14 * 0x00 0x000a2
67 {(0x03<<18)|0x32142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 04 15 * 0x01 0x21cc0
68 {(0x03<<18)|0x31141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 05 16 * 0x02 0x13802
69 {(0x03<<18)|0x31143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 06 17 * 0x02 0x1383a
70 {(0x03<<18)|0x31142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 07 18 *
71 {(0x03<<18)|0x33141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 08 19 * channe1 01 ; 0x03 0x30142 ; 0x04 0x0b333;
72 {(0x03<<18)|0x33143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 09 20 * channe1 02 ; 0x03 0x32141 ; 0x04 0x08444;
73 {(0x03<<18)|0x33142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 10 21 * channe1 03 ; 0x03 0x32143 ; 0x04 0x0aeee;
74 {(0x03<<18)|0x30941, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 11 22 * channe1 04 ; 0x03 0x32142 ; 0x04 0x0b333;
75 {(0x03<<18)|0x30943, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 12 23 * channe1 05 ; 0x03 0x31141 ; 0x04 0x08444;
76 {(0x03<<18)|0x30942, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 13 24 * channe1 06 ; 0x03 0x31143 ; 0x04 0x0aeee;
77 {(0x03<<18)|0x32941, (0x04<<18)|0x09999, (0x05<<18)|0x289A6} // 14 (2484MHz) hhmodify 25 * channe1 07 ; 0x03 0x31142 ; 0x04 0x0b333;
26 * channe1 08 ; 0x03 0x33141 ; 0x04 0x08444;
27 * channe1 09 ; 0x03 0x33143 ; 0x04 0x0aeee;
28 * channe1 10 ; 0x03 0x33142 ; 0x04 0x0b333;
29 * channe1 11 ; 0x03 0x30941 ; 0x04 0x08444;
30 * channe1 12 ; 0x03 0x30943 ; 0x04 0x0aeee;
31 * channe1 13 ; 0x03 0x30942 ; 0x04 0x0b333;
32 *
33 * 0x05 0x28986
34 * 0x06 0x18008
35 * 0x07 0x38400
36 * 0x08 0x05100; 100 Hz DC
37 * 0x08 0x05900; 30 KHz DC
38 * 0x09 0x24f08
39 * 0x0a 0x17e00, 0x17ea0
40 * 0x0b 0x37d80
41 * 0x0c 0x0c900 -- 0x0ca00 (lager power 9db than 0x0c000), 0x0c000
42 */
43
44/* MAX2825 (pure b/g) */
45u32 max2825_rf_data[] = {
46 (0x00<<18) | 0x000a2,
47 (0x01<<18) | 0x21cc0,
48 (0x02<<18) | 0x13806,
49 (0x03<<18) | 0x30142,
50 (0x04<<18) | 0x0b333,
51 (0x05<<18) | 0x289A6,
52 (0x06<<18) | 0x18008,
53 (0x07<<18) | 0x38000,
54 (0x08<<18) | 0x05100,
55 (0x09<<18) | 0x24f08,
56 (0x0A<<18) | 0x14000,
57 (0x0B<<18) | 0x37d80,
58 (0x0C<<18) | 0x0c100 /* 11a: 0x0c300, 11g: 0x0c100 */
78}; 59};
79 60
80u32 max2825_power_data_24[] = {(0x0C<<18)|0x0c000, (0x0C<<18)|0x0c100}; 61u32 max2825_channel_data_24[][3] = {
81 62 {(0x03 << 18) | 0x30142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channel 01 */
82/****************************************************************************/ 63 {(0x03 << 18) | 0x32141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channel 02 */
83// MAX2827 (a/b/g) 64 {(0x03 << 18) | 0x32143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channel 03 */
84u32 max2827_rf_data[] = 65 {(0x03 << 18) | 0x32142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channel 04 */
85{ 66 {(0x03 << 18) | 0x31141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channel 05 */
86 (0x00<<18)|0x000a2, 67 {(0x03 << 18) | 0x31143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channel 06 */
87 (0x01<<18)|0x21cc0, 68 {(0x03 << 18) | 0x31142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channel 07 */
88 (0x02<<18)|0x13806, 69 {(0x03 << 18) | 0x33141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channel 08 */
89 (0x03<<18)|0x30142, 70 {(0x03 << 18) | 0x33143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channel 09 */
90 (0x04<<18)|0x0b333, 71 {(0x03 << 18) | 0x33142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channel 10 */
91 (0x05<<18)|0x289A6, 72 {(0x03 << 18) | 0x30941, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channel 11 */
92 (0x06<<18)|0x18008, 73 {(0x03 << 18) | 0x30943, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channel 12 */
93 (0x07<<18)|0x38000, 74 {(0x03 << 18) | 0x30942, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channel 13 */
94 (0x08<<18)|0x05100, 75 {(0x03 << 18) | 0x32941, (0x04 << 18) | 0x09999, (0x05 << 18) | 0x289A6} /* channel 14 (2484MHz) */
95 (0x09<<18)|0x24f08,
96 (0x0A<<18)|0x14000,
97 (0x0B<<18)|0x37d80,
98 (0x0C<<18)|0x0c100 // 11a: 0x0c300, 11g: 0x0c100
99}; 76};
100 77
101u32 max2827_channel_data_24[][3] = 78u32 max2825_power_data_24[] = {(0x0C << 18) | 0x0c000, (0x0C << 18) | 0x0c100};
102{ 79
103 {(0x03<<18)|0x30142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 01 80/* ========================================== */
104 {(0x03<<18)|0x32141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 02 81/* MAX2827 (a/b/g) */
105 {(0x03<<18)|0x32143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 03 82u32 max2827_rf_data[] = {
106 {(0x03<<18)|0x32142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 04 83 (0x00 << 18) | 0x000a2,
107 {(0x03<<18)|0x31141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 05 84 (0x01 << 18) | 0x21cc0,
108 {(0x03<<18)|0x31143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 06 85 (0x02 << 18) | 0x13806,
109 {(0x03<<18)|0x31142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 07 86 (0x03 << 18) | 0x30142,
110 {(0x03<<18)|0x33141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 08 87 (0x04 << 18) | 0x0b333,
111 {(0x03<<18)|0x33143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 09 88 (0x05 << 18) | 0x289A6,
112 {(0x03<<18)|0x33142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 10 89 (0x06 << 18) | 0x18008,
113 {(0x03<<18)|0x30941, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 11 90 (0x07 << 18) | 0x38000,
114 {(0x03<<18)|0x30943, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 12 91 (0x08 << 18) | 0x05100,
115 {(0x03<<18)|0x30942, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 13 92 (0x09 << 18) | 0x24f08,
116 {(0x03<<18)|0x32941, (0x04<<18)|0x09999, (0x05<<18)|0x289A6} // 14 (2484MHz) hhmodify 93 (0x0A << 18) | 0x14000,
94 (0x0B << 18) | 0x37d80,
95 (0x0C << 18) | 0x0c100 /* 11a: 0x0c300, 11g: 0x0c100 */
117}; 96};
118 97
119u32 max2827_channel_data_50[][3] = 98u32 max2827_channel_data_24[][3] = {
120{ 99 {(0x03 << 18) | 0x30142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 01 */
121 {(0x03<<18)|0x33cc3, (0x04<<18)|0x08ccc, (0x05<<18)|0x2A9A6}, // channel 36 100 {(0x03 << 18) | 0x32141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 02 */
122 {(0x03<<18)|0x302c0, (0x04<<18)|0x08000, (0x05<<18)|0x2A9A6}, // channel 40 101 {(0x03 << 18) | 0x32143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 03 */
123 {(0x03<<18)|0x302c2, (0x04<<18)|0x0b333, (0x05<<18)|0x2A9A6}, // channel 44 102 {(0x03 << 18) | 0x32142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 04 */
124 {(0x03<<18)|0x322c1, (0x04<<18)|0x09999, (0x05<<18)|0x2A9A6}, // channel 48 103 {(0x03 << 18) | 0x31141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 05 */
125 {(0x03<<18)|0x312c1, (0x04<<18)|0x0a666, (0x05<<18)|0x2A9A6}, // channel 52 104 {(0x03 << 18) | 0x31143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 06 */
126 {(0x03<<18)|0x332c3, (0x04<<18)|0x08ccc, (0x05<<18)|0x2A9A6}, // channel 56 105 {(0x03 << 18) | 0x31142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 07 */
127 {(0x03<<18)|0x30ac0, (0x04<<18)|0x08000, (0x05<<18)|0x2A9A6}, // channel 60 106 {(0x03 << 18) | 0x33141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 08 */
128 {(0x03<<18)|0x30ac2, (0x04<<18)|0x0b333, (0x05<<18)|0x2A9A6} // channel 64 107 {(0x03 << 18) | 0x33143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 09 */
108 {(0x03 << 18) | 0x33142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 10 */
109 {(0x03 << 18) | 0x30941, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 11 */
110 {(0x03 << 18) | 0x30943, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 12 */
111 {(0x03 << 18) | 0x30942, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 13 */
112 {(0x03 << 18) | 0x32941, (0x04 << 18) | 0x09999, (0x05 << 18) | 0x289A6} /* channel 14 (2484MHz) */
129}; 113};
130 114
131u32 max2827_power_data_24[] = {(0x0C<<18)|0x0C000, (0x0C<<18)|0x0D600, (0x0C<<18)|0x0C100}; 115u32 max2827_channel_data_50[][3] = {
132u32 max2827_power_data_50[] = {(0x0C<<18)|0x0C400, (0x0C<<18)|0x0D500, (0x0C<<18)|0x0C300}; 116 {(0x03 << 18) | 0x33cc3, (0x04 << 18) | 0x08ccc, (0x05 << 18) | 0x2A9A6}, /* channel 36 */
133 117 {(0x03 << 18) | 0x302c0, (0x04 << 18) | 0x08000, (0x05 << 18) | 0x2A9A6}, /* channel 40 */
134/****************************************************************************/ 118 {(0x03 << 18) | 0x302c2, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x2A9A6}, /* channel 44 */
135// MAX2828 (a/b/g) 119 {(0x03 << 18) | 0x322c1, (0x04 << 18) | 0x09999, (0x05 << 18) | 0x2A9A6}, /* channel 48 */
136u32 max2828_rf_data[] = 120 {(0x03 << 18) | 0x312c1, (0x04 << 18) | 0x0a666, (0x05 << 18) | 0x2A9A6}, /* channel 52 */
137{ 121 {(0x03 << 18) | 0x332c3, (0x04 << 18) | 0x08ccc, (0x05 << 18) | 0x2A9A6}, /* channel 56 */
138 (0x00<<18)|0x000a2, 122 {(0x03 << 18) | 0x30ac0, (0x04 << 18) | 0x08000, (0x05 << 18) | 0x2A9A6}, /* channel 60 */
139 (0x01<<18)|0x21cc0, 123 {(0x03 << 18) | 0x30ac2, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x2A9A6} /* channel 64 */
140 (0x02<<18)|0x13806,
141 (0x03<<18)|0x30142,
142 (0x04<<18)|0x0b333,
143 (0x05<<18)|0x289A6,
144 (0x06<<18)|0x18008,
145 (0x07<<18)|0x38000,
146 (0x08<<18)|0x05100,
147 (0x09<<18)|0x24f08,
148 (0x0A<<18)|0x14000,
149 (0x0B<<18)|0x37d80,
150 (0x0C<<18)|0x0c100 // 11a: 0x0c300, 11g: 0x0c100
151}; 124};
152 125
153u32 max2828_channel_data_24[][3] = 126u32 max2827_power_data_24[] = {(0x0C << 18) | 0x0C000, (0x0C << 18) | 0x0D600, (0x0C << 18) | 0x0C100};
154{ 127u32 max2827_power_data_50[] = {(0x0C << 18) | 0x0C400, (0x0C << 18) | 0x0D500, (0x0C << 18) | 0x0C300};
155 {(0x03<<18)|0x30142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 01 128
156 {(0x03<<18)|0x32141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 02 129/* ======================================================= */
157 {(0x03<<18)|0x32143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 03 130/* MAX2828 (a/b/g) */
158 {(0x03<<18)|0x32142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 04 131u32 max2828_rf_data[] = {
159 {(0x03<<18)|0x31141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 05 132 (0x00 << 18) | 0x000a2,
160 {(0x03<<18)|0x31143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 06 133 (0x01 << 18) | 0x21cc0,
161 {(0x03<<18)|0x31142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 07 134 (0x02 << 18) | 0x13806,
162 {(0x03<<18)|0x33141, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 08 135 (0x03 << 18) | 0x30142,
163 {(0x03<<18)|0x33143, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 09 136 (0x04 << 18) | 0x0b333,
164 {(0x03<<18)|0x33142, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 10 137 (0x05 << 18) | 0x289A6,
165 {(0x03<<18)|0x30941, (0x04<<18)|0x08444, (0x05<<18)|0x289A6}, // channe1 11 138 (0x06 << 18) | 0x18008,
166 {(0x03<<18)|0x30943, (0x04<<18)|0x0aeee, (0x05<<18)|0x289A6}, // channe1 12 139 (0x07 << 18) | 0x38000,
167 {(0x03<<18)|0x30942, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channe1 13 140 (0x08 << 18) | 0x05100,
168 {(0x03<<18)|0x32941, (0x04<<18)|0x09999, (0x05<<18)|0x289A6} // 14 (2484MHz) hhmodify 141 (0x09 << 18) | 0x24f08,
142 (0x0A << 18) | 0x14000,
143 (0x0B << 18) | 0x37d80,
144 (0x0C << 18) | 0x0c100 /* 11a: 0x0c300, 11g: 0x0c100 */
169}; 145};
170 146
171u32 max2828_channel_data_50[][3] = 147u32 max2828_channel_data_24[][3] = {
172{ 148 {(0x03 << 18) | 0x30142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 01 */
173 {(0x03<<18)|0x33cc3, (0x04<<18)|0x08ccc, (0x05<<18)|0x289A6}, // channel 36 149 {(0x03 << 18) | 0x32141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 02 */
174 {(0x03<<18)|0x302c0, (0x04<<18)|0x08000, (0x05<<18)|0x289A6}, // channel 40 150 {(0x03 << 18) | 0x32143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 03 */
175 {(0x03<<18)|0x302c2, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6}, // channel 44 151 {(0x03 << 18) | 0x32142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 04 */
176 {(0x03<<18)|0x322c1, (0x04<<18)|0x09999, (0x05<<18)|0x289A6}, // channel 48 152 {(0x03 << 18) | 0x31141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 05 */
177 {(0x03<<18)|0x312c1, (0x04<<18)|0x0a666, (0x05<<18)|0x289A6}, // channel 52 153 {(0x03 << 18) | 0x31143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 06 */
178 {(0x03<<18)|0x332c3, (0x04<<18)|0x08ccc, (0x05<<18)|0x289A6}, // channel 56 154 {(0x03 << 18) | 0x31142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 07 */
179 {(0x03<<18)|0x30ac0, (0x04<<18)|0x08000, (0x05<<18)|0x289A6}, // channel 60 155 {(0x03 << 18) | 0x33141, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 08 */
180 {(0x03<<18)|0x30ac2, (0x04<<18)|0x0b333, (0x05<<18)|0x289A6} // channel 64 156 {(0x03 << 18) | 0x33143, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 09 */
157 {(0x03 << 18) | 0x33142, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 10 */
158 {(0x03 << 18) | 0x30941, (0x04 << 18) | 0x08444, (0x05 << 18) | 0x289A6}, /* channe1 11 */
159 {(0x03 << 18) | 0x30943, (0x04 << 18) | 0x0aeee, (0x05 << 18) | 0x289A6}, /* channe1 12 */
160 {(0x03 << 18) | 0x30942, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channe1 13 */
161 {(0x03 << 18) | 0x32941, (0x04 << 18) | 0x09999, (0x05 << 18) | 0x289A6} /* channel 14 (2484MHz) */
181}; 162};
182 163
183u32 max2828_power_data_24[] = {(0x0C<<18)|0x0c000, (0x0C<<18)|0x0c100}; 164u32 max2828_channel_data_50[][3] = {
184u32 max2828_power_data_50[] = {(0x0C<<18)|0x0c000, (0x0C<<18)|0x0c100}; 165 {(0x03 << 18) | 0x33cc3, (0x04 << 18) | 0x08ccc, (0x05 << 18) | 0x289A6}, /* channel 36 */
185 166 {(0x03 << 18) | 0x302c0, (0x04 << 18) | 0x08000, (0x05 << 18) | 0x289A6}, /* channel 40 */
186/****************************************************************************/ 167 {(0x03 << 18) | 0x302c2, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6}, /* channel 44 */
187// LA20040728 kevin 168 {(0x03 << 18) | 0x322c1, (0x04 << 18) | 0x09999, (0x05 << 18) | 0x289A6}, /* channel 48 */
188// MAX2829 (a/b/g) 169 {(0x03 << 18) | 0x312c1, (0x04 << 18) | 0x0a666, (0x05 << 18) | 0x289A6}, /* channel 52 */
189u32 max2829_rf_data[] = 170 {(0x03 << 18) | 0x332c3, (0x04 << 18) | 0x08ccc, (0x05 << 18) | 0x289A6}, /* channel 56 */
190{ 171 {(0x03 << 18) | 0x30ac0, (0x04 << 18) | 0x08000, (0x05 << 18) | 0x289A6}, /* channel 60 */
191 (0x00<<18)|0x000a2, 172 {(0x03 << 18) | 0x30ac2, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x289A6} /* channel 64 */
192 (0x01<<18)|0x23520,
193 (0x02<<18)|0x13802,
194 (0x03<<18)|0x30142,
195 (0x04<<18)|0x0b333,
196 (0x05<<18)|0x28906,
197 (0x06<<18)|0x18008,
198 (0x07<<18)|0x3B500,
199 (0x08<<18)|0x05100,
200 (0x09<<18)|0x24f08,
201 (0x0A<<18)|0x14000,
202 (0x0B<<18)|0x37d80,
203 (0x0C<<18)|0x0F300 //TXVGA=51, (MAX-6 dB)
204}; 173};
205 174
206u32 max2829_channel_data_24[][3] = 175u32 max2828_power_data_24[] = {(0x0C << 18) | 0x0c000, (0x0C << 18) | 0x0c100};
207{ 176u32 max2828_power_data_50[] = {(0x0C << 18) | 0x0c000, (0x0C << 18) | 0x0c100};
208 {(3<<18)|0x30142, (4<<18)|0x0b333, (5<<18)|0x289C6}, // 01 (2412MHz) 177
209 {(3<<18)|0x32141, (4<<18)|0x08444, (5<<18)|0x289C6}, // 02 (2417MHz) 178/* ========================================================== */
210 {(3<<18)|0x32143, (4<<18)|0x0aeee, (5<<18)|0x289C6}, // 03 (2422MHz) 179/* MAX2829 (a/b/g) */
211 {(3<<18)|0x32142, (4<<18)|0x0b333, (5<<18)|0x289C6}, // 04 (2427MHz) 180u32 max2829_rf_data[] = {
212 {(3<<18)|0x31141, (4<<18)|0x08444, (5<<18)|0x289C6}, // 05 (2432MHz) 181 (0x00 << 18) | 0x000a2,
213 {(3<<18)|0x31143, (4<<18)|0x0aeee, (5<<18)|0x289C6}, // 06 (2437MHz) 182 (0x01 << 18) | 0x23520,
214 {(3<<18)|0x31142, (4<<18)|0x0b333, (5<<18)|0x289C6}, // 07 (2442MHz) 183 (0x02 << 18) | 0x13802,
215 {(3<<18)|0x33141, (4<<18)|0x08444, (5<<18)|0x289C6}, // 08 (2447MHz) 184 (0x03 << 18) | 0x30142,
216 {(3<<18)|0x33143, (4<<18)|0x0aeee, (5<<18)|0x289C6}, // 09 (2452MHz) 185 (0x04 << 18) | 0x0b333,
217 {(3<<18)|0x33142, (4<<18)|0x0b333, (5<<18)|0x289C6}, // 10 (2457MHz) 186 (0x05 << 18) | 0x28906,
218 {(3<<18)|0x30941, (4<<18)|0x08444, (5<<18)|0x289C6}, // 11 (2462MHz) 187 (0x06 << 18) | 0x18008,
219 {(3<<18)|0x30943, (4<<18)|0x0aeee, (5<<18)|0x289C6}, // 12 (2467MHz) 188 (0x07 << 18) | 0x3B500,
220 {(3<<18)|0x30942, (4<<18)|0x0b333, (5<<18)|0x289C6}, // 13 (2472MHz) 189 (0x08 << 18) | 0x05100,
221 {(3<<18)|0x32941, (4<<18)|0x09999, (5<<18)|0x289C6}, // 14 (2484MHz) hh-modify 190 (0x09 << 18) | 0x24f08,
191 (0x0A << 18) | 0x14000,
192 (0x0B << 18) | 0x37d80,
193 (0x0C << 18) | 0x0F300 /* TXVGA=51, (MAX-6 dB) */
222}; 194};
223 195
224u32 max2829_channel_data_50[][4] = 196u32 max2829_channel_data_24[][3] = {
225{ 197 {(3 << 18) | 0x30142, (4 << 18) | 0x0b333, (5 << 18) | 0x289C6}, /* 01 (2412MHz) */
226 {36, (3<<18)|0x33cc3, (4<<18)|0x08ccc, (5<<18)|0x2A946}, // 36 (5.180GHz) 198 {(3 << 18) | 0x32141, (4 << 18) | 0x08444, (5 << 18) | 0x289C6}, /* 02 (2417MHz) */
227 {40, (3<<18)|0x302c0, (4<<18)|0x08000, (5<<18)|0x2A946}, // 40 (5.200GHz) 199 {(3 << 18) | 0x32143, (4 << 18) | 0x0aeee, (5 << 18) | 0x289C6}, /* 03 (2422MHz) */
228 {44, (3<<18)|0x302c2, (4<<18)|0x0b333, (5<<18)|0x2A946}, // 44 (5.220GHz) 200 {(3 << 18) | 0x32142, (4 << 18) | 0x0b333, (5 << 18) | 0x289C6}, /* 04 (2427MHz) */
229 {48, (3<<18)|0x322c1, (4<<18)|0x09999, (5<<18)|0x2A946}, // 48 (5.240GHz) 201 {(3 << 18) | 0x31141, (4 << 18) | 0x08444, (5 << 18) | 0x289C6}, /* 05 (2432MHz) */
230 {52, (3<<18)|0x312c1, (4<<18)|0x0a666, (5<<18)|0x2A946}, // 52 (5.260GHz) 202 {(3 << 18) | 0x31143, (4 << 18) | 0x0aeee, (5 << 18) | 0x289C6}, /* 06 (2437MHz) */
231 {56, (3<<18)|0x332c3, (4<<18)|0x08ccc, (5<<18)|0x2A946}, // 56 (5.280GHz) 203 {(3 << 18) | 0x31142, (4 << 18) | 0x0b333, (5 << 18) | 0x289C6}, /* 07 (2442MHz) */
232 {60, (3<<18)|0x30ac0, (4<<18)|0x08000, (5<<18)|0x2A946}, // 60 (5.300GHz) 204 {(3 << 18) | 0x33141, (4 << 18) | 0x08444, (5 << 18) | 0x289C6}, /* 08 (2447MHz) */
233 {64, (3<<18)|0x30ac2, (4<<18)|0x0b333, (5<<18)|0x2A946}, // 64 (5.320GHz) 205 {(3 << 18) | 0x33143, (4 << 18) | 0x0aeee, (5 << 18) | 0x289C6}, /* 09 (2452MHz) */
234 206 {(3 << 18) | 0x33142, (4 << 18) | 0x0b333, (5 << 18) | 0x289C6}, /* 10 (2457MHz) */
235 {100, (3<<18)|0x30ec0, (4<<18)|0x08000, (5<<18)|0x2A9C6}, // 100 (5.500GHz) 207 {(3 << 18) | 0x30941, (4 << 18) | 0x08444, (5 << 18) | 0x289C6}, /* 11 (2462MHz) */
236 {104, (3<<18)|0x30ec2, (4<<18)|0x0b333, (5<<18)|0x2A9C6}, // 104 (5.520GHz) 208 {(3 << 18) | 0x30943, (4 << 18) | 0x0aeee, (5 << 18) | 0x289C6}, /* 12 (2467MHz) */
237 {108, (3<<18)|0x32ec1, (4<<18)|0x09999, (5<<18)|0x2A9C6}, // 108 (5.540GHz) 209 {(3 << 18) | 0x30942, (4 << 18) | 0x0b333, (5 << 18) | 0x289C6}, /* 13 (2472MHz) */
238 {112, (3<<18)|0x31ec1, (4<<18)|0x0a666, (5<<18)|0x2A9C6}, // 112 (5.560GHz) 210 {(3 << 18) | 0x32941, (4 << 18) | 0x09999, (5 << 18) | 0x289C6}, /* 14 (2484MHz) */
239 {116, (3<<18)|0x33ec3, (4<<18)|0x08ccc, (5<<18)|0x2A9C6}, // 116 (5.580GHz)
240 {120, (3<<18)|0x301c0, (4<<18)|0x08000, (5<<18)|0x2A9C6}, // 120 (5.600GHz)
241 {124, (3<<18)|0x301c2, (4<<18)|0x0b333, (5<<18)|0x2A9C6}, // 124 (5.620GHz)
242 {128, (3<<18)|0x321c1, (4<<18)|0x09999, (5<<18)|0x2A9C6}, // 128 (5.640GHz)
243 {132, (3<<18)|0x311c1, (4<<18)|0x0a666, (5<<18)|0x2A9C6}, // 132 (5.660GHz)
244 {136, (3<<18)|0x331c3, (4<<18)|0x08ccc, (5<<18)|0x2A9C6}, // 136 (5.680GHz)
245 {140, (3<<18)|0x309c0, (4<<18)|0x08000, (5<<18)|0x2A9C6}, // 140 (5.700GHz)
246
247 {149, (3<<18)|0x329c2, (4<<18)|0x0b333, (5<<18)|0x2A9C6}, // 149 (5.745GHz)
248 {153, (3<<18)|0x319c1, (4<<18)|0x09999, (5<<18)|0x2A9C6}, // 153 (5.765GHz)
249 {157, (3<<18)|0x339c1, (4<<18)|0x0a666, (5<<18)|0x2A9C6}, // 157 (5.785GHz)
250 {161, (3<<18)|0x305c3, (4<<18)|0x08ccc, (5<<18)|0x2A9C6}, // 161 (5.805GHz)
251
252 // Japan
253 { 184, (3<<18)|0x308c2, (4<<18)|0x0b333, (5<<18)|0x2A946}, // 184 (4.920GHz)
254 { 188, (3<<18)|0x328c1, (4<<18)|0x09999, (5<<18)|0x2A946}, // 188 (4.940GHz)
255 { 192, (3<<18)|0x318c1, (4<<18)|0x0a666, (5<<18)|0x2A946}, // 192 (4.960GHz)
256 { 196, (3<<18)|0x338c3, (4<<18)|0x08ccc, (5<<18)|0x2A946}, // 196 (4.980GHz)
257 { 8, (3<<18)|0x324c1, (4<<18)|0x09999, (5<<18)|0x2A946}, // 8 (5.040GHz)
258 { 12, (3<<18)|0x314c1, (4<<18)|0x0a666, (5<<18)|0x2A946}, // 12 (5.060GHz)
259 { 16, (3<<18)|0x334c3, (4<<18)|0x08ccc, (5<<18)|0x2A946}, // 16 (5.080GHz)
260 { 34, (3<<18)|0x31cc2, (4<<18)|0x0b333, (5<<18)|0x2A946}, // 34 (5.170GHz)
261 { 38, (3<<18)|0x33cc1, (4<<18)|0x09999, (5<<18)|0x2A946}, // 38 (5.190GHz)
262 { 42, (3<<18)|0x302c1, (4<<18)|0x0a666, (5<<18)|0x2A946}, // 42 (5.210GHz)
263 { 46, (3<<18)|0x322c3, (4<<18)|0x08ccc, (5<<18)|0x2A946}, // 46 (5.230GHz)
264}; 211};
265 212
266/***************************************************************************** 213u32 max2829_channel_data_50[][4] = {
267; For MAXIM2825/6/7 Ver. 317 or less 214 {36, (3 << 18) | 0x33cc3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A946}, /* 36 (5.180GHz) */
268; Edited by Tiger, Sep-17-2003 for 2.4Ghz channels 215 {40, (3 << 18) | 0x302c0, (4 << 18) | 0x08000, (5 << 18) | 0x2A946}, /* 40 (5.200GHz) */
269; Updated by Tiger, Sep-22-2003 for 5.0Ghz channels 216 {44, (3 << 18) | 0x302c2, (4 << 18) | 0x0b333, (5 << 18) | 0x2A946}, /* 44 (5.220GHz) */
270; Corrected by Tiger, Sep-23-2003, for 0x03 and 0x04 of 5.0Ghz channels 217 {48, (3 << 18) | 0x322c1, (4 << 18) | 0x09999, (5 << 18) | 0x2A946}, /* 48 (5.240GHz) */
271 218 {52, (3 << 18) | 0x312c1, (4 << 18) | 0x0a666, (5 << 18) | 0x2A946}, /* 52 (5.260GHz) */
2720x00 0x00080 219 {56, (3 << 18) | 0x332c3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A946}, /* 56 (5.280GHz) */
2730x01 0x214c0 220 {60, (3 << 18) | 0x30ac0, (4 << 18) | 0x08000, (5 << 18) | 0x2A946}, /* 60 (5.300GHz) */
2740x02 0x13802 221 {64, (3 << 18) | 0x30ac2, (4 << 18) | 0x0b333, (5 << 18) | 0x2A946}, /* 64 (5.320GHz) */
275 222
276;2.4GHz Channels 223 {100, (3 << 18) | 0x30ec0, (4 << 18) | 0x08000, (5 << 18) | 0x2A9C6}, /* 100 (5.500GHz) */
277;channe1 01 (2.412GHz); 0x03 0x30143 ;0x04 0x0accc 224 {104, (3 << 18) | 0x30ec2, (4 << 18) | 0x0b333, (5 << 18) | 0x2A9C6}, /* 104 (5.520GHz) */
278;channe1 02 (2.417GHz); 0x03 0x32140 ;0x04 0x09111 225 {108, (3 << 18) | 0x32ec1, (4 << 18) | 0x09999, (5 << 18) | 0x2A9C6}, /* 108 (5.540GHz) */
279;channe1 03 (2.422GHz); 0x03 0x32142 ;0x04 0x0bbbb 226 {112, (3 << 18) | 0x31ec1, (4 << 18) | 0x0a666, (5 << 18) | 0x2A9C6}, /* 112 (5.560GHz) */
280;channe1 04 (2.427GHz); 0x03 0x32143 ;0x04 0x0accc 227 {116, (3 << 18) | 0x33ec3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A9C6}, /* 116 (5.580GHz) */
281;channe1 05 (2.432GHz); 0x03 0x31140 ;0x04 0x09111 228 {120, (3 << 18) | 0x301c0, (4 << 18) | 0x08000, (5 << 18) | 0x2A9C6}, /* 120 (5.600GHz) */
282;channe1 06 (2.437GHz); 0x03 0x31142 ;0x04 0x0bbbb 229 {124, (3 << 18) | 0x301c2, (4 << 18) | 0x0b333, (5 << 18) | 0x2A9C6}, /* 124 (5.620GHz) */
283;channe1 07 (2.442GHz); 0x03 0x31143 ;0x04 0x0accc 230 {128, (3 << 18) | 0x321c1, (4 << 18) | 0x09999, (5 << 18) | 0x2A9C6}, /* 128 (5.640GHz) */
284;channe1 08 (2.447GHz); 0x03 0x33140 ;0x04 0x09111 231 {132, (3 << 18) | 0x311c1, (4 << 18) | 0x0a666, (5 << 18) | 0x2A9C6}, /* 132 (5.660GHz) */
285;channe1 09 (2.452GHz); 0x03 0x33142 ;0x04 0x0bbbb 232 {136, (3 << 18) | 0x331c3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A9C6}, /* 136 (5.680GHz) */
286;channe1 10 (2.457GHz); 0x03 0x33143 ;0x04 0x0accc 233 {140, (3 << 18) | 0x309c0, (4 << 18) | 0x08000, (5 << 18) | 0x2A9C6}, /* 140 (5.700GHz) */
287;channe1 11 (2.462GHz); 0x03 0x30940 ;0x04 0x09111 234
288;channe1 12 (2.467GHz); 0x03 0x30942 ;0x04 0x0bbbb 235 {149, (3 << 18) | 0x329c2, (4 << 18) | 0x0b333, (5 << 18) | 0x2A9C6}, /* 149 (5.745GHz) */
289;channe1 13 (2.472GHz); 0x03 0x30943 ;0x04 0x0accc 236 {153, (3 << 18) | 0x319c1, (4 << 18) | 0x09999, (5 << 18) | 0x2A9C6}, /* 153 (5.765GHz) */
290 237 {157, (3 << 18) | 0x339c1, (4 << 18) | 0x0a666, (5 << 18) | 0x2A9C6}, /* 157 (5.785GHz) */
291;5.0Ghz Channels 238 {161, (3 << 18) | 0x305c3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A9C6}, /* 161 (5.805GHz) */
292;channel 36 (5.180GHz); 0x03 0x33cc0 ;0x04 0x0b333 239
293;channel 40 (5.200GHz); 0x03 0x302c0 ;0x04 0x08000 240 /* Japan */
294;channel 44 (5.220GHz); 0x03 0x302c2 ;0x04 0x0b333 241 { 184, (3 << 18) | 0x308c2, (4 << 18) | 0x0b333, (5 << 18) | 0x2A946}, /* 184 (4.920GHz) */
295;channel 48 (5.240GHz); 0x03 0x322c1 ;0x04 0x09999 242 { 188, (3 << 18) | 0x328c1, (4 << 18) | 0x09999, (5 << 18) | 0x2A946}, /* 188 (4.940GHz) */
296;channel 52 (5.260GHz); 0x03 0x312c1 ;0x04 0x0a666 243 { 192, (3 << 18) | 0x318c1, (4 << 18) | 0x0a666, (5 << 18) | 0x2A946}, /* 192 (4.960GHz) */
297;channel 56 (5.280GHz); 0x03 0x332c3 ;0x04 0x08ccc 244 { 196, (3 << 18) | 0x338c3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A946}, /* 196 (4.980GHz) */
298;channel 60 (5.300GHz); 0x03 0x30ac0 ;0x04 0x08000 245 { 8, (3 << 18) | 0x324c1, (4 << 18) | 0x09999, (5 << 18) | 0x2A946}, /* 8 (5.040GHz) */
299;channel 64 (5.320GHz); 0x03 0x30ac2 ;0x04 0x08333 246 { 12, (3 << 18) | 0x314c1, (4 << 18) | 0x0a666, (5 << 18) | 0x2A946}, /* 12 (5.060GHz) */
300 247 { 16, (3 << 18) | 0x334c3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A946}, /* 16 (5.080GHz) */
301;2.4GHz band ;0x05 0x28986; 248 { 34, (3 << 18) | 0x31cc2, (4 << 18) | 0x0b333, (5 << 18) | 0x2A946}, /* 34 (5.170GHz) */
302;5.0GHz band 249 { 38, (3 << 18) | 0x33cc1, (4 << 18) | 0x09999, (5 << 18) | 0x2A946}, /* 38 (5.190GHz) */
3030x05 0x2a986 250 { 42, (3 << 18) | 0x302c1, (4 << 18) | 0x0a666, (5 << 18) | 0x2A946}, /* 42 (5.210GHz) */
304 251 { 46, (3 << 18) | 0x322c3, (4 << 18) | 0x08ccc, (5 << 18) | 0x2A946}, /* 46 (5.230GHz) */
3050x06 0x18008
3060x07 0x38400
3070x08 0x05108
3080x09 0x27ff8
3090x0a 0x14000
3100x0b 0x37f99
3110x0c 0x0c000
312*****************************************************************************/
313u32 maxim_317_rf_data[] =
314{
315 (0x00<<18)|0x000a2,
316 (0x01<<18)|0x214c0,
317 (0x02<<18)|0x13802,
318 (0x03<<18)|0x30143,
319 (0x04<<18)|0x0accc,
320 (0x05<<18)|0x28986,
321 (0x06<<18)|0x18008,
322 (0x07<<18)|0x38400,
323 (0x08<<18)|0x05108,
324 (0x09<<18)|0x27ff8,
325 (0x0A<<18)|0x14000,
326 (0x0B<<18)|0x37f99,
327 (0x0C<<18)|0x0c000
328}; 252};
329 253
330u32 maxim_317_channel_data_24[][3] = 254/*
331{ 255 * ====================================================================
332 {(0x03<<18)|0x30143, (0x04<<18)|0x0accc, (0x05<<18)|0x28986}, // channe1 01 256 * For MAXIM2825/6/7 Ver. 317 or less
333 {(0x03<<18)|0x32140, (0x04<<18)|0x09111, (0x05<<18)|0x28986}, // channe1 02 257 *
334 {(0x03<<18)|0x32142, (0x04<<18)|0x0bbbb, (0x05<<18)|0x28986}, // channe1 03 258 * 0x00 0x00080
335 {(0x03<<18)|0x32143, (0x04<<18)|0x0accc, (0x05<<18)|0x28986}, // channe1 04 259 * 0x01 0x214c0
336 {(0x03<<18)|0x31140, (0x04<<18)|0x09111, (0x05<<18)|0x28986}, // channe1 05 260 * 0x02 0x13802
337 {(0x03<<18)|0x31142, (0x04<<18)|0x0bbbb, (0x05<<18)|0x28986}, // channe1 06 261 *
338 {(0x03<<18)|0x31143, (0x04<<18)|0x0accc, (0x05<<18)|0x28986}, // channe1 07 262 * 2.4GHz Channels
339 {(0x03<<18)|0x33140, (0x04<<18)|0x09111, (0x05<<18)|0x28986}, // channe1 08 263 * channe1 01 (2.412GHz); 0x03 0x30143 ;0x04 0x0accc
340 {(0x03<<18)|0x33142, (0x04<<18)|0x0bbbb, (0x05<<18)|0x28986}, // channe1 09 264 * channe1 02 (2.417GHz); 0x03 0x32140 ;0x04 0x09111
341 {(0x03<<18)|0x33143, (0x04<<18)|0x0accc, (0x05<<18)|0x28986}, // channe1 10 265 * channe1 03 (2.422GHz); 0x03 0x32142 ;0x04 0x0bbbb
342 {(0x03<<18)|0x30940, (0x04<<18)|0x09111, (0x05<<18)|0x28986}, // channe1 11 266 * channe1 04 (2.427GHz); 0x03 0x32143 ;0x04 0x0accc
343 {(0x03<<18)|0x30942, (0x04<<18)|0x0bbbb, (0x05<<18)|0x28986}, // channe1 12 267 * channe1 05 (2.432GHz); 0x03 0x31140 ;0x04 0x09111
344 {(0x03<<18)|0x30943, (0x04<<18)|0x0accc, (0x05<<18)|0x28986} // channe1 13 268 * channe1 06 (2.437GHz); 0x03 0x31142 ;0x04 0x0bbbb
269 * channe1 07 (2.442GHz); 0x03 0x31143 ;0x04 0x0accc
270 * channe1 08 (2.447GHz); 0x03 0x33140 ;0x04 0x09111
271 * channe1 09 (2.452GHz); 0x03 0x33142 ;0x04 0x0bbbb
272 * channe1 10 (2.457GHz); 0x03 0x33143 ;0x04 0x0accc
273 * channe1 11 (2.462GHz); 0x03 0x30940 ;0x04 0x09111
274 * channe1 12 (2.467GHz); 0x03 0x30942 ;0x04 0x0bbbb
275 * channe1 13 (2.472GHz); 0x03 0x30943 ;0x04 0x0accc
276 *
277 * 5.0Ghz Channels
278 * channel 36 (5.180GHz); 0x03 0x33cc0 ;0x04 0x0b333
279 * channel 40 (5.200GHz); 0x03 0x302c0 ;0x04 0x08000
280 * channel 44 (5.220GHz); 0x03 0x302c2 ;0x04 0x0b333
281 * channel 48 (5.240GHz); 0x03 0x322c1 ;0x04 0x09999
282 * channel 52 (5.260GHz); 0x03 0x312c1 ;0x04 0x0a666
283 * channel 56 (5.280GHz); 0x03 0x332c3 ;0x04 0x08ccc
284 * channel 60 (5.300GHz); 0x03 0x30ac0 ;0x04 0x08000
285 * channel 64 (5.320GHz); 0x03 0x30ac2 ;0x04 0x08333
286 *
287 * 2.4GHz band ; 0x05 0x28986;
288 * 5.0GHz band ; 0x05 0x2a986
289 * 0x06 0x18008
290 * 0x07 0x38400
291 * 0x08 0x05108
292 * 0x09 0x27ff8
293 * 0x0a 0x14000
294 * 0x0b 0x37f99
295 * 0x0c 0x0c000
296 * ====================================================================
297 */
298u32 maxim_317_rf_data[] = {
299 (0x00 << 18) | 0x000a2,
300 (0x01 << 18) | 0x214c0,
301 (0x02 << 18) | 0x13802,
302 (0x03 << 18) | 0x30143,
303 (0x04 << 18) | 0x0accc,
304 (0x05 << 18) | 0x28986,
305 (0x06 << 18) | 0x18008,
306 (0x07 << 18) | 0x38400,
307 (0x08 << 18) | 0x05108,
308 (0x09 << 18) | 0x27ff8,
309 (0x0A << 18) | 0x14000,
310 (0x0B << 18) | 0x37f99,
311 (0x0C << 18) | 0x0c000
345}; 312};
346 313
347u32 maxim_317_channel_data_50[][3] = 314u32 maxim_317_channel_data_24[][3] = {
348{ 315 {(0x03 << 18) | 0x30143, (0x04 << 18) | 0x0accc, (0x05 << 18) | 0x28986}, /* channe1 01 */
349 {(0x03<<18)|0x33cc0, (0x04<<18)|0x0b333, (0x05<<18)|0x2a986}, // channel 36 316 {(0x03 << 18) | 0x32140, (0x04 << 18) | 0x09111, (0x05 << 18) | 0x28986}, /* channe1 02 */
350 {(0x03<<18)|0x302c0, (0x04<<18)|0x08000, (0x05<<18)|0x2a986}, // channel 40 317 {(0x03 << 18) | 0x32142, (0x04 << 18) | 0x0bbbb, (0x05 << 18) | 0x28986}, /* channe1 03 */
351 {(0x03<<18)|0x302c3, (0x04<<18)|0x0accc, (0x05<<18)|0x2a986}, // channel 44 318 {(0x03 << 18) | 0x32143, (0x04 << 18) | 0x0accc, (0x05 << 18) | 0x28986}, /* channe1 04 */
352 {(0x03<<18)|0x322c1, (0x04<<18)|0x09666, (0x05<<18)|0x2a986}, // channel 48 319 {(0x03 << 18) | 0x31140, (0x04 << 18) | 0x09111, (0x05 << 18) | 0x28986}, /* channe1 05 */
353 {(0x03<<18)|0x312c2, (0x04<<18)|0x09999, (0x05<<18)|0x2a986}, // channel 52 320 {(0x03 << 18) | 0x31142, (0x04 << 18) | 0x0bbbb, (0x05 << 18) | 0x28986}, /* channe1 06 */
354 {(0x03<<18)|0x332c0, (0x04<<18)|0x0b333, (0x05<<18)|0x2a99e}, // channel 56 321 {(0x03 << 18) | 0x31143, (0x04 << 18) | 0x0accc, (0x05 << 18) | 0x28986}, /* channe1 07 */
355 {(0x03<<18)|0x30ac0, (0x04<<18)|0x08000, (0x05<<18)|0x2a99e}, // channel 60 322 {(0x03 << 18) | 0x33140, (0x04 << 18) | 0x09111, (0x05 << 18) | 0x28986}, /* channe1 08 */
356 {(0x03<<18)|0x30ac3, (0x04<<18)|0x0accc, (0x05<<18)|0x2a99e} // channel 64 323 {(0x03 << 18) | 0x33142, (0x04 << 18) | 0x0bbbb, (0x05 << 18) | 0x28986}, /* channe1 09 */
324 {(0x03 << 18) | 0x33143, (0x04 << 18) | 0x0accc, (0x05 << 18) | 0x28986}, /* channe1 10 */
325 {(0x03 << 18) | 0x30940, (0x04 << 18) | 0x09111, (0x05 << 18) | 0x28986}, /* channe1 11 */
326 {(0x03 << 18) | 0x30942, (0x04 << 18) | 0x0bbbb, (0x05 << 18) | 0x28986}, /* channe1 12 */
327 {(0x03 << 18) | 0x30943, (0x04 << 18) | 0x0accc, (0x05 << 18) | 0x28986} /* channe1 13 */
357}; 328};
358 329
359u32 maxim_317_power_data_24[] = {(0x0C<<18)|0x0c000, (0x0C<<18)|0x0c100}; 330u32 maxim_317_channel_data_50[][3] = {
360u32 maxim_317_power_data_50[] = {(0x0C<<18)|0x0c000, (0x0C<<18)|0x0c100}; 331 {(0x03 << 18) | 0x33cc0, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x2a986}, /* channel 36 */
361 332 {(0x03 << 18) | 0x302c0, (0x04 << 18) | 0x08000, (0x05 << 18) | 0x2a986}, /* channel 40 */
362/***************************************************************************** 333 {(0x03 << 18) | 0x302c3, (0x04 << 18) | 0x0accc, (0x05 << 18) | 0x2a986}, /* channel 44 */
363;;AL2230 MP (Mass Production Version) 334 {(0x03 << 18) | 0x322c1, (0x04 << 18) | 0x09666, (0x05 << 18) | 0x2a986}, /* channel 48 */
364;;RF Registers Setting for Airoha AL2230 silicon after June 1st, 2004 335 {(0x03 << 18) | 0x312c2, (0x04 << 18) | 0x09999, (0x05 << 18) | 0x2a986}, /* channel 52 */
365;;Updated by Tiger Huang (June 1st, 2004) 336 {(0x03 << 18) | 0x332c0, (0x04 << 18) | 0x0b333, (0x05 << 18) | 0x2a99e}, /* channel 56 */
366;;20-bit length and LSB first 337 {(0x03 << 18) | 0x30ac0, (0x04 << 18) | 0x08000, (0x05 << 18) | 0x2a99e}, /* channel 60 */
367 338 {(0x03 << 18) | 0x30ac3, (0x04 << 18) | 0x0accc, (0x05 << 18) | 0x2a99e} /* channel 64 */
368;;Ch01 (2412MHz) ;0x00 0x09EFC ;0x01 0x8CCCC;
369;;Ch02 (2417MHz) ;0x00 0x09EFC ;0x01 0x8CCCD;
370;;Ch03 (2422MHz) ;0x00 0x09E7C ;0x01 0x8CCCC;
371;;Ch04 (2427MHz) ;0x00 0x09E7C ;0x01 0x8CCCD;
372;;Ch05 (2432MHz) ;0x00 0x05EFC ;0x01 0x8CCCC;
373;;Ch06 (2437MHz) ;0x00 0x05EFC ;0x01 0x8CCCD;
374;;Ch07 (2442MHz) ;0x00 0x05E7C ;0x01 0x8CCCC;
375;;Ch08 (2447MHz) ;0x00 0x05E7C ;0x01 0x8CCCD;
376;;Ch09 (2452MHz) ;0x00 0x0DEFC ;0x01 0x8CCCC;
377;;Ch10 (2457MHz) ;0x00 0x0DEFC ;0x01 0x8CCCD;
378;;Ch11 (2462MHz) ;0x00 0x0DE7C ;0x01 0x8CCCC;
379;;Ch12 (2467MHz) ;0x00 0x0DE7C ;0x01 0x8CCCD;
380;;Ch13 (2472MHz) ;0x00 0x03EFC ;0x01 0x8CCCC;
381;;Ch14 (2484Mhz) ;0x00 0x03E7C ;0x01 0x86666;
382
3830x02 0x401D8; RXDCOC BW 100Hz for RXHP low
384;;0x02 0x481DC; RXDCOC BW 30Khz for RXHP low
385
3860x03 0xCFFF0
3870x04 0x23800
3880x05 0xA3B72
3890x06 0x6DA01
3900x07 0xE1688
3910x08 0x11600
3920x09 0x99E02
3930x0A 0x5DDB0
3940x0B 0xD9900
3950x0C 0x3FFBD
3960x0D 0xB0000
3970x0F 0xF00A0
398
399;RF Calibration for Airoha AL2230
400;Edit by Ben Chang (01/30/04)
401;Updated by Tiger Huang (03/03/04)
4020x0f 0xf00a0 ; Initial Setting
4030x0f 0xf00b0 ; Activate TX DCC
4040x0f 0xf02a0 ; Activate Phase Calibration
4050x0f 0xf00e0 ; Activate Filter RC Calibration
4060x0f 0xf00a0 ; Restore Initial Setting
407*****************************************************************************/
408
409u32 al2230_rf_data[] =
410{
411 (0x00<<20)|0x09EFC,
412 (0x01<<20)|0x8CCCC,
413 (0x02<<20)|0x40058,// 20060627 Anson 0x401D8,
414 (0x03<<20)|0xCFFF0,
415 (0x04<<20)|0x24100,// 20060627 Anson 0x23800,
416 (0x05<<20)|0xA3B2F,// 20060627 Anson 0xA3B72
417 (0x06<<20)|0x6DA01,
418 (0x07<<20)|0xE3628,// 20060627 Anson 0xE1688,
419 (0x08<<20)|0x11600,
420 (0x09<<20)|0x9DC02,// 20060627 Anosn 0x97602,//0x99E02, //0x9AE02
421 (0x0A<<20)|0x5ddb0, // 941206 For QCOM interference 0x588b0,//0x5DDB0, 940601 adj 0x5aa30 for bluetooth
422 (0x0B<<20)|0xD9900,
423 (0x0C<<20)|0x3FFBD,
424 (0x0D<<20)|0xB0000,
425 (0x0F<<20)|0xF01A0 // 20060627 Anson 0xF00A0
426}; 339};
427 340
428u32 al2230s_rf_data[] = 341u32 maxim_317_power_data_24[] = {(0x0C << 18) | 0x0c000, (0x0C << 18) | 0x0c100};
429{ 342u32 maxim_317_power_data_50[] = {(0x0C << 18) | 0x0c000, (0x0C << 18) | 0x0c100};
430 (0x00<<20)|0x09EFC, 343
431 (0x01<<20)|0x8CCCC, 344/*
432 (0x02<<20)|0x40058,// 20060419 0x401D8, 345 * ===================================================================
433 (0x03<<20)|0xCFFF0, 346 * AL2230 MP (Mass Production Version)
434 (0x04<<20)|0x24100,// 20060419 0x23800, 347 * RF Registers Setting for Airoha AL2230 silicon after June 1st, 2004
435 (0x05<<20)|0xA3B2F,// 20060419 0xA3B72, 348 * 20-bit length and LSB first
436 (0x06<<20)|0x6DA01, 349 *
437 (0x07<<20)|0xE3628,// 20060419 0xE1688, 350 * Ch01 (2412MHz) ;0x00 0x09EFC ;0x01 0x8CCCC;
438 (0x08<<20)|0x11600, 351 * Ch02 (2417MHz) ;0x00 0x09EFC ;0x01 0x8CCCD;
439 (0x09<<20)|0x9DC02,// 20060419 0x97602,//0x99E02, //0x9AE02 352 * Ch03 (2422MHz) ;0x00 0x09E7C ;0x01 0x8CCCC;
440 (0x0A<<20)|0x5DDB0,// 941206 For QCOM interference 0x588b0,//0x5DDB0, 940601 adj 0x5aa30 for bluetooth 353 * Ch04 (2427MHz) ;0x00 0x09E7C ;0x01 0x8CCCD;
441 (0x0B<<20)|0xD9900, 354 * Ch05 (2432MHz) ;0x00 0x05EFC ;0x01 0x8CCCC;
442 (0x0C<<20)|0x3FFBD, 355 * Ch06 (2437MHz) ;0x00 0x05EFC ;0x01 0x8CCCD;
443 (0x0D<<20)|0xB0000, 356 * Ch07 (2442MHz) ;0x00 0x05E7C ;0x01 0x8CCCC;
444 (0x0F<<20)|0xF01A0 // 20060419 0xF00A0 357 * Ch08 (2447MHz) ;0x00 0x05E7C ;0x01 0x8CCCD;
358 * Ch09 (2452MHz) ;0x00 0x0DEFC ;0x01 0x8CCCC;
359 * Ch10 (2457MHz) ;0x00 0x0DEFC ;0x01 0x8CCCD;
360 * Ch11 (2462MHz) ;0x00 0x0DE7C ;0x01 0x8CCCC;
361 * Ch12 (2467MHz) ;0x00 0x0DE7C ;0x01 0x8CCCD;
362 * Ch13 (2472MHz) ;0x00 0x03EFC ;0x01 0x8CCCC;
363 * Ch14 (2484Mhz) ;0x00 0x03E7C ;0x01 0x86666;
364 *
365 * 0x02 0x401D8; RXDCOC BW 100Hz for RXHP low
366 * 0x02 0x481DC; RXDCOC BW 30Khz for RXHP low
367 *
368 * 0x03 0xCFFF0
369 * 0x04 0x23800
370 * 0x05 0xA3B72
371 * 0x06 0x6DA01
372 * 0x07 0xE1688
373 * 0x08 0x11600
374 * 0x09 0x99E02
375 * 0x0A 0x5DDB0
376 * 0x0B 0xD9900
377 * 0x0C 0x3FFBD
378 * 0x0D 0xB0000
379 * 0x0F 0xF00A0
380 *
381 * RF Calibration for Airoha AL2230
382 *
383 * 0x0f 0xf00a0 ; Initial Setting
384 * 0x0f 0xf00b0 ; Activate TX DCC
385 * 0x0f 0xf02a0 ; Activate Phase Calibration
386 * 0x0f 0xf00e0 ; Activate Filter RC Calibration
387 * 0x0f 0xf00a0 ; Restore Initial Setting
388 * ==================================================================
389 */
390u32 al2230_rf_data[] = {
391 (0x00 << 20) | 0x09EFC,
392 (0x01 << 20) | 0x8CCCC,
393 (0x02 << 20) | 0x40058,
394 (0x03 << 20) | 0xCFFF0,
395 (0x04 << 20) | 0x24100,
396 (0x05 << 20) | 0xA3B2F,
397 (0x06 << 20) | 0x6DA01,
398 (0x07 << 20) | 0xE3628,
399 (0x08 << 20) | 0x11600,
400 (0x09 << 20) | 0x9DC02,
401 (0x0A << 20) | 0x5ddb0,
402 (0x0B << 20) | 0xD9900,
403 (0x0C << 20) | 0x3FFBD,
404 (0x0D << 20) | 0xB0000,
405 (0x0F << 20) | 0xF01A0
445}; 406};
446 407
447u32 al2230_channel_data_24[][2] = 408u32 al2230s_rf_data[] = {
448{ 409 (0x00 << 20) | 0x09EFC,
449 {(0x00<<20)|0x09EFC, (0x01<<20)|0x8CCCC}, // channe1 01 410 (0x01 << 20) | 0x8CCCC,
450 {(0x00<<20)|0x09EFC, (0x01<<20)|0x8CCCD}, // channe1 02 411 (0x02 << 20) | 0x40058,
451 {(0x00<<20)|0x09E7C, (0x01<<20)|0x8CCCC}, // channe1 03 412 (0x03 << 20) | 0xCFFF0,
452 {(0x00<<20)|0x09E7C, (0x01<<20)|0x8CCCD}, // channe1 04 413 (0x04 << 20) | 0x24100,
453 {(0x00<<20)|0x05EFC, (0x01<<20)|0x8CCCC}, // channe1 05 414 (0x05 << 20) | 0xA3B2F,
454 {(0x00<<20)|0x05EFC, (0x01<<20)|0x8CCCD}, // channe1 06 415 (0x06 << 20) | 0x6DA01,
455 {(0x00<<20)|0x05E7C, (0x01<<20)|0x8CCCC}, // channe1 07 416 (0x07 << 20) | 0xE3628,
456 {(0x00<<20)|0x05E7C, (0x01<<20)|0x8CCCD}, // channe1 08 417 (0x08 << 20) | 0x11600,
457 {(0x00<<20)|0x0DEFC, (0x01<<20)|0x8CCCC}, // channe1 09 418 (0x09 << 20) | 0x9DC02,
458 {(0x00<<20)|0x0DEFC, (0x01<<20)|0x8CCCD}, // channe1 10 419 (0x0A << 20) | 0x5DDB0,
459 {(0x00<<20)|0x0DE7C, (0x01<<20)|0x8CCCC}, // channe1 11 420 (0x0B << 20) | 0xD9900,
460 {(0x00<<20)|0x0DE7C, (0x01<<20)|0x8CCCD}, // channe1 12 421 (0x0C << 20) | 0x3FFBD,
461 {(0x00<<20)|0x03EFC, (0x01<<20)|0x8CCCC}, // channe1 13 422 (0x0D << 20) | 0xB0000,
462 {(0x00<<20)|0x03E7C, (0x01<<20)|0x86666} // channe1 14 423 (0x0F << 20) | 0xF01A0
463}; 424};
464 425
465// Current setting. u32 airoha_power_data_24[] = {(0x09<<20)|0x90202, (0x09<<20)|0x96602, (0x09<<20)|0x97602}; 426u32 al2230_channel_data_24[][2] = {
466#define AIROHA_TXVGA_LOW_INDEX 31 // Index for 0x90202 427 {(0x00 << 20) | 0x09EFC, (0x01 << 20) | 0x8CCCC}, /* channe1 01 */
467#define AIROHA_TXVGA_MIDDLE_INDEX 12 // Index for 0x96602 428 {(0x00 << 20) | 0x09EFC, (0x01 << 20) | 0x8CCCD}, /* channe1 02 */
468#define AIROHA_TXVGA_HIGH_INDEX 8 // Index for 0x97602 1.0.24.0 1.0.28.0 429 {(0x00 << 20) | 0x09E7C, (0x01 << 20) | 0x8CCCC}, /* channe1 03 */
469/* 430 {(0x00 << 20) | 0x09E7C, (0x01 << 20) | 0x8CCCD}, /* channe1 04 */
470u32 airoha_power_data_24[] = 431 {(0x00 << 20) | 0x05EFC, (0x01 << 20) | 0x8CCCC}, /* channe1 05 */
471{ 432 {(0x00 << 20) | 0x05EFC, (0x01 << 20) | 0x8CCCD}, /* channe1 06 */
472 0x9FE02, // Max - 0 dB 433 {(0x00 << 20) | 0x05E7C, (0x01 << 20) | 0x8CCCC}, /* channe1 07 */
473 0x9BE02, // Max - 1 dB 434 {(0x00 << 20) | 0x05E7C, (0x01 << 20) | 0x8CCCD}, /* channe1 08 */
474 0x9DE02, // Max - 2 dB 435 {(0x00 << 20) | 0x0DEFC, (0x01 << 20) | 0x8CCCC}, /* channe1 09 */
475 0x99E02, // Max - 3 dB 436 {(0x00 << 20) | 0x0DEFC, (0x01 << 20) | 0x8CCCD}, /* channe1 10 */
476 0x9EE02, // Max - 4 dB 437 {(0x00 << 20) | 0x0DE7C, (0x01 << 20) | 0x8CCCC}, /* channe1 11 */
477 0x9AE02, // Max - 5 dB 438 {(0x00 << 20) | 0x0DE7C, (0x01 << 20) | 0x8CCCD}, /* channe1 12 */
478 0x9CE02, // Max - 6 dB 439 {(0x00 << 20) | 0x03EFC, (0x01 << 20) | 0x8CCCC}, /* channe1 13 */
479 0x98E02, // Max - 7 dB 440 {(0x00 << 20) | 0x03E7C, (0x01 << 20) | 0x86666} /* channe1 14 */
480 0x97602, // Max - 8 dB
481 0x93602, // Max - 9 dB
482 0x95602, // Max - 10 dB
483 0x91602, // Max - 11 dB
484 0x96602, // Max - 12 dB
485 0x92602, // Max - 13 dB
486 0x94602, // Max - 14 dB
487 0x90602, // Max - 15 dB
488 0x97A02, // Max - 16 dB
489 0x93A02, // Max - 17 dB
490 0x95A02, // Max - 18 dB
491 0x91A02, // Max - 19 dB
492 0x96A02, // Max - 20 dB
493 0x92A02, // Max - 21 dB
494 0x94A02, // Max - 22 dB
495 0x90A02, // Max - 23 dB
496 0x97202, // Max - 24 dB
497 0x93202, // Max - 25 dB
498 0x95202, // Max - 26 dB
499 0x91202, // Max - 27 dB
500 0x96202, // Max - 28 dB
501 0x92202, // Max - 29 dB
502 0x94202, // Max - 30 dB
503 0x90202 // Max - 31 dB
504}; 441};
505*/
506 442
507// 20040927 1.1.69.1000 ybjiang 443/* Current setting. u32 airoha_power_data_24[] = {(0x09 << 20) | 0x90202, (0x09 << 20) | 0x96602, (0x09 << 20) | 0x97602}; */
508// from John 444#define AIROHA_TXVGA_LOW_INDEX 31 /* Index for 0x90202 */
509u32 al2230_txvga_data[][2] = 445#define AIROHA_TXVGA_MIDDLE_INDEX 12 /* Index for 0x96602 */
510{ 446#define AIROHA_TXVGA_HIGH_INDEX 8 /* Index for 0x97602 1.0.24.0 1.0.28.0 */
511 //value , index 447
448u32 al2230_txvga_data[][2] = {
449 /* value , index */
512 {0x090202, 0}, 450 {0x090202, 0},
513 {0x094202, 2}, 451 {0x094202, 2},
514 {0x092202, 4}, 452 {0x092202, 4},
@@ -551,263 +489,242 @@ u32 al2230_txvga_data[][2] =
551 {0x09FE02, 63} 489 {0x09FE02, 63}
552}; 490};
553 491
554//-------------------------------- 492/*
555// For Airoha AL7230, 2.4Ghz band 493 * ==========================================
556// Edit by Tiger, (March, 9, 2005) 494 * For Airoha AL7230, 2.4Ghz band
557// 24bit, MSB first 495 * 24bit, MSB first
558 496 */
559//channel independent registers: 497
560u32 al7230_rf_data_24[] = 498/* channel independent registers: */
561{ 499u32 al7230_rf_data_24[] = {
562 (0x00<<24)|0x003790, 500 (0x00 << 24) | 0x003790,
563 (0x01<<24)|0x133331, 501 (0x01 << 24) | 0x133331,
564 (0x02<<24)|0x841FF2, 502 (0x02 << 24) | 0x841FF2,
565 (0x03<<24)|0x3FDFA3, 503 (0x03 << 24) | 0x3FDFA3,
566 (0x04<<24)|0x7FD784, 504 (0x04 << 24) | 0x7FD784,
567 (0x05<<24)|0x802B55, 505 (0x05 << 24) | 0x802B55,
568 (0x06<<24)|0x56AF36, 506 (0x06 << 24) | 0x56AF36,
569 (0x07<<24)|0xCE0207, 507 (0x07 << 24) | 0xCE0207,
570 (0x08<<24)|0x6EBC08, 508 (0x08 << 24) | 0x6EBC08,
571 (0x09<<24)|0x221BB9, 509 (0x09 << 24) | 0x221BB9,
572 (0x0A<<24)|0xE0000A, 510 (0x0A << 24) | 0xE0000A,
573 (0x0B<<24)|0x08071B, 511 (0x0B << 24) | 0x08071B,
574 (0x0C<<24)|0x000A3C, 512 (0x0C << 24) | 0x000A3C,
575 (0x0D<<24)|0xFFFFFD, 513 (0x0D << 24) | 0xFFFFFD,
576 (0x0E<<24)|0x00000E, 514 (0x0E << 24) | 0x00000E,
577 (0x0F<<24)|0x1ABA8F 515 (0x0F << 24) | 0x1ABA8F
578}; 516};
579 517
580u32 al7230_channel_data_24[][2] = 518u32 al7230_channel_data_24[][2] = {
581{ 519 {(0x00 << 24) | 0x003790, (0x01 << 24) | 0x133331}, /* channe1 01 */
582 {(0x00<<24)|0x003790, (0x01<<24)|0x133331}, // channe1 01 520 {(0x00 << 24) | 0x003790, (0x01 << 24) | 0x1B3331}, /* channe1 02 */
583 {(0x00<<24)|0x003790, (0x01<<24)|0x1B3331}, // channe1 02 521 {(0x00 << 24) | 0x003790, (0x01 << 24) | 0x033331}, /* channe1 03 */
584 {(0x00<<24)|0x003790, (0x01<<24)|0x033331}, // channe1 03 522 {(0x00 << 24) | 0x003790, (0x01 << 24) | 0x0B3331}, /* channe1 04 */
585 {(0x00<<24)|0x003790, (0x01<<24)|0x0B3331}, // channe1 04 523 {(0x00 << 24) | 0x0037A0, (0x01 << 24) | 0x133331}, /* channe1 05 */
586 {(0x00<<24)|0x0037A0, (0x01<<24)|0x133331}, // channe1 05 524 {(0x00 << 24) | 0x0037A0, (0x01 << 24) | 0x1B3331}, /* channe1 06 */
587 {(0x00<<24)|0x0037A0, (0x01<<24)|0x1B3331}, // channe1 06 525 {(0x00 << 24) | 0x0037A0, (0x01 << 24) | 0x033331}, /* channe1 07 */
588 {(0x00<<24)|0x0037A0, (0x01<<24)|0x033331}, // channe1 07 526 {(0x00 << 24) | 0x0037A0, (0x01 << 24) | 0x0B3331}, /* channe1 08 */
589 {(0x00<<24)|0x0037A0, (0x01<<24)|0x0B3331}, // channe1 08 527 {(0x00 << 24) | 0x0037B0, (0x01 << 24) | 0x133331}, /* channe1 09 */
590 {(0x00<<24)|0x0037B0, (0x01<<24)|0x133331}, // channe1 09 528 {(0x00 << 24) | 0x0037B0, (0x01 << 24) | 0x1B3331}, /* channe1 10 */
591 {(0x00<<24)|0x0037B0, (0x01<<24)|0x1B3331}, // channe1 10 529 {(0x00 << 24) | 0x0037B0, (0x01 << 24) | 0x033331}, /* channe1 11 */
592 {(0x00<<24)|0x0037B0, (0x01<<24)|0x033331}, // channe1 11 530 {(0x00 << 24) | 0x0037B0, (0x01 << 24) | 0x0B3331}, /* channe1 12 */
593 {(0x00<<24)|0x0037B0, (0x01<<24)|0x0B3331}, // channe1 12 531 {(0x00 << 24) | 0x0037C0, (0x01 << 24) | 0x133331}, /* channe1 13 */
594 {(0x00<<24)|0x0037C0, (0x01<<24)|0x133331}, // channe1 13 532 {(0x00 << 24) | 0x0037C0, (0x01 << 24) | 0x066661} /* channel 14 */
595 {(0x00<<24)|0x0037C0, (0x01<<24)|0x066661} // channel 14
596}; 533};
597 534
598//channel independent registers: 535/* channel independent registers: */
599u32 al7230_rf_data_50[] = 536u32 al7230_rf_data_50[] = {
600{ 537 (0x00 << 24) | 0x0FF520,
601 (0x00<<24)|0x0FF520, 538 (0x01 << 24) | 0x000001,
602 (0x01<<24)|0x000001, 539 (0x02 << 24) | 0x451FE2,
603 (0x02<<24)|0x451FE2, 540 (0x03 << 24) | 0x5FDFA3,
604 (0x03<<24)|0x5FDFA3, 541 (0x04 << 24) | 0x6FD784,
605 (0x04<<24)|0x6FD784, 542 (0x05 << 24) | 0x853F55,
606 (0x05<<24)|0x853F55, 543 (0x06 << 24) | 0x56AF36,
607 (0x06<<24)|0x56AF36, 544 (0x07 << 24) | 0xCE0207,
608 (0x07<<24)|0xCE0207, 545 (0x08 << 24) | 0x6EBC08,
609 (0x08<<24)|0x6EBC08, 546 (0x09 << 24) | 0x221BB9,
610 (0x09<<24)|0x221BB9, 547 (0x0A << 24) | 0xE0600A,
611 (0x0A<<24)|0xE0600A, 548 (0x0B << 24) | 0x08044B,
612 (0x0B<<24)|0x08044B, 549 (0x0C << 24) | 0x00143C,
613 (0x0C<<24)|0x00143C, 550 (0x0D << 24) | 0xFFFFFD,
614 (0x0D<<24)|0xFFFFFD, 551 (0x0E << 24) | 0x00000E,
615 (0x0E<<24)|0x00000E, 552 (0x0F << 24) | 0x12BACF /* 5Ghz default state */
616 (0x0F<<24)|0x12BACF //5Ghz default state
617}; 553};
618 554
619u32 al7230_channel_data_5[][4] = 555u32 al7230_channel_data_5[][4] = {
620{ 556 /* channel dependent registers: 0x00, 0x01 and 0x04 */
621 //channel dependent registers: 0x00, 0x01 and 0x04 557 /* 11J =========== */
622 //11J =========== 558 {184, (0x00 << 24) | 0x0FF520, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 184 */
623 {184, (0x00<<24)|0x0FF520, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 184 559 {188, (0x00 << 24) | 0x0FF520, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 188 */
624 {188, (0x00<<24)|0x0FF520, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 188 560 {192, (0x00 << 24) | 0x0FF530, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 192 */
625 {192, (0x00<<24)|0x0FF530, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 192 561 {196, (0x00 << 24) | 0x0FF530, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 196 */
626 {196, (0x00<<24)|0x0FF530, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 196 562 {8, (0x00 << 24) | 0x0FF540, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 008 */
627 {8, (0x00<<24)|0x0FF540, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 008 563 {12, (0x00 << 24) | 0x0FF540, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 012 */
628 {12, (0x00<<24)|0x0FF540, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 012 564 {16, (0x00 << 24) | 0x0FF550, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 016 */
629 {16, (0x00<<24)|0x0FF550, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 016 565 {34, (0x00 << 24) | 0x0FF560, (0x01 << 24) | 0x055551, (0x04 << 24) | 0x77F784}, /* channel 034 */
630 {34, (0x00<<24)|0x0FF560, (0x01<<24)|0x055551, (0x04<<24)|0x77F784}, // channel 034 566 {38, (0x00 << 24) | 0x0FF570, (0x01 << 24) | 0x100001, (0x04 << 24) | 0x77F784}, /* channel 038 */
631 {38, (0x00<<24)|0x0FF570, (0x01<<24)|0x100001, (0x04<<24)|0x77F784}, // channel 038 567 {42, (0x00 << 24) | 0x0FF570, (0x01 << 24) | 0x1AAAA1, (0x04 << 24) | 0x77F784}, /* channel 042 */
632 {42, (0x00<<24)|0x0FF570, (0x01<<24)|0x1AAAA1, (0x04<<24)|0x77F784}, // channel 042 568 {46, (0x00 << 24) | 0x0FF570, (0x01 << 24) | 0x055551, (0x04 << 24) | 0x77F784}, /* channel 046 */
633 {46, (0x00<<24)|0x0FF570, (0x01<<24)|0x055551, (0x04<<24)|0x77F784}, // channel 046 569 /* 11 A/H ========= */
634 //11 A/H ========= 570 {36, (0x00 << 24) | 0x0FF560, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 036 */
635 {36, (0x00<<24)|0x0FF560, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 036 571 {40, (0x00 << 24) | 0x0FF570, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 040 */
636 {40, (0x00<<24)|0x0FF570, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 040 572 {44, (0x00 << 24) | 0x0FF570, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 044 */
637 {44, (0x00<<24)|0x0FF570, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 044 573 {48, (0x00 << 24) | 0x0FF570, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 048 */
638 {48, (0x00<<24)|0x0FF570, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 048 574 {52, (0x00 << 24) | 0x0FF580, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 052 */
639 {52, (0x00<<24)|0x0FF580, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 052 575 {56, (0x00 << 24) | 0x0FF580, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 056 */
640 {56, (0x00<<24)|0x0FF580, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 056 576 {60, (0x00 << 24) | 0x0FF580, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 060 */
641 {60, (0x00<<24)|0x0FF580, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 060 577 {64, (0x00 << 24) | 0x0FF590, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 064 */
642 {64, (0x00<<24)|0x0FF590, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 064 578 {100, (0x00 << 24) | 0x0FF5C0, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 100 */
643 {100, (0x00<<24)|0x0FF5C0, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 100 579 {104, (0x00 << 24) | 0x0FF5C0, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 104 */
644 {104, (0x00<<24)|0x0FF5C0, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 104 580 {108, (0x00 << 24) | 0x0FF5C0, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 108 */
645 {108, (0x00<<24)|0x0FF5C0, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 108 581 {112, (0x00 << 24) | 0x0FF5D0, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 112 */
646 {112, (0x00<<24)|0x0FF5D0, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 112 582 {116, (0x00 << 24) | 0x0FF5D0, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 116 */
647 {116, (0x00<<24)|0x0FF5D0, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 116 583 {120, (0x00 << 24) | 0x0FF5D0, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 120 */
648 {120, (0x00<<24)|0x0FF5D0, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 120 584 {124, (0x00 << 24) | 0x0FF5E0, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 124 */
649 {124, (0x00<<24)|0x0FF5E0, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 124 585 {128, (0x00 << 24) | 0x0FF5E0, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 128 */
650 {128, (0x00<<24)|0x0FF5E0, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 128 586 {132, (0x00 << 24) | 0x0FF5E0, (0x01 << 24) | 0x0AAAA1, (0x04 << 24) | 0x77F784}, /* channel 132 */
651 {132, (0x00<<24)|0x0FF5E0, (0x01<<24)|0x0AAAA1, (0x04<<24)|0x77F784}, // channel 132 587 {136, (0x00 << 24) | 0x0FF5F0, (0x01 << 24) | 0x155551, (0x04 << 24) | 0x77F784}, /* channel 136 */
652 {136, (0x00<<24)|0x0FF5F0, (0x01<<24)|0x155551, (0x04<<24)|0x77F784}, // channel 136 588 {140, (0x00 << 24) | 0x0FF5F0, (0x01 << 24) | 0x000001, (0x04 << 24) | 0x67F784}, /* channel 140 */
653 {140, (0x00<<24)|0x0FF5F0, (0x01<<24)|0x000001, (0x04<<24)|0x67F784}, // channel 140 589 {149, (0x00 << 24) | 0x0FF600, (0x01 << 24) | 0x180001, (0x04 << 24) | 0x77F784}, /* channel 149 */
654 {149, (0x00<<24)|0x0FF600, (0x01<<24)|0x180001, (0x04<<24)|0x77F784}, // channel 149 590 {153, (0x00 << 24) | 0x0FF600, (0x01 << 24) | 0x02AAA1, (0x04 << 24) | 0x77F784}, /* channel 153 */
655 {153, (0x00<<24)|0x0FF600, (0x01<<24)|0x02AAA1, (0x04<<24)|0x77F784}, // channel 153 591 {157, (0x00 << 24) | 0x0FF600, (0x01 << 24) | 0x0D5551, (0x04 << 24) | 0x77F784}, /* channel 157 */
656 {157, (0x00<<24)|0x0FF600, (0x01<<24)|0x0D5551, (0x04<<24)|0x77F784}, // channel 157 592 {161, (0x00 << 24) | 0x0FF610, (0x01 << 24) | 0x180001, (0x04 << 24) | 0x77F784}, /* channel 161 */
657 {161, (0x00<<24)|0x0FF610, (0x01<<24)|0x180001, (0x04<<24)|0x77F784}, // channel 161 593 {165, (0x00 << 24) | 0x0FF610, (0x01 << 24) | 0x02AAA1, (0x04 << 24) | 0x77F784} /* channel 165 */
658 {165, (0x00<<24)|0x0FF610, (0x01<<24)|0x02AAA1, (0x04<<24)|0x77F784} // channel 165
659}; 594};
660 595
661//; RF Calibration <=== Register 0x0F 596/*
662//0x0F 0x1ABA8F; start from 2.4Ghz default state 597 * RF Calibration <=== Register 0x0F
663//0x0F 0x9ABA8F; TXDC compensation 598 * 0x0F 0x1ABA8F; start from 2.4Ghz default state
664//0x0F 0x3ABA8F; RXFIL adjustment 599 * 0x0F 0x9ABA8F; TXDC compensation
665//0x0F 0x1ABA8F; restore 2.4Ghz default state 600 * 0x0F 0x3ABA8F; RXFIL adjustment
666 601 * 0x0F 0x1ABA8F; restore 2.4Ghz default state
667//;TXVGA Mapping Table <=== Register 0x0B 602 */
668u32 al7230_txvga_data[][2] = 603
669{ 604/* TXVGA Mapping Table <=== Register 0x0B */
670 {0x08040B, 0}, //TXVGA=0; 605u32 al7230_txvga_data[][2] = {
671 {0x08041B, 1}, //TXVGA=1; 606 {0x08040B, 0}, /* TXVGA = 0; */
672 {0x08042B, 2}, //TXVGA=2; 607 {0x08041B, 1}, /* TXVGA = 1; */
673 {0x08043B, 3}, //TXVGA=3; 608 {0x08042B, 2}, /* TXVGA = 2; */
674 {0x08044B, 4}, //TXVGA=4; 609 {0x08043B, 3}, /* TXVGA = 3; */
675 {0x08045B, 5}, //TXVGA=5; 610 {0x08044B, 4}, /* TXVGA = 4; */
676 {0x08046B, 6}, //TXVGA=6; 611 {0x08045B, 5}, /* TXVGA = 5; */
677 {0x08047B, 7}, //TXVGA=7; 612 {0x08046B, 6}, /* TXVGA = 6; */
678 {0x08048B, 8}, //TXVGA=8; 613 {0x08047B, 7}, /* TXVGA = 7; */
679 {0x08049B, 9}, //TXVGA=9; 614 {0x08048B, 8}, /* TXVGA = 8; */
680 {0x0804AB, 10}, //TXVGA=10; 615 {0x08049B, 9}, /* TXVGA = 9; */
681 {0x0804BB, 11}, //TXVGA=11; 616 {0x0804AB, 10}, /* TXVGA = 10; */
682 {0x0804CB, 12}, //TXVGA=12; 617 {0x0804BB, 11}, /* TXVGA = 11; */
683 {0x0804DB, 13}, //TXVGA=13; 618 {0x0804CB, 12}, /* TXVGA = 12; */
684 {0x0804EB, 14}, //TXVGA=14; 619 {0x0804DB, 13}, /* TXVGA = 13; */
685 {0x0804FB, 15}, //TXVGA=15; 620 {0x0804EB, 14}, /* TXVGA = 14; */
686 {0x08050B, 16}, //TXVGA=16; 621 {0x0804FB, 15}, /* TXVGA = 15; */
687 {0x08051B, 17}, //TXVGA=17; 622 {0x08050B, 16}, /* TXVGA = 16; */
688 {0x08052B, 18}, //TXVGA=18; 623 {0x08051B, 17}, /* TXVGA = 17; */
689 {0x08053B, 19}, //TXVGA=19; 624 {0x08052B, 18}, /* TXVGA = 18; */
690 {0x08054B, 20}, //TXVGA=20; 625 {0x08053B, 19}, /* TXVGA = 19; */
691 {0x08055B, 21}, //TXVGA=21; 626 {0x08054B, 20}, /* TXVGA = 20; */
692 {0x08056B, 22}, //TXVGA=22; 627 {0x08055B, 21}, /* TXVGA = 21; */
693 {0x08057B, 23}, //TXVGA=23; 628 {0x08056B, 22}, /* TXVGA = 22; */
694 {0x08058B, 24}, //TXVGA=24; 629 {0x08057B, 23}, /* TXVGA = 23; */
695 {0x08059B, 25}, //TXVGA=25; 630 {0x08058B, 24}, /* TXVGA = 24; */
696 {0x0805AB, 26}, //TXVGA=26; 631 {0x08059B, 25}, /* TXVGA = 25; */
697 {0x0805BB, 27}, //TXVGA=27; 632 {0x0805AB, 26}, /* TXVGA = 26; */
698 {0x0805CB, 28}, //TXVGA=28; 633 {0x0805BB, 27}, /* TXVGA = 27; */
699 {0x0805DB, 29}, //TXVGA=29; 634 {0x0805CB, 28}, /* TXVGA = 28; */
700 {0x0805EB, 30}, //TXVGA=30; 635 {0x0805DB, 29}, /* TXVGA = 29; */
701 {0x0805FB, 31}, //TXVGA=31; 636 {0x0805EB, 30}, /* TXVGA = 30; */
702 {0x08060B, 32}, //TXVGA=32; 637 {0x0805FB, 31}, /* TXVGA = 31; */
703 {0x08061B, 33}, //TXVGA=33; 638 {0x08060B, 32}, /* TXVGA = 32; */
704 {0x08062B, 34}, //TXVGA=34; 639 {0x08061B, 33}, /* TXVGA = 33; */
705 {0x08063B, 35}, //TXVGA=35; 640 {0x08062B, 34}, /* TXVGA = 34; */
706 {0x08064B, 36}, //TXVGA=36; 641 {0x08063B, 35}, /* TXVGA = 35; */
707 {0x08065B, 37}, //TXVGA=37; 642 {0x08064B, 36}, /* TXVGA = 36; */
708 {0x08066B, 38}, //TXVGA=38; 643 {0x08065B, 37}, /* TXVGA = 37; */
709 {0x08067B, 39}, //TXVGA=39; 644 {0x08066B, 38}, /* TXVGA = 38; */
710 {0x08068B, 40}, //TXVGA=40; 645 {0x08067B, 39}, /* TXVGA = 39; */
711 {0x08069B, 41}, //TXVGA=41; 646 {0x08068B, 40}, /* TXVGA = 40; */
712 {0x0806AB, 42}, //TXVGA=42; 647 {0x08069B, 41}, /* TXVGA = 41; */
713 {0x0806BB, 43}, //TXVGA=43; 648 {0x0806AB, 42}, /* TXVGA = 42; */
714 {0x0806CB, 44}, //TXVGA=44; 649 {0x0806BB, 43}, /* TXVGA = 43; */
715 {0x0806DB, 45}, //TXVGA=45; 650 {0x0806CB, 44}, /* TXVGA = 44; */
716 {0x0806EB, 46}, //TXVGA=46; 651 {0x0806DB, 45}, /* TXVGA = 45; */
717 {0x0806FB, 47}, //TXVGA=47; 652 {0x0806EB, 46}, /* TXVGA = 46; */
718 {0x08070B, 48}, //TXVGA=48; 653 {0x0806FB, 47}, /* TXVGA = 47; */
719 {0x08071B, 49}, //TXVGA=49; 654 {0x08070B, 48}, /* TXVGA = 48; */
720 {0x08072B, 50}, //TXVGA=50; 655 {0x08071B, 49}, /* TXVGA = 49; */
721 {0x08073B, 51}, //TXVGA=51; 656 {0x08072B, 50}, /* TXVGA = 50; */
722 {0x08074B, 52}, //TXVGA=52; 657 {0x08073B, 51}, /* TXVGA = 51; */
723 {0x08075B, 53}, //TXVGA=53; 658 {0x08074B, 52}, /* TXVGA = 52; */
724 {0x08076B, 54}, //TXVGA=54; 659 {0x08075B, 53}, /* TXVGA = 53; */
725 {0x08077B, 55}, //TXVGA=55; 660 {0x08076B, 54}, /* TXVGA = 54; */
726 {0x08078B, 56}, //TXVGA=56; 661 {0x08077B, 55}, /* TXVGA = 55; */
727 {0x08079B, 57}, //TXVGA=57; 662 {0x08078B, 56}, /* TXVGA = 56; */
728 {0x0807AB, 58}, //TXVGA=58; 663 {0x08079B, 57}, /* TXVGA = 57; */
729 {0x0807BB, 59}, //TXVGA=59; 664 {0x0807AB, 58}, /* TXVGA = 58; */
730 {0x0807CB, 60}, //TXVGA=60; 665 {0x0807BB, 59}, /* TXVGA = 59; */
731 {0x0807DB, 61}, //TXVGA=61; 666 {0x0807CB, 60}, /* TXVGA = 60; */
732 {0x0807EB, 62}, //TXVGA=62; 667 {0x0807DB, 61}, /* TXVGA = 61; */
733 {0x0807FB, 63}, //TXVGA=63; 668 {0x0807EB, 62}, /* TXVGA = 62; */
669 {0x0807FB, 63}, /* TXVGA = 63; */
734}; 670};
735//-------------------------------- 671/* ============================================= */
736
737 672
738//; W89RF242 RFIC SPI programming initial data 673/*
739//; Winbond WLAN 11g RFIC BB-SPI register -- version FA5976A rev 1.3b 674 * W89RF242 RFIC SPI programming initial data
740//; Update Date: Ocotber 3, 2005 by PP10 Hsiang-Te Ho 675 * Winbond WLAN 11g RFIC BB-SPI register -- version FA5976A rev 1.3b
741//; 676 */
742//; Version 1.3b revision items: (Oct. 1, 2005 by HTHo) for FA5976A 677u32 w89rf242_rf_data[] = {
743u32 w89rf242_rf_data[] = 678 (0x00 << 24) | 0xF86100, /* 3E184; MODA (0x00) -- Normal mode ; calibration off */
744{ 679 (0x01 << 24) | 0xEFFFC2, /* 3BFFF; MODB (0x01) -- turn off RSSI, and other circuits are turned on */
745 (0x00<<24)|0xF86100, // 20060721 0xF86100, //; 3E184; MODA (0x00) -- Normal mode ; calibration off 680 (0x02 << 24) | 0x102504, /* 04094; FSET (0x02) -- default 20MHz crystal ; Icmp=1.5mA */
746 (0x01<<24)|0xEFFFC2, //; 3BFFF; MODB (0x01) -- turn off RSSI, and other circuits are turned on 681 (0x03 << 24) | 0x026286, /* 0098A; FCHN (0x03) -- default CH7, 2442MHz */
747 (0x02<<24)|0x102504, //; 04094; FSET (0x02) -- default 20MHz crystal ; Icmp=1.5mA 682 (0x04 << 24) | 0x000208, /* 02008; FCAL (0x04) -- XTAL Freq Trim=001000 (socket board#1); FA5976AYG_v1.3C */
748 (0x03<<24)|0x026286, //; 0098A; FCHN (0x03) -- default CH7, 2442MHz 683 (0x05 << 24) | 0x24C60A, /* 09316; GANA (0x05) -- TX VGA default (TXVGA=0x18(12)) & TXGPK=110 ; FA5976A_1.3D */
749 (0x04<<24)|0x000208, // 20060612.1.a 0x0002C8, // 20050818 // 20050816 0x000388 684 (0x06 << 24) | 0x3432CC, /* 0D0CB; GANB (0x06) -- RXDC(DC offset) on; LNA=11; RXVGA=001011(11) ; RXFLSW=11(010001); RXGPK=00; RXGCF=00; -50dBm input */
750 //; 02008; FCAL (0x04) -- XTAL Freq Trim=001000 (socket board#1); FA5976AYG_v1.3C 685 (0x07 << 24) | 0x0C68CE, /* 031A3; FILT (0x07) -- TX/RX filter with auto-tuning; TFLBW=011; RFLBW=100 */
751 (0x05<<24)|0x24C60A, // 20060612.1.a 0x24C58A, // 941003 0x24C48A, // 20050818.2 0x24848A, // 20050818 // 20050816 0x24C48A 686 (0x08 << 24) | 0x100010, /* 04000; TCAL (0x08) -- for LO */
752 //; 09316; GANA (0x05) -- TX VGA default (TXVGA=0x18(12)) & TXGPK=110 ; FA5976A_1.3D 687 (0x09 << 24) | 0x004012, /* 1B900; RCALA (0x09) -- FASTS=11; HPDE=01 (100nsec); SEHP=1 (select B0 pin=RXHP); RXHP=1 (Turn on RXHP function)(FA5976A_1.3C) */
753 (0x06<<24)|0x3432CC, // 941003 0x26C34C, // 20050818 0x06B40C 688 (0x0A << 24) | 0x704014, /* 1C100; RCALB (0x0A) */
754 //; 0D0CB; GANB (0x06) -- RXDC(DC offset) on; LNA=11; RXVGA=001011(11) ; RXFLSW=11(010001); RXGPK=00; RXGCF=00; -50dBm input 689 (0x0B << 24) | 0x18BDD6, /* 062F7; IQCAL (0x0B) -- Turn on LO phase tuner=0111 & RX-LO phase = 0111; FA5976A_1.3B */
755 (0x07<<24)|0x0C68CE, // 20050818.2 0x0C66CE, // 20050818 // 20050816 0x0C68CE 690 (0x0C << 24) | 0x575558, /* 15D55 ; IBSA (0x0C) -- IFPre =11 ; TC5376A_v1.3A for corner */
756 //; 031A3; FILT (0x07) -- TX/RX filter with auto-tuning; TFLBW=011; RFLBW=100 691 (0x0D << 24) | 0x55545A, /* 15555 ; IBSB (0x0D) */
757 (0x08<<24)|0x100010, //; 04000; TCAL (0x08) -- //for LO 692 (0x0E << 24) | 0x5557DC, /* 1555F ; IBSC (0x0E) -- IRLNA & IRLNB (PTAT & Const current)=01/01; FA5976B_1.3F */
758 (0x09<<24)|0x004012, // 20060612.1.a 0x6E4012, // 0x004012, 693 (0x10 << 24) | 0x000C20, /* 00030 ; TMODA (0x10) -- LNA_gain_step=0011 ; LNA=15/16dB */
759 //; 1B900; RCALA (0x09) -- FASTS=11; HPDE=01 (100nsec); SEHP=1 (select B0 pin=RXHP); RXHP=1 (Turn on RXHP function)(FA5976A_1.3C) 694 (0x11 << 24) | 0x0C0022, /* 03000 ; TMODB (0x11) -- Turn ON RX-Q path Test Switch; To improve IQ path group delay (FA5976A_1.3C) */
760 (0x0A<<24)|0x704014, //; 1C100; RCALB (0x0A) 695 (0x12 << 24) | 0x000024 /* TMODC (0x12) -- Turn OFF Tempearure sensor */
761 (0x0B<<24)|0x18BDD6, // 941003 0x1805D6, // 20050818.2 0x1801D6, // 20050818 // 20050816 0x1805D6
762 //; 062F7; IQCAL (0x0B) -- Turn on LO phase tuner=0111 & RX-LO phase = 0111; FA5976A_1.3B (2005/09/29)
763 (0x0C<<24)|0x575558, // 20050818.2 0x555558, // 20050818 // 20050816 0x575558
764 //; 15D55 ; IBSA (0x0C) -- IFPre =11 ; TC5376A_v1.3A for corner
765 (0x0D<<24)|0x55545A, // 20060612.1.a 0x55555A,
766 //; 15555 ; IBSB (0x0D)
767 (0x0E<<24)|0x5557DC, // 20060612.1.a 0x55555C, // 941003 0x5557DC,
768 //; 1555F ; IBSC (0x0E) -- IRLNA & IRLNB (PTAT & Const current)=01/01; FA5976B_1.3F (2005/11/25)
769 (0x10<<24)|0x000C20, // 941003 0x000020, // 20050818
770 //; 00030 ; TMODA (0x10) -- LNA_gain_step=0011 ; LNA=15/16dB
771 (0x11<<24)|0x0C0022, // 941003 0x030022 // 20050818.2 0x030022 // 20050818 // 20050816 0x0C0022
772 //; 03000 ; TMODB (0x11) -- Turn ON RX-Q path Test Switch; To improve IQ path group delay (FA5976A_1.3C)
773 (0x12<<24)|0x000024 // 20060612.1.a 0x001824 // 941003 add
774 //; TMODC (0x12) -- Turn OFF Tempearure sensor
775}; 696};
776 697
777u32 w89rf242_channel_data_24[][2] = 698u32 w89rf242_channel_data_24[][2] = {
778{ 699 {(0x03 << 24) | 0x025B06, (0x04 << 24) | 0x080408}, /* channe1 01 */
779 {(0x03<<24)|0x025B06, (0x04<<24)|0x080408}, // channe1 01 700 {(0x03 << 24) | 0x025C46, (0x04 << 24) | 0x080408}, /* channe1 02 */
780 {(0x03<<24)|0x025C46, (0x04<<24)|0x080408}, // channe1 02 701 {(0x03 << 24) | 0x025D86, (0x04 << 24) | 0x080408}, /* channe1 03 */
781 {(0x03<<24)|0x025D86, (0x04<<24)|0x080408}, // channe1 03 702 {(0x03 << 24) | 0x025EC6, (0x04 << 24) | 0x080408}, /* channe1 04 */
782 {(0x03<<24)|0x025EC6, (0x04<<24)|0x080408}, // channe1 04 703 {(0x03 << 24) | 0x026006, (0x04 << 24) | 0x080408}, /* channe1 05 */
783 {(0x03<<24)|0x026006, (0x04<<24)|0x080408}, // channe1 05 704 {(0x03 << 24) | 0x026146, (0x04 << 24) | 0x080408}, /* channe1 06 */
784 {(0x03<<24)|0x026146, (0x04<<24)|0x080408}, // channe1 06 705 {(0x03 << 24) | 0x026286, (0x04 << 24) | 0x080408}, /* channe1 07 */
785 {(0x03<<24)|0x026286, (0x04<<24)|0x080408}, // channe1 07 706 {(0x03 << 24) | 0x0263C6, (0x04 << 24) | 0x080408}, /* channe1 08 */
786 {(0x03<<24)|0x0263C6, (0x04<<24)|0x080408}, // channe1 08 707 {(0x03 << 24) | 0x026506, (0x04 << 24) | 0x080408}, /* channe1 09 */
787 {(0x03<<24)|0x026506, (0x04<<24)|0x080408}, // channe1 09 708 {(0x03 << 24) | 0x026646, (0x04 << 24) | 0x080408}, /* channe1 10 */
788 {(0x03<<24)|0x026646, (0x04<<24)|0x080408}, // channe1 10 709 {(0x03 << 24) | 0x026786, (0x04 << 24) | 0x080408}, /* channe1 11 */
789 {(0x03<<24)|0x026786, (0x04<<24)|0x080408}, // channe1 11 710 {(0x03 << 24) | 0x0268C6, (0x04 << 24) | 0x080408}, /* channe1 12 */
790 {(0x03<<24)|0x0268C6, (0x04<<24)|0x080408}, // channe1 12 711 {(0x03 << 24) | 0x026A06, (0x04 << 24) | 0x080408}, /* channe1 13 */
791 {(0x03<<24)|0x026A06, (0x04<<24)|0x080408}, // channe1 13 712 {(0x03 << 24) | 0x026D06, (0x04 << 24) | 0x080408} /* channe1 14 */
792 {(0x03<<24)|0x026D06, (0x04<<24)|0x080408} // channe1 14
793}; 713};
794 714
795u32 w89rf242_power_data_24[] = {(0x05<<24)|0x24C48A, (0x05<<24)|0x24C48A, (0x05<<24)|0x24C48A}; 715u32 w89rf242_power_data_24[] = {(0x05 << 24) | 0x24C48A, (0x05 << 24) | 0x24C48A, (0x05 << 24) | 0x24C48A};
796 716
797// 20060315.6 Enlarge for new scale 717u32 w89rf242_txvga_old_mapping[][2] = {
798// 20060316.6 20060619.2.a add mapping array 718 {0, 0} , /* New <-> Old */
799u32 w89rf242_txvga_old_mapping[][2] =
800{
801 {0, 0} , // New <-> Old
802 {1, 1} , 719 {1, 1} ,
803 {2, 2} , 720 {2, 2} ,
804 {3, 3} , 721 {3, 3} ,
805 {4, 4} , 722 {4, 4} ,
806 {6, 5} , 723 {6, 5} ,
807 {8, 6 }, 724 {8, 6},
808 {10, 7 }, 725 {10, 7},
809 {12, 8 }, 726 {12, 8},
810 {14, 9 }, 727 {14, 9},
811 {16, 10}, 728 {16, 10},
812 {18, 11}, 729 {18, 11},
813 {20, 12}, 730 {20, 12},
@@ -818,1704 +735,1514 @@ u32 w89rf242_txvga_old_mapping[][2] =
818 {30, 17}, 735 {30, 17},
819 {32, 18}, 736 {32, 18},
820 {34, 19}, 737 {34, 19},
738};
821 739
740u32 w89rf242_txvga_data[][5] = {
741 /* low gain mode */
742 {(0x05 << 24) | 0x24C00A, 0, 0x00292315, 0x0800FEFF, 0x52523131}, /* min gain */
743 {(0x05 << 24) | 0x24C80A, 1, 0x00292315, 0x0800FEFF, 0x52523131},
744 {(0x05 << 24) | 0x24C04A, 2, 0x00292315, 0x0800FEFF, 0x52523131}, /* (default) +14dBm (ANT) */
745 {(0x05 << 24) | 0x24C84A, 3, 0x00292315, 0x0800FEFF, 0x52523131},
822 746
823}; 747 /* TXVGA=0x10 */
748 {(0x05 << 24) | 0x24C40A, 4, 0x00292315, 0x0800FEFF, 0x60603838},
749 {(0x05 << 24) | 0x24C40A, 5, 0x00262114, 0x0700FEFF, 0x65653B3B},
824 750
825// 20060619.3 modify from Bruce's mail 751 /* TXVGA=0x11 */
826u32 w89rf242_txvga_data[][5] = 752 { (0x05 << 24) | 0x24C44A, 6, 0x00241F13, 0x0700FFFF, 0x58583333},
827{ 753 { (0x05 << 24) | 0x24C44A, 7, 0x00292315, 0x0800FEFF, 0x5E5E3737},
828 //low gain mode 754
829 { (0x05<<24)|0x24C00A, 0, 0x00292315, 0x0800FEFF, 0x52523131 },// ; min gain 755 /* TXVGA=0x12 */
830 { (0x05<<24)|0x24C80A, 1, 0x00292315, 0x0800FEFF, 0x52523131 }, 756 {(0x05 << 24) | 0x24C48A, 8, 0x00262114, 0x0700FEFF, 0x53533030},
831 { (0x05<<24)|0x24C04A, 2, 0x00292315, 0x0800FEFF, 0x52523131 },// (default) +14dBm (ANT) 757 {(0x05 << 24) | 0x24C48A, 9, 0x00241F13, 0x0700FFFF, 0x59593434},
832 { (0x05<<24)|0x24C84A, 3, 0x00292315, 0x0800FEFF, 0x52523131 }, 758
833 759 /* TXVGA=0x13 */
834 //TXVGA=0x10 760 {(0x05 << 24) | 0x24C4CA, 10, 0x00292315, 0x0800FEFF, 0x52523030},
835 { (0x05<<24)|0x24C40A, 4, 0x00292315, 0x0800FEFF, 0x60603838 }, 761 {(0x05 << 24) | 0x24C4CA, 11, 0x00262114, 0x0700FEFF, 0x56563232},
836 { (0x05<<24)|0x24C40A, 5, 0x00262114, 0x0700FEFF, 0x65653B3B }, 762
837 763 /* TXVGA=0x14 */
838 //TXVGA=0x11 764 {(0x05 << 24) | 0x24C50A, 12, 0x00292315, 0x0800FEFF, 0x54543131},
839 { (0x05<<24)|0x24C44A, 6, 0x00241F13, 0x0700FFFF, 0x58583333 }, 765 {(0x05 << 24) | 0x24C50A, 13, 0x00262114, 0x0700FEFF, 0x58583434},
840 { (0x05<<24)|0x24C44A, 7, 0x00292315, 0x0800FEFF, 0x5E5E3737 }, 766
841 767 /* TXVGA=0x15 */
842 //TXVGA=0x12 768 {(0x05 << 24) | 0x24C54A, 14, 0x00292315, 0x0800FEFF, 0x54543131},
843 { (0x05<<24)|0x24C48A, 8, 0x00262114, 0x0700FEFF, 0x53533030 }, 769 {(0x05 << 24) | 0x24C54A, 15, 0x00262114, 0x0700FEFF, 0x59593434},
844 { (0x05<<24)|0x24C48A, 9, 0x00241F13, 0x0700FFFF, 0x59593434 }, 770
845 771 /* TXVGA=0x16 */
846 //TXVGA=0x13 772 {(0x05 << 24) | 0x24C58A, 16, 0x00292315, 0x0800FEFF, 0x55553131},
847 { (0x05<<24)|0x24C4CA, 10, 0x00292315, 0x0800FEFF, 0x52523030 }, 773 {(0x05 << 24) | 0x24C58A, 17, 0x00292315, 0x0800FEFF, 0x5B5B3535},
848 { (0x05<<24)|0x24C4CA, 11, 0x00262114, 0x0700FEFF, 0x56563232 }, 774
849 775 /* TXVGA=0x17 */
850 //TXVGA=0x14 776 {(0x05 << 24) | 0x24C5CA, 18, 0x00262114, 0x0700FEFF, 0x51512F2F},
851 { (0x05<<24)|0x24C50A, 12, 0x00292315, 0x0800FEFF, 0x54543131 }, 777 {(0x05 << 24) | 0x24C5CA, 19, 0x00241F13, 0x0700FFFF, 0x55553131},
852 { (0x05<<24)|0x24C50A, 13, 0x00262114, 0x0700FEFF, 0x58583434 }, 778
853 779 /* TXVGA=0x18 */
854 //TXVGA=0x15 780 {(0x05 << 24) | 0x24C60A, 20, 0x00292315, 0x0800FEFF, 0x4F4F2E2E},
855 { (0x05<<24)|0x24C54A, 14, 0x00292315, 0x0800FEFF, 0x54543131 }, 781 {(0x05 << 24) | 0x24C60A, 21, 0x00262114, 0x0700FEFF, 0x53533030},
856 { (0x05<<24)|0x24C54A, 15, 0x00262114, 0x0700FEFF, 0x59593434 }, 782
857 783 /* TXVGA=0x19 */
858 //TXVGA=0x16 784 {(0x05 << 24) | 0x24C64A, 22, 0x00292315, 0x0800FEFF, 0x4E4E2D2D},
859 { (0x05<<24)|0x24C58A, 16, 0x00292315, 0x0800FEFF, 0x55553131 }, 785 {(0x05 << 24) | 0x24C64A, 23, 0x00262114, 0x0700FEFF, 0x53533030},
860 { (0x05<<24)|0x24C58A, 17, 0x00292315, 0x0800FEFF, 0x5B5B3535 }, 786
861 787 /* TXVGA=0x1A */
862 //TXVGA=0x17 788 {(0x05 << 24) | 0x24C68A, 24, 0x00292315, 0x0800FEFF, 0x50502E2E},
863 { (0x05<<24)|0x24C5CA, 18, 0x00262114, 0x0700FEFF, 0x51512F2F }, 789 {(0x05 << 24) | 0x24C68A, 25, 0x00262114, 0x0700FEFF, 0x55553131},
864 { (0x05<<24)|0x24C5CA, 19, 0x00241F13, 0x0700FFFF, 0x55553131 }, 790
865 791 /* TXVGA=0x1B */
866 //TXVGA=0x18 792 {(0x05 << 24) | 0x24C6CA, 26, 0x00262114, 0x0700FEFF, 0x53533030},
867 { (0x05<<24)|0x24C60A, 20, 0x00292315, 0x0800FEFF, 0x4F4F2E2E }, 793 {(0x05 << 24) | 0x24C6CA, 27, 0x00292315, 0x0800FEFF, 0x5A5A3434},
868 { (0x05<<24)|0x24C60A, 21, 0x00262114, 0x0700FEFF, 0x53533030 }, 794
869 795 /* TXVGA=0x1C */
870 //TXVGA=0x19 796 {(0x05 << 24) | 0x24C70A, 28, 0x00292315, 0x0800FEFF, 0x55553131},
871 { (0x05<<24)|0x24C64A, 22, 0x00292315, 0x0800FEFF, 0x4E4E2D2D }, 797 {(0x05 << 24) | 0x24C70A, 29, 0x00292315, 0x0800FEFF, 0x5D5D3636},
872 { (0x05<<24)|0x24C64A, 23, 0x00262114, 0x0700FEFF, 0x53533030 }, 798
873 799 /* TXVGA=0x1D */
874 //TXVGA=0x1A 800 {(0x05 << 24) | 0x24C74A, 30, 0x00292315, 0x0800FEFF, 0x5F5F3737},
875 { (0x05<<24)|0x24C68A, 24, 0x00292315, 0x0800FEFF, 0x50502E2E }, 801 {(0x05 << 24) | 0x24C74A, 31, 0x00262114, 0x0700FEFF, 0x65653B3B},
876 { (0x05<<24)|0x24C68A, 25, 0x00262114, 0x0700FEFF, 0x55553131 }, 802
877 803 /* TXVGA=0x1E */
878 //TXVGA=0x1B 804 {(0x05 << 24) | 0x24C78A, 32, 0x00292315, 0x0800FEFF, 0x66663B3B},
879 { (0x05<<24)|0x24C6CA, 26, 0x00262114, 0x0700FEFF, 0x53533030 }, 805 {(0x05 << 24) | 0x24C78A, 33, 0x00262114, 0x0700FEFF, 0x70704141},
880 { (0x05<<24)|0x24C6CA, 27, 0x00292315, 0x0800FEFF, 0x5A5A3434 }, 806
881 807 /* TXVGA=0x1F */
882 //TXVGA=0x1C 808 {(0x05 << 24) | 0x24C7CA, 34, 0x00292315, 0x0800FEFF, 0x72724242}
883 { (0x05<<24)|0x24C70A, 28, 0x00292315, 0x0800FEFF, 0x55553131 },
884 { (0x05<<24)|0x24C70A, 29, 0x00292315, 0x0800FEFF, 0x5D5D3636 },
885
886 //TXVGA=0x1D
887 { (0x05<<24)|0x24C74A, 30, 0x00292315, 0x0800FEFF, 0x5F5F3737 },
888 { (0x05<<24)|0x24C74A, 31, 0x00262114, 0x0700FEFF, 0x65653B3B },
889
890 //TXVGA=0x1E
891 { (0x05<<24)|0x24C78A, 32, 0x00292315, 0x0800FEFF, 0x66663B3B },
892 { (0x05<<24)|0x24C78A, 33, 0x00262114, 0x0700FEFF, 0x70704141 },
893
894 //TXVGA=0x1F
895 { (0x05<<24)|0x24C7CA, 34, 0x00292315, 0x0800FEFF, 0x72724242 }
896}; 809};
897 810
898/////////////////////////////////////////////////////////////////////////////////////////////////// 811/* ================================================================================================== */
899/////////////////////////////////////////////////////////////////////////////////////////////////// 812
900/////////////////////////////////////////////////////////////////////////////////////////////////// 813
901 814
902 815/*
903 816 * =============================================================================================================
904//============================================================================================================= 817 * Uxx_ReadEthernetAddress --
905// Uxx_ReadEthernetAddress -- 818 *
906// 819 * Routine Description:
907// Routine Description: 820 * Reads in the Ethernet address from the IC.
908// Reads in the Ethernet address from the IC. 821 *
909// 822 * Arguments:
910// Arguments: 823 * pHwData - The pHwData structure
911// pHwData - The pHwData structure 824 *
912// 825 * Return Value:
913// Return Value: 826 *
914// 827 * The address is stored in EthernetIDAddr.
915// The address is stored in EthernetIDAddr. 828 * =============================================================================================================
916//============================================================================================================= 829 */
917void 830void Uxx_ReadEthernetAddress(struct hw_data *pHwData)
918Uxx_ReadEthernetAddress( struct hw_data * pHwData )
919{ 831{
920 u32 ltmp; 832 u32 ltmp;
921 833
922 // Reading Ethernet address from EEPROM and set into hardware due to MAC address maybe change. 834 /*
923 // Only unplug and plug again can make hardware read EEPROM again. 20060727 835 * Reading Ethernet address from EEPROM and set into hardware due to MAC address maybe change.
924 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08000000 ); // Start EEPROM access + Read + address(0x0d) 836 * Only unplug and plug again can make hardware read EEPROM again.
925 Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp ); 837 */
926 *(u16 *)pHwData->PermanentMacAddress = cpu_to_le16((u16)ltmp); //20060926 anson's endian 838 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08000000); /* Start EEPROM access + Read + address(0x0d) */
927 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08010000 ); // Start EEPROM access + Read + address(0x0d) 839 Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
928 Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp ); 840 *(u16 *)pHwData->PermanentMacAddress = cpu_to_le16((u16) ltmp);
929 *(u16 *)(pHwData->PermanentMacAddress + 2) = cpu_to_le16((u16)ltmp); //20060926 anson's endian 841 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08010000); /* Start EEPROM access + Read + address(0x0d) */
930 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08020000 ); // Start EEPROM access + Read + address(0x0d) 842 Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
931 Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp ); 843 *(u16 *)(pHwData->PermanentMacAddress + 2) = cpu_to_le16((u16) ltmp);
932 *(u16 *)(pHwData->PermanentMacAddress + 4) = cpu_to_le16((u16)ltmp); //20060926 anson's endian 844 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08020000); /* Start EEPROM access + Read + address(0x0d) */
845 Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
846 *(u16 *)(pHwData->PermanentMacAddress + 4) = cpu_to_le16((u16) ltmp);
933 *(u16 *)(pHwData->PermanentMacAddress + 6) = 0; 847 *(u16 *)(pHwData->PermanentMacAddress + 6) = 0;
934 Wb35Reg_WriteSync( pHwData, 0x03e8, cpu_to_le32(*(u32 *)pHwData->PermanentMacAddress) ); //20060926 anson's endian 848 Wb35Reg_WriteSync(pHwData, 0x03e8, cpu_to_le32(*(u32 *)pHwData->PermanentMacAddress));
935 Wb35Reg_WriteSync( pHwData, 0x03ec, cpu_to_le32(*(u32 *)(pHwData->PermanentMacAddress+4)) ); //20060926 anson's endian 849 Wb35Reg_WriteSync(pHwData, 0x03ec, cpu_to_le32(*(u32 *)(pHwData->PermanentMacAddress + 4)));
936} 850}
937 851
938 852
939//=============================================================================================================== 853/*
940// CardGetMulticastBit -- 854 * ===============================================================================================================
941// Description: 855 * CardGetMulticastBit --
942// For a given multicast address, returns the byte and bit in the card multicast registers that it hashes to. 856 * Description:
943// Calls CardComputeCrc() to determine the CRC value. 857 * For a given multicast address, returns the byte and bit in the card multicast registers that it hashes to.
944// Arguments: 858 * Calls CardComputeCrc() to determine the CRC value.
945// Address - the address 859 * Arguments:
946// Byte - the byte that it hashes to 860 * Address - the address
947// Value - will have a 1 in the relevant bit 861 * Byte - the byte that it hashes to
948// Return Value: 862 * Value - will have a 1 in the relevant bit
949// None. 863 * Return Value:
950//============================================================================================================== 864 * None.
951void CardGetMulticastBit( u8 Address[ETH_ALEN], u8 *Byte, u8 *Value ) 865 * ==============================================================================================================
866 */
867void CardGetMulticastBit(u8 Address[ETH_ALEN], u8 *Byte, u8 *Value)
952{ 868{
953 u32 Crc; 869 u32 Crc;
954 u32 BitNumber; 870 u32 BitNumber;
955 871
956 // First compute the CRC. 872 /* First compute the CRC. */
957 Crc = CardComputeCrc(Address, ETH_ALEN); 873 Crc = CardComputeCrc(Address, ETH_ALEN);
958 874
959 // The computed CRC is bit0~31 from left to right 875 /* The computed CRC is bit0~31 from left to right */
960 //At first we should do right shift 25bits, and read 7bits by using '&', 2^7=128 876 /* At first we should do right shift 25bits, and read 7bits by using '&', 2^7=128 */
961 BitNumber = (u32) ((Crc >> 26) & 0x3f); 877 BitNumber = (u32) ((Crc >> 26) & 0x3f);
962 878
963 *Byte = (u8) (BitNumber >> 3);// 900514 original (BitNumber / 8) 879 *Byte = (u8) (BitNumber >> 3); /* 900514 original (BitNumber / 8) */
964 *Value = (u8) ((u8)1 << (BitNumber % 8)); 880 *Value = (u8) ((u8) 1 << (BitNumber % 8));
965} 881}
966 882
967void Uxx_power_on_procedure( struct hw_data * pHwData ) 883void Uxx_power_on_procedure(struct hw_data *pHwData)
968{ 884{
969 u32 ltmp, loop; 885 u32 ltmp, loop;
970 886
971 if( pHwData->phy_type <= RF_MAXIM_V1 ) 887 if (pHwData->phy_type <= RF_MAXIM_V1)
972 Wb35Reg_WriteSync( pHwData, 0x03d4, 0xffffff38 ); 888 Wb35Reg_WriteSync(pHwData, 0x03d4, 0xffffff38);
973 else 889 else {
974 { 890 Wb35Reg_WriteSync(pHwData, 0x03f4, 0xFF5807FF);
975 Wb35Reg_WriteSync( pHwData, 0x03f4, 0xFF5807FF );// 20060721 For NEW IC 0xFF5807FF 891 Wb35Reg_WriteSync(pHwData, 0x03d4, 0x80); /* regulator on only */
976 892 msleep(10);
977 // 20060511.1 Fix the following 4 steps for Rx of RF 2230 initial fail 893 Wb35Reg_WriteSync(pHwData, 0x03d4, 0xb8); /* REG_ON RF_RSTN on, and */
978 Wb35Reg_WriteSync( pHwData, 0x03d4, 0x80 );// regulator on only 894 msleep(10);
979 msleep(10); // Modify 20051221.1.b
980 Wb35Reg_WriteSync( pHwData, 0x03d4, 0xb8 );// REG_ON RF_RSTN on, and
981 msleep(10); // Modify 20051221.1.b
982
983 ltmp = 0x4968; 895 ltmp = 0x4968;
984 if( (pHwData->phy_type == RF_WB_242) || 896 if ((pHwData->phy_type == RF_WB_242) ||
985 (RF_WB_242_1 == pHwData->phy_type) ) // 20060619.5 Add 897 (RF_WB_242_1 == pHwData->phy_type))
986 ltmp = 0x4468; 898 ltmp = 0x4468;
987 Wb35Reg_WriteSync( pHwData, 0x03d0, ltmp );
988 899
989 Wb35Reg_WriteSync( pHwData, 0x03d4, 0xa0 );// PLL_PD REF_PD set to 0 900 Wb35Reg_WriteSync(pHwData, 0x03d0, ltmp);
901 Wb35Reg_WriteSync(pHwData, 0x03d4, 0xa0); /* PLL_PD REF_PD set to 0 */
990 902
991 msleep(20); // Modify 20051221.1.b 903 msleep(20);
992 Wb35Reg_ReadSync( pHwData, 0x03d0, &ltmp ); 904 Wb35Reg_ReadSync(pHwData, 0x03d0, &ltmp);
993 loop = 500; // Wait for 5 second 20061101 905 loop = 500; /* Wait for 5 second */
994 while( !(ltmp & 0x20) && loop-- ) 906 while (!(ltmp & 0x20) && loop--) {
995 { 907 msleep(10);
996 msleep(10); // Modify 20051221.1.b 908 if (!Wb35Reg_ReadSync(pHwData, 0x03d0, &ltmp))
997 if( !Wb35Reg_ReadSync( pHwData, 0x03d0, &ltmp ) )
998 break; 909 break;
999 } 910 }
1000 911
1001 Wb35Reg_WriteSync( pHwData, 0x03d4, 0xe0 );// MLK_EN 912 Wb35Reg_WriteSync(pHwData, 0x03d4, 0xe0); /* MLK_EN */
1002 } 913 }
1003 914
1004 Wb35Reg_WriteSync( pHwData, 0x03b0, 1 );// Reset hardware first 915 Wb35Reg_WriteSync(pHwData, 0x03b0, 1); /* Reset hardware first */
1005 msleep(10); // Add this 20051221.1.b 916 msleep(10);
1006 917
1007 // Set burst write delay 918 /* Set burst write delay */
1008 Wb35Reg_WriteSync( pHwData, 0x03f8, 0x7ff ); 919 Wb35Reg_WriteSync(pHwData, 0x03f8, 0x7ff);
1009} 920}
1010 921
1011void Set_ChanIndep_RfData_al7230_24( struct hw_data * pHwData, u32 *pltmp ,char number) 922void Set_ChanIndep_RfData_al7230_24(struct hw_data *pHwData, u32 *pltmp , char number)
1012{ 923{
1013 u8 i; 924 u8 i;
1014 925
1015 for( i=0; i<number; i++ ) 926 for (i = 0; i < number; i++) {
1016 {
1017 pHwData->phy_para[i] = al7230_rf_data_24[i]; 927 pHwData->phy_para[i] = al7230_rf_data_24[i];
1018 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_rf_data_24[i]&0xffffff); 928 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_rf_data_24[i] & 0xffffff);
1019 } 929 }
1020} 930}
1021 931
1022void Set_ChanIndep_RfData_al7230_50( struct hw_data * pHwData, u32 *pltmp, char number) 932void Set_ChanIndep_RfData_al7230_50(struct hw_data *pHwData, u32 *pltmp, char number)
1023{ 933{
1024 u8 i; 934 u8 i;
1025 935
1026 for( i=0; i<number; i++ ) 936 for (i = 0; i < number; i++) {
1027 {
1028 pHwData->phy_para[i] = al7230_rf_data_50[i]; 937 pHwData->phy_para[i] = al7230_rf_data_50[i];
1029 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_rf_data_50[i]&0xffffff); 938 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_rf_data_50[i] & 0xffffff);
1030 } 939 }
1031} 940}
1032 941
1033 942
1034//============================================================================================================= 943/*
1035// RFSynthesizer_initial -- 944 * =============================================================================================================
1036//============================================================================================================= 945 * RFSynthesizer_initial --
1037void 946 * =============================================================================================================
1038RFSynthesizer_initial(struct hw_data * pHwData) 947 */
948void RFSynthesizer_initial(struct hw_data *pHwData)
1039{ 949{
1040 u32 altmp[32]; 950 u32 altmp[32];
1041 u32 * pltmp = altmp; 951 u32 *pltmp = altmp;
1042 u32 ltmp; 952 u32 ltmp;
1043 u8 number=0x00; // The number of register vale 953 u8 number = 0x00; /* The number of register vale */
1044 u8 i; 954 u8 i;
1045 955
1046 // 956 /*
1047 // bit[31] SPI Enable. 957 * bit[31] SPI Enable.
1048 // 1=perform synthesizer program operation. This bit will 958 * 1=perform synthesizer program operation. This bit will
1049 // cleared automatically after the operation is completed. 959 * cleared automatically after the operation is completed.
1050 // bit[30] SPI R/W Control 960 * bit[30] SPI R/W Control
1051 // 0=write, 1=read 961 * 0=write, 1=read
1052 // bit[29:24] SPI Data Format Length 962 * bit[29:24] SPI Data Format Length
1053 // bit[17:4 ] RF Data bits. 963 * bit[17:4 ] RF Data bits.
1054 // bit[3 :0 ] RF address. 964 * bit[3 :0 ] RF address.
1055 switch( pHwData->phy_type ) 965 */
1056 { 966 switch (pHwData->phy_type) {
1057 case RF_MAXIM_2825: 967 case RF_MAXIM_2825:
1058 case RF_MAXIM_V1: // 11g Winbond 2nd BB(with Phy board (v1) + Maxim 331) 968 case RF_MAXIM_V1: /* 11g Winbond 2nd BB(with Phy board (v1) + Maxim 331) */
1059 number = sizeof(max2825_rf_data)/sizeof(max2825_rf_data[0]); 969 number = sizeof(max2825_rf_data) / sizeof(max2825_rf_data[0]);
1060 for( i=0; i<number; i++ ) 970 for (i = 0; i < number; i++) {
1061 { 971 pHwData->phy_para[i] = max2825_rf_data[i]; /* Backup Rf parameter */
1062 pHwData->phy_para[i] = max2825_rf_data[i];// Backup Rf parameter 972 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2825_rf_data[i], 18);
1063 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2825_rf_data[i], 18);
1064 } 973 }
1065 break; 974 break;
1066
1067 case RF_MAXIM_2827: 975 case RF_MAXIM_2827:
1068 number = sizeof(max2827_rf_data)/sizeof(max2827_rf_data[0]); 976 number = sizeof(max2827_rf_data) / sizeof(max2827_rf_data[0]);
1069 for( i=0; i<number; i++ ) 977 for (i = 0; i < number; i++) {
1070 {
1071 pHwData->phy_para[i] = max2827_rf_data[i]; 978 pHwData->phy_para[i] = max2827_rf_data[i];
1072 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2827_rf_data[i], 18); 979 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2827_rf_data[i], 18);
1073 } 980 }
1074 break; 981 break;
1075
1076 case RF_MAXIM_2828: 982 case RF_MAXIM_2828:
1077 number = sizeof(max2828_rf_data)/sizeof(max2828_rf_data[0]); 983 number = sizeof(max2828_rf_data) / sizeof(max2828_rf_data[0]);
1078 for( i=0; i<number; i++ ) 984 for (i = 0; i < number; i++) {
1079 {
1080 pHwData->phy_para[i] = max2828_rf_data[i]; 985 pHwData->phy_para[i] = max2828_rf_data[i];
1081 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2828_rf_data[i], 18); 986 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2828_rf_data[i], 18);
1082 } 987 }
1083 break; 988 break;
1084
1085 case RF_MAXIM_2829: 989 case RF_MAXIM_2829:
1086 number = sizeof(max2829_rf_data)/sizeof(max2829_rf_data[0]); 990 number = sizeof(max2829_rf_data) / sizeof(max2829_rf_data[0]);
1087 for( i=0; i<number; i++ ) 991 for (i = 0; i < number; i++) {
1088 {
1089 pHwData->phy_para[i] = max2829_rf_data[i]; 992 pHwData->phy_para[i] = max2829_rf_data[i];
1090 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2829_rf_data[i], 18); 993 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2829_rf_data[i], 18);
1091 } 994 }
1092 break; 995 break;
1093
1094 case RF_AIROHA_2230: 996 case RF_AIROHA_2230:
1095 number = sizeof(al2230_rf_data)/sizeof(al2230_rf_data[0]); 997 number = sizeof(al2230_rf_data) / sizeof(al2230_rf_data[0]);
1096 for( i=0; i<number; i++ ) 998 for (i = 0; i < number; i++) {
1097 {
1098 pHwData->phy_para[i] = al2230_rf_data[i]; 999 pHwData->phy_para[i] = al2230_rf_data[i];
1099 pltmp[i] = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( al2230_rf_data[i], 20); 1000 pltmp[i] = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse(al2230_rf_data[i], 20);
1100 } 1001 }
1101 break; 1002 break;
1102
1103 case RF_AIROHA_2230S: 1003 case RF_AIROHA_2230S:
1104 number = sizeof(al2230s_rf_data)/sizeof(al2230s_rf_data[0]); 1004 number = sizeof(al2230s_rf_data) / sizeof(al2230s_rf_data[0]);
1105 for( i=0; i<number; i++ ) 1005 for (i = 0; i < number; i++) {
1106 {
1107 pHwData->phy_para[i] = al2230s_rf_data[i]; 1006 pHwData->phy_para[i] = al2230s_rf_data[i];
1108 pltmp[i] = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( al2230s_rf_data[i], 20); 1007 pltmp[i] = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse(al2230s_rf_data[i], 20);
1109 } 1008 }
1110 break; 1009 break;
1111
1112 case RF_AIROHA_7230: 1010 case RF_AIROHA_7230:
1113 1011 /* Start to fill RF parameters, PLL_ON should be pulled low. */
1114 //Start to fill RF parameters, PLL_ON should be pulled low. 1012 Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000000);
1115 Wb35Reg_WriteSync( pHwData, 0x03dc, 0x00000000 ); 1013 #ifdef _PE_STATE_DUMP_
1116#ifdef _PE_STATE_DUMP_
1117 printk("* PLL_ON low\n"); 1014 printk("* PLL_ON low\n");
1118#endif 1015 #endif
1119 1016 number = sizeof(al7230_rf_data_24) / sizeof(al7230_rf_data_24[0]);
1120 number = sizeof(al7230_rf_data_24)/sizeof(al7230_rf_data_24[0]);
1121 Set_ChanIndep_RfData_al7230_24(pHwData, pltmp, number); 1017 Set_ChanIndep_RfData_al7230_24(pHwData, pltmp, number);
1122 break; 1018 break;
1123
1124 case RF_WB_242: 1019 case RF_WB_242:
1125 case RF_WB_242_1: // 20060619.5 Add 1020 case RF_WB_242_1:
1126 number = sizeof(w89rf242_rf_data)/sizeof(w89rf242_rf_data[0]); 1021 number = sizeof(w89rf242_rf_data) / sizeof(w89rf242_rf_data[0]);
1127 for( i=0; i<number; i++ ) 1022 for (i = 0; i < number; i++) {
1128 {
1129 ltmp = w89rf242_rf_data[i]; 1023 ltmp = w89rf242_rf_data[i];
1130 if( i == 4 ) // Update the VCO trim from EEPROM 1024 if (i == 4) { /* Update the VCO trim from EEPROM */
1131 { 1025 ltmp &= ~0xff0; /* Mask bit4 ~bit11 */
1132 ltmp &= ~0xff0; // Mask bit4 ~bit11 1026 ltmp |= pHwData->VCO_trim << 4;
1133 ltmp |= pHwData->VCO_trim<<4;
1134 } 1027 }
1135 1028
1136 pHwData->phy_para[i] = ltmp; 1029 pHwData->phy_para[i] = ltmp;
1137 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( ltmp, 24); 1030 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse(ltmp, 24);
1138 } 1031 }
1139 break; 1032 break;
1140 } 1033 }
1141 1034
1142 pHwData->phy_number = number; 1035 pHwData->phy_number = number;
1143 1036
1144 // The 16 is the maximum capability of hardware. Here use 12 1037 /* The 16 is the maximum capability of hardware. Here use 12 */
1145 if( number > 12 ) { 1038 if (number > 12) {
1146 //Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 12, NO_INCREMENT ); 1039 for (i = 0; i < 12; i++) /* For Al2230 */
1147 for( i=0; i<12; i++ ) // For Al2230 1040 Wb35Reg_WriteSync(pHwData, 0x0864, pltmp[i]);
1148 Wb35Reg_WriteSync( pHwData, 0x0864, pltmp[i] );
1149 1041
1150 pltmp += 12; 1042 pltmp += 12;
1151 number -= 12; 1043 number -= 12;
1152 } 1044 }
1153 1045
1154 // Write to register. number must less and equal than 16 1046 /* Write to register. number must less and equal than 16 */
1155 for( i=0; i<number; i++ ) 1047 for (i = 0; i < number; i++)
1156 Wb35Reg_WriteSync( pHwData, 0x864, pltmp[i] ); 1048 Wb35Reg_WriteSync(pHwData, 0x864, pltmp[i]);
1157 1049
1158 // 20060630.1 Calibration only 1 time 1050 /* Calibration only 1 time */
1159 if( pHwData->CalOneTime ) 1051 if (pHwData->CalOneTime)
1160 return; 1052 return;
1161 pHwData->CalOneTime = 1; 1053 pHwData->CalOneTime = 1;
1162 1054
1163 switch( pHwData->phy_type ) 1055 switch (pHwData->phy_type) {
1164 { 1056 case RF_AIROHA_2230:
1165 case RF_AIROHA_2230: 1057 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x07 << 20) | 0xE168E, 20);
1166 1058 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1167 // 20060511.1 --- Modifying the follow step for Rx issue----------------- 1059 msleep(10);
1168 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( (0x07<<20)|0xE168E, 20); 1060 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse(al2230_rf_data[7], 20);
1169 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1061 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1170 msleep(10); 1062 msleep(10);
1171 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( al2230_rf_data[7], 20); 1063 case RF_AIROHA_2230S:
1172 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1064 Wb35Reg_WriteSync(pHwData, 0x03d4, 0x80); /* regulator on only */
1173 msleep(10); 1065 msleep(10);
1174 1066 Wb35Reg_WriteSync(pHwData, 0x03d4, 0xa0); /* PLL_PD REF_PD set to 0 */
1175 case RF_AIROHA_2230S: // 20060420 Add this 1067 msleep(10);
1176 1068 Wb35Reg_WriteSync(pHwData, 0x03d4, 0xe0); /* MLK_EN */
1177 // 20060511.1 --- Modifying the follow step for Rx issue----------------- 1069 Wb35Reg_WriteSync(pHwData, 0x03b0, 1); /* Reset hardware first */
1178 Wb35Reg_WriteSync( pHwData, 0x03d4, 0x80 );// regulator on only 1070 msleep(10);
1179 msleep(10); // Modify 20051221.1.b 1071 /* ========================================================= */
1180 1072
1181 Wb35Reg_WriteSync( pHwData, 0x03d4, 0xa0 );// PLL_PD REF_PD set to 0 1073 /* The follow code doesn't use the burst-write mode */
1182 msleep(10); // Modify 20051221.1.b 1074 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F<<20) | 0xF01A0, 20);
1183 1075 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1184 Wb35Reg_WriteSync( pHwData, 0x03d4, 0xe0 );// MLK_EN 1076
1185 Wb35Reg_WriteSync( pHwData, 0x03b0, 1 );// Reset hardware first 1077 ltmp = pHwData->reg.BB5C & 0xfffff000;
1186 msleep(10); // Add this 20051221.1.b 1078 Wb35Reg_WriteSync(pHwData, 0x105c, ltmp);
1187 //------------------------------------------------------------------------ 1079 pHwData->reg.BB50 |= 0x13; /* (MASK_IQCAL_MODE|MASK_CALIB_START) */
1188 1080 Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50);
1189 // The follow code doesn't use the burst-write mode 1081 msleep(5);
1190 //phy_set_rf_data(phw_data, 0x0F, (0x0F<<20) | 0xF01A0); //Raise Initial Setting 1082
1191 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( (0x0F<<20) | 0xF01A0, 20); 1083 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01B0, 20);
1192 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1084 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1193 1085 msleep(5);
1194 ltmp = pHwData->reg.BB5C & 0xfffff000; 1086
1195 Wb35Reg_WriteSync( pHwData, 0x105c, ltmp ); 1087 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01E0, 20);
1196 pHwData->reg.BB50 |= 0x13;//(MASK_IQCAL_MODE|MASK_CALIB_START);//20060315.1 modify 1088 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1197 Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50); 1089 msleep(5);
1198 msleep(5); 1090
1199 1091 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse((0x0F << 20) | 0xF01A0, 20);
1200 //phy_set_rf_data(phw_data, 0x0F, (0x0F<<20) | 0xF01B0); //Activate Filter Cal. 1092 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp) ;
1201 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( (0x0F<<20) | 0xF01B0, 20); 1093
1202 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1094 Wb35Reg_WriteSync(pHwData, 0x105c, pHwData->reg.BB5C);
1203 msleep(5); 1095 pHwData->reg.BB50 &= ~0x13; /* (MASK_IQCAL_MODE|MASK_CALIB_START); */
1204 1096 Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50);
1205 //phy_set_rf_data(phw_data, 0x0F, (0x0F<<20) | 0xF01e0); //Activate TX DCC 1097 break;
1206 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( (0x0F<<20) | 0xF01E0, 20); 1098 case RF_AIROHA_7230:
1207 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1099 /* RF parameters have filled completely, PLL_ON should be pulled high */
1208 msleep(5); 1100 Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000080);
1209 1101 #ifdef _PE_STATE_DUMP_
1210 //phy_set_rf_data(phw_data, 0x0F, (0x0F<<20) | 0xF01A0); //Resotre Initial Setting 1102 printk("* PLL_ON high\n");
1211 ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( (0x0F<<20) | 0xF01A0, 20); 1103 #endif
1212 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1104
1213 1105 /* 2.4GHz */
1214// //Force TXI(Q)P(N) to normal control 1106 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x9ABA8F;
1215 Wb35Reg_WriteSync( pHwData, 0x105c, pHwData->reg.BB5C ); 1107 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1216 pHwData->reg.BB50 &= ~0x13;//(MASK_IQCAL_MODE|MASK_CALIB_START); 1108 msleep(5);
1217 Wb35Reg_WriteSync( pHwData, 0x1050, pHwData->reg.BB50); 1109 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x3ABA8F;
1218 break; 1110 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1219 1111 msleep(5);
1220 case RF_AIROHA_7230: 1112 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x1ABA8F;
1221 1113 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1222 //RF parameters have filled completely, PLL_ON should be 1114 msleep(5);
1223 //pulled high 1115
1224 Wb35Reg_WriteSync( pHwData, 0x03dc, 0x00000080 ); 1116 /* 5GHz */
1225 #ifdef _PE_STATE_DUMP_ 1117 Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000000);
1226 printk("* PLL_ON high\n"); 1118 #ifdef _PE_STATE_DUMP_
1227 #endif 1119 printk("* PLL_ON low\n");
1228 1120 #endif
1229 //2.4GHz 1121
1230 //ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x1ABA8F; 1122 number = sizeof(al7230_rf_data_50) / sizeof(al7230_rf_data_50[0]);
1231 //Wb35Reg_WriteSync pHwData, 0x0864, ltmp ); 1123 Set_ChanIndep_RfData_al7230_50(pHwData, pltmp, number);
1232 //msleep(1); // Sleep 1 ms 1124 /* Write to register. number must less and equal than 16 */
1233 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x9ABA8F; 1125 for (i = 0; i < number; i++)
1234 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1126 Wb35Reg_WriteSync(pHwData, 0x0864, pltmp[i]);
1235 msleep(5); 1127 msleep(5);
1236 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x3ABA8F; 1128
1237 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1129 Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000080);
1238 msleep(5); 1130 #ifdef _PE_STATE_DUMP_
1239 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x1ABA8F; 1131 printk("* PLL_ON high\n");
1240 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1132 #endif
1241 msleep(5); 1133
1242 1134 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x9ABA8F;
1243 //5GHz 1135 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1244 Wb35Reg_WriteSync( pHwData, 0x03dc, 0x00000000 ); 1136 msleep(5);
1245 #ifdef _PE_STATE_DUMP_ 1137 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x3ABA8F;
1246 printk("* PLL_ON low\n"); 1138 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1247 #endif 1139 msleep(5);
1248 1140 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x12BACF;
1249 number = sizeof(al7230_rf_data_50)/sizeof(al7230_rf_data_50[0]); 1141 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1250 Set_ChanIndep_RfData_al7230_50(pHwData, pltmp, number); 1142 msleep(5);
1251 // Write to register. number must less and equal than 16 1143 break;
1252 for( i=0; i<number; i++ ) 1144 case RF_WB_242:
1253 Wb35Reg_WriteSync( pHwData, 0x0864, pltmp[i] ); 1145 case RF_WB_242_1:
1254 msleep(5); 1146 /* for FA5976A */
1255 1147 ltmp = pHwData->reg.BB5C & 0xfffff000;
1256 Wb35Reg_WriteSync( pHwData, 0x03dc, 0x00000080 ); 1148 Wb35Reg_WriteSync(pHwData, 0x105c, ltmp);
1257 #ifdef _PE_STATE_DUMP_ 1149 Wb35Reg_WriteSync(pHwData, 0x1058, 0);
1258 printk("* PLL_ON high\n"); 1150 pHwData->reg.BB50 |= 0x3; /* (MASK_IQCAL_MODE|MASK_CALIB_START); */
1259 #endif 1151 Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50);
1260 1152
1261 //ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x12BACF; 1153 /* ----- Calibration (1). VCO frequency calibration */
1262 //Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1154 /* Calibration (1a.0). Synthesizer reset */
1263 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x9ABA8F; 1155 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x0F<<24) | 0x00101E, 24);
1264 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1156 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1265 msleep(5); 1157 msleep(5);
1266 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x3ABA8F; 1158 /* Calibration (1a). VCO frequency calibration mode ; waiting 2msec VCO calibration time */
1267 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1159 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFE69c0, 24);
1268 msleep(5); 1160 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1269 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x12BACF; 1161 msleep(2);
1270 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1162
1271 msleep(5); 1163 /* ----- Calibration (2). TX baseband Gm-C filter auto-tuning */
1272 1164 /* Calibration (2a). turn off ENCAL signal */
1273 //Wb35Reg_WriteSync( pHwData, 0x03dc, 0x00000080 ); 1165 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xF8EBC0, 24);
1274 //printk("* PLL_ON high\n"); 1166 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1275 break; 1167 /* Calibration (2b.0). TX filter auto-tuning BW: TFLBW=101 (TC5376A default) */
1276 1168 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x07<<24) | 0x0C68CE, 24);
1277 case RF_WB_242: 1169 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1278 case RF_WB_242_1: // 20060619.5 Add 1170 /* Calibration (2b). send TX reset signal */
1279 1171 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x0F<<24) | 0x00201E, 24);
1280 // 1172 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1281 // ; Version 1.3B revision items: for FA5976A , October 3, 2005 by HTHo 1173 /* Calibration (2c). turn-on TX Gm-C filter auto-tuning */
1282 // 1174 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFCEBC0, 24);
1283 ltmp = pHwData->reg.BB5C & 0xfffff000; 1175 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1284 Wb35Reg_WriteSync( pHwData, 0x105c, ltmp ); 1176 udelay(150); /* Sleep 150 us */
1285 Wb35Reg_WriteSync( pHwData, 0x1058, 0 ); 1177 /* turn off ENCAL signal */
1286 pHwData->reg.BB50 |= 0x3;//(MASK_IQCAL_MODE|MASK_CALIB_START);//20060630 1178 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xF8EBC0, 24);
1287 Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50); 1179 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1288 1180
1289 //----- Calibration (1). VCO frequency calibration 1181 /* ----- Calibration (3). RX baseband Gm-C filter auto-tuning */
1290 //Calibration (1a.0). Synthesizer reset (HTHo corrected 2005/05/10) 1182 /* Calibration (3a). turn off ENCAL signal */
1291 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x0F<<24) | 0x00101E, 24); 1183 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFAEDC0, 24);
1292 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1184 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1293 msleep(5); // Sleep 5ms 1185 /* Calibration (3b.0). RX filter auto-tuning BW: RFLBW=100 (TC5376A+corner default;) */
1294 //Calibration (1a). VCO frequency calibration mode ; waiting 2msec VCO calibration time 1186 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x07<<24) | 0x0C68CE, 24);
1295 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFE69c0, 24); 1187 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1296 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1188 /* Calibration (3b). send RX reset signal */
1297 msleep(2); // Sleep 2ms 1189 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x0F<<24) | 0x00401E, 24);
1298 1190 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1299 //----- Calibration (2). TX baseband Gm-C filter auto-tuning 1191 /* Calibration (3c). turn-on RX Gm-C filter auto-tuning */
1300 //Calibration (2a). turn off ENCAL signal 1192 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFEEDC0, 24);
1301 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xF8EBC0, 24); 1193 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1302 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1194 udelay(150); /* Sleep 150 us */
1303 //Calibration (2b.0). TX filter auto-tuning BW: TFLBW=101 (TC5376A default) 1195 /* Calibration (3e). turn off ENCAL signal */
1304 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x07<<24) | 0x0C68CE, 24); 1196 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFAEDC0, 24);
1305 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1197 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1306 //Calibration (2b). send TX reset signal (HTHo corrected May 10, 2005) 1198
1307 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x0F<<24) | 0x00201E, 24); 1199 /* ----- Calibration (4). TX LO leakage calibration */
1308 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1200 /* Calibration (4a). TX LO leakage calibration */
1309 //Calibration (2c). turn-on TX Gm-C filter auto-tuning 1201 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFD6BC0, 24);
1310 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFCEBC0, 24); 1202 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1311 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1203 udelay(150); /* Sleep 150 us */
1312 udelay(150); // Sleep 150 us 1204
1313 //turn off ENCAL signal 1205 /* ----- Calibration (5). RX DC offset calibration */
1314 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xF8EBC0, 24); 1206 /* Calibration (5a). turn off ENCAL signal and set to RX SW DC calibration mode */
1315 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1207 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFAEDC0, 24);
1316 1208 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1317 //----- Calibration (3). RX baseband Gm-C filter auto-tuning 1209 /* Calibration (5b). turn off AGC servo-loop & RSSI */
1318 //Calibration (3a). turn off ENCAL signal 1210 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x01<<24) | 0xEBFFC2, 24);
1319 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFAEDC0, 24); 1211 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1320 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1212
1321 //Calibration (3b.0). RX filter auto-tuning BW: RFLBW=100 (TC5376A+corner default; July 26, 2005) 1213 /* for LNA=11 -------- */
1322 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x07<<24) | 0x0C68CE, 24); 1214 /* Calibration (5c-h). RX DC offset current bias ON; & LNA=11; RXVGA=111111 */
1323 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1215 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x06<<24) | 0x343FCC, 24);
1324 //Calibration (3b). send RX reset signal (HTHo corrected May 10, 2005) 1216 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1325 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x0F<<24) | 0x00401E, 24); 1217 /* Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time */
1326 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1218 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFF6DC0, 24);
1327 //Calibration (3c). turn-on RX Gm-C filter auto-tuning 1219 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1328 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFEEDC0, 24); 1220 msleep(2);
1329 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1221 /* Calibration (5f). turn off ENCAL signal */
1330 udelay(150); // Sleep 150 us 1222 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFAEDC0, 24);
1331 //Calibration (3e). turn off ENCAL signal 1223 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1332 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFAEDC0, 24); 1224
1333 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1225 /* for LNA=10 -------- */
1334 1226 /* Calibration (5c-m). RX DC offset current bias ON; & LNA=10; RXVGA=111111 */
1335 //----- Calibration (4). TX LO leakage calibration 1227 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x06<<24) | 0x342FCC, 24);
1336 //Calibration (4a). TX LO leakage calibration 1228 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1337 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFD6BC0, 24); 1229 /* Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time */
1338 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1230 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFF6DC0, 24);
1339 udelay(150); // Sleep 150 us 1231 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1340 1232 msleep(2);
1341 //----- Calibration (5). RX DC offset calibration 1233 /* Calibration (5f). turn off ENCAL signal */
1342 //Calibration (5a). turn off ENCAL signal and set to RX SW DC caliration mode 1234 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFAEDC0, 24);
1343 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFAEDC0, 24); 1235 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1344 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1236
1345 //Calibration (5b). turn off AGC servo-loop & RSSI 1237 /* for LNA=01 -------- */
1346 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x01<<24) | 0xEBFFC2, 24); 1238 /* Calibration (5c-m). RX DC offset current bias ON; & LNA=01; RXVGA=111111 */
1347 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1239 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x06<<24) | 0x341FCC, 24);
1348 1240 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1349 //; for LNA=11 -------- 1241 /* Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time */
1350 //Calibration (5c-h). RX DC offset current bias ON; & LNA=11; RXVGA=111111 1242 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFF6DC0, 24);
1351 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x06<<24) | 0x343FCC, 24); 1243 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1352 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1244 msleep(2);
1353 //Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time 1245 /* Calibration (5f). turn off ENCAL signal */
1354 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFF6DC0, 24); 1246 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFAEDC0, 24);
1355 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1247 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1356 msleep(2); // Sleep 2ms 1248
1357 //Calibration (5f). turn off ENCAL signal 1249 /* for LNA=00 -------- */
1358 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFAEDC0, 24); 1250 /* Calibration (5c-l). RX DC offset current bias ON; & LNA=00; RXVGA=111111 */
1359 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1251 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x06<<24) | 0x340FCC, 24);
1360 1252 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1361 //; for LNA=10 -------- 1253 /* Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time */
1362 //Calibration (5c-m). RX DC offset current bias ON; & LNA=10; RXVGA=111111 1254 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFF6DC0, 24);
1363 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x06<<24) | 0x342FCC, 24); 1255 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1364 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1256 msleep(2);
1365 //Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time 1257 /* Calibration (5f). turn off ENCAL signal */
1366 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFF6DC0, 24); 1258 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xFAEDC0, 24);
1367 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1259 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1368 msleep(2); // Sleep 2ms 1260 /* Calibration (5g). turn on AGC servo-loop */
1369 //Calibration (5f). turn off ENCAL signal 1261 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x01<<24) | 0xEFFFC2, 24);
1370 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFAEDC0, 24); 1262 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1371 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1263
1372 1264 /* ----- Calibration (7). Switch RF chip to normal mode */
1373 //; for LNA=01 -------- 1265 /* 0x00 0xF86100 ; 3E184 ; Switch RF chip to normal mode */
1374 //Calibration (5c-m). RX DC offset current bias ON; & LNA=01; RXVGA=111111 1266 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse((0x00<<24) | 0xF86100, 24);
1375 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x06<<24) | 0x341FCC, 24); 1267 Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
1376 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp ); 1268 msleep(5);
1377 //Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time 1269 break;
1378 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFF6DC0, 24);
1379 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp );
1380 msleep(2); // Sleep 2ms
1381 //Calibration (5f). turn off ENCAL signal
1382 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFAEDC0, 24);
1383 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp );
1384
1385 //; for LNA=00 --------
1386 //Calibration (5c-l). RX DC offset current bias ON; & LNA=00; RXVGA=111111
1387 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x06<<24) | 0x340FCC, 24);
1388 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp );
1389 //Calibration (5d). turn on RX DC offset cal function; and waiting 2 msec cal time
1390 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFF6DC0, 24);
1391 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp );
1392 msleep(2); // Sleep 2ms
1393 //Calibration (5f). turn off ENCAL signal
1394 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xFAEDC0, 24);
1395 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp );
1396 //Calibration (5g). turn on AGC servo-loop
1397 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x01<<24) | 0xEFFFC2, 24);
1398 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp );
1399
1400 //; ----- Calibration (7). Switch RF chip to normal mode
1401 //0x00 0xF86100 ; 3E184 ; Switch RF chip to normal mode
1402// msleep(10); // @@ 20060721
1403 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( (0x00<<24) | 0xF86100, 24);
1404 Wb35Reg_WriteSync( pHwData, 0x0864, ltmp );
1405 msleep(5); // Sleep 5 ms
1406
1407// //write back
1408// Wb35Reg_WriteSync(pHwData, 0x105c, pHwData->reg.BB5C);
1409// pHwData->reg.BB50 &= ~0x13;//(MASK_IQCAL_MODE|MASK_CALIB_START); // 20060315.1 fix
1410// Wb35Reg_WriteSync(pHwData, 0x1050, pHwData->reg.BB50);
1411// msleep(1); // Sleep 1 ms
1412 break;
1413 } 1270 }
1414} 1271}
1415 1272
1416void BBProcessor_AL7230_2400( struct hw_data * pHwData) 1273void BBProcessor_AL7230_2400(struct hw_data *pHwData)
1417{ 1274{
1418 struct wb35_reg *reg = &pHwData->reg; 1275 struct wb35_reg *reg = &pHwData->reg;
1419 u32 pltmp[12]; 1276 u32 pltmp[12];
1420 1277
1421 pltmp[0] = 0x16A8337A; // 0x16a5215f; // 0x1000 AGC_Ctrl1 1278 pltmp[0] = 0x16A8337A; /* 0x1000 AGC_Ctrl1 */
1422 pltmp[1] = 0x9AFF9AA6; // 0x9aff9ca6; // 0x1004 AGC_Ctrl2 1279 pltmp[1] = 0x9AFF9AA6; /* 0x1004 AGC_Ctrl2 */
1423 pltmp[2] = 0x55D00A04; // 0x55d00a04; // 0x1008 AGC_Ctrl3 1280 pltmp[2] = 0x55D00A04; /* 0x1008 AGC_Ctrl3 */
1424 pltmp[3] = 0xFFF72031; // 0xFfFf2138; // 0x100c AGC_Ctrl4 1281 pltmp[3] = 0xFFF72031; /* 0x100c AGC_Ctrl4 */
1425 reg->BB0C = 0xFFF72031; 1282 reg->BB0C = 0xFFF72031;
1426 pltmp[4] = 0x0FacDCC5; // 0x1010 AGC_Ctrl5 // 20050927 0x0FacDCB7 1283 pltmp[4] = 0x0FacDCC5; /* 0x1010 AGC_Ctrl5 */
1427 pltmp[5] = 0x00CAA333; // 0x00eaa333; // 0x1014 AGC_Ctrl6 1284 pltmp[5] = 0x00CAA333; /* 0x1014 AGC_Ctrl6 */
1428 pltmp[6] = 0xF2211111; // 0x11111111; // 0x1018 AGC_Ctrl7 1285 pltmp[6] = 0xF2211111; /* 0x1018 AGC_Ctrl7 */
1429 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8 1286 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1430 pltmp[8] = 0x06443440; // 0x1020 AGC_Ctrl9 1287 pltmp[8] = 0x06443440; /* 0x1020 AGC_Ctrl9 */
1431 pltmp[9] = 0xA8002A79; // 0xa9002A79; // 0x1024 AGC_Ctrl10 1288 pltmp[9] = 0xA8002A79; /* 0x1024 AGC_Ctrl10 */
1432 pltmp[10] = 0x40000528; // 20050927 0x40000228 1289 pltmp[10] = 0x40000528;
1433 pltmp[11] = 0x232D7F30; // 0x23457f30;// 0x102c A_ACQ_Ctrl 1290 pltmp[11] = 0x232D7F30; /* 0x102c A_ACQ_Ctrl */
1434 reg->BB2C = 0x232D7F30; 1291 reg->BB2C = 0x232D7F30;
1435 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT ); 1292 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1436 1293
1437 pltmp[0] = 0x00002c54; // 0x1030 B_ACQ_Ctrl 1294 pltmp[0] = 0x00002c54; /* 0x1030 B_ACQ_Ctrl */
1438 reg->BB30 = 0x00002c54; 1295 reg->BB30 = 0x00002c54;
1439 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl 1296 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1440 pltmp[2] = 0x5B2C8769; // 0x1038 B_TXRX_Ctrl 1297 pltmp[2] = 0x5B2C8769; /* 0x1038 B_TXRX_Ctrl */
1441 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter 1298 pltmp[3] = 0x00000000; /* 0x103c 11a TX LS filter */
1442 reg->BB3C = 0x00000000; 1299 reg->BB3C = 0x00000000;
1443 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter 1300 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1444 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter 1301 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1445 pltmp[6] = 0x00332C1B; // 0x00453B24; // 0x1048 11b TX RC filter 1302 pltmp[6] = 0x00332C1B; /* 0x1048 11b TX RC filter */
1446 pltmp[7] = 0x0A00FEFF; // 0x0E00FEFF; // 0x104c 11b TX RC filter 1303 pltmp[7] = 0x0A00FEFF; /* 0x104c 11b TX RC filter */
1447 pltmp[8] = 0x2B106208; // 0x1050 MODE_Ctrl 1304 pltmp[8] = 0x2B106208; /* 0x1050 MODE_Ctrl */
1448 reg->BB50 = 0x2B106208; 1305 reg->BB50 = 0x2B106208;
1449 pltmp[9] = 0; // 0x1054 1306 pltmp[9] = 0; /* 0x1054 */
1450 reg->BB54 = 0x00000000; 1307 reg->BB54 = 0x00000000;
1451 pltmp[10] = 0x52524242; // 0x64645252; // 0x1058 IQ_Alpha 1308 pltmp[10] = 0x52524242; /* 0x1058 IQ_Alpha */
1452 reg->BB58 = 0x52524242; 1309 reg->BB58 = 0x52524242;
1453 pltmp[11] = 0xAA0AC000; // 0x105c DC_Cancel 1310 pltmp[11] = 0xAA0AC000; /* 0x105c DC_Cancel */
1454 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT ); 1311 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1455
1456} 1312}
1457 1313
1458void BBProcessor_AL7230_5000( struct hw_data * pHwData) 1314void BBProcessor_AL7230_5000(struct hw_data *pHwData)
1459{ 1315{
1460 struct wb35_reg *reg = &pHwData->reg; 1316 struct wb35_reg *reg = &pHwData->reg;
1461 u32 pltmp[12]; 1317 u32 pltmp[12];
1462 1318
1463 pltmp[0] = 0x16AA6678; // 0x1000 AGC_Ctrl1 1319 pltmp[0] = 0x16AA6678; /* 0x1000 AGC_Ctrl1 */
1464 pltmp[1] = 0x9AFFA0B2; // 0x1004 AGC_Ctrl2 1320 pltmp[1] = 0x9AFFA0B2; /* 0x1004 AGC_Ctrl2 */
1465 pltmp[2] = 0x55D00A04; // 0x1008 AGC_Ctrl3 1321 pltmp[2] = 0x55D00A04; /* 0x1008 AGC_Ctrl3 */
1466 pltmp[3] = 0xEFFF233E; // 0x100c AGC_Ctrl4 1322 pltmp[3] = 0xEFFF233E; /* 0x100c AGC_Ctrl4 */
1467 reg->BB0C = 0xEFFF233E; 1323 reg->BB0C = 0xEFFF233E;
1468 pltmp[4] = 0x0FacDCC5; // 0x1010 AGC_Ctrl5 // 20050927 0x0FacDCB7 1324 pltmp[4] = 0x0FacDCC5; /* 0x1010 AGC_Ctrl5 */
1469 pltmp[5] = 0x00CAA333; // 0x1014 AGC_Ctrl6 1325 pltmp[5] = 0x00CAA333; /* 0x1014 AGC_Ctrl6 */
1470 pltmp[6] = 0xF2432111; // 0x1018 AGC_Ctrl7 1326 pltmp[6] = 0xF2432111; /* 0x1018 AGC_Ctrl7 */
1471 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8 1327 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1472 pltmp[8] = 0x05C43440; // 0x1020 AGC_Ctrl9 1328 pltmp[8] = 0x05C43440; /* 0x1020 AGC_Ctrl9 */
1473 pltmp[9] = 0x00002A79; // 0x1024 AGC_Ctrl10 1329 pltmp[9] = 0x00002A79; /* 0x1024 AGC_Ctrl10 */
1474 pltmp[10] = 0x40000528; // 20050927 0x40000228 1330 pltmp[10] = 0x40000528;
1475 pltmp[11] = 0x232FDF30;// 0x102c A_ACQ_Ctrl 1331 pltmp[11] = 0x232FDF30;/* 0x102c A_ACQ_Ctrl */
1476 reg->BB2C = 0x232FDF30; 1332 reg->BB2C = 0x232FDF30;
1477 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT ); 1333 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1478 1334
1479 pltmp[0] = 0x80002C7C; // 0x1030 B_ACQ_Ctrl 1335 pltmp[0] = 0x80002C7C; /* 0x1030 B_ACQ_Ctrl */
1480 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl 1336 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1481 pltmp[2] = 0x5B2C8769; // 0x1038 B_TXRX_Ctrl 1337 pltmp[2] = 0x5B2C8769; /* 0x1038 B_TXRX_Ctrl */
1482 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter 1338 pltmp[3] = 0x00000000; /* 0x103c 11a TX LS filter */
1483 reg->BB3C = 0x00000000; 1339 reg->BB3C = 0x00000000;
1484 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter 1340 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1485 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter 1341 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1486 pltmp[6] = 0x00332C1B; // 0x1048 11b TX RC filter 1342 pltmp[6] = 0x00332C1B; /* 0x1048 11b TX RC filter */
1487 pltmp[7] = 0x0A00FEFF; // 0x104c 11b TX RC filter 1343 pltmp[7] = 0x0A00FEFF; /* 0x104c 11b TX RC filter */
1488 pltmp[8] = 0x2B107208; // 0x1050 MODE_Ctrl 1344 pltmp[8] = 0x2B107208; /* 0x1050 MODE_Ctrl */
1489 reg->BB50 = 0x2B107208; 1345 reg->BB50 = 0x2B107208;
1490 pltmp[9] = 0; // 0x1054 1346 pltmp[9] = 0; /* 0x1054 */
1491 reg->BB54 = 0x00000000; 1347 reg->BB54 = 0x00000000;
1492 pltmp[10] = 0x52524242; // 0x1058 IQ_Alpha 1348 pltmp[10] = 0x52524242; /* 0x1058 IQ_Alpha */
1493 reg->BB58 = 0x52524242; 1349 reg->BB58 = 0x52524242;
1494 pltmp[11] = 0xAA0AC000; // 0x105c DC_Cancel 1350 pltmp[11] = 0xAA0AC000; /* 0x105c DC_Cancel */
1495 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT ); 1351 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1496
1497} 1352}
1498 1353
1499//============================================================================================================= 1354/*
1500// BBProcessorPowerupInit -- 1355 * ===========================================================================
1501// 1356 * BBProcessorPowerupInit --
1502// Description: 1357 *
1503// Initialize the Baseband processor. 1358 * Description:
1504// 1359 * Initialize the Baseband processor.
1505// Arguments: 1360 *
1506// pHwData - Handle of the USB Device. 1361 * Arguments:
1507// 1362 * pHwData - Handle of the USB Device.
1508// Return values: 1363 *
1509// None. 1364 * Return values:
1510//============================================================================================================= 1365 * None.
1511void 1366 *============================================================================
1512BBProcessor_initial( struct hw_data * pHwData ) 1367 */
1368void BBProcessor_initial(struct hw_data *pHwData)
1513{ 1369{
1514 struct wb35_reg *reg = &pHwData->reg; 1370 struct wb35_reg *reg = &pHwData->reg;
1515 u32 i, pltmp[12]; 1371 u32 i, pltmp[12];
1516 1372
1517 switch( pHwData->phy_type ) 1373 switch (pHwData->phy_type) {
1518 { 1374 case RF_MAXIM_V1: /* Initializng the Winbond 2nd BB(with Phy board (v1) + Maxim 331) */
1519 case RF_MAXIM_V1: // Initializng the Winbond 2nd BB(with Phy board (v1) + Maxim 331) 1375 pltmp[0] = 0x16F47E77; /* 0x1000 AGC_Ctrl1 */
1520 1376 pltmp[1] = 0x9AFFAEA4; /* 0x1004 AGC_Ctrl2 */
1521 pltmp[0] = 0x16F47E77; // 0x1000 AGC_Ctrl1 1377 pltmp[2] = 0x55D00A04; /* 0x1008 AGC_Ctrl3 */
1522 pltmp[1] = 0x9AFFAEA4; // 0x1004 AGC_Ctrl2 1378 pltmp[3] = 0xEFFF1A34; /* 0x100c AGC_Ctrl4 */
1523 pltmp[2] = 0x55D00A04; // 0x1008 AGC_Ctrl3 1379 reg->BB0C = 0xEFFF1A34;
1524 pltmp[3] = 0xEFFF1A34; // 0x100c AGC_Ctrl4 1380 pltmp[4] = 0x0FABE0B7; /* 0x1010 AGC_Ctrl5 */
1525 reg->BB0C = 0xEFFF1A34; 1381 pltmp[5] = 0x00CAA332; /* 0x1014 AGC_Ctrl6 */
1526 pltmp[4] = 0x0FABE0B7; // 0x1010 AGC_Ctrl5 1382 pltmp[6] = 0xF6632111; /* 0x1018 AGC_Ctrl7 */
1527 pltmp[5] = 0x00CAA332; // 0x1014 AGC_Ctrl6 1383 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1528 pltmp[6] = 0xF6632111; // 0x1018 AGC_Ctrl7 1384 pltmp[8] = 0x04CC3640; /* 0x1020 AGC_Ctrl9 */
1529 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8 1385 pltmp[9] = 0x00002A79; /* 0x1024 AGC_Ctrl10 */
1530 pltmp[8] = 0x04CC3640; // 0x1020 AGC_Ctrl9 1386 pltmp[10] = (pHwData->phy_type == 3) ? 0x40000a28 : 0x40000228; /* 0x1028 MAXIM_331(b31=0) + WBRF_V1(b11=1) : MAXIM_331(b31=0) + WBRF_V2(b11=0) */
1531 pltmp[9] = 0x00002A79; // 0x1024 AGC_Ctrl10 1387 pltmp[11] = 0x232FDF30; /* 0x102c A_ACQ_Ctrl */
1532 pltmp[10] = (pHwData->phy_type==3) ? 0x40000a28 : 0x40000228; // 0x1028 MAXIM_331(b31=0) + WBRF_V1(b11=1) : MAXIM_331(b31=0) + WBRF_V2(b11=0) 1388 reg->BB2C = 0x232FDF30; /* Modify for 33's 1.0.95.xxx version, antenna 1 */
1533 pltmp[11] = 0x232FDF30; // 0x102c A_ACQ_Ctrl 1389 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1534 reg->BB2C = 0x232FDF30; //Modify for 33's 1.0.95.xxx version, antenna 1 1390
1535 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT ); 1391 pltmp[0] = 0x00002C54; /* 0x1030 B_ACQ_Ctrl */
1536 1392 reg->BB30 = 0x00002C54;
1537 pltmp[0] = 0x00002C54; // 0x1030 B_ACQ_Ctrl 1393 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1538 reg->BB30 = 0x00002C54; 1394 pltmp[2] = 0x5B6C8769; /* 0x1038 B_TXRX_Ctrl */
1539 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl 1395 pltmp[3] = 0x00000000; /* 0x103c 11a TX LS filter */
1540 pltmp[2] = 0x5B6C8769; // 0x1038 B_TXRX_Ctrl 1396 reg->BB3C = 0x00000000;
1541 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter 1397 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1542 reg->BB3C = 0x00000000; 1398 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1543 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter 1399 pltmp[6] = 0x00453B24; /* 0x1048 11b TX RC filter */
1544 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter 1400 pltmp[7] = 0x0E00FEFF; /* 0x104c 11b TX RC filter */
1545 pltmp[6] = 0x00453B24; // 0x1048 11b TX RC filter 1401 pltmp[8] = 0x27106208; /* 0x1050 MODE_Ctrl */
1546 pltmp[7] = 0x0E00FEFF; // 0x104c 11b TX RC filter 1402 reg->BB50 = 0x27106208;
1547 pltmp[8] = 0x27106208; // 0x1050 MODE_Ctrl 1403 pltmp[9] = 0; /* 0x1054 */
1548 reg->BB50 = 0x27106208; 1404 reg->BB54 = 0x00000000;
1549 pltmp[9] = 0; // 0x1054 1405 pltmp[10] = 0x64646464; /* 0x1058 IQ_Alpha */
1550 reg->BB54 = 0x00000000; 1406 reg->BB58 = 0x64646464;
1551 pltmp[10] = 0x64646464; // 0x1058 IQ_Alpha 1407 pltmp[11] = 0xAA0AC000; /* 0x105c DC_Cancel */
1552 reg->BB58 = 0x64646464; 1408 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1553 pltmp[11] = 0xAA0AC000; // 0x105c DC_Cancel 1409
1554 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT ); 1410 Wb35Reg_Write(pHwData, 0x1070, 0x00000045);
1555 1411 break;
1556 Wb35Reg_Write( pHwData, 0x1070, 0x00000045 );
1557 break;
1558
1559 //------------------------------------------------------------------
1560 //[20040722 WK]
1561 //Only for baseband version 2
1562// case RF_MAXIM_317:
1563 case RF_MAXIM_2825:
1564 case RF_MAXIM_2827:
1565 case RF_MAXIM_2828:
1566
1567 pltmp[0] = 0x16b47e77; // 0x1000 AGC_Ctrl1
1568 pltmp[1] = 0x9affaea4; // 0x1004 AGC_Ctrl2
1569 pltmp[2] = 0x55d00a04; // 0x1008 AGC_Ctrl3
1570 pltmp[3] = 0xefff1a34; // 0x100c AGC_Ctrl4
1571 reg->BB0C = 0xefff1a34;
1572 pltmp[4] = 0x0fabe0b7; // 0x1010 AGC_Ctrl5
1573 pltmp[5] = 0x00caa332; // 0x1014 AGC_Ctrl6
1574 pltmp[6] = 0xf6632111; // 0x1018 AGC_Ctrl7
1575 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8
1576 pltmp[8] = 0x04CC3640; // 0x1020 AGC_Ctrl9
1577 pltmp[9] = 0x00002A79; // 0x1024 AGC_Ctrl10
1578 pltmp[10] = 0x40000528; // 0x40000128; Modify for 33's 1.0.95
1579 pltmp[11] = 0x232fdf30; // 0x102c A_ACQ_Ctrl
1580 reg->BB2C = 0x232fdf30; //Modify for 33's 1.0.95.xxx version, antenna 1
1581 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT );
1582
1583 pltmp[0] = 0x00002C54; // 0x1030 B_ACQ_Ctrl
1584 reg->BB30 = 0x00002C54;
1585 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl
1586 pltmp[2] = 0x5B6C8769; // 0x1038 B_TXRX_Ctrl
1587 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter
1588 reg->BB3C = 0x00000000;
1589 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter
1590 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter
1591 pltmp[6] = 0x00453B24; // 0x1048 11b TX RC filter
1592 pltmp[7] = 0x0D00FDFF; // 0x104c 11b TX RC filter
1593 pltmp[8] = 0x27106208; // 0x1050 MODE_Ctrl
1594 reg->BB50 = 0x27106208;
1595 pltmp[9] = 0; // 0x1054
1596 reg->BB54 = 0x00000000;
1597 pltmp[10] = 0x64646464; // 0x1058 IQ_Alpha
1598 reg->BB58 = 0x64646464;
1599 pltmp[11] = 0xAA28C000; // 0x105c DC_Cancel
1600 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT );
1601
1602 Wb35Reg_Write( pHwData, 0x1070, 0x00000045 );
1603 break;
1604
1605 case RF_MAXIM_2829:
1606
1607 pltmp[0] = 0x16b47e77; // 0x1000 AGC_Ctrl1
1608 pltmp[1] = 0x9affaea4; // 0x1004 AGC_Ctrl2
1609 pltmp[2] = 0x55d00a04; // 0x1008 AGC_Ctrl3
1610 pltmp[3] = 0xf4ff1632; // 0xefff1a34; // 0x100c AGC_Ctrl4 Modify for 33's 1.0.95
1611 reg->BB0C = 0xf4ff1632; // 0xefff1a34; Modify for 33's 1.0.95
1612 pltmp[4] = 0x0fabe0b7; // 0x1010 AGC_Ctrl5
1613 pltmp[5] = 0x00caa332; // 0x1014 AGC_Ctrl6
1614 pltmp[6] = 0xf8632112; // 0xf6632111; // 0x1018 AGC_Ctrl7 Modify for 33's 1.0.95
1615 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8
1616 pltmp[8] = 0x04CC3640; // 0x1020 AGC_Ctrl9
1617 pltmp[9] = 0x00002A79; // 0x1024 AGC_Ctrl10
1618 pltmp[10] = 0x40000528; // 0x40000128; modify for 33's 1.0.95
1619 pltmp[11] = 0x232fdf30; // 0x102c A_ACQ_Ctrl
1620 reg->BB2C = 0x232fdf30; //Modify for 33's 1.0.95.xxx version, antenna 1
1621 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT );
1622
1623 pltmp[0] = 0x00002C54; // 0x1030 B_ACQ_Ctrl
1624 reg->BB30 = 0x00002C54;
1625 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl
1626 pltmp[2] = 0x5b2c8769; // 0x5B6C8769; // 0x1038 B_TXRX_Ctrl Modify for 33's 1.0.95
1627 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter
1628 reg->BB3C = 0x00000000;
1629 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter
1630 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter
1631 pltmp[6] = 0x002c2617; // 0x00453B24; // 0x1048 11b TX RC filter Modify for 33's 1.0.95
1632 pltmp[7] = 0x0800feff; // 0x0D00FDFF; // 0x104c 11b TX RC filter Modify for 33's 1.0.95
1633 pltmp[8] = 0x27106208; // 0x1050 MODE_Ctrl
1634 reg->BB50 = 0x27106208;
1635 pltmp[9] = 0; // 0x1054
1636 reg->BB54 = 0x00000000;
1637 pltmp[10] = 0x64644a4a; // 0x64646464; // 0x1058 IQ_Alpha Modify for 33's 1.0.95
1638 reg->BB58 = 0x64646464;
1639 pltmp[11] = 0xAA28C000; // 0x105c DC_Cancel
1640 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT );
1641
1642 Wb35Reg_Write( pHwData, 0x1070, 0x00000045 );
1643 break;
1644
1645 case RF_AIROHA_2230:
1646
1647 pltmp[0] = 0X16764A77; // 0x1000 AGC_Ctrl1 //0x16765A77
1648 pltmp[1] = 0x9affafb2; // 0x1004 AGC_Ctrl2
1649 pltmp[2] = 0x55d00a04; // 0x1008 AGC_Ctrl3
1650 pltmp[3] = 0xFFFd203c; // 0xFFFb203a; // 0x100c AGC_Ctrl4 Modify for 33's 1.0.95.xxx version
1651 reg->BB0C = 0xFFFd203c;
1652 pltmp[4] = 0X0FBFDCc5; // 0X0FBFDCA0; // 0x1010 AGC_Ctrl5 //0x0FB2E0B7 Modify for 33's 1.0.95.xxx version
1653 pltmp[5] = 0x00caa332; // 0x00caa333; // 0x1014 AGC_Ctrl6 Modify for 33's 1.0.95.xxx version
1654 pltmp[6] = 0XF6632111; // 0XF1632112; // 0x1018 AGC_Ctrl7 //0xf6632112 Modify for 33's 1.0.95.xxx version
1655 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8
1656 pltmp[8] = 0x04C43640; // 0x1020 AGC_Ctrl9
1657 pltmp[9] = 0x00002A79; // 0x1024 AGC_Ctrl10
1658 pltmp[10] = 0X40000528; //0x40000228
1659 pltmp[11] = 0x232dfF30; // 0x232A9F30; // 0x102c A_ACQ_Ctrl //0x232a9730
1660 reg->BB2C = 0x232dfF30; //Modify for 33's 1.0.95.xxx version, antenna 1
1661 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT );
1662
1663 pltmp[0] = 0x00002C54; // 0x1030 B_ACQ_Ctrl
1664 reg->BB30 = 0x00002C54;
1665 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl
1666 pltmp[2] = 0x5B2C8769; // 0x1038 B_TXRX_Ctrl //0x5B6C8769
1667 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter
1668 reg->BB3C = 0x00000000;
1669 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter
1670 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter
1671 pltmp[6] = BB48_DEFAULT_AL2230_11G; // 0x1048 11b TX RC filter 20060613.2
1672 reg->BB48 = BB48_DEFAULT_AL2230_11G; // 20051221 ch14 20060613.2
1673 pltmp[7] = BB4C_DEFAULT_AL2230_11G; // 0x104c 11b TX RC filter 20060613.2
1674 reg->BB4C = BB4C_DEFAULT_AL2230_11G; // 20060613.1 20060613.2
1675 pltmp[8] = 0x27106200; // 0x1050 MODE_Ctrl
1676 reg->BB50 = 0x27106200;
1677 pltmp[9] = 0; // 0x1054
1678 reg->BB54 = 0x00000000;
1679 pltmp[10] = 0x52524242; // 0x1058 IQ_Alpha
1680 reg->BB58 = 0x52524242;
1681 pltmp[11] = 0xAA0AC000; // 0x105c DC_Cancel
1682 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT );
1683
1684 Wb35Reg_Write( pHwData, 0x1070, 0x00000045 );
1685 break;
1686 1412
1687 case RF_AIROHA_2230S: // 20060420 Add this 1413 case RF_MAXIM_2825:
1688 1414 case RF_MAXIM_2827:
1689 pltmp[0] = 0X16764A77; // 0x1000 AGC_Ctrl1 //0x16765A77 1415 case RF_MAXIM_2828:
1690 pltmp[1] = 0x9affafb2; // 0x1004 AGC_Ctrl2 1416 pltmp[0] = 0x16b47e77; /* 0x1000 AGC_Ctrl1 */
1691 pltmp[2] = 0x55d00a04; // 0x1008 AGC_Ctrl3 1417 pltmp[1] = 0x9affaea4; /* 0x1004 AGC_Ctrl2 */
1692 pltmp[3] = 0xFFFd203c; // 0xFFFb203a; // 0x100c AGC_Ctrl4 Modify for 33's 1.0.95.xxx version 1418 pltmp[2] = 0x55d00a04; /* 0x1008 AGC_Ctrl3 */
1693 reg->BB0C = 0xFFFd203c; 1419 pltmp[3] = 0xefff1a34; /* 0x100c AGC_Ctrl4 */
1694 pltmp[4] = 0X0FBFDCc5; // 0X0FBFDCA0; // 0x1010 AGC_Ctrl5 //0x0FB2E0B7 Modify for 33's 1.0.95.xxx version 1420 reg->BB0C = 0xefff1a34;
1695 pltmp[5] = 0x00caa332; // 0x00caa333; // 0x1014 AGC_Ctrl6 Modify for 33's 1.0.95.xxx version 1421 pltmp[4] = 0x0fabe0b7; /* 0x1010 AGC_Ctrl5 */
1696 pltmp[6] = 0XF6632111; // 0XF1632112; // 0x1018 AGC_Ctrl7 //0xf6632112 Modify for 33's 1.0.95.xxx version 1422 pltmp[5] = 0x00caa332; /* 0x1014 AGC_Ctrl6 */
1697 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8 1423 pltmp[6] = 0xf6632111; /* 0x1018 AGC_Ctrl7 */
1698 pltmp[8] = 0x04C43640; // 0x1020 AGC_Ctrl9 1424 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1699 pltmp[9] = 0x00002A79; // 0x1024 AGC_Ctrl10 1425 pltmp[8] = 0x04CC3640; /* 0x1020 AGC_Ctrl9 */
1700 pltmp[10] = 0X40000528; //0x40000228 1426 pltmp[9] = 0x00002A79; /* 0x1024 AGC_Ctrl10 */
1701 pltmp[11] = 0x232dfF30; // 0x232A9F30; // 0x102c A_ACQ_Ctrl //0x232a9730 1427 pltmp[10] = 0x40000528;
1702 reg->BB2C = 0x232dfF30; //Modify for 33's 1.0.95.xxx version, antenna 1 1428 pltmp[11] = 0x232fdf30; /* 0x102c A_ACQ_Ctrl */
1703 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT ); 1429 reg->BB2C = 0x232fdf30; /* antenna 1 */
1704 1430 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1705 pltmp[0] = 0x00002C54; // 0x1030 B_ACQ_Ctrl 1431
1706 reg->BB30 = 0x00002C54; 1432 pltmp[0] = 0x00002C54; /* 0x1030 B_ACQ_Ctrl */
1707 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl 1433 reg->BB30 = 0x00002C54;
1708 pltmp[2] = 0x5B2C8769; // 0x1038 B_TXRX_Ctrl //0x5B6C8769 1434 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1709 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter 1435 pltmp[2] = 0x5B6C8769; /* 0x1038 B_TXRX_Ctrl */
1710 reg->BB3C = 0x00000000; 1436 pltmp[3] = 0x00000000; /* 0x103c 11a TX LS filter */
1711 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter 1437 reg->BB3C = 0x00000000;
1712 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter 1438 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1713 pltmp[6] = BB48_DEFAULT_AL2230_11G; // 0x1048 11b TX RC filter 20060613.2 1439 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1714 reg->BB48 = BB48_DEFAULT_AL2230_11G; // 20051221 ch14 20060613.2 1440 pltmp[6] = 0x00453B24; /* 0x1048 11b TX RC filter */
1715 pltmp[7] = BB4C_DEFAULT_AL2230_11G; // 0x104c 11b TX RC filter 20060613.2 1441 pltmp[7] = 0x0D00FDFF; /* 0x104c 11b TX RC filter */
1716 reg->BB4C = BB4C_DEFAULT_AL2230_11G; // 20060613.1 1442 pltmp[8] = 0x27106208; /* 0x1050 MODE_Ctrl */
1717 pltmp[8] = 0x27106200; // 0x1050 MODE_Ctrl 1443 reg->BB50 = 0x27106208;
1718 reg->BB50 = 0x27106200; 1444 pltmp[9] = 0; /* 0x1054 */
1719 pltmp[9] = 0; // 0x1054 1445 reg->BB54 = 0x00000000;
1720 reg->BB54 = 0x00000000; 1446 pltmp[10] = 0x64646464; /* 0x1058 IQ_Alpha */
1721 pltmp[10] = 0x52523232; // 20060419 0x52524242; // 0x1058 IQ_Alpha 1447 reg->BB58 = 0x64646464;
1722 reg->BB58 = 0x52523232; // 20060419 0x52524242; 1448 pltmp[11] = 0xAA28C000; /* 0x105c DC_Cancel */
1723 pltmp[11] = 0xAA0AC000; // 0x105c DC_Cancel 1449 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1724 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT ); 1450
1725 1451 Wb35Reg_Write(pHwData, 0x1070, 0x00000045);
1726 Wb35Reg_Write( pHwData, 0x1070, 0x00000045 ); 1452 break;
1727 break;
1728 1453
1729 case RF_AIROHA_7230: 1454 case RF_MAXIM_2829:
1730/* 1455 pltmp[0] = 0x16b47e77; /* 0x1000 AGC_Ctrl1 */
1731 pltmp[0] = 0x16a84a77; // 0x1000 AGC_Ctrl1 1456 pltmp[1] = 0x9affaea4; /* 0x1004 AGC_Ctrl2 */
1732 pltmp[1] = 0x9affafb2; // 0x1004 AGC_Ctrl2 1457 pltmp[2] = 0x55d00a04; /* 0x1008 AGC_Ctrl3 */
1733 pltmp[2] = 0x55d00a04; // 0x1008 AGC_Ctrl3 1458 pltmp[3] = 0xf4ff1632; /* 0x100c AGC_Ctrl4 */
1734 pltmp[3] = 0xFFFb203a; // 0x100c AGC_Ctrl4 1459 reg->BB0C = 0xf4ff1632;
1735 reg->BB0c = 0xFFFb203a; 1460 pltmp[4] = 0x0fabe0b7; /* 0x1010 AGC_Ctrl5 */
1736 pltmp[4] = 0x0FBFDCB7; // 0x1010 AGC_Ctrl5 1461 pltmp[5] = 0x00caa332; /* 0x1014 AGC_Ctrl6 */
1737 pltmp[5] = 0x00caa333; // 0x1014 AGC_Ctrl6 1462 pltmp[6] = 0xf8632112; /* 0x1018 AGC_Ctrl7 */
1738 pltmp[6] = 0xf6632112; // 0x1018 AGC_Ctrl7 1463 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1739 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8 1464 pltmp[8] = 0x04CC3640; /* 0x1020 AGC_Ctrl9 */
1740 pltmp[8] = 0x04C43640; // 0x1020 AGC_Ctrl9 1465 pltmp[9] = 0x00002A79; /* 0x1024 AGC_Ctrl10 */
1741 pltmp[9] = 0x00002A79; // 0x1024 AGC_Ctrl10 1466 pltmp[10] = 0x40000528;
1742 pltmp[10] = 0x40000228; 1467 pltmp[11] = 0x232fdf30; /* 0x102c A_ACQ_Ctrl */
1743 pltmp[11] = 0x232A9F30;// 0x102c A_ACQ_Ctrl 1468 reg->BB2C = 0x232fdf30; /* antenna 1 */
1744 reg->BB2c = 0x232A9F30; 1469 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1745 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT ); 1470
1746 1471 pltmp[0] = 0x00002C54; /* 0x1030 B_ACQ_Ctrl */
1747 pltmp[0] = 0x00002C54; // 0x1030 B_ACQ_Ctrl 1472 reg->BB30 = 0x00002C54;
1748 reg->BB30 = 0x00002C54; 1473 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1749 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl 1474 pltmp[2] = 0x5b2c8769; /* 0x1038 B_TXRX_Ctrl */
1750 pltmp[2] = 0x5B2C8769; // 0x1038 B_TXRX_Ctrl 1475 pltmp[3] = 0x00000000; /* 0x103c 11a TX LS filter */
1751 pltmp[3] = 0x00000000; // 0x103c 11a TX LS filter 1476 reg->BB3C = 0x00000000;
1752 reg->BB3c = 0x00000000; 1477 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1753 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter 1478 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1754 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter 1479 pltmp[6] = 0x002c2617; /* 0x1048 11b TX RC filter */
1755 pltmp[6] = 0x00453B24; // 0x1048 11b TX RC filter 1480 pltmp[7] = 0x0800feff; /* 0x104c 11b TX RC filter */
1756 pltmp[7] = 0x0E00FEFF; // 0x104c 11b TX RC filter 1481 pltmp[8] = 0x27106208; /* 0x1050 MODE_Ctrl */
1757 pltmp[8] = 0x27106200; // 0x1050 MODE_Ctrl 1482 reg->BB50 = 0x27106208;
1758 reg->BB50 = 0x27106200; 1483 pltmp[9] = 0; /* 0x1054 */
1759 pltmp[9] = 0; // 0x1054 1484 reg->BB54 = 0x00000000;
1760 reg->BB54 = 0x00000000; 1485 pltmp[10] = 0x64644a4a; /* 0x1058 IQ_Alpha */
1761 pltmp[10] = 0x64645252; // 0x1058 IQ_Alpha 1486 reg->BB58 = 0x64646464;
1762 reg->BB58 = 0x64645252; 1487 pltmp[11] = 0xAA28C000; /* 0x105c DC_Cancel */
1763 pltmp[11] = 0xAA0AC000; // 0x105c DC_Cancel 1488 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1764 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT ); 1489 Wb35Reg_Write(pHwData, 0x1070, 0x00000045);
1765*/ 1490 break;
1766 BBProcessor_AL7230_2400( pHwData ); 1491 case RF_AIROHA_2230:
1767 1492 pltmp[0] = 0X16764A77; /* 0x1000 AGC_Ctrl1 */
1768 Wb35Reg_Write( pHwData, 0x1070, 0x00000045 ); 1493 pltmp[1] = 0x9affafb2; /* 0x1004 AGC_Ctrl2 */
1769 break; 1494 pltmp[2] = 0x55d00a04; /* 0x1008 AGC_Ctrl3 */
1495 pltmp[3] = 0xFFFd203c; /* 0x100c AGC_Ctrl4 */
1496 reg->BB0C = 0xFFFd203c;
1497 pltmp[4] = 0X0FBFDCc5; /* 0x1010 AGC_Ctrl5 */
1498 pltmp[5] = 0x00caa332; /* 0x1014 AGC_Ctrl6 */
1499 pltmp[6] = 0XF6632111; /* 0x1018 AGC_Ctrl7 */
1500 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1501 pltmp[8] = 0x04C43640; /* 0x1020 AGC_Ctrl9 */
1502 pltmp[9] = 0x00002A79; /* 0x1024 AGC_Ctrl10 */
1503 pltmp[10] = 0X40000528;
1504 pltmp[11] = 0x232dfF30; /* 0x102c A_ACQ_Ctrl */
1505 reg->BB2C = 0x232dfF30; /* antenna 1 */
1506 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1507
1508 pltmp[0] = 0x00002C54; /* 0x1030 B_ACQ_Ctrl */
1509 reg->BB30 = 0x00002C54;
1510 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1511 pltmp[2] = 0x5B2C8769; /* 0x1038 B_TXRX_Ctrl */
1512 pltmp[3] = 0x00000000; /* 0x103c 11a TX LS filter */
1513 reg->BB3C = 0x00000000;
1514 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1515 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1516 pltmp[6] = BB48_DEFAULT_AL2230_11G; /* 0x1048 11b TX RC filter */
1517 reg->BB48 = BB48_DEFAULT_AL2230_11G; /* 20051221 ch14 */
1518 pltmp[7] = BB4C_DEFAULT_AL2230_11G; /* 0x104c 11b TX RC filter */
1519 reg->BB4C = BB4C_DEFAULT_AL2230_11G;
1520 pltmp[8] = 0x27106200; /* 0x1050 MODE_Ctrl */
1521 reg->BB50 = 0x27106200;
1522 pltmp[9] = 0; /* 0x1054 */
1523 reg->BB54 = 0x00000000;
1524 pltmp[10] = 0x52524242; /* 0x1058 IQ_Alpha */
1525 reg->BB58 = 0x52524242;
1526 pltmp[11] = 0xAA0AC000; /* 0x105c DC_Cancel */
1527 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1528
1529 Wb35Reg_Write(pHwData, 0x1070, 0x00000045);
1530 break;
1531 case RF_AIROHA_2230S:
1532 pltmp[0] = 0X16764A77; /* 0x1000 AGC_Ctrl1 */
1533 pltmp[1] = 0x9affafb2; /* 0x1004 AGC_Ctrl2 */
1534 pltmp[2] = 0x55d00a04; /* 0x1008 AGC_Ctrl3 */
1535 pltmp[3] = 0xFFFd203c; /* 0x100c AGC_Ctrl4 */
1536 reg->BB0C = 0xFFFd203c;
1537 pltmp[4] = 0X0FBFDCc5; /* 0x1010 AGC_Ctrl5 */
1538 pltmp[5] = 0x00caa332; /* 0x1014 AGC_Ctrl6 */
1539 pltmp[6] = 0XF6632111; /* 0x1018 AGC_Ctrl7 */
1540 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1541 pltmp[8] = 0x04C43640; /* 0x1020 AGC_Ctrl9 */
1542 pltmp[9] = 0x00002A79; /* 0x1024 AGC_Ctrl10 */
1543 pltmp[10] = 0X40000528;
1544 pltmp[11] = 0x232dfF30; /* 0x102c A_ACQ_Ctrl */
1545 reg->BB2C = 0x232dfF30; /* antenna 1 */
1546 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1547
1548 pltmp[0] = 0x00002C54; /* 0x1030 B_ACQ_Ctrl */
1549 reg->BB30 = 0x00002C54;
1550 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1551 pltmp[2] = 0x5B2C8769; /* 0x1038 B_TXRX_Ctrl */
1552 pltmp[3] = 0x00000000; /* 0x103c 11a TX LS filter */
1553 reg->BB3C = 0x00000000;
1554 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1555 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1556 pltmp[6] = BB48_DEFAULT_AL2230_11G; /* 0x1048 11b TX RC filter */
1557 reg->BB48 = BB48_DEFAULT_AL2230_11G; /* ch14 */
1558 pltmp[7] = BB4C_DEFAULT_AL2230_11G; /* 0x104c 11b TX RC filter */
1559 reg->BB4C = BB4C_DEFAULT_AL2230_11G;
1560 pltmp[8] = 0x27106200; /* 0x1050 MODE_Ctrl */
1561 reg->BB50 = 0x27106200;
1562 pltmp[9] = 0; /* 0x1054 */
1563 reg->BB54 = 0x00000000;
1564 pltmp[10] = 0x52523232; /* 0x1058 IQ_Alpha */
1565 reg->BB58 = 0x52523232;
1566 pltmp[11] = 0xAA0AC000; /* 0x105c DC_Cancel */
1567 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1568
1569 Wb35Reg_Write(pHwData, 0x1070, 0x00000045);
1570 break;
1571 case RF_AIROHA_7230:
1572 BBProcessor_AL7230_2400(pHwData);
1770 1573
1771 case RF_WB_242: 1574 Wb35Reg_Write(pHwData, 0x1070, 0x00000045);
1772 case RF_WB_242_1: // 20060619.5 Add 1575 break;
1773 1576 case RF_WB_242:
1774 pltmp[0] = 0x16A8525D; // 0x1000 AGC_Ctrl1 1577 case RF_WB_242_1:
1775 pltmp[1] = 0x9AFF9ABA; // 0x1004 AGC_Ctrl2 1578 pltmp[0] = 0x16A8525D; /* 0x1000 AGC_Ctrl1 */
1776 pltmp[2] = 0x55D00A04; // 0x1008 AGC_Ctrl3 1579 pltmp[1] = 0x9AFF9ABA; /* 0x1004 AGC_Ctrl2 */
1777 pltmp[3] = 0xEEE91C32; // 0x100c AGC_Ctrl4 1580 pltmp[2] = 0x55D00A04; /* 0x1008 AGC_Ctrl3 */
1778 reg->BB0C = 0xEEE91C32; 1581 pltmp[3] = 0xEEE91C32; /* 0x100c AGC_Ctrl4 */
1779 pltmp[4] = 0x0FACDCC5; // 0x1010 AGC_Ctrl5 1582 reg->BB0C = 0xEEE91C32;
1780 pltmp[5] = 0x000AA344; // 0x1014 AGC_Ctrl6 1583 pltmp[4] = 0x0FACDCC5; /* 0x1010 AGC_Ctrl5 */
1781 pltmp[6] = 0x22222221; // 0x1018 AGC_Ctrl7 1584 pltmp[5] = 0x000AA344; /* 0x1014 AGC_Ctrl6 */
1782 pltmp[7] = 0x0FA3F0ED; // 0x101c AGC_Ctrl8 1585 pltmp[6] = 0x22222221; /* 0x1018 AGC_Ctrl7 */
1783 pltmp[8] = 0x04CC3440; // 20051018 0x03CB3440; // 0x1020 AGC_Ctrl9 20051014 0x03C33440 1586 pltmp[7] = 0x0FA3F0ED; /* 0x101c AGC_Ctrl8 */
1784 pltmp[9] = 0xA9002A79; // 0x1024 AGC_Ctrl10 1587 pltmp[8] = 0x04CC3440; /* 0x1020 AGC_Ctrl9 */
1785 pltmp[10] = 0x40000528; // 0x1028 1588 pltmp[9] = 0xA9002A79; /* 0x1024 AGC_Ctrl10 */
1786 pltmp[11] = 0x23457F30; // 0x102c A_ACQ_Ctrl 1589 pltmp[10] = 0x40000528; /* 0x1028 */
1787 reg->BB2C = 0x23457F30; 1590 pltmp[11] = 0x23457F30; /* 0x102c A_ACQ_Ctrl */
1788 Wb35Reg_BurstWrite( pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT ); 1591 reg->BB2C = 0x23457F30;
1789 1592 Wb35Reg_BurstWrite(pHwData, 0x1000, pltmp, 12, AUTO_INCREMENT);
1790 pltmp[0] = 0x00002C54; // 0x1030 B_ACQ_Ctrl 1593
1791 reg->BB30 = 0x00002C54; 1594 pltmp[0] = 0x00002C54; /* 0x1030 B_ACQ_Ctrl */
1792 pltmp[1] = 0x00C0D6C5; // 0x1034 A_TXRX_Ctrl 1595 reg->BB30 = 0x00002C54;
1793 pltmp[2] = 0x5B2C8769; // 0x1038 B_TXRX_Ctrl 1596 pltmp[1] = 0x00C0D6C5; /* 0x1034 A_TXRX_Ctrl */
1794 pltmp[3] = pHwData->BB3c_cal; // 0x103c 11a TX LS filter 1597 pltmp[2] = 0x5B2C8769; /* 0x1038 B_TXRX_Ctrl */
1795 reg->BB3C = pHwData->BB3c_cal; 1598 pltmp[3] = pHwData->BB3c_cal; /* 0x103c 11a TX LS filter */
1796 pltmp[4] = 0x00003F29; // 0x1040 11a TX LS filter 1599 reg->BB3C = pHwData->BB3c_cal;
1797 pltmp[5] = 0x0EFEFBFE; // 0x1044 11a TX LS filter 1600 pltmp[4] = 0x00003F29; /* 0x1040 11a TX LS filter */
1798 pltmp[6] = BB48_DEFAULT_WB242_11G; // 0x1048 11b TX RC filter 20060613.2 1601 pltmp[5] = 0x0EFEFBFE; /* 0x1044 11a TX LS filter */
1799 reg->BB48 = BB48_DEFAULT_WB242_11G; // 20060613.1 20060613.2 1602 pltmp[6] = BB48_DEFAULT_WB242_11G; /* 0x1048 11b TX RC filter */
1800 pltmp[7] = BB4C_DEFAULT_WB242_11G; // 0x104c 11b TX RC filter 20060613.2 1603 reg->BB48 = BB48_DEFAULT_WB242_11G;
1801 reg->BB4C = BB4C_DEFAULT_WB242_11G; // 20060613.1 20060613.2 1604 pltmp[7] = BB4C_DEFAULT_WB242_11G; /* 0x104c 11b TX RC filter */
1802 pltmp[8] = 0x27106208; // 0x1050 MODE_Ctrl 1605 reg->BB4C = BB4C_DEFAULT_WB242_11G;
1803 reg->BB50 = 0x27106208; 1606 pltmp[8] = 0x27106208; /* 0x1050 MODE_Ctrl */
1804 pltmp[9] = pHwData->BB54_cal; // 0x1054 1607 reg->BB50 = 0x27106208;
1805 reg->BB54 = pHwData->BB54_cal; 1608 pltmp[9] = pHwData->BB54_cal; /* 0x1054 */
1806 pltmp[10] = 0x52523131; // 0x1058 IQ_Alpha 1609 reg->BB54 = pHwData->BB54_cal;
1807 reg->BB58 = 0x52523131; 1610 pltmp[10] = 0x52523131; /* 0x1058 IQ_Alpha */
1808 pltmp[11] = 0xAA0AC000; // 20060825 0xAA2AC000; // 0x105c DC_Cancel 1611 reg->BB58 = 0x52523131;
1809 Wb35Reg_BurstWrite( pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT ); 1612 pltmp[11] = 0xAA0AC000; /* 0x105c DC_Cancel */
1810 1613 Wb35Reg_BurstWrite(pHwData, 0x1030, pltmp, 12, AUTO_INCREMENT);
1811 Wb35Reg_Write( pHwData, 0x1070, 0x00000045 ); 1614
1812 break; 1615 Wb35Reg_Write(pHwData, 0x1070, 0x00000045);
1813 } 1616 break;
1617 }
1814 1618
1815 // Fill the LNA table 1619 /* Fill the LNA table */
1816 reg->LNAValue[0] = (u8)(reg->BB0C & 0xff); 1620 reg->LNAValue[0] = (u8) (reg->BB0C & 0xff);
1817 reg->LNAValue[1] = 0; 1621 reg->LNAValue[1] = 0;
1818 reg->LNAValue[2] = (u8)((reg->BB0C & 0xff00)>>8); 1622 reg->LNAValue[2] = (u8) ((reg->BB0C & 0xff00) >> 8);
1819 reg->LNAValue[3] = 0; 1623 reg->LNAValue[3] = 0;
1820 1624
1821 // Fill SQ3 table 1625 /* Fill SQ3 table */
1822 for( i=0; i<MAX_SQ3_FILTER_SIZE; i++ ) 1626 for (i = 0; i < MAX_SQ3_FILTER_SIZE; i++)
1823 reg->SQ3_filter[i] = 0x2f; // half of Bit 0 ~ 6 1627 reg->SQ3_filter[i] = 0x2f; /* half of Bit 0 ~ 6 */
1824} 1628}
1825 1629
1826void set_tx_power_per_channel_max2829( struct hw_data * pHwData, struct chan_info Channel) 1630void set_tx_power_per_channel_max2829(struct hw_data *pHwData, struct chan_info Channel)
1827{ 1631{
1828 RFSynthesizer_SetPowerIndex( pHwData, 100 ); // 20060620.1 Modify 1632 RFSynthesizer_SetPowerIndex(pHwData, 100);
1829} 1633}
1830 1634
1831void set_tx_power_per_channel_al2230( struct hw_data * pHwData, struct chan_info Channel ) 1635void set_tx_power_per_channel_al2230(struct hw_data *pHwData, struct chan_info Channel)
1832{ 1636{
1833 u8 index = 100; 1637 u8 index = 100;
1834 1638
1835 if (pHwData->TxVgaFor24[Channel.ChanNo - 1] != 0xff) // 20060620.1 Add 1639 if (pHwData->TxVgaFor24[Channel.ChanNo - 1] != 0xff)
1836 index = pHwData->TxVgaFor24[Channel.ChanNo - 1]; 1640 index = pHwData->TxVgaFor24[Channel.ChanNo - 1];
1837 1641
1838 RFSynthesizer_SetPowerIndex( pHwData, index ); 1642 RFSynthesizer_SetPowerIndex(pHwData, index);
1839} 1643}
1840 1644
1841void set_tx_power_per_channel_al7230( struct hw_data * pHwData, struct chan_info Channel) 1645void set_tx_power_per_channel_al7230(struct hw_data *pHwData, struct chan_info Channel)
1842{ 1646{
1843 u8 i, index = 100; 1647 u8 i, index = 100;
1844 1648
1845 switch ( Channel.band ) 1649 switch (Channel.band) {
1846 { 1650 case BAND_TYPE_DSSS:
1847 case BAND_TYPE_DSSS: 1651 case BAND_TYPE_OFDM_24:
1848 case BAND_TYPE_OFDM_24: 1652 if (pHwData->TxVgaFor24[Channel.ChanNo - 1] != 0xff)
1849 { 1653 index = pHwData->TxVgaFor24[Channel.ChanNo - 1];
1850 if (pHwData->TxVgaFor24[Channel.ChanNo - 1] != 0xff) 1654 break;
1851 index = pHwData->TxVgaFor24[Channel.ChanNo - 1]; 1655 case BAND_TYPE_OFDM_5:
1852 } 1656 for (i = 0; i < 35; i++) {
1853 break; 1657 if (Channel.ChanNo == pHwData->TxVgaFor50[i].ChanNo) {
1854 case BAND_TYPE_OFDM_5: 1658 if (pHwData->TxVgaFor50[i].TxVgaValue != 0xff)
1855 { 1659 index = pHwData->TxVgaFor50[i].TxVgaValue;
1856 for (i =0; i<35; i++) 1660 break;
1857 {
1858 if (Channel.ChanNo == pHwData->TxVgaFor50[i].ChanNo)
1859 {
1860 if (pHwData->TxVgaFor50[i].TxVgaValue != 0xff)
1861 index = pHwData->TxVgaFor50[i].TxVgaValue;
1862 break;
1863 }
1864 }
1865 } 1661 }
1866 break; 1662 }
1663 break;
1867 } 1664 }
1868 RFSynthesizer_SetPowerIndex( pHwData, index ); 1665 RFSynthesizer_SetPowerIndex(pHwData, index);
1869} 1666}
1870 1667
1871void set_tx_power_per_channel_wb242( struct hw_data * pHwData, struct chan_info Channel) 1668void set_tx_power_per_channel_wb242(struct hw_data *pHwData, struct chan_info Channel)
1872{ 1669{
1873 u8 index = 100; 1670 u8 index = 100;
1874 1671
1875 switch ( Channel.band ) 1672 switch (Channel.band) {
1876 { 1673 case BAND_TYPE_DSSS:
1877 case BAND_TYPE_DSSS: 1674 case BAND_TYPE_OFDM_24:
1878 case BAND_TYPE_OFDM_24: 1675 if (pHwData->TxVgaFor24[Channel.ChanNo - 1] != 0xff)
1879 { 1676 index = pHwData->TxVgaFor24[Channel.ChanNo - 1];
1880 if (pHwData->TxVgaFor24[Channel.ChanNo - 1] != 0xff) 1677 break;
1881 index = pHwData->TxVgaFor24[Channel.ChanNo - 1]; 1678 case BAND_TYPE_OFDM_5:
1882 } 1679 break;
1883 break;
1884 case BAND_TYPE_OFDM_5:
1885 break;
1886 } 1680 }
1887 RFSynthesizer_SetPowerIndex( pHwData, index ); 1681 RFSynthesizer_SetPowerIndex(pHwData, index);
1888} 1682}
1889 1683
1890//============================================================================================================= 1684/*
1891// RFSynthesizer_SwitchingChannel -- 1685 * ==========================================================================
1892// 1686 * RFSynthesizer_SwitchingChannel --
1893// Description: 1687 *
1894// Swithch the RF channel. 1688 * Description:
1895// 1689 * Swithch the RF channel.
1896// Arguments: 1690 *
1897// pHwData - Handle of the USB Device. 1691 * Arguments:
1898// Channel - The channel no. 1692 * pHwData - Handle of the USB Device.
1899// 1693 * Channel - The channel no.
1900// Return values: 1694 *
1901// None. 1695 * Return values:
1902//============================================================================================================= 1696 * None.
1903void 1697 * ===========================================================================
1904RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, struct chan_info Channel ) 1698 */
1699void RFSynthesizer_SwitchingChannel(struct hw_data *pHwData, struct chan_info Channel)
1905{ 1700{
1906 struct wb35_reg *reg = &pHwData->reg; 1701 struct wb35_reg *reg = &pHwData->reg;
1907 u32 pltmp[16]; // The 16 is the maximum capability of hardware 1702 u32 pltmp[16]; /* The 16 is the maximum capability of hardware */
1908 u32 count, ltmp; 1703 u32 count, ltmp;
1909 u8 i, j, number; 1704 u8 i, j, number;
1910 u8 ChnlTmp; 1705 u8 ChnlTmp;
1911 1706
1912 switch( pHwData->phy_type ) 1707 switch (pHwData->phy_type) {
1913 { 1708 case RF_MAXIM_2825:
1914 case RF_MAXIM_2825: 1709 case RF_MAXIM_V1: /* 11g Winbond 2nd BB(with Phy board (v1) + Maxim 331) */
1915 case RF_MAXIM_V1: // 11g Winbond 2nd BB(with Phy board (v1) + Maxim 331)
1916
1917 if( Channel.band <= BAND_TYPE_OFDM_24 ) // channel 1 ~ 13
1918 {
1919 for( i=0; i<3; i++ )
1920 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2825_channel_data_24[Channel.ChanNo-1][i], 18);
1921 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT );
1922 }
1923 RFSynthesizer_SetPowerIndex( pHwData, 100 );
1924 break;
1925
1926 case RF_MAXIM_2827:
1927
1928 if( Channel.band <= BAND_TYPE_OFDM_24 ) // channel 1 ~ 13
1929 {
1930 for( i=0; i<3; i++ )
1931 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2827_channel_data_24[Channel.ChanNo-1][i], 18);
1932 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT );
1933 }
1934 else if( Channel.band == BAND_TYPE_OFDM_5 ) // channel 36 ~ 64
1935 {
1936 ChnlTmp = (Channel.ChanNo - 36) / 4;
1937 for( i=0; i<3; i++ )
1938 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2827_channel_data_50[ChnlTmp][i], 18);
1939 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT );
1940 }
1941 RFSynthesizer_SetPowerIndex( pHwData, 100 );
1942 break;
1943
1944 case RF_MAXIM_2828:
1945
1946 if( Channel.band <= BAND_TYPE_OFDM_24 ) // channel 1 ~ 13
1947 {
1948 for( i=0; i<3; i++ )
1949 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2828_channel_data_24[Channel.ChanNo-1][i], 18);
1950 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT );
1951 }
1952 else if( Channel.band == BAND_TYPE_OFDM_5 ) // channel 36 ~ 64
1953 {
1954 ChnlTmp = (Channel.ChanNo - 36) / 4;
1955 for ( i = 0; i < 3; i++)
1956 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2828_channel_data_50[ChnlTmp][i], 18);
1957 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT );
1958 }
1959 RFSynthesizer_SetPowerIndex( pHwData, 100 );
1960 break;
1961
1962 case RF_MAXIM_2829:
1963 1710
1964 if( Channel.band <= BAND_TYPE_OFDM_24) 1711 if (Channel.band <= BAND_TYPE_OFDM_24) { /* channel 1 ~ 13 */
1965 { 1712 for (i = 0; i < 3; i++)
1966 for( i=0; i<3; i++ ) 1713 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2825_channel_data_24[Channel.ChanNo-1][i], 18);
1967 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2829_channel_data_24[Channel.ChanNo-1][i], 18); 1714 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
1968 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT ); 1715 }
1969 } 1716 RFSynthesizer_SetPowerIndex(pHwData, 100);
1970 else if( Channel.band == BAND_TYPE_OFDM_5 ) 1717 break;
1971 { 1718 case RF_MAXIM_2827:
1972 count = sizeof(max2829_channel_data_50) / sizeof(max2829_channel_data_50[0]); 1719 if (Channel.band <= BAND_TYPE_OFDM_24) { /* channel 1 ~ 13 */
1973 1720 for (i = 0; i < 3; i++)
1974 for( i=0; i<count; i++ ) 1721 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2827_channel_data_24[Channel.ChanNo-1][i], 18);
1975 { 1722 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
1976 if( max2829_channel_data_50[i][0] == Channel.ChanNo ) 1723 } else if (Channel.band == BAND_TYPE_OFDM_5) { /* channel 36 ~ 64 */
1977 { 1724 ChnlTmp = (Channel.ChanNo - 36) / 4;
1978 for( j=0; j<3; j++ ) 1725 for (i = 0; i < 3; i++)
1979 pltmp[j] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2829_channel_data_50[i][j+1], 18); 1726 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2827_channel_data_50[ChnlTmp][i], 18);
1980 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT ); 1727 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
1981 1728 }
1982 if( (max2829_channel_data_50[i][3] & 0x3FFFF) == 0x2A946 ) 1729 RFSynthesizer_SetPowerIndex(pHwData, 100);
1983 { 1730 break;
1984 ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( (5<<18)|0x2A906, 18); 1731 case RF_MAXIM_2828:
1985 Wb35Reg_Write( pHwData, 0x0864, ltmp ); 1732 if (Channel.band <= BAND_TYPE_OFDM_24) { /* channel 1 ~ 13 */
1986 } 1733 for (i = 0; i < 3; i++)
1987 else // 0x2A9C6 1734 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2828_channel_data_24[Channel.ChanNo-1][i], 18);
1988 { 1735 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
1989 ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( (5<<18)|0x2A986, 18); 1736 } else if (Channel.band == BAND_TYPE_OFDM_5) { /* channel 36 ~ 64 */
1990 Wb35Reg_Write( pHwData, 0x0864, ltmp ); 1737 ChnlTmp = (Channel.ChanNo - 36) / 4;
1991 } 1738 for (i = 0; i < 3; i++)
1739 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2828_channel_data_50[ChnlTmp][i], 18);
1740 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
1741 }
1742 RFSynthesizer_SetPowerIndex(pHwData, 100);
1743 break;
1744 case RF_MAXIM_2829:
1745 if (Channel.band <= BAND_TYPE_OFDM_24) {
1746 for (i = 0; i < 3; i++)
1747 pltmp[i] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2829_channel_data_24[Channel.ChanNo-1][i], 18);
1748 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
1749 } else if (Channel.band == BAND_TYPE_OFDM_5) {
1750 count = sizeof(max2829_channel_data_50) / sizeof(max2829_channel_data_50[0]);
1751
1752 for (i = 0; i < count; i++) {
1753 if (max2829_channel_data_50[i][0] == Channel.ChanNo) {
1754 for (j = 0; j < 3; j++)
1755 pltmp[j] = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2829_channel_data_50[i][j+1], 18);
1756 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
1757
1758 if ((max2829_channel_data_50[i][3] & 0x3FFFF) == 0x2A946) {
1759 ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse((5 << 18) | 0x2A906, 18);
1760 Wb35Reg_Write(pHwData, 0x0864, ltmp);
1761 } else { /* 0x2A9C6 */
1762 ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse((5 << 18) | 0x2A986, 18);
1763 Wb35Reg_Write(pHwData, 0x0864, ltmp);
1992 } 1764 }
1993 } 1765 }
1994 } 1766 }
1995 set_tx_power_per_channel_max2829( pHwData, Channel ); 1767 }
1996 break; 1768 set_tx_power_per_channel_max2829(pHwData, Channel);
1997 1769 break;
1998 case RF_AIROHA_2230: 1770 case RF_AIROHA_2230:
1999 case RF_AIROHA_2230S: // 20060420 Add this 1771 case RF_AIROHA_2230S:
2000 1772 if (Channel.band <= BAND_TYPE_OFDM_24) { /* channel 1 ~ 14 */
2001 if( Channel.band <= BAND_TYPE_OFDM_24 ) // channel 1 ~ 14 1773 for (i = 0; i < 2; i++)
2002 { 1774 pltmp[i] = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse(al2230_channel_data_24[Channel.ChanNo-1][i], 20);
2003 for( i=0; i<2; i++ ) 1775 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 2, NO_INCREMENT);
2004 pltmp[i] = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( al2230_channel_data_24[Channel.ChanNo-1][i], 20); 1776 }
2005 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 2, NO_INCREMENT ); 1777 set_tx_power_per_channel_al2230(pHwData, Channel);
1778 break;
1779 case RF_AIROHA_7230:
1780 /* Channel independent registers */
1781 if (Channel.band != pHwData->band) {
1782 if (Channel.band <= BAND_TYPE_OFDM_24) {
1783 /* Update BB register */
1784 BBProcessor_AL7230_2400(pHwData);
1785
1786 number = sizeof(al7230_rf_data_24) / sizeof(al7230_rf_data_24[0]);
1787 Set_ChanIndep_RfData_al7230_24(pHwData, pltmp, number);
1788 } else {
1789 /* Update BB register */
1790 BBProcessor_AL7230_5000(pHwData);
1791
1792 number = sizeof(al7230_rf_data_50) / sizeof(al7230_rf_data_50[0]);
1793 Set_ChanIndep_RfData_al7230_50(pHwData, pltmp, number);
2006 } 1794 }
2007 set_tx_power_per_channel_al2230( pHwData, Channel );
2008 break;
2009 1795
2010 case RF_AIROHA_7230: 1796 /* Write to register. number must less and equal than 16 */
2011 1797 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, number, NO_INCREMENT);
2012 //Start to fill RF parameters, PLL_ON should be pulled low. 1798 #ifdef _PE_STATE_DUMP_
2013 //Wb35Reg_Write( pHwData, 0x03dc, 0x00000000 ); 1799 printk("Band changed\n");
2014 //printk("* PLL_ON low\n"); 1800 #endif
2015 1801 }
2016 //Channel independent registers
2017 if( Channel.band != pHwData->band)
2018 {
2019 if (Channel.band <= BAND_TYPE_OFDM_24)
2020 {
2021 //Update BB register
2022 BBProcessor_AL7230_2400(pHwData);
2023
2024 number = sizeof(al7230_rf_data_24)/sizeof(al7230_rf_data_24[0]);
2025 Set_ChanIndep_RfData_al7230_24(pHwData, pltmp, number);
2026 }
2027 else
2028 {
2029 //Update BB register
2030 BBProcessor_AL7230_5000(pHwData);
2031
2032 number = sizeof(al7230_rf_data_50)/sizeof(al7230_rf_data_50[0]);
2033 Set_ChanIndep_RfData_al7230_50(pHwData, pltmp, number);
2034 }
2035
2036 // Write to register. number must less and equal than 16
2037 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, number, NO_INCREMENT );
2038 #ifdef _PE_STATE_DUMP_
2039 printk("Band changed\n");
2040 #endif
2041 }
2042 1802
2043 if( Channel.band <= BAND_TYPE_OFDM_24 ) // channel 1 ~ 14 1803 if (Channel.band <= BAND_TYPE_OFDM_24) { /* channel 1 ~ 14 */
2044 { 1804 for (i = 0; i < 2; i++)
2045 for( i=0; i<2; i++ ) 1805 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_channel_data_24[Channel.ChanNo-1][i]&0xffffff);
2046 pltmp[i] = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_channel_data_24[Channel.ChanNo-1][i]&0xffffff); 1806 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 2, NO_INCREMENT);
2047 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 2, NO_INCREMENT ); 1807 } else if (Channel.band == BAND_TYPE_OFDM_5) {
1808 /* Update Reg12 */
1809 if ((Channel.ChanNo > 64) && (Channel.ChanNo <= 165)) {
1810 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x00143c;
1811 Wb35Reg_Write(pHwData, 0x0864, ltmp);
1812 } else { /* reg12 = 0x00147c at Channel 4920 ~ 5320 */
1813 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x00147c;
1814 Wb35Reg_Write(pHwData, 0x0864, ltmp);
2048 } 1815 }
2049 else if( Channel.band == BAND_TYPE_OFDM_5 )
2050 {
2051 //Update Reg12
2052 if ((Channel.ChanNo > 64) && (Channel.ChanNo <= 165))
2053 {
2054 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x00143c;
2055 Wb35Reg_Write( pHwData, 0x0864, ltmp );
2056 }
2057 else //reg12 = 0x00147c at Channel 4920 ~ 5320
2058 {
2059 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x00147c;
2060 Wb35Reg_Write( pHwData, 0x0864, ltmp );
2061 }
2062 1816
2063 count = sizeof(al7230_channel_data_5) / sizeof(al7230_channel_data_5[0]); 1817 count = sizeof(al7230_channel_data_5) / sizeof(al7230_channel_data_5[0]);
2064 1818
2065 for (i=0; i<count; i++) 1819 for (i = 0; i < count; i++) {
2066 { 1820 if (al7230_channel_data_5[i][0] == Channel.ChanNo) {
2067 if (al7230_channel_data_5[i][0] == Channel.ChanNo) 1821 for (j = 0; j < 3; j++)
2068 { 1822 pltmp[j] = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_channel_data_5[i][j+1] & 0xffffff);
2069 for( j=0; j<3; j++ ) 1823 Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, 3, NO_INCREMENT);
2070 pltmp[j] = (1 << 31) | (0 << 30) | (24 << 24) | ( al7230_channel_data_5[i][j+1]&0xffffff);
2071 Wb35Reg_BurstWrite( pHwData, 0x0864, pltmp, 3, NO_INCREMENT );
2072 }
2073 } 1824 }
2074 } 1825 }
2075 set_tx_power_per_channel_al7230(pHwData, Channel); 1826 }
2076 break; 1827 set_tx_power_per_channel_al7230(pHwData, Channel);
2077 1828 break;
2078 case RF_WB_242: 1829 case RF_WB_242:
2079 case RF_WB_242_1: // 20060619.5 Add 1830 case RF_WB_242_1:
2080 1831
2081 if( Channel.band <= BAND_TYPE_OFDM_24 ) // channel 1 ~ 14 1832 if (Channel.band <= BAND_TYPE_OFDM_24) { /* channel 1 ~ 14 */
2082 { 1833 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse(w89rf242_channel_data_24[Channel.ChanNo-1][0], 24);
2083 ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( w89rf242_channel_data_24[Channel.ChanNo-1][0], 24); 1834 Wb35Reg_Write(pHwData, 0x864, ltmp);
2084 Wb35Reg_Write( pHwData, 0x864, ltmp ); 1835 }
2085 } 1836 set_tx_power_per_channel_wb242(pHwData, Channel);
2086 set_tx_power_per_channel_wb242(pHwData, Channel); 1837 break;
2087 break;
2088 } 1838 }
2089 1839
2090 if( Channel.band <= BAND_TYPE_OFDM_24 ) 1840 if (Channel.band <= BAND_TYPE_OFDM_24) {
2091 { 1841 /* BB: select 2.4 GHz, bit[12-11]=00 */
2092 // BB: select 2.4 GHz, bit[12-11]=00 1842 reg->BB50 &= ~(BIT(11) | BIT(12));
2093 reg->BB50 &= ~(BIT(11)|BIT(12)); 1843 Wb35Reg_Write(pHwData, 0x1050, reg->BB50); /* MODE_Ctrl */
2094 Wb35Reg_Write( pHwData, 0x1050, reg->BB50 ); // MODE_Ctrl 1844 /* MAC: select 2.4 GHz, bit[5]=0 */
2095 // MAC: select 2.4 GHz, bit[5]=0
2096 reg->M78_ERPInformation &= ~BIT(5); 1845 reg->M78_ERPInformation &= ~BIT(5);
2097 Wb35Reg_Write( pHwData, 0x0878, reg->M78_ERPInformation ); 1846 Wb35Reg_Write(pHwData, 0x0878, reg->M78_ERPInformation);
2098 // enable 11b Baseband 1847 /* enable 11b Baseband */
2099 reg->BB30 &= ~BIT(31); 1848 reg->BB30 &= ~BIT(31);
2100 Wb35Reg_Write( pHwData, 0x1030, reg->BB30 ); 1849 Wb35Reg_Write(pHwData, 0x1030, reg->BB30);
2101 } 1850 } else if (Channel.band == BAND_TYPE_OFDM_5) {
2102 else if( (Channel.band == BAND_TYPE_OFDM_5) ) 1851 /* BB: select 5 GHz */
2103 { 1852 reg->BB50 &= ~(BIT(11) | BIT(12));
2104 // BB: select 5 GHz 1853 if (Channel.ChanNo <= 64)
2105 reg->BB50 &= ~(BIT(11)|BIT(12)); 1854 reg->BB50 |= BIT(12); /* 10-5.25GHz */
2106 if (Channel.ChanNo <=64 )
2107 reg->BB50 |= BIT(12); // 10-5.25GHz
2108 else if ((Channel.ChanNo >= 100) && (Channel.ChanNo <= 124)) 1855 else if ((Channel.ChanNo >= 100) && (Channel.ChanNo <= 124))
2109 reg->BB50 |= BIT(11); // 01-5.48GHz 1856 reg->BB50 |= BIT(11); /* 01-5.48GHz */
2110 else if ((Channel.ChanNo >=128) && (Channel.ChanNo <= 161)) 1857 else if ((Channel.ChanNo >= 128) && (Channel.ChanNo <= 161))
2111 reg->BB50 |= (BIT(12)|BIT(11)); // 11-5.775GHz 1858 reg->BB50 |= (BIT(12) | BIT(11)); /* 11-5.775GHz */
2112 else //Chan 184 ~ 196 will use bit[12-11] = 10 in version sh-src-1.2.25 1859 else /* Chan 184 ~ 196 will use bit[12-11] = 10 in version sh-src-1.2.25 */
2113 reg->BB50 |= BIT(12); 1860 reg->BB50 |= BIT(12);
2114 Wb35Reg_Write( pHwData, 0x1050, reg->BB50 ); // MODE_Ctrl 1861 Wb35Reg_Write(pHwData, 0x1050, reg->BB50); /* MODE_Ctrl */
2115 1862
2116 //(1) M78 should alway use 2.4G setting when using RF_AIROHA_7230 1863 /* (1) M78 should alway use 2.4G setting when using RF_AIROHA_7230 */
2117 //(2) BB30 has been updated previously. 1864 /* (2) BB30 has been updated previously. */
2118 if (pHwData->phy_type != RF_AIROHA_7230) 1865 if (pHwData->phy_type != RF_AIROHA_7230) {
2119 { 1866 /* MAC: select 5 GHz, bit[5]=1 */
2120 // MAC: select 5 GHz, bit[5]=1
2121 reg->M78_ERPInformation |= BIT(5); 1867 reg->M78_ERPInformation |= BIT(5);
2122 Wb35Reg_Write( pHwData, 0x0878, reg->M78_ERPInformation ); 1868 Wb35Reg_Write(pHwData, 0x0878, reg->M78_ERPInformation);
2123 1869
2124 // disable 11b Baseband 1870 /* disable 11b Baseband */
2125 reg->BB30 |= BIT(31); 1871 reg->BB30 |= BIT(31);
2126 Wb35Reg_Write( pHwData, 0x1030, reg->BB30 ); 1872 Wb35Reg_Write(pHwData, 0x1030, reg->BB30);
2127 } 1873 }
2128 } 1874 }
2129} 1875}
2130 1876
2131//Set the tx power directly from DUT GUI, not from the EEPROM. Return the current setting 1877/*
2132u8 RFSynthesizer_SetPowerIndex( struct hw_data * pHwData, u8 PowerIndex ) 1878 * Set the tx power directly from DUT GUI, not from the EEPROM.
1879 * Return the current setting
1880 */
1881u8 RFSynthesizer_SetPowerIndex(struct hw_data *pHwData, u8 PowerIndex)
2133{ 1882{
2134 u32 Band = pHwData->band; 1883 u32 Band = pHwData->band;
2135 u8 index=0; 1884 u8 index = 0;
2136 1885
2137 if( pHwData->power_index == PowerIndex ) // 20060620.1 Add 1886 if (pHwData->power_index == PowerIndex)
2138 return PowerIndex; 1887 return PowerIndex;
2139 1888
2140 if (RF_MAXIM_2825 == pHwData->phy_type) 1889 if (RF_MAXIM_2825 == pHwData->phy_type) {
2141 { 1890 /* Channel 1 - 13 */
2142 // Channel 1 - 13 1891 index = RFSynthesizer_SetMaxim2825Power(pHwData, PowerIndex);
2143 index = RFSynthesizer_SetMaxim2825Power( pHwData, PowerIndex ); 1892 } else if (RF_MAXIM_2827 == pHwData->phy_type) {
2144 } 1893 if (Band <= BAND_TYPE_OFDM_24) /* Channel 1 - 13 */
2145 else if (RF_MAXIM_2827 == pHwData->phy_type) 1894 index = RFSynthesizer_SetMaxim2827_24Power(pHwData, PowerIndex);
2146 { 1895 else /* Channel 36 - 64 */
2147 if( Band <= BAND_TYPE_OFDM_24 ) // Channel 1 - 13 1896 index = RFSynthesizer_SetMaxim2827_50Power(pHwData, PowerIndex);
2148 index = RFSynthesizer_SetMaxim2827_24Power( pHwData, PowerIndex ); 1897 } else if (RF_MAXIM_2828 == pHwData->phy_type) {
2149 else// if( Band == BAND_TYPE_OFDM_5 ) // Channel 36 - 64 1898 if (Band <= BAND_TYPE_OFDM_24) /* Channel 1 - 13 */
2150 index = RFSynthesizer_SetMaxim2827_50Power( pHwData, PowerIndex ); 1899 index = RFSynthesizer_SetMaxim2828_24Power(pHwData, PowerIndex);
2151 } 1900 else /* Channel 36 - 64 */
2152 else if (RF_MAXIM_2828 == pHwData->phy_type) 1901 index = RFSynthesizer_SetMaxim2828_50Power(pHwData, PowerIndex);
2153 { 1902 } else if (RF_AIROHA_2230 == pHwData->phy_type) {
2154 if( Band <= BAND_TYPE_OFDM_24 ) // Channel 1 - 13 1903 /* Power index: 0 ~ 63 --- Channel 1 - 14 */
2155 index = RFSynthesizer_SetMaxim2828_24Power( pHwData, PowerIndex ); 1904 index = RFSynthesizer_SetAiroha2230Power(pHwData, PowerIndex);
2156 else// if( Band == BAND_TYPE_OFDM_5 ) // Channel 36 - 64 1905 index = (u8) al2230_txvga_data[index][1];
2157 index = RFSynthesizer_SetMaxim2828_50Power( pHwData, PowerIndex ); 1906 } else if (RF_AIROHA_2230S == pHwData->phy_type) {
2158 } 1907 /* Power index: 0 ~ 63 --- Channel 1 - 14 */
2159 else if( RF_AIROHA_2230 == pHwData->phy_type ) 1908 index = RFSynthesizer_SetAiroha2230Power(pHwData, PowerIndex);
2160 { 1909 index = (u8) al2230_txvga_data[index][1];
2161 //Power index: 0 ~ 63 // Channel 1 - 14 1910 } else if (RF_AIROHA_7230 == pHwData->phy_type) {
2162 index = RFSynthesizer_SetAiroha2230Power( pHwData, PowerIndex ); 1911 /* Power index: 0 ~ 63 */
2163 index = (u8)al2230_txvga_data[index][1]; 1912 index = RFSynthesizer_SetAiroha7230Power(pHwData, PowerIndex);
2164 }
2165 else if( RF_AIROHA_2230S == pHwData->phy_type ) // 20060420 Add this
2166 {
2167 //Power index: 0 ~ 63 // Channel 1 - 14
2168 index = RFSynthesizer_SetAiroha2230Power( pHwData, PowerIndex );
2169 index = (u8)al2230_txvga_data[index][1];
2170 }
2171 else if( RF_AIROHA_7230 == pHwData->phy_type )
2172 {
2173 //Power index: 0 ~ 63
2174 index = RFSynthesizer_SetAiroha7230Power( pHwData, PowerIndex );
2175 index = (u8)al7230_txvga_data[index][1]; 1913 index = (u8)al7230_txvga_data[index][1];
2176 } 1914 } else if ((RF_WB_242 == pHwData->phy_type) ||
2177 else if( (RF_WB_242 == pHwData->phy_type) || 1915 (RF_WB_242_1 == pHwData->phy_type)) {
2178 (RF_WB_242_1 == pHwData->phy_type) ) // 20060619.5 Add 1916 /* Power index: 0 ~ 19 for original. New range is 0 ~ 33 */
2179 { 1917 index = RFSynthesizer_SetWinbond242Power(pHwData, PowerIndex);
2180 //Power index: 0 ~ 19 for original. New range is 0 ~ 33
2181 index = RFSynthesizer_SetWinbond242Power( pHwData, PowerIndex );
2182 index = (u8)w89rf242_txvga_data[index][1]; 1918 index = (u8)w89rf242_txvga_data[index][1];
2183 } 1919 }
2184 1920
2185 pHwData->power_index = index; // Backup current 1921 pHwData->power_index = index; /* Backup current */
2186 return index; 1922 return index;
2187} 1923}
2188 1924
2189//-- Sub function 1925/* -- Sub function */
2190u8 RFSynthesizer_SetMaxim2828_24Power( struct hw_data * pHwData, u8 index ) 1926u8 RFSynthesizer_SetMaxim2828_24Power(struct hw_data *pHwData, u8 index)
2191{ 1927{
2192 u32 PowerData; 1928 u32 PowerData;
2193 if( index > 1 ) index = 1; 1929 if (index > 1)
2194 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2828_power_data_24[index], 18); 1930 index = 1;
2195 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 1931 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2828_power_data_24[index], 18);
1932 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2196 return index; 1933 return index;
2197} 1934}
2198//-- 1935
2199u8 RFSynthesizer_SetMaxim2828_50Power( struct hw_data * pHwData, u8 index ) 1936u8 RFSynthesizer_SetMaxim2828_50Power(struct hw_data *pHwData, u8 index)
2200{ 1937{
2201 u32 PowerData; 1938 u32 PowerData;
2202 if( index > 1 ) index = 1; 1939 if (index > 1)
2203 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2828_power_data_50[index], 18); 1940 index = 1;
2204 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 1941 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2828_power_data_50[index], 18);
1942 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2205 return index; 1943 return index;
2206} 1944}
2207//-- 1945
2208u8 RFSynthesizer_SetMaxim2827_24Power( struct hw_data * pHwData, u8 index ) 1946u8 RFSynthesizer_SetMaxim2827_24Power(struct hw_data *pHwData, u8 index)
2209{ 1947{
2210 u32 PowerData; 1948 u32 PowerData;
2211 if( index > 1 ) index = 1; 1949 if (index > 1)
2212 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2827_power_data_24[index], 18); 1950 index = 1;
2213 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 1951 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2827_power_data_24[index], 18);
1952 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2214 return index; 1953 return index;
2215} 1954}
2216//-- 1955
2217u8 RFSynthesizer_SetMaxim2827_50Power( struct hw_data * pHwData, u8 index ) 1956u8 RFSynthesizer_SetMaxim2827_50Power(struct hw_data *pHwData, u8 index)
2218{ 1957{
2219 u32 PowerData; 1958 u32 PowerData;
2220 if( index > 1 ) index = 1; 1959 if (index > 1)
2221 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2827_power_data_50[index], 18); 1960 index = 1;
2222 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 1961 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2827_power_data_50[index], 18);
1962 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2223 return index; 1963 return index;
2224} 1964}
2225//-- 1965
2226u8 RFSynthesizer_SetMaxim2825Power( struct hw_data * pHwData, u8 index ) 1966u8 RFSynthesizer_SetMaxim2825Power(struct hw_data *pHwData, u8 index)
2227{ 1967{
2228 u32 PowerData; 1968 u32 PowerData;
2229 if( index > 1 ) index = 1; 1969 if (index > 1)
2230 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse( max2825_power_data_24[index], 18); 1970 index = 1;
2231 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 1971 PowerData = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(max2825_power_data_24[index], 18);
1972 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2232 return index; 1973 return index;
2233} 1974}
2234//-- 1975
2235u8 RFSynthesizer_SetAiroha2230Power( struct hw_data * pHwData, u8 index ) 1976u8 RFSynthesizer_SetAiroha2230Power(struct hw_data *pHwData, u8 index)
2236{ 1977{
2237 u32 PowerData; 1978 u32 PowerData;
2238 u8 i,count; 1979 u8 i, count;
2239 1980
2240 count = sizeof(al2230_txvga_data) / sizeof(al2230_txvga_data[0]); 1981 count = sizeof(al2230_txvga_data) / sizeof(al2230_txvga_data[0]);
2241 for (i=0; i<count; i++) 1982 for (i = 0; i < count; i++) {
2242 {
2243 if (al2230_txvga_data[i][1] >= index) 1983 if (al2230_txvga_data[i][1] >= index)
2244 break; 1984 break;
2245 } 1985 }
2246 if (i == count) 1986 if (i == count)
2247 i--; 1987 i--;
2248 1988
2249 PowerData = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( al2230_txvga_data[i][0], 20); 1989 PowerData = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse(al2230_txvga_data[i][0], 20);
2250 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 1990 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2251 return i; 1991 return i;
2252} 1992}
2253//-- 1993
2254u8 RFSynthesizer_SetAiroha7230Power( struct hw_data * pHwData, u8 index ) 1994u8 RFSynthesizer_SetAiroha7230Power(struct hw_data *pHwData, u8 index)
2255{ 1995{
2256 u32 PowerData; 1996 u32 PowerData;
2257 u8 i,count; 1997 u8 i, count;
2258 1998
2259 //PowerData = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse( airoha_power_data_24[index], 20);
2260 count = sizeof(al7230_txvga_data) / sizeof(al7230_txvga_data[0]); 1999 count = sizeof(al7230_txvga_data) / sizeof(al7230_txvga_data[0]);
2261 for (i=0; i<count; i++) 2000 for (i = 0; i < count; i++) {
2262 {
2263 if (al7230_txvga_data[i][1] >= index) 2001 if (al7230_txvga_data[i][1] >= index)
2264 break; 2002 break;
2265 } 2003 }
2266 if (i == count) 2004 if (i == count)
2267 i--; 2005 i--;
2268 PowerData = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_txvga_data[i][0]&0xffffff); 2006 PowerData = (1 << 31) | (0 << 30) | (24 << 24) | (al7230_txvga_data[i][0] & 0xffffff);
2269 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 2007 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2270 return i; 2008 return i;
2271} 2009}
2272 2010
2273u8 RFSynthesizer_SetWinbond242Power( struct hw_data * pHwData, u8 index ) 2011u8 RFSynthesizer_SetWinbond242Power(struct hw_data *pHwData, u8 index)
2274{ 2012{
2275 u32 PowerData; 2013 u32 PowerData;
2276 u8 i,count; 2014 u8 i, count;
2277 2015
2278 count = sizeof(w89rf242_txvga_data) / sizeof(w89rf242_txvga_data[0]); 2016 count = sizeof(w89rf242_txvga_data) / sizeof(w89rf242_txvga_data[0]);
2279 for (i=0; i<count; i++) 2017 for (i = 0; i < count; i++) {
2280 {
2281 if (w89rf242_txvga_data[i][1] >= index) 2018 if (w89rf242_txvga_data[i][1] >= index)
2282 break; 2019 break;
2283 } 2020 }
2284 if (i == count) 2021 if (i == count)
2285 i--; 2022 i--;
2286 2023
2287 // Set TxVga into RF 2024 /* Set TxVga into RF */
2288 PowerData = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( w89rf242_txvga_data[i][0], 24); 2025 PowerData = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse(w89rf242_txvga_data[i][0], 24);
2289 Wb35Reg_Write( pHwData, 0x0864, PowerData ); 2026 Wb35Reg_Write(pHwData, 0x0864, PowerData);
2290 2027
2291 // Update BB48 BB4C BB58 for high precision txvga 2028 /* Update BB48 BB4C BB58 for high precision txvga */
2292 Wb35Reg_Write( pHwData, 0x1048, w89rf242_txvga_data[i][2] ); 2029 Wb35Reg_Write(pHwData, 0x1048, w89rf242_txvga_data[i][2]);
2293 Wb35Reg_Write( pHwData, 0x104c, w89rf242_txvga_data[i][3] ); 2030 Wb35Reg_Write(pHwData, 0x104c, w89rf242_txvga_data[i][3]);
2294 Wb35Reg_Write( pHwData, 0x1058, w89rf242_txvga_data[i][4] ); 2031 Wb35Reg_Write(pHwData, 0x1058, w89rf242_txvga_data[i][4]);
2295 2032
2296// Rf vga 0 ~ 3 for temperature compensate. It will affect the scan Bss.
2297// The i value equals to 8 or 7 usually. So It's not necessary to setup this RF register.
2298// if( i <= 3 )
2299// PowerData = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( 0x000024, 24 );
2300// else
2301// PowerData = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse( 0x001824, 24 );
2302// Wb35Reg_Write( pHwData, 0x0864, PowerData );
2303 return i; 2033 return i;
2304} 2034}
2305 2035
2306//=========================================================================================================== 2036/*
2307// Dxx_initial -- 2037 * ===========================================================================
2308// Mxx_initial -- 2038 * Dxx_initial --
2309 // 2039 * Mxx_initial --
2310// Routine Description: 2040 *
2311// Initial the hardware setting and module variable 2041 * Routine Description:
2312 // 2042 * Initial the hardware setting and module variable
2313//=========================================================================================================== 2043 * ===========================================================================
2314void Dxx_initial( struct hw_data * pHwData ) 2044 */
2045void Dxx_initial(struct hw_data *pHwData)
2315{ 2046{
2316 struct wb35_reg *reg = &pHwData->reg; 2047 struct wb35_reg *reg = &pHwData->reg;
2317 2048
2318 // Old IC:Single mode only. 2049 /*
2319 // New IC: operation decide by Software set bit[4]. 1:multiple 0: single 2050 * Old IC: Single mode only.
2320 reg->D00_DmaControl = 0xc0000004; //Txon, Rxon, multiple Rx for new 4k DMA 2051 * New IC: operation decide by Software set bit[4]. 1:multiple 0: single
2321 //Txon, Rxon, single Rx for old 8k ASIC 2052 */
2322 if( !HAL_USB_MODE_BURST( pHwData ) ) 2053 reg->D00_DmaControl = 0xc0000004; /* Txon, Rxon, multiple Rx for new 4k DMA */
2323 reg->D00_DmaControl = 0xc0000000;//Txon, Rxon, single Rx for new 4k DMA 2054 /* Txon, Rxon, single Rx for old 8k ASIC */
2055 if (!HAL_USB_MODE_BURST(pHwData))
2056 reg->D00_DmaControl = 0xc0000000; /* Txon, Rxon, single Rx for new 4k DMA */
2324 2057
2325 Wb35Reg_WriteSync( pHwData, 0x0400, reg->D00_DmaControl ); 2058 Wb35Reg_WriteSync(pHwData, 0x0400, reg->D00_DmaControl);
2326} 2059}
2327 2060
2328void Mxx_initial( struct hw_data * pHwData ) 2061void Mxx_initial(struct hw_data *pHwData)
2329{ 2062{
2330 struct wb35_reg *reg = &pHwData->reg; 2063 struct wb35_reg *reg = &pHwData->reg;
2331 u32 tmp; 2064 u32 tmp;
2332 u32 pltmp[11]; 2065 u32 pltmp[11];
2333 u16 i; 2066 u16 i;
2334 2067
2335 2068
2336 //====================================================== 2069 /*
2337 // Initial Mxx register 2070 * ======================================================
2338 //====================================================== 2071 * Initial Mxx register
2072 * ======================================================
2073 */
2339 2074
2340 // M00 bit set 2075 /* M00 bit set */
2341#ifdef _IBSS_BEACON_SEQ_STICK_ 2076 #ifdef _IBSS_BEACON_SEQ_STICK_
2342 reg->M00_MacControl = 0; // Solve beacon sequence number stop by software 2077 reg->M00_MacControl = 0; /* Solve beacon sequence number stop by software */
2343#else 2078 #else
2344 reg->M00_MacControl = 0x80000000; // Solve beacon sequence number stop by hardware 2079 reg->M00_MacControl = 0x80000000; /* Solve beacon sequence number stop by hardware */
2345#endif 2080 #endif
2346 2081
2347 // M24 disable enter power save, BB RxOn and enable NAV attack 2082 /* M24 disable enter power save, BB RxOn and enable NAV attack */
2348 reg->M24_MacControl = 0x08040042; 2083 reg->M24_MacControl = 0x08040042;
2349 pltmp[0] = reg->M24_MacControl; 2084 pltmp[0] = reg->M24_MacControl;
2350 2085
2351 pltmp[1] = 0; // Skip M28, because no initialize value is required. 2086 pltmp[1] = 0; /* Skip M28, because no initialize value is required. */
2352 2087
2353 // M2C CWmin and CWmax setting 2088 /* M2C CWmin and CWmax setting */
2354 pHwData->cwmin = DEFAULT_CWMIN; 2089 pHwData->cwmin = DEFAULT_CWMIN;
2355 pHwData->cwmax = DEFAULT_CWMAX; 2090 pHwData->cwmax = DEFAULT_CWMAX;
2356 reg->M2C_MacControl = DEFAULT_CWMIN << 10; 2091 reg->M2C_MacControl = DEFAULT_CWMIN << 10;
2357 reg->M2C_MacControl |= DEFAULT_CWMAX; 2092 reg->M2C_MacControl |= DEFAULT_CWMAX;
2358 pltmp[2] = reg->M2C_MacControl; 2093 pltmp[2] = reg->M2C_MacControl;
2359 2094
2360 // M30 BSSID 2095 /* M30 BSSID */
2361 pltmp[3] = *(u32 *)pHwData->bssid; 2096 pltmp[3] = *(u32 *)pHwData->bssid;
2362 2097
2363 // M34 2098 /* M34 */
2364 pHwData->AID = DEFAULT_AID; 2099 pHwData->AID = DEFAULT_AID;
2365 tmp = *(u16 *)(pHwData->bssid+4); 2100 tmp = *(u16 *) (pHwData->bssid + 4);
2366 tmp |= DEFAULT_AID << 16; 2101 tmp |= DEFAULT_AID << 16;
2367 pltmp[4] = tmp; 2102 pltmp[4] = tmp;
2368 2103
2369 // M38 2104 /* M38 */
2370 reg->M38_MacControl = (DEFAULT_RATE_RETRY_LIMIT<<8) | (DEFAULT_LONG_RETRY_LIMIT << 4) | DEFAULT_SHORT_RETRY_LIMIT; 2105 reg->M38_MacControl = (DEFAULT_RATE_RETRY_LIMIT << 8) | (DEFAULT_LONG_RETRY_LIMIT << 4) | DEFAULT_SHORT_RETRY_LIMIT;
2371 pltmp[5] = reg->M38_MacControl; 2106 pltmp[5] = reg->M38_MacControl;
2372 2107
2373 // M3C 2108 /* M3C */
2374 tmp = (DEFAULT_PIFST << 26) | (DEFAULT_EIFST << 16) | (DEFAULT_DIFST << 8) | (DEFAULT_SIFST << 4) | DEFAULT_OSIFST ; 2109 tmp = (DEFAULT_PIFST << 26) | (DEFAULT_EIFST << 16) | (DEFAULT_DIFST << 8) | (DEFAULT_SIFST << 4) | DEFAULT_OSIFST ;
2375 reg->M3C_MacControl = tmp; 2110 reg->M3C_MacControl = tmp;
2376 pltmp[6] = tmp; 2111 pltmp[6] = tmp;
2377 2112
2378 // M40 2113 /* M40 */
2379 pHwData->slot_time_select = DEFAULT_SLOT_TIME; 2114 pHwData->slot_time_select = DEFAULT_SLOT_TIME;
2380 tmp = (DEFAULT_ATIMWD << 16) | DEFAULT_SLOT_TIME; 2115 tmp = (DEFAULT_ATIMWD << 16) | DEFAULT_SLOT_TIME;
2381 reg->M40_MacControl = tmp; 2116 reg->M40_MacControl = tmp;
2382 pltmp[7] = tmp; 2117 pltmp[7] = tmp;
2383 2118
2384 // M44 2119 /* M44 */
2385 tmp = DEFAULT_MAX_TX_MSDU_LIFE_TIME << 10; // *1024 2120 tmp = DEFAULT_MAX_TX_MSDU_LIFE_TIME << 10; /* *1024 */
2386 reg->M44_MacControl = tmp; 2121 reg->M44_MacControl = tmp;
2387 pltmp[8] = tmp; 2122 pltmp[8] = tmp;
2388 2123
2389 // M48 2124 /* M48 */
2390 pHwData->BeaconPeriod = DEFAULT_BEACON_INTERVAL; 2125 pHwData->BeaconPeriod = DEFAULT_BEACON_INTERVAL;
2391 pHwData->ProbeDelay = DEFAULT_PROBE_DELAY_TIME; 2126 pHwData->ProbeDelay = DEFAULT_PROBE_DELAY_TIME;
2392 tmp = (DEFAULT_BEACON_INTERVAL << 16) | DEFAULT_PROBE_DELAY_TIME; 2127 tmp = (DEFAULT_BEACON_INTERVAL << 16) | DEFAULT_PROBE_DELAY_TIME;
2393 reg->M48_MacControl = tmp; 2128 reg->M48_MacControl = tmp;
2394 pltmp[9] = tmp; 2129 pltmp[9] = tmp;
2395 2130
2396 //M4C 2131 /* M4C */
2397 reg->M4C_MacStatus = (DEFAULT_PROTOCOL_VERSION << 30) | (DEFAULT_MAC_POWER_STATE << 28) | (DEFAULT_DTIM_ALERT_TIME << 24); 2132 reg->M4C_MacStatus = (DEFAULT_PROTOCOL_VERSION << 30) | (DEFAULT_MAC_POWER_STATE << 28) | (DEFAULT_DTIM_ALERT_TIME << 24);
2398 pltmp[10] = reg->M4C_MacStatus; 2133 pltmp[10] = reg->M4C_MacStatus;
2399 2134
2400 // Burst write 2135 for (i = 0; i < 11; i++)
2401 //Wb35Reg_BurstWrite( pHwData, 0x0824, pltmp, 11, AUTO_INCREMENT ); 2136 Wb35Reg_WriteSync(pHwData, 0x0824 + i * 4, pltmp[i]);
2402 for( i=0; i<11; i++ )
2403 Wb35Reg_WriteSync( pHwData, 0x0824 + i*4, pltmp[i] );
2404 2137
2405 // M60 2138 /* M60 */
2406 Wb35Reg_WriteSync( pHwData, 0x0860, 0x12481248 ); 2139 Wb35Reg_WriteSync(pHwData, 0x0860, 0x12481248);
2407 reg->M60_MacControl = 0x12481248; 2140 reg->M60_MacControl = 0x12481248;
2408 2141
2409 // M68 2142 /* M68 */
2410 Wb35Reg_WriteSync( pHwData, 0x0868, 0x00050900 ); // 20051018 0x000F0F00 ); // 940930 0x00131300 2143 Wb35Reg_WriteSync(pHwData, 0x0868, 0x00050900);
2411 reg->M68_MacControl = 0x00050900; 2144 reg->M68_MacControl = 0x00050900;
2412 2145
2413 // M98 2146 /* M98 */
2414 Wb35Reg_WriteSync( pHwData, 0x0898, 0xffff8888 ); 2147 Wb35Reg_WriteSync(pHwData, 0x0898, 0xffff8888);
2415 reg->M98_MacControl = 0xffff8888; 2148 reg->M98_MacControl = 0xffff8888;
2416} 2149}
2417 2150
2418 2151
2419void Uxx_power_off_procedure( struct hw_data * pHwData ) 2152void Uxx_power_off_procedure(struct hw_data *pHwData)
2420{ 2153{
2421 // SW, PMU reset and turn off clock 2154 /* SW, PMU reset and turn off clock */
2422 Wb35Reg_WriteSync( pHwData, 0x03b0, 3 ); 2155 Wb35Reg_WriteSync(pHwData, 0x03b0, 3);
2423 Wb35Reg_WriteSync( pHwData, 0x03f0, 0xf9 ); 2156 Wb35Reg_WriteSync(pHwData, 0x03f0, 0xf9);
2424} 2157}
2425 2158
2426//Decide the TxVga of every channel 2159/*Decide the TxVga of every channel */
2427void GetTxVgaFromEEPROM( struct hw_data * pHwData ) 2160void GetTxVgaFromEEPROM(struct hw_data *pHwData)
2428{ 2161{
2429 u32 i, j, ltmp; 2162 u32 i, j, ltmp;
2430 u16 Value[MAX_TXVGA_EEPROM]; 2163 u16 Value[MAX_TXVGA_EEPROM];
2431 u8 *pctmp; 2164 u8 *pctmp;
2432 u8 ctmp=0; 2165 u8 ctmp = 0;
2433 2166
2434 // Get the entire TxVga setting in EEPROM 2167 /* Get the entire TxVga setting in EEPROM */
2435 for( i=0; i<MAX_TXVGA_EEPROM; i++ ) 2168 for (i = 0; i < MAX_TXVGA_EEPROM; i++) {
2436 { 2169 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000 + 0x00010000 * i);
2437 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08100000 + 0x00010000*i ); 2170 Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
2438 Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp ); 2171 Value[i] = (u16) (ltmp & 0xffff); /* Get 16 bit available */
2439 Value[i] = (u16)( ltmp & 0xffff ); // Get 16 bit available 2172 Value[i] = cpu_to_le16(Value[i]); /* [7:0]2412 [7:0]2417 .... */
2440 Value[i] = cpu_to_le16( Value[i] ); // [7:0]2412 [7:0]2417 ....
2441 } 2173 }
2442 2174
2443 // Adjust the filed which fills with reserved value. 2175 /* Adjust the filed which fills with reserved value. */
2444 pctmp = (u8 *)Value; 2176 pctmp = (u8 *) Value;
2445 for( i=0; i<(MAX_TXVGA_EEPROM*2); i++ ) 2177 for (i = 0; i < (MAX_TXVGA_EEPROM * 2); i++) {
2446 { 2178 if (pctmp[i] != 0xff)
2447 if( pctmp[i] != 0xff )
2448 ctmp = pctmp[i]; 2179 ctmp = pctmp[i];
2449 else 2180 else
2450 pctmp[i] = ctmp; 2181 pctmp[i] = ctmp;
2451 } 2182 }
2452 2183
2453 // Adjust WB_242 to WB_242_1 TxVga scale 2184 /* Adjust WB_242 to WB_242_1 TxVga scale */
2454 if( pHwData->phy_type == RF_WB_242 ) 2185 if (pHwData->phy_type == RF_WB_242) {
2455 { 2186 for (i = 0; i < 4; i++) { /* Only 2412 2437 2462 2484 case must be modified */
2456 for( i=0; i<4; i++ ) // Only 2412 2437 2462 2484 case must be modified 2187 for (j = 0; j < (sizeof(w89rf242_txvga_old_mapping) / sizeof(w89rf242_txvga_old_mapping[0])); j++) {
2457 { 2188 if (pctmp[i] < (u8) w89rf242_txvga_old_mapping[j][1]) {
2458 for( j=0; j<(sizeof(w89rf242_txvga_old_mapping)/sizeof(w89rf242_txvga_old_mapping[0])); j++ ) 2189 pctmp[i] = (u8) w89rf242_txvga_old_mapping[j][0];
2459 {
2460 if( pctmp[i] < (u8)w89rf242_txvga_old_mapping[j][1] )
2461 {
2462 pctmp[i] = (u8)w89rf242_txvga_old_mapping[j][0];
2463 break; 2190 break;
2464 } 2191 }
2465 } 2192 }
2466 2193
2467 if( j == (sizeof(w89rf242_txvga_old_mapping)/sizeof(w89rf242_txvga_old_mapping[0])) ) 2194 if (j == (sizeof(w89rf242_txvga_old_mapping) / sizeof(w89rf242_txvga_old_mapping[0])))
2468 pctmp[i] = (u8)w89rf242_txvga_old_mapping[j-1][0]; 2195 pctmp[i] = (u8)w89rf242_txvga_old_mapping[j-1][0];
2469 } 2196 }
2470 } 2197 }
2471 2198
2472 // 20060621 Add 2199 memcpy(pHwData->TxVgaSettingInEEPROM, pctmp, MAX_TXVGA_EEPROM * 2); /* MAX_TXVGA_EEPROM is u16 count */
2473 memcpy( pHwData->TxVgaSettingInEEPROM, pctmp, MAX_TXVGA_EEPROM*2 ); //MAX_TXVGA_EEPROM is u16 count 2200 EEPROMTxVgaAdjust(pHwData);
2474 EEPROMTxVgaAdjust( pHwData );
2475} 2201}
2476 2202
2477// This function will affect the TxVga parameter in HAL. If hal_set_current_channel 2203/*
2478// or RFSynthesizer_SetPowerIndex be called, new TxVga will take effect. 2204 * This function will affect the TxVga parameter in HAL. If hal_set_current_channel
2479// TxVgaSettingInEEPROM of sHwData is an u8 array point to EEPROM contain for IS89C35 2205 * or RFSynthesizer_SetPowerIndex be called, new TxVga will take effect.
2480// This function will use default TxVgaSettingInEEPROM data to calculate new TxVga. 2206 * TxVgaSettingInEEPROM of sHwData is an u8 array point to EEPROM contain for IS89C35
2481void EEPROMTxVgaAdjust( struct hw_data * pHwData ) // 20060619.5 Add 2207 * This function will use default TxVgaSettingInEEPROM data to calculate new TxVga.
2208 */
2209void EEPROMTxVgaAdjust(struct hw_data *pHwData)
2482{ 2210{
2483 u8 * pTxVga = pHwData->TxVgaSettingInEEPROM; 2211 u8 *pTxVga = pHwData->TxVgaSettingInEEPROM;
2484 s16 i, stmp; 2212 s16 i, stmp;
2485 2213
2486 //-- 2.4G -- 20060704.2 Request from Tiger 2214 /* -- 2.4G -- */
2487 //channel 1 ~ 5 2215 /* channel 1 ~ 5 */
2488 stmp = pTxVga[1] - pTxVga[0]; 2216 stmp = pTxVga[1] - pTxVga[0];
2489 for( i=0; i<5; i++ ) 2217 for (i = 0; i < 5; i++)
2490 pHwData->TxVgaFor24[i] = pTxVga[0] + stmp*i/4; 2218 pHwData->TxVgaFor24[i] = pTxVga[0] + stmp * i / 4;
2491 //channel 6 ~ 10 2219 /* channel 6 ~ 10 */
2492 stmp = pTxVga[2] - pTxVga[1]; 2220 stmp = pTxVga[2] - pTxVga[1];
2493 for( i=5; i<10; i++ ) 2221 for (i = 5; i < 10; i++)
2494 pHwData->TxVgaFor24[i] = pTxVga[1] + stmp*(i-5)/4; 2222 pHwData->TxVgaFor24[i] = pTxVga[1] + stmp * (i - 5) / 4;
2495 //channel 11 ~ 13 2223 /* channel 11 ~ 13 */
2496 stmp = pTxVga[3] - pTxVga[2]; 2224 stmp = pTxVga[3] - pTxVga[2];
2497 for( i=10; i<13; i++ ) 2225 for (i = 10; i < 13; i++)
2498 pHwData->TxVgaFor24[i] = pTxVga[2] + stmp*(i-10)/2; 2226 pHwData->TxVgaFor24[i] = pTxVga[2] + stmp * (i - 10) / 2;
2499 //channel 14 2227 /* channel 14 */
2500 pHwData->TxVgaFor24[13] = pTxVga[3]; 2228 pHwData->TxVgaFor24[13] = pTxVga[3];
2501 2229
2502 //-- 5G -- 2230 /* -- 5G -- */
2503 if( pHwData->phy_type == RF_AIROHA_7230 ) 2231 if (pHwData->phy_type == RF_AIROHA_7230) {
2504 { 2232 /* channel 184 */
2505 //channel 184
2506 pHwData->TxVgaFor50[0].ChanNo = 184; 2233 pHwData->TxVgaFor50[0].ChanNo = 184;
2507 pHwData->TxVgaFor50[0].TxVgaValue = pTxVga[4]; 2234 pHwData->TxVgaFor50[0].TxVgaValue = pTxVga[4];
2508 //channel 196 2235 /* channel 196 */
2509 pHwData->TxVgaFor50[3].ChanNo = 196; 2236 pHwData->TxVgaFor50[3].ChanNo = 196;
2510 pHwData->TxVgaFor50[3].TxVgaValue = pTxVga[5]; 2237 pHwData->TxVgaFor50[3].TxVgaValue = pTxVga[5];
2511 //interpolate 2238 /* interpolate */
2512 pHwData->TxVgaFor50[1].ChanNo = 188; 2239 pHwData->TxVgaFor50[1].ChanNo = 188;
2513 pHwData->TxVgaFor50[2].ChanNo = 192; 2240 pHwData->TxVgaFor50[2].ChanNo = 192;
2514 stmp = pTxVga[5] - pTxVga[4]; 2241 stmp = pTxVga[5] - pTxVga[4];
2515 pHwData->TxVgaFor50[2].TxVgaValue = pTxVga[5] - stmp/3; 2242 pHwData->TxVgaFor50[2].TxVgaValue = pTxVga[5] - stmp / 3;
2516 pHwData->TxVgaFor50[1].TxVgaValue = pTxVga[5] - stmp*2/3; 2243 pHwData->TxVgaFor50[1].TxVgaValue = pTxVga[5] - stmp * 2 / 3;
2517 2244
2518 //channel 16 2245 /* channel 16 */
2519 pHwData->TxVgaFor50[6].ChanNo = 16; 2246 pHwData->TxVgaFor50[6].ChanNo = 16;
2520 pHwData->TxVgaFor50[6].TxVgaValue = pTxVga[6]; 2247 pHwData->TxVgaFor50[6].TxVgaValue = pTxVga[6];
2521 pHwData->TxVgaFor50[4].ChanNo = 8; 2248 pHwData->TxVgaFor50[4].ChanNo = 8;
@@ -2523,7 +2250,7 @@ void EEPROMTxVgaAdjust( struct hw_data * pHwData ) // 20060619.5 Add
2523 pHwData->TxVgaFor50[5].ChanNo = 12; 2250 pHwData->TxVgaFor50[5].ChanNo = 12;
2524 pHwData->TxVgaFor50[5].TxVgaValue = pTxVga[6]; 2251 pHwData->TxVgaFor50[5].TxVgaValue = pTxVga[6];
2525 2252
2526 //channel 36 2253 /* channel 36 */
2527 pHwData->TxVgaFor50[8].ChanNo = 36; 2254 pHwData->TxVgaFor50[8].ChanNo = 36;
2528 pHwData->TxVgaFor50[8].TxVgaValue = pTxVga[7]; 2255 pHwData->TxVgaFor50[8].TxVgaValue = pTxVga[7];
2529 pHwData->TxVgaFor50[7].ChanNo = 34; 2256 pHwData->TxVgaFor50[7].ChanNo = 34;
@@ -2531,153 +2258,135 @@ void EEPROMTxVgaAdjust( struct hw_data * pHwData ) // 20060619.5 Add
2531 pHwData->TxVgaFor50[9].ChanNo = 38; 2258 pHwData->TxVgaFor50[9].ChanNo = 38;
2532 pHwData->TxVgaFor50[9].TxVgaValue = pTxVga[7]; 2259 pHwData->TxVgaFor50[9].TxVgaValue = pTxVga[7];
2533 2260
2534 //channel 40 2261 /* channel 40 */
2535 pHwData->TxVgaFor50[10].ChanNo = 40; 2262 pHwData->TxVgaFor50[10].ChanNo = 40;
2536 pHwData->TxVgaFor50[10].TxVgaValue = pTxVga[8]; 2263 pHwData->TxVgaFor50[10].TxVgaValue = pTxVga[8];
2537 //channel 48 2264 /* channel 48 */
2538 pHwData->TxVgaFor50[14].ChanNo = 48; 2265 pHwData->TxVgaFor50[14].ChanNo = 48;
2539 pHwData->TxVgaFor50[14].TxVgaValue = pTxVga[9]; 2266 pHwData->TxVgaFor50[14].TxVgaValue = pTxVga[9];
2540 //interpolate 2267 /* interpolate */
2541 pHwData->TxVgaFor50[11].ChanNo = 42; 2268 pHwData->TxVgaFor50[11].ChanNo = 42;
2542 pHwData->TxVgaFor50[12].ChanNo = 44; 2269 pHwData->TxVgaFor50[12].ChanNo = 44;
2543 pHwData->TxVgaFor50[13].ChanNo = 46; 2270 pHwData->TxVgaFor50[13].ChanNo = 46;
2544 stmp = pTxVga[9] - pTxVga[8]; 2271 stmp = pTxVga[9] - pTxVga[8];
2545 pHwData->TxVgaFor50[13].TxVgaValue = pTxVga[9] - stmp/4; 2272 pHwData->TxVgaFor50[13].TxVgaValue = pTxVga[9] - stmp / 4;
2546 pHwData->TxVgaFor50[12].TxVgaValue = pTxVga[9] - stmp*2/4; 2273 pHwData->TxVgaFor50[12].TxVgaValue = pTxVga[9] - stmp * 2 / 4;
2547 pHwData->TxVgaFor50[11].TxVgaValue = pTxVga[9] - stmp*3/4; 2274 pHwData->TxVgaFor50[11].TxVgaValue = pTxVga[9] - stmp * 3 / 4;
2548 2275
2549 //channel 52 2276 /* channel 52 */
2550 pHwData->TxVgaFor50[15].ChanNo = 52; 2277 pHwData->TxVgaFor50[15].ChanNo = 52;
2551 pHwData->TxVgaFor50[15].TxVgaValue = pTxVga[10]; 2278 pHwData->TxVgaFor50[15].TxVgaValue = pTxVga[10];
2552 //channel 64 2279 /* channel 64 */
2553 pHwData->TxVgaFor50[18].ChanNo = 64; 2280 pHwData->TxVgaFor50[18].ChanNo = 64;
2554 pHwData->TxVgaFor50[18].TxVgaValue = pTxVga[11]; 2281 pHwData->TxVgaFor50[18].TxVgaValue = pTxVga[11];
2555 //interpolate 2282 /* interpolate */
2556 pHwData->TxVgaFor50[16].ChanNo = 56; 2283 pHwData->TxVgaFor50[16].ChanNo = 56;
2557 pHwData->TxVgaFor50[17].ChanNo = 60; 2284 pHwData->TxVgaFor50[17].ChanNo = 60;
2558 stmp = pTxVga[11] - pTxVga[10]; 2285 stmp = pTxVga[11] - pTxVga[10];
2559 pHwData->TxVgaFor50[17].TxVgaValue = pTxVga[11] - stmp/3; 2286 pHwData->TxVgaFor50[17].TxVgaValue = pTxVga[11] - stmp / 3;
2560 pHwData->TxVgaFor50[16].TxVgaValue = pTxVga[11] - stmp*2/3; 2287 pHwData->TxVgaFor50[16].TxVgaValue = pTxVga[11] - stmp * 2 / 3;
2561 2288
2562 //channel 100 2289 /* channel 100 */
2563 pHwData->TxVgaFor50[19].ChanNo = 100; 2290 pHwData->TxVgaFor50[19].ChanNo = 100;
2564 pHwData->TxVgaFor50[19].TxVgaValue = pTxVga[12]; 2291 pHwData->TxVgaFor50[19].TxVgaValue = pTxVga[12];
2565 //channel 112 2292 /* channel 112 */
2566 pHwData->TxVgaFor50[22].ChanNo = 112; 2293 pHwData->TxVgaFor50[22].ChanNo = 112;
2567 pHwData->TxVgaFor50[22].TxVgaValue = pTxVga[13]; 2294 pHwData->TxVgaFor50[22].TxVgaValue = pTxVga[13];
2568 //interpolate 2295 /* interpolate */
2569 pHwData->TxVgaFor50[20].ChanNo = 104; 2296 pHwData->TxVgaFor50[20].ChanNo = 104;
2570 pHwData->TxVgaFor50[21].ChanNo = 108; 2297 pHwData->TxVgaFor50[21].ChanNo = 108;
2571 stmp = pTxVga[13] - pTxVga[12]; 2298 stmp = pTxVga[13] - pTxVga[12];
2572 pHwData->TxVgaFor50[21].TxVgaValue = pTxVga[13] - stmp/3; 2299 pHwData->TxVgaFor50[21].TxVgaValue = pTxVga[13] - stmp / 3;
2573 pHwData->TxVgaFor50[20].TxVgaValue = pTxVga[13] - stmp*2/3; 2300 pHwData->TxVgaFor50[20].TxVgaValue = pTxVga[13] - stmp * 2 / 3;
2574 2301
2575 //channel 128 2302 /* channel 128 */
2576 pHwData->TxVgaFor50[26].ChanNo = 128; 2303 pHwData->TxVgaFor50[26].ChanNo = 128;
2577 pHwData->TxVgaFor50[26].TxVgaValue = pTxVga[14]; 2304 pHwData->TxVgaFor50[26].TxVgaValue = pTxVga[14];
2578 //interpolate 2305 /* interpolate */
2579 pHwData->TxVgaFor50[23].ChanNo = 116; 2306 pHwData->TxVgaFor50[23].ChanNo = 116;
2580 pHwData->TxVgaFor50[24].ChanNo = 120; 2307 pHwData->TxVgaFor50[24].ChanNo = 120;
2581 pHwData->TxVgaFor50[25].ChanNo = 124; 2308 pHwData->TxVgaFor50[25].ChanNo = 124;
2582 stmp = pTxVga[14] - pTxVga[13]; 2309 stmp = pTxVga[14] - pTxVga[13];
2583 pHwData->TxVgaFor50[25].TxVgaValue = pTxVga[14] - stmp/4; 2310 pHwData->TxVgaFor50[25].TxVgaValue = pTxVga[14] - stmp / 4;
2584 pHwData->TxVgaFor50[24].TxVgaValue = pTxVga[14] - stmp*2/4; 2311 pHwData->TxVgaFor50[24].TxVgaValue = pTxVga[14] - stmp * 2 / 4;
2585 pHwData->TxVgaFor50[23].TxVgaValue = pTxVga[14] - stmp*3/4; 2312 pHwData->TxVgaFor50[23].TxVgaValue = pTxVga[14] - stmp * 3 / 4;
2586 2313
2587 //channel 140 2314 /* channel 140 */
2588 pHwData->TxVgaFor50[29].ChanNo = 140; 2315 pHwData->TxVgaFor50[29].ChanNo = 140;
2589 pHwData->TxVgaFor50[29].TxVgaValue = pTxVga[15]; 2316 pHwData->TxVgaFor50[29].TxVgaValue = pTxVga[15];
2590 //interpolate 2317 /* interpolate */
2591 pHwData->TxVgaFor50[27].ChanNo = 132; 2318 pHwData->TxVgaFor50[27].ChanNo = 132;
2592 pHwData->TxVgaFor50[28].ChanNo = 136; 2319 pHwData->TxVgaFor50[28].ChanNo = 136;
2593 stmp = pTxVga[15] - pTxVga[14]; 2320 stmp = pTxVga[15] - pTxVga[14];
2594 pHwData->TxVgaFor50[28].TxVgaValue = pTxVga[15] - stmp/3; 2321 pHwData->TxVgaFor50[28].TxVgaValue = pTxVga[15] - stmp / 3;
2595 pHwData->TxVgaFor50[27].TxVgaValue = pTxVga[15] - stmp*2/3; 2322 pHwData->TxVgaFor50[27].TxVgaValue = pTxVga[15] - stmp * 2 / 3;
2596 2323
2597 //channel 149 2324 /* channel 149 */
2598 pHwData->TxVgaFor50[30].ChanNo = 149; 2325 pHwData->TxVgaFor50[30].ChanNo = 149;
2599 pHwData->TxVgaFor50[30].TxVgaValue = pTxVga[16]; 2326 pHwData->TxVgaFor50[30].TxVgaValue = pTxVga[16];
2600 //channel 165 2327 /* channel 165 */
2601 pHwData->TxVgaFor50[34].ChanNo = 165; 2328 pHwData->TxVgaFor50[34].ChanNo = 165;
2602 pHwData->TxVgaFor50[34].TxVgaValue = pTxVga[17]; 2329 pHwData->TxVgaFor50[34].TxVgaValue = pTxVga[17];
2603 //interpolate 2330 /* interpolate */
2604 pHwData->TxVgaFor50[31].ChanNo = 153; 2331 pHwData->TxVgaFor50[31].ChanNo = 153;
2605 pHwData->TxVgaFor50[32].ChanNo = 157; 2332 pHwData->TxVgaFor50[32].ChanNo = 157;
2606 pHwData->TxVgaFor50[33].ChanNo = 161; 2333 pHwData->TxVgaFor50[33].ChanNo = 161;
2607 stmp = pTxVga[17] - pTxVga[16]; 2334 stmp = pTxVga[17] - pTxVga[16];
2608 pHwData->TxVgaFor50[33].TxVgaValue = pTxVga[17] - stmp/4; 2335 pHwData->TxVgaFor50[33].TxVgaValue = pTxVga[17] - stmp / 4;
2609 pHwData->TxVgaFor50[32].TxVgaValue = pTxVga[17] - stmp*2/4; 2336 pHwData->TxVgaFor50[32].TxVgaValue = pTxVga[17] - stmp * 2 / 4;
2610 pHwData->TxVgaFor50[31].TxVgaValue = pTxVga[17] - stmp*3/4; 2337 pHwData->TxVgaFor50[31].TxVgaValue = pTxVga[17] - stmp * 3 / 4;
2611 } 2338 }
2612 2339
2613 #ifdef _PE_STATE_DUMP_ 2340 #ifdef _PE_STATE_DUMP_
2614 printk(" TxVgaFor24 : \n"); 2341 printk(" TxVgaFor24 :\n");
2615 DataDmp((u8 *)pHwData->TxVgaFor24, 14 ,0); 2342 DataDmp((u8 *)pHwData->TxVgaFor24, 14 , 0);
2616 printk(" TxVgaFor50 : \n"); 2343 printk(" TxVgaFor50 :\n");
2617 DataDmp((u8 *)pHwData->TxVgaFor50, 70 ,0); 2344 DataDmp((u8 *)pHwData->TxVgaFor50, 70 , 0);
2618 #endif 2345 #endif
2619} 2346}
2620 2347
2621void BBProcessor_RateChanging( struct hw_data * pHwData, u8 rate ) // 20060613.1 2348void BBProcessor_RateChanging(struct hw_data *pHwData, u8 rate)
2622{ 2349{
2623 struct wb35_reg *reg = &pHwData->reg; 2350 struct wb35_reg *reg = &pHwData->reg;
2624 unsigned char Is11bRate; 2351 unsigned char Is11bRate;
2625 2352
2626 Is11bRate = (rate % 6) ? 1 : 0; 2353 Is11bRate = (rate % 6) ? 1 : 0;
2627 switch( pHwData->phy_type ) 2354 switch (pHwData->phy_type) {
2628 { 2355 case RF_AIROHA_2230:
2629 case RF_AIROHA_2230: 2356 case RF_AIROHA_2230S:
2630 case RF_AIROHA_2230S: // 20060420 Add this 2357 if (Is11bRate) {
2631 if( Is11bRate ) 2358 if ((reg->BB48 != BB48_DEFAULT_AL2230_11B) &&
2632 { 2359 (reg->BB4C != BB4C_DEFAULT_AL2230_11B)) {
2633 if( (reg->BB48 != BB48_DEFAULT_AL2230_11B) && 2360 Wb35Reg_Write(pHwData, 0x1048, BB48_DEFAULT_AL2230_11B);
2634 (reg->BB4C != BB4C_DEFAULT_AL2230_11B) ) 2361 Wb35Reg_Write(pHwData, 0x104c, BB4C_DEFAULT_AL2230_11B);
2635 {
2636 Wb35Reg_Write( pHwData, 0x1048, BB48_DEFAULT_AL2230_11B );
2637 Wb35Reg_Write( pHwData, 0x104c, BB4C_DEFAULT_AL2230_11B );
2638 }
2639 } 2362 }
2640 else 2363 } else {
2641 { 2364 if ((reg->BB48 != BB48_DEFAULT_AL2230_11G) &&
2642 if( (reg->BB48 != BB48_DEFAULT_AL2230_11G) && 2365 (reg->BB4C != BB4C_DEFAULT_AL2230_11G)) {
2643 (reg->BB4C != BB4C_DEFAULT_AL2230_11G) ) 2366 Wb35Reg_Write(pHwData, 0x1048, BB48_DEFAULT_AL2230_11G);
2644 { 2367 Wb35Reg_Write(pHwData, 0x104c, BB4C_DEFAULT_AL2230_11G);
2645 Wb35Reg_Write( pHwData, 0x1048, BB48_DEFAULT_AL2230_11G );
2646 Wb35Reg_Write( pHwData, 0x104c, BB4C_DEFAULT_AL2230_11G );
2647 }
2648 } 2368 }
2649 break; 2369 }
2650 2370 break;
2651 case RF_WB_242: // 20060623 The fix only for old TxVGA setting 2371 case RF_WB_242:
2652 if( Is11bRate ) 2372 if (Is11bRate) {
2653 { 2373 if ((reg->BB48 != BB48_DEFAULT_WB242_11B) &&
2654 if( (reg->BB48 != BB48_DEFAULT_WB242_11B) && 2374 (reg->BB4C != BB4C_DEFAULT_WB242_11B)) {
2655 (reg->BB4C != BB4C_DEFAULT_WB242_11B) ) 2375 reg->BB48 = BB48_DEFAULT_WB242_11B;
2656 { 2376 reg->BB4C = BB4C_DEFAULT_WB242_11B;
2657 reg->BB48 = BB48_DEFAULT_WB242_11B; 2377 Wb35Reg_Write(pHwData, 0x1048, BB48_DEFAULT_WB242_11B);
2658 reg->BB4C = BB4C_DEFAULT_WB242_11B; 2378 Wb35Reg_Write(pHwData, 0x104c, BB4C_DEFAULT_WB242_11B);
2659 Wb35Reg_Write( pHwData, 0x1048, BB48_DEFAULT_WB242_11B );
2660 Wb35Reg_Write( pHwData, 0x104c, BB4C_DEFAULT_WB242_11B );
2661 }
2662 } 2379 }
2663 else 2380 } else {
2664 { 2381 if ((reg->BB48 != BB48_DEFAULT_WB242_11G) &&
2665 if( (reg->BB48 != BB48_DEFAULT_WB242_11G) && 2382 (reg->BB4C != BB4C_DEFAULT_WB242_11G)) {
2666 (reg->BB4C != BB4C_DEFAULT_WB242_11G) ) 2383 reg->BB48 = BB48_DEFAULT_WB242_11G;
2667 { 2384 reg->BB4C = BB4C_DEFAULT_WB242_11G;
2668 reg->BB48 = BB48_DEFAULT_WB242_11G; 2385 Wb35Reg_Write(pHwData, 0x1048, BB48_DEFAULT_WB242_11G);
2669 reg->BB4C = BB4C_DEFAULT_WB242_11G; 2386 Wb35Reg_Write(pHwData, 0x104c, BB4C_DEFAULT_WB242_11G);
2670 Wb35Reg_Write( pHwData, 0x1048, BB48_DEFAULT_WB242_11G );
2671 Wb35Reg_Write( pHwData, 0x104c, BB4C_DEFAULT_WB242_11G );
2672 }
2673 } 2387 }
2674 break; 2388 }
2389 break;
2675 } 2390 }
2676} 2391}
2677 2392
2678
2679
2680
2681
2682
2683
diff --git a/drivers/staging/winbond/scan_s.h b/drivers/staging/winbond/scan_s.h
index 209717f5d47d..85e7523196d0 100644
--- a/drivers/staging/winbond/scan_s.h
+++ b/drivers/staging/winbond/scan_s.h
@@ -4,117 +4,107 @@
4#include <linux/types.h> 4#include <linux/types.h>
5#include "localpara.h" 5#include "localpara.h"
6 6
7// 7/*
8// SCAN task global CONSTANTS, STRUCTURES, variables 8 * SCAN task global CONSTANTS, STRUCTURES, variables
9// 9 */
10 10
11////////////////////////////////////////////////////////////////////////// 11/* define the msg type of SCAN module */
12//define the msg type of SCAN module 12#define SCANMSG_SCAN_REQ 0x01
13#define SCANMSG_SCAN_REQ 0x01 13#define SCANMSG_BEACON 0x02
14#define SCANMSG_BEACON 0x02
15#define SCANMSG_PROBE_RESPONSE 0x03 14#define SCANMSG_PROBE_RESPONSE 0x03
16#define SCANMSG_TIMEOUT 0x04 15#define SCANMSG_TIMEOUT 0x04
17#define SCANMSG_TXPROBE_FAIL 0x05 16#define SCANMSG_TXPROBE_FAIL 0x05
18#define SCANMSG_ENABLE_BGSCAN 0x06 17#define SCANMSG_ENABLE_BGSCAN 0x06
19#define SCANMSG_STOP_SCAN 0x07 18#define SCANMSG_STOP_SCAN 0x07
20 19
21// BSS Type =>conform to 20/*
22// IBSS : ToDS/FromDS = 00 21 * BSS Type =>conform to
23// Infrastructure : ToDS/FromDS = 01 22 * IBSS : ToDS/FromDS = 00
23 * Infrastructure : ToDS/FromDS = 01
24 */
24#define IBSS_NET 0 25#define IBSS_NET 0
25#define ESS_NET 1 26#define ESS_NET 1
26#define ANYBSS_NET 2 27#define ANYBSS_NET 2
27 28
28// Scan Type 29/* Scan Type */
29#define ACTIVE_SCAN 0 30#define ACTIVE_SCAN 0
30#define PASSIVE_SCAN 1 31#define PASSIVE_SCAN 1
32
33/* Global data structures, Initial Scan & Background Scan */
34typedef struct _SCAN_REQ_PARA { /* mandatory parameters for SCAN request */
31 35
32/////////////////////////////////////////////////////////////////////////// 36 u32 ScanType; /* passive/active scan */
33//Global data structures, Initial Scan & Background Scan
34typedef struct _SCAN_REQ_PARA //mandatory parameters for SCAN request
35{
36 u32 ScanType; //passive/active scan
37 37
38 u8 reserved_1[2]; 38 u8 reserved_1[2];
39 39
40 struct SSID_Element sSSID; // 34B. scan only for this SSID 40 struct SSID_Element sSSID; /* 34B. scan only for this SSID */
41 u8 reserved_2[2]; 41 u8 reserved_2[2];
42 42
43} SCAN_REQ_PARA, *psSCAN_REQ_PARA; 43} SCAN_REQ_PARA, *psSCAN_REQ_PARA;
44 44
45typedef struct _SCAN_PARAMETERS 45typedef struct _SCAN_PARAMETERS {
46{ 46 u16 wState;
47 u16 wState; 47 u16 iCurrentChannelIndex;
48 u16 iCurrentChannelIndex;
49 48
50 SCAN_REQ_PARA sScanReq; 49 SCAN_REQ_PARA sScanReq;
51 50
52 u8 BSSID[MAC_ADDR_LENGTH + 2]; //scan only for this BSSID 51 u8 BSSID[MAC_ADDR_LENGTH + 2]; /* scan only for this BSSID */
53 52
54 u32 BssType; //scan only for this BSS type 53 u32 BssType; /* scan only for this BSS type */
55 54
56 //struct SSID_Element sSSID; //scan only for this SSID 55 u16 ProbeDelay;
57 u16 ProbeDelay; 56 u16 MinChannelTime;
58 u16 MinChannelTime;
59 57
60 u16 MaxChannelTime; 58 u16 MaxChannelTime;
61 u16 reserved_1; 59 u16 reserved_1;
62 60
63 s32 iBgScanPeriod; // XP: 5 sec 61 s32 iBgScanPeriod; /* XP: 5 sec */
64 62
65 u8 boBgScan; // Wb: enable BG scan, For XP, this value must be FALSE 63 u8 boBgScan; /* Wb: enable BG scan, For XP, this value must be FALSE */
66 u8 boFastScan; // Wb: reserved 64 u8 boFastScan; /* Wb: reserved */
67 u8 boCCAbusy; // Wb: HWMAC CCA busy status 65 u8 boCCAbusy; /* Wb: HWMAC CCA busy status */
68 u8 reserved_2; 66 u8 reserved_2;
69 67
70 struct timer_list timer; 68 struct timer_list timer;
71 69
72 u32 ScanTimeStamp; //Increase 1 per background scan(1 minute) 70 u32 ScanTimeStamp; /* Increase 1 per background scan(1 minute) */
73 u32 BssTimeStamp; //Increase 1 per connect status check 71 u32 BssTimeStamp; /* Increase 1 per connect status check */
74 u32 RxNumPerAntenna[2]; // 72 u32 RxNumPerAntenna[2];
75
76 u8 AntennaToggle; //
77 u8 boInTimerHandler;
78 u8 boTimerActive; // Wb: reserved
79 u8 boSave;
80 73
81 u32 BScanEnable; // Background scan enable. Default is On 74 u8 AntennaToggle;
75 u8 boInTimerHandler;
76 u8 boTimerActive; /* Wb: reserved */
77 u8 boSave;
82 78
79 u32 BScanEnable; /* Background scan enable. Default is On */
83} SCAN_PARAMETERS, *psSCAN_PARAMETERS; 80} SCAN_PARAMETERS, *psSCAN_PARAMETERS;
84 81
85// Encapsulate 'adapter' data structure 82/* Encapsulate 'adapter' data structure */
86#define psSCAN (&(adapter->sScanPara)) 83#define psSCAN (&(adapter->sScanPara))
87#define psSCANREQ (&(adapter->sScanPara.sScanReq)) 84#define psSCANREQ (&(adapter->sScanPara.sScanReq))
88 85
89//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 86/*
90// scan.h 87 * ===========================================================
91// Define the related definitions of scan module 88 * scan.h
92// history -- 01/14/03' created 89 * Define the related definitions of scan module
93// 90 *
94//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 91 * ===========================================================
95 92 */
96//Define the state of scan module 93
97#define SCAN_INACTIVE 0 94/* Define the state of scan module */
98#define WAIT_PROBE_DELAY 1 95#define SCAN_INACTIVE 0
99#define WAIT_RESPONSE_MIN 2 96#define WAIT_PROBE_DELAY 1
100#define WAIT_RESPONSE_MAX_ACTIVE 3 97#define WAIT_RESPONSE_MIN 2
101#define WAIT_BEACON_MAX_PASSIVE 4 98#define WAIT_RESPONSE_MAX_ACTIVE 3
102#define SCAN_COMPLETE 5 99#define WAIT_BEACON_MAX_PASSIVE 4
103#define BG_SCAN 6 100#define SCAN_COMPLETE 5
104#define BG_SCANNING 7 101#define BG_SCAN 6
105 102#define BG_SCANNING 7
106 103
107// The value will load from EEPROM 104
108// If 0xff is set in EEPOM, the driver will use SCAN_MAX_CHNL_TIME instead. 105/*
109// The definition is in WbHal.h 106 * The value will load from EEPROM
110// #define SCAN_MAX_CHNL_TIME (50) 107 * If 0xff is set in EEPOM, the driver will use SCAN_MAX_CHNL_TIME instead.
111 108 * The definition is in WbHal.h
112 109 */
113
114// static functions
115
116//static void ScanTimerHandler(struct wbsoft_priv * adapter);
117//static void vScanTimerStart(struct wbsoft_priv * adapter, int timeout_value);
118//static void vScanTimerStop(struct wbsoft_priv * adapter);
119
120#endif 110#endif
diff --git a/drivers/staging/winbond/sme_api.h b/drivers/staging/winbond/sme_api.h
index b5898294eb8a..8f4596c9e9b3 100644
--- a/drivers/staging/winbond/sme_api.h
+++ b/drivers/staging/winbond/sme_api.h
@@ -2,12 +2,6 @@
2 * sme_api.h 2 * sme_api.h
3 * 3 *
4 * Copyright(C) 2002 Winbond Electronics Corp. 4 * Copyright(C) 2002 Winbond Electronics Corp.
5 *
6 * modification history
7 * ---------------------------------------------------------------------------
8 * 1.00.001, 2003-04-21, Kevin created
9 * 1.00.002, 2003-05-14, PD43 & PE20 modified
10 *
11 */ 5 */
12 6
13#ifndef __SME_API_H__ 7#ifndef __SME_API_H__
@@ -18,42 +12,42 @@
18#include "localpara.h" 12#include "localpara.h"
19 13
20/****************** CONSTANT AND MACRO SECTION ******************************/ 14/****************** CONSTANT AND MACRO SECTION ******************************/
21#define _INLINE __inline 15#define _INLINE __inline
22 16
23#define MEDIA_STATE_DISCONNECTED 0 17#define MEDIA_STATE_DISCONNECTED 0
24#define MEDIA_STATE_CONNECTED 1 18#define MEDIA_STATE_CONNECTED 1
25 19
26//ARRAY CHECK 20/* ARRAY CHECK */
27#define MAX_POWER_TO_DB 32 21#define MAX_POWER_TO_DB 32
28 22
29/****************** TYPE DEFINITION SECTION *********************************/ 23/****************** TYPE DEFINITION SECTION *********************************/
30 24
31/****************** EXPORTED FUNCTION DECLARATION SECTION *******************/ 25/****************** EXPORTED FUNCTION DECLARATION SECTION *******************/
32 26
33// OID_802_11_BSSID 27/* OID_802_11_BSSID */
34s8 sme_get_bssid(void *pcore_data, u8 *pbssid); 28s8 sme_get_bssid(void *pcore_data, u8 *pbssid);
35s8 sme_get_desired_bssid(void *pcore_data, u8 *pbssid);//Not use 29s8 sme_get_desired_bssid(void *pcore_data, u8 *pbssid); /* Not use */
36s8 sme_set_desired_bssid(void *pcore_data, u8 *pbssid); 30s8 sme_set_desired_bssid(void *pcore_data, u8 *pbssid);
37 31
38// OID_802_11_SSID 32/* OID_802_11_SSID */
39s8 sme_get_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len); 33s8 sme_get_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len);
40s8 sme_get_desired_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len);// Not use 34s8 sme_get_desired_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len);/* Not use */
41s8 sme_set_desired_ssid(void *pcore_data, u8 *pssid, u8 ssid_len); 35s8 sme_set_desired_ssid(void *pcore_data, u8 *pssid, u8 ssid_len);
42 36
43// OID_802_11_INFRASTRUCTURE_MODE 37/* OID_802_11_INFRASTRUCTURE_MODE */
44s8 sme_get_bss_type(void *pcore_data, u8 *pbss_type); 38s8 sme_get_bss_type(void *pcore_data, u8 *pbss_type);
45s8 sme_get_desired_bss_type(void *pcore_data, u8 *pbss_type);//Not use 39s8 sme_get_desired_bss_type(void *pcore_data, u8 *pbss_type); /* Not use */
46s8 sme_set_desired_bss_type(void *pcore_data, u8 bss_type); 40s8 sme_set_desired_bss_type(void *pcore_data, u8 bss_type);
47 41
48// OID_802_11_FRAGMENTATION_THRESHOLD 42/* OID_802_11_FRAGMENTATION_THRESHOLD */
49s8 sme_get_fragment_threshold(void *pcore_data, u32 *pthreshold); 43s8 sme_get_fragment_threshold(void *pcore_data, u32 *pthreshold);
50s8 sme_set_fragment_threshold(void *pcore_data, u32 threshold); 44s8 sme_set_fragment_threshold(void *pcore_data, u32 threshold);
51 45
52// OID_802_11_RTS_THRESHOLD 46/* OID_802_11_RTS_THRESHOLD */
53s8 sme_get_rts_threshold(void *pcore_data, u32 *pthreshold); 47s8 sme_get_rts_threshold(void *pcore_data, u32 *pthreshold);
54s8 sme_set_rts_threshold(void *pcore_data, u32 threshold); 48s8 sme_set_rts_threshold(void *pcore_data, u32 threshold);
55 49
56// OID_802_11_CONFIGURATION 50/* OID_802_11_CONFIGURATION */
57s8 sme_get_beacon_period(void *pcore_data, u16 *pbeacon_period); 51s8 sme_get_beacon_period(void *pcore_data, u16 *pbeacon_period);
58s8 sme_set_beacon_period(void *pcore_data, u16 beacon_period); 52s8 sme_set_beacon_period(void *pcore_data, u16 beacon_period);
59 53
@@ -64,116 +58,69 @@ s8 sme_get_current_channel(void *pcore_data, u8 *pcurrent_channel);
64s8 sme_get_current_band(void *pcore_data, u8 *pcurrent_band); 58s8 sme_get_current_band(void *pcore_data, u8 *pcurrent_band);
65s8 sme_set_current_channel(void *pcore_data, u8 current_channel); 59s8 sme_set_current_channel(void *pcore_data, u8 current_channel);
66 60
67// OID_802_11_BSSID_LIST 61/* OID_802_11_BSSID_LIST */
68s8 sme_get_scan_bss_count(void *pcore_data, u8 *pcount); 62s8 sme_get_scan_bss_count(void *pcore_data, u8 *pcount);
69s8 sme_get_scan_bss(void *pcore_data, u8 index, void **ppbss); 63s8 sme_get_scan_bss(void *pcore_data, u8 index, void **ppbss);
70 64
71s8 sme_get_connected_bss(void *pcore_data, void **ppbss_now); 65s8 sme_get_connected_bss(void *pcore_data, void **ppbss_now);
72 66
73// OID_802_11_AUTHENTICATION_MODE 67/* OID_802_11_AUTHENTICATION_MODE */
74s8 sme_get_auth_mode(void *pcore_data, u8 *pauth_mode); 68s8 sme_get_auth_mode(void *pcore_data, u8 *pauth_mode);
75s8 sme_set_auth_mode(void *pcore_data, u8 auth_mode); 69s8 sme_set_auth_mode(void *pcore_data, u8 auth_mode);
76 70
77// OID_802_11_WEP_STATUS / OID_802_11_ENCRYPTION_STATUS 71/* OID_802_11_WEP_STATUS / OID_802_11_ENCRYPTION_STATUS */
78s8 sme_get_wep_mode(void *pcore_data, u8 *pwep_mode); 72s8 sme_get_wep_mode(void *pcore_data, u8 *pwep_mode);
79s8 sme_set_wep_mode(void *pcore_data, u8 wep_mode); 73s8 sme_set_wep_mode(void *pcore_data, u8 wep_mode);
80//s8 sme_get_encryption_status(void *pcore_data, u8 *pstatus);
81//s8 sme_set_encryption_status(void *pcore_data, u8 status);
82
83// ???????????????????????????????????????
84 74
85// OID_GEN_VENDOR_ID 75/* OID_GEN_VENDOR_ID */
86// OID_802_3_PERMANENT_ADDRESS 76/* OID_802_3_PERMANENT_ADDRESS */
87s8 sme_get_permanent_mac_addr(void *pcore_data, u8 *pmac_addr); 77s8 sme_get_permanent_mac_addr(void *pcore_data, u8 *pmac_addr);
88 78
89// OID_802_3_CURRENT_ADDRESS 79/* OID_802_3_CURRENT_ADDRESS */
90s8 sme_get_current_mac_addr(void *pcore_data, u8 *pmac_addr); 80s8 sme_get_current_mac_addr(void *pcore_data, u8 *pmac_addr);
91 81
92// OID_802_11_NETWORK_TYPE_IN_USE 82/* OID_802_11_NETWORK_TYPE_IN_USE */
93s8 sme_get_network_type_in_use(void *pcore_data, u8 *ptype); 83s8 sme_get_network_type_in_use(void *pcore_data, u8 *ptype);
94s8 sme_set_network_type_in_use(void *pcore_data, u8 type); 84s8 sme_set_network_type_in_use(void *pcore_data, u8 type);
95 85
96// OID_802_11_SUPPORTED_RATES 86/* OID_802_11_SUPPORTED_RATES */
97s8 sme_get_supported_rate(void *pcore_data, u8 *prates); 87s8 sme_get_supported_rate(void *pcore_data, u8 *prates);
98 88
99// OID_802_11_ADD_WEP 89/* OID_802_11_ADD_WEP */
100//12/29/03' wkchen
101s8 sme_set_add_wep(void *pcore_data, u32 key_index, u32 key_len, 90s8 sme_set_add_wep(void *pcore_data, u32 key_index, u32 key_len,
102 u8 *Address, u8 *key); 91 u8 *Address, u8 *key);
103 92
104// OID_802_11_REMOVE_WEP 93/* OID_802_11_REMOVE_WEP */
105s8 sme_set_remove_wep(void *pcre_data, u32 key_index); 94s8 sme_set_remove_wep(void *pcre_data, u32 key_index);
106 95
107// OID_802_11_DISASSOCIATE 96/* OID_802_11_DISASSOCIATE */
108s8 sme_set_disassociate(void *pcore_data); 97s8 sme_set_disassociate(void *pcore_data);
109 98
110// OID_802_11_POWER_MODE 99/* OID_802_11_POWER_MODE */
111s8 sme_get_power_mode(void *pcore_data, u8 *pmode); 100s8 sme_get_power_mode(void *pcore_data, u8 *pmode);
112s8 sme_set_power_mode(void *pcore_data, u8 mode); 101s8 sme_set_power_mode(void *pcore_data, u8 mode);
113 102
114// OID_802_11_BSSID_LIST_SCAN 103/* OID_802_11_BSSID_LIST_SCAN */
115s8 sme_set_bssid_list_scan(void *pcore_data, void *pscan_para); 104s8 sme_set_bssid_list_scan(void *pcore_data, void *pscan_para);
116 105
117// OID_802_11_RELOAD_DEFAULTS 106/* OID_802_11_RELOAD_DEFAULTS */
118s8 sme_set_reload_defaults(void *pcore_data, u8 reload_type); 107s8 sme_set_reload_defaults(void *pcore_data, u8 reload_type);
119 108
120 109
121// The following SME API functions are used for WPA
122//
123// Mandatory OIDs for WPA
124//
125
126// OID_802_11_ADD_KEY
127//s8 sme_set_add_key(void *pcore_data, NDIS_802_11_KEY *pkey);
128
129// OID_802_11_REMOVE_KEY
130//s8 sme_set_remove_key(void *pcore_data, NDIS_802_11_REMOVE_KEY *pkey);
131
132// OID_802_11_ASSOCIATION_INFORMATION
133//s8 sme_set_association_information(void *pcore_data,
134// NDIS_802_11_ASSOCIATION_INFORMATION *pinfo);
135
136// OID_802_11_TEST
137//s8 sme_set_test(void *pcore_data, NDIS_802_11_TEST *ptest_data);
138
139//--------------------------------------------------------------------------//
140/*
141// The left OIDs
142
143// OID_802_11_NETWORK_TYPES_SUPPORTED
144// OID_802_11_TX_POWER_LEVEL
145// OID_802_11_RSSI_TRIGGER
146// OID_802_11_NUMBER_OF_ANTENNAS
147// OID_802_11_RX_ANTENNA_SELECTED
148// OID_802_11_TX_ANTENNA_SELECTED
149// OID_802_11_STATISTICS
150// OID_802_11_DESIRED_RATES
151// OID_802_11_PRIVACY_FILTER
152
153*/
154
155/*------------------------- none-standard ----------------------------------*/ 110/*------------------------- none-standard ----------------------------------*/
156s8 sme_get_connect_status(void *pcore_data, u8 *pstatus); 111s8 sme_get_connect_status(void *pcore_data, u8 *pstatus);
157 112/*--------------------------------------------------------------------------*/
158/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
159//s8 sme_get_scan_type(void *pcore_data, u8 *pscan_type);
160//s8 sme_set_scan_type(void *pcore_data, u8 scan_type);
161
162//s8 sme_get_scan_channel_list(void *pcore_data, u8 *pscan_type);
163//s8 sme_set_scan_channel_list(void *pcore_data, u8 scan_type);
164
165 113
166void sme_get_encryption_status(void *pcore_data, u8 *EncryptStatus); 114void sme_get_encryption_status(void *pcore_data, u8 *EncryptStatus);
167void sme_set_encryption_status(void *pcore_data, u8 EncryptStatus); 115void sme_set_encryption_status(void *pcore_data, u8 EncryptStatus);
168s8 sme_add_key(void *pcore_data, 116s8 sme_add_key(void *pcore_data,
169 u32 key_index, 117 u32 key_index,
170 u8 key_len, 118 u8 key_len,
171 u8 key_type, 119 u8 key_type,
172 u8 *key_bssid, 120 u8 *key_bssid,
173 //u8 *key_rsc, 121 u8 *ptx_tsc,
174 u8 *ptx_tsc, 122 u8 *prx_tsc,
175 u8 *prx_tsc, 123 u8 *key_material);
176 u8 *key_material);
177void sme_remove_default_key(void *pcore_data, int index); 124void sme_remove_default_key(void *pcore_data, int index);
178void sme_remove_mapping_key(void *pcore_data, u8 *pmac_addr); 125void sme_remove_mapping_key(void *pcore_data, u8 *pmac_addr);
179void sme_clear_all_mapping_key(void *pcore_data); 126void sme_clear_all_mapping_key(void *pcore_data);
@@ -202,60 +149,44 @@ u8 sme_set_rx_antenna(void *pcore_data, u32 RxAntenna);
202void sme_get_tx_antenna(void *pcore_data, u32 *TxAntenna); 149void sme_get_tx_antenna(void *pcore_data, u32 *TxAntenna);
203s8 sme_set_tx_antenna(void *pcore_data, u32 TxAntenna); 150s8 sme_set_tx_antenna(void *pcore_data, u32 TxAntenna);
204s8 sme_set_IBSS_chan(void *pcore_data, struct chan_info chan); 151s8 sme_set_IBSS_chan(void *pcore_data, struct chan_info chan);
205
206//20061108 WPS
207s8 sme_set_IE_append(void *pcore_data, u8 *buffer, u16 buf_len); 152s8 sme_set_IE_append(void *pcore_data, u8 *buffer, u16 buf_len);
208 153
209 154/* ================== Local functions ====================== */
210 155static const u32 PowerDbToMw[] = {
211 156 56, /* mW, MAX - 0, 17.5 dbm */
212//================== Local functions ====================== 157 40, /* mW, MAX - 1, 16.0 dbm */
213//#ifdef _HSINCHU 158 30, /* mW, MAX - 2, 14.8 dbm */
214//void drv_translate_rssi(); // HW RSSI bit -> NDIS RSSI representation 159 20, /* mW, MAX - 3, 13.0 dbm */
215//void drv_translate_bss_description(); // Local bss desc -> NDIS bss desc 160 15, /* mW, MAX - 4, 11.8 dbm */
216//void drv_translate_channel(u8 NetworkType, u8 ChannelNumber, u32 *freq); // channel number -> channel /freq. 161 12, /* mW, MAX - 5, 10.6 dbm */
217//#endif _HSINCHU 162 9, /* mW, MAX - 6, 9.4 dbm */
218// 163 7, /* mW, MAX - 7, 8.3 dbm */
219static const u32 PowerDbToMw[] = 164 5, /* mW, MAX - 8, 6.4 dbm */
220{ 165 4, /* mW, MAX - 9, 5.3 dbm */
221 56, //mW, MAX - 0, 17.5 dbm 166 3, /* mW, MAX - 10, 4.0 dbm */
222 40, //mW, MAX - 1, 16.0 dbm 167 2, /* mW, MAX - 11, ? dbm */
223 30, //mW, MAX - 2, 14.8 dbm 168 2, /* mW, MAX - 12, ? dbm */
224 20, //mW, MAX - 3, 13.0 dbm 169 2, /* mW, MAX - 13, ? dbm */
225 15, //mW, MAX - 4, 11.8 dbm 170 2, /* mW, MAX - 14, ? dbm */
226 12, //mW, MAX - 5, 10.6 dbm 171 2, /* mW, MAX - 15, ? dbm */
227 9, //mW, MAX - 6, 9.4 dbm 172 2, /* mW, MAX - 16, ? dbm */
228 7, //mW, MAX - 7, 8.3 dbm 173 2, /* mW, MAX - 17, ? dbm */
229 5, //mW, MAX - 8, 6.4 dbm 174 2, /* mW, MAX - 18, ? dbm */
230 4, //mW, MAX - 9, 5.3 dbm 175 1, /* mW, MAX - 19, ? dbm */
231 3, //mW, MAX - 10, 4.0 dbm 176 1, /* mW, MAX - 20, ? dbm */
232 2, //mW, MAX - 11, ? dbm 177 1, /* mW, MAX - 21, ? dbm */
233 2, //mW, MAX - 12, ? dbm 178 1, /* mW, MAX - 22, ? dbm */
234 2, //mW, MAX - 13, ? dbm 179 1, /* mW, MAX - 23, ? dbm */
235 2, //mW, MAX - 14, ? dbm 180 1, /* mW, MAX - 24, ? dbm */
236 2, //mW, MAX - 15, ? dbm 181 1, /* mW, MAX - 25, ? dbm */
237 2, //mW, MAX - 16, ? dbm 182 1, /* mW, MAX - 26, ? dbm */
238 2, //mW, MAX - 17, ? dbm 183 1, /* mW, MAX - 27, ? dbm */
239 2, //mW, MAX - 18, ? dbm 184 1, /* mW, MAX - 28, ? dbm */
240 1, //mW, MAX - 19, ? dbm 185 1, /* mW, MAX - 29, ? dbm */
241 1, //mW, MAX - 20, ? dbm 186 1, /* mW, MAX - 30, ? dbm */
242 1, //mW, MAX - 21, ? dbm 187 1 /* mW, MAX - 31, ? dbm */
243 1, //mW, MAX - 22, ? dbm
244 1, //mW, MAX - 23, ? dbm
245 1, //mW, MAX - 24, ? dbm
246 1, //mW, MAX - 25, ? dbm
247 1, //mW, MAX - 26, ? dbm
248 1, //mW, MAX - 27, ? dbm
249 1, //mW, MAX - 28, ? dbm
250 1, //mW, MAX - 29, ? dbm
251 1, //mW, MAX - 30, ? dbm
252 1 //mW, MAX - 31, ? dbm
253}; 188};
254 189
255
256
257
258
259#endif /* __SME_API_H__ */ 190#endif /* __SME_API_H__ */
260 191
261 192
diff --git a/drivers/staging/winbond/sysdef.h b/drivers/staging/winbond/sysdef.h
index 251b9c553b6c..9195adf98e14 100644
--- a/drivers/staging/winbond/sysdef.h
+++ b/drivers/staging/winbond/sysdef.h
@@ -1,31 +1,19 @@
1/* Winbond WLAN System Configuration defines */
1 2
2
3//
4// Winbond WLAN System Configuration defines
5//
6
7//=====================================================================
8// Current directory is Linux
9// The definition WB_LINUX is a keyword for this OS
10//=====================================================================
11#ifndef SYS_DEF_H 3#ifndef SYS_DEF_H
12#define SYS_DEF_H 4#define SYS_DEF_H
13#define WB_LINUX 5#define WB_LINUX
14#define WB_LINUX_WPA_PSK 6#define WB_LINUX_WPA_PSK
15 7
16
17//#define _IBSS_BEACON_SEQ_STICK_
18#define _USE_FALLBACK_RATE_ 8#define _USE_FALLBACK_RATE_
19//#define ANTDIV_DEFAULT_ON
20
21#define _WPA2_ // 20061122 It's needed for current Linux driver
22 9
10#define _WPA2_
23 11
24#ifndef _WPA_PSK_DEBUG 12#ifndef _WPA_PSK_DEBUG
25#undef _WPA_PSK_DEBUG 13#undef _WPA_PSK_DEBUG
26#endif 14#endif
27 15
28// debug print options, mark what debug you don't need 16/* debug print options, mark what debug you don't need */
29 17
30#ifdef FULL_DEBUG 18#ifdef FULL_DEBUG
31#define _PE_STATE_DUMP_ 19#define _PE_STATE_DUMP_
diff --git a/drivers/staging/winbond/wb35reg.c b/drivers/staging/winbond/wb35reg.c
index 1b93547ff5bc..770722385eeb 100644
--- a/drivers/staging/winbond/wb35reg.c
+++ b/drivers/staging/winbond/wb35reg.c
@@ -6,60 +6,61 @@
6 6
7extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency); 7extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
8 8
9// true : read command process successfully 9/*
10// false : register not support 10 * true : read command process successfully
11// RegisterNo : start base 11 * false : register not support
12// pRegisterData : data point 12 * RegisterNo : start base
13// NumberOfData : number of register data 13 * pRegisterData : data point
14// Flag : AUTO_INCREMENT - RegisterNo will auto increment 4 14 * NumberOfData : number of register data
15// NO_INCREMENT - Function will write data into the same register 15 * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
16unsigned char 16 * NO_INCREMENT - Function will write data into the same register
17Wb35Reg_BurstWrite(struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterData, u8 NumberOfData, u8 Flag) 17 */
18unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag)
18{ 19{
19 struct wb35_reg *reg = &pHwData->reg; 20 struct wb35_reg *reg = &pHwData->reg;
20 struct urb *urb = NULL; 21 struct urb *urb = NULL;
21 struct wb35_reg_queue *reg_queue = NULL; 22 struct wb35_reg_queue *reg_queue = NULL;
22 u16 UrbSize; 23 u16 UrbSize;
23 struct usb_ctrlrequest *dr; 24 struct usb_ctrlrequest *dr;
24 u16 i, DataSize = NumberOfData*4; 25 u16 i, DataSize = NumberOfData * 4;
25 26
26 // Module shutdown 27 /* Module shutdown */
27 if (pHwData->SurpriseRemove) 28 if (pHwData->SurpriseRemove)
28 return false; 29 return false;
29 30
30 // Trying to use burst write function if use new hardware 31 /* Trying to use burst write function if use new hardware */
31 UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest); 32 UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
32 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 33 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
33 urb = usb_alloc_urb(0, GFP_ATOMIC); 34 urb = usb_alloc_urb(0, GFP_ATOMIC);
34 if( urb && reg_queue ) { 35 if (urb && reg_queue) {
35 reg_queue->DIRECT = 2;// burst write register 36 reg_queue->DIRECT = 2; /* burst write register */
36 reg_queue->INDEX = RegisterNo; 37 reg_queue->INDEX = RegisterNo;
37 reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 38 reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
38 memcpy( reg_queue->pBuffer, pRegisterData, DataSize ); 39 memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
39 //the function for reversing register data from little endian to big endian 40 /* the function for reversing register data from little endian to big endian */
40 for( i=0; i<NumberOfData ; i++ ) 41 for (i = 0; i < NumberOfData ; i++)
41 reg_queue->pBuffer[i] = cpu_to_le32( reg_queue->pBuffer[i] ); 42 reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
42 43
43 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize); 44 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
44 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE; 45 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
45 dr->bRequest = 0x04; // USB or vendor-defined request code, burst mode 46 dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
46 dr->wValue = cpu_to_le16( Flag ); // 0: Register number auto-increment, 1: No auto increment 47 dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
47 dr->wIndex = cpu_to_le16( RegisterNo ); 48 dr->wIndex = cpu_to_le16(RegisterNo);
48 dr->wLength = cpu_to_le16( DataSize ); 49 dr->wLength = cpu_to_le16(DataSize);
49 reg_queue->Next = NULL; 50 reg_queue->Next = NULL;
50 reg_queue->pUsbReq = dr; 51 reg_queue->pUsbReq = dr;
51 reg_queue->urb = urb; 52 reg_queue->urb = urb;
52 53
53 spin_lock_irq( &reg->EP0VM_spin_lock ); 54 spin_lock_irq(&reg->EP0VM_spin_lock);
54 if (reg->reg_first == NULL) 55 if (reg->reg_first == NULL)
55 reg->reg_first = reg_queue; 56 reg->reg_first = reg_queue;
56 else 57 else
57 reg->reg_last->Next = reg_queue; 58 reg->reg_last->Next = reg_queue;
58 reg->reg_last = reg_queue; 59 reg->reg_last = reg_queue;
59 60
60 spin_unlock_irq( &reg->EP0VM_spin_lock ); 61 spin_unlock_irq(&reg->EP0VM_spin_lock);
61 62
62 // Start EP0VM 63 /* Start EP0VM */
63 Wb35Reg_EP0VM_start(pHwData); 64 Wb35Reg_EP0VM_start(pHwData);
64 65
65 return true; 66 return true;
@@ -73,8 +74,7 @@ Wb35Reg_BurstWrite(struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterData
73 return false; 74 return false;
74} 75}
75 76
76void 77void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
77Wb35Reg_Update(struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue)
78{ 78{
79 struct wb35_reg *reg = &pHwData->reg; 79 struct wb35_reg *reg = &pHwData->reg;
80 switch (RegisterNo) { 80 switch (RegisterNo) {
@@ -116,97 +116,96 @@ Wb35Reg_Update(struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue)
116 } 116 }
117} 117}
118 118
119// true : read command process successfully 119/*
120// false : register not support 120 * true : read command process successfully
121unsigned char 121 * false : register not support
122Wb35Reg_WriteSync( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue ) 122 */
123unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
123{ 124{
124 struct wb35_reg *reg = &pHwData->reg; 125 struct wb35_reg *reg = &pHwData->reg;
125 int ret = -1; 126 int ret = -1;
126 127
127 // Module shutdown 128 /* Module shutdown */
128 if (pHwData->SurpriseRemove) 129 if (pHwData->SurpriseRemove)
129 return false; 130 return false;
130 131
131 RegisterValue = cpu_to_le32(RegisterValue); 132 RegisterValue = cpu_to_le32(RegisterValue);
132 133
133 // update the register by send usb message------------------------------------ 134 /* update the register by send usb message */
134 reg->SyncIoPause = 1; 135 reg->SyncIoPause = 1;
135 136
136 // 20060717.5 Wait until EP0VM stop 137 /* Wait until EP0VM stop */
137 while (reg->EP0vm_state != VM_STOP) 138 while (reg->EP0vm_state != VM_STOP)
138 msleep(10); 139 msleep(10);
139 140
140 // Sync IoCallDriver 141 /* Sync IoCallDriver */
141 reg->EP0vm_state = VM_RUNNING; 142 reg->EP0vm_state = VM_RUNNING;
142 ret = usb_control_msg( pHwData->WbUsb.udev, 143 ret = usb_control_msg(pHwData->WbUsb.udev,
143 usb_sndctrlpipe( pHwData->WbUsb.udev, 0 ), 144 usb_sndctrlpipe(pHwData->WbUsb.udev, 0),
144 0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, 145 0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
145 0x0,RegisterNo, &RegisterValue, 4, HZ*100 ); 146 0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
146 reg->EP0vm_state = VM_STOP; 147 reg->EP0vm_state = VM_STOP;
147 reg->SyncIoPause = 0; 148 reg->SyncIoPause = 0;
148 149
149 Wb35Reg_EP0VM_start(pHwData); 150 Wb35Reg_EP0VM_start(pHwData);
150 151
151 if (ret < 0) { 152 if (ret < 0) {
152 #ifdef _PE_REG_DUMP_ 153#ifdef _PE_REG_DUMP_
153 printk("EP0 Write register usb message sending error\n"); 154 printk("EP0 Write register usb message sending error\n");
154 #endif 155#endif
155 156 pHwData->SurpriseRemove = 1;
156 pHwData->SurpriseRemove = 1; // 20060704.2
157 return false; 157 return false;
158 } 158 }
159
160 return true; 159 return true;
161} 160}
162 161
163// true : read command process successfully 162/*
164// false : register not support 163 * true : read command process successfully
165unsigned char 164 * false : register not support
166Wb35Reg_Write( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue ) 165 */
166unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
167{ 167{
168 struct wb35_reg *reg = &pHwData->reg; 168 struct wb35_reg *reg = &pHwData->reg;
169 struct usb_ctrlrequest *dr; 169 struct usb_ctrlrequest *dr;
170 struct urb *urb = NULL; 170 struct urb *urb = NULL;
171 struct wb35_reg_queue *reg_queue = NULL; 171 struct wb35_reg_queue *reg_queue = NULL;
172 u16 UrbSize; 172 u16 UrbSize;
173
174 173
175 // Module shutdown 174 /* Module shutdown */
176 if (pHwData->SurpriseRemove) 175 if (pHwData->SurpriseRemove)
177 return false; 176 return false;
178 177
179 // update the register by send urb request------------------------------------ 178 /* update the register by send urb request */
180 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest); 179 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
181 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 180 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
182 urb = usb_alloc_urb(0, GFP_ATOMIC); 181 urb = usb_alloc_urb(0, GFP_ATOMIC);
183 if (urb && reg_queue) { 182 if (urb && reg_queue) {
184 reg_queue->DIRECT = 1;// burst write register 183 reg_queue->DIRECT = 1; /* burst write register */
185 reg_queue->INDEX = RegisterNo; 184 reg_queue->INDEX = RegisterNo;
186 reg_queue->VALUE = cpu_to_le32(RegisterValue); 185 reg_queue->VALUE = cpu_to_le32(RegisterValue);
187 reg_queue->RESERVED_VALID = false; 186 reg_queue->RESERVED_VALID = false;
188 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 187 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
189 dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE; 188 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
190 dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode 189 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
191 dr->wValue = cpu_to_le16(0x0); 190 dr->wValue = cpu_to_le16(0x0);
192 dr->wIndex = cpu_to_le16(RegisterNo); 191 dr->wIndex = cpu_to_le16(RegisterNo);
193 dr->wLength = cpu_to_le16(4); 192 dr->wLength = cpu_to_le16(4);
194 193
195 // Enter the sending queue 194 /* Enter the sending queue */
196 reg_queue->Next = NULL; 195 reg_queue->Next = NULL;
197 reg_queue->pUsbReq = dr; 196 reg_queue->pUsbReq = dr;
198 reg_queue->urb = urb; 197 reg_queue->urb = urb;
199 198
200 spin_lock_irq(&reg->EP0VM_spin_lock ); 199 spin_lock_irq(&reg->EP0VM_spin_lock);
201 if (reg->reg_first == NULL) 200 if (reg->reg_first == NULL)
202 reg->reg_first = reg_queue; 201 reg->reg_first = reg_queue;
203 else 202 else
204 reg->reg_last->Next = reg_queue; 203 reg->reg_last->Next = reg_queue;
205 reg->reg_last = reg_queue; 204 reg->reg_last = reg_queue;
206 205
207 spin_unlock_irq( &reg->EP0VM_spin_lock ); 206 spin_unlock_irq(&reg->EP0VM_spin_lock);
208 207
209 // Start EP0VM 208 /* Start EP0VM */
210 Wb35Reg_EP0VM_start(pHwData); 209 Wb35Reg_EP0VM_start(pHwData);
211 210
212 return true; 211 return true;
@@ -218,56 +217,60 @@ Wb35Reg_Write( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue )
218 } 217 }
219} 218}
220 219
221//This command will be executed with a user defined value. When it completes, 220/*
222//this value is useful. For example, hal_set_current_channel will use it. 221 * This command will be executed with a user defined value. When it completes,
223// true : read command process successfully 222 * this value is useful. For example, hal_set_current_channel will use it.
224// false : register not support 223 * true : read command process successfully
225unsigned char 224 * false : register not support
226Wb35Reg_WriteWithCallbackValue( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue, 225 */
227 s8 *pValue, s8 Len) 226unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
227 u16 RegisterNo,
228 u32 RegisterValue,
229 s8 *pValue,
230 s8 Len)
228{ 231{
229 struct wb35_reg *reg = &pHwData->reg; 232 struct wb35_reg *reg = &pHwData->reg;
230 struct usb_ctrlrequest *dr; 233 struct usb_ctrlrequest *dr;
231 struct urb *urb = NULL; 234 struct urb *urb = NULL;
232 struct wb35_reg_queue *reg_queue = NULL; 235 struct wb35_reg_queue *reg_queue = NULL;
233 u16 UrbSize; 236 u16 UrbSize;
234 237
235 // Module shutdown 238 /* Module shutdown */
236 if (pHwData->SurpriseRemove) 239 if (pHwData->SurpriseRemove)
237 return false; 240 return false;
238 241
239 // update the register by send urb request------------------------------------ 242 /* update the register by send urb request */
240 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest); 243 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
241 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 244 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
242 urb = usb_alloc_urb(0, GFP_ATOMIC); 245 urb = usb_alloc_urb(0, GFP_ATOMIC);
243 if (urb && reg_queue) { 246 if (urb && reg_queue) {
244 reg_queue->DIRECT = 1;// burst write register 247 reg_queue->DIRECT = 1; /* burst write register */
245 reg_queue->INDEX = RegisterNo; 248 reg_queue->INDEX = RegisterNo;
246 reg_queue->VALUE = cpu_to_le32(RegisterValue); 249 reg_queue->VALUE = cpu_to_le32(RegisterValue);
247 //NOTE : Users must guarantee the size of value will not exceed the buffer size. 250 /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
248 memcpy(reg_queue->RESERVED, pValue, Len); 251 memcpy(reg_queue->RESERVED, pValue, Len);
249 reg_queue->RESERVED_VALID = true; 252 reg_queue->RESERVED_VALID = true;
250 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 253 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
251 dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE; 254 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
252 dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode 255 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
253 dr->wValue = cpu_to_le16(0x0); 256 dr->wValue = cpu_to_le16(0x0);
254 dr->wIndex = cpu_to_le16(RegisterNo); 257 dr->wIndex = cpu_to_le16(RegisterNo);
255 dr->wLength = cpu_to_le16(4); 258 dr->wLength = cpu_to_le16(4);
256 259
257 // Enter the sending queue 260 /* Enter the sending queue */
258 reg_queue->Next = NULL; 261 reg_queue->Next = NULL;
259 reg_queue->pUsbReq = dr; 262 reg_queue->pUsbReq = dr;
260 reg_queue->urb = urb; 263 reg_queue->urb = urb;
261 spin_lock_irq (&reg->EP0VM_spin_lock ); 264 spin_lock_irq(&reg->EP0VM_spin_lock);
262 if( reg->reg_first == NULL ) 265 if (reg->reg_first == NULL)
263 reg->reg_first = reg_queue; 266 reg->reg_first = reg_queue;
264 else 267 else
265 reg->reg_last->Next = reg_queue; 268 reg->reg_last->Next = reg_queue;
266 reg->reg_last = reg_queue; 269 reg->reg_last = reg_queue;
267 270
268 spin_unlock_irq ( &reg->EP0VM_spin_lock ); 271 spin_unlock_irq(&reg->EP0VM_spin_lock);
269 272
270 // Start EP0VM 273 /* Start EP0VM */
271 Wb35Reg_EP0VM_start(pHwData); 274 Wb35Reg_EP0VM_start(pHwData);
272 return true; 275 return true;
273 } else { 276 } else {
@@ -278,115 +281,114 @@ Wb35Reg_WriteWithCallbackValue( struct hw_data * pHwData, u16 RegisterNo, u32 Re
278 } 281 }
279} 282}
280 283
281// true : read command process successfully 284/*
282// false : register not support 285 * true : read command process successfully
283// pRegisterValue : It must be a resident buffer due to asynchronous read register. 286 * false : register not support
284unsigned char 287 * pRegisterValue : It must be a resident buffer due to
285Wb35Reg_ReadSync( struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterValue ) 288 * asynchronous read register.
289 */
290unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
286{ 291{
287 struct wb35_reg *reg = &pHwData->reg; 292 struct wb35_reg *reg = &pHwData->reg;
288 u32 * pltmp = pRegisterValue; 293 u32 *pltmp = pRegisterValue;
289 int ret = -1; 294 int ret = -1;
290 295
291 // Module shutdown 296 /* Module shutdown */
292 if (pHwData->SurpriseRemove) 297 if (pHwData->SurpriseRemove)
293 return false; 298 return false;
294 299
295 // Read the register by send usb message------------------------------------ 300 /* Read the register by send usb message */
296
297 reg->SyncIoPause = 1; 301 reg->SyncIoPause = 1;
298 302
299 // 20060717.5 Wait until EP0VM stop 303 /* Wait until EP0VM stop */
300 while (reg->EP0vm_state != VM_STOP) 304 while (reg->EP0vm_state != VM_STOP)
301 msleep(10); 305 msleep(10);
302 306
303 reg->EP0vm_state = VM_RUNNING; 307 reg->EP0vm_state = VM_RUNNING;
304 ret = usb_control_msg( pHwData->WbUsb.udev, 308 ret = usb_control_msg(pHwData->WbUsb.udev,
305 usb_rcvctrlpipe(pHwData->WbUsb.udev, 0), 309 usb_rcvctrlpipe(pHwData->WbUsb.udev, 0),
306 0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN, 310 0x01, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
307 0x0, RegisterNo, pltmp, 4, HZ*100 ); 311 0x0, RegisterNo, pltmp, 4, HZ * 100);
308 312
309 *pRegisterValue = cpu_to_le32(*pltmp); 313 *pRegisterValue = cpu_to_le32(*pltmp);
310 314
311 reg->EP0vm_state = VM_STOP; 315 reg->EP0vm_state = VM_STOP;
312 316
313 Wb35Reg_Update( pHwData, RegisterNo, *pRegisterValue ); 317 Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
314 reg->SyncIoPause = 0; 318 reg->SyncIoPause = 0;
315 319
316 Wb35Reg_EP0VM_start( pHwData ); 320 Wb35Reg_EP0VM_start(pHwData);
317 321
318 if (ret < 0) { 322 if (ret < 0) {
319 #ifdef _PE_REG_DUMP_ 323#ifdef _PE_REG_DUMP_
320 printk("EP0 Read register usb message sending error\n"); 324 printk("EP0 Read register usb message sending error\n");
321 #endif 325#endif
322 326 pHwData->SurpriseRemove = 1;
323 pHwData->SurpriseRemove = 1; // 20060704.2
324 return false; 327 return false;
325 } 328 }
326
327 return true; 329 return true;
328} 330}
329 331
330// true : read command process successfully 332/*
331// false : register not support 333 * true : read command process successfully
332// pRegisterValue : It must be a resident buffer due to asynchronous read register. 334 * false : register not support
333unsigned char 335 * pRegisterValue : It must be a resident buffer due to
334Wb35Reg_Read(struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterValue ) 336 * asynchronous read register.
337 */
338unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
335{ 339{
336 struct wb35_reg *reg = &pHwData->reg; 340 struct wb35_reg *reg = &pHwData->reg;
337 struct usb_ctrlrequest * dr; 341 struct usb_ctrlrequest *dr;
338 struct urb *urb; 342 struct urb *urb;
339 struct wb35_reg_queue *reg_queue; 343 struct wb35_reg_queue *reg_queue;
340 u16 UrbSize; 344 u16 UrbSize;
341 345
342 // Module shutdown 346 /* Module shutdown */
343 if (pHwData->SurpriseRemove) 347 if (pHwData->SurpriseRemove)
344 return false; 348 return false;
345 349
346 // update the variable by send Urb to read register ------------------------------------ 350 /* update the variable by send Urb to read register */
347 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest); 351 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
348 reg_queue = kzalloc(UrbSize, GFP_ATOMIC); 352 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
349 urb = usb_alloc_urb(0, GFP_ATOMIC); 353 urb = usb_alloc_urb(0, GFP_ATOMIC);
350 if( urb && reg_queue ) 354 if (urb && reg_queue) {
351 { 355 reg_queue->DIRECT = 0; /* read register */
352 reg_queue->DIRECT = 0;// read register
353 reg_queue->INDEX = RegisterNo; 356 reg_queue->INDEX = RegisterNo;
354 reg_queue->pBuffer = pRegisterValue; 357 reg_queue->pBuffer = pRegisterValue;
355 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue)); 358 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
356 dr->bRequestType = USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN; 359 dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
357 dr->bRequest = 0x01; // USB or vendor-defined request code, burst mode 360 dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
358 dr->wValue = cpu_to_le16(0x0); 361 dr->wValue = cpu_to_le16(0x0);
359 dr->wIndex = cpu_to_le16 (RegisterNo); 362 dr->wIndex = cpu_to_le16(RegisterNo);
360 dr->wLength = cpu_to_le16 (4); 363 dr->wLength = cpu_to_le16(4);
361 364
362 // Enter the sending queue 365 /* Enter the sending queue */
363 reg_queue->Next = NULL; 366 reg_queue->Next = NULL;
364 reg_queue->pUsbReq = dr; 367 reg_queue->pUsbReq = dr;
365 reg_queue->urb = urb; 368 reg_queue->urb = urb;
366 spin_lock_irq ( &reg->EP0VM_spin_lock ); 369 spin_lock_irq(&reg->EP0VM_spin_lock);
367 if( reg->reg_first == NULL ) 370 if (reg->reg_first == NULL)
368 reg->reg_first = reg_queue; 371 reg->reg_first = reg_queue;
369 else 372 else
370 reg->reg_last->Next = reg_queue; 373 reg->reg_last->Next = reg_queue;
371 reg->reg_last = reg_queue; 374 reg->reg_last = reg_queue;
372 375
373 spin_unlock_irq( &reg->EP0VM_spin_lock ); 376 spin_unlock_irq(&reg->EP0VM_spin_lock);
374 377
375 // Start EP0VM 378 /* Start EP0VM */
376 Wb35Reg_EP0VM_start( pHwData ); 379 Wb35Reg_EP0VM_start(pHwData);
377 380
378 return true; 381 return true;
379 } else { 382 } else {
380 if (urb) 383 if (urb)
381 usb_free_urb( urb ); 384 usb_free_urb(urb);
382 kfree(reg_queue); 385 kfree(reg_queue);
383 return false; 386 return false;
384 } 387 }
385} 388}
386 389
387 390
388void 391void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
389Wb35Reg_EP0VM_start( struct hw_data * pHwData )
390{ 392{
391 struct wb35_reg *reg = &pHwData->reg; 393 struct wb35_reg *reg = &pHwData->reg;
392 394
@@ -397,15 +399,14 @@ Wb35Reg_EP0VM_start( struct hw_data * pHwData )
397 atomic_dec(&reg->RegFireCount); 399 atomic_dec(&reg->RegFireCount);
398} 400}
399 401
400void 402void Wb35Reg_EP0VM(struct hw_data *pHwData)
401Wb35Reg_EP0VM(struct hw_data * pHwData )
402{ 403{
403 struct wb35_reg *reg = &pHwData->reg; 404 struct wb35_reg *reg = &pHwData->reg;
404 struct urb *urb; 405 struct urb *urb;
405 struct usb_ctrlrequest *dr; 406 struct usb_ctrlrequest *dr;
406 u32 * pBuffer; 407 u32 *pBuffer;
407 int ret = -1; 408 int ret = -1;
408 struct wb35_reg_queue *reg_queue; 409 struct wb35_reg_queue *reg_queue;
409 410
410 411
411 if (reg->SyncIoPause) 412 if (reg->SyncIoPause)
@@ -414,27 +415,27 @@ Wb35Reg_EP0VM(struct hw_data * pHwData )
414 if (pHwData->SurpriseRemove) 415 if (pHwData->SurpriseRemove)
415 goto cleanup; 416 goto cleanup;
416 417
417 // Get the register data and send to USB through Irp 418 /* Get the register data and send to USB through Irp */
418 spin_lock_irq( &reg->EP0VM_spin_lock ); 419 spin_lock_irq(&reg->EP0VM_spin_lock);
419 reg_queue = reg->reg_first; 420 reg_queue = reg->reg_first;
420 spin_unlock_irq( &reg->EP0VM_spin_lock ); 421 spin_unlock_irq(&reg->EP0VM_spin_lock);
421 422
422 if (!reg_queue) 423 if (!reg_queue)
423 goto cleanup; 424 goto cleanup;
424 425
425 // Get an Urb, send it 426 /* Get an Urb, send it */
426 urb = (struct urb *)reg_queue->urb; 427 urb = (struct urb *)reg_queue->urb;
427 428
428 dr = reg_queue->pUsbReq; 429 dr = reg_queue->pUsbReq;
429 urb = reg_queue->urb; 430 urb = reg_queue->urb;
430 pBuffer = reg_queue->pBuffer; 431 pBuffer = reg_queue->pBuffer;
431 if (reg_queue->DIRECT == 1) // output 432 if (reg_queue->DIRECT == 1) /* output */
432 pBuffer = &reg_queue->VALUE; 433 pBuffer = &reg_queue->VALUE;
433 434
434 usb_fill_control_urb( urb, pHwData->WbUsb.udev, 435 usb_fill_control_urb(urb, pHwData->WbUsb.udev,
435 REG_DIRECTION(pHwData->WbUsb.udev,reg_queue), 436 REG_DIRECTION(pHwData->WbUsb.udev, reg_queue),
436 (u8 *)dr,pBuffer,cpu_to_le16(dr->wLength), 437 (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
437 Wb35Reg_EP0VM_complete, (void*)pHwData); 438 Wb35Reg_EP0VM_complete, (void *)pHwData);
438 439
439 reg->EP0vm_state = VM_RUNNING; 440 reg->EP0vm_state = VM_RUNNING;
440 441
@@ -446,7 +447,6 @@ Wb35Reg_EP0VM(struct hw_data * pHwData )
446#endif 447#endif
447 goto cleanup; 448 goto cleanup;
448 } 449 }
449
450 return; 450 return;
451 451
452 cleanup: 452 cleanup:
@@ -455,29 +455,28 @@ Wb35Reg_EP0VM(struct hw_data * pHwData )
455} 455}
456 456
457 457
458void 458void Wb35Reg_EP0VM_complete(struct urb *urb)
459Wb35Reg_EP0VM_complete(struct urb *urb)
460{ 459{
461 struct hw_data * pHwData = (struct hw_data *)urb->context; 460 struct hw_data *pHwData = (struct hw_data *)urb->context;
462 struct wb35_reg *reg = &pHwData->reg; 461 struct wb35_reg *reg = &pHwData->reg;
463 struct wb35_reg_queue *reg_queue; 462 struct wb35_reg_queue *reg_queue;
464 463
465 464
466 // Variable setting 465 /* Variable setting */
467 reg->EP0vm_state = VM_COMPLETED; 466 reg->EP0vm_state = VM_COMPLETED;
468 reg->EP0VM_status = urb->status; 467 reg->EP0VM_status = urb->status;
469 468
470 if (pHwData->SurpriseRemove) { // Let WbWlanHalt to handle surprise remove 469 if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
471 reg->EP0vm_state = VM_STOP; 470 reg->EP0vm_state = VM_STOP;
472 atomic_dec(&reg->RegFireCount); 471 atomic_dec(&reg->RegFireCount);
473 } else { 472 } else {
474 // Complete to send, remove the URB from the first 473 /* Complete to send, remove the URB from the first */
475 spin_lock_irq( &reg->EP0VM_spin_lock ); 474 spin_lock_irq(&reg->EP0VM_spin_lock);
476 reg_queue = reg->reg_first; 475 reg_queue = reg->reg_first;
477 if (reg_queue == reg->reg_last) 476 if (reg_queue == reg->reg_last)
478 reg->reg_last = NULL; 477 reg->reg_last = NULL;
479 reg->reg_first = reg->reg_first->Next; 478 reg->reg_first = reg->reg_first->Next;
480 spin_unlock_irq( &reg->EP0VM_spin_lock ); 479 spin_unlock_irq(&reg->EP0VM_spin_lock);
481 480
482 if (reg->EP0VM_status) { 481 if (reg->EP0VM_status) {
483#ifdef _PE_REG_DUMP_ 482#ifdef _PE_REG_DUMP_
@@ -486,37 +485,35 @@ Wb35Reg_EP0VM_complete(struct urb *urb)
486 reg->EP0vm_state = VM_STOP; 485 reg->EP0vm_state = VM_STOP;
487 pHwData->SurpriseRemove = 1; 486 pHwData->SurpriseRemove = 1;
488 } else { 487 } else {
489 // Success. Update the result 488 /* Success. Update the result */
490 489
491 // Start the next send 490 /* Start the next send */
492 Wb35Reg_EP0VM(pHwData); 491 Wb35Reg_EP0VM(pHwData);
493 } 492 }
494 493
495 kfree(reg_queue); 494 kfree(reg_queue);
496 } 495 }
497 496
498 usb_free_urb(urb); 497 usb_free_urb(urb);
499} 498}
500 499
501 500
502void 501void Wb35Reg_destroy(struct hw_data *pHwData)
503Wb35Reg_destroy(struct hw_data * pHwData)
504{ 502{
505 struct wb35_reg *reg = &pHwData->reg; 503 struct wb35_reg *reg = &pHwData->reg;
506 struct urb *urb; 504 struct urb *urb;
507 struct wb35_reg_queue *reg_queue; 505 struct wb35_reg_queue *reg_queue;
508
509 506
510 Uxx_power_off_procedure(pHwData); 507 Uxx_power_off_procedure(pHwData);
511 508
512 // Wait for Reg operation completed 509 /* Wait for Reg operation completed */
513 do { 510 do {
514 msleep(10); // Delay for waiting function enter 940623.1.a 511 msleep(10); /* Delay for waiting function enter */
515 } while (reg->EP0vm_state != VM_STOP); 512 } while (reg->EP0vm_state != VM_STOP);
516 msleep(10); // Delay for waiting function enter 940623.1.b 513 msleep(10); /* Delay for waiting function enter */
517 514
518 // Release all the data in RegQueue 515 /* Release all the data in RegQueue */
519 spin_lock_irq( &reg->EP0VM_spin_lock ); 516 spin_lock_irq(&reg->EP0VM_spin_lock);
520 reg_queue = reg->reg_first; 517 reg_queue = reg->reg_first;
521 while (reg_queue) { 518 while (reg_queue) {
522 if (reg_queue == reg->reg_last) 519 if (reg_queue == reg->reg_last)
@@ -524,84 +521,88 @@ Wb35Reg_destroy(struct hw_data * pHwData)
524 reg->reg_first = reg->reg_first->Next; 521 reg->reg_first = reg->reg_first->Next;
525 522
526 urb = reg_queue->urb; 523 urb = reg_queue->urb;
527 spin_unlock_irq( &reg->EP0VM_spin_lock ); 524 spin_unlock_irq(&reg->EP0VM_spin_lock);
528 if (urb) { 525 if (urb) {
529 usb_free_urb(urb); 526 usb_free_urb(urb);
530 kfree(reg_queue); 527 kfree(reg_queue);
531 } else { 528 } else {
532 #ifdef _PE_REG_DUMP_ 529#ifdef _PE_REG_DUMP_
533 printk("EP0 queue release error\n"); 530 printk("EP0 queue release error\n");
534 #endif 531#endif
535 } 532 }
536 spin_lock_irq( &reg->EP0VM_spin_lock ); 533 spin_lock_irq(&reg->EP0VM_spin_lock);
537 534
538 reg_queue = reg->reg_first; 535 reg_queue = reg->reg_first;
539 } 536 }
540 spin_unlock_irq( &reg->EP0VM_spin_lock ); 537 spin_unlock_irq(&reg->EP0VM_spin_lock);
541} 538}
542 539
543//==================================================================================== 540/*
544// The function can be run in passive-level only. 541 * =======================================================================
545//==================================================================================== 542 * The function can be run in passive-level only.
546unsigned char Wb35Reg_initial(struct hw_data * pHwData) 543 * =========================================================================
544 */
545unsigned char Wb35Reg_initial(struct hw_data *pHwData)
547{ 546{
548 struct wb35_reg *reg=&pHwData->reg; 547 struct wb35_reg *reg = &pHwData->reg;
549 u32 ltmp; 548 u32 ltmp;
550 u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval; 549 u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
551 550
552 // Spin lock is acquired for read and write IRP command 551 /* Spin lock is acquired for read and write IRP command */
553 spin_lock_init( &reg->EP0VM_spin_lock ); 552 spin_lock_init(&reg->EP0VM_spin_lock);
554 553
555 // Getting RF module type from EEPROM ------------------------------------ 554 /* Getting RF module type from EEPROM */
556 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x080d0000 ); // Start EEPROM access + Read + address(0x0d) 555 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
557 Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp ); 556 Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
558 557
559 //Update RF module type and determine the PHY type by inf or EEPROM 558 /* Update RF module type and determine the PHY type by inf or EEPROM */
560 reg->EEPROMPhyType = (u8)( ltmp & 0xff ); 559 reg->EEPROMPhyType = (u8)(ltmp & 0xff);
561 // 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829 560 /*
562 // 16V AL2230, 17 - AL7230, 18 - AL2230S 561 * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
563 // 32 Reserved 562 * 16V AL2230, 17 - AL7230, 18 - AL2230S
564 // 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34) 563 * 32 Reserved
564 * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
565 */
565 if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) { 566 if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
566 if( (reg->EEPROMPhyType == RF_MAXIM_2825) || 567 if ((reg->EEPROMPhyType == RF_MAXIM_2825) ||
567 (reg->EEPROMPhyType == RF_MAXIM_2827) || 568 (reg->EEPROMPhyType == RF_MAXIM_2827) ||
568 (reg->EEPROMPhyType == RF_MAXIM_2828) || 569 (reg->EEPROMPhyType == RF_MAXIM_2828) ||
569 (reg->EEPROMPhyType == RF_MAXIM_2829) || 570 (reg->EEPROMPhyType == RF_MAXIM_2829) ||
570 (reg->EEPROMPhyType == RF_MAXIM_V1) || 571 (reg->EEPROMPhyType == RF_MAXIM_V1) ||
571 (reg->EEPROMPhyType == RF_AIROHA_2230) || 572 (reg->EEPROMPhyType == RF_AIROHA_2230) ||
572 (reg->EEPROMPhyType == RF_AIROHA_2230S) || 573 (reg->EEPROMPhyType == RF_AIROHA_2230S) ||
573 (reg->EEPROMPhyType == RF_AIROHA_7230) || 574 (reg->EEPROMPhyType == RF_AIROHA_7230) ||
574 (reg->EEPROMPhyType == RF_WB_242) || 575 (reg->EEPROMPhyType == RF_WB_242) ||
575 (reg->EEPROMPhyType == RF_WB_242_1)) 576 (reg->EEPROMPhyType == RF_WB_242_1))
576 pHwData->phy_type = reg->EEPROMPhyType; 577 pHwData->phy_type = reg->EEPROMPhyType;
577 } 578 }
578 579
579 // Power On procedure running. The relative parameter will be set according to phy_type 580 /* Power On procedure running. The relative parameter will be set according to phy_type */
580 Uxx_power_on_procedure( pHwData ); 581 Uxx_power_on_procedure(pHwData);
581 582
582 // Reading MAC address 583 /* Reading MAC address */
583 Uxx_ReadEthernetAddress( pHwData ); 584 Uxx_ReadEthernetAddress(pHwData);
584 585
585 // Read VCO trim for RF parameter 586 /* Read VCO trim for RF parameter */
586 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08200000 ); 587 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
587 Wb35Reg_ReadSync( pHwData, 0x03b4, &VCO_trim ); 588 Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
588 589
589 // Read Antenna On/Off of software flag 590 /* Read Antenna On/Off of software flag */
590 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08210000 ); 591 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
591 Wb35Reg_ReadSync( pHwData, 0x03b4, &SoftwareSet ); 592 Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
592 593
593 // Read TXVGA 594 /* Read TXVGA */
594 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08100000 ); 595 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
595 Wb35Reg_ReadSync( pHwData, 0x03b4, &TxVga ); 596 Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
596 597
597 // Get Scan interval setting from EEPROM offset 0x1c 598 /* Get Scan interval setting from EEPROM offset 0x1c */
598 Wb35Reg_WriteSync( pHwData, 0x03b4, 0x081d0000 ); 599 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
599 Wb35Reg_ReadSync( pHwData, 0x03b4, &Region_ScanInterval ); 600 Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
600 601
601 // Update Ethernet address 602 /* Update Ethernet address */
602 memcpy( pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN ); 603 memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
603 604
604 // Update software variable 605 /* Update software variable */
605 pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff); 606 pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
606 TxVga &= 0x000000ff; 607 TxVga &= 0x000000ff;
607 pHwData->PowerIndexFromEEPROM = (u8)TxVga; 608 pHwData->PowerIndexFromEEPROM = (u8)TxVga;
@@ -609,22 +610,22 @@ unsigned char Wb35Reg_initial(struct hw_data * pHwData)
609 if (pHwData->VCO_trim == 0xff) 610 if (pHwData->VCO_trim == 0xff)
610 pHwData->VCO_trim = 0x28; 611 pHwData->VCO_trim = 0x28;
611 612
612 reg->EEPROMRegion = (u8)(Region_ScanInterval>>8); // 20060720 613 reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
613 if( reg->EEPROMRegion<1 || reg->EEPROMRegion>6 ) 614 if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
614 reg->EEPROMRegion = REGION_AUTO; 615 reg->EEPROMRegion = REGION_AUTO;
615 616
616 //For Get Tx VGA from EEPROM 20060315.5 move here 617 /* For Get Tx VGA from EEPROM */
617 GetTxVgaFromEEPROM( pHwData ); 618 GetTxVgaFromEEPROM(pHwData);
618 619
619 // Set Scan Interval 620 /* Set Scan Interval */
620 pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10; 621 pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
621 if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) // Is default setting 0xff * 10 622 if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
622 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME; 623 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
623 624
624 // Initial register 625 /* Initial register */
625 RFSynthesizer_initial(pHwData); 626 RFSynthesizer_initial(pHwData);
626 627
627 BBProcessor_initial(pHwData); // Async write, must wait until complete 628 BBProcessor_initial(pHwData); /* Async write, must wait until complete */
628 629
629 Wb35Reg_phy_calibration(pHwData); 630 Wb35Reg_phy_calibration(pHwData);
630 631
@@ -634,113 +635,104 @@ unsigned char Wb35Reg_initial(struct hw_data * pHwData)
634 if (pHwData->SurpriseRemove) 635 if (pHwData->SurpriseRemove)
635 return false; 636 return false;
636 else 637 else
637 return true; // Initial fail 638 return true; /* Initial fail */
638} 639}
639 640
640//=================================================================================== 641/*
641// CardComputeCrc -- 642 * ================================================================
642// 643 * CardComputeCrc --
643// Description: 644 *
644// Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length. 645 * Description:
645// 646 * Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length.
646// Arguments: 647 *
647// Buffer - the input buffer 648 * Arguments:
648// Length - the length of Buffer 649 * Buffer - the input buffer
649// 650 * Length - the length of Buffer
650// Return Value: 651 *
651// The 32-bit CRC value. 652 * Return Value:
652// 653 * The 32-bit CRC value.
653// Note: 654 * ===================================================================
654// This is adapted from the comments in the assembly language 655 */
655// version in _GENREQ.ASM of the DWB NE1000/2000 driver. 656u32 CardComputeCrc(u8 *Buffer, u32 Length)
656//==================================================================================
657u32
658CardComputeCrc(u8 * Buffer, u32 Length)
659{ 657{
660 u32 Crc, Carry; 658 u32 Crc, Carry;
661 u32 i, j; 659 u32 i, j;
662 u8 CurByte; 660 u8 CurByte;
663 661
664 Crc = 0xffffffff; 662 Crc = 0xffffffff;
665 663
666 for (i = 0; i < Length; i++) { 664 for (i = 0; i < Length; i++) {
667 665 CurByte = Buffer[i];
668 CurByte = Buffer[i]; 666 for (j = 0; j < 8; j++) {
669 667 Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
670 for (j = 0; j < 8; j++) { 668 Crc <<= 1;
671 669 CurByte >>= 1;
672 Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01); 670 if (Carry)
673 Crc <<= 1; 671 Crc = (Crc ^ 0x04c11db6) | Carry;
674 CurByte >>= 1; 672 }
675 673 }
676 if (Carry) { 674 return Crc;
677 Crc =(Crc ^ 0x04c11db6) | Carry;
678 }
679 }
680 }
681
682 return Crc;
683} 675}
684 676
685 677
686//================================================================== 678/*
687// BitReverse -- 679 * ==================================================================
688// Reverse the bits in the input argument, dwData, which is 680 * BitReverse --
689// regarded as a string of bits with the length, DataLength. 681 * Reverse the bits in the input argument, dwData, which is
690// 682 * regarded as a string of bits with the length, DataLength.
691// Arguments: 683 *
692// dwData : 684 * Arguments:
693// DataLength : 685 * dwData :
694// 686 * DataLength :
695// Return: 687 *
696// The converted value. 688 * Return:
697//================================================================== 689 * The converted value.
698u32 BitReverse( u32 dwData, u32 DataLength) 690 * ==================================================================
691 */
692u32 BitReverse(u32 dwData, u32 DataLength)
699{ 693{
700 u32 HalfLength, i, j; 694 u32 HalfLength, i, j;
701 u32 BitA, BitB; 695 u32 BitA, BitB;
702 696
703 if ( DataLength <= 0) return 0; // No conversion is done. 697 if (DataLength <= 0)
698 return 0; /* No conversion is done. */
704 dwData = dwData & (0xffffffff >> (32 - DataLength)); 699 dwData = dwData & (0xffffffff >> (32 - DataLength));
705 700
706 HalfLength = DataLength / 2; 701 HalfLength = DataLength / 2;
707 for ( i = 0, j = DataLength-1 ; i < HalfLength; i++, j--) 702 for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
708 { 703 BitA = GetBit(dwData, i);
709 BitA = GetBit( dwData, i); 704 BitB = GetBit(dwData, j);
710 BitB = GetBit( dwData, j);
711 if (BitA && !BitB) { 705 if (BitA && !BitB) {
712 dwData = ClearBit( dwData, i); 706 dwData = ClearBit(dwData, i);
713 dwData = SetBit( dwData, j); 707 dwData = SetBit(dwData, j);
714 } else if (!BitA && BitB) { 708 } else if (!BitA && BitB) {
715 dwData = SetBit( dwData, i); 709 dwData = SetBit(dwData, i);
716 dwData = ClearBit( dwData, j); 710 dwData = ClearBit(dwData, j);
717 } else 711 } else {
718 { 712 /* Do nothing since these two bits are of the save values. */
719 // Do nothing since these two bits are of the save values.
720 } 713 }
721 } 714 }
722
723 return dwData; 715 return dwData;
724} 716}
725 717
726void Wb35Reg_phy_calibration( struct hw_data * pHwData ) 718void Wb35Reg_phy_calibration(struct hw_data *pHwData)
727{ 719{
728 u32 BB3c, BB54; 720 u32 BB3c, BB54;
729 721
730 if ((pHwData->phy_type == RF_WB_242) || 722 if ((pHwData->phy_type == RF_WB_242) ||
731 (pHwData->phy_type == RF_WB_242_1)) { 723 (pHwData->phy_type == RF_WB_242_1)) {
732 phy_calibration_winbond ( pHwData, 2412 ); // Sync operation 724 phy_calibration_winbond(pHwData, 2412); /* Sync operation */
733 Wb35Reg_ReadSync( pHwData, 0x103c, &BB3c ); 725 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
734 Wb35Reg_ReadSync( pHwData, 0x1054, &BB54 ); 726 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
735 727
736 pHwData->BB3c_cal = BB3c; 728 pHwData->BB3c_cal = BB3c;
737 pHwData->BB54_cal = BB54; 729 pHwData->BB54_cal = BB54;
738 730
739 RFSynthesizer_initial(pHwData); 731 RFSynthesizer_initial(pHwData);
740 BBProcessor_initial(pHwData); // Async operation 732 BBProcessor_initial(pHwData); /* Async operation */
741 733
742 Wb35Reg_WriteSync( pHwData, 0x103c, BB3c ); 734 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
743 Wb35Reg_WriteSync( pHwData, 0x1054, BB54 ); 735 Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
744 } 736 }
745} 737}
746 738
diff --git a/drivers/staging/winbond/wb35reg_f.h b/drivers/staging/winbond/wb35reg_f.h
index d352bce5c171..bf23c1084199 100644
--- a/drivers/staging/winbond/wb35reg_f.h
+++ b/drivers/staging/winbond/wb35reg_f.h
@@ -3,59 +3,63 @@
3 3
4#include "wbhal_s.h" 4#include "wbhal_s.h"
5 5
6//==================================== 6/*
7// Interface function declare 7 * ====================================
8//==================================== 8 * Interface function declare
9unsigned char Wb35Reg_initial( struct hw_data * pHwData ); 9 * ====================================
10void Uxx_power_on_procedure( struct hw_data * pHwData ); 10 */
11void Uxx_power_off_procedure( struct hw_data * pHwData ); 11unsigned char Wb35Reg_initial(struct hw_data *hw_data);
12void Uxx_ReadEthernetAddress( struct hw_data * pHwData ); 12void Uxx_power_on_procedure(struct hw_data *hw_data);
13void Dxx_initial( struct hw_data * pHwData ); 13void Uxx_power_off_procedure(struct hw_data *hw_data);
14void Mxx_initial( struct hw_data * pHwData ); 14void Uxx_ReadEthernetAddress(struct hw_data *hw_data);
15void RFSynthesizer_initial( struct hw_data * pHwData ); 15void Dxx_initial(struct hw_data *hw_data);
16//void RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, s8 Channel ); 16void Mxx_initial(struct hw_data *hw_data);
17void RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, struct chan_info Channel ); 17void RFSynthesizer_initial(struct hw_data *hw_data);
18void BBProcessor_initial( struct hw_data * pHwData ); 18void RFSynthesizer_SwitchingChannel(struct hw_data *hw_data, struct chan_info channel);
19void BBProcessor_RateChanging( struct hw_data * pHwData, u8 rate ); // 20060613.1 19void BBProcessor_initial(struct hw_data *hw_data);
20//void RF_RateChanging( struct hw_data * pHwData, u8 rate ); // 20060626.5.c Add 20void BBProcessor_RateChanging(struct hw_data *hw_data, u8 rate);
21u8 RFSynthesizer_SetPowerIndex( struct hw_data * pHwData, u8 PowerIndex ); 21u8 RFSynthesizer_SetPowerIndex(struct hw_data *hw_data, u8 power_index);
22u8 RFSynthesizer_SetMaxim2828_24Power( struct hw_data *, u8 index ); 22u8 RFSynthesizer_SetMaxim2828_24Power(struct hw_data *, u8 index);
23u8 RFSynthesizer_SetMaxim2828_50Power( struct hw_data *, u8 index ); 23u8 RFSynthesizer_SetMaxim2828_50Power(struct hw_data *, u8 index);
24u8 RFSynthesizer_SetMaxim2827_24Power( struct hw_data *, u8 index ); 24u8 RFSynthesizer_SetMaxim2827_24Power(struct hw_data *, u8 index);
25u8 RFSynthesizer_SetMaxim2827_50Power( struct hw_data *, u8 index ); 25u8 RFSynthesizer_SetMaxim2827_50Power(struct hw_data *, u8 index);
26u8 RFSynthesizer_SetMaxim2825Power( struct hw_data *, u8 index ); 26u8 RFSynthesizer_SetMaxim2825Power(struct hw_data *, u8 index);
27u8 RFSynthesizer_SetAiroha2230Power( struct hw_data *, u8 index ); 27u8 RFSynthesizer_SetAiroha2230Power(struct hw_data *, u8 index);
28u8 RFSynthesizer_SetAiroha7230Power( struct hw_data *, u8 index ); 28u8 RFSynthesizer_SetAiroha7230Power(struct hw_data *, u8 index);
29u8 RFSynthesizer_SetWinbond242Power( struct hw_data *, u8 index ); 29u8 RFSynthesizer_SetWinbond242Power(struct hw_data *, u8 index);
30void GetTxVgaFromEEPROM( struct hw_data * pHwData ); 30void GetTxVgaFromEEPROM(struct hw_data *hw_data);
31void EEPROMTxVgaAdjust( struct hw_data * pHwData ); // 20060619.5 Add 31void EEPROMTxVgaAdjust(struct hw_data *hw_data);
32 32
33#define RFWriteControlData( _A, _V ) Wb35Reg_Write( _A, 0x0864, _V ) 33#define RFWriteControlData(_A, _V) Wb35Reg_Write(_A, 0x0864, _V)
34 34
35void Wb35Reg_destroy( struct hw_data * pHwData ); 35void Wb35Reg_destroy(struct hw_data *hw_data);
36 36
37unsigned char Wb35Reg_Read( struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterValue ); 37unsigned char Wb35Reg_Read(struct hw_data *hw_data, u16 register_no, u32 *register_value);
38unsigned char Wb35Reg_ReadSync( struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterValue ); 38unsigned char Wb35Reg_ReadSync(struct hw_data *hw_data, u16 register_no, u32 *register_value);
39unsigned char Wb35Reg_Write( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue ); 39unsigned char Wb35Reg_Write(struct hw_data *hw_data, u16 register_no, u32 register_value);
40unsigned char Wb35Reg_WriteSync( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue ); 40unsigned char Wb35Reg_WriteSync(struct hw_data *hw_data, u16 register_no, u32 register_value);
41unsigned char Wb35Reg_WriteWithCallbackValue( struct hw_data * pHwData, 41unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *hw_data,
42 u16 RegisterNo, 42 u16 register_no,
43 u32 RegisterValue, 43 u32 register_value,
44 s8 *pValue, 44 s8 *value,
45 s8 Len); 45 s8 len);
46unsigned char Wb35Reg_BurstWrite( struct hw_data * pHwData, u16 RegisterNo, u32 * pRegisterData, u8 NumberOfData, u8 Flag ); 46unsigned char Wb35Reg_BurstWrite(struct hw_data *hw_data,
47 47 u16 register_no,
48void Wb35Reg_EP0VM( struct hw_data * pHwData ); 48 u32 *register_data,
49void Wb35Reg_EP0VM_start( struct hw_data * pHwData ); 49 u8 number_of_data,
50 u8 flag);
51
52void Wb35Reg_EP0VM(struct hw_data *hw_data);
53void Wb35Reg_EP0VM_start(struct hw_data *hw_data);
50void Wb35Reg_EP0VM_complete(struct urb *urb); 54void Wb35Reg_EP0VM_complete(struct urb *urb);
51 55
52u32 BitReverse( u32 dwData, u32 DataLength); 56u32 BitReverse(u32 data, u32 data_length);
53 57
54void CardGetMulticastBit( u8 Address[MAC_ADDR_LENGTH], u8 *Byte, u8 *Value ); 58void CardGetMulticastBit(u8 address[MAC_ADDR_LENGTH], u8 *byte, u8 *value);
55u32 CardComputeCrc( u8 * Buffer, u32 Length ); 59u32 CardComputeCrc(u8 *buffer, u32 length);
56 60
57void Wb35Reg_phy_calibration( struct hw_data * pHwData ); 61void Wb35Reg_phy_calibration(struct hw_data *hw_data);
58void Wb35Reg_Update( struct hw_data * pHwData, u16 RegisterNo, u32 RegisterValue ); 62void Wb35Reg_Update(struct hw_data *hw_data, u16 register_no, u32 register_value);
59unsigned char adjust_TXVGA_for_iq_mag( struct hw_data * pHwData ); 63unsigned char adjust_TXVGA_for_iq_mag(struct hw_data *hw_data);
60 64
61#endif 65#endif
diff --git a/drivers/staging/winbond/wb35reg_s.h b/drivers/staging/winbond/wb35reg_s.h
index 32ef4b8a2d2a..4eff009444b8 100644
--- a/drivers/staging/winbond/wb35reg_s.h
+++ b/drivers/staging/winbond/wb35reg_s.h
@@ -5,98 +5,100 @@
5#include <linux/types.h> 5#include <linux/types.h>
6#include <asm/atomic.h> 6#include <asm/atomic.h>
7 7
8//======================================================================================= 8/* =========================================================================
9/* 9 *
10 HAL setting function 10 * HAL setting function
11 11 *
12 ======================================== 12 * ========================================
13 |Uxx| |Dxx| |Mxx| |BB| |RF| 13 * |Uxx| |Dxx| |Mxx| |BB| |RF|
14 ======================================== 14 * ========================================
15 | | 15 * | |
16 Wb35Reg_Read Wb35Reg_Write 16 * Wb35Reg_Read Wb35Reg_Write
17 17 *
18 ---------------------------------------- 18 * ----------------------------------------
19 WbUsb_CallUSBDASync supplied By WbUsb module 19 * WbUsb_CallUSBDASync supplied By WbUsb module
20*/ 20 * ==========================================================================
21//======================================================================================= 21 */
22 22#define GetBit(dwData, i) (dwData & (0x00000001 << i))
23#define GetBit( dwData, i) ( dwData & (0x00000001 << i)) 23#define SetBit(dwData, i) (dwData | (0x00000001 << i))
24#define SetBit( dwData, i) ( dwData | (0x00000001 << i)) 24#define ClearBit(dwData, i) (dwData & ~(0x00000001 << i))
25#define ClearBit( dwData, i) ( dwData & ~(0x00000001 << i)) 25
26 26#define IGNORE_INCREMENT 0
27#define IGNORE_INCREMENT 0 27#define AUTO_INCREMENT 0
28#define AUTO_INCREMENT 0 28#define NO_INCREMENT 1
29#define NO_INCREMENT 1 29#define REG_DIRECTION(_x, _y) ((_y)->DIRECT == 0 ? usb_rcvctrlpipe(_x, 0) : usb_sndctrlpipe(_x, 0))
30#define REG_DIRECTION(_x,_y) ((_y)->DIRECT ==0 ? usb_rcvctrlpipe(_x,0) : usb_sndctrlpipe(_x,0)) 30#define REG_BUF_SIZE(_x) ((_x)->bRequest == 0x04 ? cpu_to_le16((_x)->wLength) : 4)
31#define REG_BUF_SIZE(_x) ((_x)->bRequest== 0x04 ? cpu_to_le16((_x)->wLength) : 4) 31
32
33// 20060613.2 Add the follow definition
34#define BB48_DEFAULT_AL2230_11B 0x0033447c 32#define BB48_DEFAULT_AL2230_11B 0x0033447c
35#define BB4C_DEFAULT_AL2230_11B 0x0A00FEFF 33#define BB4C_DEFAULT_AL2230_11B 0x0A00FEFF
36#define BB48_DEFAULT_AL2230_11G 0x00332C1B 34#define BB48_DEFAULT_AL2230_11G 0x00332C1B
37#define BB4C_DEFAULT_AL2230_11G 0x0A00FEFF 35#define BB4C_DEFAULT_AL2230_11G 0x0A00FEFF
38 36
39 37
40#define BB48_DEFAULT_WB242_11B 0x00292315 //backoff 2dB 38#define BB48_DEFAULT_WB242_11B 0x00292315 /* backoff 2dB */
41#define BB4C_DEFAULT_WB242_11B 0x0800FEFF //backoff 2dB 39#define BB4C_DEFAULT_WB242_11B 0x0800FEFF /* backoff 2dB */
42//#define BB48_DEFAULT_WB242_11B 0x00201B11 //backoff 4dB
43//#define BB4C_DEFAULT_WB242_11B 0x0600FF00 //backoff 4dB
44#define BB48_DEFAULT_WB242_11G 0x00453B24 40#define BB48_DEFAULT_WB242_11G 0x00453B24
45#define BB4C_DEFAULT_WB242_11G 0x0E00FEFF 41#define BB4C_DEFAULT_WB242_11G 0x0E00FEFF
46 42
47//==================================== 43/*
48// Default setting for Mxx 44 * ====================================
49//==================================== 45 * Default setting for Mxx
50#define DEFAULT_CWMIN 31 //(M2C) CWmin. Its value is in the range 0-31. 46 * ====================================
51#define DEFAULT_CWMAX 1023 //(M2C) CWmax. Its value is in the range 0-1023. 47 */
52#define DEFAULT_AID 1 //(M34) AID. Its value is in the range 1-2007. 48#define DEFAULT_CWMIN 31 /* (M2C) CWmin. Its value is in the range 0-31. */
49#define DEFAULT_CWMAX 1023 /* (M2C) CWmax. Its value is in the range 0-1023. */
50#define DEFAULT_AID 1 /* (M34) AID. Its value is in the range 1-2007. */
53 51
54#ifdef _USE_FALLBACK_RATE_ 52#ifdef _USE_FALLBACK_RATE_
55#define DEFAULT_RATE_RETRY_LIMIT 2 //(M38) as named 53#define DEFAULT_RATE_RETRY_LIMIT 2 /* (M38) as named */
56#else 54#else
57#define DEFAULT_RATE_RETRY_LIMIT 7 //(M38) as named 55#define DEFAULT_RATE_RETRY_LIMIT 7 /* (M38) as named */
58#endif 56#endif
59 57
60#define DEFAULT_LONG_RETRY_LIMIT 7 //(M38) LongRetryLimit. Its value is in the range 0-15. 58#define DEFAULT_LONG_RETRY_LIMIT 7 /* (M38) LongRetryLimit. Its value is in the range 0-15. */
61#define DEFAULT_SHORT_RETRY_LIMIT 7 //(M38) ShortRetryLimit. Its value is in the range 0-15. 59#define DEFAULT_SHORT_RETRY_LIMIT 7 /* (M38) ShortRetryLimit. Its value is in the range 0-15. */
62#define DEFAULT_PIFST 25 //(M3C) PIFS Time. Its value is in the range 0-65535. 60#define DEFAULT_PIFST 25 /* (M3C) PIFS Time. Its value is in the range 0-65535. */
63#define DEFAULT_EIFST 354 //(M3C) EIFS Time. Its value is in the range 0-1048575. 61#define DEFAULT_EIFST 354 /* (M3C) EIFS Time. Its value is in the range 0-1048575. */
64#define DEFAULT_DIFST 45 //(M3C) DIFS Time. Its value is in the range 0-65535. 62#define DEFAULT_DIFST 45 /* (M3C) DIFS Time. Its value is in the range 0-65535. */
65#define DEFAULT_SIFST 5 //(M3C) SIFS Time. Its value is in the range 0-65535. 63#define DEFAULT_SIFST 5 /* (M3C) SIFS Time. Its value is in the range 0-65535. */
66#define DEFAULT_OSIFST 10 //(M3C) Original SIFS Time. Its value is in the range 0-15. 64#define DEFAULT_OSIFST 10 /* (M3C) Original SIFS Time. Its value is in the range 0-15. */
67#define DEFAULT_ATIMWD 0 //(M40) ATIM Window. Its value is in the range 0-65535. 65#define DEFAULT_ATIMWD 0 /* (M40) ATIM Window. Its value is in the range 0-65535. */
68#define DEFAULT_SLOT_TIME 20 //(M40) ($) SlotTime. Its value is in the range 0-255. 66#define DEFAULT_SLOT_TIME 20 /* (M40) ($) SlotTime. Its value is in the range 0-255. */
69#define DEFAULT_MAX_TX_MSDU_LIFE_TIME 512 //(M44) MaxTxMSDULifeTime. Its value is in the range 0-4294967295. 67#define DEFAULT_MAX_TX_MSDU_LIFE_TIME 512 /* (M44) MaxTxMSDULifeTime. Its value is in the range 0-4294967295. */
70#define DEFAULT_BEACON_INTERVAL 500 //(M48) Beacon Interval. Its value is in the range 0-65535. 68#define DEFAULT_BEACON_INTERVAL 500 /* (M48) Beacon Interval. Its value is in the range 0-65535. */
71#define DEFAULT_PROBE_DELAY_TIME 200 //(M48) Probe Delay Time. Its value is in the range 0-65535. 69#define DEFAULT_PROBE_DELAY_TIME 200 /* (M48) Probe Delay Time. Its value is in the range 0-65535. */
72#define DEFAULT_PROTOCOL_VERSION 0 //(M4C) 70#define DEFAULT_PROTOCOL_VERSION 0 /* (M4C) */
73#define DEFAULT_MAC_POWER_STATE 2 //(M4C) 2: MAC at power active 71#define DEFAULT_MAC_POWER_STATE 2 /* (M4C) 2: MAC at power active */
74#define DEFAULT_DTIM_ALERT_TIME 0 72#define DEFAULT_DTIM_ALERT_TIME 0
75 73
76 74
77struct wb35_reg_queue { 75struct wb35_reg_queue {
78 struct urb *urb; 76 struct urb *urb;
79 void *pUsbReq; 77 void *pUsbReq;
80 void *Next; 78 void *Next;
81 union { 79 union {
82 u32 VALUE; 80 u32 VALUE;
83 u32 *pBuffer; 81 u32 *pBuffer;
84 }; 82 };
85 u8 RESERVED[4]; // space reserved for communication 83 u8 RESERVED[4]; /* space reserved for communication */
86 u16 INDEX; // For storing the register index 84 u16 INDEX; /* For storing the register index */
87 u8 RESERVED_VALID; // Indicate whether the RESERVED space is valid at this command. 85 u8 RESERVED_VALID; /* Indicate whether the RESERVED space is valid at this command. */
88 u8 DIRECT; // 0:In 1:Out 86 u8 DIRECT; /* 0:In 1:Out */
89}; 87};
90 88
91//==================================== 89/*
92// Internal variable for module 90 * ====================================
93//==================================== 91 * Internal variable for module
92 * ====================================
93 */
94#define MAX_SQ3_FILTER_SIZE 5 94#define MAX_SQ3_FILTER_SIZE 5
95struct wb35_reg { 95struct wb35_reg {
96 //============================ 96 /*
97 // Register Bank backup 97 * ============================
98 //============================ 98 * Register Bank backup
99 u32 U1B0; //bit16 record the h/w radio on/off status 99 * ============================
100 */
101 u32 U1B0; /* bit16 record the h/w radio on/off status */
100 u32 U1BC_LEDConfigure; 102 u32 U1BC_LEDConfigure;
101 u32 D00_DmaControl; 103 u32 D00_DmaControl;
102 u32 M00_MacControl; 104 u32 M00_MacControl;
@@ -105,68 +107,65 @@ struct wb35_reg {
105 u32 M04_MulticastAddress1; 107 u32 M04_MulticastAddress1;
106 u32 M08_MulticastAddress2; 108 u32 M08_MulticastAddress2;
107 }; 109 };
108 u8 Multicast[8]; // contents of card multicast registers 110 u8 Multicast[8]; /* contents of card multicast registers */
109 }; 111 };
110 112
111 u32 M24_MacControl; 113 u32 M24_MacControl;
112 u32 M28_MacControl; 114 u32 M28_MacControl;
113 u32 M2C_MacControl; 115 u32 M2C_MacControl;
114 u32 M38_MacControl; 116 u32 M38_MacControl;
115 u32 M3C_MacControl; // 20060214 backup only 117 u32 M3C_MacControl;
116 u32 M40_MacControl; 118 u32 M40_MacControl;
117 u32 M44_MacControl; // 20060214 backup only 119 u32 M44_MacControl;
118 u32 M48_MacControl; // 20060214 backup only 120 u32 M48_MacControl;
119 u32 M4C_MacStatus; 121 u32 M4C_MacStatus;
120 u32 M60_MacControl; // 20060214 backup only 122 u32 M60_MacControl;
121 u32 M68_MacControl; // 20060214 backup only 123 u32 M68_MacControl;
122 u32 M70_MacControl; // 20060214 backup only 124 u32 M70_MacControl;
123 u32 M74_MacControl; // 20060214 backup only 125 u32 M74_MacControl;
124 u32 M78_ERPInformation;//930206.2.b 126 u32 M78_ERPInformation;
125 u32 M7C_MacControl; // 20060214 backup only 127 u32 M7C_MacControl;
126 u32 M80_MacControl; // 20060214 backup only 128 u32 M80_MacControl;
127 u32 M84_MacControl; // 20060214 backup only 129 u32 M84_MacControl;
128 u32 M88_MacControl; // 20060214 backup only 130 u32 M88_MacControl;
129 u32 M98_MacControl; // 20060214 backup only 131 u32 M98_MacControl;
130 132
131 //[20040722 WK] 133 /* Baseband register */
132 //Baseband register 134 u32 BB0C; /* Used for LNA calculation */
133 u32 BB0C; // Used for LNA calculation 135 u32 BB2C;
134 u32 BB2C; // 136 u32 BB30; /* 11b acquisition control register */
135 u32 BB30; //11b acquisition control register
136 u32 BB3C; 137 u32 BB3C;
137 u32 BB48; // 20051221.1.a 20060613.1 Fix OBW issue of 11b/11g rate 138 u32 BB48;
138 u32 BB4C; // 20060613.1 Fix OBW issue of 11b/11g rate 139 u32 BB4C;
139 u32 BB50; //mode control register 140 u32 BB50; /* mode control register */
140 u32 BB54; 141 u32 BB54;
141 u32 BB58; //IQ_ALPHA 142 u32 BB58; /* IQ_ALPHA */
142 u32 BB5C; // For test 143 u32 BB5C; /* For test */
143 u32 BB60; // for WTO read value 144 u32 BB60; /* for WTO read value */
144 145
145 //------------------- 146 /* VM */
146 // VM 147 spinlock_t EP0VM_spin_lock; /* 4B */
147 //------------------- 148 u32 EP0VM_status; /* $$ */
148 spinlock_t EP0VM_spin_lock; // 4B
149 u32 EP0VM_status;//$$
150 struct wb35_reg_queue *reg_first; 149 struct wb35_reg_queue *reg_first;
151 struct wb35_reg_queue *reg_last; 150 struct wb35_reg_queue *reg_last;
152 atomic_t RegFireCount; 151 atomic_t RegFireCount;
153 152
154 // Hardware status 153 /* Hardware status */
155 u8 EP0vm_state; 154 u8 EP0vm_state;
156 u8 mac_power_save; 155 u8 mac_power_save;
157 u8 EEPROMPhyType; // 0 ~ 15 for Maxim (0 ĄV MAX2825, 1 ĄV MAX2827, 2 ĄV MAX2828, 3 ĄV MAX2829), 156 u8 EEPROMPhyType; /*
158 // 16 ~ 31 for Airoha (16 ĄV AL2230, 11 - AL7230) 157 * 0 ~ 15 for Maxim (0 ĄV MAX2825, 1 ĄV MAX2827, 2 ĄV MAX2828, 3 ĄV MAX2829),
159 // 32 ~ Reserved 158 * 16 ~ 31 for Airoha (16 ĄV AL2230, 11 - AL7230)
160 // 33 ~ 47 For WB242 ( 33 - WB242, 34 - WB242 with new Txvga 0.5 db step) 159 * 32 ~ Reserved
161 // 48 ~ 255 ARE RESERVED. 160 * 33 ~ 47 For WB242 ( 33 - WB242, 34 - WB242 with new Txvga 0.5 db step)
162 u8 EEPROMRegion; //Region setting in EEPROM 161 * 48 ~ 255 ARE RESERVED.
163 162 */
164 u32 SyncIoPause; // If user use the Sync Io to access Hw, then pause the async access 163 u8 EEPROMRegion; /* Region setting in EEPROM */
165 164
166 u8 LNAValue[4]; //Table for speed up running 165 u32 SyncIoPause; /* If user use the Sync Io to access Hw, then pause the async access */
166
167 u8 LNAValue[4]; /* Table for speed up running */
167 u32 SQ3_filter[MAX_SQ3_FILTER_SIZE]; 168 u32 SQ3_filter[MAX_SQ3_FILTER_SIZE];
168 u32 SQ3_index; 169 u32 SQ3_index;
169
170}; 170};
171
172#endif 171#endif
diff --git a/drivers/staging/winbond/wb35rx.c b/drivers/staging/winbond/wb35rx.c
index d7b57e62db08..efe82b141c10 100644
--- a/drivers/staging/winbond/wb35rx.c
+++ b/drivers/staging/winbond/wb35rx.c
@@ -1,13 +1,15 @@
1//============================================================================ 1/*
2// Copyright (c) 1996-2002 Winbond Electronic Corporation 2 * ============================================================================
3// 3 * Copyright (c) 1996-2002 Winbond Electronic Corporation
4// Module Name: 4 *
5// Wb35Rx.c 5 * Module Name:
6// 6 * Wb35Rx.c
7// Abstract: 7 *
8// Processing the Rx message from down layer 8 * Abstract:
9// 9 * Processing the Rx message from down layer
10//============================================================================ 10 *
11 * ============================================================================
12 */
11#include <linux/usb.h> 13#include <linux/usb.h>
12#include <linux/slab.h> 14#include <linux/slab.h>
13 15
@@ -30,16 +32,7 @@ static void packet_came(struct ieee80211_hw *hw, char *pRxBufferAddress, int Pac
30 return; 32 return;
31 } 33 }
32 34
33 memcpy(skb_put(skb, PacketSize), 35 memcpy(skb_put(skb, PacketSize), pRxBufferAddress, PacketSize);
34 pRxBufferAddress,
35 PacketSize);
36
37/*
38 rx_status.rate = 10;
39 rx_status.channel = 1;
40 rx_status.freq = 12345;
41 rx_status.phymode = MODE_IEEE80211B;
42*/
43 36
44 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 37 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
45 ieee80211_rx_irqsafe(hw, skb); 38 ieee80211_rx_irqsafe(hw, skb);
@@ -47,7 +40,7 @@ static void packet_came(struct ieee80211_hw *hw, char *pRxBufferAddress, int Pac
47 40
48static void Wb35Rx_adjust(struct wb35_descriptor *pRxDes) 41static void Wb35Rx_adjust(struct wb35_descriptor *pRxDes)
49{ 42{
50 u32 * pRxBufferAddress; 43 u32 *pRxBufferAddress;
51 u32 DecryptionMethod; 44 u32 DecryptionMethod;
52 u32 i; 45 u32 i;
53 u16 BufferSize; 46 u16 BufferSize;
@@ -56,81 +49,80 @@ static void Wb35Rx_adjust(struct wb35_descriptor *pRxDes)
56 pRxBufferAddress = pRxDes->buffer_address[0]; 49 pRxBufferAddress = pRxDes->buffer_address[0];
57 BufferSize = pRxDes->buffer_size[0]; 50 BufferSize = pRxDes->buffer_size[0];
58 51
59 // Adjust the last part of data. Only data left 52 /* Adjust the last part of data. Only data left */
60 BufferSize -= 4; // For CRC-32 53 BufferSize -= 4; /* For CRC-32 */
61 if (DecryptionMethod) 54 if (DecryptionMethod)
62 BufferSize -= 4; 55 BufferSize -= 4;
63 if (DecryptionMethod == 3) // For CCMP 56 if (DecryptionMethod == 3) /* For CCMP */
64 BufferSize -= 4; 57 BufferSize -= 4;
65 58
66 // Adjust the IV field which after 802.11 header and ICV field. 59 /* Adjust the IV field which after 802.11 header and ICV field. */
67 if (DecryptionMethod == 1) // For WEP 60 if (DecryptionMethod == 1) { /* For WEP */
68 { 61 for (i = 6; i > 0; i--)
69 for( i=6; i>0; i-- ) 62 pRxBufferAddress[i] = pRxBufferAddress[i - 1];
70 pRxBufferAddress[i] = pRxBufferAddress[i-1];
71 pRxDes->buffer_address[0] = pRxBufferAddress + 1; 63 pRxDes->buffer_address[0] = pRxBufferAddress + 1;
72 BufferSize -= 4; // 4 byte for IV 64 BufferSize -= 4; /* 4 byte for IV */
73 } 65 } else if (DecryptionMethod) { /* For TKIP and CCMP */
74 else if( DecryptionMethod ) // For TKIP and CCMP 66 for (i = 7; i > 1; i--)
75 { 67 pRxBufferAddress[i] = pRxBufferAddress[i - 2];
76 for (i=7; i>1; i--) 68 pRxDes->buffer_address[0] = pRxBufferAddress + 2; /* Update the descriptor, shift 8 byte */
77 pRxBufferAddress[i] = pRxBufferAddress[i-2]; 69 BufferSize -= 8; /* 8 byte for IV + ICV */
78 pRxDes->buffer_address[0] = pRxBufferAddress + 2;//Update the descriptor, shift 8 byte
79 BufferSize -= 8; // 8 byte for IV + ICV
80 } 70 }
81 pRxDes->buffer_size[0] = BufferSize; 71 pRxDes->buffer_size[0] = BufferSize;
82} 72}
83 73
84static u16 Wb35Rx_indicate(struct ieee80211_hw *hw) 74static u16 Wb35Rx_indicate(struct ieee80211_hw *hw)
85{ 75{
86 struct wbsoft_priv *priv = hw->priv; 76 struct wbsoft_priv *priv = hw->priv;
87 struct hw_data * pHwData = &priv->sHwData; 77 struct hw_data *pHwData = &priv->sHwData;
88 struct wb35_descriptor RxDes; 78 struct wb35_descriptor RxDes;
89 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 79 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
90 u8 * pRxBufferAddress; 80 u8 *pRxBufferAddress;
91 u16 PacketSize; 81 u16 PacketSize;
92 u16 stmp, BufferSize, stmp2 = 0; 82 u16 stmp, BufferSize, stmp2 = 0;
93 u32 RxBufferId; 83 u32 RxBufferId;
94 84
95 // Only one thread be allowed to run into the following 85 /* Only one thread be allowed to run into the following */
96 do { 86 do {
97 RxBufferId = pWb35Rx->RxProcessIndex; 87 RxBufferId = pWb35Rx->RxProcessIndex;
98 if (pWb35Rx->RxOwner[ RxBufferId ]) //Owner by VM 88 if (pWb35Rx->RxOwner[RxBufferId]) /* Owner by VM */
99 break; 89 break;
100 90
101 pWb35Rx->RxProcessIndex++; 91 pWb35Rx->RxProcessIndex++;
102 pWb35Rx->RxProcessIndex %= MAX_USB_RX_BUFFER_NUMBER; 92 pWb35Rx->RxProcessIndex %= MAX_USB_RX_BUFFER_NUMBER;
103 93
104 pRxBufferAddress = pWb35Rx->pDRx; 94 pRxBufferAddress = pWb35Rx->pDRx;
105 BufferSize = pWb35Rx->RxBufferSize[ RxBufferId ]; 95 BufferSize = pWb35Rx->RxBufferSize[RxBufferId];
106 96
107 // Parse the bulkin buffer 97 /* Parse the bulkin buffer */
108 while (BufferSize >= 4) { 98 while (BufferSize >= 4) {
109 if ((cpu_to_le32(*(u32 *)pRxBufferAddress) & 0x0fffffff) == RX_END_TAG) //Is ending? 921002.9.a 99 if ((cpu_to_le32(*(u32 *)pRxBufferAddress) & 0x0fffffff) == RX_END_TAG) /* Is ending? */
110 break; 100 break;
111 101
112 // Get the R00 R01 first 102 /* Get the R00 R01 first */
113 RxDes.R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress); 103 RxDes.R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
114 PacketSize = (u16)RxDes.R00.R00_receive_byte_count; 104 PacketSize = (u16)RxDes.R00.R00_receive_byte_count;
115 RxDes.R01.value = le32_to_cpu(*((u32 *)(pRxBufferAddress+4))); 105 RxDes.R01.value = le32_to_cpu(*((u32 *)(pRxBufferAddress + 4)));
116 // For new DMA 4k 106 /* For new DMA 4k */
117 if ((PacketSize & 0x03) > 0) 107 if ((PacketSize & 0x03) > 0)
118 PacketSize -= 4; 108 PacketSize -= 4;
119 109
120 // Basic check for Rx length. Is length valid? 110 /* Basic check for Rx length. Is length valid? */
121 if (PacketSize > MAX_PACKET_SIZE) { 111 if (PacketSize > MAX_PACKET_SIZE) {
122 #ifdef _PE_RX_DUMP_ 112#ifdef _PE_RX_DUMP_
123 printk("Serious ERROR : Rx data size too long, size =%d\n", PacketSize); 113 printk("Serious ERROR : Rx data size too long, size =%d\n", PacketSize);
124 #endif 114#endif
125 115
126 pWb35Rx->EP3vm_state = VM_STOP; 116 pWb35Rx->EP3vm_state = VM_STOP;
127 pWb35Rx->Ep3ErrorCount2++; 117 pWb35Rx->Ep3ErrorCount2++;
128 break; 118 break;
129 } 119 }
130 120
131 // Start to process Rx buffer 121 /*
132// RxDes.Descriptor_ID = RxBufferId; // Due to synchronous indicate, the field doesn't necessary to use. 122 * Wb35Rx_indicate() is called synchronously so it isn't
133 BufferSize -= 8; //subtract 8 byte for 35's USB header length 123 * necessary to set "RxDes.Desctriptor_ID = RxBufferID;"
124 */
125 BufferSize -= 8; /* subtract 8 byte for 35's USB header length */
134 pRxBufferAddress += 8; 126 pRxBufferAddress += 8;
135 127
136 RxDes.buffer_address[0] = pRxBufferAddress; 128 RxDes.buffer_address[0] = pRxBufferAddress;
@@ -142,18 +134,17 @@ static u16 Wb35Rx_indicate(struct ieee80211_hw *hw)
142 134
143 packet_came(hw, pRxBufferAddress, PacketSize); 135 packet_came(hw, pRxBufferAddress, PacketSize);
144 136
145 // Move RxBuffer point to the next 137 /* Move RxBuffer point to the next */
146 stmp = PacketSize + 3; 138 stmp = PacketSize + 3;
147 stmp &= ~0x03; // 4n alignment 139 stmp &= ~0x03; /* 4n alignment */
148 pRxBufferAddress += stmp; 140 pRxBufferAddress += stmp;
149 BufferSize -= stmp; 141 BufferSize -= stmp;
150 stmp2 += stmp; 142 stmp2 += stmp;
151 } 143 }
152 144
153 // Reclaim resource 145 /* Reclaim resource */
154 pWb35Rx->RxOwner[ RxBufferId ] = 1; 146 pWb35Rx->RxOwner[RxBufferId] = 1;
155 } while (true); 147 } while (true);
156
157 return stmp2; 148 return stmp2;
158} 149}
159 150
@@ -161,112 +152,110 @@ static void Wb35Rx(struct ieee80211_hw *hw);
161 152
162static void Wb35Rx_Complete(struct urb *urb) 153static void Wb35Rx_Complete(struct urb *urb)
163{ 154{
164 struct ieee80211_hw *hw = urb->context; 155 struct ieee80211_hw *hw = urb->context;
165 struct wbsoft_priv *priv = hw->priv; 156 struct wbsoft_priv *priv = hw->priv;
166 struct hw_data * pHwData = &priv->sHwData; 157 struct hw_data *pHwData = &priv->sHwData;
167 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 158 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
168 u8 * pRxBufferAddress; 159 u8 *pRxBufferAddress;
169 u32 SizeCheck; 160 u32 SizeCheck;
170 u16 BulkLength; 161 u16 BulkLength;
171 u32 RxBufferId; 162 u32 RxBufferId;
172 R00_DESCRIPTOR R00; 163 R00_DESCRIPTOR R00;
173 164
174 // Variable setting 165 /* Variable setting */
175 pWb35Rx->EP3vm_state = VM_COMPLETED; 166 pWb35Rx->EP3vm_state = VM_COMPLETED;
176 pWb35Rx->EP3VM_status = urb->status;//Store the last result of Irp 167 pWb35Rx->EP3VM_status = urb->status; /* Store the last result of Irp */
177 168
178 RxBufferId = pWb35Rx->CurrentRxBufferId; 169 RxBufferId = pWb35Rx->CurrentRxBufferId;
179 170
180 pRxBufferAddress = pWb35Rx->pDRx; 171 pRxBufferAddress = pWb35Rx->pDRx;
181 BulkLength = (u16)urb->actual_length; 172 BulkLength = (u16)urb->actual_length;
182 173
183 // The IRP is completed 174 /* The IRP is completed */
184 pWb35Rx->EP3vm_state = VM_COMPLETED; 175 pWb35Rx->EP3vm_state = VM_COMPLETED;
185 176
186 if (pHwData->SurpriseRemove || pHwData->HwStop) // Must be here, or RxBufferId is invalid 177 if (pHwData->SurpriseRemove || pHwData->HwStop) /* Must be here, or RxBufferId is invalid */
187 goto error; 178 goto error;
188 179
189 if (pWb35Rx->rx_halt) 180 if (pWb35Rx->rx_halt)
190 goto error; 181 goto error;
191 182
192 // Start to process the data only in successful condition 183 /* Start to process the data only in successful condition */
193 pWb35Rx->RxOwner[ RxBufferId ] = 0; // Set the owner to driver 184 pWb35Rx->RxOwner[RxBufferId] = 0; /* Set the owner to driver */
194 R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress); 185 R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
195 186
196 // The URB is completed, check the result 187 /* The URB is completed, check the result */
197 if (pWb35Rx->EP3VM_status != 0) { 188 if (pWb35Rx->EP3VM_status != 0) {
198 #ifdef _PE_USB_STATE_DUMP_ 189#ifdef _PE_USB_STATE_DUMP_
199 printk("EP3 IoCompleteRoutine return error\n"); 190 printk("EP3 IoCompleteRoutine return error\n");
200 #endif 191#endif
201 pWb35Rx->EP3vm_state = VM_STOP; 192 pWb35Rx->EP3vm_state = VM_STOP;
202 goto error; 193 goto error;
203 } 194 }
204 195
205 // 20060220 For recovering. check if operating in single USB mode 196 /* For recovering. check if operating in single USB mode */
206 if (!HAL_USB_MODE_BURST(pHwData)) { 197 if (!HAL_USB_MODE_BURST(pHwData)) {
207 SizeCheck = R00.R00_receive_byte_count; //20060926 anson's endian 198 SizeCheck = R00.R00_receive_byte_count;
208 if ((SizeCheck & 0x03) > 0) 199 if ((SizeCheck & 0x03) > 0)
209 SizeCheck -= 4; 200 SizeCheck -= 4;
210 SizeCheck = (SizeCheck + 3) & ~0x03; 201 SizeCheck = (SizeCheck + 3) & ~0x03;
211 SizeCheck += 12; // 8 + 4 badbeef 202 SizeCheck += 12; /* 8 + 4 badbeef */
212 if ((BulkLength > 1600) || 203 if ((BulkLength > 1600) ||
213 (SizeCheck > 1600) || 204 (SizeCheck > 1600) ||
214 (BulkLength != SizeCheck) || 205 (BulkLength != SizeCheck) ||
215 (BulkLength == 0)) { // Add for fail Urb 206 (BulkLength == 0)) { /* Add for fail Urb */
216 pWb35Rx->EP3vm_state = VM_STOP; 207 pWb35Rx->EP3vm_state = VM_STOP;
217 pWb35Rx->Ep3ErrorCount2++; 208 pWb35Rx->Ep3ErrorCount2++;
218 } 209 }
219 } 210 }
220 211
221 // Indicating the receiving data 212 /* Indicating the receiving data */
222 pWb35Rx->ByteReceived += BulkLength; 213 pWb35Rx->ByteReceived += BulkLength;
223 pWb35Rx->RxBufferSize[ RxBufferId ] = BulkLength; 214 pWb35Rx->RxBufferSize[RxBufferId] = BulkLength;
224 215
225 if (!pWb35Rx->RxOwner[ RxBufferId ]) 216 if (!pWb35Rx->RxOwner[RxBufferId])
226 Wb35Rx_indicate(hw); 217 Wb35Rx_indicate(hw);
227 218
228 kfree(pWb35Rx->pDRx); 219 kfree(pWb35Rx->pDRx);
229 // Do the next receive 220 /* Do the next receive */
230 Wb35Rx(hw); 221 Wb35Rx(hw);
231 return; 222 return;
232 223
233error: 224error:
234 pWb35Rx->RxOwner[ RxBufferId ] = 1; // Set the owner to hardware 225 pWb35Rx->RxOwner[RxBufferId] = 1; /* Set the owner to hardware */
235 atomic_dec(&pWb35Rx->RxFireCounter); 226 atomic_dec(&pWb35Rx->RxFireCounter);
236 pWb35Rx->EP3vm_state = VM_STOP; 227 pWb35Rx->EP3vm_state = VM_STOP;
237} 228}
238 229
239// This function cannot reentrain 230/* This function cannot reentrain */
240static void Wb35Rx(struct ieee80211_hw *hw) 231static void Wb35Rx(struct ieee80211_hw *hw)
241{ 232{
242 struct wbsoft_priv *priv = hw->priv; 233 struct wbsoft_priv *priv = hw->priv;
243 struct hw_data * pHwData = &priv->sHwData; 234 struct hw_data *pHwData = &priv->sHwData;
244 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 235 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
245 u8 * pRxBufferAddress; 236 u8 *pRxBufferAddress;
246 struct urb *urb = pWb35Rx->RxUrb; 237 struct urb *urb = pWb35Rx->RxUrb;
247 int retv; 238 int retv;
248 u32 RxBufferId; 239 u32 RxBufferId;
249 240
250 // 241 /* Issuing URB */
251 // Issuing URB
252 //
253 if (pHwData->SurpriseRemove || pHwData->HwStop) 242 if (pHwData->SurpriseRemove || pHwData->HwStop)
254 goto error; 243 goto error;
255 244
256 if (pWb35Rx->rx_halt) 245 if (pWb35Rx->rx_halt)
257 goto error; 246 goto error;
258 247
259 // Get RxBuffer's ID 248 /* Get RxBuffer's ID */
260 RxBufferId = pWb35Rx->RxBufferId; 249 RxBufferId = pWb35Rx->RxBufferId;
261 if (!pWb35Rx->RxOwner[RxBufferId]) { 250 if (!pWb35Rx->RxOwner[RxBufferId]) {
262 // It's impossible to run here. 251 /* It's impossible to run here. */
263 #ifdef _PE_RX_DUMP_ 252#ifdef _PE_RX_DUMP_
264 printk("Rx driver fifo unavailable\n"); 253 printk("Rx driver fifo unavailable\n");
265 #endif 254#endif
266 goto error; 255 goto error;
267 } 256 }
268 257
269 // Update buffer point, then start to bulkin the data from USB 258 /* Update buffer point, then start to bulkin the data from USB */
270 pWb35Rx->RxBufferId++; 259 pWb35Rx->RxBufferId++;
271 pWb35Rx->RxBufferId %= MAX_USB_RX_BUFFER_NUMBER; 260 pWb35Rx->RxBufferId %= MAX_USB_RX_BUFFER_NUMBER;
272 261
@@ -295,18 +284,18 @@ static void Wb35Rx(struct ieee80211_hw *hw)
295 return; 284 return;
296 285
297error: 286error:
298 // VM stop 287 /* VM stop */
299 pWb35Rx->EP3vm_state = VM_STOP; 288 pWb35Rx->EP3vm_state = VM_STOP;
300 atomic_dec(&pWb35Rx->RxFireCounter); 289 atomic_dec(&pWb35Rx->RxFireCounter);
301} 290}
302 291
303void Wb35Rx_start(struct ieee80211_hw *hw) 292void Wb35Rx_start(struct ieee80211_hw *hw)
304{ 293{
305 struct wbsoft_priv *priv = hw->priv; 294 struct wbsoft_priv *priv = hw->priv;
306 struct hw_data * pHwData = &priv->sHwData; 295 struct hw_data *pHwData = &priv->sHwData;
307 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 296 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
308 297
309 // Allow only one thread to run into the Wb35Rx() function 298 /* Allow only one thread to run into the Wb35Rx() function */
310 if (atomic_inc_return(&pWb35Rx->RxFireCounter) == 1) { 299 if (atomic_inc_return(&pWb35Rx->RxFireCounter) == 1) {
311 pWb35Rx->EP3vm_state = VM_RUNNING; 300 pWb35Rx->EP3vm_state = VM_RUNNING;
312 Wb35Rx(hw); 301 Wb35Rx(hw);
@@ -314,11 +303,10 @@ void Wb35Rx_start(struct ieee80211_hw *hw)
314 atomic_dec(&pWb35Rx->RxFireCounter); 303 atomic_dec(&pWb35Rx->RxFireCounter);
315} 304}
316 305
317//===================================================================================== 306static void Wb35Rx_reset_descriptor(struct hw_data *pHwData)
318static void Wb35Rx_reset_descriptor( struct hw_data * pHwData )
319{ 307{
320 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 308 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
321 u32 i; 309 u32 i;
322 310
323 pWb35Rx->ByteReceived = 0; 311 pWb35Rx->ByteReceived = 0;
324 pWb35Rx->RxProcessIndex = 0; 312 pWb35Rx->RxProcessIndex = 0;
@@ -326,49 +314,49 @@ static void Wb35Rx_reset_descriptor( struct hw_data * pHwData )
326 pWb35Rx->EP3vm_state = VM_STOP; 314 pWb35Rx->EP3vm_state = VM_STOP;
327 pWb35Rx->rx_halt = 0; 315 pWb35Rx->rx_halt = 0;
328 316
329 // Initial the Queue. The last buffer is reserved for used if the Rx resource is unavailable. 317 /* Initial the Queue. The last buffer is reserved for used if the Rx resource is unavailable. */
330 for( i=0; i<MAX_USB_RX_BUFFER_NUMBER; i++ ) 318 for (i = 0; i < MAX_USB_RX_BUFFER_NUMBER; i++)
331 pWb35Rx->RxOwner[i] = 1; 319 pWb35Rx->RxOwner[i] = 1;
332} 320}
333 321
334unsigned char Wb35Rx_initial(struct hw_data * pHwData) 322unsigned char Wb35Rx_initial(struct hw_data *pHwData)
335{ 323{
336 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 324 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
337 325
338 // Initial the Buffer Queue 326 /* Initial the Buffer Queue */
339 Wb35Rx_reset_descriptor( pHwData ); 327 Wb35Rx_reset_descriptor(pHwData);
340 328
341 pWb35Rx->RxUrb = usb_alloc_urb(0, GFP_ATOMIC); 329 pWb35Rx->RxUrb = usb_alloc_urb(0, GFP_ATOMIC);
342 return (!!pWb35Rx->RxUrb); 330 return !!pWb35Rx->RxUrb;
343} 331}
344 332
345void Wb35Rx_stop(struct hw_data * pHwData) 333void Wb35Rx_stop(struct hw_data *pHwData)
346{ 334{
347 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 335 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
348 336
349 // Canceling the Irp if already sends it out. 337 /* Canceling the Irp if already sends it out. */
350 if (pWb35Rx->EP3vm_state == VM_RUNNING) { 338 if (pWb35Rx->EP3vm_state == VM_RUNNING) {
351 usb_unlink_urb( pWb35Rx->RxUrb ); // Only use unlink, let Wb35Rx_destroy to free them 339 usb_unlink_urb(pWb35Rx->RxUrb); /* Only use unlink, let Wb35Rx_destroy to free them */
352 #ifdef _PE_RX_DUMP_ 340#ifdef _PE_RX_DUMP_
353 printk("EP3 Rx stop\n"); 341 printk("EP3 Rx stop\n");
354 #endif 342#endif
355 } 343 }
356} 344}
357 345
358// Needs process context 346/* Needs process context */
359void Wb35Rx_destroy(struct hw_data * pHwData) 347void Wb35Rx_destroy(struct hw_data *pHwData)
360{ 348{
361 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx; 349 struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
362 350
363 do { 351 do {
364 msleep(10); // Delay for waiting function enter 940623.1.a 352 msleep(10); /* Delay for waiting function enter */
365 } while (pWb35Rx->EP3vm_state != VM_STOP); 353 } while (pWb35Rx->EP3vm_state != VM_STOP);
366 msleep(10); // Delay for waiting function exit 940623.1.b 354 msleep(10); /* Delay for waiting function exit */
367 355
368 if (pWb35Rx->RxUrb) 356 if (pWb35Rx->RxUrb)
369 usb_free_urb( pWb35Rx->RxUrb ); 357 usb_free_urb(pWb35Rx->RxUrb);
370 #ifdef _PE_RX_DUMP_ 358#ifdef _PE_RX_DUMP_
371 printk("Wb35Rx_destroy OK\n"); 359 printk("Wb35Rx_destroy OK\n");
372 #endif 360#endif
373} 361}
374 362
diff --git a/drivers/staging/winbond/wb35tx_f.h b/drivers/staging/winbond/wb35tx_f.h
index a7af9cbe202a..1d3b515f83bc 100644
--- a/drivers/staging/winbond/wb35tx_f.h
+++ b/drivers/staging/winbond/wb35tx_f.h
@@ -4,18 +4,20 @@
4#include "core.h" 4#include "core.h"
5#include "wbhal_f.h" 5#include "wbhal_f.h"
6 6
7//==================================== 7/*
8// Interface function declare 8 * ====================================
9//==================================== 9 * Interface function declare
10unsigned char Wb35Tx_initial( struct hw_data * pHwData ); 10 * ====================================
11void Wb35Tx_destroy( struct hw_data * pHwData ); 11 */
12unsigned char Wb35Tx_get_tx_buffer( struct hw_data * pHwData, u8 **pBuffer ); 12unsigned char Wb35Tx_initial(struct hw_data *hw_data);
13void Wb35Tx_destroy(struct hw_data *hw_data);
14unsigned char Wb35Tx_get_tx_buffer(struct hw_data *hw_data, u8 **buffer);
13 15
14void Wb35Tx_EP2VM_start(struct wbsoft_priv *adapter); 16void Wb35Tx_EP2VM_start(struct wbsoft_priv *adapter);
15 17
16void Wb35Tx_start(struct wbsoft_priv *adapter); 18void Wb35Tx_start(struct wbsoft_priv *adapter);
17void Wb35Tx_stop( struct hw_data * pHwData ); 19void Wb35Tx_stop(struct hw_data *hw_data);
18 20
19void Wb35Tx_CurrentTime(struct wbsoft_priv *adapter, u32 TimeCount); 21void Wb35Tx_CurrentTime(struct wbsoft_priv *adapter, u32 time_count);
20 22
21#endif 23#endif
diff --git a/drivers/staging/winbond/wbhal_f.h b/drivers/staging/winbond/wbhal_f.h
index 64a008db30f4..401c024bead8 100644
--- a/drivers/staging/winbond/wbhal_f.h
+++ b/drivers/staging/winbond/wbhal_f.h
@@ -1,70 +1,91 @@
1//===================================================================== 1/*
2// Device related include 2 * =====================================================================
3//===================================================================== 3 * Device related include
4 * =====================================================================
5*/
4#include "wb35reg_f.h" 6#include "wb35reg_f.h"
5#include "wb35tx_f.h" 7#include "wb35tx_f.h"
6#include "wb35rx_f.h" 8#include "wb35rx_f.h"
7 9
8#include "core.h" 10#include "core.h"
9 11
10//==================================================================================== 12/* =====================================================================
11// Function declaration 13 * Function declaration
12//==================================================================================== 14 * =====================================================================
13void hal_remove_mapping_key( struct hw_data * pHwData, u8 *pmac_addr ); 15 */
14void hal_remove_default_key( struct hw_data * pHwData, u32 index ); 16void hal_remove_mapping_key(struct hw_data *hw_data, u8 *mac_addr);
15unsigned char hal_set_mapping_key( struct hw_data * adapter, u8 *pmac_addr, u8 null_key, u8 wep_on, u8 *ptx_tsc, u8 *prx_tsc, u8 key_type, u8 key_len, u8 *pkey_data ); 17void hal_remove_default_key(struct hw_data *hw_data, u32 index);
16unsigned char hal_set_default_key( struct hw_data * adapter, u8 index, u8 null_key, u8 wep_on, u8 *ptx_tsc, u8 *prx_tsc, u8 key_type, u8 key_len, u8 *pkey_data ); 18unsigned char hal_set_mapping_key(struct hw_data *adapter, u8 *mac_addr,
17void hal_clear_all_default_key( struct hw_data * pHwData ); 19 u8 null_key, u8 wep_on, u8 *tx_tsc,
18void hal_clear_all_group_key( struct hw_data * pHwData ); 20 u8 *rx_tsc, u8 key_type, u8 key_len,
19void hal_clear_all_mapping_key( struct hw_data * pHwData ); 21 u8 *key_data);
20void hal_clear_all_key( struct hw_data * pHwData ); 22unsigned char hal_set_default_key(struct hw_data *adapter, u8 index,
21void hal_set_power_save_mode( struct hw_data * pHwData, unsigned char power_save, unsigned char wakeup, unsigned char dtim ); 23 u8 null_key, u8 wep_on, u8 *tx_tsc,
22void hal_get_power_save_mode( struct hw_data * pHwData, u8 *pin_pwr_save ); 24 u8 *rx_tsc, u8 key_type, u8 key_len,
23void hal_set_slot_time( struct hw_data * pHwData, u8 type ); 25 u8 *key_data);
24#define hal_set_atim_window( _A, _ATM ) 26void hal_clear_all_default_key(struct hw_data *hw_data);
25void hal_start_bss( struct hw_data * pHwData, u8 mac_op_mode ); 27void hal_clear_all_group_key(struct hw_data *hw_data);
26void hal_join_request( struct hw_data * pHwData, u8 bss_type ); // 0:BSS STA 1:IBSS STA// 28void hal_clear_all_mapping_key(struct hw_data *hw_data);
27void hal_stop_sync_bss( struct hw_data * pHwData ); 29void hal_clear_all_key(struct hw_data *hw_data);
28void hal_resume_sync_bss( struct hw_data * pHwData); 30void hal_set_power_save_mode(struct hw_data *hw_data, unsigned char power_save,
29void hal_set_aid( struct hw_data * pHwData, u16 aid ); 31 unsigned char wakeup, unsigned char dtim);
30void hal_set_bssid( struct hw_data * pHwData, u8 *pbssid ); 32void hal_get_power_save_mode(struct hw_data *hw_data, u8 *in_pwr_save);
31void hal_get_bssid( struct hw_data * pHwData, u8 *pbssid ); 33void hal_set_slot_time(struct hw_data *hw_data, u8 type);
32void hal_set_listen_interval( struct hw_data * pHwData, u16 listen_interval ); 34
33void hal_set_cap_info( struct hw_data * pHwData, u16 capability_info ); 35#define hal_set_atim_window(_A, _ATM)
34void hal_set_ssid( struct hw_data * pHwData, u8 *pssid, u8 ssid_len ); 36
35void hal_start_tx0( struct hw_data * pHwData ); 37void hal_start_bss(struct hw_data *hw_data, u8 mac_op_mode);
36#define hal_get_cwmin( _A ) ( (_A)->cwmin ) 38
37void hal_set_cwmax( struct hw_data * pHwData, u16 cwin_max ); 39/* 0:BSS STA 1:IBSS STA */
38#define hal_get_cwmax( _A ) ( (_A)->cwmax ) 40void hal_join_request(struct hw_data *hw_data, u8 bss_type);
39void hal_set_rsn_wpa( struct hw_data * pHwData, u32 * RSN_IE_Bitmap , u32 * RSN_OUI_type , unsigned char bDesiredAuthMode); 41
40void hal_set_connect_info( struct hw_data * pHwData, unsigned char boConnect ); 42void hal_stop_sync_bss(struct hw_data *hw_data);
41u8 hal_get_est_sq3( struct hw_data * pHwData, u8 Count ); 43void hal_resume_sync_bss(struct hw_data *hw_data);
42void hal_descriptor_indicate( struct hw_data * pHwData, struct wb35_descriptor *pDes ); 44void hal_set_aid(struct hw_data *hw_data, u16 aid);
43u8 hal_get_antenna_number( struct hw_data * pHwData ); 45void hal_set_bssid(struct hw_data *hw_data, u8 *bssid);
44u32 hal_get_bss_pk_cnt( struct hw_data * pHwData ); 46void hal_get_bssid(struct hw_data *hw_data, u8 *bssid);
45#define hal_get_region_from_EEPROM( _A ) ( (_A)->reg.EEPROMRegion ) 47void hal_set_listen_interval(struct hw_data *hw_data, u16 listen_interval);
46#define hal_get_tx_buffer( _A, _B ) Wb35Tx_get_tx_buffer( _A, _B ) 48void hal_set_cap_info(struct hw_data *hw_data, u16 capability_info);
47#define hal_software_set( _A ) (_A->SoftwareSet) 49void hal_set_ssid(struct hw_data *hw_data, u8 *ssid, u8 ssid_len);
48#define hal_driver_init_OK( _A ) (_A->IsInitOK) 50void hal_start_tx0(struct hw_data *hw_data);
49#define hal_rssi_boundary_high( _A ) (_A->RSSI_high) 51
50#define hal_rssi_boundary_low( _A ) (_A->RSSI_low) 52#define hal_get_cwmin(_A) ((_A)->cwmin)
51#define hal_scan_interval( _A ) (_A->Scan_Interval) 53
52 54void hal_set_cwmax(struct hw_data *hw_data, u16 cwin_max);
53#define PHY_DEBUG( msg, args... ) 55
54 56#define hal_get_cwmax(_A) ((_A)->cwmax)
55#define hal_get_time_count( _P ) (_P->time_count/10) // return 100ms count 57
56#define hal_detect_error( _P ) (_P->WbUsb.DetectCount) 58void hal_set_rsn_wpa(struct hw_data *hw_data, u32 *rsn_ie_bitmap,
57 59 u32 *rsn_oui_type , unsigned char desired_auth_mode);
58//------------------------------------------------------------------------- 60void hal_set_connect_info(struct hw_data *hw_data, unsigned char bo_connect);
59// The follow function is unused for IS89C35 61u8 hal_get_est_sq3(struct hw_data *hw_data, u8 count);
60//------------------------------------------------------------------------- 62void hal_descriptor_indicate(struct hw_data *hw_data,
63 struct wb35_descriptor *des);
64u8 hal_get_antenna_number(struct hw_data *hw_data);
65u32 hal_get_bss_pk_cnt(struct hw_data *hw_data);
66
67#define hal_get_region_from_EEPROM(_A) ((_A)->reg.EEPROMRegion)
68#define hal_get_tx_buffer(_A, _B) Wb35Tx_get_tx_buffer(_A, _B)
69#define hal_software_set(_A) (_A->SoftwareSet)
70#define hal_driver_init_OK(_A) (_A->IsInitOK)
71#define hal_rssi_boundary_high(_A) (_A->RSSI_high)
72#define hal_rssi_boundary_low(_A) (_A->RSSI_low)
73#define hal_scan_interval(_A) (_A->Scan_Interval)
74
75#define PHY_DEBUG(msg, args...)
76
77/* return 100ms count */
78#define hal_get_time_count(_P) (_P->time_count / 10)
79#define hal_detect_error(_P) (_P->WbUsb.DetectCount)
80
81/* The follow function is unused for IS89C35 */
61#define hal_disable_interrupt(_A) 82#define hal_disable_interrupt(_A)
62#define hal_enable_interrupt(_A) 83#define hal_enable_interrupt(_A)
63#define hal_get_interrupt_type( _A) 84#define hal_get_interrupt_type(_A)
64#define hal_get_clear_interrupt(_A) 85#define hal_get_clear_interrupt(_A)
65#define hal_ibss_disconnect(_A) hal_stop_sync_bss(_A) 86#define hal_ibss_disconnect(_A) (hal_stop_sync_bss(_A))
66#define hal_join_request_stop(_A) 87#define hal_join_request_stop(_A)
67#define hw_get_cxx_reg( _A, _B, _C ) 88#define hw_get_cxx_reg(_A, _B, _C)
68#define hw_set_cxx_reg( _A, _B, _C ) 89#define hw_set_cxx_reg(_A, _B, _C)
69 90
70 91
diff --git a/drivers/staging/winbond/wbhal_s.h b/drivers/staging/winbond/wbhal_s.h
index 372a05e3021a..33457c2e39be 100644
--- a/drivers/staging/winbond/wbhal_s.h
+++ b/drivers/staging/winbond/wbhal_s.h
@@ -4,179 +4,166 @@
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/if_ether.h> /* for ETH_ALEN */ 5#include <linux/if_ether.h> /* for ETH_ALEN */
6 6
7//[20040722 WK] 7#define HAL_LED_SET_MASK 0x001c
8#define HAL_LED_SET_MASK 0x001c //20060901 Extend 8#define HAL_LED_SET_SHIFT 2
9#define HAL_LED_SET_SHIFT 2
10 9
11//supported RF type 10/* supported RF type */
12#define RF_MAXIM_2825 0 11#define RF_MAXIM_2825 0
13#define RF_MAXIM_2827 1 12#define RF_MAXIM_2827 1
14#define RF_MAXIM_2828 2 13#define RF_MAXIM_2828 2
15#define RF_MAXIM_2829 3 14#define RF_MAXIM_2829 3
16#define RF_MAXIM_V1 15 15#define RF_MAXIM_V1 15
17#define RF_AIROHA_2230 16 16#define RF_AIROHA_2230 16
18#define RF_AIROHA_7230 17 17#define RF_AIROHA_7230 17
19#define RF_AIROHA_2230S 18 // 20060420 Add this 18#define RF_AIROHA_2230S 18
20// #define RF_RFMD_2959 32 // 20060626 Remove all about RFMD 19#define RF_WB_242 33
21#define RF_WB_242 33 20#define RF_WB_242_1 34
22#define RF_WB_242_1 34 // 20060619.5 Add
23#define RF_DECIDE_BY_INF 255 21#define RF_DECIDE_BY_INF 255
24 22
25//---------------------------------------------------------------- 23/*
26// The follow define connect to upper layer 24 * ----------------------------------------------------------------
27// User must modify for connection between HAL and upper layer 25 * The follow define connect to upper layer
28//---------------------------------------------------------------- 26 * User must modify for connection between HAL and upper layer
29 27 * ----------------------------------------------------------------
30 28 */
31 29
32 30/*
33///////////////////////////////////////////////////////////////////////////////////////////////////// 31 * ==============================
34//================================================================================================ 32 * Common define
35// Common define 33 * ==============================
36//================================================================================================ 34 */
37#define HAL_USB_MODE_BURST( _H ) (_H->SoftwareSet & 0x20 ) // Bit 5 20060901 Modify 35/* Bit 5 */
38 36#define HAL_USB_MODE_BURST(_H) (_H->SoftwareSet & 0x20)
39// Scan interval 37
40#define SCAN_MAX_CHNL_TIME (50) 38/* Scan interval */
41 39#define SCAN_MAX_CHNL_TIME (50)
42// For TxL2 Frame typr recognise 40
41/* For TxL2 Frame typr recognise */
43#define FRAME_TYPE_802_3_DATA 0 42#define FRAME_TYPE_802_3_DATA 0
44#define FRAME_TYPE_802_11_MANAGEMENT 1 43#define FRAME_TYPE_802_11_MANAGEMENT 1
45#define FRAME_TYPE_802_11_MANAGEMENT_CHALLENGE 2 44#define FRAME_TYPE_802_11_MANAGEMENT_CHALLENGE 2
46#define FRAME_TYPE_802_11_CONTROL 3 45#define FRAME_TYPE_802_11_CONTROL 3
47#define FRAME_TYPE_802_11_DATA 4 46#define FRAME_TYPE_802_11_DATA 4
48#define FRAME_TYPE_PROMISCUOUS 5 47#define FRAME_TYPE_PROMISCUOUS 5
49 48
50// The follow definition is used for convert the frame-------------------- 49/* The follow definition is used for convert the frame------------ */
51#define DOT_11_SEQUENCE_OFFSET 22 //Sequence control offset 50#define DOT_11_SEQUENCE_OFFSET 22 /* Sequence control offset */
52#define DOT_3_TYPE_OFFSET 12 51#define DOT_3_TYPE_OFFSET 12
53#define DOT_11_MAC_HEADER_SIZE 24 52#define DOT_11_MAC_HEADER_SIZE 24
54#define DOT_11_SNAP_SIZE 6 53#define DOT_11_SNAP_SIZE 6
55#define DOT_11_TYPE_OFFSET 30 //The start offset of 802.11 Frame. Type encapsulatuin. 54#define DOT_11_TYPE_OFFSET 30 /* The start offset of 802.11 Frame. Type encapsulation. */
56#define DEFAULT_SIFSTIME 10 55#define DEFAULT_SIFSTIME 10
57#define DEFAULT_FRAGMENT_THRESHOLD 2346 // No fragment 56#define DEFAULT_FRAGMENT_THRESHOLD 2346 /* No fragment */
58#define DEFAULT_MSDU_LIFE_TIME 0xffff 57#define DEFAULT_MSDU_LIFE_TIME 0xffff
59 58
60#define LONG_PREAMBLE_PLUS_PLCPHEADER_TIME (144+48) 59#define LONG_PREAMBLE_PLUS_PLCPHEADER_TIME (144 + 48)
61#define SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME (72+24) 60#define SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME (72 + 24)
62#define PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION (16+4+6) 61#define PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION (16 + 4 + 6)
63#define Tsym 4 62#define Tsym 4
64 63
65// Frame Type of Bits (2, 3)--------------------------------------------- 64/* Frame Type of Bits (2, 3)----------------------------------- */
66#define MAC_TYPE_MANAGEMENT 0x00 65#define MAC_TYPE_MANAGEMENT 0x00
67#define MAC_TYPE_CONTROL 0x04 66#define MAC_TYPE_CONTROL 0x04
68#define MAC_TYPE_DATA 0x08 67#define MAC_TYPE_DATA 0x08
69#define MASK_FRAGMENT_NUMBER 0x000F 68#define MASK_FRAGMENT_NUMBER 0x000F
70#define SEQUENCE_NUMBER_SHIFT 4 69#define SEQUENCE_NUMBER_SHIFT 4
71 70
72#define HAL_WOL_TYPE_WAKEUP_FRAME 0x01 71#define HAL_WOL_TYPE_WAKEUP_FRAME 0x01
73#define HAL_WOL_TYPE_MAGIC_PACKET 0x02 72#define HAL_WOL_TYPE_MAGIC_PACKET 0x02
74 73
75// 20040106 ADDED 74#define HAL_KEYTYPE_WEP40 0
76#define HAL_KEYTYPE_WEP40 0 75#define HAL_KEYTYPE_WEP104 1
77#define HAL_KEYTYPE_WEP104 1 76#define HAL_KEYTYPE_TKIP 2 /* 128 bit key */
78#define HAL_KEYTYPE_TKIP 2 // 128 bit key 77#define HAL_KEYTYPE_AES_CCMP 3 /* 128 bit key */
79#define HAL_KEYTYPE_AES_CCMP 3 // 128 bit key
80 78
81// For VM state 79/* For VM state */
82enum { 80enum {
83 VM_STOP = 0, 81 VM_STOP = 0,
84 VM_RUNNING, 82 VM_RUNNING,
85 VM_COMPLETED 83 VM_COMPLETED
86}; 84};
87 85
88//----------------------------------------------------- 86/*
89// Normal Key table format 87 * ================================
90//----------------------------------------------------- 88 * Normal Key table format
91// The order of KEY index is MAPPING_KEY_START_INDEX > GROUP_KEY_START_INDEX 89 * ================================
92#define MAX_KEY_TABLE 24 // 24 entry for storing key data 90 */
91
92/* The order of KEY index is MAPPING_KEY_START_INDEX > GROUP_KEY_START_INDEX */
93#define MAX_KEY_TABLE 24 /* 24 entry for storing key data */
93#define GROUP_KEY_START_INDEX 4 94#define GROUP_KEY_START_INDEX 4
94#define MAPPING_KEY_START_INDEX 8 95#define MAPPING_KEY_START_INDEX 8
95 96
96//-------------------------------------------------------- 97/*
97// Descriptor 98 * =========================================
98//-------------------------------------------------------- 99 * Descriptor
99#define MAX_DESCRIPTOR_BUFFER_INDEX 8 // Have to multiple of 2 100 * =========================================
100//#define FLAG_ERROR_TX_MASK cpu_to_le32(0x000000bf) //20061009 marked by anson's endian 101 */
101#define FLAG_ERROR_TX_MASK 0x000000bf //20061009 anson's endian 102#define MAX_DESCRIPTOR_BUFFER_INDEX 8 /* Have to multiple of 2 */
102//#define FLAG_ERROR_RX_MASK 0x00000c3f 103#define FLAG_ERROR_TX_MASK 0x000000bf
103//#define FLAG_ERROR_RX_MASK cpu_to_le32(0x0000083f) //20061009 marked by anson's endian 104#define FLAG_ERROR_RX_MASK 0x0000083f
104 //Don't care replay error, 105
105 //it is handled by S/W 106#define FLAG_BAND_RX_MASK 0x10000000 /* Bit 28 */
106#define FLAG_ERROR_RX_MASK 0x0000083f //20060926 anson's endian 107
107 108typedef struct _R00_DESCRIPTOR {
108#define FLAG_BAND_RX_MASK 0x10000000 //Bit 28 109 union {
109
110typedef struct _R00_DESCRIPTOR
111{
112 union
113 {
114 u32 value; 110 u32 value;
115 #ifdef _BIG_ENDIAN_ //20060926 anson's endian 111#ifdef _BIG_ENDIAN_
116 struct 112 struct {
117 {
118 u32 R00_packet_or_buffer_status:1; 113 u32 R00_packet_or_buffer_status:1;
119 u32 R00_packet_in_fifo:1; 114 u32 R00_packet_in_fifo:1;
120 u32 R00_RESERVED:2; 115 u32 R00_RESERVED:2;
121 u32 R00_receive_byte_count:12; 116 u32 R00_receive_byte_count:12;
122 u32 R00_receive_time_index:16; 117 u32 R00_receive_time_index:16;
123 }; 118 };
124 #else 119#else
125 struct 120 struct {
126 {
127 u32 R00_receive_time_index:16; 121 u32 R00_receive_time_index:16;
128 u32 R00_receive_byte_count:12; 122 u32 R00_receive_byte_count:12;
129 u32 R00_RESERVED:2; 123 u32 R00_RESERVED:2;
130 u32 R00_packet_in_fifo:1; 124 u32 R00_packet_in_fifo:1;
131 u32 R00_packet_or_buffer_status:1; 125 u32 R00_packet_or_buffer_status:1;
132 }; 126 };
133 #endif 127#endif
134 }; 128 };
135} R00_DESCRIPTOR, *PR00_DESCRIPTOR; 129} R00_DESCRIPTOR, *PR00_DESCRIPTOR;
136 130
137typedef struct _T00_DESCRIPTOR 131typedef struct _T00_DESCRIPTOR {
138{ 132 union {
139 union
140 {
141 u32 value; 133 u32 value;
142 #ifdef _BIG_ENDIAN_ //20061009 anson's endian 134#ifdef _BIG_ENDIAN_
143 struct 135 struct {
144 { 136 u32 T00_first_mpdu:1; /* for hardware use */
145 u32 T00_first_mpdu:1; // for hardware use 137 u32 T00_last_mpdu:1; /* for hardware use */
146 u32 T00_last_mpdu:1; // for hardware use 138 u32 T00_IsLastMpdu:1;/* 0:not 1:Yes for software used */
147 u32 T00_IsLastMpdu:1;// 0: not 1:Yes for software used 139 u32 T00_IgnoreResult:1;/* The same mechanism with T00 setting. */
148 u32 T00_IgnoreResult:1;// The same mechanism with T00 setting. 050111 Modify for TS 140 u32 T00_RESERVED_ID:2;/* 3 bit ID reserved */
149 u32 T00_RESERVED_ID:2;//3 bit ID reserved 141 u32 T00_tx_packet_id:4;
150 u32 T00_tx_packet_id:4;//930519.4.e 930810.3.c
151 u32 T00_RESERVED:4; 142 u32 T00_RESERVED:4;
152 u32 T00_header_length:6; 143 u32 T00_header_length:6;
153 u32 T00_frame_length:12; 144 u32 T00_frame_length:12;
154 }; 145 };
155 #else 146#else
156 struct 147 struct {
157 {
158 u32 T00_frame_length:12; 148 u32 T00_frame_length:12;
159 u32 T00_header_length:6; 149 u32 T00_header_length:6;
160 u32 T00_RESERVED:4; 150 u32 T00_RESERVED:4;
161 u32 T00_tx_packet_id:4;//930519.4.e 930810.3.c 151 u32 T00_tx_packet_id:4;
162 u32 T00_RESERVED_ID:2;//3 bit ID reserved 152 u32 T00_RESERVED_ID:2; /* 3 bit ID reserved */
163 u32 T00_IgnoreResult:1;// The same mechanism with T00 setting. 050111 Modify for TS 153 u32 T00_IgnoreResult:1; /* The same mechanism with T00 setting. */
164 u32 T00_IsLastMpdu:1;// 0: not 1:Yes for software used 154 u32 T00_IsLastMpdu:1; /* 0:not 1:Yes for software used */
165 u32 T00_last_mpdu:1; // for hardware use 155 u32 T00_last_mpdu:1; /* for hardware use */
166 u32 T00_first_mpdu:1; // for hardware use 156 u32 T00_first_mpdu:1; /* for hardware use */
167 }; 157 };
168 #endif 158#endif
169 }; 159 };
170} T00_DESCRIPTOR, *PT00_DESCRIPTOR; 160} T00_DESCRIPTOR, *PT00_DESCRIPTOR;
171 161
172typedef struct _R01_DESCRIPTOR 162typedef struct _R01_DESCRIPTOR {
173{ 163 union {
174 union
175 {
176 u32 value; 164 u32 value;
177 #ifdef _BIG_ENDIAN_ //20060926 add by anson's endian 165#ifdef _BIG_ENDIAN_
178 struct 166 struct {
179 {
180 u32 R01_RESERVED:3; 167 u32 R01_RESERVED:3;
181 u32 R01_mod_type:1; 168 u32 R01_mod_type:1;
182 u32 R01_pre_type:1; 169 u32 R01_pre_type:1;
@@ -197,9 +184,8 @@ typedef struct _R01_DESCRIPTOR
197 u32 R01_icv_error:1; 184 u32 R01_icv_error:1;
198 u32 R01_crc_error:1; 185 u32 R01_crc_error:1;
199 }; 186 };
200 #else 187#else
201 struct 188 struct {
202 {
203 u32 R01_crc_error:1; 189 u32 R01_crc_error:1;
204 u32 R01_icv_error:1; 190 u32 R01_icv_error:1;
205 u32 R01_null_key_to_authentication_frame:1; 191 u32 R01_null_key_to_authentication_frame:1;
@@ -220,18 +206,15 @@ typedef struct _R01_DESCRIPTOR
220 u32 R01_mod_type:1; 206 u32 R01_mod_type:1;
221 u32 R01_RESERVED:3; 207 u32 R01_RESERVED:3;
222 }; 208 };
223 #endif 209#endif
224 }; 210 };
225} R01_DESCRIPTOR, *PR01_DESCRIPTOR; 211} R01_DESCRIPTOR, *PR01_DESCRIPTOR;
226 212
227typedef struct _T01_DESCRIPTOR 213typedef struct _T01_DESCRIPTOR {
228{ 214 union {
229 union
230 {
231 u32 value; 215 u32 value;
232 #ifdef _BIG_ENDIAN_ //20061009 anson's endian 216#ifdef _BIG_ENDIAN_
233 struct 217 struct {
234 {
235 u32 T01_rts_cts_duration:16; 218 u32 T01_rts_cts_duration:16;
236 u32 T01_fall_back_rate:3; 219 u32 T01_fall_back_rate:3;
237 u32 T01_add_rts:1; 220 u32 T01_add_rts:1;
@@ -245,9 +228,8 @@ typedef struct _T01_DESCRIPTOR
245 u32 T01_loop_back_wep_mode:1; 228 u32 T01_loop_back_wep_mode:1;
246 u32 T01_retry_abort_ebable:1; 229 u32 T01_retry_abort_ebable:1;
247 }; 230 };
248 #else 231#else
249 struct 232 struct {
250 {
251 u32 T01_retry_abort_ebable:1; 233 u32 T01_retry_abort_ebable:1;
252 u32 T01_loop_back_wep_mode:1; 234 u32 T01_loop_back_wep_mode:1;
253 u32 T01_inhibit_crc:1; 235 u32 T01_inhibit_crc:1;
@@ -261,21 +243,18 @@ typedef struct _T01_DESCRIPTOR
261 u32 T01_fall_back_rate:3; 243 u32 T01_fall_back_rate:3;
262 u32 T01_rts_cts_duration:16; 244 u32 T01_rts_cts_duration:16;
263 }; 245 };
264 #endif 246#endif
265 }; 247 };
266} T01_DESCRIPTOR, *PT01_DESCRIPTOR; 248} T01_DESCRIPTOR, *PT01_DESCRIPTOR;
267 249
268typedef struct _T02_DESCRIPTOR 250typedef struct _T02_DESCRIPTOR {
269{ 251 union {
270 union
271 {
272 u32 value; 252 u32 value;
273 #ifdef _BIG_ENDIAN_ //20061009 add by anson's endian 253#ifdef _BIG_ENDIAN_
274 struct 254 struct {
275 { 255 u32 T02_IsLastMpdu:1; /* The same mechanism with T00 setting */
276 u32 T02_IsLastMpdu:1;// The same mechanism with T00 setting 256 u32 T02_IgnoreResult:1; /* The same mechanism with T00 setting. */
277 u32 T02_IgnoreResult:1;// The same mechanism with T00 setting. 050111 Modify for TS 257 u32 T02_RESERVED_ID:2; /* The same mechanism with T00 setting */
278 u32 T02_RESERVED_ID:2;// The same mechanism with T00 setting
279 u32 T02_Tx_PktID:4; 258 u32 T02_Tx_PktID:4;
280 u32 T02_MPDU_Cnt:4; 259 u32 T02_MPDU_Cnt:4;
281 u32 T02_RTS_Cnt:4; 260 u32 T02_RTS_Cnt:4;
@@ -290,9 +269,8 @@ typedef struct _T02_DESCRIPTOR
290 u32 T02_transmit_abort:1; 269 u32 T02_transmit_abort:1;
291 u32 T02_transmit_fail:1; 270 u32 T02_transmit_fail:1;
292 }; 271 };
293 #else 272#else
294 struct 273 struct {
295 {
296 u32 T02_transmit_fail:1; 274 u32 T02_transmit_fail:1;
297 u32 T02_transmit_abort:1; 275 u32 T02_transmit_abort:1;
298 u32 T02_out_of_MaxTxMSDULiftTime:1; 276 u32 T02_out_of_MaxTxMSDULiftTime:1;
@@ -306,122 +284,120 @@ typedef struct _T02_DESCRIPTOR
306 u32 T02_RTS_Cnt:4; 284 u32 T02_RTS_Cnt:4;
307 u32 T02_MPDU_Cnt:4; 285 u32 T02_MPDU_Cnt:4;
308 u32 T02_Tx_PktID:4; 286 u32 T02_Tx_PktID:4;
309 u32 T02_RESERVED_ID:2;// The same mechanism with T00 setting 287 u32 T02_RESERVED_ID:2; /* The same mechanism with T00 setting */
310 u32 T02_IgnoreResult:1;// The same mechanism with T00 setting. 050111 Modify for TS 288 u32 T02_IgnoreResult:1; /* The same mechanism with T00 setting. */
311 u32 T02_IsLastMpdu:1;// The same mechanism with T00 setting 289 u32 T02_IsLastMpdu:1; /* The same mechanism with T00 setting */
312 }; 290 };
313 #endif 291#endif
314 }; 292 };
315} T02_DESCRIPTOR, *PT02_DESCRIPTOR; 293} T02_DESCRIPTOR, *PT02_DESCRIPTOR;
316 294
317struct wb35_descriptor { // Skip length = 8 DWORD 295struct wb35_descriptor { /* Skip length = 8 DWORD */
318 // ID for descriptor ---, The field doesn't be cleard in the operation of Descriptor definition 296 /* ID for descriptor ---, The field doesn't be cleard in the operation of Descriptor definition */
319 u8 Descriptor_ID; 297 u8 Descriptor_ID;
320 //----------------------The above region doesn't be cleared by DESCRIPTOR_RESET------ 298 /* ----------------------The above region doesn't be cleared by DESCRIPTOR_RESET------ */
321 u8 RESERVED[3]; 299 u8 RESERVED[3];
322 300
323 u16 FragmentThreshold; 301 u16 FragmentThreshold;
324 u8 InternalUsed;//Only can be used by operation of descriptor definition 302 u8 InternalUsed; /* Only can be used by operation of descriptor definition */
325 u8 Type;// 0: 802.3 1:802.11 data frame 2:802.11 management frame 303 u8 Type; /* 0: 802.3 1:802.11 data frame 2:802.11 management frame */
326 304
327 u8 PreambleMode;// 0: short 1:long 305 u8 PreambleMode;/* 0: short 1:long */
328 u8 TxRate; 306 u8 TxRate;
329 u8 FragmentCount; 307 u8 FragmentCount;
330 u8 EapFix; // For speed up key install 308 u8 EapFix; /* For speed up key install */
331 309
332 // For R00 and T00 ---------------------------------------------- 310 /* For R00 and T00 ------------------------------ */
333 union 311 union {
334 {
335 R00_DESCRIPTOR R00; 312 R00_DESCRIPTOR R00;
336 T00_DESCRIPTOR T00; 313 T00_DESCRIPTOR T00;
337 }; 314 };
338 315
339 // For R01 and T01 ---------------------------------------------- 316 /* For R01 and T01 ------------------------------ */
340 union 317 union {
341 {
342 R01_DESCRIPTOR R01; 318 R01_DESCRIPTOR R01;
343 T01_DESCRIPTOR T01; 319 T01_DESCRIPTOR T01;
344 }; 320 };
345 321
346 // For R02 and T02 ---------------------------------------------- 322 /* For R02 and T02 ------------------------------ */
347 union 323 union {
348 { 324 u32 R02;
349 u32 R02;
350 T02_DESCRIPTOR T02; 325 T02_DESCRIPTOR T02;
351 }; 326 };
352 327
353 // For R03 and T03 ---------------------------------------------- 328 /* For R03 and T03 ------------------------------ */
354 // For software used 329 /* For software used */
355 union 330 union {
356 {
357 u32 R03; 331 u32 R03;
358 u32 T03; 332 u32 T03;
359 struct 333 struct {
360 {
361 u8 buffer_number; 334 u8 buffer_number;
362 u8 buffer_start_index; 335 u8 buffer_start_index;
363 u16 buffer_total_size; 336 u16 buffer_total_size;
364 }; 337 };
365 }; 338 };
366 339
367 // For storing the buffer 340 /* For storing the buffer */
368 u16 buffer_size[ MAX_DESCRIPTOR_BUFFER_INDEX ]; 341 u16 buffer_size[MAX_DESCRIPTOR_BUFFER_INDEX];
369 void* buffer_address[ MAX_DESCRIPTOR_BUFFER_INDEX ];//931130.4.q 342 void *buffer_address[MAX_DESCRIPTOR_BUFFER_INDEX];
370
371}; 343};
372 344
373 345
374#define DEFAULT_NULL_PACKET_COUNT 180000 //20060828.1 Add. 180 seconds 346#define DEFAULT_NULL_PACKET_COUNT 180000 /* 180 seconds */
375 347
376#define MAX_TXVGA_EEPROM 9 //How many word(u16) of EEPROM will be used for TxVGA 348#define MAX_TXVGA_EEPROM 9 /* How many word(u16) of EEPROM will be used for TxVGA */
377#define MAX_RF_PARAMETER 32 349#define MAX_RF_PARAMETER 32
378 350
379typedef struct _TXVGA_FOR_50 { 351typedef struct _TXVGA_FOR_50 {
380 u8 ChanNo; 352 u8 ChanNo;
381 u8 TxVgaValue; 353 u8 TxVgaValue;
382} TXVGA_FOR_50; 354} TXVGA_FOR_50;
383 355
384 356
385//===================================================================== 357/*
386// Device related include 358 * ==============================================
387//===================================================================== 359 * Device related include
360 * ==============================================
361 */
388 362
389#include "wbusb_s.h" 363#include "wbusb_s.h"
390#include "wb35reg_s.h" 364#include "wb35reg_s.h"
391#include "wb35tx_s.h" 365#include "wb35tx_s.h"
392#include "wb35rx_s.h" 366#include "wb35rx_s.h"
393 367
394// For Hal using ================================================================== 368/* For Hal using ============================================ */
395struct hw_data { 369struct hw_data {
396 // For compatible with 33 370 /* For compatible with 33 */
397 u32 revision; 371 u32 revision;
398 u32 BB3c_cal; // The value for Tx calibration comes from EEPROM 372 u32 BB3c_cal; /* The value for Tx calibration comes from EEPROM */
399 u32 BB54_cal; // The value for Rx calibration comes from EEPROM 373 u32 BB54_cal; /* The value for Rx calibration comes from EEPROM */
400 374
401 375 /* For surprise remove */
402 // For surprise remove 376 u32 SurpriseRemove; /* 0: Normal 1: Surprise remove */
403 u32 SurpriseRemove; // 0: Normal 1: Surprise remove
404 u8 IsKeyPreSet; 377 u8 IsKeyPreSet;
405 u8 CalOneTime; // 20060630.1 378 u8 CalOneTime;
406 379
407 u8 VCO_trim; 380 u8 VCO_trim;
408 381
409 // For Fix 1'st DMA bug
410 u32 FragCount; 382 u32 FragCount;
411 u32 DMAFix; //V1_DMA_FIX The variable can be removed if driver want to save mem space for V2. 383 u32 DMAFix; /* V1_DMA_FIX The variable can be removed if driver want to save mem space for V2. */
412 384
413 //=============================================== 385 /*
414 // Definition for MAC address 386 * ===============================================
415 //=============================================== 387 * Definition for MAC address
416 u8 PermanentMacAddress[ETH_ALEN + 2]; // The Enthernet addr that are stored in EEPROM. + 2 to 8-byte alignment 388 * ===============================================
417 u8 CurrentMacAddress[ETH_ALEN + 2]; // The Enthernet addr that are in used. + 2 to 8-byte alignment 389 */
418 390 u8 PermanentMacAddress[ETH_ALEN + 2]; /* The Ethernet addr that are stored in EEPROM. + 2 to 8-byte alignment */
419 //===================================================================== 391 u8 CurrentMacAddress[ETH_ALEN + 2]; /* The Enthernet addr that are in used. + 2 to 8-byte alignment */
420 // Definition for 802.11 392
421 //===================================================================== 393 /*
422 u8 *bssid_pointer; // Used by hal_get_bssid for return value 394 * =========================================
423 u8 bssid[8];// Only 6 byte will be used. 8 byte is required for read buffer 395 * Definition for 802.11
424 u8 ssid[32];// maximum ssid length is 32 byte 396 * =========================================
397 */
398 u8 *bssid_pointer; /* Used by hal_get_bssid for return value */
399 u8 bssid[8]; /* Only 6 byte will be used. 8 byte is required for read buffer */
400 u8 ssid[32]; /* maximum ssid length is 32 byte */
425 401
426 u16 AID; 402 u16 AID;
427 u8 ssid_length; 403 u8 ssid_length;
@@ -433,112 +409,118 @@ struct hw_data {
433 u16 BeaconPeriod; 409 u16 BeaconPeriod;
434 u16 ProbeDelay; 410 u16 ProbeDelay;
435 411
436 u8 bss_type;// 0: IBSS_NET or 1:ESS_NET 412 u8 bss_type;/* 0: IBSS_NET or 1:ESS_NET */
437 u8 preamble;// 0: short preamble, 1: long preamble 413 u8 preamble;/* 0: short preamble, 1: long preamble */
438 u8 slot_time_select;// 9 or 20 value 414 u8 slot_time_select; /* 9 or 20 value */
439 u8 phy_type;// Phy select 415 u8 phy_type; /* Phy select */
440 416
441 u32 phy_para[MAX_RF_PARAMETER]; 417 u32 phy_para[MAX_RF_PARAMETER];
442 u32 phy_number; 418 u32 phy_number;
443 419
444 u32 CurrentRadioSw; // 20060320.2 0:On 1:Off 420 u32 CurrentRadioSw; /* 0:On 1:Off */
445 u32 CurrentRadioHw; // 20060825 0:On 1:Off 421 u32 CurrentRadioHw; /* 0:On 1:Off */
446 422
447 u8 *power_save_point; // Used by hal_get_power_save_mode for return value 423 u8 *power_save_point; /* Used by hal_get_power_save_mode for return value */
448 u8 cwmin; 424 u8 cwmin;
449 u8 desired_power_save; 425 u8 desired_power_save;
450 u8 dtim;// Is running dtim 426 u8 dtim; /* Is running dtim */
451 u8 mapping_key_replace_index;//In Key table, the next index be replaced 931130.4.r 427 u8 mapping_key_replace_index; /* In Key table, the next index be replaced */
452 428
453 u16 MaxReceiveLifeTime; 429 u16 MaxReceiveLifeTime;
454 u16 FragmentThreshold; 430 u16 FragmentThreshold;
455 u16 FragmentThreshold_tmp; 431 u16 FragmentThreshold_tmp;
456 u16 cwmax; 432 u16 cwmax;
457 433
458 u8 Key_slot[MAX_KEY_TABLE][8]; //Ownership record for key slot. For Alignment 434 u8 Key_slot[MAX_KEY_TABLE][8]; /* Ownership record for key slot. For Alignment */
459 u32 Key_content[MAX_KEY_TABLE][12]; // 10DW for each entry + 2 for burst command( Off and On valid bit) 435 u32 Key_content[MAX_KEY_TABLE][12]; /* 10DW for each entry + 2 for burst command (Off and On valid bit) */
460 u8 CurrentDefaultKeyIndex; 436 u8 CurrentDefaultKeyIndex;
461 u32 CurrentDefaultKeyLength; 437 u32 CurrentDefaultKeyLength;
462 438
463 //======================================================================== 439 /*
464 // Variable for each module 440 * ==================================================
465 //======================================================================== 441 * Variable for each module
466 struct wb_usb WbUsb; // Need WbUsb.h 442 * ==================================================
467 struct wb35_reg reg; // Need Wb35Reg.h 443 */
468 struct wb35_tx Wb35Tx; // Need Wb35Tx.h 444 struct wb_usb WbUsb; /* Need WbUsb.h */
469 struct wb35_rx Wb35Rx; // Need Wb35Rx.h 445 struct wb35_reg reg; /* Need Wb35Reg.h */
446 struct wb35_tx Wb35Tx; /* Need Wb35Tx.h */
447 struct wb35_rx Wb35Rx; /* Need Wb35Rx.h */
470 448
471 struct timer_list LEDTimer;// For LED 449 struct timer_list LEDTimer; /* For LED */
472 450
473 u32 LEDpoint;// For LED 451 u32 LEDpoint; /* For LED */
474 452
475 u32 dto_tx_retry_count; // LA20040210_DTO kevin 453 u32 dto_tx_retry_count;
476 u32 dto_tx_frag_count; // LA20040210_DTO kevin 454 u32 dto_tx_frag_count;
477 u32 rx_ok_count[13]; // index=0: total rx ok 455 u32 rx_ok_count[13]; /* index=0: total rx ok */
478 //u32 rx_ok_bytes[13]; // index=0, total rx ok bytes 456 u32 rx_err_count[13]; /* index=0: total rx err */
479 u32 rx_err_count[13]; // index=0: total rx err
480 457
481 //for Tx debug 458 /* for Tx debug */
482 u32 tx_TBTT_start_count; 459 u32 tx_TBTT_start_count;
483 u32 tx_ETR_count; 460 u32 tx_ETR_count;
484 u32 tx_WepOn_false_count; 461 u32 tx_WepOn_false_count;
485 u32 tx_Null_key_count; 462 u32 tx_Null_key_count;
486 u32 tx_retry_count[8]; 463 u32 tx_retry_count[8];
487 464
488 u8 PowerIndexFromEEPROM; // For 2412MHz 465 u8 PowerIndexFromEEPROM; /* For 2412MHz */
489 u8 power_index; 466 u8 power_index;
490 u8 IsWaitJoinComplete; // TRUE: set join request 467 u8 IsWaitJoinComplete; /* TRUE: set join request */
491 u8 band; 468 u8 band;
492 469
493 u16 SoftwareSet; 470 u16 SoftwareSet;
494 u16 Reserved_s; 471 u16 Reserved_s;
495 472
496 u32 IsInitOK; // 0: Driver starting 1: Driver init OK 473 u32 IsInitOK; /* 0: Driver starting 1: Driver init OK */
497 474
498 // For Phy calibration 475 /* For Phy calibration */
499 s32 iq_rsdl_gain_tx_d2; 476 s32 iq_rsdl_gain_tx_d2;
500 s32 iq_rsdl_phase_tx_d2; 477 s32 iq_rsdl_phase_tx_d2;
501 u32 txvga_setting_for_cal; // 20060703.1 Add 478 u32 txvga_setting_for_cal;
502 479
503 u8 TxVgaSettingInEEPROM[ (((MAX_TXVGA_EEPROM*2)+3) & ~0x03) ]; // 20060621 For backup EEPROM value 480 u8 TxVgaSettingInEEPROM[(((MAX_TXVGA_EEPROM * 2) + 3) & ~0x03)]; /* For EEPROM value */
504 u8 TxVgaFor24[16]; // Max is 14, 2 for alignment 481 u8 TxVgaFor24[16]; /* Max is 14, 2 for alignment */
505 TXVGA_FOR_50 TxVgaFor50[36]; // 35 channels in 5G. 35x2 = 70 byte. 2 for alignments 482 TXVGA_FOR_50 TxVgaFor50[36]; /* 35 channels in 5G. 35x2 = 70 byte. 2 for alignments */
506 483
507 u16 Scan_Interval; 484 u16 Scan_Interval;
508 u16 RESERVED6; 485 u16 RESERVED6;
509 486
510 // LED control 487 /* LED control */
511 u32 LED_control; 488 u32 LED_control;
512 // LED_control 4 byte: Gray_Led_1[3] Gray_Led_0[2] Led[1] Led[0] 489 /*
513 // Gray_Led 490 * LED_control 4 byte: Gray_Led_1[3] Gray_Led_0[2] Led[1] Led[0]
514 // For Led gray setting 491 * Gray_Led
515 // Led 492 * For Led gray setting
516 // 0: normal control, LED behavior will decide by EEPROM setting 493 * Led
517 // 1: Turn off specific LED 494 * 0: normal control,
518 // 2: Always on specific LED 495 * LED behavior will decide by EEPROM setting
519 // 3: slow blinking specific LED 496 * 1: Turn off specific LED
520 // 4: fast blinking specific LED 497 * 2: Always on specific LED
521 // 5: WPS led control is set. Led0 is Red, Led1 id Green 498 * 3: slow blinking specific LED
522 // Led[1] is parameter for WPS LED mode 499 * 4: fast blinking specific LED
523 // // 1:InProgress 2: Error 3: Session overlap 4: Success 20061108 control 500 * 5: WPS led control is set. Led0 is Red, Led1 id Green
524 501 *
525 u32 LED_LinkOn; //Turn LED on control 502 * Led[1] is parameter for WPS LED mode
526 u32 LED_Scanning; // Let LED in scan process control 503 * 1:InProgress
527 u32 LED_Blinking; // Temp variable for shining 504 * 2: Error
505 * 3: Session overlap
506 * 4: Success control
507 */
508 u32 LED_LinkOn; /* Turn LED on control */
509 u32 LED_Scanning; /* Let LED in scan process control */
510 u32 LED_Blinking; /* Temp variable for shining */
528 u32 RxByteCountLast; 511 u32 RxByteCountLast;
529 u32 TxByteCountLast; 512 u32 TxByteCountLast;
530 513
531 atomic_t SurpriseRemoveCount; 514 atomic_t SurpriseRemoveCount;
532 515
533 // For global timer 516 /* For global timer */
534 u32 time_count;//TICK_TIME_100ms 1 = 100ms 517 u32 time_count; /* TICK_TIME_100ms 1 = 100ms */
535 518
536 // For error recover 519 /* For error recover */
537 u32 HwStop; 520 u32 HwStop;
538 521
539 // 20060828.1 for avoid AP disconnect 522 /* For avoid AP disconnect */
540 u32 NullPacketCount; 523 u32 NullPacketCount;
541
542}; 524};
543 525
544#endif 526#endif
diff --git a/drivers/staging/winbond/wblinux_f.h b/drivers/staging/winbond/wblinux_f.h
index 868e87727240..0a9d214f7187 100644
--- a/drivers/staging/winbond/wblinux_f.h
+++ b/drivers/staging/winbond/wblinux_f.h
@@ -4,13 +4,14 @@
4#include "core.h" 4#include "core.h"
5#include "mds_s.h" 5#include "mds_s.h"
6 6
7//========================================================================= 7/*
8// Copyright (c) 1996-2004 Winbond Electronic Corporation 8 * ====================================================================
9// 9 * Copyright (c) 1996-2004 Winbond Electronic Corporation
10// wblinux_f.h 10 *
11// 11 * wblinux_f.h
12int wb35_start_xmit(struct sk_buff *skb, struct net_device *netdev ); 12 * ====================================================================
13void wb35_set_multicast( struct net_device *netdev ); 13 */
14struct net_device_stats * wb35_netdev_stats( struct net_device *netdev ); 14int wb35_start_xmit(struct sk_buff *skb, struct net_device *netdev);
15 15void wb35_set_multicast(struct net_device *netdev);
16struct net_device_stats *wb35_netdev_stats(struct net_device *netdev);
16#endif 17#endif
diff --git a/drivers/staging/winbond/wbusb.c b/drivers/staging/winbond/wbusb.c
index 5d9499bba9cc..681419d6856e 100644
--- a/drivers/staging/winbond/wbusb.c
+++ b/drivers/staging/winbond/wbusb.c
@@ -142,19 +142,17 @@ static void hal_set_radio_mode(struct hw_data *pHwData, unsigned char radio_off)
142 if (pHwData->SurpriseRemove) 142 if (pHwData->SurpriseRemove)
143 return; 143 return;
144 144
145 if (radio_off) //disable Baseband receive off 145 if (radio_off) { /* disable Baseband receive off */
146 { 146 pHwData->CurrentRadioSw = 1; /* off */
147 pHwData->CurrentRadioSw = 1; // off
148 reg->M24_MacControl &= 0xffffffbf; 147 reg->M24_MacControl &= 0xffffffbf;
149 } else { 148 } else {
150 pHwData->CurrentRadioSw = 0; // on 149 pHwData->CurrentRadioSw = 0; /* on */
151 reg->M24_MacControl |= 0x00000040; 150 reg->M24_MacControl |= 0x00000040;
152 } 151 }
153 Wb35Reg_Write(pHwData, 0x0824, reg->M24_MacControl); 152 Wb35Reg_Write(pHwData, 0x0824, reg->M24_MacControl);
154} 153}
155 154
156static void 155static void hal_set_current_channel_ex(struct hw_data *pHwData, struct chan_info channel)
157hal_set_current_channel_ex(struct hw_data *pHwData, struct chan_info channel)
158{ 156{
159 struct wb35_reg *reg = &pHwData->reg; 157 struct wb35_reg *reg = &pHwData->reg;
160 158
@@ -163,17 +161,18 @@ hal_set_current_channel_ex(struct hw_data *pHwData, struct chan_info channel)
163 161
164 printk("Going to channel: %d/%d\n", channel.band, channel.ChanNo); 162 printk("Going to channel: %d/%d\n", channel.band, channel.ChanNo);
165 163
166 RFSynthesizer_SwitchingChannel(pHwData, channel); // Switch channel 164 RFSynthesizer_SwitchingChannel(pHwData, channel); /* Switch channel */
167 pHwData->Channel = channel.ChanNo; 165 pHwData->Channel = channel.ChanNo;
168 pHwData->band = channel.band; 166 pHwData->band = channel.band;
169#ifdef _PE_STATE_DUMP_ 167#ifdef _PE_STATE_DUMP_
170 printk("Set channel is %d, band =%d\n", pHwData->Channel, 168 printk("Set channel is %d, band =%d\n", pHwData->Channel,
171 pHwData->band); 169 pHwData->band);
172#endif 170#endif
173 reg->M28_MacControl &= ~0xff; // Clean channel information field 171 reg->M28_MacControl &= ~0xff; /* Clean channel information field */
174 reg->M28_MacControl |= channel.ChanNo; 172 reg->M28_MacControl |= channel.ChanNo;
175 Wb35Reg_WriteWithCallbackValue(pHwData, 0x0828, reg->M28_MacControl, 173 Wb35Reg_WriteWithCallbackValue(pHwData, 0x0828, reg->M28_MacControl,
176 (s8 *) & channel, sizeof(struct chan_info)); 174 (s8 *) &channel,
175 sizeof(struct chan_info));
177} 176}
178 177
179static void hal_set_current_channel(struct hw_data *pHwData, struct chan_info channel) 178static void hal_set_current_channel(struct hw_data *pHwData, struct chan_info channel)
@@ -188,21 +187,22 @@ static void hal_set_accept_broadcast(struct hw_data *pHwData, u8 enable)
188 if (pHwData->SurpriseRemove) 187 if (pHwData->SurpriseRemove)
189 return; 188 return;
190 189
191 reg->M00_MacControl &= ~0x02000000; //The HW value 190 reg->M00_MacControl &= ~0x02000000; /* The HW value */
192 191
193 if (enable) 192 if (enable)
194 reg->M00_MacControl |= 0x02000000; //The HW value 193 reg->M00_MacControl |= 0x02000000; /* The HW value */
195 194
196 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl); 195 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
197} 196}
198 197
199//for wep key error detection, we need to accept broadcast packets to be received temporary. 198/* For wep key error detection, we need to accept broadcast packets to be received temporary. */
200static void hal_set_accept_promiscuous(struct hw_data *pHwData, u8 enable) 199static void hal_set_accept_promiscuous(struct hw_data *pHwData, u8 enable)
201{ 200{
202 struct wb35_reg *reg = &pHwData->reg; 201 struct wb35_reg *reg = &pHwData->reg;
203 202
204 if (pHwData->SurpriseRemove) 203 if (pHwData->SurpriseRemove)
205 return; 204 return;
205
206 if (enable) { 206 if (enable) {
207 reg->M00_MacControl |= 0x00400000; 207 reg->M00_MacControl |= 0x00400000;
208 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl); 208 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
@@ -219,9 +219,9 @@ static void hal_set_accept_multicast(struct hw_data *pHwData, u8 enable)
219 if (pHwData->SurpriseRemove) 219 if (pHwData->SurpriseRemove)
220 return; 220 return;
221 221
222 reg->M00_MacControl &= ~0x01000000; //The HW value 222 reg->M00_MacControl &= ~0x01000000; /* The HW value */
223 if (enable) 223 if (enable)
224 reg->M00_MacControl |= 0x01000000; //The HW value 224 reg->M00_MacControl |= 0x01000000; /* The HW value */
225 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl); 225 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
226} 226}
227 227
@@ -232,13 +232,12 @@ static void hal_set_accept_beacon(struct hw_data *pHwData, u8 enable)
232 if (pHwData->SurpriseRemove) 232 if (pHwData->SurpriseRemove)
233 return; 233 return;
234 234
235 // 20040108 debug 235 if (!enable) /* Due to SME and MLME are not suitable for 35 */
236 if (!enable) //Due to SME and MLME are not suitable for 35
237 return; 236 return;
238 237
239 reg->M00_MacControl &= ~0x04000000; //The HW value 238 reg->M00_MacControl &= ~0x04000000; /* The HW value */
240 if (enable) 239 if (enable)
241 reg->M00_MacControl |= 0x04000000; //The HW value 240 reg->M00_MacControl |= 0x04000000; /* The HW value */
242 241
243 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl); 242 Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
244} 243}
@@ -283,8 +282,7 @@ static const struct ieee80211_ops wbsoft_ops = {
283 .get_tsf = wbsoft_get_tsf, 282 .get_tsf = wbsoft_get_tsf,
284}; 283};
285 284
286static void 285static void hal_set_ethernet_address(struct hw_data *pHwData, u8 *current_address)
287hal_set_ethernet_address(struct hw_data *pHwData, u8 * current_address)
288{ 286{
289 u32 ltmp[2]; 287 u32 ltmp[2];
290 288
@@ -294,14 +292,12 @@ hal_set_ethernet_address(struct hw_data *pHwData, u8 * current_address)
294 memcpy(pHwData->CurrentMacAddress, current_address, ETH_ALEN); 292 memcpy(pHwData->CurrentMacAddress, current_address, ETH_ALEN);
295 293
296 ltmp[0] = cpu_to_le32(*(u32 *) pHwData->CurrentMacAddress); 294 ltmp[0] = cpu_to_le32(*(u32 *) pHwData->CurrentMacAddress);
297 ltmp[1] = 295 ltmp[1] = cpu_to_le32(*(u32 *) (pHwData->CurrentMacAddress + 4)) & 0xffff;
298 cpu_to_le32(*(u32 *) (pHwData->CurrentMacAddress + 4)) & 0xffff;
299 296
300 Wb35Reg_BurstWrite(pHwData, 0x03e8, ltmp, 2, AUTO_INCREMENT); 297 Wb35Reg_BurstWrite(pHwData, 0x03e8, ltmp, 2, AUTO_INCREMENT);
301} 298}
302 299
303static void 300static void hal_get_permanent_address(struct hw_data *pHwData, u8 *pethernet_address)
304hal_get_permanent_address(struct hw_data *pHwData, u8 * pethernet_address)
305{ 301{
306 if (pHwData->SurpriseRemove) 302 if (pHwData->SurpriseRemove)
307 return; 303 return;
@@ -319,7 +315,7 @@ static void hal_stop(struct hw_data *pHwData)
319 pHwData->Wb35Tx.tx_halt = 1; 315 pHwData->Wb35Tx.tx_halt = 1;
320 Wb35Tx_stop(pHwData); 316 Wb35Tx_stop(pHwData);
321 317
322 reg->D00_DmaControl &= ~0xc0000000; //Tx Off, Rx Off 318 reg->D00_DmaControl &= ~0xc0000000; /* Tx Off, Rx Off */
323 Wb35Reg_Write(pHwData, 0x0400, reg->D00_DmaControl); 319 Wb35Reg_Write(pHwData, 0x0400, reg->D00_DmaControl);
324} 320}
325 321
@@ -346,14 +342,14 @@ u8 hal_get_antenna_number(struct hw_data *pHwData)
346} 342}
347 343
348/* 0 : radio on; 1: radio off */ 344/* 0 : radio on; 1: radio off */
349static u8 hal_get_hw_radio_off(struct hw_data * pHwData) 345static u8 hal_get_hw_radio_off(struct hw_data *pHwData)
350{ 346{
351 struct wb35_reg *reg = &pHwData->reg; 347 struct wb35_reg *reg = &pHwData->reg;
352 348
353 if (pHwData->SurpriseRemove) 349 if (pHwData->SurpriseRemove)
354 return 1; 350 return 1;
355 351
356 //read the bit16 of register U1B0 352 /* read the bit16 of register U1B0 */
357 Wb35Reg_Read(pHwData, 0x3b0, &reg->U1B0); 353 Wb35Reg_Read(pHwData, 0x3b0, &reg->U1B0);
358 if ((reg->U1B0 & 0x00010000)) { 354 if ((reg->U1B0 & 0x00010000)) {
359 pHwData->CurrentRadioHw = 1; 355 pHwData->CurrentRadioHw = 1;
@@ -387,104 +383,98 @@ static void hal_led_control(unsigned long data)
387 383
388 if (pHwData->LED_control) { 384 if (pHwData->LED_control) {
389 ltmp2 = pHwData->LED_control & 0xff; 385 ltmp2 = pHwData->LED_control & 0xff;
390 if (ltmp2 == 5) // 5 is WPS mode 386 if (ltmp2 == 5) { /* 5 is WPS mode */
391 {
392 TimeInterval = 100; 387 TimeInterval = 100;
393 ltmp2 = (pHwData->LED_control >> 8) & 0xff; 388 ltmp2 = (pHwData->LED_control >> 8) & 0xff;
394 switch (ltmp2) { 389 switch (ltmp2) {
395 case 1: // [0.2 On][0.1 Off]... 390 case 1: /* [0.2 On][0.1 Off]... */
396 pHwData->LED_Blinking %= 3; 391 pHwData->LED_Blinking %= 3;
397 ltmp = 0x1010; // Led 1 & 0 Green and Red 392 ltmp = 0x1010; /* Led 1 & 0 Green and Red */
398 if (pHwData->LED_Blinking == 2) // Turn off 393 if (pHwData->LED_Blinking == 2) /* Turn off */
399 ltmp = 0; 394 ltmp = 0;
400 break; 395 break;
401 case 2: // [0.1 On][0.1 Off]... 396 case 2: /* [0.1 On][0.1 Off]... */
402 pHwData->LED_Blinking %= 2; 397 pHwData->LED_Blinking %= 2;
403 ltmp = 0x0010; // Led 0 red color 398 ltmp = 0x0010; /* Led 0 red color */
404 if (pHwData->LED_Blinking) // Turn off 399 if (pHwData->LED_Blinking) /* Turn off */
405 ltmp = 0; 400 ltmp = 0;
406 break; 401 break;
407 case 3: // [0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.5 Off]... 402 case 3: /* [0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.5 Off]... */
408 pHwData->LED_Blinking %= 15; 403 pHwData->LED_Blinking %= 15;
409 ltmp = 0x0010; // Led 0 red color 404 ltmp = 0x0010; /* Led 0 red color */
410 if ((pHwData->LED_Blinking >= 9) || (pHwData->LED_Blinking % 2)) // Turn off 0.6 sec 405 if ((pHwData->LED_Blinking >= 9) || (pHwData->LED_Blinking % 2)) /* Turn off 0.6 sec */
411 ltmp = 0; 406 ltmp = 0;
412 break; 407 break;
413 case 4: // [300 On][ off ] 408 case 4: /* [300 On][ off ] */
414 ltmp = 0x1000; // Led 1 Green color 409 ltmp = 0x1000; /* Led 1 Green color */
415 if (pHwData->LED_Blinking >= 3000) 410 if (pHwData->LED_Blinking >= 3000)
416 ltmp = 0; // led maybe on after 300sec * 32bit counter overlap. 411 ltmp = 0; /* led maybe on after 300sec * 32bit counter overlap. */
417 break; 412 break;
418 } 413 }
419 pHwData->LED_Blinking++; 414 pHwData->LED_Blinking++;
420 415
421 reg->U1BC_LEDConfigure = ltmp; 416 reg->U1BC_LEDConfigure = ltmp;
422 if (LEDSet != 7) // Only 111 mode has 2 LEDs on PCB. 417 if (LEDSet != 7) { /* Only 111 mode has 2 LEDs on PCB. */
423 { 418 reg->U1BC_LEDConfigure |= (ltmp & 0xff) << 8; /* Copy LED result to each LED control register */
424 reg->U1BC_LEDConfigure |= (ltmp & 0xff) << 8; // Copy LED result to each LED control register
425 reg->U1BC_LEDConfigure |= (ltmp & 0xff00) >> 8; 419 reg->U1BC_LEDConfigure |= (ltmp & 0xff00) >> 8;
426 } 420 }
427 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); 421 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure);
428 } 422 }
429 } else if (pHwData->CurrentRadioSw || pHwData->CurrentRadioHw) // If radio off 423 } else if (pHwData->CurrentRadioSw || pHwData->CurrentRadioHw) { /* If radio off */
430 {
431 if (reg->U1BC_LEDConfigure & 0x1010) { 424 if (reg->U1BC_LEDConfigure & 0x1010) {
432 reg->U1BC_LEDConfigure &= ~0x1010; 425 reg->U1BC_LEDConfigure &= ~0x1010;
433 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); 426 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure);
434 } 427 }
435 } else { 428 } else {
436 switch (LEDSet) { 429 switch (LEDSet) {
437 case 4: // [100] Only 1 Led be placed on PCB and use pin 21 of IC. Use LED_0 for showing 430 case 4: /* [100] Only 1 Led be placed on PCB and use pin 21 of IC. Use LED_0 for showing */
438 if (!pHwData->LED_LinkOn) // Blink only if not Link On 431 if (!pHwData->LED_LinkOn) { /* Blink only if not Link On */
439 { 432 /* Blinking if scanning is on progress */
440 // Blinking if scanning is on progress
441 if (pHwData->LED_Scanning) { 433 if (pHwData->LED_Scanning) {
442 if (pHwData->LED_Blinking == 0) { 434 if (pHwData->LED_Blinking == 0) {
443 reg->U1BC_LEDConfigure |= 0x10; 435 reg->U1BC_LEDConfigure |= 0x10;
444 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 On 436 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 On */
445 pHwData->LED_Blinking = 1; 437 pHwData->LED_Blinking = 1;
446 TimeInterval = 300; 438 TimeInterval = 300;
447 } else { 439 } else {
448 reg->U1BC_LEDConfigure &= ~0x10; 440 reg->U1BC_LEDConfigure &= ~0x10;
449 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 Off 441 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
450 pHwData->LED_Blinking = 0; 442 pHwData->LED_Blinking = 0;
451 TimeInterval = 300; 443 TimeInterval = 300;
452 } 444 }
453 } else { 445 } else {
454 //Turn Off LED_0 446 /* Turn Off LED_0 */
455 if (reg->U1BC_LEDConfigure & 0x10) { 447 if (reg->U1BC_LEDConfigure & 0x10) {
456 reg->U1BC_LEDConfigure &= ~0x10; 448 reg->U1BC_LEDConfigure &= ~0x10;
457 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 Off 449 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
458 } 450 }
459 } 451 }
460 } else { 452 } else {
461 // Turn On LED_0 453 /* Turn On LED_0 */
462 if ((reg->U1BC_LEDConfigure & 0x10) == 0) { 454 if ((reg->U1BC_LEDConfigure & 0x10) == 0) {
463 reg->U1BC_LEDConfigure |= 0x10; 455 reg->U1BC_LEDConfigure |= 0x10;
464 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 Off 456 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
465 } 457 }
466 } 458 }
467 break; 459 break;
468 460 case 6: /* [110] Only 1 Led be placed on PCB and use pin 21 of IC. Use LED_0 for showing */
469 case 6: // [110] Only 1 Led be placed on PCB and use pin 21 of IC. Use LED_0 for showing 461 if (!pHwData->LED_LinkOn) { /* Blink only if not Link On */
470 if (!pHwData->LED_LinkOn) // Blink only if not Link On 462 /* Blinking if scanning is on progress */
471 {
472 // Blinking if scanning is on progress
473 if (pHwData->LED_Scanning) { 463 if (pHwData->LED_Scanning) {
474 if (pHwData->LED_Blinking == 0) { 464 if (pHwData->LED_Blinking == 0) {
475 reg->U1BC_LEDConfigure &= ~0xf; 465 reg->U1BC_LEDConfigure &= ~0xf;
476 reg->U1BC_LEDConfigure |= 0x10; 466 reg->U1BC_LEDConfigure |= 0x10;
477 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 On 467 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 On */
478 pHwData->LED_Blinking = 1; 468 pHwData->LED_Blinking = 1;
479 TimeInterval = 300; 469 TimeInterval = 300;
480 } else { 470 } else {
481 reg->U1BC_LEDConfigure &= ~0x1f; 471 reg->U1BC_LEDConfigure &= ~0x1f;
482 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 Off 472 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
483 pHwData->LED_Blinking = 0; 473 pHwData->LED_Blinking = 0;
484 TimeInterval = 300; 474 TimeInterval = 300;
485 } 475 }
486 } else { 476 } else {
487 // 20060901 Gray blinking if in disconnect state and not scanning 477 /* Gray blinking if in disconnect state and not scanning */
488 ltmp = reg->U1BC_LEDConfigure; 478 ltmp = reg->U1BC_LEDConfigure;
489 reg->U1BC_LEDConfigure &= ~0x1f; 479 reg->U1BC_LEDConfigure &= ~0x1f;
490 if (LED_GRAY2[(pHwData->LED_Blinking % 30)]) { 480 if (LED_GRAY2[(pHwData->LED_Blinking % 30)]) {
@@ -494,85 +484,78 @@ static void hal_led_control(unsigned long data)
494 } 484 }
495 pHwData->LED_Blinking++; 485 pHwData->LED_Blinking++;
496 if (reg->U1BC_LEDConfigure != ltmp) 486 if (reg->U1BC_LEDConfigure != ltmp)
497 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 Off 487 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
498 TimeInterval = 100; 488 TimeInterval = 100;
499 } 489 }
500 } else { 490 } else {
501 // Turn On LED_0 491 /* Turn On LED_0 */
502 if ((reg->U1BC_LEDConfigure & 0x10) == 0) { 492 if ((reg->U1BC_LEDConfigure & 0x10) == 0) {
503 reg->U1BC_LEDConfigure |= 0x10; 493 reg->U1BC_LEDConfigure |= 0x10;
504 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_0 Off 494 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
505 } 495 }
506 } 496 }
507 break; 497 break;
508 498 case 5: /* [101] Only 1 Led be placed on PCB and use LED_1 for showing */
509 case 5: // [101] Only 1 Led be placed on PCB and use LED_1 for showing 499 if (!pHwData->LED_LinkOn) { /* Blink only if not Link On */
510 if (!pHwData->LED_LinkOn) // Blink only if not Link On 500 /* Blinking if scanning is on progress */
511 {
512 // Blinking if scanning is on progress
513 if (pHwData->LED_Scanning) { 501 if (pHwData->LED_Scanning) {
514 if (pHwData->LED_Blinking == 0) { 502 if (pHwData->LED_Blinking == 0) {
515 reg->U1BC_LEDConfigure |= 503 reg->U1BC_LEDConfigure |= 0x1000;
516 0x1000; 504 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 On */
517 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_1 On
518 pHwData->LED_Blinking = 1; 505 pHwData->LED_Blinking = 1;
519 TimeInterval = 300; 506 TimeInterval = 300;
520 } else { 507 } else {
521 reg->U1BC_LEDConfigure &= 508 reg->U1BC_LEDConfigure &= ~0x1000;
522 ~0x1000; 509 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 Off */
523 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_1 Off
524 pHwData->LED_Blinking = 0; 510 pHwData->LED_Blinking = 0;
525 TimeInterval = 300; 511 TimeInterval = 300;
526 } 512 }
527 } else { 513 } else {
528 //Turn Off LED_1 514 /* Turn Off LED_1 */
529 if (reg->U1BC_LEDConfigure & 0x1000) { 515 if (reg->U1BC_LEDConfigure & 0x1000) {
530 reg->U1BC_LEDConfigure &= 516 reg->U1BC_LEDConfigure &= ~0x1000;
531 ~0x1000; 517 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 Off */
532 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_1 Off
533 } 518 }
534 } 519 }
535 } else { 520 } else {
536 // Is transmitting/receiving ?? 521 /* Is transmitting/receiving ?? */
537 if ((adapter->RxByteCount != 522 if ((adapter->RxByteCount !=
538 pHwData->RxByteCountLast) 523 pHwData->RxByteCountLast)
539 || (adapter->TxByteCount != 524 || (adapter->TxByteCount !=
540 pHwData->TxByteCountLast)) { 525 pHwData->TxByteCountLast)) {
541 if ((reg->U1BC_LEDConfigure & 0x3000) != 526 if ((reg->U1BC_LEDConfigure & 0x3000) !=
542 0x3000) { 527 0x3000) {
543 reg->U1BC_LEDConfigure |= 528 reg->U1BC_LEDConfigure |= 0x3000;
544 0x3000; 529 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 On */
545 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_1 On
546 } 530 }
547 // Update variable 531 /* Update variable */
548 pHwData->RxByteCountLast = 532 pHwData->RxByteCountLast =
549 adapter->RxByteCount; 533 adapter->RxByteCount;
550 pHwData->TxByteCountLast = 534 pHwData->TxByteCountLast =
551 adapter->TxByteCount; 535 adapter->TxByteCount;
552 TimeInterval = 200; 536 TimeInterval = 200;
553 } else { 537 } else {
554 // Turn On LED_1 and blinking if transmitting/receiving 538 /* Turn On LED_1 and blinking if transmitting/receiving */
555 if ((reg->U1BC_LEDConfigure & 0x3000) != 539 if ((reg->U1BC_LEDConfigure & 0x3000) !=
556 0x1000) { 540 0x1000) {
557 reg->U1BC_LEDConfigure &= 541 reg->U1BC_LEDConfigure &=
558 ~0x3000; 542 ~0x3000;
559 reg->U1BC_LEDConfigure |= 543 reg->U1BC_LEDConfigure |=
560 0x1000; 544 0x1000;
561 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); // LED_1 On 545 Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 On */
562 } 546 }
563 } 547 }
564 } 548 }
565 break; 549 break;
566 550 default: /* Default setting. 2 LED be placed on PCB. LED_0: Link On LED_1 Active */
567 default: // Default setting. 2 LED be placed on PCB. LED_0: Link On LED_1 Active
568 if ((reg->U1BC_LEDConfigure & 0x3000) != 0x3000) { 551 if ((reg->U1BC_LEDConfigure & 0x3000) != 0x3000) {
569 reg->U1BC_LEDConfigure |= 0x3000; // LED_1 is always on and event enable 552 reg->U1BC_LEDConfigure |= 0x3000; /* LED_1 is always on and event enable */
570 Wb35Reg_Write(pHwData, 0x03bc, 553 Wb35Reg_Write(pHwData, 0x03bc,
571 reg->U1BC_LEDConfigure); 554 reg->U1BC_LEDConfigure);
572 } 555 }
573 556
574 if (pHwData->LED_Blinking) { 557 if (pHwData->LED_Blinking) {
575 // Gray blinking 558 /* Gray blinking */
576 reg->U1BC_LEDConfigure &= ~0x0f; 559 reg->U1BC_LEDConfigure &= ~0x0f;
577 reg->U1BC_LEDConfigure |= 0x10; 560 reg->U1BC_LEDConfigure |= 0x10;
578 reg->U1BC_LEDConfigure |= 561 reg->U1BC_LEDConfigure |=
@@ -584,7 +567,7 @@ static void hal_led_control(unsigned long data)
584 if (pHwData->LED_Blinking < 40) 567 if (pHwData->LED_Blinking < 40)
585 TimeInterval = 100; 568 TimeInterval = 100;
586 else { 569 else {
587 pHwData->LED_Blinking = 0; // Stop blinking 570 pHwData->LED_Blinking = 0; /* Stop blinking */
588 reg->U1BC_LEDConfigure &= ~0x0f; 571 reg->U1BC_LEDConfigure &= ~0x0f;
589 Wb35Reg_Write(pHwData, 0x03bc, 572 Wb35Reg_Write(pHwData, 0x03bc,
590 reg->U1BC_LEDConfigure); 573 reg->U1BC_LEDConfigure);
@@ -593,16 +576,14 @@ static void hal_led_control(unsigned long data)
593 } 576 }
594 577
595 if (pHwData->LED_LinkOn) { 578 if (pHwData->LED_LinkOn) {
596 if (!(reg->U1BC_LEDConfigure & 0x10)) // Check the LED_0 579 if (!(reg->U1BC_LEDConfigure & 0x10)) { /* Check the LED_0 */
597 { 580 /* Try to turn ON LED_0 after gray blinking */
598 //Try to turn ON LED_0 after gray blinking
599 reg->U1BC_LEDConfigure |= 0x10; 581 reg->U1BC_LEDConfigure |= 0x10;
600 pHwData->LED_Blinking = 1; //Start blinking 582 pHwData->LED_Blinking = 1; /* Start blinking */
601 TimeInterval = 50; 583 TimeInterval = 50;
602 } 584 }
603 } else { 585 } else {
604 if (reg->U1BC_LEDConfigure & 0x10) // Check the LED_0 586 if (reg->U1BC_LEDConfigure & 0x10) { /* Check the LED_0 */
605 {
606 reg->U1BC_LEDConfigure &= ~0x10; 587 reg->U1BC_LEDConfigure &= ~0x10;
607 Wb35Reg_Write(pHwData, 0x03bc, 588 Wb35Reg_Write(pHwData, 0x03bc,
608 reg->U1BC_LEDConfigure); 589 reg->U1BC_LEDConfigure);
@@ -611,7 +592,7 @@ static void hal_led_control(unsigned long data)
611 break; 592 break;
612 } 593 }
613 594
614 //20060828.1 Active send null packet to avoid AP disconnect 595 /* Active send null packet to avoid AP disconnect */
615 if (pHwData->LED_LinkOn) { 596 if (pHwData->LED_LinkOn) {
616 pHwData->NullPacketCount += TimeInterval; 597 pHwData->NullPacketCount += TimeInterval;
617 if (pHwData->NullPacketCount >= 598 if (pHwData->NullPacketCount >=
@@ -622,7 +603,7 @@ static void hal_led_control(unsigned long data)
622 } 603 }
623 604
624 pHwData->time_count += TimeInterval; 605 pHwData->time_count += TimeInterval;
625 Wb35Tx_CurrentTime(adapter, pHwData->time_count); // 20060928 add 606 Wb35Tx_CurrentTime(adapter, pHwData->time_count);
626 pHwData->LEDTimer.expires = jiffies + msecs_to_jiffies(TimeInterval); 607 pHwData->LEDTimer.expires = jiffies + msecs_to_jiffies(TimeInterval);
627 add_timer(&pHwData->LEDTimer); 608 add_timer(&pHwData->LEDTimer);
628} 609}
@@ -654,7 +635,7 @@ static int hal_init_hardware(struct ieee80211_hw *hw)
654 SoftwareSet = hal_software_set(pHwData); 635 SoftwareSet = hal_software_set(pHwData);
655 636
656#ifdef Vendor2 637#ifdef Vendor2
657 // Try to make sure the EEPROM contain 638 /* Try to make sure the EEPROM contain */
658 SoftwareSet >>= 8; 639 SoftwareSet >>= 8;
659 if (SoftwareSet != 0x82) 640 if (SoftwareSet != 0x82)
660 return false; 641 return false;
diff --git a/drivers/staging/winbond/wbusb_s.h b/drivers/staging/winbond/wbusb_s.h
index 0c7e6a383f2d..8961ae594c4e 100644
--- a/drivers/staging/winbond/wbusb_s.h
+++ b/drivers/staging/winbond/wbusb_s.h
@@ -1,16 +1,10 @@
1//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1/* =========================================================
2// Copyright (c) 1996-2004 Winbond Electronic Corporation 2 * Copyright (c) 1996-2004 Winbond Electronic Corporation
3// 3 *
4// Module Name: 4 * Module Name:
5// wbusb_s.h 5 * wbusb_s.h
6// 6 * =========================================================
7// Abstract: 7 */
8// Linux driver.
9//
10// Author:
11//
12//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
13
14#ifndef __WINBOND_WBUSB_S_H 8#ifndef __WINBOND_WBUSB_S_H
15#define __WINBOND_WBUSB_S_H 9#define __WINBOND_WBUSB_S_H
16 10
@@ -18,8 +12,7 @@
18 12
19struct wb_usb { 13struct wb_usb {
20 u32 IsUsb20; 14 u32 IsUsb20;
21 struct usb_device *udev; 15 struct usb_device *udev;
22 u32 DetectCount; 16 u32 DetectCount;
23}; 17};
24
25#endif 18#endif
diff --git a/drivers/staging/wlags49_h2/Kconfig b/drivers/staging/wlags49_h2/Kconfig
index 92053fe70130..b6fc2ca7d85c 100644
--- a/drivers/staging/wlags49_h2/Kconfig
+++ b/drivers/staging/wlags49_h2/Kconfig
@@ -1,6 +1,6 @@
1config WLAGS49_H2 1config WLAGS49_H2
2 tristate "Agere Systems HERMES II Wireless PC Card Model 0110" 2 tristate "Agere Systems HERMES II Wireless PC Card Model 0110"
3 depends on WLAN_80211 && WIRELESS_EXT && PCMCIA 3 depends on WLAN && WIRELESS_EXT && PCMCIA
4 select WEXT_SPY 4 select WEXT_SPY
5 ---help--- 5 ---help---
6 Driver for wireless cards using Agere's HERMES II chipset 6 Driver for wireless cards using Agere's HERMES II chipset
diff --git a/drivers/staging/wlags49_h2/README.wlags49 b/drivers/staging/wlags49_h2/README.wlags49
index 7586fd09adc9..f65acd6f5f54 100644
--- a/drivers/staging/wlags49_h2/README.wlags49
+++ b/drivers/staging/wlags49_h2/README.wlags49
@@ -84,7 +84,7 @@ TABLE OF CONTENTS.
84 the functions to interface to the Network Interface Card (NIC). The HCF 84 the functions to interface to the Network Interface Card (NIC). The HCF
85 provides for all WaveLAN NIC types one standard interface to the MSF. 85 provides for all WaveLAN NIC types one standard interface to the MSF.
86 This I/F is called the Wireless Connection Interface (WCI) and is the 86 This I/F is called the Wireless Connection Interface (WCI) and is the
87 subject of a seperate document (025726). 87 subject of a separate document (025726).
88 88
89 The HCF directory contains firmware images to allow the card to operate in 89 The HCF directory contains firmware images to allow the card to operate in
90 either station (STA) or Access Point (AP) mode. In the build process, the 90 either station (STA) or Access Point (AP) mode. In the build process, the
diff --git a/drivers/staging/wlags49_h2/ap_h2.c b/drivers/staging/wlags49_h2/ap_h2.c
index f5123d2cb4c1..eb8244c4d6f0 100644
--- a/drivers/staging/wlags49_h2/ap_h2.c
+++ b/drivers/staging/wlags49_h2/ap_h2.c
@@ -25,10 +25,10 @@
25 */ 25 */
26 26
27 27
28#include "hcfcfg.h" // to get hcf_16 etc defined as well as 28#include "hcfcfg.h" /* to get hcf_16 etc defined as well as */
29 // possible settings which inluence mdd.h or dhf.h 29 /* possible settings which inluence mdd.h or dhf.h */
30#include "mdd.h" //to get COMP_ID_STA etc defined 30#include "mdd.h" /* to get COMP_ID_STA etc defined */
31#include "dhf.h" //used to be "fhfmem.h", to get memblock,plugrecord, 31#include "dhf.h" /* used to be "fhfmem.h", to get memblock,plugrecord, */
32 32
33static const hcf_8 fw_image_1_data[] = { 33static const hcf_8 fw_image_1_data[] = {
34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -3238,59 +3238,59 @@ static const hcf_8 fw_image_4_data[] = {
3238 3238
3239static const CFG_IDENTITY_STRCT fw_image_infoidentity[] = { 3239static const CFG_IDENTITY_STRCT fw_image_infoidentity[] = {
3240 { 3240 {
3241 sizeof( CFG_IDENTITY_STRCT ) / sizeof(hcf_16) - 1, 3241 sizeof(CFG_IDENTITY_STRCT) / sizeof(hcf_16) - 1,
3242 CFG_FW_IDENTITY, 3242 CFG_FW_IDENTITY,
3243 COMP_ID_FW_AP, 3243 COMP_ID_FW_AP,
3244 2, //Variant 3244 2, /* Variant /
3245 2, //Major 3245 2, /* Major */
3246 36 //Minor 3246 36 /* Minor */
3247 }, 3247 },
3248 { 0000, 0000, 0000, 0000, 0000, 0000 } //endsentinel 3248 { 0000, 0000, 0000, 0000, 0000, 0000 } /* endsentinel */
3249}; 3249};
3250 3250
3251static const CFG_PROG_STRCT fw_image_code[] = { 3251static const CFG_PROG_STRCT fw_image_code[] = {
3252 { 3252 {
3253 8, 3253 8,
3254 CFG_PROG, 3254 CFG_PROG,
3255 CFG_PROG_VOLATILE, // mode 3255 CFG_PROG_VOLATILE, /* mode */
3256 0x0146, // sizeof(fw_image_1_data), 3256 0x0146, /* sizeof(fw_image_1_data), */
3257 0x00000060, // Target address in NIC Memory 3257 0x00000060, /* Target address in NIC Memory */
3258 0x0000, // CRC: yes/no TYPE: primary/station/tertiary 3258 0x0000, /* CRC: yes/no TYPE: primary/station/tertiary */
3259 (hcf_8 FAR *) fw_image_1_data 3259 (hcf_8 FAR *) fw_image_1_data
3260 }, 3260 },
3261 { 3261 {
3262 8, 3262 8,
3263 CFG_PROG, 3263 CFG_PROG,
3264 CFG_PROG_VOLATILE, // mode 3264 CFG_PROG_VOLATILE, /* mode */
3265 0x1918, // sizeof(fw_image_2_data), 3265 0x1918, /* sizeof(fw_image_2_data), */
3266 0x00000C16, // Target address in NIC Memory 3266 0x00000C16, /* Target address in NIC Memory */
3267 0x0000, // CRC: yes/no TYPE: primary/station/tertiary 3267 0x0000, /* CRC: yes/no TYPE: primary/station/tertiary */
3268 (hcf_8 FAR *) fw_image_2_data 3268 (hcf_8 FAR *) fw_image_2_data
3269 }, 3269 },
3270 { 3270 {
3271 8, 3271 8,
3272 CFG_PROG, 3272 CFG_PROG,
3273 CFG_PROG_VOLATILE, // mode 3273 CFG_PROG_VOLATILE, /* mode */
3274 0x01bc, // sizeof(fw_image_3_data), 3274 0x01bc, /* sizeof(fw_image_3_data), */
3275 0x001E252E, // Target address in NIC Memory 3275 0x001E252E, /* Target address in NIC Memory */
3276 0x0000, // CRC: yes/no TYPE: primary/station/tertiary 3276 0x0000, /* CRC: yes/no TYPE: primary/station/tertiary */
3277 (hcf_8 FAR *) fw_image_3_data 3277 (hcf_8 FAR *) fw_image_3_data
3278 }, 3278 },
3279 { 3279 {
3280 8, 3280 8,
3281 CFG_PROG, 3281 CFG_PROG,
3282 CFG_PROG_VOLATILE, // mode 3282 CFG_PROG_VOLATILE, /* mode */
3283 0xab28, // sizeof(fw_image_4_data), 3283 0xab28, /* sizeof(fw_image_4_data), */
3284 0x001F4000, // Target address in NIC Memory 3284 0x001F4000, /* Target address in NIC Memory */
3285 0x0000, // CRC: yes/no TYPE: primary/station/tertiary 3285 0x0000, /* CRC: yes/no TYPE: primary/station/tertiary */
3286 (hcf_8 FAR *) fw_image_4_data 3286 (hcf_8 FAR *) fw_image_4_data
3287 }, 3287 },
3288 { 3288 {
3289 5, 3289 5,
3290 CFG_PROG, 3290 CFG_PROG,
3291 CFG_PROG_STOP, // mode 3291 CFG_PROG_STOP, /* mode*/
3292 0000, 3292 0000,
3293 0x000F1297, // Start execution address 3293 0x000F1297, /* Start execution address */
3294 }, 3294 },
3295 { 0000, 0000, 0000, 0000, 00000000, 0000, 00000000} 3295 { 0000, 0000, 0000, 0000, 00000000, 0000, 00000000}
3296}; 3296};
@@ -3301,7 +3301,7 @@ static const CFG_RANGE20_STRCT fw_image_infocompat[] = {
3301 COMP_ROLE_SUPL, 3301 COMP_ROLE_SUPL,
3302 COMP_ID_APF, 3302 COMP_ID_APF,
3303 { 3303 {
3304 { 2, 2, 4 } //variant, bottom, top 3304 { 2, 2, 4 } /* variant, bottom, top */
3305 } 3305 }
3306 }, 3306 },
3307 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), 3307 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)),
@@ -3309,9 +3309,9 @@ static const CFG_RANGE20_STRCT fw_image_infocompat[] = {
3309 COMP_ROLE_ACT, 3309 COMP_ROLE_ACT,
3310 COMP_ID_MFI, 3310 COMP_ID_MFI,
3311 { 3311 {
3312 { 4, 6, 7 }, //variant, bottom, top 3312 { 4, 6, 7 }, /* variant, bottom, top */
3313 { 5, 6, 7 }, //variant, bottom, top 3313 { 5, 6, 7 }, /* variant, bottom, top */
3314 { 6, 6, 7 } //variant, bottom, top 3314 { 6, 6, 7 } /* variant, bottom, top */
3315 } 3315 }
3316 }, 3316 },
3317 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)), 3317 { 3 + ((20 * sizeof(CFG_RANGE_SPEC_STRCT)) / sizeof(hcf_16)),
@@ -3319,18 +3319,18 @@ static const CFG_RANGE20_STRCT fw_image_infocompat[] = {
3319 COMP_ROLE_ACT, 3319 COMP_ROLE_ACT,
3320 COMP_ID_CFI, 3320 COMP_ID_CFI,
3321 { 3321 {
3322 { 2, 1, 2 } //variant, bottom, top 3322 { 2, 1, 2 } /* variant, bottom, top */
3323 } 3323 }
3324 }, 3324 },
3325 { 0000, 0000, 0000, 0000, { { 0000, 0000, 0000 } } } //endsentinel 3325 { 0000, 0000, 0000, 0000, { { 0000, 0000, 0000 } } } /* endsentinel */
3326}; 3326};
3327 3327
3328memimage fw_image = { 3328memimage fw_image = {
3329 "FUPU7D37dhfwci\001C", //signature, <format number>, C/Bin type 3329 "FUPU7D37dhfwci\001C", /* signature, <format number>, C/Bin type */
3330 (CFG_PROG_STRCT *) fw_image_code, 3330 (CFG_PROG_STRCT *) fw_image_code,
3331 0x000F1297, 3331 0x000F1297,
3332 00000000, //(dummy) pdaplug 3332 00000000, /* (dummy) pdaplug */
3333 00000000, //(dummy) priplug 3333 00000000, /* (dummy) priplug */
3334 (CFG_RANGE20_STRCT *) fw_image_infocompat, 3334 (CFG_RANGE20_STRCT *) fw_image_infocompat,
3335 (CFG_IDENTITY_STRCT *) fw_image_infoidentity, 3335 (CFG_IDENTITY_STRCT *) fw_image_infoidentity,
3336}; 3336};
diff --git a/drivers/staging/wlags49_h2/debug.h b/drivers/staging/wlags49_h2/debug.h
index 0b52e17b3011..2c3dd140a35f 100644
--- a/drivers/staging/wlags49_h2/debug.h
+++ b/drivers/staging/wlags49_h2/debug.h
@@ -22,7 +22,7 @@
22 * software indicates your acceptance of these terms and conditions. If you do 22 * software indicates your acceptance of these terms and conditions. If you do
23 * not agree with these terms and conditions, do not use the software. 23 * not agree with these terms and conditions, do not use the software.
24 * 24 *
25 * Copyright © 2003 Agere Systems Inc. 25 * Copyright (c) 2003 Agere Systems Inc.
26 * All rights reserved. 26 * All rights reserved.
27 * 27 *
28 * Redistribution and use in source or binary forms, with or without 28 * Redistribution and use in source or binary forms, with or without
@@ -70,7 +70,7 @@
70#else 70#else
71#undef DBG 71#undef DBG
72#define DBG 1 72#define DBG 1
73#endif //DBG 73#endif /* DBG */
74 74
75 75
76 76
@@ -84,7 +84,7 @@
84#ifndef DBG_LVL 84#ifndef DBG_LVL
85#define DBG_LVL 5 /* yields nothing via init_module, 85#define DBG_LVL 5 /* yields nothing via init_module,
86 original value of 5 yields DBG_TRACE_ON and DBG_VERBOSE_ON */ 86 original value of 5 yields DBG_TRACE_ON and DBG_VERBOSE_ON */
87#endif // DBG_LVL 87#endif /* DBG_LVL*/
88 88
89 89
90#define DBG_ERROR_ON 0x00000001L 90#define DBG_ERROR_ON 0x00000001L
@@ -100,80 +100,94 @@
100 100
101#define DBG_DEFAULTS (DBG_ERROR_ON | DBG_WARNING_ON | DBG_BREAK_ON) 101#define DBG_DEFAULTS (DBG_ERROR_ON | DBG_WARNING_ON | DBG_BREAK_ON)
102 102
103#define DBG_FLAGS(A) (A)->DebugFlag 103#define DBG_FLAGS(A) ((A)->DebugFlag)
104#define DBG_NAME(A) (A)->dbgName 104#define DBG_NAME(A) ((A)->dbgName)
105#define DBG_LEVEL(A) (A)->dbgLevel 105#define DBG_LEVEL(A) ((A)->dbgLevel)
106 106
107 107
108#ifndef PRINTK 108#ifndef PRINTK
109# define PRINTK(S...) printk(S) 109# define PRINTK(S...) printk(S)
110#endif // PRINTK 110#endif /* PRINTK */
111 111
112 112
113#ifndef DBG_PRINT 113#ifndef DBG_PRINT
114# define DBG_PRINT(S...) PRINTK(KERN_DEBUG S) 114# define DBG_PRINT(S...) PRINTK(KERN_DEBUG S)
115#endif // DBG_PRINT 115#endif /* DBG_PRINT */
116 116
117 117
118#ifndef DBG_PRINTC 118#ifndef DBG_PRINTC
119# define DBG_PRINTC(S...) PRINTK(S) 119# define DBG_PRINTC(S...) PRINTK(S)
120#endif // DBG_PRINTC 120#endif /* DBG_PRINTC */
121 121
122 122
123#ifndef DBG_TRAP 123#ifndef DBG_TRAP
124# define DBG_TRAP {} 124# define DBG_TRAP {}
125#endif // DBG_TRAP 125#endif /* DBG_TRAP */
126 126
127 127
128#define _ENTER_STR ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>" 128#define _ENTER_STR ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>"
129#define _LEAVE_STR "<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<" 129#define _LEAVE_STR "<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<"
130 130
131 131
132#define _DBG_ENTER(A) DBG_PRINT("%s:%.*s:%s\n",DBG_NAME(A),++DBG_LEVEL(A),_ENTER_STR,__FUNC__) 132#define _DBG_ENTER(A) DBG_PRINT("%s:%.*s:%s\n", DBG_NAME(A), ++DBG_LEVEL(A), _ENTER_STR, __FUNC__)
133#define _DBG_LEAVE(A) DBG_PRINT("%s:%.*s:%s\n",DBG_NAME(A),DBG_LEVEL(A)--,_LEAVE_STR,__FUNC__) 133#define _DBG_LEAVE(A) DBG_PRINT("%s:%.*s:%s\n", DBG_NAME(A), DBG_LEVEL(A)--, _LEAVE_STR, __FUNC__)
134 134
135 135
136#define DBG_FUNC(F) static const char *__FUNC__ = F; 136#define DBG_FUNC(F) static const char *__FUNC__ = F;
137 137
138#define DBG_ENTER(A) {if (DBG_FLAGS(A) & DBG_TRACE_ON) _DBG_ENTER(A);} 138#define DBG_ENTER(A) {if (DBG_FLAGS(A) & DBG_TRACE_ON) \
139 _DBG_ENTER(A); }
139 140
140#define DBG_LEAVE(A) {if (DBG_FLAGS(A) & DBG_TRACE_ON) _DBG_LEAVE(A);} 141#define DBG_LEAVE(A) {if (DBG_FLAGS(A) & DBG_TRACE_ON) \
142 _DBG_LEAVE(A); }
141 143
142#define DBG_PARAM(A,N,F,S...) {if (DBG_FLAGS(A) & DBG_PARAM_ON) \ 144#define DBG_PARAM(A, N, F, S...) {if (DBG_FLAGS(A) & DBG_PARAM_ON) \
143 DBG_PRINT(" %s -- "F"\n",N,S);} 145 DBG_PRINT(" %s -- "F"\n", N, S); }
144 146
145 147
146#define DBG_ERROR(A,S...) {if (DBG_FLAGS(A) & DBG_ERROR_ON) \ 148#define DBG_ERROR(A, S...) {if (DBG_FLAGS(A) & DBG_ERROR_ON) {\
147 {DBG_PRINT("%s:ERROR:%s ",DBG_NAME(A),__FUNC__);DBG_PRINTC(S);DBG_TRAP;}} 149 DBG_PRINT("%s:ERROR:%s ", DBG_NAME(A), __FUNC__);\
150 DBG_PRINTC(S); \
151 DBG_TRAP; \
152 } \
153 }
148 154
149 155
150#define DBG_WARNING(A,S...) {if (DBG_FLAGS(A) & DBG_WARNING_ON) \ 156#define DBG_WARNING(A, S...) {if (DBG_FLAGS(A) & DBG_WARNING_ON) {\
151 {DBG_PRINT("%s:WARNING:%s ",DBG_NAME(A),__FUNC__);DBG_PRINTC(S);}} 157 DBG_PRINT("%s:WARNING:%s ", DBG_NAME(A), __FUNC__);\
158 DBG_PRINTC(S); } }
152 159
153 160
154#define DBG_NOTICE(A,S...) {if (DBG_FLAGS(A) & DBG_NOTICE_ON) \ 161#define DBG_NOTICE(A, S...) {if (DBG_FLAGS(A) & DBG_NOTICE_ON) {\
155 {DBG_PRINT("%s:NOTICE:%s ",DBG_NAME(A),__FUNC__);DBG_PRINTC(S);}} 162 DBG_PRINT("%s:NOTICE:%s ", DBG_NAME(A), __FUNC__);\
163 DBG_PRINTC(S); \
164 } \
165 }
156 166
157 167
158#define DBG_TRACE(A,S...) do {if (DBG_FLAGS(A) & DBG_TRACE_ON) \ 168#define DBG_TRACE(A, S...) do {if (DBG_FLAGS(A) & DBG_TRACE_ON) {\
159 {DBG_PRINT("%s:%s ",DBG_NAME(A),__FUNC__);DBG_PRINTC(S);}} while (0) 169 DBG_PRINT("%s:%s ", DBG_NAME(A), __FUNC__);\
170 DBG_PRINTC(S); } } while (0)
160 171
161 172
162#define DBG_RX(A,S...) {if (DBG_FLAGS(A) & DBG_RX_ON) \ 173#define DBG_RX(A, S...) {if (DBG_FLAGS(A) & DBG_RX_ON) {\
163 {DBG_PRINT(S);}} 174 DBG_PRINT(S); } }
164 175
165 176
166#define DBG_TX(A,S...) {if (DBG_FLAGS(A) & DBG_TX_ON) \ 177#define DBG_TX(A, S...) {if (DBG_FLAGS(A) & DBG_TX_ON) {\
167 {DBG_PRINT(S);}} 178 DBG_PRINT(S); } }
168 179
169#define DBG_DS(A,S...) {if (DBG_FLAGS(A) & DBG_DS_ON) \ 180#define DBG_DS(A, S...) {if (DBG_FLAGS(A) & DBG_DS_ON) {\
170 {DBG_PRINT(S);}} 181 DBG_PRINT(S); } }
171 182
172 183
173#define DBG_ASSERT(C) {if (!(C)) \ 184#define DBG_ASSERT(C) { \
174 {DBG_PRINT("ASSERT(%s) -- %s#%d (%s)\n", \ 185 if (!(C)) {\
175 #C,__FILE__,__LINE__,__FUNC__); \ 186 DBG_PRINT("ASSERT(%s) -- %s#%d (%s)\n", \
176 DBG_TRAP;}} 187 #C, __FILE__, __LINE__, __FUNC__); \
188 DBG_TRAP; \
189 } \
190 }
177 191
178typedef struct { 192typedef struct {
179 char *dbgName; 193 char *dbgName;
@@ -183,7 +197,7 @@ typedef struct {
183 197
184 198
185/****************************************************************************/ 199/****************************************************************************/
186#else // DBG 200#else /* DBG */
187/****************************************************************************/ 201/****************************************************************************/
188 202
189#define DBG_DEFN 203#define DBG_DEFN
@@ -192,21 +206,21 @@ typedef struct {
192#define DBG_PRINT(S...) 206#define DBG_PRINT(S...)
193#define DBG_ENTER(A) 207#define DBG_ENTER(A)
194#define DBG_LEAVE(A) 208#define DBG_LEAVE(A)
195#define DBG_PARAM(A,N,F,S...) 209#define DBG_PARAM(A, N, F, S...)
196#define DBG_ERROR(A,S...) 210#define DBG_ERROR(A, S...)
197#define DBG_WARNING(A,S...) 211#define DBG_WARNING(A, S...)
198#define DBG_NOTICE(A,S...) 212#define DBG_NOTICE(A, S...)
199#define DBG_TRACE(A,S...) 213#define DBG_TRACE(A, S...)
200#define DBG_RX(A,S...) 214#define DBG_RX(A, S...)
201#define DBG_TX(A,S...) 215#define DBG_TX(A, S...)
202#define DBG_DS(A,S...) 216#define DBG_DS(A, S...)
203#define DBG_ASSERT(C) 217#define DBG_ASSERT(C)
204 218
205#endif // DBG 219#endif /* DBG */
206/****************************************************************************/ 220/****************************************************************************/
207 221
208 222
209 223
210 224
211#endif // _DEBUG_H 225#endif /* _DEBUG_H */
212 226
diff --git a/drivers/staging/wlags49_h2/dhf.c b/drivers/staging/wlags49_h2/dhf.c
index b6f5834b1aff..bb80b547cc19 100644
--- a/drivers/staging/wlags49_h2/dhf.c
+++ b/drivers/staging/wlags49_h2/dhf.c
@@ -1,5 +1,5 @@
1 1
2// vim:tw=110:ts=4: 2/* vim:tw=110:ts=4: */
3/************************************************************************************************************** 3/**************************************************************************************************************
4* 4*
5* FILE : DHF.C 5* FILE : DHF.C
@@ -54,8 +54,8 @@
54* software indicates your acceptance of these terms and conditions. If you do 54* software indicates your acceptance of these terms and conditions. If you do
55* not agree with these terms and conditions, do not use the software. 55* not agree with these terms and conditions, do not use the software.
56* 56*
57* COPYRIGHT © 1999 - 2000 by Lucent Technologies. All Rights Reserved 57* COPYRIGHT (C) 1999 - 2000 by Lucent Technologies. All Rights Reserved
58* COPYRIGHT © 2001 - 2004 by Agere Systems Inc. All Rights Reserved 58* COPYRIGHT (C) 2001 - 2004 by Agere Systems Inc. All Rights Reserved
59* All rights reserved. 59* All rights reserved.
60* 60*
61* Redistribution and use in source or binary forms, with or without 61* Redistribution and use in source or binary forms, with or without
@@ -97,7 +97,7 @@
97#include "dhf.h" 97#include "dhf.h"
98#include "mmd.h" 98#include "mmd.h"
99 99
100//to distinguish MMD from HCF asserts by means of line number 100/* to distinguish MMD from HCF asserts by means of line number */
101#undef FILE_NAME_OFFSET 101#undef FILE_NAME_OFFSET
102#define FILE_NAME_OFFSET MMD_FILE_NAME_OFFSET 102#define FILE_NAME_OFFSET MMD_FILE_NAME_OFFSET
103/*----------------------------------------------------------------------------- 103/*-----------------------------------------------------------------------------
@@ -106,23 +106,9 @@
106 * 106 *
107 *---------------------------------------------------------------------------*/ 107 *---------------------------------------------------------------------------*/
108 108
109// 12345678901234 109/* 12345678901234 */
110char signature[14] = "FUPU7D37dhfwci"; 110char signature[14] = "FUPU7D37dhfwci";
111 111
112//The binary download function "relocates" the image using constructions like:
113// fw->identity = (CFG_IDENTITY_STRCT FAR *)((char FAR *)fw->identity + (hcf_32)fw );
114//under some of the memory models under MSVC 1.52 these constructions degrade to 16-bits pointer arithmetic.
115//fw->identity is limited, such that adding it to fw, does not need to carry over from offset to segment.
116//However the segment is not set at all.
117//As a workaround the PSEUDO_CHARP macro is introduced which is a char pointer except for MSVC 1.52, in
118//which case we know that a 32-bit quantity is adequate as a pointer.
119//Note that other platforms may experience comparable problems when using the binary download feature.
120#if defined(_MSC_VER) && _MSC_VER == 800 // Visual C++ 1.5
121#define PSEUDO_CHARP hcf_32
122#else
123#define PSEUDO_CHARP hcf_8*
124#endif
125
126/*----------------------------------------------------------------------------- 112/*-----------------------------------------------------------------------------
127 * 113 *
128 * LTV-records retrieved from the NIC to: 114 * LTV-records retrieved from the NIC to:
@@ -132,12 +118,12 @@ char signature[14] = "FUPU7D37dhfwci";
132 * 118 *
133 *---------------------------------------------------------------------------*/ 119 *---------------------------------------------------------------------------*/
134 120
135// for USB/H1 we needed a smaller value than the CFG_DL_BUF_STRCT reported 8192 121/* for USB/H1 we needed a smaller value than the CFG_DL_BUF_STRCT reported 8192
136// for the time being it seems simpler to always use 2000 for USB/H1 as well as all other cases rather than 122 for the time being it seems simpler to always use 2000 for USB/H1 as well as all other cases rather than
137// using the "fixed anyway" CFG_DL_BUF_STRCT. 123 using the "fixed anyway" CFG_DL_BUF_STRCT. */
138#define DL_SIZE 2000 124#define DL_SIZE 2000
139 125
140//CFG_IDENTITY_STRCT pri_identity = { LOF(CFG_IDENTITY_STRCT), CFG_PRI_IDENTITY }; 126/* CFG_IDENTITY_STRCT pri_identity = { LOF(CFG_IDENTITY_STRCT), CFG_PRI_IDENTITY }; */
141CFG_SUP_RANGE_STRCT mfi_sup = { LOF(CFG_SUP_RANGE_STRCT), CFG_NIC_MFI_SUP_RANGE }; 127CFG_SUP_RANGE_STRCT mfi_sup = { LOF(CFG_SUP_RANGE_STRCT), CFG_NIC_MFI_SUP_RANGE };
142CFG_SUP_RANGE_STRCT cfi_sup = { LOF(CFG_SUP_RANGE_STRCT), CFG_NIC_CFI_SUP_RANGE }; 128CFG_SUP_RANGE_STRCT cfi_sup = { LOF(CFG_SUP_RANGE_STRCT), CFG_NIC_CFI_SUP_RANGE };
143/* Note: could be used rather than the above explained and defined DL_SIZE if need arises 129/* Note: could be used rather than the above explained and defined DL_SIZE if need arises
@@ -164,7 +150,7 @@ LTV_INFO_STRUCT ltv_info[] = {
164/***********************************************************************************************************/ 150/***********************************************************************************************************/
165/*************************************** PROTOTYPES ******************************************************/ 151/*************************************** PROTOTYPES ******************************************************/
166/***********************************************************************************************************/ 152/***********************************************************************************************************/
167static int check_comp_fw( memimage *fw ); 153static int check_comp_fw(memimage *fw);
168 154
169 155
170/************************************************************************************************************ 156/************************************************************************************************************
@@ -185,18 +171,18 @@ static int check_comp_fw( memimage *fw );
185*.ENDDOC END DOCUMENTATION 171*.ENDDOC END DOCUMENTATION
186*************************************************************************************************************/ 172*************************************************************************************************************/
187int 173int
188check_comp_fw( memimage *fw ) 174check_comp_fw(memimage *fw)
189{ 175{
190CFG_RANGE20_STRCT *p; 176CFG_RANGE20_STRCT *p;
191int rc = HCF_SUCCESS; 177int rc = HCF_SUCCESS;
192CFG_RANGE_SPEC_STRCT* i; 178CFG_RANGE_SPEC_STRCT *i;
193 179
194 switch( fw->identity->typ ) { 180 switch (fw->identity->typ) {
195 case CFG_FW_IDENTITY: //Station F/W 181 case CFG_FW_IDENTITY: /* Station F/W */
196 case COMP_ID_FW_AP_FAKE: //;?is this useful (used to be: CFG_AP_IDENTITY) 182 case COMP_ID_FW_AP_FAKE: /* ;?is this useful (used to be: CFG_AP_IDENTITY) */
197 break; 183 break;
198 default: 184 default:
199 MMDASSERT( DO_ASSERT, fw->identity->typ ) //unknown/unsupported firmware_type: 185 MMDASSERT(DO_ASSERT, fw->identity->typ) /* unknown/unsupported firmware_type: */
200 rc = DHF_ERR_INCOMP_FW; 186 rc = DHF_ERR_INCOMP_FW;
201 return rc; /* ;? how useful is this anyway, 187 return rc; /* ;? how useful is this anyway,
202 * till that is sorted out might as well violate my own single exit principle 188 * till that is sorted out might as well violate my own single exit principle
@@ -204,29 +190,29 @@ CFG_RANGE_SPEC_STRCT* i;
204 } 190 }
205 p = fw->compat; 191 p = fw->compat;
206 i = NULL; 192 i = NULL;
207 while( p->len && i == NULL ) { // check the MFI ranges 193 while (p->len && i == NULL) { /* check the MFI ranges */
208 if ( p->typ == CFG_MFI_ACT_RANGES_STA ) { 194 if (p->typ == CFG_MFI_ACT_RANGES_STA) {
209 i = mmd_check_comp( (void*)p, &mfi_sup ); 195 i = mmd_check_comp((void *)p, &mfi_sup);
210 } 196 }
211 p++; 197 p++;
212 } 198 }
213 MMDASSERT( i, 0 ) //MFI: NIC Supplier not compatible with F/W image Actor 199 MMDASSERT(i, 0) /* MFI: NIC Supplier not compatible with F/W image Actor */
214 if ( i ) { 200 if (i) {
215 p = fw->compat; 201 p = fw->compat;
216 i = NULL; 202 i = NULL;
217 while ( p->len && i == NULL ) { // check the CFI ranges 203 while (p->len && i == NULL) { /* check the CFI ranges */
218 if ( p->typ == CFG_CFI_ACT_RANGES_STA ) { 204 if (p->typ == CFG_CFI_ACT_RANGES_STA) {
219 i = mmd_check_comp( (void*)p, &cfi_sup ); 205 i = mmd_check_comp((void *)p, &cfi_sup);
220 } 206 }
221 p++; 207 p++;
222 } 208 }
223 MMDASSERT( i, 0 ) //CFI: NIC Supplier not compatible with F/W image Actor 209 MMDASSERT(i, 0) /* CFI: NIC Supplier not compatible with F/W image Actor */
224 } 210 }
225 if ( i == NULL ) { 211 if (i == NULL) {
226 rc = DHF_ERR_INCOMP_FW; 212 rc = DHF_ERR_INCOMP_FW;
227 } 213 }
228 return rc; 214 return rc;
229} // check_comp_fw 215} /* check_comp_fw */
230 216
231 217
232 218
@@ -271,31 +257,34 @@ CFG_RANGE_SPEC_STRCT* i;
271*.ENDDOC END DOCUMENTATION 257*.ENDDOC END DOCUMENTATION
272*************************************************************************************************************/ 258*************************************************************************************************************/
273int 259int
274dhf_download_binary( memimage *fw ) 260dhf_download_binary(memimage *fw)
275{ 261{
276int rc = HCF_SUCCESS; 262int rc = HCF_SUCCESS;
277CFG_PROG_STRCT *p; 263CFG_PROG_STRCT *p;
278int i; 264int i;
279 265
280 //validate the image 266 /* validate the image */
281 for ( i = 0; i < sizeof(signature) && fw->signature[i] == signature[i]; i++ ) /*NOP*/; 267 for (i = 0; i < sizeof(signature) && fw->signature[i] == signature[i]; i++)
282 if ( i != sizeof(signature) || 268 ; /* NOP */
269 if (i != sizeof(signature) ||
283 fw->signature[i] != 0x01 || 270 fw->signature[i] != 0x01 ||
284 //test for Little/Big Endian Binary flag 271 /* test for Little/Big Endian Binary flag */
285 fw->signature[i+1] != ( /*HCF_BIG_ENDIAN ? 'B' : */ 'L' ) ) rc = DHF_ERR_INCOMP_FW; 272 fw->signature[i+1] != (/* HCF_BIG_ENDIAN ? 'B' : */ 'L'))
286 else { //Little Endian Binary format 273 rc = DHF_ERR_INCOMP_FW;
287 fw->codep = (CFG_PROG_STRCT FAR *)((PSEUDO_CHARP)fw->codep + (hcf_32)fw ); 274 else { /* Little Endian Binary format */
288 fw->identity = (CFG_IDENTITY_STRCT FAR *)((PSEUDO_CHARP)fw->identity + (hcf_32)fw ); 275 fw->codep = (CFG_PROG_STRCT FAR*)((char *)fw->codep + (hcf_32)fw);
289 fw->compat = (CFG_RANGE20_STRCT FAR *)((PSEUDO_CHARP)fw->compat + (hcf_32)fw ); 276 fw->identity = (CFG_IDENTITY_STRCT FAR*)((char *)fw->identity + (hcf_32)fw);
290 for ( i = 0; fw->p[i]; i++ ) fw->p[i] = ((PSEUDO_CHARP)fw->p[i] + (hcf_32)fw ); 277 fw->compat = (CFG_RANGE20_STRCT FAR*)((char *)fw->compat + (hcf_32)fw);
278 for (i = 0; fw->p[i]; i++)
279 fw->p[i] = ((char *)fw->p[i] + (hcf_32)fw);
291 p = fw->codep; 280 p = fw->codep;
292 while ( p->len ) { 281 while (p->len) {
293 p->host_addr = (PSEUDO_CHARP)p->host_addr + (hcf_32)fw; 282 p->host_addr = (char *)p->host_addr + (hcf_32)fw;
294 p++; 283 p++;
295 } 284 }
296 } 285 }
297 return rc; 286 return rc;
298} // dhf_download_binary 287} /* dhf_download_binary */
299 288
300 289
301/************************************************************************************************************* 290/*************************************************************************************************************
@@ -351,7 +340,7 @@ int i;
351*.ENDDOC END DOCUMENTATION 340*.ENDDOC END DOCUMENTATION
352*************************************************************************************************************/ 341*************************************************************************************************************/
353int 342int
354dhf_download_fw( void *ifbp, memimage *fw ) 343dhf_download_fw(void *ifbp, memimage *fw)
355{ 344{
356int rc = HCF_SUCCESS; 345int rc = HCF_SUCCESS;
357LTV_INFO_STRUCT_PTR pp = ltv_info; 346LTV_INFO_STRUCT_PTR pp = ltv_info;
@@ -359,32 +348,34 @@ CFG_PROG_STRCT *p = fw->codep;
359LTVP ltvp; 348LTVP ltvp;
360int i; 349int i;
361 350
362 MMDASSERT( fw != NULL, 0 ) 351 MMDASSERT(fw != NULL, 0)
363 //validate the image 352 /* validate the image */
364 for ( i = 0; i < sizeof(signature) && fw->signature[i] == signature[i]; i++ ) /*NOP*/; 353 for (i = 0; i < sizeof(signature) && fw->signature[i] == signature[i]; i++)
365 if ( i != sizeof(signature) || 354 ; /* NOP */
355 if (i != sizeof(signature) ||
366 fw->signature[i] != 0x01 || 356 fw->signature[i] != 0x01 ||
367 //check for binary image 357 /* check for binary image */
368 ( fw->signature[i+1] != 'C' && fw->signature[i+1] != ( /*HCF_BIG_ENDIAN ? 'B' : */ 'L' ) ) ) 358 (fw->signature[i+1] != 'C' && fw->signature[i+1] != (/*HCF_BIG_ENDIAN ? 'B' : */ 'L')))
369 rc = DHF_ERR_INCOMP_FW; 359 rc = DHF_ERR_INCOMP_FW;
370 360
371// Retrieve all information needed for download from the NIC 361/* Retrieve all information needed for download from the NIC */
372 while ( ( rc == HCF_SUCCESS ) && ( ( ltvp = pp->ltvp) != NULL ) ) { 362 while ((rc == HCF_SUCCESS) && ((ltvp = pp->ltvp) != NULL)) {
373 ltvp->len = pp++->len; // Set len to original len. This len is changed to real len by GET_INFO() 363 ltvp->len = pp++->len; /* Set len to original len. This len is changed to real len by GET_INFO() */
374 rc = GET_INFO( ltvp ); 364 rc = GET_INFO(ltvp);
375 MMDASSERT( rc == HCF_SUCCESS, rc ) 365 MMDASSERT(rc == HCF_SUCCESS, rc)
376 MMDASSERT( rc == HCF_SUCCESS, ltvp->typ ) 366 MMDASSERT(rc == HCF_SUCCESS, ltvp->typ)
377 MMDASSERT( rc == HCF_SUCCESS, ltvp->len ) 367 MMDASSERT(rc == HCF_SUCCESS, ltvp->len)
378 } 368 }
379 if ( rc == HCF_SUCCESS ) rc = check_comp_fw( fw ); 369 if (rc == HCF_SUCCESS)
380 if ( rc == HCF_SUCCESS ) { 370 rc = check_comp_fw(fw);
381 while ( rc == HCF_SUCCESS && p->len ) { 371 if (rc == HCF_SUCCESS) {
382 rc = PUT_INFO( p ); 372 while (rc == HCF_SUCCESS && p->len) {
373 rc = PUT_INFO(p);
383 p++; 374 p++;
384 } 375 }
385 } 376 }
386 MMDASSERT( rc == HCF_SUCCESS, rc ) 377 MMDASSERT(rc == HCF_SUCCESS, rc)
387 return rc; 378 return rc;
388} // dhf_download_fw 379} /* dhf_download_fw */
389 380
390 381
diff --git a/drivers/staging/wlags49_h2/dhf.h b/drivers/staging/wlags49_h2/dhf.h
index c071f342a655..dbe0611fd032 100644
--- a/drivers/staging/wlags49_h2/dhf.h
+++ b/drivers/staging/wlags49_h2/dhf.h
@@ -1,5 +1,5 @@
1 1
2// vim:tw=110:ts=4: 2/* vim:tw=110:ts=4: */
3#ifndef DHF_H 3#ifndef DHF_H
4#define DHF_H 4#define DHF_H
5 5
@@ -38,9 +38,9 @@
38* software indicates your acceptance of these terms and conditions. If you do 38* software indicates your acceptance of these terms and conditions. If you do
39* not agree with these terms and conditions, do not use the software. 39* not agree with these terms and conditions, do not use the software.
40* 40*
41* COPYRIGHT © 1994 - 1995 by AT&T. All Rights Reserved 41* COPYRIGHT (C) 1994 - 1995 by AT&T. All Rights Reserved
42* COPYRIGHT © 1999 - 2000 by Lucent Technologies. All Rights Reserved 42* COPYRIGHT (C) 1999 - 2000 by Lucent Technologies. All Rights Reserved
43* COPYRIGHT © 2001 - 2004 by Agere Systems Inc. All Rights Reserved 43* COPYRIGHT (C) 2001 - 2004 by Agere Systems Inc. All Rights Reserved
44* All rights reserved. 44* All rights reserved.
45* 45*
46* Redistribution and use in source or binary forms, with or without 46* Redistribution and use in source or binary forms, with or without
@@ -82,27 +82,27 @@
82#include <windef.h> 82#include <windef.h>
83#endif 83#endif
84 84
85#include "hcf.h" // includes HCFCFG.H too 85#include "hcf.h" /* includes HCFCFG.H too */
86 86
87#ifdef DHF_UIL 87#ifdef DHF_UIL
88#define GET_INFO( pp ) uil_get_info( (LTVP)pp ) 88#define GET_INFO(pp) uil_get_info((LTVP)pp)
89#define PUT_INFO( pp ) uil_put_info( (LTVP)pp ) 89#define PUT_INFO(pp) uil_put_info((LTVP)pp)
90#else 90#else
91#define GET_INFO( pp ) hcf_get_info( ifbp, (LTVP)pp ) 91#define GET_INFO(pp) hcf_get_info(ifbp, (LTVP)pp)
92#define PUT_INFO( pp ) hcf_put_info( ifbp, (LTVP)pp ) 92#define PUT_INFO(pp) hcf_put_info(ifbp, (LTVP)pp)
93#endif 93#endif
94 94
95 95
96/*---- Defines --------------------------------------------------------------*/ 96/*---- Defines --------------------------------------------------------------*/
97#define CODEMASK 0x0000FFFFL // Codemask for plug records 97#define CODEMASK 0x0000FFFFL /* Codemask for plug records */
98 98
99/*---- Error numbers --------------------------------------------------------*/ 99/*---- Error numbers --------------------------------------------------------*/
100 100
101#define DHF_ERR_INCOMP_FW 0x40 //Image not compatible with NIC 101#define DHF_ERR_INCOMP_FW 0x40 /* Image not compatible with NIC */
102 102
103/*---- Type definitions -----------------------------------------------------*/ 103/*---- Type definitions -----------------------------------------------------*/
104//* needed by dhf_wrap.c 104/* needed by dhf_wrap.c */
105// 105
106typedef struct { 106typedef struct {
107 LTVP ltvp; 107 LTVP ltvp;
108 hcf_16 len; 108 hcf_16 len;
@@ -119,9 +119,9 @@ typedef struct {
119 */ 119 */
120 120
121typedef struct { 121typedef struct {
122 hcf_32 code; // Code to plug 122 hcf_32 code; /* Code to plug */
123 hcf_32 addr; // Address within the memory image to plug it in 123 hcf_32 addr; /* Address within the memory image to plug it in */
124 hcf_32 len; // The # of bytes which are available to store it 124 hcf_32 len; /* The # of bytes which are available to store it */
125} plugrecord; 125} plugrecord;
126 126
127/* 127/*
@@ -159,7 +159,7 @@ typedef struct {
159 char str[MAX_DEBUGEXPORT_LEN]; 159 char str[MAX_DEBUGEXPORT_LEN];
160} exportrecord; 160} exportrecord;
161 161
162// Offsets in memimage array p[] 162/* Offsets in memimage array p[] */
163#define FWSTRINGS_FUNCTION 0 163#define FWSTRINGS_FUNCTION 0
164#define FWEXPORTS_FUNCTION 1 164#define FWEXPORTS_FUNCTION 1
165 165
@@ -188,13 +188,13 @@ typedef struct {
188 * The end of the array is indicated by a plug record of which all fields are zero. 188 * The end of the array is indicated by a plug record of which all fields are zero.
189 */ 189 */
190typedef struct { 190typedef struct {
191 char signature[14+1+1]; // signature (see DHF.C) + C/LE-Bin/BE-Bin-flag + format version 191 char signature[14+1+1]; /* signature (see DHF.C) + C/LE-Bin/BE-Bin-flag + format version */
192 CFG_PROG_STRCT FAR *codep; // 192 CFG_PROG_STRCT FAR *codep; /* */
193 hcf_32 execution; // Execution address of the firmware 193 hcf_32 execution; /* Execution address of the firmware */
194 void FAR *place_holder_1; 194 void FAR *place_holder_1;
195 void FAR *place_holder_2; 195 void FAR *place_holder_2;
196 CFG_RANGE20_STRCT FAR *compat; // Pointer to the compatibility info records 196 CFG_RANGE20_STRCT FAR *compat; /* Pointer to the compatibility info records */
197 CFG_IDENTITY_STRCT FAR *identity; // Pointer to the identity info records 197 CFG_IDENTITY_STRCT FAR *identity; /* Pointer to the identity info records */
198 void FAR *p[2]; /* (Up to 9) pointers for (future) expansion 198 void FAR *p[2]; /* (Up to 9) pointers for (future) expansion
199 * currently in use: 199 * currently in use:
200 * - F/W printf information 200 * - F/W printf information
@@ -209,8 +209,8 @@ typedef struct {
209 * 209 *
210 *---------------------------------------------------------------------------*/ 210 *---------------------------------------------------------------------------*/
211 211
212EXTERN_C int dhf_download_fw( void *ifbp, memimage *fw ); // ifbp, ignored when using the UIL 212EXTERN_C int dhf_download_fw(void *ifbp, memimage *fw); /* ifbp, ignored when using the UIL */
213EXTERN_C int dhf_download_binary( memimage *fw ); 213EXTERN_C int dhf_download_binary(memimage *fw);
214 214
215 215
216/*----------------------------------------------------------------------------- 216/*-----------------------------------------------------------------------------
@@ -219,8 +219,8 @@ EXTERN_C int dhf_download_binary( memimage *fw );
219 * 219 *
220 *---------------------------------------------------------------------------*/ 220 *---------------------------------------------------------------------------*/
221 221
222// defined in DHF.C; see there for comments 222/* defined in DHF.C; see there for comments */
223EXTERN_C hcf_16 *find_record_in_pda( hcf_16 *pdap, hcf_16 code ); 223EXTERN_C hcf_16 *find_record_in_pda(hcf_16 *pdap, hcf_16 code);
224 224
225#endif // DHF_H 225#endif /* DHF_H */
226 226
diff --git a/drivers/staging/wlags49_h2/dhfcfg.h b/drivers/staging/wlags49_h2/dhfcfg.h
index a0c26c678c59..75c279f268ae 100644
--- a/drivers/staging/wlags49_h2/dhfcfg.h
+++ b/drivers/staging/wlags49_h2/dhfcfg.h
@@ -22,7 +22,7 @@
22 * software indicates your acceptance of these terms and conditions. If you do 22 * software indicates your acceptance of these terms and conditions. If you do
23 * not agree with these terms and conditions, do not use the software. 23 * not agree with these terms and conditions, do not use the software.
24 * 24 *
25 * Copyright © 2003 Agere Systems Inc. 25 * Copyright (c) 2003 Agere Systems Inc.
26 * All rights reserved. 26 * All rights reserved.
27 * 27 *
28 * Redistribution and use in source or binary forms, with or without 28 * Redistribution and use in source or binary forms, with or without
@@ -77,82 +77,82 @@
77 *---------------------------------------------------------------------------*/ 77 *---------------------------------------------------------------------------*/
78 78
79 79
80// Define DHF_WCI if you want to use the WCI to access the ORiNOCO card. 80/* Define DHF_WCI if you want to use the WCI to access the ORiNOCO card.
81// Define DHF_UIL if you want to use the UIL to access the ORiNOCO card. 81 Define DHF_UIL if you want to use the UIL to access the ORiNOCO card.
82// You must define either DHF_WCI or DHF_UIL. If neither of the two is defined 82 You must define either DHF_WCI or DHF_UIL. If neither of the two is defined
83// or both a compile error is generated. 83 or both a compile error is generated. */
84#define DHF_WCI 84#define DHF_WCI
85//!!!#define DHF_UIL 85/* !!!#define DHF_UIL */
86 86
87// Define DHF_BIG_ENDIAN if you are working on a big endian platform. 87/* Define DHF_BIG_ENDIAN if you are working on a big endian platform.
88// Define DHF_LITTLE_ENDIAN if you are working on a little endian platform. 88 Define DHF_LITTLE_ENDIAN if you are working on a little endian platform.
89// You must define either DHF_BIG_ENDIAN or DHF_LITTLE_ENDIAN. If neither of 89 You must define either DHF_BIG_ENDIAN or DHF_LITTLE_ENDIAN. If neither of
90// the two is defined or both a compile error is generated. 90 the two is defined or both a compile error is generated. */
91#ifdef USE_BIG_ENDIAN 91#ifdef USE_BIG_ENDIAN
92#define DHF_BIG_ENDIAN 92#define DHF_BIG_ENDIAN
93#else 93#else
94#define DHF_LITTLE_ENDIAN 94#define DHF_LITTLE_ENDIAN
95#endif /* USE_BIG_ENDIAN */ 95#endif /* USE_BIG_ENDIAN */
96 96
97// Define DHF_WIN if you are working on Windows platform. 97/* Define DHF_WIN if you are working on Windows platform.
98// Define DHF_DOS if you are working on DOS. 98 Define DHF_DOS if you are working on DOS.
99// You must define either DHF_WIN or DHF_DOS. If neither of 99 You must define either DHF_WIN or DHF_DOS. If neither of
100// the two is defined or both a compile error is generated. 100 the two is defined or both a compile error is generated.
101//!!!#define DHF_WIN 101 !!!#define DHF_WIN
102//!!!#define DHF_DOS 102 !!!#define DHF_DOS */
103 103
104// Define if you want the DHF to users. Not defining DHF_GET_RES_MSG 104/* Define if you want the DHF to users. Not defining DHF_GET_RES_MSG
105// leads to a decrease in code size as message strings are not included. 105 leads to a decrease in code size as message strings are not included.
106//!!!#define DHF_GET_RES_MSG 106 !!!#define DHF_GET_RES_MSG */
107 107
108// Linux driver specific 108/* Linux driver specific
109// Prevent inclusion of stdlib.h and string.h 109 Prevent inclusion of stdlib.h and string.h */
110#define _INC_STDLIB 110#define _INC_STDLIB
111#define _INC_STRING 111#define _INC_STRING
112 112
113//----------------------------------------------------------------------------- 113/*-----------------------------------------------------------------------------
114// Define one or more of the following DSF #defines if you want to implement 114 Define one or more of the following DSF #defines if you want to implement
115// the related DSF-function. Function dsf_callback must allways be implemented. 115 the related DSF-function. Function dsf_callback must allways be implemented.
116// See file DHF.H for prototypes of the functions. 116 See file DHF.H for prototypes of the functions. */
117 117
118// Define DSF_ALLOC if you want to manage memory allocation and de-allocation 118/* Define DSF_ALLOC if you want to manage memory allocation and de-allocation
119// for the DHF. If DSF_ALLOC is defined you must implement dsf_alloc and dsf_free. 119 for the DHF. If DSF_ALLOC is defined you must implement dsf_alloc and dsf_free.
120//!!!#define DSF_ALLOC 120 !!!#define DSF_ALLOC */
121 121
122// Define DSF_CONFIRM if you want the DHF to ask the user for confirmation in a 122/* Define DSF_CONFIRM if you want the DHF to ask the user for confirmation in a
123// number of situations. If DSF_CONFIRM is defined you must implement dsf_confirm. 123 number of situations. If DSF_CONFIRM is defined you must implement dsf_confirm.
124// Not defining DSF_CONFIRM leads to a decrease in code size as confirmation 124 Not defining DSF_CONFIRM leads to a decrease in code size as confirmation
125// strings are not included. 125 strings are not included.
126//!!!#define DSF_CONFIRM 126 !!!#define DSF_CONFIRM */
127 127
128// Define DSF_DEBUG_MESSAGE if you want debug messages added to your output. 128/* Define DSF_DEBUG_MESSAGE if you want debug messages added to your output.
129// If you define DSF_DEBUG_MESSAGE then you must implement function 129 If you define DSF_DEBUG_MESSAGE then you must implement function
130// dsf_debug_message. 130 dsf_debug_message.
131//#define DSF_DEBUG_MESSAGE 131 #define DSF_DEBUG_MESSAGE */
132 132
133// Define DSF_ASSERT if you want asserts to be activated. 133/* Define DSF_ASSERT if you want asserts to be activated.
134// If you define DSF_ASSERT then you must implement function dsf_assert. 134 If you define DSF_ASSERT then you must implement function dsf_assert.
135//#define DBG 1 135 #define DBG 1
136//#define DSF_ASSERT 136 #define DSF_ASSERT */
137 137
138// Define DSF_DBWIN if you want asserts and debug messages to be send to a debug 138/* Define DSF_DBWIN if you want asserts and debug messages to be send to a debug
139// window like SOFTICE or DebugView from SysInternals. 139 window like SOFTICE or DebugView from SysInternals.
140//!!!#define DSF_DBWIN 140 !!!#define DSF_DBWIN
141//!!! Not implemented yet! 141 !!! Not implemented yet! */
142 142
143// Define DSF_VOLATILE_ONLY if you only wants to use valatile functions 143/* Define DSF_VOLATILE_ONLY if you only wants to use valatile functions
144// This is a typical setting for a AP and a driver. 144 This is a typical setting for a AP and a driver. */
145#define DSF_VOLATILE_ONLY 145#define DSF_VOLATILE_ONLY
146 146
147// Define DSF_HERMESII if you want to use the DHF for the Hermes-II 147/* Define DSF_HERMESII if you want to use the DHF for the Hermes-II */
148#ifdef HERMES2 148#ifdef HERMES2
149#define DSF_HERMESII 149#define DSF_HERMESII
150#else 150#else
151#undef DSF_HERMESII 151#undef DSF_HERMESII
152#endif // HERMES2 152#endif /* HERMES2 */
153 153
154// Define DSF_BINARY_FILE if you want to use the DHF in combination with 154/* Define DSF_BINARY_FILE if you want to use the DHF in combination with
155// reading the Firmware from a separate binary file. 155 reading the Firmware from a separate binary file.
156//!!!#define DSF_BINARY_FILE 156 !!!#define DSF_BINARY_FILE */
157 157
158#endif // DHFCFG_H 158#endif /* DHFCFG_H */
diff --git a/drivers/staging/wlags49_h2/hcf.c b/drivers/staging/wlags49_h2/hcf.c
index 6e39f5081e27..390628c6c1eb 100644
--- a/drivers/staging/wlags49_h2/hcf.c
+++ b/drivers/staging/wlags49_h2/hcf.c
@@ -990,7 +990,8 @@ int rc = HCF_ERR_INCOMP_FW;
990 ifbp->IFB_CntlOpt |= DMA_ENABLED; 990 ifbp->IFB_CntlOpt |= DMA_ENABLED;
991 HCFASSERT( NT_ASSERT, NEVER_TESTED ) 991 HCFASSERT( NT_ASSERT, NEVER_TESTED )
992 // make the entire rx descriptor chain DMA-owned, so the DMA engine can (re-)use it. 992 // make the entire rx descriptor chain DMA-owned, so the DMA engine can (re-)use it.
993 if ( ( p = ifbp->IFB_FirstDesc[DMA_RX] ) != NULL ) { //;? Think this over again in the light of the new chaining strategy 993 p = ifbp->IFB_FirstDesc[DMA_RX];
994 if (p != NULL) { //;? Think this over again in the light of the new chaining strategy
994 if ( 1 ) { //begin alternative 995 if ( 1 ) { //begin alternative
995 HCFASSERT( NT_ASSERT, NEVER_TESTED ) 996 HCFASSERT( NT_ASSERT, NEVER_TESTED )
996 put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX], DMA_RX ); 997 put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX], DMA_RX );
@@ -2087,7 +2088,8 @@ wci_bufp pt; //pointer with the "right" type, just to help ease writing macr
2087 OPW( HREG_AUX_OFFSET, (hcf_16)(PLUG_DATA_OFFSET & 0x7E) ); 2088 OPW( HREG_AUX_OFFSET, (hcf_16)(PLUG_DATA_OFFSET & 0x7E) );
2088 io_port = ifbp->IFB_IOBase + HREG_AUX_DATA; //to prevent side effects of the MSF-defined macro 2089 io_port = ifbp->IFB_IOBase + HREG_AUX_DATA; //to prevent side effects of the MSF-defined macro
2089 p = ltvp->val; //destination char pointer (in LTV record) 2090 p = ltvp->val; //destination char pointer (in LTV record)
2090 if ( ( i = len - 1 ) > 0 ) { 2091 i = len - 1;
2092 if (i > 0 ) {
2091 pt = (wci_bufp)p; //just to help ease writing macros with embedded assembly 2093 pt = (wci_bufp)p; //just to help ease writing macros with embedded assembly
2092 IN_PORT_STRING_8_16( io_port, pt, i ); //space used by T: -1 2094 IN_PORT_STRING_8_16( io_port, pt, i ); //space used by T: -1
2093 } 2095 }
@@ -2674,7 +2676,8 @@ hcf_16 fid = 0;
2674 2676
2675#if (HCF_EXT) & HCF_EXT_TX_CONT // Continuous transmit test 2677#if (HCF_EXT) & HCF_EXT_TX_CONT // Continuous transmit test
2676 if ( tx_cntl == HFS_TX_CNTL_TX_CONT ) { 2678 if ( tx_cntl == HFS_TX_CNTL_TX_CONT ) {
2677 if ( ( fid = get_fid( ifbp ) ) != 0 ) { 2679 fid = get_fid(ifbp);
2680 if (fid != 0 ) {
2678 //setup BAP to begin of TxFS 2681 //setup BAP to begin of TxFS
2679 (void)setup_bap( ifbp, fid, 0, IO_OUT ); 2682 (void)setup_bap( ifbp, fid, 0, IO_OUT );
2680 //copy all the fragments in a transparent fashion 2683 //copy all the fragments in a transparent fashion
@@ -2700,7 +2703,8 @@ hcf_16 fid = 0;
2700#if (HCF_TYPE) & HCF_TYPE_WPA 2703#if (HCF_TYPE) & HCF_TYPE_WPA
2701 tx_cntl |= ifbp->IFB_MICTxCntl; 2704 tx_cntl |= ifbp->IFB_MICTxCntl;
2702#endif // HCF_TYPE_WPA 2705#endif // HCF_TYPE_WPA
2703 if ( (fid = ifbp->IFB_TxFID) == 0 && ( fid = get_fid( ifbp ) ) != 0 ) /* 4 */ 2706 fid = ifbp->IFB_TxFID;
2707 if (fid == 0 && ( fid = get_fid( ifbp ) ) != 0 ) /* 4 */
2704 /* skip the next compound statement if: 2708 /* skip the next compound statement if:
2705 - pre-put message or 2709 - pre-put message or
2706 - no fid available (which should never occur if the MSF adheres to the WCI) 2710 - no fid available (which should never occur if the MSF adheres to the WCI)
@@ -4860,7 +4864,8 @@ PROT_CNT_INI
4860int rc; 4864int rc;
4861 4865
4862 HCFTRACE( ifbp, HCF_TRACE_STRIO ); 4866 HCFTRACE( ifbp, HCF_TRACE_STRIO );
4863 if ( ( rc = ifbp->IFB_DefunctStat ) == HCF_SUCCESS ) { /*2*/ 4867 rc = ifbp->IFB_DefunctStat;
4868 if (rc == HCF_SUCCESS) { /*2*/
4864 OPW( HREG_SELECT_1, fid ); /*4*/ 4869 OPW( HREG_SELECT_1, fid ); /*4*/
4865 OPW( HREG_OFFSET_1, offset ); 4870 OPW( HREG_OFFSET_1, offset );
4866 if ( type == IO_IN ) { 4871 if ( type == IO_IN ) {
diff --git a/drivers/staging/wlags49_h2/wl_cs.c b/drivers/staging/wlags49_h2/wl_cs.c
index c9d99d88b786..10abd406b09b 100644
--- a/drivers/staging/wlags49_h2/wl_cs.c
+++ b/drivers/staging/wlags49_h2/wl_cs.c
@@ -105,13 +105,6 @@
105 105
106 106
107/******************************************************************************* 107/*******************************************************************************
108 * macro definitions
109 ******************************************************************************/
110#define CS_CHECK(fn, ret) do { \
111 last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; \
112 } while (0)
113
114/*******************************************************************************
115 * global definitions 108 * global definitions
116 ******************************************************************************/ 109 ******************************************************************************/
117#if DBG 110#if DBG
@@ -302,7 +295,7 @@ void wl_adapter_insert( struct pcmcia_device *link )
302{ 295{
303 struct net_device *dev; 296 struct net_device *dev;
304 int i; 297 int i;
305 int last_fn, last_ret; 298 int ret;
306 /*------------------------------------------------------------------------*/ 299 /*------------------------------------------------------------------------*/
307 300
308 DBG_FUNC( "wl_adapter_insert" ); 301 DBG_FUNC( "wl_adapter_insert" );
@@ -314,21 +307,27 @@ void wl_adapter_insert( struct pcmcia_device *link )
314 /* Do we need to allocate an interrupt? */ 307 /* Do we need to allocate an interrupt? */
315 link->conf.Attributes |= CONF_ENABLE_IRQ; 308 link->conf.Attributes |= CONF_ENABLE_IRQ;
316 309
317 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io)); 310 ret = pcmcia_request_io(link, &link->io);
318 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, wl_isr)); 311 if (ret != 0)
319 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf)); 312 goto failed;
313
314 ret = pcmcia_request_irq(link, (void *) wl_isr);
315 if (ret != 0)
316 goto failed;
320 317
318 ret = pcmcia_request_configuration(link, &link->conf);
319 if (ret != 0)
320 goto failed;
321 321
322 dev->irq = link->irq; 322 dev->irq = link->irq;
323 dev->base_addr = link->io.BasePort1; 323 dev->base_addr = link->io.BasePort1;
324 324
325 SET_NETDEV_DEV(dev, &handle_to_dev(link)); 325 SET_NETDEV_DEV(dev, &link->dev);
326 if (register_netdev(dev) != 0) { 326 if (register_netdev(dev) != 0) {
327 printk("%s: register_netdev() failed\n", MODULE_NAME); 327 printk("%s: register_netdev() failed\n", MODULE_NAME);
328 goto failed; 328 goto failed;
329 } 329 }
330 link->dev_node = &( wl_priv(dev) )->node; 330
331 strcpy(( wl_priv(dev) )->node.dev_name, dev->name);
332 register_wlags_sysfs(dev); 331 register_wlags_sysfs(dev);
333 332
334 printk(KERN_INFO "%s: Wireless, io_addr %#03lx, irq %d, ""mac_address ", 333 printk(KERN_INFO "%s: Wireless, io_addr %#03lx, irq %d, ""mac_address ",
@@ -340,11 +339,6 @@ void wl_adapter_insert( struct pcmcia_device *link )
340 DBG_LEAVE( DbgInfo ); 339 DBG_LEAVE( DbgInfo );
341 return; 340 return;
342 341
343
344cs_failed:
345 cs_error( link, last_fn, last_ret );
346
347
348failed: 342failed:
349 wl_adapter_release( link ); 343 wl_adapter_release( link );
350 344
diff --git a/drivers/staging/wlags49_h2/wl_cs.h b/drivers/staging/wlags49_h2/wl_cs.h
index 2a0e67450fbe..a9b8828a1a27 100644
--- a/drivers/staging/wlags49_h2/wl_cs.h
+++ b/drivers/staging/wlags49_h2/wl_cs.h
@@ -84,10 +84,6 @@ int wl_adapter_close(struct net_device *dev);
84 84
85int wl_adapter_is_open(struct net_device *dev); 85int wl_adapter_is_open(struct net_device *dev);
86 86
87#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
88void cs_error(client_handle_t handle, int func, int ret);
89#endif
90
91const char *DbgEvent( int mask ); 87const char *DbgEvent( int mask );
92 88
93 89
diff --git a/drivers/staging/wlags49_h2/wl_internal.h b/drivers/staging/wlags49_h2/wl_internal.h
index 466fb6215acd..d9a0ad039c19 100644
--- a/drivers/staging/wlags49_h2/wl_internal.h
+++ b/drivers/staging/wlags49_h2/wl_internal.h
@@ -69,9 +69,6 @@
69 ******************************************************************************/ 69 ******************************************************************************/
70#include <linux/version.h> 70#include <linux/version.h>
71#ifdef BUS_PCMCIA 71#ifdef BUS_PCMCIA
72#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
73#include <pcmcia/version.h>
74#endif
75#include <pcmcia/cs_types.h> 72#include <pcmcia/cs_types.h>
76#include <pcmcia/cs.h> 73#include <pcmcia/cs.h>
77#include <pcmcia/cistpl.h> 74#include <pcmcia/cistpl.h>
@@ -866,7 +863,6 @@ struct wl_private
866{ 863{
867 864
868#ifdef BUS_PCMCIA 865#ifdef BUS_PCMCIA
869 dev_node_t node;
870 struct pcmcia_device *link; 866 struct pcmcia_device *link;
871#endif // BUS_PCMCIA 867#endif // BUS_PCMCIA
872 868
@@ -1013,13 +1009,13 @@ extern inline struct wl_private *wl_priv(struct net_device *dev)
1013 * SPARC, due to its weird semantics for save/restore flags. extern 1009 * SPARC, due to its weird semantics for save/restore flags. extern
1014 * inline should prevent the kernel from linking or module from 1010 * inline should prevent the kernel from linking or module from
1015 * loading if they are not inlined. */ 1011 * loading if they are not inlined. */
1016extern inline void wl_lock(struct wl_private *lp, 1012static inline void wl_lock(struct wl_private *lp,
1017 unsigned long *flags) 1013 unsigned long *flags)
1018{ 1014{
1019 spin_lock_irqsave(&lp->slock, *flags); 1015 spin_lock_irqsave(&lp->slock, *flags);
1020} 1016}
1021 1017
1022extern inline void wl_unlock(struct wl_private *lp, 1018static inline void wl_unlock(struct wl_private *lp,
1023 unsigned long *flags) 1019 unsigned long *flags)
1024{ 1020{
1025 spin_unlock_irqrestore(&lp->slock, *flags); 1021 spin_unlock_irqrestore(&lp->slock, *flags);
diff --git a/drivers/staging/wlags49_h2/wl_main.c b/drivers/staging/wlags49_h2/wl_main.c
index cf0c38468b20..88d0d472142f 100644
--- a/drivers/staging/wlags49_h2/wl_main.c
+++ b/drivers/staging/wlags49_h2/wl_main.c
@@ -3591,7 +3591,8 @@ int scull_read_procmem(char *buf, char **start, off_t offset, int len, int *eof,
3591 3591
3592 len=0; 3592 len=0;
3593 3593
3594 if ( ( lp = ((struct net_device *)data)->priv ) == NULL ) { 3594 lp = ((struct net_device *)data)->priv;
3595 if (lp == NULL) {
3595 len += sprintf(buf+len,"No wl_private in scull_read_procmem\n" ); 3596 len += sprintf(buf+len,"No wl_private in scull_read_procmem\n" );
3596 } else if ( lp->wlags49_type == 0 ){ 3597 } else if ( lp->wlags49_type == 0 ){
3597 ifbp = &lp->hcfCtx; 3598 ifbp = &lp->hcfCtx;
diff --git a/drivers/staging/wlags49_h2/wl_netdev.c b/drivers/staging/wlags49_h2/wl_netdev.c
index ca8c8b134c4e..1aa61dbdb79f 100644
--- a/drivers/staging/wlags49_h2/wl_netdev.c
+++ b/drivers/staging/wlags49_h2/wl_netdev.c
@@ -463,15 +463,10 @@ static void wl_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
463// strncpy(info.fw_version, priv->fw_name, 463// strncpy(info.fw_version, priv->fw_name,
464// sizeof(info.fw_version) - 1); 464// sizeof(info.fw_version) - 1);
465 465
466#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
467 if (dev->dev.parent) { 466 if (dev->dev.parent) {
468 dev_set_name(dev->dev.parent, "%s", info->bus_info); 467 dev_set_name(dev->dev.parent, "%s", info->bus_info);
469 //strncpy(info->bus_info, dev->dev.parent->bus_id, 468 //strncpy(info->bus_info, dev->dev.parent->bus_id,
470 // sizeof(info->bus_info) - 1); 469 // sizeof(info->bus_info) - 1);
471#else
472 if (dev->class_dev.parent) {
473 sizeof(info->bus_info) - 1);
474#endif
475 } else { 470 } else {
476 snprintf(info->bus_info, sizeof(info->bus_info) - 1, 471 snprintf(info->bus_info, sizeof(info->bus_info) - 1,
477 "PCMCIA FIXME"); 472 "PCMCIA FIXME");
@@ -930,8 +925,10 @@ int wl_rx(struct net_device *dev)
930 port = ( hfs_stat >> 8 ) & 0x0007; 925 port = ( hfs_stat >> 8 ) & 0x0007;
931 DBG_RX( DbgInfo, "Rx frame for port %d\n", port ); 926 DBG_RX( DbgInfo, "Rx frame for port %d\n", port );
932 927
933 if(( pktlen = lp->hcfCtx.IFB_RxLen ) != 0 ) { 928 pktlen = lp->hcfCtx.IFB_RxLen;
934 if(( skb = ALLOC_SKB( pktlen )) != NULL ) { 929 if (pktlen != 0) {
930 skb = ALLOC_SKB(pktlen);
931 if (skb != NULL) {
935 /* Set the netdev based on the port */ 932 /* Set the netdev based on the port */
936 switch( port ) { 933 switch( port ) {
937#ifdef USE_WDS 934#ifdef USE_WDS
@@ -1177,7 +1174,6 @@ void wl_multicast( struct net_device *dev, int num_addrs, void *addrs )
1177 1174
1178#endif /* NEW_MULTICAST */ 1175#endif /* NEW_MULTICAST */
1179 1176
1180#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30))
1181static const struct net_device_ops wl_netdev_ops = 1177static const struct net_device_ops wl_netdev_ops =
1182{ 1178{
1183 .ndo_start_xmit = &wl_tx_port0, 1179 .ndo_start_xmit = &wl_tx_port0,
@@ -1197,7 +1193,6 @@ static const struct net_device_ops wl_netdev_ops =
1197 .ndo_poll_controller = wl_poll, 1193 .ndo_poll_controller = wl_poll,
1198#endif 1194#endif
1199}; 1195};
1200#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30))
1201 1196
1202/******************************************************************************* 1197/*******************************************************************************
1203 * wl_device_alloc() 1198 * wl_device_alloc()
@@ -1251,27 +1246,7 @@ struct net_device * wl_device_alloc( void )
1251 lp->wireless_data.spy_data = &lp->spy_data; 1246 lp->wireless_data.spy_data = &lp->spy_data;
1252 dev->wireless_data = &lp->wireless_data; 1247 dev->wireless_data = &lp->wireless_data;
1253 1248
1254#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30))
1255 dev->netdev_ops = &wl_netdev_ops; 1249 dev->netdev_ops = &wl_netdev_ops;
1256#else
1257 dev->hard_start_xmit = &wl_tx_port0;
1258
1259 dev->set_config = &wl_config;
1260 dev->get_stats = &wl_stats;
1261 dev->set_multicast_list = &wl_multicast;
1262
1263 dev->init = &wl_insert;
1264 dev->open = &wl_adapter_open;
1265 dev->stop = &wl_adapter_close;
1266 dev->do_ioctl = &wl_ioctl;
1267
1268 dev->tx_timeout = &wl_tx_timeout;
1269
1270#ifdef CONFIG_NET_POLL_CONTROLLER
1271 dev->poll_controller = wl_poll;
1272#endif
1273
1274#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30))
1275 1250
1276 dev->watchdog_timeo = TX_TIMEOUT; 1251 dev->watchdog_timeo = TX_TIMEOUT;
1277 1252
@@ -1995,8 +1970,10 @@ int wl_rx_dma( struct net_device *dev )
1995 port = ( hfs_stat >> 8 ) & 0x0007; 1970 port = ( hfs_stat >> 8 ) & 0x0007;
1996 DBG_RX( DbgInfo, "Rx frame for port %d\n", port ); 1971 DBG_RX( DbgInfo, "Rx frame for port %d\n", port );
1997 1972
1998 if(( pktlen = GET_BUF_CNT( desc_next )) != 0 ) { 1973 pktlen = GET_BUF_CNT(desc_next);
1999 if(( skb = ALLOC_SKB( pktlen )) != NULL ) { 1974 if (pktlen != 0) {
1975 skb = ALLOC_SKB(pktlen);
1976 if (skb != NULL) {
2000 switch( port ) { 1977 switch( port ) {
2001#ifdef USE_WDS 1978#ifdef USE_WDS
2002 case 1: 1979 case 1:
diff --git a/drivers/staging/wlags49_h2/wl_priv.c b/drivers/staging/wlags49_h2/wl_priv.c
index 727ea8a483af..260d4f0d47b4 100644
--- a/drivers/staging/wlags49_h2/wl_priv.c
+++ b/drivers/staging/wlags49_h2/wl_priv.c
@@ -503,7 +503,8 @@ int wvlan_uil_send_diag_msg( struct uilreq *urq, struct wl_private *lp )
503 return result; 503 return result;
504 } 504 }
505 505
506 if ((data = kmalloc(urq->len, GFP_KERNEL)) != NULL) { 506 data = kmalloc(urq->len, GFP_KERNEL);
507 if (data != NULL) {
507 memset( Descp, 0, sizeof( DESC_STRCT )); 508 memset( Descp, 0, sizeof( DESC_STRCT ));
508 memcpy( data, urq->data, urq->len ); 509 memcpy( data, urq->data, urq->len );
509 510
@@ -617,7 +618,8 @@ int wvlan_uil_put_info( struct uilreq *urq, struct wl_private *lp )
617 LTV record, try to allocate it from the kernel stack. 618 LTV record, try to allocate it from the kernel stack.
618 Otherwise, we just use our local LTV record. */ 619 Otherwise, we just use our local LTV record. */
619 if( urq->len > sizeof( lp->ltvRecord )) { 620 if( urq->len > sizeof( lp->ltvRecord )) {
620 if(( pLtv = (ltv_t *)kmalloc( urq->len, GFP_KERNEL )) != NULL ) { 621 pLtv = kmalloc(urq->len, GFP_KERNEL);
622 if (pLtv != NULL) {
621 ltvAllocated = TRUE; 623 ltvAllocated = TRUE;
622 } else { 624 } else {
623 DBG_ERROR( DbgInfo, "Alloc FAILED\n" ); 625 DBG_ERROR( DbgInfo, "Alloc FAILED\n" );
@@ -652,7 +654,7 @@ int wvlan_uil_put_info( struct uilreq *urq, struct wl_private *lp )
652 pLtv->u.u16[0] = CNV_INT_TO_LITTLE( pLtv->u.u16[0] ); 654 pLtv->u.u16[0] = CNV_INT_TO_LITTLE( pLtv->u.u16[0] );
653 break; 655 break;
654 /* CFG_CNF_OWN_SSID currently same as CNF_DESIRED_SSID. Do we 656 /* CFG_CNF_OWN_SSID currently same as CNF_DESIRED_SSID. Do we
655 need seperate storage for this? */ 657 need separate storage for this? */
656 //case CFG_CNF_OWN_SSID: 658 //case CFG_CNF_OWN_SSID:
657 case CFG_CNF_OWN_ATIM_WINDOW: 659 case CFG_CNF_OWN_ATIM_WINDOW:
658 lp->atimWindow = pLtv->u.u16[0]; 660 lp->atimWindow = pLtv->u.u16[0];
@@ -1296,7 +1298,8 @@ int wvlan_uil_get_info( struct uilreq *urq, struct wl_private *lp )
1296 LTV record, try to allocate it from the kernel stack. 1298 LTV record, try to allocate it from the kernel stack.
1297 Otherwise, we just use our local LTV record. */ 1299 Otherwise, we just use our local LTV record. */
1298 if( urq->len > sizeof( lp->ltvRecord )) { 1300 if( urq->len > sizeof( lp->ltvRecord )) {
1299 if(( pLtv = (ltv_t *)kmalloc( urq->len, GFP_KERNEL )) != NULL ) { 1301 pLtv = kmalloc(urq->len, GFP_KERNEL);
1302 if (pLtv != NULL) {
1300 ltvAllocated = TRUE; 1303 ltvAllocated = TRUE;
1301 1304
1302 /* Copy the command/length information into the new buffer. */ 1305 /* Copy the command/length information into the new buffer. */
diff --git a/drivers/staging/wlags49_h2/wl_profile.c b/drivers/staging/wlags49_h2/wl_profile.c
index 1e0c75f28557..292d5792dd75 100644
--- a/drivers/staging/wlags49_h2/wl_profile.c
+++ b/drivers/staging/wlags49_h2/wl_profile.c
@@ -91,7 +91,7 @@
91 91
92#include <debug.h> 92#include <debug.h>
93#include <hcf.h> 93#include <hcf.h>
94//#include <hcfdef.h> 94/* #include <hcfdef.h> */
95 95
96#include <wl_if.h> 96#include <wl_if.h>
97#include <wl_internal.h> 97#include <wl_internal.h>
@@ -113,20 +113,22 @@ extern p_u32 DebugFlag;
113extern dbg_info_t *DbgInfo; 113extern dbg_info_t *DbgInfo;
114#endif 114#endif
115 115
116int parse_yes_no( char* value ); 116int parse_yes_no(char *value);
117 117
118 118
119int parse_yes_no( char* value ) { 119int parse_yes_no(char *value)
120int rc = 0; //default to NO for invalid parameters 120{
121int rc = 0; /* default to NO for invalid parameters */
121 122
122 if ( strlen( value ) == 1 ) { 123 if (strlen(value) == 1) {
123 if ( ( value[0] | ('Y'^'y') ) == 'y' ) rc = 1; 124 if ((value[0] | ('Y'^'y')) == 'y')
124// } else { 125 rc = 1;
125// this should not be debug time info, it is an enduser data entry error ;? 126 /* } else { */
126// DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_MICROWAVE_ROBUSTNESS ); 127 /* this should not be debug time info, it is an enduser data entry error ;? */
128 /* DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_MICROWAVE_ROBUSTNESS); */
127 } 129 }
128 return rc; 130 return rc;
129} // parse_yes_no 131} /* parse_yes_no */
130 132
131 133
132/******************************************************************************* 134/*******************************************************************************
@@ -149,13 +151,13 @@ int rc = 0; //default to NO for invalid parameters
149 * N/A 151 * N/A
150 * 152 *
151 ******************************************************************************/ 153 ******************************************************************************/
152void parse_config( struct net_device *dev ) 154void parse_config(struct net_device *dev)
153{ 155{
154 int file_desc; 156 int file_desc;
155#if 0 // BIN_DL 157#if 0 /* BIN_DL */
156 int rc; 158 int rc;
157 char *cp = NULL; 159 char *cp = NULL;
158#endif // BIN_DL 160#endif /* BIN_DL */
159 char buffer[MAX_LINE_SIZE]; 161 char buffer[MAX_LINE_SIZE];
160 char filename[MAX_LINE_SIZE]; 162 char filename[MAX_LINE_SIZE];
161 mm_segment_t fs; 163 mm_segment_t fs;
@@ -163,48 +165,47 @@ void parse_config( struct net_device *dev )
163 ENCSTRCT sEncryption; 165 ENCSTRCT sEncryption;
164 /*------------------------------------------------------------------------*/ 166 /*------------------------------------------------------------------------*/
165 167
166 DBG_FUNC( "parse_config" ); 168 DBG_FUNC("parse_config");
167 DBG_ENTER( DbgInfo ); 169 DBG_ENTER(DbgInfo);
168 170
169 /* Get the wavelan specific info for this device */ 171 /* Get the wavelan specific info for this device */
170 wvlan_config = (struct wl_private *)dev->priv; 172 wvlan_config = (struct wl_private *)dev->priv;
171 if ( wvlan_config == NULL ) { 173 if (wvlan_config == NULL) {
172 DBG_ERROR( DbgInfo, "Wavelan specific info struct not present?\n" ); 174 DBG_ERROR(DbgInfo, "Wavelan specific info struct not present?\n");
173 return; 175 return;
174 } 176 }
175 177
176 /* setup the default encryption string */ 178 /* setup the default encryption string */
177 strcpy( wvlan_config->szEncryption, DEF_CRYPT_STR ); 179 strcpy(wvlan_config->szEncryption, DEF_CRYPT_STR);
178 180
179 /* Obtain a user-space process context, storing the original context */ 181 /* Obtain a user-space process context, storing the original context */
180 fs = get_fs( ); 182 fs = get_fs();
181 set_fs( get_ds( )); 183 set_fs(get_ds());
182 184
183 /* Determine the filename for this device and attempt to open it */ 185 /* Determine the filename for this device and attempt to open it */
184 sprintf( filename, "%s%s", ROOT_CONFIG_FILENAME, dev->name ); 186 sprintf(filename, "%s%s", ROOT_CONFIG_FILENAME, dev->name);
185 file_desc = open( filename, O_RDONLY, 0 ); 187 file_desc = open(filename, O_RDONLY, 0);
186 if ( file_desc != -1 ) { 188 if (file_desc != -1) {
187 DBG_TRACE( DbgInfo, "Wireless config file found. Parsing options...\n" ); 189 DBG_TRACE(DbgInfo, "Wireless config file found. Parsing options...\n");
188 190
189 /* Read out the options */ 191 /* Read out the options */
190 while( readline( file_desc, buffer )) { 192 while (readline(file_desc, buffer))
191 translate_option( buffer, wvlan_config ); 193 translate_option(buffer, wvlan_config);
192 }
193 /* Close the file */ 194 /* Close the file */
194 close( file_desc ); //;?even if file_desc == -1 ??? 195 close(file_desc); /* ;?even if file_desc == -1 ??? */
195 } else { 196 } else {
196 DBG_TRACE( DbgInfo, "No iwconfig file found for this device; " 197 DBG_TRACE(DbgInfo, "No iwconfig file found for this device; "
197 "config.opts or wireless.opts will be used\n" ); 198 "config.opts or wireless.opts will be used\n");
198 } 199 }
199 /* Return to the original context */ 200 /* Return to the original context */
200 set_fs( fs ); 201 set_fs(fs);
201 202
202 /* convert the WEP keys, if read in as key1, key2, type of data */ 203 /* convert the WEP keys, if read in as key1, key2, type of data */
203 if ( wvlan_config->EnableEncryption ) { 204 if (wvlan_config->EnableEncryption) {
204 memset( &sEncryption, 0, sizeof( sEncryption )); 205 memset(&sEncryption, 0, sizeof(sEncryption));
205 206
206 wl_wep_decode( CRYPT_CODE, &sEncryption, 207 wl_wep_decode(CRYPT_CODE, &sEncryption,
207 wvlan_config->szEncryption ); 208 wvlan_config->szEncryption);
208 209
209 /* the Linux driver likes to use 1-4 for the key IDs, and then 210 /* the Linux driver likes to use 1-4 for the key IDs, and then
210 convert to 0-3 when sending to the card. The Windows code 211 convert to 0-3 when sending to the card. The Windows code
@@ -216,65 +217,64 @@ void parse_config( struct net_device *dev )
216 sEncryption.wEnabled = wvlan_config->EnableEncryption; 217 sEncryption.wEnabled = wvlan_config->EnableEncryption;
217 sEncryption.wTxKeyID = wvlan_config->TransmitKeyID - 1; 218 sEncryption.wTxKeyID = wvlan_config->TransmitKeyID - 1;
218 219
219 memcpy( &sEncryption.EncStr, &wvlan_config->DefaultKeys, 220 memcpy(&sEncryption.EncStr, &wvlan_config->DefaultKeys,
220 sizeof( CFG_DEFAULT_KEYS_STRCT )); 221 sizeof(CFG_DEFAULT_KEYS_STRCT));
221 222
222 memset( wvlan_config->szEncryption, 0, sizeof( wvlan_config->szEncryption )); 223 memset(wvlan_config->szEncryption, 0, sizeof(wvlan_config->szEncryption));
223 224
224 wl_wep_code( CRYPT_CODE, wvlan_config->szEncryption, &sEncryption, 225 wl_wep_code(CRYPT_CODE, wvlan_config->szEncryption, &sEncryption,
225 sizeof( sEncryption )); 226 sizeof(sEncryption));
226 } 227 }
227 228
228 /* decode the encryption string for the call to wl_commit() */ 229 /* decode the encryption string for the call to wl_commit() */
229 wl_wep_decode( CRYPT_CODE, &sEncryption, wvlan_config->szEncryption ); 230 wl_wep_decode(CRYPT_CODE, &sEncryption, wvlan_config->szEncryption);
230 231
231 wvlan_config->TransmitKeyID = sEncryption.wTxKeyID + 1; 232 wvlan_config->TransmitKeyID = sEncryption.wTxKeyID + 1;
232 wvlan_config->EnableEncryption = sEncryption.wEnabled; 233 wvlan_config->EnableEncryption = sEncryption.wEnabled;
233 234
234 memcpy( &wvlan_config->DefaultKeys, &sEncryption.EncStr, 235 memcpy(&wvlan_config->DefaultKeys, &sEncryption.EncStr,
235 sizeof( CFG_DEFAULT_KEYS_STRCT )); 236 sizeof(CFG_DEFAULT_KEYS_STRCT));
236 237
237#if 0 //BIN_DL 238#if 0 /* BIN_DL */
238 /* Obtain a user-space process context, storing the original context */ 239 /* Obtain a user-space process context, storing the original context */
239 fs = get_fs( ); 240 fs = get_fs();
240 set_fs( get_ds( )); 241 set_fs(get_ds());
241 242
242 //;?just to fake something 243 /* ;?just to fake something */
243 strcpy(/*wvlan_config->fw_image_*/filename, "/etc/agere/fw.bin" ); 244 strcpy(/*wvlan_config->fw_image_*/filename, "/etc/agere/fw.bin");
244 file_desc = open( /*wvlan_config->fw_image_*/filename, 0, 0 ); 245 file_desc = open(/*wvlan_config->fw_image_*/filename, 0, 0);
245 if ( file_desc == -1 ) { 246 if (file_desc == -1) {
246 DBG_ERROR( DbgInfo, "No image file found\n" ); 247 DBG_ERROR(DbgInfo, "No image file found\n");
247 } else { 248 } else {
248 DBG_TRACE( DbgInfo, "F/W image file found\n" ); 249 DBG_TRACE(DbgInfo, "F/W image file found\n");
249#define DHF_ALLOC_SIZE 96000 //just below 96K, let's hope it suffices for now and for the future 250#define DHF_ALLOC_SIZE 96000 /* just below 96K, let's hope it suffices for now and for the future */
250 cp = (char*)vmalloc( DHF_ALLOC_SIZE ); 251 cp = (char *)vmalloc(DHF_ALLOC_SIZE);
251 if ( cp == NULL ) { 252 if (cp == NULL) {
252 DBG_ERROR( DbgInfo, "error in vmalloc\n" ); 253 DBG_ERROR(DbgInfo, "error in vmalloc\n");
253 } else { 254 } else {
254 rc = read( file_desc, cp, DHF_ALLOC_SIZE ); 255 rc = read(file_desc, cp, DHF_ALLOC_SIZE);
255 if ( rc == DHF_ALLOC_SIZE ) { 256 if (rc == DHF_ALLOC_SIZE) {
256 DBG_ERROR( DbgInfo, "buffer too small, %d\n", DHF_ALLOC_SIZE ); 257 DBG_ERROR(DbgInfo, "buffer too small, %d\n", DHF_ALLOC_SIZE);
257 } else if ( rc > 0 ) { 258 } else if (rc > 0) {
258 DBG_TRACE( DbgInfo, "read O.K.: %d bytes %.12s\n", rc, cp ); 259 DBG_TRACE(DbgInfo, "read O.K.: %d bytes %.12s\n", rc, cp);
259 rc = read( file_desc, &cp[rc], 1 ); 260 rc = read(file_desc, &cp[rc], 1);
260 if ( rc == 0 ) { 261 if (rc == 0)
261 DBG_TRACE( DbgInfo, "no more to read\n" ); 262 DBG_TRACE(DbgInfo, "no more to read\n");
262 }
263 } 263 }
264 if ( rc != 0 ) { 264 if (rc != 0) {
265 DBG_ERROR( DbgInfo, "file not read in one swoop or other error"\ 265 DBG_ERROR(DbgInfo, "file not read in one swoop or other error"\
266 ", give up, too complicated, rc = %0X\n", rc ); 266 ", give up, too complicated, rc = %0X\n", rc);
267 } 267 }
268 vfree( cp ); 268 vfree(cp);
269 } 269 }
270 close( file_desc ); 270 close(file_desc);
271 } 271 }
272 set_fs( fs ); /* Return to the original context */ 272 set_fs(fs); /* Return to the original context */
273#endif // BIN_DL 273#endif /* BIN_DL */
274 274
275 DBG_LEAVE( DbgInfo ); 275 DBG_LEAVE(DbgInfo);
276 return; 276 return;
277} // parse_config 277} /* parse_config */
278 278
279/******************************************************************************* 279/*******************************************************************************
280 * readline() 280 * readline()
@@ -298,17 +298,17 @@ void parse_config( struct net_device *dev )
298 * -1 on error 298 * -1 on error
299 * 299 *
300 ******************************************************************************/ 300 ******************************************************************************/
301int readline( int filedesc, char *buffer ) 301int readline(int filedesc, char *buffer)
302{ 302{
303 int result = -1; 303 int result = -1;
304 int bytes_read = 0; 304 int bytes_read = 0;
305 /*------------------------------------------------------------------------*/ 305 /*------------------------------------------------------------------------*/
306 306
307 /* Make sure the file descriptor is good */ 307 /* Make sure the file descriptor is good */
308 if ( filedesc != -1 ) { 308 if (filedesc != -1) {
309 /* Read in from the file byte by byte until a newline is reached */ 309 /* Read in from the file byte by byte until a newline is reached */
310 while(( result = read( filedesc, &buffer[bytes_read], 1 )) == 1 ) { 310 while ((result = read(filedesc, &buffer[bytes_read], 1)) == 1) {
311 if ( buffer[bytes_read] == '\n' ) { 311 if (buffer[bytes_read] == '\n') {
312 buffer[bytes_read] = '\0'; 312 buffer[bytes_read] = '\0';
313 bytes_read++; 313 bytes_read++;
314 break; 314 break;
@@ -318,12 +318,11 @@ int readline( int filedesc, char *buffer )
318 } 318 }
319 319
320 /* Return the number of bytes read */ 320 /* Return the number of bytes read */
321 if ( result == -1 ) { 321 if (result == -1)
322 return result; 322 return result;
323 } else { 323 else
324 return bytes_read; 324 return bytes_read;
325 } 325} /* readline */
326} // readline
327/*============================================================================*/ 326/*============================================================================*/
328 327
329/******************************************************************************* 328/*******************************************************************************
@@ -346,7 +345,7 @@ int readline( int filedesc, char *buffer )
346 * N/A 345 * N/A
347 * 346 *
348 ******************************************************************************/ 347 ******************************************************************************/
349void translate_option( char *buffer, struct wl_private *lp ) 348void translate_option(char *buffer, struct wl_private *lp)
350{ 349{
351 unsigned int value_convert = 0; 350 unsigned int value_convert = 0;
352 int string_length = 0; 351 int string_length = 0;
@@ -355,18 +354,17 @@ void translate_option( char *buffer, struct wl_private *lp )
355 u_char mac_value[ETH_ALEN]; 354 u_char mac_value[ETH_ALEN];
356 /*------------------------------------------------------------------------*/ 355 /*------------------------------------------------------------------------*/
357 356
358 DBG_FUNC( "translate_option" ); 357 DBG_FUNC("translate_option");
359 358
360 if ( buffer == NULL || lp == NULL ) { 359 if (buffer == NULL || lp == NULL) {
361 DBG_ERROR( DbgInfo, "Config file buffer and/or wavelan buffer ptr NULL\n" ); 360 DBG_ERROR(DbgInfo, "Config file buffer and/or wavelan buffer ptr NULL\n");
362 return; 361 return;
363 } 362 }
364 363
365 ParseConfigLine( buffer, &key, &value ); 364 ParseConfigLine(buffer, &key, &value);
366 365
367 if ( key == NULL || value == NULL ) { 366 if (key == NULL || value == NULL)
368 return; 367 return;
369 }
370 368
371 /* Determine which key it is and perform the appropriate action */ 369 /* Determine which key it is and perform the appropriate action */
372 370
@@ -375,367 +373,316 @@ void translate_option( char *buffer, struct wl_private *lp )
375 /* handle DebugFlag as early as possible so it starts its influence as early 373 /* handle DebugFlag as early as possible so it starts its influence as early
376 * as possible 374 * as possible
377 */ 375 */
378 if ( strcmp( key, PARM_NAME_DEBUG_FLAG ) == 0 ) { 376 if (strcmp(key, PARM_NAME_DEBUG_FLAG) == 0) {
379 if ( DebugFlag == ~0 ) { //if DebugFlag is not specified on the command line 377 if (DebugFlag == ~0) { /* if DebugFlag is not specified on the command line */
380 if ( DbgInfo->DebugFlag == 0 ) { /* if pc_debug did not set DebugFlag (i.e.pc_debug is 378 if (DbgInfo->DebugFlag == 0) { /* if pc_debug did not set DebugFlag (i.e.pc_debug is
381 * not specified or specified outside the 4-8 range 379 * not specified or specified outside the 4-8 range
382 */ 380 */
383 DbgInfo->DebugFlag |= DBG_DEFAULTS; 381 DbgInfo->DebugFlag |= DBG_DEFAULTS;
384 } 382 }
385 } else { 383 } else {
386 DbgInfo->DebugFlag = simple_strtoul(value, NULL, 0); //;?DebugFlag; 384 DbgInfo->DebugFlag = simple_strtoul(value, NULL, 0); /* ;?DebugFlag; */
387 } 385 }
388 DbgInfo->DebugFlag = simple_strtoul(value, NULL, 0); //;?Delete ASAP 386 DbgInfo->DebugFlag = simple_strtoul(value, NULL, 0); /* ;?Delete ASAP */
389 } 387 }
390#endif /* DBG */ 388#endif /* DBG */
391 if ( strcmp( key, PARM_NAME_AUTH_KEY_MGMT_SUITE ) == 0 ) { 389 if (strcmp(key, PARM_NAME_AUTH_KEY_MGMT_SUITE) == 0) {
392 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_AUTH_KEY_MGMT_SUITE, value ); 390 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_AUTH_KEY_MGMT_SUITE, value);
393 391
394 value_convert = simple_strtoul(value, NULL, 0); 392 value_convert = simple_strtoul(value, NULL, 0);
395 if (( value_convert >= PARM_MIN_AUTH_KEY_MGMT_SUITE ) || ( value_convert <= PARM_MAX_AUTH_KEY_MGMT_SUITE )) { 393 if ((value_convert >= PARM_MIN_AUTH_KEY_MGMT_SUITE) || (value_convert <= PARM_MAX_AUTH_KEY_MGMT_SUITE))
396 lp->AuthKeyMgmtSuite = value_convert; 394 lp->AuthKeyMgmtSuite = value_convert;
397 } else { 395 else
398 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_AUTH_KEY_MGMT_SUITE ); 396 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_AUTH_KEY_MGMT_SUITE);
399 } 397 } else if (strcmp(key, PARM_NAME_BRSC_2GHZ) == 0) {
400 } 398 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_2GHZ, value);
401 else if ( strcmp( key, PARM_NAME_BRSC_2GHZ ) == 0 ) {
402 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_2GHZ, value );
403 399
404 value_convert = simple_strtoul(value, NULL, 0); 400 value_convert = simple_strtoul(value, NULL, 0);
405 if (( value_convert >= PARM_MIN_BRSC ) || ( value_convert <= PARM_MAX_BRSC )) { 401 if ((value_convert >= PARM_MIN_BRSC) || (value_convert <= PARM_MAX_BRSC))
406 lp->brsc[0] = value_convert; 402 lp->brsc[0] = value_convert;
407 } else { 403 else
408 DBG_WARNING( DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_BRSC_2GHZ ); 404 DBG_WARNING(DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_BRSC_2GHZ);
409 } 405 } else if (strcmp(key, PARM_NAME_BRSC_5GHZ) == 0) {
410 } 406 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_5GHZ, value);
411 else if ( strcmp( key, PARM_NAME_BRSC_5GHZ ) == 0 ) {
412 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_BRSC_5GHZ, value );
413 407
414 value_convert = simple_strtoul(value, NULL, 0); 408 value_convert = simple_strtoul(value, NULL, 0);
415 if (( value_convert >= PARM_MIN_BRSC ) || ( value_convert <= PARM_MAX_BRSC )) { 409 if ((value_convert >= PARM_MIN_BRSC) || (value_convert <= PARM_MAX_BRSC))
416 lp->brsc[1] = value_convert; 410 lp->brsc[1] = value_convert;
417 } else { 411 else
418 DBG_WARNING( DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_BRSC_5GHZ ); 412 DBG_WARNING(DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_BRSC_5GHZ);
419 } 413 } else if ((strcmp(key, PARM_NAME_DESIRED_SSID) == 0) || (strcmp(key, PARM_NAME_OWN_SSID) == 0)) {
420 } 414 DBG_TRACE(DbgInfo, "SSID, value: %s\n", value);
421 else if (( strcmp( key, PARM_NAME_DESIRED_SSID ) == 0 ) || ( strcmp( key, PARM_NAME_OWN_SSID ) == 0 )) {
422 DBG_TRACE( DbgInfo, "SSID, value: %s\n", value );
423 415
424 memset( lp->NetworkName, 0, ( PARM_MAX_NAME_LEN + 1 )); 416 memset(lp->NetworkName, 0, (PARM_MAX_NAME_LEN + 1));
425 417
426 /* Make sure the value isn't too long */ 418 /* Make sure the value isn't too long */
427 string_length = strlen( value ); 419 string_length = strlen(value);
428 if ( string_length > PARM_MAX_NAME_LEN ) { 420 if (string_length > PARM_MAX_NAME_LEN) {
429 DBG_WARNING( DbgInfo, "SSID too long; will be truncated\n" ); 421 DBG_WARNING(DbgInfo, "SSID too long; will be truncated\n");
430 string_length = PARM_MAX_NAME_LEN; 422 string_length = PARM_MAX_NAME_LEN;
431 } 423 }
432 424
433 memcpy( lp->NetworkName, value, string_length ); 425 memcpy(lp->NetworkName, value, string_length);
434 } 426 }
435#if 0 427#if 0
436 else if ( strcmp( key, PARM_NAME_DOWNLOAD_FIRMWARE ) == 0 ) { 428 else if (strcmp(key, PARM_NAME_DOWNLOAD_FIRMWARE) == 0) {
437 DBG_TRACE( DbgInfo, "DOWNLOAD_FIRMWARE, value: %s\n", value ); 429 DBG_TRACE(DbgInfo, "DOWNLOAD_FIRMWARE, value: %s\n", value);
438 memset( lp->fw_image_filename, 0, ( MAX_LINE_SIZE + 1 )); 430 memset(lp->fw_image_filename, 0, (MAX_LINE_SIZE + 1));
439 /* Make sure the value isn't too long */ 431 /* Make sure the value isn't too long */
440 string_length = strlen( value ); 432 string_length = strlen(value);
441 if ( string_length > MAX_LINE_SIZE ) { 433 if (string_length > MAX_LINE_SIZE)
442 DBG_WARNING( DbgInfo, "F/W image file name too long; will be ignored\n" ); 434 DBG_WARNING(DbgInfo, "F/W image file name too long; will be ignored\n");
443 } else { 435 else
444 memcpy( lp->fw_image_filename, value, string_length ); 436 memcpy(lp->fw_image_filename, value, string_length);
445 }
446 } 437 }
447#endif 438#endif
448 else if ( strcmp( key, PARM_NAME_ENABLE_ENCRYPTION ) == 0 ) { 439 else if (strcmp(key, PARM_NAME_ENABLE_ENCRYPTION) == 0) {
449 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_ENABLE_ENCRYPTION, value ); 440 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_ENABLE_ENCRYPTION, value);
450 441
451 value_convert = simple_strtoul(value, NULL, 0); 442 value_convert = simple_strtoul(value, NULL, 0);
452 if (( value_convert >= PARM_MIN_ENABLE_ENCRYPTION ) && ( value_convert <= PARM_MAX_ENABLE_ENCRYPTION )) { 443 if ((value_convert >= PARM_MIN_ENABLE_ENCRYPTION) && (value_convert <= PARM_MAX_ENABLE_ENCRYPTION))
453 lp->EnableEncryption = value_convert; 444 lp->EnableEncryption = value_convert;
454 } else { 445 else
455 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_ENABLE_ENCRYPTION ); 446 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_ENABLE_ENCRYPTION);
456 } 447 } else if (strcmp(key, PARM_NAME_ENCRYPTION) == 0) {
457 } 448 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_ENCRYPTION, value);
458 else if ( strcmp( key, PARM_NAME_ENCRYPTION ) == 0 ) {
459 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_ENCRYPTION, value );
460 449
461 memset( lp->szEncryption, 0, sizeof( lp->szEncryption )); 450 memset(lp->szEncryption, 0, sizeof(lp->szEncryption));
462 451
463 /* Make sure the value isn't too long */ 452 /* Make sure the value isn't too long */
464 string_length = strlen( value ); 453 string_length = strlen(value);
465 if ( string_length > sizeof( lp->szEncryption ) ) { 454 if (string_length > sizeof(lp->szEncryption)) {
466 DBG_WARNING( DbgInfo, "%s too long; will be truncated\n", PARM_NAME_ENCRYPTION ); 455 DBG_WARNING(DbgInfo, "%s too long; will be truncated\n", PARM_NAME_ENCRYPTION);
467 string_length = sizeof( lp->szEncryption ); 456 string_length = sizeof(lp->szEncryption);
468 } 457 }
469 458
470 memcpy( lp->szEncryption, value, string_length ); 459 memcpy(lp->szEncryption, value, string_length);
471 } 460 } else if (strcmp(key, PARM_NAME_KEY1) == 0) {
472 else if ( strcmp( key, PARM_NAME_KEY1 ) == 0 ) { 461 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_KEY1, value);
473 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_KEY1, value );
474 462
475 if ( is_valid_key_string( value )) { 463 if (is_valid_key_string(value)) {
476 memset( lp->DefaultKeys.key[0].key, 0, MAX_KEY_SIZE ); 464 memset(lp->DefaultKeys.key[0].key, 0, MAX_KEY_SIZE);
477 465
478 key_string2key( value, &lp->DefaultKeys.key[0] ); 466 key_string2key(value, &lp->DefaultKeys.key[0]);
479 } else { 467 } else {
480 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY1 ); 468 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY1);
481 } 469 }
482 } 470 } else if (strcmp(key, PARM_NAME_KEY2) == 0) {
483 else if ( strcmp( key, PARM_NAME_KEY2 ) == 0 ) { 471 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_KEY2, value);
484 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_KEY2, value );
485 472
486 if ( is_valid_key_string( value )) { 473 if (is_valid_key_string(value)) {
487 memset( lp->DefaultKeys.key[1].key, 0, MAX_KEY_SIZE ); 474 memset(lp->DefaultKeys.key[1].key, 0, MAX_KEY_SIZE);
488 475
489 key_string2key( value, &lp->DefaultKeys.key[1] ); 476 key_string2key(value, &lp->DefaultKeys.key[1]);
490 } else { 477 } else {
491 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY2 ); 478 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY2);
492 } 479 }
493 } 480 } else if (strcmp(key, PARM_NAME_KEY3) == 0) {
494 else if ( strcmp( key, PARM_NAME_KEY3 ) == 0 ) { 481 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_KEY3, value);
495 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_KEY3, value );
496 482
497 if ( is_valid_key_string( value )) { 483 if (is_valid_key_string(value)) {
498 memset( lp->DefaultKeys.key[2].key, 0, MAX_KEY_SIZE ); 484 memset(lp->DefaultKeys.key[2].key, 0, MAX_KEY_SIZE);
499 485
500 key_string2key( value, &lp->DefaultKeys.key[2] ); 486 key_string2key(value, &lp->DefaultKeys.key[2]);
501 } else { 487 } else {
502 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY3 ); 488 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY3);
503 } 489 }
504 } 490 } else if (strcmp(key, PARM_NAME_KEY4) == 0) {
505 else if ( strcmp( key, PARM_NAME_KEY4 ) == 0 ) { 491 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_KEY4, value);
506 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_KEY4, value );
507 492
508 if ( is_valid_key_string( value )) { 493 if (is_valid_key_string(value)) {
509 memset( lp->DefaultKeys.key[3].key, 0, MAX_KEY_SIZE ); 494 memset(lp->DefaultKeys.key[3].key, 0, MAX_KEY_SIZE);
510 495
511 key_string2key( value, &lp->DefaultKeys.key[3] ); 496 key_string2key(value, &lp->DefaultKeys.key[3]);
512 } else { 497 } else {
513 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY4 ); 498 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_KEY4);
514 } 499 }
515 } 500 }
516 /* New Parameters for WARP */ 501 /* New Parameters for WARP */
517 else if ( strcmp( key, PARM_NAME_LOAD_BALANCING ) == 0 ) { 502 else if (strcmp(key, PARM_NAME_LOAD_BALANCING) == 0) {
518 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_LOAD_BALANCING, value ); 503 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_LOAD_BALANCING, value);
519 lp->loadBalancing = parse_yes_no(value); 504 lp->loadBalancing = parse_yes_no(value);
520 } 505 } else if (strcmp(key, PARM_NAME_MEDIUM_DISTRIBUTION) == 0) {
521 else if ( strcmp( key, PARM_NAME_MEDIUM_DISTRIBUTION ) == 0 ) { 506 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_MEDIUM_DISTRIBUTION, value);
522 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MEDIUM_DISTRIBUTION, value );
523 lp->mediumDistribution = parse_yes_no(value); 507 lp->mediumDistribution = parse_yes_no(value);
524 } 508 } else if (strcmp(key, PARM_NAME_MICROWAVE_ROBUSTNESS) == 0) {
525 else if ( strcmp( key, PARM_NAME_MICROWAVE_ROBUSTNESS) == 0 ) { 509 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_MICROWAVE_ROBUSTNESS, value);
526 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MICROWAVE_ROBUSTNESS, value );
527 lp->MicrowaveRobustness = parse_yes_no(value); 510 lp->MicrowaveRobustness = parse_yes_no(value);
528 } 511 } else if (strcmp(key, PARM_NAME_MULTICAST_RATE) == 0) {
529 else if ( strcmp( key, PARM_NAME_MULTICAST_RATE ) == 0 ) { 512 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_RATE, value);
530 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_RATE, value );
531 513
532 value_convert = simple_strtoul(value, NULL, 0); 514 value_convert = simple_strtoul(value, NULL, 0);
533 515
534 if (( value_convert >= PARM_MIN_MULTICAST_RATE ) && ( value_convert <= PARM_MAX_MULTICAST_RATE )) { 516 if ((value_convert >= PARM_MIN_MULTICAST_RATE) && (value_convert <= PARM_MAX_MULTICAST_RATE))
535 lp->MulticastRate[0] = value_convert; 517 lp->MulticastRate[0] = value_convert;
536 } else { 518 else
537 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_MULTICAST_RATE ); 519 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_MULTICAST_RATE);
538 } 520 } else if (strcmp(key, PARM_NAME_OWN_CHANNEL) == 0) {
539 } 521 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_CHANNEL, value);
540 else if ( strcmp( key, PARM_NAME_OWN_CHANNEL ) == 0 ) {
541 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_CHANNEL, value );
542 522
543 value_convert = simple_strtoul(value, NULL, 0); 523 value_convert = simple_strtoul(value, NULL, 0);
544 if ( wl_is_a_valid_chan( value_convert )) { 524 if (wl_is_a_valid_chan(value_convert)) {
545 if ( value_convert > 14 ) { 525 if (value_convert > 14)
546 value_convert = value_convert | 0x100; 526 value_convert = value_convert | 0x100;
547 }
548 lp->Channel = value_convert; 527 lp->Channel = value_convert;
549 } else { 528 } else {
550 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_CHANNEL ); 529 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_CHANNEL);
551 } 530 }
552 } 531 } else if (strcmp(key, PARM_NAME_OWN_NAME) == 0) {
553 else if ( strcmp( key, PARM_NAME_OWN_NAME ) == 0 ) { 532 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_NAME, value);
554 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_NAME, value );
555 533
556 memset( lp->StationName, 0, ( PARM_MAX_NAME_LEN + 1 )); 534 memset(lp->StationName, 0, (PARM_MAX_NAME_LEN + 1));
557 535
558 /* Make sure the value isn't too long */ 536 /* Make sure the value isn't too long */
559 string_length = strlen( value ); 537 string_length = strlen(value);
560 if ( string_length > PARM_MAX_NAME_LEN ) { 538 if (string_length > PARM_MAX_NAME_LEN) {
561 DBG_WARNING( DbgInfo, "%s too long; will be truncated\n", PARM_NAME_OWN_NAME ); 539 DBG_WARNING(DbgInfo, "%s too long; will be truncated\n", PARM_NAME_OWN_NAME);
562 string_length = PARM_MAX_NAME_LEN; 540 string_length = PARM_MAX_NAME_LEN;
563 } 541 }
564 542
565 memcpy( lp->StationName, value, string_length ); 543 memcpy(lp->StationName, value, string_length);
566 } 544 } else if (strcmp(key, PARM_NAME_RTS_THRESHOLD) == 0) {
567 else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD ) == 0 ) { 545 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD, value);
568 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD, value );
569 546
570 value_convert = simple_strtoul(value, NULL, 0); 547 value_convert = simple_strtoul(value, NULL, 0);
571 if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { 548 if ((value_convert >= PARM_MIN_RTS_THRESHOLD) && (value_convert <= PARM_MAX_RTS_THRESHOLD))
572 lp->RTSThreshold = value_convert; 549 lp->RTSThreshold = value_convert;
573 } else { 550 else
574 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD ); 551 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD);
575 } 552 } else if (strcmp(key, PARM_NAME_SRSC_2GHZ) == 0) {
576 } 553 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_2GHZ, value);
577 else if ( strcmp( key, PARM_NAME_SRSC_2GHZ ) == 0 ) {
578 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_2GHZ, value );
579 554
580 value_convert = simple_strtoul(value, NULL, 0); 555 value_convert = simple_strtoul(value, NULL, 0);
581 if (( value_convert >= PARM_MIN_SRSC ) || ( value_convert <= PARM_MAX_SRSC )) { 556 if ((value_convert >= PARM_MIN_SRSC) || (value_convert <= PARM_MAX_SRSC))
582 lp->srsc[0] = value_convert; 557 lp->srsc[0] = value_convert;
583 } else { 558 else
584 DBG_WARNING( DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_SRSC_2GHZ ); 559 DBG_WARNING(DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_SRSC_2GHZ);
585 } 560 } else if (strcmp(key, PARM_NAME_SRSC_5GHZ) == 0) {
586 } 561 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_5GHZ, value);
587 else if ( strcmp( key, PARM_NAME_SRSC_5GHZ ) == 0 ) {
588 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SRSC_5GHZ, value );
589 562
590 value_convert = simple_strtoul(value, NULL, 0); 563 value_convert = simple_strtoul(value, NULL, 0);
591 if (( value_convert >= PARM_MIN_SRSC ) || ( value_convert <= PARM_MAX_SRSC )) { 564 if ((value_convert >= PARM_MIN_SRSC) || (value_convert <= PARM_MAX_SRSC))
592 lp->srsc[1] = value_convert; 565 lp->srsc[1] = value_convert;
593 } else { 566 else
594 DBG_WARNING( DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_SRSC_5GHZ ); 567 DBG_WARNING(DbgInfo, "%s invaid; will be ignored\n", PARM_NAME_SRSC_5GHZ);
595 } 568 } else if (strcmp(key, PARM_NAME_SYSTEM_SCALE) == 0) {
596 } 569 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_SYSTEM_SCALE, value);
597 else if ( strcmp( key, PARM_NAME_SYSTEM_SCALE ) == 0 ) {
598 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_SYSTEM_SCALE, value );
599 570
600 value_convert = simple_strtoul(value, NULL, 0); 571 value_convert = simple_strtoul(value, NULL, 0);
601 if (( value_convert >= PARM_MIN_SYSTEM_SCALE ) && ( value_convert <= PARM_MAX_SYSTEM_SCALE )) { 572 if ((value_convert >= PARM_MIN_SYSTEM_SCALE) && (value_convert <= PARM_MAX_SYSTEM_SCALE))
602 lp->DistanceBetweenAPs = value_convert; 573 lp->DistanceBetweenAPs = value_convert;
603 } else { 574 else
604 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_SYSTEM_SCALE ); 575 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_SYSTEM_SCALE);
605 } 576 } else if (strcmp(key, PARM_NAME_TX_KEY) == 0) {
606 } 577 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_KEY, value);
607 else if ( strcmp( key, PARM_NAME_TX_KEY ) == 0 ) {
608 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_KEY, value );
609 578
610 value_convert = simple_strtoul(value, NULL, 0); 579 value_convert = simple_strtoul(value, NULL, 0);
611 if (( value_convert >= PARM_MIN_TX_KEY ) && ( value_convert <= PARM_MAX_TX_KEY )) { 580 if ((value_convert >= PARM_MIN_TX_KEY) && (value_convert <= PARM_MAX_TX_KEY))
612 lp->TransmitKeyID = simple_strtoul(value, NULL, 0); 581 lp->TransmitKeyID = simple_strtoul(value, NULL, 0);
613 } else { 582 else
614 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_KEY ); 583 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_KEY);
615 } 584 } else if (strcmp(key, PARM_NAME_TX_RATE) == 0) {
616 } 585 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE, value);
617 else if ( strcmp( key, PARM_NAME_TX_RATE ) == 0 ) {
618 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE, value );
619 586
620 value_convert = simple_strtoul(value, NULL, 0); 587 value_convert = simple_strtoul(value, NULL, 0);
621 if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { 588 if ((value_convert >= PARM_MIN_TX_RATE) && (value_convert <= PARM_MAX_TX_RATE))
622 lp->TxRateControl[0] = value_convert; 589 lp->TxRateControl[0] = value_convert;
623 } else { 590 else
624 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE ); 591 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE);
625 } 592 } else if (strcmp(key, PARM_NAME_TX_POW_LEVEL) == 0) {
626 } 593 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_POW_LEVEL, value);
627 else if ( strcmp( key, PARM_NAME_TX_POW_LEVEL ) == 0 ) {
628 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_POW_LEVEL, value );
629 594
630 value_convert = simple_strtoul(value, NULL, 0); 595 value_convert = simple_strtoul(value, NULL, 0);
631 if (( value_convert >= PARM_MIN_TX_POW_LEVEL ) || ( value_convert <= PARM_MAX_TX_POW_LEVEL )) { 596 if ((value_convert >= PARM_MIN_TX_POW_LEVEL) || (value_convert <= PARM_MAX_TX_POW_LEVEL))
632 lp->txPowLevel = value_convert; 597 lp->txPowLevel = value_convert;
633 } else { 598 else
634 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_POW_LEVEL ); 599 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_POW_LEVEL);
635 }
636 } 600 }
637 601
638 /* Need to add? : Country code, Short/Long retry */ 602 /* Need to add? : Country code, Short/Long retry */
639 603
640 /* Configuration parameters specific to STA mode */ 604 /* Configuration parameters specific to STA mode */
641#if 1 //;? (HCF_TYPE) & HCF_TYPE_STA 605#if 1 /* ;? (HCF_TYPE) & HCF_TYPE_STA */
642//;?seems reasonable that even an AP-only driver could afford this small additional footprint 606/* ;?seems reasonable that even an AP-only driver could afford this small additional footprint */
643 if ( CNV_INT_TO_LITTLE( lp->hcfCtx.IFB_FWIdentity.comp_id ) == COMP_ID_FW_STA ) { 607 if (CNV_INT_TO_LITTLE(lp->hcfCtx.IFB_FWIdentity.comp_id) == COMP_ID_FW_STA) {
644 //;?should we return an error status in AP mode 608 /* ;?should we return an error status in AP mode */
645 if ( strcmp( key, PARM_NAME_PORT_TYPE ) == 0 ) { 609 if (strcmp(key, PARM_NAME_PORT_TYPE) == 0) {
646 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PORT_TYPE, value ); 610 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_PORT_TYPE, value);
647 611
648 value_convert = simple_strtoul(value, NULL, 0); 612 value_convert = simple_strtoul(value, NULL, 0);
649 if (( value_convert == PARM_MIN_PORT_TYPE ) || ( value_convert == PARM_MAX_PORT_TYPE )) { 613 if ((value_convert == PARM_MIN_PORT_TYPE) || (value_convert == PARM_MAX_PORT_TYPE))
650 lp->PortType = value_convert; 614 lp->PortType = value_convert;
651 } else { 615 else
652 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_PORT_TYPE ); 616 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_PORT_TYPE);
653 } 617 } else if (strcmp(key, PARM_NAME_PM_ENABLED) == 0) {
654 } 618 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_PM_ENABLED, value);
655 else if ( strcmp( key, PARM_NAME_PM_ENABLED ) == 0 ) {
656 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PM_ENABLED, value );
657 value_convert = simple_strtoul(value, NULL, 0); 619 value_convert = simple_strtoul(value, NULL, 0);
658 /* ;? how about wl_main.c containing 620 /* ;? how about wl_main.c containing
659 * VALID_PARAM( PARM_PM_ENABLED <= WVLAN_PM_STATE_STANDARD || 621 * VALID_PARAM(PARM_PM_ENABLED <= WVLAN_PM_STATE_STANDARD ||
660 * ( PARM_PM_ENABLED & 0x7FFF ) <= WVLAN_PM_STATE_STANDARD ); 622 * (PARM_PM_ENABLED & 0x7FFF) <= WVLAN_PM_STATE_STANDARD);
661 */ 623 */
662 if ( ( value_convert & 0x7FFF ) <= PARM_MAX_PM_ENABLED) { 624 if ((value_convert & 0x7FFF) <= PARM_MAX_PM_ENABLED) {
663 lp->PMEnabled = value_convert; 625 lp->PMEnabled = value_convert;
664 } else { 626 } else {
665 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_PM_ENABLED ); 627 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_PM_ENABLED);
666 //;?this is a data entry error, hence not a DBG_WARNING 628 /* ;?this is a data entry error, hence not a DBG_WARNING */
667 } 629 }
668 } 630 } else if (strcmp(key, PARM_NAME_CREATE_IBSS) == 0) {
669 else if ( strcmp( key, PARM_NAME_CREATE_IBSS ) == 0 ) { 631 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_CREATE_IBSS, value);
670 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_CREATE_IBSS, value );
671 lp->CreateIBSS = parse_yes_no(value); 632 lp->CreateIBSS = parse_yes_no(value);
672 } 633 } else if (strcmp(key, PARM_NAME_MULTICAST_RX) == 0) {
673 else if ( strcmp( key, PARM_NAME_MULTICAST_RX ) == 0 ) { 634 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_RX, value);
674 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_RX, value );
675 lp->MulticastReceive = parse_yes_no(value); 635 lp->MulticastReceive = parse_yes_no(value);
676 } 636 } else if (strcmp(key, PARM_NAME_MAX_SLEEP) == 0) {
677 else if ( strcmp( key, PARM_NAME_MAX_SLEEP ) == 0 ) { 637 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_MAX_SLEEP, value);
678 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MAX_SLEEP, value );
679 638
680 value_convert = simple_strtoul(value, NULL, 0); 639 value_convert = simple_strtoul(value, NULL, 0);
681 if (( value_convert >= 0 ) && ( value_convert <= 65535 )) { 640 if ((value_convert >= 0) && (value_convert <= 65535))
682 lp->MaxSleepDuration = value_convert; 641 lp->MaxSleepDuration = value_convert;
683 } else { 642 else
684 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_MAX_SLEEP ); 643 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_MAX_SLEEP);
685 } 644 } else if (strcmp(key, PARM_NAME_NETWORK_ADDR) == 0) {
686 } 645 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_NETWORK_ADDR, value);
687 else if ( strcmp( key, PARM_NAME_NETWORK_ADDR ) == 0 ) { 646
688 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_NETWORK_ADDR, value ); 647 if (parse_mac_address(value, mac_value) == ETH_ALEN)
689 648 memcpy(lp->MACAddress, mac_value, ETH_ALEN);
690 if ( parse_mac_address( value, mac_value ) == ETH_ALEN ) { 649 else
691 memcpy( lp->MACAddress, mac_value, ETH_ALEN ); 650 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_NETWORK_ADDR);
692 } else { 651 } else if (strcmp(key, PARM_NAME_AUTHENTICATION) == 0) {
693 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_NETWORK_ADDR ); 652 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_AUTHENTICATION, value);
694 }
695 }
696 else if ( strcmp( key, PARM_NAME_AUTHENTICATION ) == 0 ) {
697 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_AUTHENTICATION, value );
698 653
699 value_convert = simple_strtoul(value, NULL, 0); 654 value_convert = simple_strtoul(value, NULL, 0);
700 if (( value_convert >= PARM_MIN_AUTHENTICATION ) && ( value_convert <= PARM_MAX_AUTHENTICATION )) { 655 if ((value_convert >= PARM_MIN_AUTHENTICATION) && (value_convert <= PARM_MAX_AUTHENTICATION))
701 lp->authentication = value_convert; 656 lp->authentication = value_convert;
702 } else { 657 else
703 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_AUTHENTICATION ); 658 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_AUTHENTICATION);
704 } 659 } else if (strcmp(key, PARM_NAME_OWN_ATIM_WINDOW) == 0) {
705 } 660 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_ATIM_WINDOW, value);
706 else if ( strcmp( key, PARM_NAME_OWN_ATIM_WINDOW ) == 0 ) {
707 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_ATIM_WINDOW, value );
708 661
709 value_convert = simple_strtoul(value, NULL, 0); 662 value_convert = simple_strtoul(value, NULL, 0);
710 if (( value_convert >= PARM_MIN_OWN_ATIM_WINDOW ) && ( value_convert <= PARM_MAX_OWN_ATIM_WINDOW )) { 663 if ((value_convert >= PARM_MIN_OWN_ATIM_WINDOW) && (value_convert <= PARM_MAX_OWN_ATIM_WINDOW))
711 lp->atimWindow = value_convert; 664 lp->atimWindow = value_convert;
712 } else { 665 else
713 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_ATIM_WINDOW ); 666 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_ATIM_WINDOW);
714 } 667 } else if (strcmp(key, PARM_NAME_PM_HOLDOVER_DURATION) == 0) {
715 } 668 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_PM_HOLDOVER_DURATION, value);
716 else if ( strcmp( key, PARM_NAME_PM_HOLDOVER_DURATION ) == 0 ) {
717 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PM_HOLDOVER_DURATION, value );
718 669
719 value_convert = simple_strtoul(value, NULL, 0); 670 value_convert = simple_strtoul(value, NULL, 0);
720 if (( value_convert >= PARM_MIN_PM_HOLDOVER_DURATION ) && ( value_convert <= PARM_MAX_PM_HOLDOVER_DURATION )) { 671 if ((value_convert >= PARM_MIN_PM_HOLDOVER_DURATION) && (value_convert <= PARM_MAX_PM_HOLDOVER_DURATION))
721 lp->holdoverDuration = value_convert; 672 lp->holdoverDuration = value_convert;
722 } else { 673 else
723 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_PM_HOLDOVER_DURATION ); 674 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_PM_HOLDOVER_DURATION);
724 } 675 } else if (strcmp(key, PARM_NAME_PROMISCUOUS_MODE) == 0) {
725 } 676 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_PROMISCUOUS_MODE, value);
726 else if ( strcmp( key, PARM_NAME_PROMISCUOUS_MODE ) == 0 ) {
727 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_PROMISCUOUS_MODE, value );
728 lp->promiscuousMode = parse_yes_no(value); 677 lp->promiscuousMode = parse_yes_no(value);
729 } 678 } else if (strcmp(key, PARM_NAME_CONNECTION_CONTROL) == 0) {
730 else if ( strcmp( key, PARM_NAME_CONNECTION_CONTROL ) == 0 ) { 679 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_CONNECTION_CONTROL, value);
731 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_CONNECTION_CONTROL, value );
732 680
733 value_convert = simple_strtoul(value, NULL, 0); 681 value_convert = simple_strtoul(value, NULL, 0);
734 if (( value_convert >= PARM_MIN_CONNECTION_CONTROL ) && ( value_convert <= PARM_MAX_CONNECTION_CONTROL )) { 682 if ((value_convert >= PARM_MIN_CONNECTION_CONTROL) && (value_convert <= PARM_MAX_CONNECTION_CONTROL))
735 lp->connectionControl = value_convert; 683 lp->connectionControl = value_convert;
736 } else { 684 else
737 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_CONNECTION_CONTROL ); 685 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_CONNECTION_CONTROL);
738 }
739 } 686 }
740 687
741 /* Need to add? : Probe Data Rate */ 688 /* Need to add? : Probe Data Rate */
@@ -743,237 +690,193 @@ void translate_option( char *buffer, struct wl_private *lp )
743#endif /* (HCF_TYPE) & HCF_TYPE_STA */ 690#endif /* (HCF_TYPE) & HCF_TYPE_STA */
744 691
745 /* Configuration parameters specific to AP mode */ 692 /* Configuration parameters specific to AP mode */
746#if 1 //;? (HCF_TYPE) & HCF_TYPE_AP 693#if 1 /* ;? (HCF_TYPE) & HCF_TYPE_AP */
747 //;?should we restore this to allow smaller memory footprint 694 /* ;?should we restore this to allow smaller memory footprint */
748 if ( CNV_INT_TO_LITTLE( lp->hcfCtx.IFB_FWIdentity.comp_id ) == COMP_ID_FW_AP ) { 695 if (CNV_INT_TO_LITTLE(lp->hcfCtx.IFB_FWIdentity.comp_id) == COMP_ID_FW_AP) {
749 if ( strcmp( key, PARM_NAME_OWN_DTIM_PERIOD ) == 0 ) { 696 if (strcmp(key, PARM_NAME_OWN_DTIM_PERIOD) == 0) {
750 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_DTIM_PERIOD, value ); 697 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_DTIM_PERIOD, value);
751 698
752 value_convert = simple_strtoul(value, NULL, 0); 699 value_convert = simple_strtoul(value, NULL, 0);
753 if ( value_convert >= PARM_MIN_OWN_DTIM_PERIOD ) { 700 if (value_convert >= PARM_MIN_OWN_DTIM_PERIOD)
754 lp->DTIMPeriod = value_convert; 701 lp->DTIMPeriod = value_convert;
755 } else { 702 else
756 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_DTIM_PERIOD ); 703 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_DTIM_PERIOD);
757 } 704 } else if (strcmp(key, PARM_NAME_REJECT_ANY) == 0) {
758 } 705 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_REJECT_ANY, value);
759 else if ( strcmp( key, PARM_NAME_REJECT_ANY ) == 0 ) {
760 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_REJECT_ANY, value );
761 lp->RejectAny = parse_yes_no(value); 706 lp->RejectAny = parse_yes_no(value);
762 } 707 } else if (strcmp(key, PARM_NAME_EXCLUDE_UNENCRYPTED) == 0) {
763 else if ( strcmp( key, PARM_NAME_EXCLUDE_UNENCRYPTED ) == 0 ) { 708 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_EXCLUDE_UNENCRYPTED, value);
764 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_EXCLUDE_UNENCRYPTED, value );
765 lp->ExcludeUnencrypted = parse_yes_no(value); 709 lp->ExcludeUnencrypted = parse_yes_no(value);
766 } 710 } else if (strcmp(key, PARM_NAME_MULTICAST_PM_BUFFERING) == 0) {
767 else if ( strcmp( key, PARM_NAME_MULTICAST_PM_BUFFERING ) == 0 ) { 711 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_PM_BUFFERING, value);
768 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_MULTICAST_PM_BUFFERING, value );
769 lp->ExcludeUnencrypted = parse_yes_no(value); 712 lp->ExcludeUnencrypted = parse_yes_no(value);
770 } 713 } else if (strcmp(key, PARM_NAME_INTRA_BSS_RELAY) == 0) {
771 else if ( strcmp( key, PARM_NAME_INTRA_BSS_RELAY ) == 0 ) { 714 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_INTRA_BSS_RELAY, value);
772 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_INTRA_BSS_RELAY, value );
773 lp->ExcludeUnencrypted = parse_yes_no(value); 715 lp->ExcludeUnencrypted = parse_yes_no(value);
774 } 716 } else if (strcmp(key, PARM_NAME_OWN_BEACON_INTERVAL) == 0) {
775 else if ( strcmp( key, PARM_NAME_OWN_BEACON_INTERVAL ) == 0 ) { 717 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_BEACON_INTERVAL, value);
776 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_OWN_BEACON_INTERVAL, value );
777 718
778 value_convert = simple_strtoul(value, NULL, 0); 719 value_convert = simple_strtoul(value, NULL, 0);
779 if ( value_convert >= PARM_MIN_OWN_BEACON_INTERVAL ) { 720 if (value_convert >= PARM_MIN_OWN_BEACON_INTERVAL)
780 lp->ownBeaconInterval = value_convert; 721 lp->ownBeaconInterval = value_convert;
781 } else { 722 else
782 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_BEACON_INTERVAL ); 723 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_OWN_BEACON_INTERVAL);
783 } 724 } else if (strcmp(key, PARM_NAME_COEXISTENCE) == 0) {
784 } 725 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_COEXISTENCE, value);
785 else if ( strcmp( key, PARM_NAME_COEXISTENCE ) == 0 ) {
786 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_COEXISTENCE, value );
787 726
788 value_convert = simple_strtoul(value, NULL, 0); 727 value_convert = simple_strtoul(value, NULL, 0);
789 if ( value_convert >= PARM_MIN_COEXISTENCE ) { 728 if (value_convert >= PARM_MIN_COEXISTENCE)
790 lp->coexistence = value_convert; 729 lp->coexistence = value_convert;
791 } else { 730 else
792 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_COEXISTENCE ); 731 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_COEXISTENCE);
793 }
794 } 732 }
795 733
796#ifdef USE_WDS 734#ifdef USE_WDS
797 else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD1 ) == 0 ) { 735 else if (strcmp(key, PARM_NAME_RTS_THRESHOLD1) == 0) {
798 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD1, value ); 736 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD1, value);
799 737
800 value_convert = simple_strtoul(value, NULL, 0); 738 value_convert = simple_strtoul(value, NULL, 0);
801 if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { 739 if ((value_convert >= PARM_MIN_RTS_THRESHOLD) && (value_convert <= PARM_MAX_RTS_THRESHOLD))
802 lp->wds_port[0].rtsThreshold = value_convert; 740 lp->wds_port[0].rtsThreshold = value_convert;
803 } else { 741 else
804 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD1 ); 742 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD1);
805 } 743 } else if (strcmp(key, PARM_NAME_RTS_THRESHOLD2) == 0) {
806 } 744 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD2, value);
807 else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD2 ) == 0 ) {
808 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD2, value );
809 745
810 value_convert = simple_strtoul(value, NULL, 0); 746 value_convert = simple_strtoul(value, NULL, 0);
811 if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { 747 if ((value_convert >= PARM_MIN_RTS_THRESHOLD) && (value_convert <= PARM_MAX_RTS_THRESHOLD))
812 lp->wds_port[1].rtsThreshold = value_convert; 748 lp->wds_port[1].rtsThreshold = value_convert;
813 } else { 749 else
814 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD2 ); 750 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD2);
815 } 751 } else if (strcmp(key, PARM_NAME_RTS_THRESHOLD3) == 0) {
816 } 752 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD3, value);
817 else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD3 ) == 0 ) {
818 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD3, value );
819 753
820 value_convert = simple_strtoul(value, NULL, 0); 754 value_convert = simple_strtoul(value, NULL, 0);
821 if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { 755 if ((value_convert >= PARM_MIN_RTS_THRESHOLD) && (value_convert <= PARM_MAX_RTS_THRESHOLD))
822 lp->wds_port[2].rtsThreshold = value_convert; 756 lp->wds_port[2].rtsThreshold = value_convert;
823 } else { 757 else
824 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD3 ); 758 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD3);
825 } 759 } else if (strcmp(key, PARM_NAME_RTS_THRESHOLD4) == 0) {
826 } 760 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD4, value);
827 else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD4 ) == 0 ) {
828 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD4, value );
829 761
830 value_convert = simple_strtoul(value, NULL, 0); 762 value_convert = simple_strtoul(value, NULL, 0);
831 if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { 763 if ((value_convert >= PARM_MIN_RTS_THRESHOLD) && (value_convert <= PARM_MAX_RTS_THRESHOLD))
832 lp->wds_port[3].rtsThreshold = value_convert; 764 lp->wds_port[3].rtsThreshold = value_convert;
833 } else { 765 else
834 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD4 ); 766 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD4);
835 } 767 } else if (strcmp(key, PARM_NAME_RTS_THRESHOLD5) == 0) {
836 } 768 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD5, value);
837 else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD5 ) == 0 ) {
838 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD5, value );
839 769
840 value_convert = simple_strtoul(value, NULL, 0); 770 value_convert = simple_strtoul(value, NULL, 0);
841 if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { 771 if ((value_convert >= PARM_MIN_RTS_THRESHOLD) && (value_convert <= PARM_MAX_RTS_THRESHOLD))
842 lp->wds_port[4].rtsThreshold = value_convert; 772 lp->wds_port[4].rtsThreshold = value_convert;
843 } else { 773 else
844 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD5 ); 774 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD5);
845 } 775 } else if (strcmp(key, PARM_NAME_RTS_THRESHOLD6) == 0) {
846 } 776 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD6, value);
847 else if ( strcmp( key, PARM_NAME_RTS_THRESHOLD6 ) == 0 ) {
848 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_RTS_THRESHOLD6, value );
849 777
850 value_convert = simple_strtoul(value, NULL, 0); 778 value_convert = simple_strtoul(value, NULL, 0);
851 if (( value_convert >= PARM_MIN_RTS_THRESHOLD ) && ( value_convert <= PARM_MAX_RTS_THRESHOLD )) { 779 if ((value_convert >= PARM_MIN_RTS_THRESHOLD) && (value_convert <= PARM_MAX_RTS_THRESHOLD))
852 lp->wds_port[5].rtsThreshold = value_convert; 780 lp->wds_port[5].rtsThreshold = value_convert;
853 } else { 781 else
854 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD6 ); 782 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_RTS_THRESHOLD6);
855 } 783 } else if (strcmp(key, PARM_NAME_TX_RATE1) == 0) {
856 } 784 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE1, value);
857 else if ( strcmp( key, PARM_NAME_TX_RATE1 ) == 0 ) {
858 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE1, value );
859 785
860 value_convert = simple_strtoul(value, NULL, 0); 786 value_convert = simple_strtoul(value, NULL, 0);
861 if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { 787 if ((value_convert >= PARM_MIN_TX_RATE) && (value_convert <= PARM_MAX_TX_RATE))
862 lp->wds_port[0].txRateCntl = value_convert; 788 lp->wds_port[0].txRateCntl = value_convert;
863 } else { 789 else
864 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE1 ); 790 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE1);
865 } 791 } else if (strcmp(key, PARM_NAME_TX_RATE2) == 0) {
866 } 792 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE2, value);
867 else if ( strcmp( key, PARM_NAME_TX_RATE2 ) == 0 ) {
868 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE2, value );
869 793
870 value_convert = simple_strtoul(value, NULL, 0); 794 value_convert = simple_strtoul(value, NULL, 0);
871 if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { 795 if ((value_convert >= PARM_MIN_TX_RATE) && (value_convert <= PARM_MAX_TX_RATE))
872 lp->wds_port[1].txRateCntl = value_convert; 796 lp->wds_port[1].txRateCntl = value_convert;
873 } else { 797 else
874 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE2 ); 798 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE2);
875 } 799 } else if (strcmp(key, PARM_NAME_TX_RATE3) == 0) {
876 } 800 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE3, value);
877 else if ( strcmp( key, PARM_NAME_TX_RATE3 ) == 0 ) {
878 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE3, value );
879 801
880 value_convert = simple_strtoul(value, NULL, 0); 802 value_convert = simple_strtoul(value, NULL, 0);
881 if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { 803 if ((value_convert >= PARM_MIN_TX_RATE) && (value_convert <= PARM_MAX_TX_RATE))
882 lp->wds_port[2].txRateCntl = value_convert; 804 lp->wds_port[2].txRateCntl = value_convert;
883 } else { 805 else
884 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE3 ); 806 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE3);
885 } 807 } else if (strcmp(key, PARM_NAME_TX_RATE4) == 0) {
886 } 808 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE4, value);
887 else if ( strcmp( key, PARM_NAME_TX_RATE4 ) == 0 ) {
888 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE4, value );
889 809
890 value_convert = simple_strtoul(value, NULL, 0); 810 value_convert = simple_strtoul(value, NULL, 0);
891 if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { 811 if ((value_convert >= PARM_MIN_TX_RATE) && (value_convert <= PARM_MAX_TX_RATE))
892 lp->wds_port[3].txRateCntl = value_convert; 812 lp->wds_port[3].txRateCntl = value_convert;
893 } else { 813 else
894 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE4 ); 814 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE4);
895 } 815 } else if (strcmp(key, PARM_NAME_TX_RATE5) == 0) {
896 } 816 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE5, value);
897 else if ( strcmp( key, PARM_NAME_TX_RATE5 ) == 0 ) {
898 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE5, value );
899 817
900 value_convert = simple_strtoul(value, NULL, 0); 818 value_convert = simple_strtoul(value, NULL, 0);
901 if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { 819 if ((value_convert >= PARM_MIN_TX_RATE) && (value_convert <= PARM_MAX_TX_RATE))
902 lp->wds_port[4].txRateCntl = value_convert; 820 lp->wds_port[4].txRateCntl = value_convert;
903 } else { 821 else
904 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE5 ); 822 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE5);
905 } 823 } else if (strcmp(key, PARM_NAME_TX_RATE6) == 0) {
906 } 824 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE6, value);
907 else if ( strcmp( key, PARM_NAME_TX_RATE6 ) == 0 ) {
908 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_TX_RATE6, value );
909 825
910 value_convert = simple_strtoul(value, NULL, 0); 826 value_convert = simple_strtoul(value, NULL, 0);
911 if (( value_convert >= PARM_MIN_TX_RATE ) && ( value_convert <= PARM_MAX_TX_RATE )) { 827 if ((value_convert >= PARM_MIN_TX_RATE) && (value_convert <= PARM_MAX_TX_RATE))
912 lp->wds_port[5].txRateCntl = value_convert; 828 lp->wds_port[5].txRateCntl = value_convert;
913 } else { 829 else
914 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE6 ); 830 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_TX_RATE6);
915 } 831 } else if (strcmp(key, PARM_NAME_WDS_ADDRESS1) == 0) {
916 } 832 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS1, value);
917 else if ( strcmp( key, PARM_NAME_WDS_ADDRESS1 ) == 0 ) { 833
918 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS1, value ); 834 if (parse_mac_address(value, mac_value) == ETH_ALEN)
919 835 memcpy(lp->wds_port[0].wdsAddress, mac_value, ETH_ALEN);
920 if ( parse_mac_address( value, mac_value ) == ETH_ALEN ) { 836 else
921 memcpy( lp->wds_port[0].wdsAddress, mac_value, ETH_ALEN ); 837 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS1);
922 } else { 838 } else if (strcmp(key, PARM_NAME_WDS_ADDRESS2) == 0) {
923 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS1 ); 839 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS2, value);
924 } 840
925 } 841 if (parse_mac_address(value, mac_value) == ETH_ALEN)
926 else if ( strcmp( key, PARM_NAME_WDS_ADDRESS2 ) == 0 ) { 842 memcpy(lp->wds_port[1].wdsAddress, mac_value, ETH_ALEN);
927 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS2, value ); 843 else
928 844 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS2);
929 if ( parse_mac_address( value, mac_value ) == ETH_ALEN ) { 845 } else if (strcmp(key, PARM_NAME_WDS_ADDRESS3) == 0) {
930 memcpy( lp->wds_port[1].wdsAddress, mac_value, ETH_ALEN ); 846 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS3, value);
931 } else { 847
932 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS2 ); 848 if (parse_mac_address(value, mac_value) == ETH_ALEN)
933 } 849 memcpy(lp->wds_port[2].wdsAddress, mac_value, ETH_ALEN);
934 } 850 else
935 else if ( strcmp( key, PARM_NAME_WDS_ADDRESS3 ) == 0 ) { 851 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS3);
936 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS3, value ); 852 } else if (strcmp(key, PARM_NAME_WDS_ADDRESS4) == 0) {
937 853 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS4, value);
938 if ( parse_mac_address( value, mac_value ) == ETH_ALEN ) { 854
939 memcpy( lp->wds_port[2].wdsAddress, mac_value, ETH_ALEN ); 855 if (parse_mac_address(value, mac_value) == ETH_ALEN)
940 } else { 856 memcpy(lp->wds_port[3].wdsAddress, mac_value, ETH_ALEN);
941 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS3 ); 857 else
942 } 858 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS4);
943 } 859 } else if (strcmp(key, PARM_NAME_WDS_ADDRESS5) == 0) {
944 else if ( strcmp( key, PARM_NAME_WDS_ADDRESS4 ) == 0 ) { 860 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS5, value);
945 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS4, value ); 861
946 862 if (parse_mac_address(value, mac_value) == ETH_ALEN)
947 if ( parse_mac_address( value, mac_value ) == ETH_ALEN ) { 863 memcpy(lp->wds_port[4].wdsAddress, mac_value, ETH_ALEN);
948 memcpy( lp->wds_port[3].wdsAddress, mac_value, ETH_ALEN ); 864 else
949 } else { 865 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS5);
950 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS4 ); 866 } else if (strcmp(key, PARM_NAME_WDS_ADDRESS6) == 0) {
951 } 867 DBG_TRACE(DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS6, value);
952 } 868
953 else if ( strcmp( key, PARM_NAME_WDS_ADDRESS5 ) == 0 ) { 869 if (parse_mac_address(value, mac_value) == ETH_ALEN)
954 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS5, value ); 870 memcpy(lp->wds_port[5].wdsAddress, mac_value, ETH_ALEN);
955 871 else
956 if ( parse_mac_address( value, mac_value ) == ETH_ALEN ) { 872 DBG_WARNING(DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS6);
957 memcpy( lp->wds_port[4].wdsAddress, mac_value, ETH_ALEN );
958 } else {
959 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS5 );
960 }
961 }
962 else if ( strcmp( key, PARM_NAME_WDS_ADDRESS6 ) == 0 ) {
963 DBG_TRACE( DbgInfo, "%s, value: %s\n", PARM_NAME_WDS_ADDRESS6, value );
964
965 if ( parse_mac_address( value, mac_value ) == ETH_ALEN ) {
966 memcpy( lp->wds_port[5].wdsAddress, mac_value, ETH_ALEN );
967 } else {
968 DBG_WARNING( DbgInfo, "%s invalid; will be ignored\n", PARM_NAME_WDS_ADDRESS6 );
969 }
970 } 873 }
971#endif /* USE_WDS */ 874#endif /* USE_WDS */
972 } 875 }
973#endif /* (HCF_TYPE) & HCF_TYPE_AP */ 876#endif /* (HCF_TYPE) & HCF_TYPE_AP */
974 877
975 return; 878 return;
976} // translate_option 879} /* translate_option */
977/*============================================================================*/ 880/*============================================================================*/
978 881
979/******************************************************************************* 882/*******************************************************************************
@@ -996,7 +899,7 @@ void translate_option( char *buffer, struct wl_private *lp )
996 * The number of bytes in the final MAC address, should equal to ETH_ALEN. 899 * The number of bytes in the final MAC address, should equal to ETH_ALEN.
997 * 900 *
998 ******************************************************************************/ 901 ******************************************************************************/
999int parse_mac_address( char *value, u_char *byte_array ) 902int parse_mac_address(char *value, u_char *byte_array)
1000{ 903{
1001 int value_offset = 0; 904 int value_offset = 0;
1002 int array_offset = 0; 905 int array_offset = 0;
@@ -1004,11 +907,11 @@ int parse_mac_address( char *value, u_char *byte_array )
1004 char byte_field[3]; 907 char byte_field[3];
1005 /*------------------------------------------------------------------------*/ 908 /*------------------------------------------------------------------------*/
1006 909
1007 memset( byte_field, '\0', 3 ); 910 memset(byte_field, '\0', 3);
1008 911
1009 while( value[value_offset] != '\0' ) { 912 while (value[value_offset] != '\0') {
1010 /* Skip over the colon chars seperating the bytes, if they exist */ 913 /* Skip over the colon chars seperating the bytes, if they exist */
1011 if ( value[value_offset] == ':' ) { 914 if (value[value_offset] == ':') {
1012 value_offset++; 915 value_offset++;
1013 continue; 916 continue;
1014 } 917 }
@@ -1018,9 +921,9 @@ int parse_mac_address( char *value, u_char *byte_array )
1018 value_offset++; 921 value_offset++;
1019 922
1020 /* Once the byte_field is filled, convert it and store it */ 923 /* Once the byte_field is filled, convert it and store it */
1021 if ( field_offset == 2 ) { 924 if (field_offset == 2) {
1022 byte_field[field_offset] = '\0'; 925 byte_field[field_offset] = '\0';
1023 byte_array[array_offset] = simple_strtoul( byte_field, NULL, 16 ); 926 byte_array[array_offset] = simple_strtoul(byte_field, NULL, 16);
1024 field_offset = 0; 927 field_offset = 0;
1025 array_offset++; 928 array_offset++;
1026 } 929 }
@@ -1029,7 +932,7 @@ int parse_mac_address( char *value, u_char *byte_array )
1029 /* Use the array_offset as a check; 6 bytes should be written to the 932 /* Use the array_offset as a check; 6 bytes should be written to the
1030 byte_array */ 933 byte_array */
1031 return array_offset; 934 return array_offset;
1032} // parse_mac_address 935} /* parse_mac_address */
1033/*============================================================================*/ 936/*============================================================================*/
1034 937
1035/******************************************************************************* 938/*******************************************************************************
@@ -1052,42 +955,42 @@ int parse_mac_address( char *value, u_char *byte_array )
1052 * N/A 955 * N/A
1053 * 956 *
1054 ******************************************************************************/ 957 ******************************************************************************/
1055void ParseConfigLine( char *pszLine, char **ppszLVal, char **ppszRVal ) 958void ParseConfigLine(char *pszLine, char **ppszLVal, char **ppszRVal)
1056{ 959{
1057 int i; 960 int i;
1058 int size; 961 int size;
1059 /*------------------------------------------------------------------------*/ 962 /*------------------------------------------------------------------------*/
1060 963
1061 DBG_FUNC( "ParseConfigLine" ); 964 DBG_FUNC("ParseConfigLine");
1062 DBG_ENTER( DbgInfo ); 965 DBG_ENTER(DbgInfo);
1063 966
1064 /* get a snapshot of our string size */ 967 /* get a snapshot of our string size */
1065 size = strlen( pszLine ); 968 size = strlen(pszLine);
1066 *ppszLVal = NULL; 969 *ppszLVal = NULL;
1067 *ppszRVal = NULL; 970 *ppszRVal = NULL;
1068 971
1069 if ( pszLine[0] != '#' && /* skip the line if it is a comment */ 972 if (pszLine[0] != '#' && /* skip the line if it is a comment */
1070 pszLine[0] != '\n'&& /* if it's an empty UNIX line, do nothing */ 973 pszLine[0] != '\n' && /* if it's an empty UNIX line, do nothing */
1071 !( pszLine[0] == '\r' && pszLine[1] == '\n' ) /* if it's an empty MS-DOS line, do nothing */ 974 !(pszLine[0] == '\r' && pszLine[1] == '\n') /* if it's an empty MS-DOS line, do nothing */
1072 ) { 975 ) {
1073 /* advance past any whitespace, and assign the L-value */ 976 /* advance past any whitespace, and assign the L-value */
1074 for( i = 0; i < size; i++ ) { 977 for (i = 0; i < size; i++) {
1075 if ( pszLine[i] != ' ' ) { 978 if (pszLine[i] != ' ') {
1076 *ppszLVal = &pszLine[i]; 979 *ppszLVal = &pszLine[i];
1077 break; 980 break;
1078 } 981 }
1079 } 982 }
1080 /* advance to the end of the l-value*/ 983 /* advance to the end of the l-value*/
1081 for( i++; i < size; i++ ) { 984 for (i++; i < size; i++) {
1082 if ( pszLine[i] == ' ' || pszLine[i] == '=' ) { 985 if (pszLine[i] == ' ' || pszLine[i] == '=') {
1083 pszLine[i] = '\0'; 986 pszLine[i] = '\0';
1084 break; 987 break;
1085 } 988 }
1086 } 989 }
1087 /* make any whitespace and the equal sign a NULL character, and 990 /* make any whitespace and the equal sign a NULL character, and
1088 advance to the R-Value */ 991 advance to the R-Value */
1089 for( i++; i < size; i++ ) { 992 for (i++; i < size; i++) {
1090 if ( pszLine[i] == ' ' || pszLine[i] == '=' ) { 993 if (pszLine[i] == ' ' || pszLine[i] == '=') {
1091 pszLine[i] = '\0'; 994 pszLine[i] = '\0';
1092 continue; 995 continue;
1093 } 996 }
@@ -1095,17 +998,15 @@ void ParseConfigLine( char *pszLine, char **ppszLVal, char **ppszRVal )
1095 break; 998 break;
1096 } 999 }
1097 /* make the line ending character(s) a NULL */ 1000 /* make the line ending character(s) a NULL */
1098 for( i++; i < size; i++ ) { 1001 for (i++; i < size; i++) {
1099 if ( pszLine[i] == '\n' ) { 1002 if (pszLine[i] == '\n')
1100 pszLine[i] = '\0'; 1003 pszLine[i] = '\0';
1101 } 1004 if ((pszLine[i] == '\r') && (pszLine[i+1] == '\n'))
1102 if (( pszLine[i] == '\r' ) && ( pszLine[i+1] == '\n' )) {
1103 pszLine[i] = '\0'; 1005 pszLine[i] = '\0';
1104 }
1105 } 1006 }
1106 } 1007 }
1107 DBG_LEAVE( DbgInfo ); 1008 DBG_LEAVE(DbgInfo);
1108} // ParseConfigLine 1009} /* ParseConfigLine */
1109/*============================================================================*/ 1010/*============================================================================*/
1110 1011
1111#endif // USE_PROFILE 1012#endif /* USE_PROFILE */
diff --git a/drivers/staging/wlags49_h2/wl_sysfs.c b/drivers/staging/wlags49_h2/wl_sysfs.c
index 864e01a736c8..e4c8804ac37d 100644
--- a/drivers/staging/wlags49_h2/wl_sysfs.c
+++ b/drivers/staging/wlags49_h2/wl_sysfs.c
@@ -46,7 +46,8 @@ static ssize_t show_tallies(struct device *d, struct device_attribute *attr,
46 if (dev_isalive(dev)) { 46 if (dev_isalive(dev)) {
47 wl_lock(lp, &flags); 47 wl_lock(lp, &flags);
48 48
49 if ((ret = wl_get_tallies(lp, &tallies)) == 0) { 49 ret = wl_get_tallies(lp, &tallies);
50 if (ret == 0) {
50 wl_unlock(lp, &flags); 51 wl_unlock(lp, &flags);
51 ret = snprintf(buf, PAGE_SIZE, 52 ret = snprintf(buf, PAGE_SIZE,
52 "TxUnicastFrames: %u\n" 53 "TxUnicastFrames: %u\n"
diff --git a/drivers/staging/wlags49_h2/wl_wext.c b/drivers/staging/wlags49_h2/wl_wext.c
index 4434e0065488..06467f1bf901 100644
--- a/drivers/staging/wlags49_h2/wl_wext.c
+++ b/drivers/staging/wlags49_h2/wl_wext.c
@@ -82,17 +82,10 @@
82 in the build. */ 82 in the build. */
83#ifdef WIRELESS_EXT 83#ifdef WIRELESS_EXT
84 84
85#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
86#define IWE_STREAM_ADD_EVENT(info, buf, end, iwe, len) \
87 iwe_stream_add_event(buf, end, iwe, len)
88#define IWE_STREAM_ADD_POINT(info, buf, end, iwe, msg) \
89 iwe_stream_add_point(buf, end, iwe, msg)
90#else
91#define IWE_STREAM_ADD_EVENT(info, buf, end, iwe, len) \ 85#define IWE_STREAM_ADD_EVENT(info, buf, end, iwe, len) \
92 iwe_stream_add_event(info, buf, end, iwe, len) 86 iwe_stream_add_event(info, buf, end, iwe, len)
93#define IWE_STREAM_ADD_POINT(info, buf, end, iwe, msg) \ 87#define IWE_STREAM_ADD_POINT(info, buf, end, iwe, msg) \
94 iwe_stream_add_point(info, buf, end, iwe, msg) 88 iwe_stream_add_point(info, buf, end, iwe, msg)
95#endif
96 89
97 90
98 91
@@ -3940,7 +3933,7 @@ void wl_wext_event_mic_failed( struct net_device *dev )
3940 MLME-MICHAELMICFAILURE.indication(keyid=# broadcast/unicast addr=addr2) 3933 MLME-MICHAELMICFAILURE.indication(keyid=# broadcast/unicast addr=addr2)
3941 */ 3934 */
3942 3935
3943 /* NOTE: Format of MAC address (using colons to seperate bytes) may cause 3936 /* NOTE: Format of MAC address (using colons to separate bytes) may cause
3944 a problem in future versions of the supplicant, if they ever 3937 a problem in future versions of the supplicant, if they ever
3945 actually parse these parameters */ 3938 actually parse these parameters */
3946#if DBG 3939#if DBG
diff --git a/drivers/staging/wlags49_h25/Kconfig b/drivers/staging/wlags49_h25/Kconfig
index 304a8c96ce33..dcc170929c13 100644
--- a/drivers/staging/wlags49_h25/Kconfig
+++ b/drivers/staging/wlags49_h25/Kconfig
@@ -1,6 +1,6 @@
1config WLAGS49_H25 1config WLAGS49_H25
2 tristate "Linksys HERMES II.5 WCF54G_Wireless-G_CompactFlash_Card" 2 tristate "Linksys HERMES II.5 WCF54G_Wireless-G_CompactFlash_Card"
3 depends on WLAN_80211 && WIRELESS_EXT && PCMCIA 3 depends on WLAN && WIRELESS_EXT && PCMCIA
4 select WEXT_SPY 4 select WEXT_SPY
5 ---help--- 5 ---help---
6 Driver for wireless cards using Agere's HERMES II.5 chipset 6 Driver for wireless cards using Agere's HERMES II.5 chipset
diff --git a/drivers/staging/wlan-ng/hfa384x_usb.c b/drivers/staging/wlan-ng/hfa384x_usb.c
index 5df56f0238d6..a41db5dc8c7c 100644
--- a/drivers/staging/wlan-ng/hfa384x_usb.c
+++ b/drivers/staging/wlan-ng/hfa384x_usb.c
@@ -62,9 +62,9 @@
62* 62*
63* hfa384x_drvr_xxxconfig An example of the drvr level abstraction. These 63* hfa384x_drvr_xxxconfig An example of the drvr level abstraction. These
64* functions are wrappers for the RID get/set 64* functions are wrappers for the RID get/set
65* sequence. They call copy_[to|from]_bap() and 65* sequence. They call copy_[to|from]_bap() and
66* cmd_access(). These functions operate on the 66* cmd_access(). These functions operate on the
67* RIDs and buffers without validation. The caller 67* RIDs and buffers without validation. The caller
68* is responsible for that. 68* is responsible for that.
69* 69*
70* API wrapper functions: 70* API wrapper functions:
@@ -144,7 +144,6 @@ enum cmd_mode {
144 DOWAIT = 0, 144 DOWAIT = 0,
145 DOASYNC 145 DOASYNC
146}; 146};
147typedef enum cmd_mode CMD_MODE;
148 147
149#define THROTTLE_JIFFIES (HZ/8) 148#define THROTTLE_JIFFIES (HZ/8)
150#define URB_ASYNC_UNLINK 0 149#define URB_ASYNC_UNLINK 0
@@ -206,12 +205,11 @@ static void unlocked_usbctlx_complete(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx);
206struct usbctlx_completor { 205struct usbctlx_completor {
207 int (*complete) (struct usbctlx_completor *); 206 int (*complete) (struct usbctlx_completor *);
208}; 207};
209typedef struct usbctlx_completor usbctlx_completor_t;
210 208
211static int 209static int
212hfa384x_usbctlx_complete_sync(hfa384x_t *hw, 210hfa384x_usbctlx_complete_sync(hfa384x_t *hw,
213 hfa384x_usbctlx_t *ctlx, 211 hfa384x_usbctlx_t *ctlx,
214 usbctlx_completor_t *completor); 212 struct usbctlx_completor *completor);
215 213
216static int 214static int
217unlocked_usbctlx_cancel_async(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx); 215unlocked_usbctlx_cancel_async(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx);
@@ -232,13 +230,13 @@ usbctlx_get_rridresult(const hfa384x_usb_rridresp_t *rridresp,
232/* Low level req/resp CTLX formatters and submitters */ 230/* Low level req/resp CTLX formatters and submitters */
233static int 231static int
234hfa384x_docmd(hfa384x_t *hw, 232hfa384x_docmd(hfa384x_t *hw,
235 CMD_MODE mode, 233 enum cmd_mode mode,
236 hfa384x_metacmd_t *cmd, 234 hfa384x_metacmd_t *cmd,
237 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); 235 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data);
238 236
239static int 237static int
240hfa384x_dorrid(hfa384x_t *hw, 238hfa384x_dorrid(hfa384x_t *hw,
241 CMD_MODE mode, 239 enum cmd_mode mode,
242 u16 rid, 240 u16 rid,
243 void *riddata, 241 void *riddata,
244 unsigned int riddatalen, 242 unsigned int riddatalen,
@@ -246,7 +244,7 @@ hfa384x_dorrid(hfa384x_t *hw,
246 244
247static int 245static int
248hfa384x_dowrid(hfa384x_t *hw, 246hfa384x_dowrid(hfa384x_t *hw,
249 CMD_MODE mode, 247 enum cmd_mode mode,
250 u16 rid, 248 u16 rid,
251 void *riddata, 249 void *riddata,
252 unsigned int riddatalen, 250 unsigned int riddatalen,
@@ -254,7 +252,7 @@ hfa384x_dowrid(hfa384x_t *hw,
254 252
255static int 253static int
256hfa384x_dormem(hfa384x_t *hw, 254hfa384x_dormem(hfa384x_t *hw,
257 CMD_MODE mode, 255 enum cmd_mode mode,
258 u16 page, 256 u16 page,
259 u16 offset, 257 u16 offset,
260 void *data, 258 void *data,
@@ -263,7 +261,7 @@ hfa384x_dormem(hfa384x_t *hw,
263 261
264static int 262static int
265hfa384x_dowmem(hfa384x_t *hw, 263hfa384x_dowmem(hfa384x_t *hw,
266 CMD_MODE mode, 264 enum cmd_mode mode,
267 u16 page, 265 u16 page,
268 u16 offset, 266 u16 offset,
269 void *data, 267 void *data,
@@ -351,7 +349,8 @@ static int submit_rx_urb(hfa384x_t *hw, gfp_t memflags)
351 hw->rx_urb_skb = skb; 349 hw->rx_urb_skb = skb;
352 350
353 result = -ENOLINK; 351 result = -ENOLINK;
354 if (!hw->wlandev->hwremoved && !test_bit(WORK_RX_HALT, &hw->usb_flags)) { 352 if (!hw->wlandev->hwremoved &&
353 !test_bit(WORK_RX_HALT, &hw->usb_flags)) {
355 result = SUBMIT_URB(&hw->rx_urb, memflags); 354 result = SUBMIT_URB(&hw->rx_urb, memflags);
356 355
357 /* Check whether we need to reset the RX pipe */ 356 /* Check whether we need to reset the RX pipe */
@@ -451,7 +450,7 @@ static void hfa384x_usb_defer(struct work_struct *data)
451 if (test_bit(WORK_RX_HALT, &hw->usb_flags)) { 450 if (test_bit(WORK_RX_HALT, &hw->usb_flags)) {
452 int ret; 451 int ret;
453 452
454 usb_kill_urb(&hw->rx_urb); /* Cannot be holding spinlock! */ 453 usb_kill_urb(&hw->rx_urb); /* Cannot be holding spinlock! */
455 454
456 ret = usb_clear_halt(hw->usb, hw->endp_in); 455 ret = usb_clear_halt(hw->usb, hw->endp_in);
457 if (ret != 0) { 456 if (ret != 0) {
@@ -668,26 +667,26 @@ usbctlx_get_rridresult(const hfa384x_usb_rridresp_t *rridresp,
668* when processing a CTLX that returns a hfa384x_cmdresult_t structure. 667* when processing a CTLX that returns a hfa384x_cmdresult_t structure.
669----------------------------------------------------------------*/ 668----------------------------------------------------------------*/
670struct usbctlx_cmd_completor { 669struct usbctlx_cmd_completor {
671 usbctlx_completor_t head; 670 struct usbctlx_completor head;
672 671
673 const hfa384x_usb_cmdresp_t *cmdresp; 672 const hfa384x_usb_cmdresp_t *cmdresp;
674 hfa384x_cmdresult_t *result; 673 hfa384x_cmdresult_t *result;
675}; 674};
676typedef struct usbctlx_cmd_completor usbctlx_cmd_completor_t;
677 675
678static int usbctlx_cmd_completor_fn(usbctlx_completor_t *head) 676static inline int usbctlx_cmd_completor_fn(struct usbctlx_completor *head)
679{ 677{
680 usbctlx_cmd_completor_t *complete = (usbctlx_cmd_completor_t *) head; 678 struct usbctlx_cmd_completor *complete;
679
680 complete = (struct usbctlx_cmd_completor *) head;
681 return usbctlx_get_status(complete->cmdresp, complete->result); 681 return usbctlx_get_status(complete->cmdresp, complete->result);
682} 682}
683 683
684static inline usbctlx_completor_t *init_cmd_completor(usbctlx_cmd_completor_t * 684static inline struct usbctlx_completor *init_cmd_completor(
685 completor, 685 struct usbctlx_cmd_completor
686 const 686 *completor,
687 hfa384x_usb_cmdresp_t * 687 const hfa384x_usb_cmdresp_t
688 cmdresp, 688 *cmdresp,
689 hfa384x_cmdresult_t * 689 hfa384x_cmdresult_t *result)
690 result)
691{ 690{
692 completor->head.complete = usbctlx_cmd_completor_fn; 691 completor->head.complete = usbctlx_cmd_completor_fn;
693 completor->cmdresp = cmdresp; 692 completor->cmdresp = cmdresp;
@@ -701,19 +700,19 @@ static inline usbctlx_completor_t *init_cmd_completor(usbctlx_cmd_completor_t *
701* when processing a CTLX that reads a RID. 700* when processing a CTLX that reads a RID.
702----------------------------------------------------------------*/ 701----------------------------------------------------------------*/
703struct usbctlx_rrid_completor { 702struct usbctlx_rrid_completor {
704 usbctlx_completor_t head; 703 struct usbctlx_completor head;
705 704
706 const hfa384x_usb_rridresp_t *rridresp; 705 const hfa384x_usb_rridresp_t *rridresp;
707 void *riddata; 706 void *riddata;
708 unsigned int riddatalen; 707 unsigned int riddatalen;
709}; 708};
710typedef struct usbctlx_rrid_completor usbctlx_rrid_completor_t;
711 709
712static int usbctlx_rrid_completor_fn(usbctlx_completor_t *head) 710static int usbctlx_rrid_completor_fn(struct usbctlx_completor *head)
713{ 711{
714 usbctlx_rrid_completor_t *complete = (usbctlx_rrid_completor_t *) head; 712 struct usbctlx_rrid_completor *complete;
715 hfa384x_rridresult_t rridresult; 713 hfa384x_rridresult_t rridresult;
716 714
715 complete = (struct usbctlx_rrid_completor *) head;
717 usbctlx_get_rridresult(complete->rridresp, &rridresult); 716 usbctlx_get_rridresult(complete->rridresp, &rridresult);
718 717
719 /* Validate the length, note body len calculation in bytes */ 718 /* Validate the length, note body len calculation in bytes */
@@ -729,12 +728,13 @@ static int usbctlx_rrid_completor_fn(usbctlx_completor_t *head)
729 return 0; 728 return 0;
730} 729}
731 730
732static inline usbctlx_completor_t *init_rrid_completor(usbctlx_rrid_completor_t 731static inline struct usbctlx_completor *init_rrid_completor(
733 *completor, 732 struct usbctlx_rrid_completor
734 const 733 *completor,
735 hfa384x_usb_rridresp_t * 734 const hfa384x_usb_rridresp_t
736 rridresp, void *riddata, 735 *rridresp,
737 unsigned int riddatalen) 736 void *riddata,
737 unsigned int riddatalen)
738{ 738{
739 completor->head.complete = usbctlx_rrid_completor_fn; 739 completor->head.complete = usbctlx_rrid_completor_fn;
740 completor->rridresp = rridresp; 740 completor->rridresp = rridresp;
@@ -747,14 +747,14 @@ static inline usbctlx_completor_t *init_rrid_completor(usbctlx_rrid_completor_t
747* Completor object: 747* Completor object:
748* Interprets the results of a synchronous RID-write 748* Interprets the results of a synchronous RID-write
749----------------------------------------------------------------*/ 749----------------------------------------------------------------*/
750typedef usbctlx_cmd_completor_t usbctlx_wrid_completor_t; 750typedef struct usbctlx_cmd_completor usbctlx_wrid_completor_t;
751#define init_wrid_completor init_cmd_completor 751#define init_wrid_completor init_cmd_completor
752 752
753/*---------------------------------------------------------------- 753/*----------------------------------------------------------------
754* Completor object: 754* Completor object:
755* Interprets the results of a synchronous memory-write 755* Interprets the results of a synchronous memory-write
756----------------------------------------------------------------*/ 756----------------------------------------------------------------*/
757typedef usbctlx_cmd_completor_t usbctlx_wmem_completor_t; 757typedef struct usbctlx_cmd_completor usbctlx_wmem_completor_t;
758#define init_wmem_completor init_cmd_completor 758#define init_wmem_completor init_cmd_completor
759 759
760/*---------------------------------------------------------------- 760/*----------------------------------------------------------------
@@ -762,7 +762,7 @@ typedef usbctlx_cmd_completor_t usbctlx_wmem_completor_t;
762* Interprets the results of a synchronous memory-read 762* Interprets the results of a synchronous memory-read
763----------------------------------------------------------------*/ 763----------------------------------------------------------------*/
764struct usbctlx_rmem_completor { 764struct usbctlx_rmem_completor {
765 usbctlx_completor_t head; 765 struct usbctlx_completor head;
766 766
767 const hfa384x_usb_rmemresp_t *rmemresp; 767 const hfa384x_usb_rmemresp_t *rmemresp;
768 void *data; 768 void *data;
@@ -770,7 +770,7 @@ struct usbctlx_rmem_completor {
770}; 770};
771typedef struct usbctlx_rmem_completor usbctlx_rmem_completor_t; 771typedef struct usbctlx_rmem_completor usbctlx_rmem_completor_t;
772 772
773static int usbctlx_rmem_completor_fn(usbctlx_completor_t *head) 773static int usbctlx_rmem_completor_fn(struct usbctlx_completor *head)
774{ 774{
775 usbctlx_rmem_completor_t *complete = (usbctlx_rmem_completor_t *) head; 775 usbctlx_rmem_completor_t *complete = (usbctlx_rmem_completor_t *) head;
776 776
@@ -779,11 +779,13 @@ static int usbctlx_rmem_completor_fn(usbctlx_completor_t *head)
779 return 0; 779 return 0;
780} 780}
781 781
782static inline usbctlx_completor_t *init_rmem_completor(usbctlx_rmem_completor_t 782static inline struct usbctlx_completor *init_rmem_completor(
783 *completor, 783 usbctlx_rmem_completor_t
784 hfa384x_usb_rmemresp_t 784 *completor,
785 *rmemresp, void *data, 785 hfa384x_usb_rmemresp_t
786 unsigned int len) 786 *rmemresp,
787 void *data,
788 unsigned int len)
787{ 789{
788 completor->head.complete = usbctlx_rmem_completor_fn; 790 completor->head.complete = usbctlx_rmem_completor_fn;
789 completor->rmemresp = rmemresp; 791 completor->rmemresp = rmemresp;
@@ -1226,7 +1228,7 @@ int hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis)
1226* 1228*
1227* Arguments: 1229* Arguments:
1228* hw device structure 1230* hw device structure
1229* ctlx CTLX ptr 1231* ctlx CTLX ptr
1230* completor functor object to decide what to 1232* completor functor object to decide what to
1231* do with the CTLX's result. 1233* do with the CTLX's result.
1232* 1234*
@@ -1244,7 +1246,7 @@ int hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis)
1244----------------------------------------------------------------*/ 1246----------------------------------------------------------------*/
1245static int hfa384x_usbctlx_complete_sync(hfa384x_t *hw, 1247static int hfa384x_usbctlx_complete_sync(hfa384x_t *hw,
1246 hfa384x_usbctlx_t *ctlx, 1248 hfa384x_usbctlx_t *ctlx,
1247 usbctlx_completor_t *completor) 1249 struct usbctlx_completor *completor)
1248{ 1250{
1249 unsigned long flags; 1251 unsigned long flags;
1250 int result; 1252 int result;
@@ -1359,7 +1361,7 @@ cleanup:
1359----------------------------------------------------------------*/ 1361----------------------------------------------------------------*/
1360static int 1362static int
1361hfa384x_docmd(hfa384x_t *hw, 1363hfa384x_docmd(hfa384x_t *hw,
1362 CMD_MODE mode, 1364 enum cmd_mode mode,
1363 hfa384x_metacmd_t *cmd, 1365 hfa384x_metacmd_t *cmd,
1364 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) 1366 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data)
1365{ 1367{
@@ -1394,7 +1396,7 @@ hfa384x_docmd(hfa384x_t *hw,
1394 if (result != 0) { 1396 if (result != 0) {
1395 kfree(ctlx); 1397 kfree(ctlx);
1396 } else if (mode == DOWAIT) { 1398 } else if (mode == DOWAIT) {
1397 usbctlx_cmd_completor_t completor; 1399 struct usbctlx_cmd_completor completor;
1398 1400
1399 result = 1401 result =
1400 hfa384x_usbctlx_complete_sync(hw, ctlx, 1402 hfa384x_usbctlx_complete_sync(hw, ctlx,
@@ -1448,7 +1450,7 @@ done:
1448----------------------------------------------------------------*/ 1450----------------------------------------------------------------*/
1449static int 1451static int
1450hfa384x_dorrid(hfa384x_t *hw, 1452hfa384x_dorrid(hfa384x_t *hw,
1451 CMD_MODE mode, 1453 enum cmd_mode mode,
1452 u16 rid, 1454 u16 rid,
1453 void *riddata, 1455 void *riddata,
1454 unsigned int riddatalen, 1456 unsigned int riddatalen,
@@ -1481,7 +1483,7 @@ hfa384x_dorrid(hfa384x_t *hw,
1481 if (result != 0) { 1483 if (result != 0) {
1482 kfree(ctlx); 1484 kfree(ctlx);
1483 } else if (mode == DOWAIT) { 1485 } else if (mode == DOWAIT) {
1484 usbctlx_rrid_completor_t completor; 1486 struct usbctlx_rrid_completor completor;
1485 1487
1486 result = 1488 result =
1487 hfa384x_usbctlx_complete_sync(hw, ctlx, 1489 hfa384x_usbctlx_complete_sync(hw, ctlx,
@@ -1506,7 +1508,7 @@ done:
1506* 1508*
1507* Arguments: 1509* Arguments:
1508* hw device structure 1510* hw device structure
1509* CMD_MODE DOWAIT or DOASYNC 1511* enum cmd_mode DOWAIT or DOASYNC
1510* rid RID code 1512* rid RID code
1511* riddata Data portion of RID formatted for MAC 1513* riddata Data portion of RID formatted for MAC
1512* riddatalen Length of the data portion in bytes 1514* riddatalen Length of the data portion in bytes
@@ -1529,7 +1531,7 @@ done:
1529----------------------------------------------------------------*/ 1531----------------------------------------------------------------*/
1530static int 1532static int
1531hfa384x_dowrid(hfa384x_t *hw, 1533hfa384x_dowrid(hfa384x_t *hw,
1532 CMD_MODE mode, 1534 enum cmd_mode mode,
1533 u16 rid, 1535 u16 rid,
1534 void *riddata, 1536 void *riddata,
1535 unsigned int riddatalen, 1537 unsigned int riddatalen,
@@ -1616,7 +1618,7 @@ done:
1616----------------------------------------------------------------*/ 1618----------------------------------------------------------------*/
1617static int 1619static int
1618hfa384x_dormem(hfa384x_t *hw, 1620hfa384x_dormem(hfa384x_t *hw,
1619 CMD_MODE mode, 1621 enum cmd_mode mode,
1620 u16 page, 1622 u16 page,
1621 u16 offset, 1623 u16 offset,
1622 void *data, 1624 void *data,
@@ -1707,7 +1709,7 @@ done:
1707----------------------------------------------------------------*/ 1709----------------------------------------------------------------*/
1708static int 1710static int
1709hfa384x_dowmem(hfa384x_t *hw, 1711hfa384x_dowmem(hfa384x_t *hw,
1710 CMD_MODE mode, 1712 enum cmd_mode mode,
1711 u16 page, 1713 u16 page,
1712 u16 offset, 1714 u16 offset,
1713 void *data, 1715 void *data,
@@ -2075,12 +2077,9 @@ int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len)
2075 (j * HFA384x_USB_RWMEM_MAXLEN); 2077 (j * HFA384x_USB_RWMEM_MAXLEN);
2076 2078
2077 writepage = HFA384x_ADDR_CMD_MKPAGE(dlbufaddr + 2079 writepage = HFA384x_ADDR_CMD_MKPAGE(dlbufaddr +
2078 (j * 2080 (j * HFA384x_USB_RWMEM_MAXLEN));
2079 HFA384x_USB_RWMEM_MAXLEN)); 2081 writeoffset = HFA384x_ADDR_CMD_MKOFF(dlbufaddr +
2080 writeoffset = 2082 (j * HFA384x_USB_RWMEM_MAXLEN));
2081 HFA384x_ADDR_CMD_MKOFF(dlbufaddr +
2082 (j *
2083 HFA384x_USB_RWMEM_MAXLEN));
2084 2083
2085 writelen = burnlen - (j * HFA384x_USB_RWMEM_MAXLEN); 2084 writelen = burnlen - (j * HFA384x_USB_RWMEM_MAXLEN);
2086 writelen = writelen > HFA384x_USB_RWMEM_MAXLEN ? 2085 writelen = writelen > HFA384x_USB_RWMEM_MAXLEN ?
@@ -2133,7 +2132,7 @@ exit_proc:
2133* 0 success 2132* 0 success
2134* >0 f/w reported error - f/w status code 2133* >0 f/w reported error - f/w status code
2135* <0 driver reported error 2134* <0 driver reported error
2136* -ENODATA length mismatch between argument and retrieved 2135* -ENODATA length mismatch between argument and retrieved
2137* record. 2136* record.
2138* 2137*
2139* Side effects: 2138* Side effects:
@@ -2451,7 +2450,9 @@ int hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len)
2451 currpage = HFA384x_ADDR_CMD_MKPAGE(pdaloc[i].cardaddr); 2450 currpage = HFA384x_ADDR_CMD_MKPAGE(pdaloc[i].cardaddr);
2452 curroffset = HFA384x_ADDR_CMD_MKOFF(pdaloc[i].cardaddr); 2451 curroffset = HFA384x_ADDR_CMD_MKOFF(pdaloc[i].cardaddr);
2453 2452
2454 result = hfa384x_dormem_wait(hw, currpage, curroffset, buf, len); /* units of bytes */ 2453 /* units of bytes */
2454 result = hfa384x_dormem_wait(hw, currpage, curroffset, buf,
2455 len);
2455 2456
2456 if (result) { 2457 if (result) {
2457 printk(KERN_WARNING 2458 printk(KERN_WARNING
@@ -2611,20 +2612,18 @@ int hfa384x_drvr_start(hfa384x_t *hw)
2611 if (result1 != 0) { 2612 if (result1 != 0) {
2612 if (result2 != 0) { 2613 if (result2 != 0) {
2613 printk(KERN_ERR 2614 printk(KERN_ERR
2614 "cmd_initialize() failed on two attempts, results %d and %d\n", 2615 "cmd_initialize() failed on two attempts, results %d and %d\n",
2615 result1, result2); 2616 result1, result2);
2616 usb_kill_urb(&hw->rx_urb); 2617 usb_kill_urb(&hw->rx_urb);
2617 goto done; 2618 goto done;
2618 } else { 2619 } else {
2619 pr_debug("First cmd_initialize() failed (result %d),\n", 2620 pr_debug("First cmd_initialize() failed (result %d),\n",
2620 result1); 2621 result1);
2621 pr_debug 2622 pr_debug("but second attempt succeeded. All should be ok\n");
2622 ("but second attempt succeeded. All should be ok\n");
2623 } 2623 }
2624 } else if (result2 != 0) { 2624 } else if (result2 != 0) {
2625 printk(KERN_WARNING 2625 printk(KERN_WARNING "First cmd_initialize() succeeded, but second attempt failed (result=%d)\n",
2626 "First cmd_initialize() succeeded, but second attempt failed (result=%d)\n", 2626 result2);
2627 result2);
2628 printk(KERN_WARNING 2627 printk(KERN_WARNING
2629 "Most likely the card will be functional\n"); 2628 "Most likely the card will be functional\n");
2630 goto done; 2629 goto done;
@@ -3382,8 +3381,7 @@ retry:
3382 * our request has been acknowledged. Odd, 3381 * our request has been acknowledged. Odd,
3383 * but our OUT URB is still alive... 3382 * but our OUT URB is still alive...
3384 */ 3383 */
3385 pr_debug 3384 pr_debug("Causality violation: please reboot Universe\n");
3386 ("Causality violation: please reboot Universe, or email linux-wlan-devel@lists.linux-wlan.com\n");
3387 ctlx->state = CTLX_RESP_COMPLETE; 3385 ctlx->state = CTLX_RESP_COMPLETE;
3388 break; 3386 break;
3389 3387
@@ -3442,7 +3440,7 @@ static void hfa384x_usbin_txcompl(wlandevice_t *wlandev,
3442{ 3440{
3443 u16 status; 3441 u16 status;
3444 3442
3445 status = le16_to_cpu(usbin->type); /* yeah I know it says type... */ 3443 status = le16_to_cpu(usbin->type); /* yeah I know it says type... */
3446 3444
3447 /* Was there an error? */ 3445 /* Was there an error? */
3448 if (HFA384x_TXSTATUS_ISERROR(status)) 3446 if (HFA384x_TXSTATUS_ISERROR(status))
@@ -3583,7 +3581,7 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev,
3583 struct sk_buff *skb; 3581 struct sk_buff *skb;
3584 hfa384x_t *hw = wlandev->priv; 3582 hfa384x_t *hw = wlandev->priv;
3585 3583
3586 /* Don't forget the status, time, and data_len fields are in host order */ 3584 /* Remember the status, time, and data_len fields are in host order */
3587 /* Figure out how big the frame is */ 3585 /* Figure out how big the frame is */
3588 fc = le16_to_cpu(rxdesc->frame_control); 3586 fc = le16_to_cpu(rxdesc->frame_control);
3589 hdrlen = p80211_headerlen(fc); 3587 hdrlen = p80211_headerlen(fc);
@@ -3632,7 +3630,8 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev,
3632 caphdr->encoding = htonl(1); /* cck */ 3630 caphdr->encoding = htonl(1); /* cck */
3633 } 3631 }
3634 3632
3635 /* Copy the 802.11 header to the skb (ctl frames may be less than a full header) */ 3633 /* Copy the 802.11 header to the skb
3634 (ctl frames may be less than a full header) */
3636 datap = skb_put(skb, hdrlen); 3635 datap = skb_put(skb, hdrlen);
3637 memcpy(datap, &(rxdesc->frame_control), hdrlen); 3636 memcpy(datap, &(rxdesc->frame_control), hdrlen);
3638 3637
@@ -3644,7 +3643,8 @@ static void hfa384x_int_rxmonitor(wlandevice_t *wlandev,
3644 /* check for unencrypted stuff if WEP bit set. */ 3643 /* check for unencrypted stuff if WEP bit set. */
3645 if (*(datap - hdrlen + 1) & 0x40) /* wep set */ 3644 if (*(datap - hdrlen + 1) & 0x40) /* wep set */
3646 if ((*(datap) == 0xaa) && (*(datap + 1) == 0xaa)) 3645 if ((*(datap) == 0xaa) && (*(datap + 1) == 0xaa))
3647 *(datap - hdrlen + 1) &= 0xbf; /* clear wep; it's the 802.2 header! */ 3646 /* clear wep; it's the 802.2 header! */
3647 *(datap - hdrlen + 1) &= 0xbf;
3648 } 3648 }
3649 3649
3650 if (hw->sniff_fcs) { 3650 if (hw->sniff_fcs) {
@@ -3846,9 +3846,9 @@ retry:
3846 default: 3846 default:
3847 /* This is NOT a valid CTLX "success" state! */ 3847 /* This is NOT a valid CTLX "success" state! */
3848 printk(KERN_ERR 3848 printk(KERN_ERR
3849 "Illegal CTLX[%d] success state(%s, %d) in OUT URB\n", 3849 "Illegal CTLX[%d] success state(%s, %d) in OUT URB\n",
3850 le16_to_cpu(ctlx->outbuf.type), 3850 le16_to_cpu(ctlx->outbuf.type),
3851 ctlxstr(ctlx->state), urb->status); 3851 ctlxstr(ctlx->state), urb->status);
3852 break; 3852 break;
3853 } /* switch */ 3853 } /* switch */
3854 } else { 3854 } else {
diff --git a/drivers/staging/wlan-ng/p80211conv.c b/drivers/staging/wlan-ng/p80211conv.c
index a1605fbc8092..059e15055b74 100644
--- a/drivers/staging/wlan-ng/p80211conv.c
+++ b/drivers/staging/wlan-ng/p80211conv.c
@@ -208,7 +208,7 @@ int skb_ether_to_p80211(wlandevice_t *wlandev, u32 ethconv,
208 p80211_wep->data = kmalloc(skb->len, GFP_ATOMIC); 208 p80211_wep->data = kmalloc(skb->len, GFP_ATOMIC);
209 foo = wep_encrypt(wlandev, skb->data, p80211_wep->data, 209 foo = wep_encrypt(wlandev, skb->data, p80211_wep->data,
210 skb->len, 210 skb->len,
211 (wlandev->hostwep &HOSTWEP_DEFAULTKEY_MASK), 211 (wlandev->hostwep & HOSTWEP_DEFAULTKEY_MASK),
212 p80211_wep->iv, p80211_wep->icv); 212 p80211_wep->iv, p80211_wep->icv);
213 if (foo) { 213 if (foo) {
214 printk(KERN_WARNING 214 printk(KERN_WARNING
@@ -601,7 +601,7 @@ int p80211skb_rxmeta_attach(struct wlandevice *wlandev, struct sk_buff *skb)
601 } 601 }
602 602
603 /* Allocate the rxmeta */ 603 /* Allocate the rxmeta */
604 rxmeta = kmalloc(sizeof(p80211_rxmeta_t), GFP_ATOMIC); 604 rxmeta = kzalloc(sizeof(p80211_rxmeta_t), GFP_ATOMIC);
605 605
606 if (rxmeta == NULL) { 606 if (rxmeta == NULL) {
607 printk(KERN_ERR "%s: Failed to allocate rxmeta.\n", 607 printk(KERN_ERR "%s: Failed to allocate rxmeta.\n",
@@ -611,7 +611,6 @@ int p80211skb_rxmeta_attach(struct wlandevice *wlandev, struct sk_buff *skb)
611 } 611 }
612 612
613 /* Initialize the rxmeta */ 613 /* Initialize the rxmeta */
614 memset(rxmeta, 0, sizeof(p80211_rxmeta_t));
615 rxmeta->wlandev = wlandev; 614 rxmeta->wlandev = wlandev;
616 rxmeta->hosttime = jiffies; 615 rxmeta->hosttime = jiffies;
617 616
diff --git a/drivers/staging/wlan-ng/p80211req.c b/drivers/staging/wlan-ng/p80211req.c
index e1e7bf1bf27c..207f080cfc9e 100644
--- a/drivers/staging/wlan-ng/p80211req.c
+++ b/drivers/staging/wlan-ng/p80211req.c
@@ -107,7 +107,8 @@ int p80211req_dorequest(wlandevice_t *wlandev, u8 *msgbuf)
107 } 107 }
108 108
109 /* Check Permissions */ 109 /* Check Permissions */
110 if (!capable(CAP_NET_ADMIN) && (msg->msgcode != DIDmsg_dot11req_mibget)) { 110 if (!capable(CAP_NET_ADMIN) &&
111 (msg->msgcode != DIDmsg_dot11req_mibget)) {
111 printk(KERN_ERR 112 printk(KERN_ERR
112 "%s: only dot11req_mibget allowed for non-root.\n", 113 "%s: only dot11req_mibget allowed for non-root.\n",
113 wlandev->name); 114 wlandev->name);
@@ -128,7 +129,7 @@ int p80211req_dorequest(wlandevice_t *wlandev, u8 *msgbuf)
128 wlandev->mlmerequest(wlandev, msg); 129 wlandev->mlmerequest(wlandev, msg);
129 130
130 clear_bit(1, &(wlandev->request_pending)); 131 clear_bit(1, &(wlandev->request_pending));
131 return result; /* if result==0, msg->status still may contain an err */ 132 return result; /* if result==0, msg->status still may contain an err */
132} 133}
133 134
134/*---------------------------------------------------------------- 135/*----------------------------------------------------------------
diff --git a/drivers/staging/wlan-ng/p80211wext.c b/drivers/staging/wlan-ng/p80211wext.c
index 83f1d6cd7991..387194d4a6eb 100644
--- a/drivers/staging/wlan-ng/p80211wext.c
+++ b/drivers/staging/wlan-ng/p80211wext.c
@@ -49,7 +49,6 @@
49#include <linux/uaccess.h> 49#include <linux/uaccess.h>
50#include <asm/byteorder.h> 50#include <asm/byteorder.h>
51#include <linux/if_ether.h> 51#include <linux/if_ether.h>
52#include <linux/bitops.h>
53 52
54#include "p80211types.h" 53#include "p80211types.h"
55#include "p80211hdr.h" 54#include "p80211hdr.h"
@@ -74,7 +73,7 @@ static u8 p80211_mhz_to_channel(u16 mhz)
74 if (mhz >= 5000) 73 if (mhz >= 5000)
75 return (mhz - 5000) / 5; 74 return (mhz - 5000) / 5;
76 75
77 if (mhz == 2482) 76 if (mhz == 2484)
78 return 14; 77 return 14;
79 78
80 if (mhz >= 2407) 79 if (mhz >= 2407)
@@ -126,18 +125,38 @@ static int qual_as_percent(int snr)
126 return 100; 125 return 100;
127} 126}
128 127
129static int p80211wext_dorequest(wlandevice_t *wlandev, u32 did, u32 data) 128static int p80211wext_setmib(wlandevice_t *wlandev, u32 did, u32 data)
130{ 129{
131 p80211msg_dot11req_mibset_t msg; 130 p80211msg_dot11req_mibset_t msg;
132 p80211item_uint32_t mibitem; 131 p80211item_uint32_t *mibitem =
132 (p80211item_uint32_t *)&msg.mibattribute.data;
133 int result; 133 int result;
134 134
135 msg.msgcode = DIDmsg_dot11req_mibset; 135 msg.msgcode = DIDmsg_dot11req_mibset;
136 memset(&mibitem, 0, sizeof(mibitem)); 136 memset(mibitem, 0, sizeof(*mibitem));
137 mibitem.did = did; 137 mibitem->did = did;
138 mibitem.data = data; 138 mibitem->data = data;
139 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); 139 result = p80211req_dorequest(wlandev, (u8 *) &msg);
140
141 return result;
142}
143
144/*
145 * get a 32 bit mib value
146 */
147static int p80211wext_getmib(wlandevice_t *wlandev, u32 did, u32 *data)
148{
149 p80211msg_dot11req_mibset_t msg;
150 p80211item_uint32_t *mibitem =
151 (p80211item_uint32_t *)&msg.mibattribute.data;
152 int result;
153
154 msg.msgcode = DIDmsg_dot11req_mibget;
155 memset(mibitem, 0, sizeof(*mibitem));
156 mibitem->did = did;
140 result = p80211req_dorequest(wlandev, (u8 *) &msg); 157 result = p80211req_dorequest(wlandev, (u8 *) &msg);
158 if (!result)
159 *data = mibitem->data;
141 160
142 return result; 161 return result;
143} 162}
@@ -263,32 +282,26 @@ static int p80211wext_giwfreq(netdevice_t *dev,
263 struct iw_freq *freq, char *extra) 282 struct iw_freq *freq, char *extra)
264{ 283{
265 wlandevice_t *wlandev = dev->ml_priv; 284 wlandevice_t *wlandev = dev->ml_priv;
266 p80211item_uint32_t mibitem;
267 p80211msg_dot11req_mibset_t msg;
268 int result; 285 int result;
269 int err = 0; 286 int err = 0;
287 unsigned int value;
270 288
271 msg.msgcode = DIDmsg_dot11req_mibget; 289 result = p80211wext_getmib(wlandev,
272 memset(&mibitem, 0, sizeof(mibitem)); 290 DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel,
273 mibitem.did = DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel; 291 &value);
274 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
275 result = p80211req_dorequest(wlandev, (u8 *) &msg);
276
277 if (result) { 292 if (result) {
278 err = -EFAULT; 293 err = -EFAULT;
279 goto exit; 294 goto exit;
280 } 295 }
281 296
282 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem)); 297 if (value > NUM_CHANNELS) {
283
284 if (mibitem.data > NUM_CHANNELS) {
285 err = -EFAULT; 298 err = -EFAULT;
286 goto exit; 299 goto exit;
287 } 300 }
288 301
289 /* convert into frequency instead of a channel */ 302 /* convert into frequency instead of a channel */
290 freq->e = 1; 303 freq->e = 1;
291 freq->m = p80211_channel_to_mhz(mibitem.data, 0) * 100000; 304 freq->m = p80211_channel_to_mhz(value, 0) * 100000;
292 305
293exit: 306exit:
294 return err; 307 return err;
@@ -299,28 +312,23 @@ static int p80211wext_siwfreq(netdevice_t *dev,
299 struct iw_freq *freq, char *extra) 312 struct iw_freq *freq, char *extra)
300{ 313{
301 wlandevice_t *wlandev = dev->ml_priv; 314 wlandevice_t *wlandev = dev->ml_priv;
302 p80211item_uint32_t mibitem;
303 p80211msg_dot11req_mibset_t msg;
304 int result; 315 int result;
305 int err = 0; 316 int err = 0;
317 unsigned int value;
306 318
307 if (!wlan_wext_write) { 319 if (!wlan_wext_write) {
308 err = (-EOPNOTSUPP); 320 err = -EOPNOTSUPP;
309 goto exit; 321 goto exit;
310 } 322 }
311 323
312 msg.msgcode = DIDmsg_dot11req_mibset;
313 memset(&mibitem, 0, sizeof(mibitem));
314 mibitem.did = DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel;
315 mibitem.status = P80211ENUM_msgitem_status_data_ok;
316
317 if ((freq->e == 0) && (freq->m <= 1000)) 324 if ((freq->e == 0) && (freq->m <= 1000))
318 mibitem.data = freq->m; 325 value = freq->m;
319 else 326 else
320 mibitem.data = p80211_mhz_to_channel(freq->m); 327 value = p80211_mhz_to_channel(freq->m);
321 328
322 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); 329 result = p80211wext_setmib(wlandev,
323 result = p80211req_dorequest(wlandev, (u8 *) &msg); 330 DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel,
331 value);
324 332
325 if (result) { 333 if (result) {
326 err = -EFAULT; 334 err = -EFAULT;
@@ -360,13 +368,11 @@ static int p80211wext_siwmode(netdevice_t *dev,
360 __u32 *mode, char *extra) 368 __u32 *mode, char *extra)
361{ 369{
362 wlandevice_t *wlandev = dev->ml_priv; 370 wlandevice_t *wlandev = dev->ml_priv;
363 p80211item_uint32_t mibitem;
364 p80211msg_dot11req_mibset_t msg;
365 int result; 371 int result;
366 int err = 0; 372 int err = 0;
367 373
368 if (!wlan_wext_write) { 374 if (!wlan_wext_write) {
369 err = (-EOPNOTSUPP); 375 err = -EOPNOTSUPP;
370 goto exit; 376 goto exit;
371 } 377 }
372 378
@@ -397,16 +403,11 @@ static int p80211wext_siwmode(netdevice_t *dev,
397 } 403 }
398 404
399 /* Set Operation mode to the PORT TYPE RID */ 405 /* Set Operation mode to the PORT TYPE RID */
400 msg.msgcode = DIDmsg_dot11req_mibset; 406 result = p80211wext_setmib(wlandev,
401 memset(&mibitem, 0, sizeof(mibitem)); 407 DIDmib_p2_p2Static_p2CnfPortType,
402 mibitem.did = DIDmib_p2_p2Static_p2CnfPortType; 408 (*mode == IW_MODE_ADHOC) ? 0 : 1);
403 mibitem.data = (*mode == IW_MODE_ADHOC) ? 0 : 1;
404 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
405 result = p80211req_dorequest(wlandev, (u8 *) &msg);
406
407 if (result) 409 if (result)
408 err = -EFAULT; 410 err = -EFAULT;
409
410exit: 411exit:
411 return err; 412 return err;
412} 413}
@@ -563,9 +564,9 @@ static int p80211wext_siwencode(netdevice_t *dev,
563 /* Set current key number only if no keys are given */ 564 /* Set current key number only if no keys are given */
564 if (erq->flags & IW_ENCODE_NOKEY) { 565 if (erq->flags & IW_ENCODE_NOKEY) {
565 result = 566 result =
566 p80211wext_dorequest(wlandev, 567 p80211wext_setmib(wlandev,
567 DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID, 568 DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID,
568 i); 569 i);
569 570
570 if (result) { 571 if (result) {
571 err = -EFAULT; 572 err = -EFAULT;
@@ -587,7 +588,6 @@ static int p80211wext_siwencode(netdevice_t *dev,
587 -------------------------------------------------------------*/ 588 -------------------------------------------------------------*/
588 589
589 if (erq->length > 0) { 590 if (erq->length > 0) {
590
591 /* copy the key from the driver cache as the keys are read-only MIBs */ 591 /* copy the key from the driver cache as the keys are read-only MIBs */
592 wlandev->wep_keylens[i] = erq->length; 592 wlandev->wep_keylens[i] = erq->length;
593 memcpy(wlandev->wep_keys[i], key, erq->length); 593 memcpy(wlandev->wep_keys[i], key, erq->length);
@@ -637,12 +637,12 @@ static int p80211wext_siwencode(netdevice_t *dev,
637 /* Check the PrivacyInvoked flag */ 637 /* Check the PrivacyInvoked flag */
638 if (erq->flags & IW_ENCODE_DISABLED) { 638 if (erq->flags & IW_ENCODE_DISABLED) {
639 result = 639 result =
640 p80211wext_dorequest(wlandev, 640 p80211wext_setmib(wlandev,
641 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked, 641 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked,
642 P80211ENUM_truth_false); 642 P80211ENUM_truth_false);
643 } else { 643 } else {
644 result = 644 result =
645 p80211wext_dorequest(wlandev, 645 p80211wext_setmib(wlandev,
646 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked, 646 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked,
647 P80211ENUM_truth_true); 647 P80211ENUM_truth_true);
648 } 648 }
@@ -661,12 +661,12 @@ static int p80211wext_siwencode(netdevice_t *dev,
661 */ 661 */
662 if (erq->flags & IW_ENCODE_RESTRICTED) { 662 if (erq->flags & IW_ENCODE_RESTRICTED) {
663 result = 663 result =
664 p80211wext_dorequest(wlandev, 664 p80211wext_setmib(wlandev,
665 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted, 665 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted,
666 P80211ENUM_truth_true); 666 P80211ENUM_truth_true);
667 } else if (erq->flags & IW_ENCODE_OPEN) { 667 } else if (erq->flags & IW_ENCODE_OPEN) {
668 result = 668 result =
669 p80211wext_dorequest(wlandev, 669 p80211wext_setmib(wlandev,
670 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted, 670 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted,
671 P80211ENUM_truth_false); 671 P80211ENUM_truth_false);
672 } 672 }
@@ -768,24 +768,16 @@ static int p80211wext_giwrate(netdevice_t *dev,
768 struct iw_param *rrq, char *extra) 768 struct iw_param *rrq, char *extra)
769{ 769{
770 wlandevice_t *wlandev = dev->ml_priv; 770 wlandevice_t *wlandev = dev->ml_priv;
771 p80211item_uint32_t mibitem;
772 p80211msg_dot11req_mibset_t msg;
773 int result; 771 int result;
774 int err = 0; 772 int err = 0;
773 unsigned int value;
775 774
776 msg.msgcode = DIDmsg_dot11req_mibget; 775 result = p80211wext_getmib(wlandev, DIDmib_p2_p2MAC_p2CurrentTxRate, &value);
777 memset(&mibitem, 0, sizeof(mibitem));
778 mibitem.did = DIDmib_p2_p2MAC_p2CurrentTxRate;
779 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
780 result = p80211req_dorequest(wlandev, (u8 *) &msg);
781
782 if (result) { 776 if (result) {
783 err = -EFAULT; 777 err = -EFAULT;
784 goto exit; 778 goto exit;
785 } 779 }
786 780
787 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem));
788
789 rrq->fixed = 0; /* can it change? */ 781 rrq->fixed = 0; /* can it change? */
790 rrq->disabled = 0; 782 rrq->disabled = 0;
791 rrq->value = 0; 783 rrq->value = 0;
@@ -795,7 +787,7 @@ static int p80211wext_giwrate(netdevice_t *dev,
795#define HFA384x_RATEBIT_5dot5 ((u16)4) 787#define HFA384x_RATEBIT_5dot5 ((u16)4)
796#define HFA384x_RATEBIT_11 ((u16)8) 788#define HFA384x_RATEBIT_11 ((u16)8)
797 789
798 switch (mibitem.data) { 790 switch (value) {
799 case HFA384x_RATEBIT_1: 791 case HFA384x_RATEBIT_1:
800 rrq->value = 1000000; 792 rrq->value = 1000000;
801 break; 793 break;
@@ -820,25 +812,19 @@ static int p80211wext_giwrts(netdevice_t *dev,
820 struct iw_param *rts, char *extra) 812 struct iw_param *rts, char *extra)
821{ 813{
822 wlandevice_t *wlandev = dev->ml_priv; 814 wlandevice_t *wlandev = dev->ml_priv;
823 p80211item_uint32_t mibitem;
824 p80211msg_dot11req_mibset_t msg;
825 int result; 815 int result;
826 int err = 0; 816 int err = 0;
817 unsigned int value;
827 818
828 msg.msgcode = DIDmsg_dot11req_mibget; 819 result = p80211wext_getmib(wlandev,
829 memset(&mibitem, 0, sizeof(mibitem)); 820 DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold,
830 mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold; 821 &value);
831 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
832 result = p80211req_dorequest(wlandev, (u8 *) &msg);
833
834 if (result) { 822 if (result) {
835 err = -EFAULT; 823 err = -EFAULT;
836 goto exit; 824 goto exit;
837 } 825 }
838 826
839 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem)); 827 rts->value = value;
840
841 rts->value = mibitem.data;
842 rts->disabled = (rts->value == 2347); 828 rts->disabled = (rts->value == 2347);
843 rts->fixed = 1; 829 rts->fixed = 1;
844 830
@@ -851,27 +837,23 @@ static int p80211wext_siwrts(netdevice_t *dev,
851 struct iw_param *rts, char *extra) 837 struct iw_param *rts, char *extra)
852{ 838{
853 wlandevice_t *wlandev = dev->ml_priv; 839 wlandevice_t *wlandev = dev->ml_priv;
854 p80211item_uint32_t mibitem;
855 p80211msg_dot11req_mibset_t msg;
856 int result; 840 int result;
857 int err = 0; 841 int err = 0;
842 unsigned int value;
858 843
859 if (!wlan_wext_write) { 844 if (!wlan_wext_write) {
860 err = (-EOPNOTSUPP); 845 err = -EOPNOTSUPP;
861 goto exit; 846 goto exit;
862 } 847 }
863 848
864 msg.msgcode = DIDmsg_dot11req_mibget;
865 memset(&mibitem, 0, sizeof(mibitem));
866 mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold;
867 if (rts->disabled) 849 if (rts->disabled)
868 mibitem.data = 2347; 850 value = 2347;
869 else 851 else
870 mibitem.data = rts->value; 852 value = rts->value;
871
872 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
873 result = p80211req_dorequest(wlandev, (u8 *) &msg);
874 853
854 result = p80211wext_setmib(wlandev,
855 DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold,
856 value);
875 if (result) { 857 if (result) {
876 err = -EFAULT; 858 err = -EFAULT;
877 goto exit; 859 goto exit;
@@ -886,26 +868,19 @@ static int p80211wext_giwfrag(netdevice_t *dev,
886 struct iw_param *frag, char *extra) 868 struct iw_param *frag, char *extra)
887{ 869{
888 wlandevice_t *wlandev = dev->ml_priv; 870 wlandevice_t *wlandev = dev->ml_priv;
889 p80211item_uint32_t mibitem;
890 p80211msg_dot11req_mibset_t msg;
891 int result; 871 int result;
892 int err = 0; 872 int err = 0;
873 unsigned int value;
893 874
894 msg.msgcode = DIDmsg_dot11req_mibget; 875 result = p80211wext_getmib(wlandev,
895 memset(&mibitem, 0, sizeof(mibitem)); 876 DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold,
896 mibitem.did = 877 &value);
897 DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold;
898 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
899 result = p80211req_dorequest(wlandev, (u8 *) &msg);
900
901 if (result) { 878 if (result) {
902 err = -EFAULT; 879 err = -EFAULT;
903 goto exit; 880 goto exit;
904 } 881 }
905 882
906 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem)); 883 frag->value = value;
907
908 frag->value = mibitem.data;
909 frag->disabled = (frag->value == 2346); 884 frag->disabled = (frag->value == 2346);
910 frag->fixed = 1; 885 frag->fixed = 1;
911 886
@@ -918,28 +893,23 @@ static int p80211wext_siwfrag(netdevice_t *dev,
918 struct iw_param *frag, char *extra) 893 struct iw_param *frag, char *extra)
919{ 894{
920 wlandevice_t *wlandev = dev->ml_priv; 895 wlandevice_t *wlandev = dev->ml_priv;
921 p80211item_uint32_t mibitem;
922 p80211msg_dot11req_mibset_t msg;
923 int result; 896 int result;
924 int err = 0; 897 int err = 0;
898 int value;
925 899
926 if (!wlan_wext_write) { 900 if (!wlan_wext_write) {
927 err = (-EOPNOTSUPP); 901 err = (-EOPNOTSUPP);
928 goto exit; 902 goto exit;
929 } 903 }
930 904
931 msg.msgcode = DIDmsg_dot11req_mibset;
932 memset(&mibitem, 0, sizeof(mibitem));
933 mibitem.did =
934 DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold;
935
936 if (frag->disabled) 905 if (frag->disabled)
937 mibitem.data = 2346; 906 value = 2346;
938 else 907 else
939 mibitem.data = frag->value; 908 value = frag->value;
940 909
941 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); 910 result = p80211wext_setmib(wlandev,
942 result = p80211req_dorequest(wlandev, (u8 *) &msg); 911 DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold,
912 value);
943 913
944 if (result) { 914 if (result) {
945 err = -EFAULT; 915 err = -EFAULT;
@@ -963,56 +933,40 @@ static int p80211wext_giwretry(netdevice_t *dev,
963 struct iw_param *rrq, char *extra) 933 struct iw_param *rrq, char *extra)
964{ 934{
965 wlandevice_t *wlandev = dev->ml_priv; 935 wlandevice_t *wlandev = dev->ml_priv;
966 p80211item_uint32_t mibitem;
967 p80211msg_dot11req_mibset_t msg;
968 int result; 936 int result;
969 int err = 0; 937 int err = 0;
970 u16 shortretry, longretry, lifetime; 938 u16 shortretry, longretry, lifetime;
939 unsigned int value;
971 940
972 msg.msgcode = DIDmsg_dot11req_mibget; 941 result = p80211wext_getmib(wlandev,
973 memset(&mibitem, 0, sizeof(mibitem)); 942 DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit,
974 mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit; 943 &value);
975
976 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
977 result = p80211req_dorequest(wlandev, (u8 *) &msg);
978
979 if (result) { 944 if (result) {
980 err = -EFAULT; 945 err = -EFAULT;
981 goto exit; 946 goto exit;
982 } 947 }
983 948
984 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem)); 949 shortretry = value;
985
986 shortretry = mibitem.data;
987
988 mibitem.did = DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit;
989
990 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
991 result = p80211req_dorequest(wlandev, (u8 *) &msg);
992 950
951 result = p80211wext_getmib(wlandev,
952 DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit,
953 &value);
993 if (result) { 954 if (result) {
994 err = -EFAULT; 955 err = -EFAULT;
995 goto exit; 956 goto exit;
996 } 957 }
997 958
998 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem)); 959 longretry = value;
999
1000 longretry = mibitem.data;
1001
1002 mibitem.did =
1003 DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime;
1004
1005 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
1006 result = p80211req_dorequest(wlandev, (u8 *) &msg);
1007 960
961 result = p80211wext_getmib(wlandev,
962 DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime,
963 &value);
1008 if (result) { 964 if (result) {
1009 err = -EFAULT; 965 err = -EFAULT;
1010 goto exit; 966 goto exit;
1011 } 967 }
1012 968
1013 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem)); 969 lifetime = value;
1014
1015 lifetime = mibitem.data;
1016 970
1017 rrq->disabled = 0; 971 rrq->disabled = 0;
1018 972
@@ -1045,8 +999,7 @@ static int p80211wext_siwretry(netdevice_t *dev,
1045 p80211msg_dot11req_mibset_t msg; 999 p80211msg_dot11req_mibset_t msg;
1046 int result; 1000 int result;
1047 int err = 0; 1001 int err = 0;
1048 1002 unsigned int value;
1049 memset(&mibitem, 0, sizeof(mibitem));
1050 1003
1051 if (!wlan_wext_write) { 1004 if (!wlan_wext_write) {
1052 err = (-EOPNOTSUPP); 1005 err = (-EOPNOTSUPP);
@@ -1061,26 +1014,20 @@ static int p80211wext_siwretry(netdevice_t *dev,
1061 msg.msgcode = DIDmsg_dot11req_mibset; 1014 msg.msgcode = DIDmsg_dot11req_mibset;
1062 1015
1063 if ((rrq->flags & IW_RETRY_TYPE) == IW_RETRY_LIFETIME) { 1016 if ((rrq->flags & IW_RETRY_TYPE) == IW_RETRY_LIFETIME) {
1064 mibitem.did =
1065 DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime;
1066 mibitem.data = rrq->value /= 1024;
1067
1068 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
1069 result = p80211req_dorequest(wlandev, (u8 *) &msg);
1070 1017
1018 value = rrq->value /= 1024;
1019 result = p80211wext_setmib(wlandev,
1020 DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime,
1021 value);
1071 if (result) { 1022 if (result) {
1072 err = -EFAULT; 1023 err = -EFAULT;
1073 goto exit; 1024 goto exit;
1074 } 1025 }
1075 } else { 1026 } else {
1076 if (rrq->flags & IW_RETRY_LONG) { 1027 if (rrq->flags & IW_RETRY_LONG) {
1077 mibitem.did = 1028 result = p80211wext_setmib(wlandev,
1078 DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit; 1029 DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit,
1079 mibitem.data = rrq->value; 1030 rrq->value);
1080
1081 memcpy(&msg.mibattribute.data, &mibitem,
1082 sizeof(mibitem));
1083 result = p80211req_dorequest(wlandev, (u8 *) &msg);
1084 1031
1085 if (result) { 1032 if (result) {
1086 err = -EFAULT; 1033 err = -EFAULT;
@@ -1089,13 +1036,9 @@ static int p80211wext_siwretry(netdevice_t *dev,
1089 } 1036 }
1090 1037
1091 if (rrq->flags & IW_RETRY_SHORT) { 1038 if (rrq->flags & IW_RETRY_SHORT) {
1092 mibitem.did = 1039 result = p80211wext_setmib(wlandev,
1093 DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit; 1040 DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit,
1094 mibitem.data = rrq->value; 1041 rrq->value);
1095
1096 memcpy(&msg.mibattribute.data, &mibitem,
1097 sizeof(mibitem));
1098 result = p80211req_dorequest(wlandev, (u8 *) &msg);
1099 1042
1100 if (result) { 1043 if (result) {
1101 err = -EFAULT; 1044 err = -EFAULT;
@@ -1118,22 +1061,20 @@ static int p80211wext_siwtxpow(netdevice_t *dev,
1118 p80211msg_dot11req_mibset_t msg; 1061 p80211msg_dot11req_mibset_t msg;
1119 int result; 1062 int result;
1120 int err = 0; 1063 int err = 0;
1064 unsigned int value;
1121 1065
1122 if (!wlan_wext_write) { 1066 if (!wlan_wext_write) {
1123 err = (-EOPNOTSUPP); 1067 err = (-EOPNOTSUPP);
1124 goto exit; 1068 goto exit;
1125 } 1069 }
1126 1070
1127 msg.msgcode = DIDmsg_dot11req_mibset;
1128 memset(&mibitem, 0, sizeof(mibitem));
1129 mibitem.did =
1130 DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel;
1131 if (rrq->fixed == 0) 1071 if (rrq->fixed == 0)
1132 mibitem.data = 30; 1072 value = 30;
1133 else 1073 else
1134 mibitem.data = rrq->value; 1074 value = rrq->value;
1135 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem)); 1075 result = p80211wext_setmib(wlandev,
1136 result = p80211req_dorequest(wlandev, (u8 *) &msg); 1076 DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel,
1077 value);
1137 1078
1138 if (result) { 1079 if (result) {
1139 err = -EFAULT; 1080 err = -EFAULT;
@@ -1149,33 +1090,25 @@ static int p80211wext_giwtxpow(netdevice_t *dev,
1149 struct iw_param *rrq, char *extra) 1090 struct iw_param *rrq, char *extra)
1150{ 1091{
1151 wlandevice_t *wlandev = dev->ml_priv; 1092 wlandevice_t *wlandev = dev->ml_priv;
1152 p80211item_uint32_t mibitem;
1153 p80211msg_dot11req_mibset_t msg;
1154 int result; 1093 int result;
1155 int err = 0; 1094 int err = 0;
1095 unsigned int value;
1156 1096
1157 msg.msgcode = DIDmsg_dot11req_mibget; 1097 result = p80211wext_getmib(wlandev,
1158 1098 DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel,
1159 memset(&mibitem, 0, sizeof(mibitem)); 1099 &value);
1160 mibitem.did =
1161 DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel;
1162
1163 memcpy(&msg.mibattribute.data, &mibitem, sizeof(mibitem));
1164 result = p80211req_dorequest(wlandev, (u8 *) &msg);
1165 1100
1166 if (result) { 1101 if (result) {
1167 err = -EFAULT; 1102 err = -EFAULT;
1168 goto exit; 1103 goto exit;
1169 } 1104 }
1170 1105
1171 memcpy(&mibitem, &msg.mibattribute.data, sizeof(mibitem));
1172
1173 /* XXX handle OFF by setting disabled = 1; */ 1106 /* XXX handle OFF by setting disabled = 1; */
1174 1107
1175 rrq->flags = 0; /* IW_TXPOW_DBM; */ 1108 rrq->flags = 0; /* IW_TXPOW_DBM; */
1176 rrq->disabled = 0; 1109 rrq->disabled = 0;
1177 rrq->fixed = 0; 1110 rrq->fixed = 0;
1178 rrq->value = mibitem.data; 1111 rrq->value = value;
1179 1112
1180exit: 1113exit:
1181 return err; 1114 return err;
@@ -1480,7 +1413,7 @@ static int p80211wext_set_encodeext(struct net_device *dev,
1480 } 1413 }
1481 pr_debug("setting default key (%d)\n", idx); 1414 pr_debug("setting default key (%d)\n", idx);
1482 result = 1415 result =
1483 p80211wext_dorequest(wlandev, 1416 p80211wext_setmib(wlandev,
1484 DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID, 1417 DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID,
1485 idx); 1418 idx);
1486 if (result) 1419 if (result)
@@ -1600,12 +1533,12 @@ static int p80211_wext_set_iwauth(struct net_device *dev,
1600 pr_debug("drop_unencrypted %d\n", param->value); 1533 pr_debug("drop_unencrypted %d\n", param->value);
1601 if (param->value) 1534 if (param->value)
1602 result = 1535 result =
1603 p80211wext_dorequest(wlandev, 1536 p80211wext_setmib(wlandev,
1604 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted, 1537 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted,
1605 P80211ENUM_truth_true); 1538 P80211ENUM_truth_true);
1606 else 1539 else
1607 result = 1540 result =
1608 p80211wext_dorequest(wlandev, 1541 p80211wext_setmib(wlandev,
1609 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted, 1542 DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted,
1610 P80211ENUM_truth_false); 1543 P80211ENUM_truth_false);
1611 break; 1544 break;
@@ -1614,12 +1547,12 @@ static int p80211_wext_set_iwauth(struct net_device *dev,
1614 pr_debug("privacy invoked %d\n", param->value); 1547 pr_debug("privacy invoked %d\n", param->value);
1615 if (param->value) 1548 if (param->value)
1616 result = 1549 result =
1617 p80211wext_dorequest(wlandev, 1550 p80211wext_setmib(wlandev,
1618 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked, 1551 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked,
1619 P80211ENUM_truth_true); 1552 P80211ENUM_truth_true);
1620 else 1553 else
1621 result = 1554 result =
1622 p80211wext_dorequest(wlandev, 1555 p80211wext_setmib(wlandev,
1623 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked, 1556 DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked,
1624 P80211ENUM_truth_false); 1557 P80211ENUM_truth_false);
1625 1558
@@ -1681,64 +1614,50 @@ static int p80211_wext_get_iwauth(struct net_device *dev,
1681 return result; 1614 return result;
1682} 1615}
1683 1616
1617#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT]
1618
1684static iw_handler p80211wext_handlers[] = { 1619static iw_handler p80211wext_handlers[] = {
1685 (iw_handler) p80211wext_siwcommit, /* SIOCSIWCOMMIT */ 1620 IW_IOCTL(SIOCSIWCOMMIT) = (iw_handler) p80211wext_siwcommit,
1686 (iw_handler) p80211wext_giwname, /* SIOCGIWNAME */ 1621 IW_IOCTL(SIOCGIWNAME) = (iw_handler) p80211wext_giwname,
1687 (iw_handler) NULL, /* SIOCSIWNWID */ 1622/* SIOCSIWNWID,SIOCGIWNWID */
1688 (iw_handler) NULL, /* SIOCGIWNWID */ 1623 IW_IOCTL(SIOCSIWFREQ) = (iw_handler) p80211wext_siwfreq,
1689 (iw_handler) p80211wext_siwfreq, /* SIOCSIWFREQ */ 1624 IW_IOCTL(SIOCGIWFREQ) = (iw_handler) p80211wext_giwfreq,
1690 (iw_handler) p80211wext_giwfreq, /* SIOCGIWFREQ */ 1625 IW_IOCTL(SIOCSIWMODE) = (iw_handler) p80211wext_siwmode,
1691 (iw_handler) p80211wext_siwmode, /* SIOCSIWMODE */ 1626 IW_IOCTL(SIOCGIWMODE) = (iw_handler) p80211wext_giwmode,
1692 (iw_handler) p80211wext_giwmode, /* SIOCGIWMODE */ 1627/* SIOCSIWSENS,SIOCGIWSENS,SIOCSIWRANGE */
1693 (iw_handler) NULL, /* SIOCSIWSENS */ 1628 IW_IOCTL(SIOCGIWRANGE) = (iw_handler) p80211wext_giwrange,
1694 (iw_handler) NULL, /* SIOCGIWSENS */ 1629/* SIOCSIWPRIV,SIOCGIWPRIV,SIOCSIWSTATS,SIOCGIWSTATS */
1695 (iw_handler) NULL, /* not used *//* SIOCSIWRANGE */ 1630 IW_IOCTL(SIOCSIWSPY) = (iw_handler) p80211wext_siwspy,
1696 (iw_handler) p80211wext_giwrange, /* SIOCGIWRANGE */ 1631 IW_IOCTL(SIOCGIWSPY) = (iw_handler) p80211wext_giwspy,
1697 (iw_handler) NULL, /* not used *//* SIOCSIWPRIV */ 1632/* SIOCSIWAP */
1698 (iw_handler) NULL, /* kernel code *//* SIOCGIWPRIV */ 1633 IW_IOCTL(SIOCGIWAP) = (iw_handler) p80211wext_giwap,
1699 (iw_handler) NULL, /* not used *//* SIOCSIWSTATS */ 1634/* SIOCGIWAPLIST */
1700 (iw_handler) NULL, /* kernel code *//* SIOCGIWSTATS */ 1635 IW_IOCTL(SIOCSIWSCAN) = (iw_handler) p80211wext_siwscan,
1701 (iw_handler) p80211wext_siwspy, /* SIOCSIWSPY */ 1636 IW_IOCTL(SIOCGIWSCAN) = (iw_handler) p80211wext_giwscan,
1702 (iw_handler) p80211wext_giwspy, /* SIOCGIWSPY */ 1637 IW_IOCTL(SIOCSIWESSID) = (iw_handler) p80211wext_siwessid,
1703 (iw_handler) NULL, /* -- hole -- */ 1638 IW_IOCTL(SIOCGIWESSID) = (iw_handler) p80211wext_giwessid,
1704 (iw_handler) NULL, /* -- hole -- */ 1639/* SIOCSIWNICKN */
1705 (iw_handler) NULL, /* SIOCSIWAP */ 1640 IW_IOCTL(SIOCGIWNICKN) = (iw_handler) p80211wext_giwessid,
1706 (iw_handler) p80211wext_giwap, /* SIOCGIWAP */ 1641/* SIOCSIWRATE */
1707 (iw_handler) NULL, /* -- hole -- */ 1642 IW_IOCTL(SIOCGIWRATE) = (iw_handler) p80211wext_giwrate,
1708 (iw_handler) NULL, /* SIOCGIWAPLIST */ 1643 IW_IOCTL(SIOCSIWRTS) = (iw_handler) p80211wext_siwrts,
1709 (iw_handler) p80211wext_siwscan, /* SIOCSIWSCAN */ 1644 IW_IOCTL(SIOCGIWRTS) = (iw_handler) p80211wext_giwrts,
1710 (iw_handler) p80211wext_giwscan, /* SIOCGIWSCAN */ 1645 IW_IOCTL(SIOCSIWFRAG) = (iw_handler) p80211wext_siwfrag,
1711 (iw_handler) p80211wext_siwessid, /* SIOCSIWESSID */ 1646 IW_IOCTL(SIOCGIWFRAG) = (iw_handler) p80211wext_giwfrag,
1712 (iw_handler) p80211wext_giwessid, /* SIOCGIWESSID */ 1647 IW_IOCTL(SIOCSIWTXPOW) = (iw_handler) p80211wext_siwtxpow,
1713 (iw_handler) NULL, /* SIOCSIWNICKN */ 1648 IW_IOCTL(SIOCGIWTXPOW) = (iw_handler) p80211wext_giwtxpow,
1714 (iw_handler) p80211wext_giwessid, /* SIOCGIWNICKN */ 1649 IW_IOCTL(SIOCSIWRETRY) = (iw_handler) p80211wext_siwretry,
1715 (iw_handler) NULL, /* -- hole -- */ 1650 IW_IOCTL(SIOCGIWRETRY) = (iw_handler) p80211wext_giwretry,
1716 (iw_handler) NULL, /* -- hole -- */ 1651 IW_IOCTL(SIOCSIWENCODE) = (iw_handler) p80211wext_siwencode,
1717 (iw_handler) NULL, /* SIOCSIWRATE */ 1652 IW_IOCTL(SIOCGIWENCODE) = (iw_handler) p80211wext_giwencode,
1718 (iw_handler) p80211wext_giwrate, /* SIOCGIWRATE */ 1653/* SIOCSIWPOWER,SIOCGIWPOWER */
1719 (iw_handler) p80211wext_siwrts, /* SIOCSIWRTS */
1720 (iw_handler) p80211wext_giwrts, /* SIOCGIWRTS */
1721 (iw_handler) p80211wext_siwfrag, /* SIOCSIWFRAG */
1722 (iw_handler) p80211wext_giwfrag, /* SIOCGIWFRAG */
1723 (iw_handler) p80211wext_siwtxpow, /* SIOCSIWTXPOW */
1724 (iw_handler) p80211wext_giwtxpow, /* SIOCGIWTXPOW */
1725 (iw_handler) p80211wext_siwretry, /* SIOCSIWRETRY */
1726 (iw_handler) p80211wext_giwretry, /* SIOCGIWRETRY */
1727 (iw_handler) p80211wext_siwencode, /* SIOCSIWENCODE */
1728 (iw_handler) p80211wext_giwencode, /* SIOCGIWENCODE */
1729 (iw_handler) NULL, /* SIOCSIWPOWER */
1730 (iw_handler) NULL, /* SIOCGIWPOWER */
1731/* WPA operations */ 1654/* WPA operations */
1732 (iw_handler) NULL, /* -- hole -- */ 1655/* SIOCSIWGENIE,SIOCGIWGENIE generic IE */
1733 (iw_handler) NULL, /* -- hole -- */ 1656 IW_IOCTL(SIOCSIWAUTH) = (iw_handler) p80211_wext_set_iwauth, /*set authentication mode params */
1734 (iw_handler) NULL, /* SIOCSIWGENIE set generic IE */ 1657 IW_IOCTL(SIOCGIWAUTH) = (iw_handler) p80211_wext_get_iwauth, /*get authentication mode params */
1735 (iw_handler) NULL, /* SIOCGIWGENIE get generic IE */ 1658 IW_IOCTL(SIOCSIWENCODEEXT) = (iw_handler) p80211wext_set_encodeext, /*set encoding token & mode */
1736 (iw_handler) p80211_wext_set_iwauth, /* SIOCSIWAUTH set authentication mode params */ 1659 IW_IOCTL(SIOCGIWENCODEEXT) = (iw_handler) p80211wext_get_encodeext, /*get encoding token & mode */
1737 (iw_handler) p80211_wext_get_iwauth, /* SIOCGIWAUTH get authentication mode params */ 1660/* SIOCSIWPMKSA PMKSA cache operation */
1738
1739 (iw_handler) p80211wext_set_encodeext, /* SIOCSIWENCODEEXT set encoding token & mode */
1740 (iw_handler) p80211wext_get_encodeext, /* SIOCGIWENCODEEXT get encoding token & mode */
1741 (iw_handler) NULL, /* SIOCSIWPMKSA PMKSA cache operation */
1742}; 1661};
1743 1662
1744struct iw_handler_def p80211wext_handler_def = { 1663struct iw_handler_def p80211wext_handler_def = {
diff --git a/drivers/staging/wlan-ng/prism2fw.c b/drivers/staging/wlan-ng/prism2fw.c
index d383ea85c9bc..d20c8797bcc7 100644
--- a/drivers/staging/wlan-ng/prism2fw.c
+++ b/drivers/staging/wlan-ng/prism2fw.c
@@ -160,21 +160,30 @@ hfa384x_caplevel_t priid;
160/*================================================================*/ 160/*================================================================*/
161/* Local Function Declarations */ 161/* Local Function Declarations */
162 162
163int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev); 163static int prism2_fwapply(const struct ihex_binrec *rfptr,
164int read_fwfile(const struct ihex_binrec *rfptr); 164wlandevice_t *wlandev);
165int mkimage(imgchunk_t *clist, unsigned int *ccnt); 165
166int read_cardpda(pda_t *pda, wlandevice_t *wlandev); 166static int read_fwfile(const struct ihex_binrec *rfptr);
167int mkpdrlist(pda_t *pda); 167
168int plugimage(imgchunk_t *fchunk, unsigned int nfchunks, 168static int mkimage(imgchunk_t *clist, unsigned int *ccnt);
169
170static int read_cardpda(pda_t *pda, wlandevice_t *wlandev);
171
172static int mkpdrlist(pda_t *pda);
173
174static int plugimage(imgchunk_t *fchunk, unsigned int nfchunks,
169 s3plugrec_t *s3plug, unsigned int ns3plug, pda_t * pda); 175 s3plugrec_t *s3plug, unsigned int ns3plug, pda_t * pda);
170int crcimage(imgchunk_t *fchunk, unsigned int nfchunks, 176
177static int crcimage(imgchunk_t *fchunk, unsigned int nfchunks,
171 s3crcrec_t *s3crc, unsigned int ns3crc); 178 s3crcrec_t *s3crc, unsigned int ns3crc);
172int writeimage(wlandevice_t *wlandev, imgchunk_t *fchunk, 179
180static int writeimage(wlandevice_t *wlandev, imgchunk_t *fchunk,
173 unsigned int nfchunks); 181 unsigned int nfchunks);
174void free_chunks(imgchunk_t *fchunk, unsigned int *nfchunks); 182static void free_chunks(imgchunk_t *fchunk, unsigned int *nfchunks);
175void free_srecs(void); 183
184static void free_srecs(void);
176 185
177int validate_identity(void); 186static int validate_identity(void);
178 187
179/*================================================================*/ 188/*================================================================*/
180/* Function Definitions */ 189/* Function Definitions */
@@ -255,7 +264,7 @@ int prism2_fwapply(const struct ihex_binrec *rfptr, wlandevice_t *wlandev)
255 /* clear the pda and add an initial END record */ 264 /* clear the pda and add an initial END record */
256 memset(&pda, 0, sizeof(pda)); 265 memset(&pda, 0, sizeof(pda));
257 pda.rec[0] = (hfa384x_pdrec_t *) pda.buf; 266 pda.rec[0] = (hfa384x_pdrec_t *) pda.buf;
258 pda.rec[0]->len = cpu_to_le16(2); /* len in words *//* len in words */ 267 pda.rec[0]->len = cpu_to_le16(2); /* len in words */
259 pda.rec[0]->code = cpu_to_le16(HFA384x_PDR_END_OF_PDA); 268 pda.rec[0]->code = cpu_to_le16(HFA384x_PDR_END_OF_PDA);
260 pda.nrec = 1; 269 pda.nrec = 1;
261 270
@@ -527,13 +536,12 @@ int mkimage(imgchunk_t *clist, unsigned int *ccnt)
527 536
528 /* Allocate buffer space for chunks */ 537 /* Allocate buffer space for chunks */
529 for (i = 0; i < *ccnt; i++) { 538 for (i = 0; i < *ccnt; i++) {
530 clist[i].data = kmalloc(clist[i].len, GFP_KERNEL); 539 clist[i].data = kzalloc(clist[i].len, GFP_KERNEL);
531 if (clist[i].data == NULL) { 540 if (clist[i].data == NULL) {
532 printk(KERN_ERR 541 printk(KERN_ERR
533 "failed to allocate image space, exitting.\n"); 542 "failed to allocate image space, exitting.\n");
534 return 1; 543 return 1;
535 } 544 }
536 memset(clist[i].data, 0, clist[i].len);
537 pr_debug("chunk[%d]: addr=0x%06x len=%d\n", 545 pr_debug("chunk[%d]: addr=0x%06x len=%d\n",
538 i, clist[i].addr, clist[i].len); 546 i, clist[i].addr, clist[i].len);
539 } 547 }
diff --git a/drivers/staging/wlan-ng/prism2sta.c b/drivers/staging/wlan-ng/prism2sta.c
index 31ac8da39c81..6cd09352f893 100644
--- a/drivers/staging/wlan-ng/prism2sta.c
+++ b/drivers/staging/wlan-ng/prism2sta.c
@@ -426,7 +426,7 @@ static int prism2sta_mlmerequest(wlandevice_t *wlandev, p80211msg_t *msg)
426* msgp ptr to msg buffer 426* msgp ptr to msg buffer
427* 427*
428* Returns: 428* Returns:
429* A p80211 message resultcode value. 429* A p80211 message resultcode value.
430* 430*
431* Side effects: 431* Side effects:
432* 432*
@@ -458,7 +458,7 @@ u32 prism2sta_ifstate(wlandevice_t *wlandev, u32 ifstate)
458 "hfa384x_drvr_start() failed," 458 "hfa384x_drvr_start() failed,"
459 "result=%d\n", (int)result); 459 "result=%d\n", (int)result);
460 result = 460 result =
461 P80211ENUM_resultcode_implementation_failure; 461 P80211ENUM_resultcode_implementation_failure;
462 wlandev->msdstate = WLAN_MSD_HWPRESENT; 462 wlandev->msdstate = WLAN_MSD_HWPRESENT;
463 break; 463 break;
464 } 464 }
@@ -503,7 +503,7 @@ u32 prism2sta_ifstate(wlandevice_t *wlandev, u32 ifstate)
503 "hfa384x_drvr_start() failed," 503 "hfa384x_drvr_start() failed,"
504 "result=%d\n", (int)result); 504 "result=%d\n", (int)result);
505 result = 505 result =
506 P80211ENUM_resultcode_implementation_failure; 506 P80211ENUM_resultcode_implementation_failure;
507 wlandev->msdstate = WLAN_MSD_HWPRESENT; 507 wlandev->msdstate = WLAN_MSD_HWPRESENT;
508 break; 508 break;
509 } 509 }
@@ -514,7 +514,7 @@ u32 prism2sta_ifstate(wlandevice_t *wlandev, u32 ifstate)
514 "prism2sta_getcardinfo() failed," 514 "prism2sta_getcardinfo() failed,"
515 "result=%d\n", (int)result); 515 "result=%d\n", (int)result);
516 result = 516 result =
517 P80211ENUM_resultcode_implementation_failure; 517 P80211ENUM_resultcode_implementation_failure;
518 hfa384x_drvr_stop(hw); 518 hfa384x_drvr_stop(hw);
519 wlandev->msdstate = WLAN_MSD_HWPRESENT; 519 wlandev->msdstate = WLAN_MSD_HWPRESENT;
520 break; 520 break;
@@ -525,7 +525,7 @@ u32 prism2sta_ifstate(wlandevice_t *wlandev, u32 ifstate)
525 "prism2sta_globalsetup() failed," 525 "prism2sta_globalsetup() failed,"
526 "result=%d\n", (int)result); 526 "result=%d\n", (int)result);
527 result = 527 result =
528 P80211ENUM_resultcode_implementation_failure; 528 P80211ENUM_resultcode_implementation_failure;
529 hfa384x_drvr_stop(hw); 529 hfa384x_drvr_stop(hw);
530 wlandev->msdstate = WLAN_MSD_HWPRESENT; 530 wlandev->msdstate = WLAN_MSD_HWPRESENT;
531 break; 531 break;
@@ -1178,8 +1178,8 @@ static void prism2sta_inf_chinforesults(wlandevice_t *wlandev,
1178 chinforesult->active = 1178 chinforesult->active =
1179 le16_to_cpu(inf->info.chinforesult.result[n]. 1179 le16_to_cpu(inf->info.chinforesult.result[n].
1180 active); 1180 active);
1181 pr_debug 1181 pr_debug
1182 ("chinfo: channel %d, %s level (avg/peak)=%d/%d dB, pcf %d\n", 1182 ("chinfo: channel %d, %s level (avg/peak)=%d/%d dB, pcf %d\n",
1183 channel + 1, 1183 channel + 1,
1184 chinforesult-> 1184 chinforesult->
1185 active & HFA384x_CHINFORESULT_BSSACTIVE ? "signal" 1185 active & HFA384x_CHINFORESULT_BSSACTIVE ? "signal"
@@ -1246,7 +1246,9 @@ void prism2sta_processing_defer(struct work_struct *data)
1246 1246
1247 netif_carrier_on(wlandev->netdev); 1247 netif_carrier_on(wlandev->netdev);
1248 1248
1249 /* If we are joining a specific AP, set our state and reset retries */ 1249 /* If we are joining a specific AP, set our
1250 * state and reset retries
1251 */
1250 if (hw->join_ap == 1) 1252 if (hw->join_ap == 1)
1251 hw->join_ap = 2; 1253 hw->join_ap = 2;
1252 hw->join_retries = 60; 1254 hw->join_retries = 60;
@@ -1261,9 +1263,9 @@ void prism2sta_processing_defer(struct work_struct *data)
1261 /* Collect the BSSID, and set state to allow tx */ 1263 /* Collect the BSSID, and set state to allow tx */
1262 1264
1263 result = hfa384x_drvr_getconfig(hw, 1265 result = hfa384x_drvr_getconfig(hw,
1264 HFA384x_RID_CURRENTBSSID, 1266 HFA384x_RID_CURRENTBSSID,
1265 wlandev->bssid, 1267 wlandev->bssid,
1266 WLAN_BSSID_LEN); 1268 WLAN_BSSID_LEN);
1267 if (result) { 1269 if (result) {
1268 pr_debug 1270 pr_debug
1269 ("getconfig(0x%02x) failed, result = %d\n", 1271 ("getconfig(0x%02x) failed, result = %d\n",
@@ -1286,8 +1288,8 @@ void prism2sta_processing_defer(struct work_struct *data)
1286 1288
1287 /* Collect the port status */ 1289 /* Collect the port status */
1288 result = hfa384x_drvr_getconfig16(hw, 1290 result = hfa384x_drvr_getconfig16(hw,
1289 HFA384x_RID_PORTSTATUS, 1291 HFA384x_RID_PORTSTATUS,
1290 &portstatus); 1292 &portstatus);
1291 if (result) { 1293 if (result) {
1292 pr_debug 1294 pr_debug
1293 ("getconfig(0x%02x) failed, result = %d\n", 1295 ("getconfig(0x%02x) failed, result = %d\n",
@@ -1322,7 +1324,7 @@ void prism2sta_processing_defer(struct work_struct *data)
1322 &joinreq, 1324 &joinreq,
1323 HFA384x_RID_JOINREQUEST_LEN); 1325 HFA384x_RID_JOINREQUEST_LEN);
1324 printk(KERN_INFO 1326 printk(KERN_INFO
1325 "linkstatus=DISCONNECTED (re-submitting join)\n"); 1327 "linkstatus=DISCONNECTED (re-submitting join)\n");
1326 } else { 1328 } else {
1327 if (wlandev->netdev->type == ARPHRD_ETHER) 1329 if (wlandev->netdev->type == ARPHRD_ETHER)
1328 printk(KERN_INFO 1330 printk(KERN_INFO
@@ -1509,14 +1511,15 @@ static void prism2sta_inf_assocstatus(wlandevice_t *wlandev,
1509 rec.reason = le16_to_cpu(rec.reason); 1511 rec.reason = le16_to_cpu(rec.reason);
1510 1512
1511 /* 1513 /*
1512 ** Find the address in the list of authenticated stations. If it wasn't 1514 ** Find the address in the list of authenticated stations.
1513 ** found, then this address has not been previously authenticated and 1515 ** If it wasn't found, then this address has not been previously
1514 ** something weird has happened if this is anything other than an 1516 ** authenticated and something weird has happened if this is
1515 ** "authentication failed" message. If the address was found, then 1517 ** anything other than an "authentication failed" message.
1516 ** set the "associated" flag for that station, based on whether the 1518 ** If the address was found, then set the "associated" flag for
1517 ** station is associating or losing its association. Something weird 1519 ** that station, based on whether the station is associating or
1518 ** has also happened if we find the address in the list of authenticated 1520 ** losing its association. Something weird has also happened
1519 ** stations but we are getting an "authentication failed" message. 1521 ** if we find the address in the list of authenticated stations
1522 ** but we are getting an "authentication failed" message.
1520 */ 1523 */
1521 1524
1522 for (i = 0; i < hw->authlist.cnt; i++) 1525 for (i = 0; i < hw->authlist.cnt; i++)
@@ -1526,7 +1529,7 @@ static void prism2sta_inf_assocstatus(wlandevice_t *wlandev,
1526 if (i >= hw->authlist.cnt) { 1529 if (i >= hw->authlist.cnt) {
1527 if (rec.assocstatus != HFA384x_ASSOCSTATUS_AUTHFAIL) 1530 if (rec.assocstatus != HFA384x_ASSOCSTATUS_AUTHFAIL)
1528 printk(KERN_WARNING 1531 printk(KERN_WARNING
1529 "assocstatus info frame received for non-authenticated station.\n"); 1532 "assocstatus info frame received for non-authenticated station.\n");
1530 } else { 1533 } else {
1531 hw->authlist.assoc[i] = 1534 hw->authlist.assoc[i] =
1532 (rec.assocstatus == HFA384x_ASSOCSTATUS_STAASSOC || 1535 (rec.assocstatus == HFA384x_ASSOCSTATUS_STAASSOC ||
@@ -1534,7 +1537,7 @@ static void prism2sta_inf_assocstatus(wlandevice_t *wlandev,
1534 1537
1535 if (rec.assocstatus == HFA384x_ASSOCSTATUS_AUTHFAIL) 1538 if (rec.assocstatus == HFA384x_ASSOCSTATUS_AUTHFAIL)
1536 printk(KERN_WARNING 1539 printk(KERN_WARNING
1537 "authfail assocstatus info frame received for authenticated station.\n"); 1540"authfail assocstatus info frame received for authenticated station.\n");
1538 } 1541 }
1539 1542
1540 return; 1543 return;
@@ -1681,12 +1684,12 @@ static void prism2sta_inf_authreq_defer(wlandevice_t *wlandev,
1681 } 1684 }
1682 1685
1683 /* 1686 /*
1684 ** If the authentication is okay, then add the MAC address to the list 1687 ** If the authentication is okay, then add the MAC address to the
1685 ** of authenticated stations. Don't add the address if it is already in 1688 ** list of authenticated stations. Don't add the address if it
1686 ** the list. (802.11b does not seem to disallow a station from issuing 1689 ** is already in the list. (802.11b does not seem to disallow
1687 ** an authentication request when the station is already authenticated. 1690 ** a station from issuing an authentication request when the
1688 ** Does this sort of thing ever happen? We might as well do the check 1691 ** station is already authenticated. Does this sort of thing
1689 ** just in case.) 1692 ** ever happen? We might as well do the check just in case.)
1690 */ 1693 */
1691 1694
1692 added = 0; 1695 added = 0;
@@ -1931,7 +1934,7 @@ void prism2sta_ev_alloc(wlandevice_t *wlandev)
1931* the created wlandevice_t structure. 1934* the created wlandevice_t structure.
1932* 1935*
1933* Side effects: 1936* Side effects:
1934* also allocates the priv/hw structures. 1937* also allocates the priv/hw structures.
1935* 1938*
1936* Call context: 1939* Call context:
1937* process thread 1940* process thread
@@ -1995,9 +1998,9 @@ void prism2sta_commsqual_defer(struct work_struct *data)
1995 1998
1996 /* It only makes sense to poll these in non-IBSS */ 1999 /* It only makes sense to poll these in non-IBSS */
1997 if (wlandev->macmode != WLAN_MACMODE_IBSS_STA) { 2000 if (wlandev->macmode != WLAN_MACMODE_IBSS_STA) {
1998 result = hfa384x_drvr_getconfig(hw, HFA384x_RID_DBMCOMMSQUALITY, 2001 result = hfa384x_drvr_getconfig(
1999 &hw->qual, 2002 hw, HFA384x_RID_DBMCOMMSQUALITY,
2000 HFA384x_RID_DBMCOMMSQUALITY_LEN); 2003 &hw->qual, HFA384x_RID_DBMCOMMSQUALITY_LEN);
2001 2004
2002 if (result) { 2005 if (result) {
2003 printk(KERN_ERR "error fetching commsqual\n"); 2006 printk(KERN_ERR "error fetching commsqual\n");
diff --git a/drivers/staging/wlan-ng/prism2usb.c b/drivers/staging/wlan-ng/prism2usb.c
index 501d27f74c7d..f5cff751db2f 100644
--- a/drivers/staging/wlan-ng/prism2usb.c
+++ b/drivers/staging/wlan-ng/prism2usb.c
@@ -285,11 +285,76 @@ exit:
285 usb_set_intfdata(interface, NULL); 285 usb_set_intfdata(interface, NULL);
286} 286}
287 287
288#ifdef CONFIG_PM
289static int prism2sta_suspend(struct usb_interface *interface,
290 pm_message_t message)
291{
292 hfa384x_t *hw = NULL;
293 wlandevice_t *wlandev;
294 wlandev = (wlandevice_t *) usb_get_intfdata(interface);
295 if (!wlandev)
296 return -ENODEV;
297
298 hw = wlandev->priv;
299 if (!hw)
300 return -ENODEV;
301
302 prism2sta_ifstate(wlandev, P80211ENUM_ifstate_disable);
303
304 usb_kill_urb(&hw->rx_urb);
305 usb_kill_urb(&hw->tx_urb);
306 usb_kill_urb(&hw->ctlx_urb);
307
308 return 0;
309}
310
311static int prism2sta_resume(struct usb_interface *interface)
312{
313 int result = 0;
314 hfa384x_t *hw = NULL;
315 wlandevice_t *wlandev;
316 wlandev = (wlandevice_t *) usb_get_intfdata(interface);
317 if (!wlandev)
318 return -ENODEV;
319
320 hw = wlandev->priv;
321 if (!hw)
322 return -ENODEV;
323
324 /* Do a chip-level reset on the MAC */
325 if (prism2_doreset) {
326 result = hfa384x_corereset(hw,
327 prism2_reset_holdtime,
328 prism2_reset_settletime, 0);
329 if (result != 0) {
330 unregister_wlandev(wlandev);
331 hfa384x_destroy(hw);
332 printk(KERN_ERR
333 "%s: hfa384x_corereset() failed.\n", dev_info);
334 kfree(wlandev);
335 kfree(hw);
336 wlandev = NULL;
337 return -ENODEV;
338 }
339 }
340
341 prism2sta_ifstate(wlandev, P80211ENUM_ifstate_enable);
342
343 return 0;
344}
345#else
346#define prism2sta_suspend NULL
347#define prism2sta_resume NULL
348#endif /* CONFIG_PM */
349
288static struct usb_driver prism2_usb_driver = { 350static struct usb_driver prism2_usb_driver = {
289 .name = "prism2_usb", 351 .name = "prism2_usb",
290 .probe = prism2sta_probe_usb, 352 .probe = prism2sta_probe_usb,
291 .disconnect = prism2sta_disconnect_usb, 353 .disconnect = prism2sta_disconnect_usb,
292 .id_table = usb_prism_tbl, 354 .id_table = usb_prism_tbl,
355 .suspend = prism2sta_suspend,
356 .resume = prism2sta_resume,
357 .reset_resume = prism2sta_resume,
293 /* fops, minor? */ 358 /* fops, minor? */
294}; 359};
295 360
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index be411c12ebbe..8b7f5e0914ad 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -1333,6 +1333,8 @@ struct block_device_operations {
1333 void (*unlock_native_capacity) (struct gendisk *); 1333 void (*unlock_native_capacity) (struct gendisk *);
1334 int (*revalidate_disk) (struct gendisk *); 1334 int (*revalidate_disk) (struct gendisk *);
1335 int (*getgeo)(struct block_device *, struct hd_geometry *); 1335 int (*getgeo)(struct block_device *, struct hd_geometry *);
1336 /* this callback is with swap_lock and sometimes page table lock held */
1337 void (*swap_slot_free_notify) (struct block_device *, unsigned long);
1336 struct module *owner; 1338 struct module *owner;
1337}; 1339};
1338 1340
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 1f59d9340c4d..ec2b7a42b45f 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -146,6 +146,7 @@ enum {
146 SWP_DISCARDING = (1 << 3), /* now discarding a free cluster */ 146 SWP_DISCARDING = (1 << 3), /* now discarding a free cluster */
147 SWP_SOLIDSTATE = (1 << 4), /* blkdev seeks are cheap */ 147 SWP_SOLIDSTATE = (1 << 4), /* blkdev seeks are cheap */
148 SWP_CONTINUED = (1 << 5), /* swap_map has count continuation */ 148 SWP_CONTINUED = (1 << 5), /* swap_map has count continuation */
149 SWP_BLKDEV = (1 << 6), /* its a block device */
149 /* add others here before... */ 150 /* add others here before... */
150 SWP_SCANNING = (1 << 8), /* refcount in scan_swap_map */ 151 SWP_SCANNING = (1 << 8), /* refcount in scan_swap_map */
151}; 152};
diff --git a/mm/swapfile.c b/mm/swapfile.c
index eb086e0f4dcc..03aa2d55f1a2 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@ -577,6 +577,7 @@ static unsigned char swap_entry_free(struct swap_info_struct *p,
577 577
578 /* free if no reference */ 578 /* free if no reference */
579 if (!usage) { 579 if (!usage) {
580 struct gendisk *disk = p->bdev->bd_disk;
580 if (offset < p->lowest_bit) 581 if (offset < p->lowest_bit)
581 p->lowest_bit = offset; 582 p->lowest_bit = offset;
582 if (offset > p->highest_bit) 583 if (offset > p->highest_bit)
@@ -586,6 +587,9 @@ static unsigned char swap_entry_free(struct swap_info_struct *p,
586 swap_list.next = p->type; 587 swap_list.next = p->type;
587 nr_swap_pages++; 588 nr_swap_pages++;
588 p->inuse_pages--; 589 p->inuse_pages--;
590 if ((p->flags & SWP_BLKDEV) &&
591 disk->fops->swap_slot_free_notify)
592 disk->fops->swap_slot_free_notify(p->bdev, offset);
589 } 593 }
590 594
591 return usage; 595 return usage;
@@ -1887,6 +1891,7 @@ SYSCALL_DEFINE2(swapon, const char __user *, specialfile, int, swap_flags)
1887 if (error < 0) 1891 if (error < 0)
1888 goto bad_swap; 1892 goto bad_swap;
1889 p->bdev = bdev; 1893 p->bdev = bdev;
1894 p->flags |= SWP_BLKDEV;
1890 } else if (S_ISREG(inode->i_mode)) { 1895 } else if (S_ISREG(inode->i_mode)) {
1891 p->bdev = inode->i_sb->s_bdev; 1896 p->bdev = inode->i_sb->s_bdev;
1892 mutex_lock(&inode->i_mutex); 1897 mutex_lock(&inode->i_mutex);