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authorPaul Mundt <lethal@linux-sh.org>2011-01-14 01:57:47 -0500
committerPaul Mundt <lethal@linux-sh.org>2011-01-14 01:57:47 -0500
commitbba958783b1b4cb0a9420f4e11082467132a334c (patch)
tree9bdd12bf167d10040eb2eb16fe741211ffb82803
parent9c4bc1c2befbbdce4b9fd526e67a7a2ea143ffa2 (diff)
mmc: sh_mmcif: Convert to __raw_xxx() I/O accessors.
When using the I/O accessors in raw mode from the boot stubs we don't want to bother with any of the complexity associated with readl/writel and friends. Furthermore, utilization within the context of the host driver itself is all performed on an ioremapped window, so using the __raw variants there doesn't pose any problem either. If and when barriers need to be added in the future, these will need to be explicitly written out, but this is so far not a concern for any of the affected CPUs in question. This fixes up the link error introduced by the ARM tree via its barrier refactoring: arch/arm/boot/compressed/mmcif-sh7372.o: In function `mmcif_loader': mmcif-sh7372.c:(.text+0x9e8): undefined reference to `outer_cache Following the change in: http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6275/1 Reported-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--include/linux/mmc/sh_mmcif.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
index bf173502d744..38d393092812 100644
--- a/include/linux/mmc/sh_mmcif.h
+++ b/include/linux/mmc/sh_mmcif.h
@@ -94,12 +94,12 @@ struct sh_mmcif_plat_data {
94 94
95static inline u32 sh_mmcif_readl(void __iomem *addr, int reg) 95static inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
96{ 96{
97 return readl(addr + reg); 97 return __raw_readl(addr + reg);
98} 98}
99 99
100static inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val) 100static inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val)
101{ 101{
102 writel(val, addr + reg); 102 __raw_writel(val, addr + reg);
103} 103}
104 104
105#define SH_MMCIF_BBS 512 /* boot block size */ 105#define SH_MMCIF_BBS 512 /* boot block size */